/src/build/lib/Target/PowerPC/PPCGenAsmMatcher.inc
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1 | | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
2 | | |* *| |
3 | | |* Assembly Matcher Source Fragment *| |
4 | | |* *| |
5 | | |* Automatically generated file, do not edit! *| |
6 | | |* From: PPC.td *| |
7 | | |* *| |
8 | | \*===----------------------------------------------------------------------===*/ |
9 | | |
10 | | |
11 | | #ifdef GET_ASSEMBLER_HEADER |
12 | | #undef GET_ASSEMBLER_HEADER |
13 | | // This should be included into the middle of the declaration of |
14 | | // your subclasses implementation of MCTargetAsmParser. |
15 | | FeatureBitset ComputeAvailableFeatures(const FeatureBitset &FB) const; |
16 | | void convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode, |
17 | | const OperandVector &Operands); |
18 | | void convertToMapAndConstraints(unsigned Kind, |
19 | | const OperandVector &Operands) override; |
20 | | unsigned MatchInstructionImpl(const OperandVector &Operands, |
21 | | MCInst &Inst, |
22 | | uint64_t &ErrorInfo, |
23 | | FeatureBitset &MissingFeatures, |
24 | | bool matchingInlineAsm, |
25 | | unsigned VariantID = 0); |
26 | | unsigned MatchInstructionImpl(const OperandVector &Operands, |
27 | | MCInst &Inst, |
28 | | uint64_t &ErrorInfo, |
29 | | bool matchingInlineAsm, |
30 | 0 | unsigned VariantID = 0) { |
31 | 0 | FeatureBitset MissingFeatures; |
32 | 0 | return MatchInstructionImpl(Operands, Inst, ErrorInfo, MissingFeatures, |
33 | 0 | matchingInlineAsm, VariantID); |
34 | 0 | } |
35 | | |
36 | | #endif // GET_ASSEMBLER_HEADER |
37 | | |
38 | | |
39 | | #ifdef GET_OPERAND_DIAGNOSTIC_TYPES |
40 | | #undef GET_OPERAND_DIAGNOSTIC_TYPES |
41 | | |
42 | | #endif // GET_OPERAND_DIAGNOSTIC_TYPES |
43 | | |
44 | | |
45 | | #ifdef GET_REGISTER_MATCHER |
46 | | #undef GET_REGISTER_MATCHER |
47 | | |
48 | | // Bits for subtarget features that participate in instruction matching. |
49 | | enum SubtargetFeatureBits : uint8_t { |
50 | | Feature_ModernAsBit = 0, |
51 | | }; |
52 | | |
53 | | #endif // GET_REGISTER_MATCHER |
54 | | |
55 | | |
56 | | #ifdef GET_SUBTARGET_FEATURE_NAME |
57 | | #undef GET_SUBTARGET_FEATURE_NAME |
58 | | |
59 | | // User-level names for subtarget features that participate in |
60 | | // instruction matching. |
61 | | static const char *getSubtargetFeatureName(uint64_t Val) { |
62 | | switch(Val) { |
63 | | case Feature_ModernAsBit: return ""; |
64 | | default: return "(unknown)"; |
65 | | } |
66 | | } |
67 | | |
68 | | #endif // GET_SUBTARGET_FEATURE_NAME |
69 | | |
70 | | |
71 | | #ifdef GET_MATCHER_IMPLEMENTATION |
72 | | #undef GET_MATCHER_IMPLEMENTATION |
73 | | |
74 | 0 | static void applyMnemonicAliases(StringRef &Mnemonic, const FeatureBitset &Features, unsigned VariantID) { |
75 | 0 | switch (VariantID) { |
76 | 0 | case 0: |
77 | 0 | switch (Mnemonic.size()) { |
78 | 0 | default: break; |
79 | 0 | case 5: // 1 string to match. |
80 | 0 | if (memcmp(Mnemonic.data()+0, "cntlz", 5) != 0) |
81 | 0 | break; |
82 | 0 | Mnemonic = "cntlzw"; // "cntlz" |
83 | 0 | return; |
84 | 0 | case 6: // 1 string to match. |
85 | 0 | if (memcmp(Mnemonic.data()+0, "cntlz.", 6) != 0) |
86 | 0 | break; |
87 | 0 | Mnemonic = "cntlzw."; // "cntlz." |
88 | 0 | return; |
89 | 0 | } |
90 | 0 | break; |
91 | 0 | } |
92 | 0 | switch (Mnemonic.size()) { |
93 | 0 | default: break; |
94 | 0 | case 5: // 1 string to match. |
95 | 0 | if (memcmp(Mnemonic.data()+0, "cntlz", 5) != 0) |
96 | 0 | break; |
97 | 0 | Mnemonic = "cntlzw"; // "cntlz" |
98 | 0 | return; |
99 | 0 | case 6: // 1 string to match. |
100 | 0 | if (memcmp(Mnemonic.data()+0, "cntlz.", 6) != 0) |
101 | 0 | break; |
102 | 0 | Mnemonic = "cntlzw."; // "cntlz." |
103 | 0 | return; |
104 | 0 | } |
105 | 0 | } |
106 | | |
107 | | enum { |
108 | | Tie0_1_1, |
109 | | }; |
110 | | |
111 | | static const uint8_t TiedAsmOperandTable[][3] = { |
112 | | /* Tie0_1_1 */ { 0, 1, 1 }, |
113 | | }; |
114 | | |
115 | | namespace { |
116 | | enum OperatorConversionKind { |
117 | | CVT_Done, |
118 | | CVT_Reg, |
119 | | CVT_Tied, |
120 | | CVT_95_addRegG8RCOperands, |
121 | | CVT_95_addTLSRegOperands, |
122 | | CVT_95_addRegGPRCOperands, |
123 | | CVT_95_addImmOperands, |
124 | | CVT_95_addRegGPRCNoR0Operands, |
125 | | CVT_95_addS16ImmOperands, |
126 | | CVT_95_addU16ImmOperands, |
127 | | CVT_95_addBranchTargetOperands, |
128 | | CVT_95_addRegCRBITRCOperands, |
129 | | CVT_imm_95_3, |
130 | | CVT_imm_95_2, |
131 | | CVT_imm_95_0, |
132 | | CVT_95_addRegVRRCOperands, |
133 | | CVT_imm_95_8, |
134 | | CVT_imm_95_10, |
135 | | CVT_imm_95_76, |
136 | | CVT_regCR0, |
137 | | CVT_95_addRegCRRCOperands, |
138 | | CVT_imm_95_79, |
139 | | CVT_imm_95_78, |
140 | | CVT_imm_95_4, |
141 | | CVT_imm_95_7, |
142 | | CVT_imm_95_6, |
143 | | CVT_imm_95_44, |
144 | | CVT_imm_95_47, |
145 | | CVT_imm_95_46, |
146 | | CVT_imm_95_36, |
147 | | CVT_imm_95_39, |
148 | | CVT_imm_95_38, |
149 | | CVT_imm_95_12, |
150 | | CVT_imm_95_15, |
151 | | CVT_imm_95_14, |
152 | | CVT_imm_95_68, |
153 | | CVT_imm_95_71, |
154 | | CVT_imm_95_70, |
155 | | CVT_imm_95_100, |
156 | | CVT_imm_95_103, |
157 | | CVT_imm_95_102, |
158 | | CVT_imm_95_108, |
159 | | CVT_imm_95_111, |
160 | | CVT_imm_95_110, |
161 | | CVT_imm_95_31, |
162 | | CVT_95_addRegF8RCOperands, |
163 | | CVT_95_addRegFpRCOperands, |
164 | | CVT_95_addRegGxRCNoR0Operands, |
165 | | CVT_95_addRegGxRCOperands, |
166 | | CVT_regR0, |
167 | | CVT_95_addRegDMRRCOperands, |
168 | | CVT_95_addRegVSRpRCOperands, |
169 | | CVT_95_addRegDMRROWpRCOperands, |
170 | | CVT_95_addRegACCRCOperands, |
171 | | CVT_95_addRegSPERCOperands, |
172 | | CVT_95_addRegSPE4RCOperands, |
173 | | CVT_95_addRegF4RCOperands, |
174 | | CVT_95_addRegG8RCNoX0Operands, |
175 | | CVT_regCR0EQ, |
176 | | CVT_regCR0GT, |
177 | | CVT_regCR0LT, |
178 | | CVT_regZERO8, |
179 | | CVT_regZERO, |
180 | | CVT_95_addRegG8pRCOperands, |
181 | | CVT_imm_95_1, |
182 | | CVT_95_addRegVFRCOperands, |
183 | | CVT_95_addRegVSFRCOperands, |
184 | | CVT_95_addRegVSSRCOperands, |
185 | | CVT_95_addRegVSRCOperands, |
186 | | CVT_imm_95_29, |
187 | | CVT_imm_95_280, |
188 | | CVT_imm_95_128, |
189 | | CVT_imm_95_129, |
190 | | CVT_imm_95_130, |
191 | | CVT_imm_95_131, |
192 | | CVT_imm_95_132, |
193 | | CVT_imm_95_133, |
194 | | CVT_imm_95_134, |
195 | | CVT_imm_95_135, |
196 | | CVT_imm_95_28, |
197 | | CVT_imm_95_9, |
198 | | CVT_imm_95_19, |
199 | | CVT_imm_95_537, |
200 | | CVT_imm_95_539, |
201 | | CVT_imm_95_541, |
202 | | CVT_imm_95_543, |
203 | | CVT_imm_95_536, |
204 | | CVT_imm_95_538, |
205 | | CVT_imm_95_540, |
206 | | CVT_imm_95_542, |
207 | | CVT_imm_95_1018, |
208 | | CVT_imm_95_981, |
209 | | CVT_imm_95_22, |
210 | | CVT_imm_95_17, |
211 | | CVT_imm_95_18, |
212 | | CVT_imm_95_980, |
213 | | CVT_imm_95_529, |
214 | | CVT_imm_95_531, |
215 | | CVT_imm_95_533, |
216 | | CVT_imm_95_535, |
217 | | CVT_imm_95_528, |
218 | | CVT_imm_95_530, |
219 | | CVT_imm_95_532, |
220 | | CVT_imm_95_534, |
221 | | CVT_imm_95_1019, |
222 | | CVT_95_addCRBitMaskOperands, |
223 | | CVT_imm_95_48, |
224 | | CVT_imm_95_896, |
225 | | CVT_imm_95_287, |
226 | | CVT_imm_95_5, |
227 | | CVT_imm_95_25, |
228 | | CVT_imm_95_512, |
229 | | CVT_imm_95_272, |
230 | | CVT_imm_95_273, |
231 | | CVT_imm_95_274, |
232 | | CVT_imm_95_275, |
233 | | CVT_imm_95_260, |
234 | | CVT_imm_95_261, |
235 | | CVT_imm_95_262, |
236 | | CVT_imm_95_263, |
237 | | CVT_imm_95_26, |
238 | | CVT_imm_95_27, |
239 | | CVT_imm_95_990, |
240 | | CVT_imm_95_991, |
241 | | CVT_imm_95_268, |
242 | | CVT_imm_95_988, |
243 | | CVT_imm_95_989, |
244 | | CVT_imm_95_269, |
245 | | CVT_imm_95_986, |
246 | | CVT_imm_95_13, |
247 | | CVT_imm_95_255, |
248 | | CVT_imm_95_284, |
249 | | CVT_imm_95_285, |
250 | | CVT_regX0, |
251 | | CVT_95_addRegVSRpEvenRCOperands, |
252 | | CVT_imm_95_20, |
253 | | CVT_imm_95_16, |
254 | | CVT_imm_95_24, |
255 | | CVT_NUM_CONVERTERS |
256 | | }; |
257 | | |
258 | | enum InstructionConversionKind { |
259 | | Convert__RegG8RC1_0__RegG8RC1_1__TLSReg1_2, |
260 | | Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, |
261 | | Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, |
262 | | Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2__U2Imm1_3, |
263 | | Convert__RegGPRC1_0__RegGPRCNoR01_1__S16Imm1_2, |
264 | | Convert__RegGPRC1_0__RegGPRC1_1__S16Imm1_2, |
265 | | Convert__RegGPRC1_1__RegGPRC1_2__S16Imm1_3, |
266 | | Convert__RegGPRC1_0__RegGPRCNoR01_1__S17Imm1_2, |
267 | | Convert__RegGPRC1_0__RegGPRC1_1, |
268 | | Convert__RegGPRC1_1__RegGPRC1_2, |
269 | | Convert__RegG8RC1_0__Imm1_1, |
270 | | Convert__RegGPRC1_1__RegGPRC1_2__U16Imm1_3, |
271 | | Convert_NoOperands, |
272 | | Convert__DirectBr1_0, |
273 | | Convert__U5Imm1_0__RegCRBITRC1_1__CondBr1_2, |
274 | | Convert__U5Imm1_1__ATBitsAsHint1_0__RegCRBITRC1_2__CondBr1_3, |
275 | | Convert__U5Imm1_0__imm_95_3__RegCRBITRC1_1__CondBr1_2, |
276 | | Convert__U5Imm1_0__imm_95_2__RegCRBITRC1_1__CondBr1_2, |
277 | | Convert__U5Imm1_0__RegCRBITRC1_1__imm_95_0, |
278 | | Convert__U5Imm1_0__RegCRBITRC1_1__Imm1_2, |
279 | | Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3__U1Imm1_4, |
280 | | Convert__RegVRRC1_1__RegVRRC1_2__U1Imm1_3, |
281 | | Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, |
282 | | Convert__RegVRRC1_1__RegVRRC1_2, |
283 | | Convert__CondBr1_0, |
284 | | Convert__imm_95_0__RegCRBITRC1_0__CondBr1_1, |
285 | | Convert__imm_95_0__RegCRBITRC1_0__imm_95_0, |
286 | | Convert__imm_95_8__RegCRBITRC1_0__CondBr1_1, |
287 | | Convert__imm_95_8__RegCRBITRC1_0__imm_95_0, |
288 | | Convert__imm_95_2__RegCRBITRC1_0__CondBr1_1, |
289 | | Convert__imm_95_2__RegCRBITRC1_0__imm_95_0, |
290 | | Convert__imm_95_10__RegCRBITRC1_0__CondBr1_1, |
291 | | Convert__imm_95_10__RegCRBITRC1_0__imm_95_0, |
292 | | Convert__imm_95_76__regCR0__CondBr1_0, |
293 | | Convert__imm_95_76__RegCRRC1_0__CondBr1_1, |
294 | | Convert__imm_95_79__regCR0__CondBr1_0, |
295 | | Convert__imm_95_79__RegCRRC1_0__CondBr1_1, |
296 | | Convert__imm_95_78__regCR0__CondBr1_0, |
297 | | Convert__imm_95_78__RegCRRC1_0__CondBr1_1, |
298 | | Convert__imm_95_76__regCR0, |
299 | | Convert__imm_95_76__RegCRRC1_0, |
300 | | Convert__imm_95_79__regCR0, |
301 | | Convert__imm_95_79__RegCRRC1_0, |
302 | | Convert__imm_95_78__regCR0, |
303 | | Convert__imm_95_78__RegCRRC1_0, |
304 | | Convert__imm_95_4__RegCRBITRC1_0__CondBr1_1, |
305 | | Convert__imm_95_7__RegCRBITRC1_0__CondBr1_1, |
306 | | Convert__imm_95_6__RegCRBITRC1_0__CondBr1_1, |
307 | | Convert__imm_95_4__RegCRBITRC1_0__imm_95_0, |
308 | | Convert__imm_95_7__RegCRBITRC1_0__imm_95_0, |
309 | | Convert__imm_95_6__RegCRBITRC1_0__imm_95_0, |
310 | | Convert__imm_95_4__regCR0__CondBr1_0, |
311 | | Convert__imm_95_4__RegCRRC1_0__CondBr1_1, |
312 | | Convert__imm_95_7__regCR0__CondBr1_0, |
313 | | Convert__imm_95_7__RegCRRC1_0__CondBr1_1, |
314 | | Convert__imm_95_6__regCR0__CondBr1_0, |
315 | | Convert__imm_95_6__RegCRRC1_0__CondBr1_1, |
316 | | Convert__imm_95_4__regCR0, |
317 | | Convert__imm_95_4__RegCRRC1_0, |
318 | | Convert__imm_95_7__regCR0, |
319 | | Convert__imm_95_7__RegCRRC1_0, |
320 | | Convert__imm_95_6__regCR0, |
321 | | Convert__imm_95_6__RegCRRC1_0, |
322 | | Convert__imm_95_44__regCR0__CondBr1_0, |
323 | | Convert__imm_95_44__RegCRRC1_0__CondBr1_1, |
324 | | Convert__imm_95_47__regCR0__CondBr1_0, |
325 | | Convert__imm_95_47__RegCRRC1_0__CondBr1_1, |
326 | | Convert__imm_95_46__regCR0__CondBr1_0, |
327 | | Convert__imm_95_46__RegCRRC1_0__CondBr1_1, |
328 | | Convert__imm_95_44__regCR0, |
329 | | Convert__imm_95_44__RegCRRC1_0, |
330 | | Convert__imm_95_47__regCR0, |
331 | | Convert__imm_95_47__RegCRRC1_0, |
332 | | Convert__imm_95_46__regCR0, |
333 | | Convert__imm_95_46__RegCRRC1_0, |
334 | | Convert__DirectBr1_0__Imm1_1, |
335 | | Convert__imm_95_36__regCR0__CondBr1_0, |
336 | | Convert__imm_95_36__RegCRRC1_0__CondBr1_1, |
337 | | Convert__imm_95_39__regCR0__CondBr1_0, |
338 | | Convert__imm_95_39__RegCRRC1_0__CondBr1_1, |
339 | | Convert__imm_95_38__regCR0__CondBr1_0, |
340 | | Convert__imm_95_38__RegCRRC1_0__CondBr1_1, |
341 | | Convert__imm_95_36__regCR0, |
342 | | Convert__imm_95_36__RegCRRC1_0, |
343 | | Convert__imm_95_39__regCR0, |
344 | | Convert__imm_95_39__RegCRRC1_0, |
345 | | Convert__imm_95_38__regCR0, |
346 | | Convert__imm_95_38__RegCRRC1_0, |
347 | | Convert__imm_95_12__regCR0__CondBr1_0, |
348 | | Convert__imm_95_12__RegCRRC1_0__CondBr1_1, |
349 | | Convert__imm_95_15__regCR0__CondBr1_0, |
350 | | Convert__imm_95_15__RegCRRC1_0__CondBr1_1, |
351 | | Convert__imm_95_14__regCR0__CondBr1_0, |
352 | | Convert__imm_95_14__RegCRRC1_0__CondBr1_1, |
353 | | Convert__imm_95_12__regCR0, |
354 | | Convert__imm_95_12__RegCRRC1_0, |
355 | | Convert__imm_95_15__regCR0, |
356 | | Convert__imm_95_15__RegCRRC1_0, |
357 | | Convert__imm_95_14__regCR0, |
358 | | Convert__imm_95_14__RegCRRC1_0, |
359 | | Convert__imm_95_68__regCR0__CondBr1_0, |
360 | | Convert__imm_95_68__RegCRRC1_0__CondBr1_1, |
361 | | Convert__imm_95_71__regCR0__CondBr1_0, |
362 | | Convert__imm_95_71__RegCRRC1_0__CondBr1_1, |
363 | | Convert__imm_95_70__regCR0__CondBr1_0, |
364 | | Convert__imm_95_70__RegCRRC1_0__CondBr1_1, |
365 | | Convert__imm_95_68__regCR0, |
366 | | Convert__imm_95_68__RegCRRC1_0, |
367 | | Convert__imm_95_71__regCR0, |
368 | | Convert__imm_95_71__RegCRRC1_0, |
369 | | Convert__imm_95_70__regCR0, |
370 | | Convert__imm_95_70__RegCRRC1_0, |
371 | | Convert__imm_95_100__regCR0__CondBr1_0, |
372 | | Convert__imm_95_100__RegCRRC1_0__CondBr1_1, |
373 | | Convert__imm_95_103__regCR0__CondBr1_0, |
374 | | Convert__imm_95_103__RegCRRC1_0__CondBr1_1, |
375 | | Convert__imm_95_102__regCR0__CondBr1_0, |
376 | | Convert__imm_95_102__RegCRRC1_0__CondBr1_1, |
377 | | Convert__imm_95_100__regCR0, |
378 | | Convert__imm_95_100__RegCRRC1_0, |
379 | | Convert__imm_95_103__regCR0, |
380 | | Convert__imm_95_103__RegCRRC1_0, |
381 | | Convert__imm_95_102__regCR0, |
382 | | Convert__imm_95_102__RegCRRC1_0, |
383 | | Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2, |
384 | | Convert__RegG8RC1_0__RegG8RC1_1, |
385 | | Convert__imm_95_108__regCR0__CondBr1_0, |
386 | | Convert__imm_95_108__RegCRRC1_0__CondBr1_1, |
387 | | Convert__imm_95_111__regCR0__CondBr1_0, |
388 | | Convert__imm_95_111__RegCRRC1_0__CondBr1_1, |
389 | | Convert__imm_95_110__regCR0__CondBr1_0, |
390 | | Convert__imm_95_110__RegCRRC1_0__CondBr1_1, |
391 | | Convert__imm_95_108__regCR0, |
392 | | Convert__imm_95_108__RegCRRC1_0, |
393 | | Convert__imm_95_111__regCR0, |
394 | | Convert__imm_95_111__RegCRRC1_0, |
395 | | Convert__imm_95_110__regCR0, |
396 | | Convert__imm_95_110__RegCRRC1_0, |
397 | | Convert__imm_95_12__RegCRBITRC1_0__CondBr1_1, |
398 | | Convert__imm_95_15__RegCRBITRC1_0__CondBr1_1, |
399 | | Convert__imm_95_14__RegCRBITRC1_0__CondBr1_1, |
400 | | Convert__imm_95_12__RegCRBITRC1_0__imm_95_0, |
401 | | Convert__imm_95_15__RegCRBITRC1_0__imm_95_0, |
402 | | Convert__imm_95_14__RegCRBITRC1_0__imm_95_0, |
403 | | Convert__RegG8RC1_0__RegG8RC1_1__imm_95_0__U6Imm1_2, |
404 | | Convert__RegG8RC1_0__RegGPRC1_1__imm_95_0__U6Imm1_2, |
405 | | Convert__RegG8RC1_1__RegG8RC1_2__imm_95_0__U6Imm1_3, |
406 | | Convert__RegG8RC1_0__RegG8RC1_1__U6Imm1_2__U6Imm1_3, |
407 | | Convert__RegG8RC1_1__RegG8RC1_2__U6Imm1_3__U6Imm1_4, |
408 | | Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2__U5Imm1_3, |
409 | | Convert__RegGPRC1_1__RegGPRC1_2__U5Imm1_3__U5Imm1_4, |
410 | | Convert__RegG8RC1_0__RegG8RC1_1__imm_95_0__U5Imm1_2__imm_95_31, |
411 | | Convert__RegGPRC1_0__RegGPRC1_1__imm_95_0__U5Imm1_2__imm_95_31, |
412 | | Convert__RegG8RC1_1__RegG8RC1_2__imm_95_0__U5Imm1_3__imm_95_31, |
413 | | Convert__RegGPRC1_1__RegGPRC1_2__imm_95_0__U5Imm1_3__imm_95_31, |
414 | | Convert__RegG8RC1_0__RegG8RC1_1__U6Imm1_2, |
415 | | Convert__RegG8RC1_1__RegG8RC1_2__U6Imm1_3, |
416 | | Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2, |
417 | | Convert__RegGPRC1_1__RegGPRC1_2__U5Imm1_3, |
418 | | Convert__RegCRRC1_0__RegGPRC1_2__RegGPRC1_3, |
419 | | Convert__RegCRRC1_0__RegG8RC1_2__RegG8RC1_3, |
420 | | Convert__regCR0__RegG8RC1_0__RegG8RC1_1, |
421 | | Convert__RegCRRC1_0__RegG8RC1_1__RegG8RC1_2, |
422 | | Convert__regCR0__RegG8RC1_0__S16Imm1_1, |
423 | | Convert__RegCRRC1_0__RegG8RC1_1__S16Imm1_2, |
424 | | Convert__RegCRRC1_0__RegGPRC1_2__S16Imm1_3, |
425 | | Convert__RegCRRC1_0__RegG8RC1_2__S16Imm1_3, |
426 | | Convert__regCR0__RegG8RC1_0__U16Imm1_1, |
427 | | Convert__RegCRRC1_0__RegG8RC1_1__U16Imm1_2, |
428 | | Convert__RegCRRC1_0__RegGPRC1_2__U16Imm1_3, |
429 | | Convert__RegCRRC1_0__RegG8RC1_2__U16Imm1_3, |
430 | | Convert__regCR0__RegGPRC1_0__RegGPRC1_1, |
431 | | Convert__RegCRRC1_0__RegGPRC1_1__RegGPRC1_2, |
432 | | Convert__regCR0__RegGPRC1_0__U16Imm1_1, |
433 | | Convert__RegCRRC1_0__RegGPRC1_1__U16Imm1_2, |
434 | | Convert__RegCRRC1_0__U1Imm1_1__RegGPRC1_2__RegGPRC1_3, |
435 | | Convert__regCR0__RegGPRC1_0__S16Imm1_1, |
436 | | Convert__RegCRRC1_0__RegGPRC1_1__S16Imm1_2, |
437 | | Convert__RegG8RC1_1__RegG8RC1_2, |
438 | | Convert__RegGPRC1_0__RegGPRC1_1__imm_95_0, |
439 | | Convert__RegCRBITRC1_0__RegCRBITRC1_1__RegCRBITRC1_2, |
440 | | Convert__RegCRBITRC1_0__RegCRBITRC1_0__RegCRBITRC1_0, |
441 | | Convert__RegCRBITRC1_0__RegCRBITRC1_1__RegCRBITRC1_1, |
442 | | Convert__RegF8RC1_0__RegF8RC1_1__RegF8RC1_2, |
443 | | Convert__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3, |
444 | | Convert__RegFpRC1_0__RegFpRC1_1__RegFpRC1_2, |
445 | | Convert__RegFpRC1_1__RegFpRC1_2__RegFpRC1_3, |
446 | | Convert__RegG8RC1_0__U2Imm1_1, |
447 | | Convert__RegGxRCNoR01_0__RegGxRC1_1, |
448 | | Convert__U3Imm1_2__RegGxRCNoR01_0__RegGxRC1_1, |
449 | | Convert__U5Imm1_2__RegGxRCNoR01_0__RegGxRC1_1, |
450 | | Convert__RegGxRCNoR01_0__RegGxRC1_1__U5Imm1_2, |
451 | | Convert__RegGxRCNoR01_1__RegGxRC1_2__U5Imm1_0, |
452 | | Convert__regR0__regR0, |
453 | | Convert__RegF8RC1_0__RegF8RC1_1, |
454 | | Convert__RegF8RC1_1__RegF8RC1_2, |
455 | | Convert__RegFpRC1_0__RegF8RC1_1, |
456 | | Convert__RegFpRC1_1__RegF8RC1_2, |
457 | | Convert__RegFpRC1_0__RegVRRC1_1, |
458 | | Convert__RegCRRC1_0__RegF8RC1_1__RegF8RC1_2, |
459 | | Convert__RegCRRC1_0__RegFpRC1_1__RegFpRC1_2, |
460 | | Convert__RegF8RC1_0__RegFpRC1_1, |
461 | | Convert__RegF8RC1_1__RegFpRC1_2, |
462 | | Convert__RegVRRC1_0__RegFpRC1_1, |
463 | | Convert__RegF8RC1_1__U2Imm1_0__RegF8RC1_2, |
464 | | Convert__RegF8RC1_2__U2Imm1_1__RegF8RC1_3, |
465 | | Convert__RegFpRC1_1__U2Imm1_0__RegFpRC1_2, |
466 | | Convert__RegFpRC1_2__U2Imm1_1__RegFpRC1_3, |
467 | | Convert__RegF8RC1_1__U1Imm1_0__RegF8RC1_2, |
468 | | Convert__RegF8RC1_2__U1Imm1_1__RegF8RC1_3, |
469 | | Convert__RegFpRC1_1__U1Imm1_0__RegFpRC1_2, |
470 | | Convert__RegFpRC1_2__U1Imm1_1__RegFpRC1_3, |
471 | | Convert__RegFpRC1_0__RegF8RC1_1__RegFpRC1_2, |
472 | | Convert__RegFpRC1_1__RegF8RC1_2__RegFpRC1_3, |
473 | | Convert__RegG8RC1_1__RegG8RC1_2__RegG8RC1_3, |
474 | | Convert__RegDMRRC1_0__RegDMRRC1_1, |
475 | | Convert__RegDMRRC1_0, |
476 | | Convert__RegDMRRC1_0__Tie0_1_1__RegDMRRC1_1, |
477 | | Convert__RegVSRpRC1_1__RegDMRROWpRC1_0__U2Imm1_2, |
478 | | Convert__RegVSRpRC1_1__RegVSRpRC1_2__RegACCRC1_0, |
479 | | Convert__RegDMRROWpRC1_0__RegVSRpRC1_1__U2Imm1_2, |
480 | | Convert__RegACCRC1_0__RegVSRpRC1_1__RegVSRpRC1_2, |
481 | | Convert__RegF8RC1_0__RegF8RC1_1__RegF8RC1_2__U2Imm1_3, |
482 | | Convert__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3__U2Imm1_4, |
483 | | Convert__RegF8RC1_1__S5Imm1_0__RegF8RC1_2__U2Imm1_3, |
484 | | Convert__RegF8RC1_2__S5Imm1_1__RegF8RC1_3__U2Imm1_4, |
485 | | Convert__RegFpRC1_1__S5Imm1_0__RegFpRC1_2__U2Imm1_3, |
486 | | Convert__RegFpRC1_2__S5Imm1_1__RegFpRC1_3__U2Imm1_4, |
487 | | Convert__RegFpRC1_0__RegFpRC1_1__RegFpRC1_2__U2Imm1_3, |
488 | | Convert__RegFpRC1_1__RegFpRC1_2__RegFpRC1_3__U2Imm1_4, |
489 | | Convert__RegFpRC1_0__RegFpRC1_1, |
490 | | Convert__RegFpRC1_1__RegFpRC1_2, |
491 | | Convert__RegF8RC1_1__U1Imm1_0__RegF8RC1_2__U2Imm1_3, |
492 | | Convert__RegF8RC1_2__U1Imm1_1__RegF8RC1_3__U2Imm1_4, |
493 | | Convert__RegFpRC1_1__U1Imm1_0__RegFpRC1_2__U2Imm1_3, |
494 | | Convert__RegFpRC1_2__U1Imm1_1__RegFpRC1_3__U2Imm1_4, |
495 | | Convert__RegFpRC1_0__RegF8RC1_1__RegFpRC1_2__U2Imm1_3, |
496 | | Convert__RegFpRC1_1__RegF8RC1_2__RegFpRC1_3__U2Imm1_4, |
497 | | Convert__RegF8RC1_0__RegF8RC1_1__U6Imm1_2, |
498 | | Convert__RegF8RC1_1__RegF8RC1_2__U6Imm1_3, |
499 | | Convert__RegFpRC1_0__RegFpRC1_1__U6Imm1_2, |
500 | | Convert__RegFpRC1_1__RegFpRC1_2__U6Imm1_3, |
501 | | Convert__U5Imm1_0, |
502 | | Convert__U5Imm1_2__RegGPRC1_0__RegGPRC1_1, |
503 | | Convert__RegCRRC1_0__RegF8RC1_1__U6Imm1_2, |
504 | | Convert__RegCRRC1_0__RegFpRC1_1__U6Imm1_2, |
505 | | Convert__RegCRRC1_0__U6Imm1_1__RegF8RC1_2, |
506 | | Convert__RegCRRC1_0__U6Imm1_1__RegFpRC1_2, |
507 | | Convert__RegCRRC1_0__RegF8RC1_1__RegFpRC1_2, |
508 | | Convert__RegSPERC1_0__RegSPERC1_1, |
509 | | Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, |
510 | | Convert__RegSPERC1_0__RegSPE4RC1_1, |
511 | | Convert__RegSPERC1_0__RegGPRC1_1, |
512 | | Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2, |
513 | | Convert__RegGPRC1_0__RegSPERC1_1, |
514 | | Convert__RegSPE4RC1_0__RegSPE4RC1_1, |
515 | | Convert__RegSPE4RC1_0__RegSPE4RC1_1__RegSPE4RC1_2, |
516 | | Convert__RegSPE4RC1_0__RegSPERC1_1, |
517 | | Convert__RegSPE4RC1_0__RegGPRC1_1, |
518 | | Convert__RegCRRC1_0__RegSPE4RC1_1__RegSPE4RC1_2, |
519 | | Convert__RegGPRC1_0__RegSPE4RC1_1, |
520 | | Convert__RegSPERC1_0__RegSPERC1_2__U5Imm1_1, |
521 | | Convert__RegSPERC1_0__DispSPE81_1__RegGxRCNoR01_2, |
522 | | Convert__RegSPERC1_0__RegGxRCNoR01_1__RegGxRC1_2, |
523 | | Convert__RegSPERC1_0__DispSPE21_1__RegGxRCNoR01_2, |
524 | | Convert__RegSPERC1_0__DispSPE41_1__RegGxRCNoR01_2, |
525 | | Convert__RegSPERC1_0__RegGPRC1_1__RegGPRC1_2, |
526 | | Convert__RegSPERC1_0__RegSPERC1_1__U5Imm1_2, |
527 | | Convert__RegSPERC1_1__RegSPERC1_2__RegSPERC1_3__imm_95_0, |
528 | | Convert__RegSPERC1_0__S5Imm1_1, |
529 | | Convert__RegSPERC1_0__U5Imm1_1__RegSPERC1_2, |
530 | | Convert__RegF4RC1_0__RegF4RC1_1, |
531 | | Convert__RegF4RC1_1__RegF4RC1_2, |
532 | | Convert__RegF4RC1_0__RegF4RC1_1__RegF4RC1_2, |
533 | | Convert__RegF4RC1_1__RegF4RC1_2__RegF4RC1_3, |
534 | | Convert__RegF4RC1_0__RegF8RC1_1, |
535 | | Convert__RegF4RC1_1__RegF8RC1_2, |
536 | | Convert__RegCRRC1_0__RegF4RC1_1__RegF4RC1_2, |
537 | | Convert__RegF8RC1_0__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3, |
538 | | Convert__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3__RegF8RC1_4, |
539 | | Convert__RegF4RC1_0__RegF4RC1_1__RegF4RC1_2__RegF4RC1_3, |
540 | | Convert__RegF4RC1_1__RegF4RC1_2__RegF4RC1_3__RegF4RC1_4, |
541 | | Convert__RegF4RC1_0__RegF8RC1_1__RegF4RC1_2__RegF4RC1_3, |
542 | | Convert__RegF4RC1_1__RegF8RC1_2__RegF4RC1_3__RegF4RC1_4, |
543 | | Convert__RegCRRC1_0__RegF8RC1_1, |
544 | | Convert__RegGPRC1_0__DispRIHash1_1__RegGxRCNoR01_2, |
545 | | Convert__imm_95_0__imm_95_0, |
546 | | Convert__imm_95_0, |
547 | | Convert__U4Imm1_0__RegGxRCNoR01_1__RegGxRC1_2, |
548 | | Convert__U4Imm1_1__RegGxRCNoR01_2__RegGxRC1_3, |
549 | | Convert__RegGPRC1_0__RegGPRCNoR01_1__RegGPRC1_2__RegCRBITRC1_3, |
550 | | Convert__RegG8RC1_0__RegG8RCNoX01_1__RegG8RC1_2__regCR0EQ, |
551 | | Convert__RegGPRC1_0__RegGPRCNoR01_1__RegGPRC1_2__regCR0EQ, |
552 | | Convert__RegG8RC1_0__RegG8RCNoX01_1__RegG8RC1_2__regCR0GT, |
553 | | Convert__RegGPRC1_0__RegGPRCNoR01_1__RegGPRC1_2__regCR0GT, |
554 | | Convert__RegG8RC1_0__RegG8RCNoX01_1__RegG8RC1_2__regCR0LT, |
555 | | Convert__RegGPRC1_0__RegGPRCNoR01_1__RegGPRC1_2__regCR0LT, |
556 | | Convert__RegGPRC1_0__DispRI1_1__RegGxRCNoR01_2, |
557 | | Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, |
558 | | Convert__RegGPRC1_0__imm_95_0__DispRI1_1__RegGxRCNoR01_2, |
559 | | Convert__RegGPRC1_0__imm_95_0__RegGxRCNoR01_1__RegGxRC1_2, |
560 | | Convert__RegG8RC1_0__RegGxRCNoR01_1__TLSReg1_2, |
561 | | Convert__RegG8RC1_0__DispRIX1_1__RegGxRCNoR01_2, |
562 | | Convert__RegG8RC1_0__RegGxRCNoR01_1__RegGxRC1_2, |
563 | | Convert__RegG8RC1_0__RegG8RC1_1__U5Imm1_2, |
564 | | Convert__RegG8RC1_0__imm_95_0__DispRIX1_1__RegGxRCNoR01_2, |
565 | | Convert__RegG8RC1_0__imm_95_0__RegGxRCNoR01_1__RegGxRC1_2, |
566 | | Convert__RegF8RC1_0__DispRI1_1__RegGxRCNoR01_2, |
567 | | Convert__RegF8RC1_0__RegGxRCNoR01_1__RegGxRC1_2, |
568 | | Convert__RegF8RC1_0__imm_95_0__DispRI1_1__RegGxRCNoR01_2, |
569 | | Convert__RegF8RC1_0__imm_95_0__RegGxRCNoR01_1__RegGxRC1_2, |
570 | | Convert__RegF8RC1_0__RegGxRCNoR01_1__TLSReg1_2, |
571 | | Convert__RegF4RC1_0__DispRI1_1__RegGxRCNoR01_2, |
572 | | Convert__RegF4RC1_0__imm_95_0__DispRI1_1__RegGxRCNoR01_2, |
573 | | Convert__RegF4RC1_0__imm_95_0__RegGxRCNoR01_1__RegGxRC1_2, |
574 | | Convert__RegF4RC1_0__RegGxRCNoR01_1__RegGxRC1_2, |
575 | | Convert__RegF4RC1_0__RegGxRCNoR01_1__TLSReg1_2, |
576 | | Convert__RegG8RC1_0__regZERO8__S16Imm1_1, |
577 | | Convert__RegGPRC1_0__S16Imm1_1, |
578 | | Convert__RegGPRC1_0__regZERO__S16Imm1_1, |
579 | | Convert__RegG8RC1_0__regZERO8__S17Imm1_1, |
580 | | Convert__RegGPRC1_0__S17Imm1_1, |
581 | | Convert__RegGPRC1_0__regZERO__S17Imm1_1, |
582 | | Convert__RegG8RC1_0__imm_95_0, |
583 | | Convert__RegG8pRC1_0__DispRIX161_1__RegGxRCNoR01_2, |
584 | | Convert__RegG8pRC1_0__RegGxRCNoR01_1__RegGxRC1_2, |
585 | | Convert__RegVRRC1_0__RegGxRCNoR01_1__RegGxRC1_2, |
586 | | Convert__imm_95_1, |
587 | | Convert__RegSPE4RC1_0__DispRI1_1__RegGxRCNoR01_2, |
588 | | Convert__RegSPE4RC1_0__RegGxRCNoR01_1__RegGxRC1_2, |
589 | | Convert__RegVFRC1_0__DispRIX1_1__RegGxRCNoR01_2, |
590 | | Convert__RegVSFRC1_0__RegGxRCNoR01_1__RegGxRC1_2, |
591 | | Convert__RegVSSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, |
592 | | Convert__RegVSRC1_0__DispRIX161_1__RegGxRCNoR01_2, |
593 | | Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, |
594 | | Convert__RegVSRC1_0__U5Imm1_1, |
595 | | Convert__RegVSRC1_0__Imm1_1__RegG8RC1_2, |
596 | | Convert__RegVSRpRC1_0__DispRIX161_1__RegGxRCNoR01_2, |
597 | | Convert__RegVSRpRC1_0__Imm1_1__RegG8RC1_2, |
598 | | Convert__RegVSRpRC1_0__RegGxRCNoR01_1__RegGxRC1_2, |
599 | | Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2__RegG8RC1_3, |
600 | | Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, |
601 | | Convert__RegCRRC1_0__RegCRRC1_1, |
602 | | Convert__RegCRRC1_0, |
603 | | Convert__RegG8RC1_0__imm_95_29, |
604 | | Convert__RegGPRC1_0__imm_95_29, |
605 | | Convert__RegG8RC1_0__imm_95_280, |
606 | | Convert__RegGPRC1_0__imm_95_280, |
607 | | Convert__RegGPRC1_0__U10Imm1_1__imm_95_0, |
608 | | Convert__RegGPRC1_0__imm_95_128, |
609 | | Convert__RegGPRC1_0__imm_95_129, |
610 | | Convert__RegGPRC1_0__imm_95_130, |
611 | | Convert__RegGPRC1_0__imm_95_131, |
612 | | Convert__RegGPRC1_0__imm_95_132, |
613 | | Convert__RegGPRC1_0__imm_95_133, |
614 | | Convert__RegGPRC1_0__imm_95_134, |
615 | | Convert__RegGPRC1_0__imm_95_135, |
616 | | Convert__RegG8RC1_0__imm_95_28, |
617 | | Convert__RegGPRC1_0__imm_95_28, |
618 | | Convert__RegGPRC1_0, |
619 | | Convert__RegG8RC1_0__imm_95_9, |
620 | | Convert__RegGPRC1_0__imm_95_9, |
621 | | Convert__RegG8RC1_0__imm_95_19, |
622 | | Convert__RegGPRC1_0__imm_95_19, |
623 | | Convert__RegGPRC1_0__imm_95_537, |
624 | | Convert__RegGPRC1_0__imm_95_539, |
625 | | Convert__RegGPRC1_0__imm_95_541, |
626 | | Convert__RegGPRC1_0__imm_95_543, |
627 | | Convert__RegGPRC1_0__imm_95_536, |
628 | | Convert__RegGPRC1_0__imm_95_538, |
629 | | Convert__RegGPRC1_0__imm_95_540, |
630 | | Convert__RegGPRC1_0__imm_95_542, |
631 | | Convert__RegGPRC1_0__imm_95_1018, |
632 | | Convert__RegGPRC1_0__Imm1_1, |
633 | | Convert__RegGPRC1_0__imm_95_981, |
634 | | Convert__RegG8RC1_0__imm_95_22, |
635 | | Convert__RegGPRC1_0__imm_95_22, |
636 | | Convert__RegG8RC1_0__imm_95_17, |
637 | | Convert__RegGPRC1_0__imm_95_17, |
638 | | Convert__RegG8RC1_0__imm_95_18, |
639 | | Convert__RegGPRC1_0__imm_95_18, |
640 | | Convert__RegGPRC1_0__imm_95_980, |
641 | | Convert__RegG8RC1_0__RegF8RC1_1, |
642 | | Convert__RegGPRC1_0__RegF8RC1_1, |
643 | | Convert__RegF8RC1_0, |
644 | | Convert__RegF8RC1_1, |
645 | | Convert__RegF8RC1_0__U3Imm1_1, |
646 | | Convert__RegF8RC1_0__U2Imm1_1, |
647 | | Convert__RegGPRC1_0__imm_95_529, |
648 | | Convert__RegGPRC1_0__imm_95_531, |
649 | | Convert__RegGPRC1_0__imm_95_533, |
650 | | Convert__RegGPRC1_0__imm_95_535, |
651 | | Convert__RegGPRC1_0__imm_95_528, |
652 | | Convert__RegGPRC1_0__imm_95_530, |
653 | | Convert__RegGPRC1_0__imm_95_532, |
654 | | Convert__RegGPRC1_0__imm_95_534, |
655 | | Convert__RegGPRC1_0__imm_95_1019, |
656 | | Convert__RegG8RC1_0__imm_95_8, |
657 | | Convert__RegGPRC1_0__imm_95_8, |
658 | | Convert__RegGPRC1_0__CRBitMask1_1, |
659 | | Convert__RegGPRC1_0__imm_95_48, |
660 | | Convert__RegGPRC1_0__imm_95_896, |
661 | | Convert__RegG8RC1_0__imm_95_287, |
662 | | Convert__RegGPRC1_0__imm_95_287, |
663 | | Convert__RegG8RC1_0__imm_95_5, |
664 | | Convert__RegGPRC1_0__imm_95_5, |
665 | | Convert__RegG8RC1_0__imm_95_4, |
666 | | Convert__RegGPRC1_0__imm_95_4, |
667 | | Convert__RegG8RC1_0__imm_95_25, |
668 | | Convert__RegGPRC1_0__imm_95_25, |
669 | | Convert__RegG8RC1_0__imm_95_512, |
670 | | Convert__RegGPRC1_0__imm_95_512, |
671 | | Convert__RegG8RC1_0__imm_95_272, |
672 | | Convert__RegG8RC1_0__imm_95_273, |
673 | | Convert__RegG8RC1_0__imm_95_274, |
674 | | Convert__RegG8RC1_0__imm_95_275, |
675 | | Convert__RegGPRC1_0__imm_95_272, |
676 | | Convert__RegGPRC1_0__imm_95_273, |
677 | | Convert__RegGPRC1_0__imm_95_274, |
678 | | Convert__RegGPRC1_0__imm_95_275, |
679 | | Convert__RegGPRC1_0__imm_95_260, |
680 | | Convert__RegGPRC1_0__imm_95_261, |
681 | | Convert__RegGPRC1_0__imm_95_262, |
682 | | Convert__RegGPRC1_0__imm_95_263, |
683 | | Convert__RegGPRC1_0__U4Imm1_1, |
684 | | Convert__RegG8RC1_0__imm_95_26, |
685 | | Convert__RegGPRC1_0__imm_95_26, |
686 | | Convert__RegG8RC1_0__imm_95_27, |
687 | | Convert__RegGPRC1_0__imm_95_27, |
688 | | Convert__RegGPRC1_0__imm_95_990, |
689 | | Convert__RegGPRC1_0__imm_95_991, |
690 | | Convert__RegGPRC1_0__imm_95_268, |
691 | | Convert__RegGPRC1_0__imm_95_988, |
692 | | Convert__RegGPRC1_0__imm_95_989, |
693 | | Convert__RegGPRC1_0__imm_95_269, |
694 | | Convert__RegGPRC1_0__imm_95_986, |
695 | | Convert__RegG8RC1_0__imm_95_13, |
696 | | Convert__RegGPRC1_0__imm_95_13, |
697 | | Convert__RegG8RC1_0__imm_95_3, |
698 | | Convert__RegGPRC1_0__imm_95_3, |
699 | | Convert__RegG8RC1_0__RegVRRC1_1, |
700 | | Convert__RegGPRC1_0__RegVRRC1_1, |
701 | | Convert__RegVRRC1_0, |
702 | | Convert__RegG8RC1_0__RegVSFRC1_1, |
703 | | Convert__RegG8RC1_0__RegVSRC1_1, |
704 | | Convert__RegGPRC1_0__RegVSFRC1_1, |
705 | | Convert__RegG8RC1_0__imm_95_1, |
706 | | Convert__RegGPRC1_0__imm_95_1, |
707 | | Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_1, |
708 | | Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_1, |
709 | | Convert__RegG8RC1_1__RegG8RC1_2__RegG8RC1_2, |
710 | | Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_2, |
711 | | Convert__imm_95_29__RegG8RC1_0, |
712 | | Convert__imm_95_29__RegGPRC1_0, |
713 | | Convert__imm_95_280__RegG8RC1_0, |
714 | | Convert__imm_95_280__RegGPRC1_0, |
715 | | Convert__imm_95_28__RegG8RC1_0, |
716 | | Convert__imm_95_28__RegGPRC1_0, |
717 | | Convert__imm_95_255__RegG8RC1_0, |
718 | | Convert__imm_95_255__RegGPRC1_0, |
719 | | Convert__Imm1_0__RegGPRC1_1, |
720 | | Convert__imm_95_9__RegG8RC1_0, |
721 | | Convert__imm_95_9__RegGPRC1_0, |
722 | | Convert__imm_95_19__RegG8RC1_0, |
723 | | Convert__imm_95_19__RegGPRC1_0, |
724 | | Convert__imm_95_537__RegGPRC1_1, |
725 | | Convert__imm_95_539__RegGPRC1_1, |
726 | | Convert__imm_95_541__RegGPRC1_1, |
727 | | Convert__imm_95_543__RegGPRC1_1, |
728 | | Convert__imm_95_536__RegGPRC1_1, |
729 | | Convert__imm_95_538__RegGPRC1_1, |
730 | | Convert__imm_95_540__RegGPRC1_1, |
731 | | Convert__imm_95_542__RegGPRC1_1, |
732 | | Convert__imm_95_1018__RegGPRC1_0, |
733 | | Convert__RegGPRC1_1__Imm1_0, |
734 | | Convert__imm_95_981__RegGPRC1_0, |
735 | | Convert__imm_95_22__RegG8RC1_0, |
736 | | Convert__imm_95_22__RegGPRC1_0, |
737 | | Convert__imm_95_17__RegG8RC1_0, |
738 | | Convert__imm_95_17__RegGPRC1_0, |
739 | | Convert__imm_95_18__RegG8RC1_0, |
740 | | Convert__imm_95_18__RegGPRC1_0, |
741 | | Convert__imm_95_980__RegGPRC1_0, |
742 | | Convert__RegF8RC1_0__RegG8RC1_1, |
743 | | Convert__RegF8RC1_0__RegGPRC1_1, |
744 | | Convert__Imm1_0__RegF8RC1_1__imm_95_0__imm_95_0, |
745 | | Convert__Imm1_1__RegF8RC1_2__imm_95_0__imm_95_0, |
746 | | Convert__Imm1_0__RegF8RC1_1__U1Imm1_2__Imm1_3, |
747 | | Convert__Imm1_1__RegF8RC1_2__U1Imm1_3__Imm1_4, |
748 | | Convert__U3Imm1_0__U4Imm1_1__imm_95_0, |
749 | | Convert__U3Imm1_1__U4Imm1_2__imm_95_0, |
750 | | Convert__U3Imm1_0__U4Imm1_1__Imm1_2, |
751 | | Convert__U3Imm1_1__U4Imm1_2__U1Imm1_3, |
752 | | Convert__imm_95_529__RegGPRC1_1, |
753 | | Convert__imm_95_531__RegGPRC1_1, |
754 | | Convert__imm_95_533__RegGPRC1_1, |
755 | | Convert__imm_95_535__RegGPRC1_1, |
756 | | Convert__imm_95_528__RegGPRC1_1, |
757 | | Convert__imm_95_530__RegGPRC1_1, |
758 | | Convert__imm_95_532__RegGPRC1_1, |
759 | | Convert__imm_95_534__RegGPRC1_1, |
760 | | Convert__imm_95_1019__RegGPRC1_0, |
761 | | Convert__imm_95_8__RegG8RC1_0, |
762 | | Convert__imm_95_8__RegGPRC1_0, |
763 | | Convert__RegGPRC1_0__imm_95_0, |
764 | | Convert__RegGPRC1_0__U1Imm1_1, |
765 | | Convert__CRBitMask1_0__RegGPRC1_1, |
766 | | Convert__imm_95_48__RegGPRC1_0, |
767 | | Convert__imm_95_896__RegGPRC1_0, |
768 | | Convert__imm_95_25__RegG8RC1_0, |
769 | | Convert__imm_95_25__RegGPRC1_0, |
770 | | Convert__imm_95_512__RegG8RC1_0, |
771 | | Convert__imm_95_512__RegGPRC1_0, |
772 | | Convert__RegGPRC1_1, |
773 | | Convert__imm_95_272__RegG8RC1_1, |
774 | | Convert__imm_95_272__RegGPRC1_1, |
775 | | Convert__imm_95_273__RegG8RC1_1, |
776 | | Convert__imm_95_273__RegGPRC1_1, |
777 | | Convert__imm_95_274__RegG8RC1_1, |
778 | | Convert__imm_95_274__RegGPRC1_1, |
779 | | Convert__imm_95_275__RegG8RC1_1, |
780 | | Convert__imm_95_275__RegGPRC1_1, |
781 | | Convert__imm_95_260__RegGPRC1_1, |
782 | | Convert__imm_95_261__RegGPRC1_1, |
783 | | Convert__imm_95_262__RegGPRC1_1, |
784 | | Convert__imm_95_263__RegGPRC1_1, |
785 | | Convert__imm_95_272__RegG8RC1_0, |
786 | | Convert__imm_95_272__RegGPRC1_0, |
787 | | Convert__imm_95_273__RegG8RC1_0, |
788 | | Convert__imm_95_273__RegGPRC1_0, |
789 | | Convert__imm_95_274__RegG8RC1_0, |
790 | | Convert__imm_95_274__RegGPRC1_0, |
791 | | Convert__imm_95_275__RegG8RC1_0, |
792 | | Convert__imm_95_275__RegGPRC1_0, |
793 | | Convert__imm_95_260__RegGPRC1_0, |
794 | | Convert__imm_95_261__RegGPRC1_0, |
795 | | Convert__imm_95_262__RegGPRC1_0, |
796 | | Convert__imm_95_263__RegGPRC1_0, |
797 | | Convert__RegGPRC1_1__U4Imm1_0, |
798 | | Convert__imm_95_26__RegG8RC1_0, |
799 | | Convert__imm_95_26__RegGPRC1_0, |
800 | | Convert__imm_95_27__RegG8RC1_0, |
801 | | Convert__imm_95_27__RegGPRC1_0, |
802 | | Convert__imm_95_990__RegGPRC1_0, |
803 | | Convert__imm_95_991__RegGPRC1_0, |
804 | | Convert__imm_95_988__RegGPRC1_0, |
805 | | Convert__imm_95_284__RegG8RC1_0, |
806 | | Convert__imm_95_284__RegGPRC1_0, |
807 | | Convert__imm_95_989__RegGPRC1_0, |
808 | | Convert__imm_95_285__RegG8RC1_0, |
809 | | Convert__imm_95_285__RegGPRC1_0, |
810 | | Convert__imm_95_986__RegGPRC1_0, |
811 | | Convert__imm_95_13__RegG8RC1_0, |
812 | | Convert__imm_95_13__RegGPRC1_0, |
813 | | Convert__imm_95_3__RegG8RC1_0, |
814 | | Convert__imm_95_3__RegGPRC1_0, |
815 | | Convert__RegVRRC1_0__RegG8RC1_1, |
816 | | Convert__RegVRRC1_0__RegGPRC1_1, |
817 | | Convert__RegVRRC1_0__U16Imm1_1, |
818 | | Convert__RegVSFRC1_0__RegG8RC1_1, |
819 | | Convert__RegVSRC1_0__RegG8RCNoX01_1__RegG8RC1_2, |
820 | | Convert__RegVSFRC1_0__RegGPRC1_1, |
821 | | Convert__RegVSRC1_0__RegGPRC1_1, |
822 | | Convert__imm_95_1__RegG8RC1_0, |
823 | | Convert__imm_95_1__RegGPRC1_0, |
824 | | Convert__regR0__regR0__imm_95_0, |
825 | | Convert__regX0__regX0__imm_95_0, |
826 | | Convert__RegGPRC1_0__RegGPRC1_1__U16Imm1_2, |
827 | | Convert__RegG8RC1_0__RegG8RCNoX01_1__S34Imm1_2, |
828 | | Convert__RegGPRC1_0__ImmZero1_1__S34Imm1_2, |
829 | | Convert__RegGPRC1_0__RegGPRCNoR01_1__S34Imm1_2, |
830 | | Convert__RegGPRC1_1__RegGPRC1_2__imm_95_1, |
831 | | Convert__RegGPRC1_1__RegGPRC1_2__U1Imm1_3, |
832 | | Convert__imm_95_2__imm_95_0, |
833 | | Convert__imm_95_4__imm_95_0, |
834 | | Convert__RegG8RC1_0__S34Imm1_1, |
835 | | Convert__RegGPRC1_0__S34Imm1_1, |
836 | | Convert__RegG8RC1_0__RegG8RCNoX01_2__S34Imm1_1, |
837 | | Convert__RegGPRC1_0__RegGPRCNoR01_2__S34Imm1_1, |
838 | | Convert__RegGPRC1_0__DispRI341_1__RegGxRCNoR01_2, |
839 | | Convert__RegGPRC1_0__DispRI341_1__ImmZero1_2, |
840 | | Convert__RegG8RC1_0__DispRI341_1__RegGxRCNoR01_2, |
841 | | Convert__RegG8RC1_0__DispRI341_1__ImmZero1_2, |
842 | | Convert__RegF8RC1_0__S34Imm1_1, |
843 | | Convert__RegF8RC1_0__DispRI341_1__RegGxRCNoR01_2, |
844 | | Convert__RegF8RC1_0__DispRI341_1__ImmZero1_2, |
845 | | Convert__RegF4RC1_0__S34Imm1_1, |
846 | | Convert__RegF4RC1_0__DispRI341_1__RegGxRCNoR01_2, |
847 | | Convert__RegF4RC1_0__DispRI341_1__ImmZero1_2, |
848 | | Convert__imm_95_5__imm_95_0, |
849 | | Convert__RegVFRC1_0__S34Imm1_1, |
850 | | Convert__RegVFRC1_0__DispRI341_1__RegGxRCNoR01_2, |
851 | | Convert__RegVFRC1_0__DispRI341_1__ImmZero1_2, |
852 | | Convert__RegVSRC1_0__S34Imm1_1, |
853 | | Convert__RegVSRC1_0__DispRI341_1__RegGxRCNoR01_2, |
854 | | Convert__RegVSRC1_0__DispRI341_1__ImmZero1_2, |
855 | | Convert__RegVSRpRC1_0__S34Imm1_1, |
856 | | Convert__RegVSRpRC1_0__DispRI341_1__RegGxRCNoR01_2, |
857 | | Convert__RegVSRpRC1_0__DispRI341_1__ImmZero1_2, |
858 | | Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U2Imm1_5, |
859 | | Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U2Imm1_5, |
860 | | Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4, |
861 | | Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4, |
862 | | Convert__RegACCRC1_0__RegVSRpEvenRC1_1__RegVSRC1_2__U4Imm1_3__U2Imm1_4, |
863 | | Convert__RegACCRC1_0__Tie0_1_1__RegVSRpEvenRC1_1__RegVSRC1_2__U4Imm1_3__U2Imm1_4, |
864 | | Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U8Imm1_5, |
865 | | Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U8Imm1_5, |
866 | | Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U4Imm1_5, |
867 | | Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U4Imm1_5, |
868 | | Convert__imm_95_2, |
869 | | Convert__U1Imm1_0, |
870 | | Convert__RegG8RC1_0__RegG8RC1_1__RegGPRC1_2__U6Imm1_3, |
871 | | Convert__RegG8RC1_1__RegG8RC1_2__RegGPRC1_3__U6Imm1_4, |
872 | | Convert__RegG8RC1_0__Tie0_1_1__RegG8RC1_1__U6Imm1_2__U6Imm1_3, |
873 | | Convert__RegG8RC1_1__Tie0_1_1__RegG8RC1_2__U6Imm1_3__U6Imm1_4, |
874 | | Convert__RegG8RC1_0__RegG8RC1_1__U5Imm1_2__Imm1_3, |
875 | | Convert__RegG8RC1_1__RegG8RC1_2__U5Imm1_3__Imm1_4, |
876 | | Convert__RegGPRC1_0__Tie0_1_1__RegGPRC1_1__U5Imm1_2__U5Imm1_3__U5Imm1_4, |
877 | | Convert__RegGPRC1_1__Tie0_1_1__RegGPRC1_2__U5Imm1_3__U5Imm1_4__U5Imm1_5, |
878 | | Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2__U5Imm1_3__U5Imm1_4, |
879 | | Convert__RegGPRC1_1__RegGPRC1_2__U5Imm1_3__U5Imm1_4__U5Imm1_5, |
880 | | Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2__U5Imm1_3__U5Imm1_4, |
881 | | Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3__U5Imm1_4__U5Imm1_5, |
882 | | Convert__RegG8RC1_0__RegG8RC1_1__RegGPRC1_2__imm_95_0, |
883 | | Convert__RegG8RC1_1__RegG8RC1_2__RegGPRC1_3__imm_95_0, |
884 | | Convert__RegG8RC1_0__RegG8RC1_1__U6Imm1_2__imm_95_0, |
885 | | Convert__RegG8RC1_0__RegGPRC1_1__U6Imm1_2__imm_95_0, |
886 | | Convert__RegG8RC1_1__RegG8RC1_2__U6Imm1_3__imm_95_0, |
887 | | Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2__imm_95_0__imm_95_31, |
888 | | Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2__imm_95_0__imm_95_31, |
889 | | Convert__RegG8RC1_1__RegG8RC1_2__RegG8RC1_3__imm_95_0__imm_95_31, |
890 | | Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3__imm_95_0__imm_95_31, |
891 | | Convert__RegG8RC1_0__RegG8RC1_1__U5Imm1_2__imm_95_0__imm_95_31, |
892 | | Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2__imm_95_0__imm_95_31, |
893 | | Convert__RegG8RC1_1__RegG8RC1_2__U5Imm1_3__imm_95_0__imm_95_31, |
894 | | Convert__RegGPRC1_1__RegGPRC1_2__U5Imm1_3__imm_95_0__imm_95_31, |
895 | | Convert__Imm1_0, |
896 | | Convert__RegGPRC1_0__RegCRRC1_1, |
897 | | Convert__RegGPRC1_0__RegCRBITRC1_1, |
898 | | Convert__RegG8RC1_0__RegG8RC1_1__RegGPRC1_2, |
899 | | Convert__RegG8RC1_1__RegG8RC1_2__RegGPRC1_3, |
900 | | Convert__RegGPRC1_1__RegGxRCNoR01_2__RegGxRC1_3, |
901 | | Convert__imm_95_0__RegGPRC1_0__DispRI1_1__RegGxRCNoR01_2, |
902 | | Convert__imm_95_0__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, |
903 | | Convert__imm_95_0__imm_95_2, |
904 | | Convert__RegG8RC1_1__RegGxRCNoR01_2__RegGxRC1_3, |
905 | | Convert__imm_95_0__RegG8RC1_0__DispRIX1_1__RegGxRCNoR01_2, |
906 | | Convert__imm_95_0__RegG8RC1_0__RegGxRCNoR01_1__RegGxRC1_2, |
907 | | Convert__imm_95_0__RegF8RC1_0__DispRI1_1__RegGxRCNoR01_2, |
908 | | Convert__imm_95_0__RegF8RC1_0__RegGxRCNoR01_1__RegGxRC1_2, |
909 | | Convert__imm_95_0__RegF4RC1_0__DispRI1_1__RegGxRCNoR01_2, |
910 | | Convert__imm_95_0__RegF4RC1_0__RegGxRCNoR01_1__RegGxRC1_2, |
911 | | Convert__imm_95_1__imm_95_1, |
912 | | Convert__RegG8pRC1_0__DispRIX1_1__RegGxRCNoR01_2, |
913 | | Convert__RegG8pRC1_1__RegGxRCNoR01_2__RegGxRC1_3, |
914 | | Convert__imm_95_0__imm_95_3, |
915 | | Convert__RegG8RC1_0__RegG8RC1_2__RegG8RC1_1, |
916 | | Convert__RegGPRC1_0__RegGPRC1_2__RegGPRC1_1, |
917 | | Convert__RegG8RC1_1__RegG8RC1_3__RegG8RC1_2, |
918 | | Convert__RegGPRC1_1__RegGPRC1_3__RegGPRC1_2, |
919 | | Convert__RegG8RC1_0__RegG8RC1_2__RegG8RC1_3__U1Imm1_1, |
920 | | Convert__RegG8RC1_1__RegG8RC1_3__RegG8RC1_4__U1Imm1_2, |
921 | | Convert__RegG8RC1_0__S16Imm1_1, |
922 | | Convert__U2Imm1_0, |
923 | | Convert__U3Imm1_0__imm_95_0, |
924 | | Convert__U3Imm1_0__U2Imm1_1, |
925 | | Convert__U5Imm1_1__RegGPRC1_2__RegGPRC1_3, |
926 | | Convert__U5Imm1_1__RegGPRC1_2__U5Imm1_3, |
927 | | Convert__U1Imm1_1, |
928 | | Convert__U5Imm1_0__RegG8RC1_1__RegG8RC1_2, |
929 | | Convert__imm_95_4__RegG8RC1_0__RegG8RC1_1, |
930 | | Convert__imm_95_4__RegG8RC1_0__S16Imm1_1, |
931 | | Convert__imm_95_12__RegG8RC1_0__RegG8RC1_1, |
932 | | Convert__imm_95_12__RegG8RC1_0__S16Imm1_1, |
933 | | Convert__imm_95_8__RegG8RC1_0__RegG8RC1_1, |
934 | | Convert__imm_95_8__RegG8RC1_0__S16Imm1_1, |
935 | | Convert__U5Imm1_0__RegG8RC1_1__S16Imm1_2, |
936 | | Convert__imm_95_20__RegG8RC1_0__RegG8RC1_1, |
937 | | Convert__imm_95_20__RegG8RC1_0__S16Imm1_1, |
938 | | Convert__imm_95_5__RegG8RC1_0__RegG8RC1_1, |
939 | | Convert__imm_95_5__RegG8RC1_0__S16Imm1_1, |
940 | | Convert__imm_95_1__RegG8RC1_0__RegG8RC1_1, |
941 | | Convert__imm_95_1__RegG8RC1_0__S16Imm1_1, |
942 | | Convert__imm_95_6__RegG8RC1_0__RegG8RC1_1, |
943 | | Convert__imm_95_6__RegG8RC1_0__S16Imm1_1, |
944 | | Convert__imm_95_2__RegG8RC1_0__RegG8RC1_1, |
945 | | Convert__imm_95_2__RegG8RC1_0__S16Imm1_1, |
946 | | Convert__imm_95_16__RegG8RC1_0__RegG8RC1_1, |
947 | | Convert__imm_95_16__RegG8RC1_0__S16Imm1_1, |
948 | | Convert__imm_95_24__RegG8RC1_0__RegG8RC1_1, |
949 | | Convert__imm_95_24__RegG8RC1_0__S16Imm1_1, |
950 | | Convert__imm_95_31__RegG8RC1_0__RegG8RC1_1, |
951 | | Convert__imm_95_31__RegG8RC1_0__S16Imm1_1, |
952 | | Convert__regR0__RegGPRC1_0, |
953 | | Convert__RegGPRC1_1__RegGPRC1_0, |
954 | | Convert__U2Imm1_0__RegGPRC1_1__RegGPRC1_2, |
955 | | Convert__imm_95_0__regR0__regR0, |
956 | | Convert__imm_95_1__regR0__regR0, |
957 | | Convert__imm_95_3__regR0__RegGPRC1_0, |
958 | | Convert__imm_95_3__RegGPRC1_0__RegGPRC1_1, |
959 | | Convert__RegGPRC1_0__RegGPRC1_1__Imm1_2, |
960 | | Convert__RegGPRC1_0__RegGPRC1_1__imm_95_1, |
961 | | Convert__imm_95_31__regR0__regR0, |
962 | | Convert__U5Imm1_0__RegGPRC1_1__RegGPRC1_2, |
963 | | Convert__imm_95_4__RegGPRC1_0__RegGPRC1_1, |
964 | | Convert__imm_95_4__RegGPRC1_0__S16Imm1_1, |
965 | | Convert__imm_95_12__RegGPRC1_0__RegGPRC1_1, |
966 | | Convert__imm_95_12__RegGPRC1_0__S16Imm1_1, |
967 | | Convert__imm_95_8__RegGPRC1_0__RegGPRC1_1, |
968 | | Convert__imm_95_8__RegGPRC1_0__S16Imm1_1, |
969 | | Convert__U5Imm1_0__RegGPRC1_1__S16Imm1_2, |
970 | | Convert__imm_95_20__RegGPRC1_0__RegGPRC1_1, |
971 | | Convert__imm_95_20__RegGPRC1_0__S16Imm1_1, |
972 | | Convert__imm_95_5__RegGPRC1_0__RegGPRC1_1, |
973 | | Convert__imm_95_5__RegGPRC1_0__S16Imm1_1, |
974 | | Convert__imm_95_1__RegGPRC1_0__RegGPRC1_1, |
975 | | Convert__imm_95_1__RegGPRC1_0__S16Imm1_1, |
976 | | Convert__imm_95_6__RegGPRC1_0__RegGPRC1_1, |
977 | | Convert__imm_95_6__RegGPRC1_0__S16Imm1_1, |
978 | | Convert__imm_95_2__RegGPRC1_0__RegGPRC1_1, |
979 | | Convert__imm_95_2__RegGPRC1_0__S16Imm1_1, |
980 | | Convert__imm_95_16__RegGPRC1_0__RegGPRC1_1, |
981 | | Convert__imm_95_16__RegGPRC1_0__S16Imm1_1, |
982 | | Convert__imm_95_24__RegGPRC1_0__RegGPRC1_1, |
983 | | Convert__imm_95_24__RegGPRC1_0__S16Imm1_1, |
984 | | Convert__imm_95_31__RegGPRC1_0__RegGPRC1_1, |
985 | | Convert__imm_95_31__RegGPRC1_0__S16Imm1_1, |
986 | | Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, |
987 | | Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, |
988 | | Convert__RegVRRC1_0__U5Imm1_2__RegVRRC1_1, |
989 | | Convert__RegVRRC1_0__RegVRRC1_1__RegGPRC1_2, |
990 | | Convert__RegVRRC1_0__RegVRRC1_1, |
991 | | Convert__RegCRRC1_0__RegVRRC1_1__RegVRRC1_2, |
992 | | Convert__RegG8RC1_0__RegVRRC1_1__U1Imm1_2, |
993 | | Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegGPRC1_3, |
994 | | Convert__RegVRRC1_0__U4Imm1_2__RegVRRC1_1, |
995 | | Convert__RegG8RC1_0__RegG8RC1_1__RegVRRC1_2, |
996 | | Convert__RegG8RC1_0__RegVRRC1_1__U3Imm1_2, |
997 | | Convert__RegVRRC1_0__Tie0_1_1__RegGPRC1_1__RegGPRC1_2, |
998 | | Convert__RegVRRC1_0__Tie0_1_1__RegGPRC1_1__RegVRRC1_2, |
999 | | Convert__RegVRRC1_0__Tie0_1_1__U4Imm1_2__RegG8RC1_1, |
1000 | | Convert__RegVRRC1_0__Tie0_1_1__RegG8RC1_1__RegG8RC1_2, |
1001 | | Convert__RegVRRC1_0__Tie0_1_1__U4Imm1_2__RegVRRC1_1, |
1002 | | Convert__RegVRRC1_0__Tie0_1_1__U4Imm1_2__RegGPRC1_1, |
1003 | | Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_1, |
1004 | | Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__Tie0_1_1, |
1005 | | Convert__RegVRRC1_0__RegVRRC1_1__U1Imm1_2__U4Imm1_3, |
1006 | | Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__U3Imm1_3, |
1007 | | Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__U4Imm1_3, |
1008 | | Convert__RegVRRC1_0__S5Imm1_1, |
1009 | | Convert__imm_95_1__imm_95_0, |
1010 | | Convert__U2Imm1_0__U2Imm1_1, |
1011 | | Convert__RegVSFRC1_0__RegVSFRC1_1, |
1012 | | Convert__RegVSFRC1_0__RegVSFRC1_1__RegVSFRC1_2, |
1013 | | Convert__RegVSSRC1_0__RegVSSRC1_1__RegVSSRC1_2, |
1014 | | Convert__RegVSRC1_0__RegVSFRC1_1__RegVSFRC1_2, |
1015 | | Convert__RegCRRC1_0__RegVSFRC1_1__RegVSFRC1_2, |
1016 | | Convert__RegVRRC1_0__RegVFRC1_1, |
1017 | | Convert__RegVSRC1_0__RegVSSRC1_1, |
1018 | | Convert__RegVFRC1_0__RegVRRC1_1, |
1019 | | Convert__RegVSSRC1_0__RegVSRC1_1, |
1020 | | Convert__RegVSSRC1_0__RegVSFRC1_1, |
1021 | | Convert__RegVSRC1_0__RegG8RC1_1__RegG8RC1_2, |
1022 | | Convert__RegVRRC1_0__RegVRRC1_1__RegVSFRC1_2, |
1023 | | Convert__RegVSFRC1_0__Tie0_1_1__RegVSFRC1_1__RegVSFRC1_2, |
1024 | | Convert__RegVSSRC1_0__Tie0_1_1__RegVSSRC1_1__RegVSSRC1_2, |
1025 | | Convert__RegVRRC1_0__Tie0_1_1__RegVRRC1_1__RegVRRC1_2, |
1026 | | Convert__RegVSSRC1_0__RegVSSRC1_1, |
1027 | | Convert__RegVRRC1_1__U1Imm1_0__RegVRRC1_2__U2Imm1_3, |
1028 | | Convert__RegCRRC1_0__RegVSFRC1_1, |
1029 | | Convert__RegCRRC1_0__U7Imm1_2__RegVSFRC1_1, |
1030 | | Convert__RegCRRC1_0__U7Imm1_2__RegVRRC1_1, |
1031 | | Convert__RegVSRC1_0__RegVSRC1_1, |
1032 | | Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, |
1033 | | Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2, |
1034 | | Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, |
1035 | | Convert__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3, |
1036 | | Convert__RegACCRC1_0__RegVSRpEvenRC1_1__RegVSRC1_2, |
1037 | | Convert__RegACCRC1_0__Tie0_1_1__RegVSRpEvenRC1_1__RegVSRC1_2, |
1038 | | Convert__RegVSRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, |
1039 | | Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_1, |
1040 | | Convert__RegCRRC1_0__RegVSRC1_1__RegVSRC1_2, |
1041 | | Convert__RegCRRC1_0__RegVSRC1_1, |
1042 | | Convert__RegVSRC1_0__U7Imm1_2__RegVSRC1_1, |
1043 | | Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3, |
1044 | | Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3__U8Imm1_4, |
1045 | | Convert__RegVSFRC1_0__RegVSRC1_1__U4Imm1_2, |
1046 | | Convert__RegVSRC1_0__RegVRRC1_1__S5Imm1_2, |
1047 | | Convert__RegVSRC1_0__Tie0_1_1__RegVSRC1_1__U4Imm1_2, |
1048 | | Convert__RegACCRC1_0__Tie0_1_1, |
1049 | | Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__imm_95_0, |
1050 | | Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__imm_95_3, |
1051 | | Convert__RegVSRC1_0__RegVSRC1_1__Tie0_1_1__RegVSRC1_2, |
1052 | | Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__U2Imm1_3, |
1053 | | Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3__U3Imm1_4, |
1054 | | Convert__RegACCRC1_0, |
1055 | | Convert__RegVSRC1_0__RegVSFRC1_1__imm_95_0, |
1056 | | Convert__RegVSRC1_0__RegVSFRC1_1__imm_95_3, |
1057 | | Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_1__imm_95_0, |
1058 | | Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_1__imm_95_3, |
1059 | | Convert__RegVSRC1_0__Tie0_1_1__U1Imm1_1__Imm1_2, |
1060 | | Convert__RegVSRC1_0__U8Imm1_1, |
1061 | | Convert__RegVSRC1_0__Imm1_1, |
1062 | | Convert__RegVSRC1_0__RegVSRC1_1__U2Imm1_2, |
1063 | | Convert__RegVSRC1_0__RegVSFRC1_1__imm_95_2, |
1064 | | Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_1__imm_95_2, |
1065 | | CVT_NUM_SIGNATURES |
1066 | | }; |
1067 | | |
1068 | | } // end anonymous namespace |
1069 | | |
1070 | | static const uint8_t ConversionTable[CVT_NUM_SIGNATURES][15] = { |
1071 | | // Convert__RegG8RC1_0__RegG8RC1_1__TLSReg1_2 |
1072 | | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_95_addTLSRegOperands, 3, CVT_Done }, |
1073 | | // Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2 |
1074 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_Done }, |
1075 | | // Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3 |
1076 | | { CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_95_addRegGPRCOperands, 4, CVT_Done }, |
1077 | | // Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2__U2Imm1_3 |
1078 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
1079 | | // Convert__RegGPRC1_0__RegGPRCNoR01_1__S16Imm1_2 |
1080 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCNoR0Operands, 2, CVT_95_addS16ImmOperands, 3, CVT_Done }, |
1081 | | // Convert__RegGPRC1_0__RegGPRC1_1__S16Imm1_2 |
1082 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addS16ImmOperands, 3, CVT_Done }, |
1083 | | // Convert__RegGPRC1_1__RegGPRC1_2__S16Imm1_3 |
1084 | | { CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_95_addS16ImmOperands, 4, CVT_Done }, |
1085 | | // Convert__RegGPRC1_0__RegGPRCNoR01_1__S17Imm1_2 |
1086 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCNoR0Operands, 2, CVT_95_addS16ImmOperands, 3, CVT_Done }, |
1087 | | // Convert__RegGPRC1_0__RegGPRC1_1 |
1088 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
1089 | | // Convert__RegGPRC1_1__RegGPRC1_2 |
1090 | | { CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_Done }, |
1091 | | // Convert__RegG8RC1_0__Imm1_1 |
1092 | | { CVT_95_addRegG8RCOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
1093 | | // Convert__RegGPRC1_1__RegGPRC1_2__U16Imm1_3 |
1094 | | { CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_95_addU16ImmOperands, 4, CVT_Done }, |
1095 | | // Convert_NoOperands |
1096 | | { CVT_Done }, |
1097 | | // Convert__DirectBr1_0 |
1098 | | { CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
1099 | | // Convert__U5Imm1_0__RegCRBITRC1_1__CondBr1_2 |
1100 | | { CVT_95_addImmOperands, 1, CVT_95_addRegCRBITRCOperands, 2, CVT_95_addBranchTargetOperands, 3, CVT_Done }, |
1101 | | // Convert__U5Imm1_1__ATBitsAsHint1_0__RegCRBITRC1_2__CondBr1_3 |
1102 | | { CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 1, CVT_95_addRegCRBITRCOperands, 3, CVT_95_addBranchTargetOperands, 4, CVT_Done }, |
1103 | | // Convert__U5Imm1_0__imm_95_3__RegCRBITRC1_1__CondBr1_2 |
1104 | | { CVT_95_addImmOperands, 1, CVT_imm_95_3, 0, CVT_95_addRegCRBITRCOperands, 2, CVT_95_addBranchTargetOperands, 3, CVT_Done }, |
1105 | | // Convert__U5Imm1_0__imm_95_2__RegCRBITRC1_1__CondBr1_2 |
1106 | | { CVT_95_addImmOperands, 1, CVT_imm_95_2, 0, CVT_95_addRegCRBITRCOperands, 2, CVT_95_addBranchTargetOperands, 3, CVT_Done }, |
1107 | | // Convert__U5Imm1_0__RegCRBITRC1_1__imm_95_0 |
1108 | | { CVT_95_addImmOperands, 1, CVT_95_addRegCRBITRCOperands, 2, CVT_imm_95_0, 0, CVT_Done }, |
1109 | | // Convert__U5Imm1_0__RegCRBITRC1_1__Imm1_2 |
1110 | | { CVT_95_addImmOperands, 1, CVT_95_addRegCRBITRCOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
1111 | | // Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3__U1Imm1_4 |
1112 | | { CVT_95_addRegVRRCOperands, 2, CVT_95_addRegVRRCOperands, 3, CVT_95_addRegVRRCOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
1113 | | // Convert__RegVRRC1_1__RegVRRC1_2__U1Imm1_3 |
1114 | | { CVT_95_addRegVRRCOperands, 2, CVT_95_addRegVRRCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
1115 | | // Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3 |
1116 | | { CVT_95_addRegVRRCOperands, 2, CVT_95_addRegVRRCOperands, 3, CVT_95_addRegVRRCOperands, 4, CVT_Done }, |
1117 | | // Convert__RegVRRC1_1__RegVRRC1_2 |
1118 | | { CVT_95_addRegVRRCOperands, 2, CVT_95_addRegVRRCOperands, 3, CVT_Done }, |
1119 | | // Convert__CondBr1_0 |
1120 | | { CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
1121 | | // Convert__imm_95_0__RegCRBITRC1_0__CondBr1_1 |
1122 | | { CVT_imm_95_0, 0, CVT_95_addRegCRBITRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
1123 | | // Convert__imm_95_0__RegCRBITRC1_0__imm_95_0 |
1124 | | { CVT_imm_95_0, 0, CVT_95_addRegCRBITRCOperands, 1, CVT_imm_95_0, 0, CVT_Done }, |
1125 | | // Convert__imm_95_8__RegCRBITRC1_0__CondBr1_1 |
1126 | | { CVT_imm_95_8, 0, CVT_95_addRegCRBITRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
1127 | | // Convert__imm_95_8__RegCRBITRC1_0__imm_95_0 |
1128 | | { CVT_imm_95_8, 0, CVT_95_addRegCRBITRCOperands, 1, CVT_imm_95_0, 0, CVT_Done }, |
1129 | | // Convert__imm_95_2__RegCRBITRC1_0__CondBr1_1 |
1130 | | { CVT_imm_95_2, 0, CVT_95_addRegCRBITRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
1131 | | // Convert__imm_95_2__RegCRBITRC1_0__imm_95_0 |
1132 | | { CVT_imm_95_2, 0, CVT_95_addRegCRBITRCOperands, 1, CVT_imm_95_0, 0, CVT_Done }, |
1133 | | // Convert__imm_95_10__RegCRBITRC1_0__CondBr1_1 |
1134 | | { CVT_imm_95_10, 0, CVT_95_addRegCRBITRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
1135 | | // Convert__imm_95_10__RegCRBITRC1_0__imm_95_0 |
1136 | | { CVT_imm_95_10, 0, CVT_95_addRegCRBITRCOperands, 1, CVT_imm_95_0, 0, CVT_Done }, |
1137 | | // Convert__imm_95_76__regCR0__CondBr1_0 |
1138 | | { CVT_imm_95_76, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
1139 | | // Convert__imm_95_76__RegCRRC1_0__CondBr1_1 |
1140 | | { CVT_imm_95_76, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
1141 | | // Convert__imm_95_79__regCR0__CondBr1_0 |
1142 | | { CVT_imm_95_79, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
1143 | | // Convert__imm_95_79__RegCRRC1_0__CondBr1_1 |
1144 | | { CVT_imm_95_79, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
1145 | | // Convert__imm_95_78__regCR0__CondBr1_0 |
1146 | | { CVT_imm_95_78, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
1147 | | // Convert__imm_95_78__RegCRRC1_0__CondBr1_1 |
1148 | | { CVT_imm_95_78, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
1149 | | // Convert__imm_95_76__regCR0 |
1150 | | { CVT_imm_95_76, 0, CVT_regCR0, 0, CVT_Done }, |
1151 | | // Convert__imm_95_76__RegCRRC1_0 |
1152 | | { CVT_imm_95_76, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
1153 | | // Convert__imm_95_79__regCR0 |
1154 | | { CVT_imm_95_79, 0, CVT_regCR0, 0, CVT_Done }, |
1155 | | // Convert__imm_95_79__RegCRRC1_0 |
1156 | | { CVT_imm_95_79, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
1157 | | // Convert__imm_95_78__regCR0 |
1158 | | { CVT_imm_95_78, 0, CVT_regCR0, 0, CVT_Done }, |
1159 | | // Convert__imm_95_78__RegCRRC1_0 |
1160 | | { CVT_imm_95_78, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
1161 | | // Convert__imm_95_4__RegCRBITRC1_0__CondBr1_1 |
1162 | | { CVT_imm_95_4, 0, CVT_95_addRegCRBITRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
1163 | | // Convert__imm_95_7__RegCRBITRC1_0__CondBr1_1 |
1164 | | { CVT_imm_95_7, 0, CVT_95_addRegCRBITRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
1165 | | // Convert__imm_95_6__RegCRBITRC1_0__CondBr1_1 |
1166 | | { CVT_imm_95_6, 0, CVT_95_addRegCRBITRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
1167 | | // Convert__imm_95_4__RegCRBITRC1_0__imm_95_0 |
1168 | | { CVT_imm_95_4, 0, CVT_95_addRegCRBITRCOperands, 1, CVT_imm_95_0, 0, CVT_Done }, |
1169 | | // Convert__imm_95_7__RegCRBITRC1_0__imm_95_0 |
1170 | | { CVT_imm_95_7, 0, CVT_95_addRegCRBITRCOperands, 1, CVT_imm_95_0, 0, CVT_Done }, |
1171 | | // Convert__imm_95_6__RegCRBITRC1_0__imm_95_0 |
1172 | | { CVT_imm_95_6, 0, CVT_95_addRegCRBITRCOperands, 1, CVT_imm_95_0, 0, CVT_Done }, |
1173 | | // Convert__imm_95_4__regCR0__CondBr1_0 |
1174 | | { CVT_imm_95_4, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
1175 | | // Convert__imm_95_4__RegCRRC1_0__CondBr1_1 |
1176 | | { CVT_imm_95_4, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
1177 | | // Convert__imm_95_7__regCR0__CondBr1_0 |
1178 | | { CVT_imm_95_7, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
1179 | | // Convert__imm_95_7__RegCRRC1_0__CondBr1_1 |
1180 | | { CVT_imm_95_7, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
1181 | | // Convert__imm_95_6__regCR0__CondBr1_0 |
1182 | | { CVT_imm_95_6, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
1183 | | // Convert__imm_95_6__RegCRRC1_0__CondBr1_1 |
1184 | | { CVT_imm_95_6, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
1185 | | // Convert__imm_95_4__regCR0 |
1186 | | { CVT_imm_95_4, 0, CVT_regCR0, 0, CVT_Done }, |
1187 | | // Convert__imm_95_4__RegCRRC1_0 |
1188 | | { CVT_imm_95_4, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
1189 | | // Convert__imm_95_7__regCR0 |
1190 | | { CVT_imm_95_7, 0, CVT_regCR0, 0, CVT_Done }, |
1191 | | // Convert__imm_95_7__RegCRRC1_0 |
1192 | | { CVT_imm_95_7, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
1193 | | // Convert__imm_95_6__regCR0 |
1194 | | { CVT_imm_95_6, 0, CVT_regCR0, 0, CVT_Done }, |
1195 | | // Convert__imm_95_6__RegCRRC1_0 |
1196 | | { CVT_imm_95_6, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
1197 | | // Convert__imm_95_44__regCR0__CondBr1_0 |
1198 | | { CVT_imm_95_44, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
1199 | | // Convert__imm_95_44__RegCRRC1_0__CondBr1_1 |
1200 | | { CVT_imm_95_44, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
1201 | | // Convert__imm_95_47__regCR0__CondBr1_0 |
1202 | | { CVT_imm_95_47, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
1203 | | // Convert__imm_95_47__RegCRRC1_0__CondBr1_1 |
1204 | | { CVT_imm_95_47, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
1205 | | // Convert__imm_95_46__regCR0__CondBr1_0 |
1206 | | { CVT_imm_95_46, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
1207 | | // Convert__imm_95_46__RegCRRC1_0__CondBr1_1 |
1208 | | { CVT_imm_95_46, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
1209 | | // Convert__imm_95_44__regCR0 |
1210 | | { CVT_imm_95_44, 0, CVT_regCR0, 0, CVT_Done }, |
1211 | | // Convert__imm_95_44__RegCRRC1_0 |
1212 | | { CVT_imm_95_44, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
1213 | | // Convert__imm_95_47__regCR0 |
1214 | | { CVT_imm_95_47, 0, CVT_regCR0, 0, CVT_Done }, |
1215 | | // Convert__imm_95_47__RegCRRC1_0 |
1216 | | { CVT_imm_95_47, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
1217 | | // Convert__imm_95_46__regCR0 |
1218 | | { CVT_imm_95_46, 0, CVT_regCR0, 0, CVT_Done }, |
1219 | | // Convert__imm_95_46__RegCRRC1_0 |
1220 | | { CVT_imm_95_46, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
1221 | | // Convert__DirectBr1_0__Imm1_1 |
1222 | | { CVT_95_addBranchTargetOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
1223 | | // Convert__imm_95_36__regCR0__CondBr1_0 |
1224 | | { CVT_imm_95_36, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
1225 | | // Convert__imm_95_36__RegCRRC1_0__CondBr1_1 |
1226 | | { CVT_imm_95_36, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
1227 | | // Convert__imm_95_39__regCR0__CondBr1_0 |
1228 | | { CVT_imm_95_39, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
1229 | | // Convert__imm_95_39__RegCRRC1_0__CondBr1_1 |
1230 | | { CVT_imm_95_39, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
1231 | | // Convert__imm_95_38__regCR0__CondBr1_0 |
1232 | | { CVT_imm_95_38, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
1233 | | // Convert__imm_95_38__RegCRRC1_0__CondBr1_1 |
1234 | | { CVT_imm_95_38, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
1235 | | // Convert__imm_95_36__regCR0 |
1236 | | { CVT_imm_95_36, 0, CVT_regCR0, 0, CVT_Done }, |
1237 | | // Convert__imm_95_36__RegCRRC1_0 |
1238 | | { CVT_imm_95_36, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
1239 | | // Convert__imm_95_39__regCR0 |
1240 | | { CVT_imm_95_39, 0, CVT_regCR0, 0, CVT_Done }, |
1241 | | // Convert__imm_95_39__RegCRRC1_0 |
1242 | | { CVT_imm_95_39, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
1243 | | // Convert__imm_95_38__regCR0 |
1244 | | { CVT_imm_95_38, 0, CVT_regCR0, 0, CVT_Done }, |
1245 | | // Convert__imm_95_38__RegCRRC1_0 |
1246 | | { CVT_imm_95_38, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
1247 | | // Convert__imm_95_12__regCR0__CondBr1_0 |
1248 | | { CVT_imm_95_12, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
1249 | | // Convert__imm_95_12__RegCRRC1_0__CondBr1_1 |
1250 | | { CVT_imm_95_12, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
1251 | | // Convert__imm_95_15__regCR0__CondBr1_0 |
1252 | | { CVT_imm_95_15, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
1253 | | // Convert__imm_95_15__RegCRRC1_0__CondBr1_1 |
1254 | | { CVT_imm_95_15, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
1255 | | // Convert__imm_95_14__regCR0__CondBr1_0 |
1256 | | { CVT_imm_95_14, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
1257 | | // Convert__imm_95_14__RegCRRC1_0__CondBr1_1 |
1258 | | { CVT_imm_95_14, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
1259 | | // Convert__imm_95_12__regCR0 |
1260 | | { CVT_imm_95_12, 0, CVT_regCR0, 0, CVT_Done }, |
1261 | | // Convert__imm_95_12__RegCRRC1_0 |
1262 | | { CVT_imm_95_12, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
1263 | | // Convert__imm_95_15__regCR0 |
1264 | | { CVT_imm_95_15, 0, CVT_regCR0, 0, CVT_Done }, |
1265 | | // Convert__imm_95_15__RegCRRC1_0 |
1266 | | { CVT_imm_95_15, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
1267 | | // Convert__imm_95_14__regCR0 |
1268 | | { CVT_imm_95_14, 0, CVT_regCR0, 0, CVT_Done }, |
1269 | | // Convert__imm_95_14__RegCRRC1_0 |
1270 | | { CVT_imm_95_14, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
1271 | | // Convert__imm_95_68__regCR0__CondBr1_0 |
1272 | | { CVT_imm_95_68, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
1273 | | // Convert__imm_95_68__RegCRRC1_0__CondBr1_1 |
1274 | | { CVT_imm_95_68, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
1275 | | // Convert__imm_95_71__regCR0__CondBr1_0 |
1276 | | { CVT_imm_95_71, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
1277 | | // Convert__imm_95_71__RegCRRC1_0__CondBr1_1 |
1278 | | { CVT_imm_95_71, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
1279 | | // Convert__imm_95_70__regCR0__CondBr1_0 |
1280 | | { CVT_imm_95_70, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
1281 | | // Convert__imm_95_70__RegCRRC1_0__CondBr1_1 |
1282 | | { CVT_imm_95_70, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
1283 | | // Convert__imm_95_68__regCR0 |
1284 | | { CVT_imm_95_68, 0, CVT_regCR0, 0, CVT_Done }, |
1285 | | // Convert__imm_95_68__RegCRRC1_0 |
1286 | | { CVT_imm_95_68, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
1287 | | // Convert__imm_95_71__regCR0 |
1288 | | { CVT_imm_95_71, 0, CVT_regCR0, 0, CVT_Done }, |
1289 | | // Convert__imm_95_71__RegCRRC1_0 |
1290 | | { CVT_imm_95_71, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
1291 | | // Convert__imm_95_70__regCR0 |
1292 | | { CVT_imm_95_70, 0, CVT_regCR0, 0, CVT_Done }, |
1293 | | // Convert__imm_95_70__RegCRRC1_0 |
1294 | | { CVT_imm_95_70, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
1295 | | // Convert__imm_95_100__regCR0__CondBr1_0 |
1296 | | { CVT_imm_95_100, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
1297 | | // Convert__imm_95_100__RegCRRC1_0__CondBr1_1 |
1298 | | { CVT_imm_95_100, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
1299 | | // Convert__imm_95_103__regCR0__CondBr1_0 |
1300 | | { CVT_imm_95_103, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
1301 | | // Convert__imm_95_103__RegCRRC1_0__CondBr1_1 |
1302 | | { CVT_imm_95_103, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
1303 | | // Convert__imm_95_102__regCR0__CondBr1_0 |
1304 | | { CVT_imm_95_102, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
1305 | | // Convert__imm_95_102__RegCRRC1_0__CondBr1_1 |
1306 | | { CVT_imm_95_102, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
1307 | | // Convert__imm_95_100__regCR0 |
1308 | | { CVT_imm_95_100, 0, CVT_regCR0, 0, CVT_Done }, |
1309 | | // Convert__imm_95_100__RegCRRC1_0 |
1310 | | { CVT_imm_95_100, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
1311 | | // Convert__imm_95_103__regCR0 |
1312 | | { CVT_imm_95_103, 0, CVT_regCR0, 0, CVT_Done }, |
1313 | | // Convert__imm_95_103__RegCRRC1_0 |
1314 | | { CVT_imm_95_103, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
1315 | | // Convert__imm_95_102__regCR0 |
1316 | | { CVT_imm_95_102, 0, CVT_regCR0, 0, CVT_Done }, |
1317 | | // Convert__imm_95_102__RegCRRC1_0 |
1318 | | { CVT_imm_95_102, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
1319 | | // Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2 |
1320 | | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_Done }, |
1321 | | // Convert__RegG8RC1_0__RegG8RC1_1 |
1322 | | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
1323 | | // Convert__imm_95_108__regCR0__CondBr1_0 |
1324 | | { CVT_imm_95_108, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
1325 | | // Convert__imm_95_108__RegCRRC1_0__CondBr1_1 |
1326 | | { CVT_imm_95_108, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
1327 | | // Convert__imm_95_111__regCR0__CondBr1_0 |
1328 | | { CVT_imm_95_111, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
1329 | | // Convert__imm_95_111__RegCRRC1_0__CondBr1_1 |
1330 | | { CVT_imm_95_111, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
1331 | | // Convert__imm_95_110__regCR0__CondBr1_0 |
1332 | | { CVT_imm_95_110, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
1333 | | // Convert__imm_95_110__RegCRRC1_0__CondBr1_1 |
1334 | | { CVT_imm_95_110, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
1335 | | // Convert__imm_95_108__regCR0 |
1336 | | { CVT_imm_95_108, 0, CVT_regCR0, 0, CVT_Done }, |
1337 | | // Convert__imm_95_108__RegCRRC1_0 |
1338 | | { CVT_imm_95_108, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
1339 | | // Convert__imm_95_111__regCR0 |
1340 | | { CVT_imm_95_111, 0, CVT_regCR0, 0, CVT_Done }, |
1341 | | // Convert__imm_95_111__RegCRRC1_0 |
1342 | | { CVT_imm_95_111, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
1343 | | // Convert__imm_95_110__regCR0 |
1344 | | { CVT_imm_95_110, 0, CVT_regCR0, 0, CVT_Done }, |
1345 | | // Convert__imm_95_110__RegCRRC1_0 |
1346 | | { CVT_imm_95_110, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
1347 | | // Convert__imm_95_12__RegCRBITRC1_0__CondBr1_1 |
1348 | | { CVT_imm_95_12, 0, CVT_95_addRegCRBITRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
1349 | | // Convert__imm_95_15__RegCRBITRC1_0__CondBr1_1 |
1350 | | { CVT_imm_95_15, 0, CVT_95_addRegCRBITRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
1351 | | // Convert__imm_95_14__RegCRBITRC1_0__CondBr1_1 |
1352 | | { CVT_imm_95_14, 0, CVT_95_addRegCRBITRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
1353 | | // Convert__imm_95_12__RegCRBITRC1_0__imm_95_0 |
1354 | | { CVT_imm_95_12, 0, CVT_95_addRegCRBITRCOperands, 1, CVT_imm_95_0, 0, CVT_Done }, |
1355 | | // Convert__imm_95_15__RegCRBITRC1_0__imm_95_0 |
1356 | | { CVT_imm_95_15, 0, CVT_95_addRegCRBITRCOperands, 1, CVT_imm_95_0, 0, CVT_Done }, |
1357 | | // Convert__imm_95_14__RegCRBITRC1_0__imm_95_0 |
1358 | | { CVT_imm_95_14, 0, CVT_95_addRegCRBITRCOperands, 1, CVT_imm_95_0, 0, CVT_Done }, |
1359 | | // Convert__RegG8RC1_0__RegG8RC1_1__imm_95_0__U6Imm1_2 |
1360 | | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_imm_95_0, 0, CVT_95_addImmOperands, 3, CVT_Done }, |
1361 | | // Convert__RegG8RC1_0__RegGPRC1_1__imm_95_0__U6Imm1_2 |
1362 | | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_imm_95_0, 0, CVT_95_addImmOperands, 3, CVT_Done }, |
1363 | | // Convert__RegG8RC1_1__RegG8RC1_2__imm_95_0__U6Imm1_3 |
1364 | | { CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_imm_95_0, 0, CVT_95_addImmOperands, 4, CVT_Done }, |
1365 | | // Convert__RegG8RC1_0__RegG8RC1_1__U6Imm1_2__U6Imm1_3 |
1366 | | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
1367 | | // Convert__RegG8RC1_1__RegG8RC1_2__U6Imm1_3__U6Imm1_4 |
1368 | | { CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
1369 | | // Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2__U5Imm1_3 |
1370 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
1371 | | // Convert__RegGPRC1_1__RegGPRC1_2__U5Imm1_3__U5Imm1_4 |
1372 | | { CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
1373 | | // Convert__RegG8RC1_0__RegG8RC1_1__imm_95_0__U5Imm1_2__imm_95_31 |
1374 | | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_imm_95_0, 0, CVT_95_addImmOperands, 3, CVT_imm_95_31, 0, CVT_Done }, |
1375 | | // Convert__RegGPRC1_0__RegGPRC1_1__imm_95_0__U5Imm1_2__imm_95_31 |
1376 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_imm_95_0, 0, CVT_95_addImmOperands, 3, CVT_imm_95_31, 0, CVT_Done }, |
1377 | | // Convert__RegG8RC1_1__RegG8RC1_2__imm_95_0__U5Imm1_3__imm_95_31 |
1378 | | { CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_imm_95_0, 0, CVT_95_addImmOperands, 4, CVT_imm_95_31, 0, CVT_Done }, |
1379 | | // Convert__RegGPRC1_1__RegGPRC1_2__imm_95_0__U5Imm1_3__imm_95_31 |
1380 | | { CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_imm_95_0, 0, CVT_95_addImmOperands, 4, CVT_imm_95_31, 0, CVT_Done }, |
1381 | | // Convert__RegG8RC1_0__RegG8RC1_1__U6Imm1_2 |
1382 | | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
1383 | | // Convert__RegG8RC1_1__RegG8RC1_2__U6Imm1_3 |
1384 | | { CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
1385 | | // Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2 |
1386 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
1387 | | // Convert__RegGPRC1_1__RegGPRC1_2__U5Imm1_3 |
1388 | | { CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
1389 | | // Convert__RegCRRC1_0__RegGPRC1_2__RegGPRC1_3 |
1390 | | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegGPRCOperands, 3, CVT_95_addRegGPRCOperands, 4, CVT_Done }, |
1391 | | // Convert__RegCRRC1_0__RegG8RC1_2__RegG8RC1_3 |
1392 | | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegG8RCOperands, 3, CVT_95_addRegG8RCOperands, 4, CVT_Done }, |
1393 | | // Convert__regCR0__RegG8RC1_0__RegG8RC1_1 |
1394 | | { CVT_regCR0, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
1395 | | // Convert__RegCRRC1_0__RegG8RC1_1__RegG8RC1_2 |
1396 | | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_Done }, |
1397 | | // Convert__regCR0__RegG8RC1_0__S16Imm1_1 |
1398 | | { CVT_regCR0, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
1399 | | // Convert__RegCRRC1_0__RegG8RC1_1__S16Imm1_2 |
1400 | | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_95_addS16ImmOperands, 3, CVT_Done }, |
1401 | | // Convert__RegCRRC1_0__RegGPRC1_2__S16Imm1_3 |
1402 | | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegGPRCOperands, 3, CVT_95_addS16ImmOperands, 4, CVT_Done }, |
1403 | | // Convert__RegCRRC1_0__RegG8RC1_2__S16Imm1_3 |
1404 | | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegG8RCOperands, 3, CVT_95_addS16ImmOperands, 4, CVT_Done }, |
1405 | | // Convert__regCR0__RegG8RC1_0__U16Imm1_1 |
1406 | | { CVT_regCR0, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addU16ImmOperands, 2, CVT_Done }, |
1407 | | // Convert__RegCRRC1_0__RegG8RC1_1__U16Imm1_2 |
1408 | | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_95_addU16ImmOperands, 3, CVT_Done }, |
1409 | | // Convert__RegCRRC1_0__RegGPRC1_2__U16Imm1_3 |
1410 | | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegGPRCOperands, 3, CVT_95_addU16ImmOperands, 4, CVT_Done }, |
1411 | | // Convert__RegCRRC1_0__RegG8RC1_2__U16Imm1_3 |
1412 | | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegG8RCOperands, 3, CVT_95_addU16ImmOperands, 4, CVT_Done }, |
1413 | | // Convert__regCR0__RegGPRC1_0__RegGPRC1_1 |
1414 | | { CVT_regCR0, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
1415 | | // Convert__RegCRRC1_0__RegGPRC1_1__RegGPRC1_2 |
1416 | | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_Done }, |
1417 | | // Convert__regCR0__RegGPRC1_0__U16Imm1_1 |
1418 | | { CVT_regCR0, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addU16ImmOperands, 2, CVT_Done }, |
1419 | | // Convert__RegCRRC1_0__RegGPRC1_1__U16Imm1_2 |
1420 | | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addU16ImmOperands, 3, CVT_Done }, |
1421 | | // Convert__RegCRRC1_0__U1Imm1_1__RegGPRC1_2__RegGPRC1_3 |
1422 | | { CVT_95_addRegCRRCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_95_addRegGPRCOperands, 4, CVT_Done }, |
1423 | | // Convert__regCR0__RegGPRC1_0__S16Imm1_1 |
1424 | | { CVT_regCR0, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
1425 | | // Convert__RegCRRC1_0__RegGPRC1_1__S16Imm1_2 |
1426 | | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addS16ImmOperands, 3, CVT_Done }, |
1427 | | // Convert__RegG8RC1_1__RegG8RC1_2 |
1428 | | { CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_Done }, |
1429 | | // Convert__RegGPRC1_0__RegGPRC1_1__imm_95_0 |
1430 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_imm_95_0, 0, CVT_Done }, |
1431 | | // Convert__RegCRBITRC1_0__RegCRBITRC1_1__RegCRBITRC1_2 |
1432 | | { CVT_95_addRegCRBITRCOperands, 1, CVT_95_addRegCRBITRCOperands, 2, CVT_95_addRegCRBITRCOperands, 3, CVT_Done }, |
1433 | | // Convert__RegCRBITRC1_0__RegCRBITRC1_0__RegCRBITRC1_0 |
1434 | | { CVT_95_addRegCRBITRCOperands, 1, CVT_95_addRegCRBITRCOperands, 1, CVT_95_addRegCRBITRCOperands, 1, CVT_Done }, |
1435 | | // Convert__RegCRBITRC1_0__RegCRBITRC1_1__RegCRBITRC1_1 |
1436 | | { CVT_95_addRegCRBITRCOperands, 1, CVT_95_addRegCRBITRCOperands, 2, CVT_95_addRegCRBITRCOperands, 2, CVT_Done }, |
1437 | | // Convert__RegF8RC1_0__RegF8RC1_1__RegF8RC1_2 |
1438 | | { CVT_95_addRegF8RCOperands, 1, CVT_95_addRegF8RCOperands, 2, CVT_95_addRegF8RCOperands, 3, CVT_Done }, |
1439 | | // Convert__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3 |
1440 | | { CVT_95_addRegF8RCOperands, 2, CVT_95_addRegF8RCOperands, 3, CVT_95_addRegF8RCOperands, 4, CVT_Done }, |
1441 | | // Convert__RegFpRC1_0__RegFpRC1_1__RegFpRC1_2 |
1442 | | { CVT_95_addRegFpRCOperands, 1, CVT_95_addRegFpRCOperands, 2, CVT_95_addRegFpRCOperands, 3, CVT_Done }, |
1443 | | // Convert__RegFpRC1_1__RegFpRC1_2__RegFpRC1_3 |
1444 | | { CVT_95_addRegFpRCOperands, 2, CVT_95_addRegFpRCOperands, 3, CVT_95_addRegFpRCOperands, 4, CVT_Done }, |
1445 | | // Convert__RegG8RC1_0__U2Imm1_1 |
1446 | | { CVT_95_addRegG8RCOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
1447 | | // Convert__RegGxRCNoR01_0__RegGxRC1_1 |
1448 | | { CVT_95_addRegGxRCNoR0Operands, 1, CVT_95_addRegGxRCOperands, 2, CVT_Done }, |
1449 | | // Convert__U3Imm1_2__RegGxRCNoR01_0__RegGxRC1_1 |
1450 | | { CVT_95_addImmOperands, 3, CVT_95_addRegGxRCNoR0Operands, 1, CVT_95_addRegGxRCOperands, 2, CVT_Done }, |
1451 | | // Convert__U5Imm1_2__RegGxRCNoR01_0__RegGxRC1_1 |
1452 | | { CVT_95_addImmOperands, 3, CVT_95_addRegGxRCNoR0Operands, 1, CVT_95_addRegGxRCOperands, 2, CVT_Done }, |
1453 | | // Convert__RegGxRCNoR01_0__RegGxRC1_1__U5Imm1_2 |
1454 | | { CVT_95_addRegGxRCNoR0Operands, 1, CVT_95_addRegGxRCOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
1455 | | // Convert__RegGxRCNoR01_1__RegGxRC1_2__U5Imm1_0 |
1456 | | { CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_95_addImmOperands, 1, CVT_Done }, |
1457 | | // Convert__regR0__regR0 |
1458 | | { CVT_regR0, 0, CVT_regR0, 0, CVT_Done }, |
1459 | | // Convert__RegF8RC1_0__RegF8RC1_1 |
1460 | | { CVT_95_addRegF8RCOperands, 1, CVT_95_addRegF8RCOperands, 2, CVT_Done }, |
1461 | | // Convert__RegF8RC1_1__RegF8RC1_2 |
1462 | | { CVT_95_addRegF8RCOperands, 2, CVT_95_addRegF8RCOperands, 3, CVT_Done }, |
1463 | | // Convert__RegFpRC1_0__RegF8RC1_1 |
1464 | | { CVT_95_addRegFpRCOperands, 1, CVT_95_addRegF8RCOperands, 2, CVT_Done }, |
1465 | | // Convert__RegFpRC1_1__RegF8RC1_2 |
1466 | | { CVT_95_addRegFpRCOperands, 2, CVT_95_addRegF8RCOperands, 3, CVT_Done }, |
1467 | | // Convert__RegFpRC1_0__RegVRRC1_1 |
1468 | | { CVT_95_addRegFpRCOperands, 1, CVT_95_addRegVRRCOperands, 2, CVT_Done }, |
1469 | | // Convert__RegCRRC1_0__RegF8RC1_1__RegF8RC1_2 |
1470 | | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegF8RCOperands, 2, CVT_95_addRegF8RCOperands, 3, CVT_Done }, |
1471 | | // Convert__RegCRRC1_0__RegFpRC1_1__RegFpRC1_2 |
1472 | | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegFpRCOperands, 2, CVT_95_addRegFpRCOperands, 3, CVT_Done }, |
1473 | | // Convert__RegF8RC1_0__RegFpRC1_1 |
1474 | | { CVT_95_addRegF8RCOperands, 1, CVT_95_addRegFpRCOperands, 2, CVT_Done }, |
1475 | | // Convert__RegF8RC1_1__RegFpRC1_2 |
1476 | | { CVT_95_addRegF8RCOperands, 2, CVT_95_addRegFpRCOperands, 3, CVT_Done }, |
1477 | | // Convert__RegVRRC1_0__RegFpRC1_1 |
1478 | | { CVT_95_addRegVRRCOperands, 1, CVT_95_addRegFpRCOperands, 2, CVT_Done }, |
1479 | | // Convert__RegF8RC1_1__U2Imm1_0__RegF8RC1_2 |
1480 | | { CVT_95_addRegF8RCOperands, 2, CVT_95_addImmOperands, 1, CVT_95_addRegF8RCOperands, 3, CVT_Done }, |
1481 | | // Convert__RegF8RC1_2__U2Imm1_1__RegF8RC1_3 |
1482 | | { CVT_95_addRegF8RCOperands, 3, CVT_95_addImmOperands, 2, CVT_95_addRegF8RCOperands, 4, CVT_Done }, |
1483 | | // Convert__RegFpRC1_1__U2Imm1_0__RegFpRC1_2 |
1484 | | { CVT_95_addRegFpRCOperands, 2, CVT_95_addImmOperands, 1, CVT_95_addRegFpRCOperands, 3, CVT_Done }, |
1485 | | // Convert__RegFpRC1_2__U2Imm1_1__RegFpRC1_3 |
1486 | | { CVT_95_addRegFpRCOperands, 3, CVT_95_addImmOperands, 2, CVT_95_addRegFpRCOperands, 4, CVT_Done }, |
1487 | | // Convert__RegF8RC1_1__U1Imm1_0__RegF8RC1_2 |
1488 | | { CVT_95_addRegF8RCOperands, 2, CVT_95_addImmOperands, 1, CVT_95_addRegF8RCOperands, 3, CVT_Done }, |
1489 | | // Convert__RegF8RC1_2__U1Imm1_1__RegF8RC1_3 |
1490 | | { CVT_95_addRegF8RCOperands, 3, CVT_95_addImmOperands, 2, CVT_95_addRegF8RCOperands, 4, CVT_Done }, |
1491 | | // Convert__RegFpRC1_1__U1Imm1_0__RegFpRC1_2 |
1492 | | { CVT_95_addRegFpRCOperands, 2, CVT_95_addImmOperands, 1, CVT_95_addRegFpRCOperands, 3, CVT_Done }, |
1493 | | // Convert__RegFpRC1_2__U1Imm1_1__RegFpRC1_3 |
1494 | | { CVT_95_addRegFpRCOperands, 3, CVT_95_addImmOperands, 2, CVT_95_addRegFpRCOperands, 4, CVT_Done }, |
1495 | | // Convert__RegFpRC1_0__RegF8RC1_1__RegFpRC1_2 |
1496 | | { CVT_95_addRegFpRCOperands, 1, CVT_95_addRegF8RCOperands, 2, CVT_95_addRegFpRCOperands, 3, CVT_Done }, |
1497 | | // Convert__RegFpRC1_1__RegF8RC1_2__RegFpRC1_3 |
1498 | | { CVT_95_addRegFpRCOperands, 2, CVT_95_addRegF8RCOperands, 3, CVT_95_addRegFpRCOperands, 4, CVT_Done }, |
1499 | | // Convert__RegG8RC1_1__RegG8RC1_2__RegG8RC1_3 |
1500 | | { CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_95_addRegG8RCOperands, 4, CVT_Done }, |
1501 | | // Convert__RegDMRRC1_0__RegDMRRC1_1 |
1502 | | { CVT_95_addRegDMRRCOperands, 1, CVT_95_addRegDMRRCOperands, 2, CVT_Done }, |
1503 | | // Convert__RegDMRRC1_0 |
1504 | | { CVT_95_addRegDMRRCOperands, 1, CVT_Done }, |
1505 | | // Convert__RegDMRRC1_0__Tie0_1_1__RegDMRRC1_1 |
1506 | | { CVT_95_addRegDMRRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegDMRRCOperands, 2, CVT_Done }, |
1507 | | // Convert__RegVSRpRC1_1__RegDMRROWpRC1_0__U2Imm1_2 |
1508 | | { CVT_95_addRegVSRpRCOperands, 2, CVT_95_addRegDMRROWpRCOperands, 1, CVT_95_addImmOperands, 3, CVT_Done }, |
1509 | | // Convert__RegVSRpRC1_1__RegVSRpRC1_2__RegACCRC1_0 |
1510 | | { CVT_95_addRegVSRpRCOperands, 2, CVT_95_addRegVSRpRCOperands, 3, CVT_95_addRegACCRCOperands, 1, CVT_Done }, |
1511 | | // Convert__RegDMRROWpRC1_0__RegVSRpRC1_1__U2Imm1_2 |
1512 | | { CVT_95_addRegDMRROWpRCOperands, 1, CVT_95_addRegVSRpRCOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
1513 | | // Convert__RegACCRC1_0__RegVSRpRC1_1__RegVSRpRC1_2 |
1514 | | { CVT_95_addRegACCRCOperands, 1, CVT_95_addRegVSRpRCOperands, 2, CVT_95_addRegVSRpRCOperands, 3, CVT_Done }, |
1515 | | // Convert__RegF8RC1_0__RegF8RC1_1__RegF8RC1_2__U2Imm1_3 |
1516 | | { CVT_95_addRegF8RCOperands, 1, CVT_95_addRegF8RCOperands, 2, CVT_95_addRegF8RCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
1517 | | // Convert__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3__U2Imm1_4 |
1518 | | { CVT_95_addRegF8RCOperands, 2, CVT_95_addRegF8RCOperands, 3, CVT_95_addRegF8RCOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
1519 | | // Convert__RegF8RC1_1__S5Imm1_0__RegF8RC1_2__U2Imm1_3 |
1520 | | { CVT_95_addRegF8RCOperands, 2, CVT_95_addImmOperands, 1, CVT_95_addRegF8RCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
1521 | | // Convert__RegF8RC1_2__S5Imm1_1__RegF8RC1_3__U2Imm1_4 |
1522 | | { CVT_95_addRegF8RCOperands, 3, CVT_95_addImmOperands, 2, CVT_95_addRegF8RCOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
1523 | | // Convert__RegFpRC1_1__S5Imm1_0__RegFpRC1_2__U2Imm1_3 |
1524 | | { CVT_95_addRegFpRCOperands, 2, CVT_95_addImmOperands, 1, CVT_95_addRegFpRCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
1525 | | // Convert__RegFpRC1_2__S5Imm1_1__RegFpRC1_3__U2Imm1_4 |
1526 | | { CVT_95_addRegFpRCOperands, 3, CVT_95_addImmOperands, 2, CVT_95_addRegFpRCOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
1527 | | // Convert__RegFpRC1_0__RegFpRC1_1__RegFpRC1_2__U2Imm1_3 |
1528 | | { CVT_95_addRegFpRCOperands, 1, CVT_95_addRegFpRCOperands, 2, CVT_95_addRegFpRCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
1529 | | // Convert__RegFpRC1_1__RegFpRC1_2__RegFpRC1_3__U2Imm1_4 |
1530 | | { CVT_95_addRegFpRCOperands, 2, CVT_95_addRegFpRCOperands, 3, CVT_95_addRegFpRCOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
1531 | | // Convert__RegFpRC1_0__RegFpRC1_1 |
1532 | | { CVT_95_addRegFpRCOperands, 1, CVT_95_addRegFpRCOperands, 2, CVT_Done }, |
1533 | | // Convert__RegFpRC1_1__RegFpRC1_2 |
1534 | | { CVT_95_addRegFpRCOperands, 2, CVT_95_addRegFpRCOperands, 3, CVT_Done }, |
1535 | | // Convert__RegF8RC1_1__U1Imm1_0__RegF8RC1_2__U2Imm1_3 |
1536 | | { CVT_95_addRegF8RCOperands, 2, CVT_95_addImmOperands, 1, CVT_95_addRegF8RCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
1537 | | // Convert__RegF8RC1_2__U1Imm1_1__RegF8RC1_3__U2Imm1_4 |
1538 | | { CVT_95_addRegF8RCOperands, 3, CVT_95_addImmOperands, 2, CVT_95_addRegF8RCOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
1539 | | // Convert__RegFpRC1_1__U1Imm1_0__RegFpRC1_2__U2Imm1_3 |
1540 | | { CVT_95_addRegFpRCOperands, 2, CVT_95_addImmOperands, 1, CVT_95_addRegFpRCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
1541 | | // Convert__RegFpRC1_2__U1Imm1_1__RegFpRC1_3__U2Imm1_4 |
1542 | | { CVT_95_addRegFpRCOperands, 3, CVT_95_addImmOperands, 2, CVT_95_addRegFpRCOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
1543 | | // Convert__RegFpRC1_0__RegF8RC1_1__RegFpRC1_2__U2Imm1_3 |
1544 | | { CVT_95_addRegFpRCOperands, 1, CVT_95_addRegF8RCOperands, 2, CVT_95_addRegFpRCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
1545 | | // Convert__RegFpRC1_1__RegF8RC1_2__RegFpRC1_3__U2Imm1_4 |
1546 | | { CVT_95_addRegFpRCOperands, 2, CVT_95_addRegF8RCOperands, 3, CVT_95_addRegFpRCOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
1547 | | // Convert__RegF8RC1_0__RegF8RC1_1__U6Imm1_2 |
1548 | | { CVT_95_addRegF8RCOperands, 1, CVT_95_addRegF8RCOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
1549 | | // Convert__RegF8RC1_1__RegF8RC1_2__U6Imm1_3 |
1550 | | { CVT_95_addRegF8RCOperands, 2, CVT_95_addRegF8RCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
1551 | | // Convert__RegFpRC1_0__RegFpRC1_1__U6Imm1_2 |
1552 | | { CVT_95_addRegFpRCOperands, 1, CVT_95_addRegFpRCOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
1553 | | // Convert__RegFpRC1_1__RegFpRC1_2__U6Imm1_3 |
1554 | | { CVT_95_addRegFpRCOperands, 2, CVT_95_addRegFpRCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
1555 | | // Convert__U5Imm1_0 |
1556 | | { CVT_95_addImmOperands, 1, CVT_Done }, |
1557 | | // Convert__U5Imm1_2__RegGPRC1_0__RegGPRC1_1 |
1558 | | { CVT_95_addImmOperands, 3, CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
1559 | | // Convert__RegCRRC1_0__RegF8RC1_1__U6Imm1_2 |
1560 | | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegF8RCOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
1561 | | // Convert__RegCRRC1_0__RegFpRC1_1__U6Imm1_2 |
1562 | | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegFpRCOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
1563 | | // Convert__RegCRRC1_0__U6Imm1_1__RegF8RC1_2 |
1564 | | { CVT_95_addRegCRRCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegF8RCOperands, 3, CVT_Done }, |
1565 | | // Convert__RegCRRC1_0__U6Imm1_1__RegFpRC1_2 |
1566 | | { CVT_95_addRegCRRCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegFpRCOperands, 3, CVT_Done }, |
1567 | | // Convert__RegCRRC1_0__RegF8RC1_1__RegFpRC1_2 |
1568 | | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegF8RCOperands, 2, CVT_95_addRegFpRCOperands, 3, CVT_Done }, |
1569 | | // Convert__RegSPERC1_0__RegSPERC1_1 |
1570 | | { CVT_95_addRegSPERCOperands, 1, CVT_95_addRegSPERCOperands, 2, CVT_Done }, |
1571 | | // Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2 |
1572 | | { CVT_95_addRegSPERCOperands, 1, CVT_95_addRegSPERCOperands, 2, CVT_95_addRegSPERCOperands, 3, CVT_Done }, |
1573 | | // Convert__RegSPERC1_0__RegSPE4RC1_1 |
1574 | | { CVT_95_addRegSPERCOperands, 1, CVT_95_addRegSPE4RCOperands, 2, CVT_Done }, |
1575 | | // Convert__RegSPERC1_0__RegGPRC1_1 |
1576 | | { CVT_95_addRegSPERCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
1577 | | // Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2 |
1578 | | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegSPERCOperands, 2, CVT_95_addRegSPERCOperands, 3, CVT_Done }, |
1579 | | // Convert__RegGPRC1_0__RegSPERC1_1 |
1580 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegSPERCOperands, 2, CVT_Done }, |
1581 | | // Convert__RegSPE4RC1_0__RegSPE4RC1_1 |
1582 | | { CVT_95_addRegSPE4RCOperands, 1, CVT_95_addRegSPE4RCOperands, 2, CVT_Done }, |
1583 | | // Convert__RegSPE4RC1_0__RegSPE4RC1_1__RegSPE4RC1_2 |
1584 | | { CVT_95_addRegSPE4RCOperands, 1, CVT_95_addRegSPE4RCOperands, 2, CVT_95_addRegSPE4RCOperands, 3, CVT_Done }, |
1585 | | // Convert__RegSPE4RC1_0__RegSPERC1_1 |
1586 | | { CVT_95_addRegSPE4RCOperands, 1, CVT_95_addRegSPERCOperands, 2, CVT_Done }, |
1587 | | // Convert__RegSPE4RC1_0__RegGPRC1_1 |
1588 | | { CVT_95_addRegSPE4RCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
1589 | | // Convert__RegCRRC1_0__RegSPE4RC1_1__RegSPE4RC1_2 |
1590 | | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegSPE4RCOperands, 2, CVT_95_addRegSPE4RCOperands, 3, CVT_Done }, |
1591 | | // Convert__RegGPRC1_0__RegSPE4RC1_1 |
1592 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegSPE4RCOperands, 2, CVT_Done }, |
1593 | | // Convert__RegSPERC1_0__RegSPERC1_2__U5Imm1_1 |
1594 | | { CVT_95_addRegSPERCOperands, 1, CVT_95_addRegSPERCOperands, 3, CVT_95_addImmOperands, 2, CVT_Done }, |
1595 | | // Convert__RegSPERC1_0__DispSPE81_1__RegGxRCNoR01_2 |
1596 | | { CVT_95_addRegSPERCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
1597 | | // Convert__RegSPERC1_0__RegGxRCNoR01_1__RegGxRC1_2 |
1598 | | { CVT_95_addRegSPERCOperands, 1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_Done }, |
1599 | | // Convert__RegSPERC1_0__DispSPE21_1__RegGxRCNoR01_2 |
1600 | | { CVT_95_addRegSPERCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
1601 | | // Convert__RegSPERC1_0__DispSPE41_1__RegGxRCNoR01_2 |
1602 | | { CVT_95_addRegSPERCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
1603 | | // Convert__RegSPERC1_0__RegGPRC1_1__RegGPRC1_2 |
1604 | | { CVT_95_addRegSPERCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_Done }, |
1605 | | // Convert__RegSPERC1_0__RegSPERC1_1__U5Imm1_2 |
1606 | | { CVT_95_addRegSPERCOperands, 1, CVT_95_addRegSPERCOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
1607 | | // Convert__RegSPERC1_1__RegSPERC1_2__RegSPERC1_3__imm_95_0 |
1608 | | { CVT_95_addRegSPERCOperands, 2, CVT_95_addRegSPERCOperands, 3, CVT_95_addRegSPERCOperands, 4, CVT_imm_95_0, 0, CVT_Done }, |
1609 | | // Convert__RegSPERC1_0__S5Imm1_1 |
1610 | | { CVT_95_addRegSPERCOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
1611 | | // Convert__RegSPERC1_0__U5Imm1_1__RegSPERC1_2 |
1612 | | { CVT_95_addRegSPERCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegSPERCOperands, 3, CVT_Done }, |
1613 | | // Convert__RegF4RC1_0__RegF4RC1_1 |
1614 | | { CVT_95_addRegF4RCOperands, 1, CVT_95_addRegF4RCOperands, 2, CVT_Done }, |
1615 | | // Convert__RegF4RC1_1__RegF4RC1_2 |
1616 | | { CVT_95_addRegF4RCOperands, 2, CVT_95_addRegF4RCOperands, 3, CVT_Done }, |
1617 | | // Convert__RegF4RC1_0__RegF4RC1_1__RegF4RC1_2 |
1618 | | { CVT_95_addRegF4RCOperands, 1, CVT_95_addRegF4RCOperands, 2, CVT_95_addRegF4RCOperands, 3, CVT_Done }, |
1619 | | // Convert__RegF4RC1_1__RegF4RC1_2__RegF4RC1_3 |
1620 | | { CVT_95_addRegF4RCOperands, 2, CVT_95_addRegF4RCOperands, 3, CVT_95_addRegF4RCOperands, 4, CVT_Done }, |
1621 | | // Convert__RegF4RC1_0__RegF8RC1_1 |
1622 | | { CVT_95_addRegF4RCOperands, 1, CVT_95_addRegF8RCOperands, 2, CVT_Done }, |
1623 | | // Convert__RegF4RC1_1__RegF8RC1_2 |
1624 | | { CVT_95_addRegF4RCOperands, 2, CVT_95_addRegF8RCOperands, 3, CVT_Done }, |
1625 | | // Convert__RegCRRC1_0__RegF4RC1_1__RegF4RC1_2 |
1626 | | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegF4RCOperands, 2, CVT_95_addRegF4RCOperands, 3, CVT_Done }, |
1627 | | // Convert__RegF8RC1_0__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3 |
1628 | | { CVT_95_addRegF8RCOperands, 1, CVT_95_addRegF8RCOperands, 2, CVT_95_addRegF8RCOperands, 3, CVT_95_addRegF8RCOperands, 4, CVT_Done }, |
1629 | | // Convert__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3__RegF8RC1_4 |
1630 | | { CVT_95_addRegF8RCOperands, 2, CVT_95_addRegF8RCOperands, 3, CVT_95_addRegF8RCOperands, 4, CVT_95_addRegF8RCOperands, 5, CVT_Done }, |
1631 | | // Convert__RegF4RC1_0__RegF4RC1_1__RegF4RC1_2__RegF4RC1_3 |
1632 | | { CVT_95_addRegF4RCOperands, 1, CVT_95_addRegF4RCOperands, 2, CVT_95_addRegF4RCOperands, 3, CVT_95_addRegF4RCOperands, 4, CVT_Done }, |
1633 | | // Convert__RegF4RC1_1__RegF4RC1_2__RegF4RC1_3__RegF4RC1_4 |
1634 | | { CVT_95_addRegF4RCOperands, 2, CVT_95_addRegF4RCOperands, 3, CVT_95_addRegF4RCOperands, 4, CVT_95_addRegF4RCOperands, 5, CVT_Done }, |
1635 | | // Convert__RegF4RC1_0__RegF8RC1_1__RegF4RC1_2__RegF4RC1_3 |
1636 | | { CVT_95_addRegF4RCOperands, 1, CVT_95_addRegF8RCOperands, 2, CVT_95_addRegF4RCOperands, 3, CVT_95_addRegF4RCOperands, 4, CVT_Done }, |
1637 | | // Convert__RegF4RC1_1__RegF8RC1_2__RegF4RC1_3__RegF4RC1_4 |
1638 | | { CVT_95_addRegF4RCOperands, 2, CVT_95_addRegF8RCOperands, 3, CVT_95_addRegF4RCOperands, 4, CVT_95_addRegF4RCOperands, 5, CVT_Done }, |
1639 | | // Convert__RegCRRC1_0__RegF8RC1_1 |
1640 | | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegF8RCOperands, 2, CVT_Done }, |
1641 | | // Convert__RegGPRC1_0__DispRIHash1_1__RegGxRCNoR01_2 |
1642 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
1643 | | // Convert__imm_95_0__imm_95_0 |
1644 | | { CVT_imm_95_0, 0, CVT_imm_95_0, 0, CVT_Done }, |
1645 | | // Convert__imm_95_0 |
1646 | | { CVT_imm_95_0, 0, CVT_Done }, |
1647 | | // Convert__U4Imm1_0__RegGxRCNoR01_1__RegGxRC1_2 |
1648 | | { CVT_95_addImmOperands, 1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_Done }, |
1649 | | // Convert__U4Imm1_1__RegGxRCNoR01_2__RegGxRC1_3 |
1650 | | { CVT_95_addImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_95_addRegGxRCOperands, 4, CVT_Done }, |
1651 | | // Convert__RegGPRC1_0__RegGPRCNoR01_1__RegGPRC1_2__RegCRBITRC1_3 |
1652 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCNoR0Operands, 2, CVT_95_addRegGPRCOperands, 3, CVT_95_addRegCRBITRCOperands, 4, CVT_Done }, |
1653 | | // Convert__RegG8RC1_0__RegG8RCNoX01_1__RegG8RC1_2__regCR0EQ |
1654 | | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCNoX0Operands, 2, CVT_95_addRegG8RCOperands, 3, CVT_regCR0EQ, 0, CVT_Done }, |
1655 | | // Convert__RegGPRC1_0__RegGPRCNoR01_1__RegGPRC1_2__regCR0EQ |
1656 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCNoR0Operands, 2, CVT_95_addRegGPRCOperands, 3, CVT_regCR0EQ, 0, CVT_Done }, |
1657 | | // Convert__RegG8RC1_0__RegG8RCNoX01_1__RegG8RC1_2__regCR0GT |
1658 | | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCNoX0Operands, 2, CVT_95_addRegG8RCOperands, 3, CVT_regCR0GT, 0, CVT_Done }, |
1659 | | // Convert__RegGPRC1_0__RegGPRCNoR01_1__RegGPRC1_2__regCR0GT |
1660 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCNoR0Operands, 2, CVT_95_addRegGPRCOperands, 3, CVT_regCR0GT, 0, CVT_Done }, |
1661 | | // Convert__RegG8RC1_0__RegG8RCNoX01_1__RegG8RC1_2__regCR0LT |
1662 | | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCNoX0Operands, 2, CVT_95_addRegG8RCOperands, 3, CVT_regCR0LT, 0, CVT_Done }, |
1663 | | // Convert__RegGPRC1_0__RegGPRCNoR01_1__RegGPRC1_2__regCR0LT |
1664 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCNoR0Operands, 2, CVT_95_addRegGPRCOperands, 3, CVT_regCR0LT, 0, CVT_Done }, |
1665 | | // Convert__RegGPRC1_0__DispRI1_1__RegGxRCNoR01_2 |
1666 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
1667 | | // Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2 |
1668 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_Done }, |
1669 | | // Convert__RegGPRC1_0__imm_95_0__DispRI1_1__RegGxRCNoR01_2 |
1670 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_0, 0, CVT_95_addS16ImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
1671 | | // Convert__RegGPRC1_0__imm_95_0__RegGxRCNoR01_1__RegGxRC1_2 |
1672 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_0, 0, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_Done }, |
1673 | | // Convert__RegG8RC1_0__RegGxRCNoR01_1__TLSReg1_2 |
1674 | | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addTLSRegOperands, 3, CVT_Done }, |
1675 | | // Convert__RegG8RC1_0__DispRIX1_1__RegGxRCNoR01_2 |
1676 | | { CVT_95_addRegG8RCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
1677 | | // Convert__RegG8RC1_0__RegGxRCNoR01_1__RegGxRC1_2 |
1678 | | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_Done }, |
1679 | | // Convert__RegG8RC1_0__RegG8RC1_1__U5Imm1_2 |
1680 | | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
1681 | | // Convert__RegG8RC1_0__imm_95_0__DispRIX1_1__RegGxRCNoR01_2 |
1682 | | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_0, 0, CVT_95_addS16ImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
1683 | | // Convert__RegG8RC1_0__imm_95_0__RegGxRCNoR01_1__RegGxRC1_2 |
1684 | | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_0, 0, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_Done }, |
1685 | | // Convert__RegF8RC1_0__DispRI1_1__RegGxRCNoR01_2 |
1686 | | { CVT_95_addRegF8RCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
1687 | | // Convert__RegF8RC1_0__RegGxRCNoR01_1__RegGxRC1_2 |
1688 | | { CVT_95_addRegF8RCOperands, 1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_Done }, |
1689 | | // Convert__RegF8RC1_0__imm_95_0__DispRI1_1__RegGxRCNoR01_2 |
1690 | | { CVT_95_addRegF8RCOperands, 1, CVT_imm_95_0, 0, CVT_95_addS16ImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
1691 | | // Convert__RegF8RC1_0__imm_95_0__RegGxRCNoR01_1__RegGxRC1_2 |
1692 | | { CVT_95_addRegF8RCOperands, 1, CVT_imm_95_0, 0, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_Done }, |
1693 | | // Convert__RegF8RC1_0__RegGxRCNoR01_1__TLSReg1_2 |
1694 | | { CVT_95_addRegF8RCOperands, 1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addTLSRegOperands, 3, CVT_Done }, |
1695 | | // Convert__RegF4RC1_0__DispRI1_1__RegGxRCNoR01_2 |
1696 | | { CVT_95_addRegF4RCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
1697 | | // Convert__RegF4RC1_0__imm_95_0__DispRI1_1__RegGxRCNoR01_2 |
1698 | | { CVT_95_addRegF4RCOperands, 1, CVT_imm_95_0, 0, CVT_95_addS16ImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
1699 | | // Convert__RegF4RC1_0__imm_95_0__RegGxRCNoR01_1__RegGxRC1_2 |
1700 | | { CVT_95_addRegF4RCOperands, 1, CVT_imm_95_0, 0, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_Done }, |
1701 | | // Convert__RegF4RC1_0__RegGxRCNoR01_1__RegGxRC1_2 |
1702 | | { CVT_95_addRegF4RCOperands, 1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_Done }, |
1703 | | // Convert__RegF4RC1_0__RegGxRCNoR01_1__TLSReg1_2 |
1704 | | { CVT_95_addRegF4RCOperands, 1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addTLSRegOperands, 3, CVT_Done }, |
1705 | | // Convert__RegG8RC1_0__regZERO8__S16Imm1_1 |
1706 | | { CVT_95_addRegG8RCOperands, 1, CVT_regZERO8, 0, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
1707 | | // Convert__RegGPRC1_0__S16Imm1_1 |
1708 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
1709 | | // Convert__RegGPRC1_0__regZERO__S16Imm1_1 |
1710 | | { CVT_95_addRegGPRCOperands, 1, CVT_regZERO, 0, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
1711 | | // Convert__RegG8RC1_0__regZERO8__S17Imm1_1 |
1712 | | { CVT_95_addRegG8RCOperands, 1, CVT_regZERO8, 0, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
1713 | | // Convert__RegGPRC1_0__S17Imm1_1 |
1714 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
1715 | | // Convert__RegGPRC1_0__regZERO__S17Imm1_1 |
1716 | | { CVT_95_addRegGPRCOperands, 1, CVT_regZERO, 0, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
1717 | | // Convert__RegG8RC1_0__imm_95_0 |
1718 | | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_0, 0, CVT_Done }, |
1719 | | // Convert__RegG8pRC1_0__DispRIX161_1__RegGxRCNoR01_2 |
1720 | | { CVT_95_addRegG8pRCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
1721 | | // Convert__RegG8pRC1_0__RegGxRCNoR01_1__RegGxRC1_2 |
1722 | | { CVT_95_addRegG8pRCOperands, 1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_Done }, |
1723 | | // Convert__RegVRRC1_0__RegGxRCNoR01_1__RegGxRC1_2 |
1724 | | { CVT_95_addRegVRRCOperands, 1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_Done }, |
1725 | | // Convert__imm_95_1 |
1726 | | { CVT_imm_95_1, 0, CVT_Done }, |
1727 | | // Convert__RegSPE4RC1_0__DispRI1_1__RegGxRCNoR01_2 |
1728 | | { CVT_95_addRegSPE4RCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
1729 | | // Convert__RegSPE4RC1_0__RegGxRCNoR01_1__RegGxRC1_2 |
1730 | | { CVT_95_addRegSPE4RCOperands, 1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_Done }, |
1731 | | // Convert__RegVFRC1_0__DispRIX1_1__RegGxRCNoR01_2 |
1732 | | { CVT_95_addRegVFRCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
1733 | | // Convert__RegVSFRC1_0__RegGxRCNoR01_1__RegGxRC1_2 |
1734 | | { CVT_95_addRegVSFRCOperands, 1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_Done }, |
1735 | | // Convert__RegVSSRC1_0__RegGxRCNoR01_1__RegGxRC1_2 |
1736 | | { CVT_95_addRegVSSRCOperands, 1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_Done }, |
1737 | | // Convert__RegVSRC1_0__DispRIX161_1__RegGxRCNoR01_2 |
1738 | | { CVT_95_addRegVSRCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
1739 | | // Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2 |
1740 | | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_Done }, |
1741 | | // Convert__RegVSRC1_0__U5Imm1_1 |
1742 | | { CVT_95_addRegVSRCOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
1743 | | // Convert__RegVSRC1_0__Imm1_1__RegG8RC1_2 |
1744 | | { CVT_95_addRegVSRCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_Done }, |
1745 | | // Convert__RegVSRpRC1_0__DispRIX161_1__RegGxRCNoR01_2 |
1746 | | { CVT_95_addRegVSRpRCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
1747 | | // Convert__RegVSRpRC1_0__Imm1_1__RegG8RC1_2 |
1748 | | { CVT_95_addRegVSRpRCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_Done }, |
1749 | | // Convert__RegVSRpRC1_0__RegGxRCNoR01_1__RegGxRC1_2 |
1750 | | { CVT_95_addRegVSRpRCOperands, 1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_Done }, |
1751 | | // Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2__RegG8RC1_3 |
1752 | | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_95_addRegG8RCOperands, 4, CVT_Done }, |
1753 | | // Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3 |
1754 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_95_addRegGPRCOperands, 4, CVT_Done }, |
1755 | | // Convert__RegCRRC1_0__RegCRRC1_1 |
1756 | | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegCRRCOperands, 2, CVT_Done }, |
1757 | | // Convert__RegCRRC1_0 |
1758 | | { CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
1759 | | // Convert__RegG8RC1_0__imm_95_29 |
1760 | | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_29, 0, CVT_Done }, |
1761 | | // Convert__RegGPRC1_0__imm_95_29 |
1762 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_29, 0, CVT_Done }, |
1763 | | // Convert__RegG8RC1_0__imm_95_280 |
1764 | | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_280, 0, CVT_Done }, |
1765 | | // Convert__RegGPRC1_0__imm_95_280 |
1766 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_280, 0, CVT_Done }, |
1767 | | // Convert__RegGPRC1_0__U10Imm1_1__imm_95_0 |
1768 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addImmOperands, 2, CVT_imm_95_0, 0, CVT_Done }, |
1769 | | // Convert__RegGPRC1_0__imm_95_128 |
1770 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_128, 0, CVT_Done }, |
1771 | | // Convert__RegGPRC1_0__imm_95_129 |
1772 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_129, 0, CVT_Done }, |
1773 | | // Convert__RegGPRC1_0__imm_95_130 |
1774 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_130, 0, CVT_Done }, |
1775 | | // Convert__RegGPRC1_0__imm_95_131 |
1776 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_131, 0, CVT_Done }, |
1777 | | // Convert__RegGPRC1_0__imm_95_132 |
1778 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_132, 0, CVT_Done }, |
1779 | | // Convert__RegGPRC1_0__imm_95_133 |
1780 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_133, 0, CVT_Done }, |
1781 | | // Convert__RegGPRC1_0__imm_95_134 |
1782 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_134, 0, CVT_Done }, |
1783 | | // Convert__RegGPRC1_0__imm_95_135 |
1784 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_135, 0, CVT_Done }, |
1785 | | // Convert__RegG8RC1_0__imm_95_28 |
1786 | | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_28, 0, CVT_Done }, |
1787 | | // Convert__RegGPRC1_0__imm_95_28 |
1788 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_28, 0, CVT_Done }, |
1789 | | // Convert__RegGPRC1_0 |
1790 | | { CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
1791 | | // Convert__RegG8RC1_0__imm_95_9 |
1792 | | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_9, 0, CVT_Done }, |
1793 | | // Convert__RegGPRC1_0__imm_95_9 |
1794 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_9, 0, CVT_Done }, |
1795 | | // Convert__RegG8RC1_0__imm_95_19 |
1796 | | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_19, 0, CVT_Done }, |
1797 | | // Convert__RegGPRC1_0__imm_95_19 |
1798 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_19, 0, CVT_Done }, |
1799 | | // Convert__RegGPRC1_0__imm_95_537 |
1800 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_537, 0, CVT_Done }, |
1801 | | // Convert__RegGPRC1_0__imm_95_539 |
1802 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_539, 0, CVT_Done }, |
1803 | | // Convert__RegGPRC1_0__imm_95_541 |
1804 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_541, 0, CVT_Done }, |
1805 | | // Convert__RegGPRC1_0__imm_95_543 |
1806 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_543, 0, CVT_Done }, |
1807 | | // Convert__RegGPRC1_0__imm_95_536 |
1808 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_536, 0, CVT_Done }, |
1809 | | // Convert__RegGPRC1_0__imm_95_538 |
1810 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_538, 0, CVT_Done }, |
1811 | | // Convert__RegGPRC1_0__imm_95_540 |
1812 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_540, 0, CVT_Done }, |
1813 | | // Convert__RegGPRC1_0__imm_95_542 |
1814 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_542, 0, CVT_Done }, |
1815 | | // Convert__RegGPRC1_0__imm_95_1018 |
1816 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_1018, 0, CVT_Done }, |
1817 | | // Convert__RegGPRC1_0__Imm1_1 |
1818 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
1819 | | // Convert__RegGPRC1_0__imm_95_981 |
1820 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_981, 0, CVT_Done }, |
1821 | | // Convert__RegG8RC1_0__imm_95_22 |
1822 | | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_22, 0, CVT_Done }, |
1823 | | // Convert__RegGPRC1_0__imm_95_22 |
1824 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_22, 0, CVT_Done }, |
1825 | | // Convert__RegG8RC1_0__imm_95_17 |
1826 | | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_17, 0, CVT_Done }, |
1827 | | // Convert__RegGPRC1_0__imm_95_17 |
1828 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_17, 0, CVT_Done }, |
1829 | | // Convert__RegG8RC1_0__imm_95_18 |
1830 | | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_18, 0, CVT_Done }, |
1831 | | // Convert__RegGPRC1_0__imm_95_18 |
1832 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_18, 0, CVT_Done }, |
1833 | | // Convert__RegGPRC1_0__imm_95_980 |
1834 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_980, 0, CVT_Done }, |
1835 | | // Convert__RegG8RC1_0__RegF8RC1_1 |
1836 | | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegF8RCOperands, 2, CVT_Done }, |
1837 | | // Convert__RegGPRC1_0__RegF8RC1_1 |
1838 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegF8RCOperands, 2, CVT_Done }, |
1839 | | // Convert__RegF8RC1_0 |
1840 | | { CVT_95_addRegF8RCOperands, 1, CVT_Done }, |
1841 | | // Convert__RegF8RC1_1 |
1842 | | { CVT_95_addRegF8RCOperands, 2, CVT_Done }, |
1843 | | // Convert__RegF8RC1_0__U3Imm1_1 |
1844 | | { CVT_95_addRegF8RCOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
1845 | | // Convert__RegF8RC1_0__U2Imm1_1 |
1846 | | { CVT_95_addRegF8RCOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
1847 | | // Convert__RegGPRC1_0__imm_95_529 |
1848 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_529, 0, CVT_Done }, |
1849 | | // Convert__RegGPRC1_0__imm_95_531 |
1850 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_531, 0, CVT_Done }, |
1851 | | // Convert__RegGPRC1_0__imm_95_533 |
1852 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_533, 0, CVT_Done }, |
1853 | | // Convert__RegGPRC1_0__imm_95_535 |
1854 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_535, 0, CVT_Done }, |
1855 | | // Convert__RegGPRC1_0__imm_95_528 |
1856 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_528, 0, CVT_Done }, |
1857 | | // Convert__RegGPRC1_0__imm_95_530 |
1858 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_530, 0, CVT_Done }, |
1859 | | // Convert__RegGPRC1_0__imm_95_532 |
1860 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_532, 0, CVT_Done }, |
1861 | | // Convert__RegGPRC1_0__imm_95_534 |
1862 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_534, 0, CVT_Done }, |
1863 | | // Convert__RegGPRC1_0__imm_95_1019 |
1864 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_1019, 0, CVT_Done }, |
1865 | | // Convert__RegG8RC1_0__imm_95_8 |
1866 | | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_8, 0, CVT_Done }, |
1867 | | // Convert__RegGPRC1_0__imm_95_8 |
1868 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_8, 0, CVT_Done }, |
1869 | | // Convert__RegGPRC1_0__CRBitMask1_1 |
1870 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addCRBitMaskOperands, 2, CVT_Done }, |
1871 | | // Convert__RegGPRC1_0__imm_95_48 |
1872 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_48, 0, CVT_Done }, |
1873 | | // Convert__RegGPRC1_0__imm_95_896 |
1874 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_896, 0, CVT_Done }, |
1875 | | // Convert__RegG8RC1_0__imm_95_287 |
1876 | | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_287, 0, CVT_Done }, |
1877 | | // Convert__RegGPRC1_0__imm_95_287 |
1878 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_287, 0, CVT_Done }, |
1879 | | // Convert__RegG8RC1_0__imm_95_5 |
1880 | | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_5, 0, CVT_Done }, |
1881 | | // Convert__RegGPRC1_0__imm_95_5 |
1882 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_5, 0, CVT_Done }, |
1883 | | // Convert__RegG8RC1_0__imm_95_4 |
1884 | | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_4, 0, CVT_Done }, |
1885 | | // Convert__RegGPRC1_0__imm_95_4 |
1886 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_4, 0, CVT_Done }, |
1887 | | // Convert__RegG8RC1_0__imm_95_25 |
1888 | | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_25, 0, CVT_Done }, |
1889 | | // Convert__RegGPRC1_0__imm_95_25 |
1890 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_25, 0, CVT_Done }, |
1891 | | // Convert__RegG8RC1_0__imm_95_512 |
1892 | | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_512, 0, CVT_Done }, |
1893 | | // Convert__RegGPRC1_0__imm_95_512 |
1894 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_512, 0, CVT_Done }, |
1895 | | // Convert__RegG8RC1_0__imm_95_272 |
1896 | | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_272, 0, CVT_Done }, |
1897 | | // Convert__RegG8RC1_0__imm_95_273 |
1898 | | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_273, 0, CVT_Done }, |
1899 | | // Convert__RegG8RC1_0__imm_95_274 |
1900 | | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_274, 0, CVT_Done }, |
1901 | | // Convert__RegG8RC1_0__imm_95_275 |
1902 | | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_275, 0, CVT_Done }, |
1903 | | // Convert__RegGPRC1_0__imm_95_272 |
1904 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_272, 0, CVT_Done }, |
1905 | | // Convert__RegGPRC1_0__imm_95_273 |
1906 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_273, 0, CVT_Done }, |
1907 | | // Convert__RegGPRC1_0__imm_95_274 |
1908 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_274, 0, CVT_Done }, |
1909 | | // Convert__RegGPRC1_0__imm_95_275 |
1910 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_275, 0, CVT_Done }, |
1911 | | // Convert__RegGPRC1_0__imm_95_260 |
1912 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_260, 0, CVT_Done }, |
1913 | | // Convert__RegGPRC1_0__imm_95_261 |
1914 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_261, 0, CVT_Done }, |
1915 | | // Convert__RegGPRC1_0__imm_95_262 |
1916 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_262, 0, CVT_Done }, |
1917 | | // Convert__RegGPRC1_0__imm_95_263 |
1918 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_263, 0, CVT_Done }, |
1919 | | // Convert__RegGPRC1_0__U4Imm1_1 |
1920 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
1921 | | // Convert__RegG8RC1_0__imm_95_26 |
1922 | | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_26, 0, CVT_Done }, |
1923 | | // Convert__RegGPRC1_0__imm_95_26 |
1924 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_26, 0, CVT_Done }, |
1925 | | // Convert__RegG8RC1_0__imm_95_27 |
1926 | | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_27, 0, CVT_Done }, |
1927 | | // Convert__RegGPRC1_0__imm_95_27 |
1928 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_27, 0, CVT_Done }, |
1929 | | // Convert__RegGPRC1_0__imm_95_990 |
1930 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_990, 0, CVT_Done }, |
1931 | | // Convert__RegGPRC1_0__imm_95_991 |
1932 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_991, 0, CVT_Done }, |
1933 | | // Convert__RegGPRC1_0__imm_95_268 |
1934 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_268, 0, CVT_Done }, |
1935 | | // Convert__RegGPRC1_0__imm_95_988 |
1936 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_988, 0, CVT_Done }, |
1937 | | // Convert__RegGPRC1_0__imm_95_989 |
1938 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_989, 0, CVT_Done }, |
1939 | | // Convert__RegGPRC1_0__imm_95_269 |
1940 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_269, 0, CVT_Done }, |
1941 | | // Convert__RegGPRC1_0__imm_95_986 |
1942 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_986, 0, CVT_Done }, |
1943 | | // Convert__RegG8RC1_0__imm_95_13 |
1944 | | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_13, 0, CVT_Done }, |
1945 | | // Convert__RegGPRC1_0__imm_95_13 |
1946 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_13, 0, CVT_Done }, |
1947 | | // Convert__RegG8RC1_0__imm_95_3 |
1948 | | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_3, 0, CVT_Done }, |
1949 | | // Convert__RegGPRC1_0__imm_95_3 |
1950 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_3, 0, CVT_Done }, |
1951 | | // Convert__RegG8RC1_0__RegVRRC1_1 |
1952 | | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegVRRCOperands, 2, CVT_Done }, |
1953 | | // Convert__RegGPRC1_0__RegVRRC1_1 |
1954 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegVRRCOperands, 2, CVT_Done }, |
1955 | | // Convert__RegVRRC1_0 |
1956 | | { CVT_95_addRegVRRCOperands, 1, CVT_Done }, |
1957 | | // Convert__RegG8RC1_0__RegVSFRC1_1 |
1958 | | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegVSFRCOperands, 2, CVT_Done }, |
1959 | | // Convert__RegG8RC1_0__RegVSRC1_1 |
1960 | | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_Done }, |
1961 | | // Convert__RegGPRC1_0__RegVSFRC1_1 |
1962 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegVSFRCOperands, 2, CVT_Done }, |
1963 | | // Convert__RegG8RC1_0__imm_95_1 |
1964 | | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_1, 0, CVT_Done }, |
1965 | | // Convert__RegGPRC1_0__imm_95_1 |
1966 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_1, 0, CVT_Done }, |
1967 | | // Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_1 |
1968 | | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
1969 | | // Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_1 |
1970 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
1971 | | // Convert__RegG8RC1_1__RegG8RC1_2__RegG8RC1_2 |
1972 | | { CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_95_addRegG8RCOperands, 3, CVT_Done }, |
1973 | | // Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_2 |
1974 | | { CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_95_addRegGPRCOperands, 3, CVT_Done }, |
1975 | | // Convert__imm_95_29__RegG8RC1_0 |
1976 | | { CVT_imm_95_29, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
1977 | | // Convert__imm_95_29__RegGPRC1_0 |
1978 | | { CVT_imm_95_29, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
1979 | | // Convert__imm_95_280__RegG8RC1_0 |
1980 | | { CVT_imm_95_280, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
1981 | | // Convert__imm_95_280__RegGPRC1_0 |
1982 | | { CVT_imm_95_280, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
1983 | | // Convert__imm_95_28__RegG8RC1_0 |
1984 | | { CVT_imm_95_28, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
1985 | | // Convert__imm_95_28__RegGPRC1_0 |
1986 | | { CVT_imm_95_28, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
1987 | | // Convert__imm_95_255__RegG8RC1_0 |
1988 | | { CVT_imm_95_255, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
1989 | | // Convert__imm_95_255__RegGPRC1_0 |
1990 | | { CVT_imm_95_255, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
1991 | | // Convert__Imm1_0__RegGPRC1_1 |
1992 | | { CVT_95_addImmOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
1993 | | // Convert__imm_95_9__RegG8RC1_0 |
1994 | | { CVT_imm_95_9, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
1995 | | // Convert__imm_95_9__RegGPRC1_0 |
1996 | | { CVT_imm_95_9, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
1997 | | // Convert__imm_95_19__RegG8RC1_0 |
1998 | | { CVT_imm_95_19, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
1999 | | // Convert__imm_95_19__RegGPRC1_0 |
2000 | | { CVT_imm_95_19, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
2001 | | // Convert__imm_95_537__RegGPRC1_1 |
2002 | | { CVT_imm_95_537, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2003 | | // Convert__imm_95_539__RegGPRC1_1 |
2004 | | { CVT_imm_95_539, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2005 | | // Convert__imm_95_541__RegGPRC1_1 |
2006 | | { CVT_imm_95_541, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2007 | | // Convert__imm_95_543__RegGPRC1_1 |
2008 | | { CVT_imm_95_543, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2009 | | // Convert__imm_95_536__RegGPRC1_1 |
2010 | | { CVT_imm_95_536, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2011 | | // Convert__imm_95_538__RegGPRC1_1 |
2012 | | { CVT_imm_95_538, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2013 | | // Convert__imm_95_540__RegGPRC1_1 |
2014 | | { CVT_imm_95_540, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2015 | | // Convert__imm_95_542__RegGPRC1_1 |
2016 | | { CVT_imm_95_542, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2017 | | // Convert__imm_95_1018__RegGPRC1_0 |
2018 | | { CVT_imm_95_1018, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
2019 | | // Convert__RegGPRC1_1__Imm1_0 |
2020 | | { CVT_95_addRegGPRCOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, |
2021 | | // Convert__imm_95_981__RegGPRC1_0 |
2022 | | { CVT_imm_95_981, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
2023 | | // Convert__imm_95_22__RegG8RC1_0 |
2024 | | { CVT_imm_95_22, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
2025 | | // Convert__imm_95_22__RegGPRC1_0 |
2026 | | { CVT_imm_95_22, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
2027 | | // Convert__imm_95_17__RegG8RC1_0 |
2028 | | { CVT_imm_95_17, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
2029 | | // Convert__imm_95_17__RegGPRC1_0 |
2030 | | { CVT_imm_95_17, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
2031 | | // Convert__imm_95_18__RegG8RC1_0 |
2032 | | { CVT_imm_95_18, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
2033 | | // Convert__imm_95_18__RegGPRC1_0 |
2034 | | { CVT_imm_95_18, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
2035 | | // Convert__imm_95_980__RegGPRC1_0 |
2036 | | { CVT_imm_95_980, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
2037 | | // Convert__RegF8RC1_0__RegG8RC1_1 |
2038 | | { CVT_95_addRegF8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
2039 | | // Convert__RegF8RC1_0__RegGPRC1_1 |
2040 | | { CVT_95_addRegF8RCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2041 | | // Convert__Imm1_0__RegF8RC1_1__imm_95_0__imm_95_0 |
2042 | | { CVT_95_addImmOperands, 1, CVT_95_addRegF8RCOperands, 2, CVT_imm_95_0, 0, CVT_imm_95_0, 0, CVT_Done }, |
2043 | | // Convert__Imm1_1__RegF8RC1_2__imm_95_0__imm_95_0 |
2044 | | { CVT_95_addImmOperands, 2, CVT_95_addRegF8RCOperands, 3, CVT_imm_95_0, 0, CVT_imm_95_0, 0, CVT_Done }, |
2045 | | // Convert__Imm1_0__RegF8RC1_1__U1Imm1_2__Imm1_3 |
2046 | | { CVT_95_addImmOperands, 1, CVT_95_addRegF8RCOperands, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
2047 | | // Convert__Imm1_1__RegF8RC1_2__U1Imm1_3__Imm1_4 |
2048 | | { CVT_95_addImmOperands, 2, CVT_95_addRegF8RCOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
2049 | | // Convert__U3Imm1_0__U4Imm1_1__imm_95_0 |
2050 | | { CVT_95_addImmOperands, 1, CVT_95_addImmOperands, 2, CVT_imm_95_0, 0, CVT_Done }, |
2051 | | // Convert__U3Imm1_1__U4Imm1_2__imm_95_0 |
2052 | | { CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_imm_95_0, 0, CVT_Done }, |
2053 | | // Convert__U3Imm1_0__U4Imm1_1__Imm1_2 |
2054 | | { CVT_95_addImmOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
2055 | | // Convert__U3Imm1_1__U4Imm1_2__U1Imm1_3 |
2056 | | { CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
2057 | | // Convert__imm_95_529__RegGPRC1_1 |
2058 | | { CVT_imm_95_529, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2059 | | // Convert__imm_95_531__RegGPRC1_1 |
2060 | | { CVT_imm_95_531, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2061 | | // Convert__imm_95_533__RegGPRC1_1 |
2062 | | { CVT_imm_95_533, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2063 | | // Convert__imm_95_535__RegGPRC1_1 |
2064 | | { CVT_imm_95_535, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2065 | | // Convert__imm_95_528__RegGPRC1_1 |
2066 | | { CVT_imm_95_528, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2067 | | // Convert__imm_95_530__RegGPRC1_1 |
2068 | | { CVT_imm_95_530, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2069 | | // Convert__imm_95_532__RegGPRC1_1 |
2070 | | { CVT_imm_95_532, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2071 | | // Convert__imm_95_534__RegGPRC1_1 |
2072 | | { CVT_imm_95_534, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2073 | | // Convert__imm_95_1019__RegGPRC1_0 |
2074 | | { CVT_imm_95_1019, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
2075 | | // Convert__imm_95_8__RegG8RC1_0 |
2076 | | { CVT_imm_95_8, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
2077 | | // Convert__imm_95_8__RegGPRC1_0 |
2078 | | { CVT_imm_95_8, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
2079 | | // Convert__RegGPRC1_0__imm_95_0 |
2080 | | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_0, 0, CVT_Done }, |
2081 | | // Convert__RegGPRC1_0__U1Imm1_1 |
2082 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
2083 | | // Convert__CRBitMask1_0__RegGPRC1_1 |
2084 | | { CVT_95_addCRBitMaskOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2085 | | // Convert__imm_95_48__RegGPRC1_0 |
2086 | | { CVT_imm_95_48, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
2087 | | // Convert__imm_95_896__RegGPRC1_0 |
2088 | | { CVT_imm_95_896, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
2089 | | // Convert__imm_95_25__RegG8RC1_0 |
2090 | | { CVT_imm_95_25, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
2091 | | // Convert__imm_95_25__RegGPRC1_0 |
2092 | | { CVT_imm_95_25, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
2093 | | // Convert__imm_95_512__RegG8RC1_0 |
2094 | | { CVT_imm_95_512, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
2095 | | // Convert__imm_95_512__RegGPRC1_0 |
2096 | | { CVT_imm_95_512, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
2097 | | // Convert__RegGPRC1_1 |
2098 | | { CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2099 | | // Convert__imm_95_272__RegG8RC1_1 |
2100 | | { CVT_imm_95_272, 0, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
2101 | | // Convert__imm_95_272__RegGPRC1_1 |
2102 | | { CVT_imm_95_272, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2103 | | // Convert__imm_95_273__RegG8RC1_1 |
2104 | | { CVT_imm_95_273, 0, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
2105 | | // Convert__imm_95_273__RegGPRC1_1 |
2106 | | { CVT_imm_95_273, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2107 | | // Convert__imm_95_274__RegG8RC1_1 |
2108 | | { CVT_imm_95_274, 0, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
2109 | | // Convert__imm_95_274__RegGPRC1_1 |
2110 | | { CVT_imm_95_274, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2111 | | // Convert__imm_95_275__RegG8RC1_1 |
2112 | | { CVT_imm_95_275, 0, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
2113 | | // Convert__imm_95_275__RegGPRC1_1 |
2114 | | { CVT_imm_95_275, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2115 | | // Convert__imm_95_260__RegGPRC1_1 |
2116 | | { CVT_imm_95_260, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2117 | | // Convert__imm_95_261__RegGPRC1_1 |
2118 | | { CVT_imm_95_261, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2119 | | // Convert__imm_95_262__RegGPRC1_1 |
2120 | | { CVT_imm_95_262, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2121 | | // Convert__imm_95_263__RegGPRC1_1 |
2122 | | { CVT_imm_95_263, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2123 | | // Convert__imm_95_272__RegG8RC1_0 |
2124 | | { CVT_imm_95_272, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
2125 | | // Convert__imm_95_272__RegGPRC1_0 |
2126 | | { CVT_imm_95_272, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
2127 | | // Convert__imm_95_273__RegG8RC1_0 |
2128 | | { CVT_imm_95_273, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
2129 | | // Convert__imm_95_273__RegGPRC1_0 |
2130 | | { CVT_imm_95_273, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
2131 | | // Convert__imm_95_274__RegG8RC1_0 |
2132 | | { CVT_imm_95_274, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
2133 | | // Convert__imm_95_274__RegGPRC1_0 |
2134 | | { CVT_imm_95_274, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
2135 | | // Convert__imm_95_275__RegG8RC1_0 |
2136 | | { CVT_imm_95_275, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
2137 | | // Convert__imm_95_275__RegGPRC1_0 |
2138 | | { CVT_imm_95_275, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
2139 | | // Convert__imm_95_260__RegGPRC1_0 |
2140 | | { CVT_imm_95_260, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
2141 | | // Convert__imm_95_261__RegGPRC1_0 |
2142 | | { CVT_imm_95_261, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
2143 | | // Convert__imm_95_262__RegGPRC1_0 |
2144 | | { CVT_imm_95_262, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
2145 | | // Convert__imm_95_263__RegGPRC1_0 |
2146 | | { CVT_imm_95_263, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
2147 | | // Convert__RegGPRC1_1__U4Imm1_0 |
2148 | | { CVT_95_addRegGPRCOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, |
2149 | | // Convert__imm_95_26__RegG8RC1_0 |
2150 | | { CVT_imm_95_26, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
2151 | | // Convert__imm_95_26__RegGPRC1_0 |
2152 | | { CVT_imm_95_26, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
2153 | | // Convert__imm_95_27__RegG8RC1_0 |
2154 | | { CVT_imm_95_27, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
2155 | | // Convert__imm_95_27__RegGPRC1_0 |
2156 | | { CVT_imm_95_27, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
2157 | | // Convert__imm_95_990__RegGPRC1_0 |
2158 | | { CVT_imm_95_990, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
2159 | | // Convert__imm_95_991__RegGPRC1_0 |
2160 | | { CVT_imm_95_991, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
2161 | | // Convert__imm_95_988__RegGPRC1_0 |
2162 | | { CVT_imm_95_988, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
2163 | | // Convert__imm_95_284__RegG8RC1_0 |
2164 | | { CVT_imm_95_284, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
2165 | | // Convert__imm_95_284__RegGPRC1_0 |
2166 | | { CVT_imm_95_284, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
2167 | | // Convert__imm_95_989__RegGPRC1_0 |
2168 | | { CVT_imm_95_989, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
2169 | | // Convert__imm_95_285__RegG8RC1_0 |
2170 | | { CVT_imm_95_285, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
2171 | | // Convert__imm_95_285__RegGPRC1_0 |
2172 | | { CVT_imm_95_285, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
2173 | | // Convert__imm_95_986__RegGPRC1_0 |
2174 | | { CVT_imm_95_986, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
2175 | | // Convert__imm_95_13__RegG8RC1_0 |
2176 | | { CVT_imm_95_13, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
2177 | | // Convert__imm_95_13__RegGPRC1_0 |
2178 | | { CVT_imm_95_13, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
2179 | | // Convert__imm_95_3__RegG8RC1_0 |
2180 | | { CVT_imm_95_3, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
2181 | | // Convert__imm_95_3__RegGPRC1_0 |
2182 | | { CVT_imm_95_3, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
2183 | | // Convert__RegVRRC1_0__RegG8RC1_1 |
2184 | | { CVT_95_addRegVRRCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
2185 | | // Convert__RegVRRC1_0__RegGPRC1_1 |
2186 | | { CVT_95_addRegVRRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2187 | | // Convert__RegVRRC1_0__U16Imm1_1 |
2188 | | { CVT_95_addRegVRRCOperands, 1, CVT_95_addU16ImmOperands, 2, CVT_Done }, |
2189 | | // Convert__RegVSFRC1_0__RegG8RC1_1 |
2190 | | { CVT_95_addRegVSFRCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
2191 | | // Convert__RegVSRC1_0__RegG8RCNoX01_1__RegG8RC1_2 |
2192 | | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegG8RCNoX0Operands, 2, CVT_95_addRegG8RCOperands, 3, CVT_Done }, |
2193 | | // Convert__RegVSFRC1_0__RegGPRC1_1 |
2194 | | { CVT_95_addRegVSFRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2195 | | // Convert__RegVSRC1_0__RegGPRC1_1 |
2196 | | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2197 | | // Convert__imm_95_1__RegG8RC1_0 |
2198 | | { CVT_imm_95_1, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
2199 | | // Convert__imm_95_1__RegGPRC1_0 |
2200 | | { CVT_imm_95_1, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
2201 | | // Convert__regR0__regR0__imm_95_0 |
2202 | | { CVT_regR0, 0, CVT_regR0, 0, CVT_imm_95_0, 0, CVT_Done }, |
2203 | | // Convert__regX0__regX0__imm_95_0 |
2204 | | { CVT_regX0, 0, CVT_regX0, 0, CVT_imm_95_0, 0, CVT_Done }, |
2205 | | // Convert__RegGPRC1_0__RegGPRC1_1__U16Imm1_2 |
2206 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addU16ImmOperands, 3, CVT_Done }, |
2207 | | // Convert__RegG8RC1_0__RegG8RCNoX01_1__S34Imm1_2 |
2208 | | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCNoX0Operands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
2209 | | // Convert__RegGPRC1_0__ImmZero1_1__S34Imm1_2 |
2210 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
2211 | | // Convert__RegGPRC1_0__RegGPRCNoR01_1__S34Imm1_2 |
2212 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCNoR0Operands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
2213 | | // Convert__RegGPRC1_1__RegGPRC1_2__imm_95_1 |
2214 | | { CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_imm_95_1, 0, CVT_Done }, |
2215 | | // Convert__RegGPRC1_1__RegGPRC1_2__U1Imm1_3 |
2216 | | { CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
2217 | | // Convert__imm_95_2__imm_95_0 |
2218 | | { CVT_imm_95_2, 0, CVT_imm_95_0, 0, CVT_Done }, |
2219 | | // Convert__imm_95_4__imm_95_0 |
2220 | | { CVT_imm_95_4, 0, CVT_imm_95_0, 0, CVT_Done }, |
2221 | | // Convert__RegG8RC1_0__S34Imm1_1 |
2222 | | { CVT_95_addRegG8RCOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
2223 | | // Convert__RegGPRC1_0__S34Imm1_1 |
2224 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
2225 | | // Convert__RegG8RC1_0__RegG8RCNoX01_2__S34Imm1_1 |
2226 | | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCNoX0Operands, 3, CVT_95_addImmOperands, 2, CVT_Done }, |
2227 | | // Convert__RegGPRC1_0__RegGPRCNoR01_2__S34Imm1_1 |
2228 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCNoR0Operands, 3, CVT_95_addImmOperands, 2, CVT_Done }, |
2229 | | // Convert__RegGPRC1_0__DispRI341_1__RegGxRCNoR01_2 |
2230 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
2231 | | // Convert__RegGPRC1_0__DispRI341_1__ImmZero1_2 |
2232 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
2233 | | // Convert__RegG8RC1_0__DispRI341_1__RegGxRCNoR01_2 |
2234 | | { CVT_95_addRegG8RCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
2235 | | // Convert__RegG8RC1_0__DispRI341_1__ImmZero1_2 |
2236 | | { CVT_95_addRegG8RCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
2237 | | // Convert__RegF8RC1_0__S34Imm1_1 |
2238 | | { CVT_95_addRegF8RCOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
2239 | | // Convert__RegF8RC1_0__DispRI341_1__RegGxRCNoR01_2 |
2240 | | { CVT_95_addRegF8RCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
2241 | | // Convert__RegF8RC1_0__DispRI341_1__ImmZero1_2 |
2242 | | { CVT_95_addRegF8RCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
2243 | | // Convert__RegF4RC1_0__S34Imm1_1 |
2244 | | { CVT_95_addRegF4RCOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
2245 | | // Convert__RegF4RC1_0__DispRI341_1__RegGxRCNoR01_2 |
2246 | | { CVT_95_addRegF4RCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
2247 | | // Convert__RegF4RC1_0__DispRI341_1__ImmZero1_2 |
2248 | | { CVT_95_addRegF4RCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
2249 | | // Convert__imm_95_5__imm_95_0 |
2250 | | { CVT_imm_95_5, 0, CVT_imm_95_0, 0, CVT_Done }, |
2251 | | // Convert__RegVFRC1_0__S34Imm1_1 |
2252 | | { CVT_95_addRegVFRCOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
2253 | | // Convert__RegVFRC1_0__DispRI341_1__RegGxRCNoR01_2 |
2254 | | { CVT_95_addRegVFRCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
2255 | | // Convert__RegVFRC1_0__DispRI341_1__ImmZero1_2 |
2256 | | { CVT_95_addRegVFRCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
2257 | | // Convert__RegVSRC1_0__S34Imm1_1 |
2258 | | { CVT_95_addRegVSRCOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
2259 | | // Convert__RegVSRC1_0__DispRI341_1__RegGxRCNoR01_2 |
2260 | | { CVT_95_addRegVSRCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
2261 | | // Convert__RegVSRC1_0__DispRI341_1__ImmZero1_2 |
2262 | | { CVT_95_addRegVSRCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
2263 | | // Convert__RegVSRpRC1_0__S34Imm1_1 |
2264 | | { CVT_95_addRegVSRpRCOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
2265 | | // Convert__RegVSRpRC1_0__DispRI341_1__RegGxRCNoR01_2 |
2266 | | { CVT_95_addRegVSRpRCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
2267 | | // Convert__RegVSRpRC1_0__DispRI341_1__ImmZero1_2 |
2268 | | { CVT_95_addRegVSRpRCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
2269 | | // Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U2Imm1_5 |
2270 | | { CVT_95_addRegACCRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 6, CVT_Done }, |
2271 | | // Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U2Imm1_5 |
2272 | | { CVT_95_addRegACCRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 6, CVT_Done }, |
2273 | | // Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4 |
2274 | | { CVT_95_addRegACCRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
2275 | | // Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4 |
2276 | | { CVT_95_addRegACCRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
2277 | | // Convert__RegACCRC1_0__RegVSRpEvenRC1_1__RegVSRC1_2__U4Imm1_3__U2Imm1_4 |
2278 | | { CVT_95_addRegACCRCOperands, 1, CVT_95_addRegVSRpEvenRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
2279 | | // Convert__RegACCRC1_0__Tie0_1_1__RegVSRpEvenRC1_1__RegVSRC1_2__U4Imm1_3__U2Imm1_4 |
2280 | | { CVT_95_addRegACCRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegVSRpEvenRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
2281 | | // Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U8Imm1_5 |
2282 | | { CVT_95_addRegACCRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 6, CVT_Done }, |
2283 | | // Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U8Imm1_5 |
2284 | | { CVT_95_addRegACCRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 6, CVT_Done }, |
2285 | | // Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U4Imm1_5 |
2286 | | { CVT_95_addRegACCRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 6, CVT_Done }, |
2287 | | // Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U4Imm1_5 |
2288 | | { CVT_95_addRegACCRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 6, CVT_Done }, |
2289 | | // Convert__imm_95_2 |
2290 | | { CVT_imm_95_2, 0, CVT_Done }, |
2291 | | // Convert__U1Imm1_0 |
2292 | | { CVT_95_addImmOperands, 1, CVT_Done }, |
2293 | | // Convert__RegG8RC1_0__RegG8RC1_1__RegGPRC1_2__U6Imm1_3 |
2294 | | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
2295 | | // Convert__RegG8RC1_1__RegG8RC1_2__RegGPRC1_3__U6Imm1_4 |
2296 | | { CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_95_addRegGPRCOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
2297 | | // Convert__RegG8RC1_0__Tie0_1_1__RegG8RC1_1__U6Imm1_2__U6Imm1_3 |
2298 | | { CVT_95_addRegG8RCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegG8RCOperands, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
2299 | | // Convert__RegG8RC1_1__Tie0_1_1__RegG8RC1_2__U6Imm1_3__U6Imm1_4 |
2300 | | { CVT_95_addRegG8RCOperands, 2, CVT_Tied, Tie0_1_1, CVT_95_addRegG8RCOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
2301 | | // Convert__RegG8RC1_0__RegG8RC1_1__U5Imm1_2__Imm1_3 |
2302 | | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
2303 | | // Convert__RegG8RC1_1__RegG8RC1_2__U5Imm1_3__Imm1_4 |
2304 | | { CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
2305 | | // Convert__RegGPRC1_0__Tie0_1_1__RegGPRC1_1__U5Imm1_2__U5Imm1_3__U5Imm1_4 |
2306 | | { CVT_95_addRegGPRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegGPRCOperands, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
2307 | | // Convert__RegGPRC1_1__Tie0_1_1__RegGPRC1_2__U5Imm1_3__U5Imm1_4__U5Imm1_5 |
2308 | | { CVT_95_addRegGPRCOperands, 2, CVT_Tied, Tie0_1_1, CVT_95_addRegGPRCOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 6, CVT_Done }, |
2309 | | // Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2__U5Imm1_3__U5Imm1_4 |
2310 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
2311 | | // Convert__RegGPRC1_1__RegGPRC1_2__U5Imm1_3__U5Imm1_4__U5Imm1_5 |
2312 | | { CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 6, CVT_Done }, |
2313 | | // Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2__U5Imm1_3__U5Imm1_4 |
2314 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
2315 | | // Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3__U5Imm1_4__U5Imm1_5 |
2316 | | { CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_95_addRegGPRCOperands, 4, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 6, CVT_Done }, |
2317 | | // Convert__RegG8RC1_0__RegG8RC1_1__RegGPRC1_2__imm_95_0 |
2318 | | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_imm_95_0, 0, CVT_Done }, |
2319 | | // Convert__RegG8RC1_1__RegG8RC1_2__RegGPRC1_3__imm_95_0 |
2320 | | { CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_95_addRegGPRCOperands, 4, CVT_imm_95_0, 0, CVT_Done }, |
2321 | | // Convert__RegG8RC1_0__RegG8RC1_1__U6Imm1_2__imm_95_0 |
2322 | | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_95_addImmOperands, 3, CVT_imm_95_0, 0, CVT_Done }, |
2323 | | // Convert__RegG8RC1_0__RegGPRC1_1__U6Imm1_2__imm_95_0 |
2324 | | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addImmOperands, 3, CVT_imm_95_0, 0, CVT_Done }, |
2325 | | // Convert__RegG8RC1_1__RegG8RC1_2__U6Imm1_3__imm_95_0 |
2326 | | { CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_95_addImmOperands, 4, CVT_imm_95_0, 0, CVT_Done }, |
2327 | | // Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2__imm_95_0__imm_95_31 |
2328 | | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_imm_95_0, 0, CVT_imm_95_31, 0, CVT_Done }, |
2329 | | // Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2__imm_95_0__imm_95_31 |
2330 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_imm_95_0, 0, CVT_imm_95_31, 0, CVT_Done }, |
2331 | | // Convert__RegG8RC1_1__RegG8RC1_2__RegG8RC1_3__imm_95_0__imm_95_31 |
2332 | | { CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_95_addRegG8RCOperands, 4, CVT_imm_95_0, 0, CVT_imm_95_31, 0, CVT_Done }, |
2333 | | // Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3__imm_95_0__imm_95_31 |
2334 | | { CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_95_addRegGPRCOperands, 4, CVT_imm_95_0, 0, CVT_imm_95_31, 0, CVT_Done }, |
2335 | | // Convert__RegG8RC1_0__RegG8RC1_1__U5Imm1_2__imm_95_0__imm_95_31 |
2336 | | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_95_addImmOperands, 3, CVT_imm_95_0, 0, CVT_imm_95_31, 0, CVT_Done }, |
2337 | | // Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2__imm_95_0__imm_95_31 |
2338 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addImmOperands, 3, CVT_imm_95_0, 0, CVT_imm_95_31, 0, CVT_Done }, |
2339 | | // Convert__RegG8RC1_1__RegG8RC1_2__U5Imm1_3__imm_95_0__imm_95_31 |
2340 | | { CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_95_addImmOperands, 4, CVT_imm_95_0, 0, CVT_imm_95_31, 0, CVT_Done }, |
2341 | | // Convert__RegGPRC1_1__RegGPRC1_2__U5Imm1_3__imm_95_0__imm_95_31 |
2342 | | { CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_95_addImmOperands, 4, CVT_imm_95_0, 0, CVT_imm_95_31, 0, CVT_Done }, |
2343 | | // Convert__Imm1_0 |
2344 | | { CVT_95_addImmOperands, 1, CVT_Done }, |
2345 | | // Convert__RegGPRC1_0__RegCRRC1_1 |
2346 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegCRRCOperands, 2, CVT_Done }, |
2347 | | // Convert__RegGPRC1_0__RegCRBITRC1_1 |
2348 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegCRBITRCOperands, 2, CVT_Done }, |
2349 | | // Convert__RegG8RC1_0__RegG8RC1_1__RegGPRC1_2 |
2350 | | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_Done }, |
2351 | | // Convert__RegG8RC1_1__RegG8RC1_2__RegGPRC1_3 |
2352 | | { CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_95_addRegGPRCOperands, 4, CVT_Done }, |
2353 | | // Convert__RegGPRC1_1__RegGxRCNoR01_2__RegGxRC1_3 |
2354 | | { CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_95_addRegGxRCOperands, 4, CVT_Done }, |
2355 | | // Convert__imm_95_0__RegGPRC1_0__DispRI1_1__RegGxRCNoR01_2 |
2356 | | { CVT_imm_95_0, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
2357 | | // Convert__imm_95_0__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2 |
2358 | | { CVT_imm_95_0, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_Done }, |
2359 | | // Convert__imm_95_0__imm_95_2 |
2360 | | { CVT_imm_95_0, 0, CVT_imm_95_2, 0, CVT_Done }, |
2361 | | // Convert__RegG8RC1_1__RegGxRCNoR01_2__RegGxRC1_3 |
2362 | | { CVT_95_addRegG8RCOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_95_addRegGxRCOperands, 4, CVT_Done }, |
2363 | | // Convert__imm_95_0__RegG8RC1_0__DispRIX1_1__RegGxRCNoR01_2 |
2364 | | { CVT_imm_95_0, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
2365 | | // Convert__imm_95_0__RegG8RC1_0__RegGxRCNoR01_1__RegGxRC1_2 |
2366 | | { CVT_imm_95_0, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_Done }, |
2367 | | // Convert__imm_95_0__RegF8RC1_0__DispRI1_1__RegGxRCNoR01_2 |
2368 | | { CVT_imm_95_0, 0, CVT_95_addRegF8RCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
2369 | | // Convert__imm_95_0__RegF8RC1_0__RegGxRCNoR01_1__RegGxRC1_2 |
2370 | | { CVT_imm_95_0, 0, CVT_95_addRegF8RCOperands, 1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_Done }, |
2371 | | // Convert__imm_95_0__RegF4RC1_0__DispRI1_1__RegGxRCNoR01_2 |
2372 | | { CVT_imm_95_0, 0, CVT_95_addRegF4RCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
2373 | | // Convert__imm_95_0__RegF4RC1_0__RegGxRCNoR01_1__RegGxRC1_2 |
2374 | | { CVT_imm_95_0, 0, CVT_95_addRegF4RCOperands, 1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_Done }, |
2375 | | // Convert__imm_95_1__imm_95_1 |
2376 | | { CVT_imm_95_1, 0, CVT_imm_95_1, 0, CVT_Done }, |
2377 | | // Convert__RegG8pRC1_0__DispRIX1_1__RegGxRCNoR01_2 |
2378 | | { CVT_95_addRegG8pRCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
2379 | | // Convert__RegG8pRC1_1__RegGxRCNoR01_2__RegGxRC1_3 |
2380 | | { CVT_95_addRegG8pRCOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_95_addRegGxRCOperands, 4, CVT_Done }, |
2381 | | // Convert__imm_95_0__imm_95_3 |
2382 | | { CVT_imm_95_0, 0, CVT_imm_95_3, 0, CVT_Done }, |
2383 | | // Convert__RegG8RC1_0__RegG8RC1_2__RegG8RC1_1 |
2384 | | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 3, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
2385 | | // Convert__RegGPRC1_0__RegGPRC1_2__RegGPRC1_1 |
2386 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 3, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2387 | | // Convert__RegG8RC1_1__RegG8RC1_3__RegG8RC1_2 |
2388 | | { CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 4, CVT_95_addRegG8RCOperands, 3, CVT_Done }, |
2389 | | // Convert__RegGPRC1_1__RegGPRC1_3__RegGPRC1_2 |
2390 | | { CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 4, CVT_95_addRegGPRCOperands, 3, CVT_Done }, |
2391 | | // Convert__RegG8RC1_0__RegG8RC1_2__RegG8RC1_3__U1Imm1_1 |
2392 | | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 3, CVT_95_addRegG8RCOperands, 4, CVT_95_addImmOperands, 2, CVT_Done }, |
2393 | | // Convert__RegG8RC1_1__RegG8RC1_3__RegG8RC1_4__U1Imm1_2 |
2394 | | { CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 4, CVT_95_addRegG8RCOperands, 5, CVT_95_addImmOperands, 3, CVT_Done }, |
2395 | | // Convert__RegG8RC1_0__S16Imm1_1 |
2396 | | { CVT_95_addRegG8RCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
2397 | | // Convert__U2Imm1_0 |
2398 | | { CVT_95_addImmOperands, 1, CVT_Done }, |
2399 | | // Convert__U3Imm1_0__imm_95_0 |
2400 | | { CVT_95_addImmOperands, 1, CVT_imm_95_0, 0, CVT_Done }, |
2401 | | // Convert__U3Imm1_0__U2Imm1_1 |
2402 | | { CVT_95_addImmOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
2403 | | // Convert__U5Imm1_1__RegGPRC1_2__RegGPRC1_3 |
2404 | | { CVT_95_addImmOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_95_addRegGPRCOperands, 4, CVT_Done }, |
2405 | | // Convert__U5Imm1_1__RegGPRC1_2__U5Imm1_3 |
2406 | | { CVT_95_addImmOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
2407 | | // Convert__U1Imm1_1 |
2408 | | { CVT_95_addImmOperands, 2, CVT_Done }, |
2409 | | // Convert__U5Imm1_0__RegG8RC1_1__RegG8RC1_2 |
2410 | | { CVT_95_addImmOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_Done }, |
2411 | | // Convert__imm_95_4__RegG8RC1_0__RegG8RC1_1 |
2412 | | { CVT_imm_95_4, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
2413 | | // Convert__imm_95_4__RegG8RC1_0__S16Imm1_1 |
2414 | | { CVT_imm_95_4, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
2415 | | // Convert__imm_95_12__RegG8RC1_0__RegG8RC1_1 |
2416 | | { CVT_imm_95_12, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
2417 | | // Convert__imm_95_12__RegG8RC1_0__S16Imm1_1 |
2418 | | { CVT_imm_95_12, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
2419 | | // Convert__imm_95_8__RegG8RC1_0__RegG8RC1_1 |
2420 | | { CVT_imm_95_8, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
2421 | | // Convert__imm_95_8__RegG8RC1_0__S16Imm1_1 |
2422 | | { CVT_imm_95_8, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
2423 | | // Convert__U5Imm1_0__RegG8RC1_1__S16Imm1_2 |
2424 | | { CVT_95_addImmOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_95_addS16ImmOperands, 3, CVT_Done }, |
2425 | | // Convert__imm_95_20__RegG8RC1_0__RegG8RC1_1 |
2426 | | { CVT_imm_95_20, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
2427 | | // Convert__imm_95_20__RegG8RC1_0__S16Imm1_1 |
2428 | | { CVT_imm_95_20, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
2429 | | // Convert__imm_95_5__RegG8RC1_0__RegG8RC1_1 |
2430 | | { CVT_imm_95_5, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
2431 | | // Convert__imm_95_5__RegG8RC1_0__S16Imm1_1 |
2432 | | { CVT_imm_95_5, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
2433 | | // Convert__imm_95_1__RegG8RC1_0__RegG8RC1_1 |
2434 | | { CVT_imm_95_1, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
2435 | | // Convert__imm_95_1__RegG8RC1_0__S16Imm1_1 |
2436 | | { CVT_imm_95_1, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
2437 | | // Convert__imm_95_6__RegG8RC1_0__RegG8RC1_1 |
2438 | | { CVT_imm_95_6, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
2439 | | // Convert__imm_95_6__RegG8RC1_0__S16Imm1_1 |
2440 | | { CVT_imm_95_6, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
2441 | | // Convert__imm_95_2__RegG8RC1_0__RegG8RC1_1 |
2442 | | { CVT_imm_95_2, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
2443 | | // Convert__imm_95_2__RegG8RC1_0__S16Imm1_1 |
2444 | | { CVT_imm_95_2, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
2445 | | // Convert__imm_95_16__RegG8RC1_0__RegG8RC1_1 |
2446 | | { CVT_imm_95_16, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
2447 | | // Convert__imm_95_16__RegG8RC1_0__S16Imm1_1 |
2448 | | { CVT_imm_95_16, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
2449 | | // Convert__imm_95_24__RegG8RC1_0__RegG8RC1_1 |
2450 | | { CVT_imm_95_24, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
2451 | | // Convert__imm_95_24__RegG8RC1_0__S16Imm1_1 |
2452 | | { CVT_imm_95_24, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
2453 | | // Convert__imm_95_31__RegG8RC1_0__RegG8RC1_1 |
2454 | | { CVT_imm_95_31, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
2455 | | // Convert__imm_95_31__RegG8RC1_0__S16Imm1_1 |
2456 | | { CVT_imm_95_31, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
2457 | | // Convert__regR0__RegGPRC1_0 |
2458 | | { CVT_regR0, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
2459 | | // Convert__RegGPRC1_1__RegGPRC1_0 |
2460 | | { CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
2461 | | // Convert__U2Imm1_0__RegGPRC1_1__RegGPRC1_2 |
2462 | | { CVT_95_addImmOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_Done }, |
2463 | | // Convert__imm_95_0__regR0__regR0 |
2464 | | { CVT_imm_95_0, 0, CVT_regR0, 0, CVT_regR0, 0, CVT_Done }, |
2465 | | // Convert__imm_95_1__regR0__regR0 |
2466 | | { CVT_imm_95_1, 0, CVT_regR0, 0, CVT_regR0, 0, CVT_Done }, |
2467 | | // Convert__imm_95_3__regR0__RegGPRC1_0 |
2468 | | { CVT_imm_95_3, 0, CVT_regR0, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
2469 | | // Convert__imm_95_3__RegGPRC1_0__RegGPRC1_1 |
2470 | | { CVT_imm_95_3, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2471 | | // Convert__RegGPRC1_0__RegGPRC1_1__Imm1_2 |
2472 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
2473 | | // Convert__RegGPRC1_0__RegGPRC1_1__imm_95_1 |
2474 | | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_imm_95_1, 0, CVT_Done }, |
2475 | | // Convert__imm_95_31__regR0__regR0 |
2476 | | { CVT_imm_95_31, 0, CVT_regR0, 0, CVT_regR0, 0, CVT_Done }, |
2477 | | // Convert__U5Imm1_0__RegGPRC1_1__RegGPRC1_2 |
2478 | | { CVT_95_addImmOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_Done }, |
2479 | | // Convert__imm_95_4__RegGPRC1_0__RegGPRC1_1 |
2480 | | { CVT_imm_95_4, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2481 | | // Convert__imm_95_4__RegGPRC1_0__S16Imm1_1 |
2482 | | { CVT_imm_95_4, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
2483 | | // Convert__imm_95_12__RegGPRC1_0__RegGPRC1_1 |
2484 | | { CVT_imm_95_12, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2485 | | // Convert__imm_95_12__RegGPRC1_0__S16Imm1_1 |
2486 | | { CVT_imm_95_12, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
2487 | | // Convert__imm_95_8__RegGPRC1_0__RegGPRC1_1 |
2488 | | { CVT_imm_95_8, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2489 | | // Convert__imm_95_8__RegGPRC1_0__S16Imm1_1 |
2490 | | { CVT_imm_95_8, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
2491 | | // Convert__U5Imm1_0__RegGPRC1_1__S16Imm1_2 |
2492 | | { CVT_95_addImmOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addS16ImmOperands, 3, CVT_Done }, |
2493 | | // Convert__imm_95_20__RegGPRC1_0__RegGPRC1_1 |
2494 | | { CVT_imm_95_20, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2495 | | // Convert__imm_95_20__RegGPRC1_0__S16Imm1_1 |
2496 | | { CVT_imm_95_20, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
2497 | | // Convert__imm_95_5__RegGPRC1_0__RegGPRC1_1 |
2498 | | { CVT_imm_95_5, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2499 | | // Convert__imm_95_5__RegGPRC1_0__S16Imm1_1 |
2500 | | { CVT_imm_95_5, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
2501 | | // Convert__imm_95_1__RegGPRC1_0__RegGPRC1_1 |
2502 | | { CVT_imm_95_1, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2503 | | // Convert__imm_95_1__RegGPRC1_0__S16Imm1_1 |
2504 | | { CVT_imm_95_1, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
2505 | | // Convert__imm_95_6__RegGPRC1_0__RegGPRC1_1 |
2506 | | { CVT_imm_95_6, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2507 | | // Convert__imm_95_6__RegGPRC1_0__S16Imm1_1 |
2508 | | { CVT_imm_95_6, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
2509 | | // Convert__imm_95_2__RegGPRC1_0__RegGPRC1_1 |
2510 | | { CVT_imm_95_2, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2511 | | // Convert__imm_95_2__RegGPRC1_0__S16Imm1_1 |
2512 | | { CVT_imm_95_2, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
2513 | | // Convert__imm_95_16__RegGPRC1_0__RegGPRC1_1 |
2514 | | { CVT_imm_95_16, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2515 | | // Convert__imm_95_16__RegGPRC1_0__S16Imm1_1 |
2516 | | { CVT_imm_95_16, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
2517 | | // Convert__imm_95_24__RegGPRC1_0__RegGPRC1_1 |
2518 | | { CVT_imm_95_24, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2519 | | // Convert__imm_95_24__RegGPRC1_0__S16Imm1_1 |
2520 | | { CVT_imm_95_24, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
2521 | | // Convert__imm_95_31__RegGPRC1_0__RegGPRC1_1 |
2522 | | { CVT_imm_95_31, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2523 | | // Convert__imm_95_31__RegGPRC1_0__S16Imm1_1 |
2524 | | { CVT_imm_95_31, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
2525 | | // Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2 |
2526 | | { CVT_95_addRegVRRCOperands, 1, CVT_95_addRegVRRCOperands, 2, CVT_95_addRegVRRCOperands, 3, CVT_Done }, |
2527 | | // Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3 |
2528 | | { CVT_95_addRegVRRCOperands, 1, CVT_95_addRegVRRCOperands, 2, CVT_95_addRegVRRCOperands, 3, CVT_95_addRegVRRCOperands, 4, CVT_Done }, |
2529 | | // Convert__RegVRRC1_0__U5Imm1_2__RegVRRC1_1 |
2530 | | { CVT_95_addRegVRRCOperands, 1, CVT_95_addImmOperands, 3, CVT_95_addRegVRRCOperands, 2, CVT_Done }, |
2531 | | // Convert__RegVRRC1_0__RegVRRC1_1__RegGPRC1_2 |
2532 | | { CVT_95_addRegVRRCOperands, 1, CVT_95_addRegVRRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_Done }, |
2533 | | // Convert__RegVRRC1_0__RegVRRC1_1 |
2534 | | { CVT_95_addRegVRRCOperands, 1, CVT_95_addRegVRRCOperands, 2, CVT_Done }, |
2535 | | // Convert__RegCRRC1_0__RegVRRC1_1__RegVRRC1_2 |
2536 | | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegVRRCOperands, 2, CVT_95_addRegVRRCOperands, 3, CVT_Done }, |
2537 | | // Convert__RegG8RC1_0__RegVRRC1_1__U1Imm1_2 |
2538 | | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegVRRCOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
2539 | | // Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegGPRC1_3 |
2540 | | { CVT_95_addRegVRRCOperands, 1, CVT_95_addRegVRRCOperands, 2, CVT_95_addRegVRRCOperands, 3, CVT_95_addRegGPRCOperands, 4, CVT_Done }, |
2541 | | // Convert__RegVRRC1_0__U4Imm1_2__RegVRRC1_1 |
2542 | | { CVT_95_addRegVRRCOperands, 1, CVT_95_addImmOperands, 3, CVT_95_addRegVRRCOperands, 2, CVT_Done }, |
2543 | | // Convert__RegG8RC1_0__RegG8RC1_1__RegVRRC1_2 |
2544 | | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_95_addRegVRRCOperands, 3, CVT_Done }, |
2545 | | // Convert__RegG8RC1_0__RegVRRC1_1__U3Imm1_2 |
2546 | | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegVRRCOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
2547 | | // Convert__RegVRRC1_0__Tie0_1_1__RegGPRC1_1__RegGPRC1_2 |
2548 | | { CVT_95_addRegVRRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_Done }, |
2549 | | // Convert__RegVRRC1_0__Tie0_1_1__RegGPRC1_1__RegVRRC1_2 |
2550 | | { CVT_95_addRegVRRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegGPRCOperands, 2, CVT_95_addRegVRRCOperands, 3, CVT_Done }, |
2551 | | // Convert__RegVRRC1_0__Tie0_1_1__U4Imm1_2__RegG8RC1_1 |
2552 | | { CVT_95_addRegVRRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 3, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
2553 | | // Convert__RegVRRC1_0__Tie0_1_1__RegG8RC1_1__RegG8RC1_2 |
2554 | | { CVT_95_addRegVRRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_Done }, |
2555 | | // Convert__RegVRRC1_0__Tie0_1_1__U4Imm1_2__RegVRRC1_1 |
2556 | | { CVT_95_addRegVRRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 3, CVT_95_addRegVRRCOperands, 2, CVT_Done }, |
2557 | | // Convert__RegVRRC1_0__Tie0_1_1__U4Imm1_2__RegGPRC1_1 |
2558 | | { CVT_95_addRegVRRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 3, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
2559 | | // Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_1 |
2560 | | { CVT_95_addRegVRRCOperands, 1, CVT_95_addRegVRRCOperands, 2, CVT_95_addRegVRRCOperands, 2, CVT_Done }, |
2561 | | // Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__Tie0_1_1 |
2562 | | { CVT_95_addRegVRRCOperands, 1, CVT_95_addRegVRRCOperands, 2, CVT_95_addRegVRRCOperands, 3, CVT_Tied, Tie0_1_1, CVT_Done }, |
2563 | | // Convert__RegVRRC1_0__RegVRRC1_1__U1Imm1_2__U4Imm1_3 |
2564 | | { CVT_95_addRegVRRCOperands, 1, CVT_95_addRegVRRCOperands, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
2565 | | // Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__U3Imm1_3 |
2566 | | { CVT_95_addRegVRRCOperands, 1, CVT_95_addRegVRRCOperands, 2, CVT_95_addRegVRRCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
2567 | | // Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__U4Imm1_3 |
2568 | | { CVT_95_addRegVRRCOperands, 1, CVT_95_addRegVRRCOperands, 2, CVT_95_addRegVRRCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
2569 | | // Convert__RegVRRC1_0__S5Imm1_1 |
2570 | | { CVT_95_addRegVRRCOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
2571 | | // Convert__imm_95_1__imm_95_0 |
2572 | | { CVT_imm_95_1, 0, CVT_imm_95_0, 0, CVT_Done }, |
2573 | | // Convert__U2Imm1_0__U2Imm1_1 |
2574 | | { CVT_95_addImmOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
2575 | | // Convert__RegVSFRC1_0__RegVSFRC1_1 |
2576 | | { CVT_95_addRegVSFRCOperands, 1, CVT_95_addRegVSFRCOperands, 2, CVT_Done }, |
2577 | | // Convert__RegVSFRC1_0__RegVSFRC1_1__RegVSFRC1_2 |
2578 | | { CVT_95_addRegVSFRCOperands, 1, CVT_95_addRegVSFRCOperands, 2, CVT_95_addRegVSFRCOperands, 3, CVT_Done }, |
2579 | | // Convert__RegVSSRC1_0__RegVSSRC1_1__RegVSSRC1_2 |
2580 | | { CVT_95_addRegVSSRCOperands, 1, CVT_95_addRegVSSRCOperands, 2, CVT_95_addRegVSSRCOperands, 3, CVT_Done }, |
2581 | | // Convert__RegVSRC1_0__RegVSFRC1_1__RegVSFRC1_2 |
2582 | | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSFRCOperands, 2, CVT_95_addRegVSFRCOperands, 3, CVT_Done }, |
2583 | | // Convert__RegCRRC1_0__RegVSFRC1_1__RegVSFRC1_2 |
2584 | | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegVSFRCOperands, 2, CVT_95_addRegVSFRCOperands, 3, CVT_Done }, |
2585 | | // Convert__RegVRRC1_0__RegVFRC1_1 |
2586 | | { CVT_95_addRegVRRCOperands, 1, CVT_95_addRegVFRCOperands, 2, CVT_Done }, |
2587 | | // Convert__RegVSRC1_0__RegVSSRC1_1 |
2588 | | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSSRCOperands, 2, CVT_Done }, |
2589 | | // Convert__RegVFRC1_0__RegVRRC1_1 |
2590 | | { CVT_95_addRegVFRCOperands, 1, CVT_95_addRegVRRCOperands, 2, CVT_Done }, |
2591 | | // Convert__RegVSSRC1_0__RegVSRC1_1 |
2592 | | { CVT_95_addRegVSSRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_Done }, |
2593 | | // Convert__RegVSSRC1_0__RegVSFRC1_1 |
2594 | | { CVT_95_addRegVSSRCOperands, 1, CVT_95_addRegVSFRCOperands, 2, CVT_Done }, |
2595 | | // Convert__RegVSRC1_0__RegG8RC1_1__RegG8RC1_2 |
2596 | | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_Done }, |
2597 | | // Convert__RegVRRC1_0__RegVRRC1_1__RegVSFRC1_2 |
2598 | | { CVT_95_addRegVRRCOperands, 1, CVT_95_addRegVRRCOperands, 2, CVT_95_addRegVSFRCOperands, 3, CVT_Done }, |
2599 | | // Convert__RegVSFRC1_0__Tie0_1_1__RegVSFRC1_1__RegVSFRC1_2 |
2600 | | { CVT_95_addRegVSFRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegVSFRCOperands, 2, CVT_95_addRegVSFRCOperands, 3, CVT_Done }, |
2601 | | // Convert__RegVSSRC1_0__Tie0_1_1__RegVSSRC1_1__RegVSSRC1_2 |
2602 | | { CVT_95_addRegVSSRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegVSSRCOperands, 2, CVT_95_addRegVSSRCOperands, 3, CVT_Done }, |
2603 | | // Convert__RegVRRC1_0__Tie0_1_1__RegVRRC1_1__RegVRRC1_2 |
2604 | | { CVT_95_addRegVRRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegVRRCOperands, 2, CVT_95_addRegVRRCOperands, 3, CVT_Done }, |
2605 | | // Convert__RegVSSRC1_0__RegVSSRC1_1 |
2606 | | { CVT_95_addRegVSSRCOperands, 1, CVT_95_addRegVSSRCOperands, 2, CVT_Done }, |
2607 | | // Convert__RegVRRC1_1__U1Imm1_0__RegVRRC1_2__U2Imm1_3 |
2608 | | { CVT_95_addRegVRRCOperands, 2, CVT_95_addImmOperands, 1, CVT_95_addRegVRRCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
2609 | | // Convert__RegCRRC1_0__RegVSFRC1_1 |
2610 | | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegVSFRCOperands, 2, CVT_Done }, |
2611 | | // Convert__RegCRRC1_0__U7Imm1_2__RegVSFRC1_1 |
2612 | | { CVT_95_addRegCRRCOperands, 1, CVT_95_addImmOperands, 3, CVT_95_addRegVSFRCOperands, 2, CVT_Done }, |
2613 | | // Convert__RegCRRC1_0__U7Imm1_2__RegVRRC1_1 |
2614 | | { CVT_95_addRegCRRCOperands, 1, CVT_95_addImmOperands, 3, CVT_95_addRegVRRCOperands, 2, CVT_Done }, |
2615 | | // Convert__RegVSRC1_0__RegVSRC1_1 |
2616 | | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_Done }, |
2617 | | // Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2 |
2618 | | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_Done }, |
2619 | | // Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2 |
2620 | | { CVT_95_addRegACCRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_Done }, |
2621 | | // Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2 |
2622 | | { CVT_95_addRegACCRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_Done }, |
2623 | | // Convert__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3 |
2624 | | { CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_95_addRegVSRCOperands, 4, CVT_Done }, |
2625 | | // Convert__RegACCRC1_0__RegVSRpEvenRC1_1__RegVSRC1_2 |
2626 | | { CVT_95_addRegACCRCOperands, 1, CVT_95_addRegVSRpEvenRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_Done }, |
2627 | | // Convert__RegACCRC1_0__Tie0_1_1__RegVSRpEvenRC1_1__RegVSRC1_2 |
2628 | | { CVT_95_addRegACCRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegVSRpEvenRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_Done }, |
2629 | | // Convert__RegVSRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2 |
2630 | | { CVT_95_addRegVSRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_Done }, |
2631 | | // Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_1 |
2632 | | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 2, CVT_Done }, |
2633 | | // Convert__RegCRRC1_0__RegVSRC1_1__RegVSRC1_2 |
2634 | | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_Done }, |
2635 | | // Convert__RegCRRC1_0__RegVSRC1_1 |
2636 | | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_Done }, |
2637 | | // Convert__RegVSRC1_0__U7Imm1_2__RegVSRC1_1 |
2638 | | { CVT_95_addRegVSRCOperands, 1, CVT_95_addImmOperands, 3, CVT_95_addRegVSRCOperands, 2, CVT_Done }, |
2639 | | // Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3 |
2640 | | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_95_addRegVSRCOperands, 4, CVT_Done }, |
2641 | | // Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3__U8Imm1_4 |
2642 | | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_95_addRegVSRCOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
2643 | | // Convert__RegVSFRC1_0__RegVSRC1_1__U4Imm1_2 |
2644 | | { CVT_95_addRegVSFRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
2645 | | // Convert__RegVSRC1_0__RegVRRC1_1__S5Imm1_2 |
2646 | | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVRRCOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
2647 | | // Convert__RegVSRC1_0__Tie0_1_1__RegVSRC1_1__U4Imm1_2 |
2648 | | { CVT_95_addRegVSRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegVSRCOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
2649 | | // Convert__RegACCRC1_0__Tie0_1_1 |
2650 | | { CVT_95_addRegACCRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_Done }, |
2651 | | // Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__imm_95_0 |
2652 | | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_imm_95_0, 0, CVT_Done }, |
2653 | | // Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__imm_95_3 |
2654 | | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_imm_95_3, 0, CVT_Done }, |
2655 | | // Convert__RegVSRC1_0__RegVSRC1_1__Tie0_1_1__RegVSRC1_2 |
2656 | | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_Tied, Tie0_1_1, CVT_95_addRegVSRCOperands, 3, CVT_Done }, |
2657 | | // Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__U2Imm1_3 |
2658 | | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
2659 | | // Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3__U3Imm1_4 |
2660 | | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_95_addRegVSRCOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
2661 | | // Convert__RegACCRC1_0 |
2662 | | { CVT_95_addRegACCRCOperands, 1, CVT_Done }, |
2663 | | // Convert__RegVSRC1_0__RegVSFRC1_1__imm_95_0 |
2664 | | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSFRCOperands, 2, CVT_imm_95_0, 0, CVT_Done }, |
2665 | | // Convert__RegVSRC1_0__RegVSFRC1_1__imm_95_3 |
2666 | | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSFRCOperands, 2, CVT_imm_95_3, 0, CVT_Done }, |
2667 | | // Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_1__imm_95_0 |
2668 | | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 2, CVT_imm_95_0, 0, CVT_Done }, |
2669 | | // Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_1__imm_95_3 |
2670 | | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 2, CVT_imm_95_3, 0, CVT_Done }, |
2671 | | // Convert__RegVSRC1_0__Tie0_1_1__U1Imm1_1__Imm1_2 |
2672 | | { CVT_95_addRegVSRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
2673 | | // Convert__RegVSRC1_0__U8Imm1_1 |
2674 | | { CVT_95_addRegVSRCOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
2675 | | // Convert__RegVSRC1_0__Imm1_1 |
2676 | | { CVT_95_addRegVSRCOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
2677 | | // Convert__RegVSRC1_0__RegVSRC1_1__U2Imm1_2 |
2678 | | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
2679 | | // Convert__RegVSRC1_0__RegVSFRC1_1__imm_95_2 |
2680 | | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSFRCOperands, 2, CVT_imm_95_2, 0, CVT_Done }, |
2681 | | // Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_1__imm_95_2 |
2682 | | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 2, CVT_imm_95_2, 0, CVT_Done }, |
2683 | | }; |
2684 | | |
2685 | | void PPCAsmParser:: |
2686 | | convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode, |
2687 | 0 | const OperandVector &Operands) { |
2688 | 0 | assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!"); |
2689 | 0 | const uint8_t *Converter = ConversionTable[Kind]; |
2690 | 0 | unsigned OpIdx; |
2691 | 0 | Inst.setOpcode(Opcode); |
2692 | 0 | for (const uint8_t *p = Converter; *p; p += 2) { |
2693 | 0 | OpIdx = *(p + 1); |
2694 | 0 | switch (*p) { |
2695 | 0 | default: llvm_unreachable("invalid conversion entry!"); |
2696 | 0 | case CVT_Reg: |
2697 | 0 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegOperands(Inst, 1); |
2698 | 0 | break; |
2699 | 0 | case CVT_Tied: { |
2700 | 0 | assert(OpIdx < (size_t)(std::end(TiedAsmOperandTable) - |
2701 | 0 | std::begin(TiedAsmOperandTable)) && |
2702 | 0 | "Tied operand not found"); |
2703 | 0 | unsigned TiedResOpnd = TiedAsmOperandTable[OpIdx][0]; |
2704 | 0 | if (TiedResOpnd != (uint8_t)-1) |
2705 | 0 | Inst.addOperand(Inst.getOperand(TiedResOpnd)); |
2706 | 0 | break; |
2707 | 0 | } |
2708 | 0 | case CVT_95_addRegG8RCOperands: |
2709 | 0 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegG8RCOperands(Inst, 1); |
2710 | 0 | break; |
2711 | 0 | case CVT_95_addTLSRegOperands: |
2712 | 0 | static_cast<PPCOperand &>(*Operands[OpIdx]).addTLSRegOperands(Inst, 1); |
2713 | 0 | break; |
2714 | 0 | case CVT_95_addRegGPRCOperands: |
2715 | 0 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegGPRCOperands(Inst, 1); |
2716 | 0 | break; |
2717 | 0 | case CVT_95_addImmOperands: |
2718 | 0 | static_cast<PPCOperand &>(*Operands[OpIdx]).addImmOperands(Inst, 1); |
2719 | 0 | break; |
2720 | 0 | case CVT_95_addRegGPRCNoR0Operands: |
2721 | 0 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegGPRCNoR0Operands(Inst, 1); |
2722 | 0 | break; |
2723 | 0 | case CVT_95_addS16ImmOperands: |
2724 | 0 | static_cast<PPCOperand &>(*Operands[OpIdx]).addS16ImmOperands(Inst, 1); |
2725 | 0 | break; |
2726 | 0 | case CVT_95_addU16ImmOperands: |
2727 | 0 | static_cast<PPCOperand &>(*Operands[OpIdx]).addU16ImmOperands(Inst, 1); |
2728 | 0 | break; |
2729 | 0 | case CVT_95_addBranchTargetOperands: |
2730 | 0 | static_cast<PPCOperand &>(*Operands[OpIdx]).addBranchTargetOperands(Inst, 1); |
2731 | 0 | break; |
2732 | 0 | case CVT_95_addRegCRBITRCOperands: |
2733 | 0 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegCRBITRCOperands(Inst, 1); |
2734 | 0 | break; |
2735 | 0 | case CVT_imm_95_3: |
2736 | 0 | Inst.addOperand(MCOperand::createImm(3)); |
2737 | 0 | break; |
2738 | 0 | case CVT_imm_95_2: |
2739 | 0 | Inst.addOperand(MCOperand::createImm(2)); |
2740 | 0 | break; |
2741 | 0 | case CVT_imm_95_0: |
2742 | 0 | Inst.addOperand(MCOperand::createImm(0)); |
2743 | 0 | break; |
2744 | 0 | case CVT_95_addRegVRRCOperands: |
2745 | 0 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegVRRCOperands(Inst, 1); |
2746 | 0 | break; |
2747 | 0 | case CVT_imm_95_8: |
2748 | 0 | Inst.addOperand(MCOperand::createImm(8)); |
2749 | 0 | break; |
2750 | 0 | case CVT_imm_95_10: |
2751 | 0 | Inst.addOperand(MCOperand::createImm(10)); |
2752 | 0 | break; |
2753 | 0 | case CVT_imm_95_76: |
2754 | 0 | Inst.addOperand(MCOperand::createImm(76)); |
2755 | 0 | break; |
2756 | 0 | case CVT_regCR0: |
2757 | 0 | Inst.addOperand(MCOperand::createReg(PPC::CR0)); |
2758 | 0 | break; |
2759 | 0 | case CVT_95_addRegCRRCOperands: |
2760 | 0 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegCRRCOperands(Inst, 1); |
2761 | 0 | break; |
2762 | 0 | case CVT_imm_95_79: |
2763 | 0 | Inst.addOperand(MCOperand::createImm(79)); |
2764 | 0 | break; |
2765 | 0 | case CVT_imm_95_78: |
2766 | 0 | Inst.addOperand(MCOperand::createImm(78)); |
2767 | 0 | break; |
2768 | 0 | case CVT_imm_95_4: |
2769 | 0 | Inst.addOperand(MCOperand::createImm(4)); |
2770 | 0 | break; |
2771 | 0 | case CVT_imm_95_7: |
2772 | 0 | Inst.addOperand(MCOperand::createImm(7)); |
2773 | 0 | break; |
2774 | 0 | case CVT_imm_95_6: |
2775 | 0 | Inst.addOperand(MCOperand::createImm(6)); |
2776 | 0 | break; |
2777 | 0 | case CVT_imm_95_44: |
2778 | 0 | Inst.addOperand(MCOperand::createImm(44)); |
2779 | 0 | break; |
2780 | 0 | case CVT_imm_95_47: |
2781 | 0 | Inst.addOperand(MCOperand::createImm(47)); |
2782 | 0 | break; |
2783 | 0 | case CVT_imm_95_46: |
2784 | 0 | Inst.addOperand(MCOperand::createImm(46)); |
2785 | 0 | break; |
2786 | 0 | case CVT_imm_95_36: |
2787 | 0 | Inst.addOperand(MCOperand::createImm(36)); |
2788 | 0 | break; |
2789 | 0 | case CVT_imm_95_39: |
2790 | 0 | Inst.addOperand(MCOperand::createImm(39)); |
2791 | 0 | break; |
2792 | 0 | case CVT_imm_95_38: |
2793 | 0 | Inst.addOperand(MCOperand::createImm(38)); |
2794 | 0 | break; |
2795 | 0 | case CVT_imm_95_12: |
2796 | 0 | Inst.addOperand(MCOperand::createImm(12)); |
2797 | 0 | break; |
2798 | 0 | case CVT_imm_95_15: |
2799 | 0 | Inst.addOperand(MCOperand::createImm(15)); |
2800 | 0 | break; |
2801 | 0 | case CVT_imm_95_14: |
2802 | 0 | Inst.addOperand(MCOperand::createImm(14)); |
2803 | 0 | break; |
2804 | 0 | case CVT_imm_95_68: |
2805 | 0 | Inst.addOperand(MCOperand::createImm(68)); |
2806 | 0 | break; |
2807 | 0 | case CVT_imm_95_71: |
2808 | 0 | Inst.addOperand(MCOperand::createImm(71)); |
2809 | 0 | break; |
2810 | 0 | case CVT_imm_95_70: |
2811 | 0 | Inst.addOperand(MCOperand::createImm(70)); |
2812 | 0 | break; |
2813 | 0 | case CVT_imm_95_100: |
2814 | 0 | Inst.addOperand(MCOperand::createImm(100)); |
2815 | 0 | break; |
2816 | 0 | case CVT_imm_95_103: |
2817 | 0 | Inst.addOperand(MCOperand::createImm(103)); |
2818 | 0 | break; |
2819 | 0 | case CVT_imm_95_102: |
2820 | 0 | Inst.addOperand(MCOperand::createImm(102)); |
2821 | 0 | break; |
2822 | 0 | case CVT_imm_95_108: |
2823 | 0 | Inst.addOperand(MCOperand::createImm(108)); |
2824 | 0 | break; |
2825 | 0 | case CVT_imm_95_111: |
2826 | 0 | Inst.addOperand(MCOperand::createImm(111)); |
2827 | 0 | break; |
2828 | 0 | case CVT_imm_95_110: |
2829 | 0 | Inst.addOperand(MCOperand::createImm(110)); |
2830 | 0 | break; |
2831 | 0 | case CVT_imm_95_31: |
2832 | 0 | Inst.addOperand(MCOperand::createImm(31)); |
2833 | 0 | break; |
2834 | 0 | case CVT_95_addRegF8RCOperands: |
2835 | 0 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegF8RCOperands(Inst, 1); |
2836 | 0 | break; |
2837 | 0 | case CVT_95_addRegFpRCOperands: |
2838 | 0 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegFpRCOperands(Inst, 1); |
2839 | 0 | break; |
2840 | 0 | case CVT_95_addRegGxRCNoR0Operands: |
2841 | 0 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegGxRCNoR0Operands(Inst, 1); |
2842 | 0 | break; |
2843 | 0 | case CVT_95_addRegGxRCOperands: |
2844 | 0 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegGxRCOperands(Inst, 1); |
2845 | 0 | break; |
2846 | 0 | case CVT_regR0: |
2847 | 0 | Inst.addOperand(MCOperand::createReg(PPC::R0)); |
2848 | 0 | break; |
2849 | 0 | case CVT_95_addRegDMRRCOperands: |
2850 | 0 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegDMRRCOperands(Inst, 1); |
2851 | 0 | break; |
2852 | 0 | case CVT_95_addRegVSRpRCOperands: |
2853 | 0 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegVSRpRCOperands(Inst, 1); |
2854 | 0 | break; |
2855 | 0 | case CVT_95_addRegDMRROWpRCOperands: |
2856 | 0 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegDMRROWpRCOperands(Inst, 1); |
2857 | 0 | break; |
2858 | 0 | case CVT_95_addRegACCRCOperands: |
2859 | 0 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegACCRCOperands(Inst, 1); |
2860 | 0 | break; |
2861 | 0 | case CVT_95_addRegSPERCOperands: |
2862 | 0 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegSPERCOperands(Inst, 1); |
2863 | 0 | break; |
2864 | 0 | case CVT_95_addRegSPE4RCOperands: |
2865 | 0 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegSPE4RCOperands(Inst, 1); |
2866 | 0 | break; |
2867 | 0 | case CVT_95_addRegF4RCOperands: |
2868 | 0 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegF4RCOperands(Inst, 1); |
2869 | 0 | break; |
2870 | 0 | case CVT_95_addRegG8RCNoX0Operands: |
2871 | 0 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegG8RCNoX0Operands(Inst, 1); |
2872 | 0 | break; |
2873 | 0 | case CVT_regCR0EQ: |
2874 | 0 | Inst.addOperand(MCOperand::createReg(PPC::CR0EQ)); |
2875 | 0 | break; |
2876 | 0 | case CVT_regCR0GT: |
2877 | 0 | Inst.addOperand(MCOperand::createReg(PPC::CR0GT)); |
2878 | 0 | break; |
2879 | 0 | case CVT_regCR0LT: |
2880 | 0 | Inst.addOperand(MCOperand::createReg(PPC::CR0LT)); |
2881 | 0 | break; |
2882 | 0 | case CVT_regZERO8: |
2883 | 0 | Inst.addOperand(MCOperand::createReg(PPC::ZERO8)); |
2884 | 0 | break; |
2885 | 0 | case CVT_regZERO: |
2886 | 0 | Inst.addOperand(MCOperand::createReg(PPC::ZERO)); |
2887 | 0 | break; |
2888 | 0 | case CVT_95_addRegG8pRCOperands: |
2889 | 0 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegG8pRCOperands(Inst, 1); |
2890 | 0 | break; |
2891 | 0 | case CVT_imm_95_1: |
2892 | 0 | Inst.addOperand(MCOperand::createImm(1)); |
2893 | 0 | break; |
2894 | 0 | case CVT_95_addRegVFRCOperands: |
2895 | 0 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegVFRCOperands(Inst, 1); |
2896 | 0 | break; |
2897 | 0 | case CVT_95_addRegVSFRCOperands: |
2898 | 0 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegVSFRCOperands(Inst, 1); |
2899 | 0 | break; |
2900 | 0 | case CVT_95_addRegVSSRCOperands: |
2901 | 0 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegVSSRCOperands(Inst, 1); |
2902 | 0 | break; |
2903 | 0 | case CVT_95_addRegVSRCOperands: |
2904 | 0 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegVSRCOperands(Inst, 1); |
2905 | 0 | break; |
2906 | 0 | case CVT_imm_95_29: |
2907 | 0 | Inst.addOperand(MCOperand::createImm(29)); |
2908 | 0 | break; |
2909 | 0 | case CVT_imm_95_280: |
2910 | 0 | Inst.addOperand(MCOperand::createImm(280)); |
2911 | 0 | break; |
2912 | 0 | case CVT_imm_95_128: |
2913 | 0 | Inst.addOperand(MCOperand::createImm(128)); |
2914 | 0 | break; |
2915 | 0 | case CVT_imm_95_129: |
2916 | 0 | Inst.addOperand(MCOperand::createImm(129)); |
2917 | 0 | break; |
2918 | 0 | case CVT_imm_95_130: |
2919 | 0 | Inst.addOperand(MCOperand::createImm(130)); |
2920 | 0 | break; |
2921 | 0 | case CVT_imm_95_131: |
2922 | 0 | Inst.addOperand(MCOperand::createImm(131)); |
2923 | 0 | break; |
2924 | 0 | case CVT_imm_95_132: |
2925 | 0 | Inst.addOperand(MCOperand::createImm(132)); |
2926 | 0 | break; |
2927 | 0 | case CVT_imm_95_133: |
2928 | 0 | Inst.addOperand(MCOperand::createImm(133)); |
2929 | 0 | break; |
2930 | 0 | case CVT_imm_95_134: |
2931 | 0 | Inst.addOperand(MCOperand::createImm(134)); |
2932 | 0 | break; |
2933 | 0 | case CVT_imm_95_135: |
2934 | 0 | Inst.addOperand(MCOperand::createImm(135)); |
2935 | 0 | break; |
2936 | 0 | case CVT_imm_95_28: |
2937 | 0 | Inst.addOperand(MCOperand::createImm(28)); |
2938 | 0 | break; |
2939 | 0 | case CVT_imm_95_9: |
2940 | 0 | Inst.addOperand(MCOperand::createImm(9)); |
2941 | 0 | break; |
2942 | 0 | case CVT_imm_95_19: |
2943 | 0 | Inst.addOperand(MCOperand::createImm(19)); |
2944 | 0 | break; |
2945 | 0 | case CVT_imm_95_537: |
2946 | 0 | Inst.addOperand(MCOperand::createImm(537)); |
2947 | 0 | break; |
2948 | 0 | case CVT_imm_95_539: |
2949 | 0 | Inst.addOperand(MCOperand::createImm(539)); |
2950 | 0 | break; |
2951 | 0 | case CVT_imm_95_541: |
2952 | 0 | Inst.addOperand(MCOperand::createImm(541)); |
2953 | 0 | break; |
2954 | 0 | case CVT_imm_95_543: |
2955 | 0 | Inst.addOperand(MCOperand::createImm(543)); |
2956 | 0 | break; |
2957 | 0 | case CVT_imm_95_536: |
2958 | 0 | Inst.addOperand(MCOperand::createImm(536)); |
2959 | 0 | break; |
2960 | 0 | case CVT_imm_95_538: |
2961 | 0 | Inst.addOperand(MCOperand::createImm(538)); |
2962 | 0 | break; |
2963 | 0 | case CVT_imm_95_540: |
2964 | 0 | Inst.addOperand(MCOperand::createImm(540)); |
2965 | 0 | break; |
2966 | 0 | case CVT_imm_95_542: |
2967 | 0 | Inst.addOperand(MCOperand::createImm(542)); |
2968 | 0 | break; |
2969 | 0 | case CVT_imm_95_1018: |
2970 | 0 | Inst.addOperand(MCOperand::createImm(1018)); |
2971 | 0 | break; |
2972 | 0 | case CVT_imm_95_981: |
2973 | 0 | Inst.addOperand(MCOperand::createImm(981)); |
2974 | 0 | break; |
2975 | 0 | case CVT_imm_95_22: |
2976 | 0 | Inst.addOperand(MCOperand::createImm(22)); |
2977 | 0 | break; |
2978 | 0 | case CVT_imm_95_17: |
2979 | 0 | Inst.addOperand(MCOperand::createImm(17)); |
2980 | 0 | break; |
2981 | 0 | case CVT_imm_95_18: |
2982 | 0 | Inst.addOperand(MCOperand::createImm(18)); |
2983 | 0 | break; |
2984 | 0 | case CVT_imm_95_980: |
2985 | 0 | Inst.addOperand(MCOperand::createImm(980)); |
2986 | 0 | break; |
2987 | 0 | case CVT_imm_95_529: |
2988 | 0 | Inst.addOperand(MCOperand::createImm(529)); |
2989 | 0 | break; |
2990 | 0 | case CVT_imm_95_531: |
2991 | 0 | Inst.addOperand(MCOperand::createImm(531)); |
2992 | 0 | break; |
2993 | 0 | case CVT_imm_95_533: |
2994 | 0 | Inst.addOperand(MCOperand::createImm(533)); |
2995 | 0 | break; |
2996 | 0 | case CVT_imm_95_535: |
2997 | 0 | Inst.addOperand(MCOperand::createImm(535)); |
2998 | 0 | break; |
2999 | 0 | case CVT_imm_95_528: |
3000 | 0 | Inst.addOperand(MCOperand::createImm(528)); |
3001 | 0 | break; |
3002 | 0 | case CVT_imm_95_530: |
3003 | 0 | Inst.addOperand(MCOperand::createImm(530)); |
3004 | 0 | break; |
3005 | 0 | case CVT_imm_95_532: |
3006 | 0 | Inst.addOperand(MCOperand::createImm(532)); |
3007 | 0 | break; |
3008 | 0 | case CVT_imm_95_534: |
3009 | 0 | Inst.addOperand(MCOperand::createImm(534)); |
3010 | 0 | break; |
3011 | 0 | case CVT_imm_95_1019: |
3012 | 0 | Inst.addOperand(MCOperand::createImm(1019)); |
3013 | 0 | break; |
3014 | 0 | case CVT_95_addCRBitMaskOperands: |
3015 | 0 | static_cast<PPCOperand &>(*Operands[OpIdx]).addCRBitMaskOperands(Inst, 1); |
3016 | 0 | break; |
3017 | 0 | case CVT_imm_95_48: |
3018 | 0 | Inst.addOperand(MCOperand::createImm(48)); |
3019 | 0 | break; |
3020 | 0 | case CVT_imm_95_896: |
3021 | 0 | Inst.addOperand(MCOperand::createImm(896)); |
3022 | 0 | break; |
3023 | 0 | case CVT_imm_95_287: |
3024 | 0 | Inst.addOperand(MCOperand::createImm(287)); |
3025 | 0 | break; |
3026 | 0 | case CVT_imm_95_5: |
3027 | 0 | Inst.addOperand(MCOperand::createImm(5)); |
3028 | 0 | break; |
3029 | 0 | case CVT_imm_95_25: |
3030 | 0 | Inst.addOperand(MCOperand::createImm(25)); |
3031 | 0 | break; |
3032 | 0 | case CVT_imm_95_512: |
3033 | 0 | Inst.addOperand(MCOperand::createImm(512)); |
3034 | 0 | break; |
3035 | 0 | case CVT_imm_95_272: |
3036 | 0 | Inst.addOperand(MCOperand::createImm(272)); |
3037 | 0 | break; |
3038 | 0 | case CVT_imm_95_273: |
3039 | 0 | Inst.addOperand(MCOperand::createImm(273)); |
3040 | 0 | break; |
3041 | 0 | case CVT_imm_95_274: |
3042 | 0 | Inst.addOperand(MCOperand::createImm(274)); |
3043 | 0 | break; |
3044 | 0 | case CVT_imm_95_275: |
3045 | 0 | Inst.addOperand(MCOperand::createImm(275)); |
3046 | 0 | break; |
3047 | 0 | case CVT_imm_95_260: |
3048 | 0 | Inst.addOperand(MCOperand::createImm(260)); |
3049 | 0 | break; |
3050 | 0 | case CVT_imm_95_261: |
3051 | 0 | Inst.addOperand(MCOperand::createImm(261)); |
3052 | 0 | break; |
3053 | 0 | case CVT_imm_95_262: |
3054 | 0 | Inst.addOperand(MCOperand::createImm(262)); |
3055 | 0 | break; |
3056 | 0 | case CVT_imm_95_263: |
3057 | 0 | Inst.addOperand(MCOperand::createImm(263)); |
3058 | 0 | break; |
3059 | 0 | case CVT_imm_95_26: |
3060 | 0 | Inst.addOperand(MCOperand::createImm(26)); |
3061 | 0 | break; |
3062 | 0 | case CVT_imm_95_27: |
3063 | 0 | Inst.addOperand(MCOperand::createImm(27)); |
3064 | 0 | break; |
3065 | 0 | case CVT_imm_95_990: |
3066 | 0 | Inst.addOperand(MCOperand::createImm(990)); |
3067 | 0 | break; |
3068 | 0 | case CVT_imm_95_991: |
3069 | 0 | Inst.addOperand(MCOperand::createImm(991)); |
3070 | 0 | break; |
3071 | 0 | case CVT_imm_95_268: |
3072 | 0 | Inst.addOperand(MCOperand::createImm(268)); |
3073 | 0 | break; |
3074 | 0 | case CVT_imm_95_988: |
3075 | 0 | Inst.addOperand(MCOperand::createImm(988)); |
3076 | 0 | break; |
3077 | 0 | case CVT_imm_95_989: |
3078 | 0 | Inst.addOperand(MCOperand::createImm(989)); |
3079 | 0 | break; |
3080 | 0 | case CVT_imm_95_269: |
3081 | 0 | Inst.addOperand(MCOperand::createImm(269)); |
3082 | 0 | break; |
3083 | 0 | case CVT_imm_95_986: |
3084 | 0 | Inst.addOperand(MCOperand::createImm(986)); |
3085 | 0 | break; |
3086 | 0 | case CVT_imm_95_13: |
3087 | 0 | Inst.addOperand(MCOperand::createImm(13)); |
3088 | 0 | break; |
3089 | 0 | case CVT_imm_95_255: |
3090 | 0 | Inst.addOperand(MCOperand::createImm(255)); |
3091 | 0 | break; |
3092 | 0 | case CVT_imm_95_284: |
3093 | 0 | Inst.addOperand(MCOperand::createImm(284)); |
3094 | 0 | break; |
3095 | 0 | case CVT_imm_95_285: |
3096 | 0 | Inst.addOperand(MCOperand::createImm(285)); |
3097 | 0 | break; |
3098 | 0 | case CVT_regX0: |
3099 | 0 | Inst.addOperand(MCOperand::createReg(PPC::X0)); |
3100 | 0 | break; |
3101 | 0 | case CVT_95_addRegVSRpEvenRCOperands: |
3102 | 0 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegVSRpEvenRCOperands(Inst, 1); |
3103 | 0 | break; |
3104 | 0 | case CVT_imm_95_20: |
3105 | 0 | Inst.addOperand(MCOperand::createImm(20)); |
3106 | 0 | break; |
3107 | 0 | case CVT_imm_95_16: |
3108 | 0 | Inst.addOperand(MCOperand::createImm(16)); |
3109 | 0 | break; |
3110 | 0 | case CVT_imm_95_24: |
3111 | 0 | Inst.addOperand(MCOperand::createImm(24)); |
3112 | 0 | break; |
3113 | 0 | } |
3114 | 0 | } |
3115 | 0 | } |
3116 | | |
3117 | | void PPCAsmParser:: |
3118 | | convertToMapAndConstraints(unsigned Kind, |
3119 | 0 | const OperandVector &Operands) { |
3120 | 0 | assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!"); |
3121 | 0 | unsigned NumMCOperands = 0; |
3122 | 0 | const uint8_t *Converter = ConversionTable[Kind]; |
3123 | 0 | for (const uint8_t *p = Converter; *p; p += 2) { |
3124 | 0 | switch (*p) { |
3125 | 0 | default: llvm_unreachable("invalid conversion entry!"); |
3126 | 0 | case CVT_Reg: |
3127 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3128 | 0 | Operands[*(p + 1)]->setConstraint("r"); |
3129 | 0 | ++NumMCOperands; |
3130 | 0 | break; |
3131 | 0 | case CVT_Tied: |
3132 | 0 | ++NumMCOperands; |
3133 | 0 | break; |
3134 | 0 | case CVT_95_addRegG8RCOperands: |
3135 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3136 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3137 | 0 | NumMCOperands += 1; |
3138 | 0 | break; |
3139 | 0 | case CVT_95_addTLSRegOperands: |
3140 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3141 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3142 | 0 | NumMCOperands += 1; |
3143 | 0 | break; |
3144 | 0 | case CVT_95_addRegGPRCOperands: |
3145 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3146 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3147 | 0 | NumMCOperands += 1; |
3148 | 0 | break; |
3149 | 0 | case CVT_95_addImmOperands: |
3150 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3151 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3152 | 0 | NumMCOperands += 1; |
3153 | 0 | break; |
3154 | 0 | case CVT_95_addRegGPRCNoR0Operands: |
3155 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3156 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3157 | 0 | NumMCOperands += 1; |
3158 | 0 | break; |
3159 | 0 | case CVT_95_addS16ImmOperands: |
3160 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3161 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3162 | 0 | NumMCOperands += 1; |
3163 | 0 | break; |
3164 | 0 | case CVT_95_addU16ImmOperands: |
3165 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3166 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3167 | 0 | NumMCOperands += 1; |
3168 | 0 | break; |
3169 | 0 | case CVT_95_addBranchTargetOperands: |
3170 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3171 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3172 | 0 | NumMCOperands += 1; |
3173 | 0 | break; |
3174 | 0 | case CVT_95_addRegCRBITRCOperands: |
3175 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3176 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3177 | 0 | NumMCOperands += 1; |
3178 | 0 | break; |
3179 | 0 | case CVT_imm_95_3: |
3180 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3181 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3182 | 0 | ++NumMCOperands; |
3183 | 0 | break; |
3184 | 0 | case CVT_imm_95_2: |
3185 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3186 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3187 | 0 | ++NumMCOperands; |
3188 | 0 | break; |
3189 | 0 | case CVT_imm_95_0: |
3190 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3191 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3192 | 0 | ++NumMCOperands; |
3193 | 0 | break; |
3194 | 0 | case CVT_95_addRegVRRCOperands: |
3195 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3196 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3197 | 0 | NumMCOperands += 1; |
3198 | 0 | break; |
3199 | 0 | case CVT_imm_95_8: |
3200 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3201 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3202 | 0 | ++NumMCOperands; |
3203 | 0 | break; |
3204 | 0 | case CVT_imm_95_10: |
3205 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3206 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3207 | 0 | ++NumMCOperands; |
3208 | 0 | break; |
3209 | 0 | case CVT_imm_95_76: |
3210 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3211 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3212 | 0 | ++NumMCOperands; |
3213 | 0 | break; |
3214 | 0 | case CVT_regCR0: |
3215 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3216 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3217 | 0 | ++NumMCOperands; |
3218 | 0 | break; |
3219 | 0 | case CVT_95_addRegCRRCOperands: |
3220 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3221 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3222 | 0 | NumMCOperands += 1; |
3223 | 0 | break; |
3224 | 0 | case CVT_imm_95_79: |
3225 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3226 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3227 | 0 | ++NumMCOperands; |
3228 | 0 | break; |
3229 | 0 | case CVT_imm_95_78: |
3230 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3231 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3232 | 0 | ++NumMCOperands; |
3233 | 0 | break; |
3234 | 0 | case CVT_imm_95_4: |
3235 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3236 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3237 | 0 | ++NumMCOperands; |
3238 | 0 | break; |
3239 | 0 | case CVT_imm_95_7: |
3240 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3241 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3242 | 0 | ++NumMCOperands; |
3243 | 0 | break; |
3244 | 0 | case CVT_imm_95_6: |
3245 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3246 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3247 | 0 | ++NumMCOperands; |
3248 | 0 | break; |
3249 | 0 | case CVT_imm_95_44: |
3250 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3251 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3252 | 0 | ++NumMCOperands; |
3253 | 0 | break; |
3254 | 0 | case CVT_imm_95_47: |
3255 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3256 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3257 | 0 | ++NumMCOperands; |
3258 | 0 | break; |
3259 | 0 | case CVT_imm_95_46: |
3260 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3261 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3262 | 0 | ++NumMCOperands; |
3263 | 0 | break; |
3264 | 0 | case CVT_imm_95_36: |
3265 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3266 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3267 | 0 | ++NumMCOperands; |
3268 | 0 | break; |
3269 | 0 | case CVT_imm_95_39: |
3270 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3271 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3272 | 0 | ++NumMCOperands; |
3273 | 0 | break; |
3274 | 0 | case CVT_imm_95_38: |
3275 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3276 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3277 | 0 | ++NumMCOperands; |
3278 | 0 | break; |
3279 | 0 | case CVT_imm_95_12: |
3280 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3281 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3282 | 0 | ++NumMCOperands; |
3283 | 0 | break; |
3284 | 0 | case CVT_imm_95_15: |
3285 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3286 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3287 | 0 | ++NumMCOperands; |
3288 | 0 | break; |
3289 | 0 | case CVT_imm_95_14: |
3290 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3291 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3292 | 0 | ++NumMCOperands; |
3293 | 0 | break; |
3294 | 0 | case CVT_imm_95_68: |
3295 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3296 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3297 | 0 | ++NumMCOperands; |
3298 | 0 | break; |
3299 | 0 | case CVT_imm_95_71: |
3300 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3301 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3302 | 0 | ++NumMCOperands; |
3303 | 0 | break; |
3304 | 0 | case CVT_imm_95_70: |
3305 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3306 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3307 | 0 | ++NumMCOperands; |
3308 | 0 | break; |
3309 | 0 | case CVT_imm_95_100: |
3310 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3311 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3312 | 0 | ++NumMCOperands; |
3313 | 0 | break; |
3314 | 0 | case CVT_imm_95_103: |
3315 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3316 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3317 | 0 | ++NumMCOperands; |
3318 | 0 | break; |
3319 | 0 | case CVT_imm_95_102: |
3320 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3321 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3322 | 0 | ++NumMCOperands; |
3323 | 0 | break; |
3324 | 0 | case CVT_imm_95_108: |
3325 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3326 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3327 | 0 | ++NumMCOperands; |
3328 | 0 | break; |
3329 | 0 | case CVT_imm_95_111: |
3330 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3331 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3332 | 0 | ++NumMCOperands; |
3333 | 0 | break; |
3334 | 0 | case CVT_imm_95_110: |
3335 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3336 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3337 | 0 | ++NumMCOperands; |
3338 | 0 | break; |
3339 | 0 | case CVT_imm_95_31: |
3340 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3341 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3342 | 0 | ++NumMCOperands; |
3343 | 0 | break; |
3344 | 0 | case CVT_95_addRegF8RCOperands: |
3345 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3346 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3347 | 0 | NumMCOperands += 1; |
3348 | 0 | break; |
3349 | 0 | case CVT_95_addRegFpRCOperands: |
3350 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3351 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3352 | 0 | NumMCOperands += 1; |
3353 | 0 | break; |
3354 | 0 | case CVT_95_addRegGxRCNoR0Operands: |
3355 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3356 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3357 | 0 | NumMCOperands += 1; |
3358 | 0 | break; |
3359 | 0 | case CVT_95_addRegGxRCOperands: |
3360 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3361 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3362 | 0 | NumMCOperands += 1; |
3363 | 0 | break; |
3364 | 0 | case CVT_regR0: |
3365 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3366 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3367 | 0 | ++NumMCOperands; |
3368 | 0 | break; |
3369 | 0 | case CVT_95_addRegDMRRCOperands: |
3370 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3371 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3372 | 0 | NumMCOperands += 1; |
3373 | 0 | break; |
3374 | 0 | case CVT_95_addRegVSRpRCOperands: |
3375 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3376 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3377 | 0 | NumMCOperands += 1; |
3378 | 0 | break; |
3379 | 0 | case CVT_95_addRegDMRROWpRCOperands: |
3380 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3381 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3382 | 0 | NumMCOperands += 1; |
3383 | 0 | break; |
3384 | 0 | case CVT_95_addRegACCRCOperands: |
3385 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3386 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3387 | 0 | NumMCOperands += 1; |
3388 | 0 | break; |
3389 | 0 | case CVT_95_addRegSPERCOperands: |
3390 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3391 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3392 | 0 | NumMCOperands += 1; |
3393 | 0 | break; |
3394 | 0 | case CVT_95_addRegSPE4RCOperands: |
3395 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3396 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3397 | 0 | NumMCOperands += 1; |
3398 | 0 | break; |
3399 | 0 | case CVT_95_addRegF4RCOperands: |
3400 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3401 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3402 | 0 | NumMCOperands += 1; |
3403 | 0 | break; |
3404 | 0 | case CVT_95_addRegG8RCNoX0Operands: |
3405 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3406 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3407 | 0 | NumMCOperands += 1; |
3408 | 0 | break; |
3409 | 0 | case CVT_regCR0EQ: |
3410 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3411 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3412 | 0 | ++NumMCOperands; |
3413 | 0 | break; |
3414 | 0 | case CVT_regCR0GT: |
3415 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3416 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3417 | 0 | ++NumMCOperands; |
3418 | 0 | break; |
3419 | 0 | case CVT_regCR0LT: |
3420 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3421 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3422 | 0 | ++NumMCOperands; |
3423 | 0 | break; |
3424 | 0 | case CVT_regZERO8: |
3425 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3426 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3427 | 0 | ++NumMCOperands; |
3428 | 0 | break; |
3429 | 0 | case CVT_regZERO: |
3430 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3431 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3432 | 0 | ++NumMCOperands; |
3433 | 0 | break; |
3434 | 0 | case CVT_95_addRegG8pRCOperands: |
3435 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3436 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3437 | 0 | NumMCOperands += 1; |
3438 | 0 | break; |
3439 | 0 | case CVT_imm_95_1: |
3440 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3441 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3442 | 0 | ++NumMCOperands; |
3443 | 0 | break; |
3444 | 0 | case CVT_95_addRegVFRCOperands: |
3445 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3446 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3447 | 0 | NumMCOperands += 1; |
3448 | 0 | break; |
3449 | 0 | case CVT_95_addRegVSFRCOperands: |
3450 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3451 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3452 | 0 | NumMCOperands += 1; |
3453 | 0 | break; |
3454 | 0 | case CVT_95_addRegVSSRCOperands: |
3455 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3456 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3457 | 0 | NumMCOperands += 1; |
3458 | 0 | break; |
3459 | 0 | case CVT_95_addRegVSRCOperands: |
3460 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3461 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3462 | 0 | NumMCOperands += 1; |
3463 | 0 | break; |
3464 | 0 | case CVT_imm_95_29: |
3465 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3466 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3467 | 0 | ++NumMCOperands; |
3468 | 0 | break; |
3469 | 0 | case CVT_imm_95_280: |
3470 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3471 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3472 | 0 | ++NumMCOperands; |
3473 | 0 | break; |
3474 | 0 | case CVT_imm_95_128: |
3475 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3476 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3477 | 0 | ++NumMCOperands; |
3478 | 0 | break; |
3479 | 0 | case CVT_imm_95_129: |
3480 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3481 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3482 | 0 | ++NumMCOperands; |
3483 | 0 | break; |
3484 | 0 | case CVT_imm_95_130: |
3485 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3486 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3487 | 0 | ++NumMCOperands; |
3488 | 0 | break; |
3489 | 0 | case CVT_imm_95_131: |
3490 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3491 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3492 | 0 | ++NumMCOperands; |
3493 | 0 | break; |
3494 | 0 | case CVT_imm_95_132: |
3495 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3496 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3497 | 0 | ++NumMCOperands; |
3498 | 0 | break; |
3499 | 0 | case CVT_imm_95_133: |
3500 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3501 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3502 | 0 | ++NumMCOperands; |
3503 | 0 | break; |
3504 | 0 | case CVT_imm_95_134: |
3505 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3506 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3507 | 0 | ++NumMCOperands; |
3508 | 0 | break; |
3509 | 0 | case CVT_imm_95_135: |
3510 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3511 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3512 | 0 | ++NumMCOperands; |
3513 | 0 | break; |
3514 | 0 | case CVT_imm_95_28: |
3515 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3516 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3517 | 0 | ++NumMCOperands; |
3518 | 0 | break; |
3519 | 0 | case CVT_imm_95_9: |
3520 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3521 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3522 | 0 | ++NumMCOperands; |
3523 | 0 | break; |
3524 | 0 | case CVT_imm_95_19: |
3525 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3526 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3527 | 0 | ++NumMCOperands; |
3528 | 0 | break; |
3529 | 0 | case CVT_imm_95_537: |
3530 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3531 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3532 | 0 | ++NumMCOperands; |
3533 | 0 | break; |
3534 | 0 | case CVT_imm_95_539: |
3535 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3536 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3537 | 0 | ++NumMCOperands; |
3538 | 0 | break; |
3539 | 0 | case CVT_imm_95_541: |
3540 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3541 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3542 | 0 | ++NumMCOperands; |
3543 | 0 | break; |
3544 | 0 | case CVT_imm_95_543: |
3545 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3546 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3547 | 0 | ++NumMCOperands; |
3548 | 0 | break; |
3549 | 0 | case CVT_imm_95_536: |
3550 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3551 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3552 | 0 | ++NumMCOperands; |
3553 | 0 | break; |
3554 | 0 | case CVT_imm_95_538: |
3555 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3556 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3557 | 0 | ++NumMCOperands; |
3558 | 0 | break; |
3559 | 0 | case CVT_imm_95_540: |
3560 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3561 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3562 | 0 | ++NumMCOperands; |
3563 | 0 | break; |
3564 | 0 | case CVT_imm_95_542: |
3565 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3566 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3567 | 0 | ++NumMCOperands; |
3568 | 0 | break; |
3569 | 0 | case CVT_imm_95_1018: |
3570 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3571 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3572 | 0 | ++NumMCOperands; |
3573 | 0 | break; |
3574 | 0 | case CVT_imm_95_981: |
3575 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3576 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3577 | 0 | ++NumMCOperands; |
3578 | 0 | break; |
3579 | 0 | case CVT_imm_95_22: |
3580 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3581 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3582 | 0 | ++NumMCOperands; |
3583 | 0 | break; |
3584 | 0 | case CVT_imm_95_17: |
3585 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3586 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3587 | 0 | ++NumMCOperands; |
3588 | 0 | break; |
3589 | 0 | case CVT_imm_95_18: |
3590 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3591 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3592 | 0 | ++NumMCOperands; |
3593 | 0 | break; |
3594 | 0 | case CVT_imm_95_980: |
3595 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3596 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3597 | 0 | ++NumMCOperands; |
3598 | 0 | break; |
3599 | 0 | case CVT_imm_95_529: |
3600 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3601 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3602 | 0 | ++NumMCOperands; |
3603 | 0 | break; |
3604 | 0 | case CVT_imm_95_531: |
3605 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3606 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3607 | 0 | ++NumMCOperands; |
3608 | 0 | break; |
3609 | 0 | case CVT_imm_95_533: |
3610 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3611 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3612 | 0 | ++NumMCOperands; |
3613 | 0 | break; |
3614 | 0 | case CVT_imm_95_535: |
3615 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3616 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3617 | 0 | ++NumMCOperands; |
3618 | 0 | break; |
3619 | 0 | case CVT_imm_95_528: |
3620 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3621 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3622 | 0 | ++NumMCOperands; |
3623 | 0 | break; |
3624 | 0 | case CVT_imm_95_530: |
3625 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3626 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3627 | 0 | ++NumMCOperands; |
3628 | 0 | break; |
3629 | 0 | case CVT_imm_95_532: |
3630 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3631 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3632 | 0 | ++NumMCOperands; |
3633 | 0 | break; |
3634 | 0 | case CVT_imm_95_534: |
3635 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3636 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3637 | 0 | ++NumMCOperands; |
3638 | 0 | break; |
3639 | 0 | case CVT_imm_95_1019: |
3640 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3641 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3642 | 0 | ++NumMCOperands; |
3643 | 0 | break; |
3644 | 0 | case CVT_95_addCRBitMaskOperands: |
3645 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3646 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3647 | 0 | NumMCOperands += 1; |
3648 | 0 | break; |
3649 | 0 | case CVT_imm_95_48: |
3650 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3651 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3652 | 0 | ++NumMCOperands; |
3653 | 0 | break; |
3654 | 0 | case CVT_imm_95_896: |
3655 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3656 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3657 | 0 | ++NumMCOperands; |
3658 | 0 | break; |
3659 | 0 | case CVT_imm_95_287: |
3660 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3661 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3662 | 0 | ++NumMCOperands; |
3663 | 0 | break; |
3664 | 0 | case CVT_imm_95_5: |
3665 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3666 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3667 | 0 | ++NumMCOperands; |
3668 | 0 | break; |
3669 | 0 | case CVT_imm_95_25: |
3670 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3671 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3672 | 0 | ++NumMCOperands; |
3673 | 0 | break; |
3674 | 0 | case CVT_imm_95_512: |
3675 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3676 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3677 | 0 | ++NumMCOperands; |
3678 | 0 | break; |
3679 | 0 | case CVT_imm_95_272: |
3680 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3681 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3682 | 0 | ++NumMCOperands; |
3683 | 0 | break; |
3684 | 0 | case CVT_imm_95_273: |
3685 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3686 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3687 | 0 | ++NumMCOperands; |
3688 | 0 | break; |
3689 | 0 | case CVT_imm_95_274: |
3690 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3691 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3692 | 0 | ++NumMCOperands; |
3693 | 0 | break; |
3694 | 0 | case CVT_imm_95_275: |
3695 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3696 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3697 | 0 | ++NumMCOperands; |
3698 | 0 | break; |
3699 | 0 | case CVT_imm_95_260: |
3700 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3701 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3702 | 0 | ++NumMCOperands; |
3703 | 0 | break; |
3704 | 0 | case CVT_imm_95_261: |
3705 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3706 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3707 | 0 | ++NumMCOperands; |
3708 | 0 | break; |
3709 | 0 | case CVT_imm_95_262: |
3710 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3711 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3712 | 0 | ++NumMCOperands; |
3713 | 0 | break; |
3714 | 0 | case CVT_imm_95_263: |
3715 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3716 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3717 | 0 | ++NumMCOperands; |
3718 | 0 | break; |
3719 | 0 | case CVT_imm_95_26: |
3720 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3721 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3722 | 0 | ++NumMCOperands; |
3723 | 0 | break; |
3724 | 0 | case CVT_imm_95_27: |
3725 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3726 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3727 | 0 | ++NumMCOperands; |
3728 | 0 | break; |
3729 | 0 | case CVT_imm_95_990: |
3730 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3731 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3732 | 0 | ++NumMCOperands; |
3733 | 0 | break; |
3734 | 0 | case CVT_imm_95_991: |
3735 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3736 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3737 | 0 | ++NumMCOperands; |
3738 | 0 | break; |
3739 | 0 | case CVT_imm_95_268: |
3740 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3741 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3742 | 0 | ++NumMCOperands; |
3743 | 0 | break; |
3744 | 0 | case CVT_imm_95_988: |
3745 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3746 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3747 | 0 | ++NumMCOperands; |
3748 | 0 | break; |
3749 | 0 | case CVT_imm_95_989: |
3750 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3751 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3752 | 0 | ++NumMCOperands; |
3753 | 0 | break; |
3754 | 0 | case CVT_imm_95_269: |
3755 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3756 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3757 | 0 | ++NumMCOperands; |
3758 | 0 | break; |
3759 | 0 | case CVT_imm_95_986: |
3760 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3761 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3762 | 0 | ++NumMCOperands; |
3763 | 0 | break; |
3764 | 0 | case CVT_imm_95_13: |
3765 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3766 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3767 | 0 | ++NumMCOperands; |
3768 | 0 | break; |
3769 | 0 | case CVT_imm_95_255: |
3770 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3771 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3772 | 0 | ++NumMCOperands; |
3773 | 0 | break; |
3774 | 0 | case CVT_imm_95_284: |
3775 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3776 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3777 | 0 | ++NumMCOperands; |
3778 | 0 | break; |
3779 | 0 | case CVT_imm_95_285: |
3780 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3781 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3782 | 0 | ++NumMCOperands; |
3783 | 0 | break; |
3784 | 0 | case CVT_regX0: |
3785 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3786 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3787 | 0 | ++NumMCOperands; |
3788 | 0 | break; |
3789 | 0 | case CVT_95_addRegVSRpEvenRCOperands: |
3790 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3791 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3792 | 0 | NumMCOperands += 1; |
3793 | 0 | break; |
3794 | 0 | case CVT_imm_95_20: |
3795 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3796 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3797 | 0 | ++NumMCOperands; |
3798 | 0 | break; |
3799 | 0 | case CVT_imm_95_16: |
3800 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3801 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3802 | 0 | ++NumMCOperands; |
3803 | 0 | break; |
3804 | 0 | case CVT_imm_95_24: |
3805 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3806 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3807 | 0 | ++NumMCOperands; |
3808 | 0 | break; |
3809 | 0 | } |
3810 | 0 | } |
3811 | 0 | } |
3812 | | |
3813 | | namespace { |
3814 | | |
3815 | | /// MatchClassKind - The kinds of classes which participate in |
3816 | | /// instruction matching. |
3817 | | enum MatchClassKind { |
3818 | | InvalidMatchClass = 0, |
3819 | | OptionalMatchClass = 1, |
3820 | | MCK__DOT_, // '.' |
3821 | | MCK_0, // '0' |
3822 | | MCK_1, // '1' |
3823 | | MCK_2, // '2' |
3824 | | MCK_3, // '3' |
3825 | | MCK_4, // '4' |
3826 | | MCK_5, // '5' |
3827 | | MCK_6, // '6' |
3828 | | MCK_7, // '7' |
3829 | | MCK_crD, // 'crD' |
3830 | | MCK_LAST_TOKEN = MCK_crD, |
3831 | | MCK_CTRRC, // register class 'CTRRC' |
3832 | | MCK_CTRRC8, // register class 'CTRRC8' |
3833 | | MCK_LR8RC, // register class 'LR8RC' |
3834 | | MCK_LRRC, // register class 'LRRC' |
3835 | | MCK_VRSAVERC, // register class 'VRSAVERC' |
3836 | | MCK_CARRYRC, // register class 'CARRYRC' |
3837 | | MCK_Reg43, // derived register class |
3838 | | MCK_Reg40, // derived register class |
3839 | | MCK_Reg44, // derived register class |
3840 | | MCK_Reg41, // derived register class |
3841 | | MCK_DMRpRC, // register class 'DMRpRC' |
3842 | | MCK_Reg24, // derived register class |
3843 | | MCK_Reg14, // derived register class |
3844 | | MCK_ACCRC, // register class 'ACCRC' |
3845 | | MCK_CRRC, // register class 'CRRC' |
3846 | | MCK_DMRRC, // register class 'DMRRC' |
3847 | | MCK_UACCRC, // register class 'UACCRC' |
3848 | | MCK_WACCRC, // register class 'WACCRC' |
3849 | | MCK_WACC_HIRC, // register class 'WACC_HIRC' |
3850 | | MCK_Reg28, // derived register class |
3851 | | MCK_Reg22, // derived register class |
3852 | | MCK_Reg10, // derived register class |
3853 | | MCK_Reg31, // derived register class |
3854 | | MCK_Reg29, // derived register class |
3855 | | MCK_Reg25, // derived register class |
3856 | | MCK_FpRC, // register class 'FpRC' |
3857 | | MCK_G8pRC, // register class 'G8pRC' |
3858 | | MCK_Reg27, // derived register class |
3859 | | MCK_Reg18, // derived register class |
3860 | | MCK_Reg16, // derived register class |
3861 | | MCK_Reg9, // derived register class |
3862 | | MCK_CRBITRC, // register class 'CRBITRC' |
3863 | | MCK_DMRROWpRC, // register class 'DMRROWpRC' |
3864 | | MCK_F4RC, // register class 'F4RC,F8RC' |
3865 | | MCK_GPRC32, // register class 'GPRC32' |
3866 | | MCK_SPERC, // register class 'SPERC' |
3867 | | MCK_VFRC, // register class 'VFRC' |
3868 | | MCK_VRRC, // register class 'VRRC' |
3869 | | MCK_VSLRC, // register class 'VSLRC' |
3870 | | MCK_VSRpRC, // register class 'VSRpRC' |
3871 | | MCK_Reg7, // derived register class |
3872 | | MCK_Reg2, // derived register class |
3873 | | MCK_Reg21, // derived register class |
3874 | | MCK_Reg13, // derived register class |
3875 | | MCK_G8RC, // register class 'G8RC' |
3876 | | MCK_G8RC_NOX0, // register class 'G8RC_NOX0' |
3877 | | MCK_GPRC, // register class 'GPRC' |
3878 | | MCK_GPRC_NOR0, // register class 'GPRC_NOR0' |
3879 | | MCK_DMRROWRC, // register class 'DMRROWRC' |
3880 | | MCK_VSRC, // register class 'VSRC' |
3881 | | MCK_VSSRC, // register class 'VSSRC,VSFRC' |
3882 | | MCK_SPILLTOVSRRC, // register class 'SPILLTOVSRRC' |
3883 | | MCK_LAST_REGISTER = MCK_SPILLTOVSRRC, |
3884 | | MCK_Imm, // user defined class 'ImmAsmOperand' |
3885 | | MCK_ATBitsAsHint, // user defined class 'PPCATBitsAsHintAsmOperand' |
3886 | | MCK_CRBitMask, // user defined class 'PPCCRBitMaskOperand' |
3887 | | MCK_CondBr, // user defined class 'PPCCondBrAsmOperand' |
3888 | | MCK_DirectBr, // user defined class 'PPCDirectBrAsmOperand' |
3889 | | MCK_DispRI34, // user defined class 'PPCDispRI34Operand' |
3890 | | MCK_DispRIHash, // user defined class 'PPCDispRIHashOperand' |
3891 | | MCK_DispRI, // user defined class 'PPCDispRIOperand' |
3892 | | MCK_DispRIX16, // user defined class 'PPCDispRIX16Operand' |
3893 | | MCK_DispRIX, // user defined class 'PPCDispRIXOperand' |
3894 | | MCK_DispSPE2, // user defined class 'PPCDispSPE2Operand' |
3895 | | MCK_DispSPE4, // user defined class 'PPCDispSPE4Operand' |
3896 | | MCK_DispSPE8, // user defined class 'PPCDispSPE8Operand' |
3897 | | MCK_ImmZero, // user defined class 'PPCImmZeroAsmOperand' |
3898 | | MCK_RegACCRC, // user defined class 'PPCRegACCRCAsmOperand' |
3899 | | MCK_RegCRBITRC, // user defined class 'PPCRegCRBITRCAsmOperand' |
3900 | | MCK_RegCRRC, // user defined class 'PPCRegCRRCAsmOperand' |
3901 | | MCK_RegDMRRC, // user defined class 'PPCRegDMRRCAsmOperand' |
3902 | | MCK_RegDMRROWRC, // user defined class 'PPCRegDMRROWRCAsmOperand' |
3903 | | MCK_RegDMRROWpRC, // user defined class 'PPCRegDMRROWpRCAsmOperand' |
3904 | | MCK_RegDMRpRC, // user defined class 'PPCRegDMRpRCAsmOperand' |
3905 | | MCK_RegF4RC, // user defined class 'PPCRegF4RCAsmOperand' |
3906 | | MCK_RegF8RC, // user defined class 'PPCRegF8RCAsmOperand' |
3907 | | MCK_RegFpRC, // user defined class 'PPCRegFpRCAsmOperand' |
3908 | | MCK_RegG8RC, // user defined class 'PPCRegG8RCAsmOperand' |
3909 | | MCK_RegG8RCNoX0, // user defined class 'PPCRegG8RCNoX0AsmOperand' |
3910 | | MCK_RegG8pRC, // user defined class 'PPCRegG8pRCAsmOperand' |
3911 | | MCK_RegGPRC, // user defined class 'PPCRegGPRCAsmOperand' |
3912 | | MCK_RegGPRCNoR0, // user defined class 'PPCRegGPRCNoR0AsmOperand' |
3913 | | MCK_RegGxRCNoR0, // user defined class 'PPCRegGxRCNoR0Operand' |
3914 | | MCK_RegGxRC, // user defined class 'PPCRegGxRCOperand' |
3915 | | MCK_RegSPE4RC, // user defined class 'PPCRegSPE4RCAsmOperand' |
3916 | | MCK_RegSPERC, // user defined class 'PPCRegSPERCAsmOperand' |
3917 | | MCK_RegSPILLTOVSRRC, // user defined class 'PPCRegSPILLTOVSRRCAsmOperand' |
3918 | | MCK_RegVFRC, // user defined class 'PPCRegVFRCAsmOperand' |
3919 | | MCK_RegVRRC, // user defined class 'PPCRegVRRCAsmOperand' |
3920 | | MCK_RegVSFRC, // user defined class 'PPCRegVSFRCAsmOperand' |
3921 | | MCK_RegVSRC, // user defined class 'PPCRegVSRCAsmOperand' |
3922 | | MCK_RegVSRpEvenRC, // user defined class 'PPCRegVSRpEvenRCAsmOperand' |
3923 | | MCK_RegVSRpRC, // user defined class 'PPCRegVSRpRCAsmOperand' |
3924 | | MCK_RegVSSRC, // user defined class 'PPCRegVSSRCAsmOperand' |
3925 | | MCK_S16Imm, // user defined class 'PPCS16ImmAsmOperand' |
3926 | | MCK_S17Imm, // user defined class 'PPCS17ImmAsmOperand' |
3927 | | MCK_S34Imm, // user defined class 'PPCS34ImmAsmOperand' |
3928 | | MCK_S5Imm, // user defined class 'PPCS5ImmAsmOperand' |
3929 | | MCK_TLSReg, // user defined class 'PPCTLSRegOperand' |
3930 | | MCK_U10Imm, // user defined class 'PPCU10ImmAsmOperand' |
3931 | | MCK_U12Imm, // user defined class 'PPCU12ImmAsmOperand' |
3932 | | MCK_U16Imm, // user defined class 'PPCU16ImmAsmOperand' |
3933 | | MCK_U1Imm, // user defined class 'PPCU1ImmAsmOperand' |
3934 | | MCK_U2Imm, // user defined class 'PPCU2ImmAsmOperand' |
3935 | | MCK_U3Imm, // user defined class 'PPCU3ImmAsmOperand' |
3936 | | MCK_U4Imm, // user defined class 'PPCU4ImmAsmOperand' |
3937 | | MCK_U5Imm, // user defined class 'PPCU5ImmAsmOperand' |
3938 | | MCK_U6Imm, // user defined class 'PPCU6ImmAsmOperand' |
3939 | | MCK_U7Imm, // user defined class 'PPCU7ImmAsmOperand' |
3940 | | MCK_U8Imm, // user defined class 'PPCU8ImmAsmOperand' |
3941 | | NumMatchClassKinds |
3942 | | }; |
3943 | | |
3944 | | } // end anonymous namespace |
3945 | | |
3946 | 0 | static unsigned getDiagKindFromRegisterClass(MatchClassKind RegisterClass) { |
3947 | 0 | return MCTargetAsmParser::Match_InvalidOperand; |
3948 | 0 | } |
3949 | | |
3950 | 0 | static MatchClassKind matchTokenString(StringRef Name) { |
3951 | 0 | switch (Name.size()) { |
3952 | 0 | default: break; |
3953 | 0 | case 1: // 9 strings to match. |
3954 | 0 | switch (Name[0]) { |
3955 | 0 | default: break; |
3956 | 0 | case '.': // 1 string to match. |
3957 | 0 | return MCK__DOT_; // "." |
3958 | 0 | case '0': // 1 string to match. |
3959 | 0 | return MCK_0; // "0" |
3960 | 0 | case '1': // 1 string to match. |
3961 | 0 | return MCK_1; // "1" |
3962 | 0 | case '2': // 1 string to match. |
3963 | 0 | return MCK_2; // "2" |
3964 | 0 | case '3': // 1 string to match. |
3965 | 0 | return MCK_3; // "3" |
3966 | 0 | case '4': // 1 string to match. |
3967 | 0 | return MCK_4; // "4" |
3968 | 0 | case '5': // 1 string to match. |
3969 | 0 | return MCK_5; // "5" |
3970 | 0 | case '6': // 1 string to match. |
3971 | 0 | return MCK_6; // "6" |
3972 | 0 | case '7': // 1 string to match. |
3973 | 0 | return MCK_7; // "7" |
3974 | 0 | } |
3975 | 0 | break; |
3976 | 0 | case 3: // 1 string to match. |
3977 | 0 | if (memcmp(Name.data()+0, "crD", 3) != 0) |
3978 | 0 | break; |
3979 | 0 | return MCK_crD; // "crD" |
3980 | 0 | } |
3981 | 0 | return InvalidMatchClass; |
3982 | 0 | } |
3983 | | |
3984 | | /// isSubclass - Compute whether \p A is a subclass of \p B. |
3985 | 0 | static bool isSubclass(MatchClassKind A, MatchClassKind B) { |
3986 | 0 | if (A == B) |
3987 | 0 | return true; |
3988 | | |
3989 | 0 | switch (A) { |
3990 | 0 | default: |
3991 | 0 | return false; |
3992 | | |
3993 | 0 | case MCK_Reg43: |
3994 | 0 | switch (B) { |
3995 | 0 | default: return false; |
3996 | 0 | case MCK_Reg44: return true; |
3997 | 0 | case MCK_UACCRC: return true; |
3998 | 0 | } |
3999 | | |
4000 | 0 | case MCK_Reg40: |
4001 | 0 | switch (B) { |
4002 | 0 | default: return false; |
4003 | 0 | case MCK_Reg41: return true; |
4004 | 0 | case MCK_ACCRC: return true; |
4005 | 0 | } |
4006 | | |
4007 | 0 | case MCK_Reg44: |
4008 | 0 | return B == MCK_UACCRC; |
4009 | | |
4010 | 0 | case MCK_Reg41: |
4011 | 0 | return B == MCK_ACCRC; |
4012 | | |
4013 | 0 | case MCK_Reg24: |
4014 | 0 | switch (B) { |
4015 | 0 | default: return false; |
4016 | 0 | case MCK_Reg25: return true; |
4017 | 0 | case MCK_Reg27: return true; |
4018 | 0 | case MCK_VSRpRC: return true; |
4019 | 0 | } |
4020 | | |
4021 | 0 | case MCK_Reg14: |
4022 | 0 | return B == MCK_FpRC; |
4023 | | |
4024 | 0 | case MCK_Reg28: |
4025 | 0 | switch (B) { |
4026 | 0 | default: return false; |
4027 | 0 | case MCK_Reg29: return true; |
4028 | 0 | case MCK_Reg27: return true; |
4029 | 0 | case MCK_VSRpRC: return true; |
4030 | 0 | } |
4031 | | |
4032 | 0 | case MCK_Reg22: |
4033 | 0 | switch (B) { |
4034 | 0 | default: return false; |
4035 | 0 | case MCK_VSLRC: return true; |
4036 | 0 | case MCK_Reg21: return true; |
4037 | 0 | case MCK_VSRC: return true; |
4038 | 0 | } |
4039 | | |
4040 | 0 | case MCK_Reg10: |
4041 | 0 | switch (B) { |
4042 | 0 | default: return false; |
4043 | 0 | case MCK_F4RC: return true; |
4044 | 0 | case MCK_Reg13: return true; |
4045 | 0 | case MCK_VSSRC: return true; |
4046 | 0 | case MCK_SPILLTOVSRRC: return true; |
4047 | 0 | } |
4048 | | |
4049 | 0 | case MCK_Reg31: |
4050 | 0 | return B == MCK_G8pRC; |
4051 | | |
4052 | 0 | case MCK_Reg29: |
4053 | 0 | return B == MCK_VSRpRC; |
4054 | | |
4055 | 0 | case MCK_Reg25: |
4056 | 0 | return B == MCK_VSRpRC; |
4057 | | |
4058 | 0 | case MCK_Reg27: |
4059 | 0 | return B == MCK_VSRpRC; |
4060 | | |
4061 | 0 | case MCK_Reg18: |
4062 | 0 | switch (B) { |
4063 | 0 | default: return false; |
4064 | 0 | case MCK_VRRC: return true; |
4065 | 0 | case MCK_Reg21: return true; |
4066 | 0 | case MCK_VSRC: return true; |
4067 | 0 | } |
4068 | | |
4069 | 0 | case MCK_Reg16: |
4070 | 0 | switch (B) { |
4071 | 0 | default: return false; |
4072 | 0 | case MCK_VFRC: return true; |
4073 | 0 | case MCK_Reg13: return true; |
4074 | 0 | case MCK_VSSRC: return true; |
4075 | 0 | case MCK_SPILLTOVSRRC: return true; |
4076 | 0 | } |
4077 | | |
4078 | 0 | case MCK_Reg9: |
4079 | 0 | return B == MCK_SPERC; |
4080 | | |
4081 | 0 | case MCK_F4RC: |
4082 | 0 | return B == MCK_VSSRC; |
4083 | | |
4084 | 0 | case MCK_VFRC: |
4085 | 0 | return B == MCK_VSSRC; |
4086 | | |
4087 | 0 | case MCK_VRRC: |
4088 | 0 | return B == MCK_VSRC; |
4089 | | |
4090 | 0 | case MCK_VSLRC: |
4091 | 0 | return B == MCK_VSRC; |
4092 | | |
4093 | 0 | case MCK_Reg7: |
4094 | 0 | switch (B) { |
4095 | 0 | default: return false; |
4096 | 0 | case MCK_G8RC: return true; |
4097 | 0 | case MCK_G8RC_NOX0: return true; |
4098 | 0 | case MCK_SPILLTOVSRRC: return true; |
4099 | 0 | } |
4100 | | |
4101 | 0 | case MCK_Reg2: |
4102 | 0 | switch (B) { |
4103 | 0 | default: return false; |
4104 | 0 | case MCK_GPRC: return true; |
4105 | 0 | case MCK_GPRC_NOR0: return true; |
4106 | 0 | } |
4107 | | |
4108 | 0 | case MCK_Reg21: |
4109 | 0 | return B == MCK_VSRC; |
4110 | | |
4111 | 0 | case MCK_Reg13: |
4112 | 0 | switch (B) { |
4113 | 0 | default: return false; |
4114 | 0 | case MCK_VSSRC: return true; |
4115 | 0 | case MCK_SPILLTOVSRRC: return true; |
4116 | 0 | } |
4117 | | |
4118 | 0 | case MCK_G8RC: |
4119 | 0 | return B == MCK_SPILLTOVSRRC; |
4120 | 0 | } |
4121 | 0 | } |
4122 | | |
4123 | 0 | static unsigned validateOperandClass(MCParsedAsmOperand &GOp, MatchClassKind Kind) { |
4124 | 0 | PPCOperand &Operand = (PPCOperand &)GOp; |
4125 | 0 | if (Kind == InvalidMatchClass) |
4126 | 0 | return MCTargetAsmParser::Match_InvalidOperand; |
4127 | | |
4128 | 0 | if (Operand.isToken() && Kind <= MCK_LAST_TOKEN) |
4129 | 0 | return isSubclass(matchTokenString(Operand.getToken()), Kind) ? |
4130 | 0 | MCTargetAsmParser::Match_Success : |
4131 | 0 | MCTargetAsmParser::Match_InvalidOperand; |
4132 | | |
4133 | 0 | switch (Kind) { |
4134 | 0 | default: break; |
4135 | | // 'Imm' class |
4136 | 0 | case MCK_Imm: { |
4137 | 0 | DiagnosticPredicate DP(Operand.isImm()); |
4138 | 0 | if (DP.isMatch()) |
4139 | 0 | return MCTargetAsmParser::Match_Success; |
4140 | 0 | break; |
4141 | 0 | } |
4142 | | // 'ATBitsAsHint' class |
4143 | 0 | case MCK_ATBitsAsHint: { |
4144 | 0 | DiagnosticPredicate DP(Operand.isATBitsAsHint()); |
4145 | 0 | if (DP.isMatch()) |
4146 | 0 | return MCTargetAsmParser::Match_Success; |
4147 | 0 | break; |
4148 | 0 | } |
4149 | | // 'CRBitMask' class |
4150 | 0 | case MCK_CRBitMask: { |
4151 | 0 | DiagnosticPredicate DP(Operand.isCRBitMask()); |
4152 | 0 | if (DP.isMatch()) |
4153 | 0 | return MCTargetAsmParser::Match_Success; |
4154 | 0 | break; |
4155 | 0 | } |
4156 | | // 'CondBr' class |
4157 | 0 | case MCK_CondBr: { |
4158 | 0 | DiagnosticPredicate DP(Operand.isCondBr()); |
4159 | 0 | if (DP.isMatch()) |
4160 | 0 | return MCTargetAsmParser::Match_Success; |
4161 | 0 | break; |
4162 | 0 | } |
4163 | | // 'DirectBr' class |
4164 | 0 | case MCK_DirectBr: { |
4165 | 0 | DiagnosticPredicate DP(Operand.isDirectBr()); |
4166 | 0 | if (DP.isMatch()) |
4167 | 0 | return MCTargetAsmParser::Match_Success; |
4168 | 0 | break; |
4169 | 0 | } |
4170 | | // 'DispRI34' class |
4171 | 0 | case MCK_DispRI34: { |
4172 | 0 | DiagnosticPredicate DP(Operand.isS34Imm()); |
4173 | 0 | if (DP.isMatch()) |
4174 | 0 | return MCTargetAsmParser::Match_Success; |
4175 | 0 | break; |
4176 | 0 | } |
4177 | | // 'DispRIHash' class |
4178 | 0 | case MCK_DispRIHash: { |
4179 | 0 | DiagnosticPredicate DP(Operand.isHashImmX8()); |
4180 | 0 | if (DP.isMatch()) |
4181 | 0 | return MCTargetAsmParser::Match_Success; |
4182 | 0 | break; |
4183 | 0 | } |
4184 | | // 'DispRI' class |
4185 | 0 | case MCK_DispRI: { |
4186 | 0 | DiagnosticPredicate DP(Operand.isS16Imm()); |
4187 | 0 | if (DP.isMatch()) |
4188 | 0 | return MCTargetAsmParser::Match_Success; |
4189 | 0 | break; |
4190 | 0 | } |
4191 | | // 'DispRIX16' class |
4192 | 0 | case MCK_DispRIX16: { |
4193 | 0 | DiagnosticPredicate DP(Operand.isS16ImmX16()); |
4194 | 0 | if (DP.isMatch()) |
4195 | 0 | return MCTargetAsmParser::Match_Success; |
4196 | 0 | break; |
4197 | 0 | } |
4198 | | // 'DispRIX' class |
4199 | 0 | case MCK_DispRIX: { |
4200 | 0 | DiagnosticPredicate DP(Operand.isS16ImmX4()); |
4201 | 0 | if (DP.isMatch()) |
4202 | 0 | return MCTargetAsmParser::Match_Success; |
4203 | 0 | break; |
4204 | 0 | } |
4205 | | // 'DispSPE2' class |
4206 | 0 | case MCK_DispSPE2: { |
4207 | 0 | DiagnosticPredicate DP(Operand.isU6ImmX2()); |
4208 | 0 | if (DP.isMatch()) |
4209 | 0 | return MCTargetAsmParser::Match_Success; |
4210 | 0 | break; |
4211 | 0 | } |
4212 | | // 'DispSPE4' class |
4213 | 0 | case MCK_DispSPE4: { |
4214 | 0 | DiagnosticPredicate DP(Operand.isU7ImmX4()); |
4215 | 0 | if (DP.isMatch()) |
4216 | 0 | return MCTargetAsmParser::Match_Success; |
4217 | 0 | break; |
4218 | 0 | } |
4219 | | // 'DispSPE8' class |
4220 | 0 | case MCK_DispSPE8: { |
4221 | 0 | DiagnosticPredicate DP(Operand.isU8ImmX8()); |
4222 | 0 | if (DP.isMatch()) |
4223 | 0 | return MCTargetAsmParser::Match_Success; |
4224 | 0 | break; |
4225 | 0 | } |
4226 | | // 'ImmZero' class |
4227 | 0 | case MCK_ImmZero: { |
4228 | 0 | DiagnosticPredicate DP(Operand.isImmZero()); |
4229 | 0 | if (DP.isMatch()) |
4230 | 0 | return MCTargetAsmParser::Match_Success; |
4231 | 0 | break; |
4232 | 0 | } |
4233 | | // 'RegACCRC' class |
4234 | 0 | case MCK_RegACCRC: { |
4235 | 0 | DiagnosticPredicate DP(Operand.isACCRegNumber()); |
4236 | 0 | if (DP.isMatch()) |
4237 | 0 | return MCTargetAsmParser::Match_Success; |
4238 | 0 | break; |
4239 | 0 | } |
4240 | | // 'RegCRBITRC' class |
4241 | 0 | case MCK_RegCRBITRC: { |
4242 | 0 | DiagnosticPredicate DP(Operand.isCRBitNumber()); |
4243 | 0 | if (DP.isMatch()) |
4244 | 0 | return MCTargetAsmParser::Match_Success; |
4245 | 0 | break; |
4246 | 0 | } |
4247 | | // 'RegCRRC' class |
4248 | 0 | case MCK_RegCRRC: { |
4249 | 0 | DiagnosticPredicate DP(Operand.isCCRegNumber()); |
4250 | 0 | if (DP.isMatch()) |
4251 | 0 | return MCTargetAsmParser::Match_Success; |
4252 | 0 | break; |
4253 | 0 | } |
4254 | | // 'RegDMRRC' class |
4255 | 0 | case MCK_RegDMRRC: { |
4256 | 0 | DiagnosticPredicate DP(Operand.isDMRRegNumber()); |
4257 | 0 | if (DP.isMatch()) |
4258 | 0 | return MCTargetAsmParser::Match_Success; |
4259 | 0 | break; |
4260 | 0 | } |
4261 | | // 'RegDMRROWRC' class |
4262 | 0 | case MCK_RegDMRROWRC: { |
4263 | 0 | DiagnosticPredicate DP(Operand.isDMRROWRegNumber()); |
4264 | 0 | if (DP.isMatch()) |
4265 | 0 | return MCTargetAsmParser::Match_Success; |
4266 | 0 | break; |
4267 | 0 | } |
4268 | | // 'RegDMRROWpRC' class |
4269 | 0 | case MCK_RegDMRROWpRC: { |
4270 | 0 | DiagnosticPredicate DP(Operand.isDMRROWpRegNumber()); |
4271 | 0 | if (DP.isMatch()) |
4272 | 0 | return MCTargetAsmParser::Match_Success; |
4273 | 0 | break; |
4274 | 0 | } |
4275 | | // 'RegDMRpRC' class |
4276 | 0 | case MCK_RegDMRpRC: { |
4277 | 0 | DiagnosticPredicate DP(Operand.isDMRpRegNumber()); |
4278 | 0 | if (DP.isMatch()) |
4279 | 0 | return MCTargetAsmParser::Match_Success; |
4280 | 0 | break; |
4281 | 0 | } |
4282 | | // 'RegF4RC' class |
4283 | 0 | case MCK_RegF4RC: { |
4284 | 0 | DiagnosticPredicate DP(Operand.isRegNumber()); |
4285 | 0 | if (DP.isMatch()) |
4286 | 0 | return MCTargetAsmParser::Match_Success; |
4287 | 0 | break; |
4288 | 0 | } |
4289 | | // 'RegF8RC' class |
4290 | 0 | case MCK_RegF8RC: { |
4291 | 0 | DiagnosticPredicate DP(Operand.isRegNumber()); |
4292 | 0 | if (DP.isMatch()) |
4293 | 0 | return MCTargetAsmParser::Match_Success; |
4294 | 0 | break; |
4295 | 0 | } |
4296 | | // 'RegFpRC' class |
4297 | 0 | case MCK_RegFpRC: { |
4298 | 0 | DiagnosticPredicate DP(Operand.isEvenRegNumber()); |
4299 | 0 | if (DP.isMatch()) |
4300 | 0 | return MCTargetAsmParser::Match_Success; |
4301 | 0 | break; |
4302 | 0 | } |
4303 | | // 'RegG8RC' class |
4304 | 0 | case MCK_RegG8RC: { |
4305 | 0 | DiagnosticPredicate DP(Operand.isRegNumber()); |
4306 | 0 | if (DP.isMatch()) |
4307 | 0 | return MCTargetAsmParser::Match_Success; |
4308 | 0 | break; |
4309 | 0 | } |
4310 | | // 'RegG8RCNoX0' class |
4311 | 0 | case MCK_RegG8RCNoX0: { |
4312 | 0 | DiagnosticPredicate DP(Operand.isRegNumber()); |
4313 | 0 | if (DP.isMatch()) |
4314 | 0 | return MCTargetAsmParser::Match_Success; |
4315 | 0 | break; |
4316 | 0 | } |
4317 | | // 'RegG8pRC' class |
4318 | 0 | case MCK_RegG8pRC: { |
4319 | 0 | DiagnosticPredicate DP(Operand.isEvenRegNumber()); |
4320 | 0 | if (DP.isMatch()) |
4321 | 0 | return MCTargetAsmParser::Match_Success; |
4322 | 0 | break; |
4323 | 0 | } |
4324 | | // 'RegGPRC' class |
4325 | 0 | case MCK_RegGPRC: { |
4326 | 0 | DiagnosticPredicate DP(Operand.isRegNumber()); |
4327 | 0 | if (DP.isMatch()) |
4328 | 0 | return MCTargetAsmParser::Match_Success; |
4329 | 0 | break; |
4330 | 0 | } |
4331 | | // 'RegGPRCNoR0' class |
4332 | 0 | case MCK_RegGPRCNoR0: { |
4333 | 0 | DiagnosticPredicate DP(Operand.isRegNumber()); |
4334 | 0 | if (DP.isMatch()) |
4335 | 0 | return MCTargetAsmParser::Match_Success; |
4336 | 0 | break; |
4337 | 0 | } |
4338 | | // 'RegGxRCNoR0' class |
4339 | 0 | case MCK_RegGxRCNoR0: { |
4340 | 0 | DiagnosticPredicate DP(Operand.isRegNumber()); |
4341 | 0 | if (DP.isMatch()) |
4342 | 0 | return MCTargetAsmParser::Match_Success; |
4343 | 0 | break; |
4344 | 0 | } |
4345 | | // 'RegGxRC' class |
4346 | 0 | case MCK_RegGxRC: { |
4347 | 0 | DiagnosticPredicate DP(Operand.isRegNumber()); |
4348 | 0 | if (DP.isMatch()) |
4349 | 0 | return MCTargetAsmParser::Match_Success; |
4350 | 0 | break; |
4351 | 0 | } |
4352 | | // 'RegSPE4RC' class |
4353 | 0 | case MCK_RegSPE4RC: { |
4354 | 0 | DiagnosticPredicate DP(Operand.isRegNumber()); |
4355 | 0 | if (DP.isMatch()) |
4356 | 0 | return MCTargetAsmParser::Match_Success; |
4357 | 0 | break; |
4358 | 0 | } |
4359 | | // 'RegSPERC' class |
4360 | 0 | case MCK_RegSPERC: { |
4361 | 0 | DiagnosticPredicate DP(Operand.isRegNumber()); |
4362 | 0 | if (DP.isMatch()) |
4363 | 0 | return MCTargetAsmParser::Match_Success; |
4364 | 0 | break; |
4365 | 0 | } |
4366 | | // 'RegSPILLTOVSRRC' class |
4367 | 0 | case MCK_RegSPILLTOVSRRC: { |
4368 | 0 | DiagnosticPredicate DP(Operand.isVSRegNumber()); |
4369 | 0 | if (DP.isMatch()) |
4370 | 0 | return MCTargetAsmParser::Match_Success; |
4371 | 0 | break; |
4372 | 0 | } |
4373 | | // 'RegVFRC' class |
4374 | 0 | case MCK_RegVFRC: { |
4375 | 0 | DiagnosticPredicate DP(Operand.isRegNumber()); |
4376 | 0 | if (DP.isMatch()) |
4377 | 0 | return MCTargetAsmParser::Match_Success; |
4378 | 0 | break; |
4379 | 0 | } |
4380 | | // 'RegVRRC' class |
4381 | 0 | case MCK_RegVRRC: { |
4382 | 0 | DiagnosticPredicate DP(Operand.isRegNumber()); |
4383 | 0 | if (DP.isMatch()) |
4384 | 0 | return MCTargetAsmParser::Match_Success; |
4385 | 0 | break; |
4386 | 0 | } |
4387 | | // 'RegVSFRC' class |
4388 | 0 | case MCK_RegVSFRC: { |
4389 | 0 | DiagnosticPredicate DP(Operand.isVSRegNumber()); |
4390 | 0 | if (DP.isMatch()) |
4391 | 0 | return MCTargetAsmParser::Match_Success; |
4392 | 0 | break; |
4393 | 0 | } |
4394 | | // 'RegVSRC' class |
4395 | 0 | case MCK_RegVSRC: { |
4396 | 0 | DiagnosticPredicate DP(Operand.isVSRegNumber()); |
4397 | 0 | if (DP.isMatch()) |
4398 | 0 | return MCTargetAsmParser::Match_Success; |
4399 | 0 | break; |
4400 | 0 | } |
4401 | | // 'RegVSRpEvenRC' class |
4402 | 0 | case MCK_RegVSRpEvenRC: { |
4403 | 0 | DiagnosticPredicate DP(Operand.isVSRpEvenRegNumber()); |
4404 | 0 | if (DP.isMatch()) |
4405 | 0 | return MCTargetAsmParser::Match_Success; |
4406 | 0 | break; |
4407 | 0 | } |
4408 | | // 'RegVSRpRC' class |
4409 | 0 | case MCK_RegVSRpRC: { |
4410 | 0 | DiagnosticPredicate DP(Operand.isVSRpEvenRegNumber()); |
4411 | 0 | if (DP.isMatch()) |
4412 | 0 | return MCTargetAsmParser::Match_Success; |
4413 | 0 | break; |
4414 | 0 | } |
4415 | | // 'RegVSSRC' class |
4416 | 0 | case MCK_RegVSSRC: { |
4417 | 0 | DiagnosticPredicate DP(Operand.isVSRegNumber()); |
4418 | 0 | if (DP.isMatch()) |
4419 | 0 | return MCTargetAsmParser::Match_Success; |
4420 | 0 | break; |
4421 | 0 | } |
4422 | | // 'S16Imm' class |
4423 | 0 | case MCK_S16Imm: { |
4424 | 0 | DiagnosticPredicate DP(Operand.isS16Imm()); |
4425 | 0 | if (DP.isMatch()) |
4426 | 0 | return MCTargetAsmParser::Match_Success; |
4427 | 0 | break; |
4428 | 0 | } |
4429 | | // 'S17Imm' class |
4430 | 0 | case MCK_S17Imm: { |
4431 | 0 | DiagnosticPredicate DP(Operand.isS17Imm()); |
4432 | 0 | if (DP.isMatch()) |
4433 | 0 | return MCTargetAsmParser::Match_Success; |
4434 | 0 | break; |
4435 | 0 | } |
4436 | | // 'S34Imm' class |
4437 | 0 | case MCK_S34Imm: { |
4438 | 0 | DiagnosticPredicate DP(Operand.isS34Imm()); |
4439 | 0 | if (DP.isMatch()) |
4440 | 0 | return MCTargetAsmParser::Match_Success; |
4441 | 0 | break; |
4442 | 0 | } |
4443 | | // 'S5Imm' class |
4444 | 0 | case MCK_S5Imm: { |
4445 | 0 | DiagnosticPredicate DP(Operand.isS5Imm()); |
4446 | 0 | if (DP.isMatch()) |
4447 | 0 | return MCTargetAsmParser::Match_Success; |
4448 | 0 | break; |
4449 | 0 | } |
4450 | | // 'TLSReg' class |
4451 | 0 | case MCK_TLSReg: { |
4452 | 0 | DiagnosticPredicate DP(Operand.isTLSReg()); |
4453 | 0 | if (DP.isMatch()) |
4454 | 0 | return MCTargetAsmParser::Match_Success; |
4455 | 0 | break; |
4456 | 0 | } |
4457 | | // 'U10Imm' class |
4458 | 0 | case MCK_U10Imm: { |
4459 | 0 | DiagnosticPredicate DP(Operand.isU10Imm()); |
4460 | 0 | if (DP.isMatch()) |
4461 | 0 | return MCTargetAsmParser::Match_Success; |
4462 | 0 | break; |
4463 | 0 | } |
4464 | | // 'U12Imm' class |
4465 | 0 | case MCK_U12Imm: { |
4466 | 0 | DiagnosticPredicate DP(Operand.isU12Imm()); |
4467 | 0 | if (DP.isMatch()) |
4468 | 0 | return MCTargetAsmParser::Match_Success; |
4469 | 0 | break; |
4470 | 0 | } |
4471 | | // 'U16Imm' class |
4472 | 0 | case MCK_U16Imm: { |
4473 | 0 | DiagnosticPredicate DP(Operand.isU16Imm()); |
4474 | 0 | if (DP.isMatch()) |
4475 | 0 | return MCTargetAsmParser::Match_Success; |
4476 | 0 | break; |
4477 | 0 | } |
4478 | | // 'U1Imm' class |
4479 | 0 | case MCK_U1Imm: { |
4480 | 0 | DiagnosticPredicate DP(Operand.isU1Imm()); |
4481 | 0 | if (DP.isMatch()) |
4482 | 0 | return MCTargetAsmParser::Match_Success; |
4483 | 0 | break; |
4484 | 0 | } |
4485 | | // 'U2Imm' class |
4486 | 0 | case MCK_U2Imm: { |
4487 | 0 | DiagnosticPredicate DP(Operand.isU2Imm()); |
4488 | 0 | if (DP.isMatch()) |
4489 | 0 | return MCTargetAsmParser::Match_Success; |
4490 | 0 | break; |
4491 | 0 | } |
4492 | | // 'U3Imm' class |
4493 | 0 | case MCK_U3Imm: { |
4494 | 0 | DiagnosticPredicate DP(Operand.isU3Imm()); |
4495 | 0 | if (DP.isMatch()) |
4496 | 0 | return MCTargetAsmParser::Match_Success; |
4497 | 0 | break; |
4498 | 0 | } |
4499 | | // 'U4Imm' class |
4500 | 0 | case MCK_U4Imm: { |
4501 | 0 | DiagnosticPredicate DP(Operand.isU4Imm()); |
4502 | 0 | if (DP.isMatch()) |
4503 | 0 | return MCTargetAsmParser::Match_Success; |
4504 | 0 | break; |
4505 | 0 | } |
4506 | | // 'U5Imm' class |
4507 | 0 | case MCK_U5Imm: { |
4508 | 0 | DiagnosticPredicate DP(Operand.isU5Imm()); |
4509 | 0 | if (DP.isMatch()) |
4510 | 0 | return MCTargetAsmParser::Match_Success; |
4511 | 0 | break; |
4512 | 0 | } |
4513 | | // 'U6Imm' class |
4514 | 0 | case MCK_U6Imm: { |
4515 | 0 | DiagnosticPredicate DP(Operand.isU6Imm()); |
4516 | 0 | if (DP.isMatch()) |
4517 | 0 | return MCTargetAsmParser::Match_Success; |
4518 | 0 | break; |
4519 | 0 | } |
4520 | | // 'U7Imm' class |
4521 | 0 | case MCK_U7Imm: { |
4522 | 0 | DiagnosticPredicate DP(Operand.isU7Imm()); |
4523 | 0 | if (DP.isMatch()) |
4524 | 0 | return MCTargetAsmParser::Match_Success; |
4525 | 0 | break; |
4526 | 0 | } |
4527 | | // 'U8Imm' class |
4528 | 0 | case MCK_U8Imm: { |
4529 | 0 | DiagnosticPredicate DP(Operand.isU8Imm()); |
4530 | 0 | if (DP.isMatch()) |
4531 | 0 | return MCTargetAsmParser::Match_Success; |
4532 | 0 | break; |
4533 | 0 | } |
4534 | 0 | } // end switch (Kind) |
4535 | | |
4536 | 0 | if (Operand.isReg()) { |
4537 | 0 | MatchClassKind OpKind; |
4538 | 0 | switch (Operand.getReg()) { |
4539 | 0 | default: OpKind = InvalidMatchClass; break; |
4540 | 0 | case PPC::R0: OpKind = MCK_GPRC; break; |
4541 | 0 | case PPC::R1: OpKind = MCK_Reg2; break; |
4542 | 0 | case PPC::R2: OpKind = MCK_Reg2; break; |
4543 | 0 | case PPC::R3: OpKind = MCK_Reg2; break; |
4544 | 0 | case PPC::R4: OpKind = MCK_Reg2; break; |
4545 | 0 | case PPC::R5: OpKind = MCK_Reg2; break; |
4546 | 0 | case PPC::R6: OpKind = MCK_Reg2; break; |
4547 | 0 | case PPC::R7: OpKind = MCK_Reg2; break; |
4548 | 0 | case PPC::R8: OpKind = MCK_Reg2; break; |
4549 | 0 | case PPC::R9: OpKind = MCK_Reg2; break; |
4550 | 0 | case PPC::R10: OpKind = MCK_Reg2; break; |
4551 | 0 | case PPC::R11: OpKind = MCK_Reg2; break; |
4552 | 0 | case PPC::R12: OpKind = MCK_Reg2; break; |
4553 | 0 | case PPC::R13: OpKind = MCK_Reg2; break; |
4554 | 0 | case PPC::R14: OpKind = MCK_Reg2; break; |
4555 | 0 | case PPC::R15: OpKind = MCK_Reg2; break; |
4556 | 0 | case PPC::R16: OpKind = MCK_Reg2; break; |
4557 | 0 | case PPC::R17: OpKind = MCK_Reg2; break; |
4558 | 0 | case PPC::R18: OpKind = MCK_Reg2; break; |
4559 | 0 | case PPC::R19: OpKind = MCK_Reg2; break; |
4560 | 0 | case PPC::R20: OpKind = MCK_Reg2; break; |
4561 | 0 | case PPC::R21: OpKind = MCK_Reg2; break; |
4562 | 0 | case PPC::R22: OpKind = MCK_Reg2; break; |
4563 | 0 | case PPC::R23: OpKind = MCK_Reg2; break; |
4564 | 0 | case PPC::R24: OpKind = MCK_Reg2; break; |
4565 | 0 | case PPC::R25: OpKind = MCK_Reg2; break; |
4566 | 0 | case PPC::R26: OpKind = MCK_Reg2; break; |
4567 | 0 | case PPC::R27: OpKind = MCK_Reg2; break; |
4568 | 0 | case PPC::R28: OpKind = MCK_Reg2; break; |
4569 | 0 | case PPC::R29: OpKind = MCK_Reg2; break; |
4570 | 0 | case PPC::R30: OpKind = MCK_Reg2; break; |
4571 | 0 | case PPC::R31: OpKind = MCK_Reg2; break; |
4572 | 0 | case PPC::H0: OpKind = MCK_GPRC32; break; |
4573 | 0 | case PPC::H1: OpKind = MCK_GPRC32; break; |
4574 | 0 | case PPC::H2: OpKind = MCK_GPRC32; break; |
4575 | 0 | case PPC::H3: OpKind = MCK_GPRC32; break; |
4576 | 0 | case PPC::H4: OpKind = MCK_GPRC32; break; |
4577 | 0 | case PPC::H5: OpKind = MCK_GPRC32; break; |
4578 | 0 | case PPC::H6: OpKind = MCK_GPRC32; break; |
4579 | 0 | case PPC::H7: OpKind = MCK_GPRC32; break; |
4580 | 0 | case PPC::H8: OpKind = MCK_GPRC32; break; |
4581 | 0 | case PPC::H9: OpKind = MCK_GPRC32; break; |
4582 | 0 | case PPC::H10: OpKind = MCK_GPRC32; break; |
4583 | 0 | case PPC::H11: OpKind = MCK_GPRC32; break; |
4584 | 0 | case PPC::H12: OpKind = MCK_GPRC32; break; |
4585 | 0 | case PPC::H13: OpKind = MCK_GPRC32; break; |
4586 | 0 | case PPC::H14: OpKind = MCK_GPRC32; break; |
4587 | 0 | case PPC::H15: OpKind = MCK_GPRC32; break; |
4588 | 0 | case PPC::H16: OpKind = MCK_GPRC32; break; |
4589 | 0 | case PPC::H17: OpKind = MCK_GPRC32; break; |
4590 | 0 | case PPC::H18: OpKind = MCK_GPRC32; break; |
4591 | 0 | case PPC::H19: OpKind = MCK_GPRC32; break; |
4592 | 0 | case PPC::H20: OpKind = MCK_GPRC32; break; |
4593 | 0 | case PPC::H21: OpKind = MCK_GPRC32; break; |
4594 | 0 | case PPC::H22: OpKind = MCK_GPRC32; break; |
4595 | 0 | case PPC::H23: OpKind = MCK_GPRC32; break; |
4596 | 0 | case PPC::H24: OpKind = MCK_GPRC32; break; |
4597 | 0 | case PPC::H25: OpKind = MCK_GPRC32; break; |
4598 | 0 | case PPC::H26: OpKind = MCK_GPRC32; break; |
4599 | 0 | case PPC::H27: OpKind = MCK_GPRC32; break; |
4600 | 0 | case PPC::H28: OpKind = MCK_GPRC32; break; |
4601 | 0 | case PPC::H29: OpKind = MCK_GPRC32; break; |
4602 | 0 | case PPC::H30: OpKind = MCK_GPRC32; break; |
4603 | 0 | case PPC::H31: OpKind = MCK_GPRC32; break; |
4604 | 0 | case PPC::X0: OpKind = MCK_G8RC; break; |
4605 | 0 | case PPC::X1: OpKind = MCK_Reg7; break; |
4606 | 0 | case PPC::X2: OpKind = MCK_Reg7; break; |
4607 | 0 | case PPC::X3: OpKind = MCK_Reg7; break; |
4608 | 0 | case PPC::X4: OpKind = MCK_Reg7; break; |
4609 | 0 | case PPC::X5: OpKind = MCK_Reg7; break; |
4610 | 0 | case PPC::X6: OpKind = MCK_Reg7; break; |
4611 | 0 | case PPC::X7: OpKind = MCK_Reg7; break; |
4612 | 0 | case PPC::X8: OpKind = MCK_Reg7; break; |
4613 | 0 | case PPC::X9: OpKind = MCK_Reg7; break; |
4614 | 0 | case PPC::X10: OpKind = MCK_Reg7; break; |
4615 | 0 | case PPC::X11: OpKind = MCK_Reg7; break; |
4616 | 0 | case PPC::X12: OpKind = MCK_Reg7; break; |
4617 | 0 | case PPC::X13: OpKind = MCK_Reg7; break; |
4618 | 0 | case PPC::X14: OpKind = MCK_Reg7; break; |
4619 | 0 | case PPC::X15: OpKind = MCK_Reg7; break; |
4620 | 0 | case PPC::X16: OpKind = MCK_Reg7; break; |
4621 | 0 | case PPC::X17: OpKind = MCK_Reg7; break; |
4622 | 0 | case PPC::X18: OpKind = MCK_Reg7; break; |
4623 | 0 | case PPC::X19: OpKind = MCK_Reg7; break; |
4624 | 0 | case PPC::X20: OpKind = MCK_Reg7; break; |
4625 | 0 | case PPC::X21: OpKind = MCK_Reg7; break; |
4626 | 0 | case PPC::X22: OpKind = MCK_Reg7; break; |
4627 | 0 | case PPC::X23: OpKind = MCK_Reg7; break; |
4628 | 0 | case PPC::X24: OpKind = MCK_Reg7; break; |
4629 | 0 | case PPC::X25: OpKind = MCK_Reg7; break; |
4630 | 0 | case PPC::X26: OpKind = MCK_Reg7; break; |
4631 | 0 | case PPC::X27: OpKind = MCK_Reg7; break; |
4632 | 0 | case PPC::X28: OpKind = MCK_Reg7; break; |
4633 | 0 | case PPC::X29: OpKind = MCK_Reg7; break; |
4634 | 0 | case PPC::X30: OpKind = MCK_Reg7; break; |
4635 | 0 | case PPC::X31: OpKind = MCK_Reg7; break; |
4636 | 0 | case PPC::S0: OpKind = MCK_SPERC; break; |
4637 | 0 | case PPC::S1: OpKind = MCK_Reg9; break; |
4638 | 0 | case PPC::S2: OpKind = MCK_Reg9; break; |
4639 | 0 | case PPC::S3: OpKind = MCK_Reg9; break; |
4640 | 0 | case PPC::S4: OpKind = MCK_Reg9; break; |
4641 | 0 | case PPC::S5: OpKind = MCK_Reg9; break; |
4642 | 0 | case PPC::S6: OpKind = MCK_Reg9; break; |
4643 | 0 | case PPC::S7: OpKind = MCK_Reg9; break; |
4644 | 0 | case PPC::S8: OpKind = MCK_Reg9; break; |
4645 | 0 | case PPC::S9: OpKind = MCK_Reg9; break; |
4646 | 0 | case PPC::S10: OpKind = MCK_Reg9; break; |
4647 | 0 | case PPC::S11: OpKind = MCK_Reg9; break; |
4648 | 0 | case PPC::S12: OpKind = MCK_Reg9; break; |
4649 | 0 | case PPC::S13: OpKind = MCK_Reg9; break; |
4650 | 0 | case PPC::S14: OpKind = MCK_Reg9; break; |
4651 | 0 | case PPC::S15: OpKind = MCK_Reg9; break; |
4652 | 0 | case PPC::S16: OpKind = MCK_Reg9; break; |
4653 | 0 | case PPC::S17: OpKind = MCK_Reg9; break; |
4654 | 0 | case PPC::S18: OpKind = MCK_Reg9; break; |
4655 | 0 | case PPC::S19: OpKind = MCK_Reg9; break; |
4656 | 0 | case PPC::S20: OpKind = MCK_Reg9; break; |
4657 | 0 | case PPC::S21: OpKind = MCK_Reg9; break; |
4658 | 0 | case PPC::S22: OpKind = MCK_Reg9; break; |
4659 | 0 | case PPC::S23: OpKind = MCK_Reg9; break; |
4660 | 0 | case PPC::S24: OpKind = MCK_Reg9; break; |
4661 | 0 | case PPC::S25: OpKind = MCK_Reg9; break; |
4662 | 0 | case PPC::S26: OpKind = MCK_Reg9; break; |
4663 | 0 | case PPC::S27: OpKind = MCK_Reg9; break; |
4664 | 0 | case PPC::S28: OpKind = MCK_Reg9; break; |
4665 | 0 | case PPC::S29: OpKind = MCK_Reg9; break; |
4666 | 0 | case PPC::S30: OpKind = MCK_Reg9; break; |
4667 | 0 | case PPC::S31: OpKind = MCK_Reg9; break; |
4668 | 0 | case PPC::F0: OpKind = MCK_Reg10; break; |
4669 | 0 | case PPC::F1: OpKind = MCK_Reg10; break; |
4670 | 0 | case PPC::F2: OpKind = MCK_Reg10; break; |
4671 | 0 | case PPC::F3: OpKind = MCK_Reg10; break; |
4672 | 0 | case PPC::F4: OpKind = MCK_Reg10; break; |
4673 | 0 | case PPC::F5: OpKind = MCK_Reg10; break; |
4674 | 0 | case PPC::F6: OpKind = MCK_Reg10; break; |
4675 | 0 | case PPC::F7: OpKind = MCK_Reg10; break; |
4676 | 0 | case PPC::F8: OpKind = MCK_Reg10; break; |
4677 | 0 | case PPC::F9: OpKind = MCK_Reg10; break; |
4678 | 0 | case PPC::F10: OpKind = MCK_Reg10; break; |
4679 | 0 | case PPC::F11: OpKind = MCK_Reg10; break; |
4680 | 0 | case PPC::F12: OpKind = MCK_Reg10; break; |
4681 | 0 | case PPC::F13: OpKind = MCK_Reg10; break; |
4682 | 0 | case PPC::F14: OpKind = MCK_F4RC; break; |
4683 | 0 | case PPC::F15: OpKind = MCK_F4RC; break; |
4684 | 0 | case PPC::F16: OpKind = MCK_F4RC; break; |
4685 | 0 | case PPC::F17: OpKind = MCK_F4RC; break; |
4686 | 0 | case PPC::F18: OpKind = MCK_F4RC; break; |
4687 | 0 | case PPC::F19: OpKind = MCK_F4RC; break; |
4688 | 0 | case PPC::F20: OpKind = MCK_F4RC; break; |
4689 | 0 | case PPC::F21: OpKind = MCK_F4RC; break; |
4690 | 0 | case PPC::F22: OpKind = MCK_F4RC; break; |
4691 | 0 | case PPC::F23: OpKind = MCK_F4RC; break; |
4692 | 0 | case PPC::F24: OpKind = MCK_F4RC; break; |
4693 | 0 | case PPC::F25: OpKind = MCK_F4RC; break; |
4694 | 0 | case PPC::F26: OpKind = MCK_F4RC; break; |
4695 | 0 | case PPC::F27: OpKind = MCK_F4RC; break; |
4696 | 0 | case PPC::F28: OpKind = MCK_F4RC; break; |
4697 | 0 | case PPC::F29: OpKind = MCK_F4RC; break; |
4698 | 0 | case PPC::F30: OpKind = MCK_F4RC; break; |
4699 | 0 | case PPC::F31: OpKind = MCK_F4RC; break; |
4700 | 0 | case PPC::Fpair0: OpKind = MCK_Reg14; break; |
4701 | 0 | case PPC::Fpair2: OpKind = MCK_Reg14; break; |
4702 | 0 | case PPC::Fpair4: OpKind = MCK_Reg14; break; |
4703 | 0 | case PPC::Fpair6: OpKind = MCK_Reg14; break; |
4704 | 0 | case PPC::Fpair8: OpKind = MCK_Reg14; break; |
4705 | 0 | case PPC::Fpair10: OpKind = MCK_Reg14; break; |
4706 | 0 | case PPC::Fpair12: OpKind = MCK_Reg14; break; |
4707 | 0 | case PPC::Fpair14: OpKind = MCK_FpRC; break; |
4708 | 0 | case PPC::Fpair16: OpKind = MCK_FpRC; break; |
4709 | 0 | case PPC::Fpair18: OpKind = MCK_FpRC; break; |
4710 | 0 | case PPC::Fpair20: OpKind = MCK_FpRC; break; |
4711 | 0 | case PPC::Fpair22: OpKind = MCK_FpRC; break; |
4712 | 0 | case PPC::Fpair24: OpKind = MCK_FpRC; break; |
4713 | 0 | case PPC::Fpair26: OpKind = MCK_FpRC; break; |
4714 | 0 | case PPC::Fpair28: OpKind = MCK_FpRC; break; |
4715 | 0 | case PPC::Fpair30: OpKind = MCK_FpRC; break; |
4716 | 0 | case PPC::VF0: OpKind = MCK_Reg16; break; |
4717 | 0 | case PPC::VF1: OpKind = MCK_Reg16; break; |
4718 | 0 | case PPC::VF2: OpKind = MCK_Reg16; break; |
4719 | 0 | case PPC::VF3: OpKind = MCK_Reg16; break; |
4720 | 0 | case PPC::VF4: OpKind = MCK_Reg16; break; |
4721 | 0 | case PPC::VF5: OpKind = MCK_Reg16; break; |
4722 | 0 | case PPC::VF6: OpKind = MCK_Reg16; break; |
4723 | 0 | case PPC::VF7: OpKind = MCK_Reg16; break; |
4724 | 0 | case PPC::VF8: OpKind = MCK_Reg16; break; |
4725 | 0 | case PPC::VF9: OpKind = MCK_Reg16; break; |
4726 | 0 | case PPC::VF10: OpKind = MCK_Reg16; break; |
4727 | 0 | case PPC::VF11: OpKind = MCK_Reg16; break; |
4728 | 0 | case PPC::VF12: OpKind = MCK_Reg16; break; |
4729 | 0 | case PPC::VF13: OpKind = MCK_Reg16; break; |
4730 | 0 | case PPC::VF14: OpKind = MCK_Reg16; break; |
4731 | 0 | case PPC::VF15: OpKind = MCK_Reg16; break; |
4732 | 0 | case PPC::VF16: OpKind = MCK_Reg16; break; |
4733 | 0 | case PPC::VF17: OpKind = MCK_Reg16; break; |
4734 | 0 | case PPC::VF18: OpKind = MCK_Reg16; break; |
4735 | 0 | case PPC::VF19: OpKind = MCK_Reg16; break; |
4736 | 0 | case PPC::VF20: OpKind = MCK_VFRC; break; |
4737 | 0 | case PPC::VF21: OpKind = MCK_VFRC; break; |
4738 | 0 | case PPC::VF22: OpKind = MCK_VFRC; break; |
4739 | 0 | case PPC::VF23: OpKind = MCK_VFRC; break; |
4740 | 0 | case PPC::VF24: OpKind = MCK_VFRC; break; |
4741 | 0 | case PPC::VF25: OpKind = MCK_VFRC; break; |
4742 | 0 | case PPC::VF26: OpKind = MCK_VFRC; break; |
4743 | 0 | case PPC::VF27: OpKind = MCK_VFRC; break; |
4744 | 0 | case PPC::VF28: OpKind = MCK_VFRC; break; |
4745 | 0 | case PPC::VF29: OpKind = MCK_VFRC; break; |
4746 | 0 | case PPC::VF30: OpKind = MCK_VFRC; break; |
4747 | 0 | case PPC::VF31: OpKind = MCK_VFRC; break; |
4748 | 0 | case PPC::V0: OpKind = MCK_Reg18; break; |
4749 | 0 | case PPC::V1: OpKind = MCK_Reg18; break; |
4750 | 0 | case PPC::V2: OpKind = MCK_Reg18; break; |
4751 | 0 | case PPC::V3: OpKind = MCK_Reg18; break; |
4752 | 0 | case PPC::V4: OpKind = MCK_Reg18; break; |
4753 | 0 | case PPC::V5: OpKind = MCK_Reg18; break; |
4754 | 0 | case PPC::V6: OpKind = MCK_Reg18; break; |
4755 | 0 | case PPC::V7: OpKind = MCK_Reg18; break; |
4756 | 0 | case PPC::V8: OpKind = MCK_Reg18; break; |
4757 | 0 | case PPC::V9: OpKind = MCK_Reg18; break; |
4758 | 0 | case PPC::V10: OpKind = MCK_Reg18; break; |
4759 | 0 | case PPC::V11: OpKind = MCK_Reg18; break; |
4760 | 0 | case PPC::V12: OpKind = MCK_Reg18; break; |
4761 | 0 | case PPC::V13: OpKind = MCK_Reg18; break; |
4762 | 0 | case PPC::V14: OpKind = MCK_Reg18; break; |
4763 | 0 | case PPC::V15: OpKind = MCK_Reg18; break; |
4764 | 0 | case PPC::V16: OpKind = MCK_Reg18; break; |
4765 | 0 | case PPC::V17: OpKind = MCK_Reg18; break; |
4766 | 0 | case PPC::V18: OpKind = MCK_Reg18; break; |
4767 | 0 | case PPC::V19: OpKind = MCK_Reg18; break; |
4768 | 0 | case PPC::V20: OpKind = MCK_VRRC; break; |
4769 | 0 | case PPC::V21: OpKind = MCK_VRRC; break; |
4770 | 0 | case PPC::V22: OpKind = MCK_VRRC; break; |
4771 | 0 | case PPC::V23: OpKind = MCK_VRRC; break; |
4772 | 0 | case PPC::V24: OpKind = MCK_VRRC; break; |
4773 | 0 | case PPC::V25: OpKind = MCK_VRRC; break; |
4774 | 0 | case PPC::V26: OpKind = MCK_VRRC; break; |
4775 | 0 | case PPC::V27: OpKind = MCK_VRRC; break; |
4776 | 0 | case PPC::V28: OpKind = MCK_VRRC; break; |
4777 | 0 | case PPC::V29: OpKind = MCK_VRRC; break; |
4778 | 0 | case PPC::V30: OpKind = MCK_VRRC; break; |
4779 | 0 | case PPC::V31: OpKind = MCK_VRRC; break; |
4780 | 0 | case PPC::VSL0: OpKind = MCK_Reg22; break; |
4781 | 0 | case PPC::VSL1: OpKind = MCK_Reg22; break; |
4782 | 0 | case PPC::VSL2: OpKind = MCK_Reg22; break; |
4783 | 0 | case PPC::VSL3: OpKind = MCK_Reg22; break; |
4784 | 0 | case PPC::VSL4: OpKind = MCK_Reg22; break; |
4785 | 0 | case PPC::VSL5: OpKind = MCK_Reg22; break; |
4786 | 0 | case PPC::VSL6: OpKind = MCK_Reg22; break; |
4787 | 0 | case PPC::VSL7: OpKind = MCK_Reg22; break; |
4788 | 0 | case PPC::VSL8: OpKind = MCK_Reg22; break; |
4789 | 0 | case PPC::VSL9: OpKind = MCK_Reg22; break; |
4790 | 0 | case PPC::VSL10: OpKind = MCK_Reg22; break; |
4791 | 0 | case PPC::VSL11: OpKind = MCK_Reg22; break; |
4792 | 0 | case PPC::VSL12: OpKind = MCK_Reg22; break; |
4793 | 0 | case PPC::VSL13: OpKind = MCK_Reg22; break; |
4794 | 0 | case PPC::VSL14: OpKind = MCK_VSLRC; break; |
4795 | 0 | case PPC::VSL15: OpKind = MCK_VSLRC; break; |
4796 | 0 | case PPC::VSL16: OpKind = MCK_VSLRC; break; |
4797 | 0 | case PPC::VSL17: OpKind = MCK_VSLRC; break; |
4798 | 0 | case PPC::VSL18: OpKind = MCK_VSLRC; break; |
4799 | 0 | case PPC::VSL19: OpKind = MCK_VSLRC; break; |
4800 | 0 | case PPC::VSL20: OpKind = MCK_VSLRC; break; |
4801 | 0 | case PPC::VSL21: OpKind = MCK_VSLRC; break; |
4802 | 0 | case PPC::VSL22: OpKind = MCK_VSLRC; break; |
4803 | 0 | case PPC::VSL23: OpKind = MCK_VSLRC; break; |
4804 | 0 | case PPC::VSL24: OpKind = MCK_VSLRC; break; |
4805 | 0 | case PPC::VSL25: OpKind = MCK_VSLRC; break; |
4806 | 0 | case PPC::VSL26: OpKind = MCK_VSLRC; break; |
4807 | 0 | case PPC::VSL27: OpKind = MCK_VSLRC; break; |
4808 | 0 | case PPC::VSL28: OpKind = MCK_VSLRC; break; |
4809 | 0 | case PPC::VSL29: OpKind = MCK_VSLRC; break; |
4810 | 0 | case PPC::VSL30: OpKind = MCK_VSLRC; break; |
4811 | 0 | case PPC::VSL31: OpKind = MCK_VSLRC; break; |
4812 | 0 | case PPC::VSRp0: OpKind = MCK_Reg24; break; |
4813 | 0 | case PPC::VSRp1: OpKind = MCK_Reg24; break; |
4814 | 0 | case PPC::VSRp2: OpKind = MCK_Reg24; break; |
4815 | 0 | case PPC::VSRp3: OpKind = MCK_Reg24; break; |
4816 | 0 | case PPC::VSRp4: OpKind = MCK_Reg24; break; |
4817 | 0 | case PPC::VSRp5: OpKind = MCK_Reg24; break; |
4818 | 0 | case PPC::VSRp6: OpKind = MCK_Reg24; break; |
4819 | 0 | case PPC::VSRp7: OpKind = MCK_Reg25; break; |
4820 | 0 | case PPC::VSRp8: OpKind = MCK_Reg25; break; |
4821 | 0 | case PPC::VSRp9: OpKind = MCK_Reg25; break; |
4822 | 0 | case PPC::VSRp10: OpKind = MCK_Reg25; break; |
4823 | 0 | case PPC::VSRp11: OpKind = MCK_Reg25; break; |
4824 | 0 | case PPC::VSRp12: OpKind = MCK_Reg25; break; |
4825 | 0 | case PPC::VSRp13: OpKind = MCK_Reg25; break; |
4826 | 0 | case PPC::VSRp14: OpKind = MCK_Reg25; break; |
4827 | 0 | case PPC::VSRp15: OpKind = MCK_Reg25; break; |
4828 | 0 | case PPC::VSRp16: OpKind = MCK_Reg28; break; |
4829 | 0 | case PPC::VSRp17: OpKind = MCK_Reg28; break; |
4830 | 0 | case PPC::VSRp18: OpKind = MCK_Reg28; break; |
4831 | 0 | case PPC::VSRp19: OpKind = MCK_Reg28; break; |
4832 | 0 | case PPC::VSRp20: OpKind = MCK_Reg28; break; |
4833 | 0 | case PPC::VSRp21: OpKind = MCK_Reg28; break; |
4834 | 0 | case PPC::VSRp22: OpKind = MCK_Reg28; break; |
4835 | 0 | case PPC::VSRp23: OpKind = MCK_Reg28; break; |
4836 | 0 | case PPC::VSRp24: OpKind = MCK_Reg28; break; |
4837 | 0 | case PPC::VSRp25: OpKind = MCK_Reg28; break; |
4838 | 0 | case PPC::VSRp26: OpKind = MCK_Reg29; break; |
4839 | 0 | case PPC::VSRp27: OpKind = MCK_Reg29; break; |
4840 | 0 | case PPC::VSRp28: OpKind = MCK_Reg29; break; |
4841 | 0 | case PPC::VSRp29: OpKind = MCK_Reg29; break; |
4842 | 0 | case PPC::VSRp30: OpKind = MCK_Reg29; break; |
4843 | 0 | case PPC::VSRp31: OpKind = MCK_Reg29; break; |
4844 | 0 | case PPC::G8p0: OpKind = MCK_G8pRC; break; |
4845 | 0 | case PPC::G8p1: OpKind = MCK_Reg31; break; |
4846 | 0 | case PPC::G8p2: OpKind = MCK_Reg31; break; |
4847 | 0 | case PPC::G8p3: OpKind = MCK_Reg31; break; |
4848 | 0 | case PPC::G8p4: OpKind = MCK_Reg31; break; |
4849 | 0 | case PPC::G8p5: OpKind = MCK_Reg31; break; |
4850 | 0 | case PPC::G8p6: OpKind = MCK_Reg31; break; |
4851 | 0 | case PPC::G8p7: OpKind = MCK_Reg31; break; |
4852 | 0 | case PPC::G8p8: OpKind = MCK_Reg31; break; |
4853 | 0 | case PPC::G8p9: OpKind = MCK_Reg31; break; |
4854 | 0 | case PPC::G8p10: OpKind = MCK_Reg31; break; |
4855 | 0 | case PPC::G8p11: OpKind = MCK_Reg31; break; |
4856 | 0 | case PPC::G8p12: OpKind = MCK_Reg31; break; |
4857 | 0 | case PPC::G8p13: OpKind = MCK_Reg31; break; |
4858 | 0 | case PPC::G8p14: OpKind = MCK_Reg31; break; |
4859 | 0 | case PPC::G8p15: OpKind = MCK_Reg31; break; |
4860 | 0 | case PPC::ZERO: OpKind = MCK_GPRC_NOR0; break; |
4861 | 0 | case PPC::ZERO8: OpKind = MCK_G8RC_NOX0; break; |
4862 | 0 | case PPC::FP: OpKind = MCK_Reg2; break; |
4863 | 0 | case PPC::FP8: OpKind = MCK_Reg7; break; |
4864 | 0 | case PPC::BP: OpKind = MCK_Reg2; break; |
4865 | 0 | case PPC::BP8: OpKind = MCK_Reg7; break; |
4866 | 0 | case PPC::CR0LT: OpKind = MCK_CRBITRC; break; |
4867 | 0 | case PPC::CR0GT: OpKind = MCK_CRBITRC; break; |
4868 | 0 | case PPC::CR0EQ: OpKind = MCK_CRBITRC; break; |
4869 | 0 | case PPC::CR0UN: OpKind = MCK_CRBITRC; break; |
4870 | 0 | case PPC::CR1LT: OpKind = MCK_CRBITRC; break; |
4871 | 0 | case PPC::CR1GT: OpKind = MCK_CRBITRC; break; |
4872 | 0 | case PPC::CR1EQ: OpKind = MCK_CRBITRC; break; |
4873 | 0 | case PPC::CR1UN: OpKind = MCK_CRBITRC; break; |
4874 | 0 | case PPC::CR2LT: OpKind = MCK_CRBITRC; break; |
4875 | 0 | case PPC::CR2GT: OpKind = MCK_CRBITRC; break; |
4876 | 0 | case PPC::CR2EQ: OpKind = MCK_CRBITRC; break; |
4877 | 0 | case PPC::CR2UN: OpKind = MCK_CRBITRC; break; |
4878 | 0 | case PPC::CR3LT: OpKind = MCK_CRBITRC; break; |
4879 | 0 | case PPC::CR3GT: OpKind = MCK_CRBITRC; break; |
4880 | 0 | case PPC::CR3EQ: OpKind = MCK_CRBITRC; break; |
4881 | 0 | case PPC::CR3UN: OpKind = MCK_CRBITRC; break; |
4882 | 0 | case PPC::CR4LT: OpKind = MCK_CRBITRC; break; |
4883 | 0 | case PPC::CR4GT: OpKind = MCK_CRBITRC; break; |
4884 | 0 | case PPC::CR4EQ: OpKind = MCK_CRBITRC; break; |
4885 | 0 | case PPC::CR4UN: OpKind = MCK_CRBITRC; break; |
4886 | 0 | case PPC::CR5LT: OpKind = MCK_CRBITRC; break; |
4887 | 0 | case PPC::CR5GT: OpKind = MCK_CRBITRC; break; |
4888 | 0 | case PPC::CR5EQ: OpKind = MCK_CRBITRC; break; |
4889 | 0 | case PPC::CR5UN: OpKind = MCK_CRBITRC; break; |
4890 | 0 | case PPC::CR6LT: OpKind = MCK_CRBITRC; break; |
4891 | 0 | case PPC::CR6GT: OpKind = MCK_CRBITRC; break; |
4892 | 0 | case PPC::CR6EQ: OpKind = MCK_CRBITRC; break; |
4893 | 0 | case PPC::CR6UN: OpKind = MCK_CRBITRC; break; |
4894 | 0 | case PPC::CR7LT: OpKind = MCK_CRBITRC; break; |
4895 | 0 | case PPC::CR7GT: OpKind = MCK_CRBITRC; break; |
4896 | 0 | case PPC::CR7EQ: OpKind = MCK_CRBITRC; break; |
4897 | 0 | case PPC::CR7UN: OpKind = MCK_CRBITRC; break; |
4898 | 0 | case PPC::CR0: OpKind = MCK_CRRC; break; |
4899 | 0 | case PPC::CR1: OpKind = MCK_CRRC; break; |
4900 | 0 | case PPC::CR2: OpKind = MCK_CRRC; break; |
4901 | 0 | case PPC::CR3: OpKind = MCK_CRRC; break; |
4902 | 0 | case PPC::CR4: OpKind = MCK_CRRC; break; |
4903 | 0 | case PPC::CR5: OpKind = MCK_CRRC; break; |
4904 | 0 | case PPC::CR6: OpKind = MCK_CRRC; break; |
4905 | 0 | case PPC::CR7: OpKind = MCK_CRRC; break; |
4906 | 0 | case PPC::LR: OpKind = MCK_LRRC; break; |
4907 | 0 | case PPC::LR8: OpKind = MCK_LR8RC; break; |
4908 | 0 | case PPC::CTR: OpKind = MCK_CTRRC; break; |
4909 | 0 | case PPC::CTR8: OpKind = MCK_CTRRC8; break; |
4910 | 0 | case PPC::VRSAVE: OpKind = MCK_VRSAVERC; break; |
4911 | 0 | case PPC::XER: OpKind = MCK_CARRYRC; break; |
4912 | 0 | case PPC::CARRY: OpKind = MCK_CARRYRC; break; |
4913 | 0 | case PPC::ACC0: OpKind = MCK_Reg40; break; |
4914 | 0 | case PPC::ACC1: OpKind = MCK_Reg40; break; |
4915 | 0 | case PPC::ACC2: OpKind = MCK_Reg40; break; |
4916 | 0 | case PPC::ACC3: OpKind = MCK_Reg41; break; |
4917 | 0 | case PPC::ACC4: OpKind = MCK_ACCRC; break; |
4918 | 0 | case PPC::ACC5: OpKind = MCK_ACCRC; break; |
4919 | 0 | case PPC::ACC6: OpKind = MCK_ACCRC; break; |
4920 | 0 | case PPC::ACC7: OpKind = MCK_ACCRC; break; |
4921 | 0 | case PPC::UACC0: OpKind = MCK_Reg43; break; |
4922 | 0 | case PPC::UACC1: OpKind = MCK_Reg43; break; |
4923 | 0 | case PPC::UACC2: OpKind = MCK_Reg43; break; |
4924 | 0 | case PPC::UACC3: OpKind = MCK_Reg44; break; |
4925 | 0 | case PPC::UACC4: OpKind = MCK_UACCRC; break; |
4926 | 0 | case PPC::UACC5: OpKind = MCK_UACCRC; break; |
4927 | 0 | case PPC::UACC6: OpKind = MCK_UACCRC; break; |
4928 | 0 | case PPC::UACC7: OpKind = MCK_UACCRC; break; |
4929 | 0 | case PPC::DMRROW0: OpKind = MCK_DMRROWRC; break; |
4930 | 0 | case PPC::DMRROW1: OpKind = MCK_DMRROWRC; break; |
4931 | 0 | case PPC::DMRROW2: OpKind = MCK_DMRROWRC; break; |
4932 | 0 | case PPC::DMRROW3: OpKind = MCK_DMRROWRC; break; |
4933 | 0 | case PPC::DMRROW4: OpKind = MCK_DMRROWRC; break; |
4934 | 0 | case PPC::DMRROW5: OpKind = MCK_DMRROWRC; break; |
4935 | 0 | case PPC::DMRROW6: OpKind = MCK_DMRROWRC; break; |
4936 | 0 | case PPC::DMRROW7: OpKind = MCK_DMRROWRC; break; |
4937 | 0 | case PPC::DMRROW8: OpKind = MCK_DMRROWRC; break; |
4938 | 0 | case PPC::DMRROW9: OpKind = MCK_DMRROWRC; break; |
4939 | 0 | case PPC::DMRROW10: OpKind = MCK_DMRROWRC; break; |
4940 | 0 | case PPC::DMRROW11: OpKind = MCK_DMRROWRC; break; |
4941 | 0 | case PPC::DMRROW12: OpKind = MCK_DMRROWRC; break; |
4942 | 0 | case PPC::DMRROW13: OpKind = MCK_DMRROWRC; break; |
4943 | 0 | case PPC::DMRROW14: OpKind = MCK_DMRROWRC; break; |
4944 | 0 | case PPC::DMRROW15: OpKind = MCK_DMRROWRC; break; |
4945 | 0 | case PPC::DMRROW16: OpKind = MCK_DMRROWRC; break; |
4946 | 0 | case PPC::DMRROW17: OpKind = MCK_DMRROWRC; break; |
4947 | 0 | case PPC::DMRROW18: OpKind = MCK_DMRROWRC; break; |
4948 | 0 | case PPC::DMRROW19: OpKind = MCK_DMRROWRC; break; |
4949 | 0 | case PPC::DMRROW20: OpKind = MCK_DMRROWRC; break; |
4950 | 0 | case PPC::DMRROW21: OpKind = MCK_DMRROWRC; break; |
4951 | 0 | case PPC::DMRROW22: OpKind = MCK_DMRROWRC; break; |
4952 | 0 | case PPC::DMRROW23: OpKind = MCK_DMRROWRC; break; |
4953 | 0 | case PPC::DMRROW24: OpKind = MCK_DMRROWRC; break; |
4954 | 0 | case PPC::DMRROW25: OpKind = MCK_DMRROWRC; break; |
4955 | 0 | case PPC::DMRROW26: OpKind = MCK_DMRROWRC; break; |
4956 | 0 | case PPC::DMRROW27: OpKind = MCK_DMRROWRC; break; |
4957 | 0 | case PPC::DMRROW28: OpKind = MCK_DMRROWRC; break; |
4958 | 0 | case PPC::DMRROW29: OpKind = MCK_DMRROWRC; break; |
4959 | 0 | case PPC::DMRROW30: OpKind = MCK_DMRROWRC; break; |
4960 | 0 | case PPC::DMRROW31: OpKind = MCK_DMRROWRC; break; |
4961 | 0 | case PPC::DMRROW32: OpKind = MCK_DMRROWRC; break; |
4962 | 0 | case PPC::DMRROW33: OpKind = MCK_DMRROWRC; break; |
4963 | 0 | case PPC::DMRROW34: OpKind = MCK_DMRROWRC; break; |
4964 | 0 | case PPC::DMRROW35: OpKind = MCK_DMRROWRC; break; |
4965 | 0 | case PPC::DMRROW36: OpKind = MCK_DMRROWRC; break; |
4966 | 0 | case PPC::DMRROW37: OpKind = MCK_DMRROWRC; break; |
4967 | 0 | case PPC::DMRROW38: OpKind = MCK_DMRROWRC; break; |
4968 | 0 | case PPC::DMRROW39: OpKind = MCK_DMRROWRC; break; |
4969 | 0 | case PPC::DMRROW40: OpKind = MCK_DMRROWRC; break; |
4970 | 0 | case PPC::DMRROW41: OpKind = MCK_DMRROWRC; break; |
4971 | 0 | case PPC::DMRROW42: OpKind = MCK_DMRROWRC; break; |
4972 | 0 | case PPC::DMRROW43: OpKind = MCK_DMRROWRC; break; |
4973 | 0 | case PPC::DMRROW44: OpKind = MCK_DMRROWRC; break; |
4974 | 0 | case PPC::DMRROW45: OpKind = MCK_DMRROWRC; break; |
4975 | 0 | case PPC::DMRROW46: OpKind = MCK_DMRROWRC; break; |
4976 | 0 | case PPC::DMRROW47: OpKind = MCK_DMRROWRC; break; |
4977 | 0 | case PPC::DMRROW48: OpKind = MCK_DMRROWRC; break; |
4978 | 0 | case PPC::DMRROW49: OpKind = MCK_DMRROWRC; break; |
4979 | 0 | case PPC::DMRROW50: OpKind = MCK_DMRROWRC; break; |
4980 | 0 | case PPC::DMRROW51: OpKind = MCK_DMRROWRC; break; |
4981 | 0 | case PPC::DMRROW52: OpKind = MCK_DMRROWRC; break; |
4982 | 0 | case PPC::DMRROW53: OpKind = MCK_DMRROWRC; break; |
4983 | 0 | case PPC::DMRROW54: OpKind = MCK_DMRROWRC; break; |
4984 | 0 | case PPC::DMRROW55: OpKind = MCK_DMRROWRC; break; |
4985 | 0 | case PPC::DMRROW56: OpKind = MCK_DMRROWRC; break; |
4986 | 0 | case PPC::DMRROW57: OpKind = MCK_DMRROWRC; break; |
4987 | 0 | case PPC::DMRROW58: OpKind = MCK_DMRROWRC; break; |
4988 | 0 | case PPC::DMRROW59: OpKind = MCK_DMRROWRC; break; |
4989 | 0 | case PPC::DMRROW60: OpKind = MCK_DMRROWRC; break; |
4990 | 0 | case PPC::DMRROW61: OpKind = MCK_DMRROWRC; break; |
4991 | 0 | case PPC::DMRROW62: OpKind = MCK_DMRROWRC; break; |
4992 | 0 | case PPC::DMRROW63: OpKind = MCK_DMRROWRC; break; |
4993 | 0 | case PPC::DMRROWp0: OpKind = MCK_DMRROWpRC; break; |
4994 | 0 | case PPC::DMRROWp1: OpKind = MCK_DMRROWpRC; break; |
4995 | 0 | case PPC::DMRROWp2: OpKind = MCK_DMRROWpRC; break; |
4996 | 0 | case PPC::DMRROWp3: OpKind = MCK_DMRROWpRC; break; |
4997 | 0 | case PPC::DMRROWp4: OpKind = MCK_DMRROWpRC; break; |
4998 | 0 | case PPC::DMRROWp5: OpKind = MCK_DMRROWpRC; break; |
4999 | 0 | case PPC::DMRROWp6: OpKind = MCK_DMRROWpRC; break; |
5000 | 0 | case PPC::DMRROWp7: OpKind = MCK_DMRROWpRC; break; |
5001 | 0 | case PPC::DMRROWp8: OpKind = MCK_DMRROWpRC; break; |
5002 | 0 | case PPC::DMRROWp9: OpKind = MCK_DMRROWpRC; break; |
5003 | 0 | case PPC::DMRROWp10: OpKind = MCK_DMRROWpRC; break; |
5004 | 0 | case PPC::DMRROWp11: OpKind = MCK_DMRROWpRC; break; |
5005 | 0 | case PPC::DMRROWp12: OpKind = MCK_DMRROWpRC; break; |
5006 | 0 | case PPC::DMRROWp13: OpKind = MCK_DMRROWpRC; break; |
5007 | 0 | case PPC::DMRROWp14: OpKind = MCK_DMRROWpRC; break; |
5008 | 0 | case PPC::DMRROWp15: OpKind = MCK_DMRROWpRC; break; |
5009 | 0 | case PPC::DMRROWp16: OpKind = MCK_DMRROWpRC; break; |
5010 | 0 | case PPC::DMRROWp17: OpKind = MCK_DMRROWpRC; break; |
5011 | 0 | case PPC::DMRROWp18: OpKind = MCK_DMRROWpRC; break; |
5012 | 0 | case PPC::DMRROWp19: OpKind = MCK_DMRROWpRC; break; |
5013 | 0 | case PPC::DMRROWp20: OpKind = MCK_DMRROWpRC; break; |
5014 | 0 | case PPC::DMRROWp21: OpKind = MCK_DMRROWpRC; break; |
5015 | 0 | case PPC::DMRROWp22: OpKind = MCK_DMRROWpRC; break; |
5016 | 0 | case PPC::DMRROWp23: OpKind = MCK_DMRROWpRC; break; |
5017 | 0 | case PPC::DMRROWp24: OpKind = MCK_DMRROWpRC; break; |
5018 | 0 | case PPC::DMRROWp25: OpKind = MCK_DMRROWpRC; break; |
5019 | 0 | case PPC::DMRROWp26: OpKind = MCK_DMRROWpRC; break; |
5020 | 0 | case PPC::DMRROWp27: OpKind = MCK_DMRROWpRC; break; |
5021 | 0 | case PPC::DMRROWp28: OpKind = MCK_DMRROWpRC; break; |
5022 | 0 | case PPC::DMRROWp29: OpKind = MCK_DMRROWpRC; break; |
5023 | 0 | case PPC::DMRROWp30: OpKind = MCK_DMRROWpRC; break; |
5024 | 0 | case PPC::DMRROWp31: OpKind = MCK_DMRROWpRC; break; |
5025 | 0 | case PPC::WACC0: OpKind = MCK_WACCRC; break; |
5026 | 0 | case PPC::WACC1: OpKind = MCK_WACCRC; break; |
5027 | 0 | case PPC::WACC2: OpKind = MCK_WACCRC; break; |
5028 | 0 | case PPC::WACC3: OpKind = MCK_WACCRC; break; |
5029 | 0 | case PPC::WACC4: OpKind = MCK_WACCRC; break; |
5030 | 0 | case PPC::WACC5: OpKind = MCK_WACCRC; break; |
5031 | 0 | case PPC::WACC6: OpKind = MCK_WACCRC; break; |
5032 | 0 | case PPC::WACC7: OpKind = MCK_WACCRC; break; |
5033 | 0 | case PPC::WACC_HI0: OpKind = MCK_WACC_HIRC; break; |
5034 | 0 | case PPC::WACC_HI1: OpKind = MCK_WACC_HIRC; break; |
5035 | 0 | case PPC::WACC_HI2: OpKind = MCK_WACC_HIRC; break; |
5036 | 0 | case PPC::WACC_HI3: OpKind = MCK_WACC_HIRC; break; |
5037 | 0 | case PPC::WACC_HI4: OpKind = MCK_WACC_HIRC; break; |
5038 | 0 | case PPC::WACC_HI5: OpKind = MCK_WACC_HIRC; break; |
5039 | 0 | case PPC::WACC_HI6: OpKind = MCK_WACC_HIRC; break; |
5040 | 0 | case PPC::WACC_HI7: OpKind = MCK_WACC_HIRC; break; |
5041 | 0 | case PPC::DMR0: OpKind = MCK_DMRRC; break; |
5042 | 0 | case PPC::DMR1: OpKind = MCK_DMRRC; break; |
5043 | 0 | case PPC::DMR2: OpKind = MCK_DMRRC; break; |
5044 | 0 | case PPC::DMR3: OpKind = MCK_DMRRC; break; |
5045 | 0 | case PPC::DMR4: OpKind = MCK_DMRRC; break; |
5046 | 0 | case PPC::DMR5: OpKind = MCK_DMRRC; break; |
5047 | 0 | case PPC::DMR6: OpKind = MCK_DMRRC; break; |
5048 | 0 | case PPC::DMR7: OpKind = MCK_DMRRC; break; |
5049 | 0 | case PPC::DMRp0: OpKind = MCK_DMRpRC; break; |
5050 | 0 | case PPC::DMRp1: OpKind = MCK_DMRpRC; break; |
5051 | 0 | case PPC::DMRp2: OpKind = MCK_DMRpRC; break; |
5052 | 0 | case PPC::DMRp3: OpKind = MCK_DMRpRC; break; |
5053 | 0 | } |
5054 | 0 | return isSubclass(OpKind, Kind) ? (unsigned)MCTargetAsmParser::Match_Success : |
5055 | 0 | getDiagKindFromRegisterClass(Kind); |
5056 | 0 | } |
5057 | | |
5058 | 0 | if (Kind > MCK_LAST_TOKEN && Kind <= MCK_LAST_REGISTER) |
5059 | 0 | return getDiagKindFromRegisterClass(Kind); |
5060 | | |
5061 | 0 | return MCTargetAsmParser::Match_InvalidOperand; |
5062 | 0 | } |
5063 | | |
5064 | | #ifndef NDEBUG |
5065 | 0 | const char *getMatchClassName(MatchClassKind Kind) { |
5066 | 0 | switch (Kind) { |
5067 | 0 | case InvalidMatchClass: return "InvalidMatchClass"; |
5068 | 0 | case OptionalMatchClass: return "OptionalMatchClass"; |
5069 | 0 | case MCK__DOT_: return "MCK__DOT_"; |
5070 | 0 | case MCK_0: return "MCK_0"; |
5071 | 0 | case MCK_1: return "MCK_1"; |
5072 | 0 | case MCK_2: return "MCK_2"; |
5073 | 0 | case MCK_3: return "MCK_3"; |
5074 | 0 | case MCK_4: return "MCK_4"; |
5075 | 0 | case MCK_5: return "MCK_5"; |
5076 | 0 | case MCK_6: return "MCK_6"; |
5077 | 0 | case MCK_7: return "MCK_7"; |
5078 | 0 | case MCK_crD: return "MCK_crD"; |
5079 | 0 | case MCK_CTRRC: return "MCK_CTRRC"; |
5080 | 0 | case MCK_CTRRC8: return "MCK_CTRRC8"; |
5081 | 0 | case MCK_LR8RC: return "MCK_LR8RC"; |
5082 | 0 | case MCK_LRRC: return "MCK_LRRC"; |
5083 | 0 | case MCK_VRSAVERC: return "MCK_VRSAVERC"; |
5084 | 0 | case MCK_CARRYRC: return "MCK_CARRYRC"; |
5085 | 0 | case MCK_Reg43: return "MCK_Reg43"; |
5086 | 0 | case MCK_Reg40: return "MCK_Reg40"; |
5087 | 0 | case MCK_Reg44: return "MCK_Reg44"; |
5088 | 0 | case MCK_Reg41: return "MCK_Reg41"; |
5089 | 0 | case MCK_DMRpRC: return "MCK_DMRpRC"; |
5090 | 0 | case MCK_Reg24: return "MCK_Reg24"; |
5091 | 0 | case MCK_Reg14: return "MCK_Reg14"; |
5092 | 0 | case MCK_ACCRC: return "MCK_ACCRC"; |
5093 | 0 | case MCK_CRRC: return "MCK_CRRC"; |
5094 | 0 | case MCK_DMRRC: return "MCK_DMRRC"; |
5095 | 0 | case MCK_UACCRC: return "MCK_UACCRC"; |
5096 | 0 | case MCK_WACCRC: return "MCK_WACCRC"; |
5097 | 0 | case MCK_WACC_HIRC: return "MCK_WACC_HIRC"; |
5098 | 0 | case MCK_Reg28: return "MCK_Reg28"; |
5099 | 0 | case MCK_Reg22: return "MCK_Reg22"; |
5100 | 0 | case MCK_Reg10: return "MCK_Reg10"; |
5101 | 0 | case MCK_Reg31: return "MCK_Reg31"; |
5102 | 0 | case MCK_Reg29: return "MCK_Reg29"; |
5103 | 0 | case MCK_Reg25: return "MCK_Reg25"; |
5104 | 0 | case MCK_FpRC: return "MCK_FpRC"; |
5105 | 0 | case MCK_G8pRC: return "MCK_G8pRC"; |
5106 | 0 | case MCK_Reg27: return "MCK_Reg27"; |
5107 | 0 | case MCK_Reg18: return "MCK_Reg18"; |
5108 | 0 | case MCK_Reg16: return "MCK_Reg16"; |
5109 | 0 | case MCK_Reg9: return "MCK_Reg9"; |
5110 | 0 | case MCK_CRBITRC: return "MCK_CRBITRC"; |
5111 | 0 | case MCK_DMRROWpRC: return "MCK_DMRROWpRC"; |
5112 | 0 | case MCK_F4RC: return "MCK_F4RC"; |
5113 | 0 | case MCK_GPRC32: return "MCK_GPRC32"; |
5114 | 0 | case MCK_SPERC: return "MCK_SPERC"; |
5115 | 0 | case MCK_VFRC: return "MCK_VFRC"; |
5116 | 0 | case MCK_VRRC: return "MCK_VRRC"; |
5117 | 0 | case MCK_VSLRC: return "MCK_VSLRC"; |
5118 | 0 | case MCK_VSRpRC: return "MCK_VSRpRC"; |
5119 | 0 | case MCK_Reg7: return "MCK_Reg7"; |
5120 | 0 | case MCK_Reg2: return "MCK_Reg2"; |
5121 | 0 | case MCK_Reg21: return "MCK_Reg21"; |
5122 | 0 | case MCK_Reg13: return "MCK_Reg13"; |
5123 | 0 | case MCK_G8RC: return "MCK_G8RC"; |
5124 | 0 | case MCK_G8RC_NOX0: return "MCK_G8RC_NOX0"; |
5125 | 0 | case MCK_GPRC: return "MCK_GPRC"; |
5126 | 0 | case MCK_GPRC_NOR0: return "MCK_GPRC_NOR0"; |
5127 | 0 | case MCK_DMRROWRC: return "MCK_DMRROWRC"; |
5128 | 0 | case MCK_VSRC: return "MCK_VSRC"; |
5129 | 0 | case MCK_VSSRC: return "MCK_VSSRC"; |
5130 | 0 | case MCK_SPILLTOVSRRC: return "MCK_SPILLTOVSRRC"; |
5131 | 0 | case MCK_Imm: return "MCK_Imm"; |
5132 | 0 | case MCK_ATBitsAsHint: return "MCK_ATBitsAsHint"; |
5133 | 0 | case MCK_CRBitMask: return "MCK_CRBitMask"; |
5134 | 0 | case MCK_CondBr: return "MCK_CondBr"; |
5135 | 0 | case MCK_DirectBr: return "MCK_DirectBr"; |
5136 | 0 | case MCK_DispRI34: return "MCK_DispRI34"; |
5137 | 0 | case MCK_DispRIHash: return "MCK_DispRIHash"; |
5138 | 0 | case MCK_DispRI: return "MCK_DispRI"; |
5139 | 0 | case MCK_DispRIX16: return "MCK_DispRIX16"; |
5140 | 0 | case MCK_DispRIX: return "MCK_DispRIX"; |
5141 | 0 | case MCK_DispSPE2: return "MCK_DispSPE2"; |
5142 | 0 | case MCK_DispSPE4: return "MCK_DispSPE4"; |
5143 | 0 | case MCK_DispSPE8: return "MCK_DispSPE8"; |
5144 | 0 | case MCK_ImmZero: return "MCK_ImmZero"; |
5145 | 0 | case MCK_RegACCRC: return "MCK_RegACCRC"; |
5146 | 0 | case MCK_RegCRBITRC: return "MCK_RegCRBITRC"; |
5147 | 0 | case MCK_RegCRRC: return "MCK_RegCRRC"; |
5148 | 0 | case MCK_RegDMRRC: return "MCK_RegDMRRC"; |
5149 | 0 | case MCK_RegDMRROWRC: return "MCK_RegDMRROWRC"; |
5150 | 0 | case MCK_RegDMRROWpRC: return "MCK_RegDMRROWpRC"; |
5151 | 0 | case MCK_RegDMRpRC: return "MCK_RegDMRpRC"; |
5152 | 0 | case MCK_RegF4RC: return "MCK_RegF4RC"; |
5153 | 0 | case MCK_RegF8RC: return "MCK_RegF8RC"; |
5154 | 0 | case MCK_RegFpRC: return "MCK_RegFpRC"; |
5155 | 0 | case MCK_RegG8RC: return "MCK_RegG8RC"; |
5156 | 0 | case MCK_RegG8RCNoX0: return "MCK_RegG8RCNoX0"; |
5157 | 0 | case MCK_RegG8pRC: return "MCK_RegG8pRC"; |
5158 | 0 | case MCK_RegGPRC: return "MCK_RegGPRC"; |
5159 | 0 | case MCK_RegGPRCNoR0: return "MCK_RegGPRCNoR0"; |
5160 | 0 | case MCK_RegGxRCNoR0: return "MCK_RegGxRCNoR0"; |
5161 | 0 | case MCK_RegGxRC: return "MCK_RegGxRC"; |
5162 | 0 | case MCK_RegSPE4RC: return "MCK_RegSPE4RC"; |
5163 | 0 | case MCK_RegSPERC: return "MCK_RegSPERC"; |
5164 | 0 | case MCK_RegSPILLTOVSRRC: return "MCK_RegSPILLTOVSRRC"; |
5165 | 0 | case MCK_RegVFRC: return "MCK_RegVFRC"; |
5166 | 0 | case MCK_RegVRRC: return "MCK_RegVRRC"; |
5167 | 0 | case MCK_RegVSFRC: return "MCK_RegVSFRC"; |
5168 | 0 | case MCK_RegVSRC: return "MCK_RegVSRC"; |
5169 | 0 | case MCK_RegVSRpEvenRC: return "MCK_RegVSRpEvenRC"; |
5170 | 0 | case MCK_RegVSRpRC: return "MCK_RegVSRpRC"; |
5171 | 0 | case MCK_RegVSSRC: return "MCK_RegVSSRC"; |
5172 | 0 | case MCK_S16Imm: return "MCK_S16Imm"; |
5173 | 0 | case MCK_S17Imm: return "MCK_S17Imm"; |
5174 | 0 | case MCK_S34Imm: return "MCK_S34Imm"; |
5175 | 0 | case MCK_S5Imm: return "MCK_S5Imm"; |
5176 | 0 | case MCK_TLSReg: return "MCK_TLSReg"; |
5177 | 0 | case MCK_U10Imm: return "MCK_U10Imm"; |
5178 | 0 | case MCK_U12Imm: return "MCK_U12Imm"; |
5179 | 0 | case MCK_U16Imm: return "MCK_U16Imm"; |
5180 | 0 | case MCK_U1Imm: return "MCK_U1Imm"; |
5181 | 0 | case MCK_U2Imm: return "MCK_U2Imm"; |
5182 | 0 | case MCK_U3Imm: return "MCK_U3Imm"; |
5183 | 0 | case MCK_U4Imm: return "MCK_U4Imm"; |
5184 | 0 | case MCK_U5Imm: return "MCK_U5Imm"; |
5185 | 0 | case MCK_U6Imm: return "MCK_U6Imm"; |
5186 | 0 | case MCK_U7Imm: return "MCK_U7Imm"; |
5187 | 0 | case MCK_U8Imm: return "MCK_U8Imm"; |
5188 | 0 | case NumMatchClassKinds: return "NumMatchClassKinds"; |
5189 | 0 | } |
5190 | 0 | llvm_unreachable("unhandled MatchClassKind!"); |
5191 | 0 | } |
5192 | | |
5193 | | #endif // NDEBUG |
5194 | | FeatureBitset PPCAsmParser:: |
5195 | 4 | ComputeAvailableFeatures(const FeatureBitset &FB) const { |
5196 | 4 | FeatureBitset Features; |
5197 | 4 | if (!FB[PPC::AIXOS] || FB[PPC::FeatureModernAIXAs]) |
5198 | 4 | Features.set(Feature_ModernAsBit); |
5199 | 4 | return Features; |
5200 | 4 | } |
5201 | | |
5202 | | static bool checkAsmTiedOperandConstraints(const PPCAsmParser&AsmParser, |
5203 | | unsigned Kind, |
5204 | | const OperandVector &Operands, |
5205 | 0 | uint64_t &ErrorInfo) { |
5206 | 0 | assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!"); |
5207 | 0 | const uint8_t *Converter = ConversionTable[Kind]; |
5208 | 0 | for (const uint8_t *p = Converter; *p; p += 2) { |
5209 | 0 | switch (*p) { |
5210 | 0 | case CVT_Tied: { |
5211 | 0 | unsigned OpIdx = *(p + 1); |
5212 | 0 | assert(OpIdx < (size_t)(std::end(TiedAsmOperandTable) - |
5213 | 0 | std::begin(TiedAsmOperandTable)) && |
5214 | 0 | "Tied operand not found"); |
5215 | 0 | unsigned OpndNum1 = TiedAsmOperandTable[OpIdx][1]; |
5216 | 0 | unsigned OpndNum2 = TiedAsmOperandTable[OpIdx][2]; |
5217 | 0 | if (OpndNum1 != OpndNum2) { |
5218 | 0 | auto &SrcOp1 = Operands[OpndNum1]; |
5219 | 0 | auto &SrcOp2 = Operands[OpndNum2]; |
5220 | 0 | if (!AsmParser.areEqualRegs(*SrcOp1, *SrcOp2)) { |
5221 | 0 | ErrorInfo = OpndNum2; |
5222 | 0 | return false; |
5223 | 0 | } |
5224 | 0 | } |
5225 | 0 | break; |
5226 | 0 | } |
5227 | 0 | default: |
5228 | 0 | break; |
5229 | 0 | } |
5230 | 0 | } |
5231 | 0 | return true; |
5232 | 0 | } |
5233 | | |
5234 | | static const char MnemonicTable[] = |
5235 | | "\003add\004addc\005addco\004adde\005addeo\005addex\006addg6s\004addi\005" |
5236 | | "addic\005addis\005addme\006addmeo\004addo\007addpcis\005addze\006addzeo" |
5237 | | "\003and\004andc\004andi\005andis\004attn\001b\002ba\002bc\003bc+\003bc-" |
5238 | | "\003bca\004bca+\004bca-\005bcctr\006bcctrl\006bcdadd\006bcdcfn\007bcdcf" |
5239 | | "sq\006bcdcfz\010bcdcpsgn\006bcdctn\007bcdctsq\006bcdctz\004bcds\tbcdset" |
5240 | | "sgn\005bcdsr\006bcdsub\010bcdtrunc\005bcdus\tbcdutrunc\003bcl\004bcl+\004" |
5241 | | "bcl-\004bcla\005bcla+\005bcla-\004bclr\005bclrl\004bctr\005bctrl\004bdn" |
5242 | | "z\005bdnz+\005bdnz-\005bdnza\006bdnza+\006bdnza-\005bdnzf\006bdnzfa\006" |
5243 | | "bdnzfl\007bdnzfla\007bdnzflr\010bdnzflrl\005bdnzl\006bdnzl+\006bdnzl-\006" |
5244 | | "bdnzla\007bdnzla+\007bdnzla-\006bdnzlr\007bdnzlr+\007bdnzlr-\007bdnzlrl" |
5245 | | "\010bdnzlrl+\010bdnzlrl-\005bdnzt\006bdnzta\006bdnztl\007bdnztla\007bdn" |
5246 | | "ztlr\010bdnztlrl\003bdz\004bdz+\004bdz-\004bdza\005bdza+\005bdza-\004bd" |
5247 | | "zf\005bdzfa\005bdzfl\006bdzfla\006bdzflr\007bdzflrl\004bdzl\005bdzl+\005" |
5248 | | "bdzl-\005bdzla\006bdzla+\006bdzla-\005bdzlr\006bdzlr+\006bdzlr-\006bdzl" |
5249 | | "rl\007bdzlrl+\007bdzlrl-\004bdzt\005bdzta\005bdztl\006bdztla\006bdztlr\007" |
5250 | | "bdztlrl\003beq\004beq+\004beq-\004beqa\005beqa+\005beqa-\006beqctr\007b" |
5251 | | "eqctr+\007beqctr-\007beqctrl\010beqctrl+\010beqctrl-\004beql\005beql+\005" |
5252 | | "beql-\005beqla\006beqla+\006beqla-\005beqlr\006beqlr+\006beqlr-\006beql" |
5253 | | "rl\007beqlrl+\007beqlrl-\002bf\003bf+\003bf-\003bfa\004bfa+\004bfa-\005" |
5254 | | "bfctr\006bfctr+\006bfctr-\006bfctrl\007bfctrl+\007bfctrl-\003bfl\004bfl" |
5255 | | "+\004bfl-\004bfla\005bfla+\005bfla-\004bflr\005bflr+\005bflr-\005bflrl\006" |
5256 | | "bflrl+\006bflrl-\003bge\004bge+\004bge-\004bgea\005bgea+\005bgea-\006bg" |
5257 | | "ectr\007bgectr+\007bgectr-\007bgectrl\010bgectrl+\010bgectrl-\004bgel\005" |
5258 | | "bgel+\005bgel-\005bgela\006bgela+\006bgela-\005bgelr\006bgelr+\006bgelr" |
5259 | | "-\006bgelrl\007bgelrl+\007bgelrl-\003bgt\004bgt+\004bgt-\004bgta\005bgt" |
5260 | | "a+\005bgta-\006bgtctr\007bgtctr+\007bgtctr-\007bgtctrl\010bgtctrl+\010b" |
5261 | | "gtctrl-\004bgtl\005bgtl+\005bgtl-\005bgtla\006bgtla+\006bgtla-\005bgtlr" |
5262 | | "\006bgtlr+\006bgtlr-\006bgtlrl\007bgtlrl+\007bgtlrl-\002bl\003bla\003bl" |
5263 | | "e\004ble+\004ble-\004blea\005blea+\005blea-\006blectr\007blectr+\007ble" |
5264 | | "ctr-\007blectrl\010blectrl+\010blectrl-\004blel\005blel+\005blel-\005bl" |
5265 | | "ela\006blela+\006blela-\005blelr\006blelr+\006blelr-\006blelrl\007blelr" |
5266 | | "l+\007blelrl-\003blr\004blrl\003blt\004blt+\004blt-\004blta\005blta+\005" |
5267 | | "blta-\006bltctr\007bltctr+\007bltctr-\007bltctrl\010bltctrl+\010bltctrl" |
5268 | | "-\004bltl\005bltl+\005bltl-\005bltla\006bltla+\006bltla-\005bltlr\006bl" |
5269 | | "tlr+\006bltlr-\006bltlrl\007bltlrl+\007bltlrl-\003bne\004bne+\004bne-\004" |
5270 | | "bnea\005bnea+\005bnea-\006bnectr\007bnectr+\007bnectr-\007bnectrl\010bn" |
5271 | | "ectrl+\010bnectrl-\004bnel\005bnel+\005bnel-\005bnela\006bnela+\006bnel" |
5272 | | "a-\005bnelr\006bnelr+\006bnelr-\006bnelrl\007bnelrl+\007bnelrl-\003bng\004" |
5273 | | "bng+\004bng-\004bnga\005bnga+\005bnga-\006bngctr\007bngctr+\007bngctr-\007" |
5274 | | "bngctrl\010bngctrl+\010bngctrl-\004bngl\005bngl+\005bngl-\005bngla\006b" |
5275 | | "ngla+\006bngla-\005bnglr\006bnglr+\006bnglr-\006bnglrl\007bnglrl+\007bn" |
5276 | | "glrl-\003bnl\004bnl+\004bnl-\004bnla\005bnla+\005bnla-\006bnlctr\007bnl" |
5277 | | "ctr+\007bnlctr-\007bnlctrl\010bnlctrl+\010bnlctrl-\004bnll\005bnll+\005" |
5278 | | "bnll-\005bnlla\006bnlla+\006bnlla-\005bnllr\006bnllr+\006bnllr-\006bnll" |
5279 | | "rl\007bnllrl+\007bnllrl-\003bns\004bns+\004bns-\004bnsa\005bnsa+\005bns" |
5280 | | "a-\006bnsctr\007bnsctr+\007bnsctr-\007bnsctrl\010bnsctrl+\010bnsctrl-\004" |
5281 | | "bnsl\005bnsl+\005bnsl-\005bnsla\006bnsla+\006bnsla-\005bnslr\006bnslr+\006" |
5282 | | "bnslr-\006bnslrl\007bnslrl+\007bnslrl-\003bnu\004bnu+\004bnu-\004bnua\005" |
5283 | | "bnua+\005bnua-\006bnuctr\007bnuctr+\007bnuctr-\007bnuctrl\010bnuctrl+\010" |
5284 | | "bnuctrl-\004bnul\005bnul+\005bnul-\005bnula\006bnula+\006bnula-\005bnul" |
5285 | | "r\006bnulr+\006bnulr-\006bnulrl\007bnulrl+\007bnulrl-\006bpermd\003brd\003" |
5286 | | "brh\005brinc\003brw\003bso\004bso+\004bso-\004bsoa\005bsoa+\005bsoa-\006" |
5287 | | "bsoctr\007bsoctr+\007bsoctr-\007bsoctrl\010bsoctrl+\010bsoctrl-\004bsol" |
5288 | | "\005bsol+\005bsol-\005bsola\006bsola+\006bsola-\005bsolr\006bsolr+\006b" |
5289 | | "solr-\006bsolrl\007bsolrl+\007bsolrl-\002bt\003bt+\003bt-\003bta\004bta" |
5290 | | "+\004bta-\005btctr\006btctr+\006btctr-\006btctrl\007btctrl+\007btctrl-\003" |
5291 | | "btl\004btl+\004btl-\004btla\005btla+\005btla-\004btlr\005btlr+\005btlr-" |
5292 | | "\005btlrl\006btlrl+\006btlrl-\003bun\004bun+\004bun-\004buna\005buna+\005" |
5293 | | "buna-\006bunctr\007bunctr+\007bunctr-\007bunctrl\010bunctrl+\010bunctrl" |
5294 | | "-\004bunl\005bunl+\005bunl-\005bunla\006bunla+\006bunla-\005bunlr\006bu" |
5295 | | "nlr+\006bunlr-\006bunlrl\007bunlrl+\007bunlrl-\006cbcdtd\006cdtbcd\006c" |
5296 | | "fuged\007clrbhrb\006clrldi\010clrlsldi\010clrlslwi\006clrlwi\006clrrdi\006" |
5297 | | "clrrwi\003cmp\004cmpb\004cmpd\005cmpdi\006cmpeqb\004cmpi\004cmpl\005cmp" |
5298 | | "ld\006cmpldi\005cmpli\005cmplw\006cmplwi\005cmprb\004cmpw\005cmpwi\006c" |
5299 | | "ntlzd\007cntlzdm\006cntlzw\006cnttzd\007cnttzdm\006cnttzw\004copy\007cp" |
5300 | | "abort\005crand\006crandc\005crclr\005creqv\006crmove\006crnand\005crnor" |
5301 | | "\005crnot\004cror\005crorc\005crset\005crxor\004dadd\005daddq\004darn\004" |
5302 | | "dcba\004dcbf\006dcbfep\005dcbfl\006dcbflp\006dcbfps\004dcbi\005dcbst\007" |
5303 | | "dcbstep\007dcbstps\004dcbt\006dcbtct\006dcbtds\006dcbtep\006dcbtst\010d" |
5304 | | "cbtstct\010dcbtstds\010dcbtstep\007dcbtstt\005dcbtt\004dcbz\006dcbzep\005" |
5305 | | "dcbzl\007dcbzlep\005dccci\006dcffix\007dcffixq\010dcffixqq\003dci\005dc" |
5306 | | "mpo\006dcmpoq\005dcmpu\006dcmpuq\005dctdp\006dctfix\007dctfixq\010dctfi" |
5307 | | "xqq\006dctqpq\006ddedpd\007ddedpdq\004ddiv\005ddivq\006denbcd\007denbcd" |
5308 | | "q\004diex\005diexq\004divd\005divde\006divdeo\006divdeu\007divdeuo\005d" |
5309 | | "ivdo\005divdu\006divduo\004divw\005divwe\006divweo\006divweu\007divweuo" |
5310 | | "\005divwo\005divwu\006divwuo\004dmmr\tdmsetdmrz\004dmul\005dmulq\005dmx" |
5311 | | "or\016dmxxextfdmr256\016dmxxextfdmr512\017dmxxinstfdmr256\017dmxxinstfd" |
5312 | | "mr512\004dqua\005dquai\006dquaiq\005dquaq\005drdpq\006drintn\007drintnq" |
5313 | | "\006drintx\007drintxq\005drrnd\006drrndq\004drsp\005dscli\006dscliq\005" |
5314 | | "dscri\006dscriq\003dss\006dssall\003dst\005dstst\006dststt\004dstt\004d" |
5315 | | "sub\005dsubq\006dtstdc\007dtstdcq\006dtstdg\007dtstdgq\006dtstex\007dts" |
5316 | | "texq\006dtstsf\007dtstsfi\010dtstsfiq\007dtstsfq\004dxex\005dxexq\006ef" |
5317 | | "dabs\006efdadd\006efdcfs\007efdcfsf\007efdcfsi\010efdcfsid\007efdcfuf\007" |
5318 | | "efdcfui\010efdcfuid\010efdcmpeq\010efdcmpgt\010efdcmplt\007efdctsf\007e" |
5319 | | "fdctsi\tefdctsidz\010efdctsiz\007efdctuf\007efdctui\tefdctuidz\010efdct" |
5320 | | "uiz\006efddiv\006efdmul\007efdnabs\006efdneg\006efdsub\010efdtsteq\010e" |
5321 | | "fdtstgt\010efdtstlt\006efsabs\006efsadd\006efscfd\007efscfsf\007efscfsi" |
5322 | | "\007efscfuf\007efscfui\010efscmpeq\010efscmpgt\010efscmplt\007efsctsf\007" |
5323 | | "efsctsi\010efsctsiz\007efsctuf\007efsctui\010efsctuiz\006efsdiv\006efsm" |
5324 | | "ul\007efsnabs\006efsneg\006efssub\010efststeq\010efststgt\010efststlt\005" |
5325 | | "eieio\003eqv\005evabs\007evaddiw\013evaddsmiaaw\013evaddssiaaw\013evadd" |
5326 | | "umiaaw\013evaddusiaaw\006evaddw\005evand\006evandc\007evcmpeq\010evcmpg" |
5327 | | "ts\010evcmpgtu\010evcmplts\010evcmpltu\010evcntlsw\010evcntlzw\007evdiv" |
5328 | | "ws\007evdivwu\005eveqv\007evextsb\007evextsh\007evfsabs\007evfsadd\010e" |
5329 | | "vfscfsf\010evfscfsi\010evfscfuf\010evfscfui\tevfscmpeq\tevfscmpgt\tevfs" |
5330 | | "cmplt\010evfsctsf\010evfsctsi\tevfsctsiz\010evfsctui\007evfsdiv\007evfs" |
5331 | | "mul\010evfsnabs\007evfsneg\007evfssub\tevfststeq\tevfststgt\tevfststlt\005" |
5332 | | "evldd\006evlddx\005evldh\006evldhx\005evldw\006evldwx\013evlhhesplat\014" |
5333 | | "evlhhesplatx\014evlhhossplat\015evlhhossplatx\014evlhhousplat\015evlhho" |
5334 | | "usplatx\006evlwhe\007evlwhex\007evlwhos\010evlwhosx\007evlwhou\010evlwh" |
5335 | | "oux\nevlwhsplat\013evlwhsplatx\nevlwwsplat\013evlwwsplatx\tevmergehi\013" |
5336 | | "evmergehilo\tevmergelo\013evmergelohi\013evmhegsmfaa\013evmhegsmfan\013" |
5337 | | "evmhegsmiaa\013evmhegsmian\013evmhegumiaa\013evmhegumian\010evmhesmf\te" |
5338 | | "vmhesmfa\013evmhesmfaaw\013evmhesmfanw\010evmhesmi\tevmhesmia\013evmhes" |
5339 | | "miaaw\013evmhesmianw\010evmhessf\tevmhessfa\013evmhessfaaw\013evmhessfa" |
5340 | | "nw\013evmhessiaaw\013evmhessianw\010evmheumi\tevmheumia\013evmheumiaaw\013" |
5341 | | "evmheumianw\013evmheusiaaw\013evmheusianw\013evmhogsmfaa\013evmhogsmfan" |
5342 | | "\013evmhogsmiaa\013evmhogsmian\013evmhogumiaa\013evmhogumian\010evmhosm" |
5343 | | "f\tevmhosmfa\013evmhosmfaaw\013evmhosmfanw\010evmhosmi\tevmhosmia\013ev" |
5344 | | "mhosmiaaw\013evmhosmianw\010evmhossf\tevmhossfa\013evmhossfaaw\013evmho" |
5345 | | "ssfanw\013evmhossiaaw\013evmhossianw\010evmhoumi\tevmhoumia\013evmhoumi" |
5346 | | "aaw\013evmhoumianw\013evmhousiaaw\013evmhousianw\005evmra\010evmwhsmf\t" |
5347 | | "evmwhsmfa\010evmwhsmi\tevmwhsmia\010evmwhssf\tevmwhssfa\010evmwhumi\tev" |
5348 | | "mwhumia\013evmwlsmiaaw\013evmwlsmianw\013evmwlssiaaw\013evmwlssianw\010" |
5349 | | "evmwlumi\tevmwlumia\013evmwlumiaaw\013evmwlumianw\013evmwlusiaaw\013evm" |
5350 | | "wlusianw\007evmwsmf\010evmwsmfa\tevmwsmfaa\tevmwsmfan\007evmwsmi\010evm" |
5351 | | "wsmia\tevmwsmiaa\tevmwsmian\007evmwssf\010evmwssfa\tevmwssfaa\tevmwssfa" |
5352 | | "n\007evmwumi\010evmwumia\tevmwumiaa\tevmwumian\006evnand\005evneg\005ev" |
5353 | | "nor\004evor\005evorc\005evrlw\006evrlwi\006evrndw\005evsel\005evslw\006" |
5354 | | "evslwi\tevsplatfi\010evsplati\007evsrwis\007evsrwiu\006evsrws\006evsrwu" |
5355 | | "\006evstdd\007evstddx\006evstdh\007evstdhx\006evstdw\007evstdwx\007evst" |
5356 | | "whe\010evstwhex\007evstwho\010evstwhox\007evstwwe\010evstwwex\007evstww" |
5357 | | "o\010evstwwox\014evsubfsmiaaw\014evsubfssiaaw\014evsubfumiaaw\014evsubf" |
5358 | | "usiaaw\007evsubfw\010evsubifw\005evxor\006extldi\006extlwi\006extrdi\006" |
5359 | | "extrwi\005extsb\005extsh\005extsw\010extswsli\004fabs\004fadd\005fadds\005" |
5360 | | "fcfid\006fcfids\006fcfidu\007fcfidus\005fcmpo\005fcmpu\006fcpsgn\005fct" |
5361 | | "id\006fctidu\007fctiduz\006fctidz\005fctiw\006fctiwu\007fctiwuz\006fcti" |
5362 | | "wz\004fdiv\005fdivs\005fmadd\006fmadds\003fmr\005fmsub\006fmsubs\004fmu" |
5363 | | "l\005fmuls\005fnabs\004fneg\006fnmadd\007fnmadds\006fnmsub\007fnmsubs\003" |
5364 | | "fre\004fres\004frim\004frin\004frip\004friz\004frsp\007frsqrte\010frsqr" |
5365 | | "tes\004fsel\005fsqrt\006fsqrts\004fsub\005fsubs\005ftdiv\006ftsqrt\007h" |
5366 | | "ashchk\010hashchkp\006hashst\007hashstp\005hrfid\006hwsync\004icbi\006i" |
5367 | | "cbiep\005icblc\005icblq\004icbt\006icbtls\005iccci\003ici\006inslwi\006" |
5368 | | "insrdi\006insrwi\004isel\006iseleq\006iselgt\006isellt\005isync\002la\005" |
5369 | | "lbarx\005lbepx\003lbz\006lbzcix\004lbzu\005lbzux\004lbzx\002ld\005ldarx" |
5370 | | "\004ldat\005ldbrx\005ldcix\003ldu\004ldux\003ldx\003lfd\006lfdepx\004lf" |
5371 | | "du\005lfdux\004lfdx\006lfiwax\006lfiwzx\003lfs\004lfsu\005lfsux\004lfsx" |
5372 | | "\003lha\005lharx\004lhau\005lhaux\004lhax\005lhbrx\005lhepx\003lhz\006l" |
5373 | | "hzcix\004lhzu\005lhzux\004lhzx\002li\003lis\003lmw\004lnia\002lq\005lqa" |
5374 | | "rx\004lswi\005lvebx\005lvehx\005lvewx\004lvsl\004lvsr\003lvx\004lvxl\003" |
5375 | | "lwa\005lwarx\004lwat\005lwaux\004lwax\005lwbrx\005lwepx\006lwsync\003lw" |
5376 | | "z\006lwzcix\004lwzu\005lwzux\004lwzx\004lxsd\005lxsdx\007lxsibzx\007lxs" |
5377 | | "ihzx\007lxsiwax\007lxsiwzx\005lxssp\006lxsspx\003lxv\007lxvb16x\006lxvd" |
5378 | | "2x\006lxvdsx\006lxvh8x\005lxvkq\004lxvl\005lxvll\004lxvp\006lxvprl\007l" |
5379 | | "xvprll\005lxvpx\006lxvrbx\006lxvrdx\006lxvrhx\005lxvrl\006lxvrll\006lxv" |
5380 | | "rwx\006lxvw4x\006lxvwsx\004lxvx\006maddhd\007maddhdu\006maddld\004mbar\004" |
5381 | | "mcrf\005mcrfs\006mcrxrx\005mfamr\005mfasr\007mfbhrbe\005mfbr0\005mfbr1\005" |
5382 | | "mfbr2\005mfbr3\005mfbr4\005mfbr5\005mfbr6\005mfbr7\006mfcfar\004mfcr\005" |
5383 | | "mfctr\005mfdar\007mfdbatl\007mfdbatu\006mfdccr\005mfdcr\006mfdear\005mf" |
5384 | | "dec\006mfdscr\007mfdsisr\005mfesr\006mffprd\007mffprwz\004mffs\010mffsc" |
5385 | | "drn\tmffscdrni\006mffsce\007mffscrn\010mffscrni\005mffsl\007mfibatl\007" |
5386 | | "mfibatu\006mficcr\004mflr\005mfmsr\006mfocrf\005mfpid\005mfpmr\005mfppr" |
5387 | | "\005mfpvr\006mfrtcl\006mfrtcu\006mfsdr1\tmfspefscr\005mfspr\006mfsprg\007" |
5388 | | "mfsprg0\007mfsprg1\007mfsprg2\007mfsprg3\007mfsprg4\007mfsprg5\007mfspr" |
5389 | | "g6\007mfsprg7\004mfsr\006mfsrin\006mfsrr0\006mfsrr1\006mfsrr2\006mfsrr3" |
5390 | | "\004mftb\006mftbhi\005mftbl\006mftblo\005mftbu\005mftcr\006mfuamr\007mf" |
5391 | | "udscr\005mfvrd\010mfvrsave\006mfvrwz\006mfvscr\006mfvsrd\007mfvsrld\007" |
5392 | | "mfvsrwz\005mfxer\005modsd\005modsw\005modud\005moduw\002mr\007msgsync\005" |
5393 | | "msync\005mtamr\005mtasr\005mtbr0\005mtbr1\005mtbr2\005mtbr3\005mtbr4\005" |
5394 | | "mtbr5\005mtbr6\005mtbr7\006mtcfar\004mtcr\005mtcrf\005mtctr\005mtdar\007" |
5395 | | "mtdbatl\007mtdbatu\006mtdccr\005mtdcr\006mtdear\005mtdec\006mtdscr\007m" |
5396 | | "tdsisr\005mtesr\006mtfprd\007mtfprwa\007mtfprwz\006mtfsb0\006mtfsb1\005" |
5397 | | "mtfsf\006mtfsfi\007mtibatl\007mtibatu\006mticcr\004mtlr\005mtmsr\006mtm" |
5398 | | "srd\006mtocrf\005mtpid\005mtpmr\005mtppr\006mtsdr1\tmtspefscr\005mtspr\006" |
5399 | | "mtsprg\007mtsprg0\007mtsprg1\007mtsprg2\007mtsprg3\007mtsprg4\007mtsprg" |
5400 | | "5\007mtsprg6\007mtsprg7\004mtsr\006mtsrin\006mtsrr0\006mtsrr1\006mtsrr2" |
5401 | | "\006mtsrr3\006mttbhi\005mttbl\006mttblo\005mttbu\005mttcr\006mtuamr\007" |
5402 | | "mtudscr\005mtvrd\010mtvrsave\006mtvrwa\006mtvrwz\006mtvscr\007mtvsrbm\010" |
5403 | | "mtvsrbmi\006mtvsrd\007mtvsrdd\007mtvsrdm\007mtvsrhm\007mtvsrqm\007mtvsr" |
5404 | | "wa\007mtvsrwm\007mtvsrws\007mtvsrwz\005mtxer\005mulhd\006mulhdu\005mulh" |
5405 | | "w\006mulhwu\005mulld\006mulldo\005mulli\005mullw\006mullwo\004nand\003n" |
5406 | | "ap\003neg\004nego\003nop\003nor\003not\002or\003orc\003ori\004oris\005p" |
5407 | | "addi\005paste\013pause_short\005pdepd\005pextd\007phwsync\003pla\004plb" |
5408 | | "z\003pld\004plfd\004plfs\004plha\004plhz\003pli\004plwa\007plwsync\004p" |
5409 | | "lwz\005plxsd\006plxssp\004plxv\005plxvp\014pmxvbf16ger2\016pmxvbf16ger2" |
5410 | | "nn\016pmxvbf16ger2np\016pmxvbf16ger2pn\016pmxvbf16ger2pp\013pmxvf16ger2" |
5411 | | "\015pmxvf16ger2nn\015pmxvf16ger2np\015pmxvf16ger2pn\015pmxvf16ger2pp\np" |
5412 | | "mxvf32ger\014pmxvf32gernn\014pmxvf32gernp\014pmxvf32gerpn\014pmxvf32ger" |
5413 | | "pp\npmxvf64ger\014pmxvf64gernn\014pmxvf64gernp\014pmxvf64gerpn\014pmxvf" |
5414 | | "64gerpp\013pmxvi16ger2\015pmxvi16ger2pp\014pmxvi16ger2s\016pmxvi16ger2s" |
5415 | | "pp\npmxvi4ger8\014pmxvi4ger8pp\npmxvi8ger4\014pmxvi8ger4pp\015pmxvi8ger" |
5416 | | "4spp\007popcntb\007popcntd\007popcntw\004pstb\004pstd\005pstfd\005pstfs" |
5417 | | "\004psth\004pstw\006pstxsd\007pstxssp\005pstxv\006pstxvp\005psubi\007pt" |
5418 | | "esync\004rfci\004rfdi\005rfebb\003rfi\004rfid\005rfmci\005rldcl\005rldc" |
5419 | | "r\005rldic\006rldicl\006rldicr\006rldimi\006rlwimi\006rlwinm\005rlwnm\005" |
5420 | | "rotld\006rotldi\005rotlw\006rotlwi\006rotrdi\006rotrwi\002sc\003scv\004" |
5421 | | "setb\005setbc\006setbcr\006setnbc\007setnbcr\006slbfee\005slbia\005slbi" |
5422 | | "e\006slbieg\007slbmfee\007slbmfev\006slbmte\007slbsync\003sld\004sldi\003" |
5423 | | "slw\004slwi\004srad\005sradi\004sraw\005srawi\003srd\004srdi\003srw\004" |
5424 | | "srwi\003stb\006stbcix\005stbcx\006stbepx\004stbu\005stbux\004stbx\010st" |
5425 | | "cisync\003std\005stdat\006stdbrx\006stdcix\005stdcx\004stdu\005stdux\004" |
5426 | | "stdx\004stfd\007stfdepx\005stfdu\006stfdux\005stfdx\006stfiwx\004stfs\005" |
5427 | | "stfsu\006stfsux\005stfsx\003sth\006sthbrx\006sthcix\005sthcx\006sthepx\004" |
5428 | | "sthu\005sthux\004sthx\004stmw\tstncisync\004stop\003stq\005stqcx\005sts" |
5429 | | "wi\006stsync\006stvebx\006stvehx\006stvewx\004stvx\005stvxl\003stw\005s" |
5430 | | "twat\006stwbrx\006stwcix\005stwcx\006stwepx\004stwu\005stwux\004stwx\005" |
5431 | | "stxsd\006stxsdx\007stxsibx\007stxsihx\007stxsiwx\006stxssp\007stxsspx\004" |
5432 | | "stxv\010stxvb16x\007stxvd2x\007stxvh8x\005stxvl\006stxvll\005stxvp\007s" |
5433 | | "txvprl\010stxvprll\006stxvpx\007stxvrbx\007stxvrdx\007stxvrhx\006stxvrl" |
5434 | | "\007stxvrll\007stxvrwx\007stxvw4x\005stxvx\003sub\004subc\004subf\005su" |
5435 | | "bfc\006subfco\005subfe\006subfeo\006subfic\006subfme\007subfmeo\005subf" |
5436 | | "o\006subfus\006subfze\007subfzeo\004subi\005subic\005subis\007subpcis\004" |
5437 | | "sync\006tabort\010tabortdc\ttabortdci\010tabortwc\ttabortwci\006tbegin\006" |
5438 | | "tcheck\002td\004tdeq\005tdeqi\004tdge\005tdgei\004tdgt\005tdgti\003tdi\004" |
5439 | | "tdle\005tdlei\005tdlge\006tdlgei\005tdlgt\006tdlgti\005tdlle\006tdllei\005" |
5440 | | "tdllt\006tdllti\005tdlng\006tdlngi\005tdlnl\006tdlnli\004tdlt\005tdlti\004" |
5441 | | "tdne\005tdnei\004tdng\005tdngi\004tdnl\005tdnli\003tdu\004tdui\004tend\007" |
5442 | | "tendall\005tlbia\005tlbie\006tlbiel\006tlbilx\ntlbilxlpid\ttlbilxpid\010" |
5443 | | "tlbilxva\007tlbivax\005tlbld\005tlbli\005tlbre\007tlbrehi\007tlbrelo\005" |
5444 | | "tlbsx\007tlbsync\005tlbwe\007tlbwehi\007tlbwelo\004trap\010trechkpt\010" |
5445 | | "treclaim\007tresume\003tsr\010tsuspend\002tw\004tweq\005tweqi\004twge\005" |
5446 | | "twgei\004twgt\005twgti\003twi\004twle\005twlei\005twlge\006twlgei\005tw" |
5447 | | "lgt\006twlgti\005twlle\006twllei\005twllt\006twllti\005twlng\006twlngi\005" |
5448 | | "twlnl\006twlnli\004twlt\005twlti\004twne\005twnei\004twng\005twngi\004t" |
5449 | | "wnl\005twnli\003twu\004twui\007vabsdub\007vabsduh\007vabsduw\007vaddcuq" |
5450 | | "\007vaddcuw\010vaddecuq\010vaddeuqm\006vaddfp\007vaddsbs\007vaddshs\007" |
5451 | | "vaddsws\007vaddubm\007vaddubs\007vaddudm\007vadduhm\007vadduhs\007vaddu" |
5452 | | "qm\007vadduwm\007vadduws\004vand\005vandc\006vavgsb\006vavgsh\006vavgsw" |
5453 | | "\006vavgub\006vavguh\006vavguw\007vbpermd\007vbpermq\005vcfsx\007vcfuge" |
5454 | | "d\005vcfux\007vcipher\013vcipherlast\006vclrlb\006vclrrb\005vclzb\005vc" |
5455 | | "lzd\006vclzdm\005vclzh\010vclzlsbb\005vclzw\007vcmpbfp\010vcmpeqfp\010v" |
5456 | | "cmpequb\010vcmpequd\010vcmpequh\010vcmpequq\010vcmpequw\010vcmpgefp\010" |
5457 | | "vcmpgtfp\010vcmpgtsb\010vcmpgtsd\010vcmpgtsh\010vcmpgtsq\010vcmpgtsw\010" |
5458 | | "vcmpgtub\010vcmpgtud\010vcmpgtuh\010vcmpgtuq\010vcmpgtuw\007vcmpneb\007" |
5459 | | "vcmpneh\007vcmpnew\010vcmpnezb\010vcmpnezh\010vcmpnezw\006vcmpsq\006vcm" |
5460 | | "puq\007vcntmbb\007vcntmbd\007vcntmbh\007vcntmbw\006vctsxs\006vctuxs\005" |
5461 | | "vctzb\005vctzd\006vctzdm\005vctzh\010vctzlsbb\005vctzw\007vdivesd\007vd" |
5462 | | "ivesq\007vdivesw\007vdiveud\007vdiveuq\007vdiveuw\006vdivsd\006vdivsq\006" |
5463 | | "vdivsw\006vdivud\006vdivuq\006vdivuw\004veqv\tvexpandbm\tvexpanddm\tvex" |
5464 | | "pandhm\tvexpandqm\tvexpandwm\010vexptefp\tvextddvlx\tvextddvrx\nvextdub" |
5465 | | "vlx\nvextdubvrx\nvextduhvlx\nvextduhvrx\nvextduwvlx\nvextduwvrx\nvextra" |
5466 | | "ctbm\tvextractd\nvextractdm\nvextracthm\nvextractqm\nvextractub\nvextra" |
5467 | | "ctuh\nvextractuw\nvextractwm\010vextsb2d\010vextsb2w\010vextsd2q\010vex" |
5468 | | "tsh2d\010vextsh2w\010vextsw2d\010vextublx\010vextubrx\010vextuhlx\010ve" |
5469 | | "xtuhrx\010vextuwlx\010vextuwrx\005vgbbd\004vgnb\007vinsblx\007vinsbrx\010" |
5470 | | "vinsbvlx\010vinsbvrx\005vinsd\007vinsdlx\007vinsdrx\010vinsertb\010vins" |
5471 | | "ertd\010vinserth\010vinsertw\007vinshlx\007vinshrx\010vinshvlx\010vinsh" |
5472 | | "vrx\005vinsw\007vinswlx\007vinswrx\010vinswvlx\010vinswvrx\007vlogefp\007" |
5473 | | "vmaddfp\006vmaxfp\006vmaxsb\006vmaxsd\006vmaxsh\006vmaxsw\006vmaxub\006" |
5474 | | "vmaxud\006vmaxuh\006vmaxuw\tvmhaddshs\nvmhraddshs\006vminfp\006vminsb\006" |
5475 | | "vminsd\006vminsh\006vminsw\006vminub\006vminud\006vminuh\006vminuw\tvml" |
5476 | | "adduhm\006vmodsd\006vmodsq\006vmodsw\006vmodud\006vmoduq\006vmoduw\003v" |
5477 | | "mr\006vmrgew\006vmrghb\006vmrghh\006vmrghw\006vmrglb\006vmrglh\006vmrgl" |
5478 | | "w\006vmrgow\010vmsumcud\010vmsummbm\010vmsumshm\010vmsumshs\010vmsumubm" |
5479 | | "\010vmsumudm\010vmsumuhm\010vmsumuhs\tvmul10cuq\nvmul10ecuq\tvmul10euq\010" |
5480 | | "vmul10uq\007vmulesb\007vmulesd\007vmulesh\007vmulesw\007vmuleub\007vmul" |
5481 | | "eud\007vmuleuh\007vmuleuw\007vmulhsd\007vmulhsw\007vmulhud\007vmulhuw\006" |
5482 | | "vmulld\007vmulosb\007vmulosd\007vmulosh\007vmulosw\007vmuloub\007vmulou" |
5483 | | "d\007vmulouh\007vmulouw\007vmuluwm\005vnand\010vncipher\014vncipherlast" |
5484 | | "\005vnegd\005vnegw\010vnmsubfp\004vnor\004vnot\003vor\004vorc\006vpdepd" |
5485 | | "\005vperm\006vpermr\010vpermxor\006vpextd\005vpkpx\007vpksdss\007vpksdu" |
5486 | | "s\007vpkshss\007vpkshus\007vpkswss\007vpkswus\007vpkudum\007vpkudus\007" |
5487 | | "vpkuhum\007vpkuhus\007vpkuwum\007vpkuwus\007vpmsumb\007vpmsumd\007vpmsu" |
5488 | | "mh\007vpmsumw\010vpopcntb\010vpopcntd\010vpopcnth\010vpopcntw\007vprtyb" |
5489 | | "d\007vprtybq\007vprtybw\005vrefp\005vrfim\005vrfin\005vrfip\005vrfiz\004" |
5490 | | "vrlb\004vrld\006vrldmi\006vrldnm\004vrlh\004vrlq\006vrlqmi\006vrlqnm\004" |
5491 | | "vrlw\006vrlwmi\006vrlwnm\tvrsqrtefp\005vsbox\004vsel\nvshasigmad\nvshas" |
5492 | | "igmaw\003vsl\004vslb\004vsld\006vsldbi\006vsldoi\004vslh\004vslo\004vsl" |
5493 | | "q\004vslv\004vslw\006vspltb\006vsplth\010vspltisb\010vspltish\010vsplti" |
5494 | | "sw\006vspltw\003vsr\005vsrab\005vsrad\005vsrah\005vsraq\005vsraw\004vsr" |
5495 | | "b\004vsrd\006vsrdbi\004vsrh\004vsro\004vsrq\004vsrv\004vsrw\007vstribl\007" |
5496 | | "vstribr\007vstrihl\007vstrihr\007vsubcuq\007vsubcuw\010vsubecuq\010vsub" |
5497 | | "euqm\006vsubfp\007vsubsbs\007vsubshs\007vsubsws\007vsububm\007vsububs\007" |
5498 | | "vsubudm\007vsubuhm\007vsubuhs\007vsubuqm\007vsubuwm\007vsubuws\010vsum2" |
5499 | | "sws\010vsum4sbs\010vsum4shs\010vsum4ubs\007vsumsws\007vupkhpx\007vupkhs" |
5500 | | "b\007vupkhsh\007vupkhsw\007vupklpx\007vupklsb\007vupklsh\007vupklsw\004" |
5501 | | "vxor\004wait\010waitimpl\007waitrsv\005wrtee\006wrteei\005wsync\004xnop" |
5502 | | "\003xor\004xori\005xoris\007xsabsdp\007xsabsqp\007xsadddp\007xsaddqp\010" |
5503 | | "xsaddqpo\007xsaddsp\txscmpeqdp\txscmpeqqp\nxscmpexpdp\nxscmpexpqp\txscm" |
5504 | | "pgedp\txscmpgeqp\txscmpgtdp\txscmpgtqp\010xscmpodp\010xscmpoqp\010xscmp" |
5505 | | "udp\010xscmpuqp\txscpsgndp\txscpsgnqp\010xscvdphp\010xscvdpqp\010xscvdp" |
5506 | | "sp\txscvdpspn\nxscvdpsxds\nxscvdpsxws\nxscvdpuxds\nxscvdpuxws\010xscvhp" |
5507 | | "dp\010xscvqpdp\txscvqpdpo\txscvqpsdz\txscvqpsqz\txscvqpswz\txscvqpudz\t" |
5508 | | "xscvqpuqz\txscvqpuwz\010xscvsdqp\010xscvspdp\txscvspdpn\010xscvsqqp\txs" |
5509 | | "cvsxddp\txscvsxdsp\010xscvudqp\010xscvuqqp\txscvuxddp\txscvuxdsp\007xsd" |
5510 | | "ivdp\007xsdivqp\010xsdivqpo\007xsdivsp\010xsiexpdp\010xsiexpqp\txsmadda" |
5511 | | "dp\txsmaddasp\txsmaddmdp\txsmaddmsp\010xsmaddqp\txsmaddqpo\010xsmaxcdp\010" |
5512 | | "xsmaxcqp\007xsmaxdp\010xsmaxjdp\010xsmincdp\010xsmincqp\007xsmindp\010x" |
5513 | | "sminjdp\txsmsubadp\txsmsubasp\txsmsubmdp\txsmsubmsp\010xsmsubqp\txsmsub" |
5514 | | "qpo\007xsmuldp\007xsmulqp\010xsmulqpo\007xsmulsp\010xsnabsdp\010xsnabsq" |
5515 | | "p\007xsnegdp\007xsnegqp\nxsnmaddadp\nxsnmaddasp\nxsnmaddmdp\nxsnmaddmsp" |
5516 | | "\txsnmaddqp\nxsnmaddqpo\nxsnmsubadp\nxsnmsubasp\nxsnmsubmdp\nxsnmsubmsp" |
5517 | | "\txsnmsubqp\nxsnmsubqpo\006xsrdpi\007xsrdpic\007xsrdpim\007xsrdpip\007x" |
5518 | | "srdpiz\006xsredp\006xsresp\006xsrqpi\007xsrqpix\007xsrqpxp\005xsrsp\nxs" |
5519 | | "rsqrtedp\nxsrsqrtesp\010xssqrtdp\010xssqrtqp\txssqrtqpo\010xssqrtsp\007" |
5520 | | "xssubdp\007xssubqp\010xssubqpo\007xssubsp\010xstdivdp\txstsqrtdp\txstst" |
5521 | | "dcdp\txststdcqp\txststdcsp\010xsxexpdp\010xsxexpqp\010xsxsigdp\010xsxsi" |
5522 | | "gqp\007xvabsdp\007xvabssp\007xvadddp\007xvaddsp\nxvbf16ger2\014xvbf16ge" |
5523 | | "r2nn\014xvbf16ger2np\014xvbf16ger2pn\014xvbf16ger2pp\txvcmpeqdp\txvcmpe" |
5524 | | "qsp\txvcmpgedp\txvcmpgesp\txvcmpgtdp\txvcmpgtsp\txvcpsgndp\txvcpsgnsp\013" |
5525 | | "xvcvbf16spn\010xvcvdpsp\nxvcvdpsxds\nxvcvdpsxws\nxvcvdpuxds\nxvcvdpuxws" |
5526 | | "\010xvcvhpsp\nxvcvspbf16\010xvcvspdp\010xvcvsphp\nxvcvspsxds\nxvcvspsxw" |
5527 | | "s\nxvcvspuxds\nxvcvspuxws\txvcvsxddp\txvcvsxdsp\txvcvsxwdp\txvcvsxwsp\t" |
5528 | | "xvcvuxddp\txvcvuxdsp\txvcvuxwdp\txvcvuxwsp\007xvdivdp\007xvdivsp\txvf16" |
5529 | | "ger2\013xvf16ger2nn\013xvf16ger2np\013xvf16ger2pn\013xvf16ger2pp\010xvf" |
5530 | | "32ger\nxvf32gernn\nxvf32gernp\nxvf32gerpn\nxvf32gerpp\010xvf64ger\nxvf6" |
5531 | | "4gernn\nxvf64gernp\nxvf64gerpn\nxvf64gerpp\txvi16ger2\013xvi16ger2pp\nx" |
5532 | | "vi16ger2s\014xvi16ger2spp\010xvi4ger8\nxvi4ger8pp\010xvi8ger4\nxvi8ger4" |
5533 | | "pp\013xvi8ger4spp\010xviexpdp\010xviexpsp\txvmaddadp\txvmaddasp\txvmadd" |
5534 | | "mdp\txvmaddmsp\007xvmaxdp\007xvmaxsp\007xvmindp\007xvminsp\007xvmovdp\007" |
5535 | | "xvmovsp\txvmsubadp\txvmsubasp\txvmsubmdp\txvmsubmsp\007xvmuldp\007xvmul" |
5536 | | "sp\010xvnabsdp\010xvnabssp\007xvnegdp\007xvnegsp\nxvnmaddadp\nxvnmaddas" |
5537 | | "p\nxvnmaddmdp\nxvnmaddmsp\nxvnmsubadp\nxvnmsubasp\nxvnmsubmdp\nxvnmsubm" |
5538 | | "sp\006xvrdpi\007xvrdpic\007xvrdpim\007xvrdpip\007xvrdpiz\006xvredp\006x" |
5539 | | "vresp\006xvrspi\007xvrspic\007xvrspim\007xvrspip\007xvrspiz\nxvrsqrtedp" |
5540 | | "\nxvrsqrtesp\010xvsqrtdp\010xvsqrtsp\007xvsubdp\007xvsubsp\010xvtdivdp\010" |
5541 | | "xvtdivsp\007xvtlsbb\txvtsqrtdp\txvtsqrtsp\txvtstdcdp\txvtstdcsp\010xvxe" |
5542 | | "xpdp\010xvxexpsp\010xvxsigdp\010xvxsigsp\txxblendvb\txxblendvd\txxblend" |
5543 | | "vh\txxblendvw\005xxbrd\005xxbrh\005xxbrq\005xxbrw\006xxeval\013xxextrac" |
5544 | | "tuw\nxxgenpcvbm\nxxgenpcvdm\nxxgenpcvhm\nxxgenpcvwm\txxinsertw\006xxlan" |
5545 | | "d\007xxlandc\006xxleqv\007xxlnand\006xxlnor\005xxlor\006xxlorc\006xxlxo" |
5546 | | "r\007xxmfacc\007xxmrghd\007xxmrghw\007xxmrgld\007xxmrglw\007xxmtacc\006" |
5547 | | "xxperm\010xxpermdi\007xxpermr\007xxpermx\005xxsel\txxsetaccz\007xxsldwi" |
5548 | | "\007xxspltd\013xxsplti32dx\010xxspltib\txxspltidp\010xxspltiw\007xxsplt" |
5549 | | "w\007xxswapd"; |
5550 | | |
5551 | | // Feature bitsets. |
5552 | | enum : uint8_t { |
5553 | | AMFBS_None, |
5554 | | AMFBS_ModernAs, |
5555 | | }; |
5556 | | |
5557 | | static constexpr FeatureBitset FeatureBitsets[] = { |
5558 | | {}, // AMFBS_None |
5559 | | {Feature_ModernAsBit, }, |
5560 | | }; |
5561 | | |
5562 | | namespace { |
5563 | | struct MatchEntry { |
5564 | | uint16_t Mnemonic; |
5565 | | uint16_t Opcode; |
5566 | | uint16_t ConvertFn; |
5567 | | uint8_t RequiredFeaturesIdx; |
5568 | | uint8_t Classes[6]; |
5569 | 0 | StringRef getMnemonic() const { |
5570 | 0 | return StringRef(MnemonicTable + Mnemonic + 1, |
5571 | 0 | MnemonicTable[Mnemonic]); |
5572 | 0 | } |
5573 | | }; |
5574 | | |
5575 | | // Predicate for searching for an opcode. |
5576 | | struct LessOpcode { |
5577 | 0 | bool operator()(const MatchEntry &LHS, StringRef RHS) { |
5578 | 0 | return LHS.getMnemonic() < RHS; |
5579 | 0 | } |
5580 | 0 | bool operator()(StringRef LHS, const MatchEntry &RHS) { |
5581 | 0 | return LHS < RHS.getMnemonic(); |
5582 | 0 | } |
5583 | 0 | bool operator()(const MatchEntry &LHS, const MatchEntry &RHS) { |
5584 | 0 | return LHS.getMnemonic() < RHS.getMnemonic(); |
5585 | 0 | } |
5586 | | }; |
5587 | | } // end anonymous namespace |
5588 | | |
5589 | | static const MatchEntry MatchTable0[] = { |
5590 | | { 0 /* add */, PPC::ADD8TLS_, Convert__RegG8RC1_0__RegG8RC1_1__TLSReg1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_TLSReg }, }, |
5591 | | { 0 /* add */, PPC::ADD4, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
5592 | | { 0 /* add */, PPC::ADD4_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
5593 | | { 4 /* addc */, PPC::ADDC, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
5594 | | { 4 /* addc */, PPC::ADDC_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
5595 | | { 9 /* addco */, PPC::ADDCO, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
5596 | | { 9 /* addco */, PPC::ADDCO_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
5597 | | { 15 /* adde */, PPC::ADDE, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
5598 | | { 15 /* adde */, PPC::ADDE_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
5599 | | { 20 /* addeo */, PPC::ADDEO, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
5600 | | { 20 /* addeo */, PPC::ADDEO_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
5601 | | { 26 /* addex */, PPC::ADDEX, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2__U2Imm1_3, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC, MCK_U2Imm }, }, |
5602 | | { 32 /* addg6s */, PPC::ADDG6S, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
5603 | | { 39 /* addi */, PPC::ADDI, Convert__RegGPRC1_0__RegGPRCNoR01_1__S16Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRCNoR0, MCK_S16Imm }, }, |
5604 | | { 44 /* addic */, PPC::ADDIC, Convert__RegGPRC1_0__RegGPRC1_1__S16Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_S16Imm }, }, |
5605 | | { 44 /* addic */, PPC::ADDIC_rec, Convert__RegGPRC1_1__RegGPRC1_2__S16Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_S16Imm }, }, |
5606 | | { 50 /* addis */, PPC::ADDIS, Convert__RegGPRC1_0__RegGPRCNoR01_1__S17Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRCNoR0, MCK_S17Imm }, }, |
5607 | | { 56 /* addme */, PPC::ADDME, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
5608 | | { 56 /* addme */, PPC::ADDME_rec, Convert__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC }, }, |
5609 | | { 62 /* addmeo */, PPC::ADDMEO, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
5610 | | { 62 /* addmeo */, PPC::ADDMEO_rec, Convert__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC }, }, |
5611 | | { 69 /* addo */, PPC::ADD4O, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
5612 | | { 69 /* addo */, PPC::ADD4O_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
5613 | | { 74 /* addpcis */, PPC::ADDPCIS, Convert__RegG8RC1_0__Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_Imm }, }, |
5614 | | { 82 /* addze */, PPC::ADDZE, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
5615 | | { 82 /* addze */, PPC::ADDZE_rec, Convert__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC }, }, |
5616 | | { 88 /* addzeo */, PPC::ADDZEO, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
5617 | | { 88 /* addzeo */, PPC::ADDZEO_rec, Convert__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC }, }, |
5618 | | { 95 /* and */, PPC::AND, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
5619 | | { 95 /* and */, PPC::AND_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
5620 | | { 99 /* andc */, PPC::ANDC, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
5621 | | { 99 /* andc */, PPC::ANDC_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
5622 | | { 104 /* andi */, PPC::ANDI_rec, Convert__RegGPRC1_1__RegGPRC1_2__U16Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_U16Imm }, }, |
5623 | | { 109 /* andis */, PPC::ANDIS_rec, Convert__RegGPRC1_1__RegGPRC1_2__U16Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_U16Imm }, }, |
5624 | | { 115 /* attn */, PPC::ATTN, Convert_NoOperands, AMFBS_None, { }, }, |
5625 | | { 120 /* b */, PPC::B, Convert__DirectBr1_0, AMFBS_None, { MCK_DirectBr }, }, |
5626 | | { 122 /* ba */, PPC::BA, Convert__DirectBr1_0, AMFBS_None, { MCK_DirectBr }, }, |
5627 | | { 125 /* bc */, PPC::gBC, Convert__U5Imm1_0__RegCRBITRC1_1__CondBr1_2, AMFBS_None, { MCK_U5Imm, MCK_RegCRBITRC, MCK_CondBr }, }, |
5628 | | { 125 /* bc */, PPC::gBCat, Convert__U5Imm1_1__ATBitsAsHint1_0__RegCRBITRC1_2__CondBr1_3, AMFBS_None, { MCK_ATBitsAsHint, MCK_U5Imm, MCK_RegCRBITRC, MCK_CondBr }, }, |
5629 | | { 128 /* bc+ */, PPC::gBCat, Convert__U5Imm1_0__imm_95_3__RegCRBITRC1_1__CondBr1_2, AMFBS_None, { MCK_U5Imm, MCK_RegCRBITRC, MCK_CondBr }, }, |
5630 | | { 132 /* bc- */, PPC::gBCat, Convert__U5Imm1_0__imm_95_2__RegCRBITRC1_1__CondBr1_2, AMFBS_None, { MCK_U5Imm, MCK_RegCRBITRC, MCK_CondBr }, }, |
5631 | | { 136 /* bca */, PPC::gBCA, Convert__U5Imm1_0__RegCRBITRC1_1__CondBr1_2, AMFBS_None, { MCK_U5Imm, MCK_RegCRBITRC, MCK_CondBr }, }, |
5632 | | { 136 /* bca */, PPC::gBCAat, Convert__U5Imm1_1__ATBitsAsHint1_0__RegCRBITRC1_2__CondBr1_3, AMFBS_None, { MCK_ATBitsAsHint, MCK_U5Imm, MCK_RegCRBITRC, MCK_CondBr }, }, |
5633 | | { 140 /* bca+ */, PPC::gBCAat, Convert__U5Imm1_0__imm_95_3__RegCRBITRC1_1__CondBr1_2, AMFBS_None, { MCK_U5Imm, MCK_RegCRBITRC, MCK_CondBr }, }, |
5634 | | { 145 /* bca- */, PPC::gBCAat, Convert__U5Imm1_0__imm_95_2__RegCRBITRC1_1__CondBr1_2, AMFBS_None, { MCK_U5Imm, MCK_RegCRBITRC, MCK_CondBr }, }, |
5635 | | { 150 /* bcctr */, PPC::gBCCTR, Convert__U5Imm1_0__RegCRBITRC1_1__imm_95_0, AMFBS_None, { MCK_U5Imm, MCK_RegCRBITRC }, }, |
5636 | | { 150 /* bcctr */, PPC::gBCCTR, Convert__U5Imm1_0__RegCRBITRC1_1__Imm1_2, AMFBS_None, { MCK_U5Imm, MCK_RegCRBITRC, MCK_Imm }, }, |
5637 | | { 156 /* bcctrl */, PPC::gBCCTRL, Convert__U5Imm1_0__RegCRBITRC1_1__imm_95_0, AMFBS_None, { MCK_U5Imm, MCK_RegCRBITRC }, }, |
5638 | | { 156 /* bcctrl */, PPC::gBCCTRL, Convert__U5Imm1_0__RegCRBITRC1_1__Imm1_2, AMFBS_None, { MCK_U5Imm, MCK_RegCRBITRC, MCK_Imm }, }, |
5639 | | { 163 /* bcdadd */, PPC::BCDADD_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3__U1Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_U1Imm }, }, |
5640 | | { 170 /* bcdcfn */, PPC::BCDCFN_rec, Convert__RegVRRC1_1__RegVRRC1_2__U1Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_U1Imm }, }, |
5641 | | { 177 /* bcdcfsq */, PPC::BCDCFSQ_rec, Convert__RegVRRC1_1__RegVRRC1_2__U1Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_U1Imm }, }, |
5642 | | { 185 /* bcdcfz */, PPC::BCDCFZ_rec, Convert__RegVRRC1_1__RegVRRC1_2__U1Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_U1Imm }, }, |
5643 | | { 192 /* bcdcpsgn */, PPC::BCDCPSGN_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
5644 | | { 201 /* bcdctn */, PPC::BCDCTN_rec, Convert__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC }, }, |
5645 | | { 208 /* bcdctsq */, PPC::BCDCTSQ_rec, Convert__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC }, }, |
5646 | | { 216 /* bcdctz */, PPC::BCDCTZ_rec, Convert__RegVRRC1_1__RegVRRC1_2__U1Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_U1Imm }, }, |
5647 | | { 223 /* bcds */, PPC::BCDS_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3__U1Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_U1Imm }, }, |
5648 | | { 228 /* bcdsetsgn */, PPC::BCDSETSGN_rec, Convert__RegVRRC1_1__RegVRRC1_2__U1Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_U1Imm }, }, |
5649 | | { 238 /* bcdsr */, PPC::BCDSR_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3__U1Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_U1Imm }, }, |
5650 | | { 244 /* bcdsub */, PPC::BCDSUB_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3__U1Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_U1Imm }, }, |
5651 | | { 251 /* bcdtrunc */, PPC::BCDTRUNC_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3__U1Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_U1Imm }, }, |
5652 | | { 260 /* bcdus */, PPC::BCDUS_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
5653 | | { 266 /* bcdutrunc */, PPC::BCDUTRUNC_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
5654 | | { 276 /* bcl */, PPC::gBCL, Convert__U5Imm1_0__RegCRBITRC1_1__CondBr1_2, AMFBS_None, { MCK_U5Imm, MCK_RegCRBITRC, MCK_CondBr }, }, |
5655 | | { 276 /* bcl */, PPC::gBCLat, Convert__U5Imm1_1__ATBitsAsHint1_0__RegCRBITRC1_2__CondBr1_3, AMFBS_None, { MCK_ATBitsAsHint, MCK_U5Imm, MCK_RegCRBITRC, MCK_CondBr }, }, |
5656 | | { 280 /* bcl+ */, PPC::gBCLat, Convert__U5Imm1_0__imm_95_3__RegCRBITRC1_1__CondBr1_2, AMFBS_None, { MCK_U5Imm, MCK_RegCRBITRC, MCK_CondBr }, }, |
5657 | | { 285 /* bcl- */, PPC::gBCLat, Convert__U5Imm1_0__imm_95_2__RegCRBITRC1_1__CondBr1_2, AMFBS_None, { MCK_U5Imm, MCK_RegCRBITRC, MCK_CondBr }, }, |
5658 | | { 290 /* bcla */, PPC::gBCLA, Convert__U5Imm1_0__RegCRBITRC1_1__CondBr1_2, AMFBS_None, { MCK_U5Imm, MCK_RegCRBITRC, MCK_CondBr }, }, |
5659 | | { 290 /* bcla */, PPC::gBCLAat, Convert__U5Imm1_1__ATBitsAsHint1_0__RegCRBITRC1_2__CondBr1_3, AMFBS_None, { MCK_ATBitsAsHint, MCK_U5Imm, MCK_RegCRBITRC, MCK_CondBr }, }, |
5660 | | { 295 /* bcla+ */, PPC::gBCLAat, Convert__U5Imm1_0__imm_95_3__RegCRBITRC1_1__CondBr1_2, AMFBS_None, { MCK_U5Imm, MCK_RegCRBITRC, MCK_CondBr }, }, |
5661 | | { 301 /* bcla- */, PPC::gBCLAat, Convert__U5Imm1_0__imm_95_2__RegCRBITRC1_1__CondBr1_2, AMFBS_None, { MCK_U5Imm, MCK_RegCRBITRC, MCK_CondBr }, }, |
5662 | | { 307 /* bclr */, PPC::gBCLR, Convert__U5Imm1_0__RegCRBITRC1_1__imm_95_0, AMFBS_None, { MCK_U5Imm, MCK_RegCRBITRC }, }, |
5663 | | { 307 /* bclr */, PPC::gBCLR, Convert__U5Imm1_0__RegCRBITRC1_1__Imm1_2, AMFBS_None, { MCK_U5Imm, MCK_RegCRBITRC, MCK_Imm }, }, |
5664 | | { 312 /* bclrl */, PPC::gBCLRL, Convert__U5Imm1_0__RegCRBITRC1_1__imm_95_0, AMFBS_None, { MCK_U5Imm, MCK_RegCRBITRC }, }, |
5665 | | { 312 /* bclrl */, PPC::gBCLRL, Convert__U5Imm1_0__RegCRBITRC1_1__Imm1_2, AMFBS_None, { MCK_U5Imm, MCK_RegCRBITRC, MCK_Imm }, }, |
5666 | | { 318 /* bctr */, PPC::BCTR, Convert_NoOperands, AMFBS_None, { }, }, |
5667 | | { 323 /* bctrl */, PPC::BCTRL, Convert_NoOperands, AMFBS_None, { }, }, |
5668 | | { 329 /* bdnz */, PPC::BDNZ, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5669 | | { 334 /* bdnz+ */, PPC::BDNZp, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5670 | | { 340 /* bdnz- */, PPC::BDNZm, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5671 | | { 346 /* bdnza */, PPC::BDNZA, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5672 | | { 352 /* bdnza+ */, PPC::BDNZAp, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5673 | | { 359 /* bdnza- */, PPC::BDNZAm, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5674 | | { 366 /* bdnzf */, PPC::gBC, Convert__imm_95_0__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
5675 | | { 372 /* bdnzfa */, PPC::gBCA, Convert__imm_95_0__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
5676 | | { 379 /* bdnzfl */, PPC::gBCL, Convert__imm_95_0__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
5677 | | { 386 /* bdnzfla */, PPC::gBCLA, Convert__imm_95_0__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
5678 | | { 394 /* bdnzflr */, PPC::gBCLR, Convert__imm_95_0__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
5679 | | { 402 /* bdnzflrl */, PPC::gBCLRL, Convert__imm_95_0__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
5680 | | { 411 /* bdnzl */, PPC::BDNZL, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5681 | | { 417 /* bdnzl+ */, PPC::BDNZLp, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5682 | | { 424 /* bdnzl- */, PPC::BDNZLm, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5683 | | { 431 /* bdnzla */, PPC::BDNZLA, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5684 | | { 438 /* bdnzla+ */, PPC::BDNZLAp, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5685 | | { 446 /* bdnzla- */, PPC::BDNZLAm, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5686 | | { 454 /* bdnzlr */, PPC::BDNZLR, Convert_NoOperands, AMFBS_None, { }, }, |
5687 | | { 461 /* bdnzlr+ */, PPC::BDNZLRp, Convert_NoOperands, AMFBS_None, { }, }, |
5688 | | { 469 /* bdnzlr- */, PPC::BDNZLRm, Convert_NoOperands, AMFBS_None, { }, }, |
5689 | | { 477 /* bdnzlrl */, PPC::BDNZLRL, Convert_NoOperands, AMFBS_None, { }, }, |
5690 | | { 485 /* bdnzlrl+ */, PPC::BDNZLRLp, Convert_NoOperands, AMFBS_None, { }, }, |
5691 | | { 494 /* bdnzlrl- */, PPC::BDNZLRLm, Convert_NoOperands, AMFBS_None, { }, }, |
5692 | | { 503 /* bdnzt */, PPC::gBC, Convert__imm_95_8__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
5693 | | { 509 /* bdnzta */, PPC::gBCA, Convert__imm_95_8__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
5694 | | { 516 /* bdnztl */, PPC::gBCL, Convert__imm_95_8__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
5695 | | { 523 /* bdnztla */, PPC::gBCLA, Convert__imm_95_8__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
5696 | | { 531 /* bdnztlr */, PPC::gBCLR, Convert__imm_95_8__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
5697 | | { 539 /* bdnztlrl */, PPC::gBCLRL, Convert__imm_95_8__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
5698 | | { 548 /* bdz */, PPC::BDZ, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5699 | | { 552 /* bdz+ */, PPC::BDZp, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5700 | | { 557 /* bdz- */, PPC::BDZm, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5701 | | { 562 /* bdza */, PPC::BDZA, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5702 | | { 567 /* bdza+ */, PPC::BDZAp, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5703 | | { 573 /* bdza- */, PPC::BDZAm, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5704 | | { 579 /* bdzf */, PPC::gBC, Convert__imm_95_2__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
5705 | | { 584 /* bdzfa */, PPC::gBCA, Convert__imm_95_2__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
5706 | | { 590 /* bdzfl */, PPC::gBCL, Convert__imm_95_2__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
5707 | | { 596 /* bdzfla */, PPC::gBCLA, Convert__imm_95_2__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
5708 | | { 603 /* bdzflr */, PPC::gBCLR, Convert__imm_95_2__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
5709 | | { 610 /* bdzflrl */, PPC::gBCLRL, Convert__imm_95_2__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
5710 | | { 618 /* bdzl */, PPC::BDZL, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5711 | | { 623 /* bdzl+ */, PPC::BDZLp, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5712 | | { 629 /* bdzl- */, PPC::BDZLm, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5713 | | { 635 /* bdzla */, PPC::BDZLA, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5714 | | { 641 /* bdzla+ */, PPC::BDZLAp, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5715 | | { 648 /* bdzla- */, PPC::BDZLAm, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5716 | | { 655 /* bdzlr */, PPC::BDZLR, Convert_NoOperands, AMFBS_None, { }, }, |
5717 | | { 661 /* bdzlr+ */, PPC::BDZLRp, Convert_NoOperands, AMFBS_None, { }, }, |
5718 | | { 668 /* bdzlr- */, PPC::BDZLRm, Convert_NoOperands, AMFBS_None, { }, }, |
5719 | | { 675 /* bdzlrl */, PPC::BDZLRL, Convert_NoOperands, AMFBS_None, { }, }, |
5720 | | { 682 /* bdzlrl+ */, PPC::BDZLRLp, Convert_NoOperands, AMFBS_None, { }, }, |
5721 | | { 690 /* bdzlrl- */, PPC::BDZLRLm, Convert_NoOperands, AMFBS_None, { }, }, |
5722 | | { 698 /* bdzt */, PPC::gBC, Convert__imm_95_10__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
5723 | | { 703 /* bdzta */, PPC::gBCA, Convert__imm_95_10__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
5724 | | { 709 /* bdztl */, PPC::gBCL, Convert__imm_95_10__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
5725 | | { 715 /* bdztla */, PPC::gBCLA, Convert__imm_95_10__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
5726 | | { 722 /* bdztlr */, PPC::gBCLR, Convert__imm_95_10__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
5727 | | { 729 /* bdztlrl */, PPC::gBCLRL, Convert__imm_95_10__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
5728 | | { 737 /* beq */, PPC::BCC, Convert__imm_95_76__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5729 | | { 737 /* beq */, PPC::BCC, Convert__imm_95_76__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5730 | | { 741 /* beq+ */, PPC::BCC, Convert__imm_95_79__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5731 | | { 741 /* beq+ */, PPC::BCC, Convert__imm_95_79__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5732 | | { 746 /* beq- */, PPC::BCC, Convert__imm_95_78__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5733 | | { 746 /* beq- */, PPC::BCC, Convert__imm_95_78__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5734 | | { 751 /* beqa */, PPC::BCCA, Convert__imm_95_76__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5735 | | { 751 /* beqa */, PPC::BCCA, Convert__imm_95_76__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5736 | | { 756 /* beqa+ */, PPC::BCCA, Convert__imm_95_79__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5737 | | { 756 /* beqa+ */, PPC::BCCA, Convert__imm_95_79__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5738 | | { 762 /* beqa- */, PPC::BCCA, Convert__imm_95_78__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5739 | | { 762 /* beqa- */, PPC::BCCA, Convert__imm_95_78__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5740 | | { 768 /* beqctr */, PPC::BCCCTR, Convert__imm_95_76__regCR0, AMFBS_None, { }, }, |
5741 | | { 768 /* beqctr */, PPC::BCCCTR, Convert__imm_95_76__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5742 | | { 775 /* beqctr+ */, PPC::BCCCTR, Convert__imm_95_79__regCR0, AMFBS_None, { }, }, |
5743 | | { 775 /* beqctr+ */, PPC::BCCCTR, Convert__imm_95_79__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5744 | | { 783 /* beqctr- */, PPC::BCCCTR, Convert__imm_95_78__regCR0, AMFBS_None, { }, }, |
5745 | | { 783 /* beqctr- */, PPC::BCCCTR, Convert__imm_95_78__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5746 | | { 791 /* beqctrl */, PPC::BCCCTRL, Convert__imm_95_76__regCR0, AMFBS_None, { }, }, |
5747 | | { 791 /* beqctrl */, PPC::BCCCTRL, Convert__imm_95_76__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5748 | | { 799 /* beqctrl+ */, PPC::BCCCTRL, Convert__imm_95_79__regCR0, AMFBS_None, { }, }, |
5749 | | { 799 /* beqctrl+ */, PPC::BCCCTRL, Convert__imm_95_79__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5750 | | { 808 /* beqctrl- */, PPC::BCCCTRL, Convert__imm_95_78__regCR0, AMFBS_None, { }, }, |
5751 | | { 808 /* beqctrl- */, PPC::BCCCTRL, Convert__imm_95_78__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5752 | | { 817 /* beql */, PPC::BCCL, Convert__imm_95_76__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5753 | | { 817 /* beql */, PPC::BCCL, Convert__imm_95_76__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5754 | | { 822 /* beql+ */, PPC::BCCL, Convert__imm_95_79__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5755 | | { 822 /* beql+ */, PPC::BCCL, Convert__imm_95_79__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5756 | | { 828 /* beql- */, PPC::BCCL, Convert__imm_95_78__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5757 | | { 828 /* beql- */, PPC::BCCL, Convert__imm_95_78__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5758 | | { 834 /* beqla */, PPC::BCCLA, Convert__imm_95_76__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5759 | | { 834 /* beqla */, PPC::BCCLA, Convert__imm_95_76__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5760 | | { 840 /* beqla+ */, PPC::BCCLA, Convert__imm_95_79__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5761 | | { 840 /* beqla+ */, PPC::BCCLA, Convert__imm_95_79__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5762 | | { 847 /* beqla- */, PPC::BCCLA, Convert__imm_95_78__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5763 | | { 847 /* beqla- */, PPC::BCCLA, Convert__imm_95_78__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5764 | | { 854 /* beqlr */, PPC::BCCLR, Convert__imm_95_76__regCR0, AMFBS_None, { }, }, |
5765 | | { 854 /* beqlr */, PPC::BCCLR, Convert__imm_95_76__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5766 | | { 860 /* beqlr+ */, PPC::BCCLR, Convert__imm_95_79__regCR0, AMFBS_None, { }, }, |
5767 | | { 860 /* beqlr+ */, PPC::BCCLR, Convert__imm_95_79__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5768 | | { 867 /* beqlr- */, PPC::BCCLR, Convert__imm_95_78__regCR0, AMFBS_None, { }, }, |
5769 | | { 867 /* beqlr- */, PPC::BCCLR, Convert__imm_95_78__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5770 | | { 874 /* beqlrl */, PPC::BCCLRL, Convert__imm_95_76__regCR0, AMFBS_None, { }, }, |
5771 | | { 874 /* beqlrl */, PPC::BCCLRL, Convert__imm_95_76__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5772 | | { 881 /* beqlrl+ */, PPC::BCCLRL, Convert__imm_95_79__regCR0, AMFBS_None, { }, }, |
5773 | | { 881 /* beqlrl+ */, PPC::BCCLRL, Convert__imm_95_79__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5774 | | { 889 /* beqlrl- */, PPC::BCCLRL, Convert__imm_95_78__regCR0, AMFBS_None, { }, }, |
5775 | | { 889 /* beqlrl- */, PPC::BCCLRL, Convert__imm_95_78__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5776 | | { 897 /* bf */, PPC::gBC, Convert__imm_95_4__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
5777 | | { 900 /* bf+ */, PPC::gBC, Convert__imm_95_7__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
5778 | | { 904 /* bf- */, PPC::gBC, Convert__imm_95_6__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
5779 | | { 908 /* bfa */, PPC::gBCA, Convert__imm_95_4__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
5780 | | { 912 /* bfa+ */, PPC::gBCA, Convert__imm_95_7__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
5781 | | { 917 /* bfa- */, PPC::gBCA, Convert__imm_95_6__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
5782 | | { 922 /* bfctr */, PPC::gBCCTR, Convert__imm_95_4__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
5783 | | { 928 /* bfctr+ */, PPC::gBCCTR, Convert__imm_95_7__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
5784 | | { 935 /* bfctr- */, PPC::gBCCTR, Convert__imm_95_6__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
5785 | | { 942 /* bfctrl */, PPC::gBCCTRL, Convert__imm_95_4__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
5786 | | { 949 /* bfctrl+ */, PPC::gBCCTRL, Convert__imm_95_7__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
5787 | | { 957 /* bfctrl- */, PPC::gBCCTRL, Convert__imm_95_6__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
5788 | | { 965 /* bfl */, PPC::gBCL, Convert__imm_95_4__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
5789 | | { 969 /* bfl+ */, PPC::gBCL, Convert__imm_95_7__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
5790 | | { 974 /* bfl- */, PPC::gBCL, Convert__imm_95_6__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
5791 | | { 979 /* bfla */, PPC::gBCLA, Convert__imm_95_4__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
5792 | | { 984 /* bfla+ */, PPC::gBCLA, Convert__imm_95_7__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
5793 | | { 990 /* bfla- */, PPC::gBCLA, Convert__imm_95_6__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
5794 | | { 996 /* bflr */, PPC::gBCLR, Convert__imm_95_4__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
5795 | | { 1001 /* bflr+ */, PPC::gBCLR, Convert__imm_95_7__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
5796 | | { 1007 /* bflr- */, PPC::gBCLR, Convert__imm_95_6__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
5797 | | { 1013 /* bflrl */, PPC::gBCLRL, Convert__imm_95_4__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
5798 | | { 1019 /* bflrl+ */, PPC::gBCLRL, Convert__imm_95_7__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
5799 | | { 1026 /* bflrl- */, PPC::gBCLRL, Convert__imm_95_6__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
5800 | | { 1033 /* bge */, PPC::BCC, Convert__imm_95_4__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5801 | | { 1033 /* bge */, PPC::BCC, Convert__imm_95_4__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5802 | | { 1037 /* bge+ */, PPC::BCC, Convert__imm_95_7__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5803 | | { 1037 /* bge+ */, PPC::BCC, Convert__imm_95_7__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5804 | | { 1042 /* bge- */, PPC::BCC, Convert__imm_95_6__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5805 | | { 1042 /* bge- */, PPC::BCC, Convert__imm_95_6__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5806 | | { 1047 /* bgea */, PPC::BCCA, Convert__imm_95_4__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5807 | | { 1047 /* bgea */, PPC::BCCA, Convert__imm_95_4__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5808 | | { 1052 /* bgea+ */, PPC::BCCA, Convert__imm_95_7__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5809 | | { 1052 /* bgea+ */, PPC::BCCA, Convert__imm_95_7__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5810 | | { 1058 /* bgea- */, PPC::BCCA, Convert__imm_95_6__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5811 | | { 1058 /* bgea- */, PPC::BCCA, Convert__imm_95_6__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5812 | | { 1064 /* bgectr */, PPC::BCCCTR, Convert__imm_95_4__regCR0, AMFBS_None, { }, }, |
5813 | | { 1064 /* bgectr */, PPC::BCCCTR, Convert__imm_95_4__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5814 | | { 1071 /* bgectr+ */, PPC::BCCCTR, Convert__imm_95_7__regCR0, AMFBS_None, { }, }, |
5815 | | { 1071 /* bgectr+ */, PPC::BCCCTR, Convert__imm_95_7__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5816 | | { 1079 /* bgectr- */, PPC::BCCCTR, Convert__imm_95_6__regCR0, AMFBS_None, { }, }, |
5817 | | { 1079 /* bgectr- */, PPC::BCCCTR, Convert__imm_95_6__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5818 | | { 1087 /* bgectrl */, PPC::BCCCTRL, Convert__imm_95_4__regCR0, AMFBS_None, { }, }, |
5819 | | { 1087 /* bgectrl */, PPC::BCCCTRL, Convert__imm_95_4__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5820 | | { 1095 /* bgectrl+ */, PPC::BCCCTRL, Convert__imm_95_7__regCR0, AMFBS_None, { }, }, |
5821 | | { 1095 /* bgectrl+ */, PPC::BCCCTRL, Convert__imm_95_7__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5822 | | { 1104 /* bgectrl- */, PPC::BCCCTRL, Convert__imm_95_6__regCR0, AMFBS_None, { }, }, |
5823 | | { 1104 /* bgectrl- */, PPC::BCCCTRL, Convert__imm_95_6__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5824 | | { 1113 /* bgel */, PPC::BCCL, Convert__imm_95_4__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5825 | | { 1113 /* bgel */, PPC::BCCL, Convert__imm_95_4__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5826 | | { 1118 /* bgel+ */, PPC::BCCL, Convert__imm_95_7__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5827 | | { 1118 /* bgel+ */, PPC::BCCL, Convert__imm_95_7__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5828 | | { 1124 /* bgel- */, PPC::BCCL, Convert__imm_95_6__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5829 | | { 1124 /* bgel- */, PPC::BCCL, Convert__imm_95_6__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5830 | | { 1130 /* bgela */, PPC::BCCLA, Convert__imm_95_4__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5831 | | { 1130 /* bgela */, PPC::BCCLA, Convert__imm_95_4__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5832 | | { 1136 /* bgela+ */, PPC::BCCLA, Convert__imm_95_7__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5833 | | { 1136 /* bgela+ */, PPC::BCCLA, Convert__imm_95_7__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5834 | | { 1143 /* bgela- */, PPC::BCCLA, Convert__imm_95_6__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5835 | | { 1143 /* bgela- */, PPC::BCCLA, Convert__imm_95_6__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5836 | | { 1150 /* bgelr */, PPC::BCCLR, Convert__imm_95_4__regCR0, AMFBS_None, { }, }, |
5837 | | { 1150 /* bgelr */, PPC::BCCLR, Convert__imm_95_4__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5838 | | { 1156 /* bgelr+ */, PPC::BCCLR, Convert__imm_95_7__regCR0, AMFBS_None, { }, }, |
5839 | | { 1156 /* bgelr+ */, PPC::BCCLR, Convert__imm_95_7__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5840 | | { 1163 /* bgelr- */, PPC::BCCLR, Convert__imm_95_6__regCR0, AMFBS_None, { }, }, |
5841 | | { 1163 /* bgelr- */, PPC::BCCLR, Convert__imm_95_6__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5842 | | { 1170 /* bgelrl */, PPC::BCCLRL, Convert__imm_95_4__regCR0, AMFBS_None, { }, }, |
5843 | | { 1170 /* bgelrl */, PPC::BCCLRL, Convert__imm_95_4__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5844 | | { 1177 /* bgelrl+ */, PPC::BCCLRL, Convert__imm_95_7__regCR0, AMFBS_None, { }, }, |
5845 | | { 1177 /* bgelrl+ */, PPC::BCCLRL, Convert__imm_95_7__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5846 | | { 1185 /* bgelrl- */, PPC::BCCLRL, Convert__imm_95_6__regCR0, AMFBS_None, { }, }, |
5847 | | { 1185 /* bgelrl- */, PPC::BCCLRL, Convert__imm_95_6__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5848 | | { 1193 /* bgt */, PPC::BCC, Convert__imm_95_44__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5849 | | { 1193 /* bgt */, PPC::BCC, Convert__imm_95_44__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5850 | | { 1197 /* bgt+ */, PPC::BCC, Convert__imm_95_47__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5851 | | { 1197 /* bgt+ */, PPC::BCC, Convert__imm_95_47__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5852 | | { 1202 /* bgt- */, PPC::BCC, Convert__imm_95_46__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5853 | | { 1202 /* bgt- */, PPC::BCC, Convert__imm_95_46__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5854 | | { 1207 /* bgta */, PPC::BCCA, Convert__imm_95_44__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5855 | | { 1207 /* bgta */, PPC::BCCA, Convert__imm_95_44__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5856 | | { 1212 /* bgta+ */, PPC::BCCA, Convert__imm_95_47__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5857 | | { 1212 /* bgta+ */, PPC::BCCA, Convert__imm_95_47__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5858 | | { 1218 /* bgta- */, PPC::BCCA, Convert__imm_95_46__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5859 | | { 1218 /* bgta- */, PPC::BCCA, Convert__imm_95_46__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5860 | | { 1224 /* bgtctr */, PPC::BCCCTR, Convert__imm_95_44__regCR0, AMFBS_None, { }, }, |
5861 | | { 1224 /* bgtctr */, PPC::BCCCTR, Convert__imm_95_44__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5862 | | { 1231 /* bgtctr+ */, PPC::BCCCTR, Convert__imm_95_47__regCR0, AMFBS_None, { }, }, |
5863 | | { 1231 /* bgtctr+ */, PPC::BCCCTR, Convert__imm_95_47__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5864 | | { 1239 /* bgtctr- */, PPC::BCCCTR, Convert__imm_95_46__regCR0, AMFBS_None, { }, }, |
5865 | | { 1239 /* bgtctr- */, PPC::BCCCTR, Convert__imm_95_46__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5866 | | { 1247 /* bgtctrl */, PPC::BCCCTRL, Convert__imm_95_44__regCR0, AMFBS_None, { }, }, |
5867 | | { 1247 /* bgtctrl */, PPC::BCCCTRL, Convert__imm_95_44__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5868 | | { 1255 /* bgtctrl+ */, PPC::BCCCTRL, Convert__imm_95_47__regCR0, AMFBS_None, { }, }, |
5869 | | { 1255 /* bgtctrl+ */, PPC::BCCCTRL, Convert__imm_95_47__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5870 | | { 1264 /* bgtctrl- */, PPC::BCCCTRL, Convert__imm_95_46__regCR0, AMFBS_None, { }, }, |
5871 | | { 1264 /* bgtctrl- */, PPC::BCCCTRL, Convert__imm_95_46__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5872 | | { 1273 /* bgtl */, PPC::BCCL, Convert__imm_95_44__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5873 | | { 1273 /* bgtl */, PPC::BCCL, Convert__imm_95_44__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5874 | | { 1278 /* bgtl+ */, PPC::BCCL, Convert__imm_95_47__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5875 | | { 1278 /* bgtl+ */, PPC::BCCL, Convert__imm_95_47__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5876 | | { 1284 /* bgtl- */, PPC::BCCL, Convert__imm_95_46__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5877 | | { 1284 /* bgtl- */, PPC::BCCL, Convert__imm_95_46__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5878 | | { 1290 /* bgtla */, PPC::BCCLA, Convert__imm_95_44__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5879 | | { 1290 /* bgtla */, PPC::BCCLA, Convert__imm_95_44__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5880 | | { 1296 /* bgtla+ */, PPC::BCCLA, Convert__imm_95_47__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5881 | | { 1296 /* bgtla+ */, PPC::BCCLA, Convert__imm_95_47__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5882 | | { 1303 /* bgtla- */, PPC::BCCLA, Convert__imm_95_46__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5883 | | { 1303 /* bgtla- */, PPC::BCCLA, Convert__imm_95_46__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5884 | | { 1310 /* bgtlr */, PPC::BCCLR, Convert__imm_95_44__regCR0, AMFBS_None, { }, }, |
5885 | | { 1310 /* bgtlr */, PPC::BCCLR, Convert__imm_95_44__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5886 | | { 1316 /* bgtlr+ */, PPC::BCCLR, Convert__imm_95_47__regCR0, AMFBS_None, { }, }, |
5887 | | { 1316 /* bgtlr+ */, PPC::BCCLR, Convert__imm_95_47__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5888 | | { 1323 /* bgtlr- */, PPC::BCCLR, Convert__imm_95_46__regCR0, AMFBS_None, { }, }, |
5889 | | { 1323 /* bgtlr- */, PPC::BCCLR, Convert__imm_95_46__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5890 | | { 1330 /* bgtlrl */, PPC::BCCLRL, Convert__imm_95_44__regCR0, AMFBS_None, { }, }, |
5891 | | { 1330 /* bgtlrl */, PPC::BCCLRL, Convert__imm_95_44__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5892 | | { 1337 /* bgtlrl+ */, PPC::BCCLRL, Convert__imm_95_47__regCR0, AMFBS_None, { }, }, |
5893 | | { 1337 /* bgtlrl+ */, PPC::BCCLRL, Convert__imm_95_47__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5894 | | { 1345 /* bgtlrl- */, PPC::BCCLRL, Convert__imm_95_46__regCR0, AMFBS_None, { }, }, |
5895 | | { 1345 /* bgtlrl- */, PPC::BCCLRL, Convert__imm_95_46__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5896 | | { 1353 /* bl */, PPC::BL, Convert__DirectBr1_0, AMFBS_None, { MCK_DirectBr }, }, |
5897 | | { 1353 /* bl */, PPC::BL8_TLS_, Convert__DirectBr1_0__Imm1_1, AMFBS_None, { MCK_DirectBr, MCK_Imm }, }, |
5898 | | { 1356 /* bla */, PPC::BLA, Convert__DirectBr1_0, AMFBS_None, { MCK_DirectBr }, }, |
5899 | | { 1360 /* ble */, PPC::BCC, Convert__imm_95_36__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5900 | | { 1360 /* ble */, PPC::BCC, Convert__imm_95_36__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5901 | | { 1364 /* ble+ */, PPC::BCC, Convert__imm_95_39__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5902 | | { 1364 /* ble+ */, PPC::BCC, Convert__imm_95_39__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5903 | | { 1369 /* ble- */, PPC::BCC, Convert__imm_95_38__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5904 | | { 1369 /* ble- */, PPC::BCC, Convert__imm_95_38__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5905 | | { 1374 /* blea */, PPC::BCCA, Convert__imm_95_36__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5906 | | { 1374 /* blea */, PPC::BCCA, Convert__imm_95_36__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5907 | | { 1379 /* blea+ */, PPC::BCCA, Convert__imm_95_39__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5908 | | { 1379 /* blea+ */, PPC::BCCA, Convert__imm_95_39__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5909 | | { 1385 /* blea- */, PPC::BCCA, Convert__imm_95_38__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5910 | | { 1385 /* blea- */, PPC::BCCA, Convert__imm_95_38__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5911 | | { 1391 /* blectr */, PPC::BCCCTR, Convert__imm_95_36__regCR0, AMFBS_None, { }, }, |
5912 | | { 1391 /* blectr */, PPC::BCCCTR, Convert__imm_95_36__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5913 | | { 1398 /* blectr+ */, PPC::BCCCTR, Convert__imm_95_39__regCR0, AMFBS_None, { }, }, |
5914 | | { 1398 /* blectr+ */, PPC::BCCCTR, Convert__imm_95_39__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5915 | | { 1406 /* blectr- */, PPC::BCCCTR, Convert__imm_95_38__regCR0, AMFBS_None, { }, }, |
5916 | | { 1406 /* blectr- */, PPC::BCCCTR, Convert__imm_95_38__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5917 | | { 1414 /* blectrl */, PPC::BCCCTRL, Convert__imm_95_36__regCR0, AMFBS_None, { }, }, |
5918 | | { 1414 /* blectrl */, PPC::BCCCTRL, Convert__imm_95_36__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5919 | | { 1422 /* blectrl+ */, PPC::BCCCTRL, Convert__imm_95_39__regCR0, AMFBS_None, { }, }, |
5920 | | { 1422 /* blectrl+ */, PPC::BCCCTRL, Convert__imm_95_39__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5921 | | { 1431 /* blectrl- */, PPC::BCCCTRL, Convert__imm_95_38__regCR0, AMFBS_None, { }, }, |
5922 | | { 1431 /* blectrl- */, PPC::BCCCTRL, Convert__imm_95_38__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5923 | | { 1440 /* blel */, PPC::BCCL, Convert__imm_95_36__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5924 | | { 1440 /* blel */, PPC::BCCL, Convert__imm_95_36__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5925 | | { 1445 /* blel+ */, PPC::BCCL, Convert__imm_95_39__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5926 | | { 1445 /* blel+ */, PPC::BCCL, Convert__imm_95_39__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5927 | | { 1451 /* blel- */, PPC::BCCL, Convert__imm_95_38__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5928 | | { 1451 /* blel- */, PPC::BCCL, Convert__imm_95_38__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5929 | | { 1457 /* blela */, PPC::BCCLA, Convert__imm_95_36__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5930 | | { 1457 /* blela */, PPC::BCCLA, Convert__imm_95_36__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5931 | | { 1463 /* blela+ */, PPC::BCCLA, Convert__imm_95_39__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5932 | | { 1463 /* blela+ */, PPC::BCCLA, Convert__imm_95_39__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5933 | | { 1470 /* blela- */, PPC::BCCLA, Convert__imm_95_38__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5934 | | { 1470 /* blela- */, PPC::BCCLA, Convert__imm_95_38__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5935 | | { 1477 /* blelr */, PPC::BCCLR, Convert__imm_95_36__regCR0, AMFBS_None, { }, }, |
5936 | | { 1477 /* blelr */, PPC::BCCLR, Convert__imm_95_36__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5937 | | { 1483 /* blelr+ */, PPC::BCCLR, Convert__imm_95_39__regCR0, AMFBS_None, { }, }, |
5938 | | { 1483 /* blelr+ */, PPC::BCCLR, Convert__imm_95_39__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5939 | | { 1490 /* blelr- */, PPC::BCCLR, Convert__imm_95_38__regCR0, AMFBS_None, { }, }, |
5940 | | { 1490 /* blelr- */, PPC::BCCLR, Convert__imm_95_38__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5941 | | { 1497 /* blelrl */, PPC::BCCLRL, Convert__imm_95_36__regCR0, AMFBS_None, { }, }, |
5942 | | { 1497 /* blelrl */, PPC::BCCLRL, Convert__imm_95_36__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5943 | | { 1504 /* blelrl+ */, PPC::BCCLRL, Convert__imm_95_39__regCR0, AMFBS_None, { }, }, |
5944 | | { 1504 /* blelrl+ */, PPC::BCCLRL, Convert__imm_95_39__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5945 | | { 1512 /* blelrl- */, PPC::BCCLRL, Convert__imm_95_38__regCR0, AMFBS_None, { }, }, |
5946 | | { 1512 /* blelrl- */, PPC::BCCLRL, Convert__imm_95_38__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5947 | | { 1520 /* blr */, PPC::BLR, Convert_NoOperands, AMFBS_None, { }, }, |
5948 | | { 1524 /* blrl */, PPC::BLRL, Convert_NoOperands, AMFBS_None, { }, }, |
5949 | | { 1529 /* blt */, PPC::BCC, Convert__imm_95_12__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5950 | | { 1529 /* blt */, PPC::BCC, Convert__imm_95_12__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5951 | | { 1533 /* blt+ */, PPC::BCC, Convert__imm_95_15__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5952 | | { 1533 /* blt+ */, PPC::BCC, Convert__imm_95_15__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5953 | | { 1538 /* blt- */, PPC::BCC, Convert__imm_95_14__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5954 | | { 1538 /* blt- */, PPC::BCC, Convert__imm_95_14__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5955 | | { 1543 /* blta */, PPC::BCCA, Convert__imm_95_12__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5956 | | { 1543 /* blta */, PPC::BCCA, Convert__imm_95_12__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5957 | | { 1548 /* blta+ */, PPC::BCCA, Convert__imm_95_15__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5958 | | { 1548 /* blta+ */, PPC::BCCA, Convert__imm_95_15__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5959 | | { 1554 /* blta- */, PPC::BCCA, Convert__imm_95_14__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5960 | | { 1554 /* blta- */, PPC::BCCA, Convert__imm_95_14__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5961 | | { 1560 /* bltctr */, PPC::BCCCTR, Convert__imm_95_12__regCR0, AMFBS_None, { }, }, |
5962 | | { 1560 /* bltctr */, PPC::BCCCTR, Convert__imm_95_12__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5963 | | { 1567 /* bltctr+ */, PPC::BCCCTR, Convert__imm_95_15__regCR0, AMFBS_None, { }, }, |
5964 | | { 1567 /* bltctr+ */, PPC::BCCCTR, Convert__imm_95_15__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5965 | | { 1575 /* bltctr- */, PPC::BCCCTR, Convert__imm_95_14__regCR0, AMFBS_None, { }, }, |
5966 | | { 1575 /* bltctr- */, PPC::BCCCTR, Convert__imm_95_14__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5967 | | { 1583 /* bltctrl */, PPC::BCCCTRL, Convert__imm_95_12__regCR0, AMFBS_None, { }, }, |
5968 | | { 1583 /* bltctrl */, PPC::BCCCTRL, Convert__imm_95_12__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5969 | | { 1591 /* bltctrl+ */, PPC::BCCCTRL, Convert__imm_95_15__regCR0, AMFBS_None, { }, }, |
5970 | | { 1591 /* bltctrl+ */, PPC::BCCCTRL, Convert__imm_95_15__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5971 | | { 1600 /* bltctrl- */, PPC::BCCCTRL, Convert__imm_95_14__regCR0, AMFBS_None, { }, }, |
5972 | | { 1600 /* bltctrl- */, PPC::BCCCTRL, Convert__imm_95_14__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5973 | | { 1609 /* bltl */, PPC::BCCL, Convert__imm_95_12__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5974 | | { 1609 /* bltl */, PPC::BCCL, Convert__imm_95_12__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5975 | | { 1614 /* bltl+ */, PPC::BCCL, Convert__imm_95_15__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5976 | | { 1614 /* bltl+ */, PPC::BCCL, Convert__imm_95_15__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5977 | | { 1620 /* bltl- */, PPC::BCCL, Convert__imm_95_14__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5978 | | { 1620 /* bltl- */, PPC::BCCL, Convert__imm_95_14__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5979 | | { 1626 /* bltla */, PPC::BCCLA, Convert__imm_95_12__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5980 | | { 1626 /* bltla */, PPC::BCCLA, Convert__imm_95_12__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5981 | | { 1632 /* bltla+ */, PPC::BCCLA, Convert__imm_95_15__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5982 | | { 1632 /* bltla+ */, PPC::BCCLA, Convert__imm_95_15__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5983 | | { 1639 /* bltla- */, PPC::BCCLA, Convert__imm_95_14__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5984 | | { 1639 /* bltla- */, PPC::BCCLA, Convert__imm_95_14__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5985 | | { 1646 /* bltlr */, PPC::BCCLR, Convert__imm_95_12__regCR0, AMFBS_None, { }, }, |
5986 | | { 1646 /* bltlr */, PPC::BCCLR, Convert__imm_95_12__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5987 | | { 1652 /* bltlr+ */, PPC::BCCLR, Convert__imm_95_15__regCR0, AMFBS_None, { }, }, |
5988 | | { 1652 /* bltlr+ */, PPC::BCCLR, Convert__imm_95_15__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5989 | | { 1659 /* bltlr- */, PPC::BCCLR, Convert__imm_95_14__regCR0, AMFBS_None, { }, }, |
5990 | | { 1659 /* bltlr- */, PPC::BCCLR, Convert__imm_95_14__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5991 | | { 1666 /* bltlrl */, PPC::BCCLRL, Convert__imm_95_12__regCR0, AMFBS_None, { }, }, |
5992 | | { 1666 /* bltlrl */, PPC::BCCLRL, Convert__imm_95_12__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5993 | | { 1673 /* bltlrl+ */, PPC::BCCLRL, Convert__imm_95_15__regCR0, AMFBS_None, { }, }, |
5994 | | { 1673 /* bltlrl+ */, PPC::BCCLRL, Convert__imm_95_15__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5995 | | { 1681 /* bltlrl- */, PPC::BCCLRL, Convert__imm_95_14__regCR0, AMFBS_None, { }, }, |
5996 | | { 1681 /* bltlrl- */, PPC::BCCLRL, Convert__imm_95_14__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
5997 | | { 1689 /* bne */, PPC::BCC, Convert__imm_95_68__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
5998 | | { 1689 /* bne */, PPC::BCC, Convert__imm_95_68__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
5999 | | { 1693 /* bne+ */, PPC::BCC, Convert__imm_95_71__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6000 | | { 1693 /* bne+ */, PPC::BCC, Convert__imm_95_71__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6001 | | { 1698 /* bne- */, PPC::BCC, Convert__imm_95_70__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6002 | | { 1698 /* bne- */, PPC::BCC, Convert__imm_95_70__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6003 | | { 1703 /* bnea */, PPC::BCCA, Convert__imm_95_68__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6004 | | { 1703 /* bnea */, PPC::BCCA, Convert__imm_95_68__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6005 | | { 1708 /* bnea+ */, PPC::BCCA, Convert__imm_95_71__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6006 | | { 1708 /* bnea+ */, PPC::BCCA, Convert__imm_95_71__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6007 | | { 1714 /* bnea- */, PPC::BCCA, Convert__imm_95_70__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6008 | | { 1714 /* bnea- */, PPC::BCCA, Convert__imm_95_70__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6009 | | { 1720 /* bnectr */, PPC::BCCCTR, Convert__imm_95_68__regCR0, AMFBS_None, { }, }, |
6010 | | { 1720 /* bnectr */, PPC::BCCCTR, Convert__imm_95_68__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6011 | | { 1727 /* bnectr+ */, PPC::BCCCTR, Convert__imm_95_71__regCR0, AMFBS_None, { }, }, |
6012 | | { 1727 /* bnectr+ */, PPC::BCCCTR, Convert__imm_95_71__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6013 | | { 1735 /* bnectr- */, PPC::BCCCTR, Convert__imm_95_70__regCR0, AMFBS_None, { }, }, |
6014 | | { 1735 /* bnectr- */, PPC::BCCCTR, Convert__imm_95_70__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6015 | | { 1743 /* bnectrl */, PPC::BCCCTRL, Convert__imm_95_68__regCR0, AMFBS_None, { }, }, |
6016 | | { 1743 /* bnectrl */, PPC::BCCCTRL, Convert__imm_95_68__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6017 | | { 1751 /* bnectrl+ */, PPC::BCCCTRL, Convert__imm_95_71__regCR0, AMFBS_None, { }, }, |
6018 | | { 1751 /* bnectrl+ */, PPC::BCCCTRL, Convert__imm_95_71__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6019 | | { 1760 /* bnectrl- */, PPC::BCCCTRL, Convert__imm_95_70__regCR0, AMFBS_None, { }, }, |
6020 | | { 1760 /* bnectrl- */, PPC::BCCCTRL, Convert__imm_95_70__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6021 | | { 1769 /* bnel */, PPC::BCCL, Convert__imm_95_68__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6022 | | { 1769 /* bnel */, PPC::BCCL, Convert__imm_95_68__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6023 | | { 1774 /* bnel+ */, PPC::BCCL, Convert__imm_95_71__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6024 | | { 1774 /* bnel+ */, PPC::BCCL, Convert__imm_95_71__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6025 | | { 1780 /* bnel- */, PPC::BCCL, Convert__imm_95_70__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6026 | | { 1780 /* bnel- */, PPC::BCCL, Convert__imm_95_70__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6027 | | { 1786 /* bnela */, PPC::BCCLA, Convert__imm_95_68__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6028 | | { 1786 /* bnela */, PPC::BCCLA, Convert__imm_95_68__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6029 | | { 1792 /* bnela+ */, PPC::BCCLA, Convert__imm_95_71__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6030 | | { 1792 /* bnela+ */, PPC::BCCLA, Convert__imm_95_71__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6031 | | { 1799 /* bnela- */, PPC::BCCLA, Convert__imm_95_70__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6032 | | { 1799 /* bnela- */, PPC::BCCLA, Convert__imm_95_70__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6033 | | { 1806 /* bnelr */, PPC::BCCLR, Convert__imm_95_68__regCR0, AMFBS_None, { }, }, |
6034 | | { 1806 /* bnelr */, PPC::BCCLR, Convert__imm_95_68__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6035 | | { 1812 /* bnelr+ */, PPC::BCCLR, Convert__imm_95_71__regCR0, AMFBS_None, { }, }, |
6036 | | { 1812 /* bnelr+ */, PPC::BCCLR, Convert__imm_95_71__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6037 | | { 1819 /* bnelr- */, PPC::BCCLR, Convert__imm_95_70__regCR0, AMFBS_None, { }, }, |
6038 | | { 1819 /* bnelr- */, PPC::BCCLR, Convert__imm_95_70__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6039 | | { 1826 /* bnelrl */, PPC::BCCLRL, Convert__imm_95_68__regCR0, AMFBS_None, { }, }, |
6040 | | { 1826 /* bnelrl */, PPC::BCCLRL, Convert__imm_95_68__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6041 | | { 1833 /* bnelrl+ */, PPC::BCCLRL, Convert__imm_95_71__regCR0, AMFBS_None, { }, }, |
6042 | | { 1833 /* bnelrl+ */, PPC::BCCLRL, Convert__imm_95_71__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6043 | | { 1841 /* bnelrl- */, PPC::BCCLRL, Convert__imm_95_70__regCR0, AMFBS_None, { }, }, |
6044 | | { 1841 /* bnelrl- */, PPC::BCCLRL, Convert__imm_95_70__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6045 | | { 1849 /* bng */, PPC::BCC, Convert__imm_95_36__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6046 | | { 1849 /* bng */, PPC::BCC, Convert__imm_95_36__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6047 | | { 1853 /* bng+ */, PPC::BCC, Convert__imm_95_39__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6048 | | { 1853 /* bng+ */, PPC::BCC, Convert__imm_95_39__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6049 | | { 1858 /* bng- */, PPC::BCC, Convert__imm_95_38__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6050 | | { 1858 /* bng- */, PPC::BCC, Convert__imm_95_38__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6051 | | { 1863 /* bnga */, PPC::BCCA, Convert__imm_95_36__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6052 | | { 1863 /* bnga */, PPC::BCCA, Convert__imm_95_36__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6053 | | { 1868 /* bnga+ */, PPC::BCCA, Convert__imm_95_39__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6054 | | { 1868 /* bnga+ */, PPC::BCCA, Convert__imm_95_39__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6055 | | { 1874 /* bnga- */, PPC::BCCA, Convert__imm_95_38__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6056 | | { 1874 /* bnga- */, PPC::BCCA, Convert__imm_95_38__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6057 | | { 1880 /* bngctr */, PPC::BCCCTR, Convert__imm_95_36__regCR0, AMFBS_None, { }, }, |
6058 | | { 1880 /* bngctr */, PPC::BCCCTR, Convert__imm_95_36__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6059 | | { 1887 /* bngctr+ */, PPC::BCCCTR, Convert__imm_95_39__regCR0, AMFBS_None, { }, }, |
6060 | | { 1887 /* bngctr+ */, PPC::BCCCTR, Convert__imm_95_39__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6061 | | { 1895 /* bngctr- */, PPC::BCCCTR, Convert__imm_95_38__regCR0, AMFBS_None, { }, }, |
6062 | | { 1895 /* bngctr- */, PPC::BCCCTR, Convert__imm_95_38__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6063 | | { 1903 /* bngctrl */, PPC::BCCCTRL, Convert__imm_95_36__regCR0, AMFBS_None, { }, }, |
6064 | | { 1903 /* bngctrl */, PPC::BCCCTRL, Convert__imm_95_36__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6065 | | { 1911 /* bngctrl+ */, PPC::BCCCTRL, Convert__imm_95_39__regCR0, AMFBS_None, { }, }, |
6066 | | { 1911 /* bngctrl+ */, PPC::BCCCTRL, Convert__imm_95_39__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6067 | | { 1920 /* bngctrl- */, PPC::BCCCTRL, Convert__imm_95_38__regCR0, AMFBS_None, { }, }, |
6068 | | { 1920 /* bngctrl- */, PPC::BCCCTRL, Convert__imm_95_38__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6069 | | { 1929 /* bngl */, PPC::BCCL, Convert__imm_95_36__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6070 | | { 1929 /* bngl */, PPC::BCCL, Convert__imm_95_36__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6071 | | { 1934 /* bngl+ */, PPC::BCCL, Convert__imm_95_39__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6072 | | { 1934 /* bngl+ */, PPC::BCCL, Convert__imm_95_39__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6073 | | { 1940 /* bngl- */, PPC::BCCL, Convert__imm_95_38__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6074 | | { 1940 /* bngl- */, PPC::BCCL, Convert__imm_95_38__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6075 | | { 1946 /* bngla */, PPC::BCCLA, Convert__imm_95_36__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6076 | | { 1946 /* bngla */, PPC::BCCLA, Convert__imm_95_36__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6077 | | { 1952 /* bngla+ */, PPC::BCCLA, Convert__imm_95_39__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6078 | | { 1952 /* bngla+ */, PPC::BCCLA, Convert__imm_95_39__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6079 | | { 1959 /* bngla- */, PPC::BCCLA, Convert__imm_95_38__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6080 | | { 1959 /* bngla- */, PPC::BCCLA, Convert__imm_95_38__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6081 | | { 1966 /* bnglr */, PPC::BCCLR, Convert__imm_95_36__regCR0, AMFBS_None, { }, }, |
6082 | | { 1966 /* bnglr */, PPC::BCCLR, Convert__imm_95_36__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6083 | | { 1972 /* bnglr+ */, PPC::BCCLR, Convert__imm_95_39__regCR0, AMFBS_None, { }, }, |
6084 | | { 1972 /* bnglr+ */, PPC::BCCLR, Convert__imm_95_39__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6085 | | { 1979 /* bnglr- */, PPC::BCCLR, Convert__imm_95_38__regCR0, AMFBS_None, { }, }, |
6086 | | { 1979 /* bnglr- */, PPC::BCCLR, Convert__imm_95_38__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6087 | | { 1986 /* bnglrl */, PPC::BCCLRL, Convert__imm_95_36__regCR0, AMFBS_None, { }, }, |
6088 | | { 1986 /* bnglrl */, PPC::BCCLRL, Convert__imm_95_36__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6089 | | { 1993 /* bnglrl+ */, PPC::BCCLRL, Convert__imm_95_39__regCR0, AMFBS_None, { }, }, |
6090 | | { 1993 /* bnglrl+ */, PPC::BCCLRL, Convert__imm_95_39__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6091 | | { 2001 /* bnglrl- */, PPC::BCCLRL, Convert__imm_95_38__regCR0, AMFBS_None, { }, }, |
6092 | | { 2001 /* bnglrl- */, PPC::BCCLRL, Convert__imm_95_38__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6093 | | { 2009 /* bnl */, PPC::BCC, Convert__imm_95_4__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6094 | | { 2009 /* bnl */, PPC::BCC, Convert__imm_95_4__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6095 | | { 2013 /* bnl+ */, PPC::BCC, Convert__imm_95_7__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6096 | | { 2013 /* bnl+ */, PPC::BCC, Convert__imm_95_7__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6097 | | { 2018 /* bnl- */, PPC::BCC, Convert__imm_95_6__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6098 | | { 2018 /* bnl- */, PPC::BCC, Convert__imm_95_6__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6099 | | { 2023 /* bnla */, PPC::BCCA, Convert__imm_95_4__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6100 | | { 2023 /* bnla */, PPC::BCCA, Convert__imm_95_4__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6101 | | { 2028 /* bnla+ */, PPC::BCCA, Convert__imm_95_7__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6102 | | { 2028 /* bnla+ */, PPC::BCCA, Convert__imm_95_7__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6103 | | { 2034 /* bnla- */, PPC::BCCA, Convert__imm_95_6__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6104 | | { 2034 /* bnla- */, PPC::BCCA, Convert__imm_95_6__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6105 | | { 2040 /* bnlctr */, PPC::BCCCTR, Convert__imm_95_4__regCR0, AMFBS_None, { }, }, |
6106 | | { 2040 /* bnlctr */, PPC::BCCCTR, Convert__imm_95_4__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6107 | | { 2047 /* bnlctr+ */, PPC::BCCCTR, Convert__imm_95_7__regCR0, AMFBS_None, { }, }, |
6108 | | { 2047 /* bnlctr+ */, PPC::BCCCTR, Convert__imm_95_7__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6109 | | { 2055 /* bnlctr- */, PPC::BCCCTR, Convert__imm_95_6__regCR0, AMFBS_None, { }, }, |
6110 | | { 2055 /* bnlctr- */, PPC::BCCCTR, Convert__imm_95_6__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6111 | | { 2063 /* bnlctrl */, PPC::BCCCTRL, Convert__imm_95_4__regCR0, AMFBS_None, { }, }, |
6112 | | { 2063 /* bnlctrl */, PPC::BCCCTRL, Convert__imm_95_4__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6113 | | { 2071 /* bnlctrl+ */, PPC::BCCCTRL, Convert__imm_95_7__regCR0, AMFBS_None, { }, }, |
6114 | | { 2071 /* bnlctrl+ */, PPC::BCCCTRL, Convert__imm_95_7__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6115 | | { 2080 /* bnlctrl- */, PPC::BCCCTRL, Convert__imm_95_6__regCR0, AMFBS_None, { }, }, |
6116 | | { 2080 /* bnlctrl- */, PPC::BCCCTRL, Convert__imm_95_6__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6117 | | { 2089 /* bnll */, PPC::BCCL, Convert__imm_95_4__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6118 | | { 2089 /* bnll */, PPC::BCCL, Convert__imm_95_4__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6119 | | { 2094 /* bnll+ */, PPC::BCCL, Convert__imm_95_7__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6120 | | { 2094 /* bnll+ */, PPC::BCCL, Convert__imm_95_7__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6121 | | { 2100 /* bnll- */, PPC::BCCL, Convert__imm_95_6__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6122 | | { 2100 /* bnll- */, PPC::BCCL, Convert__imm_95_6__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6123 | | { 2106 /* bnlla */, PPC::BCCLA, Convert__imm_95_4__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6124 | | { 2106 /* bnlla */, PPC::BCCLA, Convert__imm_95_4__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6125 | | { 2112 /* bnlla+ */, PPC::BCCLA, Convert__imm_95_7__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6126 | | { 2112 /* bnlla+ */, PPC::BCCLA, Convert__imm_95_7__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6127 | | { 2119 /* bnlla- */, PPC::BCCLA, Convert__imm_95_6__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6128 | | { 2119 /* bnlla- */, PPC::BCCLA, Convert__imm_95_6__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6129 | | { 2126 /* bnllr */, PPC::BCCLR, Convert__imm_95_4__regCR0, AMFBS_None, { }, }, |
6130 | | { 2126 /* bnllr */, PPC::BCCLR, Convert__imm_95_4__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6131 | | { 2132 /* bnllr+ */, PPC::BCCLR, Convert__imm_95_7__regCR0, AMFBS_None, { }, }, |
6132 | | { 2132 /* bnllr+ */, PPC::BCCLR, Convert__imm_95_7__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6133 | | { 2139 /* bnllr- */, PPC::BCCLR, Convert__imm_95_6__regCR0, AMFBS_None, { }, }, |
6134 | | { 2139 /* bnllr- */, PPC::BCCLR, Convert__imm_95_6__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6135 | | { 2146 /* bnllrl */, PPC::BCCLRL, Convert__imm_95_4__regCR0, AMFBS_None, { }, }, |
6136 | | { 2146 /* bnllrl */, PPC::BCCLRL, Convert__imm_95_4__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6137 | | { 2153 /* bnllrl+ */, PPC::BCCLRL, Convert__imm_95_7__regCR0, AMFBS_None, { }, }, |
6138 | | { 2153 /* bnllrl+ */, PPC::BCCLRL, Convert__imm_95_7__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6139 | | { 2161 /* bnllrl- */, PPC::BCCLRL, Convert__imm_95_6__regCR0, AMFBS_None, { }, }, |
6140 | | { 2161 /* bnllrl- */, PPC::BCCLRL, Convert__imm_95_6__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6141 | | { 2169 /* bns */, PPC::BCC, Convert__imm_95_100__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6142 | | { 2169 /* bns */, PPC::BCC, Convert__imm_95_100__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6143 | | { 2173 /* bns+ */, PPC::BCC, Convert__imm_95_103__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6144 | | { 2173 /* bns+ */, PPC::BCC, Convert__imm_95_103__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6145 | | { 2178 /* bns- */, PPC::BCC, Convert__imm_95_102__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6146 | | { 2178 /* bns- */, PPC::BCC, Convert__imm_95_102__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6147 | | { 2183 /* bnsa */, PPC::BCCA, Convert__imm_95_100__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6148 | | { 2183 /* bnsa */, PPC::BCCA, Convert__imm_95_100__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6149 | | { 2188 /* bnsa+ */, PPC::BCCA, Convert__imm_95_103__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6150 | | { 2188 /* bnsa+ */, PPC::BCCA, Convert__imm_95_103__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6151 | | { 2194 /* bnsa- */, PPC::BCCA, Convert__imm_95_102__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6152 | | { 2194 /* bnsa- */, PPC::BCCA, Convert__imm_95_102__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6153 | | { 2200 /* bnsctr */, PPC::BCCCTR, Convert__imm_95_100__regCR0, AMFBS_None, { }, }, |
6154 | | { 2200 /* bnsctr */, PPC::BCCCTR, Convert__imm_95_100__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6155 | | { 2207 /* bnsctr+ */, PPC::BCCCTR, Convert__imm_95_103__regCR0, AMFBS_None, { }, }, |
6156 | | { 2207 /* bnsctr+ */, PPC::BCCCTR, Convert__imm_95_103__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6157 | | { 2215 /* bnsctr- */, PPC::BCCCTR, Convert__imm_95_102__regCR0, AMFBS_None, { }, }, |
6158 | | { 2215 /* bnsctr- */, PPC::BCCCTR, Convert__imm_95_102__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6159 | | { 2223 /* bnsctrl */, PPC::BCCCTRL, Convert__imm_95_100__regCR0, AMFBS_None, { }, }, |
6160 | | { 2223 /* bnsctrl */, PPC::BCCCTRL, Convert__imm_95_100__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6161 | | { 2231 /* bnsctrl+ */, PPC::BCCCTRL, Convert__imm_95_103__regCR0, AMFBS_None, { }, }, |
6162 | | { 2231 /* bnsctrl+ */, PPC::BCCCTRL, Convert__imm_95_103__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6163 | | { 2240 /* bnsctrl- */, PPC::BCCCTRL, Convert__imm_95_102__regCR0, AMFBS_None, { }, }, |
6164 | | { 2240 /* bnsctrl- */, PPC::BCCCTRL, Convert__imm_95_102__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6165 | | { 2249 /* bnsl */, PPC::BCCL, Convert__imm_95_100__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6166 | | { 2249 /* bnsl */, PPC::BCCL, Convert__imm_95_100__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6167 | | { 2254 /* bnsl+ */, PPC::BCCL, Convert__imm_95_103__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6168 | | { 2254 /* bnsl+ */, PPC::BCCL, Convert__imm_95_103__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6169 | | { 2260 /* bnsl- */, PPC::BCCL, Convert__imm_95_102__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6170 | | { 2260 /* bnsl- */, PPC::BCCL, Convert__imm_95_102__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6171 | | { 2266 /* bnsla */, PPC::BCCLA, Convert__imm_95_100__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6172 | | { 2266 /* bnsla */, PPC::BCCLA, Convert__imm_95_100__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6173 | | { 2272 /* bnsla+ */, PPC::BCCLA, Convert__imm_95_103__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6174 | | { 2272 /* bnsla+ */, PPC::BCCLA, Convert__imm_95_103__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6175 | | { 2279 /* bnsla- */, PPC::BCCLA, Convert__imm_95_102__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6176 | | { 2279 /* bnsla- */, PPC::BCCLA, Convert__imm_95_102__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6177 | | { 2286 /* bnslr */, PPC::BCCLR, Convert__imm_95_100__regCR0, AMFBS_None, { }, }, |
6178 | | { 2286 /* bnslr */, PPC::BCCLR, Convert__imm_95_100__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6179 | | { 2292 /* bnslr+ */, PPC::BCCLR, Convert__imm_95_103__regCR0, AMFBS_None, { }, }, |
6180 | | { 2292 /* bnslr+ */, PPC::BCCLR, Convert__imm_95_103__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6181 | | { 2299 /* bnslr- */, PPC::BCCLR, Convert__imm_95_102__regCR0, AMFBS_None, { }, }, |
6182 | | { 2299 /* bnslr- */, PPC::BCCLR, Convert__imm_95_102__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6183 | | { 2306 /* bnslrl */, PPC::BCCLRL, Convert__imm_95_100__regCR0, AMFBS_None, { }, }, |
6184 | | { 2306 /* bnslrl */, PPC::BCCLRL, Convert__imm_95_100__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6185 | | { 2313 /* bnslrl+ */, PPC::BCCLRL, Convert__imm_95_103__regCR0, AMFBS_None, { }, }, |
6186 | | { 2313 /* bnslrl+ */, PPC::BCCLRL, Convert__imm_95_103__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6187 | | { 2321 /* bnslrl- */, PPC::BCCLRL, Convert__imm_95_102__regCR0, AMFBS_None, { }, }, |
6188 | | { 2321 /* bnslrl- */, PPC::BCCLRL, Convert__imm_95_102__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6189 | | { 2329 /* bnu */, PPC::BCC, Convert__imm_95_100__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6190 | | { 2329 /* bnu */, PPC::BCC, Convert__imm_95_100__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6191 | | { 2333 /* bnu+ */, PPC::BCC, Convert__imm_95_103__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6192 | | { 2333 /* bnu+ */, PPC::BCC, Convert__imm_95_103__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6193 | | { 2338 /* bnu- */, PPC::BCC, Convert__imm_95_102__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6194 | | { 2338 /* bnu- */, PPC::BCC, Convert__imm_95_102__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6195 | | { 2343 /* bnua */, PPC::BCCA, Convert__imm_95_100__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6196 | | { 2343 /* bnua */, PPC::BCCA, Convert__imm_95_100__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6197 | | { 2348 /* bnua+ */, PPC::BCCA, Convert__imm_95_103__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6198 | | { 2348 /* bnua+ */, PPC::BCCA, Convert__imm_95_103__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6199 | | { 2354 /* bnua- */, PPC::BCCA, Convert__imm_95_102__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6200 | | { 2354 /* bnua- */, PPC::BCCA, Convert__imm_95_102__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6201 | | { 2360 /* bnuctr */, PPC::BCCCTR, Convert__imm_95_100__regCR0, AMFBS_None, { }, }, |
6202 | | { 2360 /* bnuctr */, PPC::BCCCTR, Convert__imm_95_100__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6203 | | { 2367 /* bnuctr+ */, PPC::BCCCTR, Convert__imm_95_103__regCR0, AMFBS_None, { }, }, |
6204 | | { 2367 /* bnuctr+ */, PPC::BCCCTR, Convert__imm_95_103__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6205 | | { 2375 /* bnuctr- */, PPC::BCCCTR, Convert__imm_95_102__regCR0, AMFBS_None, { }, }, |
6206 | | { 2375 /* bnuctr- */, PPC::BCCCTR, Convert__imm_95_102__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6207 | | { 2383 /* bnuctrl */, PPC::BCCCTRL, Convert__imm_95_100__regCR0, AMFBS_None, { }, }, |
6208 | | { 2383 /* bnuctrl */, PPC::BCCCTRL, Convert__imm_95_100__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6209 | | { 2391 /* bnuctrl+ */, PPC::BCCCTRL, Convert__imm_95_103__regCR0, AMFBS_None, { }, }, |
6210 | | { 2391 /* bnuctrl+ */, PPC::BCCCTRL, Convert__imm_95_103__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6211 | | { 2400 /* bnuctrl- */, PPC::BCCCTRL, Convert__imm_95_102__regCR0, AMFBS_None, { }, }, |
6212 | | { 2400 /* bnuctrl- */, PPC::BCCCTRL, Convert__imm_95_102__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6213 | | { 2409 /* bnul */, PPC::BCCL, Convert__imm_95_100__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6214 | | { 2409 /* bnul */, PPC::BCCL, Convert__imm_95_100__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6215 | | { 2414 /* bnul+ */, PPC::BCCL, Convert__imm_95_103__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6216 | | { 2414 /* bnul+ */, PPC::BCCL, Convert__imm_95_103__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6217 | | { 2420 /* bnul- */, PPC::BCCL, Convert__imm_95_102__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6218 | | { 2420 /* bnul- */, PPC::BCCL, Convert__imm_95_102__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6219 | | { 2426 /* bnula */, PPC::BCCLA, Convert__imm_95_100__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6220 | | { 2426 /* bnula */, PPC::BCCLA, Convert__imm_95_100__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6221 | | { 2432 /* bnula+ */, PPC::BCCLA, Convert__imm_95_103__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6222 | | { 2432 /* bnula+ */, PPC::BCCLA, Convert__imm_95_103__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6223 | | { 2439 /* bnula- */, PPC::BCCLA, Convert__imm_95_102__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6224 | | { 2439 /* bnula- */, PPC::BCCLA, Convert__imm_95_102__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6225 | | { 2446 /* bnulr */, PPC::BCCLR, Convert__imm_95_100__regCR0, AMFBS_None, { }, }, |
6226 | | { 2446 /* bnulr */, PPC::BCCLR, Convert__imm_95_100__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6227 | | { 2452 /* bnulr+ */, PPC::BCCLR, Convert__imm_95_103__regCR0, AMFBS_None, { }, }, |
6228 | | { 2452 /* bnulr+ */, PPC::BCCLR, Convert__imm_95_103__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6229 | | { 2459 /* bnulr- */, PPC::BCCLR, Convert__imm_95_102__regCR0, AMFBS_None, { }, }, |
6230 | | { 2459 /* bnulr- */, PPC::BCCLR, Convert__imm_95_102__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6231 | | { 2466 /* bnulrl */, PPC::BCCLRL, Convert__imm_95_100__regCR0, AMFBS_None, { }, }, |
6232 | | { 2466 /* bnulrl */, PPC::BCCLRL, Convert__imm_95_100__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6233 | | { 2473 /* bnulrl+ */, PPC::BCCLRL, Convert__imm_95_103__regCR0, AMFBS_None, { }, }, |
6234 | | { 2473 /* bnulrl+ */, PPC::BCCLRL, Convert__imm_95_103__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6235 | | { 2481 /* bnulrl- */, PPC::BCCLRL, Convert__imm_95_102__regCR0, AMFBS_None, { }, }, |
6236 | | { 2481 /* bnulrl- */, PPC::BCCLRL, Convert__imm_95_102__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6237 | | { 2489 /* bpermd */, PPC::BPERMD, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
6238 | | { 2496 /* brd */, PPC::BRD, Convert__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
6239 | | { 2500 /* brh */, PPC::BRH, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
6240 | | { 2504 /* brinc */, PPC::BRINC, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
6241 | | { 2510 /* brw */, PPC::BRW, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
6242 | | { 2514 /* bso */, PPC::BCC, Convert__imm_95_108__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6243 | | { 2514 /* bso */, PPC::BCC, Convert__imm_95_108__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6244 | | { 2518 /* bso+ */, PPC::BCC, Convert__imm_95_111__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6245 | | { 2518 /* bso+ */, PPC::BCC, Convert__imm_95_111__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6246 | | { 2523 /* bso- */, PPC::BCC, Convert__imm_95_110__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6247 | | { 2523 /* bso- */, PPC::BCC, Convert__imm_95_110__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6248 | | { 2528 /* bsoa */, PPC::BCCA, Convert__imm_95_108__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6249 | | { 2528 /* bsoa */, PPC::BCCA, Convert__imm_95_108__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6250 | | { 2533 /* bsoa+ */, PPC::BCCA, Convert__imm_95_111__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6251 | | { 2533 /* bsoa+ */, PPC::BCCA, Convert__imm_95_111__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6252 | | { 2539 /* bsoa- */, PPC::BCCA, Convert__imm_95_110__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6253 | | { 2539 /* bsoa- */, PPC::BCCA, Convert__imm_95_110__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6254 | | { 2545 /* bsoctr */, PPC::BCCCTR, Convert__imm_95_108__regCR0, AMFBS_None, { }, }, |
6255 | | { 2545 /* bsoctr */, PPC::BCCCTR, Convert__imm_95_108__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6256 | | { 2552 /* bsoctr+ */, PPC::BCCCTR, Convert__imm_95_111__regCR0, AMFBS_None, { }, }, |
6257 | | { 2552 /* bsoctr+ */, PPC::BCCCTR, Convert__imm_95_111__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6258 | | { 2560 /* bsoctr- */, PPC::BCCCTR, Convert__imm_95_110__regCR0, AMFBS_None, { }, }, |
6259 | | { 2560 /* bsoctr- */, PPC::BCCCTR, Convert__imm_95_110__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6260 | | { 2568 /* bsoctrl */, PPC::BCCCTRL, Convert__imm_95_108__regCR0, AMFBS_None, { }, }, |
6261 | | { 2568 /* bsoctrl */, PPC::BCCCTRL, Convert__imm_95_108__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6262 | | { 2576 /* bsoctrl+ */, PPC::BCCCTRL, Convert__imm_95_111__regCR0, AMFBS_None, { }, }, |
6263 | | { 2576 /* bsoctrl+ */, PPC::BCCCTRL, Convert__imm_95_111__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6264 | | { 2585 /* bsoctrl- */, PPC::BCCCTRL, Convert__imm_95_110__regCR0, AMFBS_None, { }, }, |
6265 | | { 2585 /* bsoctrl- */, PPC::BCCCTRL, Convert__imm_95_110__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6266 | | { 2594 /* bsol */, PPC::BCCL, Convert__imm_95_108__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6267 | | { 2594 /* bsol */, PPC::BCCL, Convert__imm_95_108__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6268 | | { 2599 /* bsol+ */, PPC::BCCL, Convert__imm_95_111__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6269 | | { 2599 /* bsol+ */, PPC::BCCL, Convert__imm_95_111__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6270 | | { 2605 /* bsol- */, PPC::BCCL, Convert__imm_95_110__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6271 | | { 2605 /* bsol- */, PPC::BCCL, Convert__imm_95_110__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6272 | | { 2611 /* bsola */, PPC::BCCLA, Convert__imm_95_108__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6273 | | { 2611 /* bsola */, PPC::BCCLA, Convert__imm_95_108__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6274 | | { 2617 /* bsola+ */, PPC::BCCLA, Convert__imm_95_111__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6275 | | { 2617 /* bsola+ */, PPC::BCCLA, Convert__imm_95_111__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6276 | | { 2624 /* bsola- */, PPC::BCCLA, Convert__imm_95_110__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6277 | | { 2624 /* bsola- */, PPC::BCCLA, Convert__imm_95_110__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6278 | | { 2631 /* bsolr */, PPC::BCCLR, Convert__imm_95_108__regCR0, AMFBS_None, { }, }, |
6279 | | { 2631 /* bsolr */, PPC::BCCLR, Convert__imm_95_108__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6280 | | { 2637 /* bsolr+ */, PPC::BCCLR, Convert__imm_95_111__regCR0, AMFBS_None, { }, }, |
6281 | | { 2637 /* bsolr+ */, PPC::BCCLR, Convert__imm_95_111__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6282 | | { 2644 /* bsolr- */, PPC::BCCLR, Convert__imm_95_110__regCR0, AMFBS_None, { }, }, |
6283 | | { 2644 /* bsolr- */, PPC::BCCLR, Convert__imm_95_110__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6284 | | { 2651 /* bsolrl */, PPC::BCCLRL, Convert__imm_95_108__regCR0, AMFBS_None, { }, }, |
6285 | | { 2651 /* bsolrl */, PPC::BCCLRL, Convert__imm_95_108__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6286 | | { 2658 /* bsolrl+ */, PPC::BCCLRL, Convert__imm_95_111__regCR0, AMFBS_None, { }, }, |
6287 | | { 2658 /* bsolrl+ */, PPC::BCCLRL, Convert__imm_95_111__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6288 | | { 2666 /* bsolrl- */, PPC::BCCLRL, Convert__imm_95_110__regCR0, AMFBS_None, { }, }, |
6289 | | { 2666 /* bsolrl- */, PPC::BCCLRL, Convert__imm_95_110__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6290 | | { 2674 /* bt */, PPC::gBC, Convert__imm_95_12__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
6291 | | { 2677 /* bt+ */, PPC::gBC, Convert__imm_95_15__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
6292 | | { 2681 /* bt- */, PPC::gBC, Convert__imm_95_14__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
6293 | | { 2685 /* bta */, PPC::gBCA, Convert__imm_95_12__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
6294 | | { 2689 /* bta+ */, PPC::gBCA, Convert__imm_95_15__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
6295 | | { 2694 /* bta- */, PPC::gBCA, Convert__imm_95_14__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
6296 | | { 2699 /* btctr */, PPC::gBCCTR, Convert__imm_95_12__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
6297 | | { 2705 /* btctr+ */, PPC::gBCCTR, Convert__imm_95_15__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
6298 | | { 2712 /* btctr- */, PPC::gBCCTR, Convert__imm_95_14__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
6299 | | { 2719 /* btctrl */, PPC::gBCCTRL, Convert__imm_95_12__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
6300 | | { 2726 /* btctrl+ */, PPC::gBCCTRL, Convert__imm_95_15__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
6301 | | { 2734 /* btctrl- */, PPC::gBCCTRL, Convert__imm_95_14__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
6302 | | { 2742 /* btl */, PPC::gBCL, Convert__imm_95_12__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
6303 | | { 2746 /* btl+ */, PPC::gBCL, Convert__imm_95_15__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
6304 | | { 2751 /* btl- */, PPC::gBCL, Convert__imm_95_14__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
6305 | | { 2756 /* btla */, PPC::gBCLA, Convert__imm_95_12__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
6306 | | { 2761 /* btla+ */, PPC::gBCLA, Convert__imm_95_15__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
6307 | | { 2767 /* btla- */, PPC::gBCLA, Convert__imm_95_14__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
6308 | | { 2773 /* btlr */, PPC::gBCLR, Convert__imm_95_12__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
6309 | | { 2778 /* btlr+ */, PPC::gBCLR, Convert__imm_95_15__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
6310 | | { 2784 /* btlr- */, PPC::gBCLR, Convert__imm_95_14__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
6311 | | { 2790 /* btlrl */, PPC::gBCLRL, Convert__imm_95_12__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
6312 | | { 2796 /* btlrl+ */, PPC::gBCLRL, Convert__imm_95_15__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
6313 | | { 2803 /* btlrl- */, PPC::gBCLRL, Convert__imm_95_14__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
6314 | | { 2810 /* bun */, PPC::BCC, Convert__imm_95_108__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6315 | | { 2810 /* bun */, PPC::BCC, Convert__imm_95_108__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6316 | | { 2814 /* bun+ */, PPC::BCC, Convert__imm_95_111__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6317 | | { 2814 /* bun+ */, PPC::BCC, Convert__imm_95_111__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6318 | | { 2819 /* bun- */, PPC::BCC, Convert__imm_95_110__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6319 | | { 2819 /* bun- */, PPC::BCC, Convert__imm_95_110__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6320 | | { 2824 /* buna */, PPC::BCCA, Convert__imm_95_108__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6321 | | { 2824 /* buna */, PPC::BCCA, Convert__imm_95_108__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6322 | | { 2829 /* buna+ */, PPC::BCCA, Convert__imm_95_111__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6323 | | { 2829 /* buna+ */, PPC::BCCA, Convert__imm_95_111__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6324 | | { 2835 /* buna- */, PPC::BCCA, Convert__imm_95_110__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6325 | | { 2835 /* buna- */, PPC::BCCA, Convert__imm_95_110__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6326 | | { 2841 /* bunctr */, PPC::BCCCTR, Convert__imm_95_108__regCR0, AMFBS_None, { }, }, |
6327 | | { 2841 /* bunctr */, PPC::BCCCTR, Convert__imm_95_108__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6328 | | { 2848 /* bunctr+ */, PPC::BCCCTR, Convert__imm_95_111__regCR0, AMFBS_None, { }, }, |
6329 | | { 2848 /* bunctr+ */, PPC::BCCCTR, Convert__imm_95_111__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6330 | | { 2856 /* bunctr- */, PPC::BCCCTR, Convert__imm_95_110__regCR0, AMFBS_None, { }, }, |
6331 | | { 2856 /* bunctr- */, PPC::BCCCTR, Convert__imm_95_110__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6332 | | { 2864 /* bunctrl */, PPC::BCCCTRL, Convert__imm_95_108__regCR0, AMFBS_None, { }, }, |
6333 | | { 2864 /* bunctrl */, PPC::BCCCTRL, Convert__imm_95_108__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6334 | | { 2872 /* bunctrl+ */, PPC::BCCCTRL, Convert__imm_95_111__regCR0, AMFBS_None, { }, }, |
6335 | | { 2872 /* bunctrl+ */, PPC::BCCCTRL, Convert__imm_95_111__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6336 | | { 2881 /* bunctrl- */, PPC::BCCCTRL, Convert__imm_95_110__regCR0, AMFBS_None, { }, }, |
6337 | | { 2881 /* bunctrl- */, PPC::BCCCTRL, Convert__imm_95_110__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6338 | | { 2890 /* bunl */, PPC::BCCL, Convert__imm_95_108__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6339 | | { 2890 /* bunl */, PPC::BCCL, Convert__imm_95_108__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6340 | | { 2895 /* bunl+ */, PPC::BCCL, Convert__imm_95_111__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6341 | | { 2895 /* bunl+ */, PPC::BCCL, Convert__imm_95_111__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6342 | | { 2901 /* bunl- */, PPC::BCCL, Convert__imm_95_110__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6343 | | { 2901 /* bunl- */, PPC::BCCL, Convert__imm_95_110__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6344 | | { 2907 /* bunla */, PPC::BCCLA, Convert__imm_95_108__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6345 | | { 2907 /* bunla */, PPC::BCCLA, Convert__imm_95_108__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6346 | | { 2913 /* bunla+ */, PPC::BCCLA, Convert__imm_95_111__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6347 | | { 2913 /* bunla+ */, PPC::BCCLA, Convert__imm_95_111__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6348 | | { 2920 /* bunla- */, PPC::BCCLA, Convert__imm_95_110__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
6349 | | { 2920 /* bunla- */, PPC::BCCLA, Convert__imm_95_110__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
6350 | | { 2927 /* bunlr */, PPC::BCCLR, Convert__imm_95_108__regCR0, AMFBS_None, { }, }, |
6351 | | { 2927 /* bunlr */, PPC::BCCLR, Convert__imm_95_108__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6352 | | { 2933 /* bunlr+ */, PPC::BCCLR, Convert__imm_95_111__regCR0, AMFBS_None, { }, }, |
6353 | | { 2933 /* bunlr+ */, PPC::BCCLR, Convert__imm_95_111__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6354 | | { 2940 /* bunlr- */, PPC::BCCLR, Convert__imm_95_110__regCR0, AMFBS_None, { }, }, |
6355 | | { 2940 /* bunlr- */, PPC::BCCLR, Convert__imm_95_110__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6356 | | { 2947 /* bunlrl */, PPC::BCCLRL, Convert__imm_95_108__regCR0, AMFBS_None, { }, }, |
6357 | | { 2947 /* bunlrl */, PPC::BCCLRL, Convert__imm_95_108__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6358 | | { 2954 /* bunlrl+ */, PPC::BCCLRL, Convert__imm_95_111__regCR0, AMFBS_None, { }, }, |
6359 | | { 2954 /* bunlrl+ */, PPC::BCCLRL, Convert__imm_95_111__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6360 | | { 2962 /* bunlrl- */, PPC::BCCLRL, Convert__imm_95_110__regCR0, AMFBS_None, { }, }, |
6361 | | { 2962 /* bunlrl- */, PPC::BCCLRL, Convert__imm_95_110__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
6362 | | { 2970 /* cbcdtd */, PPC::CBCDTD, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
6363 | | { 2977 /* cdtbcd */, PPC::CDTBCD, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
6364 | | { 2984 /* cfuged */, PPC::CFUGED, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
6365 | | { 2991 /* clrbhrb */, PPC::CLRBHRB, Convert_NoOperands, AMFBS_None, { }, }, |
6366 | | { 2999 /* clrldi */, PPC::RLDICL, Convert__RegG8RC1_0__RegG8RC1_1__imm_95_0__U6Imm1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm }, }, |
6367 | | { 2999 /* clrldi */, PPC::RLDICL_32_64, Convert__RegG8RC1_0__RegGPRC1_1__imm_95_0__U6Imm1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGPRC, MCK_U6Imm }, }, |
6368 | | { 2999 /* clrldi */, PPC::RLDICL_rec, Convert__RegG8RC1_1__RegG8RC1_2__imm_95_0__U6Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm }, }, |
6369 | | { 3006 /* clrlsldi */, PPC::CLRLSLDI, Convert__RegG8RC1_0__RegG8RC1_1__U6Imm1_2__U6Imm1_3, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm, MCK_U6Imm }, }, |
6370 | | { 3006 /* clrlsldi */, PPC::CLRLSLDI_rec, Convert__RegG8RC1_1__RegG8RC1_2__U6Imm1_3__U6Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm, MCK_U6Imm }, }, |
6371 | | { 3015 /* clrlslwi */, PPC::CLRLSLWI, Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2__U5Imm1_3, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm, MCK_U5Imm }, }, |
6372 | | { 3015 /* clrlslwi */, PPC::CLRLSLWI_rec, Convert__RegGPRC1_1__RegGPRC1_2__U5Imm1_3__U5Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm, MCK_U5Imm }, }, |
6373 | | { 3024 /* clrlwi */, PPC::RLWINM8, Convert__RegG8RC1_0__RegG8RC1_1__imm_95_0__U5Imm1_2__imm_95_31, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U5Imm }, }, |
6374 | | { 3024 /* clrlwi */, PPC::RLWINM, Convert__RegGPRC1_0__RegGPRC1_1__imm_95_0__U5Imm1_2__imm_95_31, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm }, }, |
6375 | | { 3024 /* clrlwi */, PPC::RLWINM8_rec, Convert__RegG8RC1_1__RegG8RC1_2__imm_95_0__U5Imm1_3__imm_95_31, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U5Imm }, }, |
6376 | | { 3024 /* clrlwi */, PPC::RLWINM_rec, Convert__RegGPRC1_1__RegGPRC1_2__imm_95_0__U5Imm1_3__imm_95_31, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm }, }, |
6377 | | { 3031 /* clrrdi */, PPC::CLRRDI, Convert__RegG8RC1_0__RegG8RC1_1__U6Imm1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm }, }, |
6378 | | { 3031 /* clrrdi */, PPC::CLRRDI_rec, Convert__RegG8RC1_1__RegG8RC1_2__U6Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm }, }, |
6379 | | { 3038 /* clrrwi */, PPC::CLRRWI, Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm }, }, |
6380 | | { 3038 /* clrrwi */, PPC::CLRRWI_rec, Convert__RegGPRC1_1__RegGPRC1_2__U5Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm }, }, |
6381 | | { 3045 /* cmp */, PPC::CMPW, Convert__RegCRRC1_0__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK_RegCRRC, MCK_0, MCK_RegGPRC, MCK_RegGPRC }, }, |
6382 | | { 3045 /* cmp */, PPC::CMPD, Convert__RegCRRC1_0__RegG8RC1_2__RegG8RC1_3, AMFBS_None, { MCK_RegCRRC, MCK_1, MCK_RegG8RC, MCK_RegG8RC }, }, |
6383 | | { 3049 /* cmpb */, PPC::CMPB, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
6384 | | { 3054 /* cmpd */, PPC::CMPD, Convert__regCR0__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
6385 | | { 3054 /* cmpd */, PPC::CMPD, Convert__RegCRRC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegG8RC, MCK_RegG8RC }, }, |
6386 | | { 3059 /* cmpdi */, PPC::CMPDI, Convert__regCR0__RegG8RC1_0__S16Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S16Imm }, }, |
6387 | | { 3059 /* cmpdi */, PPC::CMPDI, Convert__RegCRRC1_0__RegG8RC1_1__S16Imm1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegG8RC, MCK_S16Imm }, }, |
6388 | | { 3065 /* cmpeqb */, PPC::CMPEQB, Convert__RegCRRC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegG8RC, MCK_RegG8RC }, }, |
6389 | | { 3072 /* cmpi */, PPC::CMPWI, Convert__RegCRRC1_0__RegGPRC1_2__S16Imm1_3, AMFBS_None, { MCK_RegCRRC, MCK_0, MCK_RegGPRC, MCK_S16Imm }, }, |
6390 | | { 3072 /* cmpi */, PPC::CMPDI, Convert__RegCRRC1_0__RegG8RC1_2__S16Imm1_3, AMFBS_None, { MCK_RegCRRC, MCK_1, MCK_RegG8RC, MCK_S16Imm }, }, |
6391 | | { 3077 /* cmpl */, PPC::CMPLW, Convert__RegCRRC1_0__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK_RegCRRC, MCK_0, MCK_RegGPRC, MCK_RegGPRC }, }, |
6392 | | { 3077 /* cmpl */, PPC::CMPLD, Convert__RegCRRC1_0__RegG8RC1_2__RegG8RC1_3, AMFBS_None, { MCK_RegCRRC, MCK_1, MCK_RegG8RC, MCK_RegG8RC }, }, |
6393 | | { 3082 /* cmpld */, PPC::CMPLD, Convert__regCR0__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
6394 | | { 3082 /* cmpld */, PPC::CMPLD, Convert__RegCRRC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegG8RC, MCK_RegG8RC }, }, |
6395 | | { 3088 /* cmpldi */, PPC::CMPLDI, Convert__regCR0__RegG8RC1_0__U16Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_U16Imm }, }, |
6396 | | { 3088 /* cmpldi */, PPC::CMPLDI, Convert__RegCRRC1_0__RegG8RC1_1__U16Imm1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegG8RC, MCK_U16Imm }, }, |
6397 | | { 3095 /* cmpli */, PPC::CMPLWI, Convert__RegCRRC1_0__RegGPRC1_2__U16Imm1_3, AMFBS_None, { MCK_RegCRRC, MCK_0, MCK_RegGPRC, MCK_U16Imm }, }, |
6398 | | { 3095 /* cmpli */, PPC::CMPLDI, Convert__RegCRRC1_0__RegG8RC1_2__U16Imm1_3, AMFBS_None, { MCK_RegCRRC, MCK_1, MCK_RegG8RC, MCK_U16Imm }, }, |
6399 | | { 3101 /* cmplw */, PPC::CMPLW, Convert__regCR0__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
6400 | | { 3101 /* cmplw */, PPC::CMPLW, Convert__RegCRRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
6401 | | { 3107 /* cmplwi */, PPC::CMPLWI, Convert__regCR0__RegGPRC1_0__U16Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_U16Imm }, }, |
6402 | | { 3107 /* cmplwi */, PPC::CMPLWI, Convert__RegCRRC1_0__RegGPRC1_1__U16Imm1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegGPRC, MCK_U16Imm }, }, |
6403 | | { 3114 /* cmprb */, PPC::CMPRB, Convert__RegCRRC1_0__U1Imm1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK_RegCRRC, MCK_U1Imm, MCK_RegGPRC, MCK_RegGPRC }, }, |
6404 | | { 3120 /* cmpw */, PPC::CMPW, Convert__regCR0__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
6405 | | { 3120 /* cmpw */, PPC::CMPW, Convert__RegCRRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
6406 | | { 3125 /* cmpwi */, PPC::CMPWI, Convert__regCR0__RegGPRC1_0__S16Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S16Imm }, }, |
6407 | | { 3125 /* cmpwi */, PPC::CMPWI, Convert__RegCRRC1_0__RegGPRC1_1__S16Imm1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegGPRC, MCK_S16Imm }, }, |
6408 | | { 3131 /* cntlzd */, PPC::CNTLZD, Convert__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
6409 | | { 3131 /* cntlzd */, PPC::CNTLZD_rec, Convert__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC }, }, |
6410 | | { 3138 /* cntlzdm */, PPC::CNTLZDM, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
6411 | | { 3146 /* cntlzw */, PPC::CNTLZW8, Convert__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
6412 | | { 3146 /* cntlzw */, PPC::CNTLZW, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
6413 | | { 3146 /* cntlzw */, PPC::CNTLZW, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
6414 | | { 3146 /* cntlzw */, PPC::CNTLZW8_rec, Convert__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC }, }, |
6415 | | { 3146 /* cntlzw */, PPC::CNTLZW_rec, Convert__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC }, }, |
6416 | | { 3146 /* cntlzw */, PPC::CNTLZW_rec, Convert__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC }, }, |
6417 | | { 3153 /* cnttzd */, PPC::CNTTZD, Convert__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
6418 | | { 3153 /* cnttzd */, PPC::CNTTZD_rec, Convert__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC }, }, |
6419 | | { 3160 /* cnttzdm */, PPC::CNTTZDM, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
6420 | | { 3168 /* cnttzw */, PPC::CNTTZW, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
6421 | | { 3168 /* cnttzw */, PPC::CNTTZW_rec, Convert__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC }, }, |
6422 | | { 3175 /* copy */, PPC::CP_COPY, Convert__RegGPRC1_0__RegGPRC1_1__imm_95_0, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
6423 | | { 3180 /* cpabort */, PPC::CP_ABORT, Convert_NoOperands, AMFBS_None, { }, }, |
6424 | | { 3188 /* crand */, PPC::CRAND, Convert__RegCRBITRC1_0__RegCRBITRC1_1__RegCRBITRC1_2, AMFBS_None, { MCK_RegCRBITRC, MCK_RegCRBITRC, MCK_RegCRBITRC }, }, |
6425 | | { 3194 /* crandc */, PPC::CRANDC, Convert__RegCRBITRC1_0__RegCRBITRC1_1__RegCRBITRC1_2, AMFBS_None, { MCK_RegCRBITRC, MCK_RegCRBITRC, MCK_RegCRBITRC }, }, |
6426 | | { 3201 /* crclr */, PPC::CRXOR, Convert__RegCRBITRC1_0__RegCRBITRC1_0__RegCRBITRC1_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
6427 | | { 3207 /* creqv */, PPC::CREQV, Convert__RegCRBITRC1_0__RegCRBITRC1_1__RegCRBITRC1_2, AMFBS_None, { MCK_RegCRBITRC, MCK_RegCRBITRC, MCK_RegCRBITRC }, }, |
6428 | | { 3213 /* crmove */, PPC::CROR, Convert__RegCRBITRC1_0__RegCRBITRC1_1__RegCRBITRC1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_RegCRBITRC }, }, |
6429 | | { 3220 /* crnand */, PPC::CRNAND, Convert__RegCRBITRC1_0__RegCRBITRC1_1__RegCRBITRC1_2, AMFBS_None, { MCK_RegCRBITRC, MCK_RegCRBITRC, MCK_RegCRBITRC }, }, |
6430 | | { 3227 /* crnor */, PPC::CRNOR, Convert__RegCRBITRC1_0__RegCRBITRC1_1__RegCRBITRC1_2, AMFBS_None, { MCK_RegCRBITRC, MCK_RegCRBITRC, MCK_RegCRBITRC }, }, |
6431 | | { 3233 /* crnot */, PPC::CRNOR, Convert__RegCRBITRC1_0__RegCRBITRC1_1__RegCRBITRC1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_RegCRBITRC }, }, |
6432 | | { 3239 /* cror */, PPC::CROR, Convert__RegCRBITRC1_0__RegCRBITRC1_1__RegCRBITRC1_2, AMFBS_None, { MCK_RegCRBITRC, MCK_RegCRBITRC, MCK_RegCRBITRC }, }, |
6433 | | { 3244 /* crorc */, PPC::CRORC, Convert__RegCRBITRC1_0__RegCRBITRC1_1__RegCRBITRC1_2, AMFBS_None, { MCK_RegCRBITRC, MCK_RegCRBITRC, MCK_RegCRBITRC }, }, |
6434 | | { 3250 /* crset */, PPC::CREQV, Convert__RegCRBITRC1_0__RegCRBITRC1_0__RegCRBITRC1_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
6435 | | { 3256 /* crxor */, PPC::CRXOR, Convert__RegCRBITRC1_0__RegCRBITRC1_1__RegCRBITRC1_2, AMFBS_None, { MCK_RegCRBITRC, MCK_RegCRBITRC, MCK_RegCRBITRC }, }, |
6436 | | { 3262 /* dadd */, PPC::DADD, Convert__RegF8RC1_0__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
6437 | | { 3262 /* dadd */, PPC::DADD_rec, Convert__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
6438 | | { 3267 /* daddq */, PPC::DADDQ, Convert__RegFpRC1_0__RegFpRC1_1__RegFpRC1_2, AMFBS_None, { MCK_RegFpRC, MCK_RegFpRC, MCK_RegFpRC }, }, |
6439 | | { 3267 /* daddq */, PPC::DADDQ_rec, Convert__RegFpRC1_1__RegFpRC1_2__RegFpRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegFpRC, MCK_RegFpRC, MCK_RegFpRC }, }, |
6440 | | { 3273 /* darn */, PPC::DARN, Convert__RegG8RC1_0__U2Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_U2Imm }, }, |
6441 | | { 3278 /* dcba */, PPC::DCBA, Convert__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6442 | | { 3283 /* dcbf */, PPC::DCBFx, Convert__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6443 | | { 3283 /* dcbf */, PPC::DCBF, Convert__U3Imm1_2__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC, MCK_U3Imm }, }, |
6444 | | { 3288 /* dcbfep */, PPC::DCBFEP, Convert__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6445 | | { 3295 /* dcbfl */, PPC::DCBFL, Convert__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6446 | | { 3301 /* dcbflp */, PPC::DCBFLP, Convert__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6447 | | { 3308 /* dcbfps */, PPC::DCBFPS, Convert__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6448 | | { 3315 /* dcbi */, PPC::DCBI, Convert__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6449 | | { 3320 /* dcbst */, PPC::DCBST, Convert__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6450 | | { 3326 /* dcbstep */, PPC::DCBSTEP, Convert__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6451 | | { 3334 /* dcbstps */, PPC::DCBSTPS, Convert__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6452 | | { 3342 /* dcbt */, PPC::DCBTx, Convert__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6453 | | { 3342 /* dcbt */, PPC::DCBT, Convert__U5Imm1_2__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC, MCK_U5Imm }, }, |
6454 | | { 3347 /* dcbtct */, PPC::DCBTCT, Convert__RegGxRCNoR01_0__RegGxRC1_1__U5Imm1_2, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC, MCK_U5Imm }, }, |
6455 | | { 3354 /* dcbtds */, PPC::DCBTDS, Convert__RegGxRCNoR01_0__RegGxRC1_1__U5Imm1_2, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC, MCK_U5Imm }, }, |
6456 | | { 3361 /* dcbtep */, PPC::DCBTEP, Convert__RegGxRCNoR01_1__RegGxRC1_2__U5Imm1_0, AMFBS_None, { MCK_U5Imm, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6457 | | { 3368 /* dcbtst */, PPC::DCBTSTx, Convert__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6458 | | { 3368 /* dcbtst */, PPC::DCBTST, Convert__U5Imm1_2__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC, MCK_U5Imm }, }, |
6459 | | { 3375 /* dcbtstct */, PPC::DCBTSTCT, Convert__RegGxRCNoR01_0__RegGxRC1_1__U5Imm1_2, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC, MCK_U5Imm }, }, |
6460 | | { 3384 /* dcbtstds */, PPC::DCBTSTDS, Convert__RegGxRCNoR01_0__RegGxRC1_1__U5Imm1_2, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC, MCK_U5Imm }, }, |
6461 | | { 3393 /* dcbtstep */, PPC::DCBTSTEP, Convert__RegGxRCNoR01_1__RegGxRC1_2__U5Imm1_0, AMFBS_None, { MCK_U5Imm, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6462 | | { 3402 /* dcbtstt */, PPC::DCBTSTT, Convert__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6463 | | { 3410 /* dcbtt */, PPC::DCBTT, Convert__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6464 | | { 3416 /* dcbz */, PPC::DCBZ, Convert__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6465 | | { 3421 /* dcbzep */, PPC::DCBZEP, Convert__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6466 | | { 3428 /* dcbzl */, PPC::DCBZL, Convert__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6467 | | { 3434 /* dcbzlep */, PPC::DCBZLEP, Convert__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6468 | | { 3442 /* dccci */, PPC::DCCCI, Convert__regR0__regR0, AMFBS_None, { }, }, |
6469 | | { 3442 /* dccci */, PPC::DCCCI, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
6470 | | { 3448 /* dcffix */, PPC::DCFFIX, Convert__RegF8RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC }, }, |
6471 | | { 3448 /* dcffix */, PPC::DCFFIX_rec, Convert__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC }, }, |
6472 | | { 3455 /* dcffixq */, PPC::DCFFIXQ, Convert__RegFpRC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegFpRC, MCK_RegF8RC }, }, |
6473 | | { 3455 /* dcffixq */, PPC::DCFFIXQ_rec, Convert__RegFpRC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegFpRC, MCK_RegF8RC }, }, |
6474 | | { 3463 /* dcffixqq */, PPC::DCFFIXQQ, Convert__RegFpRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegFpRC, MCK_RegVRRC }, }, |
6475 | | { 3472 /* dci */, PPC::DCCCI, Convert__regR0__regR0, AMFBS_None, { MCK_0 }, }, |
6476 | | { 3476 /* dcmpo */, PPC::DCMPO, Convert__RegCRRC1_0__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegF8RC, MCK_RegF8RC }, }, |
6477 | | { 3482 /* dcmpoq */, PPC::DCMPOQ, Convert__RegCRRC1_0__RegFpRC1_1__RegFpRC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegFpRC, MCK_RegFpRC }, }, |
6478 | | { 3489 /* dcmpu */, PPC::DCMPU, Convert__RegCRRC1_0__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegF8RC, MCK_RegF8RC }, }, |
6479 | | { 3495 /* dcmpuq */, PPC::DCMPUQ, Convert__RegCRRC1_0__RegFpRC1_1__RegFpRC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegFpRC, MCK_RegFpRC }, }, |
6480 | | { 3502 /* dctdp */, PPC::DCTDP, Convert__RegF8RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC }, }, |
6481 | | { 3502 /* dctdp */, PPC::DCTDP_rec, Convert__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC }, }, |
6482 | | { 3508 /* dctfix */, PPC::DCTFIX, Convert__RegF8RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC }, }, |
6483 | | { 3508 /* dctfix */, PPC::DCTFIX_rec, Convert__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC }, }, |
6484 | | { 3515 /* dctfixq */, PPC::DCTFIXQ, Convert__RegF8RC1_0__RegFpRC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegFpRC }, }, |
6485 | | { 3515 /* dctfixq */, PPC::DCTFIXQ_rec, Convert__RegF8RC1_1__RegFpRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegFpRC }, }, |
6486 | | { 3523 /* dctfixqq */, PPC::DCTFIXQQ, Convert__RegVRRC1_0__RegFpRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegFpRC }, }, |
6487 | | { 3532 /* dctqpq */, PPC::DCTQPQ, Convert__RegFpRC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegFpRC, MCK_RegF8RC }, }, |
6488 | | { 3532 /* dctqpq */, PPC::DCTQPQ_rec, Convert__RegFpRC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegFpRC, MCK_RegF8RC }, }, |
6489 | | { 3539 /* ddedpd */, PPC::DDEDPD, Convert__RegF8RC1_1__U2Imm1_0__RegF8RC1_2, AMFBS_None, { MCK_U2Imm, MCK_RegF8RC, MCK_RegF8RC }, }, |
6490 | | { 3539 /* ddedpd */, PPC::DDEDPD_rec, Convert__RegF8RC1_2__U2Imm1_1__RegF8RC1_3, AMFBS_None, { MCK__DOT_, MCK_U2Imm, MCK_RegF8RC, MCK_RegF8RC }, }, |
6491 | | { 3546 /* ddedpdq */, PPC::DDEDPDQ, Convert__RegFpRC1_1__U2Imm1_0__RegFpRC1_2, AMFBS_None, { MCK_U2Imm, MCK_RegFpRC, MCK_RegFpRC }, }, |
6492 | | { 3546 /* ddedpdq */, PPC::DDEDPDQ_rec, Convert__RegFpRC1_2__U2Imm1_1__RegFpRC1_3, AMFBS_None, { MCK__DOT_, MCK_U2Imm, MCK_RegFpRC, MCK_RegFpRC }, }, |
6493 | | { 3554 /* ddiv */, PPC::DDIV, Convert__RegF8RC1_0__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
6494 | | { 3554 /* ddiv */, PPC::DDIV_rec, Convert__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
6495 | | { 3559 /* ddivq */, PPC::DDIVQ, Convert__RegFpRC1_0__RegFpRC1_1__RegFpRC1_2, AMFBS_None, { MCK_RegFpRC, MCK_RegFpRC, MCK_RegFpRC }, }, |
6496 | | { 3559 /* ddivq */, PPC::DDIVQ_rec, Convert__RegFpRC1_1__RegFpRC1_2__RegFpRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegFpRC, MCK_RegFpRC, MCK_RegFpRC }, }, |
6497 | | { 3565 /* denbcd */, PPC::DENBCD, Convert__RegF8RC1_1__U1Imm1_0__RegF8RC1_2, AMFBS_None, { MCK_U1Imm, MCK_RegF8RC, MCK_RegF8RC }, }, |
6498 | | { 3565 /* denbcd */, PPC::DENBCD_rec, Convert__RegF8RC1_2__U1Imm1_1__RegF8RC1_3, AMFBS_None, { MCK__DOT_, MCK_U1Imm, MCK_RegF8RC, MCK_RegF8RC }, }, |
6499 | | { 3572 /* denbcdq */, PPC::DENBCDQ, Convert__RegFpRC1_1__U1Imm1_0__RegFpRC1_2, AMFBS_None, { MCK_U1Imm, MCK_RegFpRC, MCK_RegFpRC }, }, |
6500 | | { 3572 /* denbcdq */, PPC::DENBCDQ_rec, Convert__RegFpRC1_2__U1Imm1_1__RegFpRC1_3, AMFBS_None, { MCK__DOT_, MCK_U1Imm, MCK_RegFpRC, MCK_RegFpRC }, }, |
6501 | | { 3580 /* diex */, PPC::DIEX, Convert__RegF8RC1_0__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
6502 | | { 3580 /* diex */, PPC::DIEX_rec, Convert__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
6503 | | { 3585 /* diexq */, PPC::DIEXQ, Convert__RegFpRC1_0__RegF8RC1_1__RegFpRC1_2, AMFBS_None, { MCK_RegFpRC, MCK_RegF8RC, MCK_RegFpRC }, }, |
6504 | | { 3585 /* diexq */, PPC::DIEXQ_rec, Convert__RegFpRC1_1__RegF8RC1_2__RegFpRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegFpRC, MCK_RegF8RC, MCK_RegFpRC }, }, |
6505 | | { 3591 /* divd */, PPC::DIVD, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
6506 | | { 3591 /* divd */, PPC::DIVD_rec, Convert__RegG8RC1_1__RegG8RC1_2__RegG8RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
6507 | | { 3596 /* divde */, PPC::DIVDE, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
6508 | | { 3596 /* divde */, PPC::DIVDE_rec, Convert__RegG8RC1_1__RegG8RC1_2__RegG8RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
6509 | | { 3602 /* divdeo */, PPC::DIVDEO, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
6510 | | { 3602 /* divdeo */, PPC::DIVDEO_rec, Convert__RegG8RC1_1__RegG8RC1_2__RegG8RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
6511 | | { 3609 /* divdeu */, PPC::DIVDEU, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
6512 | | { 3609 /* divdeu */, PPC::DIVDEU_rec, Convert__RegG8RC1_1__RegG8RC1_2__RegG8RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
6513 | | { 3616 /* divdeuo */, PPC::DIVDEUO, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
6514 | | { 3616 /* divdeuo */, PPC::DIVDEUO_rec, Convert__RegG8RC1_1__RegG8RC1_2__RegG8RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
6515 | | { 3624 /* divdo */, PPC::DIVDO, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
6516 | | { 3624 /* divdo */, PPC::DIVDO_rec, Convert__RegG8RC1_1__RegG8RC1_2__RegG8RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
6517 | | { 3630 /* divdu */, PPC::DIVDU, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
6518 | | { 3630 /* divdu */, PPC::DIVDU_rec, Convert__RegG8RC1_1__RegG8RC1_2__RegG8RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
6519 | | { 3636 /* divduo */, PPC::DIVDUO, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
6520 | | { 3636 /* divduo */, PPC::DIVDUO_rec, Convert__RegG8RC1_1__RegG8RC1_2__RegG8RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
6521 | | { 3643 /* divw */, PPC::DIVW, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
6522 | | { 3643 /* divw */, PPC::DIVW_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
6523 | | { 3648 /* divwe */, PPC::DIVWE, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
6524 | | { 3648 /* divwe */, PPC::DIVWE_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
6525 | | { 3654 /* divweo */, PPC::DIVWEO, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
6526 | | { 3654 /* divweo */, PPC::DIVWEO_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
6527 | | { 3661 /* divweu */, PPC::DIVWEU, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
6528 | | { 3661 /* divweu */, PPC::DIVWEU_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
6529 | | { 3668 /* divweuo */, PPC::DIVWEUO, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
6530 | | { 3668 /* divweuo */, PPC::DIVWEUO_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
6531 | | { 3676 /* divwo */, PPC::DIVWO, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
6532 | | { 3676 /* divwo */, PPC::DIVWO_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
6533 | | { 3682 /* divwu */, PPC::DIVWU, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
6534 | | { 3682 /* divwu */, PPC::DIVWU_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
6535 | | { 3688 /* divwuo */, PPC::DIVWUO, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
6536 | | { 3688 /* divwuo */, PPC::DIVWUO_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
6537 | | { 3695 /* dmmr */, PPC::DMMR, Convert__RegDMRRC1_0__RegDMRRC1_1, AMFBS_None, { MCK_RegDMRRC, MCK_RegDMRRC }, }, |
6538 | | { 3700 /* dmsetdmrz */, PPC::DMSETDMRZ, Convert__RegDMRRC1_0, AMFBS_None, { MCK_RegDMRRC }, }, |
6539 | | { 3710 /* dmul */, PPC::DMUL, Convert__RegF8RC1_0__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
6540 | | { 3710 /* dmul */, PPC::DMUL_rec, Convert__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
6541 | | { 3715 /* dmulq */, PPC::DMULQ, Convert__RegFpRC1_0__RegFpRC1_1__RegFpRC1_2, AMFBS_None, { MCK_RegFpRC, MCK_RegFpRC, MCK_RegFpRC }, }, |
6542 | | { 3715 /* dmulq */, PPC::DMULQ_rec, Convert__RegFpRC1_1__RegFpRC1_2__RegFpRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegFpRC, MCK_RegFpRC, MCK_RegFpRC }, }, |
6543 | | { 3721 /* dmxor */, PPC::DMXOR, Convert__RegDMRRC1_0__Tie0_1_1__RegDMRRC1_1, AMFBS_None, { MCK_RegDMRRC, MCK_RegDMRRC }, }, |
6544 | | { 3727 /* dmxxextfdmr256 */, PPC::DMXXEXTFDMR256, Convert__RegVSRpRC1_1__RegDMRROWpRC1_0__U2Imm1_2, AMFBS_None, { MCK_RegDMRROWpRC, MCK_RegVSRpRC, MCK_U2Imm }, }, |
6545 | | { 3742 /* dmxxextfdmr512 */, PPC::DMXXEXTFDMR512, Convert__RegVSRpRC1_1__RegVSRpRC1_2__RegACCRC1_0, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRpRC, MCK_RegVSRpRC, MCK_0 }, }, |
6546 | | { 3742 /* dmxxextfdmr512 */, PPC::DMXXEXTFDMR512_HI, Convert__RegVSRpRC1_1__RegVSRpRC1_2__RegACCRC1_0, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRpRC, MCK_RegVSRpRC, MCK_1 }, }, |
6547 | | { 3757 /* dmxxinstfdmr256 */, PPC::DMXXINSTFDMR256, Convert__RegDMRROWpRC1_0__RegVSRpRC1_1__U2Imm1_2, AMFBS_None, { MCK_RegDMRROWpRC, MCK_RegVSRpRC, MCK_U2Imm }, }, |
6548 | | { 3773 /* dmxxinstfdmr512 */, PPC::DMXXINSTFDMR512, Convert__RegACCRC1_0__RegVSRpRC1_1__RegVSRpRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRpRC, MCK_RegVSRpRC, MCK_0 }, }, |
6549 | | { 3773 /* dmxxinstfdmr512 */, PPC::DMXXINSTFDMR512_HI, Convert__RegACCRC1_0__RegVSRpRC1_1__RegVSRpRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRpRC, MCK_RegVSRpRC, MCK_1 }, }, |
6550 | | { 3789 /* dqua */, PPC::DQUA, Convert__RegF8RC1_0__RegF8RC1_1__RegF8RC1_2__U2Imm1_3, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC, MCK_U2Imm }, }, |
6551 | | { 3789 /* dqua */, PPC::DQUA_rec, Convert__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3__U2Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC, MCK_U2Imm }, }, |
6552 | | { 3794 /* dquai */, PPC::DQUAI, Convert__RegF8RC1_1__S5Imm1_0__RegF8RC1_2__U2Imm1_3, AMFBS_None, { MCK_S5Imm, MCK_RegF8RC, MCK_RegF8RC, MCK_U2Imm }, }, |
6553 | | { 3794 /* dquai */, PPC::DQUAI_rec, Convert__RegF8RC1_2__S5Imm1_1__RegF8RC1_3__U2Imm1_4, AMFBS_None, { MCK__DOT_, MCK_S5Imm, MCK_RegF8RC, MCK_RegF8RC, MCK_U2Imm }, }, |
6554 | | { 3800 /* dquaiq */, PPC::DQUAIQ, Convert__RegFpRC1_1__S5Imm1_0__RegFpRC1_2__U2Imm1_3, AMFBS_None, { MCK_S5Imm, MCK_RegFpRC, MCK_RegFpRC, MCK_U2Imm }, }, |
6555 | | { 3800 /* dquaiq */, PPC::DQUAIQ_rec, Convert__RegFpRC1_2__S5Imm1_1__RegFpRC1_3__U2Imm1_4, AMFBS_None, { MCK__DOT_, MCK_S5Imm, MCK_RegFpRC, MCK_RegFpRC, MCK_U2Imm }, }, |
6556 | | { 3807 /* dquaq */, PPC::DQUAQ, Convert__RegFpRC1_0__RegFpRC1_1__RegFpRC1_2__U2Imm1_3, AMFBS_None, { MCK_RegFpRC, MCK_RegFpRC, MCK_RegFpRC, MCK_U2Imm }, }, |
6557 | | { 3807 /* dquaq */, PPC::DQUAQ_rec, Convert__RegFpRC1_1__RegFpRC1_2__RegFpRC1_3__U2Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegFpRC, MCK_RegFpRC, MCK_RegFpRC, MCK_U2Imm }, }, |
6558 | | { 3813 /* drdpq */, PPC::DRDPQ, Convert__RegFpRC1_0__RegFpRC1_1, AMFBS_None, { MCK_RegFpRC, MCK_RegFpRC }, }, |
6559 | | { 3813 /* drdpq */, PPC::DRDPQ_rec, Convert__RegFpRC1_1__RegFpRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegFpRC, MCK_RegFpRC }, }, |
6560 | | { 3819 /* drintn */, PPC::DRINTN, Convert__RegF8RC1_1__U1Imm1_0__RegF8RC1_2__U2Imm1_3, AMFBS_None, { MCK_U1Imm, MCK_RegF8RC, MCK_RegF8RC, MCK_U2Imm }, }, |
6561 | | { 3819 /* drintn */, PPC::DRINTN_rec, Convert__RegF8RC1_2__U1Imm1_1__RegF8RC1_3__U2Imm1_4, AMFBS_None, { MCK__DOT_, MCK_U1Imm, MCK_RegF8RC, MCK_RegF8RC, MCK_U2Imm }, }, |
6562 | | { 3826 /* drintnq */, PPC::DRINTNQ, Convert__RegFpRC1_1__U1Imm1_0__RegFpRC1_2__U2Imm1_3, AMFBS_None, { MCK_U1Imm, MCK_RegFpRC, MCK_RegFpRC, MCK_U2Imm }, }, |
6563 | | { 3826 /* drintnq */, PPC::DRINTNQ_rec, Convert__RegFpRC1_2__U1Imm1_1__RegFpRC1_3__U2Imm1_4, AMFBS_None, { MCK__DOT_, MCK_U1Imm, MCK_RegFpRC, MCK_RegFpRC, MCK_U2Imm }, }, |
6564 | | { 3834 /* drintx */, PPC::DRINTX, Convert__RegF8RC1_1__U1Imm1_0__RegF8RC1_2__U2Imm1_3, AMFBS_None, { MCK_U1Imm, MCK_RegF8RC, MCK_RegF8RC, MCK_U2Imm }, }, |
6565 | | { 3834 /* drintx */, PPC::DRINTX_rec, Convert__RegF8RC1_2__U1Imm1_1__RegF8RC1_3__U2Imm1_4, AMFBS_None, { MCK__DOT_, MCK_U1Imm, MCK_RegF8RC, MCK_RegF8RC, MCK_U2Imm }, }, |
6566 | | { 3841 /* drintxq */, PPC::DRINTXQ, Convert__RegFpRC1_1__U1Imm1_0__RegFpRC1_2__U2Imm1_3, AMFBS_None, { MCK_U1Imm, MCK_RegFpRC, MCK_RegFpRC, MCK_U2Imm }, }, |
6567 | | { 3841 /* drintxq */, PPC::DRINTXQ_rec, Convert__RegFpRC1_2__U1Imm1_1__RegFpRC1_3__U2Imm1_4, AMFBS_None, { MCK__DOT_, MCK_U1Imm, MCK_RegFpRC, MCK_RegFpRC, MCK_U2Imm }, }, |
6568 | | { 3849 /* drrnd */, PPC::DRRND, Convert__RegF8RC1_0__RegF8RC1_1__RegF8RC1_2__U2Imm1_3, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC, MCK_U2Imm }, }, |
6569 | | { 3849 /* drrnd */, PPC::DRRND_rec, Convert__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3__U2Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC, MCK_U2Imm }, }, |
6570 | | { 3855 /* drrndq */, PPC::DRRNDQ, Convert__RegFpRC1_0__RegF8RC1_1__RegFpRC1_2__U2Imm1_3, AMFBS_None, { MCK_RegFpRC, MCK_RegF8RC, MCK_RegFpRC, MCK_U2Imm }, }, |
6571 | | { 3855 /* drrndq */, PPC::DRRNDQ_rec, Convert__RegFpRC1_1__RegF8RC1_2__RegFpRC1_3__U2Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegFpRC, MCK_RegF8RC, MCK_RegFpRC, MCK_U2Imm }, }, |
6572 | | { 3862 /* drsp */, PPC::DRSP, Convert__RegF8RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC }, }, |
6573 | | { 3862 /* drsp */, PPC::DRSP_rec, Convert__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC }, }, |
6574 | | { 3867 /* dscli */, PPC::DSCLI, Convert__RegF8RC1_0__RegF8RC1_1__U6Imm1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC, MCK_U6Imm }, }, |
6575 | | { 3867 /* dscli */, PPC::DSCLI_rec, Convert__RegF8RC1_1__RegF8RC1_2__U6Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC, MCK_U6Imm }, }, |
6576 | | { 3873 /* dscliq */, PPC::DSCLIQ, Convert__RegFpRC1_0__RegFpRC1_1__U6Imm1_2, AMFBS_None, { MCK_RegFpRC, MCK_RegFpRC, MCK_U6Imm }, }, |
6577 | | { 3873 /* dscliq */, PPC::DSCLIQ_rec, Convert__RegFpRC1_1__RegFpRC1_2__U6Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegFpRC, MCK_RegFpRC, MCK_U6Imm }, }, |
6578 | | { 3880 /* dscri */, PPC::DSCRI, Convert__RegF8RC1_0__RegF8RC1_1__U6Imm1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC, MCK_U6Imm }, }, |
6579 | | { 3880 /* dscri */, PPC::DSCRI_rec, Convert__RegF8RC1_1__RegF8RC1_2__U6Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC, MCK_U6Imm }, }, |
6580 | | { 3886 /* dscriq */, PPC::DSCRIQ, Convert__RegFpRC1_0__RegFpRC1_1__U6Imm1_2, AMFBS_None, { MCK_RegFpRC, MCK_RegFpRC, MCK_U6Imm }, }, |
6581 | | { 3886 /* dscriq */, PPC::DSCRIQ_rec, Convert__RegFpRC1_1__RegFpRC1_2__U6Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegFpRC, MCK_RegFpRC, MCK_U6Imm }, }, |
6582 | | { 3893 /* dss */, PPC::DSS, Convert__U5Imm1_0, AMFBS_None, { MCK_U5Imm }, }, |
6583 | | { 3897 /* dssall */, PPC::DSSALL, Convert_NoOperands, AMFBS_None, { }, }, |
6584 | | { 3904 /* dst */, PPC::DST, Convert__U5Imm1_2__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm }, }, |
6585 | | { 3908 /* dstst */, PPC::DSTST, Convert__U5Imm1_2__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm }, }, |
6586 | | { 3914 /* dststt */, PPC::DSTSTT, Convert__U5Imm1_2__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm }, }, |
6587 | | { 3921 /* dstt */, PPC::DSTT, Convert__U5Imm1_2__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm }, }, |
6588 | | { 3926 /* dsub */, PPC::DSUB, Convert__RegF8RC1_0__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
6589 | | { 3926 /* dsub */, PPC::DSUB_rec, Convert__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
6590 | | { 3931 /* dsubq */, PPC::DSUBQ, Convert__RegFpRC1_0__RegFpRC1_1__RegFpRC1_2, AMFBS_None, { MCK_RegFpRC, MCK_RegFpRC, MCK_RegFpRC }, }, |
6591 | | { 3931 /* dsubq */, PPC::DSUBQ_rec, Convert__RegFpRC1_1__RegFpRC1_2__RegFpRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegFpRC, MCK_RegFpRC, MCK_RegFpRC }, }, |
6592 | | { 3937 /* dtstdc */, PPC::DTSTDC, Convert__RegCRRC1_0__RegF8RC1_1__U6Imm1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegF8RC, MCK_U6Imm }, }, |
6593 | | { 3944 /* dtstdcq */, PPC::DTSTDCQ, Convert__RegCRRC1_0__RegFpRC1_1__U6Imm1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegFpRC, MCK_U6Imm }, }, |
6594 | | { 3952 /* dtstdg */, PPC::DTSTDG, Convert__RegCRRC1_0__RegF8RC1_1__U6Imm1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegF8RC, MCK_U6Imm }, }, |
6595 | | { 3959 /* dtstdgq */, PPC::DTSTDGQ, Convert__RegCRRC1_0__RegFpRC1_1__U6Imm1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegFpRC, MCK_U6Imm }, }, |
6596 | | { 3967 /* dtstex */, PPC::DTSTEX, Convert__RegCRRC1_0__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegF8RC, MCK_RegF8RC }, }, |
6597 | | { 3974 /* dtstexq */, PPC::DTSTEXQ, Convert__RegCRRC1_0__RegFpRC1_1__RegFpRC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegFpRC, MCK_RegFpRC }, }, |
6598 | | { 3982 /* dtstsf */, PPC::DTSTSF, Convert__RegCRRC1_0__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegF8RC, MCK_RegF8RC }, }, |
6599 | | { 3989 /* dtstsfi */, PPC::DTSTSFI, Convert__RegCRRC1_0__U6Imm1_1__RegF8RC1_2, AMFBS_None, { MCK_RegCRRC, MCK_U6Imm, MCK_RegF8RC }, }, |
6600 | | { 3997 /* dtstsfiq */, PPC::DTSTSFIQ, Convert__RegCRRC1_0__U6Imm1_1__RegFpRC1_2, AMFBS_None, { MCK_RegCRRC, MCK_U6Imm, MCK_RegFpRC }, }, |
6601 | | { 4006 /* dtstsfq */, PPC::DTSTSFQ, Convert__RegCRRC1_0__RegF8RC1_1__RegFpRC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegF8RC, MCK_RegFpRC }, }, |
6602 | | { 4014 /* dxex */, PPC::DXEX, Convert__RegF8RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC }, }, |
6603 | | { 4014 /* dxex */, PPC::DXEX_rec, Convert__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC }, }, |
6604 | | { 4019 /* dxexq */, PPC::DXEXQ, Convert__RegF8RC1_0__RegFpRC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegFpRC }, }, |
6605 | | { 4019 /* dxexq */, PPC::DXEXQ_rec, Convert__RegF8RC1_1__RegFpRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegFpRC }, }, |
6606 | | { 4025 /* efdabs */, PPC::EFDABS, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
6607 | | { 4032 /* efdadd */, PPC::EFDADD, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6608 | | { 4039 /* efdcfs */, PPC::EFDCFS, Convert__RegSPERC1_0__RegSPE4RC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPE4RC }, }, |
6609 | | { 4046 /* efdcfsf */, PPC::EFDCFSF, Convert__RegSPERC1_0__RegSPE4RC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPE4RC }, }, |
6610 | | { 4054 /* efdcfsi */, PPC::EFDCFSI, Convert__RegSPERC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegGPRC }, }, |
6611 | | { 4062 /* efdcfsid */, PPC::EFDCFSID, Convert__RegSPERC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegGPRC }, }, |
6612 | | { 4071 /* efdcfuf */, PPC::EFDCFUF, Convert__RegSPERC1_0__RegSPE4RC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPE4RC }, }, |
6613 | | { 4079 /* efdcfui */, PPC::EFDCFUI, Convert__RegSPERC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegGPRC }, }, |
6614 | | { 4087 /* efdcfuid */, PPC::EFDCFUID, Convert__RegSPERC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegGPRC }, }, |
6615 | | { 4096 /* efdcmpeq */, PPC::EFDCMPEQ, Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6616 | | { 4105 /* efdcmpgt */, PPC::EFDCMPGT, Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6617 | | { 4114 /* efdcmplt */, PPC::EFDCMPLT, Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6618 | | { 4123 /* efdctsf */, PPC::EFDCTSF, Convert__RegSPERC1_0__RegSPE4RC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPE4RC }, }, |
6619 | | { 4131 /* efdctsi */, PPC::EFDCTSI, Convert__RegGPRC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegSPERC }, }, |
6620 | | { 4139 /* efdctsidz */, PPC::EFDCTSIDZ, Convert__RegGPRC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegSPERC }, }, |
6621 | | { 4149 /* efdctsiz */, PPC::EFDCTSIZ, Convert__RegGPRC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegSPERC }, }, |
6622 | | { 4158 /* efdctuf */, PPC::EFDCTUF, Convert__RegSPERC1_0__RegSPE4RC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPE4RC }, }, |
6623 | | { 4166 /* efdctui */, PPC::EFDCTUI, Convert__RegGPRC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegSPERC }, }, |
6624 | | { 4174 /* efdctuidz */, PPC::EFDCTUIDZ, Convert__RegGPRC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegSPERC }, }, |
6625 | | { 4184 /* efdctuiz */, PPC::EFDCTUIZ, Convert__RegGPRC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegSPERC }, }, |
6626 | | { 4193 /* efddiv */, PPC::EFDDIV, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6627 | | { 4200 /* efdmul */, PPC::EFDMUL, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6628 | | { 4207 /* efdnabs */, PPC::EFDNABS, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
6629 | | { 4215 /* efdneg */, PPC::EFDNEG, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
6630 | | { 4222 /* efdsub */, PPC::EFDSUB, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6631 | | { 4229 /* efdtsteq */, PPC::EFDTSTEQ, Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6632 | | { 4238 /* efdtstgt */, PPC::EFDTSTGT, Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6633 | | { 4247 /* efdtstlt */, PPC::EFDTSTLT, Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6634 | | { 4256 /* efsabs */, PPC::EFSABS, Convert__RegSPE4RC1_0__RegSPE4RC1_1, AMFBS_None, { MCK_RegSPE4RC, MCK_RegSPE4RC }, }, |
6635 | | { 4263 /* efsadd */, PPC::EFSADD, Convert__RegSPE4RC1_0__RegSPE4RC1_1__RegSPE4RC1_2, AMFBS_None, { MCK_RegSPE4RC, MCK_RegSPE4RC, MCK_RegSPE4RC }, }, |
6636 | | { 4270 /* efscfd */, PPC::EFSCFD, Convert__RegSPE4RC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPE4RC, MCK_RegSPERC }, }, |
6637 | | { 4277 /* efscfsf */, PPC::EFSCFSF, Convert__RegSPE4RC1_0__RegSPE4RC1_1, AMFBS_None, { MCK_RegSPE4RC, MCK_RegSPE4RC }, }, |
6638 | | { 4285 /* efscfsi */, PPC::EFSCFSI, Convert__RegSPE4RC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegSPE4RC, MCK_RegGPRC }, }, |
6639 | | { 4293 /* efscfuf */, PPC::EFSCFUF, Convert__RegSPE4RC1_0__RegSPE4RC1_1, AMFBS_None, { MCK_RegSPE4RC, MCK_RegSPE4RC }, }, |
6640 | | { 4301 /* efscfui */, PPC::EFSCFUI, Convert__RegSPE4RC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegSPE4RC, MCK_RegGPRC }, }, |
6641 | | { 4309 /* efscmpeq */, PPC::EFSCMPEQ, Convert__RegCRRC1_0__RegSPE4RC1_1__RegSPE4RC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPE4RC, MCK_RegSPE4RC }, }, |
6642 | | { 4318 /* efscmpgt */, PPC::EFSCMPGT, Convert__RegCRRC1_0__RegSPE4RC1_1__RegSPE4RC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPE4RC, MCK_RegSPE4RC }, }, |
6643 | | { 4327 /* efscmplt */, PPC::EFSCMPLT, Convert__RegCRRC1_0__RegSPE4RC1_1__RegSPE4RC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPE4RC, MCK_RegSPE4RC }, }, |
6644 | | { 4336 /* efsctsf */, PPC::EFSCTSF, Convert__RegSPE4RC1_0__RegSPE4RC1_1, AMFBS_None, { MCK_RegSPE4RC, MCK_RegSPE4RC }, }, |
6645 | | { 4344 /* efsctsi */, PPC::EFSCTSI, Convert__RegGPRC1_0__RegSPE4RC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegSPE4RC }, }, |
6646 | | { 4352 /* efsctsiz */, PPC::EFSCTSIZ, Convert__RegGPRC1_0__RegSPE4RC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegSPE4RC }, }, |
6647 | | { 4361 /* efsctuf */, PPC::EFSCTUF, Convert__RegSPERC1_0__RegSPE4RC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPE4RC }, }, |
6648 | | { 4369 /* efsctui */, PPC::EFSCTUI, Convert__RegGPRC1_0__RegSPE4RC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegSPE4RC }, }, |
6649 | | { 4377 /* efsctuiz */, PPC::EFSCTUIZ, Convert__RegGPRC1_0__RegSPE4RC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegSPE4RC }, }, |
6650 | | { 4386 /* efsdiv */, PPC::EFSDIV, Convert__RegSPE4RC1_0__RegSPE4RC1_1__RegSPE4RC1_2, AMFBS_None, { MCK_RegSPE4RC, MCK_RegSPE4RC, MCK_RegSPE4RC }, }, |
6651 | | { 4393 /* efsmul */, PPC::EFSMUL, Convert__RegSPE4RC1_0__RegSPE4RC1_1__RegSPE4RC1_2, AMFBS_None, { MCK_RegSPE4RC, MCK_RegSPE4RC, MCK_RegSPE4RC }, }, |
6652 | | { 4400 /* efsnabs */, PPC::EFSNABS, Convert__RegSPE4RC1_0__RegSPE4RC1_1, AMFBS_None, { MCK_RegSPE4RC, MCK_RegSPE4RC }, }, |
6653 | | { 4408 /* efsneg */, PPC::EFSNEG, Convert__RegSPE4RC1_0__RegSPE4RC1_1, AMFBS_None, { MCK_RegSPE4RC, MCK_RegSPE4RC }, }, |
6654 | | { 4415 /* efssub */, PPC::EFSSUB, Convert__RegSPE4RC1_0__RegSPE4RC1_1__RegSPE4RC1_2, AMFBS_None, { MCK_RegSPE4RC, MCK_RegSPE4RC, MCK_RegSPE4RC }, }, |
6655 | | { 4422 /* efststeq */, PPC::EFSTSTEQ, Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6656 | | { 4431 /* efststgt */, PPC::EFSTSTGT, Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6657 | | { 4440 /* efststlt */, PPC::EFSTSTLT, Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6658 | | { 4449 /* eieio */, PPC::EnforceIEIO, Convert_NoOperands, AMFBS_None, { }, }, |
6659 | | { 4455 /* eqv */, PPC::EQV, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
6660 | | { 4455 /* eqv */, PPC::EQV_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
6661 | | { 4459 /* evabs */, PPC::EVABS, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
6662 | | { 4465 /* evaddiw */, PPC::EVADDIW, Convert__RegSPERC1_0__RegSPERC1_2__U5Imm1_1, AMFBS_None, { MCK_RegSPERC, MCK_U5Imm, MCK_RegSPERC }, }, |
6663 | | { 4473 /* evaddsmiaaw */, PPC::EVADDSMIAAW, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
6664 | | { 4485 /* evaddssiaaw */, PPC::EVADDSSIAAW, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
6665 | | { 4497 /* evaddumiaaw */, PPC::EVADDUMIAAW, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
6666 | | { 4509 /* evaddusiaaw */, PPC::EVADDUSIAAW, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
6667 | | { 4521 /* evaddw */, PPC::EVADDW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6668 | | { 4528 /* evand */, PPC::EVAND, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6669 | | { 4534 /* evandc */, PPC::EVANDC, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6670 | | { 4541 /* evcmpeq */, PPC::EVCMPEQ, Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6671 | | { 4549 /* evcmpgts */, PPC::EVCMPGTS, Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6672 | | { 4558 /* evcmpgtu */, PPC::EVCMPGTU, Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6673 | | { 4567 /* evcmplts */, PPC::EVCMPLTS, Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6674 | | { 4576 /* evcmpltu */, PPC::EVCMPLTU, Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6675 | | { 4585 /* evcntlsw */, PPC::EVCNTLSW, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
6676 | | { 4594 /* evcntlzw */, PPC::EVCNTLZW, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
6677 | | { 4603 /* evdivws */, PPC::EVDIVWS, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6678 | | { 4611 /* evdivwu */, PPC::EVDIVWU, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6679 | | { 4619 /* eveqv */, PPC::EVEQV, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6680 | | { 4625 /* evextsb */, PPC::EVEXTSB, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
6681 | | { 4633 /* evextsh */, PPC::EVEXTSH, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
6682 | | { 4641 /* evfsabs */, PPC::EVFSABS, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
6683 | | { 4649 /* evfsadd */, PPC::EVFSADD, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6684 | | { 4657 /* evfscfsf */, PPC::EVFSCFSF, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
6685 | | { 4666 /* evfscfsi */, PPC::EVFSCFSI, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
6686 | | { 4675 /* evfscfuf */, PPC::EVFSCFUF, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
6687 | | { 4684 /* evfscfui */, PPC::EVFSCFUI, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
6688 | | { 4693 /* evfscmpeq */, PPC::EVFSCMPEQ, Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6689 | | { 4703 /* evfscmpgt */, PPC::EVFSCMPGT, Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6690 | | { 4713 /* evfscmplt */, PPC::EVFSCMPLT, Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6691 | | { 4723 /* evfsctsf */, PPC::EVFSCTSF, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
6692 | | { 4723 /* evfsctsf */, PPC::EVFSCTUF, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
6693 | | { 4732 /* evfsctsi */, PPC::EVFSCTSI, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
6694 | | { 4741 /* evfsctsiz */, PPC::EVFSCTSIZ, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
6695 | | { 4741 /* evfsctsiz */, PPC::EVFSCTUIZ, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
6696 | | { 4751 /* evfsctui */, PPC::EVFSCTUI, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
6697 | | { 4760 /* evfsdiv */, PPC::EVFSDIV, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6698 | | { 4768 /* evfsmul */, PPC::EVFSMUL, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6699 | | { 4776 /* evfsnabs */, PPC::EVFSNABS, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
6700 | | { 4785 /* evfsneg */, PPC::EVFSNEG, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
6701 | | { 4793 /* evfssub */, PPC::EVFSSUB, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6702 | | { 4801 /* evfststeq */, PPC::EVFSTSTEQ, Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6703 | | { 4811 /* evfststgt */, PPC::EVFSTSTGT, Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6704 | | { 4821 /* evfststlt */, PPC::EVFSTSTLT, Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6705 | | { 4831 /* evldd */, PPC::EVLDD, Convert__RegSPERC1_0__DispSPE81_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegSPERC, MCK_DispSPE8, MCK_RegGxRCNoR0 }, }, |
6706 | | { 4837 /* evlddx */, PPC::EVLDDX, Convert__RegSPERC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6707 | | { 4844 /* evldh */, PPC::EVLDH, Convert__RegSPERC1_0__DispSPE81_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegSPERC, MCK_DispSPE8, MCK_RegGxRCNoR0 }, }, |
6708 | | { 4850 /* evldhx */, PPC::EVLDHX, Convert__RegSPERC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6709 | | { 4857 /* evldw */, PPC::EVLDW, Convert__RegSPERC1_0__DispSPE81_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegSPERC, MCK_DispSPE8, MCK_RegGxRCNoR0 }, }, |
6710 | | { 4863 /* evldwx */, PPC::EVLDWX, Convert__RegSPERC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6711 | | { 4870 /* evlhhesplat */, PPC::EVLHHESPLAT, Convert__RegSPERC1_0__DispSPE21_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegSPERC, MCK_DispSPE2, MCK_RegGxRCNoR0 }, }, |
6712 | | { 4882 /* evlhhesplatx */, PPC::EVLHHESPLATX, Convert__RegSPERC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6713 | | { 4895 /* evlhhossplat */, PPC::EVLHHOSSPLAT, Convert__RegSPERC1_0__DispSPE21_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegSPERC, MCK_DispSPE2, MCK_RegGxRCNoR0 }, }, |
6714 | | { 4908 /* evlhhossplatx */, PPC::EVLHHOSSPLATX, Convert__RegSPERC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6715 | | { 4922 /* evlhhousplat */, PPC::EVLHHOUSPLAT, Convert__RegSPERC1_0__DispSPE21_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegSPERC, MCK_DispSPE2, MCK_RegGxRCNoR0 }, }, |
6716 | | { 4935 /* evlhhousplatx */, PPC::EVLHHOUSPLATX, Convert__RegSPERC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6717 | | { 4949 /* evlwhe */, PPC::EVLWHE, Convert__RegSPERC1_0__DispSPE41_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegSPERC, MCK_DispSPE4, MCK_RegGxRCNoR0 }, }, |
6718 | | { 4956 /* evlwhex */, PPC::EVLWHEX, Convert__RegSPERC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6719 | | { 4964 /* evlwhos */, PPC::EVLWHOS, Convert__RegSPERC1_0__DispSPE41_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegSPERC, MCK_DispSPE4, MCK_RegGxRCNoR0 }, }, |
6720 | | { 4972 /* evlwhosx */, PPC::EVLWHOSX, Convert__RegSPERC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6721 | | { 4981 /* evlwhou */, PPC::EVLWHOU, Convert__RegSPERC1_0__DispSPE41_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegSPERC, MCK_DispSPE4, MCK_RegGxRCNoR0 }, }, |
6722 | | { 4989 /* evlwhoux */, PPC::EVLWHOUX, Convert__RegSPERC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6723 | | { 4998 /* evlwhsplat */, PPC::EVLWHSPLAT, Convert__RegSPERC1_0__DispSPE41_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegSPERC, MCK_DispSPE4, MCK_RegGxRCNoR0 }, }, |
6724 | | { 5009 /* evlwhsplatx */, PPC::EVLWHSPLATX, Convert__RegSPERC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6725 | | { 5021 /* evlwwsplat */, PPC::EVLWWSPLAT, Convert__RegSPERC1_0__DispSPE41_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegSPERC, MCK_DispSPE4, MCK_RegGxRCNoR0 }, }, |
6726 | | { 5032 /* evlwwsplatx */, PPC::EVLWWSPLATX, Convert__RegSPERC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6727 | | { 5044 /* evmergehi */, PPC::EVMERGEHI, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6728 | | { 5054 /* evmergehilo */, PPC::EVMERGEHILO, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6729 | | { 5066 /* evmergelo */, PPC::EVMERGELO, Convert__RegSPERC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegGPRC, MCK_RegGPRC }, }, |
6730 | | { 5076 /* evmergelohi */, PPC::EVMERGELOHI, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6731 | | { 5088 /* evmhegsmfaa */, PPC::EVMHEGSMFAA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6732 | | { 5100 /* evmhegsmfan */, PPC::EVMHEGSMFAN, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6733 | | { 5112 /* evmhegsmiaa */, PPC::EVMHEGSMIAA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6734 | | { 5124 /* evmhegsmian */, PPC::EVMHEGSMIAN, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6735 | | { 5136 /* evmhegumiaa */, PPC::EVMHEGUMIAA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6736 | | { 5148 /* evmhegumian */, PPC::EVMHEGUMIAN, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6737 | | { 5160 /* evmhesmf */, PPC::EVMHESMF, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6738 | | { 5169 /* evmhesmfa */, PPC::EVMHESMFA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6739 | | { 5179 /* evmhesmfaaw */, PPC::EVMHESMFAAW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6740 | | { 5191 /* evmhesmfanw */, PPC::EVMHESMFANW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6741 | | { 5203 /* evmhesmi */, PPC::EVMHESMI, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6742 | | { 5212 /* evmhesmia */, PPC::EVMHESMIA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6743 | | { 5222 /* evmhesmiaaw */, PPC::EVMHESMIAAW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6744 | | { 5234 /* evmhesmianw */, PPC::EVMHESMIANW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6745 | | { 5246 /* evmhessf */, PPC::EVMHESSF, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6746 | | { 5255 /* evmhessfa */, PPC::EVMHESSFA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6747 | | { 5265 /* evmhessfaaw */, PPC::EVMHESSFAAW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6748 | | { 5277 /* evmhessfanw */, PPC::EVMHESSFANW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6749 | | { 5289 /* evmhessiaaw */, PPC::EVMHESSIAAW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6750 | | { 5301 /* evmhessianw */, PPC::EVMHESSIANW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6751 | | { 5313 /* evmheumi */, PPC::EVMHEUMI, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6752 | | { 5322 /* evmheumia */, PPC::EVMHEUMIA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6753 | | { 5332 /* evmheumiaaw */, PPC::EVMHEUMIAAW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6754 | | { 5344 /* evmheumianw */, PPC::EVMHEUMIANW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6755 | | { 5356 /* evmheusiaaw */, PPC::EVMHEUSIAAW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6756 | | { 5368 /* evmheusianw */, PPC::EVMHEUSIANW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6757 | | { 5380 /* evmhogsmfaa */, PPC::EVMHOGSMFAA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6758 | | { 5392 /* evmhogsmfan */, PPC::EVMHOGSMFAN, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6759 | | { 5404 /* evmhogsmiaa */, PPC::EVMHOGSMIAA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6760 | | { 5416 /* evmhogsmian */, PPC::EVMHOGSMIAN, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6761 | | { 5428 /* evmhogumiaa */, PPC::EVMHOGUMIAA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6762 | | { 5440 /* evmhogumian */, PPC::EVMHOGUMIAN, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6763 | | { 5452 /* evmhosmf */, PPC::EVMHOSMF, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6764 | | { 5461 /* evmhosmfa */, PPC::EVMHOSMFA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6765 | | { 5471 /* evmhosmfaaw */, PPC::EVMHOSMFAAW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6766 | | { 5483 /* evmhosmfanw */, PPC::EVMHOSMFANW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6767 | | { 5495 /* evmhosmi */, PPC::EVMHOSMI, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6768 | | { 5504 /* evmhosmia */, PPC::EVMHOSMIA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6769 | | { 5514 /* evmhosmiaaw */, PPC::EVMHOSMIAAW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6770 | | { 5526 /* evmhosmianw */, PPC::EVMHOSMIANW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6771 | | { 5538 /* evmhossf */, PPC::EVMHOSSF, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6772 | | { 5547 /* evmhossfa */, PPC::EVMHOSSFA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6773 | | { 5557 /* evmhossfaaw */, PPC::EVMHOSSFAAW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6774 | | { 5569 /* evmhossfanw */, PPC::EVMHOSSFANW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6775 | | { 5581 /* evmhossiaaw */, PPC::EVMHOSSIAAW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6776 | | { 5593 /* evmhossianw */, PPC::EVMHOSSIANW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6777 | | { 5605 /* evmhoumi */, PPC::EVMHOUMI, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6778 | | { 5614 /* evmhoumia */, PPC::EVMHOUMIA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6779 | | { 5624 /* evmhoumiaaw */, PPC::EVMHOUMIAAW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6780 | | { 5636 /* evmhoumianw */, PPC::EVMHOUMIANW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6781 | | { 5648 /* evmhousiaaw */, PPC::EVMHOUSIAAW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6782 | | { 5660 /* evmhousianw */, PPC::EVMHOUSIANW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6783 | | { 5672 /* evmra */, PPC::EVMRA, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
6784 | | { 5678 /* evmwhsmf */, PPC::EVMWHSMF, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6785 | | { 5687 /* evmwhsmfa */, PPC::EVMWHSMFA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6786 | | { 5697 /* evmwhsmi */, PPC::EVMWHSMI, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6787 | | { 5706 /* evmwhsmia */, PPC::EVMWHSMIA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6788 | | { 5716 /* evmwhssf */, PPC::EVMWHSSF, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6789 | | { 5725 /* evmwhssfa */, PPC::EVMWHSSFA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6790 | | { 5735 /* evmwhumi */, PPC::EVMWHUMI, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6791 | | { 5744 /* evmwhumia */, PPC::EVMWHUMIA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6792 | | { 5754 /* evmwlsmiaaw */, PPC::EVMWLSMIAAW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6793 | | { 5766 /* evmwlsmianw */, PPC::EVMWLSMIANW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6794 | | { 5778 /* evmwlssiaaw */, PPC::EVMWLSSIAAW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6795 | | { 5790 /* evmwlssianw */, PPC::EVMWLSSIANW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6796 | | { 5802 /* evmwlumi */, PPC::EVMWLUMI, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6797 | | { 5811 /* evmwlumia */, PPC::EVMWLUMIA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6798 | | { 5821 /* evmwlumiaaw */, PPC::EVMWLUMIAAW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6799 | | { 5833 /* evmwlumianw */, PPC::EVMWLUMIANW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6800 | | { 5845 /* evmwlusiaaw */, PPC::EVMWLUSIAAW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6801 | | { 5857 /* evmwlusianw */, PPC::EVMWLUSIANW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6802 | | { 5869 /* evmwsmf */, PPC::EVMWSMF, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6803 | | { 5877 /* evmwsmfa */, PPC::EVMWSMFA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6804 | | { 5886 /* evmwsmfaa */, PPC::EVMWSMFAA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6805 | | { 5896 /* evmwsmfan */, PPC::EVMWSMFAN, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6806 | | { 5906 /* evmwsmi */, PPC::EVMWSMI, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6807 | | { 5914 /* evmwsmia */, PPC::EVMWSMIA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6808 | | { 5923 /* evmwsmiaa */, PPC::EVMWSMIAA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6809 | | { 5933 /* evmwsmian */, PPC::EVMWSMIAN, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6810 | | { 5943 /* evmwssf */, PPC::EVMWSSF, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6811 | | { 5951 /* evmwssfa */, PPC::EVMWSSFA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6812 | | { 5960 /* evmwssfaa */, PPC::EVMWSSFAA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6813 | | { 5970 /* evmwssfan */, PPC::EVMWSSFAN, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6814 | | { 5980 /* evmwumi */, PPC::EVMWUMI, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6815 | | { 5988 /* evmwumia */, PPC::EVMWUMIA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6816 | | { 5997 /* evmwumiaa */, PPC::EVMWUMIAA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6817 | | { 6007 /* evmwumian */, PPC::EVMWUMIAN, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6818 | | { 6017 /* evnand */, PPC::EVNAND, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6819 | | { 6024 /* evneg */, PPC::EVNEG, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
6820 | | { 6030 /* evnor */, PPC::EVNOR, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6821 | | { 6036 /* evor */, PPC::EVOR, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6822 | | { 6041 /* evorc */, PPC::EVORC, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6823 | | { 6047 /* evrlw */, PPC::EVRLW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6824 | | { 6053 /* evrlwi */, PPC::EVRLWI, Convert__RegSPERC1_0__RegSPERC1_1__U5Imm1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_U5Imm }, }, |
6825 | | { 6060 /* evrndw */, PPC::EVRNDW, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
6826 | | { 6067 /* evsel */, PPC::EVSEL, Convert__RegSPERC1_1__RegSPERC1_2__RegSPERC1_3__imm_95_0, AMFBS_None, { MCK_crD, MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6827 | | { 6073 /* evslw */, PPC::EVSLW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6828 | | { 6079 /* evslwi */, PPC::EVSLWI, Convert__RegSPERC1_0__RegSPERC1_1__U5Imm1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_U5Imm }, }, |
6829 | | { 6086 /* evsplatfi */, PPC::EVSPLATFI, Convert__RegSPERC1_0__S5Imm1_1, AMFBS_None, { MCK_RegSPERC, MCK_S5Imm }, }, |
6830 | | { 6096 /* evsplati */, PPC::EVSPLATI, Convert__RegSPERC1_0__S5Imm1_1, AMFBS_None, { MCK_RegSPERC, MCK_S5Imm }, }, |
6831 | | { 6105 /* evsrwis */, PPC::EVSRWIS, Convert__RegSPERC1_0__RegSPERC1_1__U5Imm1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_U5Imm }, }, |
6832 | | { 6113 /* evsrwiu */, PPC::EVSRWIU, Convert__RegSPERC1_0__RegSPERC1_1__U5Imm1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_U5Imm }, }, |
6833 | | { 6121 /* evsrws */, PPC::EVSRWS, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6834 | | { 6128 /* evsrwu */, PPC::EVSRWU, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6835 | | { 6135 /* evstdd */, PPC::EVSTDD, Convert__RegSPERC1_0__DispSPE81_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegSPERC, MCK_DispSPE8, MCK_RegGxRCNoR0 }, }, |
6836 | | { 6142 /* evstddx */, PPC::EVSTDDX, Convert__RegSPERC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6837 | | { 6150 /* evstdh */, PPC::EVSTDH, Convert__RegSPERC1_0__DispSPE81_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegSPERC, MCK_DispSPE8, MCK_RegGxRCNoR0 }, }, |
6838 | | { 6157 /* evstdhx */, PPC::EVSTDHX, Convert__RegSPERC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6839 | | { 6165 /* evstdw */, PPC::EVSTDW, Convert__RegSPERC1_0__DispSPE81_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegSPERC, MCK_DispSPE8, MCK_RegGxRCNoR0 }, }, |
6840 | | { 6172 /* evstdwx */, PPC::EVSTDWX, Convert__RegSPERC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6841 | | { 6180 /* evstwhe */, PPC::EVSTWHE, Convert__RegSPERC1_0__DispSPE41_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegSPERC, MCK_DispSPE4, MCK_RegGxRCNoR0 }, }, |
6842 | | { 6188 /* evstwhex */, PPC::EVSTWHEX, Convert__RegSPERC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6843 | | { 6197 /* evstwho */, PPC::EVSTWHO, Convert__RegSPERC1_0__DispSPE41_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegSPERC, MCK_DispSPE4, MCK_RegGxRCNoR0 }, }, |
6844 | | { 6205 /* evstwhox */, PPC::EVSTWHOX, Convert__RegSPERC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6845 | | { 6214 /* evstwwe */, PPC::EVSTWWE, Convert__RegSPERC1_0__DispSPE41_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegSPERC, MCK_DispSPE4, MCK_RegGxRCNoR0 }, }, |
6846 | | { 6222 /* evstwwex */, PPC::EVSTWWEX, Convert__RegSPERC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6847 | | { 6231 /* evstwwo */, PPC::EVSTWWO, Convert__RegSPERC1_0__DispSPE41_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegSPERC, MCK_DispSPE4, MCK_RegGxRCNoR0 }, }, |
6848 | | { 6239 /* evstwwox */, PPC::EVSTWWOX, Convert__RegSPERC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6849 | | { 6248 /* evsubfsmiaaw */, PPC::EVSUBFSMIAAW, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
6850 | | { 6261 /* evsubfssiaaw */, PPC::EVSUBFSSIAAW, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
6851 | | { 6274 /* evsubfumiaaw */, PPC::EVSUBFUMIAAW, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
6852 | | { 6287 /* evsubfusiaaw */, PPC::EVSUBFUSIAAW, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
6853 | | { 6300 /* evsubfw */, PPC::EVSUBFW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6854 | | { 6308 /* evsubifw */, PPC::EVSUBIFW, Convert__RegSPERC1_0__U5Imm1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_U5Imm, MCK_RegSPERC }, }, |
6855 | | { 6317 /* evxor */, PPC::EVXOR, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
6856 | | { 6323 /* extldi */, PPC::EXTLDI, Convert__RegG8RC1_0__RegG8RC1_1__U6Imm1_2__U6Imm1_3, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm, MCK_U6Imm }, }, |
6857 | | { 6323 /* extldi */, PPC::EXTLDI_rec, Convert__RegG8RC1_1__RegG8RC1_2__U6Imm1_3__U6Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm, MCK_U6Imm }, }, |
6858 | | { 6330 /* extlwi */, PPC::EXTLWI, Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2__U5Imm1_3, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm, MCK_U5Imm }, }, |
6859 | | { 6330 /* extlwi */, PPC::EXTLWI_rec, Convert__RegGPRC1_1__RegGPRC1_2__U5Imm1_3__U5Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm, MCK_U5Imm }, }, |
6860 | | { 6337 /* extrdi */, PPC::EXTRDI, Convert__RegG8RC1_0__RegG8RC1_1__U6Imm1_2__U6Imm1_3, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm, MCK_U6Imm }, }, |
6861 | | { 6337 /* extrdi */, PPC::EXTRDI_rec, Convert__RegG8RC1_1__RegG8RC1_2__U6Imm1_3__U6Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm, MCK_U6Imm }, }, |
6862 | | { 6344 /* extrwi */, PPC::EXTRWI, Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2__U5Imm1_3, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm, MCK_U5Imm }, }, |
6863 | | { 6344 /* extrwi */, PPC::EXTRWI_rec, Convert__RegGPRC1_1__RegGPRC1_2__U5Imm1_3__U5Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm, MCK_U5Imm }, }, |
6864 | | { 6351 /* extsb */, PPC::EXTSB, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
6865 | | { 6351 /* extsb */, PPC::EXTSB_rec, Convert__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC }, }, |
6866 | | { 6357 /* extsh */, PPC::EXTSH, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
6867 | | { 6357 /* extsh */, PPC::EXTSH_rec, Convert__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC }, }, |
6868 | | { 6363 /* extsw */, PPC::EXTSW, Convert__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
6869 | | { 6363 /* extsw */, PPC::EXTSW_rec, Convert__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC }, }, |
6870 | | { 6369 /* extswsli */, PPC::EXTSWSLI, Convert__RegG8RC1_0__RegG8RC1_1__U6Imm1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm }, }, |
6871 | | { 6369 /* extswsli */, PPC::EXTSWSLI_rec, Convert__RegG8RC1_1__RegG8RC1_2__U6Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm }, }, |
6872 | | { 6378 /* fabs */, PPC::FABSS, Convert__RegF4RC1_0__RegF4RC1_1, AMFBS_None, { MCK_RegF4RC, MCK_RegF4RC }, }, |
6873 | | { 6378 /* fabs */, PPC::FABSS_rec, Convert__RegF4RC1_1__RegF4RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF4RC }, }, |
6874 | | { 6383 /* fadd */, PPC::FADD, Convert__RegF8RC1_0__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
6875 | | { 6383 /* fadd */, PPC::FADD_rec, Convert__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
6876 | | { 6388 /* fadds */, PPC::FADDS, Convert__RegF4RC1_0__RegF4RC1_1__RegF4RC1_2, AMFBS_None, { MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC }, }, |
6877 | | { 6388 /* fadds */, PPC::FADDS_rec, Convert__RegF4RC1_1__RegF4RC1_2__RegF4RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC }, }, |
6878 | | { 6394 /* fcfid */, PPC::FCFID, Convert__RegF8RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC }, }, |
6879 | | { 6394 /* fcfid */, PPC::FCFID_rec, Convert__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC }, }, |
6880 | | { 6400 /* fcfids */, PPC::FCFIDS, Convert__RegF4RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF4RC, MCK_RegF8RC }, }, |
6881 | | { 6400 /* fcfids */, PPC::FCFIDS_rec, Convert__RegF4RC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF8RC }, }, |
6882 | | { 6407 /* fcfidu */, PPC::FCFIDU, Convert__RegF8RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC }, }, |
6883 | | { 6407 /* fcfidu */, PPC::FCFIDU_rec, Convert__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC }, }, |
6884 | | { 6414 /* fcfidus */, PPC::FCFIDUS, Convert__RegF4RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF4RC, MCK_RegF8RC }, }, |
6885 | | { 6414 /* fcfidus */, PPC::FCFIDUS_rec, Convert__RegF4RC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF8RC }, }, |
6886 | | { 6422 /* fcmpo */, PPC::FCMPOS, Convert__RegCRRC1_0__RegF4RC1_1__RegF4RC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegF4RC, MCK_RegF4RC }, }, |
6887 | | { 6428 /* fcmpu */, PPC::FCMPUS, Convert__RegCRRC1_0__RegF4RC1_1__RegF4RC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegF4RC, MCK_RegF4RC }, }, |
6888 | | { 6434 /* fcpsgn */, PPC::FCPSGNS, Convert__RegF4RC1_0__RegF4RC1_1__RegF4RC1_2, AMFBS_None, { MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC }, }, |
6889 | | { 6434 /* fcpsgn */, PPC::FCPSGNS_rec, Convert__RegF4RC1_1__RegF4RC1_2__RegF4RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC }, }, |
6890 | | { 6441 /* fctid */, PPC::FCTID, Convert__RegF8RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC }, }, |
6891 | | { 6441 /* fctid */, PPC::FCTID_rec, Convert__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC }, }, |
6892 | | { 6447 /* fctidu */, PPC::FCTIDU, Convert__RegF8RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC }, }, |
6893 | | { 6447 /* fctidu */, PPC::FCTIDU_rec, Convert__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC }, }, |
6894 | | { 6454 /* fctiduz */, PPC::FCTIDUZ, Convert__RegF8RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC }, }, |
6895 | | { 6454 /* fctiduz */, PPC::FCTIDUZ_rec, Convert__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC }, }, |
6896 | | { 6462 /* fctidz */, PPC::FCTIDZ, Convert__RegF8RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC }, }, |
6897 | | { 6462 /* fctidz */, PPC::FCTIDZ_rec, Convert__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC }, }, |
6898 | | { 6469 /* fctiw */, PPC::FCTIW, Convert__RegF8RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC }, }, |
6899 | | { 6469 /* fctiw */, PPC::FCTIW_rec, Convert__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC }, }, |
6900 | | { 6475 /* fctiwu */, PPC::FCTIWU, Convert__RegF8RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC }, }, |
6901 | | { 6475 /* fctiwu */, PPC::FCTIWU_rec, Convert__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC }, }, |
6902 | | { 6482 /* fctiwuz */, PPC::FCTIWUZ, Convert__RegF8RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC }, }, |
6903 | | { 6482 /* fctiwuz */, PPC::FCTIWUZ_rec, Convert__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC }, }, |
6904 | | { 6490 /* fctiwz */, PPC::FCTIWZ, Convert__RegF8RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC }, }, |
6905 | | { 6490 /* fctiwz */, PPC::FCTIWZ_rec, Convert__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC }, }, |
6906 | | { 6497 /* fdiv */, PPC::FDIV, Convert__RegF8RC1_0__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
6907 | | { 6497 /* fdiv */, PPC::FDIV_rec, Convert__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
6908 | | { 6502 /* fdivs */, PPC::FDIVS, Convert__RegF4RC1_0__RegF4RC1_1__RegF4RC1_2, AMFBS_None, { MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC }, }, |
6909 | | { 6502 /* fdivs */, PPC::FDIVS_rec, Convert__RegF4RC1_1__RegF4RC1_2__RegF4RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC }, }, |
6910 | | { 6508 /* fmadd */, PPC::FMADD, Convert__RegF8RC1_0__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
6911 | | { 6508 /* fmadd */, PPC::FMADD_rec, Convert__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3__RegF8RC1_4, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
6912 | | { 6514 /* fmadds */, PPC::FMADDS, Convert__RegF4RC1_0__RegF4RC1_1__RegF4RC1_2__RegF4RC1_3, AMFBS_None, { MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC }, }, |
6913 | | { 6514 /* fmadds */, PPC::FMADDS_rec, Convert__RegF4RC1_1__RegF4RC1_2__RegF4RC1_3__RegF4RC1_4, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC }, }, |
6914 | | { 6521 /* fmr */, PPC::FMR, Convert__RegF4RC1_0__RegF4RC1_1, AMFBS_None, { MCK_RegF4RC, MCK_RegF4RC }, }, |
6915 | | { 6521 /* fmr */, PPC::FMR_rec, Convert__RegF4RC1_1__RegF4RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF4RC }, }, |
6916 | | { 6525 /* fmsub */, PPC::FMSUB, Convert__RegF8RC1_0__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
6917 | | { 6525 /* fmsub */, PPC::FMSUB_rec, Convert__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3__RegF8RC1_4, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
6918 | | { 6531 /* fmsubs */, PPC::FMSUBS, Convert__RegF4RC1_0__RegF4RC1_1__RegF4RC1_2__RegF4RC1_3, AMFBS_None, { MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC }, }, |
6919 | | { 6531 /* fmsubs */, PPC::FMSUBS_rec, Convert__RegF4RC1_1__RegF4RC1_2__RegF4RC1_3__RegF4RC1_4, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC }, }, |
6920 | | { 6538 /* fmul */, PPC::FMUL, Convert__RegF8RC1_0__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
6921 | | { 6538 /* fmul */, PPC::FMUL_rec, Convert__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
6922 | | { 6543 /* fmuls */, PPC::FMULS, Convert__RegF4RC1_0__RegF4RC1_1__RegF4RC1_2, AMFBS_None, { MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC }, }, |
6923 | | { 6543 /* fmuls */, PPC::FMULS_rec, Convert__RegF4RC1_1__RegF4RC1_2__RegF4RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC }, }, |
6924 | | { 6549 /* fnabs */, PPC::FNABSS, Convert__RegF4RC1_0__RegF4RC1_1, AMFBS_None, { MCK_RegF4RC, MCK_RegF4RC }, }, |
6925 | | { 6549 /* fnabs */, PPC::FNABSS_rec, Convert__RegF4RC1_1__RegF4RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF4RC }, }, |
6926 | | { 6555 /* fneg */, PPC::FNEGS, Convert__RegF4RC1_0__RegF4RC1_1, AMFBS_None, { MCK_RegF4RC, MCK_RegF4RC }, }, |
6927 | | { 6555 /* fneg */, PPC::FNEGS_rec, Convert__RegF4RC1_1__RegF4RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF4RC }, }, |
6928 | | { 6560 /* fnmadd */, PPC::FNMADD, Convert__RegF8RC1_0__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
6929 | | { 6560 /* fnmadd */, PPC::FNMADD_rec, Convert__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3__RegF8RC1_4, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
6930 | | { 6567 /* fnmadds */, PPC::FNMADDS, Convert__RegF4RC1_0__RegF4RC1_1__RegF4RC1_2__RegF4RC1_3, AMFBS_None, { MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC }, }, |
6931 | | { 6567 /* fnmadds */, PPC::FNMADDS_rec, Convert__RegF4RC1_1__RegF4RC1_2__RegF4RC1_3__RegF4RC1_4, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC }, }, |
6932 | | { 6575 /* fnmsub */, PPC::FNMSUB, Convert__RegF8RC1_0__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
6933 | | { 6575 /* fnmsub */, PPC::FNMSUB_rec, Convert__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3__RegF8RC1_4, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
6934 | | { 6582 /* fnmsubs */, PPC::FNMSUBS, Convert__RegF4RC1_0__RegF4RC1_1__RegF4RC1_2__RegF4RC1_3, AMFBS_None, { MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC }, }, |
6935 | | { 6582 /* fnmsubs */, PPC::FNMSUBS_rec, Convert__RegF4RC1_1__RegF4RC1_2__RegF4RC1_3__RegF4RC1_4, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC }, }, |
6936 | | { 6590 /* fre */, PPC::FRE, Convert__RegF8RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC }, }, |
6937 | | { 6590 /* fre */, PPC::FRE_rec, Convert__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC }, }, |
6938 | | { 6594 /* fres */, PPC::FRES, Convert__RegF4RC1_0__RegF4RC1_1, AMFBS_None, { MCK_RegF4RC, MCK_RegF4RC }, }, |
6939 | | { 6594 /* fres */, PPC::FRES_rec, Convert__RegF4RC1_1__RegF4RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF4RC }, }, |
6940 | | { 6599 /* frim */, PPC::FRIMS, Convert__RegF4RC1_0__RegF4RC1_1, AMFBS_None, { MCK_RegF4RC, MCK_RegF4RC }, }, |
6941 | | { 6599 /* frim */, PPC::FRIMS_rec, Convert__RegF4RC1_1__RegF4RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF4RC }, }, |
6942 | | { 6604 /* frin */, PPC::FRINS, Convert__RegF4RC1_0__RegF4RC1_1, AMFBS_None, { MCK_RegF4RC, MCK_RegF4RC }, }, |
6943 | | { 6604 /* frin */, PPC::FRINS_rec, Convert__RegF4RC1_1__RegF4RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF4RC }, }, |
6944 | | { 6609 /* frip */, PPC::FRIPS, Convert__RegF4RC1_0__RegF4RC1_1, AMFBS_None, { MCK_RegF4RC, MCK_RegF4RC }, }, |
6945 | | { 6609 /* frip */, PPC::FRIPS_rec, Convert__RegF4RC1_1__RegF4RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF4RC }, }, |
6946 | | { 6614 /* friz */, PPC::FRIZS, Convert__RegF4RC1_0__RegF4RC1_1, AMFBS_None, { MCK_RegF4RC, MCK_RegF4RC }, }, |
6947 | | { 6614 /* friz */, PPC::FRIZS_rec, Convert__RegF4RC1_1__RegF4RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF4RC }, }, |
6948 | | { 6619 /* frsp */, PPC::FRSP, Convert__RegF4RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF4RC, MCK_RegF8RC }, }, |
6949 | | { 6619 /* frsp */, PPC::FRSP_rec, Convert__RegF4RC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF8RC }, }, |
6950 | | { 6624 /* frsqrte */, PPC::FRSQRTE, Convert__RegF8RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC }, }, |
6951 | | { 6624 /* frsqrte */, PPC::FRSQRTE_rec, Convert__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC }, }, |
6952 | | { 6632 /* frsqrtes */, PPC::FRSQRTES, Convert__RegF4RC1_0__RegF4RC1_1, AMFBS_None, { MCK_RegF4RC, MCK_RegF4RC }, }, |
6953 | | { 6632 /* frsqrtes */, PPC::FRSQRTES_rec, Convert__RegF4RC1_1__RegF4RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF4RC }, }, |
6954 | | { 6641 /* fsel */, PPC::FSELS, Convert__RegF4RC1_0__RegF8RC1_1__RegF4RC1_2__RegF4RC1_3, AMFBS_None, { MCK_RegF4RC, MCK_RegF8RC, MCK_RegF4RC, MCK_RegF4RC }, }, |
6955 | | { 6641 /* fsel */, PPC::FSELS_rec, Convert__RegF4RC1_1__RegF8RC1_2__RegF4RC1_3__RegF4RC1_4, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF8RC, MCK_RegF4RC, MCK_RegF4RC }, }, |
6956 | | { 6646 /* fsqrt */, PPC::FSQRT, Convert__RegF8RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC }, }, |
6957 | | { 6646 /* fsqrt */, PPC::FSQRT_rec, Convert__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC }, }, |
6958 | | { 6652 /* fsqrts */, PPC::FSQRTS, Convert__RegF4RC1_0__RegF4RC1_1, AMFBS_None, { MCK_RegF4RC, MCK_RegF4RC }, }, |
6959 | | { 6652 /* fsqrts */, PPC::FSQRTS_rec, Convert__RegF4RC1_1__RegF4RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF4RC }, }, |
6960 | | { 6659 /* fsub */, PPC::FSUB, Convert__RegF8RC1_0__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
6961 | | { 6659 /* fsub */, PPC::FSUB_rec, Convert__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
6962 | | { 6664 /* fsubs */, PPC::FSUBS, Convert__RegF4RC1_0__RegF4RC1_1__RegF4RC1_2, AMFBS_None, { MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC }, }, |
6963 | | { 6664 /* fsubs */, PPC::FSUBS_rec, Convert__RegF4RC1_1__RegF4RC1_2__RegF4RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC }, }, |
6964 | | { 6670 /* ftdiv */, PPC::FTDIV, Convert__RegCRRC1_0__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegF8RC, MCK_RegF8RC }, }, |
6965 | | { 6676 /* ftsqrt */, PPC::FTSQRT, Convert__RegCRRC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegCRRC, MCK_RegF8RC }, }, |
6966 | | { 6683 /* hashchk */, PPC::HASHCHK, Convert__RegGPRC1_0__DispRIHash1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRIHash, MCK_RegGxRCNoR0 }, }, |
6967 | | { 6691 /* hashchkp */, PPC::HASHCHKP, Convert__RegGPRC1_0__DispRIHash1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRIHash, MCK_RegGxRCNoR0 }, }, |
6968 | | { 6700 /* hashst */, PPC::HASHST, Convert__RegGPRC1_0__DispRIHash1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRIHash, MCK_RegGxRCNoR0 }, }, |
6969 | | { 6707 /* hashstp */, PPC::HASHSTP, Convert__RegGPRC1_0__DispRIHash1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRIHash, MCK_RegGxRCNoR0 }, }, |
6970 | | { 6715 /* hrfid */, PPC::HRFID, Convert_NoOperands, AMFBS_None, { }, }, |
6971 | | { 6721 /* hwsync */, PPC::SYNCP10, Convert__imm_95_0__imm_95_0, AMFBS_None, { }, }, |
6972 | | { 6721 /* hwsync */, PPC::SYNC, Convert__imm_95_0, AMFBS_None, { }, }, |
6973 | | { 6728 /* icbi */, PPC::ICBI, Convert__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6974 | | { 6733 /* icbiep */, PPC::ICBIEP, Convert__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6975 | | { 6740 /* icblc */, PPC::ICBLC, Convert__U4Imm1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_U4Imm, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6976 | | { 6746 /* icblq */, PPC::ICBLQ, Convert__U4Imm1_1__RegGxRCNoR01_2__RegGxRC1_3, AMFBS_None, { MCK__DOT_, MCK_U4Imm, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6977 | | { 6752 /* icbt */, PPC::ICBT, Convert__U4Imm1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_U4Imm, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6978 | | { 6757 /* icbtls */, PPC::ICBTLS, Convert__U4Imm1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_U4Imm, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6979 | | { 6764 /* iccci */, PPC::ICCCI, Convert__regR0__regR0, AMFBS_None, { }, }, |
6980 | | { 6764 /* iccci */, PPC::ICCCI, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
6981 | | { 6770 /* ici */, PPC::ICCCI, Convert__regR0__regR0, AMFBS_None, { MCK_0 }, }, |
6982 | | { 6774 /* inslwi */, PPC::INSLWI, Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2__U5Imm1_3, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm, MCK_U5Imm }, }, |
6983 | | { 6774 /* inslwi */, PPC::INSLWI_rec, Convert__RegGPRC1_1__RegGPRC1_2__U5Imm1_3__U5Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm, MCK_U5Imm }, }, |
6984 | | { 6781 /* insrdi */, PPC::INSRDI, Convert__RegG8RC1_0__RegG8RC1_1__U6Imm1_2__U6Imm1_3, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm, MCK_U6Imm }, }, |
6985 | | { 6781 /* insrdi */, PPC::INSRDI_rec, Convert__RegG8RC1_1__RegG8RC1_2__U6Imm1_3__U6Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm, MCK_U6Imm }, }, |
6986 | | { 6788 /* insrwi */, PPC::INSRWI, Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2__U5Imm1_3, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm, MCK_U5Imm }, }, |
6987 | | { 6788 /* insrwi */, PPC::INSRWI_rec, Convert__RegGPRC1_1__RegGPRC1_2__U5Imm1_3__U5Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm, MCK_U5Imm }, }, |
6988 | | { 6795 /* isel */, PPC::ISEL, Convert__RegGPRC1_0__RegGPRCNoR01_1__RegGPRC1_2__RegCRBITRC1_3, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRCNoR0, MCK_RegGPRC, MCK_RegCRBITRC }, }, |
6989 | | { 6800 /* iseleq */, PPC::ISEL8, Convert__RegG8RC1_0__RegG8RCNoX01_1__RegG8RC1_2__regCR0EQ, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RCNoX0, MCK_RegG8RC }, }, |
6990 | | { 6800 /* iseleq */, PPC::ISEL, Convert__RegGPRC1_0__RegGPRCNoR01_1__RegGPRC1_2__regCR0EQ, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRCNoR0, MCK_RegGPRC }, }, |
6991 | | { 6807 /* iselgt */, PPC::ISEL8, Convert__RegG8RC1_0__RegG8RCNoX01_1__RegG8RC1_2__regCR0GT, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RCNoX0, MCK_RegG8RC }, }, |
6992 | | { 6807 /* iselgt */, PPC::ISEL, Convert__RegGPRC1_0__RegGPRCNoR01_1__RegGPRC1_2__regCR0GT, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRCNoR0, MCK_RegGPRC }, }, |
6993 | | { 6814 /* isellt */, PPC::ISEL8, Convert__RegG8RC1_0__RegG8RCNoX01_1__RegG8RC1_2__regCR0LT, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RCNoX0, MCK_RegG8RC }, }, |
6994 | | { 6814 /* isellt */, PPC::ISEL, Convert__RegGPRC1_0__RegGPRCNoR01_1__RegGPRC1_2__regCR0LT, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRCNoR0, MCK_RegGPRC }, }, |
6995 | | { 6821 /* isync */, PPC::ISYNC, Convert_NoOperands, AMFBS_None, { }, }, |
6996 | | { 6827 /* la */, PPC::LAx, Convert__RegGPRC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
6997 | | { 6830 /* lbarx */, PPC::LBARX, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
6998 | | { 6830 /* lbarx */, PPC::LBARXL, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC, MCK_1 }, }, |
6999 | | { 6836 /* lbepx */, PPC::LBEPX, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7000 | | { 6842 /* lbz */, PPC::LBZ, Convert__RegGPRC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
7001 | | { 6846 /* lbzcix */, PPC::LBZCIX, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7002 | | { 6853 /* lbzu */, PPC::LBZU, Convert__RegGPRC1_0__imm_95_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
7003 | | { 6858 /* lbzux */, PPC::LBZUX, Convert__RegGPRC1_0__imm_95_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7004 | | { 6864 /* lbzx */, PPC::LBZXTLS_, Convert__RegG8RC1_0__RegGxRCNoR01_1__TLSReg1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_TLSReg }, }, |
7005 | | { 6864 /* lbzx */, PPC::LBZX, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7006 | | { 6869 /* ld */, PPC::LD, Convert__RegG8RC1_0__DispRIX1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegG8RC, MCK_DispRIX, MCK_RegGxRCNoR0 }, }, |
7007 | | { 6872 /* ldarx */, PPC::LDARX, Convert__RegG8RC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7008 | | { 6872 /* ldarx */, PPC::LDARXL, Convert__RegG8RC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_RegGxRC, MCK_1 }, }, |
7009 | | { 6878 /* ldat */, PPC::LDAT, Convert__RegG8RC1_0__RegG8RC1_1__U5Imm1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U5Imm }, }, |
7010 | | { 6883 /* ldbrx */, PPC::LDBRX, Convert__RegG8RC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7011 | | { 6889 /* ldcix */, PPC::LDCIX, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7012 | | { 6895 /* ldu */, PPC::LDU, Convert__RegG8RC1_0__imm_95_0__DispRIX1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegG8RC, MCK_DispRIX, MCK_RegGxRCNoR0 }, }, |
7013 | | { 6899 /* ldux */, PPC::LDUX, Convert__RegG8RC1_0__imm_95_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7014 | | { 6904 /* ldx */, PPC::LDX, Convert__RegG8RC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7015 | | { 6904 /* ldx */, PPC::LDXTLS_, Convert__RegG8RC1_0__RegGxRCNoR01_1__TLSReg1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_TLSReg }, }, |
7016 | | { 6908 /* lfd */, PPC::LFD, Convert__RegF8RC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegF8RC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
7017 | | { 6912 /* lfdepx */, PPC::LFDEPX, Convert__RegF8RC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7018 | | { 6919 /* lfdu */, PPC::LFDU, Convert__RegF8RC1_0__imm_95_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegF8RC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
7019 | | { 6924 /* lfdux */, PPC::LFDUX, Convert__RegF8RC1_0__imm_95_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7020 | | { 6930 /* lfdx */, PPC::LFDX, Convert__RegF8RC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7021 | | { 6930 /* lfdx */, PPC::LFDXTLS_, Convert__RegF8RC1_0__RegGxRCNoR01_1__TLSReg1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegGxRCNoR0, MCK_TLSReg }, }, |
7022 | | { 6935 /* lfiwax */, PPC::LFIWAX, Convert__RegF8RC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7023 | | { 6942 /* lfiwzx */, PPC::LFIWZX, Convert__RegF8RC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7024 | | { 6949 /* lfs */, PPC::LFS, Convert__RegF4RC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegF4RC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
7025 | | { 6953 /* lfsu */, PPC::LFSU, Convert__RegF4RC1_0__imm_95_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegF4RC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
7026 | | { 6958 /* lfsux */, PPC::LFSUX, Convert__RegF4RC1_0__imm_95_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegF4RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7027 | | { 6964 /* lfsx */, PPC::LFSX, Convert__RegF4RC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegF4RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7028 | | { 6964 /* lfsx */, PPC::LFSXTLS_, Convert__RegF4RC1_0__RegGxRCNoR01_1__TLSReg1_2, AMFBS_None, { MCK_RegF4RC, MCK_RegGxRCNoR0, MCK_TLSReg }, }, |
7029 | | { 6969 /* lha */, PPC::LHA, Convert__RegGPRC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
7030 | | { 6973 /* lharx */, PPC::LHARX, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7031 | | { 6973 /* lharx */, PPC::LHARXL, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC, MCK_1 }, }, |
7032 | | { 6979 /* lhau */, PPC::LHAU, Convert__RegGPRC1_0__imm_95_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
7033 | | { 6984 /* lhaux */, PPC::LHAUX, Convert__RegGPRC1_0__imm_95_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7034 | | { 6990 /* lhax */, PPC::LHAXTLS_, Convert__RegG8RC1_0__RegGxRCNoR01_1__TLSReg1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_TLSReg }, }, |
7035 | | { 6990 /* lhax */, PPC::LHAX, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7036 | | { 6995 /* lhbrx */, PPC::LHBRX, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7037 | | { 7001 /* lhepx */, PPC::LHEPX, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7038 | | { 7007 /* lhz */, PPC::LHZ, Convert__RegGPRC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
7039 | | { 7011 /* lhzcix */, PPC::LHZCIX, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7040 | | { 7018 /* lhzu */, PPC::LHZU, Convert__RegGPRC1_0__imm_95_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
7041 | | { 7023 /* lhzux */, PPC::LHZUX, Convert__RegGPRC1_0__imm_95_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7042 | | { 7029 /* lhzx */, PPC::LHZXTLS_, Convert__RegG8RC1_0__RegGxRCNoR01_1__TLSReg1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_TLSReg }, }, |
7043 | | { 7029 /* lhzx */, PPC::LHZX, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7044 | | { 7034 /* li */, PPC::ADDI8, Convert__RegG8RC1_0__regZERO8__S16Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S16Imm }, }, |
7045 | | { 7034 /* li */, PPC::LI, Convert__RegGPRC1_0__S16Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S16Imm }, }, |
7046 | | { 7034 /* li */, PPC::ADDI, Convert__RegGPRC1_0__regZERO__S16Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S16Imm }, }, |
7047 | | { 7037 /* lis */, PPC::ADDIS8, Convert__RegG8RC1_0__regZERO8__S17Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S17Imm }, }, |
7048 | | { 7037 /* lis */, PPC::LIS, Convert__RegGPRC1_0__S17Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S17Imm }, }, |
7049 | | { 7037 /* lis */, PPC::ADDIS, Convert__RegGPRC1_0__regZERO__S17Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S17Imm }, }, |
7050 | | { 7041 /* lmw */, PPC::LMW, Convert__RegGPRC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
7051 | | { 7045 /* lnia */, PPC::ADDPCIS, Convert__RegG8RC1_0__imm_95_0, AMFBS_None, { MCK_RegG8RC }, }, |
7052 | | { 7050 /* lq */, PPC::LQ, Convert__RegG8pRC1_0__DispRIX161_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegG8pRC, MCK_DispRIX16, MCK_RegGxRCNoR0 }, }, |
7053 | | { 7053 /* lqarx */, PPC::LQARX, Convert__RegG8pRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegG8pRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7054 | | { 7053 /* lqarx */, PPC::LQARXL, Convert__RegG8pRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegG8pRC, MCK_RegGxRCNoR0, MCK_RegGxRC, MCK_1 }, }, |
7055 | | { 7059 /* lswi */, PPC::LSWI, Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm }, }, |
7056 | | { 7064 /* lvebx */, PPC::LVEBX, Convert__RegVRRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7057 | | { 7070 /* lvehx */, PPC::LVEHX, Convert__RegVRRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7058 | | { 7076 /* lvewx */, PPC::LVEWX, Convert__RegVRRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7059 | | { 7082 /* lvsl */, PPC::LVSL, Convert__RegVRRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7060 | | { 7087 /* lvsr */, PPC::LVSR, Convert__RegVRRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7061 | | { 7092 /* lvx */, PPC::LVX, Convert__RegVRRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7062 | | { 7096 /* lvxl */, PPC::LVXL, Convert__RegVRRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7063 | | { 7101 /* lwa */, PPC::LWA, Convert__RegG8RC1_0__DispRIX1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegG8RC, MCK_DispRIX, MCK_RegGxRCNoR0 }, }, |
7064 | | { 7105 /* lwarx */, PPC::LWARX, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7065 | | { 7105 /* lwarx */, PPC::LWARXL, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC, MCK_1 }, }, |
7066 | | { 7111 /* lwat */, PPC::LWAT, Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm }, }, |
7067 | | { 7116 /* lwaux */, PPC::LWAUX, Convert__RegG8RC1_0__imm_95_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7068 | | { 7122 /* lwax */, PPC::LWAX, Convert__RegG8RC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7069 | | { 7122 /* lwax */, PPC::LWAXTLS_, Convert__RegG8RC1_0__RegGxRCNoR01_1__TLSReg1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_TLSReg }, }, |
7070 | | { 7127 /* lwbrx */, PPC::LWBRX, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7071 | | { 7133 /* lwepx */, PPC::LWEPX, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7072 | | { 7139 /* lwsync */, PPC::SYNC, Convert__imm_95_1, AMFBS_None, { }, }, |
7073 | | { 7146 /* lwz */, PPC::LWZ, Convert__RegGPRC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
7074 | | { 7146 /* lwz */, PPC::SPELWZ, Convert__RegSPE4RC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegSPE4RC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
7075 | | { 7150 /* lwzcix */, PPC::LWZCIX, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7076 | | { 7157 /* lwzu */, PPC::LWZU, Convert__RegGPRC1_0__imm_95_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
7077 | | { 7162 /* lwzux */, PPC::LWZUX, Convert__RegGPRC1_0__imm_95_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7078 | | { 7168 /* lwzx */, PPC::LWZXTLS_, Convert__RegG8RC1_0__RegGxRCNoR01_1__TLSReg1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_TLSReg }, }, |
7079 | | { 7168 /* lwzx */, PPC::LWZX, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7080 | | { 7168 /* lwzx */, PPC::SPELWZX, Convert__RegSPE4RC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegSPE4RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7081 | | { 7173 /* lxsd */, PPC::LXSD, Convert__RegVFRC1_0__DispRIX1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVFRC, MCK_DispRIX, MCK_RegGxRCNoR0 }, }, |
7082 | | { 7178 /* lxsdx */, PPC::LXSDX, Convert__RegVSFRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7083 | | { 7184 /* lxsibzx */, PPC::LXSIBZX, Convert__RegVSFRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7084 | | { 7192 /* lxsihzx */, PPC::LXSIHZX, Convert__RegVSFRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7085 | | { 7200 /* lxsiwax */, PPC::LXSIWAX, Convert__RegVSFRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7086 | | { 7208 /* lxsiwzx */, PPC::LXSIWZX, Convert__RegVSFRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7087 | | { 7216 /* lxssp */, PPC::LXSSP, Convert__RegVFRC1_0__DispRIX1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVFRC, MCK_DispRIX, MCK_RegGxRCNoR0 }, }, |
7088 | | { 7222 /* lxsspx */, PPC::LXSSPX, Convert__RegVSSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7089 | | { 7229 /* lxv */, PPC::LXV, Convert__RegVSRC1_0__DispRIX161_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVSRC, MCK_DispRIX16, MCK_RegGxRCNoR0 }, }, |
7090 | | { 7233 /* lxvb16x */, PPC::LXVB16X, Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7091 | | { 7241 /* lxvd2x */, PPC::LXVD2X, Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7092 | | { 7248 /* lxvdsx */, PPC::LXVDSX, Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7093 | | { 7255 /* lxvh8x */, PPC::LXVH8X, Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7094 | | { 7262 /* lxvkq */, PPC::LXVKQ, Convert__RegVSRC1_0__U5Imm1_1, AMFBS_None, { MCK_RegVSRC, MCK_U5Imm }, }, |
7095 | | { 7268 /* lxvl */, PPC::LXVL, Convert__RegVSRC1_0__Imm1_1__RegG8RC1_2, AMFBS_None, { MCK_RegVSRC, MCK_Imm, MCK_RegG8RC }, }, |
7096 | | { 7273 /* lxvll */, PPC::LXVLL, Convert__RegVSRC1_0__Imm1_1__RegG8RC1_2, AMFBS_None, { MCK_RegVSRC, MCK_Imm, MCK_RegG8RC }, }, |
7097 | | { 7279 /* lxvp */, PPC::LXVP, Convert__RegVSRpRC1_0__DispRIX161_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVSRpRC, MCK_DispRIX16, MCK_RegGxRCNoR0 }, }, |
7098 | | { 7284 /* lxvprl */, PPC::LXVPRL, Convert__RegVSRpRC1_0__Imm1_1__RegG8RC1_2, AMFBS_None, { MCK_RegVSRpRC, MCK_Imm, MCK_RegG8RC }, }, |
7099 | | { 7291 /* lxvprll */, PPC::LXVPRLL, Convert__RegVSRpRC1_0__Imm1_1__RegG8RC1_2, AMFBS_None, { MCK_RegVSRpRC, MCK_Imm, MCK_RegG8RC }, }, |
7100 | | { 7299 /* lxvpx */, PPC::LXVPX, Convert__RegVSRpRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRpRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7101 | | { 7305 /* lxvrbx */, PPC::LXVRBX, Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7102 | | { 7312 /* lxvrdx */, PPC::LXVRDX, Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7103 | | { 7319 /* lxvrhx */, PPC::LXVRHX, Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7104 | | { 7326 /* lxvrl */, PPC::LXVRL, Convert__RegVSRC1_0__Imm1_1__RegG8RC1_2, AMFBS_None, { MCK_RegVSRC, MCK_Imm, MCK_RegG8RC }, }, |
7105 | | { 7332 /* lxvrll */, PPC::LXVRLL, Convert__RegVSRC1_0__Imm1_1__RegG8RC1_2, AMFBS_None, { MCK_RegVSRC, MCK_Imm, MCK_RegG8RC }, }, |
7106 | | { 7339 /* lxvrwx */, PPC::LXVRWX, Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7107 | | { 7346 /* lxvw4x */, PPC::LXVW4X, Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7108 | | { 7353 /* lxvwsx */, PPC::LXVWSX, Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7109 | | { 7360 /* lxvx */, PPC::LXVX, Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7110 | | { 7365 /* maddhd */, PPC::MADDHD, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2__RegG8RC1_3, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
7111 | | { 7372 /* maddhdu */, PPC::MADDHDU, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2__RegG8RC1_3, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
7112 | | { 7380 /* maddld */, PPC::MADDLD, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7113 | | { 7387 /* mbar */, PPC::MBAR, Convert__imm_95_0, AMFBS_None, { }, }, |
7114 | | { 7387 /* mbar */, PPC::MBAR, Convert__U5Imm1_0, AMFBS_None, { MCK_U5Imm }, }, |
7115 | | { 7392 /* mcrf */, PPC::MCRF, Convert__RegCRRC1_0__RegCRRC1_1, AMFBS_None, { MCK_RegCRRC, MCK_RegCRRC }, }, |
7116 | | { 7397 /* mcrfs */, PPC::MCRFS, Convert__RegCRRC1_0__RegCRRC1_1, AMFBS_None, { MCK_RegCRRC, MCK_RegCRRC }, }, |
7117 | | { 7403 /* mcrxrx */, PPC::MCRXRX, Convert__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
7118 | | { 7410 /* mfamr */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_29, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7119 | | { 7410 /* mfamr */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_29, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7120 | | { 7416 /* mfasr */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_280, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7121 | | { 7416 /* mfasr */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_280, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7122 | | { 7422 /* mfbhrbe */, PPC::MFBHRBE, Convert__RegGPRC1_0__U10Imm1_1__imm_95_0, AMFBS_None, { MCK_RegGPRC, MCK_U10Imm }, }, |
7123 | | { 7430 /* mfbr0 */, PPC::MFDCR, Convert__RegGPRC1_0__imm_95_128, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7124 | | { 7436 /* mfbr1 */, PPC::MFDCR, Convert__RegGPRC1_0__imm_95_129, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7125 | | { 7442 /* mfbr2 */, PPC::MFDCR, Convert__RegGPRC1_0__imm_95_130, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7126 | | { 7448 /* mfbr3 */, PPC::MFDCR, Convert__RegGPRC1_0__imm_95_131, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7127 | | { 7454 /* mfbr4 */, PPC::MFDCR, Convert__RegGPRC1_0__imm_95_132, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7128 | | { 7460 /* mfbr5 */, PPC::MFDCR, Convert__RegGPRC1_0__imm_95_133, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7129 | | { 7466 /* mfbr6 */, PPC::MFDCR, Convert__RegGPRC1_0__imm_95_134, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7130 | | { 7472 /* mfbr7 */, PPC::MFDCR, Convert__RegGPRC1_0__imm_95_135, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7131 | | { 7478 /* mfcfar */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_28, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7132 | | { 7478 /* mfcfar */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_28, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7133 | | { 7485 /* mfcr */, PPC::MFCR, Convert__RegGPRC1_0, AMFBS_None, { MCK_RegGPRC }, }, |
7134 | | { 7490 /* mfctr */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_9, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7135 | | { 7490 /* mfctr */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_9, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7136 | | { 7490 /* mfctr */, PPC::MFCTR, Convert__RegGPRC1_0, AMFBS_None, { MCK_RegGPRC }, }, |
7137 | | { 7496 /* mfdar */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_19, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7138 | | { 7496 /* mfdar */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_19, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7139 | | { 7502 /* mfdbatl */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_537, AMFBS_ModernAs, { MCK_RegGPRC, MCK_0 }, }, |
7140 | | { 7502 /* mfdbatl */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_539, AMFBS_ModernAs, { MCK_RegGPRC, MCK_1 }, }, |
7141 | | { 7502 /* mfdbatl */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_541, AMFBS_ModernAs, { MCK_RegGPRC, MCK_2 }, }, |
7142 | | { 7502 /* mfdbatl */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_543, AMFBS_ModernAs, { MCK_RegGPRC, MCK_3 }, }, |
7143 | | { 7510 /* mfdbatu */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_536, AMFBS_ModernAs, { MCK_RegGPRC, MCK_0 }, }, |
7144 | | { 7510 /* mfdbatu */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_538, AMFBS_ModernAs, { MCK_RegGPRC, MCK_1 }, }, |
7145 | | { 7510 /* mfdbatu */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_540, AMFBS_ModernAs, { MCK_RegGPRC, MCK_2 }, }, |
7146 | | { 7510 /* mfdbatu */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_542, AMFBS_ModernAs, { MCK_RegGPRC, MCK_3 }, }, |
7147 | | { 7518 /* mfdccr */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_1018, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7148 | | { 7525 /* mfdcr */, PPC::MFDCR, Convert__RegGPRC1_0__Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_Imm }, }, |
7149 | | { 7531 /* mfdear */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_981, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7150 | | { 7538 /* mfdec */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_22, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7151 | | { 7538 /* mfdec */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_22, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7152 | | { 7544 /* mfdscr */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_17, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7153 | | { 7544 /* mfdscr */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_17, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7154 | | { 7551 /* mfdsisr */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_18, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7155 | | { 7551 /* mfdsisr */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_18, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7156 | | { 7559 /* mfesr */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_980, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7157 | | { 7565 /* mffprd */, PPC::MFVSRD, Convert__RegG8RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegF8RC }, }, |
7158 | | { 7572 /* mffprwz */, PPC::MFVSRWZ, Convert__RegGPRC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegF8RC }, }, |
7159 | | { 7580 /* mffs */, PPC::MFFS, Convert__RegF8RC1_0, AMFBS_None, { MCK_RegF8RC }, }, |
7160 | | { 7580 /* mffs */, PPC::MFFS_rec, Convert__RegF8RC1_1, AMFBS_None, { MCK__DOT_, MCK_RegF8RC }, }, |
7161 | | { 7585 /* mffscdrn */, PPC::MFFSCDRN, Convert__RegF8RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC }, }, |
7162 | | { 7594 /* mffscdrni */, PPC::MFFSCDRNI, Convert__RegF8RC1_0__U3Imm1_1, AMFBS_None, { MCK_RegF8RC, MCK_U3Imm }, }, |
7163 | | { 7604 /* mffsce */, PPC::MFFSCE, Convert__RegF8RC1_0, AMFBS_None, { MCK_RegF8RC }, }, |
7164 | | { 7611 /* mffscrn */, PPC::MFFSCRN, Convert__RegF8RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC }, }, |
7165 | | { 7619 /* mffscrni */, PPC::MFFSCRNI, Convert__RegF8RC1_0__U2Imm1_1, AMFBS_None, { MCK_RegF8RC, MCK_U2Imm }, }, |
7166 | | { 7628 /* mffsl */, PPC::MFFSL, Convert__RegF8RC1_0, AMFBS_None, { MCK_RegF8RC }, }, |
7167 | | { 7634 /* mfibatl */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_529, AMFBS_ModernAs, { MCK_RegGPRC, MCK_0 }, }, |
7168 | | { 7634 /* mfibatl */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_531, AMFBS_ModernAs, { MCK_RegGPRC, MCK_1 }, }, |
7169 | | { 7634 /* mfibatl */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_533, AMFBS_ModernAs, { MCK_RegGPRC, MCK_2 }, }, |
7170 | | { 7634 /* mfibatl */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_535, AMFBS_ModernAs, { MCK_RegGPRC, MCK_3 }, }, |
7171 | | { 7642 /* mfibatu */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_528, AMFBS_ModernAs, { MCK_RegGPRC, MCK_0 }, }, |
7172 | | { 7642 /* mfibatu */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_530, AMFBS_ModernAs, { MCK_RegGPRC, MCK_1 }, }, |
7173 | | { 7642 /* mfibatu */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_532, AMFBS_ModernAs, { MCK_RegGPRC, MCK_2 }, }, |
7174 | | { 7642 /* mfibatu */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_534, AMFBS_ModernAs, { MCK_RegGPRC, MCK_3 }, }, |
7175 | | { 7650 /* mficcr */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_1019, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7176 | | { 7657 /* mflr */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_8, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7177 | | { 7657 /* mflr */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_8, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7178 | | { 7657 /* mflr */, PPC::MFLR, Convert__RegGPRC1_0, AMFBS_None, { MCK_RegGPRC }, }, |
7179 | | { 7662 /* mfmsr */, PPC::MFMSR, Convert__RegGPRC1_0, AMFBS_None, { MCK_RegGPRC }, }, |
7180 | | { 7668 /* mfocrf */, PPC::MFOCRF, Convert__RegGPRC1_0__CRBitMask1_1, AMFBS_None, { MCK_RegGPRC, MCK_CRBitMask }, }, |
7181 | | { 7675 /* mfpid */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_48, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7182 | | { 7681 /* mfpmr */, PPC::MFPMR, Convert__RegGPRC1_0__Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_Imm }, }, |
7183 | | { 7687 /* mfppr */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_896, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7184 | | { 7693 /* mfpvr */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_287, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7185 | | { 7693 /* mfpvr */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_287, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7186 | | { 7699 /* mfrtcl */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_5, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7187 | | { 7699 /* mfrtcl */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_5, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7188 | | { 7706 /* mfrtcu */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_4, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7189 | | { 7706 /* mfrtcu */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_4, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7190 | | { 7713 /* mfsdr1 */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_25, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7191 | | { 7713 /* mfsdr1 */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_25, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7192 | | { 7720 /* mfspefscr */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_512, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7193 | | { 7720 /* mfspefscr */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_512, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7194 | | { 7730 /* mfspr */, PPC::MFUDSCR, Convert__RegGPRC1_0, AMFBS_None, { MCK_RegGPRC, MCK_3 }, }, |
7195 | | { 7730 /* mfspr */, PPC::MFSPR, Convert__RegGPRC1_0__Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_Imm }, }, |
7196 | | { 7736 /* mfsprg */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_272, AMFBS_ModernAs, { MCK_RegG8RC, MCK_0 }, }, |
7197 | | { 7736 /* mfsprg */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_273, AMFBS_ModernAs, { MCK_RegG8RC, MCK_1 }, }, |
7198 | | { 7736 /* mfsprg */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_274, AMFBS_ModernAs, { MCK_RegG8RC, MCK_2 }, }, |
7199 | | { 7736 /* mfsprg */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_275, AMFBS_ModernAs, { MCK_RegG8RC, MCK_3 }, }, |
7200 | | { 7736 /* mfsprg */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_272, AMFBS_ModernAs, { MCK_RegGPRC, MCK_0 }, }, |
7201 | | { 7736 /* mfsprg */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_273, AMFBS_ModernAs, { MCK_RegGPRC, MCK_1 }, }, |
7202 | | { 7736 /* mfsprg */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_274, AMFBS_ModernAs, { MCK_RegGPRC, MCK_2 }, }, |
7203 | | { 7736 /* mfsprg */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_275, AMFBS_ModernAs, { MCK_RegGPRC, MCK_3 }, }, |
7204 | | { 7736 /* mfsprg */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_260, AMFBS_ModernAs, { MCK_RegGPRC, MCK_4 }, }, |
7205 | | { 7736 /* mfsprg */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_261, AMFBS_ModernAs, { MCK_RegGPRC, MCK_5 }, }, |
7206 | | { 7736 /* mfsprg */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_262, AMFBS_ModernAs, { MCK_RegGPRC, MCK_6 }, }, |
7207 | | { 7736 /* mfsprg */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_263, AMFBS_ModernAs, { MCK_RegGPRC, MCK_7 }, }, |
7208 | | { 7743 /* mfsprg0 */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_272, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7209 | | { 7743 /* mfsprg0 */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_272, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7210 | | { 7751 /* mfsprg1 */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_273, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7211 | | { 7751 /* mfsprg1 */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_273, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7212 | | { 7759 /* mfsprg2 */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_274, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7213 | | { 7759 /* mfsprg2 */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_274, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7214 | | { 7767 /* mfsprg3 */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_275, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7215 | | { 7767 /* mfsprg3 */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_275, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7216 | | { 7775 /* mfsprg4 */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_260, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7217 | | { 7783 /* mfsprg5 */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_261, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7218 | | { 7791 /* mfsprg6 */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_262, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7219 | | { 7799 /* mfsprg7 */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_263, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7220 | | { 7807 /* mfsr */, PPC::MFSR, Convert__RegGPRC1_0__U4Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_U4Imm }, }, |
7221 | | { 7812 /* mfsrin */, PPC::MFSRIN, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
7222 | | { 7819 /* mfsrr0 */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_26, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7223 | | { 7819 /* mfsrr0 */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_26, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7224 | | { 7826 /* mfsrr1 */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_27, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7225 | | { 7826 /* mfsrr1 */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_27, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7226 | | { 7833 /* mfsrr2 */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_990, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7227 | | { 7840 /* mfsrr3 */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_991, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7228 | | { 7847 /* mftb */, PPC::MFTB, Convert__RegGPRC1_0__imm_95_268, AMFBS_None, { MCK_RegGPRC }, }, |
7229 | | { 7847 /* mftb */, PPC::MFTB, Convert__RegGPRC1_0__Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_Imm }, }, |
7230 | | { 7852 /* mftbhi */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_988, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7231 | | { 7859 /* mftbl */, PPC::MFTB, Convert__RegGPRC1_0__imm_95_268, AMFBS_None, { MCK_RegGPRC }, }, |
7232 | | { 7865 /* mftblo */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_989, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7233 | | { 7872 /* mftbu */, PPC::MFTB, Convert__RegGPRC1_0__imm_95_269, AMFBS_None, { MCK_RegGPRC }, }, |
7234 | | { 7878 /* mftcr */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_986, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7235 | | { 7884 /* mfuamr */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_13, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7236 | | { 7884 /* mfuamr */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_13, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7237 | | { 7891 /* mfudscr */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_3, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7238 | | { 7891 /* mfudscr */, PPC::MFUDSCR, Convert__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7239 | | { 7891 /* mfudscr */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_3, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7240 | | { 7899 /* mfvrd */, PPC::MFVRD, Convert__RegG8RC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegVRRC }, }, |
7241 | | { 7905 /* mfvrsave */, PPC::MFVRSAVE, Convert__RegGPRC1_0, AMFBS_None, { MCK_RegGPRC }, }, |
7242 | | { 7914 /* mfvrwz */, PPC::MFVRWZ, Convert__RegGPRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegVRRC }, }, |
7243 | | { 7921 /* mfvscr */, PPC::MFVSCR, Convert__RegVRRC1_0, AMFBS_None, { MCK_RegVRRC }, }, |
7244 | | { 7928 /* mfvsrd */, PPC::MFVSRD, Convert__RegG8RC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegVSFRC }, }, |
7245 | | { 7935 /* mfvsrld */, PPC::MFVSRLD, Convert__RegG8RC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegVSRC }, }, |
7246 | | { 7943 /* mfvsrwz */, PPC::MFVSRWZ, Convert__RegGPRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegVSFRC }, }, |
7247 | | { 7951 /* mfxer */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_1, AMFBS_None, { MCK_RegG8RC }, }, |
7248 | | { 7951 /* mfxer */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_1, AMFBS_None, { MCK_RegGPRC }, }, |
7249 | | { 7957 /* modsd */, PPC::MODSD, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
7250 | | { 7963 /* modsw */, PPC::MODSW, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7251 | | { 7969 /* modud */, PPC::MODUD, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
7252 | | { 7975 /* moduw */, PPC::MODUW, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7253 | | { 7981 /* mr */, PPC::OR8, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
7254 | | { 7981 /* mr */, PPC::OR, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
7255 | | { 7981 /* mr */, PPC::OR8_rec, Convert__RegG8RC1_1__RegG8RC1_2__RegG8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC }, }, |
7256 | | { 7981 /* mr */, PPC::OR_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC }, }, |
7257 | | { 7984 /* msgsync */, PPC::MSGSYNC, Convert_NoOperands, AMFBS_None, { }, }, |
7258 | | { 7992 /* msync */, PPC::SYNC, Convert__imm_95_0, AMFBS_None, { }, }, |
7259 | | { 7998 /* mtamr */, PPC::MTSPR8, Convert__imm_95_29__RegG8RC1_0, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7260 | | { 7998 /* mtamr */, PPC::MTSPR, Convert__imm_95_29__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7261 | | { 8004 /* mtasr */, PPC::MTSPR8, Convert__imm_95_280__RegG8RC1_0, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7262 | | { 8004 /* mtasr */, PPC::MTSPR, Convert__imm_95_280__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7263 | | { 8010 /* mtbr0 */, PPC::MTDCR, Convert__RegGPRC1_0__imm_95_128, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7264 | | { 8016 /* mtbr1 */, PPC::MTDCR, Convert__RegGPRC1_0__imm_95_129, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7265 | | { 8022 /* mtbr2 */, PPC::MTDCR, Convert__RegGPRC1_0__imm_95_130, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7266 | | { 8028 /* mtbr3 */, PPC::MTDCR, Convert__RegGPRC1_0__imm_95_131, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7267 | | { 8034 /* mtbr4 */, PPC::MTDCR, Convert__RegGPRC1_0__imm_95_132, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7268 | | { 8040 /* mtbr5 */, PPC::MTDCR, Convert__RegGPRC1_0__imm_95_133, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7269 | | { 8046 /* mtbr6 */, PPC::MTDCR, Convert__RegGPRC1_0__imm_95_134, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7270 | | { 8052 /* mtbr7 */, PPC::MTDCR, Convert__RegGPRC1_0__imm_95_135, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7271 | | { 8058 /* mtcfar */, PPC::MTSPR8, Convert__imm_95_28__RegG8RC1_0, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7272 | | { 8058 /* mtcfar */, PPC::MTSPR, Convert__imm_95_28__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7273 | | { 8065 /* mtcr */, PPC::MTCRF8, Convert__imm_95_255__RegG8RC1_0, AMFBS_None, { MCK_RegG8RC }, }, |
7274 | | { 8065 /* mtcr */, PPC::MTCRF, Convert__imm_95_255__RegGPRC1_0, AMFBS_None, { MCK_RegGPRC }, }, |
7275 | | { 8070 /* mtcrf */, PPC::MTCRF, Convert__Imm1_0__RegGPRC1_1, AMFBS_None, { MCK_Imm, MCK_RegGPRC }, }, |
7276 | | { 8076 /* mtctr */, PPC::MTSPR8, Convert__imm_95_9__RegG8RC1_0, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7277 | | { 8076 /* mtctr */, PPC::MTSPR, Convert__imm_95_9__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7278 | | { 8076 /* mtctr */, PPC::MTCTR, Convert__RegGPRC1_0, AMFBS_None, { MCK_RegGPRC }, }, |
7279 | | { 8082 /* mtdar */, PPC::MTSPR8, Convert__imm_95_19__RegG8RC1_0, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7280 | | { 8082 /* mtdar */, PPC::MTSPR, Convert__imm_95_19__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7281 | | { 8088 /* mtdbatl */, PPC::MTSPR, Convert__imm_95_537__RegGPRC1_1, AMFBS_ModernAs, { MCK_0, MCK_RegGPRC }, }, |
7282 | | { 8088 /* mtdbatl */, PPC::MTSPR, Convert__imm_95_539__RegGPRC1_1, AMFBS_ModernAs, { MCK_1, MCK_RegGPRC }, }, |
7283 | | { 8088 /* mtdbatl */, PPC::MTSPR, Convert__imm_95_541__RegGPRC1_1, AMFBS_ModernAs, { MCK_2, MCK_RegGPRC }, }, |
7284 | | { 8088 /* mtdbatl */, PPC::MTSPR, Convert__imm_95_543__RegGPRC1_1, AMFBS_ModernAs, { MCK_3, MCK_RegGPRC }, }, |
7285 | | { 8096 /* mtdbatu */, PPC::MTSPR, Convert__imm_95_536__RegGPRC1_1, AMFBS_ModernAs, { MCK_0, MCK_RegGPRC }, }, |
7286 | | { 8096 /* mtdbatu */, PPC::MTSPR, Convert__imm_95_538__RegGPRC1_1, AMFBS_ModernAs, { MCK_1, MCK_RegGPRC }, }, |
7287 | | { 8096 /* mtdbatu */, PPC::MTSPR, Convert__imm_95_540__RegGPRC1_1, AMFBS_ModernAs, { MCK_2, MCK_RegGPRC }, }, |
7288 | | { 8096 /* mtdbatu */, PPC::MTSPR, Convert__imm_95_542__RegGPRC1_1, AMFBS_ModernAs, { MCK_3, MCK_RegGPRC }, }, |
7289 | | { 8104 /* mtdccr */, PPC::MTSPR, Convert__imm_95_1018__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7290 | | { 8111 /* mtdcr */, PPC::MTDCR, Convert__RegGPRC1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_RegGPRC }, }, |
7291 | | { 8117 /* mtdear */, PPC::MTSPR, Convert__imm_95_981__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7292 | | { 8124 /* mtdec */, PPC::MTSPR8, Convert__imm_95_22__RegG8RC1_0, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7293 | | { 8124 /* mtdec */, PPC::MTSPR, Convert__imm_95_22__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7294 | | { 8130 /* mtdscr */, PPC::MTSPR8, Convert__imm_95_17__RegG8RC1_0, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7295 | | { 8130 /* mtdscr */, PPC::MTSPR, Convert__imm_95_17__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7296 | | { 8137 /* mtdsisr */, PPC::MTSPR8, Convert__imm_95_18__RegG8RC1_0, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7297 | | { 8137 /* mtdsisr */, PPC::MTSPR, Convert__imm_95_18__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7298 | | { 8145 /* mtesr */, PPC::MTSPR, Convert__imm_95_980__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7299 | | { 8151 /* mtfprd */, PPC::MTVSRD, Convert__RegF8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegG8RC }, }, |
7300 | | { 8158 /* mtfprwa */, PPC::MTVSRWA, Convert__RegF8RC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegGPRC }, }, |
7301 | | { 8166 /* mtfprwz */, PPC::MTVSRWZ, Convert__RegF8RC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegGPRC }, }, |
7302 | | { 8174 /* mtfsb0 */, PPC::MTFSB0, Convert__U5Imm1_0, AMFBS_None, { MCK_U5Imm }, }, |
7303 | | { 8181 /* mtfsb1 */, PPC::MTFSB1, Convert__U5Imm1_0, AMFBS_None, { MCK_U5Imm }, }, |
7304 | | { 8188 /* mtfsf */, PPC::MTFSF, Convert__Imm1_0__RegF8RC1_1__imm_95_0__imm_95_0, AMFBS_None, { MCK_Imm, MCK_RegF8RC }, }, |
7305 | | { 8188 /* mtfsf */, PPC::MTFSF_rec, Convert__Imm1_1__RegF8RC1_2__imm_95_0__imm_95_0, AMFBS_None, { MCK__DOT_, MCK_Imm, MCK_RegF8RC }, }, |
7306 | | { 8188 /* mtfsf */, PPC::MTFSF, Convert__Imm1_0__RegF8RC1_1__U1Imm1_2__Imm1_3, AMFBS_None, { MCK_Imm, MCK_RegF8RC, MCK_U1Imm, MCK_Imm }, }, |
7307 | | { 8188 /* mtfsf */, PPC::MTFSF_rec, Convert__Imm1_1__RegF8RC1_2__U1Imm1_3__Imm1_4, AMFBS_None, { MCK__DOT_, MCK_Imm, MCK_RegF8RC, MCK_U1Imm, MCK_Imm }, }, |
7308 | | { 8194 /* mtfsfi */, PPC::MTFSFI, Convert__U3Imm1_0__U4Imm1_1__imm_95_0, AMFBS_None, { MCK_U3Imm, MCK_U4Imm }, }, |
7309 | | { 8194 /* mtfsfi */, PPC::MTFSFI_rec, Convert__U3Imm1_1__U4Imm1_2__imm_95_0, AMFBS_None, { MCK__DOT_, MCK_U3Imm, MCK_U4Imm }, }, |
7310 | | { 8194 /* mtfsfi */, PPC::MTFSFI, Convert__U3Imm1_0__U4Imm1_1__Imm1_2, AMFBS_None, { MCK_U3Imm, MCK_U4Imm, MCK_Imm }, }, |
7311 | | { 8194 /* mtfsfi */, PPC::MTFSFI_rec, Convert__U3Imm1_1__U4Imm1_2__U1Imm1_3, AMFBS_None, { MCK__DOT_, MCK_U3Imm, MCK_U4Imm, MCK_U1Imm }, }, |
7312 | | { 8201 /* mtibatl */, PPC::MTSPR, Convert__imm_95_529__RegGPRC1_1, AMFBS_ModernAs, { MCK_0, MCK_RegGPRC }, }, |
7313 | | { 8201 /* mtibatl */, PPC::MTSPR, Convert__imm_95_531__RegGPRC1_1, AMFBS_ModernAs, { MCK_1, MCK_RegGPRC }, }, |
7314 | | { 8201 /* mtibatl */, PPC::MTSPR, Convert__imm_95_533__RegGPRC1_1, AMFBS_ModernAs, { MCK_2, MCK_RegGPRC }, }, |
7315 | | { 8201 /* mtibatl */, PPC::MTSPR, Convert__imm_95_535__RegGPRC1_1, AMFBS_ModernAs, { MCK_3, MCK_RegGPRC }, }, |
7316 | | { 8209 /* mtibatu */, PPC::MTSPR, Convert__imm_95_528__RegGPRC1_1, AMFBS_ModernAs, { MCK_0, MCK_RegGPRC }, }, |
7317 | | { 8209 /* mtibatu */, PPC::MTSPR, Convert__imm_95_530__RegGPRC1_1, AMFBS_ModernAs, { MCK_1, MCK_RegGPRC }, }, |
7318 | | { 8209 /* mtibatu */, PPC::MTSPR, Convert__imm_95_532__RegGPRC1_1, AMFBS_ModernAs, { MCK_2, MCK_RegGPRC }, }, |
7319 | | { 8209 /* mtibatu */, PPC::MTSPR, Convert__imm_95_534__RegGPRC1_1, AMFBS_ModernAs, { MCK_3, MCK_RegGPRC }, }, |
7320 | | { 8217 /* mticcr */, PPC::MTSPR, Convert__imm_95_1019__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7321 | | { 8224 /* mtlr */, PPC::MTSPR8, Convert__imm_95_8__RegG8RC1_0, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7322 | | { 8224 /* mtlr */, PPC::MTSPR, Convert__imm_95_8__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7323 | | { 8224 /* mtlr */, PPC::MTLR, Convert__RegGPRC1_0, AMFBS_None, { MCK_RegGPRC }, }, |
7324 | | { 8229 /* mtmsr */, PPC::MTMSR, Convert__RegGPRC1_0__imm_95_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7325 | | { 8229 /* mtmsr */, PPC::MTMSR, Convert__RegGPRC1_0__U1Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_U1Imm }, }, |
7326 | | { 8235 /* mtmsrd */, PPC::MTMSRD, Convert__RegGPRC1_0__imm_95_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7327 | | { 8235 /* mtmsrd */, PPC::MTMSRD, Convert__RegGPRC1_0__U1Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_U1Imm }, }, |
7328 | | { 8242 /* mtocrf */, PPC::MTOCRF, Convert__CRBitMask1_0__RegGPRC1_1, AMFBS_None, { MCK_CRBitMask, MCK_RegGPRC }, }, |
7329 | | { 8249 /* mtpid */, PPC::MTSPR, Convert__imm_95_48__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7330 | | { 8255 /* mtpmr */, PPC::MTPMR, Convert__Imm1_0__RegGPRC1_1, AMFBS_None, { MCK_Imm, MCK_RegGPRC }, }, |
7331 | | { 8261 /* mtppr */, PPC::MTSPR, Convert__imm_95_896__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7332 | | { 8267 /* mtsdr1 */, PPC::MTSPR8, Convert__imm_95_25__RegG8RC1_0, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7333 | | { 8267 /* mtsdr1 */, PPC::MTSPR, Convert__imm_95_25__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7334 | | { 8274 /* mtspefscr */, PPC::MTSPR8, Convert__imm_95_512__RegG8RC1_0, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7335 | | { 8274 /* mtspefscr */, PPC::MTSPR, Convert__imm_95_512__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7336 | | { 8284 /* mtspr */, PPC::MTUDSCR, Convert__RegGPRC1_1, AMFBS_None, { MCK_3, MCK_RegGPRC }, }, |
7337 | | { 8284 /* mtspr */, PPC::MTSPR, Convert__Imm1_0__RegGPRC1_1, AMFBS_None, { MCK_Imm, MCK_RegGPRC }, }, |
7338 | | { 8290 /* mtsprg */, PPC::MTSPR8, Convert__imm_95_272__RegG8RC1_1, AMFBS_ModernAs, { MCK_0, MCK_RegG8RC }, }, |
7339 | | { 8290 /* mtsprg */, PPC::MTSPR, Convert__imm_95_272__RegGPRC1_1, AMFBS_ModernAs, { MCK_0, MCK_RegGPRC }, }, |
7340 | | { 8290 /* mtsprg */, PPC::MTSPR8, Convert__imm_95_273__RegG8RC1_1, AMFBS_ModernAs, { MCK_1, MCK_RegG8RC }, }, |
7341 | | { 8290 /* mtsprg */, PPC::MTSPR, Convert__imm_95_273__RegGPRC1_1, AMFBS_ModernAs, { MCK_1, MCK_RegGPRC }, }, |
7342 | | { 8290 /* mtsprg */, PPC::MTSPR8, Convert__imm_95_274__RegG8RC1_1, AMFBS_ModernAs, { MCK_2, MCK_RegG8RC }, }, |
7343 | | { 8290 /* mtsprg */, PPC::MTSPR, Convert__imm_95_274__RegGPRC1_1, AMFBS_ModernAs, { MCK_2, MCK_RegGPRC }, }, |
7344 | | { 8290 /* mtsprg */, PPC::MTSPR8, Convert__imm_95_275__RegG8RC1_1, AMFBS_ModernAs, { MCK_3, MCK_RegG8RC }, }, |
7345 | | { 8290 /* mtsprg */, PPC::MTSPR, Convert__imm_95_275__RegGPRC1_1, AMFBS_ModernAs, { MCK_3, MCK_RegGPRC }, }, |
7346 | | { 8290 /* mtsprg */, PPC::MTSPR, Convert__imm_95_260__RegGPRC1_1, AMFBS_ModernAs, { MCK_4, MCK_RegGPRC }, }, |
7347 | | { 8290 /* mtsprg */, PPC::MTSPR, Convert__imm_95_261__RegGPRC1_1, AMFBS_ModernAs, { MCK_5, MCK_RegGPRC }, }, |
7348 | | { 8290 /* mtsprg */, PPC::MTSPR, Convert__imm_95_262__RegGPRC1_1, AMFBS_ModernAs, { MCK_6, MCK_RegGPRC }, }, |
7349 | | { 8290 /* mtsprg */, PPC::MTSPR, Convert__imm_95_263__RegGPRC1_1, AMFBS_ModernAs, { MCK_7, MCK_RegGPRC }, }, |
7350 | | { 8297 /* mtsprg0 */, PPC::MTSPR8, Convert__imm_95_272__RegG8RC1_0, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7351 | | { 8297 /* mtsprg0 */, PPC::MTSPR, Convert__imm_95_272__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7352 | | { 8305 /* mtsprg1 */, PPC::MTSPR8, Convert__imm_95_273__RegG8RC1_0, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7353 | | { 8305 /* mtsprg1 */, PPC::MTSPR, Convert__imm_95_273__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7354 | | { 8313 /* mtsprg2 */, PPC::MTSPR8, Convert__imm_95_274__RegG8RC1_0, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7355 | | { 8313 /* mtsprg2 */, PPC::MTSPR, Convert__imm_95_274__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7356 | | { 8321 /* mtsprg3 */, PPC::MTSPR8, Convert__imm_95_275__RegG8RC1_0, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7357 | | { 8321 /* mtsprg3 */, PPC::MTSPR, Convert__imm_95_275__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7358 | | { 8329 /* mtsprg4 */, PPC::MTSPR, Convert__imm_95_260__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7359 | | { 8337 /* mtsprg5 */, PPC::MTSPR, Convert__imm_95_261__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7360 | | { 8345 /* mtsprg6 */, PPC::MTSPR, Convert__imm_95_262__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7361 | | { 8353 /* mtsprg7 */, PPC::MTSPR, Convert__imm_95_263__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7362 | | { 8361 /* mtsr */, PPC::MTSR, Convert__RegGPRC1_1__U4Imm1_0, AMFBS_None, { MCK_U4Imm, MCK_RegGPRC }, }, |
7363 | | { 8366 /* mtsrin */, PPC::MTSRIN, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
7364 | | { 8373 /* mtsrr0 */, PPC::MTSPR8, Convert__imm_95_26__RegG8RC1_0, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7365 | | { 8373 /* mtsrr0 */, PPC::MTSPR, Convert__imm_95_26__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7366 | | { 8380 /* mtsrr1 */, PPC::MTSPR8, Convert__imm_95_27__RegG8RC1_0, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7367 | | { 8380 /* mtsrr1 */, PPC::MTSPR, Convert__imm_95_27__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7368 | | { 8387 /* mtsrr2 */, PPC::MTSPR, Convert__imm_95_990__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7369 | | { 8394 /* mtsrr3 */, PPC::MTSPR, Convert__imm_95_991__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7370 | | { 8401 /* mttbhi */, PPC::MTSPR, Convert__imm_95_988__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7371 | | { 8408 /* mttbl */, PPC::MTSPR8, Convert__imm_95_284__RegG8RC1_0, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7372 | | { 8408 /* mttbl */, PPC::MTSPR, Convert__imm_95_284__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7373 | | { 8414 /* mttblo */, PPC::MTSPR, Convert__imm_95_989__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7374 | | { 8421 /* mttbu */, PPC::MTSPR8, Convert__imm_95_285__RegG8RC1_0, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7375 | | { 8421 /* mttbu */, PPC::MTSPR, Convert__imm_95_285__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7376 | | { 8427 /* mttcr */, PPC::MTSPR, Convert__imm_95_986__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7377 | | { 8433 /* mtuamr */, PPC::MTSPR8, Convert__imm_95_13__RegG8RC1_0, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7378 | | { 8433 /* mtuamr */, PPC::MTSPR, Convert__imm_95_13__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7379 | | { 8440 /* mtudscr */, PPC::MTSPR8, Convert__imm_95_3__RegG8RC1_0, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
7380 | | { 8440 /* mtudscr */, PPC::MTUDSCR, Convert__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7381 | | { 8440 /* mtudscr */, PPC::MTSPR, Convert__imm_95_3__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
7382 | | { 8448 /* mtvrd */, PPC::MTVRD, Convert__RegVRRC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegG8RC }, }, |
7383 | | { 8454 /* mtvrsave */, PPC::MTVRSAVE, Convert__RegGPRC1_0, AMFBS_None, { MCK_RegGPRC }, }, |
7384 | | { 8463 /* mtvrwa */, PPC::MTVRWA, Convert__RegVRRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegGPRC }, }, |
7385 | | { 8470 /* mtvrwz */, PPC::MTVRWZ, Convert__RegVRRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegGPRC }, }, |
7386 | | { 8477 /* mtvscr */, PPC::MTVSCR, Convert__RegVRRC1_0, AMFBS_None, { MCK_RegVRRC }, }, |
7387 | | { 8484 /* mtvsrbm */, PPC::MTVSRBM, Convert__RegVRRC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegG8RC }, }, |
7388 | | { 8492 /* mtvsrbmi */, PPC::MTVSRBMI, Convert__RegVRRC1_0__U16Imm1_1, AMFBS_None, { MCK_RegVRRC, MCK_U16Imm }, }, |
7389 | | { 8501 /* mtvsrd */, PPC::MTVSRD, Convert__RegVSFRC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegG8RC }, }, |
7390 | | { 8508 /* mtvsrdd */, PPC::MTVSRDD, Convert__RegVSRC1_0__RegG8RCNoX01_1__RegG8RC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegG8RCNoX0, MCK_RegG8RC }, }, |
7391 | | { 8516 /* mtvsrdm */, PPC::MTVSRDM, Convert__RegVRRC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegG8RC }, }, |
7392 | | { 8524 /* mtvsrhm */, PPC::MTVSRHM, Convert__RegVRRC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegG8RC }, }, |
7393 | | { 8532 /* mtvsrqm */, PPC::MTVSRQM, Convert__RegVRRC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegG8RC }, }, |
7394 | | { 8540 /* mtvsrwa */, PPC::MTVSRWA, Convert__RegVSFRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegGPRC }, }, |
7395 | | { 8548 /* mtvsrwm */, PPC::MTVSRWM, Convert__RegVRRC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegG8RC }, }, |
7396 | | { 8556 /* mtvsrws */, PPC::MTVSRWS, Convert__RegVSRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegGPRC }, }, |
7397 | | { 8564 /* mtvsrwz */, PPC::MTVSRWZ, Convert__RegVSFRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegGPRC }, }, |
7398 | | { 8572 /* mtxer */, PPC::MTSPR8, Convert__imm_95_1__RegG8RC1_0, AMFBS_None, { MCK_RegG8RC }, }, |
7399 | | { 8572 /* mtxer */, PPC::MTSPR, Convert__imm_95_1__RegGPRC1_0, AMFBS_None, { MCK_RegGPRC }, }, |
7400 | | { 8578 /* mulhd */, PPC::MULHD, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
7401 | | { 8578 /* mulhd */, PPC::MULHD_rec, Convert__RegG8RC1_1__RegG8RC1_2__RegG8RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
7402 | | { 8584 /* mulhdu */, PPC::MULHDU, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
7403 | | { 8584 /* mulhdu */, PPC::MULHDU_rec, Convert__RegG8RC1_1__RegG8RC1_2__RegG8RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
7404 | | { 8591 /* mulhw */, PPC::MULHW, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7405 | | { 8591 /* mulhw */, PPC::MULHW_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7406 | | { 8597 /* mulhwu */, PPC::MULHWU, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7407 | | { 8597 /* mulhwu */, PPC::MULHWU_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7408 | | { 8604 /* mulld */, PPC::MULLD, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
7409 | | { 8604 /* mulld */, PPC::MULLD_rec, Convert__RegG8RC1_1__RegG8RC1_2__RegG8RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
7410 | | { 8610 /* mulldo */, PPC::MULLDO, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
7411 | | { 8610 /* mulldo */, PPC::MULLDO_rec, Convert__RegG8RC1_1__RegG8RC1_2__RegG8RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
7412 | | { 8617 /* mulli */, PPC::MULLI, Convert__RegGPRC1_0__RegGPRC1_1__S16Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_S16Imm }, }, |
7413 | | { 8623 /* mullw */, PPC::MULLW, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7414 | | { 8623 /* mullw */, PPC::MULLW_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7415 | | { 8629 /* mullwo */, PPC::MULLWO, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7416 | | { 8629 /* mullwo */, PPC::MULLWO_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7417 | | { 8636 /* nand */, PPC::NAND, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7418 | | { 8636 /* nand */, PPC::NAND_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7419 | | { 8641 /* nap */, PPC::NAP, Convert_NoOperands, AMFBS_None, { }, }, |
7420 | | { 8645 /* neg */, PPC::NEG, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
7421 | | { 8645 /* neg */, PPC::NEG_rec, Convert__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC }, }, |
7422 | | { 8649 /* nego */, PPC::NEGO, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
7423 | | { 8649 /* nego */, PPC::NEGO_rec, Convert__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC }, }, |
7424 | | { 8654 /* nop */, PPC::NOP, Convert_NoOperands, AMFBS_None, { }, }, |
7425 | | { 8654 /* nop */, PPC::ORI, Convert__regR0__regR0__imm_95_0, AMFBS_None, { }, }, |
7426 | | { 8654 /* nop */, PPC::ORI8, Convert__regX0__regX0__imm_95_0, AMFBS_None, { }, }, |
7427 | | { 8658 /* nor */, PPC::NOR, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7428 | | { 8658 /* nor */, PPC::NOR_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7429 | | { 8662 /* not */, PPC::NOR8, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
7430 | | { 8662 /* not */, PPC::NOR, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
7431 | | { 8662 /* not */, PPC::NOR8_rec, Convert__RegG8RC1_1__RegG8RC1_2__RegG8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC }, }, |
7432 | | { 8662 /* not */, PPC::NOR_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC }, }, |
7433 | | { 8666 /* or */, PPC::OR, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7434 | | { 8666 /* or */, PPC::OR_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7435 | | { 8669 /* orc */, PPC::ORC, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7436 | | { 8669 /* orc */, PPC::ORC_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7437 | | { 8673 /* ori */, PPC::ORI, Convert__RegGPRC1_0__RegGPRC1_1__U16Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U16Imm }, }, |
7438 | | { 8677 /* oris */, PPC::ORIS, Convert__RegGPRC1_0__RegGPRC1_1__U16Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U16Imm }, }, |
7439 | | { 8682 /* paddi */, PPC::PADDI8, Convert__RegG8RC1_0__RegG8RCNoX01_1__S34Imm1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RCNoX0, MCK_S34Imm }, }, |
7440 | | { 8682 /* paddi */, PPC::PADDIpc, Convert__RegGPRC1_0__ImmZero1_1__S34Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_ImmZero, MCK_S34Imm, MCK_1 }, }, |
7441 | | { 8682 /* paddi */, PPC::PADDI, Convert__RegGPRC1_0__RegGPRCNoR01_1__S34Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRCNoR0, MCK_S34Imm, MCK_0 }, }, |
7442 | | { 8688 /* paste */, PPC::CP_PASTE_rec, Convert__RegGPRC1_1__RegGPRC1_2__imm_95_1, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC }, }, |
7443 | | { 8688 /* paste */, PPC::CP_PASTE_rec, Convert__RegGPRC1_1__RegGPRC1_2__U1Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_U1Imm }, }, |
7444 | | { 8694 /* pause_short */, PPC::WAITP10, Convert__imm_95_2__imm_95_0, AMFBS_None, { }, }, |
7445 | | { 8706 /* pdepd */, PPC::PDEPD, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
7446 | | { 8712 /* pextd */, PPC::PEXTD, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
7447 | | { 8718 /* phwsync */, PPC::SYNCP10, Convert__imm_95_4__imm_95_0, AMFBS_None, { }, }, |
7448 | | { 8726 /* pla */, PPC::PLA8pc, Convert__RegG8RC1_0__S34Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S34Imm }, }, |
7449 | | { 8726 /* pla */, PPC::PLApc, Convert__RegGPRC1_0__S34Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S34Imm }, }, |
7450 | | { 8726 /* pla */, PPC::PLA8, Convert__RegG8RC1_0__RegG8RCNoX01_2__S34Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S34Imm, MCK_RegG8RCNoX0 }, }, |
7451 | | { 8726 /* pla */, PPC::PLA, Convert__RegGPRC1_0__RegGPRCNoR01_2__S34Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S34Imm, MCK_RegGPRCNoR0 }, }, |
7452 | | { 8730 /* plbz */, PPC::PLBZonlypc, Convert__RegGPRC1_0__S34Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S34Imm }, }, |
7453 | | { 8730 /* plbz */, PPC::PLBZnopc, Convert__RegGPRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
7454 | | { 8730 /* plbz */, PPC::PLBZpc, Convert__RegGPRC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
7455 | | { 8730 /* plbz */, PPC::PLBZ, Convert__RegGPRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
7456 | | { 8735 /* pld */, PPC::PLDonlypc, Convert__RegG8RC1_0__S34Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S34Imm }, }, |
7457 | | { 8735 /* pld */, PPC::PLDnopc, Convert__RegG8RC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegG8RC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
7458 | | { 8735 /* pld */, PPC::PLDpc, Convert__RegG8RC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegG8RC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
7459 | | { 8735 /* pld */, PPC::PLD, Convert__RegG8RC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegG8RC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
7460 | | { 8739 /* plfd */, PPC::PLFDonlypc, Convert__RegF8RC1_0__S34Imm1_1, AMFBS_None, { MCK_RegF8RC, MCK_S34Imm }, }, |
7461 | | { 8739 /* plfd */, PPC::PLFDnopc, Convert__RegF8RC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegF8RC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
7462 | | { 8739 /* plfd */, PPC::PLFDpc, Convert__RegF8RC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegF8RC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
7463 | | { 8739 /* plfd */, PPC::PLFD, Convert__RegF8RC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegF8RC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
7464 | | { 8744 /* plfs */, PPC::PLFSonlypc, Convert__RegF4RC1_0__S34Imm1_1, AMFBS_None, { MCK_RegF4RC, MCK_S34Imm }, }, |
7465 | | { 8744 /* plfs */, PPC::PLFSnopc, Convert__RegF4RC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegF4RC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
7466 | | { 8744 /* plfs */, PPC::PLFSpc, Convert__RegF4RC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegF4RC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
7467 | | { 8744 /* plfs */, PPC::PLFS, Convert__RegF4RC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegF4RC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
7468 | | { 8749 /* plha */, PPC::PLHAonlypc, Convert__RegGPRC1_0__S34Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S34Imm }, }, |
7469 | | { 8749 /* plha */, PPC::PLHAnopc, Convert__RegGPRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
7470 | | { 8749 /* plha */, PPC::PLHApc, Convert__RegGPRC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
7471 | | { 8749 /* plha */, PPC::PLHA, Convert__RegGPRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
7472 | | { 8754 /* plhz */, PPC::PLHZonlypc, Convert__RegGPRC1_0__S34Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S34Imm }, }, |
7473 | | { 8754 /* plhz */, PPC::PLHZnopc, Convert__RegGPRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
7474 | | { 8754 /* plhz */, PPC::PLHZpc, Convert__RegGPRC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
7475 | | { 8754 /* plhz */, PPC::PLHZ, Convert__RegGPRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
7476 | | { 8759 /* pli */, PPC::PLI, Convert__RegGPRC1_0__S34Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S34Imm }, }, |
7477 | | { 8763 /* plwa */, PPC::PLWAonlypc, Convert__RegGPRC1_0__S34Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S34Imm }, }, |
7478 | | { 8763 /* plwa */, PPC::PLWAnopc, Convert__RegGPRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
7479 | | { 8763 /* plwa */, PPC::PLWApc, Convert__RegGPRC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
7480 | | { 8763 /* plwa */, PPC::PLWA, Convert__RegGPRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
7481 | | { 8768 /* plwsync */, PPC::SYNCP10, Convert__imm_95_5__imm_95_0, AMFBS_None, { }, }, |
7482 | | { 8776 /* plwz */, PPC::PLWZonlypc, Convert__RegGPRC1_0__S34Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S34Imm }, }, |
7483 | | { 8776 /* plwz */, PPC::PLWZnopc, Convert__RegGPRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
7484 | | { 8776 /* plwz */, PPC::PLWZpc, Convert__RegGPRC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
7485 | | { 8776 /* plwz */, PPC::PLWZ, Convert__RegGPRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
7486 | | { 8781 /* plxsd */, PPC::PLXSDonlypc, Convert__RegVFRC1_0__S34Imm1_1, AMFBS_None, { MCK_RegVFRC, MCK_S34Imm }, }, |
7487 | | { 8781 /* plxsd */, PPC::PLXSDnopc, Convert__RegVFRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVFRC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
7488 | | { 8781 /* plxsd */, PPC::PLXSDpc, Convert__RegVFRC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegVFRC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
7489 | | { 8781 /* plxsd */, PPC::PLXSD, Convert__RegVFRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVFRC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
7490 | | { 8787 /* plxssp */, PPC::PLXSSPonlypc, Convert__RegVFRC1_0__S34Imm1_1, AMFBS_None, { MCK_RegVFRC, MCK_S34Imm }, }, |
7491 | | { 8787 /* plxssp */, PPC::PLXSSPnopc, Convert__RegVFRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVFRC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
7492 | | { 8787 /* plxssp */, PPC::PLXSSPpc, Convert__RegVFRC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegVFRC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
7493 | | { 8787 /* plxssp */, PPC::PLXSSP, Convert__RegVFRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVFRC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
7494 | | { 8794 /* plxv */, PPC::PLXVonlypc, Convert__RegVSRC1_0__S34Imm1_1, AMFBS_None, { MCK_RegVSRC, MCK_S34Imm }, }, |
7495 | | { 8794 /* plxv */, PPC::PLXVnopc, Convert__RegVSRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVSRC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
7496 | | { 8794 /* plxv */, PPC::PLXVpc, Convert__RegVSRC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegVSRC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
7497 | | { 8794 /* plxv */, PPC::PLXV, Convert__RegVSRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVSRC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
7498 | | { 8799 /* plxvp */, PPC::PLXVPonlypc, Convert__RegVSRpRC1_0__S34Imm1_1, AMFBS_None, { MCK_RegVSRpRC, MCK_S34Imm }, }, |
7499 | | { 8799 /* plxvp */, PPC::PLXVPnopc, Convert__RegVSRpRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVSRpRC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
7500 | | { 8799 /* plxvp */, PPC::PLXVPpc, Convert__RegVSRpRC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegVSRpRC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
7501 | | { 8799 /* plxvp */, PPC::PLXVP, Convert__RegVSRpRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVSRpRC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
7502 | | { 8805 /* pmxvbf16ger2 */, PPC::PMXVBF16GER2, Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U2Imm1_5, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm, MCK_U2Imm }, }, |
7503 | | { 8818 /* pmxvbf16ger2nn */, PPC::PMXVBF16GER2NN, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U2Imm1_5, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm, MCK_U2Imm }, }, |
7504 | | { 8833 /* pmxvbf16ger2np */, PPC::PMXVBF16GER2NP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U2Imm1_5, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm, MCK_U2Imm }, }, |
7505 | | { 8848 /* pmxvbf16ger2pn */, PPC::PMXVBF16GER2PN, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U2Imm1_5, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm, MCK_U2Imm }, }, |
7506 | | { 8863 /* pmxvbf16ger2pp */, PPC::PMXVBF16GER2PP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U2Imm1_5, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm, MCK_U2Imm }, }, |
7507 | | { 8878 /* pmxvf16ger2 */, PPC::PMXVF16GER2, Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U2Imm1_5, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm, MCK_U2Imm }, }, |
7508 | | { 8890 /* pmxvf16ger2nn */, PPC::PMXVF16GER2NN, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U2Imm1_5, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm, MCK_U2Imm }, }, |
7509 | | { 8904 /* pmxvf16ger2np */, PPC::PMXVF16GER2NP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U2Imm1_5, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm, MCK_U2Imm }, }, |
7510 | | { 8918 /* pmxvf16ger2pn */, PPC::PMXVF16GER2PN, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U2Imm1_5, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm, MCK_U2Imm }, }, |
7511 | | { 8932 /* pmxvf16ger2pp */, PPC::PMXVF16GER2PP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U2Imm1_5, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm, MCK_U2Imm }, }, |
7512 | | { 8946 /* pmxvf32ger */, PPC::PMXVF32GER, Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm }, }, |
7513 | | { 8957 /* pmxvf32gernn */, PPC::PMXVF32GERNN, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm }, }, |
7514 | | { 8970 /* pmxvf32gernp */, PPC::PMXVF32GERNP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm }, }, |
7515 | | { 8983 /* pmxvf32gerpn */, PPC::PMXVF32GERPN, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm }, }, |
7516 | | { 8996 /* pmxvf32gerpp */, PPC::PMXVF32GERPP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm }, }, |
7517 | | { 9009 /* pmxvf64ger */, PPC::PMXVF64GER, Convert__RegACCRC1_0__RegVSRpEvenRC1_1__RegVSRC1_2__U4Imm1_3__U2Imm1_4, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRpEvenRC, MCK_RegVSRC, MCK_U4Imm, MCK_U2Imm }, }, |
7518 | | { 9020 /* pmxvf64gernn */, PPC::PMXVF64GERNN, Convert__RegACCRC1_0__Tie0_1_1__RegVSRpEvenRC1_1__RegVSRC1_2__U4Imm1_3__U2Imm1_4, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRpEvenRC, MCK_RegVSRC, MCK_U4Imm, MCK_U2Imm }, }, |
7519 | | { 9033 /* pmxvf64gernp */, PPC::PMXVF64GERNP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRpEvenRC1_1__RegVSRC1_2__U4Imm1_3__U2Imm1_4, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRpEvenRC, MCK_RegVSRC, MCK_U4Imm, MCK_U2Imm }, }, |
7520 | | { 9046 /* pmxvf64gerpn */, PPC::PMXVF64GERPN, Convert__RegACCRC1_0__Tie0_1_1__RegVSRpEvenRC1_1__RegVSRC1_2__U4Imm1_3__U2Imm1_4, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRpEvenRC, MCK_RegVSRC, MCK_U4Imm, MCK_U2Imm }, }, |
7521 | | { 9059 /* pmxvf64gerpp */, PPC::PMXVF64GERPP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRpEvenRC1_1__RegVSRC1_2__U4Imm1_3__U2Imm1_4, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRpEvenRC, MCK_RegVSRC, MCK_U4Imm, MCK_U2Imm }, }, |
7522 | | { 9072 /* pmxvi16ger2 */, PPC::PMXVI16GER2, Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U2Imm1_5, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm, MCK_U2Imm }, }, |
7523 | | { 9084 /* pmxvi16ger2pp */, PPC::PMXVI16GER2PP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U2Imm1_5, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm, MCK_U2Imm }, }, |
7524 | | { 9098 /* pmxvi16ger2s */, PPC::PMXVI16GER2S, Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U2Imm1_5, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm, MCK_U2Imm }, }, |
7525 | | { 9111 /* pmxvi16ger2spp */, PPC::PMXVI16GER2SPP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U2Imm1_5, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm, MCK_U2Imm }, }, |
7526 | | { 9126 /* pmxvi4ger8 */, PPC::PMXVI4GER8, Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U8Imm1_5, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm, MCK_U8Imm }, }, |
7527 | | { 9137 /* pmxvi4ger8pp */, PPC::PMXVI4GER8PP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U8Imm1_5, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm, MCK_U8Imm }, }, |
7528 | | { 9150 /* pmxvi8ger4 */, PPC::PMXVI8GER4, Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U4Imm1_5, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm, MCK_U4Imm }, }, |
7529 | | { 9161 /* pmxvi8ger4pp */, PPC::PMXVI8GER4PP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U4Imm1_5, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm, MCK_U4Imm }, }, |
7530 | | { 9174 /* pmxvi8ger4spp */, PPC::PMXVI8GER4SPP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U4Imm1_5, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm, MCK_U4Imm }, }, |
7531 | | { 9188 /* popcntb */, PPC::POPCNTB, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
7532 | | { 9196 /* popcntd */, PPC::POPCNTD, Convert__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
7533 | | { 9204 /* popcntw */, PPC::POPCNTW, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
7534 | | { 9212 /* pstb */, PPC::PSTBonlypc, Convert__RegGPRC1_0__S34Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S34Imm }, }, |
7535 | | { 9212 /* pstb */, PPC::PSTBnopc, Convert__RegGPRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
7536 | | { 9212 /* pstb */, PPC::PSTBpc, Convert__RegGPRC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
7537 | | { 9212 /* pstb */, PPC::PSTB, Convert__RegGPRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
7538 | | { 9217 /* pstd */, PPC::PSTDonlypc, Convert__RegG8RC1_0__S34Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S34Imm }, }, |
7539 | | { 9217 /* pstd */, PPC::PSTDnopc, Convert__RegG8RC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegG8RC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
7540 | | { 9217 /* pstd */, PPC::PSTDpc, Convert__RegG8RC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegG8RC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
7541 | | { 9217 /* pstd */, PPC::PSTD, Convert__RegG8RC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegG8RC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
7542 | | { 9222 /* pstfd */, PPC::PSTFDonlypc, Convert__RegF8RC1_0__S34Imm1_1, AMFBS_None, { MCK_RegF8RC, MCK_S34Imm }, }, |
7543 | | { 9222 /* pstfd */, PPC::PSTFDnopc, Convert__RegF8RC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegF8RC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
7544 | | { 9222 /* pstfd */, PPC::PSTFDpc, Convert__RegF8RC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegF8RC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
7545 | | { 9222 /* pstfd */, PPC::PSTFD, Convert__RegF8RC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegF8RC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
7546 | | { 9228 /* pstfs */, PPC::PSTFSonlypc, Convert__RegF4RC1_0__S34Imm1_1, AMFBS_None, { MCK_RegF4RC, MCK_S34Imm }, }, |
7547 | | { 9228 /* pstfs */, PPC::PSTFSnopc, Convert__RegF4RC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegF4RC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
7548 | | { 9228 /* pstfs */, PPC::PSTFSpc, Convert__RegF4RC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegF4RC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
7549 | | { 9228 /* pstfs */, PPC::PSTFS, Convert__RegF4RC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegF4RC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
7550 | | { 9234 /* psth */, PPC::PSTHonlypc, Convert__RegGPRC1_0__S34Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S34Imm }, }, |
7551 | | { 9234 /* psth */, PPC::PSTHnopc, Convert__RegGPRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
7552 | | { 9234 /* psth */, PPC::PSTHpc, Convert__RegGPRC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
7553 | | { 9234 /* psth */, PPC::PSTH, Convert__RegGPRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
7554 | | { 9239 /* pstw */, PPC::PSTWonlypc, Convert__RegGPRC1_0__S34Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S34Imm }, }, |
7555 | | { 9239 /* pstw */, PPC::PSTWnopc, Convert__RegGPRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
7556 | | { 9239 /* pstw */, PPC::PSTWpc, Convert__RegGPRC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
7557 | | { 9239 /* pstw */, PPC::PSTW, Convert__RegGPRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
7558 | | { 9244 /* pstxsd */, PPC::PSTXSDonlypc, Convert__RegVFRC1_0__S34Imm1_1, AMFBS_None, { MCK_RegVFRC, MCK_S34Imm }, }, |
7559 | | { 9244 /* pstxsd */, PPC::PSTXSDnopc, Convert__RegVFRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVFRC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
7560 | | { 9244 /* pstxsd */, PPC::PSTXSDpc, Convert__RegVFRC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegVFRC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
7561 | | { 9244 /* pstxsd */, PPC::PSTXSD, Convert__RegVFRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVFRC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
7562 | | { 9251 /* pstxssp */, PPC::PSTXSSPonlypc, Convert__RegVFRC1_0__S34Imm1_1, AMFBS_None, { MCK_RegVFRC, MCK_S34Imm }, }, |
7563 | | { 9251 /* pstxssp */, PPC::PSTXSSPnopc, Convert__RegVFRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVFRC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
7564 | | { 9251 /* pstxssp */, PPC::PSTXSSPpc, Convert__RegVFRC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegVFRC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
7565 | | { 9251 /* pstxssp */, PPC::PSTXSSP, Convert__RegVFRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVFRC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
7566 | | { 9259 /* pstxv */, PPC::PSTXVonlypc, Convert__RegVSRC1_0__S34Imm1_1, AMFBS_None, { MCK_RegVSRC, MCK_S34Imm }, }, |
7567 | | { 9259 /* pstxv */, PPC::PSTXVnopc, Convert__RegVSRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVSRC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
7568 | | { 9259 /* pstxv */, PPC::PSTXVpc, Convert__RegVSRC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegVSRC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
7569 | | { 9259 /* pstxv */, PPC::PSTXV, Convert__RegVSRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVSRC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
7570 | | { 9265 /* pstxvp */, PPC::PSTXVPonlypc, Convert__RegVSRpRC1_0__S34Imm1_1, AMFBS_None, { MCK_RegVSRpRC, MCK_S34Imm }, }, |
7571 | | { 9265 /* pstxvp */, PPC::PSTXVPnopc, Convert__RegVSRpRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVSRpRC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
7572 | | { 9265 /* pstxvp */, PPC::PSTXVPpc, Convert__RegVSRpRC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegVSRpRC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
7573 | | { 9265 /* pstxvp */, PPC::PSTXVP, Convert__RegVSRpRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVSRpRC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
7574 | | { 9272 /* psubi */, PPC::PSUBI, Convert__RegG8RC1_0__RegG8RCNoX01_1__S34Imm1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RCNoX0, MCK_S34Imm }, }, |
7575 | | { 9278 /* ptesync */, PPC::SYNCP10, Convert__imm_95_2__imm_95_0, AMFBS_None, { }, }, |
7576 | | { 9278 /* ptesync */, PPC::SYNC, Convert__imm_95_2, AMFBS_None, { }, }, |
7577 | | { 9286 /* rfci */, PPC::RFCI, Convert_NoOperands, AMFBS_None, { }, }, |
7578 | | { 9291 /* rfdi */, PPC::RFDI, Convert_NoOperands, AMFBS_None, { }, }, |
7579 | | { 9296 /* rfebb */, PPC::RFEBB, Convert__imm_95_1, AMFBS_None, { }, }, |
7580 | | { 9296 /* rfebb */, PPC::RFEBB, Convert__U1Imm1_0, AMFBS_None, { MCK_U1Imm }, }, |
7581 | | { 9302 /* rfi */, PPC::RFI, Convert_NoOperands, AMFBS_None, { }, }, |
7582 | | { 9306 /* rfid */, PPC::RFID, Convert_NoOperands, AMFBS_None, { }, }, |
7583 | | { 9311 /* rfmci */, PPC::RFMCI, Convert_NoOperands, AMFBS_None, { }, }, |
7584 | | { 9317 /* rldcl */, PPC::RLDCL, Convert__RegG8RC1_0__RegG8RC1_1__RegGPRC1_2__U6Imm1_3, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegGPRC, MCK_U6Imm }, }, |
7585 | | { 9317 /* rldcl */, PPC::RLDCL_rec, Convert__RegG8RC1_1__RegG8RC1_2__RegGPRC1_3__U6Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_RegGPRC, MCK_U6Imm }, }, |
7586 | | { 9323 /* rldcr */, PPC::RLDCR, Convert__RegG8RC1_0__RegG8RC1_1__RegGPRC1_2__U6Imm1_3, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegGPRC, MCK_U6Imm }, }, |
7587 | | { 9323 /* rldcr */, PPC::RLDCR_rec, Convert__RegG8RC1_1__RegG8RC1_2__RegGPRC1_3__U6Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_RegGPRC, MCK_U6Imm }, }, |
7588 | | { 9329 /* rldic */, PPC::RLDIC, Convert__RegG8RC1_0__RegG8RC1_1__U6Imm1_2__U6Imm1_3, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm, MCK_U6Imm }, }, |
7589 | | { 9329 /* rldic */, PPC::RLDIC_rec, Convert__RegG8RC1_1__RegG8RC1_2__U6Imm1_3__U6Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm, MCK_U6Imm }, }, |
7590 | | { 9335 /* rldicl */, PPC::RLDICL, Convert__RegG8RC1_0__RegG8RC1_1__U6Imm1_2__U6Imm1_3, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm, MCK_U6Imm }, }, |
7591 | | { 9335 /* rldicl */, PPC::RLDICL_rec, Convert__RegG8RC1_1__RegG8RC1_2__U6Imm1_3__U6Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm, MCK_U6Imm }, }, |
7592 | | { 9342 /* rldicr */, PPC::RLDICR, Convert__RegG8RC1_0__RegG8RC1_1__U6Imm1_2__U6Imm1_3, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm, MCK_U6Imm }, }, |
7593 | | { 9342 /* rldicr */, PPC::RLDICR_rec, Convert__RegG8RC1_1__RegG8RC1_2__U6Imm1_3__U6Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm, MCK_U6Imm }, }, |
7594 | | { 9349 /* rldimi */, PPC::RLDIMI, Convert__RegG8RC1_0__Tie0_1_1__RegG8RC1_1__U6Imm1_2__U6Imm1_3, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm, MCK_U6Imm }, }, |
7595 | | { 9349 /* rldimi */, PPC::RLDIMI_rec, Convert__RegG8RC1_1__Tie0_1_1__RegG8RC1_2__U6Imm1_3__U6Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm, MCK_U6Imm }, }, |
7596 | | { 9356 /* rlwimi */, PPC::RLWIMIbm, Convert__RegG8RC1_0__RegG8RC1_1__U5Imm1_2__Imm1_3, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U5Imm, MCK_Imm }, }, |
7597 | | { 9356 /* rlwimi */, PPC::RLWIMIbm_rec, Convert__RegG8RC1_1__RegG8RC1_2__U5Imm1_3__Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U5Imm, MCK_Imm }, }, |
7598 | | { 9356 /* rlwimi */, PPC::RLWIMI, Convert__RegGPRC1_0__Tie0_1_1__RegGPRC1_1__U5Imm1_2__U5Imm1_3__U5Imm1_4, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm, MCK_U5Imm, MCK_U5Imm }, }, |
7599 | | { 9356 /* rlwimi */, PPC::RLWIMI_rec, Convert__RegGPRC1_1__Tie0_1_1__RegGPRC1_2__U5Imm1_3__U5Imm1_4__U5Imm1_5, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm, MCK_U5Imm, MCK_U5Imm }, }, |
7600 | | { 9363 /* rlwinm */, PPC::RLWINMbm, Convert__RegG8RC1_0__RegG8RC1_1__U5Imm1_2__Imm1_3, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U5Imm, MCK_Imm }, }, |
7601 | | { 9363 /* rlwinm */, PPC::RLWINMbm_rec, Convert__RegG8RC1_1__RegG8RC1_2__U5Imm1_3__Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U5Imm, MCK_Imm }, }, |
7602 | | { 9363 /* rlwinm */, PPC::RLWINM, Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2__U5Imm1_3__U5Imm1_4, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm, MCK_U5Imm, MCK_U5Imm }, }, |
7603 | | { 9363 /* rlwinm */, PPC::RLWINM_rec, Convert__RegGPRC1_1__RegGPRC1_2__U5Imm1_3__U5Imm1_4__U5Imm1_5, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm, MCK_U5Imm, MCK_U5Imm }, }, |
7604 | | { 9370 /* rlwnm */, PPC::RLWNMbm, Convert__RegG8RC1_0__RegG8RC1_1__U5Imm1_2__Imm1_3, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U5Imm, MCK_Imm }, }, |
7605 | | { 9370 /* rlwnm */, PPC::RLWNMbm_rec, Convert__RegG8RC1_1__RegG8RC1_2__U5Imm1_3__Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U5Imm, MCK_Imm }, }, |
7606 | | { 9370 /* rlwnm */, PPC::RLWNM, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2__U5Imm1_3__U5Imm1_4, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm, MCK_U5Imm }, }, |
7607 | | { 9370 /* rlwnm */, PPC::RLWNM_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3__U5Imm1_4__U5Imm1_5, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm, MCK_U5Imm }, }, |
7608 | | { 9376 /* rotld */, PPC::RLDCL, Convert__RegG8RC1_0__RegG8RC1_1__RegGPRC1_2__imm_95_0, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegGPRC }, }, |
7609 | | { 9376 /* rotld */, PPC::RLDCL_rec, Convert__RegG8RC1_1__RegG8RC1_2__RegGPRC1_3__imm_95_0, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_RegGPRC }, }, |
7610 | | { 9382 /* rotldi */, PPC::RLDICL, Convert__RegG8RC1_0__RegG8RC1_1__U6Imm1_2__imm_95_0, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm }, }, |
7611 | | { 9382 /* rotldi */, PPC::RLDICL_32_64, Convert__RegG8RC1_0__RegGPRC1_1__U6Imm1_2__imm_95_0, AMFBS_None, { MCK_RegG8RC, MCK_RegGPRC, MCK_U6Imm }, }, |
7612 | | { 9382 /* rotldi */, PPC::RLDICL_rec, Convert__RegG8RC1_1__RegG8RC1_2__U6Imm1_3__imm_95_0, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm }, }, |
7613 | | { 9389 /* rotlw */, PPC::RLWNM8, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2__imm_95_0__imm_95_31, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
7614 | | { 9389 /* rotlw */, PPC::RLWNM, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2__imm_95_0__imm_95_31, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7615 | | { 9389 /* rotlw */, PPC::RLWNM8_rec, Convert__RegG8RC1_1__RegG8RC1_2__RegG8RC1_3__imm_95_0__imm_95_31, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
7616 | | { 9389 /* rotlw */, PPC::RLWNM_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3__imm_95_0__imm_95_31, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7617 | | { 9395 /* rotlwi */, PPC::RLWINM8, Convert__RegG8RC1_0__RegG8RC1_1__U5Imm1_2__imm_95_0__imm_95_31, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U5Imm }, }, |
7618 | | { 9395 /* rotlwi */, PPC::RLWINM, Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2__imm_95_0__imm_95_31, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm }, }, |
7619 | | { 9395 /* rotlwi */, PPC::RLWINM8_rec, Convert__RegG8RC1_1__RegG8RC1_2__U5Imm1_3__imm_95_0__imm_95_31, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U5Imm }, }, |
7620 | | { 9395 /* rotlwi */, PPC::RLWINM_rec, Convert__RegGPRC1_1__RegGPRC1_2__U5Imm1_3__imm_95_0__imm_95_31, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm }, }, |
7621 | | { 9402 /* rotrdi */, PPC::ROTRDI, Convert__RegG8RC1_0__RegG8RC1_1__U6Imm1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm }, }, |
7622 | | { 9402 /* rotrdi */, PPC::ROTRDI_rec, Convert__RegG8RC1_1__RegG8RC1_2__U6Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm }, }, |
7623 | | { 9409 /* rotrwi */, PPC::ROTRWI, Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm }, }, |
7624 | | { 9409 /* rotrwi */, PPC::ROTRWI_rec, Convert__RegGPRC1_1__RegGPRC1_2__U5Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm }, }, |
7625 | | { 9416 /* sc */, PPC::SC, Convert__imm_95_0, AMFBS_None, { }, }, |
7626 | | { 9416 /* sc */, PPC::SC, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
7627 | | { 9419 /* scv */, PPC::SCV, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
7628 | | { 9423 /* setb */, PPC::SETB, Convert__RegGPRC1_0__RegCRRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegCRRC }, }, |
7629 | | { 9428 /* setbc */, PPC::SETBC, Convert__RegGPRC1_0__RegCRBITRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegCRBITRC }, }, |
7630 | | { 9434 /* setbcr */, PPC::SETBCR, Convert__RegGPRC1_0__RegCRBITRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegCRBITRC }, }, |
7631 | | { 9441 /* setnbc */, PPC::SETNBC, Convert__RegGPRC1_0__RegCRBITRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegCRBITRC }, }, |
7632 | | { 9448 /* setnbcr */, PPC::SETNBCR, Convert__RegGPRC1_0__RegCRBITRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegCRBITRC }, }, |
7633 | | { 9456 /* slbfee */, PPC::SLBFEE_rec, Convert__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC }, }, |
7634 | | { 9463 /* slbia */, PPC::SLBIA, Convert_NoOperands, AMFBS_None, { }, }, |
7635 | | { 9469 /* slbie */, PPC::SLBIE, Convert__RegGPRC1_0, AMFBS_None, { MCK_RegGPRC }, }, |
7636 | | { 9475 /* slbieg */, PPC::SLBIEG, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
7637 | | { 9482 /* slbmfee */, PPC::SLBMFEE, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
7638 | | { 9490 /* slbmfev */, PPC::SLBMFEV, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
7639 | | { 9498 /* slbmte */, PPC::SLBMTE, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
7640 | | { 9505 /* slbsync */, PPC::SLBSYNC, Convert_NoOperands, AMFBS_None, { }, }, |
7641 | | { 9513 /* sld */, PPC::SLD, Convert__RegG8RC1_0__RegG8RC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegGPRC }, }, |
7642 | | { 9513 /* sld */, PPC::SLD_rec, Convert__RegG8RC1_1__RegG8RC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_RegGPRC }, }, |
7643 | | { 9517 /* sldi */, PPC::SLDI, Convert__RegG8RC1_0__RegG8RC1_1__U6Imm1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm }, }, |
7644 | | { 9517 /* sldi */, PPC::SLDI_rec, Convert__RegG8RC1_1__RegG8RC1_2__U6Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm }, }, |
7645 | | { 9522 /* slw */, PPC::SLW, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7646 | | { 9522 /* slw */, PPC::SLW_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7647 | | { 9526 /* slwi */, PPC::SLWI, Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm }, }, |
7648 | | { 9526 /* slwi */, PPC::SLWI_rec, Convert__RegGPRC1_1__RegGPRC1_2__U5Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm }, }, |
7649 | | { 9531 /* srad */, PPC::SRAD, Convert__RegG8RC1_0__RegG8RC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegGPRC }, }, |
7650 | | { 9531 /* srad */, PPC::SRAD_rec, Convert__RegG8RC1_1__RegG8RC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_RegGPRC }, }, |
7651 | | { 9536 /* sradi */, PPC::SRADI, Convert__RegG8RC1_0__RegG8RC1_1__U6Imm1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm }, }, |
7652 | | { 9536 /* sradi */, PPC::SRADI_rec, Convert__RegG8RC1_1__RegG8RC1_2__U6Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm }, }, |
7653 | | { 9542 /* sraw */, PPC::SRAW, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7654 | | { 9542 /* sraw */, PPC::SRAW_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7655 | | { 9547 /* srawi */, PPC::SRAWI, Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm }, }, |
7656 | | { 9547 /* srawi */, PPC::SRAWI_rec, Convert__RegGPRC1_1__RegGPRC1_2__U5Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm }, }, |
7657 | | { 9553 /* srd */, PPC::SRD, Convert__RegG8RC1_0__RegG8RC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegGPRC }, }, |
7658 | | { 9553 /* srd */, PPC::SRD_rec, Convert__RegG8RC1_1__RegG8RC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_RegGPRC }, }, |
7659 | | { 9557 /* srdi */, PPC::SRDI, Convert__RegG8RC1_0__RegG8RC1_1__U6Imm1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm }, }, |
7660 | | { 9557 /* srdi */, PPC::SRDI_rec, Convert__RegG8RC1_1__RegG8RC1_2__U6Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm }, }, |
7661 | | { 9562 /* srw */, PPC::SRW, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7662 | | { 9562 /* srw */, PPC::SRW_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7663 | | { 9566 /* srwi */, PPC::SRWI, Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm }, }, |
7664 | | { 9566 /* srwi */, PPC::SRWI_rec, Convert__RegGPRC1_1__RegGPRC1_2__U5Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm }, }, |
7665 | | { 9571 /* stb */, PPC::STB, Convert__RegGPRC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
7666 | | { 9575 /* stbcix */, PPC::STBCIX, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7667 | | { 9582 /* stbcx */, PPC::STBCX, Convert__RegGPRC1_1__RegGxRCNoR01_2__RegGxRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7668 | | { 9588 /* stbepx */, PPC::STBEPX, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7669 | | { 9595 /* stbu */, PPC::STBU, Convert__imm_95_0__RegGPRC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
7670 | | { 9600 /* stbux */, PPC::STBUX, Convert__imm_95_0__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7671 | | { 9606 /* stbx */, PPC::STBXTLS_, Convert__RegG8RC1_0__RegGxRCNoR01_1__TLSReg1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_TLSReg }, }, |
7672 | | { 9606 /* stbx */, PPC::STBX, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7673 | | { 9611 /* stcisync */, PPC::SYNCP10, Convert__imm_95_0__imm_95_2, AMFBS_None, { }, }, |
7674 | | { 9620 /* std */, PPC::STD, Convert__RegG8RC1_0__DispRIX1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegG8RC, MCK_DispRIX, MCK_RegGxRCNoR0 }, }, |
7675 | | { 9624 /* stdat */, PPC::STDAT, Convert__RegG8RC1_0__RegG8RC1_1__U5Imm1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U5Imm }, }, |
7676 | | { 9630 /* stdbrx */, PPC::STDBRX, Convert__RegG8RC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7677 | | { 9637 /* stdcix */, PPC::STDCIX, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7678 | | { 9644 /* stdcx */, PPC::STDCX, Convert__RegG8RC1_1__RegGxRCNoR01_2__RegGxRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7679 | | { 9650 /* stdu */, PPC::STDU, Convert__imm_95_0__RegG8RC1_0__DispRIX1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegG8RC, MCK_DispRIX, MCK_RegGxRCNoR0 }, }, |
7680 | | { 9655 /* stdux */, PPC::STDUX, Convert__imm_95_0__RegG8RC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7681 | | { 9661 /* stdx */, PPC::STDX, Convert__RegG8RC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7682 | | { 9661 /* stdx */, PPC::STDXTLS_, Convert__RegG8RC1_0__RegGxRCNoR01_1__TLSReg1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_TLSReg }, }, |
7683 | | { 9666 /* stfd */, PPC::STFD, Convert__RegF8RC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegF8RC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
7684 | | { 9671 /* stfdepx */, PPC::STFDEPX, Convert__RegF8RC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7685 | | { 9679 /* stfdu */, PPC::STFDU, Convert__imm_95_0__RegF8RC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegF8RC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
7686 | | { 9685 /* stfdux */, PPC::STFDUX, Convert__imm_95_0__RegF8RC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7687 | | { 9692 /* stfdx */, PPC::STFDX, Convert__RegF8RC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7688 | | { 9692 /* stfdx */, PPC::STFDXTLS_, Convert__RegF8RC1_0__RegGxRCNoR01_1__TLSReg1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegGxRCNoR0, MCK_TLSReg }, }, |
7689 | | { 9698 /* stfiwx */, PPC::STFIWX, Convert__RegF8RC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7690 | | { 9705 /* stfs */, PPC::STFS, Convert__RegF4RC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegF4RC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
7691 | | { 9710 /* stfsu */, PPC::STFSU, Convert__imm_95_0__RegF4RC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegF4RC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
7692 | | { 9716 /* stfsux */, PPC::STFSUX, Convert__imm_95_0__RegF4RC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegF4RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7693 | | { 9723 /* stfsx */, PPC::STFSX, Convert__RegF4RC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegF4RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7694 | | { 9723 /* stfsx */, PPC::STFSXTLS_, Convert__RegF4RC1_0__RegGxRCNoR01_1__TLSReg1_2, AMFBS_None, { MCK_RegF4RC, MCK_RegGxRCNoR0, MCK_TLSReg }, }, |
7695 | | { 9729 /* sth */, PPC::STH, Convert__RegGPRC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
7696 | | { 9733 /* sthbrx */, PPC::STHBRX, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7697 | | { 9740 /* sthcix */, PPC::STHCIX, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7698 | | { 9747 /* sthcx */, PPC::STHCX, Convert__RegGPRC1_1__RegGxRCNoR01_2__RegGxRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7699 | | { 9753 /* sthepx */, PPC::STHEPX, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7700 | | { 9760 /* sthu */, PPC::STHU, Convert__imm_95_0__RegGPRC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
7701 | | { 9765 /* sthux */, PPC::STHUX, Convert__imm_95_0__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7702 | | { 9771 /* sthx */, PPC::STHXTLS_, Convert__RegG8RC1_0__RegGxRCNoR01_1__TLSReg1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_TLSReg }, }, |
7703 | | { 9771 /* sthx */, PPC::STHX, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7704 | | { 9776 /* stmw */, PPC::STMW, Convert__RegGPRC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
7705 | | { 9781 /* stncisync */, PPC::SYNCP10, Convert__imm_95_1__imm_95_1, AMFBS_None, { }, }, |
7706 | | { 9791 /* stop */, PPC::STOP, Convert_NoOperands, AMFBS_None, { }, }, |
7707 | | { 9796 /* stq */, PPC::STQ, Convert__RegG8pRC1_0__DispRIX1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegG8pRC, MCK_DispRIX, MCK_RegGxRCNoR0 }, }, |
7708 | | { 9800 /* stqcx */, PPC::STQCX, Convert__RegG8pRC1_1__RegGxRCNoR01_2__RegGxRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8pRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7709 | | { 9806 /* stswi */, PPC::STSWI, Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm }, }, |
7710 | | { 9812 /* stsync */, PPC::SYNCP10, Convert__imm_95_0__imm_95_3, AMFBS_None, { }, }, |
7711 | | { 9819 /* stvebx */, PPC::STVEBX, Convert__RegVRRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7712 | | { 9826 /* stvehx */, PPC::STVEHX, Convert__RegVRRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7713 | | { 9833 /* stvewx */, PPC::STVEWX, Convert__RegVRRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7714 | | { 9840 /* stvx */, PPC::STVX, Convert__RegVRRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7715 | | { 9845 /* stvxl */, PPC::STVXL, Convert__RegVRRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7716 | | { 9851 /* stw */, PPC::STW, Convert__RegGPRC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
7717 | | { 9851 /* stw */, PPC::SPESTW, Convert__RegSPE4RC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegSPE4RC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
7718 | | { 9855 /* stwat */, PPC::STWAT, Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm }, }, |
7719 | | { 9861 /* stwbrx */, PPC::STWBRX, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7720 | | { 9868 /* stwcix */, PPC::STWCIX, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7721 | | { 9875 /* stwcx */, PPC::STWCX, Convert__RegGPRC1_1__RegGxRCNoR01_2__RegGxRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7722 | | { 9881 /* stwepx */, PPC::STWEPX, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7723 | | { 9888 /* stwu */, PPC::STWU, Convert__imm_95_0__RegGPRC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
7724 | | { 9893 /* stwux */, PPC::STWUX, Convert__imm_95_0__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7725 | | { 9899 /* stwx */, PPC::STWXTLS_, Convert__RegG8RC1_0__RegGxRCNoR01_1__TLSReg1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_TLSReg }, }, |
7726 | | { 9899 /* stwx */, PPC::STWX, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7727 | | { 9899 /* stwx */, PPC::SPESTWX, Convert__RegSPE4RC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegSPE4RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7728 | | { 9904 /* stxsd */, PPC::STXSD, Convert__RegVFRC1_0__DispRIX1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVFRC, MCK_DispRIX, MCK_RegGxRCNoR0 }, }, |
7729 | | { 9910 /* stxsdx */, PPC::STXSDX, Convert__RegVSFRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7730 | | { 9917 /* stxsibx */, PPC::STXSIBX, Convert__RegVSFRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7731 | | { 9925 /* stxsihx */, PPC::STXSIHX, Convert__RegVSFRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7732 | | { 9933 /* stxsiwx */, PPC::STXSIWX, Convert__RegVSFRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7733 | | { 9941 /* stxssp */, PPC::STXSSP, Convert__RegVFRC1_0__DispRIX1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVFRC, MCK_DispRIX, MCK_RegGxRCNoR0 }, }, |
7734 | | { 9948 /* stxsspx */, PPC::STXSSPX, Convert__RegVSSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7735 | | { 9956 /* stxv */, PPC::STXV, Convert__RegVSRC1_0__DispRIX161_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVSRC, MCK_DispRIX16, MCK_RegGxRCNoR0 }, }, |
7736 | | { 9961 /* stxvb16x */, PPC::STXVB16X, Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7737 | | { 9970 /* stxvd2x */, PPC::STXVD2X, Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7738 | | { 9978 /* stxvh8x */, PPC::STXVH8X, Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7739 | | { 9986 /* stxvl */, PPC::STXVL, Convert__RegVSRC1_0__Imm1_1__RegG8RC1_2, AMFBS_None, { MCK_RegVSRC, MCK_Imm, MCK_RegG8RC }, }, |
7740 | | { 9992 /* stxvll */, PPC::STXVLL, Convert__RegVSRC1_0__Imm1_1__RegG8RC1_2, AMFBS_None, { MCK_RegVSRC, MCK_Imm, MCK_RegG8RC }, }, |
7741 | | { 9999 /* stxvp */, PPC::STXVP, Convert__RegVSRpRC1_0__DispRIX161_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVSRpRC, MCK_DispRIX16, MCK_RegGxRCNoR0 }, }, |
7742 | | { 10005 /* stxvprl */, PPC::STXVPRL, Convert__RegVSRpRC1_0__Imm1_1__RegG8RC1_2, AMFBS_None, { MCK_RegVSRpRC, MCK_Imm, MCK_RegG8RC }, }, |
7743 | | { 10013 /* stxvprll */, PPC::STXVPRLL, Convert__RegVSRpRC1_0__Imm1_1__RegG8RC1_2, AMFBS_None, { MCK_RegVSRpRC, MCK_Imm, MCK_RegG8RC }, }, |
7744 | | { 10022 /* stxvpx */, PPC::STXVPX, Convert__RegVSRpRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRpRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7745 | | { 10029 /* stxvrbx */, PPC::STXVRBX, Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7746 | | { 10037 /* stxvrdx */, PPC::STXVRDX, Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7747 | | { 10045 /* stxvrhx */, PPC::STXVRHX, Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7748 | | { 10053 /* stxvrl */, PPC::STXVRL, Convert__RegVSRC1_0__Imm1_1__RegG8RC1_2, AMFBS_None, { MCK_RegVSRC, MCK_Imm, MCK_RegG8RC }, }, |
7749 | | { 10060 /* stxvrll */, PPC::STXVRLL, Convert__RegVSRC1_0__Imm1_1__RegG8RC1_2, AMFBS_None, { MCK_RegVSRC, MCK_Imm, MCK_RegG8RC }, }, |
7750 | | { 10068 /* stxvrwx */, PPC::STXVRWX, Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7751 | | { 10076 /* stxvw4x */, PPC::STXVW4X, Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7752 | | { 10084 /* stxvx */, PPC::STXVX, Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
7753 | | { 10090 /* sub */, PPC::SUBF8, Convert__RegG8RC1_0__RegG8RC1_2__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
7754 | | { 10090 /* sub */, PPC::SUBF, Convert__RegGPRC1_0__RegGPRC1_2__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7755 | | { 10090 /* sub */, PPC::SUBF8_rec, Convert__RegG8RC1_1__RegG8RC1_3__RegG8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
7756 | | { 10090 /* sub */, PPC::SUBF_rec, Convert__RegGPRC1_1__RegGPRC1_3__RegGPRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7757 | | { 10094 /* subc */, PPC::SUBFC8, Convert__RegG8RC1_0__RegG8RC1_2__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
7758 | | { 10094 /* subc */, PPC::SUBFC, Convert__RegGPRC1_0__RegGPRC1_2__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7759 | | { 10094 /* subc */, PPC::SUBFC8_rec, Convert__RegG8RC1_1__RegG8RC1_3__RegG8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
7760 | | { 10094 /* subc */, PPC::SUBFC_rec, Convert__RegGPRC1_1__RegGPRC1_3__RegGPRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7761 | | { 10099 /* subf */, PPC::SUBF, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7762 | | { 10099 /* subf */, PPC::SUBF_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7763 | | { 10104 /* subfc */, PPC::SUBFC, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7764 | | { 10104 /* subfc */, PPC::SUBFC_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7765 | | { 10110 /* subfco */, PPC::SUBFCO, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7766 | | { 10110 /* subfco */, PPC::SUBFCO_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7767 | | { 10117 /* subfe */, PPC::SUBFE, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7768 | | { 10117 /* subfe */, PPC::SUBFE_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7769 | | { 10123 /* subfeo */, PPC::SUBFEO, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7770 | | { 10123 /* subfeo */, PPC::SUBFEO_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7771 | | { 10130 /* subfic */, PPC::SUBFIC, Convert__RegGPRC1_0__RegGPRC1_1__S16Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_S16Imm }, }, |
7772 | | { 10137 /* subfme */, PPC::SUBFME, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
7773 | | { 10137 /* subfme */, PPC::SUBFME_rec, Convert__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC }, }, |
7774 | | { 10144 /* subfmeo */, PPC::SUBFMEO, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
7775 | | { 10144 /* subfmeo */, PPC::SUBFMEO_rec, Convert__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC }, }, |
7776 | | { 10152 /* subfo */, PPC::SUBFO, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7777 | | { 10152 /* subfo */, PPC::SUBFO_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7778 | | { 10158 /* subfus */, PPC::SUBFUS, Convert__RegG8RC1_0__RegG8RC1_2__RegG8RC1_3__U1Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_U1Imm, MCK_RegG8RC, MCK_RegG8RC }, }, |
7779 | | { 10158 /* subfus */, PPC::SUBFUS_rec, Convert__RegG8RC1_1__RegG8RC1_3__RegG8RC1_4__U1Imm1_2, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_U1Imm, MCK_RegG8RC, MCK_RegG8RC }, }, |
7780 | | { 10165 /* subfze */, PPC::SUBFZE, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
7781 | | { 10165 /* subfze */, PPC::SUBFZE_rec, Convert__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC }, }, |
7782 | | { 10172 /* subfzeo */, PPC::SUBFZEO, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
7783 | | { 10172 /* subfzeo */, PPC::SUBFZEO_rec, Convert__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC }, }, |
7784 | | { 10180 /* subi */, PPC::SUBI, Convert__RegGPRC1_0__RegGPRC1_1__S16Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_S16Imm }, }, |
7785 | | { 10185 /* subic */, PPC::SUBIC, Convert__RegGPRC1_0__RegGPRC1_1__S16Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_S16Imm }, }, |
7786 | | { 10185 /* subic */, PPC::SUBIC_rec, Convert__RegGPRC1_1__RegGPRC1_2__S16Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_S16Imm }, }, |
7787 | | { 10191 /* subis */, PPC::SUBIS, Convert__RegGPRC1_0__RegGPRC1_1__S16Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_S16Imm }, }, |
7788 | | { 10197 /* subpcis */, PPC::SUBPCIS, Convert__RegG8RC1_0__S16Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S16Imm }, }, |
7789 | | { 10205 /* sync */, PPC::SYNCP10, Convert__imm_95_0__imm_95_0, AMFBS_None, { }, }, |
7790 | | { 10205 /* sync */, PPC::SYNC, Convert__imm_95_0, AMFBS_None, { }, }, |
7791 | | { 10205 /* sync */, PPC::SYNC, Convert__U2Imm1_0, AMFBS_None, { MCK_U2Imm }, }, |
7792 | | { 10205 /* sync */, PPC::SYNCP10, Convert__U3Imm1_0__imm_95_0, AMFBS_None, { MCK_U3Imm }, }, |
7793 | | { 10205 /* sync */, PPC::SYNCP10, Convert__U3Imm1_0__U2Imm1_1, AMFBS_None, { MCK_U3Imm, MCK_U2Imm }, }, |
7794 | | { 10210 /* tabort */, PPC::TABORT, Convert__RegGPRC1_1, AMFBS_None, { MCK__DOT_, MCK_RegGPRC }, }, |
7795 | | { 10217 /* tabortdc */, PPC::TABORTDC, Convert__U5Imm1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_U5Imm, MCK_RegGPRC, MCK_RegGPRC }, }, |
7796 | | { 10226 /* tabortdci */, PPC::TABORTDCI, Convert__U5Imm1_1__RegGPRC1_2__U5Imm1_3, AMFBS_None, { MCK__DOT_, MCK_U5Imm, MCK_RegGPRC, MCK_U5Imm }, }, |
7797 | | { 10236 /* tabortwc */, PPC::TABORTWC, Convert__U5Imm1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_U5Imm, MCK_RegGPRC, MCK_RegGPRC }, }, |
7798 | | { 10245 /* tabortwci */, PPC::TABORTWCI, Convert__U5Imm1_1__RegGPRC1_2__U5Imm1_3, AMFBS_None, { MCK__DOT_, MCK_U5Imm, MCK_RegGPRC, MCK_U5Imm }, }, |
7799 | | { 10255 /* tbegin */, PPC::TBEGIN, Convert__U1Imm1_1, AMFBS_None, { MCK__DOT_, MCK_U1Imm }, }, |
7800 | | { 10262 /* tcheck */, PPC::TCHECK, Convert__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
7801 | | { 10269 /* td */, PPC::TD, Convert__U5Imm1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_U5Imm, MCK_RegG8RC, MCK_RegG8RC }, }, |
7802 | | { 10272 /* tdeq */, PPC::TD, Convert__imm_95_4__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
7803 | | { 10277 /* tdeqi */, PPC::TDI, Convert__imm_95_4__RegG8RC1_0__S16Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S16Imm }, }, |
7804 | | { 10283 /* tdge */, PPC::TD, Convert__imm_95_12__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
7805 | | { 10288 /* tdgei */, PPC::TDI, Convert__imm_95_12__RegG8RC1_0__S16Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S16Imm }, }, |
7806 | | { 10294 /* tdgt */, PPC::TD, Convert__imm_95_8__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
7807 | | { 10299 /* tdgti */, PPC::TDI, Convert__imm_95_8__RegG8RC1_0__S16Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S16Imm }, }, |
7808 | | { 10305 /* tdi */, PPC::TDI, Convert__U5Imm1_0__RegG8RC1_1__S16Imm1_2, AMFBS_None, { MCK_U5Imm, MCK_RegG8RC, MCK_S16Imm }, }, |
7809 | | { 10309 /* tdle */, PPC::TD, Convert__imm_95_20__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
7810 | | { 10314 /* tdlei */, PPC::TDI, Convert__imm_95_20__RegG8RC1_0__S16Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S16Imm }, }, |
7811 | | { 10320 /* tdlge */, PPC::TD, Convert__imm_95_5__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
7812 | | { 10326 /* tdlgei */, PPC::TDI, Convert__imm_95_5__RegG8RC1_0__S16Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S16Imm }, }, |
7813 | | { 10333 /* tdlgt */, PPC::TD, Convert__imm_95_1__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
7814 | | { 10339 /* tdlgti */, PPC::TDI, Convert__imm_95_1__RegG8RC1_0__S16Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S16Imm }, }, |
7815 | | { 10346 /* tdlle */, PPC::TD, Convert__imm_95_6__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
7816 | | { 10352 /* tdllei */, PPC::TDI, Convert__imm_95_6__RegG8RC1_0__S16Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S16Imm }, }, |
7817 | | { 10359 /* tdllt */, PPC::TD, Convert__imm_95_2__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
7818 | | { 10365 /* tdllti */, PPC::TDI, Convert__imm_95_2__RegG8RC1_0__S16Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S16Imm }, }, |
7819 | | { 10372 /* tdlng */, PPC::TD, Convert__imm_95_6__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
7820 | | { 10378 /* tdlngi */, PPC::TDI, Convert__imm_95_6__RegG8RC1_0__S16Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S16Imm }, }, |
7821 | | { 10385 /* tdlnl */, PPC::TD, Convert__imm_95_5__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
7822 | | { 10391 /* tdlnli */, PPC::TDI, Convert__imm_95_5__RegG8RC1_0__S16Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S16Imm }, }, |
7823 | | { 10398 /* tdlt */, PPC::TD, Convert__imm_95_16__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
7824 | | { 10403 /* tdlti */, PPC::TDI, Convert__imm_95_16__RegG8RC1_0__S16Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S16Imm }, }, |
7825 | | { 10409 /* tdne */, PPC::TD, Convert__imm_95_24__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
7826 | | { 10414 /* tdnei */, PPC::TDI, Convert__imm_95_24__RegG8RC1_0__S16Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S16Imm }, }, |
7827 | | { 10420 /* tdng */, PPC::TD, Convert__imm_95_20__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
7828 | | { 10425 /* tdngi */, PPC::TDI, Convert__imm_95_20__RegG8RC1_0__S16Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S16Imm }, }, |
7829 | | { 10431 /* tdnl */, PPC::TD, Convert__imm_95_12__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
7830 | | { 10436 /* tdnli */, PPC::TDI, Convert__imm_95_12__RegG8RC1_0__S16Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S16Imm }, }, |
7831 | | { 10442 /* tdu */, PPC::TD, Convert__imm_95_31__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
7832 | | { 10446 /* tdui */, PPC::TDI, Convert__imm_95_31__RegG8RC1_0__S16Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S16Imm }, }, |
7833 | | { 10451 /* tend */, PPC::TEND, Convert__imm_95_0, AMFBS_None, { MCK__DOT_ }, }, |
7834 | | { 10451 /* tend */, PPC::TEND, Convert__U1Imm1_1, AMFBS_None, { MCK__DOT_, MCK_U1Imm }, }, |
7835 | | { 10456 /* tendall */, PPC::TEND, Convert__imm_95_1, AMFBS_None, { MCK__DOT_ }, }, |
7836 | | { 10464 /* tlbia */, PPC::TLBIA, Convert_NoOperands, AMFBS_None, { }, }, |
7837 | | { 10470 /* tlbie */, PPC::TLBIE, Convert__regR0__RegGPRC1_0, AMFBS_None, { MCK_RegGPRC }, }, |
7838 | | { 10470 /* tlbie */, PPC::TLBIE, Convert__RegGPRC1_1__RegGPRC1_0, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
7839 | | { 10476 /* tlbiel */, PPC::TLBIEL, Convert__RegGPRC1_0, AMFBS_None, { MCK_RegGPRC }, }, |
7840 | | { 10483 /* tlbilx */, PPC::TLBILX, Convert__U2Imm1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_U2Imm, MCK_RegGPRC, MCK_RegGPRC }, }, |
7841 | | { 10490 /* tlbilxlpid */, PPC::TLBILX, Convert__imm_95_0__regR0__regR0, AMFBS_None, { }, }, |
7842 | | { 10501 /* tlbilxpid */, PPC::TLBILX, Convert__imm_95_1__regR0__regR0, AMFBS_None, { }, }, |
7843 | | { 10511 /* tlbilxva */, PPC::TLBILX, Convert__imm_95_3__regR0__RegGPRC1_0, AMFBS_None, { MCK_RegGPRC }, }, |
7844 | | { 10511 /* tlbilxva */, PPC::TLBILX, Convert__imm_95_3__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
7845 | | { 10520 /* tlbivax */, PPC::TLBIVAX, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
7846 | | { 10528 /* tlbld */, PPC::TLBLD, Convert__RegGPRC1_0, AMFBS_None, { MCK_RegGPRC }, }, |
7847 | | { 10534 /* tlbli */, PPC::TLBLI, Convert__RegGPRC1_0, AMFBS_None, { MCK_RegGPRC }, }, |
7848 | | { 10540 /* tlbre */, PPC::TLBRE, Convert_NoOperands, AMFBS_None, { }, }, |
7849 | | { 10540 /* tlbre */, PPC::TLBRE2, Convert__RegGPRC1_0__RegGPRC1_1__Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_Imm }, }, |
7850 | | { 10546 /* tlbrehi */, PPC::TLBRE2, Convert__RegGPRC1_0__RegGPRC1_1__imm_95_0, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
7851 | | { 10554 /* tlbrelo */, PPC::TLBRE2, Convert__RegGPRC1_0__RegGPRC1_1__imm_95_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
7852 | | { 10562 /* tlbsx */, PPC::TLBSX, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
7853 | | { 10562 /* tlbsx */, PPC::TLBSX2, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7854 | | { 10562 /* tlbsx */, PPC::TLBSX2D, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
7855 | | { 10568 /* tlbsync */, PPC::TLBSYNC, Convert_NoOperands, AMFBS_None, { }, }, |
7856 | | { 10576 /* tlbwe */, PPC::TLBWE, Convert_NoOperands, AMFBS_None, { }, }, |
7857 | | { 10576 /* tlbwe */, PPC::TLBWE2, Convert__RegGPRC1_0__RegGPRC1_1__Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_Imm }, }, |
7858 | | { 10582 /* tlbwehi */, PPC::TLBWE2, Convert__RegGPRC1_0__RegGPRC1_1__imm_95_0, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
7859 | | { 10590 /* tlbwelo */, PPC::TLBWE2, Convert__RegGPRC1_0__RegGPRC1_1__imm_95_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
7860 | | { 10598 /* trap */, PPC::TRAP, Convert_NoOperands, AMFBS_None, { }, }, |
7861 | | { 10598 /* trap */, PPC::TW, Convert__imm_95_31__regR0__regR0, AMFBS_None, { }, }, |
7862 | | { 10603 /* trechkpt */, PPC::TRECHKPT, Convert_NoOperands, AMFBS_None, { MCK__DOT_ }, }, |
7863 | | { 10612 /* treclaim */, PPC::TRECLAIM, Convert__RegGPRC1_1, AMFBS_None, { MCK__DOT_, MCK_RegGPRC }, }, |
7864 | | { 10621 /* tresume */, PPC::TSR, Convert__imm_95_1, AMFBS_None, { MCK__DOT_ }, }, |
7865 | | { 10629 /* tsr */, PPC::TSR, Convert__U1Imm1_1, AMFBS_None, { MCK__DOT_, MCK_U1Imm }, }, |
7866 | | { 10633 /* tsuspend */, PPC::TSR, Convert__imm_95_0, AMFBS_None, { MCK__DOT_ }, }, |
7867 | | { 10642 /* tw */, PPC::TW, Convert__U5Imm1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_U5Imm, MCK_RegGPRC, MCK_RegGPRC }, }, |
7868 | | { 10645 /* tweq */, PPC::TW, Convert__imm_95_4__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
7869 | | { 10650 /* tweqi */, PPC::TWI, Convert__imm_95_4__RegGPRC1_0__S16Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S16Imm }, }, |
7870 | | { 10656 /* twge */, PPC::TW, Convert__imm_95_12__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
7871 | | { 10661 /* twgei */, PPC::TWI, Convert__imm_95_12__RegGPRC1_0__S16Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S16Imm }, }, |
7872 | | { 10667 /* twgt */, PPC::TW, Convert__imm_95_8__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
7873 | | { 10672 /* twgti */, PPC::TWI, Convert__imm_95_8__RegGPRC1_0__S16Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S16Imm }, }, |
7874 | | { 10678 /* twi */, PPC::TWI, Convert__U5Imm1_0__RegGPRC1_1__S16Imm1_2, AMFBS_None, { MCK_U5Imm, MCK_RegGPRC, MCK_S16Imm }, }, |
7875 | | { 10682 /* twle */, PPC::TW, Convert__imm_95_20__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
7876 | | { 10687 /* twlei */, PPC::TWI, Convert__imm_95_20__RegGPRC1_0__S16Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S16Imm }, }, |
7877 | | { 10693 /* twlge */, PPC::TW, Convert__imm_95_5__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
7878 | | { 10699 /* twlgei */, PPC::TWI, Convert__imm_95_5__RegGPRC1_0__S16Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S16Imm }, }, |
7879 | | { 10706 /* twlgt */, PPC::TW, Convert__imm_95_1__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
7880 | | { 10712 /* twlgti */, PPC::TWI, Convert__imm_95_1__RegGPRC1_0__S16Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S16Imm }, }, |
7881 | | { 10719 /* twlle */, PPC::TW, Convert__imm_95_6__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
7882 | | { 10725 /* twllei */, PPC::TWI, Convert__imm_95_6__RegGPRC1_0__S16Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S16Imm }, }, |
7883 | | { 10732 /* twllt */, PPC::TW, Convert__imm_95_2__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
7884 | | { 10738 /* twllti */, PPC::TWI, Convert__imm_95_2__RegGPRC1_0__S16Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S16Imm }, }, |
7885 | | { 10745 /* twlng */, PPC::TW, Convert__imm_95_6__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
7886 | | { 10751 /* twlngi */, PPC::TWI, Convert__imm_95_6__RegGPRC1_0__S16Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S16Imm }, }, |
7887 | | { 10758 /* twlnl */, PPC::TW, Convert__imm_95_5__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
7888 | | { 10764 /* twlnli */, PPC::TWI, Convert__imm_95_5__RegGPRC1_0__S16Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S16Imm }, }, |
7889 | | { 10771 /* twlt */, PPC::TW, Convert__imm_95_16__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
7890 | | { 10776 /* twlti */, PPC::TWI, Convert__imm_95_16__RegGPRC1_0__S16Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S16Imm }, }, |
7891 | | { 10782 /* twne */, PPC::TW, Convert__imm_95_24__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
7892 | | { 10787 /* twnei */, PPC::TWI, Convert__imm_95_24__RegGPRC1_0__S16Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S16Imm }, }, |
7893 | | { 10793 /* twng */, PPC::TW, Convert__imm_95_20__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
7894 | | { 10798 /* twngi */, PPC::TWI, Convert__imm_95_20__RegGPRC1_0__S16Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S16Imm }, }, |
7895 | | { 10804 /* twnl */, PPC::TW, Convert__imm_95_12__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
7896 | | { 10809 /* twnli */, PPC::TWI, Convert__imm_95_12__RegGPRC1_0__S16Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S16Imm }, }, |
7897 | | { 10815 /* twu */, PPC::TW, Convert__imm_95_31__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
7898 | | { 10819 /* twui */, PPC::TWI, Convert__imm_95_31__RegGPRC1_0__S16Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S16Imm }, }, |
7899 | | { 10824 /* vabsdub */, PPC::VABSDUB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7900 | | { 10832 /* vabsduh */, PPC::VABSDUH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7901 | | { 10840 /* vabsduw */, PPC::VABSDUW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7902 | | { 10848 /* vaddcuq */, PPC::VADDCUQ, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7903 | | { 10856 /* vaddcuw */, PPC::VADDCUW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7904 | | { 10864 /* vaddecuq */, PPC::VADDECUQ, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7905 | | { 10873 /* vaddeuqm */, PPC::VADDEUQM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7906 | | { 10882 /* vaddfp */, PPC::VADDFP, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7907 | | { 10889 /* vaddsbs */, PPC::VADDSBS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7908 | | { 10897 /* vaddshs */, PPC::VADDSHS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7909 | | { 10905 /* vaddsws */, PPC::VADDSWS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7910 | | { 10913 /* vaddubm */, PPC::VADDUBM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7911 | | { 10921 /* vaddubs */, PPC::VADDUBS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7912 | | { 10929 /* vaddudm */, PPC::VADDUDM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7913 | | { 10937 /* vadduhm */, PPC::VADDUHM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7914 | | { 10945 /* vadduhs */, PPC::VADDUHS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7915 | | { 10953 /* vadduqm */, PPC::VADDUQM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7916 | | { 10961 /* vadduwm */, PPC::VADDUWM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7917 | | { 10969 /* vadduws */, PPC::VADDUWS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7918 | | { 10977 /* vand */, PPC::VAND, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7919 | | { 10982 /* vandc */, PPC::VANDC, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7920 | | { 10988 /* vavgsb */, PPC::VAVGSB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7921 | | { 10995 /* vavgsh */, PPC::VAVGSH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7922 | | { 11002 /* vavgsw */, PPC::VAVGSW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7923 | | { 11009 /* vavgub */, PPC::VAVGUB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7924 | | { 11016 /* vavguh */, PPC::VAVGUH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7925 | | { 11023 /* vavguw */, PPC::VAVGUW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7926 | | { 11030 /* vbpermd */, PPC::VBPERMD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7927 | | { 11038 /* vbpermq */, PPC::VBPERMQ, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7928 | | { 11046 /* vcfsx */, PPC::VCFSX, Convert__RegVRRC1_0__U5Imm1_2__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_U5Imm }, }, |
7929 | | { 11052 /* vcfuged */, PPC::VCFUGED, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7930 | | { 11060 /* vcfux */, PPC::VCFUX, Convert__RegVRRC1_0__U5Imm1_2__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_U5Imm }, }, |
7931 | | { 11066 /* vcipher */, PPC::VCIPHER, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7932 | | { 11074 /* vcipherlast */, PPC::VCIPHERLAST, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7933 | | { 11086 /* vclrlb */, PPC::VCLRLB, Convert__RegVRRC1_0__RegVRRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegGPRC }, }, |
7934 | | { 11093 /* vclrrb */, PPC::VCLRRB, Convert__RegVRRC1_0__RegVRRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegGPRC }, }, |
7935 | | { 11100 /* vclzb */, PPC::VCLZB, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
7936 | | { 11106 /* vclzd */, PPC::VCLZD, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
7937 | | { 11112 /* vclzdm */, PPC::VCLZDM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7938 | | { 11119 /* vclzh */, PPC::VCLZH, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
7939 | | { 11125 /* vclzlsbb */, PPC::VCLZLSBB, Convert__RegGPRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegVRRC }, }, |
7940 | | { 11134 /* vclzw */, PPC::VCLZW, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
7941 | | { 11140 /* vcmpbfp */, PPC::VCMPBFP, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7942 | | { 11140 /* vcmpbfp */, PPC::VCMPBFP_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7943 | | { 11148 /* vcmpeqfp */, PPC::VCMPEQFP, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7944 | | { 11148 /* vcmpeqfp */, PPC::VCMPEQFP_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7945 | | { 11157 /* vcmpequb */, PPC::VCMPEQUB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7946 | | { 11157 /* vcmpequb */, PPC::VCMPEQUB_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7947 | | { 11166 /* vcmpequd */, PPC::VCMPEQUD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7948 | | { 11166 /* vcmpequd */, PPC::VCMPEQUD_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7949 | | { 11175 /* vcmpequh */, PPC::VCMPEQUH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7950 | | { 11175 /* vcmpequh */, PPC::VCMPEQUH_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7951 | | { 11184 /* vcmpequq */, PPC::VCMPEQUQ, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7952 | | { 11184 /* vcmpequq */, PPC::VCMPEQUQ_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7953 | | { 11193 /* vcmpequw */, PPC::VCMPEQUW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7954 | | { 11193 /* vcmpequw */, PPC::VCMPEQUW_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7955 | | { 11202 /* vcmpgefp */, PPC::VCMPGEFP, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7956 | | { 11202 /* vcmpgefp */, PPC::VCMPGEFP_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7957 | | { 11211 /* vcmpgtfp */, PPC::VCMPGTFP, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7958 | | { 11211 /* vcmpgtfp */, PPC::VCMPGTFP_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7959 | | { 11220 /* vcmpgtsb */, PPC::VCMPGTSB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7960 | | { 11220 /* vcmpgtsb */, PPC::VCMPGTSB_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7961 | | { 11229 /* vcmpgtsd */, PPC::VCMPGTSD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7962 | | { 11229 /* vcmpgtsd */, PPC::VCMPGTSD_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7963 | | { 11238 /* vcmpgtsh */, PPC::VCMPGTSH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7964 | | { 11238 /* vcmpgtsh */, PPC::VCMPGTSH_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7965 | | { 11247 /* vcmpgtsq */, PPC::VCMPGTSQ, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7966 | | { 11247 /* vcmpgtsq */, PPC::VCMPGTSQ_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7967 | | { 11256 /* vcmpgtsw */, PPC::VCMPGTSW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7968 | | { 11256 /* vcmpgtsw */, PPC::VCMPGTSW_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7969 | | { 11265 /* vcmpgtub */, PPC::VCMPGTUB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7970 | | { 11265 /* vcmpgtub */, PPC::VCMPGTUB_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7971 | | { 11274 /* vcmpgtud */, PPC::VCMPGTUD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7972 | | { 11274 /* vcmpgtud */, PPC::VCMPGTUD_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7973 | | { 11283 /* vcmpgtuh */, PPC::VCMPGTUH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7974 | | { 11283 /* vcmpgtuh */, PPC::VCMPGTUH_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7975 | | { 11292 /* vcmpgtuq */, PPC::VCMPGTUQ, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7976 | | { 11292 /* vcmpgtuq */, PPC::VCMPGTUQ_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7977 | | { 11301 /* vcmpgtuw */, PPC::VCMPGTUW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7978 | | { 11301 /* vcmpgtuw */, PPC::VCMPGTUW_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7979 | | { 11310 /* vcmpneb */, PPC::VCMPNEB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7980 | | { 11310 /* vcmpneb */, PPC::VCMPNEB_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7981 | | { 11318 /* vcmpneh */, PPC::VCMPNEH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7982 | | { 11318 /* vcmpneh */, PPC::VCMPNEH_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7983 | | { 11326 /* vcmpnew */, PPC::VCMPNEW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7984 | | { 11326 /* vcmpnew */, PPC::VCMPNEW_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7985 | | { 11334 /* vcmpnezb */, PPC::VCMPNEZB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7986 | | { 11334 /* vcmpnezb */, PPC::VCMPNEZB_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7987 | | { 11343 /* vcmpnezh */, PPC::VCMPNEZH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7988 | | { 11343 /* vcmpnezh */, PPC::VCMPNEZH_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7989 | | { 11352 /* vcmpnezw */, PPC::VCMPNEZW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7990 | | { 11352 /* vcmpnezw */, PPC::VCMPNEZW_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7991 | | { 11361 /* vcmpsq */, PPC::VCMPSQ, Convert__RegCRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7992 | | { 11368 /* vcmpuq */, PPC::VCMPUQ, Convert__RegCRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
7993 | | { 11375 /* vcntmbb */, PPC::VCNTMBB, Convert__RegG8RC1_0__RegVRRC1_1__U1Imm1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegVRRC, MCK_U1Imm }, }, |
7994 | | { 11383 /* vcntmbd */, PPC::VCNTMBD, Convert__RegG8RC1_0__RegVRRC1_1__U1Imm1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegVRRC, MCK_U1Imm }, }, |
7995 | | { 11391 /* vcntmbh */, PPC::VCNTMBH, Convert__RegG8RC1_0__RegVRRC1_1__U1Imm1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegVRRC, MCK_U1Imm }, }, |
7996 | | { 11399 /* vcntmbw */, PPC::VCNTMBW, Convert__RegG8RC1_0__RegVRRC1_1__U1Imm1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegVRRC, MCK_U1Imm }, }, |
7997 | | { 11407 /* vctsxs */, PPC::VCTSXS, Convert__RegVRRC1_0__U5Imm1_2__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_U5Imm }, }, |
7998 | | { 11414 /* vctuxs */, PPC::VCTUXS, Convert__RegVRRC1_0__U5Imm1_2__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_U5Imm }, }, |
7999 | | { 11421 /* vctzb */, PPC::VCTZB, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8000 | | { 11427 /* vctzd */, PPC::VCTZD, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8001 | | { 11433 /* vctzdm */, PPC::VCTZDM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8002 | | { 11440 /* vctzh */, PPC::VCTZH, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8003 | | { 11446 /* vctzlsbb */, PPC::VCTZLSBB, Convert__RegGPRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegVRRC }, }, |
8004 | | { 11455 /* vctzw */, PPC::VCTZW, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8005 | | { 11461 /* vdivesd */, PPC::VDIVESD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8006 | | { 11469 /* vdivesq */, PPC::VDIVESQ, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8007 | | { 11477 /* vdivesw */, PPC::VDIVESW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8008 | | { 11485 /* vdiveud */, PPC::VDIVEUD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8009 | | { 11493 /* vdiveuq */, PPC::VDIVEUQ, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8010 | | { 11501 /* vdiveuw */, PPC::VDIVEUW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8011 | | { 11509 /* vdivsd */, PPC::VDIVSD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8012 | | { 11516 /* vdivsq */, PPC::VDIVSQ, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8013 | | { 11523 /* vdivsw */, PPC::VDIVSW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8014 | | { 11530 /* vdivud */, PPC::VDIVUD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8015 | | { 11537 /* vdivuq */, PPC::VDIVUQ, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8016 | | { 11544 /* vdivuw */, PPC::VDIVUW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8017 | | { 11551 /* veqv */, PPC::VEQV, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8018 | | { 11556 /* vexpandbm */, PPC::VEXPANDBM, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8019 | | { 11566 /* vexpanddm */, PPC::VEXPANDDM, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8020 | | { 11576 /* vexpandhm */, PPC::VEXPANDHM, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8021 | | { 11586 /* vexpandqm */, PPC::VEXPANDQM, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8022 | | { 11596 /* vexpandwm */, PPC::VEXPANDWM, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8023 | | { 11606 /* vexptefp */, PPC::VEXPTEFP, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8024 | | { 11615 /* vextddvlx */, PPC::VEXTDDVLX, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegGPRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegGPRC }, }, |
8025 | | { 11625 /* vextddvrx */, PPC::VEXTDDVRX, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegGPRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegGPRC }, }, |
8026 | | { 11635 /* vextdubvlx */, PPC::VEXTDUBVLX, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegGPRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegGPRC }, }, |
8027 | | { 11646 /* vextdubvrx */, PPC::VEXTDUBVRX, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegGPRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegGPRC }, }, |
8028 | | { 11657 /* vextduhvlx */, PPC::VEXTDUHVLX, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegGPRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegGPRC }, }, |
8029 | | { 11668 /* vextduhvrx */, PPC::VEXTDUHVRX, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegGPRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegGPRC }, }, |
8030 | | { 11679 /* vextduwvlx */, PPC::VEXTDUWVLX, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegGPRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegGPRC }, }, |
8031 | | { 11690 /* vextduwvrx */, PPC::VEXTDUWVRX, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegGPRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegGPRC }, }, |
8032 | | { 11701 /* vextractbm */, PPC::VEXTRACTBM, Convert__RegGPRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegVRRC }, }, |
8033 | | { 11712 /* vextractd */, PPC::VEXTRACTD, Convert__RegVRRC1_0__U4Imm1_2__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_U4Imm }, }, |
8034 | | { 11722 /* vextractdm */, PPC::VEXTRACTDM, Convert__RegGPRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegVRRC }, }, |
8035 | | { 11733 /* vextracthm */, PPC::VEXTRACTHM, Convert__RegGPRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegVRRC }, }, |
8036 | | { 11744 /* vextractqm */, PPC::VEXTRACTQM, Convert__RegGPRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegVRRC }, }, |
8037 | | { 11755 /* vextractub */, PPC::VEXTRACTUB, Convert__RegVRRC1_0__U4Imm1_2__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_U4Imm }, }, |
8038 | | { 11766 /* vextractuh */, PPC::VEXTRACTUH, Convert__RegVRRC1_0__U4Imm1_2__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_U4Imm }, }, |
8039 | | { 11777 /* vextractuw */, PPC::VEXTRACTUW, Convert__RegVRRC1_0__U4Imm1_2__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_U4Imm }, }, |
8040 | | { 11788 /* vextractwm */, PPC::VEXTRACTWM, Convert__RegGPRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegVRRC }, }, |
8041 | | { 11799 /* vextsb2d */, PPC::VEXTSB2D, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8042 | | { 11808 /* vextsb2w */, PPC::VEXTSB2W, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8043 | | { 11817 /* vextsd2q */, PPC::VEXTSD2Q, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8044 | | { 11826 /* vextsh2d */, PPC::VEXTSH2D, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8045 | | { 11835 /* vextsh2w */, PPC::VEXTSH2W, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8046 | | { 11844 /* vextsw2d */, PPC::VEXTSW2D, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8047 | | { 11853 /* vextublx */, PPC::VEXTUBLX, Convert__RegG8RC1_0__RegG8RC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegVRRC }, }, |
8048 | | { 11862 /* vextubrx */, PPC::VEXTUBRX, Convert__RegG8RC1_0__RegG8RC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegVRRC }, }, |
8049 | | { 11871 /* vextuhlx */, PPC::VEXTUHLX, Convert__RegG8RC1_0__RegG8RC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegVRRC }, }, |
8050 | | { 11880 /* vextuhrx */, PPC::VEXTUHRX, Convert__RegG8RC1_0__RegG8RC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegVRRC }, }, |
8051 | | { 11889 /* vextuwlx */, PPC::VEXTUWLX, Convert__RegG8RC1_0__RegG8RC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegVRRC }, }, |
8052 | | { 11898 /* vextuwrx */, PPC::VEXTUWRX, Convert__RegG8RC1_0__RegG8RC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegVRRC }, }, |
8053 | | { 11907 /* vgbbd */, PPC::VGBBD, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8054 | | { 11913 /* vgnb */, PPC::VGNB, Convert__RegG8RC1_0__RegVRRC1_1__U3Imm1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegVRRC, MCK_U3Imm }, }, |
8055 | | { 11918 /* vinsblx */, PPC::VINSBLX, Convert__RegVRRC1_0__Tie0_1_1__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
8056 | | { 11926 /* vinsbrx */, PPC::VINSBRX, Convert__RegVRRC1_0__Tie0_1_1__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
8057 | | { 11934 /* vinsbvlx */, PPC::VINSBVLX, Convert__RegVRRC1_0__Tie0_1_1__RegGPRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGPRC, MCK_RegVRRC }, }, |
8058 | | { 11943 /* vinsbvrx */, PPC::VINSBVRX, Convert__RegVRRC1_0__Tie0_1_1__RegGPRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGPRC, MCK_RegVRRC }, }, |
8059 | | { 11952 /* vinsd */, PPC::VINSD, Convert__RegVRRC1_0__Tie0_1_1__U4Imm1_2__RegG8RC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegG8RC, MCK_U4Imm }, }, |
8060 | | { 11958 /* vinsdlx */, PPC::VINSDLX, Convert__RegVRRC1_0__Tie0_1_1__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegG8RC, MCK_RegG8RC }, }, |
8061 | | { 11966 /* vinsdrx */, PPC::VINSDRX, Convert__RegVRRC1_0__Tie0_1_1__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegG8RC, MCK_RegG8RC }, }, |
8062 | | { 11974 /* vinsertb */, PPC::VINSERTB, Convert__RegVRRC1_0__Tie0_1_1__U4Imm1_2__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_U4Imm }, }, |
8063 | | { 11983 /* vinsertd */, PPC::VINSERTD, Convert__RegVRRC1_0__U4Imm1_2__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_U4Imm }, }, |
8064 | | { 11992 /* vinserth */, PPC::VINSERTH, Convert__RegVRRC1_0__Tie0_1_1__U4Imm1_2__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_U4Imm }, }, |
8065 | | { 12001 /* vinsertw */, PPC::VINSERTW, Convert__RegVRRC1_0__U4Imm1_2__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_U4Imm }, }, |
8066 | | { 12010 /* vinshlx */, PPC::VINSHLX, Convert__RegVRRC1_0__Tie0_1_1__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
8067 | | { 12018 /* vinshrx */, PPC::VINSHRX, Convert__RegVRRC1_0__Tie0_1_1__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
8068 | | { 12026 /* vinshvlx */, PPC::VINSHVLX, Convert__RegVRRC1_0__Tie0_1_1__RegGPRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGPRC, MCK_RegVRRC }, }, |
8069 | | { 12035 /* vinshvrx */, PPC::VINSHVRX, Convert__RegVRRC1_0__Tie0_1_1__RegGPRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGPRC, MCK_RegVRRC }, }, |
8070 | | { 12044 /* vinsw */, PPC::VINSW, Convert__RegVRRC1_0__Tie0_1_1__U4Imm1_2__RegGPRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegGPRC, MCK_U4Imm }, }, |
8071 | | { 12050 /* vinswlx */, PPC::VINSWLX, Convert__RegVRRC1_0__Tie0_1_1__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
8072 | | { 12058 /* vinswrx */, PPC::VINSWRX, Convert__RegVRRC1_0__Tie0_1_1__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
8073 | | { 12066 /* vinswvlx */, PPC::VINSWVLX, Convert__RegVRRC1_0__Tie0_1_1__RegGPRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGPRC, MCK_RegVRRC }, }, |
8074 | | { 12075 /* vinswvrx */, PPC::VINSWVRX, Convert__RegVRRC1_0__Tie0_1_1__RegGPRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGPRC, MCK_RegVRRC }, }, |
8075 | | { 12084 /* vlogefp */, PPC::VLOGEFP, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8076 | | { 12092 /* vmaddfp */, PPC::VMADDFP, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8077 | | { 12100 /* vmaxfp */, PPC::VMAXFP, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8078 | | { 12107 /* vmaxsb */, PPC::VMAXSB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8079 | | { 12114 /* vmaxsd */, PPC::VMAXSD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8080 | | { 12121 /* vmaxsh */, PPC::VMAXSH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8081 | | { 12128 /* vmaxsw */, PPC::VMAXSW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8082 | | { 12135 /* vmaxub */, PPC::VMAXUB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8083 | | { 12142 /* vmaxud */, PPC::VMAXUD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8084 | | { 12149 /* vmaxuh */, PPC::VMAXUH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8085 | | { 12156 /* vmaxuw */, PPC::VMAXUW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8086 | | { 12163 /* vmhaddshs */, PPC::VMHADDSHS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8087 | | { 12173 /* vmhraddshs */, PPC::VMHRADDSHS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8088 | | { 12184 /* vminfp */, PPC::VMINFP, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8089 | | { 12191 /* vminsb */, PPC::VMINSB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8090 | | { 12198 /* vminsd */, PPC::VMINSD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8091 | | { 12205 /* vminsh */, PPC::VMINSH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8092 | | { 12212 /* vminsw */, PPC::VMINSW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8093 | | { 12219 /* vminub */, PPC::VMINUB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8094 | | { 12226 /* vminud */, PPC::VMINUD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8095 | | { 12233 /* vminuh */, PPC::VMINUH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8096 | | { 12240 /* vminuw */, PPC::VMINUW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8097 | | { 12247 /* vmladduhm */, PPC::VMLADDUHM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8098 | | { 12257 /* vmodsd */, PPC::VMODSD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8099 | | { 12264 /* vmodsq */, PPC::VMODSQ, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8100 | | { 12271 /* vmodsw */, PPC::VMODSW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8101 | | { 12278 /* vmodud */, PPC::VMODUD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8102 | | { 12285 /* vmoduq */, PPC::VMODUQ, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8103 | | { 12292 /* vmoduw */, PPC::VMODUW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8104 | | { 12299 /* vmr */, PPC::VOR, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8105 | | { 12303 /* vmrgew */, PPC::VMRGEW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8106 | | { 12310 /* vmrghb */, PPC::VMRGHB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8107 | | { 12317 /* vmrghh */, PPC::VMRGHH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8108 | | { 12324 /* vmrghw */, PPC::VMRGHW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8109 | | { 12331 /* vmrglb */, PPC::VMRGLB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8110 | | { 12338 /* vmrglh */, PPC::VMRGLH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8111 | | { 12345 /* vmrglw */, PPC::VMRGLW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8112 | | { 12352 /* vmrgow */, PPC::VMRGOW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8113 | | { 12359 /* vmsumcud */, PPC::VMSUMCUD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8114 | | { 12368 /* vmsummbm */, PPC::VMSUMMBM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8115 | | { 12377 /* vmsumshm */, PPC::VMSUMSHM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8116 | | { 12386 /* vmsumshs */, PPC::VMSUMSHS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8117 | | { 12395 /* vmsumubm */, PPC::VMSUMUBM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8118 | | { 12404 /* vmsumudm */, PPC::VMSUMUDM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8119 | | { 12413 /* vmsumuhm */, PPC::VMSUMUHM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8120 | | { 12422 /* vmsumuhs */, PPC::VMSUMUHS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8121 | | { 12431 /* vmul10cuq */, PPC::VMUL10CUQ, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8122 | | { 12441 /* vmul10ecuq */, PPC::VMUL10ECUQ, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8123 | | { 12452 /* vmul10euq */, PPC::VMUL10EUQ, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8124 | | { 12462 /* vmul10uq */, PPC::VMUL10UQ, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8125 | | { 12471 /* vmulesb */, PPC::VMULESB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8126 | | { 12479 /* vmulesd */, PPC::VMULESD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8127 | | { 12487 /* vmulesh */, PPC::VMULESH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8128 | | { 12495 /* vmulesw */, PPC::VMULESW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8129 | | { 12503 /* vmuleub */, PPC::VMULEUB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8130 | | { 12511 /* vmuleud */, PPC::VMULEUD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8131 | | { 12519 /* vmuleuh */, PPC::VMULEUH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8132 | | { 12527 /* vmuleuw */, PPC::VMULEUW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8133 | | { 12535 /* vmulhsd */, PPC::VMULHSD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8134 | | { 12543 /* vmulhsw */, PPC::VMULHSW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8135 | | { 12551 /* vmulhud */, PPC::VMULHUD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8136 | | { 12559 /* vmulhuw */, PPC::VMULHUW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8137 | | { 12567 /* vmulld */, PPC::VMULLD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8138 | | { 12574 /* vmulosb */, PPC::VMULOSB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8139 | | { 12582 /* vmulosd */, PPC::VMULOSD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8140 | | { 12590 /* vmulosh */, PPC::VMULOSH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8141 | | { 12598 /* vmulosw */, PPC::VMULOSW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8142 | | { 12606 /* vmuloub */, PPC::VMULOUB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8143 | | { 12614 /* vmuloud */, PPC::VMULOUD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8144 | | { 12622 /* vmulouh */, PPC::VMULOUH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8145 | | { 12630 /* vmulouw */, PPC::VMULOUW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8146 | | { 12638 /* vmuluwm */, PPC::VMULUWM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8147 | | { 12646 /* vnand */, PPC::VNAND, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8148 | | { 12652 /* vncipher */, PPC::VNCIPHER, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8149 | | { 12661 /* vncipherlast */, PPC::VNCIPHERLAST, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8150 | | { 12674 /* vnegd */, PPC::VNEGD, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8151 | | { 12680 /* vnegw */, PPC::VNEGW, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8152 | | { 12686 /* vnmsubfp */, PPC::VNMSUBFP, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8153 | | { 12695 /* vnor */, PPC::VNOR, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8154 | | { 12700 /* vnot */, PPC::VNOR, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8155 | | { 12705 /* vor */, PPC::VOR, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8156 | | { 12709 /* vorc */, PPC::VORC, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8157 | | { 12714 /* vpdepd */, PPC::VPDEPD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8158 | | { 12721 /* vperm */, PPC::VPERM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8159 | | { 12727 /* vpermr */, PPC::VPERMR, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8160 | | { 12734 /* vpermxor */, PPC::VPERMXOR, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8161 | | { 12743 /* vpextd */, PPC::VPEXTD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8162 | | { 12750 /* vpkpx */, PPC::VPKPX, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8163 | | { 12756 /* vpksdss */, PPC::VPKSDSS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8164 | | { 12764 /* vpksdus */, PPC::VPKSDUS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8165 | | { 12772 /* vpkshss */, PPC::VPKSHSS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8166 | | { 12780 /* vpkshus */, PPC::VPKSHUS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8167 | | { 12788 /* vpkswss */, PPC::VPKSWSS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8168 | | { 12796 /* vpkswus */, PPC::VPKSWUS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8169 | | { 12804 /* vpkudum */, PPC::VPKUDUM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8170 | | { 12812 /* vpkudus */, PPC::VPKUDUS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8171 | | { 12820 /* vpkuhum */, PPC::VPKUHUM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8172 | | { 12828 /* vpkuhus */, PPC::VPKUHUS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8173 | | { 12836 /* vpkuwum */, PPC::VPKUWUM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8174 | | { 12844 /* vpkuwus */, PPC::VPKUWUS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8175 | | { 12852 /* vpmsumb */, PPC::VPMSUMB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8176 | | { 12860 /* vpmsumd */, PPC::VPMSUMD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8177 | | { 12868 /* vpmsumh */, PPC::VPMSUMH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8178 | | { 12876 /* vpmsumw */, PPC::VPMSUMW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8179 | | { 12884 /* vpopcntb */, PPC::VPOPCNTB, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8180 | | { 12893 /* vpopcntd */, PPC::VPOPCNTD, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8181 | | { 12902 /* vpopcnth */, PPC::VPOPCNTH, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8182 | | { 12911 /* vpopcntw */, PPC::VPOPCNTW, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8183 | | { 12920 /* vprtybd */, PPC::VPRTYBD, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8184 | | { 12928 /* vprtybq */, PPC::VPRTYBQ, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8185 | | { 12936 /* vprtybw */, PPC::VPRTYBW, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8186 | | { 12944 /* vrefp */, PPC::VREFP, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8187 | | { 12950 /* vrfim */, PPC::VRFIM, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8188 | | { 12956 /* vrfin */, PPC::VRFIN, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8189 | | { 12962 /* vrfip */, PPC::VRFIP, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8190 | | { 12968 /* vrfiz */, PPC::VRFIZ, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8191 | | { 12974 /* vrlb */, PPC::VRLB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8192 | | { 12979 /* vrld */, PPC::VRLD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8193 | | { 12984 /* vrldmi */, PPC::VRLDMI, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__Tie0_1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8194 | | { 12991 /* vrldnm */, PPC::VRLDNM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8195 | | { 12998 /* vrlh */, PPC::VRLH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8196 | | { 13003 /* vrlq */, PPC::VRLQ, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8197 | | { 13008 /* vrlqmi */, PPC::VRLQMI, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__Tie0_1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8198 | | { 13015 /* vrlqnm */, PPC::VRLQNM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8199 | | { 13022 /* vrlw */, PPC::VRLW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8200 | | { 13027 /* vrlwmi */, PPC::VRLWMI, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__Tie0_1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8201 | | { 13034 /* vrlwnm */, PPC::VRLWNM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8202 | | { 13041 /* vrsqrtefp */, PPC::VRSQRTEFP, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8203 | | { 13051 /* vsbox */, PPC::VSBOX, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8204 | | { 13057 /* vsel */, PPC::VSEL, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8205 | | { 13062 /* vshasigmad */, PPC::VSHASIGMAD, Convert__RegVRRC1_0__RegVRRC1_1__U1Imm1_2__U4Imm1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_U1Imm, MCK_U4Imm }, }, |
8206 | | { 13073 /* vshasigmaw */, PPC::VSHASIGMAW, Convert__RegVRRC1_0__RegVRRC1_1__U1Imm1_2__U4Imm1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_U1Imm, MCK_U4Imm }, }, |
8207 | | { 13084 /* vsl */, PPC::VSL, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8208 | | { 13088 /* vslb */, PPC::VSLB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8209 | | { 13093 /* vsld */, PPC::VSLD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8210 | | { 13098 /* vsldbi */, PPC::VSLDBI, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__U3Imm1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_U3Imm }, }, |
8211 | | { 13105 /* vsldoi */, PPC::VSLDOI, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__U4Imm1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_U4Imm }, }, |
8212 | | { 13112 /* vslh */, PPC::VSLH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8213 | | { 13117 /* vslo */, PPC::VSLO, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8214 | | { 13122 /* vslq */, PPC::VSLQ, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8215 | | { 13127 /* vslv */, PPC::VSLV, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8216 | | { 13132 /* vslw */, PPC::VSLW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8217 | | { 13137 /* vspltb */, PPC::VSPLTB, Convert__RegVRRC1_0__U5Imm1_2__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_U5Imm }, }, |
8218 | | { 13144 /* vsplth */, PPC::VSPLTH, Convert__RegVRRC1_0__U5Imm1_2__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_U5Imm }, }, |
8219 | | { 13151 /* vspltisb */, PPC::VSPLTISB, Convert__RegVRRC1_0__S5Imm1_1, AMFBS_None, { MCK_RegVRRC, MCK_S5Imm }, }, |
8220 | | { 13160 /* vspltish */, PPC::VSPLTISH, Convert__RegVRRC1_0__S5Imm1_1, AMFBS_None, { MCK_RegVRRC, MCK_S5Imm }, }, |
8221 | | { 13169 /* vspltisw */, PPC::VSPLTISW, Convert__RegVRRC1_0__S5Imm1_1, AMFBS_None, { MCK_RegVRRC, MCK_S5Imm }, }, |
8222 | | { 13178 /* vspltw */, PPC::VSPLTW, Convert__RegVRRC1_0__U5Imm1_2__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_U5Imm }, }, |
8223 | | { 13185 /* vsr */, PPC::VSR, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8224 | | { 13189 /* vsrab */, PPC::VSRAB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8225 | | { 13195 /* vsrad */, PPC::VSRAD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8226 | | { 13201 /* vsrah */, PPC::VSRAH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8227 | | { 13207 /* vsraq */, PPC::VSRAQ, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8228 | | { 13213 /* vsraw */, PPC::VSRAW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8229 | | { 13219 /* vsrb */, PPC::VSRB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8230 | | { 13224 /* vsrd */, PPC::VSRD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8231 | | { 13229 /* vsrdbi */, PPC::VSRDBI, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__U3Imm1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_U3Imm }, }, |
8232 | | { 13236 /* vsrh */, PPC::VSRH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8233 | | { 13241 /* vsro */, PPC::VSRO, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8234 | | { 13246 /* vsrq */, PPC::VSRQ, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8235 | | { 13251 /* vsrv */, PPC::VSRV, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8236 | | { 13256 /* vsrw */, PPC::VSRW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8237 | | { 13261 /* vstribl */, PPC::VSTRIBL, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8238 | | { 13261 /* vstribl */, PPC::VSTRIBL_rec, Convert__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC }, }, |
8239 | | { 13269 /* vstribr */, PPC::VSTRIBR, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8240 | | { 13269 /* vstribr */, PPC::VSTRIBR_rec, Convert__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC }, }, |
8241 | | { 13277 /* vstrihl */, PPC::VSTRIHL, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8242 | | { 13277 /* vstrihl */, PPC::VSTRIHL_rec, Convert__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC }, }, |
8243 | | { 13285 /* vstrihr */, PPC::VSTRIHR, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8244 | | { 13285 /* vstrihr */, PPC::VSTRIHR_rec, Convert__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC }, }, |
8245 | | { 13293 /* vsubcuq */, PPC::VSUBCUQ, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8246 | | { 13301 /* vsubcuw */, PPC::VSUBCUW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8247 | | { 13309 /* vsubecuq */, PPC::VSUBECUQ, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8248 | | { 13318 /* vsubeuqm */, PPC::VSUBEUQM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8249 | | { 13327 /* vsubfp */, PPC::VSUBFP, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8250 | | { 13334 /* vsubsbs */, PPC::VSUBSBS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8251 | | { 13342 /* vsubshs */, PPC::VSUBSHS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8252 | | { 13350 /* vsubsws */, PPC::VSUBSWS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8253 | | { 13358 /* vsububm */, PPC::VSUBUBM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8254 | | { 13366 /* vsububs */, PPC::VSUBUBS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8255 | | { 13374 /* vsubudm */, PPC::VSUBUDM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8256 | | { 13382 /* vsubuhm */, PPC::VSUBUHM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8257 | | { 13390 /* vsubuhs */, PPC::VSUBUHS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8258 | | { 13398 /* vsubuqm */, PPC::VSUBUQM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8259 | | { 13406 /* vsubuwm */, PPC::VSUBUWM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8260 | | { 13414 /* vsubuws */, PPC::VSUBUWS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8261 | | { 13422 /* vsum2sws */, PPC::VSUM2SWS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8262 | | { 13431 /* vsum4sbs */, PPC::VSUM4SBS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8263 | | { 13440 /* vsum4shs */, PPC::VSUM4SHS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8264 | | { 13449 /* vsum4ubs */, PPC::VSUM4UBS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8265 | | { 13458 /* vsumsws */, PPC::VSUMSWS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8266 | | { 13466 /* vupkhpx */, PPC::VUPKHPX, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8267 | | { 13474 /* vupkhsb */, PPC::VUPKHSB, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8268 | | { 13482 /* vupkhsh */, PPC::VUPKHSH, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8269 | | { 13490 /* vupkhsw */, PPC::VUPKHSW, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8270 | | { 13498 /* vupklpx */, PPC::VUPKLPX, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8271 | | { 13506 /* vupklsb */, PPC::VUPKLSB, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8272 | | { 13514 /* vupklsh */, PPC::VUPKLSH, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8273 | | { 13522 /* vupklsw */, PPC::VUPKLSW, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8274 | | { 13530 /* vxor */, PPC::VXOR, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8275 | | { 13535 /* wait */, PPC::WAITP10, Convert__imm_95_0__imm_95_0, AMFBS_None, { }, }, |
8276 | | { 13535 /* wait */, PPC::WAIT, Convert__imm_95_0, AMFBS_None, { }, }, |
8277 | | { 13535 /* wait */, PPC::WAITP10, Convert__imm_95_0__imm_95_0, AMFBS_None, { MCK_0 }, }, |
8278 | | { 13535 /* wait */, PPC::WAITP10, Convert__imm_95_1__imm_95_0, AMFBS_None, { MCK_1 }, }, |
8279 | | { 13535 /* wait */, PPC::WAIT, Convert__U2Imm1_0, AMFBS_None, { MCK_U2Imm }, }, |
8280 | | { 13535 /* wait */, PPC::WAITP10, Convert__U2Imm1_0__U2Imm1_1, AMFBS_None, { MCK_U2Imm, MCK_U2Imm }, }, |
8281 | | { 13540 /* waitimpl */, PPC::WAIT, Convert__imm_95_2, AMFBS_None, { }, }, |
8282 | | { 13549 /* waitrsv */, PPC::WAITP10, Convert__imm_95_1__imm_95_0, AMFBS_None, { }, }, |
8283 | | { 13549 /* waitrsv */, PPC::WAIT, Convert__imm_95_1, AMFBS_None, { }, }, |
8284 | | { 13557 /* wrtee */, PPC::WRTEE, Convert__RegGPRC1_0, AMFBS_None, { MCK_RegGPRC }, }, |
8285 | | { 13563 /* wrteei */, PPC::WRTEEI, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
8286 | | { 13570 /* wsync */, PPC::SYNCP10, Convert__imm_95_1__imm_95_0, AMFBS_None, { }, }, |
8287 | | { 13576 /* xnop */, PPC::XORI8, Convert__regX0__regX0__imm_95_0, AMFBS_None, { }, }, |
8288 | | { 13576 /* xnop */, PPC::XORI, Convert__regR0__regR0__imm_95_0, AMFBS_None, { }, }, |
8289 | | { 13581 /* xor */, PPC::XOR, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
8290 | | { 13581 /* xor */, PPC::XOR_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
8291 | | { 13585 /* xori */, PPC::XORI, Convert__RegGPRC1_0__RegGPRC1_1__U16Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U16Imm }, }, |
8292 | | { 13590 /* xoris */, PPC::XORIS, Convert__RegGPRC1_0__RegGPRC1_1__U16Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U16Imm }, }, |
8293 | | { 13596 /* xsabsdp */, PPC::XSABSDP, Convert__RegVSFRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8294 | | { 13604 /* xsabsqp */, PPC::XSABSQP, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8295 | | { 13612 /* xsadddp */, PPC::XSADDDP, Convert__RegVSFRC1_0__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8296 | | { 13620 /* xsaddqp */, PPC::XSADDQP, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8297 | | { 13628 /* xsaddqpo */, PPC::XSADDQPO, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8298 | | { 13637 /* xsaddsp */, PPC::XSADDSP, Convert__RegVSSRC1_0__RegVSSRC1_1__RegVSSRC1_2, AMFBS_None, { MCK_RegVSSRC, MCK_RegVSSRC, MCK_RegVSSRC }, }, |
8299 | | { 13645 /* xscmpeqdp */, PPC::XSCMPEQDP, Convert__RegVSRC1_0__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8300 | | { 13655 /* xscmpeqqp */, PPC::XSCMPEQQP, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8301 | | { 13665 /* xscmpexpdp */, PPC::XSCMPEXPDP, Convert__RegCRRC1_0__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8302 | | { 13676 /* xscmpexpqp */, PPC::XSCMPEXPQP, Convert__RegCRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8303 | | { 13687 /* xscmpgedp */, PPC::XSCMPGEDP, Convert__RegVSRC1_0__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8304 | | { 13697 /* xscmpgeqp */, PPC::XSCMPGEQP, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8305 | | { 13707 /* xscmpgtdp */, PPC::XSCMPGTDP, Convert__RegVSRC1_0__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8306 | | { 13717 /* xscmpgtqp */, PPC::XSCMPGTQP, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8307 | | { 13727 /* xscmpodp */, PPC::XSCMPODP, Convert__RegCRRC1_0__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8308 | | { 13736 /* xscmpoqp */, PPC::XSCMPOQP, Convert__RegCRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8309 | | { 13745 /* xscmpudp */, PPC::XSCMPUDP, Convert__RegCRRC1_0__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8310 | | { 13754 /* xscmpuqp */, PPC::XSCMPUQP, Convert__RegCRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8311 | | { 13763 /* xscpsgndp */, PPC::XSCPSGNDP, Convert__RegVSFRC1_0__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8312 | | { 13773 /* xscpsgnqp */, PPC::XSCPSGNQP, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8313 | | { 13783 /* xscvdphp */, PPC::XSCVDPHP, Convert__RegVSFRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8314 | | { 13792 /* xscvdpqp */, PPC::XSCVDPQP, Convert__RegVRRC1_0__RegVFRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVFRC }, }, |
8315 | | { 13801 /* xscvdpsp */, PPC::XSCVDPSP, Convert__RegVSFRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8316 | | { 13810 /* xscvdpspn */, PPC::XSCVDPSPN, Convert__RegVSRC1_0__RegVSSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSSRC }, }, |
8317 | | { 13820 /* xscvdpsxds */, PPC::XSCVDPSXDS, Convert__RegVSFRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8318 | | { 13831 /* xscvdpsxws */, PPC::XSCVDPSXWS, Convert__RegVSFRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8319 | | { 13842 /* xscvdpuxds */, PPC::XSCVDPUXDS, Convert__RegVSFRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8320 | | { 13853 /* xscvdpuxws */, PPC::XSCVDPUXWS, Convert__RegVSFRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8321 | | { 13864 /* xscvhpdp */, PPC::XSCVHPDP, Convert__RegVSFRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8322 | | { 13873 /* xscvqpdp */, PPC::XSCVQPDP, Convert__RegVFRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVFRC, MCK_RegVRRC }, }, |
8323 | | { 13882 /* xscvqpdpo */, PPC::XSCVQPDPO, Convert__RegVFRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVFRC, MCK_RegVRRC }, }, |
8324 | | { 13892 /* xscvqpsdz */, PPC::XSCVQPSDZ, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8325 | | { 13902 /* xscvqpsqz */, PPC::XSCVQPSQZ, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8326 | | { 13912 /* xscvqpswz */, PPC::XSCVQPSWZ, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8327 | | { 13922 /* xscvqpudz */, PPC::XSCVQPUDZ, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8328 | | { 13932 /* xscvqpuqz */, PPC::XSCVQPUQZ, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8329 | | { 13942 /* xscvqpuwz */, PPC::XSCVQPUWZ, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8330 | | { 13952 /* xscvsdqp */, PPC::XSCVSDQP, Convert__RegVRRC1_0__RegVFRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVFRC }, }, |
8331 | | { 13961 /* xscvspdp */, PPC::XSCVSPDP, Convert__RegVSFRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8332 | | { 13970 /* xscvspdpn */, PPC::XSCVSPDPN, Convert__RegVSSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSSRC, MCK_RegVSRC }, }, |
8333 | | { 13980 /* xscvsqqp */, PPC::XSCVSQQP, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8334 | | { 13989 /* xscvsxddp */, PPC::XSCVSXDDP, Convert__RegVSFRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8335 | | { 13999 /* xscvsxdsp */, PPC::XSCVSXDSP, Convert__RegVSSRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSSRC, MCK_RegVSFRC }, }, |
8336 | | { 14009 /* xscvudqp */, PPC::XSCVUDQP, Convert__RegVRRC1_0__RegVFRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVFRC }, }, |
8337 | | { 14018 /* xscvuqqp */, PPC::XSCVUQQP, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8338 | | { 14027 /* xscvuxddp */, PPC::XSCVUXDDP, Convert__RegVSFRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8339 | | { 14037 /* xscvuxdsp */, PPC::XSCVUXDSP, Convert__RegVSSRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSSRC, MCK_RegVSFRC }, }, |
8340 | | { 14047 /* xsdivdp */, PPC::XSDIVDP, Convert__RegVSFRC1_0__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8341 | | { 14055 /* xsdivqp */, PPC::XSDIVQP, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8342 | | { 14063 /* xsdivqpo */, PPC::XSDIVQPO, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8343 | | { 14072 /* xsdivsp */, PPC::XSDIVSP, Convert__RegVSSRC1_0__RegVSSRC1_1__RegVSSRC1_2, AMFBS_None, { MCK_RegVSSRC, MCK_RegVSSRC, MCK_RegVSSRC }, }, |
8344 | | { 14080 /* xsiexpdp */, PPC::XSIEXPDP, Convert__RegVSRC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegG8RC, MCK_RegG8RC }, }, |
8345 | | { 14089 /* xsiexpqp */, PPC::XSIEXPQP, Convert__RegVRRC1_0__RegVRRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVSFRC }, }, |
8346 | | { 14098 /* xsmaddadp */, PPC::XSMADDADP, Convert__RegVSFRC1_0__Tie0_1_1__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8347 | | { 14108 /* xsmaddasp */, PPC::XSMADDASP, Convert__RegVSSRC1_0__Tie0_1_1__RegVSSRC1_1__RegVSSRC1_2, AMFBS_None, { MCK_RegVSSRC, MCK_RegVSSRC, MCK_RegVSSRC }, }, |
8348 | | { 14118 /* xsmaddmdp */, PPC::XSMADDMDP, Convert__RegVSFRC1_0__Tie0_1_1__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8349 | | { 14128 /* xsmaddmsp */, PPC::XSMADDMSP, Convert__RegVSSRC1_0__Tie0_1_1__RegVSSRC1_1__RegVSSRC1_2, AMFBS_None, { MCK_RegVSSRC, MCK_RegVSSRC, MCK_RegVSSRC }, }, |
8350 | | { 14138 /* xsmaddqp */, PPC::XSMADDQP, Convert__RegVRRC1_0__Tie0_1_1__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8351 | | { 14147 /* xsmaddqpo */, PPC::XSMADDQPO, Convert__RegVRRC1_0__Tie0_1_1__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8352 | | { 14157 /* xsmaxcdp */, PPC::XSMAXCDP, Convert__RegVSFRC1_0__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8353 | | { 14166 /* xsmaxcqp */, PPC::XSMAXCQP, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8354 | | { 14175 /* xsmaxdp */, PPC::XSMAXDP, Convert__RegVSFRC1_0__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8355 | | { 14183 /* xsmaxjdp */, PPC::XSMAXJDP, Convert__RegVSRC1_0__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8356 | | { 14192 /* xsmincdp */, PPC::XSMINCDP, Convert__RegVSFRC1_0__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8357 | | { 14201 /* xsmincqp */, PPC::XSMINCQP, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8358 | | { 14210 /* xsmindp */, PPC::XSMINDP, Convert__RegVSFRC1_0__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8359 | | { 14218 /* xsminjdp */, PPC::XSMINJDP, Convert__RegVSRC1_0__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8360 | | { 14227 /* xsmsubadp */, PPC::XSMSUBADP, Convert__RegVSFRC1_0__Tie0_1_1__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8361 | | { 14237 /* xsmsubasp */, PPC::XSMSUBASP, Convert__RegVSSRC1_0__Tie0_1_1__RegVSSRC1_1__RegVSSRC1_2, AMFBS_None, { MCK_RegVSSRC, MCK_RegVSSRC, MCK_RegVSSRC }, }, |
8362 | | { 14247 /* xsmsubmdp */, PPC::XSMSUBMDP, Convert__RegVSFRC1_0__Tie0_1_1__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8363 | | { 14257 /* xsmsubmsp */, PPC::XSMSUBMSP, Convert__RegVSSRC1_0__Tie0_1_1__RegVSSRC1_1__RegVSSRC1_2, AMFBS_None, { MCK_RegVSSRC, MCK_RegVSSRC, MCK_RegVSSRC }, }, |
8364 | | { 14267 /* xsmsubqp */, PPC::XSMSUBQP, Convert__RegVRRC1_0__Tie0_1_1__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8365 | | { 14276 /* xsmsubqpo */, PPC::XSMSUBQPO, Convert__RegVRRC1_0__Tie0_1_1__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8366 | | { 14286 /* xsmuldp */, PPC::XSMULDP, Convert__RegVSFRC1_0__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8367 | | { 14294 /* xsmulqp */, PPC::XSMULQP, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8368 | | { 14302 /* xsmulqpo */, PPC::XSMULQPO, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8369 | | { 14311 /* xsmulsp */, PPC::XSMULSP, Convert__RegVSSRC1_0__RegVSSRC1_1__RegVSSRC1_2, AMFBS_None, { MCK_RegVSSRC, MCK_RegVSSRC, MCK_RegVSSRC }, }, |
8370 | | { 14319 /* xsnabsdp */, PPC::XSNABSDP, Convert__RegVSFRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8371 | | { 14328 /* xsnabsqp */, PPC::XSNABSQP, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8372 | | { 14337 /* xsnegdp */, PPC::XSNEGDP, Convert__RegVSFRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8373 | | { 14345 /* xsnegqp */, PPC::XSNEGQP, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8374 | | { 14353 /* xsnmaddadp */, PPC::XSNMADDADP, Convert__RegVSFRC1_0__Tie0_1_1__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8375 | | { 14364 /* xsnmaddasp */, PPC::XSNMADDASP, Convert__RegVSSRC1_0__Tie0_1_1__RegVSSRC1_1__RegVSSRC1_2, AMFBS_None, { MCK_RegVSSRC, MCK_RegVSSRC, MCK_RegVSSRC }, }, |
8376 | | { 14375 /* xsnmaddmdp */, PPC::XSNMADDMDP, Convert__RegVSFRC1_0__Tie0_1_1__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8377 | | { 14386 /* xsnmaddmsp */, PPC::XSNMADDMSP, Convert__RegVSSRC1_0__Tie0_1_1__RegVSSRC1_1__RegVSSRC1_2, AMFBS_None, { MCK_RegVSSRC, MCK_RegVSSRC, MCK_RegVSSRC }, }, |
8378 | | { 14397 /* xsnmaddqp */, PPC::XSNMADDQP, Convert__RegVRRC1_0__Tie0_1_1__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8379 | | { 14407 /* xsnmaddqpo */, PPC::XSNMADDQPO, Convert__RegVRRC1_0__Tie0_1_1__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8380 | | { 14418 /* xsnmsubadp */, PPC::XSNMSUBADP, Convert__RegVSFRC1_0__Tie0_1_1__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8381 | | { 14429 /* xsnmsubasp */, PPC::XSNMSUBASP, Convert__RegVSSRC1_0__Tie0_1_1__RegVSSRC1_1__RegVSSRC1_2, AMFBS_None, { MCK_RegVSSRC, MCK_RegVSSRC, MCK_RegVSSRC }, }, |
8382 | | { 14440 /* xsnmsubmdp */, PPC::XSNMSUBMDP, Convert__RegVSFRC1_0__Tie0_1_1__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8383 | | { 14451 /* xsnmsubmsp */, PPC::XSNMSUBMSP, Convert__RegVSSRC1_0__Tie0_1_1__RegVSSRC1_1__RegVSSRC1_2, AMFBS_None, { MCK_RegVSSRC, MCK_RegVSSRC, MCK_RegVSSRC }, }, |
8384 | | { 14462 /* xsnmsubqp */, PPC::XSNMSUBQP, Convert__RegVRRC1_0__Tie0_1_1__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8385 | | { 14472 /* xsnmsubqpo */, PPC::XSNMSUBQPO, Convert__RegVRRC1_0__Tie0_1_1__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8386 | | { 14483 /* xsrdpi */, PPC::XSRDPI, Convert__RegVSFRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8387 | | { 14490 /* xsrdpic */, PPC::XSRDPIC, Convert__RegVSFRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8388 | | { 14498 /* xsrdpim */, PPC::XSRDPIM, Convert__RegVSFRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8389 | | { 14506 /* xsrdpip */, PPC::XSRDPIP, Convert__RegVSFRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8390 | | { 14514 /* xsrdpiz */, PPC::XSRDPIZ, Convert__RegVSFRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8391 | | { 14522 /* xsredp */, PPC::XSREDP, Convert__RegVSFRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8392 | | { 14529 /* xsresp */, PPC::XSRESP, Convert__RegVSSRC1_0__RegVSSRC1_1, AMFBS_None, { MCK_RegVSSRC, MCK_RegVSSRC }, }, |
8393 | | { 14536 /* xsrqpi */, PPC::XSRQPI, Convert__RegVRRC1_1__U1Imm1_0__RegVRRC1_2__U2Imm1_3, AMFBS_None, { MCK_U1Imm, MCK_RegVRRC, MCK_RegVRRC, MCK_U2Imm }, }, |
8394 | | { 14543 /* xsrqpix */, PPC::XSRQPIX, Convert__RegVRRC1_1__U1Imm1_0__RegVRRC1_2__U2Imm1_3, AMFBS_None, { MCK_U1Imm, MCK_RegVRRC, MCK_RegVRRC, MCK_U2Imm }, }, |
8395 | | { 14551 /* xsrqpxp */, PPC::XSRQPXP, Convert__RegVRRC1_1__U1Imm1_0__RegVRRC1_2__U2Imm1_3, AMFBS_None, { MCK_U1Imm, MCK_RegVRRC, MCK_RegVRRC, MCK_U2Imm }, }, |
8396 | | { 14559 /* xsrsp */, PPC::XSRSP, Convert__RegVSSRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSSRC, MCK_RegVSFRC }, }, |
8397 | | { 14565 /* xsrsqrtedp */, PPC::XSRSQRTEDP, Convert__RegVSFRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8398 | | { 14576 /* xsrsqrtesp */, PPC::XSRSQRTESP, Convert__RegVSSRC1_0__RegVSSRC1_1, AMFBS_None, { MCK_RegVSSRC, MCK_RegVSSRC }, }, |
8399 | | { 14587 /* xssqrtdp */, PPC::XSSQRTDP, Convert__RegVSFRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8400 | | { 14596 /* xssqrtqp */, PPC::XSSQRTQP, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8401 | | { 14605 /* xssqrtqpo */, PPC::XSSQRTQPO, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8402 | | { 14615 /* xssqrtsp */, PPC::XSSQRTSP, Convert__RegVSSRC1_0__RegVSSRC1_1, AMFBS_None, { MCK_RegVSSRC, MCK_RegVSSRC }, }, |
8403 | | { 14624 /* xssubdp */, PPC::XSSUBDP, Convert__RegVSFRC1_0__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8404 | | { 14632 /* xssubqp */, PPC::XSSUBQP, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8405 | | { 14640 /* xssubqpo */, PPC::XSSUBQPO, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
8406 | | { 14649 /* xssubsp */, PPC::XSSUBSP, Convert__RegVSSRC1_0__RegVSSRC1_1__RegVSSRC1_2, AMFBS_None, { MCK_RegVSSRC, MCK_RegVSSRC, MCK_RegVSSRC }, }, |
8407 | | { 14657 /* xstdivdp */, PPC::XSTDIVDP, Convert__RegCRRC1_0__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
8408 | | { 14666 /* xstsqrtdp */, PPC::XSTSQRTDP, Convert__RegCRRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegCRRC, MCK_RegVSFRC }, }, |
8409 | | { 14676 /* xststdcdp */, PPC::XSTSTDCDP, Convert__RegCRRC1_0__U7Imm1_2__RegVSFRC1_1, AMFBS_None, { MCK_RegCRRC, MCK_RegVSFRC, MCK_U7Imm }, }, |
8410 | | { 14686 /* xststdcqp */, PPC::XSTSTDCQP, Convert__RegCRRC1_0__U7Imm1_2__RegVRRC1_1, AMFBS_None, { MCK_RegCRRC, MCK_RegVRRC, MCK_U7Imm }, }, |
8411 | | { 14696 /* xststdcsp */, PPC::XSTSTDCSP, Convert__RegCRRC1_0__U7Imm1_2__RegVSFRC1_1, AMFBS_None, { MCK_RegCRRC, MCK_RegVSFRC, MCK_U7Imm }, }, |
8412 | | { 14706 /* xsxexpdp */, PPC::XSXEXPDP, Convert__RegG8RC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegVSFRC }, }, |
8413 | | { 14715 /* xsxexpqp */, PPC::XSXEXPQP, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8414 | | { 14724 /* xsxsigdp */, PPC::XSXSIGDP, Convert__RegG8RC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegVSFRC }, }, |
8415 | | { 14733 /* xsxsigqp */, PPC::XSXSIGQP, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
8416 | | { 14742 /* xvabsdp */, PPC::XVABSDP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8417 | | { 14750 /* xvabssp */, PPC::XVABSSP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8418 | | { 14758 /* xvadddp */, PPC::XVADDDP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8419 | | { 14766 /* xvaddsp */, PPC::XVADDSP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8420 | | { 14774 /* xvbf16ger2 */, PPC::XVBF16GER2, Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8421 | | { 14785 /* xvbf16ger2nn */, PPC::XVBF16GER2NN, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8422 | | { 14798 /* xvbf16ger2np */, PPC::XVBF16GER2NP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8423 | | { 14811 /* xvbf16ger2pn */, PPC::XVBF16GER2PN, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8424 | | { 14824 /* xvbf16ger2pp */, PPC::XVBF16GER2PP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8425 | | { 14837 /* xvcmpeqdp */, PPC::XVCMPEQDP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8426 | | { 14837 /* xvcmpeqdp */, PPC::XVCMPEQDP_rec, Convert__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8427 | | { 14847 /* xvcmpeqsp */, PPC::XVCMPEQSP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8428 | | { 14847 /* xvcmpeqsp */, PPC::XVCMPEQSP_rec, Convert__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8429 | | { 14857 /* xvcmpgedp */, PPC::XVCMPGEDP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8430 | | { 14857 /* xvcmpgedp */, PPC::XVCMPGEDP_rec, Convert__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8431 | | { 14867 /* xvcmpgesp */, PPC::XVCMPGESP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8432 | | { 14867 /* xvcmpgesp */, PPC::XVCMPGESP_rec, Convert__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8433 | | { 14877 /* xvcmpgtdp */, PPC::XVCMPGTDP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8434 | | { 14877 /* xvcmpgtdp */, PPC::XVCMPGTDP_rec, Convert__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8435 | | { 14887 /* xvcmpgtsp */, PPC::XVCMPGTSP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8436 | | { 14887 /* xvcmpgtsp */, PPC::XVCMPGTSP_rec, Convert__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8437 | | { 14897 /* xvcpsgndp */, PPC::XVCPSGNDP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8438 | | { 14907 /* xvcpsgnsp */, PPC::XVCPSGNSP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8439 | | { 14917 /* xvcvbf16spn */, PPC::XVCVBF16SPN, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8440 | | { 14929 /* xvcvdpsp */, PPC::XVCVDPSP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8441 | | { 14938 /* xvcvdpsxds */, PPC::XVCVDPSXDS, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8442 | | { 14949 /* xvcvdpsxws */, PPC::XVCVDPSXWS, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8443 | | { 14960 /* xvcvdpuxds */, PPC::XVCVDPUXDS, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8444 | | { 14971 /* xvcvdpuxws */, PPC::XVCVDPUXWS, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8445 | | { 14982 /* xvcvhpsp */, PPC::XVCVHPSP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8446 | | { 14991 /* xvcvspbf16 */, PPC::XVCVSPBF16, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8447 | | { 15002 /* xvcvspdp */, PPC::XVCVSPDP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8448 | | { 15011 /* xvcvsphp */, PPC::XVCVSPHP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8449 | | { 15020 /* xvcvspsxds */, PPC::XVCVSPSXDS, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8450 | | { 15031 /* xvcvspsxws */, PPC::XVCVSPSXWS, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8451 | | { 15042 /* xvcvspuxds */, PPC::XVCVSPUXDS, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8452 | | { 15053 /* xvcvspuxws */, PPC::XVCVSPUXWS, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8453 | | { 15064 /* xvcvsxddp */, PPC::XVCVSXDDP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8454 | | { 15074 /* xvcvsxdsp */, PPC::XVCVSXDSP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8455 | | { 15084 /* xvcvsxwdp */, PPC::XVCVSXWDP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8456 | | { 15094 /* xvcvsxwsp */, PPC::XVCVSXWSP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8457 | | { 15104 /* xvcvuxddp */, PPC::XVCVUXDDP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8458 | | { 15114 /* xvcvuxdsp */, PPC::XVCVUXDSP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8459 | | { 15124 /* xvcvuxwdp */, PPC::XVCVUXWDP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8460 | | { 15134 /* xvcvuxwsp */, PPC::XVCVUXWSP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8461 | | { 15144 /* xvdivdp */, PPC::XVDIVDP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8462 | | { 15152 /* xvdivsp */, PPC::XVDIVSP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8463 | | { 15160 /* xvf16ger2 */, PPC::XVF16GER2, Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8464 | | { 15170 /* xvf16ger2nn */, PPC::XVF16GER2NN, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8465 | | { 15182 /* xvf16ger2np */, PPC::XVF16GER2NP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8466 | | { 15194 /* xvf16ger2pn */, PPC::XVF16GER2PN, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8467 | | { 15206 /* xvf16ger2pp */, PPC::XVF16GER2PP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8468 | | { 15218 /* xvf32ger */, PPC::XVF32GER, Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8469 | | { 15227 /* xvf32gernn */, PPC::XVF32GERNN, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8470 | | { 15238 /* xvf32gernp */, PPC::XVF32GERNP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8471 | | { 15249 /* xvf32gerpn */, PPC::XVF32GERPN, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8472 | | { 15260 /* xvf32gerpp */, PPC::XVF32GERPP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8473 | | { 15271 /* xvf64ger */, PPC::XVF64GER, Convert__RegACCRC1_0__RegVSRpEvenRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRpEvenRC, MCK_RegVSRC }, }, |
8474 | | { 15280 /* xvf64gernn */, PPC::XVF64GERNN, Convert__RegACCRC1_0__Tie0_1_1__RegVSRpEvenRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRpEvenRC, MCK_RegVSRC }, }, |
8475 | | { 15291 /* xvf64gernp */, PPC::XVF64GERNP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRpEvenRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRpEvenRC, MCK_RegVSRC }, }, |
8476 | | { 15302 /* xvf64gerpn */, PPC::XVF64GERPN, Convert__RegACCRC1_0__Tie0_1_1__RegVSRpEvenRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRpEvenRC, MCK_RegVSRC }, }, |
8477 | | { 15313 /* xvf64gerpp */, PPC::XVF64GERPP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRpEvenRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRpEvenRC, MCK_RegVSRC }, }, |
8478 | | { 15324 /* xvi16ger2 */, PPC::XVI16GER2, Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8479 | | { 15334 /* xvi16ger2pp */, PPC::XVI16GER2PP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8480 | | { 15346 /* xvi16ger2s */, PPC::XVI16GER2S, Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8481 | | { 15357 /* xvi16ger2spp */, PPC::XVI16GER2SPP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8482 | | { 15370 /* xvi4ger8 */, PPC::XVI4GER8, Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8483 | | { 15379 /* xvi4ger8pp */, PPC::XVI4GER8PP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8484 | | { 15390 /* xvi8ger4 */, PPC::XVI8GER4, Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8485 | | { 15399 /* xvi8ger4pp */, PPC::XVI8GER4PP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8486 | | { 15410 /* xvi8ger4spp */, PPC::XVI8GER4SPP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8487 | | { 15422 /* xviexpdp */, PPC::XVIEXPDP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8488 | | { 15431 /* xviexpsp */, PPC::XVIEXPSP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8489 | | { 15440 /* xvmaddadp */, PPC::XVMADDADP, Convert__RegVSRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8490 | | { 15450 /* xvmaddasp */, PPC::XVMADDASP, Convert__RegVSRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8491 | | { 15460 /* xvmaddmdp */, PPC::XVMADDMDP, Convert__RegVSRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8492 | | { 15470 /* xvmaddmsp */, PPC::XVMADDMSP, Convert__RegVSRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8493 | | { 15480 /* xvmaxdp */, PPC::XVMAXDP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8494 | | { 15488 /* xvmaxsp */, PPC::XVMAXSP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8495 | | { 15496 /* xvmindp */, PPC::XVMINDP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8496 | | { 15504 /* xvminsp */, PPC::XVMINSP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8497 | | { 15512 /* xvmovdp */, PPC::XVCPSGNDP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8498 | | { 15520 /* xvmovsp */, PPC::XVCPSGNSP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8499 | | { 15528 /* xvmsubadp */, PPC::XVMSUBADP, Convert__RegVSRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8500 | | { 15538 /* xvmsubasp */, PPC::XVMSUBASP, Convert__RegVSRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8501 | | { 15548 /* xvmsubmdp */, PPC::XVMSUBMDP, Convert__RegVSRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8502 | | { 15558 /* xvmsubmsp */, PPC::XVMSUBMSP, Convert__RegVSRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8503 | | { 15568 /* xvmuldp */, PPC::XVMULDP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8504 | | { 15576 /* xvmulsp */, PPC::XVMULSP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8505 | | { 15584 /* xvnabsdp */, PPC::XVNABSDP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8506 | | { 15593 /* xvnabssp */, PPC::XVNABSSP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8507 | | { 15602 /* xvnegdp */, PPC::XVNEGDP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8508 | | { 15610 /* xvnegsp */, PPC::XVNEGSP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8509 | | { 15618 /* xvnmaddadp */, PPC::XVNMADDADP, Convert__RegVSRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8510 | | { 15629 /* xvnmaddasp */, PPC::XVNMADDASP, Convert__RegVSRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8511 | | { 15640 /* xvnmaddmdp */, PPC::XVNMADDMDP, Convert__RegVSRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8512 | | { 15651 /* xvnmaddmsp */, PPC::XVNMADDMSP, Convert__RegVSRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8513 | | { 15662 /* xvnmsubadp */, PPC::XVNMSUBADP, Convert__RegVSRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8514 | | { 15673 /* xvnmsubasp */, PPC::XVNMSUBASP, Convert__RegVSRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8515 | | { 15684 /* xvnmsubmdp */, PPC::XVNMSUBMDP, Convert__RegVSRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8516 | | { 15695 /* xvnmsubmsp */, PPC::XVNMSUBMSP, Convert__RegVSRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8517 | | { 15706 /* xvrdpi */, PPC::XVRDPI, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8518 | | { 15713 /* xvrdpic */, PPC::XVRDPIC, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8519 | | { 15721 /* xvrdpim */, PPC::XVRDPIM, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8520 | | { 15729 /* xvrdpip */, PPC::XVRDPIP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8521 | | { 15737 /* xvrdpiz */, PPC::XVRDPIZ, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8522 | | { 15745 /* xvredp */, PPC::XVREDP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8523 | | { 15752 /* xvresp */, PPC::XVRESP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8524 | | { 15759 /* xvrspi */, PPC::XVRSPI, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8525 | | { 15766 /* xvrspic */, PPC::XVRSPIC, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8526 | | { 15774 /* xvrspim */, PPC::XVRSPIM, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8527 | | { 15782 /* xvrspip */, PPC::XVRSPIP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8528 | | { 15790 /* xvrspiz */, PPC::XVRSPIZ, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8529 | | { 15798 /* xvrsqrtedp */, PPC::XVRSQRTEDP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8530 | | { 15809 /* xvrsqrtesp */, PPC::XVRSQRTESP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8531 | | { 15820 /* xvsqrtdp */, PPC::XVSQRTDP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8532 | | { 15829 /* xvsqrtsp */, PPC::XVSQRTSP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8533 | | { 15838 /* xvsubdp */, PPC::XVSUBDP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8534 | | { 15846 /* xvsubsp */, PPC::XVSUBSP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8535 | | { 15854 /* xvtdivdp */, PPC::XVTDIVDP, Convert__RegCRRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8536 | | { 15863 /* xvtdivsp */, PPC::XVTDIVSP, Convert__RegCRRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8537 | | { 15872 /* xvtlsbb */, PPC::XVTLSBB, Convert__RegCRRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegCRRC, MCK_RegVSRC }, }, |
8538 | | { 15880 /* xvtsqrtdp */, PPC::XVTSQRTDP, Convert__RegCRRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegCRRC, MCK_RegVSRC }, }, |
8539 | | { 15890 /* xvtsqrtsp */, PPC::XVTSQRTSP, Convert__RegCRRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegCRRC, MCK_RegVSRC }, }, |
8540 | | { 15900 /* xvtstdcdp */, PPC::XVTSTDCDP, Convert__RegVSRC1_0__U7Imm1_2__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_U7Imm }, }, |
8541 | | { 15910 /* xvtstdcsp */, PPC::XVTSTDCSP, Convert__RegVSRC1_0__U7Imm1_2__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_U7Imm }, }, |
8542 | | { 15920 /* xvxexpdp */, PPC::XVXEXPDP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8543 | | { 15929 /* xvxexpsp */, PPC::XVXEXPSP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8544 | | { 15938 /* xvxsigdp */, PPC::XVXSIGDP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8545 | | { 15947 /* xvxsigsp */, PPC::XVXSIGSP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8546 | | { 15956 /* xxblendvb */, PPC::XXBLENDVB, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8547 | | { 15966 /* xxblendvd */, PPC::XXBLENDVD, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8548 | | { 15976 /* xxblendvh */, PPC::XXBLENDVH, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8549 | | { 15986 /* xxblendvw */, PPC::XXBLENDVW, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8550 | | { 15996 /* xxbrd */, PPC::XXBRD, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8551 | | { 16002 /* xxbrh */, PPC::XXBRH, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8552 | | { 16008 /* xxbrq */, PPC::XXBRQ, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8553 | | { 16014 /* xxbrw */, PPC::XXBRW, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8554 | | { 16020 /* xxeval */, PPC::XXEVAL, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3__U8Imm1_4, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U8Imm }, }, |
8555 | | { 16027 /* xxextractuw */, PPC::XXEXTRACTUW, Convert__RegVSFRC1_0__RegVSRC1_1__U4Imm1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSRC, MCK_U4Imm }, }, |
8556 | | { 16039 /* xxgenpcvbm */, PPC::XXGENPCVBM, Convert__RegVSRC1_0__RegVRRC1_1__S5Imm1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVRRC, MCK_S5Imm }, }, |
8557 | | { 16050 /* xxgenpcvdm */, PPC::XXGENPCVDM, Convert__RegVSRC1_0__RegVRRC1_1__S5Imm1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVRRC, MCK_S5Imm }, }, |
8558 | | { 16061 /* xxgenpcvhm */, PPC::XXGENPCVHM, Convert__RegVSRC1_0__RegVRRC1_1__S5Imm1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVRRC, MCK_S5Imm }, }, |
8559 | | { 16072 /* xxgenpcvwm */, PPC::XXGENPCVWM, Convert__RegVSRC1_0__RegVRRC1_1__S5Imm1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVRRC, MCK_S5Imm }, }, |
8560 | | { 16083 /* xxinsertw */, PPC::XXINSERTW, Convert__RegVSRC1_0__Tie0_1_1__RegVSRC1_1__U4Imm1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm }, }, |
8561 | | { 16093 /* xxland */, PPC::XXLAND, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8562 | | { 16100 /* xxlandc */, PPC::XXLANDC, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8563 | | { 16108 /* xxleqv */, PPC::XXLEQV, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8564 | | { 16115 /* xxlnand */, PPC::XXLNAND, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8565 | | { 16123 /* xxlnor */, PPC::XXLNOR, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8566 | | { 16130 /* xxlor */, PPC::XXLOR, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8567 | | { 16136 /* xxlorc */, PPC::XXLORC, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8568 | | { 16143 /* xxlxor */, PPC::XXLXOR, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8569 | | { 16150 /* xxmfacc */, PPC::XXMFACC, Convert__RegACCRC1_0__Tie0_1_1, AMFBS_None, { MCK_RegACCRC }, }, |
8570 | | { 16158 /* xxmrghd */, PPC::XXPERMDI, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__imm_95_0, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8571 | | { 16166 /* xxmrghw */, PPC::XXMRGHW, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8572 | | { 16174 /* xxmrgld */, PPC::XXPERMDI, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__imm_95_3, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8573 | | { 16182 /* xxmrglw */, PPC::XXMRGLW, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8574 | | { 16190 /* xxmtacc */, PPC::XXMTACC, Convert__RegACCRC1_0__Tie0_1_1, AMFBS_None, { MCK_RegACCRC }, }, |
8575 | | { 16198 /* xxperm */, PPC::XXPERM, Convert__RegVSRC1_0__RegVSRC1_1__Tie0_1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8576 | | { 16205 /* xxpermdi */, PPC::XXPERMDI, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__U2Imm1_3, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U2Imm }, }, |
8577 | | { 16214 /* xxpermr */, PPC::XXPERMR, Convert__RegVSRC1_0__RegVSRC1_1__Tie0_1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8578 | | { 16222 /* xxpermx */, PPC::XXPERMX, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3__U3Imm1_4, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U3Imm }, }, |
8579 | | { 16230 /* xxsel */, PPC::XXSEL, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
8580 | | { 16236 /* xxsetaccz */, PPC::XXSETACCZ, Convert__RegACCRC1_0, AMFBS_None, { MCK_RegACCRC }, }, |
8581 | | { 16246 /* xxsldwi */, PPC::XXSLDWI, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__U2Imm1_3, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U2Imm }, }, |
8582 | | { 16254 /* xxspltd */, PPC::XXPERMDIs, Convert__RegVSRC1_0__RegVSFRC1_1__imm_95_0, AMFBS_ModernAs, { MCK_RegVSRC, MCK_RegVSFRC, MCK_0 }, }, |
8583 | | { 16254 /* xxspltd */, PPC::XXPERMDIs, Convert__RegVSRC1_0__RegVSFRC1_1__imm_95_3, AMFBS_ModernAs, { MCK_RegVSRC, MCK_RegVSFRC, MCK_1 }, }, |
8584 | | { 16254 /* xxspltd */, PPC::XXPERMDI, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_1__imm_95_0, AMFBS_ModernAs, { MCK_RegVSRC, MCK_RegVSRC, MCK_0 }, }, |
8585 | | { 16254 /* xxspltd */, PPC::XXPERMDI, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_1__imm_95_3, AMFBS_ModernAs, { MCK_RegVSRC, MCK_RegVSRC, MCK_1 }, }, |
8586 | | { 16262 /* xxsplti32dx */, PPC::XXSPLTI32DX, Convert__RegVSRC1_0__Tie0_1_1__U1Imm1_1__Imm1_2, AMFBS_None, { MCK_RegVSRC, MCK_U1Imm, MCK_Imm }, }, |
8587 | | { 16274 /* xxspltib */, PPC::XXSPLTIB, Convert__RegVSRC1_0__U8Imm1_1, AMFBS_None, { MCK_RegVSRC, MCK_U8Imm }, }, |
8588 | | { 16283 /* xxspltidp */, PPC::XXSPLTIDP, Convert__RegVSRC1_0__Imm1_1, AMFBS_None, { MCK_RegVSRC, MCK_Imm }, }, |
8589 | | { 16293 /* xxspltiw */, PPC::XXSPLTIW, Convert__RegVSRC1_0__Imm1_1, AMFBS_None, { MCK_RegVSRC, MCK_Imm }, }, |
8590 | | { 16302 /* xxspltw */, PPC::XXSPLTW, Convert__RegVSRC1_0__RegVSRC1_1__U2Imm1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_U2Imm }, }, |
8591 | | { 16310 /* xxswapd */, PPC::XXPERMDIs, Convert__RegVSRC1_0__RegVSFRC1_1__imm_95_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSFRC }, }, |
8592 | | { 16310 /* xxswapd */, PPC::XXPERMDI, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_1__imm_95_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
8593 | | }; |
8594 | | |
8595 | | #include "llvm/Support/Debug.h" |
8596 | | #include "llvm/Support/Format.h" |
8597 | | |
8598 | | unsigned PPCAsmParser:: |
8599 | | MatchInstructionImpl(const OperandVector &Operands, |
8600 | | MCInst &Inst, |
8601 | | uint64_t &ErrorInfo, |
8602 | | FeatureBitset &MissingFeatures, |
8603 | 0 | bool matchingInlineAsm, unsigned VariantID) { |
8604 | | // Eliminate obvious mismatches. |
8605 | 0 | if (Operands.size() > 7) { |
8606 | 0 | ErrorInfo = 7; |
8607 | 0 | return Match_InvalidOperand; |
8608 | 0 | } |
8609 | | |
8610 | | // Get the current feature set. |
8611 | 0 | const FeatureBitset &AvailableFeatures = getAvailableFeatures(); |
8612 | | |
8613 | | // Get the instruction mnemonic, which is the first token. |
8614 | 0 | StringRef Mnemonic = ((PPCOperand &)*Operands[0]).getToken(); |
8615 | | |
8616 | | // Process all MnemonicAliases to remap the mnemonic. |
8617 | 0 | applyMnemonicAliases(Mnemonic, AvailableFeatures, VariantID); |
8618 | | |
8619 | | // Some state to try to produce better error messages. |
8620 | 0 | bool HadMatchOtherThanFeatures = false; |
8621 | 0 | bool HadMatchOtherThanPredicate = false; |
8622 | 0 | unsigned RetCode = Match_InvalidOperand; |
8623 | 0 | MissingFeatures.set(); |
8624 | | // Set ErrorInfo to the operand that mismatches if it is |
8625 | | // wrong for all instances of the instruction. |
8626 | 0 | ErrorInfo = ~0ULL; |
8627 | | // Find the appropriate table for this asm variant. |
8628 | 0 | const MatchEntry *Start, *End; |
8629 | 0 | switch (VariantID) { |
8630 | 0 | default: llvm_unreachable("invalid variant!"); |
8631 | 0 | case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break; |
8632 | 0 | } |
8633 | | // Search the table. |
8634 | 0 | auto MnemonicRange = std::equal_range(Start, End, Mnemonic, LessOpcode()); |
8635 | |
|
8636 | 0 | DEBUG_WITH_TYPE("asm-matcher", dbgs() << "AsmMatcher: found " << |
8637 | 0 | std::distance(MnemonicRange.first, MnemonicRange.second) << |
8638 | 0 | " encodings with mnemonic '" << Mnemonic << "'\n"); |
8639 | | |
8640 | | // Return a more specific error code if no mnemonics match. |
8641 | 0 | if (MnemonicRange.first == MnemonicRange.second) |
8642 | 0 | return Match_MnemonicFail; |
8643 | | |
8644 | 0 | for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second; |
8645 | 0 | it != ie; ++it) { |
8646 | 0 | const FeatureBitset &RequiredFeatures = FeatureBitsets[it->RequiredFeaturesIdx]; |
8647 | 0 | bool HasRequiredFeatures = |
8648 | 0 | (AvailableFeatures & RequiredFeatures) == RequiredFeatures; |
8649 | 0 | DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Trying to match opcode " |
8650 | 0 | << MII.getName(it->Opcode) << "\n"); |
8651 | | // equal_range guarantees that instruction mnemonic matches. |
8652 | 0 | assert(Mnemonic == it->getMnemonic()); |
8653 | 0 | bool OperandsValid = true; |
8654 | 0 | for (unsigned FormalIdx = 0, ActualIdx = 1; FormalIdx != 6; ++FormalIdx) { |
8655 | 0 | auto Formal = static_cast<MatchClassKind>(it->Classes[FormalIdx]); |
8656 | 0 | DEBUG_WITH_TYPE("asm-matcher", |
8657 | 0 | dbgs() << " Matching formal operand class " << getMatchClassName(Formal) |
8658 | 0 | << " against actual operand at index " << ActualIdx); |
8659 | 0 | if (ActualIdx < Operands.size()) |
8660 | 0 | DEBUG_WITH_TYPE("asm-matcher", dbgs() << " ("; |
8661 | 0 | Operands[ActualIdx]->print(dbgs()); dbgs() << "): "); |
8662 | 0 | else |
8663 | 0 | DEBUG_WITH_TYPE("asm-matcher", dbgs() << ": "); |
8664 | 0 | if (ActualIdx >= Operands.size()) { |
8665 | 0 | DEBUG_WITH_TYPE("asm-matcher", dbgs() << "actual operand index out of range\n"); |
8666 | 0 | if (Formal == InvalidMatchClass) { |
8667 | 0 | break; |
8668 | 0 | } |
8669 | 0 | if (isSubclass(Formal, OptionalMatchClass)) { |
8670 | 0 | continue; |
8671 | 0 | } |
8672 | 0 | OperandsValid = false; |
8673 | 0 | ErrorInfo = ActualIdx; |
8674 | 0 | break; |
8675 | 0 | } |
8676 | 0 | MCParsedAsmOperand &Actual = *Operands[ActualIdx]; |
8677 | 0 | unsigned Diag = validateOperandClass(Actual, Formal); |
8678 | 0 | if (Diag == Match_Success) { |
8679 | 0 | DEBUG_WITH_TYPE("asm-matcher", |
8680 | 0 | dbgs() << "match success using generic matcher\n"); |
8681 | 0 | ++ActualIdx; |
8682 | 0 | continue; |
8683 | 0 | } |
8684 | | // If the generic handler indicates an invalid operand |
8685 | | // failure, check for a special case. |
8686 | 0 | if (Diag != Match_Success) { |
8687 | 0 | unsigned TargetDiag = validateTargetOperandClass(Actual, Formal); |
8688 | 0 | if (TargetDiag == Match_Success) { |
8689 | 0 | DEBUG_WITH_TYPE("asm-matcher", |
8690 | 0 | dbgs() << "match success using target matcher\n"); |
8691 | 0 | ++ActualIdx; |
8692 | 0 | continue; |
8693 | 0 | } |
8694 | | // If the target matcher returned a specific error code use |
8695 | | // that, else use the one from the generic matcher. |
8696 | 0 | if (TargetDiag != Match_InvalidOperand && HasRequiredFeatures) |
8697 | 0 | Diag = TargetDiag; |
8698 | 0 | } |
8699 | | // If current formal operand wasn't matched and it is optional |
8700 | | // then try to match next formal operand |
8701 | 0 | if (Diag == Match_InvalidOperand && isSubclass(Formal, OptionalMatchClass)) { |
8702 | 0 | DEBUG_WITH_TYPE("asm-matcher", dbgs() << "ignoring optional operand\n"); |
8703 | 0 | continue; |
8704 | 0 | } |
8705 | | // If this operand is broken for all of the instances of this |
8706 | | // mnemonic, keep track of it so we can report loc info. |
8707 | | // If we already had a match that only failed due to a |
8708 | | // target predicate, that diagnostic is preferred. |
8709 | 0 | if (!HadMatchOtherThanPredicate && |
8710 | 0 | (it == MnemonicRange.first || ErrorInfo <= ActualIdx)) { |
8711 | 0 | if (HasRequiredFeatures && (ErrorInfo != ActualIdx || Diag != Match_InvalidOperand)) |
8712 | 0 | RetCode = Diag; |
8713 | 0 | ErrorInfo = ActualIdx; |
8714 | 0 | } |
8715 | | // Otherwise, just reject this instance of the mnemonic. |
8716 | 0 | OperandsValid = false; |
8717 | 0 | break; |
8718 | 0 | } |
8719 | |
|
8720 | 0 | if (!OperandsValid) { |
8721 | 0 | DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Opcode result: multiple " |
8722 | 0 | "operand mismatches, ignoring " |
8723 | 0 | "this opcode\n"); |
8724 | 0 | continue; |
8725 | 0 | } |
8726 | 0 | if (!HasRequiredFeatures) { |
8727 | 0 | HadMatchOtherThanFeatures = true; |
8728 | 0 | FeatureBitset NewMissingFeatures = RequiredFeatures & ~AvailableFeatures; |
8729 | 0 | DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Missing target features:"; |
8730 | 0 | for (unsigned I = 0, E = NewMissingFeatures.size(); I != E; ++I) |
8731 | 0 | if (NewMissingFeatures[I]) |
8732 | 0 | dbgs() << ' ' << I; |
8733 | 0 | dbgs() << "\n"); |
8734 | 0 | if (NewMissingFeatures.count() <= |
8735 | 0 | MissingFeatures.count()) |
8736 | 0 | MissingFeatures = NewMissingFeatures; |
8737 | 0 | continue; |
8738 | 0 | } |
8739 | | |
8740 | 0 | Inst.clear(); |
8741 | |
|
8742 | 0 | Inst.setOpcode(it->Opcode); |
8743 | | // We have a potential match but have not rendered the operands. |
8744 | | // Check the target predicate to handle any context sensitive |
8745 | | // constraints. |
8746 | | // For example, Ties that are referenced multiple times must be |
8747 | | // checked here to ensure the input is the same for each match |
8748 | | // constraints. If we leave it any later the ties will have been |
8749 | | // canonicalized |
8750 | 0 | unsigned MatchResult; |
8751 | 0 | if ((MatchResult = checkEarlyTargetMatchPredicate(Inst, Operands)) != Match_Success) { |
8752 | 0 | Inst.clear(); |
8753 | 0 | DEBUG_WITH_TYPE( |
8754 | 0 | "asm-matcher", |
8755 | 0 | dbgs() << "Early target match predicate failed with diag code " |
8756 | 0 | << MatchResult << "\n"); |
8757 | 0 | RetCode = MatchResult; |
8758 | 0 | HadMatchOtherThanPredicate = true; |
8759 | 0 | continue; |
8760 | 0 | } |
8761 | | |
8762 | 0 | if (matchingInlineAsm) { |
8763 | 0 | convertToMapAndConstraints(it->ConvertFn, Operands); |
8764 | 0 | if (!checkAsmTiedOperandConstraints(*this, it->ConvertFn, Operands, ErrorInfo)) |
8765 | 0 | return Match_InvalidTiedOperand; |
8766 | | |
8767 | 0 | return Match_Success; |
8768 | 0 | } |
8769 | | |
8770 | | // We have selected a definite instruction, convert the parsed |
8771 | | // operands into the appropriate MCInst. |
8772 | 0 | convertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands); |
8773 | | |
8774 | | // We have a potential match. Check the target predicate to |
8775 | | // handle any context sensitive constraints. |
8776 | 0 | if ((MatchResult = checkTargetMatchPredicate(Inst)) != Match_Success) { |
8777 | 0 | DEBUG_WITH_TYPE("asm-matcher", |
8778 | 0 | dbgs() << "Target match predicate failed with diag code " |
8779 | 0 | << MatchResult << "\n"); |
8780 | 0 | Inst.clear(); |
8781 | 0 | RetCode = MatchResult; |
8782 | 0 | HadMatchOtherThanPredicate = true; |
8783 | 0 | continue; |
8784 | 0 | } |
8785 | | |
8786 | 0 | std::string Info; |
8787 | 0 | if (!getParser().getTargetParser().getTargetOptions().MCNoDeprecatedWarn && |
8788 | 0 | MII.getDeprecatedInfo(Inst, getSTI(), Info)) { |
8789 | 0 | SMLoc Loc = ((PPCOperand &)*Operands[0]).getStartLoc(); |
8790 | 0 | getParser().Warning(Loc, Info, std::nullopt); |
8791 | 0 | } |
8792 | 0 | if (!checkAsmTiedOperandConstraints(*this, it->ConvertFn, Operands, ErrorInfo)) |
8793 | 0 | return Match_InvalidTiedOperand; |
8794 | | |
8795 | 0 | DEBUG_WITH_TYPE( |
8796 | 0 | "asm-matcher", |
8797 | 0 | dbgs() << "Opcode result: complete match, selecting this opcode\n"); |
8798 | 0 | return Match_Success; |
8799 | 0 | } |
8800 | | |
8801 | | // Okay, we had no match. Try to return a useful error code. |
8802 | 0 | if (HadMatchOtherThanPredicate || !HadMatchOtherThanFeatures) |
8803 | 0 | return RetCode; |
8804 | | |
8805 | 0 | ErrorInfo = 0; |
8806 | 0 | return Match_MissingFeature; |
8807 | 0 | } |
8808 | | |
8809 | | #endif // GET_MATCHER_IMPLEMENTATION |
8810 | | |
8811 | | |
8812 | | #ifdef GET_MNEMONIC_SPELL_CHECKER |
8813 | | #undef GET_MNEMONIC_SPELL_CHECKER |
8814 | | |
8815 | 0 | static std::string PPCMnemonicSpellCheck(StringRef S, const FeatureBitset &FBS, unsigned VariantID) { |
8816 | 0 | const unsigned MaxEditDist = 2; |
8817 | 0 | std::vector<StringRef> Candidates; |
8818 | 0 | StringRef Prev = ""; |
8819 | | |
8820 | | // Find the appropriate table for this asm variant. |
8821 | 0 | const MatchEntry *Start, *End; |
8822 | 0 | switch (VariantID) { |
8823 | 0 | default: llvm_unreachable("invalid variant!"); |
8824 | 0 | case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break; |
8825 | 0 | } |
8826 | | |
8827 | 0 | for (auto I = Start; I < End; I++) { |
8828 | | // Ignore unsupported instructions. |
8829 | 0 | const FeatureBitset &RequiredFeatures = FeatureBitsets[I->RequiredFeaturesIdx]; |
8830 | 0 | if ((FBS & RequiredFeatures) != RequiredFeatures) |
8831 | 0 | continue; |
8832 | | |
8833 | 0 | StringRef T = I->getMnemonic(); |
8834 | | // Avoid recomputing the edit distance for the same string. |
8835 | 0 | if (T.equals(Prev)) |
8836 | 0 | continue; |
8837 | | |
8838 | 0 | Prev = T; |
8839 | 0 | unsigned Dist = S.edit_distance(T, false, MaxEditDist); |
8840 | 0 | if (Dist <= MaxEditDist) |
8841 | 0 | Candidates.push_back(T); |
8842 | 0 | } |
8843 | |
|
8844 | 0 | if (Candidates.empty()) |
8845 | 0 | return ""; |
8846 | | |
8847 | 0 | std::string Res = ", did you mean: "; |
8848 | 0 | unsigned i = 0; |
8849 | 0 | for (; i < Candidates.size() - 1; i++) |
8850 | 0 | Res += Candidates[i].str() + ", "; |
8851 | 0 | return Res + Candidates[i].str() + "?"; |
8852 | 0 | } |
8853 | | |
8854 | | #endif // GET_MNEMONIC_SPELL_CHECKER |
8855 | | |
8856 | | |
8857 | | #ifdef GET_MNEMONIC_CHECKER |
8858 | | #undef GET_MNEMONIC_CHECKER |
8859 | | |
8860 | | static bool PPCCheckMnemonic(StringRef Mnemonic, |
8861 | | const FeatureBitset &AvailableFeatures, |
8862 | | unsigned VariantID) { |
8863 | | // Process all MnemonicAliases to remap the mnemonic. |
8864 | | applyMnemonicAliases(Mnemonic, AvailableFeatures, VariantID); |
8865 | | |
8866 | | // Find the appropriate table for this asm variant. |
8867 | | const MatchEntry *Start, *End; |
8868 | | switch (VariantID) { |
8869 | | default: llvm_unreachable("invalid variant!"); |
8870 | | case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break; |
8871 | | } |
8872 | | |
8873 | | // Search the table. |
8874 | | auto MnemonicRange = std::equal_range(Start, End, Mnemonic, LessOpcode()); |
8875 | | |
8876 | | if (MnemonicRange.first == MnemonicRange.second) |
8877 | | return false; |
8878 | | |
8879 | | for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second; |
8880 | | it != ie; ++it) { |
8881 | | const FeatureBitset &RequiredFeatures = |
8882 | | FeatureBitsets[it->RequiredFeaturesIdx]; |
8883 | | if ((AvailableFeatures & RequiredFeatures) == RequiredFeatures) |
8884 | | return true; |
8885 | | } |
8886 | | return false; |
8887 | | } |
8888 | | |
8889 | | #endif // GET_MNEMONIC_CHECKER |
8890 | | |