/src/build/lib/Target/PowerPC/PPCGenInstrInfo.inc
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1 | | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
2 | | |* *| |
3 | | |* Target Instruction Enum Values and Descriptors *| |
4 | | |* *| |
5 | | |* Automatically generated file, do not edit! *| |
6 | | |* *| |
7 | | \*===----------------------------------------------------------------------===*/ |
8 | | |
9 | | #ifdef GET_INSTRINFO_ENUM |
10 | | #undef GET_INSTRINFO_ENUM |
11 | | namespace llvm { |
12 | | |
13 | | namespace PPC { |
14 | | enum { |
15 | | PHI = 0, |
16 | | INLINEASM = 1, |
17 | | INLINEASM_BR = 2, |
18 | | CFI_INSTRUCTION = 3, |
19 | | EH_LABEL = 4, |
20 | | GC_LABEL = 5, |
21 | | ANNOTATION_LABEL = 6, |
22 | | KILL = 7, |
23 | | EXTRACT_SUBREG = 8, |
24 | | INSERT_SUBREG = 9, |
25 | | IMPLICIT_DEF = 10, |
26 | | SUBREG_TO_REG = 11, |
27 | | COPY_TO_REGCLASS = 12, |
28 | | DBG_VALUE = 13, |
29 | | DBG_VALUE_LIST = 14, |
30 | | DBG_INSTR_REF = 15, |
31 | | DBG_PHI = 16, |
32 | | DBG_LABEL = 17, |
33 | | REG_SEQUENCE = 18, |
34 | | COPY = 19, |
35 | | BUNDLE = 20, |
36 | | LIFETIME_START = 21, |
37 | | LIFETIME_END = 22, |
38 | | PSEUDO_PROBE = 23, |
39 | | ARITH_FENCE = 24, |
40 | | STACKMAP = 25, |
41 | | FENTRY_CALL = 26, |
42 | | PATCHPOINT = 27, |
43 | | LOAD_STACK_GUARD = 28, |
44 | | PREALLOCATED_SETUP = 29, |
45 | | PREALLOCATED_ARG = 30, |
46 | | STATEPOINT = 31, |
47 | | LOCAL_ESCAPE = 32, |
48 | | FAULTING_OP = 33, |
49 | | PATCHABLE_OP = 34, |
50 | | PATCHABLE_FUNCTION_ENTER = 35, |
51 | | PATCHABLE_RET = 36, |
52 | | PATCHABLE_FUNCTION_EXIT = 37, |
53 | | PATCHABLE_TAIL_CALL = 38, |
54 | | PATCHABLE_EVENT_CALL = 39, |
55 | | PATCHABLE_TYPED_EVENT_CALL = 40, |
56 | | ICALL_BRANCH_FUNNEL = 41, |
57 | | MEMBARRIER = 42, |
58 | | JUMP_TABLE_DEBUG_INFO = 43, |
59 | | G_ASSERT_SEXT = 44, |
60 | | G_ASSERT_ZEXT = 45, |
61 | | G_ASSERT_ALIGN = 46, |
62 | | G_ADD = 47, |
63 | | G_SUB = 48, |
64 | | G_MUL = 49, |
65 | | G_SDIV = 50, |
66 | | G_UDIV = 51, |
67 | | G_SREM = 52, |
68 | | G_UREM = 53, |
69 | | G_SDIVREM = 54, |
70 | | G_UDIVREM = 55, |
71 | | G_AND = 56, |
72 | | G_OR = 57, |
73 | | G_XOR = 58, |
74 | | G_IMPLICIT_DEF = 59, |
75 | | G_PHI = 60, |
76 | | G_FRAME_INDEX = 61, |
77 | | G_GLOBAL_VALUE = 62, |
78 | | G_CONSTANT_POOL = 63, |
79 | | G_EXTRACT = 64, |
80 | | G_UNMERGE_VALUES = 65, |
81 | | G_INSERT = 66, |
82 | | G_MERGE_VALUES = 67, |
83 | | G_BUILD_VECTOR = 68, |
84 | | G_BUILD_VECTOR_TRUNC = 69, |
85 | | G_CONCAT_VECTORS = 70, |
86 | | G_PTRTOINT = 71, |
87 | | G_INTTOPTR = 72, |
88 | | G_BITCAST = 73, |
89 | | G_FREEZE = 74, |
90 | | G_CONSTANT_FOLD_BARRIER = 75, |
91 | | G_INTRINSIC_FPTRUNC_ROUND = 76, |
92 | | G_INTRINSIC_TRUNC = 77, |
93 | | G_INTRINSIC_ROUND = 78, |
94 | | G_INTRINSIC_LRINT = 79, |
95 | | G_INTRINSIC_ROUNDEVEN = 80, |
96 | | G_READCYCLECOUNTER = 81, |
97 | | G_LOAD = 82, |
98 | | G_SEXTLOAD = 83, |
99 | | G_ZEXTLOAD = 84, |
100 | | G_INDEXED_LOAD = 85, |
101 | | G_INDEXED_SEXTLOAD = 86, |
102 | | G_INDEXED_ZEXTLOAD = 87, |
103 | | G_STORE = 88, |
104 | | G_INDEXED_STORE = 89, |
105 | | G_ATOMIC_CMPXCHG_WITH_SUCCESS = 90, |
106 | | G_ATOMIC_CMPXCHG = 91, |
107 | | G_ATOMICRMW_XCHG = 92, |
108 | | G_ATOMICRMW_ADD = 93, |
109 | | G_ATOMICRMW_SUB = 94, |
110 | | G_ATOMICRMW_AND = 95, |
111 | | G_ATOMICRMW_NAND = 96, |
112 | | G_ATOMICRMW_OR = 97, |
113 | | G_ATOMICRMW_XOR = 98, |
114 | | G_ATOMICRMW_MAX = 99, |
115 | | G_ATOMICRMW_MIN = 100, |
116 | | G_ATOMICRMW_UMAX = 101, |
117 | | G_ATOMICRMW_UMIN = 102, |
118 | | G_ATOMICRMW_FADD = 103, |
119 | | G_ATOMICRMW_FSUB = 104, |
120 | | G_ATOMICRMW_FMAX = 105, |
121 | | G_ATOMICRMW_FMIN = 106, |
122 | | G_ATOMICRMW_UINC_WRAP = 107, |
123 | | G_ATOMICRMW_UDEC_WRAP = 108, |
124 | | G_FENCE = 109, |
125 | | G_PREFETCH = 110, |
126 | | G_BRCOND = 111, |
127 | | G_BRINDIRECT = 112, |
128 | | G_INVOKE_REGION_START = 113, |
129 | | G_INTRINSIC = 114, |
130 | | G_INTRINSIC_W_SIDE_EFFECTS = 115, |
131 | | G_INTRINSIC_CONVERGENT = 116, |
132 | | G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS = 117, |
133 | | G_ANYEXT = 118, |
134 | | G_TRUNC = 119, |
135 | | G_CONSTANT = 120, |
136 | | G_FCONSTANT = 121, |
137 | | G_VASTART = 122, |
138 | | G_VAARG = 123, |
139 | | G_SEXT = 124, |
140 | | G_SEXT_INREG = 125, |
141 | | G_ZEXT = 126, |
142 | | G_SHL = 127, |
143 | | G_LSHR = 128, |
144 | | G_ASHR = 129, |
145 | | G_FSHL = 130, |
146 | | G_FSHR = 131, |
147 | | G_ROTR = 132, |
148 | | G_ROTL = 133, |
149 | | G_ICMP = 134, |
150 | | G_FCMP = 135, |
151 | | G_SELECT = 136, |
152 | | G_UADDO = 137, |
153 | | G_UADDE = 138, |
154 | | G_USUBO = 139, |
155 | | G_USUBE = 140, |
156 | | G_SADDO = 141, |
157 | | G_SADDE = 142, |
158 | | G_SSUBO = 143, |
159 | | G_SSUBE = 144, |
160 | | G_UMULO = 145, |
161 | | G_SMULO = 146, |
162 | | G_UMULH = 147, |
163 | | G_SMULH = 148, |
164 | | G_UADDSAT = 149, |
165 | | G_SADDSAT = 150, |
166 | | G_USUBSAT = 151, |
167 | | G_SSUBSAT = 152, |
168 | | G_USHLSAT = 153, |
169 | | G_SSHLSAT = 154, |
170 | | G_SMULFIX = 155, |
171 | | G_UMULFIX = 156, |
172 | | G_SMULFIXSAT = 157, |
173 | | G_UMULFIXSAT = 158, |
174 | | G_SDIVFIX = 159, |
175 | | G_UDIVFIX = 160, |
176 | | G_SDIVFIXSAT = 161, |
177 | | G_UDIVFIXSAT = 162, |
178 | | G_FADD = 163, |
179 | | G_FSUB = 164, |
180 | | G_FMUL = 165, |
181 | | G_FMA = 166, |
182 | | G_FMAD = 167, |
183 | | G_FDIV = 168, |
184 | | G_FREM = 169, |
185 | | G_FPOW = 170, |
186 | | G_FPOWI = 171, |
187 | | G_FEXP = 172, |
188 | | G_FEXP2 = 173, |
189 | | G_FEXP10 = 174, |
190 | | G_FLOG = 175, |
191 | | G_FLOG2 = 176, |
192 | | G_FLOG10 = 177, |
193 | | G_FLDEXP = 178, |
194 | | G_FFREXP = 179, |
195 | | G_FNEG = 180, |
196 | | G_FPEXT = 181, |
197 | | G_FPTRUNC = 182, |
198 | | G_FPTOSI = 183, |
199 | | G_FPTOUI = 184, |
200 | | G_SITOFP = 185, |
201 | | G_UITOFP = 186, |
202 | | G_FABS = 187, |
203 | | G_FCOPYSIGN = 188, |
204 | | G_IS_FPCLASS = 189, |
205 | | G_FCANONICALIZE = 190, |
206 | | G_FMINNUM = 191, |
207 | | G_FMAXNUM = 192, |
208 | | G_FMINNUM_IEEE = 193, |
209 | | G_FMAXNUM_IEEE = 194, |
210 | | G_FMINIMUM = 195, |
211 | | G_FMAXIMUM = 196, |
212 | | G_GET_FPENV = 197, |
213 | | G_SET_FPENV = 198, |
214 | | G_RESET_FPENV = 199, |
215 | | G_GET_FPMODE = 200, |
216 | | G_SET_FPMODE = 201, |
217 | | G_RESET_FPMODE = 202, |
218 | | G_PTR_ADD = 203, |
219 | | G_PTRMASK = 204, |
220 | | G_SMIN = 205, |
221 | | G_SMAX = 206, |
222 | | G_UMIN = 207, |
223 | | G_UMAX = 208, |
224 | | G_ABS = 209, |
225 | | G_LROUND = 210, |
226 | | G_LLROUND = 211, |
227 | | G_BR = 212, |
228 | | G_BRJT = 213, |
229 | | G_INSERT_VECTOR_ELT = 214, |
230 | | G_EXTRACT_VECTOR_ELT = 215, |
231 | | G_SHUFFLE_VECTOR = 216, |
232 | | G_CTTZ = 217, |
233 | | G_CTTZ_ZERO_UNDEF = 218, |
234 | | G_CTLZ = 219, |
235 | | G_CTLZ_ZERO_UNDEF = 220, |
236 | | G_CTPOP = 221, |
237 | | G_BSWAP = 222, |
238 | | G_BITREVERSE = 223, |
239 | | G_FCEIL = 224, |
240 | | G_FCOS = 225, |
241 | | G_FSIN = 226, |
242 | | G_FSQRT = 227, |
243 | | G_FFLOOR = 228, |
244 | | G_FRINT = 229, |
245 | | G_FNEARBYINT = 230, |
246 | | G_ADDRSPACE_CAST = 231, |
247 | | G_BLOCK_ADDR = 232, |
248 | | G_JUMP_TABLE = 233, |
249 | | G_DYN_STACKALLOC = 234, |
250 | | G_STACKSAVE = 235, |
251 | | G_STACKRESTORE = 236, |
252 | | G_STRICT_FADD = 237, |
253 | | G_STRICT_FSUB = 238, |
254 | | G_STRICT_FMUL = 239, |
255 | | G_STRICT_FDIV = 240, |
256 | | G_STRICT_FREM = 241, |
257 | | G_STRICT_FMA = 242, |
258 | | G_STRICT_FSQRT = 243, |
259 | | G_STRICT_FLDEXP = 244, |
260 | | G_READ_REGISTER = 245, |
261 | | G_WRITE_REGISTER = 246, |
262 | | G_MEMCPY = 247, |
263 | | G_MEMCPY_INLINE = 248, |
264 | | G_MEMMOVE = 249, |
265 | | G_MEMSET = 250, |
266 | | G_BZERO = 251, |
267 | | G_VECREDUCE_SEQ_FADD = 252, |
268 | | G_VECREDUCE_SEQ_FMUL = 253, |
269 | | G_VECREDUCE_FADD = 254, |
270 | | G_VECREDUCE_FMUL = 255, |
271 | | G_VECREDUCE_FMAX = 256, |
272 | | G_VECREDUCE_FMIN = 257, |
273 | | G_VECREDUCE_FMAXIMUM = 258, |
274 | | G_VECREDUCE_FMINIMUM = 259, |
275 | | G_VECREDUCE_ADD = 260, |
276 | | G_VECREDUCE_MUL = 261, |
277 | | G_VECREDUCE_AND = 262, |
278 | | G_VECREDUCE_OR = 263, |
279 | | G_VECREDUCE_XOR = 264, |
280 | | G_VECREDUCE_SMAX = 265, |
281 | | G_VECREDUCE_SMIN = 266, |
282 | | G_VECREDUCE_UMAX = 267, |
283 | | G_VECREDUCE_UMIN = 268, |
284 | | G_SBFX = 269, |
285 | | G_UBFX = 270, |
286 | | ATOMIC_CMP_SWAP_I128 = 271, |
287 | | ATOMIC_LOAD_ADD_I128 = 272, |
288 | | ATOMIC_LOAD_AND_I128 = 273, |
289 | | ATOMIC_LOAD_NAND_I128 = 274, |
290 | | ATOMIC_LOAD_OR_I128 = 275, |
291 | | ATOMIC_LOAD_SUB_I128 = 276, |
292 | | ATOMIC_LOAD_XOR_I128 = 277, |
293 | | ATOMIC_SWAP_I128 = 278, |
294 | | BUILD_QUADWORD = 279, |
295 | | BUILD_UACC = 280, |
296 | | CFENCE = 281, |
297 | | CFENCE8 = 282, |
298 | | CLRLSLDI = 283, |
299 | | CLRLSLDI_rec = 284, |
300 | | CLRLSLWI = 285, |
301 | | CLRLSLWI_rec = 286, |
302 | | CLRRDI = 287, |
303 | | CLRRDI_rec = 288, |
304 | | CLRRWI = 289, |
305 | | CLRRWI_rec = 290, |
306 | | DCBFL = 291, |
307 | | DCBFLP = 292, |
308 | | DCBFPS = 293, |
309 | | DCBFx = 294, |
310 | | DCBSTPS = 295, |
311 | | DCBTCT = 296, |
312 | | DCBTDS = 297, |
313 | | DCBTSTCT = 298, |
314 | | DCBTSTDS = 299, |
315 | | DCBTSTT = 300, |
316 | | DCBTSTx = 301, |
317 | | DCBTT = 302, |
318 | | DCBTx = 303, |
319 | | DFLOADf32 = 304, |
320 | | DFLOADf64 = 305, |
321 | | DFSTOREf32 = 306, |
322 | | DFSTOREf64 = 307, |
323 | | EXTLDI = 308, |
324 | | EXTLDI_rec = 309, |
325 | | EXTLWI = 310, |
326 | | EXTLWI_rec = 311, |
327 | | EXTRDI = 312, |
328 | | EXTRDI_rec = 313, |
329 | | EXTRWI = 314, |
330 | | EXTRWI_rec = 315, |
331 | | INSLWI = 316, |
332 | | INSLWI_rec = 317, |
333 | | INSRDI = 318, |
334 | | INSRDI_rec = 319, |
335 | | INSRWI = 320, |
336 | | INSRWI_rec = 321, |
337 | | KILL_PAIR = 322, |
338 | | LAx = 323, |
339 | | LIWAX = 324, |
340 | | LIWZX = 325, |
341 | | PSUBI = 326, |
342 | | RLWIMIbm = 327, |
343 | | RLWIMIbm_rec = 328, |
344 | | RLWINMbm = 329, |
345 | | RLWINMbm_rec = 330, |
346 | | RLWNMbm = 331, |
347 | | RLWNMbm_rec = 332, |
348 | | ROTRDI = 333, |
349 | | ROTRDI_rec = 334, |
350 | | ROTRWI = 335, |
351 | | ROTRWI_rec = 336, |
352 | | SLDI = 337, |
353 | | SLDI_rec = 338, |
354 | | SLWI = 339, |
355 | | SLWI_rec = 340, |
356 | | SPILLTOVSR_LD = 341, |
357 | | SPILLTOVSR_LDX = 342, |
358 | | SPILLTOVSR_ST = 343, |
359 | | SPILLTOVSR_STX = 344, |
360 | | SRDI = 345, |
361 | | SRDI_rec = 346, |
362 | | SRWI = 347, |
363 | | SRWI_rec = 348, |
364 | | STIWX = 349, |
365 | | SUBI = 350, |
366 | | SUBIC = 351, |
367 | | SUBIC_rec = 352, |
368 | | SUBIS = 353, |
369 | | SUBPCIS = 354, |
370 | | XFLOADf32 = 355, |
371 | | XFLOADf64 = 356, |
372 | | XFSTOREf32 = 357, |
373 | | XFSTOREf64 = 358, |
374 | | ADD4 = 359, |
375 | | ADD4O = 360, |
376 | | ADD4O_rec = 361, |
377 | | ADD4TLS = 362, |
378 | | ADD4_rec = 363, |
379 | | ADD8 = 364, |
380 | | ADD8O = 365, |
381 | | ADD8O_rec = 366, |
382 | | ADD8TLS = 367, |
383 | | ADD8TLS_ = 368, |
384 | | ADD8_rec = 369, |
385 | | ADDC = 370, |
386 | | ADDC8 = 371, |
387 | | ADDC8O = 372, |
388 | | ADDC8O_rec = 373, |
389 | | ADDC8_rec = 374, |
390 | | ADDCO = 375, |
391 | | ADDCO_rec = 376, |
392 | | ADDC_rec = 377, |
393 | | ADDE = 378, |
394 | | ADDE8 = 379, |
395 | | ADDE8O = 380, |
396 | | ADDE8O_rec = 381, |
397 | | ADDE8_rec = 382, |
398 | | ADDEO = 383, |
399 | | ADDEO_rec = 384, |
400 | | ADDEX = 385, |
401 | | ADDEX8 = 386, |
402 | | ADDE_rec = 387, |
403 | | ADDG6S = 388, |
404 | | ADDG6S8 = 389, |
405 | | ADDI = 390, |
406 | | ADDI8 = 391, |
407 | | ADDIC = 392, |
408 | | ADDIC8 = 393, |
409 | | ADDIC_rec = 394, |
410 | | ADDIS = 395, |
411 | | ADDIS8 = 396, |
412 | | ADDISdtprelHA = 397, |
413 | | ADDISdtprelHA32 = 398, |
414 | | ADDISgotTprelHA = 399, |
415 | | ADDIStlsgdHA = 400, |
416 | | ADDIStlsldHA = 401, |
417 | | ADDIStocHA = 402, |
418 | | ADDIStocHA8 = 403, |
419 | | ADDIdtprelL = 404, |
420 | | ADDIdtprelL32 = 405, |
421 | | ADDItlsgdL = 406, |
422 | | ADDItlsgdL32 = 407, |
423 | | ADDItlsgdLADDR = 408, |
424 | | ADDItlsgdLADDR32 = 409, |
425 | | ADDItlsldL = 410, |
426 | | ADDItlsldL32 = 411, |
427 | | ADDItlsldLADDR = 412, |
428 | | ADDItlsldLADDR32 = 413, |
429 | | ADDItoc = 414, |
430 | | ADDItoc8 = 415, |
431 | | ADDItocL = 416, |
432 | | ADDME = 417, |
433 | | ADDME8 = 418, |
434 | | ADDME8O = 419, |
435 | | ADDME8O_rec = 420, |
436 | | ADDME8_rec = 421, |
437 | | ADDMEO = 422, |
438 | | ADDMEO_rec = 423, |
439 | | ADDME_rec = 424, |
440 | | ADDPCIS = 425, |
441 | | ADDZE = 426, |
442 | | ADDZE8 = 427, |
443 | | ADDZE8O = 428, |
444 | | ADDZE8O_rec = 429, |
445 | | ADDZE8_rec = 430, |
446 | | ADDZEO = 431, |
447 | | ADDZEO_rec = 432, |
448 | | ADDZE_rec = 433, |
449 | | ADJCALLSTACKDOWN = 434, |
450 | | ADJCALLSTACKUP = 435, |
451 | | AND = 436, |
452 | | AND8 = 437, |
453 | | AND8_rec = 438, |
454 | | ANDC = 439, |
455 | | ANDC8 = 440, |
456 | | ANDC8_rec = 441, |
457 | | ANDC_rec = 442, |
458 | | ANDI8_rec = 443, |
459 | | ANDIS8_rec = 444, |
460 | | ANDIS_rec = 445, |
461 | | ANDI_rec = 446, |
462 | | ANDI_rec_1_EQ_BIT = 447, |
463 | | ANDI_rec_1_EQ_BIT8 = 448, |
464 | | ANDI_rec_1_GT_BIT = 449, |
465 | | ANDI_rec_1_GT_BIT8 = 450, |
466 | | AND_rec = 451, |
467 | | ATOMIC_CMP_SWAP_I16 = 452, |
468 | | ATOMIC_CMP_SWAP_I32 = 453, |
469 | | ATOMIC_CMP_SWAP_I64 = 454, |
470 | | ATOMIC_CMP_SWAP_I8 = 455, |
471 | | ATOMIC_LOAD_ADD_I16 = 456, |
472 | | ATOMIC_LOAD_ADD_I32 = 457, |
473 | | ATOMIC_LOAD_ADD_I64 = 458, |
474 | | ATOMIC_LOAD_ADD_I8 = 459, |
475 | | ATOMIC_LOAD_AND_I16 = 460, |
476 | | ATOMIC_LOAD_AND_I32 = 461, |
477 | | ATOMIC_LOAD_AND_I64 = 462, |
478 | | ATOMIC_LOAD_AND_I8 = 463, |
479 | | ATOMIC_LOAD_MAX_I16 = 464, |
480 | | ATOMIC_LOAD_MAX_I32 = 465, |
481 | | ATOMIC_LOAD_MAX_I64 = 466, |
482 | | ATOMIC_LOAD_MAX_I8 = 467, |
483 | | ATOMIC_LOAD_MIN_I16 = 468, |
484 | | ATOMIC_LOAD_MIN_I32 = 469, |
485 | | ATOMIC_LOAD_MIN_I64 = 470, |
486 | | ATOMIC_LOAD_MIN_I8 = 471, |
487 | | ATOMIC_LOAD_NAND_I16 = 472, |
488 | | ATOMIC_LOAD_NAND_I32 = 473, |
489 | | ATOMIC_LOAD_NAND_I64 = 474, |
490 | | ATOMIC_LOAD_NAND_I8 = 475, |
491 | | ATOMIC_LOAD_OR_I16 = 476, |
492 | | ATOMIC_LOAD_OR_I32 = 477, |
493 | | ATOMIC_LOAD_OR_I64 = 478, |
494 | | ATOMIC_LOAD_OR_I8 = 479, |
495 | | ATOMIC_LOAD_SUB_I16 = 480, |
496 | | ATOMIC_LOAD_SUB_I32 = 481, |
497 | | ATOMIC_LOAD_SUB_I64 = 482, |
498 | | ATOMIC_LOAD_SUB_I8 = 483, |
499 | | ATOMIC_LOAD_UMAX_I16 = 484, |
500 | | ATOMIC_LOAD_UMAX_I32 = 485, |
501 | | ATOMIC_LOAD_UMAX_I64 = 486, |
502 | | ATOMIC_LOAD_UMAX_I8 = 487, |
503 | | ATOMIC_LOAD_UMIN_I16 = 488, |
504 | | ATOMIC_LOAD_UMIN_I32 = 489, |
505 | | ATOMIC_LOAD_UMIN_I64 = 490, |
506 | | ATOMIC_LOAD_UMIN_I8 = 491, |
507 | | ATOMIC_LOAD_XOR_I16 = 492, |
508 | | ATOMIC_LOAD_XOR_I32 = 493, |
509 | | ATOMIC_LOAD_XOR_I64 = 494, |
510 | | ATOMIC_LOAD_XOR_I8 = 495, |
511 | | ATOMIC_SWAP_I16 = 496, |
512 | | ATOMIC_SWAP_I32 = 497, |
513 | | ATOMIC_SWAP_I64 = 498, |
514 | | ATOMIC_SWAP_I8 = 499, |
515 | | ATTN = 500, |
516 | | B = 501, |
517 | | BA = 502, |
518 | | BC = 503, |
519 | | BCC = 504, |
520 | | BCCA = 505, |
521 | | BCCCTR = 506, |
522 | | BCCCTR8 = 507, |
523 | | BCCCTRL = 508, |
524 | | BCCCTRL8 = 509, |
525 | | BCCL = 510, |
526 | | BCCLA = 511, |
527 | | BCCLR = 512, |
528 | | BCCLRL = 513, |
529 | | BCCTR = 514, |
530 | | BCCTR8 = 515, |
531 | | BCCTR8n = 516, |
532 | | BCCTRL = 517, |
533 | | BCCTRL8 = 518, |
534 | | BCCTRL8n = 519, |
535 | | BCCTRLn = 520, |
536 | | BCCTRn = 521, |
537 | | BCDADD_rec = 522, |
538 | | BCDCFN_rec = 523, |
539 | | BCDCFSQ_rec = 524, |
540 | | BCDCFZ_rec = 525, |
541 | | BCDCPSGN_rec = 526, |
542 | | BCDCTN_rec = 527, |
543 | | BCDCTSQ_rec = 528, |
544 | | BCDCTZ_rec = 529, |
545 | | BCDSETSGN_rec = 530, |
546 | | BCDSR_rec = 531, |
547 | | BCDSUB_rec = 532, |
548 | | BCDS_rec = 533, |
549 | | BCDTRUNC_rec = 534, |
550 | | BCDUS_rec = 535, |
551 | | BCDUTRUNC_rec = 536, |
552 | | BCL = 537, |
553 | | BCLR = 538, |
554 | | BCLRL = 539, |
555 | | BCLRLn = 540, |
556 | | BCLRn = 541, |
557 | | BCLalways = 542, |
558 | | BCLn = 543, |
559 | | BCTR = 544, |
560 | | BCTR8 = 545, |
561 | | BCTRL = 546, |
562 | | BCTRL8 = 547, |
563 | | BCTRL8_LDinto_toc = 548, |
564 | | BCTRL8_LDinto_toc_RM = 549, |
565 | | BCTRL8_RM = 550, |
566 | | BCTRL_LWZinto_toc = 551, |
567 | | BCTRL_LWZinto_toc_RM = 552, |
568 | | BCTRL_RM = 553, |
569 | | BCn = 554, |
570 | | BDNZ = 555, |
571 | | BDNZ8 = 556, |
572 | | BDNZA = 557, |
573 | | BDNZAm = 558, |
574 | | BDNZAp = 559, |
575 | | BDNZL = 560, |
576 | | BDNZLA = 561, |
577 | | BDNZLAm = 562, |
578 | | BDNZLAp = 563, |
579 | | BDNZLR = 564, |
580 | | BDNZLR8 = 565, |
581 | | BDNZLRL = 566, |
582 | | BDNZLRLm = 567, |
583 | | BDNZLRLp = 568, |
584 | | BDNZLRm = 569, |
585 | | BDNZLRp = 570, |
586 | | BDNZLm = 571, |
587 | | BDNZLp = 572, |
588 | | BDNZm = 573, |
589 | | BDNZp = 574, |
590 | | BDZ = 575, |
591 | | BDZ8 = 576, |
592 | | BDZA = 577, |
593 | | BDZAm = 578, |
594 | | BDZAp = 579, |
595 | | BDZL = 580, |
596 | | BDZLA = 581, |
597 | | BDZLAm = 582, |
598 | | BDZLAp = 583, |
599 | | BDZLR = 584, |
600 | | BDZLR8 = 585, |
601 | | BDZLRL = 586, |
602 | | BDZLRLm = 587, |
603 | | BDZLRLp = 588, |
604 | | BDZLRm = 589, |
605 | | BDZLRp = 590, |
606 | | BDZLm = 591, |
607 | | BDZLp = 592, |
608 | | BDZm = 593, |
609 | | BDZp = 594, |
610 | | BL = 595, |
611 | | BL8 = 596, |
612 | | BL8_NOP = 597, |
613 | | BL8_NOP_RM = 598, |
614 | | BL8_NOP_TLS = 599, |
615 | | BL8_NOTOC = 600, |
616 | | BL8_NOTOC_RM = 601, |
617 | | BL8_NOTOC_TLS = 602, |
618 | | BL8_RM = 603, |
619 | | BL8_TLS = 604, |
620 | | BL8_TLS_ = 605, |
621 | | BLA = 606, |
622 | | BLA8 = 607, |
623 | | BLA8_NOP = 608, |
624 | | BLA8_NOP_RM = 609, |
625 | | BLA8_RM = 610, |
626 | | BLA_RM = 611, |
627 | | BLR = 612, |
628 | | BLR8 = 613, |
629 | | BLRL = 614, |
630 | | BL_NOP = 615, |
631 | | BL_NOP_RM = 616, |
632 | | BL_RM = 617, |
633 | | BL_TLS = 618, |
634 | | BPERMD = 619, |
635 | | BRD = 620, |
636 | | BRH = 621, |
637 | | BRH8 = 622, |
638 | | BRINC = 623, |
639 | | BRW = 624, |
640 | | BRW8 = 625, |
641 | | CBCDTD = 626, |
642 | | CBCDTD8 = 627, |
643 | | CDTBCD = 628, |
644 | | CDTBCD8 = 629, |
645 | | CFUGED = 630, |
646 | | CLRBHRB = 631, |
647 | | CMPB = 632, |
648 | | CMPB8 = 633, |
649 | | CMPD = 634, |
650 | | CMPDI = 635, |
651 | | CMPEQB = 636, |
652 | | CMPLD = 637, |
653 | | CMPLDI = 638, |
654 | | CMPLW = 639, |
655 | | CMPLWI = 640, |
656 | | CMPRB = 641, |
657 | | CMPRB8 = 642, |
658 | | CMPW = 643, |
659 | | CMPWI = 644, |
660 | | CNTLZD = 645, |
661 | | CNTLZDM = 646, |
662 | | CNTLZD_rec = 647, |
663 | | CNTLZW = 648, |
664 | | CNTLZW8 = 649, |
665 | | CNTLZW8_rec = 650, |
666 | | CNTLZW_rec = 651, |
667 | | CNTTZD = 652, |
668 | | CNTTZDM = 653, |
669 | | CNTTZD_rec = 654, |
670 | | CNTTZW = 655, |
671 | | CNTTZW8 = 656, |
672 | | CNTTZW8_rec = 657, |
673 | | CNTTZW_rec = 658, |
674 | | CP_ABORT = 659, |
675 | | CP_COPY = 660, |
676 | | CP_COPY8 = 661, |
677 | | CP_PASTE8_rec = 662, |
678 | | CP_PASTE_rec = 663, |
679 | | CR6SET = 664, |
680 | | CR6UNSET = 665, |
681 | | CRAND = 666, |
682 | | CRANDC = 667, |
683 | | CREQV = 668, |
684 | | CRNAND = 669, |
685 | | CRNOR = 670, |
686 | | CRNOT = 671, |
687 | | CROR = 672, |
688 | | CRORC = 673, |
689 | | CRSET = 674, |
690 | | CRUNSET = 675, |
691 | | CRXOR = 676, |
692 | | CTRL_DEP = 677, |
693 | | DADD = 678, |
694 | | DADDQ = 679, |
695 | | DADDQ_rec = 680, |
696 | | DADD_rec = 681, |
697 | | DARN = 682, |
698 | | DCBA = 683, |
699 | | DCBF = 684, |
700 | | DCBFEP = 685, |
701 | | DCBI = 686, |
702 | | DCBST = 687, |
703 | | DCBSTEP = 688, |
704 | | DCBT = 689, |
705 | | DCBTEP = 690, |
706 | | DCBTST = 691, |
707 | | DCBTSTEP = 692, |
708 | | DCBZ = 693, |
709 | | DCBZEP = 694, |
710 | | DCBZL = 695, |
711 | | DCBZLEP = 696, |
712 | | DCCCI = 697, |
713 | | DCFFIX = 698, |
714 | | DCFFIXQ = 699, |
715 | | DCFFIXQQ = 700, |
716 | | DCFFIXQ_rec = 701, |
717 | | DCFFIX_rec = 702, |
718 | | DCMPO = 703, |
719 | | DCMPOQ = 704, |
720 | | DCMPU = 705, |
721 | | DCMPUQ = 706, |
722 | | DCTDP = 707, |
723 | | DCTDP_rec = 708, |
724 | | DCTFIX = 709, |
725 | | DCTFIXQ = 710, |
726 | | DCTFIXQQ = 711, |
727 | | DCTFIXQ_rec = 712, |
728 | | DCTFIX_rec = 713, |
729 | | DCTQPQ = 714, |
730 | | DCTQPQ_rec = 715, |
731 | | DDEDPD = 716, |
732 | | DDEDPDQ = 717, |
733 | | DDEDPDQ_rec = 718, |
734 | | DDEDPD_rec = 719, |
735 | | DDIV = 720, |
736 | | DDIVQ = 721, |
737 | | DDIVQ_rec = 722, |
738 | | DDIV_rec = 723, |
739 | | DENBCD = 724, |
740 | | DENBCDQ = 725, |
741 | | DENBCDQ_rec = 726, |
742 | | DENBCD_rec = 727, |
743 | | DIEX = 728, |
744 | | DIEXQ = 729, |
745 | | DIEXQ_rec = 730, |
746 | | DIEX_rec = 731, |
747 | | DIVD = 732, |
748 | | DIVDE = 733, |
749 | | DIVDEO = 734, |
750 | | DIVDEO_rec = 735, |
751 | | DIVDEU = 736, |
752 | | DIVDEUO = 737, |
753 | | DIVDEUO_rec = 738, |
754 | | DIVDEU_rec = 739, |
755 | | DIVDE_rec = 740, |
756 | | DIVDO = 741, |
757 | | DIVDO_rec = 742, |
758 | | DIVDU = 743, |
759 | | DIVDUO = 744, |
760 | | DIVDUO_rec = 745, |
761 | | DIVDU_rec = 746, |
762 | | DIVD_rec = 747, |
763 | | DIVW = 748, |
764 | | DIVWE = 749, |
765 | | DIVWEO = 750, |
766 | | DIVWEO_rec = 751, |
767 | | DIVWEU = 752, |
768 | | DIVWEUO = 753, |
769 | | DIVWEUO_rec = 754, |
770 | | DIVWEU_rec = 755, |
771 | | DIVWE_rec = 756, |
772 | | DIVWO = 757, |
773 | | DIVWO_rec = 758, |
774 | | DIVWU = 759, |
775 | | DIVWUO = 760, |
776 | | DIVWUO_rec = 761, |
777 | | DIVWU_rec = 762, |
778 | | DIVW_rec = 763, |
779 | | DMMR = 764, |
780 | | DMSETDMRZ = 765, |
781 | | DMUL = 766, |
782 | | DMULQ = 767, |
783 | | DMULQ_rec = 768, |
784 | | DMUL_rec = 769, |
785 | | DMXOR = 770, |
786 | | DMXXEXTFDMR256 = 771, |
787 | | DMXXEXTFDMR512 = 772, |
788 | | DMXXEXTFDMR512_HI = 773, |
789 | | DMXXINSTFDMR256 = 774, |
790 | | DMXXINSTFDMR512 = 775, |
791 | | DMXXINSTFDMR512_HI = 776, |
792 | | DQUA = 777, |
793 | | DQUAI = 778, |
794 | | DQUAIQ = 779, |
795 | | DQUAIQ_rec = 780, |
796 | | DQUAI_rec = 781, |
797 | | DQUAQ = 782, |
798 | | DQUAQ_rec = 783, |
799 | | DQUA_rec = 784, |
800 | | DRDPQ = 785, |
801 | | DRDPQ_rec = 786, |
802 | | DRINTN = 787, |
803 | | DRINTNQ = 788, |
804 | | DRINTNQ_rec = 789, |
805 | | DRINTN_rec = 790, |
806 | | DRINTX = 791, |
807 | | DRINTXQ = 792, |
808 | | DRINTXQ_rec = 793, |
809 | | DRINTX_rec = 794, |
810 | | DRRND = 795, |
811 | | DRRNDQ = 796, |
812 | | DRRNDQ_rec = 797, |
813 | | DRRND_rec = 798, |
814 | | DRSP = 799, |
815 | | DRSP_rec = 800, |
816 | | DSCLI = 801, |
817 | | DSCLIQ = 802, |
818 | | DSCLIQ_rec = 803, |
819 | | DSCLI_rec = 804, |
820 | | DSCRI = 805, |
821 | | DSCRIQ = 806, |
822 | | DSCRIQ_rec = 807, |
823 | | DSCRI_rec = 808, |
824 | | DSS = 809, |
825 | | DSSALL = 810, |
826 | | DST = 811, |
827 | | DST64 = 812, |
828 | | DSTST = 813, |
829 | | DSTST64 = 814, |
830 | | DSTSTT = 815, |
831 | | DSTSTT64 = 816, |
832 | | DSTT = 817, |
833 | | DSTT64 = 818, |
834 | | DSUB = 819, |
835 | | DSUBQ = 820, |
836 | | DSUBQ_rec = 821, |
837 | | DSUB_rec = 822, |
838 | | DTSTDC = 823, |
839 | | DTSTDCQ = 824, |
840 | | DTSTDG = 825, |
841 | | DTSTDGQ = 826, |
842 | | DTSTEX = 827, |
843 | | DTSTEXQ = 828, |
844 | | DTSTSF = 829, |
845 | | DTSTSFI = 830, |
846 | | DTSTSFIQ = 831, |
847 | | DTSTSFQ = 832, |
848 | | DXEX = 833, |
849 | | DXEXQ = 834, |
850 | | DXEXQ_rec = 835, |
851 | | DXEX_rec = 836, |
852 | | DYNALLOC = 837, |
853 | | DYNALLOC8 = 838, |
854 | | DYNAREAOFFSET = 839, |
855 | | DYNAREAOFFSET8 = 840, |
856 | | DecreaseCTR8loop = 841, |
857 | | DecreaseCTRloop = 842, |
858 | | EFDABS = 843, |
859 | | EFDADD = 844, |
860 | | EFDCFS = 845, |
861 | | EFDCFSF = 846, |
862 | | EFDCFSI = 847, |
863 | | EFDCFSID = 848, |
864 | | EFDCFUF = 849, |
865 | | EFDCFUI = 850, |
866 | | EFDCFUID = 851, |
867 | | EFDCMPEQ = 852, |
868 | | EFDCMPGT = 853, |
869 | | EFDCMPLT = 854, |
870 | | EFDCTSF = 855, |
871 | | EFDCTSI = 856, |
872 | | EFDCTSIDZ = 857, |
873 | | EFDCTSIZ = 858, |
874 | | EFDCTUF = 859, |
875 | | EFDCTUI = 860, |
876 | | EFDCTUIDZ = 861, |
877 | | EFDCTUIZ = 862, |
878 | | EFDDIV = 863, |
879 | | EFDMUL = 864, |
880 | | EFDNABS = 865, |
881 | | EFDNEG = 866, |
882 | | EFDSUB = 867, |
883 | | EFDTSTEQ = 868, |
884 | | EFDTSTGT = 869, |
885 | | EFDTSTLT = 870, |
886 | | EFSABS = 871, |
887 | | EFSADD = 872, |
888 | | EFSCFD = 873, |
889 | | EFSCFSF = 874, |
890 | | EFSCFSI = 875, |
891 | | EFSCFUF = 876, |
892 | | EFSCFUI = 877, |
893 | | EFSCMPEQ = 878, |
894 | | EFSCMPGT = 879, |
895 | | EFSCMPLT = 880, |
896 | | EFSCTSF = 881, |
897 | | EFSCTSI = 882, |
898 | | EFSCTSIZ = 883, |
899 | | EFSCTUF = 884, |
900 | | EFSCTUI = 885, |
901 | | EFSCTUIZ = 886, |
902 | | EFSDIV = 887, |
903 | | EFSMUL = 888, |
904 | | EFSNABS = 889, |
905 | | EFSNEG = 890, |
906 | | EFSSUB = 891, |
907 | | EFSTSTEQ = 892, |
908 | | EFSTSTGT = 893, |
909 | | EFSTSTLT = 894, |
910 | | EH_SjLj_LongJmp32 = 895, |
911 | | EH_SjLj_LongJmp64 = 896, |
912 | | EH_SjLj_SetJmp32 = 897, |
913 | | EH_SjLj_SetJmp64 = 898, |
914 | | EH_SjLj_Setup = 899, |
915 | | EQV = 900, |
916 | | EQV8 = 901, |
917 | | EQV8_rec = 902, |
918 | | EQV_rec = 903, |
919 | | EVABS = 904, |
920 | | EVADDIW = 905, |
921 | | EVADDSMIAAW = 906, |
922 | | EVADDSSIAAW = 907, |
923 | | EVADDUMIAAW = 908, |
924 | | EVADDUSIAAW = 909, |
925 | | EVADDW = 910, |
926 | | EVAND = 911, |
927 | | EVANDC = 912, |
928 | | EVCMPEQ = 913, |
929 | | EVCMPGTS = 914, |
930 | | EVCMPGTU = 915, |
931 | | EVCMPLTS = 916, |
932 | | EVCMPLTU = 917, |
933 | | EVCNTLSW = 918, |
934 | | EVCNTLZW = 919, |
935 | | EVDIVWS = 920, |
936 | | EVDIVWU = 921, |
937 | | EVEQV = 922, |
938 | | EVEXTSB = 923, |
939 | | EVEXTSH = 924, |
940 | | EVFSABS = 925, |
941 | | EVFSADD = 926, |
942 | | EVFSCFSF = 927, |
943 | | EVFSCFSI = 928, |
944 | | EVFSCFUF = 929, |
945 | | EVFSCFUI = 930, |
946 | | EVFSCMPEQ = 931, |
947 | | EVFSCMPGT = 932, |
948 | | EVFSCMPLT = 933, |
949 | | EVFSCTSF = 934, |
950 | | EVFSCTSI = 935, |
951 | | EVFSCTSIZ = 936, |
952 | | EVFSCTUF = 937, |
953 | | EVFSCTUI = 938, |
954 | | EVFSCTUIZ = 939, |
955 | | EVFSDIV = 940, |
956 | | EVFSMUL = 941, |
957 | | EVFSNABS = 942, |
958 | | EVFSNEG = 943, |
959 | | EVFSSUB = 944, |
960 | | EVFSTSTEQ = 945, |
961 | | EVFSTSTGT = 946, |
962 | | EVFSTSTLT = 947, |
963 | | EVLDD = 948, |
964 | | EVLDDX = 949, |
965 | | EVLDH = 950, |
966 | | EVLDHX = 951, |
967 | | EVLDW = 952, |
968 | | EVLDWX = 953, |
969 | | EVLHHESPLAT = 954, |
970 | | EVLHHESPLATX = 955, |
971 | | EVLHHOSSPLAT = 956, |
972 | | EVLHHOSSPLATX = 957, |
973 | | EVLHHOUSPLAT = 958, |
974 | | EVLHHOUSPLATX = 959, |
975 | | EVLWHE = 960, |
976 | | EVLWHEX = 961, |
977 | | EVLWHOS = 962, |
978 | | EVLWHOSX = 963, |
979 | | EVLWHOU = 964, |
980 | | EVLWHOUX = 965, |
981 | | EVLWHSPLAT = 966, |
982 | | EVLWHSPLATX = 967, |
983 | | EVLWWSPLAT = 968, |
984 | | EVLWWSPLATX = 969, |
985 | | EVMERGEHI = 970, |
986 | | EVMERGEHILO = 971, |
987 | | EVMERGELO = 972, |
988 | | EVMERGELOHI = 973, |
989 | | EVMHEGSMFAA = 974, |
990 | | EVMHEGSMFAN = 975, |
991 | | EVMHEGSMIAA = 976, |
992 | | EVMHEGSMIAN = 977, |
993 | | EVMHEGUMIAA = 978, |
994 | | EVMHEGUMIAN = 979, |
995 | | EVMHESMF = 980, |
996 | | EVMHESMFA = 981, |
997 | | EVMHESMFAAW = 982, |
998 | | EVMHESMFANW = 983, |
999 | | EVMHESMI = 984, |
1000 | | EVMHESMIA = 985, |
1001 | | EVMHESMIAAW = 986, |
1002 | | EVMHESMIANW = 987, |
1003 | | EVMHESSF = 988, |
1004 | | EVMHESSFA = 989, |
1005 | | EVMHESSFAAW = 990, |
1006 | | EVMHESSFANW = 991, |
1007 | | EVMHESSIAAW = 992, |
1008 | | EVMHESSIANW = 993, |
1009 | | EVMHEUMI = 994, |
1010 | | EVMHEUMIA = 995, |
1011 | | EVMHEUMIAAW = 996, |
1012 | | EVMHEUMIANW = 997, |
1013 | | EVMHEUSIAAW = 998, |
1014 | | EVMHEUSIANW = 999, |
1015 | | EVMHOGSMFAA = 1000, |
1016 | | EVMHOGSMFAN = 1001, |
1017 | | EVMHOGSMIAA = 1002, |
1018 | | EVMHOGSMIAN = 1003, |
1019 | | EVMHOGUMIAA = 1004, |
1020 | | EVMHOGUMIAN = 1005, |
1021 | | EVMHOSMF = 1006, |
1022 | | EVMHOSMFA = 1007, |
1023 | | EVMHOSMFAAW = 1008, |
1024 | | EVMHOSMFANW = 1009, |
1025 | | EVMHOSMI = 1010, |
1026 | | EVMHOSMIA = 1011, |
1027 | | EVMHOSMIAAW = 1012, |
1028 | | EVMHOSMIANW = 1013, |
1029 | | EVMHOSSF = 1014, |
1030 | | EVMHOSSFA = 1015, |
1031 | | EVMHOSSFAAW = 1016, |
1032 | | EVMHOSSFANW = 1017, |
1033 | | EVMHOSSIAAW = 1018, |
1034 | | EVMHOSSIANW = 1019, |
1035 | | EVMHOUMI = 1020, |
1036 | | EVMHOUMIA = 1021, |
1037 | | EVMHOUMIAAW = 1022, |
1038 | | EVMHOUMIANW = 1023, |
1039 | | EVMHOUSIAAW = 1024, |
1040 | | EVMHOUSIANW = 1025, |
1041 | | EVMRA = 1026, |
1042 | | EVMWHSMF = 1027, |
1043 | | EVMWHSMFA = 1028, |
1044 | | EVMWHSMI = 1029, |
1045 | | EVMWHSMIA = 1030, |
1046 | | EVMWHSSF = 1031, |
1047 | | EVMWHSSFA = 1032, |
1048 | | EVMWHUMI = 1033, |
1049 | | EVMWHUMIA = 1034, |
1050 | | EVMWLSMIAAW = 1035, |
1051 | | EVMWLSMIANW = 1036, |
1052 | | EVMWLSSIAAW = 1037, |
1053 | | EVMWLSSIANW = 1038, |
1054 | | EVMWLUMI = 1039, |
1055 | | EVMWLUMIA = 1040, |
1056 | | EVMWLUMIAAW = 1041, |
1057 | | EVMWLUMIANW = 1042, |
1058 | | EVMWLUSIAAW = 1043, |
1059 | | EVMWLUSIANW = 1044, |
1060 | | EVMWSMF = 1045, |
1061 | | EVMWSMFA = 1046, |
1062 | | EVMWSMFAA = 1047, |
1063 | | EVMWSMFAN = 1048, |
1064 | | EVMWSMI = 1049, |
1065 | | EVMWSMIA = 1050, |
1066 | | EVMWSMIAA = 1051, |
1067 | | EVMWSMIAN = 1052, |
1068 | | EVMWSSF = 1053, |
1069 | | EVMWSSFA = 1054, |
1070 | | EVMWSSFAA = 1055, |
1071 | | EVMWSSFAN = 1056, |
1072 | | EVMWUMI = 1057, |
1073 | | EVMWUMIA = 1058, |
1074 | | EVMWUMIAA = 1059, |
1075 | | EVMWUMIAN = 1060, |
1076 | | EVNAND = 1061, |
1077 | | EVNEG = 1062, |
1078 | | EVNOR = 1063, |
1079 | | EVOR = 1064, |
1080 | | EVORC = 1065, |
1081 | | EVRLW = 1066, |
1082 | | EVRLWI = 1067, |
1083 | | EVRNDW = 1068, |
1084 | | EVSEL = 1069, |
1085 | | EVSLW = 1070, |
1086 | | EVSLWI = 1071, |
1087 | | EVSPLATFI = 1072, |
1088 | | EVSPLATI = 1073, |
1089 | | EVSRWIS = 1074, |
1090 | | EVSRWIU = 1075, |
1091 | | EVSRWS = 1076, |
1092 | | EVSRWU = 1077, |
1093 | | EVSTDD = 1078, |
1094 | | EVSTDDX = 1079, |
1095 | | EVSTDH = 1080, |
1096 | | EVSTDHX = 1081, |
1097 | | EVSTDW = 1082, |
1098 | | EVSTDWX = 1083, |
1099 | | EVSTWHE = 1084, |
1100 | | EVSTWHEX = 1085, |
1101 | | EVSTWHO = 1086, |
1102 | | EVSTWHOX = 1087, |
1103 | | EVSTWWE = 1088, |
1104 | | EVSTWWEX = 1089, |
1105 | | EVSTWWO = 1090, |
1106 | | EVSTWWOX = 1091, |
1107 | | EVSUBFSMIAAW = 1092, |
1108 | | EVSUBFSSIAAW = 1093, |
1109 | | EVSUBFUMIAAW = 1094, |
1110 | | EVSUBFUSIAAW = 1095, |
1111 | | EVSUBFW = 1096, |
1112 | | EVSUBIFW = 1097, |
1113 | | EVXOR = 1098, |
1114 | | EXTSB = 1099, |
1115 | | EXTSB8 = 1100, |
1116 | | EXTSB8_32_64 = 1101, |
1117 | | EXTSB8_rec = 1102, |
1118 | | EXTSB_rec = 1103, |
1119 | | EXTSH = 1104, |
1120 | | EXTSH8 = 1105, |
1121 | | EXTSH8_32_64 = 1106, |
1122 | | EXTSH8_rec = 1107, |
1123 | | EXTSH_rec = 1108, |
1124 | | EXTSW = 1109, |
1125 | | EXTSWSLI = 1110, |
1126 | | EXTSWSLI_32_64 = 1111, |
1127 | | EXTSWSLI_32_64_rec = 1112, |
1128 | | EXTSWSLI_rec = 1113, |
1129 | | EXTSW_32 = 1114, |
1130 | | EXTSW_32_64 = 1115, |
1131 | | EXTSW_32_64_rec = 1116, |
1132 | | EXTSW_rec = 1117, |
1133 | | EnforceIEIO = 1118, |
1134 | | FABSD = 1119, |
1135 | | FABSD_rec = 1120, |
1136 | | FABSS = 1121, |
1137 | | FABSS_rec = 1122, |
1138 | | FADD = 1123, |
1139 | | FADDS = 1124, |
1140 | | FADDS_rec = 1125, |
1141 | | FADD_rec = 1126, |
1142 | | FADDrtz = 1127, |
1143 | | FCFID = 1128, |
1144 | | FCFIDS = 1129, |
1145 | | FCFIDS_rec = 1130, |
1146 | | FCFIDU = 1131, |
1147 | | FCFIDUS = 1132, |
1148 | | FCFIDUS_rec = 1133, |
1149 | | FCFIDU_rec = 1134, |
1150 | | FCFID_rec = 1135, |
1151 | | FCMPOD = 1136, |
1152 | | FCMPOS = 1137, |
1153 | | FCMPUD = 1138, |
1154 | | FCMPUS = 1139, |
1155 | | FCPSGND = 1140, |
1156 | | FCPSGND_rec = 1141, |
1157 | | FCPSGNS = 1142, |
1158 | | FCPSGNS_rec = 1143, |
1159 | | FCTID = 1144, |
1160 | | FCTIDU = 1145, |
1161 | | FCTIDUZ = 1146, |
1162 | | FCTIDUZ_rec = 1147, |
1163 | | FCTIDU_rec = 1148, |
1164 | | FCTIDZ = 1149, |
1165 | | FCTIDZ_rec = 1150, |
1166 | | FCTID_rec = 1151, |
1167 | | FCTIW = 1152, |
1168 | | FCTIWU = 1153, |
1169 | | FCTIWUZ = 1154, |
1170 | | FCTIWUZ_rec = 1155, |
1171 | | FCTIWU_rec = 1156, |
1172 | | FCTIWZ = 1157, |
1173 | | FCTIWZ_rec = 1158, |
1174 | | FCTIW_rec = 1159, |
1175 | | FDIV = 1160, |
1176 | | FDIVS = 1161, |
1177 | | FDIVS_rec = 1162, |
1178 | | FDIV_rec = 1163, |
1179 | | FENCE = 1164, |
1180 | | FMADD = 1165, |
1181 | | FMADDS = 1166, |
1182 | | FMADDS_rec = 1167, |
1183 | | FMADD_rec = 1168, |
1184 | | FMR = 1169, |
1185 | | FMR_rec = 1170, |
1186 | | FMSUB = 1171, |
1187 | | FMSUBS = 1172, |
1188 | | FMSUBS_rec = 1173, |
1189 | | FMSUB_rec = 1174, |
1190 | | FMUL = 1175, |
1191 | | FMULS = 1176, |
1192 | | FMULS_rec = 1177, |
1193 | | FMUL_rec = 1178, |
1194 | | FNABSD = 1179, |
1195 | | FNABSD_rec = 1180, |
1196 | | FNABSS = 1181, |
1197 | | FNABSS_rec = 1182, |
1198 | | FNEGD = 1183, |
1199 | | FNEGD_rec = 1184, |
1200 | | FNEGS = 1185, |
1201 | | FNEGS_rec = 1186, |
1202 | | FNMADD = 1187, |
1203 | | FNMADDS = 1188, |
1204 | | FNMADDS_rec = 1189, |
1205 | | FNMADD_rec = 1190, |
1206 | | FNMSUB = 1191, |
1207 | | FNMSUBS = 1192, |
1208 | | FNMSUBS_rec = 1193, |
1209 | | FNMSUB_rec = 1194, |
1210 | | FRE = 1195, |
1211 | | FRES = 1196, |
1212 | | FRES_rec = 1197, |
1213 | | FRE_rec = 1198, |
1214 | | FRIMD = 1199, |
1215 | | FRIMD_rec = 1200, |
1216 | | FRIMS = 1201, |
1217 | | FRIMS_rec = 1202, |
1218 | | FRIND = 1203, |
1219 | | FRIND_rec = 1204, |
1220 | | FRINS = 1205, |
1221 | | FRINS_rec = 1206, |
1222 | | FRIPD = 1207, |
1223 | | FRIPD_rec = 1208, |
1224 | | FRIPS = 1209, |
1225 | | FRIPS_rec = 1210, |
1226 | | FRIZD = 1211, |
1227 | | FRIZD_rec = 1212, |
1228 | | FRIZS = 1213, |
1229 | | FRIZS_rec = 1214, |
1230 | | FRSP = 1215, |
1231 | | FRSP_rec = 1216, |
1232 | | FRSQRTE = 1217, |
1233 | | FRSQRTES = 1218, |
1234 | | FRSQRTES_rec = 1219, |
1235 | | FRSQRTE_rec = 1220, |
1236 | | FSELD = 1221, |
1237 | | FSELD_rec = 1222, |
1238 | | FSELS = 1223, |
1239 | | FSELS_rec = 1224, |
1240 | | FSQRT = 1225, |
1241 | | FSQRTS = 1226, |
1242 | | FSQRTS_rec = 1227, |
1243 | | FSQRT_rec = 1228, |
1244 | | FSUB = 1229, |
1245 | | FSUBS = 1230, |
1246 | | FSUBS_rec = 1231, |
1247 | | FSUB_rec = 1232, |
1248 | | FTDIV = 1233, |
1249 | | FTSQRT = 1234, |
1250 | | GETtlsADDR = 1235, |
1251 | | GETtlsADDR32 = 1236, |
1252 | | GETtlsADDR32AIX = 1237, |
1253 | | GETtlsADDR64AIX = 1238, |
1254 | | GETtlsADDRPCREL = 1239, |
1255 | | GETtlsTpointer32AIX = 1240, |
1256 | | GETtlsldADDR = 1241, |
1257 | | GETtlsldADDR32 = 1242, |
1258 | | GETtlsldADDRPCREL = 1243, |
1259 | | HASHCHK = 1244, |
1260 | | HASHCHK8 = 1245, |
1261 | | HASHCHKP = 1246, |
1262 | | HASHCHKP8 = 1247, |
1263 | | HASHST = 1248, |
1264 | | HASHST8 = 1249, |
1265 | | HASHSTP = 1250, |
1266 | | HASHSTP8 = 1251, |
1267 | | HRFID = 1252, |
1268 | | ICBI = 1253, |
1269 | | ICBIEP = 1254, |
1270 | | ICBLC = 1255, |
1271 | | ICBLQ = 1256, |
1272 | | ICBT = 1257, |
1273 | | ICBTLS = 1258, |
1274 | | ICCCI = 1259, |
1275 | | ISEL = 1260, |
1276 | | ISEL8 = 1261, |
1277 | | ISYNC = 1262, |
1278 | | LA = 1263, |
1279 | | LA8 = 1264, |
1280 | | LBARX = 1265, |
1281 | | LBARXL = 1266, |
1282 | | LBEPX = 1267, |
1283 | | LBZ = 1268, |
1284 | | LBZ8 = 1269, |
1285 | | LBZCIX = 1270, |
1286 | | LBZU = 1271, |
1287 | | LBZU8 = 1272, |
1288 | | LBZUX = 1273, |
1289 | | LBZUX8 = 1274, |
1290 | | LBZX = 1275, |
1291 | | LBZX8 = 1276, |
1292 | | LBZXTLS = 1277, |
1293 | | LBZXTLS_ = 1278, |
1294 | | LBZXTLS_32 = 1279, |
1295 | | LD = 1280, |
1296 | | LDARX = 1281, |
1297 | | LDARXL = 1282, |
1298 | | LDAT = 1283, |
1299 | | LDBRX = 1284, |
1300 | | LDCIX = 1285, |
1301 | | LDU = 1286, |
1302 | | LDUX = 1287, |
1303 | | LDX = 1288, |
1304 | | LDXTLS = 1289, |
1305 | | LDXTLS_ = 1290, |
1306 | | LDgotTprelL = 1291, |
1307 | | LDgotTprelL32 = 1292, |
1308 | | LDtoc = 1293, |
1309 | | LDtocBA = 1294, |
1310 | | LDtocCPT = 1295, |
1311 | | LDtocJTI = 1296, |
1312 | | LDtocL = 1297, |
1313 | | LFD = 1298, |
1314 | | LFDEPX = 1299, |
1315 | | LFDU = 1300, |
1316 | | LFDUX = 1301, |
1317 | | LFDX = 1302, |
1318 | | LFDXTLS = 1303, |
1319 | | LFDXTLS_ = 1304, |
1320 | | LFIWAX = 1305, |
1321 | | LFIWZX = 1306, |
1322 | | LFS = 1307, |
1323 | | LFSU = 1308, |
1324 | | LFSUX = 1309, |
1325 | | LFSX = 1310, |
1326 | | LFSXTLS = 1311, |
1327 | | LFSXTLS_ = 1312, |
1328 | | LHA = 1313, |
1329 | | LHA8 = 1314, |
1330 | | LHARX = 1315, |
1331 | | LHARXL = 1316, |
1332 | | LHAU = 1317, |
1333 | | LHAU8 = 1318, |
1334 | | LHAUX = 1319, |
1335 | | LHAUX8 = 1320, |
1336 | | LHAX = 1321, |
1337 | | LHAX8 = 1322, |
1338 | | LHAXTLS = 1323, |
1339 | | LHAXTLS_ = 1324, |
1340 | | LHAXTLS_32 = 1325, |
1341 | | LHBRX = 1326, |
1342 | | LHBRX8 = 1327, |
1343 | | LHEPX = 1328, |
1344 | | LHZ = 1329, |
1345 | | LHZ8 = 1330, |
1346 | | LHZCIX = 1331, |
1347 | | LHZU = 1332, |
1348 | | LHZU8 = 1333, |
1349 | | LHZUX = 1334, |
1350 | | LHZUX8 = 1335, |
1351 | | LHZX = 1336, |
1352 | | LHZX8 = 1337, |
1353 | | LHZXTLS = 1338, |
1354 | | LHZXTLS_ = 1339, |
1355 | | LHZXTLS_32 = 1340, |
1356 | | LI = 1341, |
1357 | | LI8 = 1342, |
1358 | | LIS = 1343, |
1359 | | LIS8 = 1344, |
1360 | | LMW = 1345, |
1361 | | LQ = 1346, |
1362 | | LQARX = 1347, |
1363 | | LQARXL = 1348, |
1364 | | LQX_PSEUDO = 1349, |
1365 | | LSWI = 1350, |
1366 | | LVEBX = 1351, |
1367 | | LVEHX = 1352, |
1368 | | LVEWX = 1353, |
1369 | | LVSL = 1354, |
1370 | | LVSR = 1355, |
1371 | | LVX = 1356, |
1372 | | LVXL = 1357, |
1373 | | LWA = 1358, |
1374 | | LWARX = 1359, |
1375 | | LWARXL = 1360, |
1376 | | LWAT = 1361, |
1377 | | LWAUX = 1362, |
1378 | | LWAX = 1363, |
1379 | | LWAXTLS = 1364, |
1380 | | LWAXTLS_ = 1365, |
1381 | | LWAXTLS_32 = 1366, |
1382 | | LWAX_32 = 1367, |
1383 | | LWA_32 = 1368, |
1384 | | LWBRX = 1369, |
1385 | | LWBRX8 = 1370, |
1386 | | LWEPX = 1371, |
1387 | | LWZ = 1372, |
1388 | | LWZ8 = 1373, |
1389 | | LWZCIX = 1374, |
1390 | | LWZU = 1375, |
1391 | | LWZU8 = 1376, |
1392 | | LWZUX = 1377, |
1393 | | LWZUX8 = 1378, |
1394 | | LWZX = 1379, |
1395 | | LWZX8 = 1380, |
1396 | | LWZXTLS = 1381, |
1397 | | LWZXTLS_ = 1382, |
1398 | | LWZXTLS_32 = 1383, |
1399 | | LWZtoc = 1384, |
1400 | | LWZtocL = 1385, |
1401 | | LXSD = 1386, |
1402 | | LXSDX = 1387, |
1403 | | LXSIBZX = 1388, |
1404 | | LXSIHZX = 1389, |
1405 | | LXSIWAX = 1390, |
1406 | | LXSIWZX = 1391, |
1407 | | LXSSP = 1392, |
1408 | | LXSSPX = 1393, |
1409 | | LXV = 1394, |
1410 | | LXVB16X = 1395, |
1411 | | LXVD2X = 1396, |
1412 | | LXVDSX = 1397, |
1413 | | LXVH8X = 1398, |
1414 | | LXVKQ = 1399, |
1415 | | LXVL = 1400, |
1416 | | LXVLL = 1401, |
1417 | | LXVP = 1402, |
1418 | | LXVPRL = 1403, |
1419 | | LXVPRLL = 1404, |
1420 | | LXVPX = 1405, |
1421 | | LXVRBX = 1406, |
1422 | | LXVRDX = 1407, |
1423 | | LXVRHX = 1408, |
1424 | | LXVRL = 1409, |
1425 | | LXVRLL = 1410, |
1426 | | LXVRWX = 1411, |
1427 | | LXVW4X = 1412, |
1428 | | LXVWSX = 1413, |
1429 | | LXVX = 1414, |
1430 | | MADDHD = 1415, |
1431 | | MADDHDU = 1416, |
1432 | | MADDLD = 1417, |
1433 | | MADDLD8 = 1418, |
1434 | | MBAR = 1419, |
1435 | | MCRF = 1420, |
1436 | | MCRFS = 1421, |
1437 | | MCRXRX = 1422, |
1438 | | MFBHRBE = 1423, |
1439 | | MFCR = 1424, |
1440 | | MFCR8 = 1425, |
1441 | | MFCTR = 1426, |
1442 | | MFCTR8 = 1427, |
1443 | | MFDCR = 1428, |
1444 | | MFFS = 1429, |
1445 | | MFFSCDRN = 1430, |
1446 | | MFFSCDRNI = 1431, |
1447 | | MFFSCE = 1432, |
1448 | | MFFSCRN = 1433, |
1449 | | MFFSCRNI = 1434, |
1450 | | MFFSL = 1435, |
1451 | | MFFS_rec = 1436, |
1452 | | MFLR = 1437, |
1453 | | MFLR8 = 1438, |
1454 | | MFMSR = 1439, |
1455 | | MFOCRF = 1440, |
1456 | | MFOCRF8 = 1441, |
1457 | | MFPMR = 1442, |
1458 | | MFSPR = 1443, |
1459 | | MFSPR8 = 1444, |
1460 | | MFSR = 1445, |
1461 | | MFSRIN = 1446, |
1462 | | MFTB = 1447, |
1463 | | MFTB8 = 1448, |
1464 | | MFUDSCR = 1449, |
1465 | | MFVRD = 1450, |
1466 | | MFVRSAVE = 1451, |
1467 | | MFVRSAVEv = 1452, |
1468 | | MFVRWZ = 1453, |
1469 | | MFVSCR = 1454, |
1470 | | MFVSRD = 1455, |
1471 | | MFVSRLD = 1456, |
1472 | | MFVSRWZ = 1457, |
1473 | | MODSD = 1458, |
1474 | | MODSW = 1459, |
1475 | | MODUD = 1460, |
1476 | | MODUW = 1461, |
1477 | | MSGSYNC = 1462, |
1478 | | MSYNC = 1463, |
1479 | | MTCRF = 1464, |
1480 | | MTCRF8 = 1465, |
1481 | | MTCTR = 1466, |
1482 | | MTCTR8 = 1467, |
1483 | | MTCTR8loop = 1468, |
1484 | | MTCTRloop = 1469, |
1485 | | MTDCR = 1470, |
1486 | | MTFSB0 = 1471, |
1487 | | MTFSB1 = 1472, |
1488 | | MTFSF = 1473, |
1489 | | MTFSFI = 1474, |
1490 | | MTFSFI_rec = 1475, |
1491 | | MTFSFIb = 1476, |
1492 | | MTFSF_rec = 1477, |
1493 | | MTFSFb = 1478, |
1494 | | MTLR = 1479, |
1495 | | MTLR8 = 1480, |
1496 | | MTMSR = 1481, |
1497 | | MTMSRD = 1482, |
1498 | | MTOCRF = 1483, |
1499 | | MTOCRF8 = 1484, |
1500 | | MTPMR = 1485, |
1501 | | MTSPR = 1486, |
1502 | | MTSPR8 = 1487, |
1503 | | MTSR = 1488, |
1504 | | MTSRIN = 1489, |
1505 | | MTUDSCR = 1490, |
1506 | | MTVRD = 1491, |
1507 | | MTVRSAVE = 1492, |
1508 | | MTVRSAVEv = 1493, |
1509 | | MTVRWA = 1494, |
1510 | | MTVRWZ = 1495, |
1511 | | MTVSCR = 1496, |
1512 | | MTVSRBM = 1497, |
1513 | | MTVSRBMI = 1498, |
1514 | | MTVSRD = 1499, |
1515 | | MTVSRDD = 1500, |
1516 | | MTVSRDM = 1501, |
1517 | | MTVSRHM = 1502, |
1518 | | MTVSRQM = 1503, |
1519 | | MTVSRWA = 1504, |
1520 | | MTVSRWM = 1505, |
1521 | | MTVSRWS = 1506, |
1522 | | MTVSRWZ = 1507, |
1523 | | MULHD = 1508, |
1524 | | MULHDU = 1509, |
1525 | | MULHDU_rec = 1510, |
1526 | | MULHD_rec = 1511, |
1527 | | MULHW = 1512, |
1528 | | MULHWU = 1513, |
1529 | | MULHWU_rec = 1514, |
1530 | | MULHW_rec = 1515, |
1531 | | MULLD = 1516, |
1532 | | MULLDO = 1517, |
1533 | | MULLDO_rec = 1518, |
1534 | | MULLD_rec = 1519, |
1535 | | MULLI = 1520, |
1536 | | MULLI8 = 1521, |
1537 | | MULLW = 1522, |
1538 | | MULLWO = 1523, |
1539 | | MULLWO_rec = 1524, |
1540 | | MULLW_rec = 1525, |
1541 | | MoveGOTtoLR = 1526, |
1542 | | MovePCtoLR = 1527, |
1543 | | MovePCtoLR8 = 1528, |
1544 | | NAND = 1529, |
1545 | | NAND8 = 1530, |
1546 | | NAND8_rec = 1531, |
1547 | | NAND_rec = 1532, |
1548 | | NAP = 1533, |
1549 | | NEG = 1534, |
1550 | | NEG8 = 1535, |
1551 | | NEG8O = 1536, |
1552 | | NEG8O_rec = 1537, |
1553 | | NEG8_rec = 1538, |
1554 | | NEGO = 1539, |
1555 | | NEGO_rec = 1540, |
1556 | | NEG_rec = 1541, |
1557 | | NOP = 1542, |
1558 | | NOP_GT_PWR6 = 1543, |
1559 | | NOP_GT_PWR7 = 1544, |
1560 | | NOR = 1545, |
1561 | | NOR8 = 1546, |
1562 | | NOR8_rec = 1547, |
1563 | | NOR_rec = 1548, |
1564 | | OR = 1549, |
1565 | | OR8 = 1550, |
1566 | | OR8_rec = 1551, |
1567 | | ORC = 1552, |
1568 | | ORC8 = 1553, |
1569 | | ORC8_rec = 1554, |
1570 | | ORC_rec = 1555, |
1571 | | ORI = 1556, |
1572 | | ORI8 = 1557, |
1573 | | ORIS = 1558, |
1574 | | ORIS8 = 1559, |
1575 | | OR_rec = 1560, |
1576 | | PADDI = 1561, |
1577 | | PADDI8 = 1562, |
1578 | | PADDI8pc = 1563, |
1579 | | PADDIdtprel = 1564, |
1580 | | PADDIpc = 1565, |
1581 | | PDEPD = 1566, |
1582 | | PEXTD = 1567, |
1583 | | PLA = 1568, |
1584 | | PLA8 = 1569, |
1585 | | PLA8pc = 1570, |
1586 | | PLApc = 1571, |
1587 | | PLBZ = 1572, |
1588 | | PLBZ8 = 1573, |
1589 | | PLBZ8nopc = 1574, |
1590 | | PLBZ8onlypc = 1575, |
1591 | | PLBZ8pc = 1576, |
1592 | | PLBZnopc = 1577, |
1593 | | PLBZonlypc = 1578, |
1594 | | PLBZpc = 1579, |
1595 | | PLD = 1580, |
1596 | | PLDnopc = 1581, |
1597 | | PLDonlypc = 1582, |
1598 | | PLDpc = 1583, |
1599 | | PLFD = 1584, |
1600 | | PLFDnopc = 1585, |
1601 | | PLFDonlypc = 1586, |
1602 | | PLFDpc = 1587, |
1603 | | PLFS = 1588, |
1604 | | PLFSnopc = 1589, |
1605 | | PLFSonlypc = 1590, |
1606 | | PLFSpc = 1591, |
1607 | | PLHA = 1592, |
1608 | | PLHA8 = 1593, |
1609 | | PLHA8nopc = 1594, |
1610 | | PLHA8onlypc = 1595, |
1611 | | PLHA8pc = 1596, |
1612 | | PLHAnopc = 1597, |
1613 | | PLHAonlypc = 1598, |
1614 | | PLHApc = 1599, |
1615 | | PLHZ = 1600, |
1616 | | PLHZ8 = 1601, |
1617 | | PLHZ8nopc = 1602, |
1618 | | PLHZ8onlypc = 1603, |
1619 | | PLHZ8pc = 1604, |
1620 | | PLHZnopc = 1605, |
1621 | | PLHZonlypc = 1606, |
1622 | | PLHZpc = 1607, |
1623 | | PLI = 1608, |
1624 | | PLI8 = 1609, |
1625 | | PLWA = 1610, |
1626 | | PLWA8 = 1611, |
1627 | | PLWA8nopc = 1612, |
1628 | | PLWA8onlypc = 1613, |
1629 | | PLWA8pc = 1614, |
1630 | | PLWAnopc = 1615, |
1631 | | PLWAonlypc = 1616, |
1632 | | PLWApc = 1617, |
1633 | | PLWZ = 1618, |
1634 | | PLWZ8 = 1619, |
1635 | | PLWZ8nopc = 1620, |
1636 | | PLWZ8onlypc = 1621, |
1637 | | PLWZ8pc = 1622, |
1638 | | PLWZnopc = 1623, |
1639 | | PLWZonlypc = 1624, |
1640 | | PLWZpc = 1625, |
1641 | | PLXSD = 1626, |
1642 | | PLXSDnopc = 1627, |
1643 | | PLXSDonlypc = 1628, |
1644 | | PLXSDpc = 1629, |
1645 | | PLXSSP = 1630, |
1646 | | PLXSSPnopc = 1631, |
1647 | | PLXSSPonlypc = 1632, |
1648 | | PLXSSPpc = 1633, |
1649 | | PLXV = 1634, |
1650 | | PLXVP = 1635, |
1651 | | PLXVPnopc = 1636, |
1652 | | PLXVPonlypc = 1637, |
1653 | | PLXVPpc = 1638, |
1654 | | PLXVnopc = 1639, |
1655 | | PLXVonlypc = 1640, |
1656 | | PLXVpc = 1641, |
1657 | | PMXVBF16GER2 = 1642, |
1658 | | PMXVBF16GER2NN = 1643, |
1659 | | PMXVBF16GER2NP = 1644, |
1660 | | PMXVBF16GER2PN = 1645, |
1661 | | PMXVBF16GER2PP = 1646, |
1662 | | PMXVBF16GER2W = 1647, |
1663 | | PMXVBF16GER2WNN = 1648, |
1664 | | PMXVBF16GER2WNP = 1649, |
1665 | | PMXVBF16GER2WPN = 1650, |
1666 | | PMXVBF16GER2WPP = 1651, |
1667 | | PMXVF16GER2 = 1652, |
1668 | | PMXVF16GER2NN = 1653, |
1669 | | PMXVF16GER2NP = 1654, |
1670 | | PMXVF16GER2PN = 1655, |
1671 | | PMXVF16GER2PP = 1656, |
1672 | | PMXVF16GER2W = 1657, |
1673 | | PMXVF16GER2WNN = 1658, |
1674 | | PMXVF16GER2WNP = 1659, |
1675 | | PMXVF16GER2WPN = 1660, |
1676 | | PMXVF16GER2WPP = 1661, |
1677 | | PMXVF32GER = 1662, |
1678 | | PMXVF32GERNN = 1663, |
1679 | | PMXVF32GERNP = 1664, |
1680 | | PMXVF32GERPN = 1665, |
1681 | | PMXVF32GERPP = 1666, |
1682 | | PMXVF32GERW = 1667, |
1683 | | PMXVF32GERWNN = 1668, |
1684 | | PMXVF32GERWNP = 1669, |
1685 | | PMXVF32GERWPN = 1670, |
1686 | | PMXVF32GERWPP = 1671, |
1687 | | PMXVF64GER = 1672, |
1688 | | PMXVF64GERNN = 1673, |
1689 | | PMXVF64GERNP = 1674, |
1690 | | PMXVF64GERPN = 1675, |
1691 | | PMXVF64GERPP = 1676, |
1692 | | PMXVF64GERW = 1677, |
1693 | | PMXVF64GERWNN = 1678, |
1694 | | PMXVF64GERWNP = 1679, |
1695 | | PMXVF64GERWPN = 1680, |
1696 | | PMXVF64GERWPP = 1681, |
1697 | | PMXVI16GER2 = 1682, |
1698 | | PMXVI16GER2PP = 1683, |
1699 | | PMXVI16GER2S = 1684, |
1700 | | PMXVI16GER2SPP = 1685, |
1701 | | PMXVI16GER2SW = 1686, |
1702 | | PMXVI16GER2SWPP = 1687, |
1703 | | PMXVI16GER2W = 1688, |
1704 | | PMXVI16GER2WPP = 1689, |
1705 | | PMXVI4GER8 = 1690, |
1706 | | PMXVI4GER8PP = 1691, |
1707 | | PMXVI4GER8W = 1692, |
1708 | | PMXVI4GER8WPP = 1693, |
1709 | | PMXVI8GER4 = 1694, |
1710 | | PMXVI8GER4PP = 1695, |
1711 | | PMXVI8GER4SPP = 1696, |
1712 | | PMXVI8GER4W = 1697, |
1713 | | PMXVI8GER4WPP = 1698, |
1714 | | PMXVI8GER4WSPP = 1699, |
1715 | | POPCNTB = 1700, |
1716 | | POPCNTB8 = 1701, |
1717 | | POPCNTD = 1702, |
1718 | | POPCNTW = 1703, |
1719 | | PPC32GOT = 1704, |
1720 | | PPC32PICGOT = 1705, |
1721 | | PREPARE_PROBED_ALLOCA_32 = 1706, |
1722 | | PREPARE_PROBED_ALLOCA_64 = 1707, |
1723 | | PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_32 = 1708, |
1724 | | PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_64 = 1709, |
1725 | | PROBED_ALLOCA_32 = 1710, |
1726 | | PROBED_ALLOCA_64 = 1711, |
1727 | | PROBED_STACKALLOC_32 = 1712, |
1728 | | PROBED_STACKALLOC_64 = 1713, |
1729 | | PSTB = 1714, |
1730 | | PSTB8 = 1715, |
1731 | | PSTB8nopc = 1716, |
1732 | | PSTB8onlypc = 1717, |
1733 | | PSTB8pc = 1718, |
1734 | | PSTBnopc = 1719, |
1735 | | PSTBonlypc = 1720, |
1736 | | PSTBpc = 1721, |
1737 | | PSTD = 1722, |
1738 | | PSTDnopc = 1723, |
1739 | | PSTDonlypc = 1724, |
1740 | | PSTDpc = 1725, |
1741 | | PSTFD = 1726, |
1742 | | PSTFDnopc = 1727, |
1743 | | PSTFDonlypc = 1728, |
1744 | | PSTFDpc = 1729, |
1745 | | PSTFS = 1730, |
1746 | | PSTFSnopc = 1731, |
1747 | | PSTFSonlypc = 1732, |
1748 | | PSTFSpc = 1733, |
1749 | | PSTH = 1734, |
1750 | | PSTH8 = 1735, |
1751 | | PSTH8nopc = 1736, |
1752 | | PSTH8onlypc = 1737, |
1753 | | PSTH8pc = 1738, |
1754 | | PSTHnopc = 1739, |
1755 | | PSTHonlypc = 1740, |
1756 | | PSTHpc = 1741, |
1757 | | PSTW = 1742, |
1758 | | PSTW8 = 1743, |
1759 | | PSTW8nopc = 1744, |
1760 | | PSTW8onlypc = 1745, |
1761 | | PSTW8pc = 1746, |
1762 | | PSTWnopc = 1747, |
1763 | | PSTWonlypc = 1748, |
1764 | | PSTWpc = 1749, |
1765 | | PSTXSD = 1750, |
1766 | | PSTXSDnopc = 1751, |
1767 | | PSTXSDonlypc = 1752, |
1768 | | PSTXSDpc = 1753, |
1769 | | PSTXSSP = 1754, |
1770 | | PSTXSSPnopc = 1755, |
1771 | | PSTXSSPonlypc = 1756, |
1772 | | PSTXSSPpc = 1757, |
1773 | | PSTXV = 1758, |
1774 | | PSTXVP = 1759, |
1775 | | PSTXVPnopc = 1760, |
1776 | | PSTXVPonlypc = 1761, |
1777 | | PSTXVPpc = 1762, |
1778 | | PSTXVnopc = 1763, |
1779 | | PSTXVonlypc = 1764, |
1780 | | PSTXVpc = 1765, |
1781 | | PseudoEIEIO = 1766, |
1782 | | RESTORE_ACC = 1767, |
1783 | | RESTORE_CR = 1768, |
1784 | | RESTORE_CRBIT = 1769, |
1785 | | RESTORE_QUADWORD = 1770, |
1786 | | RESTORE_UACC = 1771, |
1787 | | RESTORE_WACC = 1772, |
1788 | | RFCI = 1773, |
1789 | | RFDI = 1774, |
1790 | | RFEBB = 1775, |
1791 | | RFI = 1776, |
1792 | | RFID = 1777, |
1793 | | RFMCI = 1778, |
1794 | | RLDCL = 1779, |
1795 | | RLDCL_rec = 1780, |
1796 | | RLDCR = 1781, |
1797 | | RLDCR_rec = 1782, |
1798 | | RLDIC = 1783, |
1799 | | RLDICL = 1784, |
1800 | | RLDICL_32 = 1785, |
1801 | | RLDICL_32_64 = 1786, |
1802 | | RLDICL_32_rec = 1787, |
1803 | | RLDICL_rec = 1788, |
1804 | | RLDICR = 1789, |
1805 | | RLDICR_32 = 1790, |
1806 | | RLDICR_rec = 1791, |
1807 | | RLDIC_rec = 1792, |
1808 | | RLDIMI = 1793, |
1809 | | RLDIMI_rec = 1794, |
1810 | | RLWIMI = 1795, |
1811 | | RLWIMI8 = 1796, |
1812 | | RLWIMI8_rec = 1797, |
1813 | | RLWIMI_rec = 1798, |
1814 | | RLWINM = 1799, |
1815 | | RLWINM8 = 1800, |
1816 | | RLWINM8_rec = 1801, |
1817 | | RLWINM_rec = 1802, |
1818 | | RLWNM = 1803, |
1819 | | RLWNM8 = 1804, |
1820 | | RLWNM8_rec = 1805, |
1821 | | RLWNM_rec = 1806, |
1822 | | ReadTB = 1807, |
1823 | | SC = 1808, |
1824 | | SCV = 1809, |
1825 | | SELECT_CC_F16 = 1810, |
1826 | | SELECT_CC_F4 = 1811, |
1827 | | SELECT_CC_F8 = 1812, |
1828 | | SELECT_CC_I4 = 1813, |
1829 | | SELECT_CC_I8 = 1814, |
1830 | | SELECT_CC_SPE = 1815, |
1831 | | SELECT_CC_SPE4 = 1816, |
1832 | | SELECT_CC_VRRC = 1817, |
1833 | | SELECT_CC_VSFRC = 1818, |
1834 | | SELECT_CC_VSRC = 1819, |
1835 | | SELECT_CC_VSSRC = 1820, |
1836 | | SELECT_F16 = 1821, |
1837 | | SELECT_F4 = 1822, |
1838 | | SELECT_F8 = 1823, |
1839 | | SELECT_I4 = 1824, |
1840 | | SELECT_I8 = 1825, |
1841 | | SELECT_SPE = 1826, |
1842 | | SELECT_SPE4 = 1827, |
1843 | | SELECT_VRRC = 1828, |
1844 | | SELECT_VSFRC = 1829, |
1845 | | SELECT_VSRC = 1830, |
1846 | | SELECT_VSSRC = 1831, |
1847 | | SETB = 1832, |
1848 | | SETB8 = 1833, |
1849 | | SETBC = 1834, |
1850 | | SETBC8 = 1835, |
1851 | | SETBCR = 1836, |
1852 | | SETBCR8 = 1837, |
1853 | | SETFLM = 1838, |
1854 | | SETNBC = 1839, |
1855 | | SETNBC8 = 1840, |
1856 | | SETNBCR = 1841, |
1857 | | SETNBCR8 = 1842, |
1858 | | SETRND = 1843, |
1859 | | SETRNDi = 1844, |
1860 | | SLBFEE_rec = 1845, |
1861 | | SLBIA = 1846, |
1862 | | SLBIE = 1847, |
1863 | | SLBIEG = 1848, |
1864 | | SLBMFEE = 1849, |
1865 | | SLBMFEV = 1850, |
1866 | | SLBMTE = 1851, |
1867 | | SLBSYNC = 1852, |
1868 | | SLD = 1853, |
1869 | | SLD_rec = 1854, |
1870 | | SLW = 1855, |
1871 | | SLW8 = 1856, |
1872 | | SLW8_rec = 1857, |
1873 | | SLW_rec = 1858, |
1874 | | SPELWZ = 1859, |
1875 | | SPELWZX = 1860, |
1876 | | SPESTW = 1861, |
1877 | | SPESTWX = 1862, |
1878 | | SPILL_ACC = 1863, |
1879 | | SPILL_CR = 1864, |
1880 | | SPILL_CRBIT = 1865, |
1881 | | SPILL_QUADWORD = 1866, |
1882 | | SPILL_UACC = 1867, |
1883 | | SPILL_WACC = 1868, |
1884 | | SPLIT_QUADWORD = 1869, |
1885 | | SRAD = 1870, |
1886 | | SRADI = 1871, |
1887 | | SRADI_32 = 1872, |
1888 | | SRADI_rec = 1873, |
1889 | | SRAD_rec = 1874, |
1890 | | SRAW = 1875, |
1891 | | SRAWI = 1876, |
1892 | | SRAWI_rec = 1877, |
1893 | | SRAW_rec = 1878, |
1894 | | SRD = 1879, |
1895 | | SRD_rec = 1880, |
1896 | | SRW = 1881, |
1897 | | SRW8 = 1882, |
1898 | | SRW8_rec = 1883, |
1899 | | SRW_rec = 1884, |
1900 | | STB = 1885, |
1901 | | STB8 = 1886, |
1902 | | STBCIX = 1887, |
1903 | | STBCX = 1888, |
1904 | | STBEPX = 1889, |
1905 | | STBU = 1890, |
1906 | | STBU8 = 1891, |
1907 | | STBUX = 1892, |
1908 | | STBUX8 = 1893, |
1909 | | STBX = 1894, |
1910 | | STBX8 = 1895, |
1911 | | STBXTLS = 1896, |
1912 | | STBXTLS_ = 1897, |
1913 | | STBXTLS_32 = 1898, |
1914 | | STD = 1899, |
1915 | | STDAT = 1900, |
1916 | | STDBRX = 1901, |
1917 | | STDCIX = 1902, |
1918 | | STDCX = 1903, |
1919 | | STDU = 1904, |
1920 | | STDUX = 1905, |
1921 | | STDX = 1906, |
1922 | | STDXTLS = 1907, |
1923 | | STDXTLS_ = 1908, |
1924 | | STFD = 1909, |
1925 | | STFDEPX = 1910, |
1926 | | STFDU = 1911, |
1927 | | STFDUX = 1912, |
1928 | | STFDX = 1913, |
1929 | | STFDXTLS = 1914, |
1930 | | STFDXTLS_ = 1915, |
1931 | | STFIWX = 1916, |
1932 | | STFS = 1917, |
1933 | | STFSU = 1918, |
1934 | | STFSUX = 1919, |
1935 | | STFSX = 1920, |
1936 | | STFSXTLS = 1921, |
1937 | | STFSXTLS_ = 1922, |
1938 | | STH = 1923, |
1939 | | STH8 = 1924, |
1940 | | STHBRX = 1925, |
1941 | | STHCIX = 1926, |
1942 | | STHCX = 1927, |
1943 | | STHEPX = 1928, |
1944 | | STHU = 1929, |
1945 | | STHU8 = 1930, |
1946 | | STHUX = 1931, |
1947 | | STHUX8 = 1932, |
1948 | | STHX = 1933, |
1949 | | STHX8 = 1934, |
1950 | | STHXTLS = 1935, |
1951 | | STHXTLS_ = 1936, |
1952 | | STHXTLS_32 = 1937, |
1953 | | STMW = 1938, |
1954 | | STOP = 1939, |
1955 | | STQ = 1940, |
1956 | | STQCX = 1941, |
1957 | | STQX_PSEUDO = 1942, |
1958 | | STSWI = 1943, |
1959 | | STVEBX = 1944, |
1960 | | STVEHX = 1945, |
1961 | | STVEWX = 1946, |
1962 | | STVX = 1947, |
1963 | | STVXL = 1948, |
1964 | | STW = 1949, |
1965 | | STW8 = 1950, |
1966 | | STWAT = 1951, |
1967 | | STWBRX = 1952, |
1968 | | STWCIX = 1953, |
1969 | | STWCX = 1954, |
1970 | | STWEPX = 1955, |
1971 | | STWU = 1956, |
1972 | | STWU8 = 1957, |
1973 | | STWUX = 1958, |
1974 | | STWUX8 = 1959, |
1975 | | STWX = 1960, |
1976 | | STWX8 = 1961, |
1977 | | STWXTLS = 1962, |
1978 | | STWXTLS_ = 1963, |
1979 | | STWXTLS_32 = 1964, |
1980 | | STXSD = 1965, |
1981 | | STXSDX = 1966, |
1982 | | STXSIBX = 1967, |
1983 | | STXSIBXv = 1968, |
1984 | | STXSIHX = 1969, |
1985 | | STXSIHXv = 1970, |
1986 | | STXSIWX = 1971, |
1987 | | STXSSP = 1972, |
1988 | | STXSSPX = 1973, |
1989 | | STXV = 1974, |
1990 | | STXVB16X = 1975, |
1991 | | STXVD2X = 1976, |
1992 | | STXVH8X = 1977, |
1993 | | STXVL = 1978, |
1994 | | STXVLL = 1979, |
1995 | | STXVP = 1980, |
1996 | | STXVPRL = 1981, |
1997 | | STXVPRLL = 1982, |
1998 | | STXVPX = 1983, |
1999 | | STXVRBX = 1984, |
2000 | | STXVRDX = 1985, |
2001 | | STXVRHX = 1986, |
2002 | | STXVRL = 1987, |
2003 | | STXVRLL = 1988, |
2004 | | STXVRWX = 1989, |
2005 | | STXVW4X = 1990, |
2006 | | STXVX = 1991, |
2007 | | SUBF = 1992, |
2008 | | SUBF8 = 1993, |
2009 | | SUBF8O = 1994, |
2010 | | SUBF8O_rec = 1995, |
2011 | | SUBF8_rec = 1996, |
2012 | | SUBFC = 1997, |
2013 | | SUBFC8 = 1998, |
2014 | | SUBFC8O = 1999, |
2015 | | SUBFC8O_rec = 2000, |
2016 | | SUBFC8_rec = 2001, |
2017 | | SUBFCO = 2002, |
2018 | | SUBFCO_rec = 2003, |
2019 | | SUBFC_rec = 2004, |
2020 | | SUBFE = 2005, |
2021 | | SUBFE8 = 2006, |
2022 | | SUBFE8O = 2007, |
2023 | | SUBFE8O_rec = 2008, |
2024 | | SUBFE8_rec = 2009, |
2025 | | SUBFEO = 2010, |
2026 | | SUBFEO_rec = 2011, |
2027 | | SUBFE_rec = 2012, |
2028 | | SUBFIC = 2013, |
2029 | | SUBFIC8 = 2014, |
2030 | | SUBFME = 2015, |
2031 | | SUBFME8 = 2016, |
2032 | | SUBFME8O = 2017, |
2033 | | SUBFME8O_rec = 2018, |
2034 | | SUBFME8_rec = 2019, |
2035 | | SUBFMEO = 2020, |
2036 | | SUBFMEO_rec = 2021, |
2037 | | SUBFME_rec = 2022, |
2038 | | SUBFO = 2023, |
2039 | | SUBFO_rec = 2024, |
2040 | | SUBFUS = 2025, |
2041 | | SUBFUS_rec = 2026, |
2042 | | SUBFZE = 2027, |
2043 | | SUBFZE8 = 2028, |
2044 | | SUBFZE8O = 2029, |
2045 | | SUBFZE8O_rec = 2030, |
2046 | | SUBFZE8_rec = 2031, |
2047 | | SUBFZEO = 2032, |
2048 | | SUBFZEO_rec = 2033, |
2049 | | SUBFZE_rec = 2034, |
2050 | | SUBF_rec = 2035, |
2051 | | SYNC = 2036, |
2052 | | SYNCP10 = 2037, |
2053 | | TABORT = 2038, |
2054 | | TABORTDC = 2039, |
2055 | | TABORTDCI = 2040, |
2056 | | TABORTWC = 2041, |
2057 | | TABORTWCI = 2042, |
2058 | | TAILB = 2043, |
2059 | | TAILB8 = 2044, |
2060 | | TAILBA = 2045, |
2061 | | TAILBA8 = 2046, |
2062 | | TAILBCTR = 2047, |
2063 | | TAILBCTR8 = 2048, |
2064 | | TBEGIN = 2049, |
2065 | | TBEGIN_RET = 2050, |
2066 | | TCHECK = 2051, |
2067 | | TCHECK_RET = 2052, |
2068 | | TCRETURNai = 2053, |
2069 | | TCRETURNai8 = 2054, |
2070 | | TCRETURNdi = 2055, |
2071 | | TCRETURNdi8 = 2056, |
2072 | | TCRETURNri = 2057, |
2073 | | TCRETURNri8 = 2058, |
2074 | | TD = 2059, |
2075 | | TDI = 2060, |
2076 | | TEND = 2061, |
2077 | | TLBIA = 2062, |
2078 | | TLBIE = 2063, |
2079 | | TLBIEL = 2064, |
2080 | | TLBILX = 2065, |
2081 | | TLBIVAX = 2066, |
2082 | | TLBLD = 2067, |
2083 | | TLBLI = 2068, |
2084 | | TLBRE = 2069, |
2085 | | TLBRE2 = 2070, |
2086 | | TLBSX = 2071, |
2087 | | TLBSX2 = 2072, |
2088 | | TLBSX2D = 2073, |
2089 | | TLBSYNC = 2074, |
2090 | | TLBWE = 2075, |
2091 | | TLBWE2 = 2076, |
2092 | | TLSGDAIX = 2077, |
2093 | | TLSGDAIX8 = 2078, |
2094 | | TRAP = 2079, |
2095 | | TRECHKPT = 2080, |
2096 | | TRECLAIM = 2081, |
2097 | | TSR = 2082, |
2098 | | TW = 2083, |
2099 | | TWI = 2084, |
2100 | | UNENCODED_NOP = 2085, |
2101 | | UpdateGBR = 2086, |
2102 | | VABSDUB = 2087, |
2103 | | VABSDUH = 2088, |
2104 | | VABSDUW = 2089, |
2105 | | VADDCUQ = 2090, |
2106 | | VADDCUW = 2091, |
2107 | | VADDECUQ = 2092, |
2108 | | VADDEUQM = 2093, |
2109 | | VADDFP = 2094, |
2110 | | VADDSBS = 2095, |
2111 | | VADDSHS = 2096, |
2112 | | VADDSWS = 2097, |
2113 | | VADDUBM = 2098, |
2114 | | VADDUBS = 2099, |
2115 | | VADDUDM = 2100, |
2116 | | VADDUHM = 2101, |
2117 | | VADDUHS = 2102, |
2118 | | VADDUQM = 2103, |
2119 | | VADDUWM = 2104, |
2120 | | VADDUWS = 2105, |
2121 | | VAND = 2106, |
2122 | | VANDC = 2107, |
2123 | | VAVGSB = 2108, |
2124 | | VAVGSH = 2109, |
2125 | | VAVGSW = 2110, |
2126 | | VAVGUB = 2111, |
2127 | | VAVGUH = 2112, |
2128 | | VAVGUW = 2113, |
2129 | | VBPERMD = 2114, |
2130 | | VBPERMQ = 2115, |
2131 | | VCFSX = 2116, |
2132 | | VCFSX_0 = 2117, |
2133 | | VCFUGED = 2118, |
2134 | | VCFUX = 2119, |
2135 | | VCFUX_0 = 2120, |
2136 | | VCIPHER = 2121, |
2137 | | VCIPHERLAST = 2122, |
2138 | | VCLRLB = 2123, |
2139 | | VCLRRB = 2124, |
2140 | | VCLZB = 2125, |
2141 | | VCLZD = 2126, |
2142 | | VCLZDM = 2127, |
2143 | | VCLZH = 2128, |
2144 | | VCLZLSBB = 2129, |
2145 | | VCLZW = 2130, |
2146 | | VCMPBFP = 2131, |
2147 | | VCMPBFP_rec = 2132, |
2148 | | VCMPEQFP = 2133, |
2149 | | VCMPEQFP_rec = 2134, |
2150 | | VCMPEQUB = 2135, |
2151 | | VCMPEQUB_rec = 2136, |
2152 | | VCMPEQUD = 2137, |
2153 | | VCMPEQUD_rec = 2138, |
2154 | | VCMPEQUH = 2139, |
2155 | | VCMPEQUH_rec = 2140, |
2156 | | VCMPEQUQ = 2141, |
2157 | | VCMPEQUQ_rec = 2142, |
2158 | | VCMPEQUW = 2143, |
2159 | | VCMPEQUW_rec = 2144, |
2160 | | VCMPGEFP = 2145, |
2161 | | VCMPGEFP_rec = 2146, |
2162 | | VCMPGTFP = 2147, |
2163 | | VCMPGTFP_rec = 2148, |
2164 | | VCMPGTSB = 2149, |
2165 | | VCMPGTSB_rec = 2150, |
2166 | | VCMPGTSD = 2151, |
2167 | | VCMPGTSD_rec = 2152, |
2168 | | VCMPGTSH = 2153, |
2169 | | VCMPGTSH_rec = 2154, |
2170 | | VCMPGTSQ = 2155, |
2171 | | VCMPGTSQ_rec = 2156, |
2172 | | VCMPGTSW = 2157, |
2173 | | VCMPGTSW_rec = 2158, |
2174 | | VCMPGTUB = 2159, |
2175 | | VCMPGTUB_rec = 2160, |
2176 | | VCMPGTUD = 2161, |
2177 | | VCMPGTUD_rec = 2162, |
2178 | | VCMPGTUH = 2163, |
2179 | | VCMPGTUH_rec = 2164, |
2180 | | VCMPGTUQ = 2165, |
2181 | | VCMPGTUQ_rec = 2166, |
2182 | | VCMPGTUW = 2167, |
2183 | | VCMPGTUW_rec = 2168, |
2184 | | VCMPNEB = 2169, |
2185 | | VCMPNEB_rec = 2170, |
2186 | | VCMPNEH = 2171, |
2187 | | VCMPNEH_rec = 2172, |
2188 | | VCMPNEW = 2173, |
2189 | | VCMPNEW_rec = 2174, |
2190 | | VCMPNEZB = 2175, |
2191 | | VCMPNEZB_rec = 2176, |
2192 | | VCMPNEZH = 2177, |
2193 | | VCMPNEZH_rec = 2178, |
2194 | | VCMPNEZW = 2179, |
2195 | | VCMPNEZW_rec = 2180, |
2196 | | VCMPSQ = 2181, |
2197 | | VCMPUQ = 2182, |
2198 | | VCNTMBB = 2183, |
2199 | | VCNTMBD = 2184, |
2200 | | VCNTMBH = 2185, |
2201 | | VCNTMBW = 2186, |
2202 | | VCTSXS = 2187, |
2203 | | VCTSXS_0 = 2188, |
2204 | | VCTUXS = 2189, |
2205 | | VCTUXS_0 = 2190, |
2206 | | VCTZB = 2191, |
2207 | | VCTZD = 2192, |
2208 | | VCTZDM = 2193, |
2209 | | VCTZH = 2194, |
2210 | | VCTZLSBB = 2195, |
2211 | | VCTZW = 2196, |
2212 | | VDIVESD = 2197, |
2213 | | VDIVESQ = 2198, |
2214 | | VDIVESW = 2199, |
2215 | | VDIVEUD = 2200, |
2216 | | VDIVEUQ = 2201, |
2217 | | VDIVEUW = 2202, |
2218 | | VDIVSD = 2203, |
2219 | | VDIVSQ = 2204, |
2220 | | VDIVSW = 2205, |
2221 | | VDIVUD = 2206, |
2222 | | VDIVUQ = 2207, |
2223 | | VDIVUW = 2208, |
2224 | | VEQV = 2209, |
2225 | | VEXPANDBM = 2210, |
2226 | | VEXPANDDM = 2211, |
2227 | | VEXPANDHM = 2212, |
2228 | | VEXPANDQM = 2213, |
2229 | | VEXPANDWM = 2214, |
2230 | | VEXPTEFP = 2215, |
2231 | | VEXTDDVLX = 2216, |
2232 | | VEXTDDVRX = 2217, |
2233 | | VEXTDUBVLX = 2218, |
2234 | | VEXTDUBVRX = 2219, |
2235 | | VEXTDUHVLX = 2220, |
2236 | | VEXTDUHVRX = 2221, |
2237 | | VEXTDUWVLX = 2222, |
2238 | | VEXTDUWVRX = 2223, |
2239 | | VEXTRACTBM = 2224, |
2240 | | VEXTRACTD = 2225, |
2241 | | VEXTRACTDM = 2226, |
2242 | | VEXTRACTHM = 2227, |
2243 | | VEXTRACTQM = 2228, |
2244 | | VEXTRACTUB = 2229, |
2245 | | VEXTRACTUH = 2230, |
2246 | | VEXTRACTUW = 2231, |
2247 | | VEXTRACTWM = 2232, |
2248 | | VEXTSB2D = 2233, |
2249 | | VEXTSB2Ds = 2234, |
2250 | | VEXTSB2W = 2235, |
2251 | | VEXTSB2Ws = 2236, |
2252 | | VEXTSD2Q = 2237, |
2253 | | VEXTSH2D = 2238, |
2254 | | VEXTSH2Ds = 2239, |
2255 | | VEXTSH2W = 2240, |
2256 | | VEXTSH2Ws = 2241, |
2257 | | VEXTSW2D = 2242, |
2258 | | VEXTSW2Ds = 2243, |
2259 | | VEXTUBLX = 2244, |
2260 | | VEXTUBRX = 2245, |
2261 | | VEXTUHLX = 2246, |
2262 | | VEXTUHRX = 2247, |
2263 | | VEXTUWLX = 2248, |
2264 | | VEXTUWRX = 2249, |
2265 | | VGBBD = 2250, |
2266 | | VGNB = 2251, |
2267 | | VINSBLX = 2252, |
2268 | | VINSBRX = 2253, |
2269 | | VINSBVLX = 2254, |
2270 | | VINSBVRX = 2255, |
2271 | | VINSD = 2256, |
2272 | | VINSDLX = 2257, |
2273 | | VINSDRX = 2258, |
2274 | | VINSERTB = 2259, |
2275 | | VINSERTD = 2260, |
2276 | | VINSERTH = 2261, |
2277 | | VINSERTW = 2262, |
2278 | | VINSHLX = 2263, |
2279 | | VINSHRX = 2264, |
2280 | | VINSHVLX = 2265, |
2281 | | VINSHVRX = 2266, |
2282 | | VINSW = 2267, |
2283 | | VINSWLX = 2268, |
2284 | | VINSWRX = 2269, |
2285 | | VINSWVLX = 2270, |
2286 | | VINSWVRX = 2271, |
2287 | | VLOGEFP = 2272, |
2288 | | VMADDFP = 2273, |
2289 | | VMAXFP = 2274, |
2290 | | VMAXSB = 2275, |
2291 | | VMAXSD = 2276, |
2292 | | VMAXSH = 2277, |
2293 | | VMAXSW = 2278, |
2294 | | VMAXUB = 2279, |
2295 | | VMAXUD = 2280, |
2296 | | VMAXUH = 2281, |
2297 | | VMAXUW = 2282, |
2298 | | VMHADDSHS = 2283, |
2299 | | VMHRADDSHS = 2284, |
2300 | | VMINFP = 2285, |
2301 | | VMINSB = 2286, |
2302 | | VMINSD = 2287, |
2303 | | VMINSH = 2288, |
2304 | | VMINSW = 2289, |
2305 | | VMINUB = 2290, |
2306 | | VMINUD = 2291, |
2307 | | VMINUH = 2292, |
2308 | | VMINUW = 2293, |
2309 | | VMLADDUHM = 2294, |
2310 | | VMODSD = 2295, |
2311 | | VMODSQ = 2296, |
2312 | | VMODSW = 2297, |
2313 | | VMODUD = 2298, |
2314 | | VMODUQ = 2299, |
2315 | | VMODUW = 2300, |
2316 | | VMRGEW = 2301, |
2317 | | VMRGHB = 2302, |
2318 | | VMRGHH = 2303, |
2319 | | VMRGHW = 2304, |
2320 | | VMRGLB = 2305, |
2321 | | VMRGLH = 2306, |
2322 | | VMRGLW = 2307, |
2323 | | VMRGOW = 2308, |
2324 | | VMSUMCUD = 2309, |
2325 | | VMSUMMBM = 2310, |
2326 | | VMSUMSHM = 2311, |
2327 | | VMSUMSHS = 2312, |
2328 | | VMSUMUBM = 2313, |
2329 | | VMSUMUDM = 2314, |
2330 | | VMSUMUHM = 2315, |
2331 | | VMSUMUHS = 2316, |
2332 | | VMUL10CUQ = 2317, |
2333 | | VMUL10ECUQ = 2318, |
2334 | | VMUL10EUQ = 2319, |
2335 | | VMUL10UQ = 2320, |
2336 | | VMULESB = 2321, |
2337 | | VMULESD = 2322, |
2338 | | VMULESH = 2323, |
2339 | | VMULESW = 2324, |
2340 | | VMULEUB = 2325, |
2341 | | VMULEUD = 2326, |
2342 | | VMULEUH = 2327, |
2343 | | VMULEUW = 2328, |
2344 | | VMULHSD = 2329, |
2345 | | VMULHSW = 2330, |
2346 | | VMULHUD = 2331, |
2347 | | VMULHUW = 2332, |
2348 | | VMULLD = 2333, |
2349 | | VMULOSB = 2334, |
2350 | | VMULOSD = 2335, |
2351 | | VMULOSH = 2336, |
2352 | | VMULOSW = 2337, |
2353 | | VMULOUB = 2338, |
2354 | | VMULOUD = 2339, |
2355 | | VMULOUH = 2340, |
2356 | | VMULOUW = 2341, |
2357 | | VMULUWM = 2342, |
2358 | | VNAND = 2343, |
2359 | | VNCIPHER = 2344, |
2360 | | VNCIPHERLAST = 2345, |
2361 | | VNEGD = 2346, |
2362 | | VNEGW = 2347, |
2363 | | VNMSUBFP = 2348, |
2364 | | VNOR = 2349, |
2365 | | VOR = 2350, |
2366 | | VORC = 2351, |
2367 | | VPDEPD = 2352, |
2368 | | VPERM = 2353, |
2369 | | VPERMR = 2354, |
2370 | | VPERMXOR = 2355, |
2371 | | VPEXTD = 2356, |
2372 | | VPKPX = 2357, |
2373 | | VPKSDSS = 2358, |
2374 | | VPKSDUS = 2359, |
2375 | | VPKSHSS = 2360, |
2376 | | VPKSHUS = 2361, |
2377 | | VPKSWSS = 2362, |
2378 | | VPKSWUS = 2363, |
2379 | | VPKUDUM = 2364, |
2380 | | VPKUDUS = 2365, |
2381 | | VPKUHUM = 2366, |
2382 | | VPKUHUS = 2367, |
2383 | | VPKUWUM = 2368, |
2384 | | VPKUWUS = 2369, |
2385 | | VPMSUMB = 2370, |
2386 | | VPMSUMD = 2371, |
2387 | | VPMSUMH = 2372, |
2388 | | VPMSUMW = 2373, |
2389 | | VPOPCNTB = 2374, |
2390 | | VPOPCNTD = 2375, |
2391 | | VPOPCNTH = 2376, |
2392 | | VPOPCNTW = 2377, |
2393 | | VPRTYBD = 2378, |
2394 | | VPRTYBQ = 2379, |
2395 | | VPRTYBW = 2380, |
2396 | | VREFP = 2381, |
2397 | | VRFIM = 2382, |
2398 | | VRFIN = 2383, |
2399 | | VRFIP = 2384, |
2400 | | VRFIZ = 2385, |
2401 | | VRLB = 2386, |
2402 | | VRLD = 2387, |
2403 | | VRLDMI = 2388, |
2404 | | VRLDNM = 2389, |
2405 | | VRLH = 2390, |
2406 | | VRLQ = 2391, |
2407 | | VRLQMI = 2392, |
2408 | | VRLQNM = 2393, |
2409 | | VRLW = 2394, |
2410 | | VRLWMI = 2395, |
2411 | | VRLWNM = 2396, |
2412 | | VRSQRTEFP = 2397, |
2413 | | VSBOX = 2398, |
2414 | | VSEL = 2399, |
2415 | | VSHASIGMAD = 2400, |
2416 | | VSHASIGMAW = 2401, |
2417 | | VSL = 2402, |
2418 | | VSLB = 2403, |
2419 | | VSLD = 2404, |
2420 | | VSLDBI = 2405, |
2421 | | VSLDOI = 2406, |
2422 | | VSLH = 2407, |
2423 | | VSLO = 2408, |
2424 | | VSLQ = 2409, |
2425 | | VSLV = 2410, |
2426 | | VSLW = 2411, |
2427 | | VSPLTB = 2412, |
2428 | | VSPLTBs = 2413, |
2429 | | VSPLTH = 2414, |
2430 | | VSPLTHs = 2415, |
2431 | | VSPLTISB = 2416, |
2432 | | VSPLTISH = 2417, |
2433 | | VSPLTISW = 2418, |
2434 | | VSPLTW = 2419, |
2435 | | VSR = 2420, |
2436 | | VSRAB = 2421, |
2437 | | VSRAD = 2422, |
2438 | | VSRAH = 2423, |
2439 | | VSRAQ = 2424, |
2440 | | VSRAW = 2425, |
2441 | | VSRB = 2426, |
2442 | | VSRD = 2427, |
2443 | | VSRDBI = 2428, |
2444 | | VSRH = 2429, |
2445 | | VSRO = 2430, |
2446 | | VSRQ = 2431, |
2447 | | VSRV = 2432, |
2448 | | VSRW = 2433, |
2449 | | VSTRIBL = 2434, |
2450 | | VSTRIBL_rec = 2435, |
2451 | | VSTRIBR = 2436, |
2452 | | VSTRIBR_rec = 2437, |
2453 | | VSTRIHL = 2438, |
2454 | | VSTRIHL_rec = 2439, |
2455 | | VSTRIHR = 2440, |
2456 | | VSTRIHR_rec = 2441, |
2457 | | VSUBCUQ = 2442, |
2458 | | VSUBCUW = 2443, |
2459 | | VSUBECUQ = 2444, |
2460 | | VSUBEUQM = 2445, |
2461 | | VSUBFP = 2446, |
2462 | | VSUBSBS = 2447, |
2463 | | VSUBSHS = 2448, |
2464 | | VSUBSWS = 2449, |
2465 | | VSUBUBM = 2450, |
2466 | | VSUBUBS = 2451, |
2467 | | VSUBUDM = 2452, |
2468 | | VSUBUHM = 2453, |
2469 | | VSUBUHS = 2454, |
2470 | | VSUBUQM = 2455, |
2471 | | VSUBUWM = 2456, |
2472 | | VSUBUWS = 2457, |
2473 | | VSUM2SWS = 2458, |
2474 | | VSUM4SBS = 2459, |
2475 | | VSUM4SHS = 2460, |
2476 | | VSUM4UBS = 2461, |
2477 | | VSUMSWS = 2462, |
2478 | | VUPKHPX = 2463, |
2479 | | VUPKHSB = 2464, |
2480 | | VUPKHSH = 2465, |
2481 | | VUPKHSW = 2466, |
2482 | | VUPKLPX = 2467, |
2483 | | VUPKLSB = 2468, |
2484 | | VUPKLSH = 2469, |
2485 | | VUPKLSW = 2470, |
2486 | | VXOR = 2471, |
2487 | | V_SET0 = 2472, |
2488 | | V_SET0B = 2473, |
2489 | | V_SET0H = 2474, |
2490 | | V_SETALLONES = 2475, |
2491 | | V_SETALLONESB = 2476, |
2492 | | V_SETALLONESH = 2477, |
2493 | | WAIT = 2478, |
2494 | | WAITP10 = 2479, |
2495 | | WRTEE = 2480, |
2496 | | WRTEEI = 2481, |
2497 | | XOR = 2482, |
2498 | | XOR8 = 2483, |
2499 | | XOR8_rec = 2484, |
2500 | | XORI = 2485, |
2501 | | XORI8 = 2486, |
2502 | | XORIS = 2487, |
2503 | | XORIS8 = 2488, |
2504 | | XOR_rec = 2489, |
2505 | | XSABSDP = 2490, |
2506 | | XSABSQP = 2491, |
2507 | | XSADDDP = 2492, |
2508 | | XSADDQP = 2493, |
2509 | | XSADDQPO = 2494, |
2510 | | XSADDSP = 2495, |
2511 | | XSCMPEQDP = 2496, |
2512 | | XSCMPEQQP = 2497, |
2513 | | XSCMPEXPDP = 2498, |
2514 | | XSCMPEXPQP = 2499, |
2515 | | XSCMPGEDP = 2500, |
2516 | | XSCMPGEQP = 2501, |
2517 | | XSCMPGTDP = 2502, |
2518 | | XSCMPGTQP = 2503, |
2519 | | XSCMPODP = 2504, |
2520 | | XSCMPOQP = 2505, |
2521 | | XSCMPUDP = 2506, |
2522 | | XSCMPUQP = 2507, |
2523 | | XSCPSGNDP = 2508, |
2524 | | XSCPSGNQP = 2509, |
2525 | | XSCVDPHP = 2510, |
2526 | | XSCVDPQP = 2511, |
2527 | | XSCVDPSP = 2512, |
2528 | | XSCVDPSPN = 2513, |
2529 | | XSCVDPSXDS = 2514, |
2530 | | XSCVDPSXDSs = 2515, |
2531 | | XSCVDPSXWS = 2516, |
2532 | | XSCVDPSXWSs = 2517, |
2533 | | XSCVDPUXDS = 2518, |
2534 | | XSCVDPUXDSs = 2519, |
2535 | | XSCVDPUXWS = 2520, |
2536 | | XSCVDPUXWSs = 2521, |
2537 | | XSCVHPDP = 2522, |
2538 | | XSCVQPDP = 2523, |
2539 | | XSCVQPDPO = 2524, |
2540 | | XSCVQPSDZ = 2525, |
2541 | | XSCVQPSQZ = 2526, |
2542 | | XSCVQPSWZ = 2527, |
2543 | | XSCVQPUDZ = 2528, |
2544 | | XSCVQPUQZ = 2529, |
2545 | | XSCVQPUWZ = 2530, |
2546 | | XSCVSDQP = 2531, |
2547 | | XSCVSPDP = 2532, |
2548 | | XSCVSPDPN = 2533, |
2549 | | XSCVSQQP = 2534, |
2550 | | XSCVSXDDP = 2535, |
2551 | | XSCVSXDSP = 2536, |
2552 | | XSCVUDQP = 2537, |
2553 | | XSCVUQQP = 2538, |
2554 | | XSCVUXDDP = 2539, |
2555 | | XSCVUXDSP = 2540, |
2556 | | XSDIVDP = 2541, |
2557 | | XSDIVQP = 2542, |
2558 | | XSDIVQPO = 2543, |
2559 | | XSDIVSP = 2544, |
2560 | | XSIEXPDP = 2545, |
2561 | | XSIEXPQP = 2546, |
2562 | | XSMADDADP = 2547, |
2563 | | XSMADDASP = 2548, |
2564 | | XSMADDMDP = 2549, |
2565 | | XSMADDMSP = 2550, |
2566 | | XSMADDQP = 2551, |
2567 | | XSMADDQPO = 2552, |
2568 | | XSMAXCDP = 2553, |
2569 | | XSMAXCQP = 2554, |
2570 | | XSMAXDP = 2555, |
2571 | | XSMAXJDP = 2556, |
2572 | | XSMINCDP = 2557, |
2573 | | XSMINCQP = 2558, |
2574 | | XSMINDP = 2559, |
2575 | | XSMINJDP = 2560, |
2576 | | XSMSUBADP = 2561, |
2577 | | XSMSUBASP = 2562, |
2578 | | XSMSUBMDP = 2563, |
2579 | | XSMSUBMSP = 2564, |
2580 | | XSMSUBQP = 2565, |
2581 | | XSMSUBQPO = 2566, |
2582 | | XSMULDP = 2567, |
2583 | | XSMULQP = 2568, |
2584 | | XSMULQPO = 2569, |
2585 | | XSMULSP = 2570, |
2586 | | XSNABSDP = 2571, |
2587 | | XSNABSDPs = 2572, |
2588 | | XSNABSQP = 2573, |
2589 | | XSNEGDP = 2574, |
2590 | | XSNEGQP = 2575, |
2591 | | XSNMADDADP = 2576, |
2592 | | XSNMADDASP = 2577, |
2593 | | XSNMADDMDP = 2578, |
2594 | | XSNMADDMSP = 2579, |
2595 | | XSNMADDQP = 2580, |
2596 | | XSNMADDQPO = 2581, |
2597 | | XSNMSUBADP = 2582, |
2598 | | XSNMSUBASP = 2583, |
2599 | | XSNMSUBMDP = 2584, |
2600 | | XSNMSUBMSP = 2585, |
2601 | | XSNMSUBQP = 2586, |
2602 | | XSNMSUBQPO = 2587, |
2603 | | XSRDPI = 2588, |
2604 | | XSRDPIC = 2589, |
2605 | | XSRDPIM = 2590, |
2606 | | XSRDPIP = 2591, |
2607 | | XSRDPIZ = 2592, |
2608 | | XSREDP = 2593, |
2609 | | XSRESP = 2594, |
2610 | | XSRQPI = 2595, |
2611 | | XSRQPIX = 2596, |
2612 | | XSRQPXP = 2597, |
2613 | | XSRSP = 2598, |
2614 | | XSRSQRTEDP = 2599, |
2615 | | XSRSQRTESP = 2600, |
2616 | | XSSQRTDP = 2601, |
2617 | | XSSQRTQP = 2602, |
2618 | | XSSQRTQPO = 2603, |
2619 | | XSSQRTSP = 2604, |
2620 | | XSSUBDP = 2605, |
2621 | | XSSUBQP = 2606, |
2622 | | XSSUBQPO = 2607, |
2623 | | XSSUBSP = 2608, |
2624 | | XSTDIVDP = 2609, |
2625 | | XSTSQRTDP = 2610, |
2626 | | XSTSTDCDP = 2611, |
2627 | | XSTSTDCQP = 2612, |
2628 | | XSTSTDCSP = 2613, |
2629 | | XSXEXPDP = 2614, |
2630 | | XSXEXPQP = 2615, |
2631 | | XSXSIGDP = 2616, |
2632 | | XSXSIGQP = 2617, |
2633 | | XVABSDP = 2618, |
2634 | | XVABSSP = 2619, |
2635 | | XVADDDP = 2620, |
2636 | | XVADDSP = 2621, |
2637 | | XVBF16GER2 = 2622, |
2638 | | XVBF16GER2NN = 2623, |
2639 | | XVBF16GER2NP = 2624, |
2640 | | XVBF16GER2PN = 2625, |
2641 | | XVBF16GER2PP = 2626, |
2642 | | XVBF16GER2W = 2627, |
2643 | | XVBF16GER2WNN = 2628, |
2644 | | XVBF16GER2WNP = 2629, |
2645 | | XVBF16GER2WPN = 2630, |
2646 | | XVBF16GER2WPP = 2631, |
2647 | | XVCMPEQDP = 2632, |
2648 | | XVCMPEQDP_rec = 2633, |
2649 | | XVCMPEQSP = 2634, |
2650 | | XVCMPEQSP_rec = 2635, |
2651 | | XVCMPGEDP = 2636, |
2652 | | XVCMPGEDP_rec = 2637, |
2653 | | XVCMPGESP = 2638, |
2654 | | XVCMPGESP_rec = 2639, |
2655 | | XVCMPGTDP = 2640, |
2656 | | XVCMPGTDP_rec = 2641, |
2657 | | XVCMPGTSP = 2642, |
2658 | | XVCMPGTSP_rec = 2643, |
2659 | | XVCPSGNDP = 2644, |
2660 | | XVCPSGNSP = 2645, |
2661 | | XVCVBF16SPN = 2646, |
2662 | | XVCVDPSP = 2647, |
2663 | | XVCVDPSXDS = 2648, |
2664 | | XVCVDPSXWS = 2649, |
2665 | | XVCVDPUXDS = 2650, |
2666 | | XVCVDPUXWS = 2651, |
2667 | | XVCVHPSP = 2652, |
2668 | | XVCVSPBF16 = 2653, |
2669 | | XVCVSPDP = 2654, |
2670 | | XVCVSPHP = 2655, |
2671 | | XVCVSPSXDS = 2656, |
2672 | | XVCVSPSXWS = 2657, |
2673 | | XVCVSPUXDS = 2658, |
2674 | | XVCVSPUXWS = 2659, |
2675 | | XVCVSXDDP = 2660, |
2676 | | XVCVSXDSP = 2661, |
2677 | | XVCVSXWDP = 2662, |
2678 | | XVCVSXWSP = 2663, |
2679 | | XVCVUXDDP = 2664, |
2680 | | XVCVUXDSP = 2665, |
2681 | | XVCVUXWDP = 2666, |
2682 | | XVCVUXWSP = 2667, |
2683 | | XVDIVDP = 2668, |
2684 | | XVDIVSP = 2669, |
2685 | | XVF16GER2 = 2670, |
2686 | | XVF16GER2NN = 2671, |
2687 | | XVF16GER2NP = 2672, |
2688 | | XVF16GER2PN = 2673, |
2689 | | XVF16GER2PP = 2674, |
2690 | | XVF16GER2W = 2675, |
2691 | | XVF16GER2WNN = 2676, |
2692 | | XVF16GER2WNP = 2677, |
2693 | | XVF16GER2WPN = 2678, |
2694 | | XVF16GER2WPP = 2679, |
2695 | | XVF32GER = 2680, |
2696 | | XVF32GERNN = 2681, |
2697 | | XVF32GERNP = 2682, |
2698 | | XVF32GERPN = 2683, |
2699 | | XVF32GERPP = 2684, |
2700 | | XVF32GERW = 2685, |
2701 | | XVF32GERWNN = 2686, |
2702 | | XVF32GERWNP = 2687, |
2703 | | XVF32GERWPN = 2688, |
2704 | | XVF32GERWPP = 2689, |
2705 | | XVF64GER = 2690, |
2706 | | XVF64GERNN = 2691, |
2707 | | XVF64GERNP = 2692, |
2708 | | XVF64GERPN = 2693, |
2709 | | XVF64GERPP = 2694, |
2710 | | XVF64GERW = 2695, |
2711 | | XVF64GERWNN = 2696, |
2712 | | XVF64GERWNP = 2697, |
2713 | | XVF64GERWPN = 2698, |
2714 | | XVF64GERWPP = 2699, |
2715 | | XVI16GER2 = 2700, |
2716 | | XVI16GER2PP = 2701, |
2717 | | XVI16GER2S = 2702, |
2718 | | XVI16GER2SPP = 2703, |
2719 | | XVI16GER2SW = 2704, |
2720 | | XVI16GER2SWPP = 2705, |
2721 | | XVI16GER2W = 2706, |
2722 | | XVI16GER2WPP = 2707, |
2723 | | XVI4GER8 = 2708, |
2724 | | XVI4GER8PP = 2709, |
2725 | | XVI4GER8W = 2710, |
2726 | | XVI4GER8WPP = 2711, |
2727 | | XVI8GER4 = 2712, |
2728 | | XVI8GER4PP = 2713, |
2729 | | XVI8GER4SPP = 2714, |
2730 | | XVI8GER4W = 2715, |
2731 | | XVI8GER4WPP = 2716, |
2732 | | XVI8GER4WSPP = 2717, |
2733 | | XVIEXPDP = 2718, |
2734 | | XVIEXPSP = 2719, |
2735 | | XVMADDADP = 2720, |
2736 | | XVMADDASP = 2721, |
2737 | | XVMADDMDP = 2722, |
2738 | | XVMADDMSP = 2723, |
2739 | | XVMAXDP = 2724, |
2740 | | XVMAXSP = 2725, |
2741 | | XVMINDP = 2726, |
2742 | | XVMINSP = 2727, |
2743 | | XVMSUBADP = 2728, |
2744 | | XVMSUBASP = 2729, |
2745 | | XVMSUBMDP = 2730, |
2746 | | XVMSUBMSP = 2731, |
2747 | | XVMULDP = 2732, |
2748 | | XVMULSP = 2733, |
2749 | | XVNABSDP = 2734, |
2750 | | XVNABSSP = 2735, |
2751 | | XVNEGDP = 2736, |
2752 | | XVNEGSP = 2737, |
2753 | | XVNMADDADP = 2738, |
2754 | | XVNMADDASP = 2739, |
2755 | | XVNMADDMDP = 2740, |
2756 | | XVNMADDMSP = 2741, |
2757 | | XVNMSUBADP = 2742, |
2758 | | XVNMSUBASP = 2743, |
2759 | | XVNMSUBMDP = 2744, |
2760 | | XVNMSUBMSP = 2745, |
2761 | | XVRDPI = 2746, |
2762 | | XVRDPIC = 2747, |
2763 | | XVRDPIM = 2748, |
2764 | | XVRDPIP = 2749, |
2765 | | XVRDPIZ = 2750, |
2766 | | XVREDP = 2751, |
2767 | | XVRESP = 2752, |
2768 | | XVRSPI = 2753, |
2769 | | XVRSPIC = 2754, |
2770 | | XVRSPIM = 2755, |
2771 | | XVRSPIP = 2756, |
2772 | | XVRSPIZ = 2757, |
2773 | | XVRSQRTEDP = 2758, |
2774 | | XVRSQRTESP = 2759, |
2775 | | XVSQRTDP = 2760, |
2776 | | XVSQRTSP = 2761, |
2777 | | XVSUBDP = 2762, |
2778 | | XVSUBSP = 2763, |
2779 | | XVTDIVDP = 2764, |
2780 | | XVTDIVSP = 2765, |
2781 | | XVTLSBB = 2766, |
2782 | | XVTSQRTDP = 2767, |
2783 | | XVTSQRTSP = 2768, |
2784 | | XVTSTDCDP = 2769, |
2785 | | XVTSTDCSP = 2770, |
2786 | | XVXEXPDP = 2771, |
2787 | | XVXEXPSP = 2772, |
2788 | | XVXSIGDP = 2773, |
2789 | | XVXSIGSP = 2774, |
2790 | | XXBLENDVB = 2775, |
2791 | | XXBLENDVD = 2776, |
2792 | | XXBLENDVH = 2777, |
2793 | | XXBLENDVW = 2778, |
2794 | | XXBRD = 2779, |
2795 | | XXBRH = 2780, |
2796 | | XXBRQ = 2781, |
2797 | | XXBRW = 2782, |
2798 | | XXEVAL = 2783, |
2799 | | XXEXTRACTUW = 2784, |
2800 | | XXGENPCVBM = 2785, |
2801 | | XXGENPCVDM = 2786, |
2802 | | XXGENPCVHM = 2787, |
2803 | | XXGENPCVWM = 2788, |
2804 | | XXINSERTW = 2789, |
2805 | | XXLAND = 2790, |
2806 | | XXLANDC = 2791, |
2807 | | XXLEQV = 2792, |
2808 | | XXLEQVOnes = 2793, |
2809 | | XXLNAND = 2794, |
2810 | | XXLNOR = 2795, |
2811 | | XXLOR = 2796, |
2812 | | XXLORC = 2797, |
2813 | | XXLORf = 2798, |
2814 | | XXLXOR = 2799, |
2815 | | XXLXORdpz = 2800, |
2816 | | XXLXORspz = 2801, |
2817 | | XXLXORz = 2802, |
2818 | | XXMFACC = 2803, |
2819 | | XXMFACCW = 2804, |
2820 | | XXMRGHW = 2805, |
2821 | | XXMRGLW = 2806, |
2822 | | XXMTACC = 2807, |
2823 | | XXMTACCW = 2808, |
2824 | | XXPERM = 2809, |
2825 | | XXPERMDI = 2810, |
2826 | | XXPERMDIs = 2811, |
2827 | | XXPERMR = 2812, |
2828 | | XXPERMX = 2813, |
2829 | | XXSEL = 2814, |
2830 | | XXSETACCZ = 2815, |
2831 | | XXSETACCZW = 2816, |
2832 | | XXSLDWI = 2817, |
2833 | | XXSLDWIs = 2818, |
2834 | | XXSPLTI32DX = 2819, |
2835 | | XXSPLTIB = 2820, |
2836 | | XXSPLTIDP = 2821, |
2837 | | XXSPLTIW = 2822, |
2838 | | XXSPLTW = 2823, |
2839 | | XXSPLTWs = 2824, |
2840 | | gBC = 2825, |
2841 | | gBCA = 2826, |
2842 | | gBCAat = 2827, |
2843 | | gBCCTR = 2828, |
2844 | | gBCCTRL = 2829, |
2845 | | gBCL = 2830, |
2846 | | gBCLA = 2831, |
2847 | | gBCLAat = 2832, |
2848 | | gBCLR = 2833, |
2849 | | gBCLRL = 2834, |
2850 | | gBCLat = 2835, |
2851 | | gBCat = 2836, |
2852 | | INSTRUCTION_LIST_END = 2837 |
2853 | | }; |
2854 | | |
2855 | | } // end namespace PPC |
2856 | | } // end namespace llvm |
2857 | | #endif // GET_INSTRINFO_ENUM |
2858 | | |
2859 | | #ifdef GET_INSTRINFO_SCHED_ENUM |
2860 | | #undef GET_INSTRINFO_SCHED_ENUM |
2861 | | namespace llvm { |
2862 | | |
2863 | | namespace PPC { |
2864 | | namespace Sched { |
2865 | | enum { |
2866 | | NoInstrModel = 0, |
2867 | | IIC_LdStSync = 1, |
2868 | | IIC_IntSimple = 2, |
2869 | | IIC_IntGeneral = 3, |
2870 | | IIC_BrB = 4, |
2871 | | IIC_VecFP = 5, |
2872 | | IIC_IntRotate = 6, |
2873 | | IIC_IntCompare = 7, |
2874 | | IIC_SprABORT = 8, |
2875 | | IIC_LdStCOPY = 9, |
2876 | | IIC_LdStPASTE = 10, |
2877 | | IIC_BrCR = 11, |
2878 | | IIC_FPGeneral = 12, |
2879 | | IIC_LdStLD = 13, |
2880 | | IIC_LdStDCBF = 14, |
2881 | | IIC_LdStLoad = 15, |
2882 | | IIC_FPCompare = 16, |
2883 | | IIC_IntDivD = 17, |
2884 | | IIC_IntDivW = 18, |
2885 | | IIC_FPDGeneral = 19, |
2886 | | IIC_FPAddSub = 20, |
2887 | | IIC_FPDivD = 21, |
2888 | | IIC_FPSGeneral = 22, |
2889 | | IIC_VecGeneral = 23, |
2890 | | IIC_VecComplex = 24, |
2891 | | IIC_LdStStore = 25, |
2892 | | IIC_IntRotateDI = 26, |
2893 | | IIC_FPDivS = 27, |
2894 | | IIC_FPFused = 28, |
2895 | | IIC_FPSqrtD = 29, |
2896 | | IIC_FPSqrtS = 30, |
2897 | | IIC_LdStICBI = 31, |
2898 | | IIC_IntISEL = 32, |
2899 | | IIC_SprISYNC = 33, |
2900 | | IIC_LdStLWARX = 34, |
2901 | | IIC_LdStLoadUpd = 35, |
2902 | | IIC_LdStLoadUpdX = 36, |
2903 | | IIC_LdStLDARX = 37, |
2904 | | IIC_LdStLDU = 38, |
2905 | | IIC_LdStLDUX = 39, |
2906 | | IIC_LdStLFD = 40, |
2907 | | IIC_LdStLFDU = 41, |
2908 | | IIC_LdStLFDUX = 42, |
2909 | | IIC_LdStLHA = 43, |
2910 | | IIC_LdStLHAU = 44, |
2911 | | IIC_LdStLHAUX = 45, |
2912 | | IIC_LdStLMW = 46, |
2913 | | IIC_LdStLQ = 47, |
2914 | | IIC_LdStLQARX = 48, |
2915 | | IIC_LdStLWA = 49, |
2916 | | IIC_IntMulHD = 50, |
2917 | | IIC_BrMCR = 51, |
2918 | | IIC_BrMCRX = 52, |
2919 | | IIC_SprMFCR = 53, |
2920 | | IIC_SprMFSPR = 54, |
2921 | | IIC_IntMFFS = 55, |
2922 | | IIC_SprMFMSR = 56, |
2923 | | IIC_SprMFCRF = 57, |
2924 | | IIC_SprMFPMR = 58, |
2925 | | IIC_SprMFSR = 59, |
2926 | | IIC_SprMFTB = 60, |
2927 | | IIC_SprMSGSYNC = 61, |
2928 | | IIC_SprMTSPR = 62, |
2929 | | IIC_IntMTFSB0 = 63, |
2930 | | IIC_SprMTMSR = 64, |
2931 | | IIC_SprMTMSRD = 65, |
2932 | | IIC_SprMTPMR = 66, |
2933 | | IIC_SprMTSR = 67, |
2934 | | IIC_IntMulHW = 68, |
2935 | | IIC_IntMulHWU = 69, |
2936 | | IIC_IntMulLI = 70, |
2937 | | IIC_SprRFI = 71, |
2938 | | IIC_IntRFID = 72, |
2939 | | IIC_IntRotateD = 73, |
2940 | | IIC_SprSLBFEE = 74, |
2941 | | IIC_SprSLBIA = 75, |
2942 | | IIC_SprSLBIE = 76, |
2943 | | IIC_SprSLBIEG = 77, |
2944 | | IIC_SprSLBMFEE = 78, |
2945 | | IIC_SprSLBMFEV = 79, |
2946 | | IIC_SprSLBMTE = 80, |
2947 | | IIC_SprSLBSYNC = 81, |
2948 | | IIC_IntShift = 82, |
2949 | | IIC_LdStSTWCX = 83, |
2950 | | IIC_LdStSTU = 84, |
2951 | | IIC_LdStSTUX = 85, |
2952 | | IIC_LdStSTD = 86, |
2953 | | IIC_LdStSTDCX = 87, |
2954 | | IIC_LdStSTFD = 88, |
2955 | | IIC_LdStSTFDU = 89, |
2956 | | IIC_SprSTOP = 90, |
2957 | | IIC_LdStSTQ = 91, |
2958 | | IIC_LdStSTQCX = 92, |
2959 | | IIC_IntTrapD = 93, |
2960 | | IIC_SprTLBIA = 94, |
2961 | | IIC_SprTLBIE = 95, |
2962 | | IIC_SprTLBIEL = 96, |
2963 | | IIC_SprTLBSYNC = 97, |
2964 | | IIC_IntTrapW = 98, |
2965 | | IIC_VecFPCompare = 99, |
2966 | | IIC_VecPerm = 100, |
2967 | | B_BA_BL_BL8_BL8_NOP_BL8_NOP_RM_BL8_NOP_TLS_BL8_NOTOC_BL8_NOTOC_RM_BL8_NOTOC_TLS_BL8_RM_BL8_TLS_BL8_TLS__BLA_BLA8_BLA8_NOP_BLA8_NOP_RM_BLA8_RM_BLA_RM_BL_NOP_BL_NOP_RM_BL_RM_BL_TLS = 101, |
2968 | | BDZLRLp_BDZLRm_BDZLRp_BDZLm_BDZLp_BDZm_BDZp_BDNZ_BDNZ8_BDNZA_BDNZAm_BDNZAp_BDNZL_BDNZLA_BDNZLAm_BDNZLAp_BDNZLR_BDNZLR8_BDNZLRL_BDNZLRLm_BDNZLRLp_BDNZLRm_BDNZLRp_BDNZLm_BDNZLp_BDNZm_BDNZp_BDZ_BDZ8_BDZA_BDZAm_BDZAp_BDZL_BDZLA_BDZLAm_BDZLAp_BDZLR_BDZLR8_BDZLRL_BDZLRLm_BLR_BLR8_BLRL_BCL_BCLR_BCLRL_BCLRLn_BCLRn_BCLalways_BCLn_BCTR_BCTR8_BCTRL_BCTRL8_BCTRL8_LDinto_toc_BCTRL8_LDinto_toc_RM_BCTRL8_RM_BCTRL_LWZinto_toc_BCTRL_LWZinto_toc_RM_BCTRL_RM_BCn_BC_BCC_BCCA_BCCCTR_BCCCTR8_BCCCTRL_BCCCTRL8_BCCL_BCCLA_BCCLR_BCCLRL_BCCTR_BCCTR8_BCCTR8n_BCCTRL_BCCTRL8_BCCTRL8n_BCCTRLn_BCCTRn_gBC_gBCA_gBCAat_gBCCTR_gBCCTRL_gBCL_gBCLA_gBCLAat_gBCLR_gBCLRL_gBCLat_gBCat = 102, |
2969 | | MFCTR_MFCTR8_MFLR_MFLR8 = 103, |
2970 | | MTLR_MTLR8_MTCTR_MTCTR8_MTCTR8loop_MTCTRloop = 104, |
2971 | | MFCR_MFCR8 = 105, |
2972 | | MCRF = 106, |
2973 | | CR6SET_CR6UNSET_CRSET_CRUNSET_CRAND_CRANDC_CREQV_CRNAND_CRNOR_CRNOT_CROR_CRORC = 107, |
2974 | | LMW = 108, |
2975 | | LWARX_LWARXL = 109, |
2976 | | LDARX_LDARXL = 110, |
2977 | | LHBRX_LHBRX8_LWBRX_LWBRX8 = 111, |
2978 | | MFSR_MFSRIN = 112, |
2979 | | LFS_LFSX_LFSXTLS_LFSXTLS__LFD_LFDX_LFDXTLS_LFDXTLS__LXSDX_LXVD2X_LXVW4X_LXVDSX = 113, |
2980 | | LFSU_LFDU = 114, |
2981 | | LFSUX_LFDUX = 115, |
2982 | | STXSDX_STXVD2X_STXVW4X = 116, |
2983 | | LBARX_LHARX = 117, |
2984 | | LBZCIX_LDBRX_LDCIX_LHZCIX_LSWI_LVEBX_LVEHX_LVEWX_LVSL_LVSR_LVX_LVXL_LWZCIX_STHCIX_STSWI_STWCIX = 118, |
2985 | | LFIWAX_LFIWZX = 119, |
2986 | | STFD_STFDX_STFIWX_STFS_STFSX = 120, |
2987 | | STFDU_STFDUX_STFSU_STFSUX = 121, |
2988 | | STVEBX_STVEHX_STVEWX_STVX_STVXL = 122, |
2989 | | LHA_LHA8_LHAX_LHAX8_LWAX_LWAX_32 = 123, |
2990 | | LWA_LWA_32 = 124, |
2991 | | LHAU_LHAU8 = 125, |
2992 | | LHAUX_LHAUX8_LWAUX = 126, |
2993 | | STB_STB8_STH_STH8_STW_STW8_STBX_STBX8_STHX_STHX8_STWX_STWX8_STHBRX_STWBRX = 127, |
2994 | | STD_STDX = 128, |
2995 | | STMW = 129, |
2996 | | STWCX = 130, |
2997 | | STDCX = 131, |
2998 | | STDU_STHU_STHU8_STBU_STBU8_STWU_STWU8 = 132, |
2999 | | STDUX_STWUX_STWUX8_STHUX_STHUX8_STBUX_STBUX8 = 133, |
3000 | | LWZU_LWZU8_LHZU_LHZU8_LBZU_LBZU8 = 134, |
3001 | | LDU = 135, |
3002 | | LWZUX_LWZUX8_LHZUX_LHZUX8_LBZUX_LBZUX8 = 136, |
3003 | | LDUX = 137, |
3004 | | ADDI_ADDI8_ADDIS_ADDIS8_LI_LI8_LIS_LIS8_ADD4_ADD4TLS_ADD4_rec_ADD8_ADD8TLS_ADD8TLS__ADD8_rec_ORI_ORI8_ORIS_ORIS8_XORI_XORI8_XORIS_XORIS8_XOR_XOR8_XOR8_rec_XOR_rec_NEG_NEG8_NEG8_rec_NEG_rec_NEG8O_NEGO_AND_AND8_AND_rec_AND8_rec_NAND_NAND8_NAND_rec_NAND8_rec_NOR_NOR8_NOR_rec_NOR8_rec_EQV_EQV8_EQV_rec_EQV8_rec_ANDC_ANDC8_ANDC_rec_ANDC8_rec_ORC_ORC8_ORC_rec_ORC8_rec = 138, |
3005 | | SUBF8_SUBF8_rec_ADDIC_ADDIC8_SUBFIC_SUBFIC8_SUBFZE_SUBFZE8_ADDE_ADDE8_ADDME_ADDME8_SUBFME_SUBFME8_ANDI_rec_ANDIS_rec = 139, |
3006 | | CMPD_CMPDI_CMPLD_CMPLDI_CMPLW_CMPLWI_CMPW_CMPWI = 140, |
3007 | | EXTSB8_32_64_EXTSB8_rec_EXTSH8_32_64_EXTSH8_rec_EXTSW_32_EXTSW_32_64_EXTSW_32_64_rec_ADD4O_ADD8O_ADD8O_rec_ADD4O_rec_NEG8O_rec_NEGO_rec_EXTSB_EXTSB8_EXTSB_rec_EXTSH_EXTSH8_EXTSH_rec_EXTSW_EXTSW_rec = 141, |
3008 | | POPCNTB_POPCNTB8_POPCNTD_POPCNTW_ANDI8_rec_ANDIS8_rec_ADDC_ADDC8_SUBFO_SUBF8O_SUBFC_SUBFC8_ADDIC_rec_ADDE8_rec_ADDE_rec_SUBFE8_rec_SUBFE_rec_ADDME8_rec_ADDME_rec_SUBFME8_rec_SUBFME_rec_ADDZE8_rec_ADDZE_rec_SUBFZE_rec_SUBFZE8_rec_SUBFO_rec_SUBF8O_rec_ADDE8O_ADDEO_SUBFE8O_SUBFEO_ADDME8O_ADDMEO_SUBFME8O_SUBFMEO_ADDZE8O_ADDZEO_SUBFZE8O_SUBFZEO_ADDE8O_rec_ADDEO_rec_ADDMEO_rec_ADDME8O_rec_SUBFMEO_rec_SUBFME8O_rec_ADDZEO_rec_ADDZE8O_rec_SUBFZEO_rec_SUBFZE8O_rec_ADDC8_rec_ADDC_rec_ADDCO_ADDCO_rec_ADDC8O_ADDC8O_rec_SUBFC8_rec_SUBFC_rec_SUBFCO_SUBFC8O_SUBFCO_rec_SUBFC8O_rec_RLWINM_RLWINM8_RLWINM_rec_RLWNM_RLWNM8_RLWNM_rec_RLWINM8_rec_RLWNM8_rec_SLW_SLW8_SLW_rec_SLW8_rec_SRW_SRW8_SRW_rec_SRW8_rec_SUBFE_SUBFE8_SUBFE8O_rec_SUBFEO_rec = 142, |
3009 | | ADDPCIS = 143, |
3010 | | SUBFUS_SUBFUS_rec = 144, |
3011 | | RLDICL_RLDICL_rec_RLDICR_RLDICR_rec_RLDIC_RLDIC_rec_RLDIMI_RLDIMI_rec_RLDICL_32_RLDICL_32_64_RLDICL_32_rec_RLDICR_32_SRADI_SRADI_rec_SRADI_32 = 145, |
3012 | | RLDCL_RLDCL_rec_RLDCR_RLDCR_rec_SLD_SLD_rec_SRD_SRD_rec_SRAD_SRAD_rec = 146, |
3013 | | SRAWI_SRAWI_rec_SRAW_SRAW_rec = 147, |
3014 | | CNTLZD_CNTLZDM_CNTLZD_rec_CNTLZW_CNTLZW8_CNTLZW8_rec_CNTLZW_rec_CNTTZD_CNTTZDM_CNTTZD_rec_CNTTZW_CNTTZW8_CNTTZW8_rec_CNTTZW_rec = 148, |
3015 | | MULLI_MULLI8 = 149, |
3016 | | MULLW_MULHW_MULHD_MULLWO_MULLW_rec_MULHD_rec_MULHW_rec_MULLWO_rec = 150, |
3017 | | MULHWU_MULHDU_MULHDU_rec_MULHWU_rec = 151, |
3018 | | MULLD_MULLDO_MULLD_rec_MULLDO_rec = 152, |
3019 | | DIVDE_DIVDEO_DIVDEO_rec_DIVDEU_DIVDEUO_DIVDEUO_rec_DIVDEU_rec_DIVDE_rec = 153, |
3020 | | DIVWE_DIVWEO_DIVWEO_rec_DIVWEU_DIVWEUO_DIVWEUO_rec_DIVWEU_rec_DIVWE_rec_DIVW_DIVWU_DIVWU_rec_DIVWO_DIVWO_rec_DIVWUO_DIVWUO_rec_DIVW_rec = 154, |
3021 | | DIVD_DIVDU_DIVDO_DIVDO_rec_DIVDUO_DIVDUO_rec_DIVDU_rec_DIVD_rec = 155, |
3022 | | FABSD_FABSD_rec_FABSS_FABSS_rec_FADDS_FADDS_rec_FMADDS_FMADDS_rec_FMR_FMR_rec_FMSUBS_FMSUBS_rec_FMULS_FMULS_rec_FNABSD_FNABSD_rec_FNABSS_FNABSS_rec_FNEGD_FNEGD_rec_FNEGS_FNEGS_rec_FNMADDS_FNMADDS_rec_FNMSUBS_FNMSUBS_rec_FSUBS_FSUBS_rec_FCFID_FCFIDS_FCFIDS_rec_FCFIDU_FCFIDUS_FCFIDUS_rec_FCFIDU_rec_FCFID_rec_FCTID_FCTIDU_FCTIDUZ_FCTIDUZ_rec_FCTIDU_rec_FCTIDZ_FCTIDZ_rec_FCTID_rec_FCTIW_FCTIWU_FCTIWUZ_FCTIWUZ_rec_FCTIWU_rec_FCTIWZ_FCTIWZ_rec_FCTIW_rec_FRE_FRES_rec_FRE_rec_FRSP_rec_FRSP_FRES_FRSQRTE_FRSQRTES_FRSQRTES_rec_FRSQRTE_rec_FSELD_FSELS_FSELD_rec_FSELS_rec_FCPSGND_FCPSGND_rec_FCPSGNS_FCPSGNS_rec_FRIMD_FRIMD_rec_FRIMS_FRIMS_rec_FRIND_FRIND_rec_FRINS_FRINS_rec_FRIPD_FRIPD_rec_FRIPS_FRIPS_rec_FRIZD_FRIZD_rec_FRIZS_FRIZS_rec = 156, |
3023 | | FADD_FADD_rec_FSUB_FSUB_rec = 157, |
3024 | | FMADD_FMADD_rec_FMSUB_FMSUB_rec_FMUL_FMUL_rec_FNMADD_FNMADD_rec_FNMSUB_FNMSUB_rec = 158, |
3025 | | XSMADDADP_XSMADDASP_XSMADDMDP_XSMADDMSP_XSMSUBADP_XSMSUBASP_XSMSUBMDP_XSMSUBMSP_XSNMADDADP_XSNMADDASP_XSNMADDMDP_XSNMADDMSP_XSNMSUBADP_XSNMSUBASP_XSNMSUBMDP_XSNMSUBMSP_XSABSDP_XSADDDP_XSADDSP_XSMULDP_XSMULSP_XSNABSDP_XSNABSDPs_XSNEGDP_XSSUBDP_XSSUBSP_XSCPSGNDP_XSCVDPSP_XSCVDPSXDS_XSCVDPSXDSs_XSCVDPSXWS_XSCVDPSXWSs_XSCVDPUXDS_XSCVDPUXDSs_XSCVDPUXWS_XSCVDPUXWSs_XSCVSPDP_XSCVSXDDP_XSCVUXDDP_XSMAXDP_XSMINDP_XSRDPI_XSRDPIC_XSRDPIM_XSRDPIP_XSRDPIZ_XSREDP_XSRSQRTEDP = 159, |
3026 | | FTDIV_FTSQRT_XSTDIVDP_XSTSQRTDP_XSCMPODP_XSCMPUDP = 160, |
3027 | | XVADDDP_XVADDSP_XVMADDADP_XVMADDASP_XVMADDMDP_XVMADDMSP_XVMSUBADP_XVMSUBASP_XVMSUBMDP_XVMSUBMSP_XVNMADDADP_XVNMADDASP_XVNMADDMDP_XVNMADDMSP_XVNMSUBADP_XVNMSUBASP_XVNMSUBMDP_XVNMSUBMSP_XVSUBDP_XVSUBSP_XVABSDP_XVABSSP_XVMAXDP_XVMAXSP_XVMINDP_XVMINSP_XVMULDP_XVMULSP_XVNABSDP_XVNABSSP_XVNEGDP_XVNEGSP_XVCPSGNDP_XVCVDPSXDS_XVCVDPSXWS_XVCVDPUXDS_XVCVDPUXWS_XVCVSPSXDS_XVCVSPSXWS_XVCVSPUXDS_XVCVSPUXWS_XVCVSXDDP_XVCVSXWDP_XVCVUXDDP_XVCVUXWDP_XVRDPI_XVRDPIC_XVRDPIM_XVRDPIP_XVRDPIZ_XVREDP_XVRSPI_XVRSPIC_XVRSPIM_XVRSPIP_XVRSPIZ_XVRSQRTEDP = 161, |
3028 | | XVCMPEQDP_XVCMPEQDP_rec_XVCMPGEDP_XVCMPGEDP_rec_XVCMPGTDP_XVCMPGTDP_rec = 162, |
3029 | | XVTDIVDP_XVTSQRTDP = 163, |
3030 | | VPKSHSS_VPKSHUS_VPKSWSS_VPKSWUS_VPKUHUM_VPKUHUS_VPKUWUM_VPKUWUS_VUPKHPX_VUPKHSB_VUPKHSH_VUPKLPX_VUPKLSB_VUPKLSH_VPERM_VSEL_VPKPX = 164, |
3031 | | XXMRGHW_XXMRGLW_XXPERMDI_XXPERMDIs_XXSLDWI_XXSLDWIs_VSPLTB_VSPLTBs_VSPLTH_VSPLTHs_VSPLTISB_VSPLTISH_VSPLTISW_VSPLTW_XXSPLTW_XXSPLTWs_XXSEL = 165, |
3032 | | VADDSBS_VADDSHS_VADDSWS_VADDUBS_VADDUHS_VADDUWS_VMAXSB_VMAXSH_VMAXSW_VMAXUB_VMAXUH_VMAXUW_VMINSB_VMINSH_VMINSW_VMINUB_VMINUH_VMINUW_VMRGHB_VMRGHH_VMRGHW_VMRGLB_VMRGLH_VMRGLW_XVRSQRTESP_XVRESP_XVCVSXDSP_XVCVSXWSP_XVCVUXDSP_XVCVUXWSP_XVCPSGNSP_XVCVDPSP_VADDCUW_VADDFP_VAND_VANDC_VAVGSB_VAVGSH_VAVGSW_VAVGUB_VAVGUH_VAVGUW_VCFSX_VCFUX_VCTSXS_VCTUXS_VEXPTEFP_VLOGEFP_VNOR_VOR_VMADDFP_VMHADDSHS_VMHRADDSHS_VMLADDUHM_VNMSUBFP_VMAXFP_VMINFP_VMSUMMBM_VMSUMSHM_VMSUMSHS_VMSUMUBM_VMSUMUDM_VMSUMUHM_VMSUMUHS_VMULESB_VMULESH_VMULEUB_VMULEUH_VMULOSB_VMULOSH_VMULOUB_VMULOUH_VREFP_VRFIM_VRFIN_VRFIP_VRFIZ_VRLB_VRLH_VRLW_VRSQRTEFP_VSR_VSRAB_VSRAH_VSRAW_VSRB_VSRH_VSRO_VSRW_VSUBCUW_VSL_VSLB_VSLDOI_VSLH_VSLO_VSLW_VSUBSBS_VSUBSHS_VSUBSWS_VSUBUBS_VSUBUHS_VSUBUWS_VSUM2SWS_VSUM4SBS_VSUM4SHS_VSUM4UBS_VSUMSWS_VXOR = 166, |
3033 | | VADDUBM_VADDUHM_VADDUWM_XXLORf_XXLXORdpz_XXLXORspz_XXLXORz_VSUBFP_VSUBUBM_VSUBUHM_VSUBUWM_XXLAND_XXLANDC_XXLNOR_XXLOR_XXLXOR = 167, |
3034 | | XVTDIVSP_XVTSQRTSP = 168, |
3035 | | XVCMPEQSP_XVCMPEQSP_rec_XVCMPGESP_XVCMPGESP_rec_XVCMPGTSP_XVCMPGTSP_rec_VCMPBFP_VCMPBFP_rec_VCMPEQFP_VCMPEQFP_rec_VCMPEQUB_VCMPEQUB_rec_VCMPEQUH_VCMPEQUH_rec_VCMPEQUW_VCMPEQUW_rec_VCMPGEFP_VCMPGEFP_rec_VCMPGTFP_VCMPGTFP_rec_VCMPGTSB_VCMPGTSB_rec_VCMPGTSH_VCMPGTSH_rec_VCMPGTSW_VCMPGTSW_rec_VCMPGTUB_VCMPGTUB_rec_VCMPGTUH_VCMPGTUH_rec_VCMPGTUW_VCMPGTUW_rec = 169, |
3036 | | FCMPOD_FCMPOS_FCMPUD_FCMPUS = 170, |
3037 | | FDIVS_FDIVS_rec = 171, |
3038 | | XSDIVDP = 172, |
3039 | | FSQRTS_XSSQRTSP_FSQRTS_rec = 173, |
3040 | | FDIV_FDIV_rec = 174, |
3041 | | XSSQRTDP = 175, |
3042 | | FSQRT_FSQRT_rec = 176, |
3043 | | XVDIVSP = 177, |
3044 | | XVSQRTSP = 178, |
3045 | | XVDIVDP = 179, |
3046 | | XVSQRTDP = 180, |
3047 | | MFOCRF_MFOCRF8 = 181, |
3048 | | VCIPHER_VCIPHERLAST_VNCIPHER_VNCIPHERLAST_VPMSUMB_VPMSUMD_VPMSUMH_VPMSUMW_VSBOX = 182, |
3049 | | XSDIVSP = 183, |
3050 | | FSQRTS_FSQRTS_rec = 184, |
3051 | | MTFSFI_rec_MTFSF_rec_MTFSFI_MTFSFIb_MTFSF = 185, |
3052 | | MTFSFb_MTFSB0_MTFSB1 = 186, |
3053 | | XSMADDADP_XSMADDASP_XSMADDMDP_XSMADDMSP_XSMSUBADP_XSMSUBASP_XSMSUBMDP_XSMSUBMSP_XSNMADDADP_XSNMADDASP_XSNMADDMDP_XSNMADDMSP_XSNMSUBADP_XSNMSUBASP_XSNMSUBMDP_XSNMSUBMSP_XSABSDP_XSADDDP_XSADDSP_XSCPSGNDP_XSMULDP_XSMULSP_XSNABSDP_XSNABSDPs_XSNEGDP_XSREDP_XSRSQRTEDP_XSSUBDP_XSSUBSP_XSCVDPSXDS_XSCVDPSXDSs_XSCVDPSXWS_XSCVDPSXWSs_XSCVDPUXDS_XSCVDPUXDSs_XSCVDPUXWS_XSCVDPUXWSs_XSCVSXDDP_XSCVUXDDP_XSCVDPSP_XSCVSPDP_XSRDPI_XSRDPIC_XSRDPIM_XSRDPIP_XSRDPIZ = 187, |
3054 | | XSRESP_XSRSQRTESP_XSCVSXDSP_XSCVUXDSP_XSCVDPSPN_XSCVSPDPN_XSRSP = 188, |
3055 | | XVMADDASP_XVMADDMSP_XVMSUBASP_XVMSUBMSP_XVNMADDASP_XVNMADDMSP_XVNMSUBASP_XVNMSUBMSP_XVSUBSP_XVMULSP_XVNABSSP_XVNEGSP_XVABSSP_XVADDSP = 189, |
3056 | | VRFIM_VRFIN_VRFIP_VRFIZ_XVRSQRTESP_VADDFP_VEXPTEFP_VLOGEFP_VMADDFP_VNMSUBFP_VREFP_VRSQRTEFP_XVCVSXWSP_XVCVUXWSP_XVRESP_XVCVDPSP_XVCVSXDSP_XVCVUXDSP_XVCPSGNSP = 190, |
3057 | | VSUBFP = 191, |
3058 | | XVRDPI_XVRDPIC_XVRDPIM_XVRDPIP_XVRDPIZ_XVRSPI_XVRSPIC_XVRSPIM_XVRSPIP_XVRSPIZ_XVCVSXDDP_XVCVSXWDP_XVCVUXDDP_XVCVUXWDP_XVCVDPSXDS_XVCVDPSXWS_XVCVDPUXDS_XVCVDPUXWS_XVCVSPSXDS_XVCVSPSXWS_XVCVSPUXDS_XVCVSPUXWS_XVABSDP_XVADDDP_XVCPSGNDP_XVMADDADP_XVMADDMDP_XVMSUBADP_XVMSUBMDP_XVMULDP_XVNABSDP_XVNEGDP_XVNMADDADP_XVNMADDMDP_XVNMSUBADP_XVNMSUBMDP_XVREDP_XVRSQRTEDP_XVSUBDP = 192, |
3059 | | XVCVSPDP = 193, |
3060 | | TDI_TD = 194, |
3061 | | TWI_TW = 195, |
3062 | | MTCRF_MTCRF8_MTOCRF_MTOCRF8 = 196, |
3063 | | RLWIMI_RLWIMI8 = 197, |
3064 | | AND_AND8_AND8_rec_ANDC_ANDC8_ANDC8_rec_ANDC_rec_AND_rec_EQV_EQV8_EQV8_rec_EQV_rec_NAND_NAND8_NAND8_rec_NAND_rec_NOR_NOR8_NOR8_rec_NOR_rec_ORC_ORC8_ORC8_rec_ORC_rec_ORI_ORI8_ORIS_ORIS8_XOR_XOR8_XOR8_rec_XORI_XORI8_XORIS_XORIS8_XOR_rec_ADD4_rec_ADD8_rec_NEG8_rec_NEG_rec = 198, |
3065 | | ANDI8_rec_ANDIS8_rec_RLWINM_RLWINM8_RLWINM8_rec_RLWINM_rec_RLWNM_RLWNM8_RLWNM8_rec_RLWNM_rec_SLW_SLW8_SLW8_rec_SLW_rec_SRW_SRW8_SRW8_rec_SRW_rec_ADDC8O_ADDC8O_rec_ADDCO_ADDCO_rec_ADDE8O_ADDE8O_rec_ADDEO_ADDEO_rec_ADDME8O_ADDME8O_rec_ADDMEO_ADDMEO_rec_ADDZE8O_ADDZE8O_rec_ADDZEO_ADDZEO_rec_SUBF8O_SUBF8O_rec_SUBFC8O_SUBFC8O_rec_SUBFCO_SUBFCO_rec_SUBFE8O_SUBFE8O_rec_SUBFEO_SUBFEO_rec_SUBFME8O_SUBFME8O_rec_SUBFMEO_SUBFMEO_rec_SUBFO_SUBFO_rec_SUBFZE8O_SUBFZE8O_rec_SUBFZEO_SUBFZEO_rec_ADDE8_rec_ADDE_rec_ADDME8_rec_ADDME_rec_ADDZE8_rec_ADDZE_rec_SUBFE8_rec_SUBFE_rec_SUBFME8_rec_SUBFME_rec_SUBFZE8_rec_SUBFZE_rec_ADDIC_rec_ADDC_ADDC8_SUBFC_SUBFC8_ADDC_rec_ADDC8_rec_SUBFC_rec_SUBFC8_rec = 199, |
3066 | | ANDIS_rec_ANDI_rec_SUBF8_rec = 200, |
3067 | | OR_OR8_OR8_rec_OR_rec_NOP = 201, |
3068 | | SLDI_SLDI_rec_SLWI_SLWI_rec_SRDI_SRDI_rec_SRWI_SRWI_rec_COPY = 202, |
3069 | | SUBF_rec_ADDG6S_ADDG6S8_ADDZE_ADDZE8 = 203, |
3070 | | RLWIMI8_rec_RLWIMI_rec = 204, |
3071 | | CNTLZD_CNTLZD_rec_CNTLZW_CNTLZW8_CNTLZW8_rec_CNTLZW_rec = 205, |
3072 | | POPCNTB_POPCNTB8_POPCNTD_POPCNTW = 206, |
3073 | | ISEL_ISEL8 = 207, |
3074 | | MFTB_MFTB8 = 208, |
3075 | | DIVW_DIVWU = 209, |
3076 | | DIVD_DIVDU = 210, |
3077 | | DIVWE_DIVWEU = 211, |
3078 | | LVEBX_LVEHX_LVEWX_LVX_LVXL = 212, |
3079 | | LXVB16X_LXSIWZX = 213, |
3080 | | DFLOADf64_XFLOADf64_LIWZX = 214, |
3081 | | LQ = 215, |
3082 | | STFDEPX_STFDXTLS_STFDXTLS__STFSXTLS_STFSXTLS__STXSIWX_STXSSP_STXSSPX = 216, |
3083 | | STBXTLS_STBXTLS__STBXTLS_32_STHXTLS_STHXTLS__STHXTLS_32_STWXTLS_STWXTLS__STWXTLS_32_STBEPX_STDBRX_STHEPX_STWEPX = 217, |
3084 | | STDXTLS_STDXTLS_ = 218, |
3085 | | STBCIX_STDCIX = 219, |
3086 | | STBCX_STHCX = 220, |
3087 | | STHCIX_STSWI_STWCIX = 221, |
3088 | | LBZ_LBZ8_LBZX_LBZX8_LBZXTLS_LBZXTLS__LBZXTLS_32_LHAXTLS_LHAXTLS__LHAXTLS_32_LHZ_LHZ8_LHZX_LHZX8_LHZXTLS_LHZXTLS__LHZXTLS_32_LWAXTLS_LWAXTLS__LWAXTLS_32_LWZ_LWZ8_LWZX_LWZX8_LWZXTLS_LWZXTLS__LWZXTLS_32 = 222, |
3089 | | LD_LDX_LDXTLS_LDXTLS_ = 223, |
3090 | | LBARXL_LHARXL = 224, |
3091 | | LBEPX_LHEPX_LWEPX = 225, |
3092 | | LFDEPX_LXSIWAX = 226, |
3093 | | ADDIdtprelL_ADDIdtprelL32_ADDItlsgdL_ADDItlsgdL32_ADDItlsgdLADDR_ADDItlsgdLADDR32_ADDItoc_ADDItoc8_ADDItocL_ADDISdtprelHA_ADDISdtprelHA32_ADDISgotTprelHA_ADDIStlsgdHA_ADDIStocHA_ADDIStocHA8 = 227, |
3094 | | SUBF = 228, |
3095 | | VPKSDSS_VPKSDUS_VPKUDUM_VPKUDUS_VUPKHSW_VUPKLSW_VMRGEW_VMRGOW_VPERMXOR_VBPERMQ_VGBBD = 229, |
3096 | | VMRGHB_VMRGHH_VMRGHW_VMRGLB_VMRGLH_VMRGLW_VSL_VSLDOI_VSLO_VSR_VSRO = 230, |
3097 | | VADDSBS_VADDSHS_VADDSWS_VADDUBS_VADDUHS_VADDUWS_VSUBSBS_VSUBSHS_VSUBSWS_VSUBUBS_VSUBUHS_VSUBUWS_VRLB_VRLH_VRLW_VSLB_VSLH_VSLW_VSRAB_VSRAH_VSRAW_VSRB_VSRH_VSRW_VAVGSB_VAVGSH_VAVGSW_VAVGUB_VAVGUH_VAVGUW_VMAXSB_VMAXSH_VMAXSW_VMAXUB_VMAXUH_VMAXUW_VMINSB_VMINSH_VMINSW_VMINUB_VMINUH_VMINUW_VAND_VANDC_VNOR_VOR_VXOR_VMAXFP_VMINFP_VSUBCUW_VADDCUW = 231, |
3098 | | VADDUDM_VSUBUDM_VSLD_VSRAD_VSRD_VEQV_VNAND_VORC_XXLEQV_XXLNAND_XXLORC_VCLZB_VCLZD_VCLZH_VCLZW_VPOPCNTB_VPOPCNTH_VPOPCNTW = 232, |
3099 | | VRLD_VMAXSD_VMAXUD_VMINSD_VMINUD_VSHASIGMAD_VSHASIGMAW = 233, |
3100 | | VCMPEQUD_VCMPEQUD_rec_VCMPGTSD_VCMPGTSD_rec_VCMPGTUD_VCMPGTUD_rec = 234, |
3101 | | MFVSCR = 235, |
3102 | | MTVSCR = 236, |
3103 | | VADDCUQ_VADDECUQ_VADDEUQM_VSUBCUQ_VSUBECUQ_VSUBEUQM = 237, |
3104 | | VADDUQM_VSUBUQM_VPOPCNTD = 238, |
3105 | | VMSUMMBM_VMSUMSHM_VMSUMSHS_VMSUMUBM_VMSUMUHM_VMSUMUHS_VSUM2SWS_VSUM4SBS_VSUM4SHS_VSUM4UBS_VSUMSWS_VMULESB_VMULESH_VMULEUB_VMULEUH_VMULOSB_VMULOSH_VMULOUB_VMULOUH_VMHADDSHS_VMHRADDSHS_VMLADDUHM = 239, |
3106 | | VMULESW_VMULEUW_VMULOSW_VMULOUW = 240, |
3107 | | VMULUWM = 241, |
3108 | | B_BA_BL_BL8_BL8_RM_BLA_BLA8_BLA8_RM_BLA_RM_BL_RM_BL8_NOP_BL8_NOP_RM_BL8_NOP_TLS_BL8_TLS_BL8_TLS__BLA8_NOP_BLA8_NOP_RM_BL_NOP_BL_NOP_RM_BL_TLS = 242, |
3109 | | DTSTDC_DTSTDCQ_DTSTDG_DTSTDGQ_DTSTSF_DTSTSFQ_DCMPO_DCMPU_DTSTEX = 243, |
3110 | | DXEX_DXEXQ_DXEXQ_rec_DXEX_rec_DDEDPD_DDEDPD_rec_DENBCD_DENBCD_rec_DIEX_DIEX_rec_DQUA_DQUA_rec_DRINTN_DRINTN_rec_DRINTX_DRINTX_rec_DRRND_DRRND_rec_DSCLI_DSCLI_rec_DSCRI_DSCRI_rec_DQUAI = 244, |
3111 | | DADD_DADD_rec_DCTDP_DCTDP_rec_DSUB_DSUB_rec = 245, |
3112 | | BCDADD_rec_BCDSUB_rec = 246, |
3113 | | DRINTNQ_DRINTNQ_rec_DRINTXQ_DRINTXQ_rec_DRRNDQ_DRRNDQ_rec_DIEXQ_DIEXQ_rec_DQUAIQ_DQUAIQ_rec_DDEDPDQ_DDEDPDQ_rec_DENBCDQ_DENBCDQ_rec_DSCLIQ_DSCLIQ_rec_DSCRIQ_DSCRIQ_rec = 247, |
3114 | | DCMPOQ_DCMPUQ_DTSTEXQ = 248, |
3115 | | DCTQPQ_DCTQPQ_rec = 249, |
3116 | | DADDQ_DADDQ_rec_DSUBQ_DSUBQ_rec = 250, |
3117 | | DQUAQ_DQUAQ_rec = 251, |
3118 | | DRSP_DRSP_rec_DCTFIX_DCTFIX_rec = 252, |
3119 | | DCFFIX_DCFFIX_rec = 253, |
3120 | | DCFFIXQ_DCFFIXQ_rec = 254, |
3121 | | DMUL_DMUL_rec = 255, |
3122 | | DMULQ_DMULQ_rec = 256, |
3123 | | DDIV_DDIV_rec = 257, |
3124 | | DDIVQ_DDIVQ_rec = 258, |
3125 | | MFVRD_MFVSRD_MFVRWZ_MFVSRWZ_MTVRD_MTVSRD_MTVRWA_MTVSRWA_MTVRWZ_MTVSRWZ = 259, |
3126 | | VADDUDM_VSLD_VSRD_VSUBUDM_VPOPCNTB_VPOPCNTH_VSRAD_VEQV_VNAND_VORC_XXLEQV_XXLNAND_XXLORC = 260, |
3127 | | VAND_VANDC_VSLB_VSLH_VSLW_VSRB_VSRH_VSRW_VRLB_VRLH_VRLW_VSRAB_VSRAH_VSRAW_VNOR_VOR_VXOR = 261, |
3128 | | VEXTSB2D_VEXTSB2Ds_VEXTSB2W_VEXTSB2Ws_VEXTSH2D_VEXTSH2Ds_VEXTSH2W_VEXTSH2Ws_VEXTSW2D_VEXTSW2Ds_MTVSRDD_VNEGD_VNEGW_XXLEQVOnes = 262, |
3129 | | V_SET0_V_SET0B_V_SET0H_XVIEXPDP_XVIEXPSP_XVXEXPDP_XVXEXPSP_VRLDMI_VRLDNM_VRLWMI_VRLWNM_XSABSQP_XSCPSGNQP_XSIEXPQP_XSNABSQP_XSNEGQP_XSXEXPQP = 263, |
3130 | | VRLD = 264, |
3131 | | XVABSDP_XVNABSDP_XVCPSGNDP_XVNEGDP = 265, |
3132 | | XVABSSP_XVNABSSP_XVNEGSP = 266, |
3133 | | XVCPSGNSP = 267, |
3134 | | VMRGEW_VMRGOW = 268, |
3135 | | VSEL = 269, |
3136 | | XXSEL = 270, |
3137 | | TABORTDC_TABORTDCI_TABORTWC_TABORTWCI = 271, |
3138 | | MTFSB0_MTFSB1 = 272, |
3139 | | MFFSCDRN_MFFSCDRNI_MFFSCRN_MFFSCRNI = 273, |
3140 | | CMPRB_CMPRB8_CMPEQB = 274, |
3141 | | XSTSTDCDP_XSTSTDCSP = 275, |
3142 | | FTDIV_FTSQRT = 276, |
3143 | | XSMAXCDP_XSMAXJDP_XSMINCDP_XSMINJDP_XSXSIGDP = 277, |
3144 | | XSCMPEQDP_XSCMPEXPDP_XSCMPGEDP_XSCMPGTDP = 278, |
3145 | | CNTTZD_CNTTZD_rec_CNTTZW_CNTTZW8_CNTTZW8_rec_CNTTZW_rec = 279, |
3146 | | POPCNTD_POPCNTW = 280, |
3147 | | CMPB_CMPB8_SETB_SETB8_BPERMD = 281, |
3148 | | XSCVSPDPN = 282, |
3149 | | SLD_SRD_SRAD = 283, |
3150 | | SRADI_SRADI_32_RLDIC = 284, |
3151 | | EXTSWSLI_32_64_EXTSWSLI = 285, |
3152 | | SUBFC_SUBFC8_SUBFC8O_SUBFCO_ANDI8_rec_ANDIS8_rec_ADDC_ADDC8_ADDC8O_ADDCO_ADDIC_rec_ADDE8O_ADDE8O_rec_ADDE8_rec_ADDEO_ADDEO_rec_ADDE_rec_ADDME8O_ADDME8O_rec_ADDME8_rec_ADDMEO_ADDMEO_rec_ADDME_rec_ADDZE8O_ADDZE8O_rec_ADDZE8_rec_ADDZEO_ADDZEO_rec_ADDZE_rec_SUBF8O_SUBF8O_rec_SUBFE8O_SUBFE8O_rec_SUBFE8_rec_SUBFEO_SUBFEO_rec_SUBFE_rec_SUBFME8O_SUBFME8O_rec_SUBFME8_rec_SUBFMEO_SUBFMEO_rec_SUBFME_rec_SUBFO_SUBFO_rec_SUBFZE8O_SUBFZE8O_rec_SUBFZE8_rec_SUBFZEO_SUBFZEO_rec_SUBFZE_rec = 286, |
3153 | | ADDZE_ADDZE8_SUBF_rec = 287, |
3154 | | ADDIStocHA_ADDIStocHA8_ADDItocL = 288, |
3155 | | LA_LA8 = 289, |
3156 | | COPY = 290, |
3157 | | MCRXRX = 291, |
3158 | | XSNABSDP_XSNABSDPs_XSABSDP_XSNEGDP_XSCPSGNDP = 292, |
3159 | | XSXEXPDP = 293, |
3160 | | RFEBB = 294, |
3161 | | TBEGIN_TRECHKPT = 295, |
3162 | | WAIT = 296, |
3163 | | RLDCL_RLDCR = 297, |
3164 | | RLDICL_RLDICL_32_RLDICL_32_64_RLDICR_RLDICR_32_RLDIMI = 298, |
3165 | | MTOCRF_MTOCRF8 = 299, |
3166 | | SLW_SLW8_SRW_SRW8_RLWINM_RLWINM8_RLWNM_RLWNM8 = 300, |
3167 | | FABSD_FABSS_FNABSD_FNABSS_FNEGD_FNEGS_FCPSGND_FCPSGNS_FMR = 301, |
3168 | | SRAW_SRAWI = 302, |
3169 | | XSIEXPDP = 303, |
3170 | | CRXOR = 304, |
3171 | | TRECLAIM_TSR_TABORT = 305, |
3172 | | VCMPNEZB_VCMPNEZH_VCMPNEZW_VCMPNEB_VCMPNEH_VCMPNEW_VCMPNEB_rec_VCMPNEH_rec_VCMPNEW_rec_VCMPNEZB_rec_VCMPNEZH_rec_VCMPNEZW_rec = 306, |
3173 | | VABSDUB_VABSDUH_VABSDUW_VCTZB_VCTZD_VCTZH_VCTZW_VPRTYBD_VPRTYBW = 307, |
3174 | | VBPERMD_XVTSTDCDP_XVTSTDCSP_XVXSIGDP_XVXSIGSP = 308, |
3175 | | VPOPCNTD = 309, |
3176 | | VCTSXS_0_VCTUXS_0_XVCVHPSP_XVCVSPHP_VCFSX_0_VCFUX_0 = 310, |
3177 | | MADDHD_MADDHDU_MADDLD_MADDLD8 = 311, |
3178 | | MULHD_MULHW_MULLW_MULLWO = 312, |
3179 | | MULHDU_MULHWU = 313, |
3180 | | MULLD_MULLDO = 314, |
3181 | | FRSP_FRIMD_FRIMS_FRIND_FRINS_FRIPD_FRIPS_FRIZD_FRIZS_FRE_FRES_FADDS_FMSUBS_FMADDS_FSUBS_FCFID_FCFIDS_FCFIDU_FCFIDUS_FCTID_FCTIDU_FCTIDUZ_FCTIDZ_FCTIW_FCTIWU_FCTIWUZ_FCTIWZ_FRSQRTE_FRSQRTES_FNMADDS_FNMSUBS_FSELD_FSELS_FMULS = 315, |
3182 | | FADD_FSUB = 316, |
3183 | | FMSUB_FMADD_FNMADD_FNMSUB_FMUL = 317, |
3184 | | XSMADDADP_XSMADDASP_XSMADDMDP_XSMADDMSP_XSMSUBADP_XSMSUBASP_XSMSUBMDP_XSMSUBMSP_XSMULDP_XSMULSP_XSNMADDADP_XSNMADDASP_XSNMADDMDP_XSNMADDMSP_XSNMSUBADP_XSNMSUBASP_XSNMSUBMDP_XSNMSUBMSP = 318, |
3185 | | FSELD_rec_FSELS_rec = 319, |
3186 | | FRIMD_rec_FRIMS_rec_FRIND_rec_FRINS_rec_FRIPD_rec_FRIPS_rec_FRIZD_rec_FRIZS_rec_FRES_rec_FRE_rec_FADDS_rec_FSUBS_rec_FMSUBS_rec_FNMSUBS_rec_FMADDS_rec_FNMADDS_rec_FCFIDS_rec_FCFIDUS_rec_FCFIDU_rec_FCFID_rec_FCTIDUZ_rec_FCTIDU_rec_FCTIDZ_rec_FCTID_rec_FCTIWUZ_rec_FCTIWU_rec_FCTIWZ_rec_FCTIW_rec_FMULS_rec_FRSQRTES_rec_FRSQRTE_rec_FRSP_rec = 320, |
3187 | | XSCVDPHP_XSCVHPDP = 321, |
3188 | | LVSL_LVSR = 322, |
3189 | | V_SETALLONES_V_SETALLONESB_V_SETALLONESH_VPERMR_VSLV_VSRV_XXBRD_XXBRH_XXBRQ_XXBRW_XXEXTRACTUW_XXINSERTW_VMUL10CUQ_VMUL10ECUQ_VMUL10EUQ_VMUL10UQ_XSTSTDCQP_XSXSIGQP_BCDCFN_rec_BCDCFZ_rec_BCDCPSGN_rec_BCDCTN_rec_BCDCTZ_rec_BCDSETSGN_rec_BCDS_rec_BCDTRUNC_rec_BCDUS_rec_BCDUTRUNC_rec = 323, |
3190 | | VEXTRACTUB_VEXTRACTUH_VEXTRACTUW_VINSERTB_VINSERTD_VINSERTH_VINSERTW_MFVSRLD_MTVSRWS_VCLZLSBB_VCTZLSBB_VEXTRACTD_VEXTUBLX_VEXTUBRX_VEXTUHLX_VEXTUHRX_VEXTUWLX_VEXTUWRX_VPRTYBQ = 324, |
3191 | | XXPERM_XXPERMR_XXSPLTIB = 325, |
3192 | | XSCMPEXPQP_XSCMPOQP_XSCMPUQP = 326, |
3193 | | BCDSR_rec_XSADDQP_XSADDQPO_XSCVDPQP_XSCVQPDP_XSCVQPDPO_XSCVQPSDZ_XSCVQPSWZ_XSCVQPUDZ_XSCVQPUWZ_XSCVSDQP_XSCVUDQP_XSRQPI_XSRQPIX_XSRQPXP_XSSUBQP_XSSUBQPO = 327, |
3194 | | BCDCTSQ_rec = 328, |
3195 | | XSMADDQP_XSMADDQPO_XSMSUBQP_XSMSUBQPO_XSMULQP_XSMULQPO_XSNMADDQP_XSNMADDQPO_XSNMSUBQP_XSNMSUBQPO = 329, |
3196 | | BCDCFSQ_rec = 330, |
3197 | | XSDIVQP_XSDIVQPO = 331, |
3198 | | XSSQRTQP_XSSQRTQPO = 332, |
3199 | | LXVL_LXVLL = 333, |
3200 | | LXSIBZX_LXSIHZX_LXVWSX_LXV_LXVX_LXSD = 334, |
3201 | | LXSDX_LXVD2X = 335, |
3202 | | DCBF_DCBFEP_DCBST_DCBSTEP_DCBT_DCBTEP_DCBZ_DCBZEP_DCBZL_DCBZLEP_DCBTST_DCBTSTEP = 336, |
3203 | | CP_COPY_CP_COPY8 = 337, |
3204 | | ICBI_ICBIEP = 338, |
3205 | | ICBT_ICBTLS_EnforceIEIO = 339, |
3206 | | LBZ_LBZ8_LBZX_LBZX8_LBZXTLS_LBZXTLS__LBZXTLS_32_LHZ_LHZ8_LHZX_LHZX8_LHZXTLS_LHZXTLS__LHZXTLS_32_LWZ_LWZ8_LWZX_LWZX8_LWZXTLS_LWZXTLS__LWZXTLS_32 = 340, |
3207 | | CP_ABORT = 341, |
3208 | | DARN = 342, |
3209 | | ISYNC = 343, |
3210 | | MSGSYNC = 344, |
3211 | | TLBSYNC = 345, |
3212 | | SYNC = 346, |
3213 | | LFIWZX = 347, |
3214 | | LFDX_LFDXTLS_LFDXTLS__LFD = 348, |
3215 | | SLBIA = 349, |
3216 | | SLBIE = 350, |
3217 | | SLBMFEE = 351, |
3218 | | SLBMFEV = 352, |
3219 | | SLBMTE = 353, |
3220 | | TLBIEL = 354, |
3221 | | LHZU_LHZU8_LWZU_LWZU8 = 355, |
3222 | | LHZUX_LHZUX8_LWZUX_LWZUX8 = 356, |
3223 | | TEND = 357, |
3224 | | CP_PASTE8_rec_CP_PASTE_rec = 358, |
3225 | | TCHECK = 359, |
3226 | | LXSIWAX = 360, |
3227 | | LIWAX = 361, |
3228 | | LFSX_LFSXTLS_LFSXTLS__LFS = 362, |
3229 | | LXSSP_LXSSPX = 363, |
3230 | | XFLOADf32_DFLOADf32 = 364, |
3231 | | LXVH8X = 365, |
3232 | | STFDXTLS_STFDXTLS__STFSXTLS_STFSXTLS__STXSIWX_STXSSP_STXSSPX = 366, |
3233 | | STXSD_STXSIBX_STXSIBXv_STXSIHX_STXSIHXv = 367, |
3234 | | STXSDX = 368, |
3235 | | DFSTOREf32_DFSTOREf64_XFSTOREf32_XFSTOREf64_STIWX = 369, |
3236 | | STDBRX_STBXTLS_STBXTLS__STBXTLS_32_STHXTLS_STHXTLS__STHXTLS_32_STWXTLS_STWXTLS__STWXTLS_32 = 370, |
3237 | | SLBIEG = 371, |
3238 | | TLBIE = 372, |
3239 | | STXV_STXVB16X_STXVH8X_STXVX = 373, |
3240 | | STXVL_STXVLL = 374, |
3241 | | MFVRSAVE_MFVRSAVEv_MTVRSAVE_MTVRSAVEv = 375, |
3242 | | MFPMR = 376, |
3243 | | MTPMR = 377, |
3244 | | MFSPR_MFSPR8_MFUDSCR = 378, |
3245 | | MFMSR = 379, |
3246 | | MTMSR = 380, |
3247 | | MTMSRD = 381, |
3248 | | MTUDSCR_MTSPR_MTSPR8 = 382, |
3249 | | DIVWO_DIVWUO = 383, |
3250 | | MODSW = 384, |
3251 | | DIVWEO_DIVWEUO = 385, |
3252 | | DIVDO_DIVDUO = 386, |
3253 | | MODSD_MODUD_MODUW = 387, |
3254 | | DIVDE_DIVDEO_DIVDEU_DIVDEUO = 388, |
3255 | | DIVWO_rec_DIVWUO_rec_DIVWU_rec_DIVW_rec = 389, |
3256 | | ADDC8O_rec_ADDC8_rec_ADDCO_rec_ADDC_rec_SUBFC8O_rec_SUBFC8_rec_SUBFCO_rec_SUBFC_rec = 390, |
3257 | | MCRFS = 391, |
3258 | | RLDCL_rec_RLDCR_rec = 392, |
3259 | | RLDICL_rec_RLDICR_rec_RLDICL_32_rec_RLDIMI_rec = 393, |
3260 | | MFFS_MFFSCE_MFFSL_MFFS_rec = 394, |
3261 | | EXTSWSLI_32_64_rec_EXTSWSLI_rec = 395, |
3262 | | FDIV = 396, |
3263 | | FSQRT = 397, |
3264 | | FSQRTS = 398, |
3265 | | FDIVS = 399, |
3266 | | LFSU = 400, |
3267 | | LFSUX = 401, |
3268 | | TAILB_TAILB8_TAILBA_TAILBA8_TAILBCTR_TAILBCTR8_CTRL_DEP = 402, |
3269 | | LDAT_LWAT = 403, |
3270 | | STDAT_STWAT = 404, |
3271 | | BRINC = 405, |
3272 | | EVABS_EVEQV_EVNAND_EVNEG_EVADDIW_EVADDW_EVAND_EVANDC_EVCMPEQ_EVCMPGTS_EVCMPGTU_EVCMPLTS_EVCMPLTU_EVCNTLSW_EVCNTLZW_EVEXTSB_EVEXTSH_EVMERGEHI_EVMERGEHILO_EVMERGELO_EVMERGELOHI_EVNOR_EVOR_EVORC_EVXOR_EVRLW_EVRLWI_EVRNDW_EVSLW_EVSLWI_EVSPLATFI_EVSPLATI_EVSRWIS_EVSRWIU_EVSRWS_EVSRWU_EVSUBFW_EVSUBIFW = 406, |
3273 | | EVMRA_EVADDSMIAAW_EVADDSSIAAW_EVADDUMIAAW_EVADDUSIAAW_EVDIVWS_EVDIVWU_EVMHEGSMFAA_EVMHEGSMFAN_EVMHEGSMIAA_EVMHEGSMIAN_EVMHEGUMIAA_EVMHEGUMIAN_EVMHESMF_EVMHESMFA_EVMHESMFAAW_EVMHESMFANW_EVMHESMI_EVMHESMIA_EVMHESMIAAW_EVMHESMIANW_EVMHESSF_EVMHESSFA_EVMHESSFAAW_EVMHESSFANW_EVMHESSIAAW_EVMHESSIANW_EVMHEUMI_EVMHEUMIA_EVMHEUMIAAW_EVMHEUMIANW_EVMHEUSIAAW_EVMHEUSIANW_EVMHOGSMFAA_EVMHOGSMFAN_EVMHOGSMIAA_EVMHOGSMIAN_EVMHOGUMIAA_EVMHOGUMIAN_EVMHOSMF_EVMHOSMFA_EVMHOSMFAAW_EVMHOSMFANW_EVMHOSMI_EVMHOSMIA_EVMHOSMIAAW_EVMHOSMIANW_EVMHOSSF_EVMHOSSFA_EVMHOSSFAAW_EVMHOSSFANW_EVMHOSSIAAW_EVMHOSSIANW_EVMHOUMI_EVMHOUMIA_EVMHOUMIAAW_EVMHOUMIANW_EVMHOUSIAAW_EVMHOUSIANW_EVMWHSMF_EVMWHSMFA_EVMWHSMI_EVMWHSMIA_EVMWHSSF_EVMWHSSFA_EVMWHUMI_EVMWHUMIA_EVMWLSMIAAW_EVMWLSMIANW_EVMWLSSIAAW_EVMWLSSIANW_EVMWLUMI_EVMWLUMIA_EVMWLUMIAAW_EVMWLUMIANW_EVMWLUSIAAW_EVMWLUSIANW_EVMWSMF_EVMWSMFA_EVMWSMFAA_EVMWSMFAN_EVMWSMI_EVMWSMIA_EVMWSMIAA_EVMWSMIAN_EVMWSSF_EVMWSSFA_EVMWSSFAA_EVMWSSFAN_EVMWUMI_EVMWUMIA_EVMWUMIAA_EVMWUMIAN_EVSUBFSMIAAW_EVSUBFSSIAAW_EVSUBFUMIAAW_EVSUBFUSIAAW = 407, |
3274 | | EVLDD_EVLDDX_EVLDH_EVLDHX_EVLDW_EVLDWX_EVLHHESPLAT_EVLHHESPLATX_EVLHHOSSPLAT_EVLHHOSSPLATX_EVLHHOUSPLAT_EVLHHOUSPLATX_EVLWHE_EVLWHEX_EVLWHOS_EVLWHOSX_EVLWHOU_EVLWHOUX_EVLWHSPLAT_EVLWHSPLATX_EVLWWSPLAT_EVLWWSPLATX = 408, |
3275 | | EVSTDD_EVSTDDX_EVSTDH_EVSTDHX_EVSTDW_EVSTDWX_EVSTWHE_EVSTWHEX_EVSTWHO_EVSTWHOX_EVSTWWE_EVSTWWEX_EVSTWWO_EVSTWWOX = 409, |
3276 | | HRFID_ATTN_CLRBHRB_MFBHRBE_NAP_RFCI_RFDI_RFMCI_SC = 410, |
3277 | | RFI = 411, |
3278 | | RFID = 412, |
3279 | | DSS_DSSALL_DST_DST64_DSTST_DSTST64_DSTSTT_DSTSTT64_DSTT_DSTT64_ICBLQ_TLBIVAX_TLBLD_TLBLI_TLBRE_TLBRE2_TLBSX_TLBSX2_TLBSX2D_TLBWE_TLBWE2_MBAR_TRAP_DCCCI_ICCCI = 413, |
3280 | | ICBLC = 414, |
3281 | | MTSR_MTSRIN = 415, |
3282 | | MFDCR = 416, |
3283 | | MTDCR = 417, |
3284 | | NOP_GT_PWR6_NOP_GT_PWR7 = 418, |
3285 | | TLBIA = 419, |
3286 | | WRTEE_WRTEEI = 420, |
3287 | | HASHCHK_HASHCHK8_HASHCHKP_HASHCHKP8_HASHST_HASHST8_HASHSTP_HASHSTP8_ADDEX_ADDEX8_CDTBCD_CDTBCD8_CBCDTD_CBCDTD8 = 421, |
3288 | | MSYNC = 422, |
3289 | | SLBSYNC = 423, |
3290 | | SLBFEE_rec = 424, |
3291 | | STOP = 425, |
3292 | | DCBA_DCBI = 426, |
3293 | | FCFID_FCFIDS_FCFIDU_FCFIDUS_FCTID_FCTIDU_FCTIDUZ_FCTIDZ_FCTIW_FCTIWU_FCTIWUZ_FCTIWZ_FRE_FRES_FRIMD_FRIMS_FRIND_FRINS_FRIPD_FRIPS_FRIZD_FRIZS_FRSP_FRSQRTE_FRSQRTES = 427, |
3294 | | VCFSX_VCFUX_VCTSXS_VCTUXS = 428, |
3295 | | VCFSX_0_VCFUX_0_VCTSXS_0_VCTUXS_0_XVCVSPHP = 429, |
3296 | | VLOGEFP_VREFP_VRFIM_VRFIN_VRFIP_VRFIZ_VRSQRTEFP_XVCVDPSP_XVCVSXDSP_XVCVSXWSP_XVCVUXDSP_XVCVUXWSP_XVRESP_XVRSQRTESP = 430, |
3297 | | XSCVDPHP = 431, |
3298 | | XSCVDPSP_XSCVDPSXDS_XSCVDPSXDSs_XSCVDPSXWS_XSCVDPSXWSs_XSCVDPUXDS_XSCVDPUXDSs_XSCVDPUXWS_XSCVDPUXWSs_XSCVSPDP_XSCVSXDDP_XSCVUXDDP_XSRDPI_XSRDPIC_XSRDPIM_XSRDPIP_XSRDPIZ_XSREDP_XSRSQRTEDP = 432, |
3299 | | XVCVDPSXDS_XVCVDPSXWS_XVCVDPUXDS_XVCVDPUXWS_XVCVSPSXDS_XVCVSPSXWS_XVCVSPUXDS_XVCVSPUXWS_XVCVSXDDP_XVCVSXWDP_XVCVUXDDP_XVCVUXWDP_XVRDPI_XVRDPIC_XVRDPIM_XVRDPIP_XVRDPIZ_XVREDP_XVRSPI_XVRSPIC_XVRSPIM_XVRSPIP_XVRSPIZ_XVRSQRTEDP = 433, |
3300 | | XVCVSPBF16 = 434, |
3301 | | FADDS_FMULS_FSUBS = 435, |
3302 | | FMUL = 436, |
3303 | | VADDFP = 437, |
3304 | | XSMULDP_XSMULSP = 438, |
3305 | | XVADDDP_XVMULDP_XVSUBDP = 439, |
3306 | | XVADDSP_XVMULSP_XVSUBSP = 440, |
3307 | | VMADDFP_VNMSUBFP = 441, |
3308 | | FADDS_rec_FMULS_rec_FSUBS_rec = 442, |
3309 | | FMUL_rec = 443, |
3310 | | FCFID_rec_FCFIDS_rec_FCFIDU_rec_FCFIDUS_rec_FCTID_rec_FCTIDU_rec_FCTIDUZ_rec_FCTIDZ_rec_FCTIW_rec_FCTIWU_rec_FCTIWUZ_rec_FCTIWZ_rec_FRE_rec_FRES_rec_FRIMD_rec_FRIMS_rec_FRIND_rec_FRINS_rec_FRIPD_rec_FRIPS_rec_FRIZD_rec_FRIZS_rec_FRSP_rec_FRSQRTE_rec_FRSQRTES_rec = 444, |
3311 | | BCC_BCCA_BCCCTR_BCCCTR8_BCCCTRL_BCCCTRL8_BCCL_BCCLA_BCCLR_BCCLRL_BCCTR_BCCTR8_BCCTR8n_BCCTRn_gBCCTR_BCCTRL_BCCTRL8_BCCTRL8n_BCCTRLn_gBCCTRL_BCLR_BCLRn_BDNZLR_BDNZLR8_BDNZLRm_BDNZLRp_BDZLR_BDZLR8_BDZLRm_BDZLRp_gBCLR_BCLRL_BCLRLn_BDNZLRL_BDNZLRLm_BDNZLRLp_BDZLRL_BDZLRLm_BDZLRLp_gBCLRL_BLR_BLR8_BLRL = 445, |
3312 | | CTRL_DEP_TAILB_TAILB8_TAILBA_TAILBA8 = 446, |
3313 | | VGNB = 447, |
3314 | | VSBOX = 448, |
3315 | | CFUGED_PDEPD_PEXTD = 449, |
3316 | | VCFUGED_VCLZDM_VCTZDM_VPDEPD_VPEXTD = 450, |
3317 | | XSCVDPQP_XSCVQPDP_XSCVQPDPO_XSCVQPSDZ_XSCVQPSWZ_XSCVQPUDZ_XSCVQPUWZ_XSCVSDQP_XSCVUDQP_XSRQPI_XSRQPIX_XSRQPXP = 451, |
3318 | | XSCVQPSQZ_XSCVQPUQZ_XSCVSQQP_XSCVUQQP = 452, |
3319 | | HASHST_HASHST8_HASHSTP_HASHSTP8 = 453, |
3320 | | XSMULQP_XSMULQPO = 454, |
3321 | | VDIVESQ_VDIVEUQ_VDIVSQ_VDIVUQ = 455, |
3322 | | VMODSQ_VMODUQ = 456, |
3323 | | VDIVSD_VDIVUD = 457, |
3324 | | VMODSD_VMODUD = 458, |
3325 | | VDIVSW_VDIVUW = 459, |
3326 | | VMODSW_VMODUW = 460, |
3327 | | VDIVESD_VDIVEUD = 461, |
3328 | | VDIVESW_VDIVEUW = 462, |
3329 | | BCDCFN_rec_BCDCFZ_rec_BCDCTN_rec_BCDCTZ_rec_BCDSETSGN_rec_VMUL10CUQ_VMUL10UQ_XSTSTDCQP_XSXSIGQP = 463, |
3330 | | XXGENPCVBM = 464, |
3331 | | BCDCPSGN_rec_BCDS_rec_BCDTRUNC_rec_BCDUS_rec_BCDUTRUNC_rec_VMUL10ECUQ_VMUL10EUQ = 465, |
3332 | | VADDCUQ_VSUBCUQ = 466, |
3333 | | XSCMPEQQP_XSCMPGEQP_XSCMPGTQP_XSMAXCQP_XSMINCQP = 467, |
3334 | | MTVSRBMI = 468, |
3335 | | CBCDTD_CBCDTD8_CDTBCD_CDTBCD8 = 469, |
3336 | | FTSQRT = 470, |
3337 | | MTVSRBM_MTVSRDM_MTVSRHM_MTVSRQM_MTVSRWM_VCNTMBB_VCNTMBD_VCNTMBH_VCNTMBW_VEXPANDBM_VEXPANDDM_VEXPANDHM_VEXPANDQM_VEXPANDWM_VEXTRACTBM_VEXTRACTDM_VEXTRACTHM_VEXTRACTQM_VEXTRACTWM_XVTLSBB = 471, |
3338 | | RLDIC_rec = 472, |
3339 | | RLDICL_32_rec_RLDICL_rec_RLDICR_rec = 473, |
3340 | | RLWINM8_rec_RLWINM_rec = 474, |
3341 | | VCTZB_VCTZD_VCTZH_VCTZW_VPRTYBD_VPRTYBW = 475, |
3342 | | VPOPCNTB_VPOPCNTH = 476, |
3343 | | VSHASIGMAD_VSHASIGMAW = 477, |
3344 | | XSTSQRTDP = 478, |
3345 | | XVTSQRTDP = 479, |
3346 | | XVTSQRTSP = 480, |
3347 | | XVTSTDCDP_XVTSTDCSP = 481, |
3348 | | SLD_rec_SRD_rec = 482, |
3349 | | TDI = 483, |
3350 | | TWI = 484, |
3351 | | VADDCUW_VADDSBS_VADDSHS_VADDSWS_VADDUBS_VADDUHS_VADDUWS_VAVGSB_VAVGSH_VAVGSW_VAVGUB_VAVGUH_VAVGUW_VMAXFP_VMINFP_VSUBCUW_VSUBSBS_VSUBSHS_VSUBSWS_VSUBUBS_VSUBUHS_VSUBUWS = 485, |
3352 | | VCMPBFP_VCMPBFP_rec_VCMPEQFP_VCMPEQFP_rec_VCMPEQUB_rec_VCMPEQUH_rec_VCMPEQUW_rec_VCMPGEFP_VCMPGEFP_rec_VCMPGTFP_VCMPGTFP_rec_VCMPGTSB_rec_VCMPGTSH_rec_VCMPGTSW_rec_VCMPGTUB_rec_VCMPGTUH_rec_VCMPGTUW_rec_XVCMPEQSP_XVCMPEQSP_rec_XVCMPGESP_XVCMPGESP_rec_XVCMPGTSP_XVCMPGTSP_rec = 486, |
3353 | | VCMPEQUD_rec_VCMPGTSD_rec_VCMPGTUD_rec = 487, |
3354 | | VCMPEQUQ_VCMPEQUQ_rec_VCMPGTSQ_VCMPGTSQ_rec_VCMPGTUQ_VCMPGTUQ_rec = 488, |
3355 | | VCMPNEB_rec_VCMPNEH_rec_VCMPNEW_rec_VCMPNEZB_rec_VCMPNEZH_rec_VCMPNEZW_rec = 489, |
3356 | | VCMPSQ_VCMPUQ = 490, |
3357 | | XSMAXCDP_XSMAXJDP_XSMINCDP_XSMINJDP = 491, |
3358 | | TRAP = 492, |
3359 | | SRAWI_rec = 493, |
3360 | | VRLQ_VRLQNM_VSLQ_VSRAQ_VSRQ = 494, |
3361 | | VRLQMI = 495, |
3362 | | DSS_DSSALL = 496, |
3363 | | WAITP10 = 497, |
3364 | | ADDI_ADDI8_LI_LI8_ADDIS_ADDIS8_LIS_LIS8_NEG_NEG8_NEG8O_NEGO = 498, |
3365 | | ADDIdtprelL32_ADDISdtprelHA32 = 499, |
3366 | | ADDItlsldLADDR32 = 500, |
3367 | | ADDIC_ADDIC8_ADDME_ADDME8_SUBFIC_SUBFIC8_SUBFME_SUBFME8_SUBFZE_SUBFZE8 = 501, |
3368 | | ADDME8O_ADDMEO_ADDZE8O_ADDZEO_ANDI8_rec_ANDIS8_rec_SUBFME8O_SUBFMEO_SUBFZE8O_SUBFZEO = 502, |
3369 | | ADDZE_ADDZE8 = 503, |
3370 | | ANDI_rec_ANDIS_rec = 504, |
3371 | | CMPDI_CMPWI_CMPLDI_CMPLWI = 505, |
3372 | | EXTSB_EXTSB8_EXTSB8_32_64_EXTSB8_rec_EXTSB_rec_EXTSH_EXTSH8_EXTSH8_32_64_EXTSH8_rec_EXTSH_rec_EXTSW_EXTSW_32_EXTSW_32_64_EXTSW_32_64_rec_EXTSW_rec = 506, |
3373 | | FABSD_FABSS_FMR_FNABSD_FNABSS_FNEGD_FNEGS = 507, |
3374 | | NEG8_rec_NEG_rec_ORI_ORI8_ORIS_ORIS8_XORI_XORI8_XORIS_XORIS8 = 508, |
3375 | | NOP = 509, |
3376 | | RLDICL_RLDICL_32_RLDICL_32_64_RLDICR_RLDICR_32 = 510, |
3377 | | RLWINM_RLWINM8 = 511, |
3378 | | SETB_SETB8 = 512, |
3379 | | SETBC_SETBC8_SETBCR_SETBCR8_SETNBC_SETNBC8_SETNBCR_SETNBCR8 = 513, |
3380 | | SRAWI = 514, |
3381 | | VEXTSB2D_VEXTSB2Ds_VEXTSB2W_VEXTSB2Ws_VEXTSH2D_VEXTSH2Ds_VEXTSH2W_VEXTSH2Ws_VEXTSW2D_VEXTSW2Ds_VNEGD_VNEGW = 515, |
3382 | | VEXTSD2Q = 516, |
3383 | | XSABSDP_XSNABSDP_XSNABSDPs_XSNEGDP = 517, |
3384 | | XSABSQP_XSNABSQP_XSNEGQP_XSXEXPQP_XVXEXPDP_XVXEXPSP = 518, |
3385 | | XVABSDP_XVNABSDP_XVNEGDP = 519, |
3386 | | XVXSIGDP_XVXSIGSP = 520, |
3387 | | ADDE8O_ADDEO_SUBFE8O_SUBFEO_SUBF8O_SUBFO = 521, |
3388 | | ADDEX_ADDEX8 = 522, |
3389 | | ADD4O_ADD8O = 523, |
3390 | | CMPB_CMPB8 = 524, |
3391 | | CRAND_CRANDC_CR6SET_CREQV_CRSET_CRNAND_CRNOR_CROR_CRORC_CR6UNSET_CRUNSET = 525, |
3392 | | DST_DST64_DSTT_DSTT64_DSTST_DSTST64_DSTSTT_DSTSTT64 = 526, |
3393 | | VRLDNM_VRLWNM_V_SET0_V_SET0B_V_SET0H_XSCPSGNQP_XSIEXPQP_XVIEXPDP_XVIEXPSP = 527, |
3394 | | XXLEQVOnes = 528, |
3395 | | MFFS_MFFS_rec_MFFSL = 529, |
3396 | | MFFSCDRNI_MFFSCRNI = 530, |
3397 | | MTFSB0 = 531, |
3398 | | ADDIC_rec_ADDME8_rec_ADDME_rec_ADDME8O_rec_ADDMEO_rec_ADDZE8_rec_ADDZE_rec_ADDZE8O_rec_ADDZEO_rec_SUBFME8_rec_SUBFME_rec_SUBFME8O_rec_SUBFMEO_rec_SUBFZE8_rec_SUBFZE_rec_SUBFZE8O_rec_SUBFZEO_rec = 532, |
3399 | | NEG8O_rec_NEGO_rec = 533, |
3400 | | ADDE8_rec_ADDE_rec_ADDE8O_rec_ADDEO_rec_SUBFE8_rec_SUBFE_rec_SUBFE8O_rec_SUBFEO_rec_SUBF8O_rec_SUBFO_rec = 534, |
3401 | | HRFID_SC = 535, |
3402 | | MTFSFI_MTFSFIb_MTFSFI_rec = 536, |
3403 | | FABSD_rec_FABSS_rec_FMR_rec_FNABSD_rec_FNABSS_rec_FNEGD_rec_FNEGS_rec = 537, |
3404 | | ADDC8_rec_ADDC_rec_SUBFC8_rec_SUBFC_rec = 538, |
3405 | | VSTRIBL_rec_VSTRIBR_rec_VSTRIHL_rec_VSTRIHR_rec = 539, |
3406 | | LBZ_LBZ8_LHZ_LHZ8_LWZ_LWZ8 = 540, |
3407 | | LD = 541, |
3408 | | LDtoc_LDtocBA_LDtocCPT_LDtocJTI_LDtocL_SPILLTOVSR_LD_LWZtoc_LWZtocL = 542, |
3409 | | DFLOADf32 = 543, |
3410 | | DFLOADf64 = 544, |
3411 | | LFD = 545, |
3412 | | LHA_LHA8 = 546, |
3413 | | LXSD_LXV = 547, |
3414 | | DCBT_DCBTST = 548, |
3415 | | ICBT = 549, |
3416 | | LDBRX = 550, |
3417 | | SPILLTOVSR_LDX = 551, |
3418 | | LXVRBX_LXVRDX_LXVRHX_LXVRWX = 552, |
3419 | | MTSR = 553, |
3420 | | MTVRSAVE_MTVRSAVEv = 554, |
3421 | | LBZCIX_LDCIX_LHZCIX_LWZCIX = 555, |
3422 | | PLBZ_PLBZ8_PLBZ8pc_PLBZpc_PLD_PLDpc_PLFD_PLFDpc_PLFS_PLFSpc_PLHA_PLHA8_PLHA8pc_PLHApc_PLHZ_PLHZ8_PLHZ8pc_PLHZpc_PLWA_PLWA8_PLWA8pc_PLWApc_PLWZ_PLWZ8_PLWZ8pc_PLWZpc_PLXSD_PLXSDpc_PLXSSP_PLXSSPpc_PLXV_PLXVpc_PLXVP_PLXVPpc = 556, |
3423 | | LFS = 557, |
3424 | | LXSSP = 558, |
3425 | | LXVP = 559, |
3426 | | LXVPX = 560, |
3427 | | MFSR = 561, |
3428 | | MFTB8 = 562, |
3429 | | XXSETACCZ = 563, |
3430 | | XVBF16GER2_XVF16GER2_XVF32GER_XVF64GER_XVI16GER2_XVI16GER2S_XVI4GER8_XVI8GER4 = 564, |
3431 | | XVBF16GER2NN_XVBF16GER2NP_XVBF16GER2PN_XVBF16GER2PP_XVF16GER2NN_XVF16GER2NP_XVF16GER2PN_XVF16GER2PP_XVF32GERNN_XVF32GERNP_XVF32GERPN_XVF32GERPP_XVF64GERNN_XVF64GERNP_XVF64GERPN_XVF64GERPP_XVI16GER2PP_XVI16GER2SPP_XVI4GER8PP_XVI8GER4PP = 565, |
3432 | | XVI8GER4SPP = 566, |
3433 | | PMXVBF16GER2_PMXVF16GER2_PMXVF32GER_PMXVF64GER_PMXVI16GER2_PMXVI16GER2S_PMXVI4GER8_PMXVI8GER4 = 567, |
3434 | | PMXVBF16GER2NN_PMXVBF16GER2NP_PMXVBF16GER2PN_PMXVBF16GER2PP_PMXVF16GER2NN_PMXVF16GER2NP_PMXVF16GER2PN_PMXVF16GER2PP_PMXVF32GERNN_PMXVF32GERNP_PMXVF32GERPN_PMXVF32GERPP_PMXVF64GERNN_PMXVF64GERNP_PMXVF64GERPN_PMXVF64GERPP_PMXVI16GER2PP_PMXVI16GER2SPP_PMXVI4GER8PP_PMXVI8GER4PP = 568, |
3435 | | PMXVI8GER4SPP = 569, |
3436 | | XXMTACC = 570, |
3437 | | XXMFACC = 571, |
3438 | | VMULHSD_VMULHUD_VMULLD = 572, |
3439 | | LXVKQ = 573, |
3440 | | VSPLTISB_VSPLTISH_VSPLTISW = 574, |
3441 | | V_SETALLONES_V_SETALLONESB_V_SETALLONESH = 575, |
3442 | | XXSPLTIB = 576, |
3443 | | BRD_BRH_BRH8_BRW_BRW8 = 577, |
3444 | | MFVSRLD_MTVSRWS_VCLZLSBB_VCTZLSBB_VEXTRACTD_VEXTRACTUB_VEXTRACTUH_VEXTRACTUW_VINSERTD_VINSERTW_VPRTYBQ = 578, |
3445 | | VGBBD_VUPKHSW_VUPKLSW = 579, |
3446 | | VSPLTB_VSPLTBs_VSPLTH_VSPLTHs_VSPLTW_XXSPLTW_XXSPLTWs = 580, |
3447 | | VSTRIBL_VSTRIBR_VSTRIHL_VSTRIHR_XXGENPCVDM_XXGENPCVHM_XXGENPCVWM = 581, |
3448 | | VUPKHPX_VUPKHSB_VUPKHSH_VUPKLPX_VUPKLSB_VUPKLSH = 582, |
3449 | | XVCVBF16SPN = 583, |
3450 | | XXBRD_XXBRH_XXBRQ_XXBRW_XXEXTRACTUW = 584, |
3451 | | VBPERMQ_VPKSDSS_VPKSDUS_VPKUDUM_VPKUDUS = 585, |
3452 | | VCLRLB_VCLRRB_VINSD_VINSW_VSLDBI_VSRDBI = 586, |
3453 | | VPKPX_VPKSHSS_VPKSHUS_VPKSWSS_VPKSWUS_VPKUHUM_VPKUHUS_VPKUWUM_VPKUWUS = 587, |
3454 | | VSLV_VSRV_XXINSERTW = 588, |
3455 | | VEXTDDVLX_VEXTDDVRX_VEXTDUBVLX_VEXTDUBVRX_VEXTDUHVLX_VEXTDUHVRX_VEXTDUWVLX_VEXTDUWVRX_VINSBLX_VINSBRX_VINSBVLX_VINSBVRX_VINSDLX_VINSDRX_VINSHLX_VINSHRX_VINSHVLX_VINSHVRX_VINSWLX_VINSWRX_VINSWVLX_VINSWVRX = 589, |
3456 | | VSUMSWS = 590, |
3457 | | XXSPLTIDP_XXSPLTIW = 591, |
3458 | | XXSPLTI32DX = 592, |
3459 | | XXBLENDVB_XXBLENDVD_XXBLENDVH_XXBLENDVW_XXEVAL = 593, |
3460 | | XXPERMX = 594, |
3461 | | PSTXVP_PSTXVPpc = 595, |
3462 | | STB_STB8_STH_STH8_STW_STW8 = 596, |
3463 | | SPILLTOVSR_ST = 597, |
3464 | | STD = 598, |
3465 | | DFSTOREf32_DFSTOREf64 = 599, |
3466 | | STFD_STFS = 600, |
3467 | | STFDU_STFSU = 601, |
3468 | | STXSD = 602, |
3469 | | STXSSP = 603, |
3470 | | STXV = 604, |
3471 | | DCBF_DCBST_DCBZ = 605, |
3472 | | ICBI = 606, |
3473 | | SPILLTOVSR_STX = 607, |
3474 | | STIWX = 608, |
3475 | | STXVRBX_STXVRDX_STXVRHX_STXVRWX = 609, |
3476 | | EnforceIEIO = 610, |
3477 | | STHCIX_STWCIX = 611, |
3478 | | SYNCP10 = 612, |
3479 | | PSTB_PSTB8_PSTB8pc_PSTBpc_PSTD_PSTDpc_PSTFD_PSTFDpc_PSTFS_PSTFSpc_PSTH_PSTH8_PSTH8pc_PSTHpc_PSTW_PSTW8_PSTW8pc_PSTWpc_PSTXSD_PSTXSDpc_PSTXSSP_PSTXSSPpc_PSTXV_PSTXVpc = 613, |
3480 | | STXVP = 614, |
3481 | | STXVPX = 615, |
3482 | | ATTN_NAP = 616, |
3483 | | DCBZL = 617, |
3484 | | DCCCI_ICBLQ_ICCCI_TLBLD_TLBLI_TLBRE2_TLBSX2_TLBSX2D_TLBWE2 = 618, |
3485 | | CLRBHRB_MFBHRBE = 619, |
3486 | | PADDI_PADDI8_PADDI8pc_PADDIpc = 620, |
3487 | | PLI_PLI8 = 621, |
3488 | | VMULESB_VMULESH_VMULEUB_VMULEUH_VMULOSB_VMULOSH_VMULOUB_VMULOUH_VSUM2SWS_VSUM4SBS_VSUM4SHS_VSUM4UBS = 622, |
3489 | | VMULESD_VMULEUD_VMULHSW_VMULHUW_VMULOSD_VMULOUD = 623, |
3490 | | VMSUMCUD = 624, |
3491 | | SCHED_LIST_END = 625 |
3492 | | }; |
3493 | | } // end namespace Sched |
3494 | | } // end namespace PPC |
3495 | | } // end namespace llvm |
3496 | | #endif // GET_INSTRINFO_SCHED_ENUM |
3497 | | |
3498 | | #if defined(GET_INSTRINFO_MC_DESC) || defined(GET_INSTRINFO_CTOR_DTOR) |
3499 | | namespace llvm { |
3500 | | |
3501 | | struct PPCInstrTable { |
3502 | | MCInstrDesc Insts[2837]; |
3503 | | static_assert(alignof(MCInstrDesc) >= alignof(MCOperandInfo), "Unwanted padding between Insts and OperandInfo"); |
3504 | | MCOperandInfo OperandInfo[1272]; |
3505 | | static_assert(alignof(MCOperandInfo) >= alignof(MCPhysReg), "Unwanted padding between OperandInfo and ImplicitOps"); |
3506 | | MCPhysReg ImplicitOps[222]; |
3507 | | }; |
3508 | | |
3509 | | } // end namespace llvm |
3510 | | #endif // defined(GET_INSTRINFO_MC_DESC) || defined(GET_INSTRINFO_CTOR_DTOR) |
3511 | | |
3512 | | #ifdef GET_INSTRINFO_MC_DESC |
3513 | | #undef GET_INSTRINFO_MC_DESC |
3514 | | namespace llvm { |
3515 | | |
3516 | | static_assert(sizeof(MCOperandInfo) % sizeof(MCPhysReg) == 0); |
3517 | | static constexpr unsigned PPCImpOpBase = sizeof PPCInstrTable::OperandInfo / (sizeof(MCPhysReg)); |
3518 | | |
3519 | | extern const PPCInstrTable PPCDescs = { |
3520 | | { |
3521 | | { 2836, 4, 0, 4, 102, 2, 1, PPCImpOpBase + 109, 1268, 0|(1ULL<<MCID::Branch), 0x38ULL }, // Inst #2836 = gBCat |
3522 | | { 2835, 4, 0, 4, 102, 2, 2, PPCImpOpBase + 218, 1268, 0|(1ULL<<MCID::Branch), 0x38ULL }, // Inst #2835 = gBCLat |
3523 | | { 2834, 3, 0, 4, 445, 3, 2, PPCImpOpBase + 213, 1265, 0|(1ULL<<MCID::Branch), 0x38ULL }, // Inst #2834 = gBCLRL |
3524 | | { 2833, 3, 0, 4, 445, 3, 1, PPCImpOpBase + 112, 1265, 0|(1ULL<<MCID::Branch), 0x38ULL }, // Inst #2833 = gBCLR |
3525 | | { 2832, 4, 0, 4, 102, 2, 2, PPCImpOpBase + 218, 1261, 0|(1ULL<<MCID::Branch), 0x38ULL }, // Inst #2832 = gBCLAat |
3526 | | { 2831, 3, 0, 4, 102, 2, 2, PPCImpOpBase + 218, 1258, 0|(1ULL<<MCID::Branch), 0x38ULL }, // Inst #2831 = gBCLA |
3527 | | { 2830, 3, 0, 4, 102, 2, 2, PPCImpOpBase + 218, 1255, 0|(1ULL<<MCID::Branch), 0x38ULL }, // Inst #2830 = gBCL |
3528 | | { 2829, 3, 0, 4, 445, 3, 2, PPCImpOpBase + 213, 1265, 0|(1ULL<<MCID::Branch), 0x38ULL }, // Inst #2829 = gBCCTRL |
3529 | | { 2828, 3, 0, 4, 445, 3, 1, PPCImpOpBase + 112, 1265, 0|(1ULL<<MCID::Branch), 0x38ULL }, // Inst #2828 = gBCCTR |
3530 | | { 2827, 4, 0, 4, 102, 2, 1, PPCImpOpBase + 109, 1261, 0|(1ULL<<MCID::Branch), 0x38ULL }, // Inst #2827 = gBCAat |
3531 | | { 2826, 3, 0, 4, 102, 2, 1, PPCImpOpBase + 109, 1258, 0|(1ULL<<MCID::Branch), 0x38ULL }, // Inst #2826 = gBCA |
3532 | | { 2825, 3, 0, 4, 102, 2, 1, PPCImpOpBase + 109, 1255, 0|(1ULL<<MCID::Branch), 0x38ULL }, // Inst #2825 = gBC |
3533 | | { 2824, 3, 1, 4, 580, 0, 0, PPCImpOpBase + 0, 1243, 0, 0x0ULL }, // Inst #2824 = XXSPLTWs |
3534 | | { 2823, 3, 1, 4, 580, 0, 0, PPCImpOpBase + 0, 1252, 0, 0x0ULL }, // Inst #2823 = XXSPLTW |
3535 | | { 2822, 2, 1, 8, 591, 0, 0, PPCImpOpBase + 0, 618, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x80ULL }, // Inst #2822 = XXSPLTIW |
3536 | | { 2821, 2, 1, 8, 591, 0, 0, PPCImpOpBase + 0, 618, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x80ULL }, // Inst #2821 = XXSPLTIDP |
3537 | | { 2820, 2, 1, 4, 576, 0, 0, PPCImpOpBase + 0, 618, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2820 = XXSPLTIB |
3538 | | { 2819, 4, 1, 8, 592, 0, 0, PPCImpOpBase + 0, 1248, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x80ULL }, // Inst #2819 = XXSPLTI32DX |
3539 | | { 2818, 3, 1, 4, 165, 0, 0, PPCImpOpBase + 0, 1243, 0, 0x0ULL }, // Inst #2818 = XXSLDWIs |
3540 | | { 2817, 4, 1, 4, 165, 0, 0, PPCImpOpBase + 0, 1239, 0, 0x0ULL }, // Inst #2817 = XXSLDWI |
3541 | | { 2816, 1, 1, 4, 23, 0, 0, PPCImpOpBase + 0, 1247, 0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2816 = XXSETACCZW |
3542 | | { 2815, 1, 1, 4, 563, 0, 0, PPCImpOpBase + 0, 1246, 0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2815 = XXSETACCZ |
3543 | | { 2814, 4, 1, 4, 270, 0, 0, PPCImpOpBase + 0, 1209, 0, 0x0ULL }, // Inst #2814 = XXSEL |
3544 | | { 2813, 5, 1, 8, 594, 0, 0, PPCImpOpBase + 0, 1213, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #2813 = XXPERMX |
3545 | | { 2812, 4, 1, 4, 325, 0, 0, PPCImpOpBase + 0, 1235, 0, 0x0ULL }, // Inst #2812 = XXPERMR |
3546 | | { 2811, 3, 1, 4, 165, 0, 0, PPCImpOpBase + 0, 1243, 0, 0x0ULL }, // Inst #2811 = XXPERMDIs |
3547 | | { 2810, 4, 1, 4, 165, 0, 0, PPCImpOpBase + 0, 1239, 0, 0x0ULL }, // Inst #2810 = XXPERMDI |
3548 | | { 2809, 4, 1, 4, 325, 0, 0, PPCImpOpBase + 0, 1235, 0, 0x0ULL }, // Inst #2809 = XXPERM |
3549 | | { 2808, 2, 1, 4, 23, 0, 0, PPCImpOpBase + 0, 1233, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2808 = XXMTACCW |
3550 | | { 2807, 2, 1, 4, 570, 0, 0, PPCImpOpBase + 0, 1231, 0, 0x0ULL }, // Inst #2807 = XXMTACC |
3551 | | { 2806, 3, 1, 4, 165, 0, 0, PPCImpOpBase + 0, 1166, 0, 0x0ULL }, // Inst #2806 = XXMRGLW |
3552 | | { 2805, 3, 1, 4, 165, 0, 0, PPCImpOpBase + 0, 1166, 0, 0x0ULL }, // Inst #2805 = XXMRGHW |
3553 | | { 2804, 2, 1, 4, 23, 0, 0, PPCImpOpBase + 0, 1233, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2804 = XXMFACCW |
3554 | | { 2803, 2, 1, 4, 571, 0, 0, PPCImpOpBase + 0, 1231, 0, 0x0ULL }, // Inst #2803 = XXMFACC |
3555 | | { 2802, 1, 1, 4, 167, 0, 0, PPCImpOpBase + 0, 1228, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2802 = XXLXORz |
3556 | | { 2801, 1, 1, 4, 167, 0, 0, PPCImpOpBase + 0, 1230, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2801 = XXLXORspz |
3557 | | { 2800, 1, 1, 4, 167, 0, 0, PPCImpOpBase + 0, 1229, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2800 = XXLXORdpz |
3558 | | { 2799, 3, 1, 4, 167, 0, 0, PPCImpOpBase + 0, 1166, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2799 = XXLXOR |
3559 | | { 2798, 3, 1, 4, 167, 0, 0, PPCImpOpBase + 0, 1110, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2798 = XXLORf |
3560 | | { 2797, 3, 1, 4, 260, 0, 0, PPCImpOpBase + 0, 1166, 0, 0x0ULL }, // Inst #2797 = XXLORC |
3561 | | { 2796, 3, 1, 4, 167, 0, 0, PPCImpOpBase + 0, 1166, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2796 = XXLOR |
3562 | | { 2795, 3, 1, 4, 167, 0, 0, PPCImpOpBase + 0, 1166, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2795 = XXLNOR |
3563 | | { 2794, 3, 1, 4, 260, 0, 0, PPCImpOpBase + 0, 1166, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2794 = XXLNAND |
3564 | | { 2793, 1, 1, 4, 528, 0, 0, PPCImpOpBase + 0, 1228, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Bitcast)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2793 = XXLEQVOnes |
3565 | | { 2792, 3, 1, 4, 260, 0, 0, PPCImpOpBase + 0, 1166, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2792 = XXLEQV |
3566 | | { 2791, 3, 1, 4, 167, 0, 0, PPCImpOpBase + 0, 1166, 0, 0x0ULL }, // Inst #2791 = XXLANDC |
3567 | | { 2790, 3, 1, 4, 167, 0, 0, PPCImpOpBase + 0, 1166, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2790 = XXLAND |
3568 | | { 2789, 4, 1, 4, 588, 0, 0, PPCImpOpBase + 0, 1224, 0, 0x0ULL }, // Inst #2789 = XXINSERTW |
3569 | | { 2788, 3, 1, 4, 581, 0, 0, PPCImpOpBase + 0, 1221, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2788 = XXGENPCVWM |
3570 | | { 2787, 3, 1, 4, 581, 0, 0, PPCImpOpBase + 0, 1221, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2787 = XXGENPCVHM |
3571 | | { 2786, 3, 1, 4, 581, 0, 0, PPCImpOpBase + 0, 1221, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2786 = XXGENPCVDM |
3572 | | { 2785, 3, 1, 4, 464, 0, 0, PPCImpOpBase + 0, 1221, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2785 = XXGENPCVBM |
3573 | | { 2784, 3, 1, 4, 584, 0, 0, PPCImpOpBase + 0, 1218, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2784 = XXEXTRACTUW |
3574 | | { 2783, 5, 1, 8, 593, 0, 0, PPCImpOpBase + 0, 1213, 0, 0x80ULL }, // Inst #2783 = XXEVAL |
3575 | | { 2782, 2, 1, 4, 584, 0, 0, PPCImpOpBase + 0, 1164, 0, 0x0ULL }, // Inst #2782 = XXBRW |
3576 | | { 2781, 2, 1, 4, 584, 0, 0, PPCImpOpBase + 0, 1164, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2781 = XXBRQ |
3577 | | { 2780, 2, 1, 4, 584, 0, 0, PPCImpOpBase + 0, 1164, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2780 = XXBRH |
3578 | | { 2779, 2, 1, 4, 584, 0, 0, PPCImpOpBase + 0, 1164, 0, 0x0ULL }, // Inst #2779 = XXBRD |
3579 | | { 2778, 4, 1, 8, 593, 0, 0, PPCImpOpBase + 0, 1209, 0, 0x80ULL }, // Inst #2778 = XXBLENDVW |
3580 | | { 2777, 4, 1, 8, 593, 0, 0, PPCImpOpBase + 0, 1209, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #2777 = XXBLENDVH |
3581 | | { 2776, 4, 1, 8, 593, 0, 0, PPCImpOpBase + 0, 1209, 0, 0x80ULL }, // Inst #2776 = XXBLENDVD |
3582 | | { 2775, 4, 1, 8, 593, 0, 0, PPCImpOpBase + 0, 1209, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #2775 = XXBLENDVB |
3583 | | { 2774, 2, 1, 4, 520, 0, 0, PPCImpOpBase + 0, 1164, 0, 0x0ULL }, // Inst #2774 = XVXSIGSP |
3584 | | { 2773, 2, 1, 4, 520, 0, 0, PPCImpOpBase + 0, 1164, 0, 0x0ULL }, // Inst #2773 = XVXSIGDP |
3585 | | { 2772, 2, 1, 4, 518, 0, 0, PPCImpOpBase + 0, 1164, 0, 0x0ULL }, // Inst #2772 = XVXEXPSP |
3586 | | { 2771, 2, 1, 4, 518, 0, 0, PPCImpOpBase + 0, 1164, 0, 0x0ULL }, // Inst #2771 = XVXEXPDP |
3587 | | { 2770, 3, 1, 4, 481, 0, 0, PPCImpOpBase + 0, 1206, 0, 0x0ULL }, // Inst #2770 = XVTSTDCSP |
3588 | | { 2769, 3, 1, 4, 481, 0, 0, PPCImpOpBase + 0, 1206, 0, 0x0ULL }, // Inst #2769 = XVTSTDCDP |
3589 | | { 2768, 2, 1, 4, 480, 1, 0, PPCImpOpBase + 134, 1204, 0, 0x0ULL }, // Inst #2768 = XVTSQRTSP |
3590 | | { 2767, 2, 1, 4, 479, 1, 0, PPCImpOpBase + 134, 1204, 0, 0x0ULL }, // Inst #2767 = XVTSQRTDP |
3591 | | { 2766, 2, 1, 4, 471, 0, 0, PPCImpOpBase + 0, 1204, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2766 = XVTLSBB |
3592 | | { 2765, 3, 1, 4, 168, 1, 0, PPCImpOpBase + 134, 1201, 0, 0x0ULL }, // Inst #2765 = XVTDIVSP |
3593 | | { 2764, 3, 1, 4, 163, 1, 0, PPCImpOpBase + 134, 1201, 0, 0x0ULL }, // Inst #2764 = XVTDIVDP |
3594 | | { 2763, 3, 1, 4, 440, 1, 0, PPCImpOpBase + 134, 1166, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2763 = XVSUBSP |
3595 | | { 2762, 3, 1, 4, 439, 1, 0, PPCImpOpBase + 134, 1166, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2762 = XVSUBDP |
3596 | | { 2761, 2, 1, 4, 178, 1, 0, PPCImpOpBase + 134, 1164, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2761 = XVSQRTSP |
3597 | | { 2760, 2, 1, 4, 180, 1, 0, PPCImpOpBase + 134, 1164, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2760 = XVSQRTDP |
3598 | | { 2759, 2, 1, 4, 430, 1, 0, PPCImpOpBase + 134, 1164, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2759 = XVRSQRTESP |
3599 | | { 2758, 2, 1, 4, 433, 1, 0, PPCImpOpBase + 134, 1164, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2758 = XVRSQRTEDP |
3600 | | { 2757, 2, 1, 4, 433, 0, 0, PPCImpOpBase + 0, 1164, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2757 = XVRSPIZ |
3601 | | { 2756, 2, 1, 4, 433, 0, 0, PPCImpOpBase + 0, 1164, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2756 = XVRSPIP |
3602 | | { 2755, 2, 1, 4, 433, 0, 0, PPCImpOpBase + 0, 1164, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2755 = XVRSPIM |
3603 | | { 2754, 2, 1, 4, 433, 1, 0, PPCImpOpBase + 134, 1164, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2754 = XVRSPIC |
3604 | | { 2753, 2, 1, 4, 433, 0, 0, PPCImpOpBase + 0, 1164, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2753 = XVRSPI |
3605 | | { 2752, 2, 1, 4, 430, 1, 0, PPCImpOpBase + 134, 1164, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2752 = XVRESP |
3606 | | { 2751, 2, 1, 4, 433, 1, 0, PPCImpOpBase + 134, 1164, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2751 = XVREDP |
3607 | | { 2750, 2, 1, 4, 433, 0, 0, PPCImpOpBase + 0, 1164, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2750 = XVRDPIZ |
3608 | | { 2749, 2, 1, 4, 433, 0, 0, PPCImpOpBase + 0, 1164, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2749 = XVRDPIP |
3609 | | { 2748, 2, 1, 4, 433, 0, 0, PPCImpOpBase + 0, 1164, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2748 = XVRDPIM |
3610 | | { 2747, 2, 1, 4, 433, 1, 0, PPCImpOpBase + 134, 1164, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2747 = XVRDPIC |
3611 | | { 2746, 2, 1, 4, 433, 0, 0, PPCImpOpBase + 0, 1164, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2746 = XVRDPI |
3612 | | { 2745, 4, 1, 4, 189, 1, 0, PPCImpOpBase + 134, 1197, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2745 = XVNMSUBMSP |
3613 | | { 2744, 4, 1, 4, 192, 1, 0, PPCImpOpBase + 134, 1197, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2744 = XVNMSUBMDP |
3614 | | { 2743, 4, 1, 4, 189, 1, 0, PPCImpOpBase + 134, 1197, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2743 = XVNMSUBASP |
3615 | | { 2742, 4, 1, 4, 192, 1, 0, PPCImpOpBase + 134, 1197, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2742 = XVNMSUBADP |
3616 | | { 2741, 4, 1, 4, 189, 1, 0, PPCImpOpBase + 134, 1197, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2741 = XVNMADDMSP |
3617 | | { 2740, 4, 1, 4, 192, 1, 0, PPCImpOpBase + 134, 1197, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2740 = XVNMADDMDP |
3618 | | { 2739, 4, 1, 4, 189, 1, 0, PPCImpOpBase + 134, 1197, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2739 = XVNMADDASP |
3619 | | { 2738, 4, 1, 4, 192, 1, 0, PPCImpOpBase + 134, 1197, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2738 = XVNMADDADP |
3620 | | { 2737, 2, 1, 4, 266, 1, 0, PPCImpOpBase + 134, 1164, 0, 0x0ULL }, // Inst #2737 = XVNEGSP |
3621 | | { 2736, 2, 1, 4, 519, 1, 0, PPCImpOpBase + 134, 1164, 0, 0x0ULL }, // Inst #2736 = XVNEGDP |
3622 | | { 2735, 2, 1, 4, 266, 1, 0, PPCImpOpBase + 134, 1164, 0, 0x0ULL }, // Inst #2735 = XVNABSSP |
3623 | | { 2734, 2, 1, 4, 519, 1, 0, PPCImpOpBase + 134, 1164, 0, 0x0ULL }, // Inst #2734 = XVNABSDP |
3624 | | { 2733, 3, 1, 4, 440, 1, 0, PPCImpOpBase + 134, 1166, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2733 = XVMULSP |
3625 | | { 2732, 3, 1, 4, 439, 1, 0, PPCImpOpBase + 134, 1166, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2732 = XVMULDP |
3626 | | { 2731, 4, 1, 4, 189, 1, 0, PPCImpOpBase + 134, 1197, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2731 = XVMSUBMSP |
3627 | | { 2730, 4, 1, 4, 192, 1, 0, PPCImpOpBase + 134, 1197, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2730 = XVMSUBMDP |
3628 | | { 2729, 4, 1, 4, 189, 1, 0, PPCImpOpBase + 134, 1197, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2729 = XVMSUBASP |
3629 | | { 2728, 4, 1, 4, 192, 1, 0, PPCImpOpBase + 134, 1197, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2728 = XVMSUBADP |
3630 | | { 2727, 3, 1, 4, 161, 1, 0, PPCImpOpBase + 134, 1166, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2727 = XVMINSP |
3631 | | { 2726, 3, 1, 4, 161, 1, 0, PPCImpOpBase + 134, 1166, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2726 = XVMINDP |
3632 | | { 2725, 3, 1, 4, 161, 1, 0, PPCImpOpBase + 134, 1166, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2725 = XVMAXSP |
3633 | | { 2724, 3, 1, 4, 161, 1, 0, PPCImpOpBase + 134, 1166, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2724 = XVMAXDP |
3634 | | { 2723, 4, 1, 4, 189, 1, 0, PPCImpOpBase + 134, 1197, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2723 = XVMADDMSP |
3635 | | { 2722, 4, 1, 4, 192, 1, 0, PPCImpOpBase + 134, 1197, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2722 = XVMADDMDP |
3636 | | { 2721, 4, 1, 4, 189, 1, 0, PPCImpOpBase + 134, 1197, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2721 = XVMADDASP |
3637 | | { 2720, 4, 1, 4, 192, 1, 0, PPCImpOpBase + 134, 1197, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2720 = XVMADDADP |
3638 | | { 2719, 3, 1, 4, 527, 0, 0, PPCImpOpBase + 0, 1166, 0, 0x0ULL }, // Inst #2719 = XVIEXPSP |
3639 | | { 2718, 3, 1, 4, 527, 0, 0, PPCImpOpBase + 0, 1166, 0, 0x0ULL }, // Inst #2718 = XVIEXPDP |
3640 | | { 2717, 4, 1, 4, 23, 0, 0, PPCImpOpBase + 0, 1179, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2717 = XVI8GER4WSPP |
3641 | | { 2716, 4, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1179, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2716 = XVI8GER4WPP |
3642 | | { 2715, 3, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1176, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2715 = XVI8GER4W |
3643 | | { 2714, 4, 1, 4, 566, 0, 0, PPCImpOpBase + 0, 1172, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2714 = XVI8GER4SPP |
3644 | | { 2713, 4, 1, 4, 565, 0, 0, PPCImpOpBase + 0, 1172, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2713 = XVI8GER4PP |
3645 | | { 2712, 3, 1, 4, 564, 0, 0, PPCImpOpBase + 0, 1169, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2712 = XVI8GER4 |
3646 | | { 2711, 4, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1179, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2711 = XVI4GER8WPP |
3647 | | { 2710, 3, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1176, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2710 = XVI4GER8W |
3648 | | { 2709, 4, 1, 4, 565, 0, 0, PPCImpOpBase + 0, 1172, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2709 = XVI4GER8PP |
3649 | | { 2708, 3, 1, 4, 564, 0, 0, PPCImpOpBase + 0, 1169, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2708 = XVI4GER8 |
3650 | | { 2707, 4, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1179, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2707 = XVI16GER2WPP |
3651 | | { 2706, 3, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1176, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2706 = XVI16GER2W |
3652 | | { 2705, 4, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1179, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2705 = XVI16GER2SWPP |
3653 | | { 2704, 3, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1176, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2704 = XVI16GER2SW |
3654 | | { 2703, 4, 1, 4, 565, 0, 0, PPCImpOpBase + 0, 1172, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2703 = XVI16GER2SPP |
3655 | | { 2702, 3, 1, 4, 564, 0, 0, PPCImpOpBase + 0, 1169, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2702 = XVI16GER2S |
3656 | | { 2701, 4, 1, 4, 565, 0, 0, PPCImpOpBase + 0, 1172, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2701 = XVI16GER2PP |
3657 | | { 2700, 3, 1, 4, 564, 0, 0, PPCImpOpBase + 0, 1169, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2700 = XVI16GER2 |
3658 | | { 2699, 4, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1193, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2699 = XVF64GERWPP |
3659 | | { 2698, 4, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1193, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2698 = XVF64GERWPN |
3660 | | { 2697, 4, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1193, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2697 = XVF64GERWNP |
3661 | | { 2696, 4, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1193, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2696 = XVF64GERWNN |
3662 | | { 2695, 3, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1190, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2695 = XVF64GERW |
3663 | | { 2694, 4, 1, 4, 565, 0, 0, PPCImpOpBase + 0, 1186, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2694 = XVF64GERPP |
3664 | | { 2693, 4, 1, 4, 565, 0, 0, PPCImpOpBase + 0, 1186, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2693 = XVF64GERPN |
3665 | | { 2692, 4, 1, 4, 565, 0, 0, PPCImpOpBase + 0, 1186, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2692 = XVF64GERNP |
3666 | | { 2691, 4, 1, 4, 565, 0, 0, PPCImpOpBase + 0, 1186, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2691 = XVF64GERNN |
3667 | | { 2690, 3, 1, 4, 564, 0, 0, PPCImpOpBase + 0, 1183, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2690 = XVF64GER |
3668 | | { 2689, 4, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1179, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2689 = XVF32GERWPP |
3669 | | { 2688, 4, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1179, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2688 = XVF32GERWPN |
3670 | | { 2687, 4, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1179, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2687 = XVF32GERWNP |
3671 | | { 2686, 4, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1179, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2686 = XVF32GERWNN |
3672 | | { 2685, 3, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1176, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2685 = XVF32GERW |
3673 | | { 2684, 4, 1, 4, 565, 0, 0, PPCImpOpBase + 0, 1172, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2684 = XVF32GERPP |
3674 | | { 2683, 4, 1, 4, 565, 0, 0, PPCImpOpBase + 0, 1172, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2683 = XVF32GERPN |
3675 | | { 2682, 4, 1, 4, 565, 0, 0, PPCImpOpBase + 0, 1172, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2682 = XVF32GERNP |
3676 | | { 2681, 4, 1, 4, 565, 0, 0, PPCImpOpBase + 0, 1172, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2681 = XVF32GERNN |
3677 | | { 2680, 3, 1, 4, 564, 0, 0, PPCImpOpBase + 0, 1169, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2680 = XVF32GER |
3678 | | { 2679, 4, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1179, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2679 = XVF16GER2WPP |
3679 | | { 2678, 4, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1179, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2678 = XVF16GER2WPN |
3680 | | { 2677, 4, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1179, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2677 = XVF16GER2WNP |
3681 | | { 2676, 4, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1179, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2676 = XVF16GER2WNN |
3682 | | { 2675, 3, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1176, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2675 = XVF16GER2W |
3683 | | { 2674, 4, 1, 4, 565, 0, 0, PPCImpOpBase + 0, 1172, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2674 = XVF16GER2PP |
3684 | | { 2673, 4, 1, 4, 565, 0, 0, PPCImpOpBase + 0, 1172, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2673 = XVF16GER2PN |
3685 | | { 2672, 4, 1, 4, 565, 0, 0, PPCImpOpBase + 0, 1172, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2672 = XVF16GER2NP |
3686 | | { 2671, 4, 1, 4, 565, 0, 0, PPCImpOpBase + 0, 1172, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2671 = XVF16GER2NN |
3687 | | { 2670, 3, 1, 4, 564, 0, 0, PPCImpOpBase + 0, 1169, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2670 = XVF16GER2 |
3688 | | { 2669, 3, 1, 4, 177, 1, 0, PPCImpOpBase + 134, 1166, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2669 = XVDIVSP |
3689 | | { 2668, 3, 1, 4, 179, 1, 0, PPCImpOpBase + 134, 1166, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2668 = XVDIVDP |
3690 | | { 2667, 2, 1, 4, 430, 1, 0, PPCImpOpBase + 134, 1164, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2667 = XVCVUXWSP |
3691 | | { 2666, 2, 1, 4, 433, 1, 0, PPCImpOpBase + 134, 1164, 0, 0x0ULL }, // Inst #2666 = XVCVUXWDP |
3692 | | { 2665, 2, 1, 4, 430, 1, 0, PPCImpOpBase + 134, 1164, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2665 = XVCVUXDSP |
3693 | | { 2664, 2, 1, 4, 433, 1, 0, PPCImpOpBase + 134, 1164, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2664 = XVCVUXDDP |
3694 | | { 2663, 2, 1, 4, 430, 1, 0, PPCImpOpBase + 134, 1164, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2663 = XVCVSXWSP |
3695 | | { 2662, 2, 1, 4, 433, 1, 0, PPCImpOpBase + 134, 1164, 0, 0x0ULL }, // Inst #2662 = XVCVSXWDP |
3696 | | { 2661, 2, 1, 4, 430, 1, 0, PPCImpOpBase + 134, 1164, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2661 = XVCVSXDSP |
3697 | | { 2660, 2, 1, 4, 433, 1, 0, PPCImpOpBase + 134, 1164, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2660 = XVCVSXDDP |
3698 | | { 2659, 2, 1, 4, 433, 1, 0, PPCImpOpBase + 134, 1164, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2659 = XVCVSPUXWS |
3699 | | { 2658, 2, 1, 4, 433, 1, 0, PPCImpOpBase + 134, 1164, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2658 = XVCVSPUXDS |
3700 | | { 2657, 2, 1, 4, 433, 1, 0, PPCImpOpBase + 134, 1164, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2657 = XVCVSPSXWS |
3701 | | { 2656, 2, 1, 4, 433, 1, 0, PPCImpOpBase + 134, 1164, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2656 = XVCVSPSXDS |
3702 | | { 2655, 2, 1, 4, 429, 0, 0, PPCImpOpBase + 0, 1164, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2655 = XVCVSPHP |
3703 | | { 2654, 2, 1, 4, 193, 1, 0, PPCImpOpBase + 134, 1164, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2654 = XVCVSPDP |
3704 | | { 2653, 2, 1, 4, 434, 0, 0, PPCImpOpBase + 0, 1164, 0, 0x0ULL }, // Inst #2653 = XVCVSPBF16 |
3705 | | { 2652, 2, 1, 4, 310, 0, 0, PPCImpOpBase + 0, 1164, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2652 = XVCVHPSP |
3706 | | { 2651, 2, 1, 4, 433, 1, 0, PPCImpOpBase + 134, 1164, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2651 = XVCVDPUXWS |
3707 | | { 2650, 2, 1, 4, 433, 1, 0, PPCImpOpBase + 134, 1164, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2650 = XVCVDPUXDS |
3708 | | { 2649, 2, 1, 4, 433, 1, 0, PPCImpOpBase + 134, 1164, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2649 = XVCVDPSXWS |
3709 | | { 2648, 2, 1, 4, 433, 1, 0, PPCImpOpBase + 134, 1164, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2648 = XVCVDPSXDS |
3710 | | { 2647, 2, 1, 4, 430, 1, 0, PPCImpOpBase + 134, 1164, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2647 = XVCVDPSP |
3711 | | { 2646, 2, 1, 4, 583, 0, 0, PPCImpOpBase + 0, 1164, 0, 0x0ULL }, // Inst #2646 = XVCVBF16SPN |
3712 | | { 2645, 3, 1, 4, 267, 1, 0, PPCImpOpBase + 134, 1166, 0, 0x0ULL }, // Inst #2645 = XVCPSGNSP |
3713 | | { 2644, 3, 1, 4, 265, 1, 0, PPCImpOpBase + 134, 1166, 0, 0x0ULL }, // Inst #2644 = XVCPSGNDP |
3714 | | { 2643, 3, 1, 4, 486, 1, 1, PPCImpOpBase + 211, 1166, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2643 = XVCMPGTSP_rec |
3715 | | { 2642, 3, 1, 4, 486, 1, 0, PPCImpOpBase + 134, 1166, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2642 = XVCMPGTSP |
3716 | | { 2641, 3, 1, 4, 162, 1, 1, PPCImpOpBase + 211, 1166, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2641 = XVCMPGTDP_rec |
3717 | | { 2640, 3, 1, 4, 162, 1, 0, PPCImpOpBase + 134, 1166, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2640 = XVCMPGTDP |
3718 | | { 2639, 3, 1, 4, 486, 1, 1, PPCImpOpBase + 211, 1166, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2639 = XVCMPGESP_rec |
3719 | | { 2638, 3, 1, 4, 486, 1, 0, PPCImpOpBase + 134, 1166, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2638 = XVCMPGESP |
3720 | | { 2637, 3, 1, 4, 162, 1, 1, PPCImpOpBase + 211, 1166, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2637 = XVCMPGEDP_rec |
3721 | | { 2636, 3, 1, 4, 162, 1, 0, PPCImpOpBase + 134, 1166, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2636 = XVCMPGEDP |
3722 | | { 2635, 3, 1, 4, 486, 1, 1, PPCImpOpBase + 211, 1166, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2635 = XVCMPEQSP_rec |
3723 | | { 2634, 3, 1, 4, 486, 1, 0, PPCImpOpBase + 134, 1166, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2634 = XVCMPEQSP |
3724 | | { 2633, 3, 1, 4, 162, 1, 1, PPCImpOpBase + 211, 1166, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2633 = XVCMPEQDP_rec |
3725 | | { 2632, 3, 1, 4, 162, 1, 0, PPCImpOpBase + 134, 1166, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2632 = XVCMPEQDP |
3726 | | { 2631, 4, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1179, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2631 = XVBF16GER2WPP |
3727 | | { 2630, 4, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1179, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2630 = XVBF16GER2WPN |
3728 | | { 2629, 4, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1179, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2629 = XVBF16GER2WNP |
3729 | | { 2628, 4, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1179, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2628 = XVBF16GER2WNN |
3730 | | { 2627, 3, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1176, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2627 = XVBF16GER2W |
3731 | | { 2626, 4, 1, 4, 565, 0, 0, PPCImpOpBase + 0, 1172, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2626 = XVBF16GER2PP |
3732 | | { 2625, 4, 1, 4, 565, 0, 0, PPCImpOpBase + 0, 1172, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2625 = XVBF16GER2PN |
3733 | | { 2624, 4, 1, 4, 565, 0, 0, PPCImpOpBase + 0, 1172, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2624 = XVBF16GER2NP |
3734 | | { 2623, 4, 1, 4, 565, 0, 0, PPCImpOpBase + 0, 1172, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2623 = XVBF16GER2NN |
3735 | | { 2622, 3, 1, 4, 564, 0, 0, PPCImpOpBase + 0, 1169, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2622 = XVBF16GER2 |
3736 | | { 2621, 3, 1, 4, 440, 1, 0, PPCImpOpBase + 134, 1166, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2621 = XVADDSP |
3737 | | { 2620, 3, 1, 4, 439, 1, 0, PPCImpOpBase + 134, 1166, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2620 = XVADDDP |
3738 | | { 2619, 2, 1, 4, 266, 1, 0, PPCImpOpBase + 134, 1164, 0, 0x0ULL }, // Inst #2619 = XVABSSP |
3739 | | { 2618, 2, 1, 4, 519, 1, 0, PPCImpOpBase + 134, 1164, 0, 0x0ULL }, // Inst #2618 = XVABSDP |
3740 | | { 2617, 2, 1, 4, 463, 0, 0, PPCImpOpBase + 0, 299, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2617 = XSXSIGQP |
3741 | | { 2616, 2, 1, 4, 277, 0, 0, PPCImpOpBase + 0, 660, 0, 0x0ULL }, // Inst #2616 = XSXSIGDP |
3742 | | { 2615, 2, 1, 4, 518, 0, 0, PPCImpOpBase + 0, 299, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2615 = XSXEXPQP |
3743 | | { 2614, 2, 1, 4, 293, 0, 0, PPCImpOpBase + 0, 660, 0, 0x0ULL }, // Inst #2614 = XSXEXPDP |
3744 | | { 2613, 3, 1, 4, 275, 0, 0, PPCImpOpBase + 0, 1158, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2613 = XSTSTDCSP |
3745 | | { 2612, 3, 1, 4, 463, 0, 0, PPCImpOpBase + 0, 1161, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2612 = XSTSTDCQP |
3746 | | { 2611, 3, 1, 4, 275, 0, 0, PPCImpOpBase + 0, 1158, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2611 = XSTSTDCDP |
3747 | | { 2610, 2, 1, 4, 478, 1, 0, PPCImpOpBase + 134, 1156, 0, 0x0ULL }, // Inst #2610 = XSTSQRTDP |
3748 | | { 2609, 3, 1, 4, 160, 1, 0, PPCImpOpBase + 134, 1119, 0, 0x0ULL }, // Inst #2609 = XSTDIVDP |
3749 | | { 2608, 3, 1, 4, 187, 0, 0, PPCImpOpBase + 0, 1113, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2608 = XSSUBSP |
3750 | | { 2607, 3, 1, 4, 327, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2607 = XSSUBQPO |
3751 | | { 2606, 3, 1, 4, 327, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2606 = XSSUBQP |
3752 | | { 2605, 3, 1, 4, 187, 1, 0, PPCImpOpBase + 134, 1110, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2605 = XSSUBDP |
3753 | | { 2604, 2, 1, 4, 173, 0, 0, PPCImpOpBase + 0, 1126, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2604 = XSSQRTSP |
3754 | | { 2603, 2, 1, 4, 332, 0, 0, PPCImpOpBase + 0, 299, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2603 = XSSQRTQPO |
3755 | | { 2602, 2, 1, 4, 332, 0, 0, PPCImpOpBase + 0, 299, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2602 = XSSQRTQP |
3756 | | { 2601, 2, 1, 4, 175, 1, 0, PPCImpOpBase + 134, 1108, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2601 = XSSQRTDP |
3757 | | { 2600, 2, 1, 4, 188, 0, 0, PPCImpOpBase + 0, 1126, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2600 = XSRSQRTESP |
3758 | | { 2599, 2, 1, 4, 432, 1, 0, PPCImpOpBase + 134, 1108, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2599 = XSRSQRTEDP |
3759 | | { 2598, 2, 1, 4, 188, 0, 0, PPCImpOpBase + 0, 1132, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2598 = XSRSP |
3760 | | { 2597, 4, 1, 4, 451, 0, 0, PPCImpOpBase + 0, 1152, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2597 = XSRQPXP |
3761 | | { 2596, 4, 1, 4, 451, 0, 0, PPCImpOpBase + 0, 1152, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2596 = XSRQPIX |
3762 | | { 2595, 4, 1, 4, 451, 0, 0, PPCImpOpBase + 0, 1152, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2595 = XSRQPI |
3763 | | { 2594, 2, 1, 4, 188, 0, 0, PPCImpOpBase + 0, 1126, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2594 = XSRESP |
3764 | | { 2593, 2, 1, 4, 432, 1, 0, PPCImpOpBase + 134, 1108, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2593 = XSREDP |
3765 | | { 2592, 2, 1, 4, 432, 0, 0, PPCImpOpBase + 0, 1108, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2592 = XSRDPIZ |
3766 | | { 2591, 2, 1, 4, 432, 0, 0, PPCImpOpBase + 0, 1108, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2591 = XSRDPIP |
3767 | | { 2590, 2, 1, 4, 432, 0, 0, PPCImpOpBase + 0, 1108, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2590 = XSRDPIM |
3768 | | { 2589, 2, 1, 4, 432, 1, 0, PPCImpOpBase + 134, 1108, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2589 = XSRDPIC |
3769 | | { 2588, 2, 1, 4, 432, 0, 0, PPCImpOpBase + 0, 1108, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2588 = XSRDPI |
3770 | | { 2587, 4, 1, 4, 329, 0, 0, PPCImpOpBase + 0, 1148, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2587 = XSNMSUBQPO |
3771 | | { 2586, 4, 1, 4, 329, 0, 0, PPCImpOpBase + 0, 1148, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2586 = XSNMSUBQP |
3772 | | { 2585, 4, 1, 4, 318, 0, 0, PPCImpOpBase + 0, 1144, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2585 = XSNMSUBMSP |
3773 | | { 2584, 4, 1, 4, 318, 1, 0, PPCImpOpBase + 134, 1140, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2584 = XSNMSUBMDP |
3774 | | { 2583, 4, 1, 4, 318, 0, 0, PPCImpOpBase + 0, 1144, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2583 = XSNMSUBASP |
3775 | | { 2582, 4, 1, 4, 318, 1, 0, PPCImpOpBase + 134, 1140, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2582 = XSNMSUBADP |
3776 | | { 2581, 4, 1, 4, 329, 0, 0, PPCImpOpBase + 0, 1148, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2581 = XSNMADDQPO |
3777 | | { 2580, 4, 1, 4, 329, 0, 0, PPCImpOpBase + 0, 1148, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2580 = XSNMADDQP |
3778 | | { 2579, 4, 1, 4, 318, 0, 0, PPCImpOpBase + 0, 1144, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2579 = XSNMADDMSP |
3779 | | { 2578, 4, 1, 4, 318, 1, 0, PPCImpOpBase + 134, 1140, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2578 = XSNMADDMDP |
3780 | | { 2577, 4, 1, 4, 318, 0, 0, PPCImpOpBase + 0, 1144, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2577 = XSNMADDASP |
3781 | | { 2576, 4, 1, 4, 318, 1, 0, PPCImpOpBase + 134, 1140, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2576 = XSNMADDADP |
3782 | | { 2575, 2, 1, 4, 518, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2575 = XSNEGQP |
3783 | | { 2574, 2, 1, 4, 517, 1, 0, PPCImpOpBase + 134, 1108, 0, 0x0ULL }, // Inst #2574 = XSNEGDP |
3784 | | { 2573, 2, 1, 4, 518, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2573 = XSNABSQP |
3785 | | { 2572, 2, 1, 4, 517, 1, 0, PPCImpOpBase + 134, 1126, 0, 0x0ULL }, // Inst #2572 = XSNABSDPs |
3786 | | { 2571, 2, 1, 4, 517, 1, 0, PPCImpOpBase + 134, 1108, 0, 0x0ULL }, // Inst #2571 = XSNABSDP |
3787 | | { 2570, 3, 1, 4, 438, 0, 0, PPCImpOpBase + 0, 1113, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2570 = XSMULSP |
3788 | | { 2569, 3, 1, 4, 454, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2569 = XSMULQPO |
3789 | | { 2568, 3, 1, 4, 454, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2568 = XSMULQP |
3790 | | { 2567, 3, 1, 4, 438, 1, 0, PPCImpOpBase + 134, 1110, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2567 = XSMULDP |
3791 | | { 2566, 4, 1, 4, 329, 0, 0, PPCImpOpBase + 0, 1148, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2566 = XSMSUBQPO |
3792 | | { 2565, 4, 1, 4, 329, 0, 0, PPCImpOpBase + 0, 1148, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2565 = XSMSUBQP |
3793 | | { 2564, 4, 1, 4, 318, 0, 0, PPCImpOpBase + 0, 1144, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2564 = XSMSUBMSP |
3794 | | { 2563, 4, 1, 4, 318, 1, 0, PPCImpOpBase + 134, 1140, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2563 = XSMSUBMDP |
3795 | | { 2562, 4, 1, 4, 318, 0, 0, PPCImpOpBase + 0, 1144, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2562 = XSMSUBASP |
3796 | | { 2561, 4, 1, 4, 318, 1, 0, PPCImpOpBase + 134, 1140, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2561 = XSMSUBADP |
3797 | | { 2560, 3, 1, 4, 491, 0, 0, PPCImpOpBase + 0, 1116, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2560 = XSMINJDP |
3798 | | { 2559, 3, 1, 4, 159, 1, 0, PPCImpOpBase + 134, 1110, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2559 = XSMINDP |
3799 | | { 2558, 3, 1, 4, 467, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2558 = XSMINCQP |
3800 | | { 2557, 3, 1, 4, 491, 0, 0, PPCImpOpBase + 0, 1110, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2557 = XSMINCDP |
3801 | | { 2556, 3, 1, 4, 491, 0, 0, PPCImpOpBase + 0, 1116, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2556 = XSMAXJDP |
3802 | | { 2555, 3, 1, 4, 159, 1, 0, PPCImpOpBase + 134, 1110, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2555 = XSMAXDP |
3803 | | { 2554, 3, 1, 4, 467, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2554 = XSMAXCQP |
3804 | | { 2553, 3, 1, 4, 491, 0, 0, PPCImpOpBase + 0, 1110, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2553 = XSMAXCDP |
3805 | | { 2552, 4, 1, 4, 329, 0, 0, PPCImpOpBase + 0, 1148, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2552 = XSMADDQPO |
3806 | | { 2551, 4, 1, 4, 329, 0, 0, PPCImpOpBase + 0, 1148, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2551 = XSMADDQP |
3807 | | { 2550, 4, 1, 4, 318, 0, 0, PPCImpOpBase + 0, 1144, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2550 = XSMADDMSP |
3808 | | { 2549, 4, 1, 4, 318, 1, 0, PPCImpOpBase + 134, 1140, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2549 = XSMADDMDP |
3809 | | { 2548, 4, 1, 4, 318, 0, 0, PPCImpOpBase + 0, 1144, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2548 = XSMADDASP |
3810 | | { 2547, 4, 1, 4, 318, 1, 0, PPCImpOpBase + 134, 1140, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2547 = XSMADDADP |
3811 | | { 2546, 3, 1, 4, 527, 0, 0, PPCImpOpBase + 0, 1137, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2546 = XSIEXPQP |
3812 | | { 2545, 3, 1, 4, 303, 0, 0, PPCImpOpBase + 0, 1134, 0, 0x0ULL }, // Inst #2545 = XSIEXPDP |
3813 | | { 2544, 3, 1, 4, 183, 0, 0, PPCImpOpBase + 0, 1113, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2544 = XSDIVSP |
3814 | | { 2543, 3, 1, 4, 331, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2543 = XSDIVQPO |
3815 | | { 2542, 3, 1, 4, 331, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2542 = XSDIVQP |
3816 | | { 2541, 3, 1, 4, 172, 1, 0, PPCImpOpBase + 134, 1110, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2541 = XSDIVDP |
3817 | | { 2540, 2, 1, 4, 188, 0, 0, PPCImpOpBase + 0, 1132, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2540 = XSCVUXDSP |
3818 | | { 2539, 2, 1, 4, 432, 1, 0, PPCImpOpBase + 134, 1108, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2539 = XSCVUXDDP |
3819 | | { 2538, 2, 1, 4, 452, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2538 = XSCVUQQP |
3820 | | { 2537, 2, 1, 4, 451, 0, 0, PPCImpOpBase + 0, 1122, 0, 0x0ULL }, // Inst #2537 = XSCVUDQP |
3821 | | { 2536, 2, 1, 4, 188, 0, 0, PPCImpOpBase + 0, 1132, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2536 = XSCVSXDSP |
3822 | | { 2535, 2, 1, 4, 432, 1, 0, PPCImpOpBase + 134, 1108, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2535 = XSCVSXDDP |
3823 | | { 2534, 2, 1, 4, 452, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2534 = XSCVSQQP |
3824 | | { 2533, 2, 1, 4, 282, 0, 0, PPCImpOpBase + 0, 1130, 0, 0x0ULL }, // Inst #2533 = XSCVSPDPN |
3825 | | { 2532, 2, 1, 4, 432, 1, 0, PPCImpOpBase + 134, 1108, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2532 = XSCVSPDP |
3826 | | { 2531, 2, 1, 4, 451, 0, 0, PPCImpOpBase + 0, 1122, 0, 0x0ULL }, // Inst #2531 = XSCVSDQP |
3827 | | { 2530, 2, 1, 4, 451, 0, 0, PPCImpOpBase + 0, 299, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2530 = XSCVQPUWZ |
3828 | | { 2529, 2, 1, 4, 452, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2529 = XSCVQPUQZ |
3829 | | { 2528, 2, 1, 4, 451, 0, 0, PPCImpOpBase + 0, 299, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2528 = XSCVQPUDZ |
3830 | | { 2527, 2, 1, 4, 451, 0, 0, PPCImpOpBase + 0, 299, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2527 = XSCVQPSWZ |
3831 | | { 2526, 2, 1, 4, 452, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2526 = XSCVQPSQZ |
3832 | | { 2525, 2, 1, 4, 451, 0, 0, PPCImpOpBase + 0, 299, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2525 = XSCVQPSDZ |
3833 | | { 2524, 2, 1, 4, 451, 0, 0, PPCImpOpBase + 0, 1128, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2524 = XSCVQPDPO |
3834 | | { 2523, 2, 1, 4, 451, 0, 0, PPCImpOpBase + 0, 1128, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2523 = XSCVQPDP |
3835 | | { 2522, 2, 1, 4, 321, 0, 0, PPCImpOpBase + 0, 1108, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2522 = XSCVHPDP |
3836 | | { 2521, 2, 1, 4, 432, 1, 0, PPCImpOpBase + 134, 1126, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2521 = XSCVDPUXWSs |
3837 | | { 2520, 2, 1, 4, 432, 1, 0, PPCImpOpBase + 134, 1108, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2520 = XSCVDPUXWS |
3838 | | { 2519, 2, 1, 4, 432, 1, 0, PPCImpOpBase + 134, 1126, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2519 = XSCVDPUXDSs |
3839 | | { 2518, 2, 1, 4, 432, 1, 0, PPCImpOpBase + 134, 1108, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2518 = XSCVDPUXDS |
3840 | | { 2517, 2, 1, 4, 432, 1, 0, PPCImpOpBase + 134, 1126, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2517 = XSCVDPSXWSs |
3841 | | { 2516, 2, 1, 4, 432, 1, 0, PPCImpOpBase + 134, 1108, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2516 = XSCVDPSXWS |
3842 | | { 2515, 2, 1, 4, 432, 1, 0, PPCImpOpBase + 134, 1126, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2515 = XSCVDPSXDSs |
3843 | | { 2514, 2, 1, 4, 432, 1, 0, PPCImpOpBase + 134, 1108, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2514 = XSCVDPSXDS |
3844 | | { 2513, 2, 1, 4, 188, 0, 0, PPCImpOpBase + 0, 1124, 0, 0x0ULL }, // Inst #2513 = XSCVDPSPN |
3845 | | { 2512, 2, 1, 4, 432, 1, 0, PPCImpOpBase + 134, 1108, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2512 = XSCVDPSP |
3846 | | { 2511, 2, 1, 4, 451, 0, 0, PPCImpOpBase + 0, 1122, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2511 = XSCVDPQP |
3847 | | { 2510, 2, 1, 4, 431, 0, 0, PPCImpOpBase + 0, 1108, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2510 = XSCVDPHP |
3848 | | { 2509, 3, 1, 4, 527, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2509 = XSCPSGNQP |
3849 | | { 2508, 3, 1, 4, 292, 1, 0, PPCImpOpBase + 134, 1110, 0, 0x0ULL }, // Inst #2508 = XSCPSGNDP |
3850 | | { 2507, 3, 1, 4, 326, 0, 0, PPCImpOpBase + 0, 1058, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2507 = XSCMPUQP |
3851 | | { 2506, 3, 1, 4, 160, 1, 0, PPCImpOpBase + 134, 1119, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2506 = XSCMPUDP |
3852 | | { 2505, 3, 1, 4, 326, 0, 0, PPCImpOpBase + 0, 1058, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2505 = XSCMPOQP |
3853 | | { 2504, 3, 1, 4, 160, 1, 0, PPCImpOpBase + 134, 1119, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2504 = XSCMPODP |
3854 | | { 2503, 3, 1, 4, 467, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2503 = XSCMPGTQP |
3855 | | { 2502, 3, 1, 4, 278, 0, 0, PPCImpOpBase + 0, 1116, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2502 = XSCMPGTDP |
3856 | | { 2501, 3, 1, 4, 467, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2501 = XSCMPGEQP |
3857 | | { 2500, 3, 1, 4, 278, 0, 0, PPCImpOpBase + 0, 1116, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2500 = XSCMPGEDP |
3858 | | { 2499, 3, 1, 4, 326, 0, 0, PPCImpOpBase + 0, 1058, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2499 = XSCMPEXPQP |
3859 | | { 2498, 3, 1, 4, 278, 0, 0, PPCImpOpBase + 0, 1119, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2498 = XSCMPEXPDP |
3860 | | { 2497, 3, 1, 4, 467, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2497 = XSCMPEQQP |
3861 | | { 2496, 3, 1, 4, 278, 0, 0, PPCImpOpBase + 0, 1116, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2496 = XSCMPEQDP |
3862 | | { 2495, 3, 1, 4, 187, 0, 0, PPCImpOpBase + 0, 1113, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2495 = XSADDSP |
3863 | | { 2494, 3, 1, 4, 327, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2494 = XSADDQPO |
3864 | | { 2493, 3, 1, 4, 327, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2493 = XSADDQP |
3865 | | { 2492, 3, 1, 4, 187, 1, 0, PPCImpOpBase + 134, 1110, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2492 = XSADDDP |
3866 | | { 2491, 2, 1, 4, 518, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2491 = XSABSQP |
3867 | | { 2490, 2, 1, 4, 517, 1, 0, PPCImpOpBase + 134, 1108, 0, 0x0ULL }, // Inst #2490 = XSABSDP |
3868 | | { 2489, 3, 1, 4, 198, 0, 1, PPCImpOpBase + 0, 208, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #2489 = XOR_rec |
3869 | | { 2488, 3, 1, 4, 508, 0, 0, PPCImpOpBase + 0, 169, 0, 0x8ULL }, // Inst #2488 = XORIS8 |
3870 | | { 2487, 3, 1, 4, 508, 0, 0, PPCImpOpBase + 0, 172, 0, 0x8ULL }, // Inst #2487 = XORIS |
3871 | | { 2486, 3, 1, 4, 508, 0, 0, PPCImpOpBase + 0, 169, 0, 0x8ULL }, // Inst #2486 = XORI8 |
3872 | | { 2485, 3, 1, 4, 508, 0, 0, PPCImpOpBase + 0, 172, 0, 0x8ULL }, // Inst #2485 = XORI |
3873 | | { 2484, 3, 1, 4, 198, 0, 1, PPCImpOpBase + 0, 214, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #2484 = XOR8_rec |
3874 | | { 2483, 3, 1, 4, 198, 0, 0, PPCImpOpBase + 0, 214, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #2483 = XOR8 |
3875 | | { 2482, 3, 1, 4, 198, 0, 0, PPCImpOpBase + 0, 208, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #2482 = XOR |
3876 | | { 2481, 1, 0, 4, 420, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2481 = WRTEEI |
3877 | | { 2480, 1, 0, 4, 420, 0, 0, PPCImpOpBase + 0, 159, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2480 = WRTEE |
3878 | | { 2479, 2, 0, 4, 497, 0, 0, PPCImpOpBase + 0, 21, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2479 = WAITP10 |
3879 | | { 2478, 1, 0, 4, 296, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2478 = WAIT |
3880 | | { 2477, 1, 1, 4, 575, 0, 0, PPCImpOpBase + 0, 659, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x28ULL }, // Inst #2477 = V_SETALLONESH |
3881 | | { 2476, 1, 1, 4, 575, 0, 0, PPCImpOpBase + 0, 659, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x28ULL }, // Inst #2476 = V_SETALLONESB |
3882 | | { 2475, 1, 1, 4, 575, 0, 0, PPCImpOpBase + 0, 659, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x28ULL }, // Inst #2475 = V_SETALLONES |
3883 | | { 2474, 1, 1, 4, 527, 0, 0, PPCImpOpBase + 0, 659, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x28ULL }, // Inst #2474 = V_SET0H |
3884 | | { 2473, 1, 1, 4, 527, 0, 0, PPCImpOpBase + 0, 659, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x28ULL }, // Inst #2473 = V_SET0B |
3885 | | { 2472, 1, 1, 4, 527, 0, 0, PPCImpOpBase + 0, 659, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x28ULL }, // Inst #2472 = V_SET0 |
3886 | | { 2471, 3, 1, 4, 261, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2471 = VXOR |
3887 | | { 2470, 2, 1, 4, 579, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2470 = VUPKLSW |
3888 | | { 2469, 2, 1, 4, 582, 0, 0, PPCImpOpBase + 0, 299, 0, 0x28ULL }, // Inst #2469 = VUPKLSH |
3889 | | { 2468, 2, 1, 4, 582, 0, 0, PPCImpOpBase + 0, 299, 0, 0x28ULL }, // Inst #2468 = VUPKLSB |
3890 | | { 2467, 2, 1, 4, 582, 0, 0, PPCImpOpBase + 0, 299, 0, 0x28ULL }, // Inst #2467 = VUPKLPX |
3891 | | { 2466, 2, 1, 4, 579, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2466 = VUPKHSW |
3892 | | { 2465, 2, 1, 4, 582, 0, 0, PPCImpOpBase + 0, 299, 0, 0x28ULL }, // Inst #2465 = VUPKHSH |
3893 | | { 2464, 2, 1, 4, 582, 0, 0, PPCImpOpBase + 0, 299, 0, 0x28ULL }, // Inst #2464 = VUPKHSB |
3894 | | { 2463, 2, 1, 4, 582, 0, 0, PPCImpOpBase + 0, 299, 0, 0x28ULL }, // Inst #2463 = VUPKHPX |
3895 | | { 2462, 3, 1, 4, 590, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL }, // Inst #2462 = VSUMSWS |
3896 | | { 2461, 3, 1, 4, 622, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL }, // Inst #2461 = VSUM4UBS |
3897 | | { 2460, 3, 1, 4, 622, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL }, // Inst #2460 = VSUM4SHS |
3898 | | { 2459, 3, 1, 4, 622, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL }, // Inst #2459 = VSUM4SBS |
3899 | | { 2458, 3, 1, 4, 622, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL }, // Inst #2458 = VSUM2SWS |
3900 | | { 2457, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2457 = VSUBUWS |
3901 | | { 2456, 3, 1, 4, 167, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2456 = VSUBUWM |
3902 | | { 2455, 3, 1, 4, 238, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2455 = VSUBUQM |
3903 | | { 2454, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2454 = VSUBUHS |
3904 | | { 2453, 3, 1, 4, 167, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2453 = VSUBUHM |
3905 | | { 2452, 3, 1, 4, 260, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2452 = VSUBUDM |
3906 | | { 2451, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2451 = VSUBUBS |
3907 | | { 2450, 3, 1, 4, 167, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2450 = VSUBUBM |
3908 | | { 2449, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2449 = VSUBSWS |
3909 | | { 2448, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2448 = VSUBSHS |
3910 | | { 2447, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2447 = VSUBSBS |
3911 | | { 2446, 3, 1, 4, 191, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2446 = VSUBFP |
3912 | | { 2445, 4, 1, 4, 237, 0, 0, PPCImpOpBase + 0, 1046, 0, 0x0ULL }, // Inst #2445 = VSUBEUQM |
3913 | | { 2444, 4, 1, 4, 237, 0, 0, PPCImpOpBase + 0, 1046, 0, 0x0ULL }, // Inst #2444 = VSUBECUQ |
3914 | | { 2443, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2443 = VSUBCUW |
3915 | | { 2442, 3, 1, 4, 466, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2442 = VSUBCUQ |
3916 | | { 2441, 2, 1, 4, 539, 0, 1, PPCImpOpBase + 78, 299, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2441 = VSTRIHR_rec |
3917 | | { 2440, 2, 1, 4, 581, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2440 = VSTRIHR |
3918 | | { 2439, 2, 1, 4, 539, 0, 1, PPCImpOpBase + 78, 299, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2439 = VSTRIHL_rec |
3919 | | { 2438, 2, 1, 4, 581, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2438 = VSTRIHL |
3920 | | { 2437, 2, 1, 4, 539, 0, 1, PPCImpOpBase + 78, 299, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2437 = VSTRIBR_rec |
3921 | | { 2436, 2, 1, 4, 581, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2436 = VSTRIBR |
3922 | | { 2435, 2, 1, 4, 539, 0, 1, PPCImpOpBase + 78, 299, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2435 = VSTRIBL_rec |
3923 | | { 2434, 2, 1, 4, 581, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2434 = VSTRIBL |
3924 | | { 2433, 3, 1, 4, 261, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2433 = VSRW |
3925 | | { 2432, 3, 1, 4, 588, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2432 = VSRV |
3926 | | { 2431, 3, 1, 4, 494, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2431 = VSRQ |
3927 | | { 2430, 3, 1, 4, 230, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2430 = VSRO |
3928 | | { 2429, 3, 1, 4, 261, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2429 = VSRH |
3929 | | { 2428, 4, 1, 4, 586, 0, 0, PPCImpOpBase + 0, 289, 0, 0x0ULL }, // Inst #2428 = VSRDBI |
3930 | | { 2427, 3, 1, 4, 260, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2427 = VSRD |
3931 | | { 2426, 3, 1, 4, 261, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2426 = VSRB |
3932 | | { 2425, 3, 1, 4, 261, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2425 = VSRAW |
3933 | | { 2424, 3, 1, 4, 494, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2424 = VSRAQ |
3934 | | { 2423, 3, 1, 4, 261, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2423 = VSRAH |
3935 | | { 2422, 3, 1, 4, 260, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2422 = VSRAD |
3936 | | { 2421, 3, 1, 4, 261, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2421 = VSRAB |
3937 | | { 2420, 3, 1, 4, 230, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2420 = VSR |
3938 | | { 2419, 3, 1, 4, 580, 0, 0, PPCImpOpBase + 0, 1050, 0, 0x28ULL }, // Inst #2419 = VSPLTW |
3939 | | { 2418, 2, 1, 4, 574, 0, 0, PPCImpOpBase + 0, 689, 0, 0x28ULL }, // Inst #2418 = VSPLTISW |
3940 | | { 2417, 2, 1, 4, 574, 0, 0, PPCImpOpBase + 0, 689, 0, 0x28ULL }, // Inst #2417 = VSPLTISH |
3941 | | { 2416, 2, 1, 4, 574, 0, 0, PPCImpOpBase + 0, 689, 0, 0x28ULL }, // Inst #2416 = VSPLTISB |
3942 | | { 2415, 3, 1, 4, 580, 0, 0, PPCImpOpBase + 0, 1105, 0, 0x28ULL }, // Inst #2415 = VSPLTHs |
3943 | | { 2414, 3, 1, 4, 580, 0, 0, PPCImpOpBase + 0, 1050, 0, 0x28ULL }, // Inst #2414 = VSPLTH |
3944 | | { 2413, 3, 1, 4, 580, 0, 0, PPCImpOpBase + 0, 1105, 0, 0x28ULL }, // Inst #2413 = VSPLTBs |
3945 | | { 2412, 3, 1, 4, 580, 0, 0, PPCImpOpBase + 0, 1050, 0, 0x28ULL }, // Inst #2412 = VSPLTB |
3946 | | { 2411, 3, 1, 4, 261, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2411 = VSLW |
3947 | | { 2410, 3, 1, 4, 588, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2410 = VSLV |
3948 | | { 2409, 3, 1, 4, 494, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2409 = VSLQ |
3949 | | { 2408, 3, 1, 4, 230, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2408 = VSLO |
3950 | | { 2407, 3, 1, 4, 261, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2407 = VSLH |
3951 | | { 2406, 4, 1, 4, 230, 0, 0, PPCImpOpBase + 0, 289, 0, 0x28ULL }, // Inst #2406 = VSLDOI |
3952 | | { 2405, 4, 1, 4, 586, 0, 0, PPCImpOpBase + 0, 289, 0, 0x0ULL }, // Inst #2405 = VSLDBI |
3953 | | { 2404, 3, 1, 4, 260, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2404 = VSLD |
3954 | | { 2403, 3, 1, 4, 261, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2403 = VSLB |
3955 | | { 2402, 3, 1, 4, 230, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2402 = VSL |
3956 | | { 2401, 4, 1, 4, 477, 0, 0, PPCImpOpBase + 0, 1101, 0, 0x0ULL }, // Inst #2401 = VSHASIGMAW |
3957 | | { 2400, 4, 1, 4, 477, 0, 0, PPCImpOpBase + 0, 1101, 0, 0x0ULL }, // Inst #2400 = VSHASIGMAD |
3958 | | { 2399, 4, 1, 4, 269, 0, 0, PPCImpOpBase + 0, 1046, 0, 0x28ULL }, // Inst #2399 = VSEL |
3959 | | { 2398, 2, 1, 4, 448, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2398 = VSBOX |
3960 | | { 2397, 2, 1, 4, 430, 0, 0, PPCImpOpBase + 0, 299, 0, 0x28ULL }, // Inst #2397 = VRSQRTEFP |
3961 | | { 2396, 3, 1, 4, 527, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2396 = VRLWNM |
3962 | | { 2395, 4, 1, 4, 263, 0, 0, PPCImpOpBase + 0, 1097, 0, 0x0ULL }, // Inst #2395 = VRLWMI |
3963 | | { 2394, 3, 1, 4, 261, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2394 = VRLW |
3964 | | { 2393, 3, 1, 4, 494, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2393 = VRLQNM |
3965 | | { 2392, 4, 1, 4, 495, 0, 0, PPCImpOpBase + 0, 1097, 0, 0x0ULL }, // Inst #2392 = VRLQMI |
3966 | | { 2391, 3, 1, 4, 494, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2391 = VRLQ |
3967 | | { 2390, 3, 1, 4, 261, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2390 = VRLH |
3968 | | { 2389, 3, 1, 4, 527, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2389 = VRLDNM |
3969 | | { 2388, 4, 1, 4, 263, 0, 0, PPCImpOpBase + 0, 1097, 0, 0x0ULL }, // Inst #2388 = VRLDMI |
3970 | | { 2387, 3, 1, 4, 264, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2387 = VRLD |
3971 | | { 2386, 3, 1, 4, 261, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2386 = VRLB |
3972 | | { 2385, 2, 1, 4, 430, 0, 0, PPCImpOpBase + 0, 299, 0, 0x28ULL }, // Inst #2385 = VRFIZ |
3973 | | { 2384, 2, 1, 4, 430, 0, 0, PPCImpOpBase + 0, 299, 0, 0x28ULL }, // Inst #2384 = VRFIP |
3974 | | { 2383, 2, 1, 4, 430, 0, 0, PPCImpOpBase + 0, 299, 0, 0x28ULL }, // Inst #2383 = VRFIN |
3975 | | { 2382, 2, 1, 4, 430, 0, 0, PPCImpOpBase + 0, 299, 0, 0x28ULL }, // Inst #2382 = VRFIM |
3976 | | { 2381, 2, 1, 4, 430, 0, 0, PPCImpOpBase + 0, 299, 0, 0x28ULL }, // Inst #2381 = VREFP |
3977 | | { 2380, 2, 1, 4, 475, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2380 = VPRTYBW |
3978 | | { 2379, 2, 1, 4, 578, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2379 = VPRTYBQ |
3979 | | { 2378, 2, 1, 4, 475, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2378 = VPRTYBD |
3980 | | { 2377, 2, 1, 4, 232, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2377 = VPOPCNTW |
3981 | | { 2376, 2, 1, 4, 476, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2376 = VPOPCNTH |
3982 | | { 2375, 2, 1, 4, 309, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2375 = VPOPCNTD |
3983 | | { 2374, 2, 1, 4, 476, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2374 = VPOPCNTB |
3984 | | { 2373, 3, 1, 4, 182, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2373 = VPMSUMW |
3985 | | { 2372, 3, 1, 4, 182, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2372 = VPMSUMH |
3986 | | { 2371, 3, 1, 4, 182, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2371 = VPMSUMD |
3987 | | { 2370, 3, 1, 4, 182, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2370 = VPMSUMB |
3988 | | { 2369, 3, 1, 4, 587, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL }, // Inst #2369 = VPKUWUS |
3989 | | { 2368, 3, 1, 4, 587, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2368 = VPKUWUM |
3990 | | { 2367, 3, 1, 4, 587, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL }, // Inst #2367 = VPKUHUS |
3991 | | { 2366, 3, 1, 4, 587, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2366 = VPKUHUM |
3992 | | { 2365, 3, 1, 4, 585, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2365 = VPKUDUS |
3993 | | { 2364, 3, 1, 4, 585, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2364 = VPKUDUM |
3994 | | { 2363, 3, 1, 4, 587, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL }, // Inst #2363 = VPKSWUS |
3995 | | { 2362, 3, 1, 4, 587, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL }, // Inst #2362 = VPKSWSS |
3996 | | { 2361, 3, 1, 4, 587, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL }, // Inst #2361 = VPKSHUS |
3997 | | { 2360, 3, 1, 4, 587, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL }, // Inst #2360 = VPKSHSS |
3998 | | { 2359, 3, 1, 4, 585, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2359 = VPKSDUS |
3999 | | { 2358, 3, 1, 4, 585, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2358 = VPKSDSS |
4000 | | { 2357, 3, 1, 4, 587, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2357 = VPKPX |
4001 | | { 2356, 3, 1, 4, 450, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2356 = VPEXTD |
4002 | | { 2355, 4, 1, 4, 229, 0, 0, PPCImpOpBase + 0, 1046, 0, 0x0ULL }, // Inst #2355 = VPERMXOR |
4003 | | { 2354, 4, 1, 4, 323, 0, 0, PPCImpOpBase + 0, 1046, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2354 = VPERMR |
4004 | | { 2353, 4, 1, 4, 164, 0, 0, PPCImpOpBase + 0, 1046, 0, 0x28ULL }, // Inst #2353 = VPERM |
4005 | | { 2352, 3, 1, 4, 450, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2352 = VPDEPD |
4006 | | { 2351, 3, 1, 4, 260, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2351 = VORC |
4007 | | { 2350, 3, 1, 4, 261, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2350 = VOR |
4008 | | { 2349, 3, 1, 4, 261, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2349 = VNOR |
4009 | | { 2348, 4, 1, 4, 441, 0, 0, PPCImpOpBase + 0, 1046, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2348 = VNMSUBFP |
4010 | | { 2347, 2, 1, 4, 515, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2347 = VNEGW |
4011 | | { 2346, 2, 1, 4, 515, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2346 = VNEGD |
4012 | | { 2345, 3, 1, 4, 182, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2345 = VNCIPHERLAST |
4013 | | { 2344, 3, 1, 4, 182, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2344 = VNCIPHER |
4014 | | { 2343, 3, 1, 4, 260, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2343 = VNAND |
4015 | | { 2342, 3, 1, 4, 241, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2342 = VMULUWM |
4016 | | { 2341, 3, 1, 4, 240, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2341 = VMULOUW |
4017 | | { 2340, 3, 1, 4, 622, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2340 = VMULOUH |
4018 | | { 2339, 3, 1, 4, 623, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2339 = VMULOUD |
4019 | | { 2338, 3, 1, 4, 622, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2338 = VMULOUB |
4020 | | { 2337, 3, 1, 4, 240, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2337 = VMULOSW |
4021 | | { 2336, 3, 1, 4, 622, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2336 = VMULOSH |
4022 | | { 2335, 3, 1, 4, 623, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2335 = VMULOSD |
4023 | | { 2334, 3, 1, 4, 622, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2334 = VMULOSB |
4024 | | { 2333, 3, 1, 4, 572, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2333 = VMULLD |
4025 | | { 2332, 3, 1, 4, 623, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2332 = VMULHUW |
4026 | | { 2331, 3, 1, 4, 572, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2331 = VMULHUD |
4027 | | { 2330, 3, 1, 4, 623, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2330 = VMULHSW |
4028 | | { 2329, 3, 1, 4, 572, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2329 = VMULHSD |
4029 | | { 2328, 3, 1, 4, 240, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2328 = VMULEUW |
4030 | | { 2327, 3, 1, 4, 622, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2327 = VMULEUH |
4031 | | { 2326, 3, 1, 4, 623, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2326 = VMULEUD |
4032 | | { 2325, 3, 1, 4, 622, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2325 = VMULEUB |
4033 | | { 2324, 3, 1, 4, 240, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2324 = VMULESW |
4034 | | { 2323, 3, 1, 4, 622, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2323 = VMULESH |
4035 | | { 2322, 3, 1, 4, 623, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2322 = VMULESD |
4036 | | { 2321, 3, 1, 4, 622, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2321 = VMULESB |
4037 | | { 2320, 2, 1, 4, 463, 0, 0, PPCImpOpBase + 0, 299, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2320 = VMUL10UQ |
4038 | | { 2319, 3, 1, 4, 465, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2319 = VMUL10EUQ |
4039 | | { 2318, 3, 1, 4, 465, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2318 = VMUL10ECUQ |
4040 | | { 2317, 2, 1, 4, 463, 0, 0, PPCImpOpBase + 0, 299, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2317 = VMUL10CUQ |
4041 | | { 2316, 4, 1, 4, 239, 0, 0, PPCImpOpBase + 0, 1046, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL }, // Inst #2316 = VMSUMUHS |
4042 | | { 2315, 4, 1, 4, 239, 0, 0, PPCImpOpBase + 0, 1046, 0, 0x28ULL }, // Inst #2315 = VMSUMUHM |
4043 | | { 2314, 4, 1, 4, 166, 0, 0, PPCImpOpBase + 0, 1046, 0, 0x0ULL }, // Inst #2314 = VMSUMUDM |
4044 | | { 2313, 4, 1, 4, 239, 0, 0, PPCImpOpBase + 0, 1046, 0, 0x28ULL }, // Inst #2313 = VMSUMUBM |
4045 | | { 2312, 4, 1, 4, 239, 0, 0, PPCImpOpBase + 0, 1046, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL }, // Inst #2312 = VMSUMSHS |
4046 | | { 2311, 4, 1, 4, 239, 0, 0, PPCImpOpBase + 0, 1046, 0, 0x28ULL }, // Inst #2311 = VMSUMSHM |
4047 | | { 2310, 4, 1, 4, 239, 0, 0, PPCImpOpBase + 0, 1046, 0, 0x28ULL }, // Inst #2310 = VMSUMMBM |
4048 | | { 2309, 4, 1, 4, 624, 0, 0, PPCImpOpBase + 0, 1046, 0, 0x0ULL }, // Inst #2309 = VMSUMCUD |
4049 | | { 2308, 3, 1, 4, 268, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2308 = VMRGOW |
4050 | | { 2307, 3, 1, 4, 230, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2307 = VMRGLW |
4051 | | { 2306, 3, 1, 4, 230, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2306 = VMRGLH |
4052 | | { 2305, 3, 1, 4, 230, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2305 = VMRGLB |
4053 | | { 2304, 3, 1, 4, 230, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2304 = VMRGHW |
4054 | | { 2303, 3, 1, 4, 230, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2303 = VMRGHH |
4055 | | { 2302, 3, 1, 4, 230, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2302 = VMRGHB |
4056 | | { 2301, 3, 1, 4, 268, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2301 = VMRGEW |
4057 | | { 2300, 3, 1, 4, 460, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2300 = VMODUW |
4058 | | { 2299, 3, 1, 4, 456, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2299 = VMODUQ |
4059 | | { 2298, 3, 1, 4, 458, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2298 = VMODUD |
4060 | | { 2297, 3, 1, 4, 460, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2297 = VMODSW |
4061 | | { 2296, 3, 1, 4, 456, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2296 = VMODSQ |
4062 | | { 2295, 3, 1, 4, 458, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2295 = VMODSD |
4063 | | { 2294, 4, 1, 4, 239, 0, 0, PPCImpOpBase + 0, 1046, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2294 = VMLADDUHM |
4064 | | { 2293, 3, 1, 4, 231, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2293 = VMINUW |
4065 | | { 2292, 3, 1, 4, 231, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2292 = VMINUH |
4066 | | { 2291, 3, 1, 4, 233, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2291 = VMINUD |
4067 | | { 2290, 3, 1, 4, 231, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2290 = VMINUB |
4068 | | { 2289, 3, 1, 4, 231, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2289 = VMINSW |
4069 | | { 2288, 3, 1, 4, 231, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2288 = VMINSH |
4070 | | { 2287, 3, 1, 4, 233, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2287 = VMINSD |
4071 | | { 2286, 3, 1, 4, 231, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2286 = VMINSB |
4072 | | { 2285, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2285 = VMINFP |
4073 | | { 2284, 4, 1, 4, 239, 0, 0, PPCImpOpBase + 0, 1046, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL }, // Inst #2284 = VMHRADDSHS |
4074 | | { 2283, 4, 1, 4, 239, 0, 0, PPCImpOpBase + 0, 1046, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL }, // Inst #2283 = VMHADDSHS |
4075 | | { 2282, 3, 1, 4, 231, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2282 = VMAXUW |
4076 | | { 2281, 3, 1, 4, 231, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2281 = VMAXUH |
4077 | | { 2280, 3, 1, 4, 233, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2280 = VMAXUD |
4078 | | { 2279, 3, 1, 4, 231, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2279 = VMAXUB |
4079 | | { 2278, 3, 1, 4, 231, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2278 = VMAXSW |
4080 | | { 2277, 3, 1, 4, 231, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2277 = VMAXSH |
4081 | | { 2276, 3, 1, 4, 233, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2276 = VMAXSD |
4082 | | { 2275, 3, 1, 4, 231, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2275 = VMAXSB |
4083 | | { 2274, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2274 = VMAXFP |
4084 | | { 2273, 4, 1, 4, 441, 0, 0, PPCImpOpBase + 0, 1046, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2273 = VMADDFP |
4085 | | { 2272, 2, 1, 4, 430, 0, 0, PPCImpOpBase + 0, 299, 0, 0x28ULL }, // Inst #2272 = VLOGEFP |
4086 | | { 2271, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1077, 0, 0x0ULL }, // Inst #2271 = VINSWVRX |
4087 | | { 2270, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1077, 0, 0x0ULL }, // Inst #2270 = VINSWVLX |
4088 | | { 2269, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1073, 0, 0x0ULL }, // Inst #2269 = VINSWRX |
4089 | | { 2268, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1073, 0, 0x0ULL }, // Inst #2268 = VINSWLX |
4090 | | { 2267, 4, 1, 4, 586, 0, 0, PPCImpOpBase + 0, 1093, 0, 0x0ULL }, // Inst #2267 = VINSW |
4091 | | { 2266, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1077, 0, 0x0ULL }, // Inst #2266 = VINSHVRX |
4092 | | { 2265, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1077, 0, 0x0ULL }, // Inst #2265 = VINSHVLX |
4093 | | { 2264, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1073, 0, 0x0ULL }, // Inst #2264 = VINSHRX |
4094 | | { 2263, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1073, 0, 0x0ULL }, // Inst #2263 = VINSHLX |
4095 | | { 2262, 3, 1, 4, 578, 0, 0, PPCImpOpBase + 0, 1050, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2262 = VINSERTW |
4096 | | { 2261, 4, 1, 4, 324, 0, 0, PPCImpOpBase + 0, 1089, 0, 0x0ULL }, // Inst #2261 = VINSERTH |
4097 | | { 2260, 3, 1, 4, 578, 0, 0, PPCImpOpBase + 0, 1050, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2260 = VINSERTD |
4098 | | { 2259, 4, 1, 4, 324, 0, 0, PPCImpOpBase + 0, 1089, 0, 0x0ULL }, // Inst #2259 = VINSERTB |
4099 | | { 2258, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1085, 0, 0x0ULL }, // Inst #2258 = VINSDRX |
4100 | | { 2257, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1085, 0, 0x0ULL }, // Inst #2257 = VINSDLX |
4101 | | { 2256, 4, 1, 4, 586, 0, 0, PPCImpOpBase + 0, 1081, 0, 0x0ULL }, // Inst #2256 = VINSD |
4102 | | { 2255, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1077, 0, 0x0ULL }, // Inst #2255 = VINSBVRX |
4103 | | { 2254, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1077, 0, 0x0ULL }, // Inst #2254 = VINSBVLX |
4104 | | { 2253, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1073, 0, 0x0ULL }, // Inst #2253 = VINSBRX |
4105 | | { 2252, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1073, 0, 0x0ULL }, // Inst #2252 = VINSBLX |
4106 | | { 2251, 3, 1, 4, 447, 0, 0, PPCImpOpBase + 0, 1061, 0, 0x0ULL }, // Inst #2251 = VGNB |
4107 | | { 2250, 2, 1, 4, 579, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2250 = VGBBD |
4108 | | { 2249, 3, 1, 4, 324, 0, 0, PPCImpOpBase + 0, 1070, 0, 0x200ULL }, // Inst #2249 = VEXTUWRX |
4109 | | { 2248, 3, 1, 4, 324, 0, 0, PPCImpOpBase + 0, 1070, 0, 0x200ULL }, // Inst #2248 = VEXTUWLX |
4110 | | { 2247, 3, 1, 4, 324, 0, 0, PPCImpOpBase + 0, 1070, 0, 0x200ULL }, // Inst #2247 = VEXTUHRX |
4111 | | { 2246, 3, 1, 4, 324, 0, 0, PPCImpOpBase + 0, 1070, 0, 0x200ULL }, // Inst #2246 = VEXTUHLX |
4112 | | { 2245, 3, 1, 4, 324, 0, 0, PPCImpOpBase + 0, 1070, 0, 0x200ULL }, // Inst #2245 = VEXTUBRX |
4113 | | { 2244, 3, 1, 4, 324, 0, 0, PPCImpOpBase + 0, 1070, 0, 0x200ULL }, // Inst #2244 = VEXTUBLX |
4114 | | { 2243, 2, 1, 4, 515, 0, 0, PPCImpOpBase + 0, 1068, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2243 = VEXTSW2Ds |
4115 | | { 2242, 2, 1, 4, 515, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2242 = VEXTSW2D |
4116 | | { 2241, 2, 1, 4, 515, 0, 0, PPCImpOpBase + 0, 1068, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2241 = VEXTSH2Ws |
4117 | | { 2240, 2, 1, 4, 515, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2240 = VEXTSH2W |
4118 | | { 2239, 2, 1, 4, 515, 0, 0, PPCImpOpBase + 0, 1068, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2239 = VEXTSH2Ds |
4119 | | { 2238, 2, 1, 4, 515, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2238 = VEXTSH2D |
4120 | | { 2237, 2, 1, 4, 516, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2237 = VEXTSD2Q |
4121 | | { 2236, 2, 1, 4, 515, 0, 0, PPCImpOpBase + 0, 1068, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2236 = VEXTSB2Ws |
4122 | | { 2235, 2, 1, 4, 515, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2235 = VEXTSB2W |
4123 | | { 2234, 2, 1, 4, 515, 0, 0, PPCImpOpBase + 0, 1068, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2234 = VEXTSB2Ds |
4124 | | { 2233, 2, 1, 4, 515, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2233 = VEXTSB2D |
4125 | | { 2232, 2, 1, 4, 471, 0, 0, PPCImpOpBase + 0, 1056, 0, 0x200ULL }, // Inst #2232 = VEXTRACTWM |
4126 | | { 2231, 3, 1, 4, 578, 0, 0, PPCImpOpBase + 0, 1050, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2231 = VEXTRACTUW |
4127 | | { 2230, 3, 1, 4, 578, 0, 0, PPCImpOpBase + 0, 1050, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2230 = VEXTRACTUH |
4128 | | { 2229, 3, 1, 4, 578, 0, 0, PPCImpOpBase + 0, 1050, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2229 = VEXTRACTUB |
4129 | | { 2228, 2, 1, 4, 471, 0, 0, PPCImpOpBase + 0, 1056, 0, 0x0ULL }, // Inst #2228 = VEXTRACTQM |
4130 | | { 2227, 2, 1, 4, 471, 0, 0, PPCImpOpBase + 0, 1056, 0, 0x200ULL }, // Inst #2227 = VEXTRACTHM |
4131 | | { 2226, 2, 1, 4, 471, 0, 0, PPCImpOpBase + 0, 1056, 0, 0x200ULL }, // Inst #2226 = VEXTRACTDM |
4132 | | { 2225, 3, 1, 4, 578, 0, 0, PPCImpOpBase + 0, 1050, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2225 = VEXTRACTD |
4133 | | { 2224, 2, 1, 4, 471, 0, 0, PPCImpOpBase + 0, 1056, 0, 0x200ULL }, // Inst #2224 = VEXTRACTBM |
4134 | | { 2223, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1064, 0, 0x0ULL }, // Inst #2223 = VEXTDUWVRX |
4135 | | { 2222, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1064, 0, 0x0ULL }, // Inst #2222 = VEXTDUWVLX |
4136 | | { 2221, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1064, 0, 0x0ULL }, // Inst #2221 = VEXTDUHVRX |
4137 | | { 2220, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1064, 0, 0x0ULL }, // Inst #2220 = VEXTDUHVLX |
4138 | | { 2219, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1064, 0, 0x0ULL }, // Inst #2219 = VEXTDUBVRX |
4139 | | { 2218, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1064, 0, 0x0ULL }, // Inst #2218 = VEXTDUBVLX |
4140 | | { 2217, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1064, 0, 0x0ULL }, // Inst #2217 = VEXTDDVRX |
4141 | | { 2216, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1064, 0, 0x0ULL }, // Inst #2216 = VEXTDDVLX |
4142 | | { 2215, 2, 1, 4, 190, 0, 0, PPCImpOpBase + 0, 299, 0, 0x28ULL }, // Inst #2215 = VEXPTEFP |
4143 | | { 2214, 2, 1, 4, 471, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2214 = VEXPANDWM |
4144 | | { 2213, 2, 1, 4, 471, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2213 = VEXPANDQM |
4145 | | { 2212, 2, 1, 4, 471, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2212 = VEXPANDHM |
4146 | | { 2211, 2, 1, 4, 471, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2211 = VEXPANDDM |
4147 | | { 2210, 2, 1, 4, 471, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2210 = VEXPANDBM |
4148 | | { 2209, 3, 1, 4, 260, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2209 = VEQV |
4149 | | { 2208, 3, 1, 4, 459, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2208 = VDIVUW |
4150 | | { 2207, 3, 1, 4, 455, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2207 = VDIVUQ |
4151 | | { 2206, 3, 1, 4, 457, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2206 = VDIVUD |
4152 | | { 2205, 3, 1, 4, 459, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2205 = VDIVSW |
4153 | | { 2204, 3, 1, 4, 455, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2204 = VDIVSQ |
4154 | | { 2203, 3, 1, 4, 457, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2203 = VDIVSD |
4155 | | { 2202, 3, 1, 4, 462, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2202 = VDIVEUW |
4156 | | { 2201, 3, 1, 4, 455, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2201 = VDIVEUQ |
4157 | | { 2200, 3, 1, 4, 461, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2200 = VDIVEUD |
4158 | | { 2199, 3, 1, 4, 462, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2199 = VDIVESW |
4159 | | { 2198, 3, 1, 4, 455, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2198 = VDIVESQ |
4160 | | { 2197, 3, 1, 4, 461, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2197 = VDIVESD |
4161 | | { 2196, 2, 1, 4, 475, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2196 = VCTZW |
4162 | | { 2195, 2, 1, 4, 578, 0, 0, PPCImpOpBase + 0, 1056, 0, 0x0ULL }, // Inst #2195 = VCTZLSBB |
4163 | | { 2194, 2, 1, 4, 475, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2194 = VCTZH |
4164 | | { 2193, 3, 1, 4, 450, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2193 = VCTZDM |
4165 | | { 2192, 2, 1, 4, 475, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2192 = VCTZD |
4166 | | { 2191, 2, 1, 4, 475, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2191 = VCTZB |
4167 | | { 2190, 2, 1, 4, 429, 0, 0, PPCImpOpBase + 0, 299, 0, 0x28ULL }, // Inst #2190 = VCTUXS_0 |
4168 | | { 2189, 3, 1, 4, 428, 0, 0, PPCImpOpBase + 0, 1050, 0, 0x28ULL }, // Inst #2189 = VCTUXS |
4169 | | { 2188, 2, 1, 4, 429, 0, 0, PPCImpOpBase + 0, 299, 0, 0x28ULL }, // Inst #2188 = VCTSXS_0 |
4170 | | { 2187, 3, 1, 4, 428, 0, 0, PPCImpOpBase + 0, 1050, 0, 0x28ULL }, // Inst #2187 = VCTSXS |
4171 | | { 2186, 3, 1, 4, 471, 0, 0, PPCImpOpBase + 0, 1061, 0, 0x0ULL }, // Inst #2186 = VCNTMBW |
4172 | | { 2185, 3, 1, 4, 471, 0, 0, PPCImpOpBase + 0, 1061, 0, 0x0ULL }, // Inst #2185 = VCNTMBH |
4173 | | { 2184, 3, 1, 4, 471, 0, 0, PPCImpOpBase + 0, 1061, 0, 0x0ULL }, // Inst #2184 = VCNTMBD |
4174 | | { 2183, 3, 1, 4, 471, 0, 0, PPCImpOpBase + 0, 1061, 0, 0x0ULL }, // Inst #2183 = VCNTMBB |
4175 | | { 2182, 3, 1, 4, 490, 0, 0, PPCImpOpBase + 0, 1058, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2182 = VCMPUQ |
4176 | | { 2181, 3, 1, 4, 490, 0, 0, PPCImpOpBase + 0, 1058, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2181 = VCMPSQ |
4177 | | { 2180, 3, 1, 4, 489, 0, 1, PPCImpOpBase + 78, 296, 0, 0x28ULL }, // Inst #2180 = VCMPNEZW_rec |
4178 | | { 2179, 3, 1, 4, 306, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2179 = VCMPNEZW |
4179 | | { 2178, 3, 1, 4, 489, 0, 1, PPCImpOpBase + 78, 296, 0, 0x28ULL }, // Inst #2178 = VCMPNEZH_rec |
4180 | | { 2177, 3, 1, 4, 306, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2177 = VCMPNEZH |
4181 | | { 2176, 3, 1, 4, 489, 0, 1, PPCImpOpBase + 78, 296, 0, 0x28ULL }, // Inst #2176 = VCMPNEZB_rec |
4182 | | { 2175, 3, 1, 4, 306, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2175 = VCMPNEZB |
4183 | | { 2174, 3, 1, 4, 489, 0, 1, PPCImpOpBase + 78, 296, 0, 0x28ULL }, // Inst #2174 = VCMPNEW_rec |
4184 | | { 2173, 3, 1, 4, 306, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2173 = VCMPNEW |
4185 | | { 2172, 3, 1, 4, 489, 0, 1, PPCImpOpBase + 78, 296, 0, 0x28ULL }, // Inst #2172 = VCMPNEH_rec |
4186 | | { 2171, 3, 1, 4, 306, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2171 = VCMPNEH |
4187 | | { 2170, 3, 1, 4, 489, 0, 1, PPCImpOpBase + 78, 296, 0, 0x28ULL }, // Inst #2170 = VCMPNEB_rec |
4188 | | { 2169, 3, 1, 4, 306, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2169 = VCMPNEB |
4189 | | { 2168, 3, 1, 4, 486, 0, 1, PPCImpOpBase + 78, 296, 0, 0x28ULL }, // Inst #2168 = VCMPGTUW_rec |
4190 | | { 2167, 3, 1, 4, 169, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2167 = VCMPGTUW |
4191 | | { 2166, 3, 1, 4, 488, 0, 1, PPCImpOpBase + 78, 296, 0, 0x28ULL }, // Inst #2166 = VCMPGTUQ_rec |
4192 | | { 2165, 3, 1, 4, 488, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2165 = VCMPGTUQ |
4193 | | { 2164, 3, 1, 4, 486, 0, 1, PPCImpOpBase + 78, 296, 0, 0x28ULL }, // Inst #2164 = VCMPGTUH_rec |
4194 | | { 2163, 3, 1, 4, 169, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2163 = VCMPGTUH |
4195 | | { 2162, 3, 1, 4, 487, 0, 1, PPCImpOpBase + 78, 296, 0, 0x28ULL }, // Inst #2162 = VCMPGTUD_rec |
4196 | | { 2161, 3, 1, 4, 234, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2161 = VCMPGTUD |
4197 | | { 2160, 3, 1, 4, 486, 0, 1, PPCImpOpBase + 78, 296, 0, 0x28ULL }, // Inst #2160 = VCMPGTUB_rec |
4198 | | { 2159, 3, 1, 4, 169, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2159 = VCMPGTUB |
4199 | | { 2158, 3, 1, 4, 486, 0, 1, PPCImpOpBase + 78, 296, 0, 0x28ULL }, // Inst #2158 = VCMPGTSW_rec |
4200 | | { 2157, 3, 1, 4, 169, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2157 = VCMPGTSW |
4201 | | { 2156, 3, 1, 4, 488, 0, 1, PPCImpOpBase + 78, 296, 0, 0x28ULL }, // Inst #2156 = VCMPGTSQ_rec |
4202 | | { 2155, 3, 1, 4, 488, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2155 = VCMPGTSQ |
4203 | | { 2154, 3, 1, 4, 486, 0, 1, PPCImpOpBase + 78, 296, 0, 0x28ULL }, // Inst #2154 = VCMPGTSH_rec |
4204 | | { 2153, 3, 1, 4, 169, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2153 = VCMPGTSH |
4205 | | { 2152, 3, 1, 4, 487, 0, 1, PPCImpOpBase + 78, 296, 0, 0x28ULL }, // Inst #2152 = VCMPGTSD_rec |
4206 | | { 2151, 3, 1, 4, 234, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2151 = VCMPGTSD |
4207 | | { 2150, 3, 1, 4, 486, 0, 1, PPCImpOpBase + 78, 296, 0, 0x28ULL }, // Inst #2150 = VCMPGTSB_rec |
4208 | | { 2149, 3, 1, 4, 169, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2149 = VCMPGTSB |
4209 | | { 2148, 3, 1, 4, 486, 0, 1, PPCImpOpBase + 78, 296, 0, 0x28ULL }, // Inst #2148 = VCMPGTFP_rec |
4210 | | { 2147, 3, 1, 4, 486, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2147 = VCMPGTFP |
4211 | | { 2146, 3, 1, 4, 486, 0, 1, PPCImpOpBase + 78, 296, 0, 0x28ULL }, // Inst #2146 = VCMPGEFP_rec |
4212 | | { 2145, 3, 1, 4, 486, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2145 = VCMPGEFP |
4213 | | { 2144, 3, 1, 4, 486, 0, 1, PPCImpOpBase + 78, 296, 0, 0x28ULL }, // Inst #2144 = VCMPEQUW_rec |
4214 | | { 2143, 3, 1, 4, 169, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2143 = VCMPEQUW |
4215 | | { 2142, 3, 1, 4, 488, 0, 1, PPCImpOpBase + 78, 296, 0, 0x28ULL }, // Inst #2142 = VCMPEQUQ_rec |
4216 | | { 2141, 3, 1, 4, 488, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2141 = VCMPEQUQ |
4217 | | { 2140, 3, 1, 4, 486, 0, 1, PPCImpOpBase + 78, 296, 0, 0x28ULL }, // Inst #2140 = VCMPEQUH_rec |
4218 | | { 2139, 3, 1, 4, 169, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2139 = VCMPEQUH |
4219 | | { 2138, 3, 1, 4, 487, 0, 1, PPCImpOpBase + 78, 296, 0, 0x28ULL }, // Inst #2138 = VCMPEQUD_rec |
4220 | | { 2137, 3, 1, 4, 234, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2137 = VCMPEQUD |
4221 | | { 2136, 3, 1, 4, 486, 0, 1, PPCImpOpBase + 78, 296, 0, 0x28ULL }, // Inst #2136 = VCMPEQUB_rec |
4222 | | { 2135, 3, 1, 4, 169, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2135 = VCMPEQUB |
4223 | | { 2134, 3, 1, 4, 486, 0, 1, PPCImpOpBase + 78, 296, 0, 0x28ULL }, // Inst #2134 = VCMPEQFP_rec |
4224 | | { 2133, 3, 1, 4, 486, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2133 = VCMPEQFP |
4225 | | { 2132, 3, 1, 4, 486, 0, 1, PPCImpOpBase + 78, 296, 0, 0x28ULL }, // Inst #2132 = VCMPBFP_rec |
4226 | | { 2131, 3, 1, 4, 486, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2131 = VCMPBFP |
4227 | | { 2130, 2, 1, 4, 232, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2130 = VCLZW |
4228 | | { 2129, 2, 1, 4, 578, 0, 0, PPCImpOpBase + 0, 1056, 0, 0x0ULL }, // Inst #2129 = VCLZLSBB |
4229 | | { 2128, 2, 1, 4, 232, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2128 = VCLZH |
4230 | | { 2127, 3, 1, 4, 450, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2127 = VCLZDM |
4231 | | { 2126, 2, 1, 4, 232, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2126 = VCLZD |
4232 | | { 2125, 2, 1, 4, 232, 0, 0, PPCImpOpBase + 0, 299, 0, 0x0ULL }, // Inst #2125 = VCLZB |
4233 | | { 2124, 3, 1, 4, 586, 0, 0, PPCImpOpBase + 0, 1053, 0, 0x0ULL }, // Inst #2124 = VCLRRB |
4234 | | { 2123, 3, 1, 4, 586, 0, 0, PPCImpOpBase + 0, 1053, 0, 0x0ULL }, // Inst #2123 = VCLRLB |
4235 | | { 2122, 3, 1, 4, 182, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2122 = VCIPHERLAST |
4236 | | { 2121, 3, 1, 4, 182, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2121 = VCIPHER |
4237 | | { 2120, 2, 1, 4, 429, 0, 0, PPCImpOpBase + 0, 299, 0, 0x28ULL }, // Inst #2120 = VCFUX_0 |
4238 | | { 2119, 3, 1, 4, 428, 0, 0, PPCImpOpBase + 0, 1050, 0, 0x28ULL }, // Inst #2119 = VCFUX |
4239 | | { 2118, 3, 1, 4, 450, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2118 = VCFUGED |
4240 | | { 2117, 2, 1, 4, 429, 0, 0, PPCImpOpBase + 0, 299, 0, 0x28ULL }, // Inst #2117 = VCFSX_0 |
4241 | | { 2116, 3, 1, 4, 428, 0, 0, PPCImpOpBase + 0, 1050, 0, 0x28ULL }, // Inst #2116 = VCFSX |
4242 | | { 2115, 3, 1, 4, 585, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2115 = VBPERMQ |
4243 | | { 2114, 3, 1, 4, 308, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2114 = VBPERMD |
4244 | | { 2113, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2113 = VAVGUW |
4245 | | { 2112, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2112 = VAVGUH |
4246 | | { 2111, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2111 = VAVGUB |
4247 | | { 2110, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2110 = VAVGSW |
4248 | | { 2109, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2109 = VAVGSH |
4249 | | { 2108, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2108 = VAVGSB |
4250 | | { 2107, 3, 1, 4, 261, 0, 0, PPCImpOpBase + 0, 296, 0, 0x28ULL }, // Inst #2107 = VANDC |
4251 | | { 2106, 3, 1, 4, 261, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2106 = VAND |
4252 | | { 2105, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2105 = VADDUWS |
4253 | | { 2104, 3, 1, 4, 167, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2104 = VADDUWM |
4254 | | { 2103, 3, 1, 4, 238, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2103 = VADDUQM |
4255 | | { 2102, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2102 = VADDUHS |
4256 | | { 2101, 3, 1, 4, 167, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2101 = VADDUHM |
4257 | | { 2100, 3, 1, 4, 260, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2100 = VADDUDM |
4258 | | { 2099, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2099 = VADDUBS |
4259 | | { 2098, 3, 1, 4, 167, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2098 = VADDUBM |
4260 | | { 2097, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2097 = VADDSWS |
4261 | | { 2096, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2096 = VADDSHS |
4262 | | { 2095, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2095 = VADDSBS |
4263 | | { 2094, 3, 1, 4, 437, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2094 = VADDFP |
4264 | | { 2093, 4, 1, 4, 237, 0, 0, PPCImpOpBase + 0, 1046, 0, 0x0ULL }, // Inst #2093 = VADDEUQM |
4265 | | { 2092, 4, 1, 4, 237, 0, 0, PPCImpOpBase + 0, 1046, 0, 0x0ULL }, // Inst #2092 = VADDECUQ |
4266 | | { 2091, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2091 = VADDCUW |
4267 | | { 2090, 3, 1, 4, 466, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2090 = VADDCUQ |
4268 | | { 2089, 3, 1, 4, 307, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2089 = VABSDUW |
4269 | | { 2088, 3, 1, 4, 307, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2088 = VABSDUH |
4270 | | { 2087, 3, 1, 4, 307, 0, 0, PPCImpOpBase + 0, 296, 0, 0x0ULL }, // Inst #2087 = VABSDUB |
4271 | | { 2086, 3, 2, 4, 0, 0, 0, PPCImpOpBase + 0, 208, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2086 = UpdateGBR |
4272 | | { 2085, 0, 0, 4, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2085 = UNENCODED_NOP |
4273 | | { 2084, 3, 0, 4, 484, 0, 0, PPCImpOpBase + 0, 1029, 0|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2084 = TWI |
4274 | | { 2083, 3, 0, 4, 195, 0, 0, PPCImpOpBase + 0, 414, 0|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2083 = TW |
4275 | | { 2082, 1, 0, 4, 305, 0, 1, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2082 = TSR |
4276 | | { 2081, 1, 0, 4, 305, 0, 1, PPCImpOpBase + 0, 159, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2081 = TRECLAIM |
4277 | | { 2080, 0, 0, 4, 295, 0, 1, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2080 = TRECHKPT |
4278 | | { 2079, 0, 0, 4, 492, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Trap)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2079 = TRAP |
4279 | | { 2078, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 214, 0, 0x0ULL }, // Inst #2078 = TLSGDAIX8 |
4280 | | { 2077, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 208, 0, 0x0ULL }, // Inst #2077 = TLSGDAIX |
4281 | | { 2076, 3, 0, 4, 618, 0, 0, PPCImpOpBase + 0, 172, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2076 = TLBWE2 |
4282 | | { 2075, 0, 0, 4, 413, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2075 = TLBWE |
4283 | | { 2074, 0, 0, 4, 345, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2074 = TLBSYNC |
4284 | | { 2073, 3, 0, 4, 618, 0, 0, PPCImpOpBase + 0, 208, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2073 = TLBSX2D |
4285 | | { 2072, 3, 0, 4, 618, 0, 0, PPCImpOpBase + 0, 208, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2072 = TLBSX2 |
4286 | | { 2071, 2, 0, 4, 413, 0, 0, PPCImpOpBase + 0, 251, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2071 = TLBSX |
4287 | | { 2070, 3, 1, 4, 618, 0, 0, PPCImpOpBase + 0, 172, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2070 = TLBRE2 |
4288 | | { 2069, 0, 0, 4, 413, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2069 = TLBRE |
4289 | | { 2068, 1, 0, 4, 618, 0, 0, PPCImpOpBase + 0, 159, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2068 = TLBLI |
4290 | | { 2067, 1, 0, 4, 618, 0, 0, PPCImpOpBase + 0, 159, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2067 = TLBLD |
4291 | | { 2066, 2, 0, 4, 413, 0, 0, PPCImpOpBase + 0, 251, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2066 = TLBIVAX |
4292 | | { 2065, 3, 0, 4, 15, 0, 0, PPCImpOpBase + 0, 414, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2065 = TLBILX |
4293 | | { 2064, 1, 0, 4, 354, 0, 0, PPCImpOpBase + 0, 159, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2064 = TLBIEL |
4294 | | { 2063, 2, 0, 4, 372, 0, 0, PPCImpOpBase + 0, 251, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2063 = TLBIE |
4295 | | { 2062, 0, 0, 4, 419, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2062 = TLBIA |
4296 | | { 2061, 1, 0, 4, 357, 0, 1, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2061 = TEND |
4297 | | { 2060, 3, 0, 4, 483, 0, 0, PPCImpOpBase + 0, 1043, 0|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2060 = TDI |
4298 | | { 2059, 3, 0, 4, 194, 0, 0, PPCImpOpBase + 0, 1040, 0|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2059 = TD |
4299 | | { 2058, 2, 0, 4, 0, 1, 0, PPCImpOpBase + 134, 1038, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #2058 = TCRETURNri8 |
4300 | | { 2057, 2, 0, 4, 0, 1, 0, PPCImpOpBase + 134, 1036, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #2057 = TCRETURNri |
4301 | | { 2056, 2, 0, 4, 0, 1, 0, PPCImpOpBase + 134, 1034, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #2056 = TCRETURNdi8 |
4302 | | { 2055, 2, 0, 4, 0, 1, 0, PPCImpOpBase + 134, 1034, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #2055 = TCRETURNdi |
4303 | | { 2054, 2, 0, 4, 0, 1, 0, PPCImpOpBase + 134, 1032, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #2054 = TCRETURNai8 |
4304 | | { 2053, 2, 0, 4, 0, 1, 0, PPCImpOpBase + 134, 1032, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #2053 = TCRETURNai |
4305 | | { 2052, 1, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 159, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2052 = TCHECK_RET |
4306 | | { 2051, 1, 1, 4, 359, 0, 0, PPCImpOpBase + 0, 642, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2051 = TCHECK |
4307 | | { 2050, 2, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 595, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2050 = TBEGIN_RET |
4308 | | { 2049, 1, 0, 4, 295, 0, 1, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2049 = TBEGIN |
4309 | | { 2048, 0, 0, 4, 402, 2, 0, PPCImpOpBase + 209, 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #2048 = TAILBCTR8 |
4310 | | { 2047, 0, 0, 4, 402, 2, 0, PPCImpOpBase + 207, 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #2047 = TAILBCTR |
4311 | | { 2046, 1, 0, 4, 446, 1, 0, PPCImpOpBase + 134, 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #2046 = TAILBA8 |
4312 | | { 2045, 1, 0, 4, 446, 1, 0, PPCImpOpBase + 134, 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #2045 = TAILBA |
4313 | | { 2044, 1, 0, 4, 446, 1, 0, PPCImpOpBase + 134, 277, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #2044 = TAILB8 |
4314 | | { 2043, 1, 0, 4, 446, 1, 0, PPCImpOpBase + 134, 277, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #2043 = TAILB |
4315 | | { 2042, 3, 0, 4, 271, 0, 1, PPCImpOpBase + 0, 1029, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2042 = TABORTWCI |
4316 | | { 2041, 3, 0, 4, 271, 0, 1, PPCImpOpBase + 0, 414, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2041 = TABORTWC |
4317 | | { 2040, 3, 0, 4, 271, 0, 1, PPCImpOpBase + 0, 1029, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2040 = TABORTDCI |
4318 | | { 2039, 3, 0, 4, 271, 0, 1, PPCImpOpBase + 0, 414, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2039 = TABORTDC |
4319 | | { 2038, 1, 0, 4, 305, 0, 1, PPCImpOpBase + 0, 159, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2038 = TABORT |
4320 | | { 2037, 2, 0, 4, 612, 0, 0, PPCImpOpBase + 0, 21, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2037 = SYNCP10 |
4321 | | { 2036, 1, 0, 4, 346, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2036 = SYNC |
4322 | | { 2035, 3, 1, 4, 287, 0, 1, PPCImpOpBase + 0, 208, 0, 0x8ULL }, // Inst #2035 = SUBF_rec |
4323 | | { 2034, 2, 1, 4, 532, 1, 2, PPCImpOpBase + 22, 251, 0, 0x8ULL }, // Inst #2034 = SUBFZE_rec |
4324 | | { 2033, 2, 1, 4, 532, 1, 3, PPCImpOpBase + 18, 251, 0, 0x8ULL }, // Inst #2033 = SUBFZEO_rec |
4325 | | { 2032, 2, 1, 4, 502, 1, 2, PPCImpOpBase + 15, 251, 0, 0x8ULL }, // Inst #2032 = SUBFZEO |
4326 | | { 2031, 2, 1, 4, 532, 1, 2, PPCImpOpBase + 22, 253, 0, 0x8ULL }, // Inst #2031 = SUBFZE8_rec |
4327 | | { 2030, 2, 1, 4, 532, 1, 3, PPCImpOpBase + 18, 253, 0, 0x8ULL }, // Inst #2030 = SUBFZE8O_rec |
4328 | | { 2029, 2, 1, 4, 502, 1, 2, PPCImpOpBase + 15, 253, 0, 0x8ULL }, // Inst #2029 = SUBFZE8O |
4329 | | { 2028, 2, 1, 4, 501, 1, 1, PPCImpOpBase + 13, 253, 0, 0x8ULL }, // Inst #2028 = SUBFZE8 |
4330 | | { 2027, 2, 1, 4, 501, 1, 1, PPCImpOpBase + 13, 251, 0, 0x8ULL }, // Inst #2027 = SUBFZE |
4331 | | { 2026, 4, 1, 4, 144, 0, 1, PPCImpOpBase + 0, 227, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2026 = SUBFUS_rec |
4332 | | { 2025, 4, 1, 4, 144, 0, 0, PPCImpOpBase + 0, 227, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2025 = SUBFUS |
4333 | | { 2024, 3, 1, 4, 534, 0, 2, PPCImpOpBase + 3, 208, 0, 0x8ULL }, // Inst #2024 = SUBFO_rec |
4334 | | { 2023, 3, 1, 4, 521, 0, 1, PPCImpOpBase + 2, 208, 0, 0x8ULL }, // Inst #2023 = SUBFO |
4335 | | { 2022, 2, 1, 4, 532, 1, 2, PPCImpOpBase + 22, 251, 0, 0x8ULL }, // Inst #2022 = SUBFME_rec |
4336 | | { 2021, 2, 1, 4, 532, 1, 3, PPCImpOpBase + 18, 251, 0, 0x8ULL }, // Inst #2021 = SUBFMEO_rec |
4337 | | { 2020, 2, 1, 4, 502, 1, 2, PPCImpOpBase + 15, 251, 0, 0x8ULL }, // Inst #2020 = SUBFMEO |
4338 | | { 2019, 2, 1, 4, 532, 1, 2, PPCImpOpBase + 22, 253, 0, 0x8ULL }, // Inst #2019 = SUBFME8_rec |
4339 | | { 2018, 2, 1, 4, 532, 1, 3, PPCImpOpBase + 18, 253, 0, 0x8ULL }, // Inst #2018 = SUBFME8O_rec |
4340 | | { 2017, 2, 1, 4, 502, 1, 2, PPCImpOpBase + 15, 253, 0, 0x8ULL }, // Inst #2017 = SUBFME8O |
4341 | | { 2016, 2, 1, 4, 501, 1, 1, PPCImpOpBase + 13, 253, 0, 0x8ULL }, // Inst #2016 = SUBFME8 |
4342 | | { 2015, 2, 1, 4, 501, 1, 1, PPCImpOpBase + 13, 251, 0, 0x8ULL }, // Inst #2015 = SUBFME |
4343 | | { 2014, 3, 1, 4, 501, 0, 1, PPCImpOpBase + 5, 169, 0, 0x8ULL }, // Inst #2014 = SUBFIC8 |
4344 | | { 2013, 3, 1, 4, 501, 0, 1, PPCImpOpBase + 5, 172, 0, 0x8ULL }, // Inst #2013 = SUBFIC |
4345 | | { 2012, 3, 1, 4, 534, 1, 2, PPCImpOpBase + 22, 208, 0, 0x8ULL }, // Inst #2012 = SUBFE_rec |
4346 | | { 2011, 3, 1, 4, 534, 1, 3, PPCImpOpBase + 18, 208, 0, 0x8ULL }, // Inst #2011 = SUBFEO_rec |
4347 | | { 2010, 3, 1, 4, 521, 1, 2, PPCImpOpBase + 15, 208, 0, 0x8ULL }, // Inst #2010 = SUBFEO |
4348 | | { 2009, 3, 1, 4, 534, 1, 2, PPCImpOpBase + 22, 214, 0, 0x8ULL }, // Inst #2009 = SUBFE8_rec |
4349 | | { 2008, 3, 1, 4, 534, 1, 3, PPCImpOpBase + 18, 214, 0, 0x8ULL }, // Inst #2008 = SUBFE8O_rec |
4350 | | { 2007, 3, 1, 4, 521, 1, 2, PPCImpOpBase + 15, 214, 0, 0x8ULL }, // Inst #2007 = SUBFE8O |
4351 | | { 2006, 3, 1, 4, 142, 1, 1, PPCImpOpBase + 13, 214, 0, 0x8ULL }, // Inst #2006 = SUBFE8 |
4352 | | { 2005, 3, 1, 4, 142, 1, 1, PPCImpOpBase + 13, 208, 0, 0x8ULL }, // Inst #2005 = SUBFE |
4353 | | { 2004, 3, 1, 4, 538, 0, 2, PPCImpOpBase + 11, 208, 0, 0xcULL }, // Inst #2004 = SUBFC_rec |
4354 | | { 2003, 3, 1, 4, 390, 0, 3, PPCImpOpBase + 8, 208, 0, 0xcULL }, // Inst #2003 = SUBFCO_rec |
4355 | | { 2002, 3, 1, 4, 286, 0, 2, PPCImpOpBase + 6, 208, 0, 0xcULL }, // Inst #2002 = SUBFCO |
4356 | | { 2001, 3, 1, 4, 538, 0, 2, PPCImpOpBase + 11, 214, 0, 0xcULL }, // Inst #2001 = SUBFC8_rec |
4357 | | { 2000, 3, 1, 4, 390, 0, 3, PPCImpOpBase + 8, 214, 0, 0xcULL }, // Inst #2000 = SUBFC8O_rec |
4358 | | { 1999, 3, 1, 4, 286, 0, 2, PPCImpOpBase + 6, 214, 0, 0xcULL }, // Inst #1999 = SUBFC8O |
4359 | | { 1998, 3, 1, 4, 286, 0, 1, PPCImpOpBase + 5, 214, 0, 0xcULL }, // Inst #1998 = SUBFC8 |
4360 | | { 1997, 3, 1, 4, 286, 0, 1, PPCImpOpBase + 5, 208, 0, 0xcULL }, // Inst #1997 = SUBFC |
4361 | | { 1996, 3, 1, 4, 200, 0, 1, PPCImpOpBase + 0, 214, 0, 0x8ULL }, // Inst #1996 = SUBF8_rec |
4362 | | { 1995, 3, 1, 4, 534, 0, 2, PPCImpOpBase + 3, 214, 0, 0x8ULL }, // Inst #1995 = SUBF8O_rec |
4363 | | { 1994, 3, 1, 4, 521, 0, 1, PPCImpOpBase + 2, 214, 0, 0x8ULL }, // Inst #1994 = SUBF8O |
4364 | | { 1993, 3, 1, 4, 139, 0, 0, PPCImpOpBase + 0, 214, 0, 0x8ULL }, // Inst #1993 = SUBF8 |
4365 | | { 1992, 3, 1, 4, 228, 0, 0, PPCImpOpBase + 0, 208, 0, 0x8ULL }, // Inst #1992 = SUBF |
4366 | | { 1991, 3, 0, 4, 373, 0, 0, PPCImpOpBase + 0, 615, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #1991 = STXVX |
4367 | | { 1990, 3, 0, 4, 116, 0, 0, PPCImpOpBase + 0, 615, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #1990 = STXVW4X |
4368 | | { 1989, 3, 0, 4, 609, 0, 0, PPCImpOpBase + 0, 615, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #1989 = STXVRWX |
4369 | | { 1988, 3, 0, 4, 15, 0, 0, PPCImpOpBase + 0, 620, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL }, // Inst #1988 = STXVRLL |
4370 | | { 1987, 3, 0, 4, 15, 0, 0, PPCImpOpBase + 0, 620, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL }, // Inst #1987 = STXVRL |
4371 | | { 1986, 3, 0, 4, 609, 0, 0, PPCImpOpBase + 0, 615, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #1986 = STXVRHX |
4372 | | { 1985, 3, 0, 4, 609, 0, 0, PPCImpOpBase + 0, 615, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #1985 = STXVRDX |
4373 | | { 1984, 3, 0, 4, 609, 0, 0, PPCImpOpBase + 0, 615, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #1984 = STXVRBX |
4374 | | { 1983, 3, 0, 4, 615, 0, 0, PPCImpOpBase + 0, 629, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #1983 = STXVPX |
4375 | | { 1982, 3, 0, 4, 40, 0, 0, PPCImpOpBase + 0, 626, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL }, // Inst #1982 = STXVPRLL |
4376 | | { 1981, 3, 0, 4, 40, 0, 0, PPCImpOpBase + 0, 626, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL }, // Inst #1981 = STXVPRL |
4377 | | { 1980, 3, 0, 4, 614, 0, 0, PPCImpOpBase + 0, 623, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1980 = STXVP |
4378 | | { 1979, 3, 0, 4, 374, 0, 0, PPCImpOpBase + 0, 620, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #1979 = STXVLL |
4379 | | { 1978, 3, 0, 4, 374, 0, 0, PPCImpOpBase + 0, 620, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #1978 = STXVL |
4380 | | { 1977, 3, 0, 4, 373, 0, 0, PPCImpOpBase + 0, 615, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #1977 = STXVH8X |
4381 | | { 1976, 3, 0, 4, 116, 0, 0, PPCImpOpBase + 0, 615, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #1976 = STXVD2X |
4382 | | { 1975, 3, 0, 4, 373, 0, 0, PPCImpOpBase + 0, 615, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #1975 = STXVB16X |
4383 | | { 1974, 3, 0, 4, 604, 0, 0, PPCImpOpBase + 0, 612, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1974 = STXV |
4384 | | { 1973, 3, 0, 4, 366, 0, 0, PPCImpOpBase + 0, 205, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #1973 = STXSSPX |
4385 | | { 1972, 3, 0, 4, 603, 0, 0, PPCImpOpBase + 0, 609, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1972 = STXSSP |
4386 | | { 1971, 3, 0, 4, 366, 0, 0, PPCImpOpBase + 0, 191, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #1971 = STXSIWX |
4387 | | { 1970, 3, 0, 4, 367, 0, 0, PPCImpOpBase + 0, 615, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #1970 = STXSIHXv |
4388 | | { 1969, 3, 0, 4, 367, 0, 0, PPCImpOpBase + 0, 191, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #1969 = STXSIHX |
4389 | | { 1968, 3, 0, 4, 367, 0, 0, PPCImpOpBase + 0, 615, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #1968 = STXSIBXv |
4390 | | { 1967, 3, 0, 4, 367, 0, 0, PPCImpOpBase + 0, 191, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #1967 = STXSIBX |
4391 | | { 1966, 3, 0, 4, 368, 0, 0, PPCImpOpBase + 0, 191, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #1966 = STXSDX |
4392 | | { 1965, 3, 0, 4, 602, 0, 0, PPCImpOpBase + 0, 609, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1965 = STXSD |
4393 | | { 1964, 3, 0, 4, 370, 0, 0, PPCImpOpBase + 0, 549, 0|(1ULL<<MCID::MayStore), 0xcULL }, // Inst #1964 = STWXTLS_32 |
4394 | | { 1963, 3, 0, 4, 370, 0, 0, PPCImpOpBase + 0, 546, 0|(1ULL<<MCID::MayStore), 0xcULL }, // Inst #1963 = STWXTLS_ |
4395 | | { 1962, 3, 0, 4, 370, 0, 0, PPCImpOpBase + 0, 546, 0|(1ULL<<MCID::MayStore), 0xcULL }, // Inst #1962 = STWXTLS |
4396 | | { 1961, 3, 0, 4, 127, 0, 0, PPCImpOpBase + 0, 543, 0|(1ULL<<MCID::MayStore), 0x54ULL }, // Inst #1961 = STWX8 |
4397 | | { 1960, 3, 0, 4, 127, 0, 0, PPCImpOpBase + 0, 524, 0|(1ULL<<MCID::MayStore), 0x54ULL }, // Inst #1960 = STWX |
4398 | | { 1959, 4, 1, 4, 133, 0, 0, PPCImpOpBase + 0, 1009, 0|(1ULL<<MCID::MayStore), 0x54ULL }, // Inst #1959 = STWUX8 |
4399 | | { 1958, 4, 1, 4, 133, 0, 0, PPCImpOpBase + 0, 1005, 0|(1ULL<<MCID::MayStore), 0x54ULL }, // Inst #1958 = STWUX |
4400 | | { 1957, 4, 1, 4, 132, 0, 0, PPCImpOpBase + 0, 1001, 0|(1ULL<<MCID::MayStore), 0x10ULL }, // Inst #1957 = STWU8 |
4401 | | { 1956, 4, 1, 4, 132, 0, 0, PPCImpOpBase + 0, 997, 0|(1ULL<<MCID::MayStore), 0x10ULL }, // Inst #1956 = STWU |
4402 | | { 1955, 3, 0, 4, 217, 0, 0, PPCImpOpBase + 0, 524, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1955 = STWEPX |
4403 | | { 1954, 3, 0, 4, 130, 0, 1, PPCImpOpBase + 0, 524, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #1954 = STWCX |
4404 | | { 1953, 3, 0, 4, 611, 0, 0, PPCImpOpBase + 0, 208, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL }, // Inst #1953 = STWCIX |
4405 | | { 1952, 3, 0, 4, 127, 0, 0, PPCImpOpBase + 0, 524, 0|(1ULL<<MCID::MayStore), 0x54ULL }, // Inst #1952 = STWBRX |
4406 | | { 1951, 3, 0, 4, 404, 0, 0, PPCImpOpBase + 0, 172, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #1951 = STWAT |
4407 | | { 1950, 3, 0, 4, 596, 0, 0, PPCImpOpBase + 0, 513, 0|(1ULL<<MCID::MayStore), 0x10ULL }, // Inst #1950 = STW8 |
4408 | | { 1949, 3, 0, 4, 596, 0, 0, PPCImpOpBase + 0, 188, 0|(1ULL<<MCID::MayStore), 0x10ULL }, // Inst #1949 = STW |
4409 | | { 1948, 3, 0, 4, 122, 0, 0, PPCImpOpBase + 0, 603, 0|(1ULL<<MCID::MayStore), 0x50ULL }, // Inst #1948 = STVXL |
4410 | | { 1947, 3, 0, 4, 122, 0, 0, PPCImpOpBase + 0, 603, 0|(1ULL<<MCID::MayStore), 0x50ULL }, // Inst #1947 = STVX |
4411 | | { 1946, 3, 0, 4, 122, 0, 0, PPCImpOpBase + 0, 603, 0|(1ULL<<MCID::MayStore), 0x50ULL }, // Inst #1946 = STVEWX |
4412 | | { 1945, 3, 0, 4, 122, 0, 0, PPCImpOpBase + 0, 603, 0|(1ULL<<MCID::MayStore), 0x50ULL }, // Inst #1945 = STVEHX |
4413 | | { 1944, 3, 0, 4, 122, 0, 0, PPCImpOpBase + 0, 603, 0|(1ULL<<MCID::MayStore), 0x50ULL }, // Inst #1944 = STVEBX |
4414 | | { 1943, 3, 0, 4, 221, 0, 0, PPCImpOpBase + 0, 172, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL }, // Inst #1943 = STSWI |
4415 | | { 1942, 3, 0, 4, 0, 0, 0, PPCImpOpBase + 0, 600, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x10ULL }, // Inst #1942 = STQX_PSEUDO |
4416 | | { 1941, 3, 0, 4, 92, 0, 1, PPCImpOpBase + 0, 600, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #1941 = STQCX |
4417 | | { 1940, 3, 0, 4, 91, 0, 0, PPCImpOpBase + 0, 855, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x10ULL }, // Inst #1940 = STQ |
4418 | | { 1939, 0, 0, 4, 425, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1939 = STOP |
4419 | | { 1938, 3, 0, 4, 129, 0, 0, PPCImpOpBase + 0, 188, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1938 = STMW |
4420 | | { 1937, 3, 0, 4, 370, 0, 0, PPCImpOpBase + 0, 549, 0|(1ULL<<MCID::MayStore), 0xcULL }, // Inst #1937 = STHXTLS_32 |
4421 | | { 1936, 3, 0, 4, 370, 0, 0, PPCImpOpBase + 0, 546, 0|(1ULL<<MCID::MayStore), 0xcULL }, // Inst #1936 = STHXTLS_ |
4422 | | { 1935, 3, 0, 4, 370, 0, 0, PPCImpOpBase + 0, 546, 0|(1ULL<<MCID::MayStore), 0xcULL }, // Inst #1935 = STHXTLS |
4423 | | { 1934, 3, 0, 4, 127, 0, 0, PPCImpOpBase + 0, 543, 0|(1ULL<<MCID::MayStore), 0x54ULL }, // Inst #1934 = STHX8 |
4424 | | { 1933, 3, 0, 4, 127, 0, 0, PPCImpOpBase + 0, 524, 0|(1ULL<<MCID::MayStore), 0x54ULL }, // Inst #1933 = STHX |
4425 | | { 1932, 4, 1, 4, 133, 0, 0, PPCImpOpBase + 0, 1009, 0|(1ULL<<MCID::MayStore), 0x54ULL }, // Inst #1932 = STHUX8 |
4426 | | { 1931, 4, 1, 4, 133, 0, 0, PPCImpOpBase + 0, 1005, 0|(1ULL<<MCID::MayStore), 0x54ULL }, // Inst #1931 = STHUX |
4427 | | { 1930, 4, 1, 4, 132, 0, 0, PPCImpOpBase + 0, 1001, 0|(1ULL<<MCID::MayStore), 0x10ULL }, // Inst #1930 = STHU8 |
4428 | | { 1929, 4, 1, 4, 132, 0, 0, PPCImpOpBase + 0, 997, 0|(1ULL<<MCID::MayStore), 0x10ULL }, // Inst #1929 = STHU |
4429 | | { 1928, 3, 0, 4, 217, 0, 0, PPCImpOpBase + 0, 524, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1928 = STHEPX |
4430 | | { 1927, 3, 0, 4, 220, 0, 1, PPCImpOpBase + 0, 524, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #1927 = STHCX |
4431 | | { 1926, 3, 0, 4, 611, 0, 0, PPCImpOpBase + 0, 208, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL }, // Inst #1926 = STHCIX |
4432 | | { 1925, 3, 0, 4, 127, 0, 0, PPCImpOpBase + 0, 524, 0|(1ULL<<MCID::MayStore), 0x54ULL }, // Inst #1925 = STHBRX |
4433 | | { 1924, 3, 0, 4, 596, 0, 0, PPCImpOpBase + 0, 513, 0|(1ULL<<MCID::MayStore), 0x10ULL }, // Inst #1924 = STH8 |
4434 | | { 1923, 3, 0, 4, 596, 0, 0, PPCImpOpBase + 0, 188, 0|(1ULL<<MCID::MayStore), 0x10ULL }, // Inst #1923 = STH |
4435 | | { 1922, 3, 0, 4, 366, 0, 0, PPCImpOpBase + 0, 592, 0|(1ULL<<MCID::MayStore), 0xcULL }, // Inst #1922 = STFSXTLS_ |
4436 | | { 1921, 3, 0, 4, 366, 0, 0, PPCImpOpBase + 0, 592, 0|(1ULL<<MCID::MayStore), 0xcULL }, // Inst #1921 = STFSXTLS |
4437 | | { 1920, 3, 0, 4, 120, 0, 0, PPCImpOpBase + 0, 589, 0|(1ULL<<MCID::MayStore), 0x50ULL }, // Inst #1920 = STFSX |
4438 | | { 1919, 4, 1, 4, 121, 0, 0, PPCImpOpBase + 0, 1025, 0|(1ULL<<MCID::MayStore), 0x54ULL }, // Inst #1919 = STFSUX |
4439 | | { 1918, 4, 1, 4, 601, 0, 0, PPCImpOpBase + 0, 1021, 0|(1ULL<<MCID::MayStore), 0x10ULL }, // Inst #1918 = STFSU |
4440 | | { 1917, 3, 0, 4, 600, 0, 0, PPCImpOpBase + 0, 578, 0|(1ULL<<MCID::MayStore), 0x10ULL }, // Inst #1917 = STFS |
4441 | | { 1916, 3, 0, 4, 120, 0, 0, PPCImpOpBase + 0, 564, 0|(1ULL<<MCID::MayStore), 0x50ULL }, // Inst #1916 = STFIWX |
4442 | | { 1915, 3, 0, 4, 366, 0, 0, PPCImpOpBase + 0, 575, 0|(1ULL<<MCID::MayStore), 0xcULL }, // Inst #1915 = STFDXTLS_ |
4443 | | { 1914, 3, 0, 4, 366, 0, 0, PPCImpOpBase + 0, 575, 0|(1ULL<<MCID::MayStore), 0xcULL }, // Inst #1914 = STFDXTLS |
4444 | | { 1913, 3, 0, 4, 120, 0, 0, PPCImpOpBase + 0, 564, 0|(1ULL<<MCID::MayStore), 0x50ULL }, // Inst #1913 = STFDX |
4445 | | { 1912, 4, 1, 4, 121, 0, 0, PPCImpOpBase + 0, 1017, 0|(1ULL<<MCID::MayStore), 0x54ULL }, // Inst #1912 = STFDUX |
4446 | | { 1911, 4, 1, 4, 601, 0, 0, PPCImpOpBase + 0, 1013, 0|(1ULL<<MCID::MayStore), 0x10ULL }, // Inst #1911 = STFDU |
4447 | | { 1910, 3, 0, 4, 216, 0, 0, PPCImpOpBase + 0, 564, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL }, // Inst #1910 = STFDEPX |
4448 | | { 1909, 3, 0, 4, 600, 0, 0, PPCImpOpBase + 0, 561, 0|(1ULL<<MCID::MayStore), 0x10ULL }, // Inst #1909 = STFD |
4449 | | { 1908, 3, 0, 4, 218, 0, 0, PPCImpOpBase + 0, 546, 0|(1ULL<<MCID::MayStore), 0xcULL }, // Inst #1908 = STDXTLS_ |
4450 | | { 1907, 3, 0, 4, 218, 0, 0, PPCImpOpBase + 0, 546, 0|(1ULL<<MCID::MayStore), 0xcULL }, // Inst #1907 = STDXTLS |
4451 | | { 1906, 3, 0, 4, 128, 0, 0, PPCImpOpBase + 0, 543, 0|(1ULL<<MCID::MayStore), 0x54ULL }, // Inst #1906 = STDX |
4452 | | { 1905, 4, 1, 4, 133, 0, 0, PPCImpOpBase + 0, 1009, 0|(1ULL<<MCID::MayStore), 0x54ULL }, // Inst #1905 = STDUX |
4453 | | { 1904, 4, 1, 4, 132, 0, 0, PPCImpOpBase + 0, 1001, 0|(1ULL<<MCID::MayStore), 0x10ULL }, // Inst #1904 = STDU |
4454 | | { 1903, 3, 0, 4, 131, 0, 1, PPCImpOpBase + 0, 543, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #1903 = STDCX |
4455 | | { 1902, 3, 0, 4, 219, 0, 0, PPCImpOpBase + 0, 208, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL }, // Inst #1902 = STDCIX |
4456 | | { 1901, 3, 0, 4, 370, 0, 0, PPCImpOpBase + 0, 543, 0|(1ULL<<MCID::MayStore), 0x54ULL }, // Inst #1901 = STDBRX |
4457 | | { 1900, 3, 0, 4, 404, 0, 0, PPCImpOpBase + 0, 169, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #1900 = STDAT |
4458 | | { 1899, 3, 0, 4, 598, 0, 0, PPCImpOpBase + 0, 513, 0|(1ULL<<MCID::MayStore), 0x10ULL }, // Inst #1899 = STD |
4459 | | { 1898, 3, 0, 4, 370, 0, 0, PPCImpOpBase + 0, 549, 0|(1ULL<<MCID::MayStore), 0xcULL }, // Inst #1898 = STBXTLS_32 |
4460 | | { 1897, 3, 0, 4, 370, 0, 0, PPCImpOpBase + 0, 546, 0|(1ULL<<MCID::MayStore), 0xcULL }, // Inst #1897 = STBXTLS_ |
4461 | | { 1896, 3, 0, 4, 370, 0, 0, PPCImpOpBase + 0, 546, 0|(1ULL<<MCID::MayStore), 0xcULL }, // Inst #1896 = STBXTLS |
4462 | | { 1895, 3, 0, 4, 127, 0, 0, PPCImpOpBase + 0, 543, 0|(1ULL<<MCID::MayStore), 0x54ULL }, // Inst #1895 = STBX8 |
4463 | | { 1894, 3, 0, 4, 127, 0, 0, PPCImpOpBase + 0, 524, 0|(1ULL<<MCID::MayStore), 0x54ULL }, // Inst #1894 = STBX |
4464 | | { 1893, 4, 1, 4, 133, 0, 0, PPCImpOpBase + 0, 1009, 0|(1ULL<<MCID::MayStore), 0x54ULL }, // Inst #1893 = STBUX8 |
4465 | | { 1892, 4, 1, 4, 133, 0, 0, PPCImpOpBase + 0, 1005, 0|(1ULL<<MCID::MayStore), 0x54ULL }, // Inst #1892 = STBUX |
4466 | | { 1891, 4, 1, 4, 132, 0, 0, PPCImpOpBase + 0, 1001, 0|(1ULL<<MCID::MayStore), 0x10ULL }, // Inst #1891 = STBU8 |
4467 | | { 1890, 4, 1, 4, 132, 0, 0, PPCImpOpBase + 0, 997, 0|(1ULL<<MCID::MayStore), 0x10ULL }, // Inst #1890 = STBU |
4468 | | { 1889, 3, 0, 4, 217, 0, 0, PPCImpOpBase + 0, 524, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1889 = STBEPX |
4469 | | { 1888, 3, 0, 4, 220, 0, 1, PPCImpOpBase + 0, 524, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #1888 = STBCX |
4470 | | { 1887, 3, 0, 4, 219, 0, 0, PPCImpOpBase + 0, 208, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL }, // Inst #1887 = STBCIX |
4471 | | { 1886, 3, 0, 4, 596, 0, 0, PPCImpOpBase + 0, 513, 0|(1ULL<<MCID::MayStore), 0x10ULL }, // Inst #1886 = STB8 |
4472 | | { 1885, 3, 0, 4, 596, 0, 0, PPCImpOpBase + 0, 188, 0|(1ULL<<MCID::MayStore), 0x10ULL }, // Inst #1885 = STB |
4473 | | { 1884, 3, 1, 4, 199, 0, 1, PPCImpOpBase + 0, 208, 0, 0x208ULL }, // Inst #1884 = SRW_rec |
4474 | | { 1883, 3, 1, 4, 199, 0, 1, PPCImpOpBase + 0, 214, 0, 0x208ULL }, // Inst #1883 = SRW8_rec |
4475 | | { 1882, 3, 1, 4, 300, 0, 0, PPCImpOpBase + 0, 214, 0, 0x208ULL }, // Inst #1882 = SRW8 |
4476 | | { 1881, 3, 1, 4, 300, 0, 0, PPCImpOpBase + 0, 208, 0, 0x208ULL }, // Inst #1881 = SRW |
4477 | | { 1880, 3, 1, 4, 482, 0, 1, PPCImpOpBase + 0, 991, 0, 0x8ULL }, // Inst #1880 = SRD_rec |
4478 | | { 1879, 3, 1, 4, 283, 0, 0, PPCImpOpBase + 0, 991, 0, 0x8ULL }, // Inst #1879 = SRD |
4479 | | { 1878, 3, 1, 4, 147, 0, 2, PPCImpOpBase + 11, 208, 0, 0x108ULL }, // Inst #1878 = SRAW_rec |
4480 | | { 1877, 3, 1, 4, 493, 0, 2, PPCImpOpBase + 11, 172, 0, 0x108ULL }, // Inst #1877 = SRAWI_rec |
4481 | | { 1876, 3, 1, 4, 514, 0, 1, PPCImpOpBase + 5, 172, 0, 0x108ULL }, // Inst #1876 = SRAWI |
4482 | | { 1875, 3, 1, 4, 302, 0, 1, PPCImpOpBase + 5, 208, 0, 0x108ULL }, // Inst #1875 = SRAW |
4483 | | { 1874, 3, 1, 4, 146, 0, 2, PPCImpOpBase + 11, 991, 0, 0x8ULL }, // Inst #1874 = SRAD_rec |
4484 | | { 1873, 3, 1, 4, 145, 0, 2, PPCImpOpBase + 11, 169, 0, 0x8ULL }, // Inst #1873 = SRADI_rec |
4485 | | { 1872, 3, 1, 4, 284, 0, 1, PPCImpOpBase + 5, 172, 0, 0x8ULL }, // Inst #1872 = SRADI_32 |
4486 | | { 1871, 3, 1, 4, 284, 0, 1, PPCImpOpBase + 5, 169, 0, 0x8ULL }, // Inst #1871 = SRADI |
4487 | | { 1870, 3, 1, 4, 283, 0, 1, PPCImpOpBase + 5, 991, 0, 0x8ULL }, // Inst #1870 = SRAD |
4488 | | { 1869, 3, 2, 4, 0, 0, 0, PPCImpOpBase + 0, 994, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1869 = SPLIT_QUADWORD |
4489 | | { 1868, 3, 0, 4, 0, 0, 0, PPCImpOpBase + 0, 861, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1868 = SPILL_WACC |
4490 | | { 1867, 3, 0, 4, 0, 0, 0, PPCImpOpBase + 0, 858, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1867 = SPILL_UACC |
4491 | | { 1866, 3, 0, 4, 0, 0, 0, PPCImpOpBase + 0, 855, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x10ULL }, // Inst #1866 = SPILL_QUADWORD |
4492 | | { 1865, 3, 0, 4, 0, 0, 0, PPCImpOpBase + 0, 852, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1865 = SPILL_CRBIT |
4493 | | { 1864, 3, 0, 4, 0, 0, 0, PPCImpOpBase + 0, 849, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1864 = SPILL_CR |
4494 | | { 1863, 3, 0, 4, 0, 0, 0, PPCImpOpBase + 0, 846, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1863 = SPILL_ACC |
4495 | | { 1862, 3, 0, 4, 25, 0, 0, PPCImpOpBase + 0, 524, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1862 = SPESTWX |
4496 | | { 1861, 3, 0, 4, 25, 0, 0, PPCImpOpBase + 0, 188, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1861 = SPESTW |
4497 | | { 1860, 3, 1, 4, 15, 0, 0, PPCImpOpBase + 0, 524, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1860 = SPELWZX |
4498 | | { 1859, 3, 1, 4, 15, 0, 0, PPCImpOpBase + 0, 188, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1859 = SPELWZ |
4499 | | { 1858, 3, 1, 4, 199, 0, 1, PPCImpOpBase + 0, 208, 0, 0x208ULL }, // Inst #1858 = SLW_rec |
4500 | | { 1857, 3, 1, 4, 199, 0, 1, PPCImpOpBase + 0, 214, 0, 0x208ULL }, // Inst #1857 = SLW8_rec |
4501 | | { 1856, 3, 1, 4, 300, 0, 0, PPCImpOpBase + 0, 214, 0, 0x208ULL }, // Inst #1856 = SLW8 |
4502 | | { 1855, 3, 1, 4, 300, 0, 0, PPCImpOpBase + 0, 208, 0, 0x208ULL }, // Inst #1855 = SLW |
4503 | | { 1854, 3, 1, 4, 482, 0, 1, PPCImpOpBase + 0, 991, 0, 0x8ULL }, // Inst #1854 = SLD_rec |
4504 | | { 1853, 3, 1, 4, 283, 0, 0, PPCImpOpBase + 0, 991, 0, 0x8ULL }, // Inst #1853 = SLD |
4505 | | { 1852, 0, 0, 4, 423, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1852 = SLBSYNC |
4506 | | { 1851, 2, 0, 4, 353, 0, 0, PPCImpOpBase + 0, 251, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1851 = SLBMTE |
4507 | | { 1850, 2, 1, 4, 352, 0, 0, PPCImpOpBase + 0, 251, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1850 = SLBMFEV |
4508 | | { 1849, 2, 1, 4, 351, 0, 0, PPCImpOpBase + 0, 251, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1849 = SLBMFEE |
4509 | | { 1848, 2, 0, 4, 371, 0, 0, PPCImpOpBase + 0, 251, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1848 = SLBIEG |
4510 | | { 1847, 1, 0, 4, 350, 0, 0, PPCImpOpBase + 0, 159, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1847 = SLBIE |
4511 | | { 1846, 0, 0, 4, 349, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1846 = SLBIA |
4512 | | { 1845, 2, 1, 4, 424, 0, 1, PPCImpOpBase + 0, 251, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1845 = SLBFEE_rec |
4513 | | { 1844, 2, 1, 4, 0, 1, 1, PPCImpOpBase + 205, 647, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1844 = SETRNDi |
4514 | | { 1843, 2, 1, 4, 0, 1, 1, PPCImpOpBase + 205, 989, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1843 = SETRND |
4515 | | { 1842, 2, 1, 4, 513, 0, 0, PPCImpOpBase + 0, 987, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #1842 = SETNBCR8 |
4516 | | { 1841, 2, 1, 4, 513, 0, 0, PPCImpOpBase + 0, 985, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #1841 = SETNBCR |
4517 | | { 1840, 2, 1, 4, 513, 0, 0, PPCImpOpBase + 0, 987, 0, 0x100ULL }, // Inst #1840 = SETNBC8 |
4518 | | { 1839, 2, 1, 4, 513, 0, 0, PPCImpOpBase + 0, 985, 0, 0x100ULL }, // Inst #1839 = SETNBC |
4519 | | { 1838, 2, 1, 4, 0, 1, 1, PPCImpOpBase + 205, 337, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1838 = SETFLM |
4520 | | { 1837, 2, 1, 4, 513, 0, 0, PPCImpOpBase + 0, 987, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x300ULL }, // Inst #1837 = SETBCR8 |
4521 | | { 1836, 2, 1, 4, 513, 0, 0, PPCImpOpBase + 0, 985, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x300ULL }, // Inst #1836 = SETBCR |
4522 | | { 1835, 2, 1, 4, 513, 0, 0, PPCImpOpBase + 0, 987, 0, 0x300ULL }, // Inst #1835 = SETBC8 |
4523 | | { 1834, 2, 1, 4, 513, 0, 0, PPCImpOpBase + 0, 985, 0, 0x300ULL }, // Inst #1834 = SETBC |
4524 | | { 1833, 2, 1, 4, 512, 0, 0, PPCImpOpBase + 0, 983, 0, 0x108ULL }, // Inst #1833 = SETB8 |
4525 | | { 1832, 2, 1, 4, 512, 0, 0, PPCImpOpBase + 0, 981, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #1832 = SETB |
4526 | | { 1831, 4, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 953, 0|(1ULL<<MCID::UsesCustomInserter), 0x2ULL }, // Inst #1831 = SELECT_VSSRC |
4527 | | { 1830, 4, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 977, 0|(1ULL<<MCID::UsesCustomInserter), 0x2ULL }, // Inst #1830 = SELECT_VSRC |
4528 | | { 1829, 4, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 957, 0|(1ULL<<MCID::UsesCustomInserter), 0x2ULL }, // Inst #1829 = SELECT_VSFRC |
4529 | | { 1828, 4, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 949, 0|(1ULL<<MCID::UsesCustomInserter), 0x2ULL }, // Inst #1828 = SELECT_VRRC |
4530 | | { 1827, 4, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 973, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1827 = SELECT_SPE4 |
4531 | | { 1826, 4, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 969, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1826 = SELECT_SPE |
4532 | | { 1825, 4, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 965, 0|(1ULL<<MCID::UsesCustomInserter), 0x2ULL }, // Inst #1825 = SELECT_I8 |
4533 | | { 1824, 4, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 961, 0|(1ULL<<MCID::UsesCustomInserter), 0x2ULL }, // Inst #1824 = SELECT_I4 |
4534 | | { 1823, 4, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 957, 0|(1ULL<<MCID::UsesCustomInserter), 0x2ULL }, // Inst #1823 = SELECT_F8 |
4535 | | { 1822, 4, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 953, 0|(1ULL<<MCID::UsesCustomInserter), 0x2ULL }, // Inst #1822 = SELECT_F4 |
4536 | | { 1821, 4, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 949, 0|(1ULL<<MCID::UsesCustomInserter), 0x2ULL }, // Inst #1821 = SELECT_F16 |
4537 | | { 1820, 5, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 914, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL }, // Inst #1820 = SELECT_CC_VSSRC |
4538 | | { 1819, 5, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 944, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL }, // Inst #1819 = SELECT_CC_VSRC |
4539 | | { 1818, 5, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 919, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL }, // Inst #1818 = SELECT_CC_VSFRC |
4540 | | { 1817, 5, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 909, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL }, // Inst #1817 = SELECT_CC_VRRC |
4541 | | { 1816, 5, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 939, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1816 = SELECT_CC_SPE4 |
4542 | | { 1815, 5, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 934, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1815 = SELECT_CC_SPE |
4543 | | { 1814, 5, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 929, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL }, // Inst #1814 = SELECT_CC_I8 |
4544 | | { 1813, 5, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 924, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL }, // Inst #1813 = SELECT_CC_I4 |
4545 | | { 1812, 5, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 919, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL }, // Inst #1812 = SELECT_CC_F8 |
4546 | | { 1811, 5, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 914, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL }, // Inst #1811 = SELECT_CC_F4 |
4547 | | { 1810, 5, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 909, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL }, // Inst #1810 = SELECT_CC_F16 |
4548 | | { 1809, 1, 0, 4, 4, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1809 = SCV |
4549 | | { 1808, 1, 0, 4, 535, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #1808 = SC |
4550 | | { 1807, 2, 2, 4, 0, 0, 0, PPCImpOpBase + 0, 251, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1807 = ReadTB |
4551 | | { 1806, 5, 1, 4, 199, 0, 1, PPCImpOpBase + 0, 899, 0, 0x8ULL }, // Inst #1806 = RLWNM_rec |
4552 | | { 1805, 5, 1, 4, 199, 0, 1, PPCImpOpBase + 0, 904, 0, 0x8ULL }, // Inst #1805 = RLWNM8_rec |
4553 | | { 1804, 5, 1, 4, 300, 0, 0, PPCImpOpBase + 0, 904, 0, 0x8ULL }, // Inst #1804 = RLWNM8 |
4554 | | { 1803, 5, 1, 4, 300, 0, 0, PPCImpOpBase + 0, 899, 0, 0x8ULL }, // Inst #1803 = RLWNM |
4555 | | { 1802, 5, 1, 4, 474, 0, 1, PPCImpOpBase + 0, 889, 0, 0xcULL }, // Inst #1802 = RLWINM_rec |
4556 | | { 1801, 5, 1, 4, 474, 0, 1, PPCImpOpBase + 0, 894, 0, 0x8ULL }, // Inst #1801 = RLWINM8_rec |
4557 | | { 1800, 5, 1, 4, 511, 0, 0, PPCImpOpBase + 0, 894, 0, 0x8ULL }, // Inst #1800 = RLWINM8 |
4558 | | { 1799, 5, 1, 4, 511, 0, 0, PPCImpOpBase + 0, 889, 0, 0x8ULL }, // Inst #1799 = RLWINM |
4559 | | { 1798, 6, 1, 4, 204, 0, 1, PPCImpOpBase + 0, 877, 0|(1ULL<<MCID::Commutable), 0xcULL }, // Inst #1798 = RLWIMI_rec |
4560 | | { 1797, 6, 1, 4, 204, 0, 1, PPCImpOpBase + 0, 883, 0, 0xcULL }, // Inst #1797 = RLWIMI8_rec |
4561 | | { 1796, 6, 1, 4, 197, 0, 0, PPCImpOpBase + 0, 883, 0, 0xcULL }, // Inst #1796 = RLWIMI8 |
4562 | | { 1795, 6, 1, 4, 197, 0, 0, PPCImpOpBase + 0, 877, 0|(1ULL<<MCID::Commutable), 0xcULL }, // Inst #1795 = RLWIMI |
4563 | | { 1794, 5, 1, 4, 393, 0, 1, PPCImpOpBase + 0, 872, 0, 0x8ULL }, // Inst #1794 = RLDIMI_rec |
4564 | | { 1793, 5, 1, 4, 298, 0, 0, PPCImpOpBase + 0, 872, 0, 0x8ULL }, // Inst #1793 = RLDIMI |
4565 | | { 1792, 4, 1, 4, 472, 0, 1, PPCImpOpBase + 0, 161, 0, 0x8ULL }, // Inst #1792 = RLDIC_rec |
4566 | | { 1791, 4, 1, 4, 473, 0, 1, PPCImpOpBase + 0, 161, 0, 0x8ULL }, // Inst #1791 = RLDICR_rec |
4567 | | { 1790, 4, 1, 4, 510, 0, 0, PPCImpOpBase + 0, 165, 0, 0x8ULL }, // Inst #1790 = RLDICR_32 |
4568 | | { 1789, 4, 1, 4, 510, 0, 0, PPCImpOpBase + 0, 161, 0, 0x8ULL }, // Inst #1789 = RLDICR |
4569 | | { 1788, 4, 1, 4, 473, 0, 1, PPCImpOpBase + 0, 161, 0, 0x8ULL }, // Inst #1788 = RLDICL_rec |
4570 | | { 1787, 4, 1, 4, 473, 0, 1, PPCImpOpBase + 0, 165, 0, 0x8ULL }, // Inst #1787 = RLDICL_32_rec |
4571 | | { 1786, 4, 1, 4, 510, 0, 0, PPCImpOpBase + 0, 868, 0, 0x8ULL }, // Inst #1786 = RLDICL_32_64 |
4572 | | { 1785, 4, 1, 4, 510, 0, 0, PPCImpOpBase + 0, 165, 0, 0x8ULL }, // Inst #1785 = RLDICL_32 |
4573 | | { 1784, 4, 1, 4, 510, 0, 0, PPCImpOpBase + 0, 161, 0, 0x8ULL }, // Inst #1784 = RLDICL |
4574 | | { 1783, 4, 1, 4, 284, 0, 0, PPCImpOpBase + 0, 161, 0, 0x8ULL }, // Inst #1783 = RLDIC |
4575 | | { 1782, 4, 1, 4, 392, 0, 1, PPCImpOpBase + 0, 864, 0, 0x8ULL }, // Inst #1782 = RLDCR_rec |
4576 | | { 1781, 4, 1, 4, 297, 0, 0, PPCImpOpBase + 0, 864, 0, 0x8ULL }, // Inst #1781 = RLDCR |
4577 | | { 1780, 4, 1, 4, 392, 0, 1, PPCImpOpBase + 0, 864, 0, 0x8ULL }, // Inst #1780 = RLDCL_rec |
4578 | | { 1779, 4, 1, 4, 297, 0, 0, PPCImpOpBase + 0, 864, 0, 0x8ULL }, // Inst #1779 = RLDCL |
4579 | | { 1778, 0, 0, 4, 410, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1778 = RFMCI |
4580 | | { 1777, 0, 0, 4, 412, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1777 = RFID |
4581 | | { 1776, 0, 0, 4, 411, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1776 = RFI |
4582 | | { 1775, 1, 0, 4, 294, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL }, // Inst #1775 = RFEBB |
4583 | | { 1774, 0, 0, 4, 410, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1774 = RFDI |
4584 | | { 1773, 0, 0, 4, 410, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1773 = RFCI |
4585 | | { 1772, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 861, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1772 = RESTORE_WACC |
4586 | | { 1771, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 858, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1771 = RESTORE_UACC |
4587 | | { 1770, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 855, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x10ULL }, // Inst #1770 = RESTORE_QUADWORD |
4588 | | { 1769, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 852, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1769 = RESTORE_CRBIT |
4589 | | { 1768, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1768 = RESTORE_CR |
4590 | | { 1767, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 846, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1767 = RESTORE_ACC |
4591 | | { 1766, 0, 0, 4, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1766 = PseudoEIEIO |
4592 | | { 1765, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 746, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1765 = PSTXVpc |
4593 | | { 1764, 2, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 618, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1764 = PSTXVonlypc |
4594 | | { 1763, 3, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 735, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1763 = PSTXVnopc |
4595 | | { 1762, 3, 0, 8, 595, 0, 0, PPCImpOpBase + 0, 743, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1762 = PSTXVPpc |
4596 | | { 1761, 2, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 741, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1761 = PSTXVPonlypc |
4597 | | { 1760, 3, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 738, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1760 = PSTXVPnopc |
4598 | | { 1759, 3, 0, 8, 595, 0, 0, PPCImpOpBase + 0, 738, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1759 = PSTXVP |
4599 | | { 1758, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 735, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1758 = PSTXV |
4600 | | { 1757, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 732, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1757 = PSTXSSPpc |
4601 | | { 1756, 2, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 730, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1756 = PSTXSSPonlypc |
4602 | | { 1755, 3, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 727, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1755 = PSTXSSPnopc |
4603 | | { 1754, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 727, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1754 = PSTXSSP |
4604 | | { 1753, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 732, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1753 = PSTXSDpc |
4605 | | { 1752, 2, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 730, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1752 = PSTXSDonlypc |
4606 | | { 1751, 3, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 727, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1751 = PSTXSDnopc |
4607 | | { 1750, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 727, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1750 = PSTXSD |
4608 | | { 1749, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 710, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1749 = PSTWpc |
4609 | | { 1748, 2, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 595, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1748 = PSTWonlypc |
4610 | | { 1747, 3, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 701, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1747 = PSTWnopc |
4611 | | { 1746, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 707, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1746 = PSTW8pc |
4612 | | { 1745, 2, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 203, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1745 = PSTW8onlypc |
4613 | | { 1744, 3, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 704, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1744 = PSTW8nopc |
4614 | | { 1743, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 704, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1743 = PSTW8 |
4615 | | { 1742, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 701, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1742 = PSTW |
4616 | | { 1741, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 710, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1741 = PSTHpc |
4617 | | { 1740, 2, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 595, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1740 = PSTHonlypc |
4618 | | { 1739, 3, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 701, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1739 = PSTHnopc |
4619 | | { 1738, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 707, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1738 = PSTH8pc |
4620 | | { 1737, 2, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 203, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1737 = PSTH8onlypc |
4621 | | { 1736, 3, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 704, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1736 = PSTH8nopc |
4622 | | { 1735, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 704, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1735 = PSTH8 |
4623 | | { 1734, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 701, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1734 = PSTH |
4624 | | { 1733, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 724, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1733 = PSTFSpc |
4625 | | { 1732, 2, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 722, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1732 = PSTFSonlypc |
4626 | | { 1731, 3, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 719, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1731 = PSTFSnopc |
4627 | | { 1730, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 719, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1730 = PSTFS |
4628 | | { 1729, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 716, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1729 = PSTFDpc |
4629 | | { 1728, 2, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 647, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1728 = PSTFDonlypc |
4630 | | { 1727, 3, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 713, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1727 = PSTFDnopc |
4631 | | { 1726, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 713, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1726 = PSTFD |
4632 | | { 1725, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 707, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1725 = PSTDpc |
4633 | | { 1724, 2, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 203, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1724 = PSTDonlypc |
4634 | | { 1723, 3, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 704, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1723 = PSTDnopc |
4635 | | { 1722, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 704, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1722 = PSTD |
4636 | | { 1721, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 710, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1721 = PSTBpc |
4637 | | { 1720, 2, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 595, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1720 = PSTBonlypc |
4638 | | { 1719, 3, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 701, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1719 = PSTBnopc |
4639 | | { 1718, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 707, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1718 = PSTB8pc |
4640 | | { 1717, 2, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 203, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1717 = PSTB8onlypc |
4641 | | { 1716, 3, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 704, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1716 = PSTB8nopc |
4642 | | { 1715, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 704, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1715 = PSTB8 |
4643 | | { 1714, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 701, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1714 = PSTB |
4644 | | { 1713, 3, 2, 4, 0, 1, 1, PPCImpOpBase + 132, 169, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1713 = PROBED_STACKALLOC_64 |
4645 | | { 1712, 3, 2, 4, 0, 1, 1, PPCImpOpBase + 61, 172, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1712 = PROBED_STACKALLOC_32 |
4646 | | { 1711, 4, 1, 4, 0, 1, 1, PPCImpOpBase + 132, 439, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1711 = PROBED_ALLOCA_64 |
4647 | | { 1710, 4, 1, 4, 0, 1, 1, PPCImpOpBase + 61, 435, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1710 = PROBED_ALLOCA_32 |
4648 | | { 1709, 5, 2, 4, 0, 1, 1, PPCImpOpBase + 132, 841, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1709 = PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_64 |
4649 | | { 1708, 5, 2, 4, 0, 1, 1, PPCImpOpBase + 61, 836, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1708 = PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_32 |
4650 | | { 1707, 5, 2, 4, 0, 1, 1, PPCImpOpBase + 132, 831, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1707 = PREPARE_PROBED_ALLOCA_64 |
4651 | | { 1706, 5, 2, 4, 0, 1, 1, PPCImpOpBase + 61, 826, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1706 = PREPARE_PROBED_ALLOCA_32 |
4652 | | { 1705, 2, 2, 4, 0, 0, 0, PPCImpOpBase + 0, 251, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1705 = PPC32PICGOT |
4653 | | { 1704, 1, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 159, 0, 0x0ULL }, // Inst #1704 = PPC32GOT |
4654 | | { 1703, 2, 1, 4, 280, 0, 0, PPCImpOpBase + 0, 251, 0, 0x8ULL }, // Inst #1703 = POPCNTW |
4655 | | { 1702, 2, 1, 4, 280, 0, 0, PPCImpOpBase + 0, 253, 0, 0x308ULL }, // Inst #1702 = POPCNTD |
4656 | | { 1701, 2, 1, 4, 206, 0, 0, PPCImpOpBase + 0, 253, 0, 0x8ULL }, // Inst #1701 = POPCNTB8 |
4657 | | { 1700, 2, 1, 4, 206, 0, 0, PPCImpOpBase + 0, 251, 0, 0x0ULL }, // Inst #1700 = POPCNTB |
4658 | | { 1699, 7, 1, 8, 23, 0, 0, PPCImpOpBase + 0, 768, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1699 = PMXVI8GER4WSPP |
4659 | | { 1698, 7, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 768, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1698 = PMXVI8GER4WPP |
4660 | | { 1697, 6, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 762, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1697 = PMXVI8GER4W |
4661 | | { 1696, 7, 1, 8, 569, 0, 0, PPCImpOpBase + 0, 755, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1696 = PMXVI8GER4SPP |
4662 | | { 1695, 7, 1, 8, 568, 0, 0, PPCImpOpBase + 0, 755, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1695 = PMXVI8GER4PP |
4663 | | { 1694, 6, 1, 8, 567, 0, 0, PPCImpOpBase + 0, 749, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1694 = PMXVI8GER4 |
4664 | | { 1693, 7, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 768, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1693 = PMXVI4GER8WPP |
4665 | | { 1692, 6, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 762, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1692 = PMXVI4GER8W |
4666 | | { 1691, 7, 1, 8, 568, 0, 0, PPCImpOpBase + 0, 755, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1691 = PMXVI4GER8PP |
4667 | | { 1690, 6, 1, 8, 567, 0, 0, PPCImpOpBase + 0, 749, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1690 = PMXVI4GER8 |
4668 | | { 1689, 7, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 819, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1689 = PMXVI16GER2WPP |
4669 | | { 1688, 6, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 762, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1688 = PMXVI16GER2W |
4670 | | { 1687, 7, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 768, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1687 = PMXVI16GER2SWPP |
4671 | | { 1686, 6, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 762, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1686 = PMXVI16GER2SW |
4672 | | { 1685, 7, 1, 8, 568, 0, 0, PPCImpOpBase + 0, 755, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1685 = PMXVI16GER2SPP |
4673 | | { 1684, 6, 1, 8, 567, 0, 0, PPCImpOpBase + 0, 749, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1684 = PMXVI16GER2S |
4674 | | { 1683, 7, 1, 8, 568, 0, 0, PPCImpOpBase + 0, 755, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1683 = PMXVI16GER2PP |
4675 | | { 1682, 6, 1, 8, 567, 0, 0, PPCImpOpBase + 0, 749, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1682 = PMXVI16GER2 |
4676 | | { 1681, 6, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 813, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1681 = PMXVF64GERWPP |
4677 | | { 1680, 6, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 813, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1680 = PMXVF64GERWPN |
4678 | | { 1679, 6, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 813, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1679 = PMXVF64GERWNP |
4679 | | { 1678, 6, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 813, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1678 = PMXVF64GERWNN |
4680 | | { 1677, 5, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 808, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1677 = PMXVF64GERW |
4681 | | { 1676, 6, 1, 8, 568, 0, 0, PPCImpOpBase + 0, 802, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1676 = PMXVF64GERPP |
4682 | | { 1675, 6, 1, 8, 568, 0, 0, PPCImpOpBase + 0, 802, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1675 = PMXVF64GERPN |
4683 | | { 1674, 6, 1, 8, 568, 0, 0, PPCImpOpBase + 0, 802, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1674 = PMXVF64GERNP |
4684 | | { 1673, 6, 1, 8, 568, 0, 0, PPCImpOpBase + 0, 802, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1673 = PMXVF64GERNN |
4685 | | { 1672, 5, 1, 8, 567, 0, 0, PPCImpOpBase + 0, 797, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1672 = PMXVF64GER |
4686 | | { 1671, 6, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 791, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1671 = PMXVF32GERWPP |
4687 | | { 1670, 6, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 791, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1670 = PMXVF32GERWPN |
4688 | | { 1669, 6, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 791, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1669 = PMXVF32GERWNP |
4689 | | { 1668, 6, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 791, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1668 = PMXVF32GERWNN |
4690 | | { 1667, 5, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 786, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1667 = PMXVF32GERW |
4691 | | { 1666, 6, 1, 8, 568, 0, 0, PPCImpOpBase + 0, 780, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1666 = PMXVF32GERPP |
4692 | | { 1665, 6, 1, 8, 568, 0, 0, PPCImpOpBase + 0, 780, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1665 = PMXVF32GERPN |
4693 | | { 1664, 6, 1, 8, 568, 0, 0, PPCImpOpBase + 0, 780, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1664 = PMXVF32GERNP |
4694 | | { 1663, 6, 1, 8, 568, 0, 0, PPCImpOpBase + 0, 780, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1663 = PMXVF32GERNN |
4695 | | { 1662, 5, 1, 8, 567, 0, 0, PPCImpOpBase + 0, 775, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1662 = PMXVF32GER |
4696 | | { 1661, 7, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 768, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1661 = PMXVF16GER2WPP |
4697 | | { 1660, 7, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 768, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1660 = PMXVF16GER2WPN |
4698 | | { 1659, 7, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 768, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1659 = PMXVF16GER2WNP |
4699 | | { 1658, 7, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 768, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1658 = PMXVF16GER2WNN |
4700 | | { 1657, 6, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 762, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1657 = PMXVF16GER2W |
4701 | | { 1656, 7, 1, 8, 568, 0, 0, PPCImpOpBase + 0, 755, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1656 = PMXVF16GER2PP |
4702 | | { 1655, 7, 1, 8, 568, 0, 0, PPCImpOpBase + 0, 755, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1655 = PMXVF16GER2PN |
4703 | | { 1654, 7, 1, 8, 568, 0, 0, PPCImpOpBase + 0, 755, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1654 = PMXVF16GER2NP |
4704 | | { 1653, 7, 1, 8, 568, 0, 0, PPCImpOpBase + 0, 755, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1653 = PMXVF16GER2NN |
4705 | | { 1652, 6, 1, 8, 567, 0, 0, PPCImpOpBase + 0, 749, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1652 = PMXVF16GER2 |
4706 | | { 1651, 7, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 768, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1651 = PMXVBF16GER2WPP |
4707 | | { 1650, 7, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 768, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1650 = PMXVBF16GER2WPN |
4708 | | { 1649, 7, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 768, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1649 = PMXVBF16GER2WNP |
4709 | | { 1648, 7, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 768, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1648 = PMXVBF16GER2WNN |
4710 | | { 1647, 6, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 762, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1647 = PMXVBF16GER2W |
4711 | | { 1646, 7, 1, 8, 568, 0, 0, PPCImpOpBase + 0, 755, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1646 = PMXVBF16GER2PP |
4712 | | { 1645, 7, 1, 8, 568, 0, 0, PPCImpOpBase + 0, 755, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1645 = PMXVBF16GER2PN |
4713 | | { 1644, 7, 1, 8, 568, 0, 0, PPCImpOpBase + 0, 755, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1644 = PMXVBF16GER2NP |
4714 | | { 1643, 7, 1, 8, 568, 0, 0, PPCImpOpBase + 0, 755, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1643 = PMXVBF16GER2NN |
4715 | | { 1642, 6, 1, 8, 567, 0, 0, PPCImpOpBase + 0, 749, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1642 = PMXVBF16GER2 |
4716 | | { 1641, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 746, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1641 = PLXVpc |
4717 | | { 1640, 2, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 618, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1640 = PLXVonlypc |
4718 | | { 1639, 3, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 735, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1639 = PLXVnopc |
4719 | | { 1638, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 743, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1638 = PLXVPpc |
4720 | | { 1637, 2, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 741, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1637 = PLXVPonlypc |
4721 | | { 1636, 3, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 738, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1636 = PLXVPnopc |
4722 | | { 1635, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 738, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1635 = PLXVP |
4723 | | { 1634, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 735, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1634 = PLXV |
4724 | | { 1633, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 732, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1633 = PLXSSPpc |
4725 | | { 1632, 2, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 730, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1632 = PLXSSPonlypc |
4726 | | { 1631, 3, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 727, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1631 = PLXSSPnopc |
4727 | | { 1630, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 727, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1630 = PLXSSP |
4728 | | { 1629, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 732, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1629 = PLXSDpc |
4729 | | { 1628, 2, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 730, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1628 = PLXSDonlypc |
4730 | | { 1627, 3, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 727, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1627 = PLXSDnopc |
4731 | | { 1626, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 727, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1626 = PLXSD |
4732 | | { 1625, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 710, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1625 = PLWZpc |
4733 | | { 1624, 2, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 595, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1624 = PLWZonlypc |
4734 | | { 1623, 3, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 701, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1623 = PLWZnopc |
4735 | | { 1622, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 707, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1622 = PLWZ8pc |
4736 | | { 1621, 2, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 203, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1621 = PLWZ8onlypc |
4737 | | { 1620, 3, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 704, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1620 = PLWZ8nopc |
4738 | | { 1619, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 704, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1619 = PLWZ8 |
4739 | | { 1618, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 701, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1618 = PLWZ |
4740 | | { 1617, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 710, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1617 = PLWApc |
4741 | | { 1616, 2, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 595, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1616 = PLWAonlypc |
4742 | | { 1615, 3, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 701, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1615 = PLWAnopc |
4743 | | { 1614, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 707, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1614 = PLWA8pc |
4744 | | { 1613, 2, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 203, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1613 = PLWA8onlypc |
4745 | | { 1612, 3, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 704, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1612 = PLWA8nopc |
4746 | | { 1611, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 704, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1611 = PLWA8 |
4747 | | { 1610, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 701, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1610 = PLWA |
4748 | | { 1609, 2, 1, 8, 621, 0, 0, PPCImpOpBase + 0, 203, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x80ULL }, // Inst #1609 = PLI8 |
4749 | | { 1608, 2, 1, 8, 621, 0, 0, PPCImpOpBase + 0, 595, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x80ULL }, // Inst #1608 = PLI |
4750 | | { 1607, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 710, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1607 = PLHZpc |
4751 | | { 1606, 2, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 595, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1606 = PLHZonlypc |
4752 | | { 1605, 3, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 701, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1605 = PLHZnopc |
4753 | | { 1604, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 707, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1604 = PLHZ8pc |
4754 | | { 1603, 2, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 203, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1603 = PLHZ8onlypc |
4755 | | { 1602, 3, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 704, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1602 = PLHZ8nopc |
4756 | | { 1601, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 704, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1601 = PLHZ8 |
4757 | | { 1600, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 701, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1600 = PLHZ |
4758 | | { 1599, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 710, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1599 = PLHApc |
4759 | | { 1598, 2, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 595, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1598 = PLHAonlypc |
4760 | | { 1597, 3, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 701, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1597 = PLHAnopc |
4761 | | { 1596, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 707, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1596 = PLHA8pc |
4762 | | { 1595, 2, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 203, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1595 = PLHA8onlypc |
4763 | | { 1594, 3, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 704, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1594 = PLHA8nopc |
4764 | | { 1593, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 704, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1593 = PLHA8 |
4765 | | { 1592, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 701, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1592 = PLHA |
4766 | | { 1591, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 724, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1591 = PLFSpc |
4767 | | { 1590, 2, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 722, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1590 = PLFSonlypc |
4768 | | { 1589, 3, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 719, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1589 = PLFSnopc |
4769 | | { 1588, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 719, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1588 = PLFS |
4770 | | { 1587, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 716, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1587 = PLFDpc |
4771 | | { 1586, 2, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 647, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1586 = PLFDonlypc |
4772 | | { 1585, 3, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 713, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1585 = PLFDnopc |
4773 | | { 1584, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 713, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1584 = PLFD |
4774 | | { 1583, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 707, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1583 = PLDpc |
4775 | | { 1582, 2, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 203, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1582 = PLDonlypc |
4776 | | { 1581, 3, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 704, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1581 = PLDnopc |
4777 | | { 1580, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 704, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1580 = PLD |
4778 | | { 1579, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 710, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1579 = PLBZpc |
4779 | | { 1578, 2, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 595, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1578 = PLBZonlypc |
4780 | | { 1577, 3, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 701, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1577 = PLBZnopc |
4781 | | { 1576, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 707, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1576 = PLBZ8pc |
4782 | | { 1575, 2, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 203, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1575 = PLBZ8onlypc |
4783 | | { 1574, 3, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 704, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1574 = PLBZ8nopc |
4784 | | { 1573, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 704, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1573 = PLBZ8 |
4785 | | { 1572, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 701, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1572 = PLBZ |
4786 | | { 1571, 2, 1, 8, 2, 0, 0, PPCImpOpBase + 0, 595, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1571 = PLApc |
4787 | | { 1570, 2, 1, 8, 2, 0, 0, PPCImpOpBase + 0, 203, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1570 = PLA8pc |
4788 | | { 1569, 3, 1, 8, 2, 0, 0, PPCImpOpBase + 0, 194, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1569 = PLA8 |
4789 | | { 1568, 3, 1, 8, 2, 0, 0, PPCImpOpBase + 0, 231, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1568 = PLA |
4790 | | { 1567, 3, 1, 4, 449, 0, 0, PPCImpOpBase + 0, 214, 0, 0x0ULL }, // Inst #1567 = PEXTD |
4791 | | { 1566, 3, 1, 4, 449, 0, 0, PPCImpOpBase + 0, 214, 0, 0x0ULL }, // Inst #1566 = PDEPD |
4792 | | { 1565, 3, 1, 8, 620, 0, 0, PPCImpOpBase + 0, 643, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1565 = PADDIpc |
4793 | | { 1564, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 194, 0, 0x0ULL }, // Inst #1564 = PADDIdtprel |
4794 | | { 1563, 3, 1, 8, 620, 0, 0, PPCImpOpBase + 0, 698, 0, 0x80ULL }, // Inst #1563 = PADDI8pc |
4795 | | { 1562, 3, 1, 8, 620, 0, 0, PPCImpOpBase + 0, 194, 0, 0x80ULL }, // Inst #1562 = PADDI8 |
4796 | | { 1561, 3, 1, 8, 620, 0, 0, PPCImpOpBase + 0, 231, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1561 = PADDI |
4797 | | { 1560, 3, 1, 4, 201, 0, 1, PPCImpOpBase + 0, 208, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1560 = OR_rec |
4798 | | { 1559, 3, 1, 4, 508, 0, 0, PPCImpOpBase + 0, 169, 0, 0x8ULL }, // Inst #1559 = ORIS8 |
4799 | | { 1558, 3, 1, 4, 508, 0, 0, PPCImpOpBase + 0, 172, 0, 0x8ULL }, // Inst #1558 = ORIS |
4800 | | { 1557, 3, 1, 4, 508, 0, 0, PPCImpOpBase + 0, 169, 0, 0x8ULL }, // Inst #1557 = ORI8 |
4801 | | { 1556, 3, 1, 4, 508, 0, 0, PPCImpOpBase + 0, 172, 0, 0x8ULL }, // Inst #1556 = ORI |
4802 | | { 1555, 3, 1, 4, 198, 0, 1, PPCImpOpBase + 0, 208, 0, 0x8ULL }, // Inst #1555 = ORC_rec |
4803 | | { 1554, 3, 1, 4, 198, 0, 1, PPCImpOpBase + 0, 214, 0, 0x8ULL }, // Inst #1554 = ORC8_rec |
4804 | | { 1553, 3, 1, 4, 198, 0, 0, PPCImpOpBase + 0, 214, 0, 0x8ULL }, // Inst #1553 = ORC8 |
4805 | | { 1552, 3, 1, 4, 198, 0, 0, PPCImpOpBase + 0, 208, 0, 0x8ULL }, // Inst #1552 = ORC |
4806 | | { 1551, 3, 1, 4, 201, 0, 1, PPCImpOpBase + 0, 214, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1551 = OR8_rec |
4807 | | { 1550, 3, 1, 4, 201, 0, 0, PPCImpOpBase + 0, 214, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1550 = OR8 |
4808 | | { 1549, 3, 1, 4, 201, 0, 0, PPCImpOpBase + 0, 208, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1549 = OR |
4809 | | { 1548, 3, 1, 4, 198, 0, 1, PPCImpOpBase + 0, 208, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1548 = NOR_rec |
4810 | | { 1547, 3, 1, 4, 198, 0, 1, PPCImpOpBase + 0, 214, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1547 = NOR8_rec |
4811 | | { 1546, 3, 1, 4, 198, 0, 0, PPCImpOpBase + 0, 214, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1546 = NOR8 |
4812 | | { 1545, 3, 1, 4, 198, 0, 0, PPCImpOpBase + 0, 208, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1545 = NOR |
4813 | | { 1544, 0, 0, 4, 418, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL }, // Inst #1544 = NOP_GT_PWR7 |
4814 | | { 1543, 0, 0, 4, 418, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL }, // Inst #1543 = NOP_GT_PWR6 |
4815 | | { 1542, 0, 0, 4, 509, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL }, // Inst #1542 = NOP |
4816 | | { 1541, 2, 1, 4, 508, 0, 1, PPCImpOpBase + 0, 251, 0, 0x8ULL }, // Inst #1541 = NEG_rec |
4817 | | { 1540, 2, 1, 4, 533, 0, 2, PPCImpOpBase + 3, 251, 0, 0x8ULL }, // Inst #1540 = NEGO_rec |
4818 | | { 1539, 2, 1, 4, 498, 0, 1, PPCImpOpBase + 2, 251, 0, 0x8ULL }, // Inst #1539 = NEGO |
4819 | | { 1538, 2, 1, 4, 508, 0, 1, PPCImpOpBase + 0, 253, 0, 0x8ULL }, // Inst #1538 = NEG8_rec |
4820 | | { 1537, 2, 1, 4, 533, 0, 2, PPCImpOpBase + 3, 253, 0, 0x8ULL }, // Inst #1537 = NEG8O_rec |
4821 | | { 1536, 2, 1, 4, 498, 0, 1, PPCImpOpBase + 2, 253, 0, 0x8ULL }, // Inst #1536 = NEG8O |
4822 | | { 1535, 2, 1, 4, 498, 0, 0, PPCImpOpBase + 0, 253, 0, 0x8ULL }, // Inst #1535 = NEG8 |
4823 | | { 1534, 2, 1, 4, 498, 0, 0, PPCImpOpBase + 0, 251, 0, 0x8ULL }, // Inst #1534 = NEG |
4824 | | { 1533, 0, 0, 4, 616, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1533 = NAP |
4825 | | { 1532, 3, 1, 4, 198, 0, 1, PPCImpOpBase + 0, 208, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1532 = NAND_rec |
4826 | | { 1531, 3, 1, 4, 198, 0, 1, PPCImpOpBase + 0, 214, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1531 = NAND8_rec |
4827 | | { 1530, 3, 1, 4, 198, 0, 0, PPCImpOpBase + 0, 214, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1530 = NAND8 |
4828 | | { 1529, 3, 1, 4, 198, 0, 0, PPCImpOpBase + 0, 208, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1529 = NAND |
4829 | | { 1528, 0, 0, 4, 0, 0, 1, PPCImpOpBase + 204, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #1528 = MovePCtoLR8 |
4830 | | { 1527, 0, 0, 4, 0, 0, 1, PPCImpOpBase + 203, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #1527 = MovePCtoLR |
4831 | | { 1526, 0, 0, 4, 0, 0, 1, PPCImpOpBase + 203, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #1526 = MoveGOTtoLR |
4832 | | { 1525, 3, 1, 4, 150, 0, 1, PPCImpOpBase + 0, 208, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1525 = MULLW_rec |
4833 | | { 1524, 3, 1, 4, 150, 0, 2, PPCImpOpBase + 3, 208, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1524 = MULLWO_rec |
4834 | | { 1523, 3, 1, 4, 312, 0, 1, PPCImpOpBase + 2, 208, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1523 = MULLWO |
4835 | | { 1522, 3, 1, 4, 312, 0, 0, PPCImpOpBase + 0, 208, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1522 = MULLW |
4836 | | { 1521, 3, 1, 4, 149, 0, 0, PPCImpOpBase + 0, 169, 0, 0x8ULL }, // Inst #1521 = MULLI8 |
4837 | | { 1520, 3, 1, 4, 149, 0, 0, PPCImpOpBase + 0, 172, 0, 0x8ULL }, // Inst #1520 = MULLI |
4838 | | { 1519, 3, 1, 4, 152, 0, 1, PPCImpOpBase + 0, 214, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1519 = MULLD_rec |
4839 | | { 1518, 3, 1, 4, 152, 0, 2, PPCImpOpBase + 3, 214, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1518 = MULLDO_rec |
4840 | | { 1517, 3, 1, 4, 314, 0, 1, PPCImpOpBase + 2, 214, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1517 = MULLDO |
4841 | | { 1516, 3, 1, 4, 314, 0, 0, PPCImpOpBase + 0, 214, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1516 = MULLD |
4842 | | { 1515, 3, 1, 4, 150, 0, 1, PPCImpOpBase + 0, 208, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1515 = MULHW_rec |
4843 | | { 1514, 3, 1, 4, 151, 0, 1, PPCImpOpBase + 0, 208, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1514 = MULHWU_rec |
4844 | | { 1513, 3, 1, 4, 313, 0, 0, PPCImpOpBase + 0, 208, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1513 = MULHWU |
4845 | | { 1512, 3, 1, 4, 312, 0, 0, PPCImpOpBase + 0, 208, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1512 = MULHW |
4846 | | { 1511, 3, 1, 4, 150, 0, 1, PPCImpOpBase + 0, 214, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1511 = MULHD_rec |
4847 | | { 1510, 3, 1, 4, 151, 0, 1, PPCImpOpBase + 0, 214, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1510 = MULHDU_rec |
4848 | | { 1509, 3, 1, 4, 313, 0, 0, PPCImpOpBase + 0, 214, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1509 = MULHDU |
4849 | | { 1508, 3, 1, 4, 312, 0, 0, PPCImpOpBase + 0, 214, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1508 = MULHD |
4850 | | { 1507, 2, 1, 4, 259, 0, 0, PPCImpOpBase + 0, 696, 0, 0x0ULL }, // Inst #1507 = MTVSRWZ |
4851 | | { 1506, 2, 1, 4, 578, 0, 0, PPCImpOpBase + 0, 685, 0, 0x0ULL }, // Inst #1506 = MTVSRWS |
4852 | | { 1505, 2, 1, 4, 471, 0, 0, PPCImpOpBase + 0, 687, 0, 0x0ULL }, // Inst #1505 = MTVSRWM |
4853 | | { 1504, 2, 1, 4, 259, 0, 0, PPCImpOpBase + 0, 696, 0, 0x0ULL }, // Inst #1504 = MTVSRWA |
4854 | | { 1503, 2, 1, 4, 471, 0, 0, PPCImpOpBase + 0, 687, 0, 0x0ULL }, // Inst #1503 = MTVSRQM |
4855 | | { 1502, 2, 1, 4, 471, 0, 0, PPCImpOpBase + 0, 687, 0, 0x0ULL }, // Inst #1502 = MTVSRHM |
4856 | | { 1501, 2, 1, 4, 471, 0, 0, PPCImpOpBase + 0, 687, 0, 0x0ULL }, // Inst #1501 = MTVSRDM |
4857 | | { 1500, 3, 1, 4, 262, 0, 0, PPCImpOpBase + 0, 693, 0, 0x0ULL }, // Inst #1500 = MTVSRDD |
4858 | | { 1499, 2, 1, 4, 259, 0, 0, PPCImpOpBase + 0, 691, 0, 0x0ULL }, // Inst #1499 = MTVSRD |
4859 | | { 1498, 2, 1, 4, 468, 0, 0, PPCImpOpBase + 0, 689, 0, 0x0ULL }, // Inst #1498 = MTVSRBMI |
4860 | | { 1497, 2, 1, 4, 471, 0, 0, PPCImpOpBase + 0, 687, 0, 0x0ULL }, // Inst #1497 = MTVSRBM |
4861 | | { 1496, 1, 0, 4, 236, 0, 0, PPCImpOpBase + 0, 659, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1496 = MTVSCR |
4862 | | { 1495, 2, 1, 4, 259, 0, 0, PPCImpOpBase + 0, 685, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1495 = MTVRWZ |
4863 | | { 1494, 2, 1, 4, 259, 0, 0, PPCImpOpBase + 0, 685, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1494 = MTVRWA |
4864 | | { 1493, 2, 1, 4, 554, 0, 0, PPCImpOpBase + 0, 683, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xaULL }, // Inst #1493 = MTVRSAVEv |
4865 | | { 1492, 1, 0, 4, 554, 0, 0, PPCImpOpBase + 0, 159, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xaULL }, // Inst #1492 = MTVRSAVE |
4866 | | { 1491, 2, 1, 4, 259, 0, 0, PPCImpOpBase + 0, 681, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1491 = MTVRD |
4867 | | { 1490, 1, 0, 4, 382, 0, 0, PPCImpOpBase + 0, 159, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xaULL }, // Inst #1490 = MTUDSCR |
4868 | | { 1489, 2, 0, 4, 415, 0, 0, PPCImpOpBase + 0, 251, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1489 = MTSRIN |
4869 | | { 1488, 2, 0, 4, 553, 0, 0, PPCImpOpBase + 0, 595, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1488 = MTSR |
4870 | | { 1487, 2, 0, 4, 382, 0, 0, PPCImpOpBase + 0, 666, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1487 = MTSPR8 |
4871 | | { 1486, 2, 0, 4, 382, 0, 0, PPCImpOpBase + 0, 664, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1486 = MTSPR |
4872 | | { 1485, 2, 0, 4, 377, 0, 0, PPCImpOpBase + 0, 664, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1485 = MTPMR |
4873 | | { 1484, 2, 1, 4, 299, 0, 0, PPCImpOpBase + 0, 679, 0|(1ULL<<MCID::ExtraDefRegAllocReq), 0x21ULL }, // Inst #1484 = MTOCRF8 |
4874 | | { 1483, 2, 1, 4, 299, 0, 0, PPCImpOpBase + 0, 677, 0|(1ULL<<MCID::ExtraDefRegAllocReq), 0x21ULL }, // Inst #1483 = MTOCRF |
4875 | | { 1482, 2, 0, 4, 381, 0, 0, PPCImpOpBase + 0, 595, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1482 = MTMSRD |
4876 | | { 1481, 2, 0, 4, 380, 0, 0, PPCImpOpBase + 0, 595, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1481 = MTMSR |
4877 | | { 1480, 1, 0, 4, 104, 0, 1, PPCImpOpBase + 204, 160, 0, 0x9ULL }, // Inst #1480 = MTLR8 |
4878 | | { 1479, 1, 0, 4, 104, 0, 1, PPCImpOpBase + 203, 159, 0, 0x9ULL }, // Inst #1479 = MTLR |
4879 | | { 1478, 2, 0, 4, 186, 0, 1, PPCImpOpBase + 134, 675, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1aULL }, // Inst #1478 = MTFSFb |
4880 | | { 1477, 4, 0, 4, 185, 0, 1, PPCImpOpBase + 131, 668, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1477 = MTFSF_rec |
4881 | | { 1476, 2, 0, 4, 536, 0, 1, PPCImpOpBase + 134, 21, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1476 = MTFSFIb |
4882 | | { 1475, 3, 0, 4, 536, 0, 1, PPCImpOpBase + 131, 672, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1475 = MTFSFI_rec |
4883 | | { 1474, 3, 0, 4, 536, 0, 1, PPCImpOpBase + 134, 672, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1474 = MTFSFI |
4884 | | { 1473, 4, 0, 4, 185, 0, 1, PPCImpOpBase + 134, 668, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1473 = MTFSF |
4885 | | { 1472, 1, 0, 4, 272, 0, 1, PPCImpOpBase + 134, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1aULL }, // Inst #1472 = MTFSB1 |
4886 | | { 1471, 1, 0, 4, 531, 0, 1, PPCImpOpBase + 134, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1aULL }, // Inst #1471 = MTFSB0 |
4887 | | { 1470, 2, 0, 4, 417, 0, 0, PPCImpOpBase + 0, 595, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1470 = MTDCR |
4888 | | { 1469, 1, 0, 4, 104, 0, 1, PPCImpOpBase + 63, 159, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x9ULL }, // Inst #1469 = MTCTRloop |
4889 | | { 1468, 1, 0, 4, 104, 0, 1, PPCImpOpBase + 64, 160, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x9ULL }, // Inst #1468 = MTCTR8loop |
4890 | | { 1467, 1, 0, 4, 104, 0, 1, PPCImpOpBase + 64, 160, 0, 0x9ULL }, // Inst #1467 = MTCTR8 |
4891 | | { 1466, 1, 0, 4, 104, 0, 1, PPCImpOpBase + 63, 159, 0, 0x9ULL }, // Inst #1466 = MTCTR |
4892 | | { 1465, 2, 0, 4, 196, 0, 0, PPCImpOpBase + 0, 666, 0|(1ULL<<MCID::ExtraDefRegAllocReq), 0x20ULL }, // Inst #1465 = MTCRF8 |
4893 | | { 1464, 2, 0, 4, 196, 0, 0, PPCImpOpBase + 0, 664, 0|(1ULL<<MCID::ExtraDefRegAllocReq), 0x20ULL }, // Inst #1464 = MTCRF |
4894 | | { 1463, 0, 0, 4, 422, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1463 = MSYNC |
4895 | | { 1462, 0, 0, 4, 344, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1462 = MSGSYNC |
4896 | | { 1461, 3, 1, 4, 387, 0, 0, PPCImpOpBase + 0, 208, 0, 0x0ULL }, // Inst #1461 = MODUW |
4897 | | { 1460, 3, 1, 4, 387, 0, 0, PPCImpOpBase + 0, 214, 0, 0x8ULL }, // Inst #1460 = MODUD |
4898 | | { 1459, 3, 1, 4, 384, 0, 0, PPCImpOpBase + 0, 208, 0, 0x0ULL }, // Inst #1459 = MODSW |
4899 | | { 1458, 3, 1, 4, 387, 0, 0, PPCImpOpBase + 0, 214, 0, 0x8ULL }, // Inst #1458 = MODSD |
4900 | | { 1457, 2, 1, 4, 259, 0, 0, PPCImpOpBase + 0, 662, 0, 0x200ULL }, // Inst #1457 = MFVSRWZ |
4901 | | { 1456, 2, 1, 4, 578, 0, 0, PPCImpOpBase + 0, 653, 0, 0x0ULL }, // Inst #1456 = MFVSRLD |
4902 | | { 1455, 2, 1, 4, 259, 0, 0, PPCImpOpBase + 0, 660, 0, 0x0ULL }, // Inst #1455 = MFVSRD |
4903 | | { 1454, 1, 1, 4, 235, 0, 0, PPCImpOpBase + 0, 659, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1454 = MFVSCR |
4904 | | { 1453, 2, 1, 4, 259, 0, 0, PPCImpOpBase + 0, 657, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1453 = MFVRWZ |
4905 | | { 1452, 2, 1, 4, 375, 0, 0, PPCImpOpBase + 0, 655, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x9ULL }, // Inst #1452 = MFVRSAVEv |
4906 | | { 1451, 1, 1, 4, 375, 0, 0, PPCImpOpBase + 0, 159, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x9ULL }, // Inst #1451 = MFVRSAVE |
4907 | | { 1450, 2, 1, 4, 259, 0, 0, PPCImpOpBase + 0, 653, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1450 = MFVRD |
4908 | | { 1449, 1, 1, 4, 378, 0, 0, PPCImpOpBase + 0, 159, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x9ULL }, // Inst #1449 = MFUDSCR |
4909 | | { 1448, 1, 1, 4, 562, 0, 0, PPCImpOpBase + 0, 160, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x9ULL }, // Inst #1448 = MFTB8 |
4910 | | { 1447, 2, 1, 4, 208, 0, 0, PPCImpOpBase + 0, 595, 0, 0x0ULL }, // Inst #1447 = MFTB |
4911 | | { 1446, 2, 1, 4, 112, 0, 0, PPCImpOpBase + 0, 251, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1446 = MFSRIN |
4912 | | { 1445, 2, 1, 4, 561, 0, 0, PPCImpOpBase + 0, 595, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1445 = MFSR |
4913 | | { 1444, 2, 1, 4, 378, 0, 0, PPCImpOpBase + 0, 203, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1444 = MFSPR8 |
4914 | | { 1443, 2, 1, 4, 378, 0, 0, PPCImpOpBase + 0, 595, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1443 = MFSPR |
4915 | | { 1442, 2, 1, 4, 376, 0, 0, PPCImpOpBase + 0, 595, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1442 = MFPMR |
4916 | | { 1441, 2, 1, 4, 181, 0, 0, PPCImpOpBase + 0, 651, 0|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x21ULL }, // Inst #1441 = MFOCRF8 |
4917 | | { 1440, 2, 1, 4, 181, 0, 0, PPCImpOpBase + 0, 649, 0|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x21ULL }, // Inst #1440 = MFOCRF |
4918 | | { 1439, 1, 1, 4, 379, 0, 0, PPCImpOpBase + 0, 159, 0, 0x0ULL }, // Inst #1439 = MFMSR |
4919 | | { 1438, 1, 1, 4, 103, 1, 0, PPCImpOpBase + 204, 160, 0, 0x9ULL }, // Inst #1438 = MFLR8 |
4920 | | { 1437, 1, 1, 4, 103, 1, 0, PPCImpOpBase + 203, 159, 0, 0x9ULL }, // Inst #1437 = MFLR |
4921 | | { 1436, 1, 1, 4, 529, 1, 1, PPCImpOpBase + 135, 646, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1436 = MFFS_rec |
4922 | | { 1435, 1, 1, 4, 529, 1, 0, PPCImpOpBase + 134, 646, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1aULL }, // Inst #1435 = MFFSL |
4923 | | { 1434, 2, 1, 4, 530, 1, 0, PPCImpOpBase + 134, 647, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1aULL }, // Inst #1434 = MFFSCRNI |
4924 | | { 1433, 2, 1, 4, 273, 1, 0, PPCImpOpBase + 134, 337, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1aULL }, // Inst #1433 = MFFSCRN |
4925 | | { 1432, 1, 1, 4, 394, 1, 0, PPCImpOpBase + 134, 646, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1aULL }, // Inst #1432 = MFFSCE |
4926 | | { 1431, 2, 1, 4, 530, 1, 0, PPCImpOpBase + 134, 647, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1aULL }, // Inst #1431 = MFFSCDRNI |
4927 | | { 1430, 2, 1, 4, 273, 1, 0, PPCImpOpBase + 134, 337, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1aULL }, // Inst #1430 = MFFSCDRN |
4928 | | { 1429, 1, 1, 4, 529, 1, 0, PPCImpOpBase + 134, 646, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1aULL }, // Inst #1429 = MFFS |
4929 | | { 1428, 2, 1, 4, 416, 0, 0, PPCImpOpBase + 0, 595, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1428 = MFDCR |
4930 | | { 1427, 1, 1, 4, 103, 1, 0, PPCImpOpBase + 64, 160, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x9ULL }, // Inst #1427 = MFCTR8 |
4931 | | { 1426, 1, 1, 4, 103, 1, 0, PPCImpOpBase + 63, 159, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x9ULL }, // Inst #1426 = MFCTR |
4932 | | { 1425, 1, 1, 4, 105, 0, 0, PPCImpOpBase + 0, 160, 0|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x20ULL }, // Inst #1425 = MFCR8 |
4933 | | { 1424, 1, 1, 4, 105, 0, 0, PPCImpOpBase + 0, 159, 0|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x20ULL }, // Inst #1424 = MFCR |
4934 | | { 1423, 3, 1, 4, 619, 0, 0, PPCImpOpBase + 0, 643, 0, 0x1ULL }, // Inst #1423 = MFBHRBE |
4935 | | { 1422, 1, 1, 4, 291, 0, 0, PPCImpOpBase + 0, 642, 0, 0x0ULL }, // Inst #1422 = MCRXRX |
4936 | | { 1421, 2, 1, 4, 391, 0, 0, PPCImpOpBase + 0, 640, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1421 = MCRFS |
4937 | | { 1420, 2, 1, 4, 106, 0, 0, PPCImpOpBase + 0, 640, 0, 0x21ULL }, // Inst #1420 = MCRF |
4938 | | { 1419, 1, 0, 4, 413, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1419 = MBAR |
4939 | | { 1418, 4, 1, 4, 311, 0, 0, PPCImpOpBase + 0, 632, 0, 0x8ULL }, // Inst #1418 = MADDLD8 |
4940 | | { 1417, 4, 1, 4, 311, 0, 0, PPCImpOpBase + 0, 636, 0, 0x8ULL }, // Inst #1417 = MADDLD |
4941 | | { 1416, 4, 1, 4, 311, 0, 0, PPCImpOpBase + 0, 632, 0, 0x8ULL }, // Inst #1416 = MADDHDU |
4942 | | { 1415, 4, 1, 4, 311, 0, 0, PPCImpOpBase + 0, 632, 0, 0x8ULL }, // Inst #1415 = MADDHD |
4943 | | { 1414, 3, 1, 4, 334, 0, 0, PPCImpOpBase + 0, 615, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1414 = LXVX |
4944 | | { 1413, 3, 1, 4, 334, 0, 0, PPCImpOpBase + 0, 615, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1413 = LXVWSX |
4945 | | { 1412, 3, 1, 4, 113, 0, 0, PPCImpOpBase + 0, 615, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1412 = LXVW4X |
4946 | | { 1411, 3, 1, 4, 552, 0, 0, PPCImpOpBase + 0, 615, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1411 = LXVRWX |
4947 | | { 1410, 3, 1, 4, 15, 0, 0, PPCImpOpBase + 0, 620, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL }, // Inst #1410 = LXVRLL |
4948 | | { 1409, 3, 1, 4, 15, 0, 0, PPCImpOpBase + 0, 620, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL }, // Inst #1409 = LXVRL |
4949 | | { 1408, 3, 1, 4, 552, 0, 0, PPCImpOpBase + 0, 615, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1408 = LXVRHX |
4950 | | { 1407, 3, 1, 4, 552, 0, 0, PPCImpOpBase + 0, 615, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1407 = LXVRDX |
4951 | | { 1406, 3, 1, 4, 552, 0, 0, PPCImpOpBase + 0, 615, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1406 = LXVRBX |
4952 | | { 1405, 3, 1, 4, 560, 0, 0, PPCImpOpBase + 0, 629, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1405 = LXVPX |
4953 | | { 1404, 3, 1, 4, 40, 0, 0, PPCImpOpBase + 0, 626, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL }, // Inst #1404 = LXVPRLL |
4954 | | { 1403, 3, 1, 4, 40, 0, 0, PPCImpOpBase + 0, 626, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL }, // Inst #1403 = LXVPRL |
4955 | | { 1402, 3, 1, 4, 559, 0, 0, PPCImpOpBase + 0, 623, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1402 = LXVP |
4956 | | { 1401, 3, 1, 4, 333, 0, 0, PPCImpOpBase + 0, 620, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1401 = LXVLL |
4957 | | { 1400, 3, 1, 4, 333, 0, 0, PPCImpOpBase + 0, 620, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1400 = LXVL |
4958 | | { 1399, 2, 1, 4, 573, 0, 0, PPCImpOpBase + 0, 618, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1399 = LXVKQ |
4959 | | { 1398, 3, 1, 4, 365, 0, 0, PPCImpOpBase + 0, 615, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1398 = LXVH8X |
4960 | | { 1397, 3, 1, 4, 113, 0, 0, PPCImpOpBase + 0, 615, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1397 = LXVDSX |
4961 | | { 1396, 3, 1, 4, 335, 0, 0, PPCImpOpBase + 0, 615, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1396 = LXVD2X |
4962 | | { 1395, 3, 1, 4, 213, 0, 0, PPCImpOpBase + 0, 615, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1395 = LXVB16X |
4963 | | { 1394, 3, 1, 4, 547, 0, 0, PPCImpOpBase + 0, 612, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1394 = LXV |
4964 | | { 1393, 3, 1, 4, 363, 0, 0, PPCImpOpBase + 0, 205, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1393 = LXSSPX |
4965 | | { 1392, 3, 1, 4, 558, 0, 0, PPCImpOpBase + 0, 609, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1392 = LXSSP |
4966 | | { 1391, 3, 1, 4, 213, 0, 0, PPCImpOpBase + 0, 191, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1391 = LXSIWZX |
4967 | | { 1390, 3, 1, 4, 360, 0, 0, PPCImpOpBase + 0, 191, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1390 = LXSIWAX |
4968 | | { 1389, 3, 1, 4, 334, 0, 0, PPCImpOpBase + 0, 191, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1389 = LXSIHZX |
4969 | | { 1388, 3, 1, 4, 334, 0, 0, PPCImpOpBase + 0, 191, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1388 = LXSIBZX |
4970 | | { 1387, 3, 1, 4, 335, 0, 0, PPCImpOpBase + 0, 191, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1387 = LXSDX |
4971 | | { 1386, 3, 1, 4, 547, 0, 0, PPCImpOpBase + 0, 609, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1386 = LXSD |
4972 | | { 1385, 3, 1, 4, 542, 0, 0, PPCImpOpBase + 0, 606, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1385 = LWZtocL |
4973 | | { 1384, 3, 1, 4, 542, 0, 0, PPCImpOpBase + 0, 245, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1384 = LWZtoc |
4974 | | { 1383, 3, 1, 4, 340, 0, 0, PPCImpOpBase + 0, 549, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #1383 = LWZXTLS_32 |
4975 | | { 1382, 3, 1, 4, 340, 0, 0, PPCImpOpBase + 0, 546, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #1382 = LWZXTLS_ |
4976 | | { 1381, 3, 1, 4, 340, 0, 0, PPCImpOpBase + 0, 546, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #1381 = LWZXTLS |
4977 | | { 1380, 3, 1, 4, 340, 0, 0, PPCImpOpBase + 0, 543, 0|(1ULL<<MCID::MayLoad), 0x250ULL }, // Inst #1380 = LWZX8 |
4978 | | { 1379, 3, 1, 4, 340, 0, 0, PPCImpOpBase + 0, 524, 0|(1ULL<<MCID::MayLoad), 0x250ULL }, // Inst #1379 = LWZX |
4979 | | { 1378, 4, 2, 4, 356, 0, 0, PPCImpOpBase + 0, 539, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1378 = LWZUX8 |
4980 | | { 1377, 4, 2, 4, 356, 0, 0, PPCImpOpBase + 0, 535, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1377 = LWZUX |
4981 | | { 1376, 4, 2, 4, 355, 0, 0, PPCImpOpBase + 0, 531, 0|(1ULL<<MCID::MayLoad), 0x10ULL }, // Inst #1376 = LWZU8 |
4982 | | { 1375, 4, 2, 4, 355, 0, 0, PPCImpOpBase + 0, 527, 0|(1ULL<<MCID::MayLoad), 0x10ULL }, // Inst #1375 = LWZU |
4983 | | { 1374, 3, 1, 4, 555, 0, 0, PPCImpOpBase + 0, 208, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL }, // Inst #1374 = LWZCIX |
4984 | | { 1373, 3, 1, 4, 540, 0, 0, PPCImpOpBase + 0, 513, 0|(1ULL<<MCID::MayLoad), 0x210ULL }, // Inst #1373 = LWZ8 |
4985 | | { 1372, 3, 1, 4, 540, 0, 0, PPCImpOpBase + 0, 188, 0|(1ULL<<MCID::MayLoad), 0x210ULL }, // Inst #1372 = LWZ |
4986 | | { 1371, 3, 1, 4, 225, 0, 0, PPCImpOpBase + 0, 524, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1371 = LWEPX |
4987 | | { 1370, 3, 1, 4, 111, 0, 0, PPCImpOpBase + 0, 543, 0|(1ULL<<MCID::MayLoad), 0x250ULL }, // Inst #1370 = LWBRX8 |
4988 | | { 1369, 3, 1, 4, 111, 0, 0, PPCImpOpBase + 0, 524, 0|(1ULL<<MCID::MayLoad), 0x250ULL }, // Inst #1369 = LWBRX |
4989 | | { 1368, 3, 1, 4, 124, 0, 0, PPCImpOpBase + 0, 188, 0|(1ULL<<MCID::MayLoad), 0x114ULL }, // Inst #1368 = LWA_32 |
4990 | | { 1367, 3, 1, 4, 123, 0, 0, PPCImpOpBase + 0, 524, 0|(1ULL<<MCID::MayLoad), 0x154ULL }, // Inst #1367 = LWAX_32 |
4991 | | { 1366, 3, 1, 4, 222, 0, 0, PPCImpOpBase + 0, 549, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #1366 = LWAXTLS_32 |
4992 | | { 1365, 3, 1, 4, 222, 0, 0, PPCImpOpBase + 0, 546, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #1365 = LWAXTLS_ |
4993 | | { 1364, 3, 1, 4, 222, 0, 0, PPCImpOpBase + 0, 546, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #1364 = LWAXTLS |
4994 | | { 1363, 3, 1, 4, 123, 0, 0, PPCImpOpBase + 0, 543, 0|(1ULL<<MCID::MayLoad), 0x154ULL }, // Inst #1363 = LWAX |
4995 | | { 1362, 4, 2, 4, 126, 0, 0, PPCImpOpBase + 0, 539, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1362 = LWAUX |
4996 | | { 1361, 3, 1, 4, 403, 0, 0, PPCImpOpBase + 0, 172, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x40ULL }, // Inst #1361 = LWAT |
4997 | | { 1360, 3, 1, 4, 109, 0, 0, PPCImpOpBase + 0, 524, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1360 = LWARXL |
4998 | | { 1359, 3, 1, 4, 109, 0, 0, PPCImpOpBase + 0, 524, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1359 = LWARX |
4999 | | { 1358, 3, 1, 4, 124, 0, 0, PPCImpOpBase + 0, 513, 0|(1ULL<<MCID::MayLoad), 0x114ULL }, // Inst #1358 = LWA |
5000 | | { 1357, 3, 1, 4, 212, 0, 0, PPCImpOpBase + 0, 603, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1357 = LVXL |
5001 | | { 1356, 3, 1, 4, 212, 0, 0, PPCImpOpBase + 0, 603, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1356 = LVX |
5002 | | { 1355, 3, 1, 4, 322, 0, 0, PPCImpOpBase + 0, 603, 0, 0x50ULL }, // Inst #1355 = LVSR |
5003 | | { 1354, 3, 1, 4, 322, 0, 0, PPCImpOpBase + 0, 603, 0, 0x50ULL }, // Inst #1354 = LVSL |
5004 | | { 1353, 3, 1, 4, 212, 0, 0, PPCImpOpBase + 0, 603, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1353 = LVEWX |
5005 | | { 1352, 3, 1, 4, 212, 0, 0, PPCImpOpBase + 0, 603, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1352 = LVEHX |
5006 | | { 1351, 3, 1, 4, 212, 0, 0, PPCImpOpBase + 0, 603, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1351 = LVEBX |
5007 | | { 1350, 3, 1, 4, 118, 0, 0, PPCImpOpBase + 0, 172, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL }, // Inst #1350 = LSWI |
5008 | | { 1349, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 600, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x10ULL }, // Inst #1349 = LQX_PSEUDO |
5009 | | { 1348, 3, 1, 4, 48, 0, 0, PPCImpOpBase + 0, 600, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1348 = LQARXL |
5010 | | { 1347, 3, 1, 4, 48, 0, 0, PPCImpOpBase + 0, 600, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1347 = LQARX |
5011 | | { 1346, 3, 1, 4, 215, 0, 0, PPCImpOpBase + 0, 597, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x10ULL }, // Inst #1346 = LQ |
5012 | | { 1345, 3, 1, 4, 108, 0, 0, PPCImpOpBase + 0, 188, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1345 = LMW |
5013 | | { 1344, 2, 1, 4, 498, 0, 0, PPCImpOpBase + 0, 203, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x108ULL }, // Inst #1344 = LIS8 |
5014 | | { 1343, 2, 1, 4, 498, 0, 0, PPCImpOpBase + 0, 595, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x108ULL }, // Inst #1343 = LIS |
5015 | | { 1342, 2, 1, 4, 498, 0, 0, PPCImpOpBase + 0, 203, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x108ULL }, // Inst #1342 = LI8 |
5016 | | { 1341, 2, 1, 4, 498, 0, 0, PPCImpOpBase + 0, 595, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x108ULL }, // Inst #1341 = LI |
5017 | | { 1340, 3, 1, 4, 340, 0, 0, PPCImpOpBase + 0, 549, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #1340 = LHZXTLS_32 |
5018 | | { 1339, 3, 1, 4, 340, 0, 0, PPCImpOpBase + 0, 546, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #1339 = LHZXTLS_ |
5019 | | { 1338, 3, 1, 4, 340, 0, 0, PPCImpOpBase + 0, 546, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #1338 = LHZXTLS |
5020 | | { 1337, 3, 1, 4, 340, 0, 0, PPCImpOpBase + 0, 543, 0|(1ULL<<MCID::MayLoad), 0x350ULL }, // Inst #1337 = LHZX8 |
5021 | | { 1336, 3, 1, 4, 340, 0, 0, PPCImpOpBase + 0, 524, 0|(1ULL<<MCID::MayLoad), 0x350ULL }, // Inst #1336 = LHZX |
5022 | | { 1335, 4, 2, 4, 356, 0, 0, PPCImpOpBase + 0, 539, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1335 = LHZUX8 |
5023 | | { 1334, 4, 2, 4, 356, 0, 0, PPCImpOpBase + 0, 535, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1334 = LHZUX |
5024 | | { 1333, 4, 2, 4, 355, 0, 0, PPCImpOpBase + 0, 531, 0|(1ULL<<MCID::MayLoad), 0x10ULL }, // Inst #1333 = LHZU8 |
5025 | | { 1332, 4, 2, 4, 355, 0, 0, PPCImpOpBase + 0, 527, 0|(1ULL<<MCID::MayLoad), 0x10ULL }, // Inst #1332 = LHZU |
5026 | | { 1331, 3, 1, 4, 555, 0, 0, PPCImpOpBase + 0, 208, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL }, // Inst #1331 = LHZCIX |
5027 | | { 1330, 3, 1, 4, 540, 0, 0, PPCImpOpBase + 0, 513, 0|(1ULL<<MCID::MayLoad), 0x310ULL }, // Inst #1330 = LHZ8 |
5028 | | { 1329, 3, 1, 4, 540, 0, 0, PPCImpOpBase + 0, 188, 0|(1ULL<<MCID::MayLoad), 0x310ULL }, // Inst #1329 = LHZ |
5029 | | { 1328, 3, 1, 4, 225, 0, 0, PPCImpOpBase + 0, 524, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1328 = LHEPX |
5030 | | { 1327, 3, 1, 4, 111, 0, 0, PPCImpOpBase + 0, 543, 0|(1ULL<<MCID::MayLoad), 0x250ULL }, // Inst #1327 = LHBRX8 |
5031 | | { 1326, 3, 1, 4, 111, 0, 0, PPCImpOpBase + 0, 524, 0|(1ULL<<MCID::MayLoad), 0x250ULL }, // Inst #1326 = LHBRX |
5032 | | { 1325, 3, 1, 4, 222, 0, 0, PPCImpOpBase + 0, 549, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #1325 = LHAXTLS_32 |
5033 | | { 1324, 3, 1, 4, 222, 0, 0, PPCImpOpBase + 0, 546, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #1324 = LHAXTLS_ |
5034 | | { 1323, 3, 1, 4, 222, 0, 0, PPCImpOpBase + 0, 546, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #1323 = LHAXTLS |
5035 | | { 1322, 3, 1, 4, 123, 0, 0, PPCImpOpBase + 0, 543, 0|(1ULL<<MCID::MayLoad), 0x154ULL }, // Inst #1322 = LHAX8 |
5036 | | { 1321, 3, 1, 4, 123, 0, 0, PPCImpOpBase + 0, 524, 0|(1ULL<<MCID::MayLoad), 0x154ULL }, // Inst #1321 = LHAX |
5037 | | { 1320, 4, 2, 4, 126, 0, 0, PPCImpOpBase + 0, 539, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1320 = LHAUX8 |
5038 | | { 1319, 4, 2, 4, 126, 0, 0, PPCImpOpBase + 0, 535, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1319 = LHAUX |
5039 | | { 1318, 4, 2, 4, 125, 0, 0, PPCImpOpBase + 0, 531, 0|(1ULL<<MCID::MayLoad), 0x10ULL }, // Inst #1318 = LHAU8 |
5040 | | { 1317, 4, 2, 4, 125, 0, 0, PPCImpOpBase + 0, 527, 0|(1ULL<<MCID::MayLoad), 0x10ULL }, // Inst #1317 = LHAU |
5041 | | { 1316, 3, 1, 4, 224, 0, 0, PPCImpOpBase + 0, 524, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1316 = LHARXL |
5042 | | { 1315, 3, 1, 4, 117, 0, 0, PPCImpOpBase + 0, 524, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1315 = LHARX |
5043 | | { 1314, 3, 1, 4, 546, 0, 0, PPCImpOpBase + 0, 513, 0|(1ULL<<MCID::MayLoad), 0x114ULL }, // Inst #1314 = LHA8 |
5044 | | { 1313, 3, 1, 4, 546, 0, 0, PPCImpOpBase + 0, 188, 0|(1ULL<<MCID::MayLoad), 0x114ULL }, // Inst #1313 = LHA |
5045 | | { 1312, 3, 1, 4, 362, 0, 0, PPCImpOpBase + 0, 592, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #1312 = LFSXTLS_ |
5046 | | { 1311, 3, 1, 4, 362, 0, 0, PPCImpOpBase + 0, 592, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #1311 = LFSXTLS |
5047 | | { 1310, 3, 1, 4, 362, 0, 0, PPCImpOpBase + 0, 589, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1310 = LFSX |
5048 | | { 1309, 4, 2, 4, 401, 0, 0, PPCImpOpBase + 0, 585, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1309 = LFSUX |
5049 | | { 1308, 4, 2, 4, 400, 0, 0, PPCImpOpBase + 0, 581, 0|(1ULL<<MCID::MayLoad), 0x10ULL }, // Inst #1308 = LFSU |
5050 | | { 1307, 3, 1, 4, 557, 0, 0, PPCImpOpBase + 0, 578, 0|(1ULL<<MCID::MayLoad), 0x10ULL }, // Inst #1307 = LFS |
5051 | | { 1306, 3, 1, 4, 347, 0, 0, PPCImpOpBase + 0, 564, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1306 = LFIWZX |
5052 | | { 1305, 3, 1, 4, 119, 0, 0, PPCImpOpBase + 0, 564, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1305 = LFIWAX |
5053 | | { 1304, 3, 1, 4, 348, 0, 0, PPCImpOpBase + 0, 575, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #1304 = LFDXTLS_ |
5054 | | { 1303, 3, 1, 4, 348, 0, 0, PPCImpOpBase + 0, 575, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #1303 = LFDXTLS |
5055 | | { 1302, 3, 1, 4, 348, 0, 0, PPCImpOpBase + 0, 564, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1302 = LFDX |
5056 | | { 1301, 4, 2, 4, 115, 0, 0, PPCImpOpBase + 0, 571, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1301 = LFDUX |
5057 | | { 1300, 4, 2, 4, 114, 0, 0, PPCImpOpBase + 0, 567, 0|(1ULL<<MCID::MayLoad), 0x10ULL }, // Inst #1300 = LFDU |
5058 | | { 1299, 3, 1, 4, 226, 0, 0, PPCImpOpBase + 0, 564, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1299 = LFDEPX |
5059 | | { 1298, 3, 1, 4, 545, 0, 0, PPCImpOpBase + 0, 561, 0|(1ULL<<MCID::MayLoad), 0x10ULL }, // Inst #1298 = LFD |
5060 | | { 1297, 3, 1, 4, 542, 0, 0, PPCImpOpBase + 0, 248, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1297 = LDtocL |
5061 | | { 1296, 3, 1, 4, 542, 0, 0, PPCImpOpBase + 0, 558, 0|(1ULL<<MCID::MayLoad), 0x10ULL }, // Inst #1296 = LDtocJTI |
5062 | | { 1295, 3, 1, 4, 542, 0, 0, PPCImpOpBase + 0, 558, 0|(1ULL<<MCID::MayLoad), 0x10ULL }, // Inst #1295 = LDtocCPT |
5063 | | { 1294, 3, 1, 4, 542, 0, 0, PPCImpOpBase + 0, 558, 0|(1ULL<<MCID::MayLoad), 0x10ULL }, // Inst #1294 = LDtocBA |
5064 | | { 1293, 3, 1, 4, 542, 0, 0, PPCImpOpBase + 0, 558, 0|(1ULL<<MCID::MayLoad), 0x10ULL }, // Inst #1293 = LDtoc |
5065 | | { 1292, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 555, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1292 = LDgotTprelL32 |
5066 | | { 1291, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 552, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1291 = LDgotTprelL |
5067 | | { 1290, 3, 1, 4, 223, 0, 0, PPCImpOpBase + 0, 546, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #1290 = LDXTLS_ |
5068 | | { 1289, 3, 1, 4, 223, 0, 0, PPCImpOpBase + 0, 546, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #1289 = LDXTLS |
5069 | | { 1288, 3, 1, 4, 223, 0, 0, PPCImpOpBase + 0, 543, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1288 = LDX |
5070 | | { 1287, 4, 2, 4, 137, 0, 0, PPCImpOpBase + 0, 539, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1287 = LDUX |
5071 | | { 1286, 4, 2, 4, 135, 0, 0, PPCImpOpBase + 0, 531, 0|(1ULL<<MCID::MayLoad), 0x10ULL }, // Inst #1286 = LDU |
5072 | | { 1285, 3, 1, 4, 555, 0, 0, PPCImpOpBase + 0, 208, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL }, // Inst #1285 = LDCIX |
5073 | | { 1284, 3, 1, 4, 550, 0, 0, PPCImpOpBase + 0, 543, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1284 = LDBRX |
5074 | | { 1283, 3, 1, 4, 403, 0, 0, PPCImpOpBase + 0, 169, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x40ULL }, // Inst #1283 = LDAT |
5075 | | { 1282, 3, 1, 4, 110, 0, 0, PPCImpOpBase + 0, 543, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1282 = LDARXL |
5076 | | { 1281, 3, 1, 4, 110, 0, 0, PPCImpOpBase + 0, 543, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1281 = LDARX |
5077 | | { 1280, 3, 1, 4, 541, 0, 0, PPCImpOpBase + 0, 513, 0|(1ULL<<MCID::MayLoad), 0x10ULL }, // Inst #1280 = LD |
5078 | | { 1279, 3, 1, 4, 340, 0, 0, PPCImpOpBase + 0, 549, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #1279 = LBZXTLS_32 |
5079 | | { 1278, 3, 1, 4, 340, 0, 0, PPCImpOpBase + 0, 546, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #1278 = LBZXTLS_ |
5080 | | { 1277, 3, 1, 4, 340, 0, 0, PPCImpOpBase + 0, 546, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #1277 = LBZXTLS |
5081 | | { 1276, 3, 1, 4, 340, 0, 0, PPCImpOpBase + 0, 543, 0|(1ULL<<MCID::MayLoad), 0x350ULL }, // Inst #1276 = LBZX8 |
5082 | | { 1275, 3, 1, 4, 340, 0, 0, PPCImpOpBase + 0, 524, 0|(1ULL<<MCID::MayLoad), 0x350ULL }, // Inst #1275 = LBZX |
5083 | | { 1274, 4, 2, 4, 136, 0, 0, PPCImpOpBase + 0, 539, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1274 = LBZUX8 |
5084 | | { 1273, 4, 2, 4, 136, 0, 0, PPCImpOpBase + 0, 535, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1273 = LBZUX |
5085 | | { 1272, 4, 2, 4, 134, 0, 0, PPCImpOpBase + 0, 531, 0|(1ULL<<MCID::MayLoad), 0x10ULL }, // Inst #1272 = LBZU8 |
5086 | | { 1271, 4, 2, 4, 134, 0, 0, PPCImpOpBase + 0, 527, 0|(1ULL<<MCID::MayLoad), 0x10ULL }, // Inst #1271 = LBZU |
5087 | | { 1270, 3, 1, 4, 555, 0, 0, PPCImpOpBase + 0, 208, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL }, // Inst #1270 = LBZCIX |
5088 | | { 1269, 3, 1, 4, 540, 0, 0, PPCImpOpBase + 0, 513, 0|(1ULL<<MCID::MayLoad), 0x310ULL }, // Inst #1269 = LBZ8 |
5089 | | { 1268, 3, 1, 4, 540, 0, 0, PPCImpOpBase + 0, 188, 0|(1ULL<<MCID::MayLoad), 0x310ULL }, // Inst #1268 = LBZ |
5090 | | { 1267, 3, 1, 4, 225, 0, 0, PPCImpOpBase + 0, 524, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1267 = LBEPX |
5091 | | { 1266, 3, 1, 4, 224, 0, 0, PPCImpOpBase + 0, 524, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1266 = LBARXL |
5092 | | { 1265, 3, 1, 4, 117, 0, 0, PPCImpOpBase + 0, 524, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1265 = LBARX |
5093 | | { 1264, 3, 1, 4, 289, 0, 0, PPCImpOpBase + 0, 194, 0, 0x8ULL }, // Inst #1264 = LA8 |
5094 | | { 1263, 3, 1, 4, 289, 0, 0, PPCImpOpBase + 0, 231, 0, 0x8ULL }, // Inst #1263 = LA |
5095 | | { 1262, 0, 0, 4, 343, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1262 = ISYNC |
5096 | | { 1261, 4, 1, 4, 207, 0, 0, PPCImpOpBase + 0, 520, 0|(1ULL<<MCID::Select), 0x8ULL }, // Inst #1261 = ISEL8 |
5097 | | { 1260, 4, 1, 4, 207, 0, 0, PPCImpOpBase + 0, 516, 0|(1ULL<<MCID::Select), 0x8ULL }, // Inst #1260 = ISEL |
5098 | | { 1259, 2, 0, 4, 618, 0, 0, PPCImpOpBase + 0, 251, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1259 = ICCCI |
5099 | | { 1258, 3, 0, 4, 339, 0, 0, PPCImpOpBase + 0, 334, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1258 = ICBTLS |
5100 | | { 1257, 3, 0, 4, 549, 0, 0, PPCImpOpBase + 0, 334, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1257 = ICBT |
5101 | | { 1256, 3, 0, 4, 618, 0, 0, PPCImpOpBase + 0, 334, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1256 = ICBLQ |
5102 | | { 1255, 3, 0, 4, 414, 0, 0, PPCImpOpBase + 0, 334, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1255 = ICBLC |
5103 | | { 1254, 2, 0, 4, 338, 0, 0, PPCImpOpBase + 0, 175, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1254 = ICBIEP |
5104 | | { 1253, 2, 0, 4, 606, 0, 0, PPCImpOpBase + 0, 175, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1253 = ICBI |
5105 | | { 1252, 0, 0, 4, 535, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1252 = HRFID |
5106 | | { 1251, 3, 0, 4, 453, 0, 0, PPCImpOpBase + 0, 513, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1251 = HASHSTP8 |
5107 | | { 1250, 3, 0, 4, 453, 0, 0, PPCImpOpBase + 0, 188, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1250 = HASHSTP |
5108 | | { 1249, 3, 0, 4, 453, 0, 0, PPCImpOpBase + 0, 513, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1249 = HASHST8 |
5109 | | { 1248, 3, 0, 4, 453, 0, 0, PPCImpOpBase + 0, 188, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1248 = HASHST |
5110 | | { 1247, 3, 0, 4, 421, 0, 0, PPCImpOpBase + 0, 513, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1247 = HASHCHKP8 |
5111 | | { 1246, 3, 0, 4, 421, 0, 0, PPCImpOpBase + 0, 188, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1246 = HASHCHKP |
5112 | | { 1245, 3, 0, 4, 421, 0, 0, PPCImpOpBase + 0, 513, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1245 = HASHCHK8 |
5113 | | { 1244, 3, 0, 4, 421, 0, 0, PPCImpOpBase + 0, 188, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1244 = HASHCHK |
5114 | | { 1243, 3, 1, 4, 0, 0, 18, PPCImpOpBase + 183, 220, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL }, // Inst #1243 = GETtlsldADDRPCREL |
5115 | | { 1242, 3, 1, 4, 0, 0, 17, PPCImpOpBase + 154, 211, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL }, // Inst #1242 = GETtlsldADDR32 |
5116 | | { 1241, 3, 1, 4, 0, 0, 17, PPCImpOpBase + 137, 220, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL }, // Inst #1241 = GETtlsldADDR |
5117 | | { 1240, 1, 1, 4, 0, 0, 2, PPCImpOpBase + 201, 159, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL }, // Inst #1240 = GETtlsTpointer32AIX |
5118 | | { 1239, 3, 1, 8, 0, 0, 18, PPCImpOpBase + 183, 220, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL }, // Inst #1239 = GETtlsADDRPCREL |
5119 | | { 1238, 3, 1, 4, 0, 0, 6, PPCImpOpBase + 177, 214, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL }, // Inst #1238 = GETtlsADDR64AIX |
5120 | | { 1237, 3, 1, 4, 0, 0, 6, PPCImpOpBase + 171, 208, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL }, // Inst #1237 = GETtlsADDR32AIX |
5121 | | { 1236, 3, 1, 4, 0, 0, 17, PPCImpOpBase + 154, 211, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL }, // Inst #1236 = GETtlsADDR32 |
5122 | | { 1235, 3, 1, 8, 0, 0, 17, PPCImpOpBase + 137, 220, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL }, // Inst #1235 = GETtlsADDR |
5123 | | { 1234, 2, 1, 4, 470, 0, 0, PPCImpOpBase + 0, 511, 0, 0x18ULL }, // Inst #1234 = FTSQRT |
5124 | | { 1233, 3, 1, 4, 276, 0, 0, PPCImpOpBase + 0, 343, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x18ULL }, // Inst #1233 = FTDIV |
5125 | | { 1232, 3, 1, 4, 157, 1, 1, PPCImpOpBase + 135, 328, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1232 = FSUB_rec |
5126 | | { 1231, 3, 1, 4, 442, 1, 1, PPCImpOpBase + 135, 491, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1231 = FSUBS_rec |
5127 | | { 1230, 3, 1, 4, 435, 1, 0, PPCImpOpBase + 134, 491, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1230 = FSUBS |
5128 | | { 1229, 3, 1, 4, 316, 1, 0, PPCImpOpBase + 134, 328, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1229 = FSUB |
5129 | | { 1228, 2, 1, 4, 176, 1, 1, PPCImpOpBase + 135, 337, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1228 = FSQRT_rec |
5130 | | { 1227, 2, 1, 4, 184, 1, 1, PPCImpOpBase + 135, 489, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1227 = FSQRTS_rec |
5131 | | { 1226, 2, 1, 4, 398, 1, 0, PPCImpOpBase + 134, 489, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1226 = FSQRTS |
5132 | | { 1225, 2, 1, 4, 397, 1, 0, PPCImpOpBase + 134, 337, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1225 = FSQRT |
5133 | | { 1224, 4, 1, 4, 319, 0, 1, PPCImpOpBase + 131, 507, 0, 0x18ULL }, // Inst #1224 = FSELS_rec |
5134 | | { 1223, 4, 1, 4, 315, 0, 0, PPCImpOpBase + 0, 507, 0, 0x18ULL }, // Inst #1223 = FSELS |
5135 | | { 1222, 4, 1, 4, 319, 0, 1, PPCImpOpBase + 131, 499, 0, 0x18ULL }, // Inst #1222 = FSELD_rec |
5136 | | { 1221, 4, 1, 4, 315, 0, 0, PPCImpOpBase + 0, 499, 0, 0x18ULL }, // Inst #1221 = FSELD |
5137 | | { 1220, 2, 1, 4, 444, 0, 1, PPCImpOpBase + 131, 337, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1220 = FRSQRTE_rec |
5138 | | { 1219, 2, 1, 4, 444, 0, 1, PPCImpOpBase + 131, 489, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1219 = FRSQRTES_rec |
5139 | | { 1218, 2, 1, 4, 427, 0, 0, PPCImpOpBase + 0, 489, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1218 = FRSQRTES |
5140 | | { 1217, 2, 1, 4, 427, 0, 0, PPCImpOpBase + 0, 337, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1217 = FRSQRTE |
5141 | | { 1216, 2, 1, 4, 444, 1, 1, PPCImpOpBase + 135, 494, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1216 = FRSP_rec |
5142 | | { 1215, 2, 1, 4, 427, 1, 0, PPCImpOpBase + 134, 494, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1215 = FRSP |
5143 | | { 1214, 2, 1, 4, 444, 0, 1, PPCImpOpBase + 131, 489, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1214 = FRIZS_rec |
5144 | | { 1213, 2, 1, 4, 427, 0, 0, PPCImpOpBase + 0, 489, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1213 = FRIZS |
5145 | | { 1212, 2, 1, 4, 444, 0, 1, PPCImpOpBase + 131, 337, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1212 = FRIZD_rec |
5146 | | { 1211, 2, 1, 4, 427, 0, 0, PPCImpOpBase + 0, 337, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1211 = FRIZD |
5147 | | { 1210, 2, 1, 4, 444, 0, 1, PPCImpOpBase + 131, 489, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1210 = FRIPS_rec |
5148 | | { 1209, 2, 1, 4, 427, 0, 0, PPCImpOpBase + 0, 489, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1209 = FRIPS |
5149 | | { 1208, 2, 1, 4, 444, 0, 1, PPCImpOpBase + 131, 337, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1208 = FRIPD_rec |
5150 | | { 1207, 2, 1, 4, 427, 0, 0, PPCImpOpBase + 0, 337, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1207 = FRIPD |
5151 | | { 1206, 2, 1, 4, 444, 0, 1, PPCImpOpBase + 131, 489, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1206 = FRINS_rec |
5152 | | { 1205, 2, 1, 4, 427, 0, 0, PPCImpOpBase + 0, 489, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1205 = FRINS |
5153 | | { 1204, 2, 1, 4, 444, 0, 1, PPCImpOpBase + 131, 337, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1204 = FRIND_rec |
5154 | | { 1203, 2, 1, 4, 427, 0, 0, PPCImpOpBase + 0, 337, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1203 = FRIND |
5155 | | { 1202, 2, 1, 4, 444, 0, 1, PPCImpOpBase + 131, 489, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1202 = FRIMS_rec |
5156 | | { 1201, 2, 1, 4, 427, 0, 0, PPCImpOpBase + 0, 489, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1201 = FRIMS |
5157 | | { 1200, 2, 1, 4, 444, 0, 1, PPCImpOpBase + 131, 337, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1200 = FRIMD_rec |
5158 | | { 1199, 2, 1, 4, 427, 0, 0, PPCImpOpBase + 0, 337, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1199 = FRIMD |
5159 | | { 1198, 2, 1, 4, 444, 0, 1, PPCImpOpBase + 131, 337, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1198 = FRE_rec |
5160 | | { 1197, 2, 1, 4, 444, 0, 1, PPCImpOpBase + 131, 489, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1197 = FRES_rec |
5161 | | { 1196, 2, 1, 4, 427, 0, 0, PPCImpOpBase + 0, 489, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1196 = FRES |
5162 | | { 1195, 2, 1, 4, 427, 0, 0, PPCImpOpBase + 0, 337, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1195 = FRE |
5163 | | { 1194, 4, 1, 4, 158, 1, 1, PPCImpOpBase + 135, 499, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1194 = FNMSUB_rec |
5164 | | { 1193, 4, 1, 4, 320, 1, 1, PPCImpOpBase + 135, 503, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1193 = FNMSUBS_rec |
5165 | | { 1192, 4, 1, 4, 315, 1, 0, PPCImpOpBase + 134, 503, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1192 = FNMSUBS |
5166 | | { 1191, 4, 1, 4, 317, 1, 0, PPCImpOpBase + 134, 499, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1191 = FNMSUB |
5167 | | { 1190, 4, 1, 4, 158, 1, 1, PPCImpOpBase + 135, 499, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1190 = FNMADD_rec |
5168 | | { 1189, 4, 1, 4, 320, 1, 1, PPCImpOpBase + 135, 503, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1189 = FNMADDS_rec |
5169 | | { 1188, 4, 1, 4, 315, 1, 0, PPCImpOpBase + 134, 503, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1188 = FNMADDS |
5170 | | { 1187, 4, 1, 4, 317, 1, 0, PPCImpOpBase + 134, 499, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1187 = FNMADD |
5171 | | { 1186, 2, 1, 4, 537, 0, 1, PPCImpOpBase + 131, 489, 0, 0x18ULL }, // Inst #1186 = FNEGS_rec |
5172 | | { 1185, 2, 1, 4, 507, 0, 0, PPCImpOpBase + 0, 489, 0, 0x18ULL }, // Inst #1185 = FNEGS |
5173 | | { 1184, 2, 1, 4, 537, 0, 1, PPCImpOpBase + 131, 337, 0, 0x18ULL }, // Inst #1184 = FNEGD_rec |
5174 | | { 1183, 2, 1, 4, 507, 0, 0, PPCImpOpBase + 0, 337, 0, 0x18ULL }, // Inst #1183 = FNEGD |
5175 | | { 1182, 2, 1, 4, 537, 0, 1, PPCImpOpBase + 131, 489, 0, 0x18ULL }, // Inst #1182 = FNABSS_rec |
5176 | | { 1181, 2, 1, 4, 507, 0, 0, PPCImpOpBase + 0, 489, 0, 0x18ULL }, // Inst #1181 = FNABSS |
5177 | | { 1180, 2, 1, 4, 537, 0, 1, PPCImpOpBase + 131, 337, 0, 0x18ULL }, // Inst #1180 = FNABSD_rec |
5178 | | { 1179, 2, 1, 4, 507, 0, 0, PPCImpOpBase + 0, 337, 0, 0x18ULL }, // Inst #1179 = FNABSD |
5179 | | { 1178, 3, 1, 4, 443, 1, 1, PPCImpOpBase + 135, 328, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1178 = FMUL_rec |
5180 | | { 1177, 3, 1, 4, 442, 1, 1, PPCImpOpBase + 135, 491, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1177 = FMULS_rec |
5181 | | { 1176, 3, 1, 4, 435, 1, 0, PPCImpOpBase + 134, 491, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1176 = FMULS |
5182 | | { 1175, 3, 1, 4, 436, 1, 0, PPCImpOpBase + 134, 328, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1175 = FMUL |
5183 | | { 1174, 4, 1, 4, 158, 1, 1, PPCImpOpBase + 135, 499, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1174 = FMSUB_rec |
5184 | | { 1173, 4, 1, 4, 320, 1, 1, PPCImpOpBase + 135, 503, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1173 = FMSUBS_rec |
5185 | | { 1172, 4, 1, 4, 315, 1, 0, PPCImpOpBase + 134, 503, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1172 = FMSUBS |
5186 | | { 1171, 4, 1, 4, 317, 1, 0, PPCImpOpBase + 134, 499, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1171 = FMSUB |
5187 | | { 1170, 2, 1, 4, 537, 0, 1, PPCImpOpBase + 131, 489, 0, 0x0ULL }, // Inst #1170 = FMR_rec |
5188 | | { 1169, 2, 1, 4, 507, 0, 0, PPCImpOpBase + 0, 489, 0, 0x0ULL }, // Inst #1169 = FMR |
5189 | | { 1168, 4, 1, 4, 158, 1, 1, PPCImpOpBase + 135, 499, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1168 = FMADD_rec |
5190 | | { 1167, 4, 1, 4, 320, 1, 1, PPCImpOpBase + 135, 503, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1167 = FMADDS_rec |
5191 | | { 1166, 4, 1, 4, 315, 1, 0, PPCImpOpBase + 134, 503, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1166 = FMADDS |
5192 | | { 1165, 4, 1, 4, 317, 1, 0, PPCImpOpBase + 134, 499, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1165 = FMADD |
5193 | | { 1164, 0, 0, 4, 0, 0, 1, PPCImpOpBase + 134, 1, 0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1164 = FENCE |
5194 | | { 1163, 3, 1, 4, 174, 1, 1, PPCImpOpBase + 135, 328, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1163 = FDIV_rec |
5195 | | { 1162, 3, 1, 4, 171, 1, 1, PPCImpOpBase + 135, 491, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1162 = FDIVS_rec |
5196 | | { 1161, 3, 1, 4, 399, 1, 0, PPCImpOpBase + 134, 491, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1161 = FDIVS |
5197 | | { 1160, 3, 1, 4, 396, 1, 0, PPCImpOpBase + 134, 328, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1160 = FDIV |
5198 | | { 1159, 2, 1, 4, 444, 1, 1, PPCImpOpBase + 135, 337, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1159 = FCTIW_rec |
5199 | | { 1158, 2, 1, 4, 444, 1, 1, PPCImpOpBase + 135, 337, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1158 = FCTIWZ_rec |
5200 | | { 1157, 2, 1, 4, 427, 1, 0, PPCImpOpBase + 134, 337, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1157 = FCTIWZ |
5201 | | { 1156, 2, 1, 4, 444, 1, 1, PPCImpOpBase + 135, 337, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1156 = FCTIWU_rec |
5202 | | { 1155, 2, 1, 4, 444, 1, 1, PPCImpOpBase + 135, 337, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1155 = FCTIWUZ_rec |
5203 | | { 1154, 2, 1, 4, 427, 1, 0, PPCImpOpBase + 134, 337, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1154 = FCTIWUZ |
5204 | | { 1153, 2, 1, 4, 427, 1, 0, PPCImpOpBase + 134, 337, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1153 = FCTIWU |
5205 | | { 1152, 2, 1, 4, 427, 1, 0, PPCImpOpBase + 134, 337, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1152 = FCTIW |
5206 | | { 1151, 2, 1, 4, 444, 1, 1, PPCImpOpBase + 135, 337, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1151 = FCTID_rec |
5207 | | { 1150, 2, 1, 4, 444, 1, 1, PPCImpOpBase + 135, 337, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1150 = FCTIDZ_rec |
5208 | | { 1149, 2, 1, 4, 427, 1, 0, PPCImpOpBase + 134, 337, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1149 = FCTIDZ |
5209 | | { 1148, 2, 1, 4, 444, 1, 1, PPCImpOpBase + 135, 337, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1148 = FCTIDU_rec |
5210 | | { 1147, 2, 1, 4, 444, 1, 1, PPCImpOpBase + 135, 337, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1147 = FCTIDUZ_rec |
5211 | | { 1146, 2, 1, 4, 427, 1, 0, PPCImpOpBase + 134, 337, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1146 = FCTIDUZ |
5212 | | { 1145, 2, 1, 4, 427, 1, 0, PPCImpOpBase + 134, 337, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1145 = FCTIDU |
5213 | | { 1144, 2, 1, 4, 427, 1, 0, PPCImpOpBase + 134, 337, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1144 = FCTID |
5214 | | { 1143, 3, 1, 4, 156, 0, 1, PPCImpOpBase + 131, 491, 0, 0x18ULL }, // Inst #1143 = FCPSGNS_rec |
5215 | | { 1142, 3, 1, 4, 301, 0, 0, PPCImpOpBase + 0, 491, 0, 0x18ULL }, // Inst #1142 = FCPSGNS |
5216 | | { 1141, 3, 1, 4, 156, 0, 1, PPCImpOpBase + 131, 328, 0, 0x18ULL }, // Inst #1141 = FCPSGND_rec |
5217 | | { 1140, 3, 1, 4, 301, 0, 0, PPCImpOpBase + 0, 328, 0, 0x18ULL }, // Inst #1140 = FCPSGND |
5218 | | { 1139, 3, 1, 4, 170, 0, 0, PPCImpOpBase + 0, 496, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1139 = FCMPUS |
5219 | | { 1138, 3, 1, 4, 170, 0, 0, PPCImpOpBase + 0, 343, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1138 = FCMPUD |
5220 | | { 1137, 3, 1, 4, 170, 0, 0, PPCImpOpBase + 0, 496, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1137 = FCMPOS |
5221 | | { 1136, 3, 1, 4, 170, 0, 0, PPCImpOpBase + 0, 343, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1136 = FCMPOD |
5222 | | { 1135, 2, 1, 4, 444, 1, 1, PPCImpOpBase + 135, 337, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1135 = FCFID_rec |
5223 | | { 1134, 2, 1, 4, 444, 1, 1, PPCImpOpBase + 135, 337, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1134 = FCFIDU_rec |
5224 | | { 1133, 2, 1, 4, 444, 1, 1, PPCImpOpBase + 135, 494, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1133 = FCFIDUS_rec |
5225 | | { 1132, 2, 1, 4, 427, 1, 0, PPCImpOpBase + 134, 494, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1132 = FCFIDUS |
5226 | | { 1131, 2, 1, 4, 427, 1, 0, PPCImpOpBase + 134, 337, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1131 = FCFIDU |
5227 | | { 1130, 2, 1, 4, 444, 1, 1, PPCImpOpBase + 135, 494, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1130 = FCFIDS_rec |
5228 | | { 1129, 2, 1, 4, 427, 1, 0, PPCImpOpBase + 134, 494, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1129 = FCFIDS |
5229 | | { 1128, 2, 1, 4, 427, 1, 0, PPCImpOpBase + 134, 337, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1128 = FCFID |
5230 | | { 1127, 3, 1, 4, 0, 1, 0, PPCImpOpBase + 134, 328, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1127 = FADDrtz |
5231 | | { 1126, 3, 1, 4, 157, 1, 1, PPCImpOpBase + 135, 328, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1126 = FADD_rec |
5232 | | { 1125, 3, 1, 4, 442, 1, 1, PPCImpOpBase + 135, 491, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1125 = FADDS_rec |
5233 | | { 1124, 3, 1, 4, 435, 1, 0, PPCImpOpBase + 134, 491, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1124 = FADDS |
5234 | | { 1123, 3, 1, 4, 316, 1, 0, PPCImpOpBase + 134, 328, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1123 = FADD |
5235 | | { 1122, 2, 1, 4, 537, 0, 1, PPCImpOpBase + 131, 489, 0, 0x18ULL }, // Inst #1122 = FABSS_rec |
5236 | | { 1121, 2, 1, 4, 507, 0, 0, PPCImpOpBase + 0, 489, 0, 0x18ULL }, // Inst #1121 = FABSS |
5237 | | { 1120, 2, 1, 4, 537, 0, 1, PPCImpOpBase + 131, 337, 0, 0x18ULL }, // Inst #1120 = FABSD_rec |
5238 | | { 1119, 2, 1, 4, 507, 0, 0, PPCImpOpBase + 0, 337, 0, 0x18ULL }, // Inst #1119 = FABSD |
5239 | | { 1118, 0, 0, 4, 610, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1118 = EnforceIEIO |
5240 | | { 1117, 2, 1, 4, 506, 0, 1, PPCImpOpBase + 0, 253, 0, 0x108ULL }, // Inst #1117 = EXTSW_rec |
5241 | | { 1116, 2, 1, 4, 506, 0, 1, PPCImpOpBase + 0, 484, 0, 0x108ULL }, // Inst #1116 = EXTSW_32_64_rec |
5242 | | { 1115, 2, 1, 4, 506, 0, 0, PPCImpOpBase + 0, 484, 0, 0x108ULL }, // Inst #1115 = EXTSW_32_64 |
5243 | | { 1114, 2, 1, 4, 506, 0, 0, PPCImpOpBase + 0, 251, 0, 0x8ULL }, // Inst #1114 = EXTSW_32 |
5244 | | { 1113, 3, 1, 4, 395, 0, 2, PPCImpOpBase + 11, 169, 0, 0x8ULL }, // Inst #1113 = EXTSWSLI_rec |
5245 | | { 1112, 3, 1, 4, 395, 0, 1, PPCImpOpBase + 0, 486, 0, 0x8ULL }, // Inst #1112 = EXTSWSLI_32_64_rec |
5246 | | { 1111, 3, 1, 4, 285, 0, 0, PPCImpOpBase + 0, 486, 0, 0x8ULL }, // Inst #1111 = EXTSWSLI_32_64 |
5247 | | { 1110, 3, 1, 4, 285, 0, 1, PPCImpOpBase + 5, 169, 0, 0x8ULL }, // Inst #1110 = EXTSWSLI |
5248 | | { 1109, 2, 1, 4, 506, 0, 0, PPCImpOpBase + 0, 253, 0, 0x108ULL }, // Inst #1109 = EXTSW |
5249 | | { 1108, 2, 1, 4, 506, 0, 1, PPCImpOpBase + 0, 251, 0, 0x108ULL }, // Inst #1108 = EXTSH_rec |
5250 | | { 1107, 2, 1, 4, 506, 0, 1, PPCImpOpBase + 0, 253, 0, 0x108ULL }, // Inst #1107 = EXTSH8_rec |
5251 | | { 1106, 2, 1, 4, 506, 0, 0, PPCImpOpBase + 0, 484, 0, 0x108ULL }, // Inst #1106 = EXTSH8_32_64 |
5252 | | { 1105, 2, 1, 4, 506, 0, 0, PPCImpOpBase + 0, 253, 0, 0x108ULL }, // Inst #1105 = EXTSH8 |
5253 | | { 1104, 2, 1, 4, 506, 0, 0, PPCImpOpBase + 0, 251, 0, 0x108ULL }, // Inst #1104 = EXTSH |
5254 | | { 1103, 2, 1, 4, 506, 0, 1, PPCImpOpBase + 0, 251, 0, 0x108ULL }, // Inst #1103 = EXTSB_rec |
5255 | | { 1102, 2, 1, 4, 506, 0, 1, PPCImpOpBase + 0, 253, 0, 0x108ULL }, // Inst #1102 = EXTSB8_rec |
5256 | | { 1101, 2, 1, 4, 506, 0, 0, PPCImpOpBase + 0, 484, 0, 0x108ULL }, // Inst #1101 = EXTSB8_32_64 |
5257 | | { 1100, 2, 1, 4, 506, 0, 0, PPCImpOpBase + 0, 253, 0, 0x108ULL }, // Inst #1100 = EXTSB8 |
5258 | | { 1099, 2, 1, 4, 506, 0, 0, PPCImpOpBase + 0, 251, 0, 0x108ULL }, // Inst #1099 = EXTSB |
5259 | | { 1098, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1098 = EVXOR |
5260 | | { 1097, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 481, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1097 = EVSUBIFW |
5261 | | { 1096, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1096 = EVSUBFW |
5262 | | { 1095, 2, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 448, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1095 = EVSUBFUSIAAW |
5263 | | { 1094, 2, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 448, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1094 = EVSUBFUMIAAW |
5264 | | { 1093, 2, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 448, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1093 = EVSUBFSSIAAW |
5265 | | { 1092, 2, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 448, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1092 = EVSUBFSMIAAW |
5266 | | { 1091, 3, 0, 4, 409, 0, 0, PPCImpOpBase + 0, 469, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1091 = EVSTWWOX |
5267 | | { 1090, 3, 0, 4, 409, 0, 0, PPCImpOpBase + 0, 466, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1090 = EVSTWWO |
5268 | | { 1089, 3, 0, 4, 409, 0, 0, PPCImpOpBase + 0, 469, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1089 = EVSTWWEX |
5269 | | { 1088, 3, 0, 4, 409, 0, 0, PPCImpOpBase + 0, 466, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1088 = EVSTWWE |
5270 | | { 1087, 3, 0, 4, 409, 0, 0, PPCImpOpBase + 0, 469, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1087 = EVSTWHOX |
5271 | | { 1086, 3, 0, 4, 409, 0, 0, PPCImpOpBase + 0, 466, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1086 = EVSTWHO |
5272 | | { 1085, 3, 0, 4, 409, 0, 0, PPCImpOpBase + 0, 469, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1085 = EVSTWHEX |
5273 | | { 1084, 3, 0, 4, 409, 0, 0, PPCImpOpBase + 0, 466, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1084 = EVSTWHE |
5274 | | { 1083, 3, 0, 4, 409, 0, 0, PPCImpOpBase + 0, 469, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1083 = EVSTDWX |
5275 | | { 1082, 3, 0, 4, 409, 0, 0, PPCImpOpBase + 0, 466, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1082 = EVSTDW |
5276 | | { 1081, 3, 0, 4, 409, 0, 0, PPCImpOpBase + 0, 469, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1081 = EVSTDHX |
5277 | | { 1080, 3, 0, 4, 409, 0, 0, PPCImpOpBase + 0, 466, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1080 = EVSTDH |
5278 | | { 1079, 3, 0, 4, 409, 0, 0, PPCImpOpBase + 0, 469, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1079 = EVSTDDX |
5279 | | { 1078, 3, 0, 4, 409, 0, 0, PPCImpOpBase + 0, 466, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1078 = EVSTDD |
5280 | | { 1077, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1077 = EVSRWU |
5281 | | { 1076, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1076 = EVSRWS |
5282 | | { 1075, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 463, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1075 = EVSRWIU |
5283 | | { 1074, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 463, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1074 = EVSRWIS |
5284 | | { 1073, 2, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 479, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1073 = EVSPLATI |
5285 | | { 1072, 2, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 479, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1072 = EVSPLATFI |
5286 | | { 1071, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 463, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1071 = EVSLWI |
5287 | | { 1070, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1070 = EVSLW |
5288 | | { 1069, 4, 1, 4, 23, 0, 0, PPCImpOpBase + 0, 475, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1069 = EVSEL |
5289 | | { 1068, 2, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 448, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1068 = EVRNDW |
5290 | | { 1067, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 463, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1067 = EVRLWI |
5291 | | { 1066, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1066 = EVRLW |
5292 | | { 1065, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1065 = EVORC |
5293 | | { 1064, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1064 = EVOR |
5294 | | { 1063, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1063 = EVNOR |
5295 | | { 1062, 2, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 448, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1062 = EVNEG |
5296 | | { 1061, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1061 = EVNAND |
5297 | | { 1060, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1060 = EVMWUMIAN |
5298 | | { 1059, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1059 = EVMWUMIAA |
5299 | | { 1058, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1058 = EVMWUMIA |
5300 | | { 1057, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1057 = EVMWUMI |
5301 | | { 1056, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1056 = EVMWSSFAN |
5302 | | { 1055, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1055 = EVMWSSFAA |
5303 | | { 1054, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1054 = EVMWSSFA |
5304 | | { 1053, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1053 = EVMWSSF |
5305 | | { 1052, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1052 = EVMWSMIAN |
5306 | | { 1051, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1051 = EVMWSMIAA |
5307 | | { 1050, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1050 = EVMWSMIA |
5308 | | { 1049, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1049 = EVMWSMI |
5309 | | { 1048, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1048 = EVMWSMFAN |
5310 | | { 1047, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1047 = EVMWSMFAA |
5311 | | { 1046, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1046 = EVMWSMFA |
5312 | | { 1045, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1045 = EVMWSMF |
5313 | | { 1044, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1044 = EVMWLUSIANW |
5314 | | { 1043, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1043 = EVMWLUSIAAW |
5315 | | { 1042, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1042 = EVMWLUMIANW |
5316 | | { 1041, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1041 = EVMWLUMIAAW |
5317 | | { 1040, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1040 = EVMWLUMIA |
5318 | | { 1039, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1039 = EVMWLUMI |
5319 | | { 1038, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1038 = EVMWLSSIANW |
5320 | | { 1037, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1037 = EVMWLSSIAAW |
5321 | | { 1036, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1036 = EVMWLSMIANW |
5322 | | { 1035, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1035 = EVMWLSMIAAW |
5323 | | { 1034, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1034 = EVMWHUMIA |
5324 | | { 1033, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1033 = EVMWHUMI |
5325 | | { 1032, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1032 = EVMWHSSFA |
5326 | | { 1031, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1031 = EVMWHSSF |
5327 | | { 1030, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1030 = EVMWHSMIA |
5328 | | { 1029, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1029 = EVMWHSMI |
5329 | | { 1028, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1028 = EVMWHSMFA |
5330 | | { 1027, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1027 = EVMWHSMF |
5331 | | { 1026, 2, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 448, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1026 = EVMRA |
5332 | | { 1025, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1025 = EVMHOUSIANW |
5333 | | { 1024, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1024 = EVMHOUSIAAW |
5334 | | { 1023, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1023 = EVMHOUMIANW |
5335 | | { 1022, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1022 = EVMHOUMIAAW |
5336 | | { 1021, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1021 = EVMHOUMIA |
5337 | | { 1020, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1020 = EVMHOUMI |
5338 | | { 1019, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1019 = EVMHOSSIANW |
5339 | | { 1018, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1018 = EVMHOSSIAAW |
5340 | | { 1017, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1017 = EVMHOSSFANW |
5341 | | { 1016, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1016 = EVMHOSSFAAW |
5342 | | { 1015, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1015 = EVMHOSSFA |
5343 | | { 1014, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1014 = EVMHOSSF |
5344 | | { 1013, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1013 = EVMHOSMIANW |
5345 | | { 1012, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1012 = EVMHOSMIAAW |
5346 | | { 1011, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1011 = EVMHOSMIA |
5347 | | { 1010, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1010 = EVMHOSMI |
5348 | | { 1009, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1009 = EVMHOSMFANW |
5349 | | { 1008, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1008 = EVMHOSMFAAW |
5350 | | { 1007, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1007 = EVMHOSMFA |
5351 | | { 1006, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1006 = EVMHOSMF |
5352 | | { 1005, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1005 = EVMHOGUMIAN |
5353 | | { 1004, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1004 = EVMHOGUMIAA |
5354 | | { 1003, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1003 = EVMHOGSMIAN |
5355 | | { 1002, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1002 = EVMHOGSMIAA |
5356 | | { 1001, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1001 = EVMHOGSMFAN |
5357 | | { 1000, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1000 = EVMHOGSMFAA |
5358 | | { 999, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #999 = EVMHEUSIANW |
5359 | | { 998, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #998 = EVMHEUSIAAW |
5360 | | { 997, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #997 = EVMHEUMIANW |
5361 | | { 996, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #996 = EVMHEUMIAAW |
5362 | | { 995, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #995 = EVMHEUMIA |
5363 | | { 994, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #994 = EVMHEUMI |
5364 | | { 993, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #993 = EVMHESSIANW |
5365 | | { 992, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #992 = EVMHESSIAAW |
5366 | | { 991, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #991 = EVMHESSFANW |
5367 | | { 990, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #990 = EVMHESSFAAW |
5368 | | { 989, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #989 = EVMHESSFA |
5369 | | { 988, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #988 = EVMHESSF |
5370 | | { 987, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #987 = EVMHESMIANW |
5371 | | { 986, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #986 = EVMHESMIAAW |
5372 | | { 985, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #985 = EVMHESMIA |
5373 | | { 984, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #984 = EVMHESMI |
5374 | | { 983, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #983 = EVMHESMFANW |
5375 | | { 982, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #982 = EVMHESMFAAW |
5376 | | { 981, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #981 = EVMHESMFA |
5377 | | { 980, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #980 = EVMHESMF |
5378 | | { 979, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #979 = EVMHEGUMIAN |
5379 | | { 978, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #978 = EVMHEGUMIAA |
5380 | | { 977, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #977 = EVMHEGSMIAN |
5381 | | { 976, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #976 = EVMHEGSMIAA |
5382 | | { 975, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #975 = EVMHEGSMFAN |
5383 | | { 974, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #974 = EVMHEGSMFAA |
5384 | | { 973, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #973 = EVMERGELOHI |
5385 | | { 972, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 472, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #972 = EVMERGELO |
5386 | | { 971, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #971 = EVMERGEHILO |
5387 | | { 970, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #970 = EVMERGEHI |
5388 | | { 969, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 469, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #969 = EVLWWSPLATX |
5389 | | { 968, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 466, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #968 = EVLWWSPLAT |
5390 | | { 967, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 469, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #967 = EVLWHSPLATX |
5391 | | { 966, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 466, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #966 = EVLWHSPLAT |
5392 | | { 965, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 469, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #965 = EVLWHOUX |
5393 | | { 964, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 466, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #964 = EVLWHOU |
5394 | | { 963, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 469, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #963 = EVLWHOSX |
5395 | | { 962, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 466, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #962 = EVLWHOS |
5396 | | { 961, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 469, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #961 = EVLWHEX |
5397 | | { 960, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 466, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #960 = EVLWHE |
5398 | | { 959, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 469, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #959 = EVLHHOUSPLATX |
5399 | | { 958, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 466, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #958 = EVLHHOUSPLAT |
5400 | | { 957, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 469, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #957 = EVLHHOSSPLATX |
5401 | | { 956, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 466, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #956 = EVLHHOSSPLAT |
5402 | | { 955, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 469, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #955 = EVLHHESPLATX |
5403 | | { 954, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 466, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #954 = EVLHHESPLAT |
5404 | | { 953, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 469, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #953 = EVLDWX |
5405 | | { 952, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 466, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #952 = EVLDW |
5406 | | { 951, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 469, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #951 = EVLDHX |
5407 | | { 950, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 466, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #950 = EVLDH |
5408 | | { 949, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 469, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #949 = EVLDDX |
5409 | | { 948, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 466, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #948 = EVLDD |
5410 | | { 947, 3, 1, 4, 23, 0, 0, PPCImpOpBase + 0, 455, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #947 = EVFSTSTLT |
5411 | | { 946, 3, 1, 4, 23, 0, 0, PPCImpOpBase + 0, 455, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #946 = EVFSTSTGT |
5412 | | { 945, 3, 1, 4, 23, 0, 0, PPCImpOpBase + 0, 455, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #945 = EVFSTSTEQ |
5413 | | { 944, 3, 1, 4, 24, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #944 = EVFSSUB |
5414 | | { 943, 2, 1, 4, 23, 0, 0, PPCImpOpBase + 0, 448, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #943 = EVFSNEG |
5415 | | { 942, 2, 1, 4, 23, 0, 0, PPCImpOpBase + 0, 448, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #942 = EVFSNABS |
5416 | | { 941, 3, 1, 4, 24, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #941 = EVFSMUL |
5417 | | { 940, 3, 1, 4, 21, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #940 = EVFSDIV |
5418 | | { 939, 2, 1, 4, 24, 0, 0, PPCImpOpBase + 0, 448, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #939 = EVFSCTUIZ |
5419 | | { 938, 2, 1, 4, 24, 0, 0, PPCImpOpBase + 0, 448, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #938 = EVFSCTUI |
5420 | | { 937, 2, 1, 4, 24, 0, 0, PPCImpOpBase + 0, 448, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #937 = EVFSCTUF |
5421 | | { 936, 2, 1, 4, 24, 0, 0, PPCImpOpBase + 0, 448, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #936 = EVFSCTSIZ |
5422 | | { 935, 2, 1, 4, 24, 0, 0, PPCImpOpBase + 0, 448, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #935 = EVFSCTSI |
5423 | | { 934, 2, 1, 4, 24, 0, 0, PPCImpOpBase + 0, 448, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #934 = EVFSCTSF |
5424 | | { 933, 3, 1, 4, 22, 0, 0, PPCImpOpBase + 0, 455, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #933 = EVFSCMPLT |
5425 | | { 932, 3, 1, 4, 22, 0, 0, PPCImpOpBase + 0, 455, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #932 = EVFSCMPGT |
5426 | | { 931, 3, 1, 4, 22, 0, 0, PPCImpOpBase + 0, 455, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #931 = EVFSCMPEQ |
5427 | | { 930, 2, 1, 4, 24, 0, 0, PPCImpOpBase + 0, 448, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #930 = EVFSCFUI |
5428 | | { 929, 2, 1, 4, 24, 0, 0, PPCImpOpBase + 0, 448, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #929 = EVFSCFUF |
5429 | | { 928, 2, 1, 4, 24, 0, 0, PPCImpOpBase + 0, 448, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #928 = EVFSCFSI |
5430 | | { 927, 2, 1, 4, 24, 0, 0, PPCImpOpBase + 0, 448, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #927 = EVFSCFSF |
5431 | | { 926, 3, 1, 4, 24, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #926 = EVFSADD |
5432 | | { 925, 2, 1, 4, 23, 0, 0, PPCImpOpBase + 0, 448, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #925 = EVFSABS |
5433 | | { 924, 2, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 448, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #924 = EVEXTSH |
5434 | | { 923, 2, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 448, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #923 = EVEXTSB |
5435 | | { 922, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #922 = EVEQV |
5436 | | { 921, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #921 = EVDIVWU |
5437 | | { 920, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #920 = EVDIVWS |
5438 | | { 919, 2, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 448, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #919 = EVCNTLZW |
5439 | | { 918, 2, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 448, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #918 = EVCNTLSW |
5440 | | { 917, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 455, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #917 = EVCMPLTU |
5441 | | { 916, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 455, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #916 = EVCMPLTS |
5442 | | { 915, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 455, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #915 = EVCMPGTU |
5443 | | { 914, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 455, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #914 = EVCMPGTS |
5444 | | { 913, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 455, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #913 = EVCMPEQ |
5445 | | { 912, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #912 = EVANDC |
5446 | | { 911, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #911 = EVAND |
5447 | | { 910, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #910 = EVADDW |
5448 | | { 909, 2, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 448, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #909 = EVADDUSIAAW |
5449 | | { 908, 2, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 448, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #908 = EVADDUMIAAW |
5450 | | { 907, 2, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 448, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #907 = EVADDSSIAAW |
5451 | | { 906, 2, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 448, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #906 = EVADDSMIAAW |
5452 | | { 905, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 463, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #905 = EVADDIW |
5453 | | { 904, 2, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 448, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #904 = EVABS |
5454 | | { 903, 3, 1, 4, 198, 0, 1, PPCImpOpBase + 0, 208, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #903 = EQV_rec |
5455 | | { 902, 3, 1, 4, 198, 0, 1, PPCImpOpBase + 0, 214, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #902 = EQV8_rec |
5456 | | { 901, 3, 1, 4, 198, 0, 0, PPCImpOpBase + 0, 214, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #901 = EQV8 |
5457 | | { 900, 3, 1, 4, 198, 0, 0, PPCImpOpBase + 0, 208, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #900 = EQV |
5458 | | { 899, 1, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 277, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #899 = EH_SjLj_Setup |
5459 | | { 898, 2, 1, 4, 0, 0, 1, PPCImpOpBase + 64, 461, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #898 = EH_SjLj_SetJmp64 |
5460 | | { 897, 2, 1, 4, 0, 0, 1, PPCImpOpBase + 63, 461, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #897 = EH_SjLj_SetJmp32 |
5461 | | { 896, 1, 0, 4, 0, 0, 0, PPCImpOpBase + 0, 460, 0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #896 = EH_SjLj_LongJmp64 |
5462 | | { 895, 1, 0, 4, 0, 0, 0, PPCImpOpBase + 0, 460, 0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #895 = EH_SjLj_LongJmp32 |
5463 | | { 894, 3, 1, 4, 16, 0, 0, PPCImpOpBase + 0, 455, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #894 = EFSTSTLT |
5464 | | { 893, 3, 1, 4, 16, 0, 0, PPCImpOpBase + 0, 455, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #893 = EFSTSTGT |
5465 | | { 892, 3, 1, 4, 16, 0, 0, PPCImpOpBase + 0, 455, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #892 = EFSTSTEQ |
5466 | | { 891, 3, 1, 4, 22, 0, 0, PPCImpOpBase + 0, 208, 0, 0x0ULL }, // Inst #891 = EFSSUB |
5467 | | { 890, 2, 1, 4, 12, 0, 0, PPCImpOpBase + 0, 251, 0, 0x0ULL }, // Inst #890 = EFSNEG |
5468 | | { 889, 2, 1, 4, 12, 0, 0, PPCImpOpBase + 0, 251, 0, 0x0ULL }, // Inst #889 = EFSNABS |
5469 | | { 888, 3, 1, 4, 12, 0, 0, PPCImpOpBase + 0, 208, 0, 0x0ULL }, // Inst #888 = EFSMUL |
5470 | | { 887, 3, 1, 4, 21, 0, 0, PPCImpOpBase + 0, 208, 0, 0x0ULL }, // Inst #887 = EFSDIV |
5471 | | { 886, 2, 1, 4, 22, 0, 0, PPCImpOpBase + 0, 251, 0, 0x0ULL }, // Inst #886 = EFSCTUIZ |
5472 | | { 885, 2, 1, 4, 22, 0, 0, PPCImpOpBase + 0, 251, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #885 = EFSCTUI |
5473 | | { 884, 2, 1, 4, 22, 0, 0, PPCImpOpBase + 0, 453, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #884 = EFSCTUF |
5474 | | { 883, 2, 1, 4, 22, 0, 0, PPCImpOpBase + 0, 251, 0, 0x0ULL }, // Inst #883 = EFSCTSIZ |
5475 | | { 882, 2, 1, 4, 22, 0, 0, PPCImpOpBase + 0, 251, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #882 = EFSCTSI |
5476 | | { 881, 2, 1, 4, 22, 0, 0, PPCImpOpBase + 0, 251, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #881 = EFSCTSF |
5477 | | { 880, 3, 1, 4, 16, 0, 0, PPCImpOpBase + 0, 309, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #880 = EFSCMPLT |
5478 | | { 879, 3, 1, 4, 16, 0, 0, PPCImpOpBase + 0, 309, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #879 = EFSCMPGT |
5479 | | { 878, 3, 1, 4, 16, 0, 0, PPCImpOpBase + 0, 309, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #878 = EFSCMPEQ |
5480 | | { 877, 2, 1, 4, 22, 0, 0, PPCImpOpBase + 0, 251, 0, 0x0ULL }, // Inst #877 = EFSCFUI |
5481 | | { 876, 2, 1, 4, 22, 0, 0, PPCImpOpBase + 0, 251, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #876 = EFSCFUF |
5482 | | { 875, 2, 1, 4, 22, 0, 0, PPCImpOpBase + 0, 251, 0, 0x0ULL }, // Inst #875 = EFSCFSI |
5483 | | { 874, 2, 1, 4, 22, 0, 0, PPCImpOpBase + 0, 251, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #874 = EFSCFSF |
5484 | | { 873, 2, 1, 4, 22, 0, 0, PPCImpOpBase + 0, 458, 0, 0x0ULL }, // Inst #873 = EFSCFD |
5485 | | { 872, 3, 1, 4, 20, 0, 0, PPCImpOpBase + 0, 208, 0, 0x0ULL }, // Inst #872 = EFSADD |
5486 | | { 871, 2, 1, 4, 22, 0, 0, PPCImpOpBase + 0, 251, 0, 0x0ULL }, // Inst #871 = EFSABS |
5487 | | { 870, 3, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 455, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #870 = EFDTSTLT |
5488 | | { 869, 3, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 455, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #869 = EFDTSTGT |
5489 | | { 868, 3, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 455, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #868 = EFDTSTEQ |
5490 | | { 867, 3, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 450, 0, 0x0ULL }, // Inst #867 = EFDSUB |
5491 | | { 866, 2, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 448, 0, 0x0ULL }, // Inst #866 = EFDNEG |
5492 | | { 865, 2, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 448, 0, 0x0ULL }, // Inst #865 = EFDNABS |
5493 | | { 864, 3, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 450, 0, 0x0ULL }, // Inst #864 = EFDMUL |
5494 | | { 863, 3, 1, 4, 21, 0, 0, PPCImpOpBase + 0, 450, 0, 0x0ULL }, // Inst #863 = EFDDIV |
5495 | | { 862, 2, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 458, 0, 0x0ULL }, // Inst #862 = EFDCTUIZ |
5496 | | { 861, 2, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #861 = EFDCTUIDZ |
5497 | | { 860, 2, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #860 = EFDCTUI |
5498 | | { 859, 2, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 453, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #859 = EFDCTUF |
5499 | | { 858, 2, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 458, 0, 0x0ULL }, // Inst #858 = EFDCTSIZ |
5500 | | { 857, 2, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #857 = EFDCTSIDZ |
5501 | | { 856, 2, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #856 = EFDCTSI |
5502 | | { 855, 2, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 453, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #855 = EFDCTSF |
5503 | | { 854, 3, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 455, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #854 = EFDCMPLT |
5504 | | { 853, 3, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 455, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #853 = EFDCMPGT |
5505 | | { 852, 3, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 455, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #852 = EFDCMPEQ |
5506 | | { 851, 2, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 453, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #851 = EFDCFUID |
5507 | | { 850, 2, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 453, 0, 0x0ULL }, // Inst #850 = EFDCFUI |
5508 | | { 849, 2, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 453, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #849 = EFDCFUF |
5509 | | { 848, 2, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 453, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #848 = EFDCFSID |
5510 | | { 847, 2, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 453, 0, 0x0ULL }, // Inst #847 = EFDCFSI |
5511 | | { 846, 2, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 453, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #846 = EFDCFSF |
5512 | | { 845, 2, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 453, 0, 0x0ULL }, // Inst #845 = EFDCFS |
5513 | | { 844, 3, 1, 4, 20, 0, 0, PPCImpOpBase + 0, 450, 0, 0x0ULL }, // Inst #844 = EFDADD |
5514 | | { 843, 2, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 448, 0, 0x0ULL }, // Inst #843 = EFDABS |
5515 | | { 842, 2, 1, 4, 0, 1, 1, PPCImpOpBase + 105, 446, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #842 = DecreaseCTRloop |
5516 | | { 841, 2, 1, 4, 0, 1, 1, PPCImpOpBase + 107, 446, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #841 = DecreaseCTR8loop |
5517 | | { 840, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 443, 0, 0x0ULL }, // Inst #840 = DYNAREAOFFSET8 |
5518 | | { 839, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 443, 0, 0x0ULL }, // Inst #839 = DYNAREAOFFSET |
5519 | | { 838, 4, 1, 4, 0, 1, 1, PPCImpOpBase + 132, 439, 0, 0x0ULL }, // Inst #838 = DYNALLOC8 |
5520 | | { 837, 4, 1, 4, 0, 1, 1, PPCImpOpBase + 61, 435, 0, 0x0ULL }, // Inst #837 = DYNALLOC |
5521 | | { 836, 2, 1, 4, 244, 0, 1, PPCImpOpBase + 131, 337, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #836 = DXEX_rec |
5522 | | { 835, 2, 1, 4, 244, 0, 1, PPCImpOpBase + 131, 349, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #835 = DXEXQ_rec |
5523 | | { 834, 2, 1, 4, 244, 0, 0, PPCImpOpBase + 0, 349, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #834 = DXEXQ |
5524 | | { 833, 2, 1, 4, 244, 0, 0, PPCImpOpBase + 0, 337, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #833 = DXEX |
5525 | | { 832, 3, 1, 4, 243, 0, 0, PPCImpOpBase + 0, 432, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #832 = DTSTSFQ |
5526 | | { 831, 3, 1, 4, 16, 0, 0, PPCImpOpBase + 0, 429, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #831 = DTSTSFIQ |
5527 | | { 830, 3, 1, 4, 16, 0, 0, PPCImpOpBase + 0, 426, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #830 = DTSTSFI |
5528 | | { 829, 3, 1, 4, 243, 0, 0, PPCImpOpBase + 0, 343, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #829 = DTSTSF |
5529 | | { 828, 3, 1, 4, 248, 0, 0, PPCImpOpBase + 0, 346, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #828 = DTSTEXQ |
5530 | | { 827, 3, 1, 4, 243, 0, 0, PPCImpOpBase + 0, 343, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #827 = DTSTEX |
5531 | | { 826, 3, 1, 4, 243, 0, 0, PPCImpOpBase + 0, 423, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #826 = DTSTDGQ |
5532 | | { 825, 3, 1, 4, 243, 0, 0, PPCImpOpBase + 0, 420, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #825 = DTSTDG |
5533 | | { 824, 3, 1, 4, 243, 0, 0, PPCImpOpBase + 0, 423, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #824 = DTSTDCQ |
5534 | | { 823, 3, 1, 4, 243, 0, 0, PPCImpOpBase + 0, 420, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #823 = DTSTDC |
5535 | | { 822, 3, 1, 4, 245, 0, 1, PPCImpOpBase + 131, 328, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #822 = DSUB_rec |
5536 | | { 821, 3, 1, 4, 250, 0, 1, PPCImpOpBase + 131, 331, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #821 = DSUBQ_rec |
5537 | | { 820, 3, 1, 4, 250, 0, 0, PPCImpOpBase + 0, 331, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #820 = DSUBQ |
5538 | | { 819, 3, 1, 4, 245, 0, 0, PPCImpOpBase + 0, 328, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #819 = DSUB |
5539 | | { 818, 3, 0, 4, 526, 0, 0, PPCImpOpBase + 0, 417, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #818 = DSTT64 |
5540 | | { 817, 3, 0, 4, 526, 0, 0, PPCImpOpBase + 0, 414, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #817 = DSTT |
5541 | | { 816, 3, 0, 4, 526, 0, 0, PPCImpOpBase + 0, 417, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #816 = DSTSTT64 |
5542 | | { 815, 3, 0, 4, 526, 0, 0, PPCImpOpBase + 0, 414, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #815 = DSTSTT |
5543 | | { 814, 3, 0, 4, 526, 0, 0, PPCImpOpBase + 0, 417, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #814 = DSTST64 |
5544 | | { 813, 3, 0, 4, 526, 0, 0, PPCImpOpBase + 0, 414, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #813 = DSTST |
5545 | | { 812, 3, 0, 4, 526, 0, 0, PPCImpOpBase + 0, 417, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #812 = DST64 |
5546 | | { 811, 3, 0, 4, 526, 0, 0, PPCImpOpBase + 0, 414, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #811 = DST |
5547 | | { 810, 0, 0, 4, 496, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #810 = DSSALL |
5548 | | { 809, 1, 0, 4, 496, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #809 = DSS |
5549 | | { 808, 3, 1, 4, 244, 0, 1, PPCImpOpBase + 131, 408, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #808 = DSCRI_rec |
5550 | | { 807, 3, 1, 4, 247, 0, 1, PPCImpOpBase + 131, 411, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #807 = DSCRIQ_rec |
5551 | | { 806, 3, 1, 4, 247, 0, 0, PPCImpOpBase + 0, 411, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #806 = DSCRIQ |
5552 | | { 805, 3, 1, 4, 244, 0, 0, PPCImpOpBase + 0, 408, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #805 = DSCRI |
5553 | | { 804, 3, 1, 4, 244, 0, 1, PPCImpOpBase + 131, 408, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #804 = DSCLI_rec |
5554 | | { 803, 3, 1, 4, 247, 0, 1, PPCImpOpBase + 131, 411, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #803 = DSCLIQ_rec |
5555 | | { 802, 3, 1, 4, 247, 0, 0, PPCImpOpBase + 0, 411, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #802 = DSCLIQ |
5556 | | { 801, 3, 1, 4, 244, 0, 0, PPCImpOpBase + 0, 408, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #801 = DSCLI |
5557 | | { 800, 2, 1, 4, 252, 0, 1, PPCImpOpBase + 131, 337, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #800 = DRSP_rec |
5558 | | { 799, 2, 1, 4, 252, 0, 0, PPCImpOpBase + 0, 337, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #799 = DRSP |
5559 | | { 798, 4, 1, 4, 244, 0, 1, PPCImpOpBase + 131, 386, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #798 = DRRND_rec |
5560 | | { 797, 4, 1, 4, 247, 0, 1, PPCImpOpBase + 131, 404, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #797 = DRRNDQ_rec |
5561 | | { 796, 4, 1, 4, 247, 0, 0, PPCImpOpBase + 0, 404, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #796 = DRRNDQ |
5562 | | { 795, 4, 1, 4, 244, 0, 0, PPCImpOpBase + 0, 386, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #795 = DRRND |
5563 | | { 794, 4, 1, 4, 244, 0, 1, PPCImpOpBase + 131, 390, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #794 = DRINTX_rec |
5564 | | { 793, 4, 1, 4, 247, 0, 1, PPCImpOpBase + 131, 394, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #793 = DRINTXQ_rec |
5565 | | { 792, 4, 1, 4, 247, 0, 0, PPCImpOpBase + 0, 394, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #792 = DRINTXQ |
5566 | | { 791, 4, 1, 4, 244, 0, 0, PPCImpOpBase + 0, 390, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #791 = DRINTX |
5567 | | { 790, 4, 1, 4, 244, 0, 1, PPCImpOpBase + 131, 390, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #790 = DRINTN_rec |
5568 | | { 789, 4, 1, 4, 247, 0, 1, PPCImpOpBase + 131, 394, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #789 = DRINTNQ_rec |
5569 | | { 788, 4, 1, 4, 247, 0, 0, PPCImpOpBase + 0, 394, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #788 = DRINTNQ |
5570 | | { 787, 4, 1, 4, 244, 0, 0, PPCImpOpBase + 0, 390, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #787 = DRINTN |
5571 | | { 786, 2, 1, 4, 12, 0, 1, PPCImpOpBase + 131, 402, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #786 = DRDPQ_rec |
5572 | | { 785, 2, 1, 4, 12, 0, 0, PPCImpOpBase + 0, 402, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #785 = DRDPQ |
5573 | | { 784, 4, 1, 4, 244, 0, 1, PPCImpOpBase + 131, 386, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #784 = DQUA_rec |
5574 | | { 783, 4, 1, 4, 251, 0, 1, PPCImpOpBase + 131, 398, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #783 = DQUAQ_rec |
5575 | | { 782, 4, 1, 4, 251, 0, 0, PPCImpOpBase + 0, 398, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #782 = DQUAQ |
5576 | | { 781, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 390, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #781 = DQUAI_rec |
5577 | | { 780, 4, 1, 4, 247, 0, 1, PPCImpOpBase + 0, 394, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #780 = DQUAIQ_rec |
5578 | | { 779, 4, 1, 4, 247, 0, 0, PPCImpOpBase + 0, 394, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #779 = DQUAIQ |
5579 | | { 778, 4, 1, 4, 244, 0, 0, PPCImpOpBase + 0, 390, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #778 = DQUAI |
5580 | | { 777, 4, 1, 4, 244, 0, 0, PPCImpOpBase + 0, 386, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #777 = DQUA |
5581 | | { 776, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 383, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #776 = DMXXINSTFDMR512_HI |
5582 | | { 775, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 380, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #775 = DMXXINSTFDMR512 |
5583 | | { 774, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 377, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #774 = DMXXINSTFDMR256 |
5584 | | { 773, 3, 2, 4, 0, 0, 0, PPCImpOpBase + 0, 374, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #773 = DMXXEXTFDMR512_HI |
5585 | | { 772, 3, 2, 4, 0, 0, 0, PPCImpOpBase + 0, 371, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #772 = DMXXEXTFDMR512 |
5586 | | { 771, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 368, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #771 = DMXXEXTFDMR256 |
5587 | | { 770, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 365, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #770 = DMXOR |
5588 | | { 769, 3, 1, 4, 255, 0, 1, PPCImpOpBase + 131, 328, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #769 = DMUL_rec |
5589 | | { 768, 3, 1, 4, 256, 0, 1, PPCImpOpBase + 131, 331, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #768 = DMULQ_rec |
5590 | | { 767, 3, 1, 4, 256, 0, 0, PPCImpOpBase + 0, 331, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #767 = DMULQ |
5591 | | { 766, 3, 1, 4, 255, 0, 0, PPCImpOpBase + 0, 328, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #766 = DMUL |
5592 | | { 765, 1, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 364, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #765 = DMSETDMRZ |
5593 | | { 764, 2, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 362, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #764 = DMMR |
5594 | | { 763, 3, 1, 4, 389, 0, 1, PPCImpOpBase + 0, 208, 0, 0xdULL }, // Inst #763 = DIVW_rec |
5595 | | { 762, 3, 1, 4, 389, 0, 1, PPCImpOpBase + 0, 208, 0, 0xdULL }, // Inst #762 = DIVWU_rec |
5596 | | { 761, 3, 1, 4, 389, 0, 2, PPCImpOpBase + 3, 208, 0, 0x8ULL }, // Inst #761 = DIVWUO_rec |
5597 | | { 760, 3, 1, 4, 383, 0, 1, PPCImpOpBase + 2, 208, 0, 0x8ULL }, // Inst #760 = DIVWUO |
5598 | | { 759, 3, 1, 4, 209, 0, 0, PPCImpOpBase + 0, 208, 0, 0x8ULL }, // Inst #759 = DIVWU |
5599 | | { 758, 3, 1, 4, 389, 0, 2, PPCImpOpBase + 3, 208, 0, 0x8ULL }, // Inst #758 = DIVWO_rec |
5600 | | { 757, 3, 1, 4, 383, 0, 1, PPCImpOpBase + 2, 208, 0, 0x8ULL }, // Inst #757 = DIVWO |
5601 | | { 756, 3, 1, 4, 154, 0, 1, PPCImpOpBase + 0, 208, 0, 0xdULL }, // Inst #756 = DIVWE_rec |
5602 | | { 755, 3, 1, 4, 154, 0, 1, PPCImpOpBase + 0, 208, 0, 0xdULL }, // Inst #755 = DIVWEU_rec |
5603 | | { 754, 3, 1, 4, 154, 0, 2, PPCImpOpBase + 3, 208, 0, 0x8ULL }, // Inst #754 = DIVWEUO_rec |
5604 | | { 753, 3, 1, 4, 385, 0, 1, PPCImpOpBase + 2, 208, 0, 0x8ULL }, // Inst #753 = DIVWEUO |
5605 | | { 752, 3, 1, 4, 211, 0, 0, PPCImpOpBase + 0, 208, 0, 0x8ULL }, // Inst #752 = DIVWEU |
5606 | | { 751, 3, 1, 4, 154, 0, 2, PPCImpOpBase + 3, 208, 0, 0x8ULL }, // Inst #751 = DIVWEO_rec |
5607 | | { 750, 3, 1, 4, 385, 0, 1, PPCImpOpBase + 2, 208, 0, 0x8ULL }, // Inst #750 = DIVWEO |
5608 | | { 749, 3, 1, 4, 211, 0, 0, PPCImpOpBase + 0, 208, 0, 0x8ULL }, // Inst #749 = DIVWE |
5609 | | { 748, 3, 1, 4, 209, 0, 0, PPCImpOpBase + 0, 208, 0, 0x8ULL }, // Inst #748 = DIVW |
5610 | | { 747, 3, 1, 4, 155, 0, 1, PPCImpOpBase + 0, 214, 0, 0xdULL }, // Inst #747 = DIVD_rec |
5611 | | { 746, 3, 1, 4, 155, 0, 1, PPCImpOpBase + 0, 214, 0, 0xdULL }, // Inst #746 = DIVDU_rec |
5612 | | { 745, 3, 1, 4, 155, 0, 2, PPCImpOpBase + 3, 214, 0, 0x8ULL }, // Inst #745 = DIVDUO_rec |
5613 | | { 744, 3, 1, 4, 386, 0, 1, PPCImpOpBase + 2, 214, 0, 0x8ULL }, // Inst #744 = DIVDUO |
5614 | | { 743, 3, 1, 4, 210, 0, 0, PPCImpOpBase + 0, 214, 0, 0x8ULL }, // Inst #743 = DIVDU |
5615 | | { 742, 3, 1, 4, 155, 0, 2, PPCImpOpBase + 3, 214, 0, 0x8ULL }, // Inst #742 = DIVDO_rec |
5616 | | { 741, 3, 1, 4, 386, 0, 1, PPCImpOpBase + 2, 214, 0, 0x8ULL }, // Inst #741 = DIVDO |
5617 | | { 740, 3, 1, 4, 153, 0, 1, PPCImpOpBase + 0, 214, 0, 0xdULL }, // Inst #740 = DIVDE_rec |
5618 | | { 739, 3, 1, 4, 153, 0, 1, PPCImpOpBase + 0, 214, 0, 0xdULL }, // Inst #739 = DIVDEU_rec |
5619 | | { 738, 3, 1, 4, 153, 0, 2, PPCImpOpBase + 3, 214, 0, 0x8ULL }, // Inst #738 = DIVDEUO_rec |
5620 | | { 737, 3, 1, 4, 388, 0, 1, PPCImpOpBase + 2, 214, 0, 0x8ULL }, // Inst #737 = DIVDEUO |
5621 | | { 736, 3, 1, 4, 388, 0, 0, PPCImpOpBase + 0, 214, 0, 0x8ULL }, // Inst #736 = DIVDEU |
5622 | | { 735, 3, 1, 4, 153, 0, 2, PPCImpOpBase + 3, 214, 0, 0x8ULL }, // Inst #735 = DIVDEO_rec |
5623 | | { 734, 3, 1, 4, 388, 0, 1, PPCImpOpBase + 2, 214, 0, 0x8ULL }, // Inst #734 = DIVDEO |
5624 | | { 733, 3, 1, 4, 388, 0, 0, PPCImpOpBase + 0, 214, 0, 0x8ULL }, // Inst #733 = DIVDE |
5625 | | { 732, 3, 1, 4, 210, 0, 0, PPCImpOpBase + 0, 214, 0, 0x8ULL }, // Inst #732 = DIVD |
5626 | | { 731, 3, 1, 4, 244, 0, 1, PPCImpOpBase + 131, 328, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #731 = DIEX_rec |
5627 | | { 730, 3, 1, 4, 247, 0, 1, PPCImpOpBase + 131, 359, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #730 = DIEXQ_rec |
5628 | | { 729, 3, 1, 4, 247, 0, 0, PPCImpOpBase + 0, 359, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #729 = DIEXQ |
5629 | | { 728, 3, 1, 4, 244, 0, 0, PPCImpOpBase + 0, 328, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #728 = DIEX |
5630 | | { 727, 3, 1, 4, 244, 0, 1, PPCImpOpBase + 131, 353, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #727 = DENBCD_rec |
5631 | | { 726, 3, 1, 4, 247, 0, 1, PPCImpOpBase + 131, 356, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #726 = DENBCDQ_rec |
5632 | | { 725, 3, 1, 4, 247, 0, 0, PPCImpOpBase + 0, 356, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #725 = DENBCDQ |
5633 | | { 724, 3, 1, 4, 244, 0, 0, PPCImpOpBase + 0, 353, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #724 = DENBCD |
5634 | | { 723, 3, 1, 4, 257, 0, 1, PPCImpOpBase + 131, 328, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #723 = DDIV_rec |
5635 | | { 722, 3, 1, 4, 258, 0, 1, PPCImpOpBase + 131, 331, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #722 = DDIVQ_rec |
5636 | | { 721, 3, 1, 4, 258, 0, 0, PPCImpOpBase + 0, 331, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #721 = DDIVQ |
5637 | | { 720, 3, 1, 4, 257, 0, 0, PPCImpOpBase + 0, 328, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #720 = DDIV |
5638 | | { 719, 3, 1, 4, 244, 0, 1, PPCImpOpBase + 131, 353, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #719 = DDEDPD_rec |
5639 | | { 718, 3, 1, 4, 247, 0, 1, PPCImpOpBase + 131, 356, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #718 = DDEDPDQ_rec |
5640 | | { 717, 3, 1, 4, 247, 0, 0, PPCImpOpBase + 0, 356, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #717 = DDEDPDQ |
5641 | | { 716, 3, 1, 4, 244, 0, 0, PPCImpOpBase + 0, 353, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #716 = DDEDPD |
5642 | | { 715, 2, 1, 4, 249, 0, 1, PPCImpOpBase + 131, 339, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #715 = DCTQPQ_rec |
5643 | | { 714, 2, 1, 4, 249, 0, 0, PPCImpOpBase + 0, 339, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #714 = DCTQPQ |
5644 | | { 713, 2, 1, 4, 252, 0, 1, PPCImpOpBase + 131, 337, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #713 = DCTFIX_rec |
5645 | | { 712, 2, 1, 4, 12, 0, 1, PPCImpOpBase + 131, 349, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #712 = DCTFIXQ_rec |
5646 | | { 711, 2, 1, 4, 12, 0, 0, PPCImpOpBase + 0, 351, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #711 = DCTFIXQQ |
5647 | | { 710, 2, 1, 4, 12, 0, 0, PPCImpOpBase + 0, 349, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #710 = DCTFIXQ |
5648 | | { 709, 2, 1, 4, 252, 0, 0, PPCImpOpBase + 0, 337, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #709 = DCTFIX |
5649 | | { 708, 2, 1, 4, 245, 0, 1, PPCImpOpBase + 131, 337, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #708 = DCTDP_rec |
5650 | | { 707, 2, 1, 4, 245, 0, 0, PPCImpOpBase + 0, 337, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #707 = DCTDP |
5651 | | { 706, 3, 1, 4, 248, 0, 0, PPCImpOpBase + 0, 346, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #706 = DCMPUQ |
5652 | | { 705, 3, 1, 4, 243, 0, 0, PPCImpOpBase + 0, 343, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #705 = DCMPU |
5653 | | { 704, 3, 1, 4, 248, 0, 0, PPCImpOpBase + 0, 346, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #704 = DCMPOQ |
5654 | | { 703, 3, 1, 4, 243, 0, 0, PPCImpOpBase + 0, 343, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #703 = DCMPO |
5655 | | { 702, 2, 1, 4, 253, 0, 1, PPCImpOpBase + 131, 337, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #702 = DCFFIX_rec |
5656 | | { 701, 2, 1, 4, 254, 0, 1, PPCImpOpBase + 131, 339, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #701 = DCFFIXQ_rec |
5657 | | { 700, 2, 1, 4, 12, 0, 0, PPCImpOpBase + 0, 341, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #700 = DCFFIXQQ |
5658 | | { 699, 2, 1, 4, 254, 0, 0, PPCImpOpBase + 0, 339, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #699 = DCFFIXQ |
5659 | | { 698, 2, 1, 4, 253, 0, 0, PPCImpOpBase + 0, 337, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #698 = DCFFIX |
5660 | | { 697, 2, 0, 4, 618, 0, 0, PPCImpOpBase + 0, 251, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #697 = DCCCI |
5661 | | { 696, 2, 0, 4, 336, 0, 0, PPCImpOpBase + 0, 175, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #696 = DCBZLEP |
5662 | | { 695, 2, 0, 4, 617, 0, 0, PPCImpOpBase + 0, 175, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL }, // Inst #695 = DCBZL |
5663 | | { 694, 2, 0, 4, 336, 0, 0, PPCImpOpBase + 0, 175, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #694 = DCBZEP |
5664 | | { 693, 2, 0, 4, 605, 0, 0, PPCImpOpBase + 0, 175, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL }, // Inst #693 = DCBZ |
5665 | | { 692, 3, 0, 4, 336, 0, 0, PPCImpOpBase + 0, 177, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #692 = DCBTSTEP |
5666 | | { 691, 3, 0, 4, 548, 0, 0, PPCImpOpBase + 0, 334, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x2ULL }, // Inst #691 = DCBTST |
5667 | | { 690, 3, 0, 4, 336, 0, 0, PPCImpOpBase + 0, 177, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #690 = DCBTEP |
5668 | | { 689, 3, 0, 4, 548, 0, 0, PPCImpOpBase + 0, 334, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x2ULL }, // Inst #689 = DCBT |
5669 | | { 688, 2, 0, 4, 336, 0, 0, PPCImpOpBase + 0, 175, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #688 = DCBSTEP |
5670 | | { 687, 2, 0, 4, 605, 0, 0, PPCImpOpBase + 0, 175, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL }, // Inst #687 = DCBST |
5671 | | { 686, 2, 0, 4, 426, 0, 0, PPCImpOpBase + 0, 175, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL }, // Inst #686 = DCBI |
5672 | | { 685, 2, 0, 4, 336, 0, 0, PPCImpOpBase + 0, 175, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #685 = DCBFEP |
5673 | | { 684, 3, 0, 4, 605, 0, 0, PPCImpOpBase + 0, 334, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x2ULL }, // Inst #684 = DCBF |
5674 | | { 683, 2, 0, 4, 426, 0, 0, PPCImpOpBase + 0, 175, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL }, // Inst #683 = DCBA |
5675 | | { 682, 2, 1, 4, 342, 0, 0, PPCImpOpBase + 0, 203, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL }, // Inst #682 = DARN |
5676 | | { 681, 3, 1, 4, 245, 0, 1, PPCImpOpBase + 131, 328, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #681 = DADD_rec |
5677 | | { 680, 3, 1, 4, 250, 0, 1, PPCImpOpBase + 131, 331, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #680 = DADDQ_rec |
5678 | | { 679, 3, 1, 4, 250, 0, 0, PPCImpOpBase + 0, 331, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #679 = DADDQ |
5679 | | { 678, 3, 1, 4, 245, 0, 0, PPCImpOpBase + 0, 328, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #678 = DADD |
5680 | | { 677, 3, 0, 4, 446, 0, 0, PPCImpOpBase + 0, 280, 0|(1ULL<<MCID::Branch), 0x38ULL }, // Inst #677 = CTRL_DEP |
5681 | | { 676, 3, 1, 4, 304, 0, 0, PPCImpOpBase + 0, 323, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #676 = CRXOR |
5682 | | { 675, 1, 1, 4, 525, 0, 0, PPCImpOpBase + 0, 288, 0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #675 = CRUNSET |
5683 | | { 674, 1, 1, 4, 525, 0, 0, PPCImpOpBase + 0, 288, 0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #674 = CRSET |
5684 | | { 673, 3, 1, 4, 525, 0, 0, PPCImpOpBase + 0, 323, 0, 0x0ULL }, // Inst #673 = CRORC |
5685 | | { 672, 3, 1, 4, 525, 0, 0, PPCImpOpBase + 0, 323, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #672 = CROR |
5686 | | { 671, 2, 1, 4, 107, 0, 0, PPCImpOpBase + 0, 326, 0, 0x0ULL }, // Inst #671 = CRNOT |
5687 | | { 670, 3, 1, 4, 525, 0, 0, PPCImpOpBase + 0, 323, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #670 = CRNOR |
5688 | | { 669, 3, 1, 4, 525, 0, 0, PPCImpOpBase + 0, 323, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #669 = CRNAND |
5689 | | { 668, 3, 1, 4, 525, 0, 0, PPCImpOpBase + 0, 323, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #668 = CREQV |
5690 | | { 667, 3, 1, 4, 525, 0, 0, PPCImpOpBase + 0, 323, 0, 0x0ULL }, // Inst #667 = CRANDC |
5691 | | { 666, 3, 1, 4, 525, 0, 0, PPCImpOpBase + 0, 323, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #666 = CRAND |
5692 | | { 665, 0, 0, 4, 525, 0, 1, PPCImpOpBase + 130, 1, 0, 0x0ULL }, // Inst #665 = CR6UNSET |
5693 | | { 664, 0, 0, 4, 525, 0, 1, PPCImpOpBase + 130, 1, 0, 0x0ULL }, // Inst #664 = CR6SET |
5694 | | { 663, 3, 0, 4, 358, 0, 1, PPCImpOpBase + 0, 172, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #663 = CP_PASTE_rec |
5695 | | { 662, 3, 0, 4, 358, 0, 0, PPCImpOpBase + 0, 169, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #662 = CP_PASTE8_rec |
5696 | | { 661, 3, 0, 4, 337, 0, 0, PPCImpOpBase + 0, 169, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #661 = CP_COPY8 |
5697 | | { 660, 3, 0, 4, 337, 0, 0, PPCImpOpBase + 0, 172, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #660 = CP_COPY |
5698 | | { 659, 0, 0, 4, 341, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #659 = CP_ABORT |
5699 | | { 658, 2, 1, 4, 279, 0, 1, PPCImpOpBase + 0, 251, 0, 0x208ULL }, // Inst #658 = CNTTZW_rec |
5700 | | { 657, 2, 1, 4, 279, 0, 1, PPCImpOpBase + 0, 253, 0, 0x308ULL }, // Inst #657 = CNTTZW8_rec |
5701 | | { 656, 2, 1, 4, 279, 0, 0, PPCImpOpBase + 0, 253, 0, 0x308ULL }, // Inst #656 = CNTTZW8 |
5702 | | { 655, 2, 1, 4, 279, 0, 0, PPCImpOpBase + 0, 251, 0, 0x208ULL }, // Inst #655 = CNTTZW |
5703 | | { 654, 2, 1, 4, 279, 0, 1, PPCImpOpBase + 0, 253, 0, 0x308ULL }, // Inst #654 = CNTTZD_rec |
5704 | | { 653, 3, 1, 4, 148, 0, 0, PPCImpOpBase + 0, 214, 0, 0x0ULL }, // Inst #653 = CNTTZDM |
5705 | | { 652, 2, 1, 4, 279, 0, 0, PPCImpOpBase + 0, 253, 0, 0x308ULL }, // Inst #652 = CNTTZD |
5706 | | { 651, 2, 1, 4, 205, 0, 1, PPCImpOpBase + 0, 251, 0, 0x208ULL }, // Inst #651 = CNTLZW_rec |
5707 | | { 650, 2, 1, 4, 205, 0, 1, PPCImpOpBase + 0, 253, 0, 0x308ULL }, // Inst #650 = CNTLZW8_rec |
5708 | | { 649, 2, 1, 4, 205, 0, 0, PPCImpOpBase + 0, 253, 0, 0x308ULL }, // Inst #649 = CNTLZW8 |
5709 | | { 648, 2, 1, 4, 205, 0, 0, PPCImpOpBase + 0, 251, 0, 0x208ULL }, // Inst #648 = CNTLZW |
5710 | | { 647, 2, 1, 4, 205, 0, 1, PPCImpOpBase + 0, 253, 0, 0x308ULL }, // Inst #647 = CNTLZD_rec |
5711 | | { 646, 3, 1, 4, 148, 0, 0, PPCImpOpBase + 0, 214, 0, 0x0ULL }, // Inst #646 = CNTLZDM |
5712 | | { 645, 2, 1, 4, 205, 0, 0, PPCImpOpBase + 0, 253, 0, 0x308ULL }, // Inst #645 = CNTLZD |
5713 | | { 644, 3, 1, 4, 505, 0, 0, PPCImpOpBase + 0, 312, 0|(1ULL<<MCID::Compare), 0x8ULL }, // Inst #644 = CMPWI |
5714 | | { 643, 3, 1, 4, 140, 0, 0, PPCImpOpBase + 0, 309, 0|(1ULL<<MCID::Compare), 0x8ULL }, // Inst #643 = CMPW |
5715 | | { 642, 4, 1, 4, 274, 0, 0, PPCImpOpBase + 0, 319, 0|(1ULL<<MCID::Compare), 0x8ULL }, // Inst #642 = CMPRB8 |
5716 | | { 641, 4, 1, 4, 274, 0, 0, PPCImpOpBase + 0, 315, 0|(1ULL<<MCID::Compare), 0x8ULL }, // Inst #641 = CMPRB |
5717 | | { 640, 3, 1, 4, 505, 0, 0, PPCImpOpBase + 0, 312, 0|(1ULL<<MCID::Compare), 0x8ULL }, // Inst #640 = CMPLWI |
5718 | | { 639, 3, 1, 4, 140, 0, 0, PPCImpOpBase + 0, 309, 0|(1ULL<<MCID::Compare), 0x8ULL }, // Inst #639 = CMPLW |
5719 | | { 638, 3, 1, 4, 505, 0, 0, PPCImpOpBase + 0, 306, 0|(1ULL<<MCID::Compare), 0x8ULL }, // Inst #638 = CMPLDI |
5720 | | { 637, 3, 1, 4, 140, 0, 0, PPCImpOpBase + 0, 303, 0|(1ULL<<MCID::Compare), 0x8ULL }, // Inst #637 = CMPLD |
5721 | | { 636, 3, 1, 4, 274, 0, 0, PPCImpOpBase + 0, 303, 0|(1ULL<<MCID::Compare), 0x8ULL }, // Inst #636 = CMPEQB |
5722 | | { 635, 3, 1, 4, 505, 0, 0, PPCImpOpBase + 0, 306, 0|(1ULL<<MCID::Compare), 0x8ULL }, // Inst #635 = CMPDI |
5723 | | { 634, 3, 1, 4, 140, 0, 0, PPCImpOpBase + 0, 303, 0|(1ULL<<MCID::Compare), 0x8ULL }, // Inst #634 = CMPD |
5724 | | { 633, 3, 1, 4, 524, 0, 0, PPCImpOpBase + 0, 214, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #633 = CMPB8 |
5725 | | { 632, 3, 1, 4, 524, 0, 0, PPCImpOpBase + 0, 208, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #632 = CMPB |
5726 | | { 631, 0, 0, 4, 619, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL }, // Inst #631 = CLRBHRB |
5727 | | { 630, 3, 1, 4, 449, 0, 0, PPCImpOpBase + 0, 214, 0, 0x0ULL }, // Inst #630 = CFUGED |
5728 | | { 629, 2, 1, 4, 469, 0, 0, PPCImpOpBase + 0, 253, 0, 0x8ULL }, // Inst #629 = CDTBCD8 |
5729 | | { 628, 2, 1, 4, 469, 0, 0, PPCImpOpBase + 0, 251, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #628 = CDTBCD |
5730 | | { 627, 2, 1, 4, 469, 0, 0, PPCImpOpBase + 0, 253, 0, 0x8ULL }, // Inst #627 = CBCDTD8 |
5731 | | { 626, 2, 1, 4, 469, 0, 0, PPCImpOpBase + 0, 251, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #626 = CBCDTD |
5732 | | { 625, 2, 1, 4, 577, 0, 0, PPCImpOpBase + 0, 253, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #625 = BRW8 |
5733 | | { 624, 2, 1, 4, 577, 0, 0, PPCImpOpBase + 0, 251, 0, 0x0ULL }, // Inst #624 = BRW |
5734 | | { 623, 3, 1, 4, 405, 0, 0, PPCImpOpBase + 0, 208, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #623 = BRINC |
5735 | | { 622, 2, 1, 4, 577, 0, 0, PPCImpOpBase + 0, 253, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #622 = BRH8 |
5736 | | { 621, 2, 1, 4, 577, 0, 0, PPCImpOpBase + 0, 251, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #621 = BRH |
5737 | | { 620, 2, 1, 4, 577, 0, 0, PPCImpOpBase + 0, 253, 0, 0x0ULL }, // Inst #620 = BRD |
5738 | | { 619, 3, 1, 4, 281, 0, 0, PPCImpOpBase + 0, 214, 0, 0x8ULL }, // Inst #619 = BPERMD |
5739 | | { 618, 2, 0, 4, 242, 1, 1, PPCImpOpBase + 71, 13, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #618 = BL_TLS |
5740 | | { 617, 1, 0, 4, 242, 1, 2, PPCImpOpBase + 125, 277, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #617 = BL_RM |
5741 | | { 616, 1, 0, 8, 242, 1, 2, PPCImpOpBase + 125, 277, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #616 = BL_NOP_RM |
5742 | | { 615, 1, 0, 8, 242, 1, 1, PPCImpOpBase + 71, 277, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #615 = BL_NOP |
5743 | | { 614, 0, 0, 4, 445, 2, 1, PPCImpOpBase + 75, 1, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #614 = BLRL |
5744 | | { 613, 0, 0, 4, 445, 2, 0, PPCImpOpBase + 128, 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #613 = BLR8 |
5745 | | { 612, 0, 0, 4, 445, 2, 0, PPCImpOpBase + 73, 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #612 = BLR |
5746 | | { 611, 1, 0, 4, 242, 1, 2, PPCImpOpBase + 125, 0, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #611 = BLA_RM |
5747 | | { 610, 1, 0, 4, 242, 1, 2, PPCImpOpBase + 122, 0, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #610 = BLA8_RM |
5748 | | { 609, 1, 0, 8, 242, 1, 2, PPCImpOpBase + 122, 0, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #609 = BLA8_NOP_RM |
5749 | | { 608, 1, 0, 8, 242, 1, 1, PPCImpOpBase + 120, 0, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #608 = BLA8_NOP |
5750 | | { 607, 1, 0, 4, 242, 1, 1, PPCImpOpBase + 120, 0, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #607 = BLA8 |
5751 | | { 606, 1, 0, 4, 242, 1, 1, PPCImpOpBase + 71, 0, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #606 = BLA |
5752 | | { 605, 2, 0, 4, 242, 1, 1, PPCImpOpBase + 120, 13, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #605 = BL8_TLS_ |
5753 | | { 604, 2, 0, 4, 242, 1, 1, PPCImpOpBase + 120, 13, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #604 = BL8_TLS |
5754 | | { 603, 1, 0, 4, 242, 1, 2, PPCImpOpBase + 122, 277, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #603 = BL8_RM |
5755 | | { 602, 2, 0, 4, 101, 1, 1, PPCImpOpBase + 120, 13, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #602 = BL8_NOTOC_TLS |
5756 | | { 601, 1, 0, 4, 101, 1, 2, PPCImpOpBase + 122, 277, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #601 = BL8_NOTOC_RM |
5757 | | { 600, 1, 0, 4, 101, 1, 1, PPCImpOpBase + 120, 277, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #600 = BL8_NOTOC |
5758 | | { 599, 2, 0, 8, 242, 1, 1, PPCImpOpBase + 120, 13, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #599 = BL8_NOP_TLS |
5759 | | { 598, 1, 0, 8, 242, 1, 2, PPCImpOpBase + 122, 277, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #598 = BL8_NOP_RM |
5760 | | { 597, 1, 0, 8, 242, 1, 1, PPCImpOpBase + 120, 277, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #597 = BL8_NOP |
5761 | | { 596, 1, 0, 4, 242, 1, 1, PPCImpOpBase + 120, 277, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #596 = BL8 |
5762 | | { 595, 1, 0, 4, 242, 1, 1, PPCImpOpBase + 71, 277, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #595 = BL |
5763 | | { 594, 1, 0, 4, 102, 1, 1, PPCImpOpBase + 105, 277, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #594 = BDZp |
5764 | | { 593, 1, 0, 4, 102, 1, 1, PPCImpOpBase + 105, 277, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #593 = BDZm |
5765 | | { 592, 1, 0, 4, 102, 2, 1, PPCImpOpBase + 109, 277, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #592 = BDZLp |
5766 | | { 591, 1, 0, 4, 102, 2, 1, PPCImpOpBase + 109, 277, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #591 = BDZLm |
5767 | | { 590, 0, 0, 4, 445, 3, 1, PPCImpOpBase + 112, 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #590 = BDZLRp |
5768 | | { 589, 0, 0, 4, 445, 3, 1, PPCImpOpBase + 112, 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #589 = BDZLRm |
5769 | | { 588, 0, 0, 4, 445, 3, 1, PPCImpOpBase + 112, 1, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #588 = BDZLRLp |
5770 | | { 587, 0, 0, 4, 445, 3, 1, PPCImpOpBase + 112, 1, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #587 = BDZLRLm |
5771 | | { 586, 0, 0, 4, 445, 3, 1, PPCImpOpBase + 112, 1, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #586 = BDZLRL |
5772 | | { 585, 0, 0, 4, 445, 3, 1, PPCImpOpBase + 116, 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #585 = BDZLR8 |
5773 | | { 584, 0, 0, 4, 445, 3, 1, PPCImpOpBase + 112, 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #584 = BDZLR |
5774 | | { 583, 1, 0, 4, 102, 2, 1, PPCImpOpBase + 109, 0, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #583 = BDZLAp |
5775 | | { 582, 1, 0, 4, 102, 2, 1, PPCImpOpBase + 109, 0, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #582 = BDZLAm |
5776 | | { 581, 1, 0, 4, 102, 2, 1, PPCImpOpBase + 109, 0, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #581 = BDZLA |
5777 | | { 580, 1, 0, 4, 102, 2, 1, PPCImpOpBase + 109, 277, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #580 = BDZL |
5778 | | { 579, 1, 0, 4, 102, 1, 1, PPCImpOpBase + 105, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #579 = BDZAp |
5779 | | { 578, 1, 0, 4, 102, 1, 1, PPCImpOpBase + 105, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #578 = BDZAm |
5780 | | { 577, 1, 0, 4, 102, 1, 1, PPCImpOpBase + 105, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #577 = BDZA |
5781 | | { 576, 1, 0, 4, 102, 1, 1, PPCImpOpBase + 107, 277, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #576 = BDZ8 |
5782 | | { 575, 1, 0, 4, 102, 1, 1, PPCImpOpBase + 105, 277, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #575 = BDZ |
5783 | | { 574, 1, 0, 4, 102, 1, 1, PPCImpOpBase + 105, 277, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #574 = BDNZp |
5784 | | { 573, 1, 0, 4, 102, 1, 1, PPCImpOpBase + 105, 277, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #573 = BDNZm |
5785 | | { 572, 1, 0, 4, 102, 2, 1, PPCImpOpBase + 109, 277, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #572 = BDNZLp |
5786 | | { 571, 1, 0, 4, 102, 2, 1, PPCImpOpBase + 109, 277, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #571 = BDNZLm |
5787 | | { 570, 0, 0, 4, 445, 3, 1, PPCImpOpBase + 112, 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #570 = BDNZLRp |
5788 | | { 569, 0, 0, 4, 445, 3, 1, PPCImpOpBase + 112, 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #569 = BDNZLRm |
5789 | | { 568, 0, 0, 4, 445, 3, 1, PPCImpOpBase + 112, 1, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #568 = BDNZLRLp |
5790 | | { 567, 0, 0, 4, 445, 3, 1, PPCImpOpBase + 112, 1, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #567 = BDNZLRLm |
5791 | | { 566, 0, 0, 4, 445, 3, 1, PPCImpOpBase + 112, 1, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #566 = BDNZLRL |
5792 | | { 565, 0, 0, 4, 445, 3, 1, PPCImpOpBase + 116, 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #565 = BDNZLR8 |
5793 | | { 564, 0, 0, 4, 445, 3, 1, PPCImpOpBase + 112, 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #564 = BDNZLR |
5794 | | { 563, 1, 0, 4, 102, 2, 1, PPCImpOpBase + 109, 0, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #563 = BDNZLAp |
5795 | | { 562, 1, 0, 4, 102, 2, 1, PPCImpOpBase + 109, 0, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #562 = BDNZLAm |
5796 | | { 561, 1, 0, 4, 102, 2, 1, PPCImpOpBase + 109, 0, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #561 = BDNZLA |
5797 | | { 560, 1, 0, 4, 102, 2, 1, PPCImpOpBase + 109, 277, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #560 = BDNZL |
5798 | | { 559, 1, 0, 4, 102, 1, 1, PPCImpOpBase + 105, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #559 = BDNZAp |
5799 | | { 558, 1, 0, 4, 102, 1, 1, PPCImpOpBase + 105, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #558 = BDNZAm |
5800 | | { 557, 1, 0, 4, 102, 1, 1, PPCImpOpBase + 105, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #557 = BDNZA |
5801 | | { 556, 1, 0, 4, 102, 1, 1, PPCImpOpBase + 107, 277, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #556 = BDNZ8 |
5802 | | { 555, 1, 0, 4, 102, 1, 1, PPCImpOpBase + 105, 277, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #555 = BDNZ |
5803 | | { 554, 2, 0, 4, 102, 0, 0, PPCImpOpBase + 0, 278, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #554 = BCn |
5804 | | { 553, 0, 0, 4, 102, 2, 2, PPCImpOpBase + 101, 1, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::Predicable), 0x38ULL }, // Inst #553 = BCTRL_RM |
5805 | | { 552, 2, 0, 8, 102, 2, 3, PPCImpOpBase + 96, 301, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #552 = BCTRL_LWZinto_toc_RM |
5806 | | { 551, 2, 0, 8, 102, 2, 2, PPCImpOpBase + 92, 301, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #551 = BCTRL_LWZinto_toc |
5807 | | { 550, 0, 0, 4, 102, 2, 2, PPCImpOpBase + 88, 1, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::Predicable), 0x38ULL }, // Inst #550 = BCTRL8_RM |
5808 | | { 549, 2, 0, 8, 102, 2, 3, PPCImpOpBase + 83, 301, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #549 = BCTRL8_LDinto_toc_RM |
5809 | | { 548, 2, 0, 8, 102, 2, 2, PPCImpOpBase + 79, 301, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #548 = BCTRL8_LDinto_toc |
5810 | | { 547, 0, 0, 4, 102, 2, 1, PPCImpOpBase + 68, 1, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::Predicable), 0x38ULL }, // Inst #547 = BCTRL8 |
5811 | | { 546, 0, 0, 4, 102, 2, 1, PPCImpOpBase + 65, 1, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::Predicable), 0x38ULL }, // Inst #546 = BCTRL |
5812 | | { 545, 0, 0, 4, 102, 1, 0, PPCImpOpBase + 64, 1, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #545 = BCTR8 |
5813 | | { 544, 0, 0, 4, 102, 1, 0, PPCImpOpBase + 63, 1, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #544 = BCTR |
5814 | | { 543, 2, 0, 4, 102, 1, 1, PPCImpOpBase + 71, 278, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #543 = BCLn |
5815 | | { 542, 1, 0, 4, 102, 1, 1, PPCImpOpBase + 71, 277, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #542 = BCLalways |
5816 | | { 541, 1, 0, 4, 445, 2, 0, PPCImpOpBase + 73, 288, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #541 = BCLRn |
5817 | | { 540, 1, 0, 4, 445, 2, 1, PPCImpOpBase + 75, 288, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #540 = BCLRLn |
5818 | | { 539, 1, 0, 4, 445, 2, 1, PPCImpOpBase + 75, 288, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #539 = BCLRL |
5819 | | { 538, 1, 0, 4, 445, 2, 0, PPCImpOpBase + 73, 288, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #538 = BCLR |
5820 | | { 537, 2, 0, 4, 102, 1, 1, PPCImpOpBase + 71, 278, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #537 = BCL |
5821 | | { 536, 3, 1, 4, 465, 0, 1, PPCImpOpBase + 78, 296, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #536 = BCDUTRUNC_rec |
5822 | | { 535, 3, 1, 4, 465, 0, 1, PPCImpOpBase + 78, 296, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #535 = BCDUS_rec |
5823 | | { 534, 4, 1, 4, 465, 0, 1, PPCImpOpBase + 78, 289, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #534 = BCDTRUNC_rec |
5824 | | { 533, 4, 1, 4, 465, 0, 1, PPCImpOpBase + 78, 289, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #533 = BCDS_rec |
5825 | | { 532, 4, 1, 4, 246, 0, 1, PPCImpOpBase + 78, 289, 0, 0x0ULL }, // Inst #532 = BCDSUB_rec |
5826 | | { 531, 4, 1, 4, 327, 0, 1, PPCImpOpBase + 78, 289, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #531 = BCDSR_rec |
5827 | | { 530, 3, 1, 4, 463, 0, 1, PPCImpOpBase + 78, 293, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #530 = BCDSETSGN_rec |
5828 | | { 529, 3, 1, 4, 463, 0, 1, PPCImpOpBase + 78, 293, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #529 = BCDCTZ_rec |
5829 | | { 528, 2, 1, 4, 328, 0, 1, PPCImpOpBase + 78, 299, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #528 = BCDCTSQ_rec |
5830 | | { 527, 2, 1, 4, 463, 0, 1, PPCImpOpBase + 78, 299, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #527 = BCDCTN_rec |
5831 | | { 526, 3, 1, 4, 465, 0, 1, PPCImpOpBase + 78, 296, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #526 = BCDCPSGN_rec |
5832 | | { 525, 3, 1, 4, 463, 0, 1, PPCImpOpBase + 78, 293, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #525 = BCDCFZ_rec |
5833 | | { 524, 3, 1, 4, 330, 0, 1, PPCImpOpBase + 78, 293, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #524 = BCDCFSQ_rec |
5834 | | { 523, 3, 1, 4, 463, 0, 1, PPCImpOpBase + 78, 293, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #523 = BCDCFN_rec |
5835 | | { 522, 4, 1, 4, 246, 0, 1, PPCImpOpBase + 78, 289, 0, 0x0ULL }, // Inst #522 = BCDADD_rec |
5836 | | { 521, 1, 0, 4, 445, 1, 0, PPCImpOpBase + 63, 288, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #521 = BCCTRn |
5837 | | { 520, 1, 0, 4, 445, 2, 1, PPCImpOpBase + 65, 288, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #520 = BCCTRLn |
5838 | | { 519, 1, 0, 4, 445, 2, 1, PPCImpOpBase + 68, 288, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #519 = BCCTRL8n |
5839 | | { 518, 1, 0, 4, 445, 2, 1, PPCImpOpBase + 68, 288, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #518 = BCCTRL8 |
5840 | | { 517, 1, 0, 4, 445, 2, 1, PPCImpOpBase + 65, 288, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #517 = BCCTRL |
5841 | | { 516, 1, 0, 4, 445, 1, 0, PPCImpOpBase + 64, 288, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #516 = BCCTR8n |
5842 | | { 515, 1, 0, 4, 445, 1, 0, PPCImpOpBase + 64, 288, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #515 = BCCTR8 |
5843 | | { 514, 1, 0, 4, 445, 1, 0, PPCImpOpBase + 63, 288, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #514 = BCCTR |
5844 | | { 513, 2, 0, 4, 445, 2, 1, PPCImpOpBase + 75, 286, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #513 = BCCLRL |
5845 | | { 512, 2, 0, 4, 445, 2, 0, PPCImpOpBase + 73, 286, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #512 = BCCLR |
5846 | | { 511, 3, 0, 4, 445, 1, 1, PPCImpOpBase + 71, 283, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #511 = BCCLA |
5847 | | { 510, 3, 0, 4, 445, 1, 1, PPCImpOpBase + 71, 280, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #510 = BCCL |
5848 | | { 509, 2, 0, 4, 445, 2, 1, PPCImpOpBase + 68, 286, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #509 = BCCCTRL8 |
5849 | | { 508, 2, 0, 4, 445, 2, 1, PPCImpOpBase + 65, 286, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #508 = BCCCTRL |
5850 | | { 507, 2, 0, 4, 445, 1, 0, PPCImpOpBase + 64, 286, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #507 = BCCCTR8 |
5851 | | { 506, 2, 0, 4, 445, 1, 0, PPCImpOpBase + 63, 286, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #506 = BCCCTR |
5852 | | { 505, 3, 0, 4, 445, 0, 0, PPCImpOpBase + 0, 283, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #505 = BCCA |
5853 | | { 504, 3, 0, 4, 445, 0, 0, PPCImpOpBase + 0, 280, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #504 = BCC |
5854 | | { 503, 2, 0, 4, 102, 0, 0, PPCImpOpBase + 0, 278, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #503 = BC |
5855 | | { 502, 1, 0, 4, 242, 0, 0, PPCImpOpBase + 0, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #502 = BA |
5856 | | { 501, 1, 0, 4, 242, 0, 0, PPCImpOpBase + 0, 277, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #501 = B |
5857 | | { 500, 0, 0, 4, 616, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #500 = ATTN |
5858 | | { 499, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 269, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #499 = ATOMIC_SWAP_I8 |
5859 | | { 498, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #498 = ATOMIC_SWAP_I64 |
5860 | | { 497, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 269, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #497 = ATOMIC_SWAP_I32 |
5861 | | { 496, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 269, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #496 = ATOMIC_SWAP_I16 |
5862 | | { 495, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 269, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #495 = ATOMIC_LOAD_XOR_I8 |
5863 | | { 494, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #494 = ATOMIC_LOAD_XOR_I64 |
5864 | | { 493, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 269, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #493 = ATOMIC_LOAD_XOR_I32 |
5865 | | { 492, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 269, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #492 = ATOMIC_LOAD_XOR_I16 |
5866 | | { 491, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 269, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #491 = ATOMIC_LOAD_UMIN_I8 |
5867 | | { 490, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #490 = ATOMIC_LOAD_UMIN_I64 |
5868 | | { 489, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 269, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #489 = ATOMIC_LOAD_UMIN_I32 |
5869 | | { 488, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 269, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #488 = ATOMIC_LOAD_UMIN_I16 |
5870 | | { 487, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 269, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #487 = ATOMIC_LOAD_UMAX_I8 |
5871 | | { 486, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #486 = ATOMIC_LOAD_UMAX_I64 |
5872 | | { 485, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 269, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #485 = ATOMIC_LOAD_UMAX_I32 |
5873 | | { 484, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 269, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #484 = ATOMIC_LOAD_UMAX_I16 |
5874 | | { 483, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 269, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #483 = ATOMIC_LOAD_SUB_I8 |
5875 | | { 482, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #482 = ATOMIC_LOAD_SUB_I64 |
5876 | | { 481, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 269, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #481 = ATOMIC_LOAD_SUB_I32 |
5877 | | { 480, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 269, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #480 = ATOMIC_LOAD_SUB_I16 |
5878 | | { 479, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 269, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #479 = ATOMIC_LOAD_OR_I8 |
5879 | | { 478, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #478 = ATOMIC_LOAD_OR_I64 |
5880 | | { 477, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 269, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #477 = ATOMIC_LOAD_OR_I32 |
5881 | | { 476, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 269, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #476 = ATOMIC_LOAD_OR_I16 |
5882 | | { 475, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 269, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #475 = ATOMIC_LOAD_NAND_I8 |
5883 | | { 474, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #474 = ATOMIC_LOAD_NAND_I64 |
5884 | | { 473, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 269, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #473 = ATOMIC_LOAD_NAND_I32 |
5885 | | { 472, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 269, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #472 = ATOMIC_LOAD_NAND_I16 |
5886 | | { 471, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 269, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #471 = ATOMIC_LOAD_MIN_I8 |
5887 | | { 470, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #470 = ATOMIC_LOAD_MIN_I64 |
5888 | | { 469, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 269, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #469 = ATOMIC_LOAD_MIN_I32 |
5889 | | { 468, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 269, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #468 = ATOMIC_LOAD_MIN_I16 |
5890 | | { 467, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 269, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #467 = ATOMIC_LOAD_MAX_I8 |
5891 | | { 466, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #466 = ATOMIC_LOAD_MAX_I64 |
5892 | | { 465, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 269, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #465 = ATOMIC_LOAD_MAX_I32 |
5893 | | { 464, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 269, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #464 = ATOMIC_LOAD_MAX_I16 |
5894 | | { 463, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 269, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #463 = ATOMIC_LOAD_AND_I8 |
5895 | | { 462, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #462 = ATOMIC_LOAD_AND_I64 |
5896 | | { 461, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 269, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #461 = ATOMIC_LOAD_AND_I32 |
5897 | | { 460, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 269, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #460 = ATOMIC_LOAD_AND_I16 |
5898 | | { 459, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 269, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #459 = ATOMIC_LOAD_ADD_I8 |
5899 | | { 458, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #458 = ATOMIC_LOAD_ADD_I64 |
5900 | | { 457, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 269, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #457 = ATOMIC_LOAD_ADD_I32 |
5901 | | { 456, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 269, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #456 = ATOMIC_LOAD_ADD_I16 |
5902 | | { 455, 5, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #455 = ATOMIC_CMP_SWAP_I8 |
5903 | | { 454, 5, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 264, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #454 = ATOMIC_CMP_SWAP_I64 |
5904 | | { 453, 5, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #453 = ATOMIC_CMP_SWAP_I32 |
5905 | | { 452, 5, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #452 = ATOMIC_CMP_SWAP_I16 |
5906 | | { 451, 3, 1, 4, 198, 0, 1, PPCImpOpBase + 0, 208, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #451 = AND_rec |
5907 | | { 450, 2, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 257, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #450 = ANDI_rec_1_GT_BIT8 |
5908 | | { 449, 2, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 255, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #449 = ANDI_rec_1_GT_BIT |
5909 | | { 448, 2, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 257, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #448 = ANDI_rec_1_EQ_BIT8 |
5910 | | { 447, 2, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 255, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #447 = ANDI_rec_1_EQ_BIT |
5911 | | { 446, 3, 1, 4, 504, 0, 1, PPCImpOpBase + 0, 172, 0, 0x308ULL }, // Inst #446 = ANDI_rec |
5912 | | { 445, 3, 1, 4, 504, 0, 1, PPCImpOpBase + 0, 172, 0, 0x208ULL }, // Inst #445 = ANDIS_rec |
5913 | | { 444, 3, 1, 4, 502, 0, 1, PPCImpOpBase + 0, 169, 0, 0x208ULL }, // Inst #444 = ANDIS8_rec |
5914 | | { 443, 3, 1, 4, 502, 0, 1, PPCImpOpBase + 0, 169, 0, 0x308ULL }, // Inst #443 = ANDI8_rec |
5915 | | { 442, 3, 1, 4, 198, 0, 1, PPCImpOpBase + 0, 208, 0, 0x8ULL }, // Inst #442 = ANDC_rec |
5916 | | { 441, 3, 1, 4, 198, 0, 1, PPCImpOpBase + 0, 214, 0, 0x8ULL }, // Inst #441 = ANDC8_rec |
5917 | | { 440, 3, 1, 4, 198, 0, 0, PPCImpOpBase + 0, 214, 0, 0x8ULL }, // Inst #440 = ANDC8 |
5918 | | { 439, 3, 1, 4, 198, 0, 0, PPCImpOpBase + 0, 208, 0, 0x8ULL }, // Inst #439 = ANDC |
5919 | | { 438, 3, 1, 4, 198, 0, 1, PPCImpOpBase + 0, 214, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #438 = AND8_rec |
5920 | | { 437, 3, 1, 4, 198, 0, 0, PPCImpOpBase + 0, 214, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #437 = AND8 |
5921 | | { 436, 3, 1, 4, 198, 0, 0, PPCImpOpBase + 0, 208, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #436 = AND |
5922 | | { 435, 2, 0, 4, 0, 1, 1, PPCImpOpBase + 61, 21, 0, 0x0ULL }, // Inst #435 = ADJCALLSTACKUP |
5923 | | { 434, 2, 0, 4, 0, 1, 1, PPCImpOpBase + 61, 21, 0, 0x0ULL }, // Inst #434 = ADJCALLSTACKDOWN |
5924 | | { 433, 2, 1, 4, 532, 1, 2, PPCImpOpBase + 22, 251, 0, 0x8ULL }, // Inst #433 = ADDZE_rec |
5925 | | { 432, 2, 1, 4, 532, 1, 3, PPCImpOpBase + 18, 251, 0, 0x8ULL }, // Inst #432 = ADDZEO_rec |
5926 | | { 431, 2, 1, 4, 502, 1, 2, PPCImpOpBase + 15, 251, 0, 0x8ULL }, // Inst #431 = ADDZEO |
5927 | | { 430, 2, 1, 4, 532, 1, 2, PPCImpOpBase + 22, 253, 0, 0x8ULL }, // Inst #430 = ADDZE8_rec |
5928 | | { 429, 2, 1, 4, 532, 1, 3, PPCImpOpBase + 18, 253, 0, 0x8ULL }, // Inst #429 = ADDZE8O_rec |
5929 | | { 428, 2, 1, 4, 502, 1, 2, PPCImpOpBase + 15, 253, 0, 0x8ULL }, // Inst #428 = ADDZE8O |
5930 | | { 427, 2, 1, 4, 503, 1, 1, PPCImpOpBase + 13, 253, 0, 0x8ULL }, // Inst #427 = ADDZE8 |
5931 | | { 426, 2, 1, 4, 503, 1, 1, PPCImpOpBase + 13, 251, 0, 0x8ULL }, // Inst #426 = ADDZE |
5932 | | { 425, 2, 1, 4, 143, 0, 0, PPCImpOpBase + 0, 203, 0, 0x8ULL }, // Inst #425 = ADDPCIS |
5933 | | { 424, 2, 1, 4, 532, 1, 2, PPCImpOpBase + 22, 251, 0, 0x8ULL }, // Inst #424 = ADDME_rec |
5934 | | { 423, 2, 1, 4, 532, 1, 3, PPCImpOpBase + 18, 251, 0, 0x8ULL }, // Inst #423 = ADDMEO_rec |
5935 | | { 422, 2, 1, 4, 502, 1, 2, PPCImpOpBase + 15, 251, 0, 0x8ULL }, // Inst #422 = ADDMEO |
5936 | | { 421, 2, 1, 4, 532, 1, 2, PPCImpOpBase + 22, 253, 0, 0x8ULL }, // Inst #421 = ADDME8_rec |
5937 | | { 420, 2, 1, 4, 532, 1, 3, PPCImpOpBase + 18, 253, 0, 0x8ULL }, // Inst #420 = ADDME8O_rec |
5938 | | { 419, 2, 1, 4, 502, 1, 2, PPCImpOpBase + 15, 253, 0, 0x8ULL }, // Inst #419 = ADDME8O |
5939 | | { 418, 2, 1, 4, 501, 1, 1, PPCImpOpBase + 13, 253, 0, 0x8ULL }, // Inst #418 = ADDME8 |
5940 | | { 417, 2, 1, 4, 501, 1, 1, PPCImpOpBase + 13, 251, 0, 0x8ULL }, // Inst #417 = ADDME |
5941 | | { 416, 3, 1, 4, 288, 0, 0, PPCImpOpBase + 0, 217, 0|(1ULL<<MCID::Rematerializable), 0x0ULL }, // Inst #416 = ADDItocL |
5942 | | { 415, 3, 1, 4, 227, 0, 0, PPCImpOpBase + 0, 248, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #415 = ADDItoc8 |
5943 | | { 414, 3, 1, 4, 227, 0, 0, PPCImpOpBase + 0, 245, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #414 = ADDItoc |
5944 | | { 413, 4, 1, 4, 500, 0, 18, PPCImpOpBase + 43, 241, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL }, // Inst #413 = ADDItlsldLADDR32 |
5945 | | { 412, 4, 1, 4, 0, 0, 18, PPCImpOpBase + 25, 237, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL }, // Inst #412 = ADDItlsldLADDR |
5946 | | { 411, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 231, 0, 0x0ULL }, // Inst #411 = ADDItlsldL32 |
5947 | | { 410, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 194, 0, 0x0ULL }, // Inst #410 = ADDItlsldL |
5948 | | { 409, 4, 1, 4, 227, 0, 18, PPCImpOpBase + 43, 241, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL }, // Inst #409 = ADDItlsgdLADDR32 |
5949 | | { 408, 4, 1, 4, 227, 0, 18, PPCImpOpBase + 25, 237, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL }, // Inst #408 = ADDItlsgdLADDR |
5950 | | { 407, 3, 1, 4, 227, 0, 0, PPCImpOpBase + 0, 231, 0, 0x0ULL }, // Inst #407 = ADDItlsgdL32 |
5951 | | { 406, 3, 1, 4, 227, 0, 0, PPCImpOpBase + 0, 194, 0, 0x0ULL }, // Inst #406 = ADDItlsgdL |
5952 | | { 405, 3, 1, 4, 499, 0, 0, PPCImpOpBase + 0, 231, 0, 0x0ULL }, // Inst #405 = ADDIdtprelL32 |
5953 | | { 404, 3, 1, 4, 227, 0, 0, PPCImpOpBase + 0, 194, 0, 0x0ULL }, // Inst #404 = ADDIdtprelL |
5954 | | { 403, 3, 1, 4, 288, 0, 0, PPCImpOpBase + 0, 217, 0|(1ULL<<MCID::Rematerializable), 0x0ULL }, // Inst #403 = ADDIStocHA8 |
5955 | | { 402, 3, 1, 4, 288, 0, 0, PPCImpOpBase + 0, 234, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #402 = ADDIStocHA |
5956 | | { 401, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 194, 0, 0x0ULL }, // Inst #401 = ADDIStlsldHA |
5957 | | { 400, 3, 1, 4, 227, 0, 0, PPCImpOpBase + 0, 194, 0, 0x0ULL }, // Inst #400 = ADDIStlsgdHA |
5958 | | { 399, 3, 1, 4, 227, 0, 0, PPCImpOpBase + 0, 194, 0, 0x0ULL }, // Inst #399 = ADDISgotTprelHA |
5959 | | { 398, 3, 1, 4, 499, 0, 0, PPCImpOpBase + 0, 231, 0, 0x0ULL }, // Inst #398 = ADDISdtprelHA32 |
5960 | | { 397, 3, 1, 4, 227, 0, 0, PPCImpOpBase + 0, 194, 0, 0x0ULL }, // Inst #397 = ADDISdtprelHA |
5961 | | { 396, 3, 1, 4, 498, 0, 0, PPCImpOpBase + 0, 194, 0, 0x8ULL }, // Inst #396 = ADDIS8 |
5962 | | { 395, 3, 1, 4, 498, 0, 0, PPCImpOpBase + 0, 231, 0, 0x8ULL }, // Inst #395 = ADDIS |
5963 | | { 394, 3, 1, 4, 532, 0, 2, PPCImpOpBase + 11, 172, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL }, // Inst #394 = ADDIC_rec |
5964 | | { 393, 3, 1, 4, 501, 0, 1, PPCImpOpBase + 5, 169, 0, 0x8ULL }, // Inst #393 = ADDIC8 |
5965 | | { 392, 3, 1, 4, 501, 0, 1, PPCImpOpBase + 5, 172, 0, 0xcULL }, // Inst #392 = ADDIC |
5966 | | { 391, 3, 1, 4, 498, 0, 0, PPCImpOpBase + 0, 194, 0, 0x8ULL }, // Inst #391 = ADDI8 |
5967 | | { 390, 3, 1, 4, 498, 0, 0, PPCImpOpBase + 0, 231, 0, 0x8ULL }, // Inst #390 = ADDI |
5968 | | { 389, 3, 1, 4, 203, 0, 0, PPCImpOpBase + 0, 214, 0, 0x8ULL }, // Inst #389 = ADDG6S8 |
5969 | | { 388, 3, 1, 4, 203, 0, 0, PPCImpOpBase + 0, 208, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #388 = ADDG6S |
5970 | | { 387, 3, 1, 4, 534, 1, 2, PPCImpOpBase + 22, 208, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #387 = ADDE_rec |
5971 | | { 386, 4, 1, 4, 522, 0, 0, PPCImpOpBase + 0, 227, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #386 = ADDEX8 |
5972 | | { 385, 4, 1, 4, 522, 0, 0, PPCImpOpBase + 0, 223, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #385 = ADDEX |
5973 | | { 384, 3, 1, 4, 534, 1, 3, PPCImpOpBase + 18, 208, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #384 = ADDEO_rec |
5974 | | { 383, 3, 1, 4, 521, 1, 2, PPCImpOpBase + 15, 208, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #383 = ADDEO |
5975 | | { 382, 3, 1, 4, 534, 1, 2, PPCImpOpBase + 22, 214, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #382 = ADDE8_rec |
5976 | | { 381, 3, 1, 4, 534, 1, 3, PPCImpOpBase + 18, 214, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #381 = ADDE8O_rec |
5977 | | { 380, 3, 1, 4, 521, 1, 2, PPCImpOpBase + 15, 214, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #380 = ADDE8O |
5978 | | { 379, 3, 1, 4, 139, 1, 1, PPCImpOpBase + 13, 214, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #379 = ADDE8 |
5979 | | { 378, 3, 1, 4, 139, 1, 1, PPCImpOpBase + 13, 208, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #378 = ADDE |
5980 | | { 377, 3, 1, 4, 538, 0, 2, PPCImpOpBase + 11, 208, 0|(1ULL<<MCID::Commutable), 0xcULL }, // Inst #377 = ADDC_rec |
5981 | | { 376, 3, 1, 4, 390, 0, 3, PPCImpOpBase + 8, 208, 0|(1ULL<<MCID::Commutable), 0xcULL }, // Inst #376 = ADDCO_rec |
5982 | | { 375, 3, 1, 4, 286, 0, 2, PPCImpOpBase + 6, 208, 0|(1ULL<<MCID::Commutable), 0xcULL }, // Inst #375 = ADDCO |
5983 | | { 374, 3, 1, 4, 538, 0, 2, PPCImpOpBase + 11, 214, 0|(1ULL<<MCID::Commutable), 0xcULL }, // Inst #374 = ADDC8_rec |
5984 | | { 373, 3, 1, 4, 390, 0, 3, PPCImpOpBase + 8, 214, 0|(1ULL<<MCID::Commutable), 0xcULL }, // Inst #373 = ADDC8O_rec |
5985 | | { 372, 3, 1, 4, 286, 0, 2, PPCImpOpBase + 6, 214, 0|(1ULL<<MCID::Commutable), 0xcULL }, // Inst #372 = ADDC8O |
5986 | | { 371, 3, 1, 4, 286, 0, 1, PPCImpOpBase + 5, 214, 0|(1ULL<<MCID::Commutable), 0xcULL }, // Inst #371 = ADDC8 |
5987 | | { 370, 3, 1, 4, 286, 0, 1, PPCImpOpBase + 5, 208, 0|(1ULL<<MCID::Commutable), 0xcULL }, // Inst #370 = ADDC |
5988 | | { 369, 3, 1, 4, 198, 0, 1, PPCImpOpBase + 0, 214, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #369 = ADD8_rec |
5989 | | { 368, 3, 1, 4, 138, 0, 0, PPCImpOpBase + 0, 220, 0, 0x8ULL }, // Inst #368 = ADD8TLS_ |
5990 | | { 367, 3, 1, 4, 138, 0, 0, PPCImpOpBase + 0, 217, 0, 0x8ULL }, // Inst #367 = ADD8TLS |
5991 | | { 366, 3, 1, 4, 141, 0, 2, PPCImpOpBase + 3, 214, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #366 = ADD8O_rec |
5992 | | { 365, 3, 1, 4, 523, 0, 1, PPCImpOpBase + 2, 214, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #365 = ADD8O |
5993 | | { 364, 3, 1, 4, 138, 0, 0, PPCImpOpBase + 0, 214, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #364 = ADD8 |
5994 | | { 363, 3, 1, 4, 198, 0, 1, PPCImpOpBase + 0, 208, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #363 = ADD4_rec |
5995 | | { 362, 3, 1, 4, 138, 0, 0, PPCImpOpBase + 0, 211, 0, 0x8ULL }, // Inst #362 = ADD4TLS |
5996 | | { 361, 3, 1, 4, 141, 0, 2, PPCImpOpBase + 3, 208, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #361 = ADD4O_rec |
5997 | | { 360, 3, 1, 4, 523, 0, 1, PPCImpOpBase + 2, 208, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #360 = ADD4O |
5998 | | { 359, 3, 1, 4, 138, 0, 0, PPCImpOpBase + 0, 208, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #359 = ADD4 |
5999 | | { 358, 3, 0, 4, 369, 0, 0, PPCImpOpBase + 0, 191, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #358 = XFSTOREf64 |
6000 | | { 357, 3, 0, 4, 369, 0, 0, PPCImpOpBase + 0, 205, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #357 = XFSTOREf32 |
6001 | | { 356, 3, 1, 4, 214, 0, 0, PPCImpOpBase + 0, 191, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #356 = XFLOADf64 |
6002 | | { 355, 3, 1, 4, 364, 0, 0, PPCImpOpBase + 0, 205, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #355 = XFLOADf32 |
6003 | | { 354, 2, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 203, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #354 = SUBPCIS |
6004 | | { 353, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 172, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #353 = SUBIS |
6005 | | { 352, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 172, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #352 = SUBIC_rec |
6006 | | { 351, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 172, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #351 = SUBIC |
6007 | | { 350, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 172, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #350 = SUBI |
6008 | | { 349, 3, 0, 4, 608, 0, 0, PPCImpOpBase + 0, 191, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #349 = STIWX |
6009 | | { 348, 3, 0, 0, 202, 0, 0, PPCImpOpBase + 0, 172, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #348 = SRWI_rec |
6010 | | { 347, 3, 0, 0, 202, 0, 0, PPCImpOpBase + 0, 172, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #347 = SRWI |
6011 | | { 346, 3, 0, 0, 202, 0, 0, PPCImpOpBase + 0, 169, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #346 = SRDI_rec |
6012 | | { 345, 3, 0, 0, 202, 0, 0, PPCImpOpBase + 0, 169, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #345 = SRDI |
6013 | | { 344, 3, 0, 4, 607, 0, 0, PPCImpOpBase + 0, 200, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #344 = SPILLTOVSR_STX |
6014 | | { 343, 3, 0, 4, 597, 0, 0, PPCImpOpBase + 0, 197, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #343 = SPILLTOVSR_ST |
6015 | | { 342, 3, 1, 4, 551, 0, 0, PPCImpOpBase + 0, 200, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #342 = SPILLTOVSR_LDX |
6016 | | { 341, 3, 1, 4, 542, 0, 0, PPCImpOpBase + 0, 197, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #341 = SPILLTOVSR_LD |
6017 | | { 340, 3, 0, 0, 202, 0, 0, PPCImpOpBase + 0, 172, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #340 = SLWI_rec |
6018 | | { 339, 3, 0, 0, 202, 0, 0, PPCImpOpBase + 0, 172, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #339 = SLWI |
6019 | | { 338, 3, 0, 0, 202, 0, 0, PPCImpOpBase + 0, 169, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #338 = SLDI_rec |
6020 | | { 337, 3, 0, 0, 202, 0, 0, PPCImpOpBase + 0, 169, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #337 = SLDI |
6021 | | { 336, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 172, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #336 = ROTRWI_rec |
6022 | | { 335, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 172, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #335 = ROTRWI |
6023 | | { 334, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 169, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #334 = ROTRDI_rec |
6024 | | { 333, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 169, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #333 = ROTRDI |
6025 | | { 332, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 161, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #332 = RLWNMbm_rec |
6026 | | { 331, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 161, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #331 = RLWNMbm |
6027 | | { 330, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 161, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #330 = RLWINMbm_rec |
6028 | | { 329, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 161, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #329 = RLWINMbm |
6029 | | { 328, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 161, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #328 = RLWIMIbm_rec |
6030 | | { 327, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 161, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #327 = RLWIMIbm |
6031 | | { 326, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 194, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #326 = PSUBI |
6032 | | { 325, 3, 1, 4, 214, 0, 0, PPCImpOpBase + 0, 191, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #325 = LIWZX |
6033 | | { 324, 3, 1, 4, 361, 0, 0, PPCImpOpBase + 0, 191, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #324 = LIWAX |
6034 | | { 323, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 188, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #323 = LAx |
6035 | | { 322, 2, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 186, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #322 = KILL_PAIR |
6036 | | { 321, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 165, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #321 = INSRWI_rec |
6037 | | { 320, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 165, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #320 = INSRWI |
6038 | | { 319, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 161, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #319 = INSRDI_rec |
6039 | | { 318, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 161, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #318 = INSRDI |
6040 | | { 317, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 165, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #317 = INSLWI_rec |
6041 | | { 316, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 165, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #316 = INSLWI |
6042 | | { 315, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 165, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #315 = EXTRWI_rec |
6043 | | { 314, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 165, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #314 = EXTRWI |
6044 | | { 313, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 161, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #313 = EXTRDI_rec |
6045 | | { 312, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 161, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #312 = EXTRDI |
6046 | | { 311, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 165, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #311 = EXTLWI_rec |
6047 | | { 310, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 165, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #310 = EXTLWI |
6048 | | { 309, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 161, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #309 = EXTLDI_rec |
6049 | | { 308, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 161, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #308 = EXTLDI |
6050 | | { 307, 3, 0, 4, 599, 0, 0, PPCImpOpBase + 0, 183, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #307 = DFSTOREf64 |
6051 | | { 306, 3, 0, 4, 599, 0, 0, PPCImpOpBase + 0, 180, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #306 = DFSTOREf32 |
6052 | | { 305, 3, 1, 4, 544, 0, 0, PPCImpOpBase + 0, 183, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #305 = DFLOADf64 |
6053 | | { 304, 3, 1, 4, 543, 0, 0, PPCImpOpBase + 0, 180, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #304 = DFLOADf32 |
6054 | | { 303, 2, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 175, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #303 = DCBTx |
6055 | | { 302, 2, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 175, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #302 = DCBTT |
6056 | | { 301, 2, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 175, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #301 = DCBTSTx |
6057 | | { 300, 2, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 175, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #300 = DCBTSTT |
6058 | | { 299, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 177, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #299 = DCBTSTDS |
6059 | | { 298, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 177, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #298 = DCBTSTCT |
6060 | | { 297, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 177, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #297 = DCBTDS |
6061 | | { 296, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 177, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #296 = DCBTCT |
6062 | | { 295, 2, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 175, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #295 = DCBSTPS |
6063 | | { 294, 2, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 175, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #294 = DCBFx |
6064 | | { 293, 2, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 175, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #293 = DCBFPS |
6065 | | { 292, 2, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 175, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #292 = DCBFLP |
6066 | | { 291, 2, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 175, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #291 = DCBFL |
6067 | | { 290, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 172, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #290 = CLRRWI_rec |
6068 | | { 289, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 172, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #289 = CLRRWI |
6069 | | { 288, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 169, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #288 = CLRRDI_rec |
6070 | | { 287, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 169, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #287 = CLRRDI |
6071 | | { 286, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 165, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #286 = CLRLSLWI_rec |
6072 | | { 285, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 165, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #285 = CLRLSLWI |
6073 | | { 284, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 161, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #284 = CLRLSLDI_rec |
6074 | | { 283, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 161, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #283 = CLRLSLDI |
6075 | | { 282, 1, 0, 4, 1, 0, 1, PPCImpOpBase + 1, 160, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #282 = CFENCE8 |
6076 | | { 281, 1, 0, 4, 1, 0, 1, PPCImpOpBase + 1, 159, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #281 = CFENCE |
6077 | | { 280, 2, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 157, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #280 = BUILD_UACC |
6078 | | { 279, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 154, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #279 = BUILD_QUADWORD |
6079 | | { 278, 6, 2, 4, 0, 0, 1, PPCImpOpBase + 0, 148, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #278 = ATOMIC_SWAP_I128 |
6080 | | { 277, 6, 2, 4, 0, 0, 1, PPCImpOpBase + 0, 148, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #277 = ATOMIC_LOAD_XOR_I128 |
6081 | | { 276, 6, 2, 4, 0, 0, 1, PPCImpOpBase + 0, 148, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #276 = ATOMIC_LOAD_SUB_I128 |
6082 | | { 275, 6, 2, 4, 0, 0, 1, PPCImpOpBase + 0, 148, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #275 = ATOMIC_LOAD_OR_I128 |
6083 | | { 274, 6, 2, 4, 0, 0, 1, PPCImpOpBase + 0, 148, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #274 = ATOMIC_LOAD_NAND_I128 |
6084 | | { 273, 6, 2, 4, 0, 0, 1, PPCImpOpBase + 0, 148, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #273 = ATOMIC_LOAD_AND_I128 |
6085 | | { 272, 6, 2, 4, 0, 0, 1, PPCImpOpBase + 0, 148, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #272 = ATOMIC_LOAD_ADD_I128 |
6086 | | { 271, 8, 2, 4, 0, 0, 1, PPCImpOpBase + 0, 140, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #271 = ATOMIC_CMP_SWAP_I128 |
6087 | | { 270, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 136, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #270 = G_UBFX |
6088 | | { 269, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 136, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #269 = G_SBFX |
6089 | | { 268, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #268 = G_VECREDUCE_UMIN |
6090 | | { 267, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #267 = G_VECREDUCE_UMAX |
6091 | | { 266, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #266 = G_VECREDUCE_SMIN |
6092 | | { 265, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #265 = G_VECREDUCE_SMAX |
6093 | | { 264, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #264 = G_VECREDUCE_XOR |
6094 | | { 263, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #263 = G_VECREDUCE_OR |
6095 | | { 262, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #262 = G_VECREDUCE_AND |
6096 | | { 261, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #261 = G_VECREDUCE_MUL |
6097 | | { 260, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #260 = G_VECREDUCE_ADD |
6098 | | { 259, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #259 = G_VECREDUCE_FMINIMUM |
6099 | | { 258, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #258 = G_VECREDUCE_FMAXIMUM |
6100 | | { 257, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #257 = G_VECREDUCE_FMIN |
6101 | | { 256, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #256 = G_VECREDUCE_FMAX |
6102 | | { 255, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #255 = G_VECREDUCE_FMUL |
6103 | | { 254, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #254 = G_VECREDUCE_FADD |
6104 | | { 253, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 123, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #253 = G_VECREDUCE_SEQ_FMUL |
6105 | | { 252, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 123, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #252 = G_VECREDUCE_SEQ_FADD |
6106 | | { 251, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 53, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #251 = G_BZERO |
6107 | | { 250, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 132, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #250 = G_MEMSET |
6108 | | { 249, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 132, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #249 = G_MEMMOVE |
6109 | | { 248, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 123, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #248 = G_MEMCPY_INLINE |
6110 | | { 247, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 132, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #247 = G_MEMCPY |
6111 | | { 246, 2, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 130, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #246 = G_WRITE_REGISTER |
6112 | | { 245, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #245 = G_READ_REGISTER |
6113 | | { 244, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 96, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #244 = G_STRICT_FLDEXP |
6114 | | { 243, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #243 = G_STRICT_FSQRT |
6115 | | { 242, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 46, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #242 = G_STRICT_FMA |
6116 | | { 241, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #241 = G_STRICT_FREM |
6117 | | { 240, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #240 = G_STRICT_FDIV |
6118 | | { 239, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #239 = G_STRICT_FMUL |
6119 | | { 238, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #238 = G_STRICT_FSUB |
6120 | | { 237, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #237 = G_STRICT_FADD |
6121 | | { 236, 1, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #236 = G_STACKRESTORE |
6122 | | { 235, 1, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #235 = G_STACKSAVE |
6123 | | { 234, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 64, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #234 = G_DYN_STACKALLOC |
6124 | | { 233, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #233 = G_JUMP_TABLE |
6125 | | { 232, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #232 = G_BLOCK_ADDR |
6126 | | { 231, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #231 = G_ADDRSPACE_CAST |
6127 | | { 230, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #230 = G_FNEARBYINT |
6128 | | { 229, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #229 = G_FRINT |
6129 | | { 228, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #228 = G_FFLOOR |
6130 | | { 227, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #227 = G_FSQRT |
6131 | | { 226, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #226 = G_FSIN |
6132 | | { 225, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #225 = G_FCOS |
6133 | | { 224, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #224 = G_FCEIL |
6134 | | { 223, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #223 = G_BITREVERSE |
6135 | | { 222, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #222 = G_BSWAP |
6136 | | { 221, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #221 = G_CTPOP |
6137 | | { 220, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #220 = G_CTLZ_ZERO_UNDEF |
6138 | | { 219, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #219 = G_CTLZ |
6139 | | { 218, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #218 = G_CTTZ_ZERO_UNDEF |
6140 | | { 217, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #217 = G_CTTZ |
6141 | | { 216, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 126, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #216 = G_SHUFFLE_VECTOR |
6142 | | { 215, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 123, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #215 = G_EXTRACT_VECTOR_ELT |
6143 | | { 214, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 119, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #214 = G_INSERT_VECTOR_ELT |
6144 | | { 213, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 116, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #213 = G_BRJT |
6145 | | { 212, 1, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #212 = G_BR |
6146 | | { 211, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #211 = G_LLROUND |
6147 | | { 210, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #210 = G_LROUND |
6148 | | { 209, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #209 = G_ABS |
6149 | | { 208, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #208 = G_UMAX |
6150 | | { 207, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #207 = G_UMIN |
6151 | | { 206, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #206 = G_SMAX |
6152 | | { 205, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #205 = G_SMIN |
6153 | | { 204, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 96, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #204 = G_PTRMASK |
6154 | | { 203, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 96, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #203 = G_PTR_ADD |
6155 | | { 202, 0, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #202 = G_RESET_FPMODE |
6156 | | { 201, 1, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #201 = G_SET_FPMODE |
6157 | | { 200, 1, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #200 = G_GET_FPMODE |
6158 | | { 199, 0, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #199 = G_RESET_FPENV |
6159 | | { 198, 1, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #198 = G_SET_FPENV |
6160 | | { 197, 1, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #197 = G_GET_FPENV |
6161 | | { 196, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #196 = G_FMAXIMUM |
6162 | | { 195, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #195 = G_FMINIMUM |
6163 | | { 194, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #194 = G_FMAXNUM_IEEE |
6164 | | { 193, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #193 = G_FMINNUM_IEEE |
6165 | | { 192, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #192 = G_FMAXNUM |
6166 | | { 191, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #191 = G_FMINNUM |
6167 | | { 190, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #190 = G_FCANONICALIZE |
6168 | | { 189, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 93, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #189 = G_IS_FPCLASS |
6169 | | { 188, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 96, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #188 = G_FCOPYSIGN |
6170 | | { 187, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #187 = G_FABS |
6171 | | { 186, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #186 = G_UITOFP |
6172 | | { 185, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #185 = G_SITOFP |
6173 | | { 184, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #184 = G_FPTOUI |
6174 | | { 183, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #183 = G_FPTOSI |
6175 | | { 182, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #182 = G_FPTRUNC |
6176 | | { 181, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #181 = G_FPEXT |
6177 | | { 180, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #180 = G_FNEG |
6178 | | { 179, 3, 2, 0, 0, 0, 0, PPCImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #179 = G_FFREXP |
6179 | | { 178, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 96, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #178 = G_FLDEXP |
6180 | | { 177, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #177 = G_FLOG10 |
6181 | | { 176, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #176 = G_FLOG2 |
6182 | | { 175, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #175 = G_FLOG |
6183 | | { 174, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #174 = G_FEXP10 |
6184 | | { 173, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #173 = G_FEXP2 |
6185 | | { 172, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #172 = G_FEXP |
6186 | | { 171, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 96, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #171 = G_FPOWI |
6187 | | { 170, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #170 = G_FPOW |
6188 | | { 169, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #169 = G_FREM |
6189 | | { 168, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #168 = G_FDIV |
6190 | | { 167, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 46, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #167 = G_FMAD |
6191 | | { 166, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 46, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #166 = G_FMA |
6192 | | { 165, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #165 = G_FMUL |
6193 | | { 164, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #164 = G_FSUB |
6194 | | { 163, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #163 = G_FADD |
6195 | | { 162, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 112, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #162 = G_UDIVFIXSAT |
6196 | | { 161, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 112, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #161 = G_SDIVFIXSAT |
6197 | | { 160, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 112, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #160 = G_UDIVFIX |
6198 | | { 159, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 112, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #159 = G_SDIVFIX |
6199 | | { 158, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 112, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #158 = G_UMULFIXSAT |
6200 | | { 157, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 112, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #157 = G_SMULFIXSAT |
6201 | | { 156, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 112, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #156 = G_UMULFIX |
6202 | | { 155, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 112, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #155 = G_SMULFIX |
6203 | | { 154, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 96, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #154 = G_SSHLSAT |
6204 | | { 153, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 96, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #153 = G_USHLSAT |
6205 | | { 152, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #152 = G_SSUBSAT |
6206 | | { 151, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #151 = G_USUBSAT |
6207 | | { 150, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #150 = G_SADDSAT |
6208 | | { 149, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #149 = G_UADDSAT |
6209 | | { 148, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #148 = G_SMULH |
6210 | | { 147, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #147 = G_UMULH |
6211 | | { 146, 4, 2, 0, 0, 0, 0, PPCImpOpBase + 0, 82, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #146 = G_SMULO |
6212 | | { 145, 4, 2, 0, 0, 0, 0, PPCImpOpBase + 0, 82, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #145 = G_UMULO |
6213 | | { 144, 5, 2, 0, 0, 0, 0, PPCImpOpBase + 0, 107, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #144 = G_SSUBE |
6214 | | { 143, 4, 2, 0, 0, 0, 0, PPCImpOpBase + 0, 82, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #143 = G_SSUBO |
6215 | | { 142, 5, 2, 0, 0, 0, 0, PPCImpOpBase + 0, 107, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #142 = G_SADDE |
6216 | | { 141, 4, 2, 0, 0, 0, 0, PPCImpOpBase + 0, 82, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #141 = G_SADDO |
6217 | | { 140, 5, 2, 0, 0, 0, 0, PPCImpOpBase + 0, 107, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #140 = G_USUBE |
6218 | | { 139, 4, 2, 0, 0, 0, 0, PPCImpOpBase + 0, 82, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #139 = G_USUBO |
6219 | | { 138, 5, 2, 0, 0, 0, 0, PPCImpOpBase + 0, 107, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #138 = G_UADDE |
6220 | | { 137, 4, 2, 0, 0, 0, 0, PPCImpOpBase + 0, 82, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #137 = G_UADDO |
6221 | | { 136, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 82, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #136 = G_SELECT |
6222 | | { 135, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 103, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #135 = G_FCMP |
6223 | | { 134, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 103, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #134 = G_ICMP |
6224 | | { 133, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 96, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #133 = G_ROTL |
6225 | | { 132, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 96, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #132 = G_ROTR |
6226 | | { 131, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 99, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #131 = G_FSHR |
6227 | | { 130, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 99, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #130 = G_FSHL |
6228 | | { 129, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 96, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #129 = G_ASHR |
6229 | | { 128, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 96, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #128 = G_LSHR |
6230 | | { 127, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 96, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #127 = G_SHL |
6231 | | { 126, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #126 = G_ZEXT |
6232 | | { 125, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 40, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #125 = G_SEXT_INREG |
6233 | | { 124, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #124 = G_SEXT |
6234 | | { 123, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 93, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #123 = G_VAARG |
6235 | | { 122, 1, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #122 = G_VASTART |
6236 | | { 121, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #121 = G_FCONSTANT |
6237 | | { 120, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #120 = G_CONSTANT |
6238 | | { 119, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #119 = G_TRUNC |
6239 | | { 118, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #118 = G_ANYEXT |
6240 | | { 117, 1, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #117 = G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS |
6241 | | { 116, 1, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #116 = G_INTRINSIC_CONVERGENT |
6242 | | { 115, 1, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #115 = G_INTRINSIC_W_SIDE_EFFECTS |
6243 | | { 114, 1, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #114 = G_INTRINSIC |
6244 | | { 113, 0, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #113 = G_INVOKE_REGION_START |
6245 | | { 112, 1, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #112 = G_BRINDIRECT |
6246 | | { 111, 2, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #111 = G_BRCOND |
6247 | | { 110, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 89, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #110 = G_PREFETCH |
6248 | | { 109, 2, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 21, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #109 = G_FENCE |
6249 | | { 108, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #108 = G_ATOMICRMW_UDEC_WRAP |
6250 | | { 107, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #107 = G_ATOMICRMW_UINC_WRAP |
6251 | | { 106, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #106 = G_ATOMICRMW_FMIN |
6252 | | { 105, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #105 = G_ATOMICRMW_FMAX |
6253 | | { 104, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #104 = G_ATOMICRMW_FSUB |
6254 | | { 103, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #103 = G_ATOMICRMW_FADD |
6255 | | { 102, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #102 = G_ATOMICRMW_UMIN |
6256 | | { 101, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #101 = G_ATOMICRMW_UMAX |
6257 | | { 100, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #100 = G_ATOMICRMW_MIN |
6258 | | { 99, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #99 = G_ATOMICRMW_MAX |
6259 | | { 98, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #98 = G_ATOMICRMW_XOR |
6260 | | { 97, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #97 = G_ATOMICRMW_OR |
6261 | | { 96, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #96 = G_ATOMICRMW_NAND |
6262 | | { 95, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #95 = G_ATOMICRMW_AND |
6263 | | { 94, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #94 = G_ATOMICRMW_SUB |
6264 | | { 93, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #93 = G_ATOMICRMW_ADD |
6265 | | { 92, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #92 = G_ATOMICRMW_XCHG |
6266 | | { 91, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 82, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #91 = G_ATOMIC_CMPXCHG |
6267 | | { 90, 5, 2, 0, 0, 0, 0, PPCImpOpBase + 0, 77, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #90 = G_ATOMIC_CMPXCHG_WITH_SUCCESS |
6268 | | { 89, 5, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 72, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #89 = G_INDEXED_STORE |
6269 | | { 88, 2, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #88 = G_STORE |
6270 | | { 87, 5, 2, 0, 0, 0, 0, PPCImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #87 = G_INDEXED_ZEXTLOAD |
6271 | | { 86, 5, 2, 0, 0, 0, 0, PPCImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #86 = G_INDEXED_SEXTLOAD |
6272 | | { 85, 5, 2, 0, 0, 0, 0, PPCImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #85 = G_INDEXED_LOAD |
6273 | | { 84, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #84 = G_ZEXTLOAD |
6274 | | { 83, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #83 = G_SEXTLOAD |
6275 | | { 82, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #82 = G_LOAD |
6276 | | { 81, 1, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #81 = G_READCYCLECOUNTER |
6277 | | { 80, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #80 = G_INTRINSIC_ROUNDEVEN |
6278 | | { 79, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #79 = G_INTRINSIC_LRINT |
6279 | | { 78, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #78 = G_INTRINSIC_ROUND |
6280 | | { 77, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #77 = G_INTRINSIC_TRUNC |
6281 | | { 76, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 64, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #76 = G_INTRINSIC_FPTRUNC_ROUND |
6282 | | { 75, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #75 = G_CONSTANT_FOLD_BARRIER |
6283 | | { 74, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #74 = G_FREEZE |
6284 | | { 73, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #73 = G_BITCAST |
6285 | | { 72, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #72 = G_INTTOPTR |
6286 | | { 71, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #71 = G_PTRTOINT |
6287 | | { 70, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #70 = G_CONCAT_VECTORS |
6288 | | { 69, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #69 = G_BUILD_VECTOR_TRUNC |
6289 | | { 68, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #68 = G_BUILD_VECTOR |
6290 | | { 67, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #67 = G_MERGE_VALUES |
6291 | | { 66, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 58, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #66 = G_INSERT |
6292 | | { 65, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #65 = G_UNMERGE_VALUES |
6293 | | { 64, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 53, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #64 = G_EXTRACT |
6294 | | { 63, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #63 = G_CONSTANT_POOL |
6295 | | { 62, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #62 = G_GLOBAL_VALUE |
6296 | | { 61, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #61 = G_FRAME_INDEX |
6297 | | { 60, 1, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #60 = G_PHI |
6298 | | { 59, 1, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #59 = G_IMPLICIT_DEF |
6299 | | { 58, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #58 = G_XOR |
6300 | | { 57, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #57 = G_OR |
6301 | | { 56, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #56 = G_AND |
6302 | | { 55, 4, 2, 0, 0, 0, 0, PPCImpOpBase + 0, 46, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #55 = G_UDIVREM |
6303 | | { 54, 4, 2, 0, 0, 0, 0, PPCImpOpBase + 0, 46, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #54 = G_SDIVREM |
6304 | | { 53, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #53 = G_UREM |
6305 | | { 52, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #52 = G_SREM |
6306 | | { 51, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #51 = G_UDIV |
6307 | | { 50, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #50 = G_SDIV |
6308 | | { 49, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #49 = G_MUL |
6309 | | { 48, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #48 = G_SUB |
6310 | | { 47, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #47 = G_ADD |
6311 | | { 46, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 40, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #46 = G_ASSERT_ALIGN |
6312 | | { 45, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 40, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #45 = G_ASSERT_ZEXT |
6313 | | { 44, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 40, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #44 = G_ASSERT_SEXT |
6314 | | { 43, 1, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // Inst #43 = JUMP_TABLE_DEBUG_INFO |
6315 | | { 42, 0, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #42 = MEMBARRIER |
6316 | | { 41, 0, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #41 = ICALL_BRANCH_FUNNEL |
6317 | | { 40, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 37, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #40 = PATCHABLE_TYPED_EVENT_CALL |
6318 | | { 39, 2, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 35, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #39 = PATCHABLE_EVENT_CALL |
6319 | | { 38, 0, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #38 = PATCHABLE_TAIL_CALL |
6320 | | { 37, 0, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #37 = PATCHABLE_FUNCTION_EXIT |
6321 | | { 36, 0, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #36 = PATCHABLE_RET |
6322 | | { 35, 0, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #35 = PATCHABLE_FUNCTION_ENTER |
6323 | | { 34, 0, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #34 = PATCHABLE_OP |
6324 | | { 33, 1, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #33 = FAULTING_OP |
6325 | | { 32, 2, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 33, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #32 = LOCAL_ESCAPE |
6326 | | { 31, 0, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #31 = STATEPOINT |
6327 | | { 30, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 30, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #30 = PREALLOCATED_ARG |
6328 | | { 29, 1, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #29 = PREALLOCATED_SETUP |
6329 | | { 28, 1, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 29, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x0ULL }, // Inst #28 = LOAD_STACK_GUARD |
6330 | | { 27, 6, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 23, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #27 = PATCHPOINT |
6331 | | { 26, 0, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #26 = FENTRY_CALL |
6332 | | { 25, 2, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 21, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #25 = STACKMAP |
6333 | | { 24, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 19, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // Inst #24 = ARITH_FENCE |
6334 | | { 23, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 15, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #23 = PSEUDO_PROBE |
6335 | | { 22, 1, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // Inst #22 = LIFETIME_END |
6336 | | { 21, 1, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // Inst #21 = LIFETIME_START |
6337 | | { 20, 0, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #20 = BUNDLE |
6338 | | { 19, 2, 1, 0, 290, 0, 0, PPCImpOpBase + 0, 13, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #19 = COPY |
6339 | | { 18, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 13, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #18 = REG_SEQUENCE |
6340 | | { 17, 1, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // Inst #17 = DBG_LABEL |
6341 | | { 16, 0, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #16 = DBG_PHI |
6342 | | { 15, 0, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #15 = DBG_INSTR_REF |
6343 | | { 14, 0, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #14 = DBG_VALUE_LIST |
6344 | | { 13, 0, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #13 = DBG_VALUE |
6345 | | { 12, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #12 = COPY_TO_REGCLASS |
6346 | | { 11, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 9, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #11 = SUBREG_TO_REG |
6347 | | { 10, 1, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #10 = IMPLICIT_DEF |
6348 | | { 9, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 5, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #9 = INSERT_SUBREG |
6349 | | { 8, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 2, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #8 = EXTRACT_SUBREG |
6350 | | { 7, 0, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #7 = KILL |
6351 | | { 6, 1, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // Inst #6 = ANNOTATION_LABEL |
6352 | | { 5, 1, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // Inst #5 = GC_LABEL |
6353 | | { 4, 1, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // Inst #4 = EH_LABEL |
6354 | | { 3, 1, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // Inst #3 = CFI_INSTRUCTION |
6355 | | { 2, 0, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2 = INLINEASM_BR |
6356 | | { 1, 0, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #1 = INLINEASM |
6357 | | { 0, 1, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #0 = PHI |
6358 | | }, { |
6359 | | /* 0 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
6360 | | /* 1 */ |
6361 | | /* 1 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6362 | | /* 2 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6363 | | /* 5 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6364 | | /* 9 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6365 | | /* 13 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
6366 | | /* 15 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6367 | | /* 19 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, MCOI_TIED_TO(0) }, |
6368 | | /* 21 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6369 | | /* 23 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6370 | | /* 29 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, |
6371 | | /* 30 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6372 | | /* 33 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6373 | | /* 35 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
6374 | | /* 37 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
6375 | | /* 40 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 }, |
6376 | | /* 43 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
6377 | | /* 46 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
6378 | | /* 50 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
6379 | | /* 51 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
6380 | | /* 53 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 }, |
6381 | | /* 56 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
6382 | | /* 58 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 }, |
6383 | | /* 62 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
6384 | | /* 64 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6385 | | /* 67 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
6386 | | /* 72 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
6387 | | /* 77 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
6388 | | /* 82 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
6389 | | /* 86 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
6390 | | /* 89 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6391 | | /* 93 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
6392 | | /* 96 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
6393 | | /* 99 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
6394 | | /* 103 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
6395 | | /* 107 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
6396 | | /* 112 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 }, |
6397 | | /* 116 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
6398 | | /* 119 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, |
6399 | | /* 123 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, |
6400 | | /* 126 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
6401 | | /* 130 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
6402 | | /* 132 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 }, |
6403 | | /* 136 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
6404 | | /* 140 */ { PPC::G8pRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { PPC::G8pRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6405 | | /* 148 */ { PPC::G8pRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { PPC::G8pRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6406 | | /* 154 */ { PPC::G8pRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6407 | | /* 157 */ { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::UACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6408 | | /* 159 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6409 | | /* 160 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6410 | | /* 161 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6411 | | /* 165 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6412 | | /* 169 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6413 | | /* 172 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6414 | | /* 175 */ { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6415 | | /* 177 */ { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6416 | | /* 180 */ { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6417 | | /* 183 */ { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6418 | | /* 186 */ { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, |
6419 | | /* 188 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6420 | | /* 191 */ { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6421 | | /* 194 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6422 | | /* 197 */ { PPC::SPILLTOVSRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6423 | | /* 200 */ { PPC::SPILLTOVSRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6424 | | /* 203 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6425 | | /* 205 */ { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6426 | | /* 208 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6427 | | /* 211 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
6428 | | /* 214 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6429 | | /* 217 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
6430 | | /* 220 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
6431 | | /* 223 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6432 | | /* 227 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6433 | | /* 231 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRC_NOR0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6434 | | /* 234 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRC_NOR0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
6435 | | /* 237 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
6436 | | /* 241 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRC_NOR0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
6437 | | /* 245 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6438 | | /* 248 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6439 | | /* 251 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6440 | | /* 253 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6441 | | /* 255 */ { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6442 | | /* 257 */ { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6443 | | /* 259 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6444 | | /* 264 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6445 | | /* 269 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6446 | | /* 273 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6447 | | /* 277 */ { -1, 0, MCOI::OPERAND_PCREL, 0 }, |
6448 | | /* 278 */ { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, |
6449 | | /* 280 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, |
6450 | | /* 283 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
6451 | | /* 286 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
6452 | | /* 288 */ { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6453 | | /* 289 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6454 | | /* 293 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6455 | | /* 296 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6456 | | /* 299 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6457 | | /* 301 */ { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6458 | | /* 303 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6459 | | /* 306 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6460 | | /* 309 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6461 | | /* 312 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6462 | | /* 315 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6463 | | /* 319 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6464 | | /* 323 */ { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6465 | | /* 326 */ { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6466 | | /* 328 */ { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6467 | | /* 331 */ { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6468 | | /* 334 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6469 | | /* 337 */ { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6470 | | /* 339 */ { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6471 | | /* 341 */ { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6472 | | /* 343 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6473 | | /* 346 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6474 | | /* 349 */ { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6475 | | /* 351 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6476 | | /* 353 */ { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6477 | | /* 356 */ { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6478 | | /* 359 */ { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6479 | | /* 362 */ { PPC::DMRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::DMRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6480 | | /* 364 */ { PPC::DMRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6481 | | /* 365 */ { PPC::DMRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::DMRRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::DMRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6482 | | /* 368 */ { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::DMRROWpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6483 | | /* 371 */ { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6484 | | /* 374 */ { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::WACC_HIRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6485 | | /* 377 */ { PPC::DMRROWpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6486 | | /* 380 */ { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6487 | | /* 383 */ { PPC::WACC_HIRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6488 | | /* 386 */ { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6489 | | /* 390 */ { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6490 | | /* 394 */ { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6491 | | /* 398 */ { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6492 | | /* 402 */ { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6493 | | /* 404 */ { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6494 | | /* 408 */ { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6495 | | /* 411 */ { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6496 | | /* 414 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6497 | | /* 417 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6498 | | /* 420 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6499 | | /* 423 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6500 | | /* 426 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6501 | | /* 429 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6502 | | /* 432 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6503 | | /* 435 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6504 | | /* 439 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6505 | | /* 443 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6506 | | /* 446 */ { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6507 | | /* 448 */ { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6508 | | /* 450 */ { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6509 | | /* 453 */ { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6510 | | /* 455 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6511 | | /* 458 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6512 | | /* 460 */ { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6513 | | /* 461 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6514 | | /* 463 */ { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6515 | | /* 466 */ { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6516 | | /* 469 */ { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6517 | | /* 472 */ { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6518 | | /* 475 */ { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6519 | | /* 479 */ { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6520 | | /* 481 */ { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6521 | | /* 484 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6522 | | /* 486 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6523 | | /* 489 */ { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6524 | | /* 491 */ { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6525 | | /* 494 */ { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6526 | | /* 496 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6527 | | /* 499 */ { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6528 | | /* 503 */ { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6529 | | /* 507 */ { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6530 | | /* 511 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6531 | | /* 513 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6532 | | /* 516 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRC_NOR0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6533 | | /* 520 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6534 | | /* 524 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6535 | | /* 527 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(1) }, |
6536 | | /* 531 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(1) }, |
6537 | | /* 535 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(1) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6538 | | /* 539 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(1) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6539 | | /* 543 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6540 | | /* 546 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
6541 | | /* 549 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
6542 | | /* 552 */ { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6543 | | /* 555 */ { PPC::GPRC_NOR0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::GPRC_NOR0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6544 | | /* 558 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6545 | | /* 561 */ { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6546 | | /* 564 */ { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6547 | | /* 567 */ { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(1) }, |
6548 | | /* 571 */ { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(1) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6549 | | /* 575 */ { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
6550 | | /* 578 */ { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6551 | | /* 581 */ { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(1) }, |
6552 | | /* 585 */ { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(1) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6553 | | /* 589 */ { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6554 | | /* 592 */ { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
6555 | | /* 595 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6556 | | /* 597 */ { PPC::G8pRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6557 | | /* 600 */ { PPC::G8pRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6558 | | /* 603 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6559 | | /* 606 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::GPRC_NOR0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6560 | | /* 609 */ { PPC::VFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6561 | | /* 612 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6562 | | /* 615 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6563 | | /* 618 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6564 | | /* 620 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6565 | | /* 623 */ { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6566 | | /* 626 */ { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6567 | | /* 629 */ { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6568 | | /* 632 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6569 | | /* 636 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6570 | | /* 640 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6571 | | /* 642 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6572 | | /* 643 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6573 | | /* 646 */ { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6574 | | /* 647 */ { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6575 | | /* 649 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
6576 | | /* 651 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
6577 | | /* 653 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6578 | | /* 655 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRSAVERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6579 | | /* 657 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6580 | | /* 659 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6581 | | /* 660 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6582 | | /* 662 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6583 | | /* 664 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6584 | | /* 666 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6585 | | /* 668 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6586 | | /* 672 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6587 | | /* 675 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6588 | | /* 677 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6589 | | /* 679 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6590 | | /* 681 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6591 | | /* 683 */ { PPC::VRSAVERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6592 | | /* 685 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6593 | | /* 687 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6594 | | /* 689 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6595 | | /* 691 */ { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6596 | | /* 693 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6597 | | /* 696 */ { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6598 | | /* 698 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6599 | | /* 701 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, |
6600 | | /* 704 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, |
6601 | | /* 707 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
6602 | | /* 710 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
6603 | | /* 713 */ { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, |
6604 | | /* 716 */ { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
6605 | | /* 719 */ { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, |
6606 | | /* 722 */ { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6607 | | /* 724 */ { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
6608 | | /* 727 */ { PPC::VFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, |
6609 | | /* 730 */ { PPC::VFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6610 | | /* 732 */ { PPC::VFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
6611 | | /* 735 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, |
6612 | | /* 738 */ { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, |
6613 | | /* 741 */ { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6614 | | /* 743 */ { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
6615 | | /* 746 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
6616 | | /* 749 */ { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6617 | | /* 755 */ { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6618 | | /* 762 */ { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6619 | | /* 768 */ { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6620 | | /* 775 */ { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6621 | | /* 780 */ { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6622 | | /* 786 */ { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6623 | | /* 791 */ { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6624 | | /* 797 */ { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6625 | | /* 802 */ { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6626 | | /* 808 */ { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6627 | | /* 813 */ { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6628 | | /* 819 */ { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6629 | | /* 826 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6630 | | /* 831 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6631 | | /* 836 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6632 | | /* 841 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6633 | | /* 846 */ { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6634 | | /* 849 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6635 | | /* 852 */ { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6636 | | /* 855 */ { PPC::G8pRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6637 | | /* 858 */ { PPC::UACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6638 | | /* 861 */ { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6639 | | /* 864 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6640 | | /* 868 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6641 | | /* 872 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6642 | | /* 877 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6643 | | /* 883 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6644 | | /* 889 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6645 | | /* 894 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6646 | | /* 899 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6647 | | /* 904 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6648 | | /* 909 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6649 | | /* 914 */ { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6650 | | /* 919 */ { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6651 | | /* 924 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRC_NOR0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRC_NOR0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6652 | | /* 929 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6653 | | /* 934 */ { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6654 | | /* 939 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6655 | | /* 944 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6656 | | /* 949 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6657 | | /* 953 */ { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6658 | | /* 957 */ { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6659 | | /* 961 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRC_NOR0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRC_NOR0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6660 | | /* 965 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6661 | | /* 969 */ { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6662 | | /* 973 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6663 | | /* 977 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6664 | | /* 981 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6665 | | /* 983 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6666 | | /* 985 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6667 | | /* 987 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6668 | | /* 989 */ { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6669 | | /* 991 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6670 | | /* 994 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8pRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6671 | | /* 997 */ { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(0) }, |
6672 | | /* 1001 */ { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(0) }, |
6673 | | /* 1005 */ { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6674 | | /* 1009 */ { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6675 | | /* 1013 */ { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(0) }, |
6676 | | /* 1017 */ { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6677 | | /* 1021 */ { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(0) }, |
6678 | | /* 1025 */ { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
6679 | | /* 1029 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6680 | | /* 1032 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6681 | | /* 1034 */ { -1, 0, MCOI::OPERAND_PCREL, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6682 | | /* 1036 */ { PPC::CTRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6683 | | /* 1038 */ { PPC::CTRRC8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6684 | | /* 1040 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6685 | | /* 1043 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6686 | | /* 1046 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6687 | | /* 1050 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6688 | | /* 1053 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6689 | | /* 1056 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6690 | | /* 1058 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6691 | | /* 1061 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6692 | | /* 1064 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6693 | | /* 1068 */ { PPC::VFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6694 | | /* 1070 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6695 | | /* 1073 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6696 | | /* 1077 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6697 | | /* 1081 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6698 | | /* 1085 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6699 | | /* 1089 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6700 | | /* 1093 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6701 | | /* 1097 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, |
6702 | | /* 1101 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6703 | | /* 1105 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::VFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6704 | | /* 1108 */ { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6705 | | /* 1110 */ { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6706 | | /* 1113 */ { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6707 | | /* 1116 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6708 | | /* 1119 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6709 | | /* 1122 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6710 | | /* 1124 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6711 | | /* 1126 */ { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6712 | | /* 1128 */ { PPC::VFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6713 | | /* 1130 */ { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6714 | | /* 1132 */ { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6715 | | /* 1134 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6716 | | /* 1137 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6717 | | /* 1140 */ { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6718 | | /* 1144 */ { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6719 | | /* 1148 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6720 | | /* 1152 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6721 | | /* 1156 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6722 | | /* 1158 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6723 | | /* 1161 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6724 | | /* 1164 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6725 | | /* 1166 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6726 | | /* 1169 */ { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6727 | | /* 1172 */ { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6728 | | /* 1176 */ { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6729 | | /* 1179 */ { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6730 | | /* 1183 */ { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6731 | | /* 1186 */ { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6732 | | /* 1190 */ { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6733 | | /* 1193 */ { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6734 | | /* 1197 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6735 | | /* 1201 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6736 | | /* 1204 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6737 | | /* 1206 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6738 | | /* 1209 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6739 | | /* 1213 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6740 | | /* 1218 */ { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6741 | | /* 1221 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6742 | | /* 1224 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6743 | | /* 1228 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6744 | | /* 1229 */ { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6745 | | /* 1230 */ { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6746 | | /* 1231 */ { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, |
6747 | | /* 1233 */ { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, |
6748 | | /* 1235 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6749 | | /* 1239 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6750 | | /* 1243 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6751 | | /* 1246 */ { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6752 | | /* 1247 */ { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
6753 | | /* 1248 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6754 | | /* 1252 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6755 | | /* 1255 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, |
6756 | | /* 1258 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
6757 | | /* 1261 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
6758 | | /* 1265 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
6759 | | /* 1268 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, |
6760 | | }, { |
6761 | | /* 0 */ |
6762 | | /* 0 */ PPC::CR0, |
6763 | | /* 1 */ PPC::CR7, |
6764 | | /* 2 */ PPC::XER, |
6765 | | /* 3 */ PPC::XER, PPC::CR0, |
6766 | | /* 5 */ PPC::CARRY, |
6767 | | /* 6 */ PPC::CARRY, PPC::XER, |
6768 | | /* 8 */ PPC::CARRY, PPC::XER, PPC::CR0, |
6769 | | /* 11 */ PPC::CARRY, PPC::CR0, |
6770 | | /* 13 */ PPC::CARRY, PPC::CARRY, |
6771 | | /* 15 */ PPC::CARRY, PPC::CARRY, PPC::XER, |
6772 | | /* 18 */ PPC::CARRY, PPC::CARRY, PPC::XER, PPC::CR0, |
6773 | | /* 22 */ PPC::CARRY, PPC::CARRY, PPC::CR0, |
6774 | | /* 25 */ PPC::X0, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X11, PPC::X12, PPC::LR8, PPC::CTR8, PPC::CR0, PPC::CR1, PPC::CR5, PPC::CR6, PPC::CR7, |
6775 | | /* 43 */ PPC::R0, PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R11, PPC::R12, PPC::LR, PPC::CTR, PPC::CR0, PPC::CR1, PPC::CR5, PPC::CR6, PPC::CR7, |
6776 | | /* 61 */ PPC::R1, PPC::R1, |
6777 | | /* 63 */ PPC::CTR, |
6778 | | /* 64 */ PPC::CTR8, |
6779 | | /* 65 */ PPC::CTR, PPC::RM, PPC::LR, |
6780 | | /* 68 */ PPC::CTR8, PPC::RM, PPC::LR8, |
6781 | | /* 71 */ PPC::RM, PPC::LR, |
6782 | | /* 73 */ PPC::LR, PPC::RM, |
6783 | | /* 75 */ PPC::LR, PPC::RM, PPC::LR, |
6784 | | /* 78 */ PPC::CR6, |
6785 | | /* 79 */ PPC::CTR8, PPC::RM, PPC::LR8, PPC::X2, |
6786 | | /* 83 */ PPC::CTR8, PPC::RM, PPC::LR8, PPC::X2, PPC::RM, |
6787 | | /* 88 */ PPC::CTR8, PPC::RM, PPC::LR8, PPC::RM, |
6788 | | /* 92 */ PPC::CTR, PPC::RM, PPC::LR, PPC::R2, |
6789 | | /* 96 */ PPC::CTR, PPC::RM, PPC::LR, PPC::R2, PPC::RM, |
6790 | | /* 101 */ PPC::CTR, PPC::RM, PPC::LR, PPC::RM, |
6791 | | /* 105 */ PPC::CTR, PPC::CTR, |
6792 | | /* 107 */ PPC::CTR8, PPC::CTR8, |
6793 | | /* 109 */ PPC::CTR, PPC::RM, PPC::CTR, |
6794 | | /* 112 */ PPC::CTR, PPC::LR, PPC::RM, PPC::CTR, |
6795 | | /* 116 */ PPC::CTR8, PPC::LR8, PPC::RM, PPC::CTR8, |
6796 | | /* 120 */ PPC::RM, PPC::LR8, |
6797 | | /* 122 */ PPC::RM, PPC::LR8, PPC::RM, |
6798 | | /* 125 */ PPC::RM, PPC::LR, PPC::RM, |
6799 | | /* 128 */ PPC::LR8, PPC::RM, |
6800 | | /* 130 */ PPC::CR1EQ, |
6801 | | /* 131 */ PPC::CR1, |
6802 | | /* 132 */ PPC::X1, PPC::X1, |
6803 | | /* 134 */ PPC::RM, |
6804 | | /* 135 */ PPC::RM, PPC::CR1, |
6805 | | /* 137 */ PPC::X0, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X11, PPC::X12, PPC::LR8, PPC::CTR8, PPC::CR0, PPC::CR1, PPC::CR5, PPC::CR6, PPC::CR7, |
6806 | | /* 154 */ PPC::R0, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R11, PPC::R12, PPC::LR, PPC::CTR, PPC::CR0, PPC::CR1, PPC::CR5, PPC::CR6, PPC::CR7, |
6807 | | /* 171 */ PPC::R0, PPC::R4, PPC::R5, PPC::R11, PPC::LR, PPC::CR0, |
6808 | | /* 177 */ PPC::X0, PPC::X4, PPC::X5, PPC::X11, PPC::LR8, PPC::CR0, |
6809 | | /* 183 */ PPC::X0, PPC::X2, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X11, PPC::X12, PPC::LR8, PPC::CTR8, PPC::CR0, PPC::CR1, PPC::CR5, PPC::CR6, PPC::CR7, |
6810 | | /* 201 */ PPC::R3, PPC::LR, |
6811 | | /* 203 */ PPC::LR, |
6812 | | /* 204 */ PPC::LR8, |
6813 | | /* 205 */ PPC::RM, PPC::RM, |
6814 | | /* 207 */ PPC::CTR, PPC::RM, |
6815 | | /* 209 */ PPC::CTR8, PPC::RM, |
6816 | | /* 211 */ PPC::RM, PPC::CR6, |
6817 | | /* 213 */ PPC::CTR, PPC::LR, PPC::RM, PPC::LR, PPC::CTR, |
6818 | | /* 218 */ PPC::CTR, PPC::RM, PPC::LR, PPC::CTR, |
6819 | | } |
6820 | | }; |
6821 | | |
6822 | | |
6823 | | #ifdef __GNUC__ |
6824 | | #pragma GCC diagnostic push |
6825 | | #pragma GCC diagnostic ignored "-Woverlength-strings" |
6826 | | #endif |
6827 | | extern const char PPCInstrNameData[] = { |
6828 | | /* 0 */ "G_FLOG10\0" |
6829 | | /* 9 */ "SYNCP10\0" |
6830 | | /* 17 */ "WAITP10\0" |
6831 | | /* 25 */ "G_FEXP10\0" |
6832 | | /* 34 */ "MTFSB0\0" |
6833 | | /* 41 */ "V_SET0\0" |
6834 | | /* 48 */ "VCTSXS_0\0" |
6835 | | /* 57 */ "VCTUXS_0\0" |
6836 | | /* 66 */ "VCFSX_0\0" |
6837 | | /* 74 */ "VCFUX_0\0" |
6838 | | /* 82 */ "MTFSB1\0" |
6839 | | /* 89 */ "DMXXINSTFDMR512\0" |
6840 | | /* 105 */ "DMXXEXTFDMR512\0" |
6841 | | /* 120 */ "ADDISdtprelHA32\0" |
6842 | | /* 136 */ "ATOMIC_LOAD_SUB_I32\0" |
6843 | | /* 156 */ "ATOMIC_LOAD_ADD_I32\0" |
6844 | | /* 176 */ "ATOMIC_LOAD_NAND_I32\0" |
6845 | | /* 197 */ "ATOMIC_LOAD_AND_I32\0" |
6846 | | /* 217 */ "ATOMIC_LOAD_UMIN_I32\0" |
6847 | | /* 238 */ "ATOMIC_LOAD_MIN_I32\0" |
6848 | | /* 258 */ "ATOMIC_SWAP_I32\0" |
6849 | | /* 274 */ "ATOMIC_CMP_SWAP_I32\0" |
6850 | | /* 294 */ "ATOMIC_LOAD_XOR_I32\0" |
6851 | | /* 314 */ "ATOMIC_LOAD_OR_I32\0" |
6852 | | /* 333 */ "ATOMIC_LOAD_UMAX_I32\0" |
6853 | | /* 354 */ "ATOMIC_LOAD_MAX_I32\0" |
6854 | | /* 374 */ "ADDItlsgdL32\0" |
6855 | | /* 387 */ "ADDItlsldL32\0" |
6856 | | /* 400 */ "LDgotTprelL32\0" |
6857 | | /* 414 */ "ADDIdtprelL32\0" |
6858 | | /* 428 */ "ADDItlsgdLADDR32\0" |
6859 | | /* 445 */ "ADDItlsldLADDR32\0" |
6860 | | /* 462 */ "GETtlsldADDR32\0" |
6861 | | /* 477 */ "GETtlsADDR32\0" |
6862 | | /* 490 */ "PREPARE_PROBED_ALLOCA_32\0" |
6863 | | /* 515 */ "LWA_32\0" |
6864 | | /* 522 */ "PROBED_STACKALLOC_32\0" |
6865 | | /* 543 */ "PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_32\0" |
6866 | | /* 585 */ "SRADI_32\0" |
6867 | | /* 594 */ "RLDICL_32\0" |
6868 | | /* 604 */ "RLDICR_32\0" |
6869 | | /* 614 */ "LHAXTLS_32\0" |
6870 | | /* 625 */ "LWAXTLS_32\0" |
6871 | | /* 636 */ "STBXTLS_32\0" |
6872 | | /* 647 */ "STHXTLS_32\0" |
6873 | | /* 658 */ "STWXTLS_32\0" |
6874 | | /* 669 */ "LBZXTLS_32\0" |
6875 | | /* 680 */ "LHZXTLS_32\0" |
6876 | | /* 691 */ "LWZXTLS_32\0" |
6877 | | /* 702 */ "EXTSW_32\0" |
6878 | | /* 711 */ "LWAX_32\0" |
6879 | | /* 719 */ "DFLOADf32\0" |
6880 | | /* 729 */ "XFLOADf32\0" |
6881 | | /* 739 */ "DFSTOREf32\0" |
6882 | | /* 750 */ "XFSTOREf32\0" |
6883 | | /* 761 */ "EH_SjLj_LongJmp32\0" |
6884 | | /* 779 */ "EH_SjLj_SetJmp32\0" |
6885 | | /* 796 */ "TLBRE2\0" |
6886 | | /* 803 */ "TLBWE2\0" |
6887 | | /* 810 */ "G_FLOG2\0" |
6888 | | /* 818 */ "G_FEXP2\0" |
6889 | | /* 826 */ "PMXVBF16GER2\0" |
6890 | | /* 839 */ "PMXVF16GER2\0" |
6891 | | /* 851 */ "PMXVI16GER2\0" |
6892 | | /* 863 */ "TLBSX2\0" |
6893 | | /* 870 */ "ATOMIC_LOAD_SUB_I64\0" |
6894 | | /* 890 */ "ATOMIC_LOAD_ADD_I64\0" |
6895 | | /* 910 */ "ATOMIC_LOAD_NAND_I64\0" |
6896 | | /* 931 */ "ATOMIC_LOAD_AND_I64\0" |
6897 | | /* 951 */ "ATOMIC_LOAD_UMIN_I64\0" |
6898 | | /* 972 */ "ATOMIC_LOAD_MIN_I64\0" |
6899 | | /* 992 */ "ATOMIC_SWAP_I64\0" |
6900 | | /* 1008 */ "ATOMIC_CMP_SWAP_I64\0" |
6901 | | /* 1028 */ "ATOMIC_LOAD_XOR_I64\0" |
6902 | | /* 1048 */ "ATOMIC_LOAD_OR_I64\0" |
6903 | | /* 1067 */ "ATOMIC_LOAD_UMAX_I64\0" |
6904 | | /* 1088 */ "ATOMIC_LOAD_MAX_I64\0" |
6905 | | /* 1108 */ "DST64\0" |
6906 | | /* 1114 */ "DSTST64\0" |
6907 | | /* 1122 */ "DSTT64\0" |
6908 | | /* 1129 */ "DSTSTT64\0" |
6909 | | /* 1138 */ "EXTSB8_32_64\0" |
6910 | | /* 1151 */ "EXTSH8_32_64\0" |
6911 | | /* 1164 */ "EXTSWSLI_32_64\0" |
6912 | | /* 1179 */ "RLDICL_32_64\0" |
6913 | | /* 1192 */ "EXTSW_32_64\0" |
6914 | | /* 1204 */ "PREPARE_PROBED_ALLOCA_64\0" |
6915 | | /* 1229 */ "PROBED_STACKALLOC_64\0" |
6916 | | /* 1250 */ "PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_64\0" |
6917 | | /* 1292 */ "DFLOADf64\0" |
6918 | | /* 1302 */ "XFLOADf64\0" |
6919 | | /* 1312 */ "DFSTOREf64\0" |
6920 | | /* 1323 */ "XFSTOREf64\0" |
6921 | | /* 1334 */ "EH_SjLj_LongJmp64\0" |
6922 | | /* 1352 */ "EH_SjLj_SetJmp64\0" |
6923 | | /* 1369 */ "ADD4\0" |
6924 | | /* 1374 */ "SELECT_CC_SPE4\0" |
6925 | | /* 1389 */ "SELECT_SPE4\0" |
6926 | | /* 1401 */ "SELECT_CC_F4\0" |
6927 | | /* 1414 */ "SELECT_F4\0" |
6928 | | /* 1424 */ "SELECT_CC_I4\0" |
6929 | | /* 1437 */ "SELECT_I4\0" |
6930 | | /* 1447 */ "PMXVI8GER4\0" |
6931 | | /* 1458 */ "XVCVSPBF16\0" |
6932 | | /* 1469 */ "SELECT_CC_F16\0" |
6933 | | /* 1483 */ "SELECT_F16\0" |
6934 | | /* 1494 */ "ATOMIC_LOAD_SUB_I16\0" |
6935 | | /* 1514 */ "ATOMIC_LOAD_ADD_I16\0" |
6936 | | /* 1534 */ "ATOMIC_LOAD_NAND_I16\0" |
6937 | | /* 1555 */ "ATOMIC_LOAD_AND_I16\0" |
6938 | | /* 1575 */ "ATOMIC_LOAD_UMIN_I16\0" |
6939 | | /* 1596 */ "ATOMIC_LOAD_MIN_I16\0" |
6940 | | /* 1616 */ "ATOMIC_SWAP_I16\0" |
6941 | | /* 1632 */ "ATOMIC_CMP_SWAP_I16\0" |
6942 | | /* 1652 */ "ATOMIC_LOAD_XOR_I16\0" |
6943 | | /* 1672 */ "ATOMIC_LOAD_OR_I16\0" |
6944 | | /* 1691 */ "ATOMIC_LOAD_UMAX_I16\0" |
6945 | | /* 1712 */ "ATOMIC_LOAD_MAX_I16\0" |
6946 | | /* 1732 */ "DMXXINSTFDMR256\0" |
6947 | | /* 1748 */ "DMXXEXTFDMR256\0" |
6948 | | /* 1763 */ "NOP_GT_PWR6\0" |
6949 | | /* 1775 */ "NOP_GT_PWR7\0" |
6950 | | /* 1787 */ "ATOMIC_LOAD_SUB_I128\0" |
6951 | | /* 1808 */ "ATOMIC_LOAD_ADD_I128\0" |
6952 | | /* 1829 */ "ATOMIC_LOAD_NAND_I128\0" |
6953 | | /* 1851 */ "ATOMIC_LOAD_AND_I128\0" |
6954 | | /* 1872 */ "ATOMIC_SWAP_I128\0" |
6955 | | /* 1889 */ "ATOMIC_CMP_SWAP_I128\0" |
6956 | | /* 1910 */ "ATOMIC_LOAD_XOR_I128\0" |
6957 | | /* 1931 */ "ATOMIC_LOAD_OR_I128\0" |
6958 | | /* 1951 */ "TAILBA8\0" |
6959 | | /* 1959 */ "PLHA8\0" |
6960 | | /* 1965 */ "ADDIStocHA8\0" |
6961 | | /* 1977 */ "BLA8\0" |
6962 | | /* 1982 */ "PLA8\0" |
6963 | | /* 1987 */ "PLWA8\0" |
6964 | | /* 1993 */ "TAILB8\0" |
6965 | | /* 2000 */ "CMPB8\0" |
6966 | | /* 2006 */ "CMPRB8\0" |
6967 | | /* 2013 */ "EXTSB8\0" |
6968 | | /* 2020 */ "SETB8\0" |
6969 | | /* 2026 */ "MFTB8\0" |
6970 | | /* 2032 */ "POPCNTB8\0" |
6971 | | /* 2041 */ "PSTB8\0" |
6972 | | /* 2047 */ "SETNBC8\0" |
6973 | | /* 2055 */ "SETBC8\0" |
6974 | | /* 2062 */ "ADDC8\0" |
6975 | | /* 2068 */ "ANDC8\0" |
6976 | | /* 2074 */ "SUBFC8\0" |
6977 | | /* 2081 */ "ADDIC8\0" |
6978 | | /* 2088 */ "SUBFIC8\0" |
6979 | | /* 2096 */ "DYNALLOC8\0" |
6980 | | /* 2106 */ "ORC8\0" |
6981 | | /* 2111 */ "CDTBCD8\0" |
6982 | | /* 2119 */ "ADD8\0" |
6983 | | /* 2124 */ "MADDLD8\0" |
6984 | | /* 2132 */ "NAND8\0" |
6985 | | /* 2138 */ "CBCDTD8\0" |
6986 | | /* 2146 */ "CFENCE8\0" |
6987 | | /* 2154 */ "ADDE8\0" |
6988 | | /* 2160 */ "SUBFE8\0" |
6989 | | /* 2167 */ "ADDME8\0" |
6990 | | /* 2174 */ "SUBFME8\0" |
6991 | | /* 2182 */ "ADDZE8\0" |
6992 | | /* 2189 */ "SUBFZE8\0" |
6993 | | /* 2197 */ "SUBF8\0" |
6994 | | /* 2203 */ "MFOCRF8\0" |
6995 | | /* 2211 */ "MTOCRF8\0" |
6996 | | /* 2219 */ "MTCRF8\0" |
6997 | | /* 2226 */ "SELECT_CC_F8\0" |
6998 | | /* 2239 */ "SELECT_F8\0" |
6999 | | /* 2249 */ "NEG8\0" |
7000 | | /* 2254 */ "BRH8\0" |
7001 | | /* 2259 */ "EXTSH8\0" |
7002 | | /* 2266 */ "PSTH8\0" |
7003 | | /* 2272 */ "PADDI8\0" |
7004 | | /* 2279 */ "MULLI8\0" |
7005 | | /* 2286 */ "PLI8\0" |
7006 | | /* 2291 */ "RLWIMI8\0" |
7007 | | /* 2299 */ "XORI8\0" |
7008 | | /* 2305 */ "ATOMIC_LOAD_SUB_I8\0" |
7009 | | /* 2324 */ "SELECT_CC_I8\0" |
7010 | | /* 2337 */ "ATOMIC_LOAD_ADD_I8\0" |
7011 | | /* 2356 */ "ATOMIC_LOAD_NAND_I8\0" |
7012 | | /* 2376 */ "ATOMIC_LOAD_AND_I8\0" |
7013 | | /* 2395 */ "ATOMIC_LOAD_UMIN_I8\0" |
7014 | | /* 2415 */ "ATOMIC_LOAD_MIN_I8\0" |
7015 | | /* 2434 */ "ATOMIC_SWAP_I8\0" |
7016 | | /* 2449 */ "ATOMIC_CMP_SWAP_I8\0" |
7017 | | /* 2468 */ "ATOMIC_LOAD_XOR_I8\0" |
7018 | | /* 2487 */ "ATOMIC_LOAD_OR_I8\0" |
7019 | | /* 2505 */ "SELECT_I8\0" |
7020 | | /* 2515 */ "ATOMIC_LOAD_UMAX_I8\0" |
7021 | | /* 2535 */ "ATOMIC_LOAD_MAX_I8\0" |
7022 | | /* 2554 */ "HASHCHK8\0" |
7023 | | /* 2563 */ "BL8\0" |
7024 | | /* 2567 */ "ISEL8\0" |
7025 | | /* 2573 */ "BCTRL8\0" |
7026 | | /* 2580 */ "BCCTRL8\0" |
7027 | | /* 2588 */ "BCCCTRL8\0" |
7028 | | /* 2597 */ "RLWINM8\0" |
7029 | | /* 2605 */ "RLWNM8\0" |
7030 | | /* 2612 */ "HASHCHKP8\0" |
7031 | | /* 2622 */ "HASHSTP8\0" |
7032 | | /* 2631 */ "SETNBCR8\0" |
7033 | | /* 2640 */ "SETBCR8\0" |
7034 | | /* 2648 */ "MFCR8\0" |
7035 | | /* 2654 */ "PMXVI4GER8\0" |
7036 | | /* 2665 */ "BLR8\0" |
7037 | | /* 2670 */ "MFLR8\0" |
7038 | | /* 2676 */ "MTLR8\0" |
7039 | | /* 2682 */ "BDZLR8\0" |
7040 | | /* 2689 */ "BDNZLR8\0" |
7041 | | /* 2697 */ "MovePCtoLR8\0" |
7042 | | /* 2709 */ "NOR8\0" |
7043 | | /* 2714 */ "XOR8\0" |
7044 | | /* 2719 */ "MFSPR8\0" |
7045 | | /* 2726 */ "MTSPR8\0" |
7046 | | /* 2733 */ "TAILBCTR8\0" |
7047 | | /* 2743 */ "BCCTR8\0" |
7048 | | /* 2750 */ "BCCCTR8\0" |
7049 | | /* 2758 */ "MFCTR8\0" |
7050 | | /* 2765 */ "MTCTR8\0" |
7051 | | /* 2772 */ "ADDG6S8\0" |
7052 | | /* 2780 */ "ADDIS8\0" |
7053 | | /* 2787 */ "LIS8\0" |
7054 | | /* 2792 */ "XORIS8\0" |
7055 | | /* 2799 */ "DYNAREAOFFSET8\0" |
7056 | | /* 2814 */ "ANDI_rec_1_EQ_BIT8\0" |
7057 | | /* 2833 */ "ANDI_rec_1_GT_BIT8\0" |
7058 | | /* 2852 */ "HASHST8\0" |
7059 | | /* 2860 */ "LHAU8\0" |
7060 | | /* 2866 */ "STBU8\0" |
7061 | | /* 2872 */ "STHU8\0" |
7062 | | /* 2878 */ "STWU8\0" |
7063 | | /* 2884 */ "LBZU8\0" |
7064 | | /* 2890 */ "LHZU8\0" |
7065 | | /* 2896 */ "LWZU8\0" |
7066 | | /* 2902 */ "EQV8\0" |
7067 | | /* 2907 */ "SLW8\0" |
7068 | | /* 2912 */ "BRW8\0" |
7069 | | /* 2917 */ "SRW8\0" |
7070 | | /* 2922 */ "PSTW8\0" |
7071 | | /* 2928 */ "CNTLZW8\0" |
7072 | | /* 2936 */ "CNTTZW8\0" |
7073 | | /* 2944 */ "LHAX8\0" |
7074 | | /* 2950 */ "STBX8\0" |
7075 | | /* 2956 */ "ADDEX8\0" |
7076 | | /* 2963 */ "STHX8\0" |
7077 | | /* 2969 */ "TLSGDAIX8\0" |
7078 | | /* 2979 */ "LHBRX8\0" |
7079 | | /* 2986 */ "LWBRX8\0" |
7080 | | /* 2993 */ "LHAUX8\0" |
7081 | | /* 3000 */ "STBUX8\0" |
7082 | | /* 3007 */ "STHUX8\0" |
7083 | | /* 3014 */ "STWUX8\0" |
7084 | | /* 3021 */ "LBZUX8\0" |
7085 | | /* 3028 */ "LHZUX8\0" |
7086 | | /* 3035 */ "LWZUX8\0" |
7087 | | /* 3042 */ "STWX8\0" |
7088 | | /* 3048 */ "LBZX8\0" |
7089 | | /* 3054 */ "LHZX8\0" |
7090 | | /* 3060 */ "LWZX8\0" |
7091 | | /* 3066 */ "CP_COPY8\0" |
7092 | | /* 3075 */ "PLBZ8\0" |
7093 | | /* 3081 */ "BDZ8\0" |
7094 | | /* 3086 */ "PLHZ8\0" |
7095 | | /* 3092 */ "BDNZ8\0" |
7096 | | /* 3098 */ "PLWZ8\0" |
7097 | | /* 3104 */ "ADDItoc8\0" |
7098 | | /* 3113 */ "TCRETURNai8\0" |
7099 | | /* 3125 */ "TCRETURNdi8\0" |
7100 | | /* 3137 */ "TCRETURNri8\0" |
7101 | | /* 3149 */ "EVMHEGSMFAA\0" |
7102 | | /* 3161 */ "EVMHOGSMFAA\0" |
7103 | | /* 3173 */ "EVMWSMFAA\0" |
7104 | | /* 3183 */ "EVMWSSFAA\0" |
7105 | | /* 3193 */ "EVMHEGSMIAA\0" |
7106 | | /* 3205 */ "EVMHOGSMIAA\0" |
7107 | | /* 3217 */ "EVMWSMIAA\0" |
7108 | | /* 3227 */ "EVMHEGUMIAA\0" |
7109 | | /* 3239 */ "EVMHOGUMIAA\0" |
7110 | | /* 3251 */ "EVMWUMIAA\0" |
7111 | | /* 3261 */ "DCBA\0" |
7112 | | /* 3266 */ "TAILBA\0" |
7113 | | /* 3273 */ "LDtocBA\0" |
7114 | | /* 3281 */ "gBCA\0" |
7115 | | /* 3286 */ "BCCA\0" |
7116 | | /* 3291 */ "EVMHESMFA\0" |
7117 | | /* 3301 */ "EVMWHSMFA\0" |
7118 | | /* 3311 */ "EVMHOSMFA\0" |
7119 | | /* 3321 */ "EVMWSMFA\0" |
7120 | | /* 3330 */ "EVMHESSFA\0" |
7121 | | /* 3340 */ "EVMWHSSFA\0" |
7122 | | /* 3350 */ "EVMHOSSFA\0" |
7123 | | /* 3360 */ "EVMWSSFA\0" |
7124 | | /* 3369 */ "PLHA\0" |
7125 | | /* 3374 */ "ADDIStocHA\0" |
7126 | | /* 3385 */ "ADDIStlsgdHA\0" |
7127 | | /* 3398 */ "ADDIStlsldHA\0" |
7128 | | /* 3411 */ "ADDISgotTprelHA\0" |
7129 | | /* 3427 */ "ADDISdtprelHA\0" |
7130 | | /* 3441 */ "SLBIA\0" |
7131 | | /* 3447 */ "TLBIA\0" |
7132 | | /* 3453 */ "EVMHESMIA\0" |
7133 | | /* 3463 */ "EVMWHSMIA\0" |
7134 | | /* 3473 */ "EVMHOSMIA\0" |
7135 | | /* 3483 */ "EVMWSMIA\0" |
7136 | | /* 3492 */ "EVMHEUMIA\0" |
7137 | | /* 3502 */ "EVMWHUMIA\0" |
7138 | | /* 3512 */ "EVMWLUMIA\0" |
7139 | | /* 3522 */ "EVMHOUMIA\0" |
7140 | | /* 3532 */ "EVMWUMIA\0" |
7141 | | /* 3541 */ "BLA\0" |
7142 | | /* 3545 */ "gBCLA\0" |
7143 | | /* 3551 */ "BCCLA\0" |
7144 | | /* 3557 */ "PLA\0" |
7145 | | /* 3561 */ "BDZLA\0" |
7146 | | /* 3567 */ "BDNZLA\0" |
7147 | | /* 3574 */ "G_FMA\0" |
7148 | | /* 3580 */ "G_STRICT_FMA\0" |
7149 | | /* 3593 */ "EVMRA\0" |
7150 | | /* 3599 */ "DQUA\0" |
7151 | | /* 3604 */ "PLWA\0" |
7152 | | /* 3609 */ "MTVSRWA\0" |
7153 | | /* 3617 */ "MTVRWA\0" |
7154 | | /* 3624 */ "BDZA\0" |
7155 | | /* 3629 */ "BDNZA\0" |
7156 | | /* 3635 */ "V_SET0B\0" |
7157 | | /* 3643 */ "VSRAB\0" |
7158 | | /* 3649 */ "RFEBB\0" |
7159 | | /* 3655 */ "VCNTMBB\0" |
7160 | | /* 3663 */ "XVTLSBB\0" |
7161 | | /* 3671 */ "VCLZLSBB\0" |
7162 | | /* 3680 */ "VCTZLSBB\0" |
7163 | | /* 3689 */ "VCMPNEB\0" |
7164 | | /* 3697 */ "VMRGHB\0" |
7165 | | /* 3704 */ "XXSPLTIB\0" |
7166 | | /* 3713 */ "VMRGLB\0" |
7167 | | /* 3720 */ "TAILB\0" |
7168 | | /* 3726 */ "VCLRLB\0" |
7169 | | /* 3733 */ "VRLB\0" |
7170 | | /* 3738 */ "VSLB\0" |
7171 | | /* 3743 */ "VPMSUMB\0" |
7172 | | /* 3751 */ "VGNB\0" |
7173 | | /* 3756 */ "CMPB\0" |
7174 | | /* 3761 */ "CMPEQB\0" |
7175 | | /* 3768 */ "CLRBHRB\0" |
7176 | | /* 3776 */ "CMPRB\0" |
7177 | | /* 3782 */ "VCLRRB\0" |
7178 | | /* 3789 */ "VSRB\0" |
7179 | | /* 3794 */ "VMULESB\0" |
7180 | | /* 3802 */ "V_SETALLONESB\0" |
7181 | | /* 3816 */ "VAVGSB\0" |
7182 | | /* 3823 */ "VUPKHSB\0" |
7183 | | /* 3831 */ "VSPLTISB\0" |
7184 | | /* 3840 */ "VUPKLSB\0" |
7185 | | /* 3848 */ "VMINSB\0" |
7186 | | /* 3855 */ "VMULOSB\0" |
7187 | | /* 3863 */ "VCMPGTSB\0" |
7188 | | /* 3872 */ "EVEXTSB\0" |
7189 | | /* 3880 */ "VMAXSB\0" |
7190 | | /* 3887 */ "SETB\0" |
7191 | | /* 3892 */ "MFTB\0" |
7192 | | /* 3897 */ "VSPLTB\0" |
7193 | | /* 3904 */ "VPOPCNTB\0" |
7194 | | /* 3913 */ "VINSERTB\0" |
7195 | | /* 3922 */ "PSTB\0" |
7196 | | /* 3927 */ "ReadTB\0" |
7197 | | /* 3934 */ "VABSDUB\0" |
7198 | | /* 3942 */ "VMULEUB\0" |
7199 | | /* 3950 */ "VAVGUB\0" |
7200 | | /* 3957 */ "VMINUB\0" |
7201 | | /* 3964 */ "VMULOUB\0" |
7202 | | /* 3972 */ "VCMPEQUB\0" |
7203 | | /* 3981 */ "EFDSUB\0" |
7204 | | /* 3988 */ "G_FSUB\0" |
7205 | | /* 3995 */ "G_STRICT_FSUB\0" |
7206 | | /* 4009 */ "G_ATOMICRMW_FSUB\0" |
7207 | | /* 4026 */ "FMSUB\0" |
7208 | | /* 4032 */ "FNMSUB\0" |
7209 | | /* 4039 */ "EFSSUB\0" |
7210 | | /* 4046 */ "EVFSSUB\0" |
7211 | | /* 4054 */ "G_SUB\0" |
7212 | | /* 4060 */ "G_ATOMICRMW_SUB\0" |
7213 | | /* 4076 */ "VEXTRACTUB\0" |
7214 | | /* 4087 */ "VCMPGTUB\0" |
7215 | | /* 4096 */ "VMAXUB\0" |
7216 | | /* 4103 */ "XXBLENDVB\0" |
7217 | | /* 4113 */ "VCMPNEZB\0" |
7218 | | /* 4122 */ "VCLZB\0" |
7219 | | /* 4128 */ "VCTZB\0" |
7220 | | /* 4134 */ "SETNBC\0" |
7221 | | /* 4141 */ "SETBC\0" |
7222 | | /* 4147 */ "gBC\0" |
7223 | | /* 4151 */ "XXMFACC\0" |
7224 | | /* 4159 */ "XXMTACC\0" |
7225 | | /* 4167 */ "BUILD_UACC\0" |
7226 | | /* 4178 */ "RESTORE_UACC\0" |
7227 | | /* 4191 */ "SPILL_UACC\0" |
7228 | | /* 4202 */ "RESTORE_WACC\0" |
7229 | | /* 4215 */ "SPILL_WACC\0" |
7230 | | /* 4226 */ "RESTORE_ACC\0" |
7231 | | /* 4238 */ "SPILL_ACC\0" |
7232 | | /* 4248 */ "BCC\0" |
7233 | | /* 4252 */ "ADDC\0" |
7234 | | /* 4257 */ "XXLANDC\0" |
7235 | | /* 4265 */ "CRANDC\0" |
7236 | | /* 4272 */ "EVANDC\0" |
7237 | | /* 4279 */ "TABORTDC\0" |
7238 | | /* 4288 */ "DTSTDC\0" |
7239 | | /* 4295 */ "SUBFC\0" |
7240 | | /* 4301 */ "SUBIC\0" |
7241 | | /* 4307 */ "ADDIC\0" |
7242 | | /* 4313 */ "RLDIC\0" |
7243 | | /* 4319 */ "SUBFIC\0" |
7244 | | /* 4326 */ "XSRDPIC\0" |
7245 | | /* 4334 */ "XVRDPIC\0" |
7246 | | /* 4342 */ "XVRSPIC\0" |
7247 | | /* 4350 */ "G_INTRINSIC\0" |
7248 | | /* 4362 */ "ICBLC\0" |
7249 | | /* 4368 */ "BRINC\0" |
7250 | | /* 4374 */ "G_FPTRUNC\0" |
7251 | | /* 4384 */ "G_INTRINSIC_TRUNC\0" |
7252 | | /* 4402 */ "G_TRUNC\0" |
7253 | | /* 4410 */ "G_BUILD_VECTOR_TRUNC\0" |
7254 | | /* 4431 */ "SLBSYNC\0" |
7255 | | /* 4439 */ "TLBSYNC\0" |
7256 | | /* 4447 */ "MSGSYNC\0" |
7257 | | /* 4455 */ "ISYNC\0" |
7258 | | /* 4461 */ "MSYNC\0" |
7259 | | /* 4467 */ "G_DYN_STACKALLOC\0" |
7260 | | /* 4484 */ "DYNALLOC\0" |
7261 | | /* 4493 */ "BL8_NOTOC\0" |
7262 | | /* 4503 */ "SELECT_CC_VSFRC\0" |
7263 | | /* 4519 */ "SELECT_VSFRC\0" |
7264 | | /* 4532 */ "XXLORC\0" |
7265 | | /* 4539 */ "CRORC\0" |
7266 | | /* 4545 */ "EVORC\0" |
7267 | | /* 4551 */ "SELECT_CC_VRRC\0" |
7268 | | /* 4566 */ "SELECT_VRRC\0" |
7269 | | /* 4578 */ "SELECT_CC_VSSRC\0" |
7270 | | /* 4594 */ "SELECT_VSSRC\0" |
7271 | | /* 4607 */ "SELECT_CC_VSRC\0" |
7272 | | /* 4622 */ "SELECT_VSRC\0" |
7273 | | /* 4634 */ "SC\0" |
7274 | | /* 4637 */ "TABORTWC\0" |
7275 | | /* 4646 */ "VEXTSB2D\0" |
7276 | | /* 4655 */ "VEXTSH2D\0" |
7277 | | /* 4664 */ "VEXTSW2D\0" |
7278 | | /* 4673 */ "TLBSX2D\0" |
7279 | | /* 4681 */ "G_FMAD\0" |
7280 | | /* 4688 */ "VSHASIGMAD\0" |
7281 | | /* 4699 */ "G_INDEXED_SEXTLOAD\0" |
7282 | | /* 4718 */ "G_SEXTLOAD\0" |
7283 | | /* 4729 */ "G_INDEXED_ZEXTLOAD\0" |
7284 | | /* 4748 */ "G_ZEXTLOAD\0" |
7285 | | /* 4759 */ "G_INDEXED_LOAD\0" |
7286 | | /* 4774 */ "G_LOAD\0" |
7287 | | /* 4781 */ "VSRAD\0" |
7288 | | /* 4787 */ "VGBBD\0" |
7289 | | /* 4793 */ "VCNTMBD\0" |
7290 | | /* 4801 */ "VPRTYBD\0" |
7291 | | /* 4809 */ "DENBCD\0" |
7292 | | /* 4816 */ "CDTBCD\0" |
7293 | | /* 4823 */ "EFDADD\0" |
7294 | | /* 4830 */ "G_VECREDUCE_FADD\0" |
7295 | | /* 4847 */ "G_FADD\0" |
7296 | | /* 4854 */ "G_VECREDUCE_SEQ_FADD\0" |
7297 | | /* 4875 */ "G_STRICT_FADD\0" |
7298 | | /* 4889 */ "G_ATOMICRMW_FADD\0" |
7299 | | /* 4906 */ "FMADD\0" |
7300 | | /* 4912 */ "FNMADD\0" |
7301 | | /* 4919 */ "EFSADD\0" |
7302 | | /* 4926 */ "EVFSADD\0" |
7303 | | /* 4934 */ "G_VECREDUCE_ADD\0" |
7304 | | /* 4950 */ "G_ADD\0" |
7305 | | /* 4956 */ "G_PTR_ADD\0" |
7306 | | /* 4966 */ "G_ATOMICRMW_ADD\0" |
7307 | | /* 4982 */ "EVLDD\0" |
7308 | | /* 4988 */ "MTVSRDD\0" |
7309 | | /* 4996 */ "EVSTDD\0" |
7310 | | /* 5003 */ "VCFUGED\0" |
7311 | | /* 5011 */ "EFSCFD\0" |
7312 | | /* 5018 */ "PLFD\0" |
7313 | | /* 5023 */ "PSTFD\0" |
7314 | | /* 5029 */ "FNEGD\0" |
7315 | | /* 5035 */ "VNEGD\0" |
7316 | | /* 5041 */ "MADDHD\0" |
7317 | | /* 5048 */ "MULHD\0" |
7318 | | /* 5054 */ "FCFID\0" |
7319 | | /* 5060 */ "HRFID\0" |
7320 | | /* 5066 */ "EFDCFSID\0" |
7321 | | /* 5075 */ "FCTID\0" |
7322 | | /* 5081 */ "EFDCFUID\0" |
7323 | | /* 5090 */ "TLBLD\0" |
7324 | | /* 5096 */ "MADDLD\0" |
7325 | | /* 5103 */ "FSELD\0" |
7326 | | /* 5109 */ "VMULLD\0" |
7327 | | /* 5116 */ "CMPLD\0" |
7328 | | /* 5122 */ "MFVSRLD\0" |
7329 | | /* 5130 */ "VRLD\0" |
7330 | | /* 5135 */ "VSLD\0" |
7331 | | /* 5140 */ "SPILLTOVSR_LD\0" |
7332 | | /* 5154 */ "FRIMD\0" |
7333 | | /* 5160 */ "VBPERMD\0" |
7334 | | /* 5168 */ "VPMSUMD\0" |
7335 | | /* 5176 */ "XXLAND\0" |
7336 | | /* 5183 */ "XXLNAND\0" |
7337 | | /* 5191 */ "CRNAND\0" |
7338 | | /* 5198 */ "EVNAND\0" |
7339 | | /* 5205 */ "G_ATOMICRMW_NAND\0" |
7340 | | /* 5222 */ "CRAND\0" |
7341 | | /* 5228 */ "EVAND\0" |
7342 | | /* 5234 */ "G_VECREDUCE_AND\0" |
7343 | | /* 5250 */ "G_AND\0" |
7344 | | /* 5256 */ "G_ATOMICRMW_AND\0" |
7345 | | /* 5272 */ "TEND\0" |
7346 | | /* 5277 */ "LIFETIME_END\0" |
7347 | | /* 5290 */ "FCPSGND\0" |
7348 | | /* 5298 */ "FRIND\0" |
7349 | | /* 5304 */ "G_BRCOND\0" |
7350 | | /* 5313 */ "DRRND\0" |
7351 | | /* 5319 */ "SETRND\0" |
7352 | | /* 5326 */ "G_LLROUND\0" |
7353 | | /* 5336 */ "G_LROUND\0" |
7354 | | /* 5345 */ "G_INTRINSIC_ROUND\0" |
7355 | | /* 5363 */ "G_INTRINSIC_FPTRUNC_ROUND\0" |
7356 | | /* 5389 */ "FCMPOD\0" |
7357 | | /* 5396 */ "DDEDPD\0" |
7358 | | /* 5403 */ "VPDEPD\0" |
7359 | | /* 5410 */ "FRIPD\0" |
7360 | | /* 5416 */ "CMPD\0" |
7361 | | /* 5421 */ "LOAD_STACK_GUARD\0" |
7362 | | /* 5438 */ "XXBRD\0" |
7363 | | /* 5444 */ "BUILD_QUADWORD\0" |
7364 | | /* 5459 */ "RESTORE_QUADWORD\0" |
7365 | | /* 5476 */ "SPILL_QUADWORD\0" |
7366 | | /* 5491 */ "SPLIT_QUADWORD\0" |
7367 | | /* 5506 */ "MTMSRD\0" |
7368 | | /* 5513 */ "MFVSRD\0" |
7369 | | /* 5520 */ "MTVSRD\0" |
7370 | | /* 5527 */ "MFVRD\0" |
7371 | | /* 5533 */ "MTVRD\0" |
7372 | | /* 5539 */ "FABSD\0" |
7373 | | /* 5545 */ "FNABSD\0" |
7374 | | /* 5552 */ "VMODSD\0" |
7375 | | /* 5559 */ "VMULESD\0" |
7376 | | /* 5567 */ "VDIVESD\0" |
7377 | | /* 5575 */ "VMULHSD\0" |
7378 | | /* 5583 */ "VMINSD\0" |
7379 | | /* 5590 */ "VINSD\0" |
7380 | | /* 5596 */ "VMULOSD\0" |
7381 | | /* 5604 */ "VCMPGTSD\0" |
7382 | | /* 5613 */ "VDIVSD\0" |
7383 | | /* 5620 */ "VMAXSD\0" |
7384 | | /* 5627 */ "PLXSD\0" |
7385 | | /* 5633 */ "PSTXSD\0" |
7386 | | /* 5640 */ "VEXTRACTD\0" |
7387 | | /* 5650 */ "CBCDTD\0" |
7388 | | /* 5657 */ "VPOPCNTD\0" |
7389 | | /* 5666 */ "VINSERTD\0" |
7390 | | /* 5675 */ "PSTD\0" |
7391 | | /* 5680 */ "VPEXTD\0" |
7392 | | /* 5687 */ "VMSUMCUD\0" |
7393 | | /* 5696 */ "VMODUD\0" |
7394 | | /* 5703 */ "VMULEUD\0" |
7395 | | /* 5711 */ "VDIVEUD\0" |
7396 | | /* 5719 */ "VMULHUD\0" |
7397 | | /* 5727 */ "VMINUD\0" |
7398 | | /* 5734 */ "VMULOUD\0" |
7399 | | /* 5742 */ "FCMPUD\0" |
7400 | | /* 5749 */ "VCMPEQUD\0" |
7401 | | /* 5758 */ "VCMPGTUD\0" |
7402 | | /* 5767 */ "VDIVUD\0" |
7403 | | /* 5774 */ "VMAXUD\0" |
7404 | | /* 5781 */ "XXBLENDVD\0" |
7405 | | /* 5791 */ "DIVD\0" |
7406 | | /* 5796 */ "FRIZD\0" |
7407 | | /* 5802 */ "VCLZD\0" |
7408 | | /* 5808 */ "CNTLZD\0" |
7409 | | /* 5815 */ "VCTZD\0" |
7410 | | /* 5821 */ "CNTTZD\0" |
7411 | | /* 5828 */ "PSEUDO_PROBE\0" |
7412 | | /* 5841 */ "MFBHRBE\0" |
7413 | | /* 5849 */ "G_SSUBE\0" |
7414 | | /* 5857 */ "G_USUBE\0" |
7415 | | /* 5865 */ "CFENCE\0" |
7416 | | /* 5872 */ "G_FENCE\0" |
7417 | | /* 5880 */ "ARITH_FENCE\0" |
7418 | | /* 5892 */ "REG_SEQUENCE\0" |
7419 | | /* 5905 */ "MFFSCE\0" |
7420 | | /* 5912 */ "G_SADDE\0" |
7421 | | /* 5920 */ "G_UADDE\0" |
7422 | | /* 5928 */ "G_GET_FPMODE\0" |
7423 | | /* 5941 */ "G_RESET_FPMODE\0" |
7424 | | /* 5956 */ "G_SET_FPMODE\0" |
7425 | | /* 5969 */ "DIVDE\0" |
7426 | | /* 5975 */ "G_FMINNUM_IEEE\0" |
7427 | | /* 5990 */ "G_FMAXNUM_IEEE\0" |
7428 | | /* 6005 */ "SLBMFEE\0" |
7429 | | /* 6013 */ "WRTEE\0" |
7430 | | /* 6019 */ "SUBFE\0" |
7431 | | /* 6025 */ "EVLWHE\0" |
7432 | | /* 6032 */ "EVSTWHE\0" |
7433 | | /* 6040 */ "SLBIE\0" |
7434 | | /* 6046 */ "TLBIE\0" |
7435 | | /* 6052 */ "G_JUMP_TABLE\0" |
7436 | | /* 6065 */ "BUNDLE\0" |
7437 | | /* 6072 */ "ADDME\0" |
7438 | | /* 6078 */ "SUBFME\0" |
7439 | | /* 6085 */ "G_MEMCPY_INLINE\0" |
7440 | | /* 6101 */ "LOCAL_ESCAPE\0" |
7441 | | /* 6114 */ "SELECT_CC_SPE\0" |
7442 | | /* 6128 */ "SELECT_SPE\0" |
7443 | | /* 6139 */ "TLBRE\0" |
7444 | | /* 6145 */ "FRE\0" |
7445 | | /* 6149 */ "G_STACKRESTORE\0" |
7446 | | /* 6164 */ "G_INDEXED_STORE\0" |
7447 | | /* 6180 */ "G_STORE\0" |
7448 | | /* 6188 */ "G_BITREVERSE\0" |
7449 | | /* 6201 */ "SLBMTE\0" |
7450 | | /* 6208 */ "FRSQRTE\0" |
7451 | | /* 6216 */ "DBG_VALUE\0" |
7452 | | /* 6226 */ "G_GLOBAL_VALUE\0" |
7453 | | /* 6241 */ "G_STACKSAVE\0" |
7454 | | /* 6253 */ "MFVRSAVE\0" |
7455 | | /* 6262 */ "MTVRSAVE\0" |
7456 | | /* 6271 */ "G_MEMMOVE\0" |
7457 | | /* 6281 */ "TLBWE\0" |
7458 | | /* 6287 */ "DIVWE\0" |
7459 | | /* 6293 */ "EVSTWWE\0" |
7460 | | /* 6301 */ "ADDZE\0" |
7461 | | /* 6307 */ "G_FREEZE\0" |
7462 | | /* 6316 */ "SUBFZE\0" |
7463 | | /* 6323 */ "G_FCANONICALIZE\0" |
7464 | | /* 6339 */ "DCBF\0" |
7465 | | /* 6344 */ "SUBF\0" |
7466 | | /* 6349 */ "G_CTLZ_ZERO_UNDEF\0" |
7467 | | /* 6367 */ "G_CTTZ_ZERO_UNDEF\0" |
7468 | | /* 6385 */ "G_IMPLICIT_DEF\0" |
7469 | | /* 6400 */ "DBG_INSTR_REF\0" |
7470 | | /* 6414 */ "EVMHESMF\0" |
7471 | | /* 6423 */ "EVMWHSMF\0" |
7472 | | /* 6432 */ "EVMHOSMF\0" |
7473 | | /* 6441 */ "EVMWSMF\0" |
7474 | | /* 6449 */ "MCRF\0" |
7475 | | /* 6454 */ "MFOCRF\0" |
7476 | | /* 6461 */ "MTOCRF\0" |
7477 | | /* 6468 */ "MTCRF\0" |
7478 | | /* 6474 */ "EFDCFSF\0" |
7479 | | /* 6482 */ "EFSCFSF\0" |
7480 | | /* 6490 */ "EVFSCFSF\0" |
7481 | | /* 6499 */ "MTFSF\0" |
7482 | | /* 6505 */ "EVMHESSF\0" |
7483 | | /* 6514 */ "EVMWHSSF\0" |
7484 | | /* 6523 */ "EVMHOSSF\0" |
7485 | | /* 6532 */ "EVMWSSF\0" |
7486 | | /* 6540 */ "EFDCTSF\0" |
7487 | | /* 6548 */ "EFSCTSF\0" |
7488 | | /* 6556 */ "EVFSCTSF\0" |
7489 | | /* 6565 */ "DTSTSF\0" |
7490 | | /* 6572 */ "EFDCFUF\0" |
7491 | | /* 6580 */ "EFSCFUF\0" |
7492 | | /* 6588 */ "EVFSCFUF\0" |
7493 | | /* 6597 */ "EFDCTUF\0" |
7494 | | /* 6605 */ "EFSCTUF\0" |
7495 | | /* 6613 */ "EVFSCTUF\0" |
7496 | | /* 6622 */ "DTSTDG\0" |
7497 | | /* 6629 */ "SLBIEG\0" |
7498 | | /* 6636 */ "EFDNEG\0" |
7499 | | /* 6643 */ "G_FNEG\0" |
7500 | | /* 6650 */ "EFSNEG\0" |
7501 | | /* 6657 */ "EVFSNEG\0" |
7502 | | /* 6665 */ "EVNEG\0" |
7503 | | /* 6671 */ "EXTRACT_SUBREG\0" |
7504 | | /* 6686 */ "INSERT_SUBREG\0" |
7505 | | /* 6700 */ "G_SEXT_INREG\0" |
7506 | | /* 6713 */ "SUBREG_TO_REG\0" |
7507 | | /* 6727 */ "G_ATOMIC_CMPXCHG\0" |
7508 | | /* 6744 */ "G_ATOMICRMW_XCHG\0" |
7509 | | /* 6761 */ "G_FLOG\0" |
7510 | | /* 6768 */ "G_VAARG\0" |
7511 | | /* 6776 */ "PREALLOCATED_ARG\0" |
7512 | | /* 6793 */ "V_SET0H\0" |
7513 | | /* 6801 */ "VSRAH\0" |
7514 | | /* 6807 */ "VCNTMBH\0" |
7515 | | /* 6815 */ "G_PREFETCH\0" |
7516 | | /* 6826 */ "EVLDH\0" |
7517 | | /* 6832 */ "EVSTDH\0" |
7518 | | /* 6839 */ "VCMPNEH\0" |
7519 | | /* 6847 */ "VMRGHH\0" |
7520 | | /* 6854 */ "VMRGLH\0" |
7521 | | /* 6861 */ "VRLH\0" |
7522 | | /* 6866 */ "VSLH\0" |
7523 | | /* 6871 */ "G_SMULH\0" |
7524 | | /* 6879 */ "G_UMULH\0" |
7525 | | /* 6887 */ "VPMSUMH\0" |
7526 | | /* 6895 */ "XXBRH\0" |
7527 | | /* 6901 */ "VSRH\0" |
7528 | | /* 6906 */ "VMULESH\0" |
7529 | | /* 6914 */ "V_SETALLONESH\0" |
7530 | | /* 6928 */ "VAVGSH\0" |
7531 | | /* 6935 */ "VUPKHSH\0" |
7532 | | /* 6943 */ "VSPLTISH\0" |
7533 | | /* 6952 */ "VUPKLSH\0" |
7534 | | /* 6960 */ "VMINSH\0" |
7535 | | /* 6967 */ "VMULOSH\0" |
7536 | | /* 6975 */ "VCMPGTSH\0" |
7537 | | /* 6984 */ "EVEXTSH\0" |
7538 | | /* 6992 */ "VMAXSH\0" |
7539 | | /* 6999 */ "VSPLTH\0" |
7540 | | /* 7006 */ "VPOPCNTH\0" |
7541 | | /* 7015 */ "VINSERTH\0" |
7542 | | /* 7024 */ "PSTH\0" |
7543 | | /* 7029 */ "VABSDUH\0" |
7544 | | /* 7037 */ "VMULEUH\0" |
7545 | | /* 7045 */ "VAVGUH\0" |
7546 | | /* 7052 */ "VMINUH\0" |
7547 | | /* 7059 */ "VMULOUH\0" |
7548 | | /* 7067 */ "VCMPEQUH\0" |
7549 | | /* 7076 */ "VEXTRACTUH\0" |
7550 | | /* 7087 */ "VCMPGTUH\0" |
7551 | | /* 7096 */ "VMAXUH\0" |
7552 | | /* 7103 */ "XXBLENDVH\0" |
7553 | | /* 7113 */ "VCMPNEZH\0" |
7554 | | /* 7122 */ "VCLZH\0" |
7555 | | /* 7128 */ "VCTZH\0" |
7556 | | /* 7134 */ "DQUAI\0" |
7557 | | /* 7140 */ "DCBI\0" |
7558 | | /* 7145 */ "ICBI\0" |
7559 | | /* 7150 */ "VSLDBI\0" |
7560 | | /* 7157 */ "VSRDBI\0" |
7561 | | /* 7164 */ "PSUBI\0" |
7562 | | /* 7170 */ "DCCCI\0" |
7563 | | /* 7176 */ "ICCCI\0" |
7564 | | /* 7182 */ "TABORTDCI\0" |
7565 | | /* 7192 */ "RFCI\0" |
7566 | | /* 7197 */ "RFMCI\0" |
7567 | | /* 7203 */ "TABORTWCI\0" |
7568 | | /* 7213 */ "SRADI\0" |
7569 | | /* 7219 */ "PADDI\0" |
7570 | | /* 7225 */ "RFDI\0" |
7571 | | /* 7230 */ "CMPLDI\0" |
7572 | | /* 7237 */ "CLRLSLDI\0" |
7573 | | /* 7246 */ "EXTLDI\0" |
7574 | | /* 7253 */ "XXPERMDI\0" |
7575 | | /* 7262 */ "CMPDI\0" |
7576 | | /* 7268 */ "CLRRDI\0" |
7577 | | /* 7275 */ "INSRDI\0" |
7578 | | /* 7282 */ "ROTRDI\0" |
7579 | | /* 7289 */ "EXTRDI\0" |
7580 | | /* 7296 */ "TDI\0" |
7581 | | /* 7300 */ "WRTEEI\0" |
7582 | | /* 7307 */ "RFI\0" |
7583 | | /* 7311 */ "MTFSFI\0" |
7584 | | /* 7318 */ "DTSTSFI\0" |
7585 | | /* 7326 */ "EVSPLATFI\0" |
7586 | | /* 7336 */ "EVMERGEHI\0" |
7587 | | /* 7346 */ "EVMERGELOHI\0" |
7588 | | /* 7358 */ "DBG_PHI\0" |
7589 | | /* 7366 */ "DMXXINSTFDMR512_HI\0" |
7590 | | /* 7385 */ "DMXXEXTFDMR512_HI\0" |
7591 | | /* 7403 */ "TLBLI\0" |
7592 | | /* 7409 */ "DSCLI\0" |
7593 | | /* 7415 */ "MULLI\0" |
7594 | | /* 7421 */ "PLI\0" |
7595 | | /* 7425 */ "EXTSWSLI\0" |
7596 | | /* 7434 */ "MTVSRBMI\0" |
7597 | | /* 7443 */ "VRLDMI\0" |
7598 | | /* 7450 */ "RLDIMI\0" |
7599 | | /* 7457 */ "RLWIMI\0" |
7600 | | /* 7464 */ "VRLQMI\0" |
7601 | | /* 7471 */ "EVMHESMI\0" |
7602 | | /* 7480 */ "EVMWHSMI\0" |
7603 | | /* 7489 */ "EVMHOSMI\0" |
7604 | | /* 7498 */ "EVMWSMI\0" |
7605 | | /* 7506 */ "EVMHEUMI\0" |
7606 | | /* 7515 */ "EVMWHUMI\0" |
7607 | | /* 7524 */ "EVMWLUMI\0" |
7608 | | /* 7533 */ "EVMHOUMI\0" |
7609 | | /* 7542 */ "EVMWUMI\0" |
7610 | | /* 7550 */ "VRLWMI\0" |
7611 | | /* 7557 */ "MFFSCRNI\0" |
7612 | | /* 7566 */ "MFFSCDRNI\0" |
7613 | | /* 7576 */ "VSLDOI\0" |
7614 | | /* 7583 */ "XSRDPI\0" |
7615 | | /* 7590 */ "XVRDPI\0" |
7616 | | /* 7597 */ "XSRQPI\0" |
7617 | | /* 7604 */ "XVRSPI\0" |
7618 | | /* 7611 */ "DSCRI\0" |
7619 | | /* 7617 */ "XORI\0" |
7620 | | /* 7622 */ "EFDCFSI\0" |
7621 | | /* 7630 */ "EFSCFSI\0" |
7622 | | /* 7638 */ "EVFSCFSI\0" |
7623 | | /* 7647 */ "G_FPTOSI\0" |
7624 | | /* 7656 */ "EFDCTSI\0" |
7625 | | /* 7664 */ "EFSCTSI\0" |
7626 | | /* 7672 */ "EVFSCTSI\0" |
7627 | | /* 7681 */ "EVSPLATI\0" |
7628 | | /* 7690 */ "LDtocJTI\0" |
7629 | | /* 7699 */ "EFDCFUI\0" |
7630 | | /* 7707 */ "EFSCFUI\0" |
7631 | | /* 7715 */ "EVFSCFUI\0" |
7632 | | /* 7724 */ "G_FPTOUI\0" |
7633 | | /* 7733 */ "EFDCTUI\0" |
7634 | | /* 7741 */ "EFSCTUI\0" |
7635 | | /* 7749 */ "EVFSCTUI\0" |
7636 | | /* 7758 */ "SRAWI\0" |
7637 | | /* 7764 */ "XXSLDWI\0" |
7638 | | /* 7772 */ "CMPLWI\0" |
7639 | | /* 7779 */ "EVRLWI\0" |
7640 | | /* 7786 */ "CLRLSLWI\0" |
7641 | | /* 7795 */ "INSLWI\0" |
7642 | | /* 7802 */ "EVSLWI\0" |
7643 | | /* 7809 */ "EXTLWI\0" |
7644 | | /* 7816 */ "G_FPOWI\0" |
7645 | | /* 7824 */ "CMPWI\0" |
7646 | | /* 7830 */ "CLRRWI\0" |
7647 | | /* 7837 */ "INSRWI\0" |
7648 | | /* 7844 */ "ROTRWI\0" |
7649 | | /* 7851 */ "EXTRWI\0" |
7650 | | /* 7858 */ "LSWI\0" |
7651 | | /* 7863 */ "STSWI\0" |
7652 | | /* 7869 */ "TWI\0" |
7653 | | /* 7873 */ "TCHECK\0" |
7654 | | /* 7880 */ "HASHCHK\0" |
7655 | | /* 7888 */ "G_PTRMASK\0" |
7656 | | /* 7898 */ "XXEVAL\0" |
7657 | | /* 7905 */ "VSTRIBL\0" |
7658 | | /* 7913 */ "gBCL\0" |
7659 | | /* 7918 */ "BCCL\0" |
7660 | | /* 7923 */ "RLDCL\0" |
7661 | | /* 7929 */ "RLDICL\0" |
7662 | | /* 7936 */ "GC_LABEL\0" |
7663 | | /* 7945 */ "DBG_LABEL\0" |
7664 | | /* 7955 */ "EH_LABEL\0" |
7665 | | /* 7964 */ "ANNOTATION_LABEL\0" |
7666 | | /* 7981 */ "TLBIEL\0" |
7667 | | /* 7988 */ "ICALL_BRANCH_FUNNEL\0" |
7668 | | /* 8008 */ "GETtlsldADDRPCREL\0" |
7669 | | /* 8026 */ "GETtlsADDRPCREL\0" |
7670 | | /* 8042 */ "ISEL\0" |
7671 | | /* 8047 */ "EVSEL\0" |
7672 | | /* 8053 */ "XXSEL\0" |
7673 | | /* 8059 */ "DCBFL\0" |
7674 | | /* 8065 */ "VSTRIHL\0" |
7675 | | /* 8073 */ "G_FSHL\0" |
7676 | | /* 8080 */ "G_SHL\0" |
7677 | | /* 8086 */ "G_FCEIL\0" |
7678 | | /* 8094 */ "PATCHABLE_TAIL_CALL\0" |
7679 | | /* 8114 */ "PATCHABLE_TYPED_EVENT_CALL\0" |
7680 | | /* 8141 */ "PATCHABLE_EVENT_CALL\0" |
7681 | | /* 8162 */ "FENTRY_CALL\0" |
7682 | | /* 8174 */ "DSSALL\0" |
7683 | | /* 8181 */ "KILL\0" |
7684 | | /* 8186 */ "LXVPRLL\0" |
7685 | | /* 8194 */ "STXVPRLL\0" |
7686 | | /* 8203 */ "LXVRLL\0" |
7687 | | /* 8210 */ "STXVRLL\0" |
7688 | | /* 8218 */ "LXVLL\0" |
7689 | | /* 8224 */ "STXVLL\0" |
7690 | | /* 8231 */ "G_CONSTANT_POOL\0" |
7691 | | /* 8247 */ "BLRL\0" |
7692 | | /* 8252 */ "gBCLRL\0" |
7693 | | /* 8259 */ "BCCLRL\0" |
7694 | | /* 8266 */ "BDZLRL\0" |
7695 | | /* 8273 */ "BDNZLRL\0" |
7696 | | /* 8281 */ "LXVPRL\0" |
7697 | | /* 8288 */ "STXVPRL\0" |
7698 | | /* 8296 */ "BCTRL\0" |
7699 | | /* 8302 */ "gBCCTRL\0" |
7700 | | /* 8310 */ "BCCCTRL\0" |
7701 | | /* 8318 */ "LXVRL\0" |
7702 | | /* 8324 */ "STXVRL\0" |
7703 | | /* 8331 */ "MFFSL\0" |
7704 | | /* 8337 */ "LVSL\0" |
7705 | | /* 8342 */ "G_ROTL\0" |
7706 | | /* 8349 */ "EFDMUL\0" |
7707 | | /* 8356 */ "G_VECREDUCE_FMUL\0" |
7708 | | /* 8373 */ "G_FMUL\0" |
7709 | | /* 8380 */ "G_VECREDUCE_SEQ_FMUL\0" |
7710 | | /* 8401 */ "G_STRICT_FMUL\0" |
7711 | | /* 8415 */ "EFSMUL\0" |
7712 | | /* 8422 */ "EVFSMUL\0" |
7713 | | /* 8430 */ "G_VECREDUCE_MUL\0" |
7714 | | /* 8446 */ "G_MUL\0" |
7715 | | /* 8452 */ "LXVL\0" |
7716 | | /* 8457 */ "STXVL\0" |
7717 | | /* 8463 */ "LBARXL\0" |
7718 | | /* 8470 */ "LDARXL\0" |
7719 | | /* 8477 */ "LHARXL\0" |
7720 | | /* 8484 */ "LQARXL\0" |
7721 | | /* 8491 */ "LWARXL\0" |
7722 | | /* 8498 */ "LVXL\0" |
7723 | | /* 8503 */ "STVXL\0" |
7724 | | /* 8509 */ "DCBZL\0" |
7725 | | /* 8515 */ "BDZL\0" |
7726 | | /* 8520 */ "BDNZL\0" |
7727 | | /* 8526 */ "LDtocL\0" |
7728 | | /* 8533 */ "ADDItocL\0" |
7729 | | /* 8542 */ "LWZtocL\0" |
7730 | | /* 8550 */ "ADDItlsgdL\0" |
7731 | | /* 8561 */ "ADDItlsldL\0" |
7732 | | /* 8572 */ "LDgotTprelL\0" |
7733 | | /* 8584 */ "ADDIdtprelL\0" |
7734 | | /* 8596 */ "VEXPANDBM\0" |
7735 | | /* 8606 */ "VMSUMMBM\0" |
7736 | | /* 8615 */ "MTVSRBM\0" |
7737 | | /* 8623 */ "VEXTRACTBM\0" |
7738 | | /* 8634 */ "VSUBUBM\0" |
7739 | | /* 8642 */ "VADDUBM\0" |
7740 | | /* 8650 */ "VMSUMUBM\0" |
7741 | | /* 8659 */ "XXGENPCVBM\0" |
7742 | | /* 8670 */ "VEXPANDDM\0" |
7743 | | /* 8680 */ "MTVSRDM\0" |
7744 | | /* 8688 */ "VEXTRACTDM\0" |
7745 | | /* 8699 */ "VSUBUDM\0" |
7746 | | /* 8707 */ "VADDUDM\0" |
7747 | | /* 8715 */ "VMSUMUDM\0" |
7748 | | /* 8724 */ "XXGENPCVDM\0" |
7749 | | /* 8735 */ "VCLZDM\0" |
7750 | | /* 8742 */ "CNTLZDM\0" |
7751 | | /* 8750 */ "VCTZDM\0" |
7752 | | /* 8757 */ "CNTTZDM\0" |
7753 | | /* 8765 */ "G_FREM\0" |
7754 | | /* 8772 */ "G_STRICT_FREM\0" |
7755 | | /* 8786 */ "G_SREM\0" |
7756 | | /* 8793 */ "G_UREM\0" |
7757 | | /* 8800 */ "G_SDIVREM\0" |
7758 | | /* 8810 */ "G_UDIVREM\0" |
7759 | | /* 8820 */ "VEXPANDHM\0" |
7760 | | /* 8830 */ "MTVSRHM\0" |
7761 | | /* 8838 */ "VMSUMSHM\0" |
7762 | | /* 8847 */ "VEXTRACTHM\0" |
7763 | | /* 8858 */ "VSUBUHM\0" |
7764 | | /* 8866 */ "VMLADDUHM\0" |
7765 | | /* 8876 */ "VADDUHM\0" |
7766 | | /* 8884 */ "VMSUMUHM\0" |
7767 | | /* 8893 */ "XXGENPCVHM\0" |
7768 | | /* 8904 */ "TRECLAIM\0" |
7769 | | /* 8913 */ "VRFIM\0" |
7770 | | /* 8919 */ "XSRDPIM\0" |
7771 | | /* 8927 */ "XVRDPIM\0" |
7772 | | /* 8935 */ "XVRSPIM\0" |
7773 | | /* 8943 */ "SETFLM\0" |
7774 | | /* 8950 */ "VRLDNM\0" |
7775 | | /* 8957 */ "RLWINM\0" |
7776 | | /* 8964 */ "VRLQNM\0" |
7777 | | /* 8971 */ "VRLWNM\0" |
7778 | | /* 8978 */ "VEXPANDQM\0" |
7779 | | /* 8988 */ "MTVSRQM\0" |
7780 | | /* 8996 */ "VEXTRACTQM\0" |
7781 | | /* 9007 */ "VSUBUQM\0" |
7782 | | /* 9015 */ "VADDUQM\0" |
7783 | | /* 9023 */ "VSUBEUQM\0" |
7784 | | /* 9032 */ "VADDEUQM\0" |
7785 | | /* 9041 */ "VPERM\0" |
7786 | | /* 9047 */ "XXPERM\0" |
7787 | | /* 9054 */ "BLA8_RM\0" |
7788 | | /* 9062 */ "BL8_RM\0" |
7789 | | /* 9069 */ "BCTRL8_RM\0" |
7790 | | /* 9079 */ "BLA_RM\0" |
7791 | | /* 9086 */ "BL8_NOTOC_RM\0" |
7792 | | /* 9099 */ "BL_RM\0" |
7793 | | /* 9105 */ "BCTRL_RM\0" |
7794 | | /* 9114 */ "BLA8_NOP_RM\0" |
7795 | | /* 9126 */ "BL8_NOP_RM\0" |
7796 | | /* 9137 */ "BL_NOP_RM\0" |
7797 | | /* 9147 */ "BCTRL8_LDinto_toc_RM\0" |
7798 | | /* 9168 */ "BCTRL_LWZinto_toc_RM\0" |
7799 | | /* 9189 */ "INLINEASM\0" |
7800 | | /* 9199 */ "VPKUDUM\0" |
7801 | | /* 9207 */ "VPKUHUM\0" |
7802 | | /* 9215 */ "G_VECREDUCE_FMINIMUM\0" |
7803 | | /* 9236 */ "G_FMINIMUM\0" |
7804 | | /* 9247 */ "G_VECREDUCE_FMAXIMUM\0" |
7805 | | /* 9268 */ "G_FMAXIMUM\0" |
7806 | | /* 9279 */ "G_FMINNUM\0" |
7807 | | /* 9289 */ "G_FMAXNUM\0" |
7808 | | /* 9299 */ "VPKUWUM\0" |
7809 | | /* 9307 */ "VEXPANDWM\0" |
7810 | | /* 9317 */ "MTVSRWM\0" |
7811 | | /* 9325 */ "VEXTRACTWM\0" |
7812 | | /* 9336 */ "VSUBUWM\0" |
7813 | | /* 9344 */ "VADDUWM\0" |
7814 | | /* 9352 */ "VMULUWM\0" |
7815 | | /* 9360 */ "XXGENPCVWM\0" |
7816 | | /* 9371 */ "EVMHEGSMFAN\0" |
7817 | | /* 9383 */ "EVMHOGSMFAN\0" |
7818 | | /* 9395 */ "EVMWSMFAN\0" |
7819 | | /* 9405 */ "EVMWSSFAN\0" |
7820 | | /* 9415 */ "EVMHEGSMIAN\0" |
7821 | | /* 9427 */ "EVMHOGSMIAN\0" |
7822 | | /* 9439 */ "EVMWSMIAN\0" |
7823 | | /* 9449 */ "EVMHEGUMIAN\0" |
7824 | | /* 9461 */ "EVMHOGUMIAN\0" |
7825 | | /* 9473 */ "EVMWUMIAN\0" |
7826 | | /* 9483 */ "G_INTRINSIC_ROUNDEVEN\0" |
7827 | | /* 9505 */ "G_ASSERT_ALIGN\0" |
7828 | | /* 9520 */ "G_FCOPYSIGN\0" |
7829 | | /* 9532 */ "VRFIN\0" |
7830 | | /* 9538 */ "TBEGIN\0" |
7831 | | /* 9545 */ "G_VECREDUCE_FMIN\0" |
7832 | | /* 9562 */ "G_ATOMICRMW_FMIN\0" |
7833 | | /* 9579 */ "G_VECREDUCE_SMIN\0" |
7834 | | /* 9596 */ "G_SMIN\0" |
7835 | | /* 9603 */ "G_VECREDUCE_UMIN\0" |
7836 | | /* 9620 */ "G_UMIN\0" |
7837 | | /* 9627 */ "G_ATOMICRMW_UMIN\0" |
7838 | | /* 9644 */ "G_ATOMICRMW_MIN\0" |
7839 | | /* 9660 */ "MFSRIN\0" |
7840 | | /* 9667 */ "MTSRIN\0" |
7841 | | /* 9674 */ "G_FSIN\0" |
7842 | | /* 9681 */ "PMXVBF16GER2NN\0" |
7843 | | /* 9696 */ "PMXVF16GER2NN\0" |
7844 | | /* 9710 */ "PMXVF32GERNN\0" |
7845 | | /* 9723 */ "PMXVF64GERNN\0" |
7846 | | /* 9736 */ "PMXVBF16GER2WNN\0" |
7847 | | /* 9752 */ "PMXVF16GER2WNN\0" |
7848 | | /* 9767 */ "PMXVF32GERWNN\0" |
7849 | | /* 9781 */ "PMXVF64GERWNN\0" |
7850 | | /* 9795 */ "CFI_INSTRUCTION\0" |
7851 | | /* 9811 */ "PMXVBF16GER2PN\0" |
7852 | | /* 9826 */ "PMXVF16GER2PN\0" |
7853 | | /* 9840 */ "XSCVSPDPN\0" |
7854 | | /* 9850 */ "PMXVF32GERPN\0" |
7855 | | /* 9863 */ "PMXVF64GERPN\0" |
7856 | | /* 9876 */ "XVCVBF16SPN\0" |
7857 | | /* 9888 */ "XSCVDPSPN\0" |
7858 | | /* 9898 */ "PMXVBF16GER2WPN\0" |
7859 | | /* 9914 */ "PMXVF16GER2WPN\0" |
7860 | | /* 9929 */ "PMXVF32GERWPN\0" |
7861 | | /* 9943 */ "PMXVF64GERWPN\0" |
7862 | | /* 9957 */ "DARN\0" |
7863 | | /* 9962 */ "MFFSCRN\0" |
7864 | | /* 9970 */ "MFFSCDRN\0" |
7865 | | /* 9979 */ "DRINTN\0" |
7866 | | /* 9986 */ "ATTN\0" |
7867 | | /* 9991 */ "ADJCALLSTACKDOWN\0" |
7868 | | /* 10008 */ "ADD4O\0" |
7869 | | /* 10014 */ "ADDC8O\0" |
7870 | | /* 10021 */ "SUBFC8O\0" |
7871 | | /* 10029 */ "ADD8O\0" |
7872 | | /* 10035 */ "ADDE8O\0" |
7873 | | /* 10042 */ "SUBFE8O\0" |
7874 | | /* 10050 */ "ADDME8O\0" |
7875 | | /* 10058 */ "SUBFME8O\0" |
7876 | | /* 10067 */ "ADDZE8O\0" |
7877 | | /* 10075 */ "SUBFZE8O\0" |
7878 | | /* 10084 */ "SUBF8O\0" |
7879 | | /* 10091 */ "NEG8O\0" |
7880 | | /* 10097 */ "G_SSUBO\0" |
7881 | | /* 10105 */ "G_USUBO\0" |
7882 | | /* 10113 */ "ADDCO\0" |
7883 | | /* 10119 */ "SUBFCO\0" |
7884 | | /* 10126 */ "G_SADDO\0" |
7885 | | /* 10134 */ "G_UADDO\0" |
7886 | | /* 10142 */ "MULLDO\0" |
7887 | | /* 10149 */ "LQX_PSEUDO\0" |
7888 | | /* 10160 */ "STQX_PSEUDO\0" |
7889 | | /* 10172 */ "DIVDO\0" |
7890 | | /* 10178 */ "ADDEO\0" |
7891 | | /* 10184 */ "DIVDEO\0" |
7892 | | /* 10191 */ "SUBFEO\0" |
7893 | | /* 10198 */ "ADDMEO\0" |
7894 | | /* 10205 */ "SUBFMEO\0" |
7895 | | /* 10213 */ "DIVWEO\0" |
7896 | | /* 10220 */ "ADDZEO\0" |
7897 | | /* 10227 */ "SUBFZEO\0" |
7898 | | /* 10235 */ "SUBFO\0" |
7899 | | /* 10241 */ "JUMP_TABLE_DEBUG_INFO\0" |
7900 | | /* 10263 */ "NEGO\0" |
7901 | | /* 10268 */ "EVSTWHO\0" |
7902 | | /* 10276 */ "PseudoEIEIO\0" |
7903 | | /* 10288 */ "EnforceIEIO\0" |
7904 | | /* 10300 */ "EVMERGELO\0" |
7905 | | /* 10310 */ "EVMERGEHILO\0" |
7906 | | /* 10322 */ "VSLO\0" |
7907 | | /* 10327 */ "G_SMULO\0" |
7908 | | /* 10335 */ "G_UMULO\0" |
7909 | | /* 10343 */ "XSCVQPDPO\0" |
7910 | | /* 10353 */ "DCMPO\0" |
7911 | | /* 10359 */ "XSNMSUBQPO\0" |
7912 | | /* 10370 */ "XSMSUBQPO\0" |
7913 | | /* 10380 */ "XSSUBQPO\0" |
7914 | | /* 10389 */ "XSNMADDQPO\0" |
7915 | | /* 10400 */ "XSMADDQPO\0" |
7916 | | /* 10410 */ "XSADDQPO\0" |
7917 | | /* 10419 */ "XSMULQPO\0" |
7918 | | /* 10428 */ "XSSQRTQPO\0" |
7919 | | /* 10438 */ "XSDIVQPO\0" |
7920 | | /* 10447 */ "G_BZERO\0" |
7921 | | /* 10455 */ "VSRO\0" |
7922 | | /* 10460 */ "DIVDUO\0" |
7923 | | /* 10467 */ "DIVDEUO\0" |
7924 | | /* 10475 */ "DIVWEUO\0" |
7925 | | /* 10483 */ "DIVWUO\0" |
7926 | | /* 10490 */ "MULLWO\0" |
7927 | | /* 10497 */ "DIVWO\0" |
7928 | | /* 10503 */ "EVSTWWO\0" |
7929 | | /* 10511 */ "STACKMAP\0" |
7930 | | /* 10520 */ "NAP\0" |
7931 | | /* 10524 */ "TRAP\0" |
7932 | | /* 10529 */ "G_ATOMICRMW_UDEC_WRAP\0" |
7933 | | /* 10551 */ "G_ATOMICRMW_UINC_WRAP\0" |
7934 | | /* 10573 */ "G_BSWAP\0" |
7935 | | /* 10581 */ "XSNMSUBADP\0" |
7936 | | /* 10592 */ "XVNMSUBADP\0" |
7937 | | /* 10603 */ "XSMSUBADP\0" |
7938 | | /* 10613 */ "XVMSUBADP\0" |
7939 | | /* 10623 */ "XSNMADDADP\0" |
7940 | | /* 10634 */ "XVNMADDADP\0" |
7941 | | /* 10645 */ "XSMADDADP\0" |
7942 | | /* 10655 */ "XVMADDADP\0" |
7943 | | /* 10665 */ "XSSUBDP\0" |
7944 | | /* 10673 */ "XVSUBDP\0" |
7945 | | /* 10681 */ "XSTSTDCDP\0" |
7946 | | /* 10691 */ "XVTSTDCDP\0" |
7947 | | /* 10701 */ "XSMINCDP\0" |
7948 | | /* 10710 */ "XSMAXCDP\0" |
7949 | | /* 10719 */ "XSADDDP\0" |
7950 | | /* 10727 */ "XVADDDP\0" |
7951 | | /* 10735 */ "XSCVSXDDP\0" |
7952 | | /* 10745 */ "XVCVSXDDP\0" |
7953 | | /* 10755 */ "XSCVUXDDP\0" |
7954 | | /* 10765 */ "XVCVUXDDP\0" |
7955 | | /* 10775 */ "XSCMPGEDP\0" |
7956 | | /* 10785 */ "XVCMPGEDP\0" |
7957 | | /* 10795 */ "XSREDP\0" |
7958 | | /* 10802 */ "XVREDP\0" |
7959 | | /* 10809 */ "XSRSQRTEDP\0" |
7960 | | /* 10820 */ "XVRSQRTEDP\0" |
7961 | | /* 10831 */ "XSNEGDP\0" |
7962 | | /* 10839 */ "XVNEGDP\0" |
7963 | | /* 10847 */ "XSXSIGDP\0" |
7964 | | /* 10856 */ "XVXSIGDP\0" |
7965 | | /* 10865 */ "XXSPLTIDP\0" |
7966 | | /* 10875 */ "XSMINJDP\0" |
7967 | | /* 10884 */ "XSMAXJDP\0" |
7968 | | /* 10893 */ "XSMULDP\0" |
7969 | | /* 10901 */ "XVMULDP\0" |
7970 | | /* 10909 */ "XSNMSUBMDP\0" |
7971 | | /* 10920 */ "XVNMSUBMDP\0" |
7972 | | /* 10931 */ "XSMSUBMDP\0" |
7973 | | /* 10941 */ "XVMSUBMDP\0" |
7974 | | /* 10951 */ "XSNMADDMDP\0" |
7975 | | /* 10962 */ "XVNMADDMDP\0" |
7976 | | /* 10973 */ "XSMADDMDP\0" |
7977 | | /* 10983 */ "XVMADDMDP\0" |
7978 | | /* 10993 */ "XSCPSGNDP\0" |
7979 | | /* 11003 */ "XVCPSGNDP\0" |
7980 | | /* 11013 */ "XSMINDP\0" |
7981 | | /* 11021 */ "XVMINDP\0" |
7982 | | /* 11029 */ "XSCMPODP\0" |
7983 | | /* 11038 */ "XSCVHPDP\0" |
7984 | | /* 11047 */ "XSCVQPDP\0" |
7985 | | /* 11056 */ "XSCVSPDP\0" |
7986 | | /* 11065 */ "XVCVSPDP\0" |
7987 | | /* 11074 */ "XSIEXPDP\0" |
7988 | | /* 11083 */ "XVIEXPDP\0" |
7989 | | /* 11092 */ "XSCMPEXPDP\0" |
7990 | | /* 11103 */ "XSXEXPDP\0" |
7991 | | /* 11112 */ "XVXEXPDP\0" |
7992 | | /* 11121 */ "XSCMPEQDP\0" |
7993 | | /* 11131 */ "XVCMPEQDP\0" |
7994 | | /* 11141 */ "XSNABSDP\0" |
7995 | | /* 11150 */ "XVNABSDP\0" |
7996 | | /* 11159 */ "XSABSDP\0" |
7997 | | /* 11167 */ "XVABSDP\0" |
7998 | | /* 11175 */ "DCTDP\0" |
7999 | | /* 11181 */ "XSCMPGTDP\0" |
8000 | | /* 11191 */ "XVCMPGTDP\0" |
8001 | | /* 11201 */ "XSSQRTDP\0" |
8002 | | /* 11210 */ "XSTSQRTDP\0" |
8003 | | /* 11220 */ "XVTSQRTDP\0" |
8004 | | /* 11230 */ "XVSQRTDP\0" |
8005 | | /* 11239 */ "XSCMPUDP\0" |
8006 | | /* 11248 */ "XSDIVDP\0" |
8007 | | /* 11256 */ "XSTDIVDP\0" |
8008 | | /* 11265 */ "XVTDIVDP\0" |
8009 | | /* 11274 */ "XVDIVDP\0" |
8010 | | /* 11282 */ "XVCVSXWDP\0" |
8011 | | /* 11292 */ "XVCVUXWDP\0" |
8012 | | /* 11302 */ "XSMAXDP\0" |
8013 | | /* 11310 */ "XVMAXDP\0" |
8014 | | /* 11318 */ "CTRL_DEP\0" |
8015 | | /* 11327 */ "DCBFEP\0" |
8016 | | /* 11334 */ "ICBIEP\0" |
8017 | | /* 11341 */ "DCBZLEP\0" |
8018 | | /* 11349 */ "DCBTEP\0" |
8019 | | /* 11356 */ "DCBSTEP\0" |
8020 | | /* 11364 */ "DCBTSTEP\0" |
8021 | | /* 11373 */ "DCBZEP\0" |
8022 | | /* 11380 */ "VCMPBFP\0" |
8023 | | /* 11388 */ "VNMSUBFP\0" |
8024 | | /* 11397 */ "VSUBFP\0" |
8025 | | /* 11404 */ "VMADDFP\0" |
8026 | | /* 11412 */ "VADDFP\0" |
8027 | | /* 11419 */ "VLOGEFP\0" |
8028 | | /* 11427 */ "VCMPGEFP\0" |
8029 | | /* 11436 */ "VREFP\0" |
8030 | | /* 11442 */ "VEXPTEFP\0" |
8031 | | /* 11451 */ "VRSQRTEFP\0" |
8032 | | /* 11461 */ "VMINFP\0" |
8033 | | /* 11468 */ "G_SITOFP\0" |
8034 | | /* 11477 */ "G_UITOFP\0" |
8035 | | /* 11486 */ "VCMPEQFP\0" |
8036 | | /* 11495 */ "VCMPGTFP\0" |
8037 | | /* 11504 */ "VMAXFP\0" |
8038 | | /* 11511 */ "XSCVDPHP\0" |
8039 | | /* 11520 */ "XVCVSPHP\0" |
8040 | | /* 11529 */ "VRFIP\0" |
8041 | | /* 11535 */ "XSRDPIP\0" |
8042 | | /* 11543 */ "XVRDPIP\0" |
8043 | | /* 11551 */ "XVRSPIP\0" |
8044 | | /* 11559 */ "HASHCHKP\0" |
8045 | | /* 11568 */ "DCBFLP\0" |
8046 | | /* 11575 */ "G_FCMP\0" |
8047 | | /* 11582 */ "G_ICMP\0" |
8048 | | /* 11589 */ "PMXVBF16GER2NP\0" |
8049 | | /* 11604 */ "PMXVF16GER2NP\0" |
8050 | | /* 11618 */ "PMXVF32GERNP\0" |
8051 | | /* 11631 */ "PMXVF64GERNP\0" |
8052 | | /* 11644 */ "PMXVBF16GER2WNP\0" |
8053 | | /* 11660 */ "PMXVF16GER2WNP\0" |
8054 | | /* 11675 */ "PMXVF32GERWNP\0" |
8055 | | /* 11689 */ "PMXVF64GERWNP\0" |
8056 | | /* 11703 */ "BLA8_NOP\0" |
8057 | | /* 11712 */ "BL8_NOP\0" |
8058 | | /* 11720 */ "UNENCODED_NOP\0" |
8059 | | /* 11734 */ "BL_NOP\0" |
8060 | | /* 11741 */ "G_CTPOP\0" |
8061 | | /* 11749 */ "STOP\0" |
8062 | | /* 11754 */ "PATCHABLE_OP\0" |
8063 | | /* 11767 */ "FAULTING_OP\0" |
8064 | | /* 11779 */ "PMXVBF16GER2PP\0" |
8065 | | /* 11794 */ "PMXVF16GER2PP\0" |
8066 | | /* 11808 */ "PMXVI16GER2PP\0" |
8067 | | /* 11822 */ "PMXVI8GER4PP\0" |
8068 | | /* 11835 */ "PMXVI4GER8PP\0" |
8069 | | /* 11848 */ "PMXVF32GERPP\0" |
8070 | | /* 11861 */ "PMXVF64GERPP\0" |
8071 | | /* 11874 */ "PMXVI16GER2SPP\0" |
8072 | | /* 11889 */ "PMXVI8GER4SPP\0" |
8073 | | /* 11903 */ "PMXVI8GER4WSPP\0" |
8074 | | /* 11918 */ "PMXVBF16GER2WPP\0" |
8075 | | /* 11934 */ "PMXVF16GER2WPP\0" |
8076 | | /* 11949 */ "PMXVI16GER2WPP\0" |
8077 | | /* 11964 */ "PMXVI8GER4WPP\0" |
8078 | | /* 11978 */ "PMXVI4GER8WPP\0" |
8079 | | /* 11992 */ "PMXVF32GERWPP\0" |
8080 | | /* 12006 */ "PMXVF64GERWPP\0" |
8081 | | /* 12020 */ "PMXVI16GER2SWPP\0" |
8082 | | /* 12036 */ "XSNMSUBQP\0" |
8083 | | /* 12046 */ "XSMSUBQP\0" |
8084 | | /* 12055 */ "XSSUBQP\0" |
8085 | | /* 12063 */ "XSTSTDCQP\0" |
8086 | | /* 12073 */ "XSMINCQP\0" |
8087 | | /* 12082 */ "XSMAXCQP\0" |
8088 | | /* 12091 */ "XSNMADDQP\0" |
8089 | | /* 12101 */ "XSMADDQP\0" |
8090 | | /* 12110 */ "XSADDQP\0" |
8091 | | /* 12118 */ "XSCVSDQP\0" |
8092 | | /* 12127 */ "XSCVUDQP\0" |
8093 | | /* 12136 */ "XSCMPGEQP\0" |
8094 | | /* 12146 */ "XSNEGQP\0" |
8095 | | /* 12154 */ "XSXSIGQP\0" |
8096 | | /* 12163 */ "XSMULQP\0" |
8097 | | /* 12171 */ "XSCPSGNQP\0" |
8098 | | /* 12181 */ "XSCMPOQP\0" |
8099 | | /* 12190 */ "XSCVDPQP\0" |
8100 | | /* 12199 */ "XSIEXPQP\0" |
8101 | | /* 12208 */ "XSCMPEXPQP\0" |
8102 | | /* 12219 */ "XSXEXPQP\0" |
8103 | | /* 12228 */ "XSCMPEQQP\0" |
8104 | | /* 12238 */ "XSCVSQQP\0" |
8105 | | /* 12247 */ "XSCVUQQP\0" |
8106 | | /* 12256 */ "XSNABSQP\0" |
8107 | | /* 12265 */ "XSABSQP\0" |
8108 | | /* 12273 */ "XSCMPGTQP\0" |
8109 | | /* 12283 */ "XSSQRTQP\0" |
8110 | | /* 12292 */ "XSCMPUQP\0" |
8111 | | /* 12301 */ "XSDIVQP\0" |
8112 | | /* 12309 */ "XSNMSUBASP\0" |
8113 | | /* 12320 */ "XVNMSUBASP\0" |
8114 | | /* 12331 */ "XSMSUBASP\0" |
8115 | | /* 12341 */ "XVMSUBASP\0" |
8116 | | /* 12351 */ "XSNMADDASP\0" |
8117 | | /* 12362 */ "XVNMADDASP\0" |
8118 | | /* 12373 */ "XSMADDASP\0" |
8119 | | /* 12383 */ "XVMADDASP\0" |
8120 | | /* 12393 */ "XSSUBSP\0" |
8121 | | /* 12401 */ "XVSUBSP\0" |
8122 | | /* 12409 */ "XSTSTDCSP\0" |
8123 | | /* 12419 */ "XVTSTDCSP\0" |
8124 | | /* 12429 */ "XSADDSP\0" |
8125 | | /* 12437 */ "XVADDSP\0" |
8126 | | /* 12445 */ "XSCVSXDSP\0" |
8127 | | /* 12455 */ "XVCVSXDSP\0" |
8128 | | /* 12465 */ "XSCVUXDSP\0" |
8129 | | /* 12475 */ "XVCVUXDSP\0" |
8130 | | /* 12485 */ "XVCMPGESP\0" |
8131 | | /* 12495 */ "XSRESP\0" |
8132 | | /* 12502 */ "XVRESP\0" |
8133 | | /* 12509 */ "XSRSQRTESP\0" |
8134 | | /* 12520 */ "XVRSQRTESP\0" |
8135 | | /* 12531 */ "XVNEGSP\0" |
8136 | | /* 12539 */ "XVXSIGSP\0" |
8137 | | /* 12548 */ "XSMULSP\0" |
8138 | | /* 12556 */ "XVMULSP\0" |
8139 | | /* 12564 */ "XSNMSUBMSP\0" |
8140 | | /* 12575 */ "XVNMSUBMSP\0" |
8141 | | /* 12586 */ "XSMSUBMSP\0" |
8142 | | /* 12596 */ "XVMSUBMSP\0" |
8143 | | /* 12606 */ "XSNMADDMSP\0" |
8144 | | /* 12617 */ "XVNMADDMSP\0" |
8145 | | /* 12628 */ "XSMADDMSP\0" |
8146 | | /* 12638 */ "XVMADDMSP\0" |
8147 | | /* 12648 */ "XVCPSGNSP\0" |
8148 | | /* 12658 */ "XVMINSP\0" |
8149 | | /* 12666 */ "XSCVDPSP\0" |
8150 | | /* 12675 */ "XVCVDPSP\0" |
8151 | | /* 12684 */ "XVCVHPSP\0" |
8152 | | /* 12693 */ "XVIEXPSP\0" |
8153 | | /* 12702 */ "XVXEXPSP\0" |
8154 | | /* 12711 */ "XVCMPEQSP\0" |
8155 | | /* 12721 */ "DRSP\0" |
8156 | | /* 12726 */ "FRSP\0" |
8157 | | /* 12731 */ "XSRSP\0" |
8158 | | /* 12737 */ "XVNABSSP\0" |
8159 | | /* 12746 */ "XVABSSP\0" |
8160 | | /* 12754 */ "PLXSSP\0" |
8161 | | /* 12761 */ "PSTXSSP\0" |
8162 | | /* 12769 */ "XVCMPGTSP\0" |
8163 | | /* 12779 */ "XSSQRTSP\0" |
8164 | | /* 12788 */ "XVTSQRTSP\0" |
8165 | | /* 12798 */ "XVSQRTSP\0" |
8166 | | /* 12807 */ "XSDIVSP\0" |
8167 | | /* 12815 */ "XVTDIVSP\0" |
8168 | | /* 12824 */ "XVDIVSP\0" |
8169 | | /* 12832 */ "XVCVSXWSP\0" |
8170 | | /* 12842 */ "XVCVUXWSP\0" |
8171 | | /* 12852 */ "XVMAXSP\0" |
8172 | | /* 12860 */ "HASHSTP\0" |
8173 | | /* 12868 */ "ADJCALLSTACKUP\0" |
8174 | | /* 12883 */ "PREALLOCATED_SETUP\0" |
8175 | | /* 12902 */ "PLXVP\0" |
8176 | | /* 12908 */ "PSTXVP\0" |
8177 | | /* 12915 */ "G_FLDEXP\0" |
8178 | | /* 12924 */ "G_STRICT_FLDEXP\0" |
8179 | | /* 12940 */ "G_FEXP\0" |
8180 | | /* 12947 */ "G_FFREXP\0" |
8181 | | /* 12956 */ "XSRQPXP\0" |
8182 | | /* 12964 */ "VEXTSD2Q\0" |
8183 | | /* 12973 */ "VSRAQ\0" |
8184 | | /* 12979 */ "DQUAQ\0" |
8185 | | /* 12985 */ "DSUBQ\0" |
8186 | | /* 12991 */ "VPRTYBQ\0" |
8187 | | /* 12999 */ "DTSTDCQ\0" |
8188 | | /* 13007 */ "DENBCDQ\0" |
8189 | | /* 13015 */ "DADDQ\0" |
8190 | | /* 13021 */ "DRRNDQ\0" |
8191 | | /* 13028 */ "DDEDPDQ\0" |
8192 | | /* 13036 */ "EFDCMPEQ\0" |
8193 | | /* 13045 */ "EFSCMPEQ\0" |
8194 | | /* 13054 */ "EVFSCMPEQ\0" |
8195 | | /* 13064 */ "EVCMPEQ\0" |
8196 | | /* 13072 */ "EFDTSTEQ\0" |
8197 | | /* 13081 */ "EFSTSTEQ\0" |
8198 | | /* 13090 */ "EVFSTSTEQ\0" |
8199 | | /* 13100 */ "DTSTSFQ\0" |
8200 | | /* 13108 */ "DTSTDGQ\0" |
8201 | | /* 13116 */ "DQUAIQ\0" |
8202 | | /* 13123 */ "DTSTSFIQ\0" |
8203 | | /* 13132 */ "DSCLIQ\0" |
8204 | | /* 13139 */ "DSCRIQ\0" |
8205 | | /* 13146 */ "LXVKQ\0" |
8206 | | /* 13152 */ "ICBLQ\0" |
8207 | | /* 13158 */ "VRLQ\0" |
8208 | | /* 13163 */ "VSLQ\0" |
8209 | | /* 13168 */ "DMULQ\0" |
8210 | | /* 13174 */ "VBPERMQ\0" |
8211 | | /* 13182 */ "DRINTNQ\0" |
8212 | | /* 13190 */ "DCMPOQ\0" |
8213 | | /* 13197 */ "DRDPQ\0" |
8214 | | /* 13203 */ "DCTQPQ\0" |
8215 | | /* 13210 */ "DCFFIXQQ\0" |
8216 | | /* 13219 */ "DCTFIXQQ\0" |
8217 | | /* 13228 */ "XXBRQ\0" |
8218 | | /* 13234 */ "VSRQ\0" |
8219 | | /* 13239 */ "VMODSQ\0" |
8220 | | /* 13246 */ "VDIVESQ\0" |
8221 | | /* 13254 */ "VCMPSQ\0" |
8222 | | /* 13261 */ "VCMPGTSQ\0" |
8223 | | /* 13270 */ "VDIVSQ\0" |
8224 | | /* 13277 */ "STQ\0" |
8225 | | /* 13281 */ "VMUL10UQ\0" |
8226 | | /* 13290 */ "VMUL10CUQ\0" |
8227 | | /* 13300 */ "VSUBCUQ\0" |
8228 | | /* 13308 */ "VADDCUQ\0" |
8229 | | /* 13316 */ "VMUL10ECUQ\0" |
8230 | | /* 13327 */ "VSUBECUQ\0" |
8231 | | /* 13336 */ "VADDECUQ\0" |
8232 | | /* 13345 */ "VMODUQ\0" |
8233 | | /* 13352 */ "VMUL10EUQ\0" |
8234 | | /* 13362 */ "VDIVEUQ\0" |
8235 | | /* 13370 */ "DCMPUQ\0" |
8236 | | /* 13377 */ "VCMPUQ\0" |
8237 | | /* 13384 */ "VCMPEQUQ\0" |
8238 | | /* 13393 */ "VCMPGTUQ\0" |
8239 | | /* 13402 */ "VDIVUQ\0" |
8240 | | /* 13409 */ "DDIVQ\0" |
8241 | | /* 13415 */ "DIEXQ\0" |
8242 | | /* 13421 */ "DTSTEXQ\0" |
8243 | | /* 13429 */ "DXEXQ\0" |
8244 | | /* 13435 */ "DCFFIXQ\0" |
8245 | | /* 13443 */ "DCTFIXQ\0" |
8246 | | /* 13451 */ "DRINTXQ\0" |
8247 | | /* 13459 */ "MBAR\0" |
8248 | | /* 13464 */ "UpdateGBR\0" |
8249 | | /* 13474 */ "VSTRIBR\0" |
8250 | | /* 13482 */ "G_BR\0" |
8251 | | /* 13487 */ "INLINEASM_BR\0" |
8252 | | /* 13500 */ "SETNBCR\0" |
8253 | | /* 13508 */ "SETBCR\0" |
8254 | | /* 13515 */ "MFDCR\0" |
8255 | | /* 13521 */ "RLDCR\0" |
8256 | | /* 13527 */ "MTDCR\0" |
8257 | | /* 13533 */ "MFCR\0" |
8258 | | /* 13538 */ "RLDICR\0" |
8259 | | /* 13545 */ "MFUDSCR\0" |
8260 | | /* 13553 */ "MTUDSCR\0" |
8261 | | /* 13561 */ "MFVSCR\0" |
8262 | | /* 13568 */ "MTVSCR\0" |
8263 | | /* 13575 */ "RESTORE_CR\0" |
8264 | | /* 13586 */ "SPILL_CR\0" |
8265 | | /* 13595 */ "ADDItlsgdLADDR\0" |
8266 | | /* 13610 */ "ADDItlsldLADDR\0" |
8267 | | /* 13625 */ "G_BLOCK_ADDR\0" |
8268 | | /* 13638 */ "GETtlsldADDR\0" |
8269 | | /* 13651 */ "GETtlsADDR\0" |
8270 | | /* 13662 */ "PMXVF32GER\0" |
8271 | | /* 13673 */ "PMXVF64GER\0" |
8272 | | /* 13684 */ "VNCIPHER\0" |
8273 | | /* 13693 */ "VCIPHER\0" |
8274 | | /* 13701 */ "MEMBARRIER\0" |
8275 | | /* 13712 */ "G_CONSTANT_FOLD_BARRIER\0" |
8276 | | /* 13736 */ "PATCHABLE_FUNCTION_ENTER\0" |
8277 | | /* 13761 */ "G_READCYCLECOUNTER\0" |
8278 | | /* 13780 */ "G_READ_REGISTER\0" |
8279 | | /* 13796 */ "G_WRITE_REGISTER\0" |
8280 | | /* 13813 */ "VSTRIHR\0" |
8281 | | /* 13821 */ "G_ASHR\0" |
8282 | | /* 13828 */ "G_FSHR\0" |
8283 | | /* 13835 */ "G_LSHR\0" |
8284 | | /* 13842 */ "KILL_PAIR\0" |
8285 | | /* 13852 */ "BLR\0" |
8286 | | /* 13856 */ "gBCLR\0" |
8287 | | /* 13862 */ "BCCLR\0" |
8288 | | /* 13868 */ "MFLR\0" |
8289 | | /* 13873 */ "MTLR\0" |
8290 | | /* 13878 */ "BDZLR\0" |
8291 | | /* 13884 */ "BDNZLR\0" |
8292 | | /* 13891 */ "MovePCtoLR\0" |
8293 | | /* 13902 */ "MoveGOTtoLR\0" |
8294 | | /* 13914 */ "FMR\0" |
8295 | | /* 13918 */ "DMMR\0" |
8296 | | /* 13923 */ "MFPMR\0" |
8297 | | /* 13929 */ "MTPMR\0" |
8298 | | /* 13935 */ "VPERMR\0" |
8299 | | /* 13942 */ "XXPERMR\0" |
8300 | | /* 13950 */ "XXLOR\0" |
8301 | | /* 13956 */ "XXLNOR\0" |
8302 | | /* 13963 */ "CRNOR\0" |
8303 | | /* 13969 */ "EVNOR\0" |
8304 | | /* 13975 */ "G_FFLOOR\0" |
8305 | | /* 13984 */ "CROR\0" |
8306 | | /* 13989 */ "G_BUILD_VECTOR\0" |
8307 | | /* 14004 */ "G_SHUFFLE_VECTOR\0" |
8308 | | /* 14021 */ "EVOR\0" |
8309 | | /* 14026 */ "XXLXOR\0" |
8310 | | /* 14033 */ "DMXOR\0" |
8311 | | /* 14039 */ "VPERMXOR\0" |
8312 | | /* 14048 */ "CRXOR\0" |
8313 | | /* 14054 */ "EVXOR\0" |
8314 | | /* 14060 */ "G_VECREDUCE_XOR\0" |
8315 | | /* 14076 */ "G_XOR\0" |
8316 | | /* 14082 */ "G_ATOMICRMW_XOR\0" |
8317 | | /* 14098 */ "G_VECREDUCE_OR\0" |
8318 | | /* 14113 */ "G_OR\0" |
8319 | | /* 14118 */ "G_ATOMICRMW_OR\0" |
8320 | | /* 14133 */ "MFSPR\0" |
8321 | | /* 14139 */ "MTSPR\0" |
8322 | | /* 14145 */ "MFSR\0" |
8323 | | /* 14150 */ "MFMSR\0" |
8324 | | /* 14156 */ "MTMSR\0" |
8325 | | /* 14162 */ "MTSR\0" |
8326 | | /* 14167 */ "LVSR\0" |
8327 | | /* 14172 */ "TAILBCTR\0" |
8328 | | /* 14181 */ "gBCCTR\0" |
8329 | | /* 14188 */ "BCCCTR\0" |
8330 | | /* 14195 */ "MFCTR\0" |
8331 | | /* 14201 */ "MTCTR\0" |
8332 | | /* 14207 */ "G_ROTR\0" |
8333 | | /* 14214 */ "G_INTTOPTR\0" |
8334 | | /* 14225 */ "PMXVI16GER2S\0" |
8335 | | /* 14238 */ "ADDG6S\0" |
8336 | | /* 14245 */ "EFDABS\0" |
8337 | | /* 14252 */ "G_FABS\0" |
8338 | | /* 14259 */ "EFDNABS\0" |
8339 | | /* 14267 */ "EFSNABS\0" |
8340 | | /* 14275 */ "EVFSNABS\0" |
8341 | | /* 14284 */ "EFSABS\0" |
8342 | | /* 14291 */ "EVFSABS\0" |
8343 | | /* 14299 */ "EVABS\0" |
8344 | | /* 14305 */ "G_ABS\0" |
8345 | | /* 14311 */ "VSUM4SBS\0" |
8346 | | /* 14320 */ "VSUBSBS\0" |
8347 | | /* 14328 */ "VADDSBS\0" |
8348 | | /* 14336 */ "VSUM4UBS\0" |
8349 | | /* 14345 */ "VSUBUBS\0" |
8350 | | /* 14353 */ "VADDUBS\0" |
8351 | | /* 14361 */ "FSUBS\0" |
8352 | | /* 14367 */ "FMSUBS\0" |
8353 | | /* 14374 */ "FNMSUBS\0" |
8354 | | /* 14382 */ "FADDS\0" |
8355 | | /* 14388 */ "FMADDS\0" |
8356 | | /* 14395 */ "FNMADDS\0" |
8357 | | /* 14403 */ "FCFIDS\0" |
8358 | | /* 14410 */ "DCBTDS\0" |
8359 | | /* 14417 */ "DCBTSTDS\0" |
8360 | | /* 14426 */ "XSCVDPSXDS\0" |
8361 | | /* 14437 */ "XVCVDPSXDS\0" |
8362 | | /* 14448 */ "XVCVSPSXDS\0" |
8363 | | /* 14459 */ "XSCVDPUXDS\0" |
8364 | | /* 14470 */ "XVCVDPUXDS\0" |
8365 | | /* 14481 */ "XVCVSPUXDS\0" |
8366 | | /* 14492 */ "V_SETALLONES\0" |
8367 | | /* 14505 */ "FRES\0" |
8368 | | /* 14510 */ "FRSQRTES\0" |
8369 | | /* 14519 */ "G_UNMERGE_VALUES\0" |
8370 | | /* 14536 */ "G_MERGE_VALUES\0" |
8371 | | /* 14551 */ "EFDCFS\0" |
8372 | | /* 14558 */ "MFFS\0" |
8373 | | /* 14563 */ "PLFS\0" |
8374 | | /* 14568 */ "MCRFS\0" |
8375 | | /* 14574 */ "PSTFS\0" |
8376 | | /* 14580 */ "FNEGS\0" |
8377 | | /* 14586 */ "VSUM4SHS\0" |
8378 | | /* 14595 */ "VSUBSHS\0" |
8379 | | /* 14603 */ "VMHADDSHS\0" |
8380 | | /* 14613 */ "VMHRADDSHS\0" |
8381 | | /* 14624 */ "VADDSHS\0" |
8382 | | /* 14632 */ "VMSUMSHS\0" |
8383 | | /* 14641 */ "VSUBUHS\0" |
8384 | | /* 14649 */ "VADDUHS\0" |
8385 | | /* 14657 */ "VMSUMUHS\0" |
8386 | | /* 14666 */ "SUBIS\0" |
8387 | | /* 14672 */ "SUBPCIS\0" |
8388 | | /* 14680 */ "ADDPCIS\0" |
8389 | | /* 14688 */ "ADDIS\0" |
8390 | | /* 14694 */ "LIS\0" |
8391 | | /* 14698 */ "XORIS\0" |
8392 | | /* 14704 */ "EVSRWIS\0" |
8393 | | /* 14712 */ "FSELS\0" |
8394 | | /* 14718 */ "ADD4TLS\0" |
8395 | | /* 14726 */ "ADD8TLS\0" |
8396 | | /* 14734 */ "ICBTLS\0" |
8397 | | /* 14741 */ "LHAXTLS\0" |
8398 | | /* 14749 */ "LWAXTLS\0" |
8399 | | /* 14757 */ "STBXTLS\0" |
8400 | | /* 14765 */ "LFDXTLS\0" |
8401 | | /* 14773 */ "STFDXTLS\0" |
8402 | | /* 14782 */ "LDXTLS\0" |
8403 | | /* 14789 */ "STDXTLS\0" |
8404 | | /* 14797 */ "STHXTLS\0" |
8405 | | /* 14805 */ "LFSXTLS\0" |
8406 | | /* 14813 */ "STFSXTLS\0" |
8407 | | /* 14822 */ "STWXTLS\0" |
8408 | | /* 14830 */ "LBZXTLS\0" |
8409 | | /* 14838 */ "LHZXTLS\0" |
8410 | | /* 14846 */ "LWZXTLS\0" |
8411 | | /* 14854 */ "BL8_TLS\0" |
8412 | | /* 14862 */ "BL8_NOTOC_TLS\0" |
8413 | | /* 14876 */ "BL_TLS\0" |
8414 | | /* 14883 */ "BL8_NOP_TLS\0" |
8415 | | /* 14895 */ "FMULS\0" |
8416 | | /* 14901 */ "FRIMS\0" |
8417 | | /* 14907 */ "FCPSGNS\0" |
8418 | | /* 14915 */ "FRINS\0" |
8419 | | /* 14921 */ "G_FCOS\0" |
8420 | | /* 14928 */ "EVLWHOS\0" |
8421 | | /* 14936 */ "FCMPOS\0" |
8422 | | /* 14943 */ "DCBFPS\0" |
8423 | | /* 14950 */ "FRIPS\0" |
8424 | | /* 14956 */ "DCBSTPS\0" |
8425 | | /* 14964 */ "G_CONCAT_VECTORS\0" |
8426 | | /* 14981 */ "COPY_TO_REGCLASS\0" |
8427 | | /* 14998 */ "G_IS_FPCLASS\0" |
8428 | | /* 15011 */ "FABSS\0" |
8429 | | /* 15017 */ "FNABSS\0" |
8430 | | /* 15024 */ "VPKSDSS\0" |
8431 | | /* 15032 */ "G_ATOMIC_CMPXCHG_WITH_SUCCESS\0" |
8432 | | /* 15062 */ "VPKSHSS\0" |
8433 | | /* 15070 */ "VPKSWSS\0" |
8434 | | /* 15078 */ "G_INTRINSIC_W_SIDE_EFFECTS\0" |
8435 | | /* 15105 */ "G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS\0" |
8436 | | /* 15143 */ "EVCMPGTS\0" |
8437 | | /* 15152 */ "EVCMPLTS\0" |
8438 | | /* 15161 */ "FSQRTS\0" |
8439 | | /* 15168 */ "FCFIDUS\0" |
8440 | | /* 15176 */ "VPKSDUS\0" |
8441 | | /* 15184 */ "VPKUDUS\0" |
8442 | | /* 15192 */ "SUBFUS\0" |
8443 | | /* 15199 */ "VPKSHUS\0" |
8444 | | /* 15207 */ "VPKUHUS\0" |
8445 | | /* 15215 */ "FCMPUS\0" |
8446 | | /* 15222 */ "VPKSWUS\0" |
8447 | | /* 15230 */ "VPKUWUS\0" |
8448 | | /* 15238 */ "FDIVS\0" |
8449 | | /* 15244 */ "EVSRWS\0" |
8450 | | /* 15251 */ "MTVSRWS\0" |
8451 | | /* 15259 */ "VSUM2SWS\0" |
8452 | | /* 15268 */ "VSUBSWS\0" |
8453 | | /* 15276 */ "VADDSWS\0" |
8454 | | /* 15284 */ "VSUMSWS\0" |
8455 | | /* 15292 */ "VSUBUWS\0" |
8456 | | /* 15300 */ "VADDUWS\0" |
8457 | | /* 15308 */ "EVDIVWS\0" |
8458 | | /* 15316 */ "XSCVDPSXWS\0" |
8459 | | /* 15327 */ "XVCVDPSXWS\0" |
8460 | | /* 15338 */ "XVCVSPSXWS\0" |
8461 | | /* 15349 */ "XSCVDPUXWS\0" |
8462 | | /* 15360 */ "XVCVDPUXWS\0" |
8463 | | /* 15371 */ "XVCVSPUXWS\0" |
8464 | | /* 15382 */ "VCTSXS\0" |
8465 | | /* 15389 */ "VCTUXS\0" |
8466 | | /* 15396 */ "FRIZS\0" |
8467 | | /* 15402 */ "LDAT\0" |
8468 | | /* 15407 */ "STDAT\0" |
8469 | | /* 15413 */ "EVLHHESPLAT\0" |
8470 | | /* 15425 */ "EVLWHSPLAT\0" |
8471 | | /* 15436 */ "EVLHHOSSPLAT\0" |
8472 | | /* 15449 */ "EVLHHOUSPLAT\0" |
8473 | | /* 15462 */ "EVLWWSPLAT\0" |
8474 | | /* 15473 */ "G_SSUBSAT\0" |
8475 | | /* 15483 */ "G_USUBSAT\0" |
8476 | | /* 15493 */ "G_SADDSAT\0" |
8477 | | /* 15503 */ "G_UADDSAT\0" |
8478 | | /* 15513 */ "G_SSHLSAT\0" |
8479 | | /* 15523 */ "G_USHLSAT\0" |
8480 | | /* 15533 */ "G_SMULFIXSAT\0" |
8481 | | /* 15546 */ "G_UMULFIXSAT\0" |
8482 | | /* 15559 */ "G_SDIVFIXSAT\0" |
8483 | | /* 15572 */ "G_UDIVFIXSAT\0" |
8484 | | /* 15585 */ "LWAT\0" |
8485 | | /* 15590 */ "STWAT\0" |
8486 | | /* 15596 */ "DCBT\0" |
8487 | | /* 15601 */ "ICBT\0" |
8488 | | /* 15606 */ "G_EXTRACT\0" |
8489 | | /* 15616 */ "G_SELECT\0" |
8490 | | /* 15625 */ "G_BRINDIRECT\0" |
8491 | | /* 15638 */ "DCBTCT\0" |
8492 | | /* 15645 */ "DCBTSTCT\0" |
8493 | | /* 15654 */ "PATCHABLE_RET\0" |
8494 | | /* 15668 */ "TCHECK_RET\0" |
8495 | | /* 15679 */ "TBEGIN_RET\0" |
8496 | | /* 15690 */ "CR6SET\0" |
8497 | | /* 15697 */ "DYNAREAOFFSET\0" |
8498 | | /* 15711 */ "G_MEMSET\0" |
8499 | | /* 15720 */ "CR6UNSET\0" |
8500 | | /* 15729 */ "CRUNSET\0" |
8501 | | /* 15737 */ "CRSET\0" |
8502 | | /* 15743 */ "EFDCMPGT\0" |
8503 | | /* 15752 */ "EFSCMPGT\0" |
8504 | | /* 15761 */ "EVFSCMPGT\0" |
8505 | | /* 15771 */ "EFDTSTGT\0" |
8506 | | /* 15780 */ "EFSTSTGT\0" |
8507 | | /* 15789 */ "EVFSTSTGT\0" |
8508 | | /* 15799 */ "WAIT\0" |
8509 | | /* 15804 */ "RESTORE_CRBIT\0" |
8510 | | /* 15818 */ "SPILL_CRBIT\0" |
8511 | | /* 15830 */ "ANDI_rec_1_EQ_BIT\0" |
8512 | | /* 15848 */ "ANDI_rec_1_GT_BIT\0" |
8513 | | /* 15866 */ "PATCHABLE_FUNCTION_EXIT\0" |
8514 | | /* 15890 */ "G_BRJT\0" |
8515 | | /* 15897 */ "G_EXTRACT_VECTOR_ELT\0" |
8516 | | /* 15918 */ "G_INSERT_VECTOR_ELT\0" |
8517 | | /* 15938 */ "EFDCMPLT\0" |
8518 | | /* 15947 */ "EFSCMPLT\0" |
8519 | | /* 15956 */ "EVFSCMPLT\0" |
8520 | | /* 15966 */ "EFDTSTLT\0" |
8521 | | /* 15975 */ "EFSTSTLT\0" |
8522 | | /* 15984 */ "EVFSTSTLT\0" |
8523 | | /* 15994 */ "G_FCONSTANT\0" |
8524 | | /* 16006 */ "G_CONSTANT\0" |
8525 | | /* 16017 */ "G_INTRINSIC_CONVERGENT\0" |
8526 | | /* 16040 */ "STATEPOINT\0" |
8527 | | /* 16051 */ "PATCHPOINT\0" |
8528 | | /* 16062 */ "G_PTRTOINT\0" |
8529 | | /* 16073 */ "G_FRINT\0" |
8530 | | /* 16081 */ "G_INTRINSIC_LRINT\0" |
8531 | | /* 16099 */ "G_FNEARBYINT\0" |
8532 | | /* 16112 */ "PPC32GOT\0" |
8533 | | /* 16121 */ "PPC32PICGOT\0" |
8534 | | /* 16133 */ "CRNOT\0" |
8535 | | /* 16139 */ "LDtocCPT\0" |
8536 | | /* 16148 */ "TRECHKPT\0" |
8537 | | /* 16157 */ "G_VASTART\0" |
8538 | | /* 16167 */ "LIFETIME_START\0" |
8539 | | /* 16182 */ "G_INVOKE_REGION_START\0" |
8540 | | /* 16204 */ "G_INSERT\0" |
8541 | | /* 16213 */ "TABORT\0" |
8542 | | /* 16220 */ "CP_ABORT\0" |
8543 | | /* 16229 */ "G_FSQRT\0" |
8544 | | /* 16237 */ "G_STRICT_FSQRT\0" |
8545 | | /* 16252 */ "FTSQRT\0" |
8546 | | /* 16259 */ "G_BITCAST\0" |
8547 | | /* 16269 */ "G_ADDRSPACE_CAST\0" |
8548 | | /* 16286 */ "VNCIPHERLAST\0" |
8549 | | /* 16299 */ "VCIPHERLAST\0" |
8550 | | /* 16311 */ "DCBST\0" |
8551 | | /* 16317 */ "DST\0" |
8552 | | /* 16321 */ "HASHST\0" |
8553 | | /* 16328 */ "DBG_VALUE_LIST\0" |
8554 | | /* 16343 */ "DCBTST\0" |
8555 | | /* 16350 */ "DSTST\0" |
8556 | | /* 16356 */ "SPILLTOVSR_ST\0" |
8557 | | /* 16370 */ "DCBTT\0" |
8558 | | /* 16376 */ "DSTT\0" |
8559 | | /* 16381 */ "DCBTSTT\0" |
8560 | | /* 16389 */ "DSTSTT\0" |
8561 | | /* 16396 */ "G_FPEXT\0" |
8562 | | /* 16404 */ "G_SEXT\0" |
8563 | | /* 16411 */ "G_ASSERT_SEXT\0" |
8564 | | /* 16425 */ "G_ANYEXT\0" |
8565 | | /* 16434 */ "G_ZEXT\0" |
8566 | | /* 16441 */ "G_ASSERT_ZEXT\0" |
8567 | | /* 16455 */ "LHAU\0" |
8568 | | /* 16460 */ "STBU\0" |
8569 | | /* 16465 */ "LFDU\0" |
8570 | | /* 16470 */ "STFDU\0" |
8571 | | /* 16476 */ "MADDHDU\0" |
8572 | | /* 16484 */ "MULHDU\0" |
8573 | | /* 16491 */ "FCFIDU\0" |
8574 | | /* 16498 */ "FCTIDU\0" |
8575 | | /* 16505 */ "LDU\0" |
8576 | | /* 16509 */ "STDU\0" |
8577 | | /* 16514 */ "DIVDU\0" |
8578 | | /* 16520 */ "DIVDEU\0" |
8579 | | /* 16527 */ "DIVWEU\0" |
8580 | | /* 16534 */ "STHU\0" |
8581 | | /* 16539 */ "EVSRWIU\0" |
8582 | | /* 16547 */ "EVLWHOU\0" |
8583 | | /* 16555 */ "DCMPU\0" |
8584 | | /* 16561 */ "LFSU\0" |
8585 | | /* 16566 */ "STFSU\0" |
8586 | | /* 16572 */ "EVCMPGTU\0" |
8587 | | /* 16581 */ "EVCMPLTU\0" |
8588 | | /* 16590 */ "MULHWU\0" |
8589 | | /* 16597 */ "FCTIWU\0" |
8590 | | /* 16604 */ "EVSRWU\0" |
8591 | | /* 16611 */ "STWU\0" |
8592 | | /* 16616 */ "EVDIVWU\0" |
8593 | | /* 16624 */ "LBZU\0" |
8594 | | /* 16629 */ "LHZU\0" |
8595 | | /* 16634 */ "LWZU\0" |
8596 | | /* 16639 */ "SCV\0" |
8597 | | /* 16643 */ "SLBMFEV\0" |
8598 | | /* 16651 */ "EFDDIV\0" |
8599 | | /* 16658 */ "G_FDIV\0" |
8600 | | /* 16665 */ "G_STRICT_FDIV\0" |
8601 | | /* 16679 */ "EFSDIV\0" |
8602 | | /* 16686 */ "EVFSDIV\0" |
8603 | | /* 16694 */ "G_SDIV\0" |
8604 | | /* 16701 */ "FTDIV\0" |
8605 | | /* 16707 */ "G_UDIV\0" |
8606 | | /* 16714 */ "VSLV\0" |
8607 | | /* 16719 */ "G_GET_FPENV\0" |
8608 | | /* 16731 */ "G_RESET_FPENV\0" |
8609 | | /* 16745 */ "G_SET_FPENV\0" |
8610 | | /* 16757 */ "XXLEQV\0" |
8611 | | /* 16764 */ "CREQV\0" |
8612 | | /* 16770 */ "EVEQV\0" |
8613 | | /* 16776 */ "VSRV\0" |
8614 | | /* 16781 */ "PLXV\0" |
8615 | | /* 16786 */ "PSTXV\0" |
8616 | | /* 16792 */ "VEXTSB2W\0" |
8617 | | /* 16801 */ "VEXTSH2W\0" |
8618 | | /* 16810 */ "PMXVBF16GER2W\0" |
8619 | | /* 16824 */ "PMXVF16GER2W\0" |
8620 | | /* 16837 */ "PMXVI16GER2W\0" |
8621 | | /* 16850 */ "PMXVI8GER4W\0" |
8622 | | /* 16862 */ "PMXVI4GER8W\0" |
8623 | | /* 16874 */ "EVMHESMFAAW\0" |
8624 | | /* 16886 */ "EVMHOSMFAAW\0" |
8625 | | /* 16898 */ "EVMHESSFAAW\0" |
8626 | | /* 16910 */ "EVMHOSSFAAW\0" |
8627 | | /* 16922 */ "EVADDSMIAAW\0" |
8628 | | /* 16934 */ "EVMHESMIAAW\0" |
8629 | | /* 16946 */ "EVSUBFSMIAAW\0" |
8630 | | /* 16959 */ "EVMWLSMIAAW\0" |
8631 | | /* 16971 */ "EVMHOSMIAAW\0" |
8632 | | /* 16983 */ "EVADDUMIAAW\0" |
8633 | | /* 16995 */ "EVMHEUMIAAW\0" |
8634 | | /* 17007 */ "EVSUBFUMIAAW\0" |
8635 | | /* 17020 */ "EVMWLUMIAAW\0" |
8636 | | /* 17032 */ "EVMHOUMIAAW\0" |
8637 | | /* 17044 */ "EVADDSSIAAW\0" |
8638 | | /* 17056 */ "EVMHESSIAAW\0" |
8639 | | /* 17068 */ "EVSUBFSSIAAW\0" |
8640 | | /* 17081 */ "EVMWLSSIAAW\0" |
8641 | | /* 17093 */ "EVMHOSSIAAW\0" |
8642 | | /* 17105 */ "EVADDUSIAAW\0" |
8643 | | /* 17117 */ "EVMHEUSIAAW\0" |
8644 | | /* 17129 */ "EVSUBFUSIAAW\0" |
8645 | | /* 17142 */ "EVMWLUSIAAW\0" |
8646 | | /* 17154 */ "EVMHOUSIAAW\0" |
8647 | | /* 17166 */ "VSHASIGMAW\0" |
8648 | | /* 17177 */ "VSRAW\0" |
8649 | | /* 17183 */ "VCNTMBW\0" |
8650 | | /* 17191 */ "VPRTYBW\0" |
8651 | | /* 17199 */ "XXMFACCW\0" |
8652 | | /* 17208 */ "XXMTACCW\0" |
8653 | | /* 17217 */ "EVADDW\0" |
8654 | | /* 17224 */ "EVLDW\0" |
8655 | | /* 17230 */ "EVRNDW\0" |
8656 | | /* 17237 */ "EVSTDW\0" |
8657 | | /* 17244 */ "VMRGEW\0" |
8658 | | /* 17251 */ "VCMPNEW\0" |
8659 | | /* 17259 */ "EVSUBFW\0" |
8660 | | /* 17267 */ "EVSUBIFW\0" |
8661 | | /* 17276 */ "VNEGW\0" |
8662 | | /* 17282 */ "VMRGHW\0" |
8663 | | /* 17289 */ "XXMRGHW\0" |
8664 | | /* 17297 */ "MULHW\0" |
8665 | | /* 17303 */ "EVADDIW\0" |
8666 | | /* 17311 */ "FCTIW\0" |
8667 | | /* 17317 */ "XXSPLTIW\0" |
8668 | | /* 17326 */ "VMRGLW\0" |
8669 | | /* 17333 */ "XXMRGLW\0" |
8670 | | /* 17341 */ "MULLW\0" |
8671 | | /* 17347 */ "CMPLW\0" |
8672 | | /* 17353 */ "EVRLW\0" |
8673 | | /* 17359 */ "EVSLW\0" |
8674 | | /* 17365 */ "LMW\0" |
8675 | | /* 17369 */ "STMW\0" |
8676 | | /* 17374 */ "VPMSUMW\0" |
8677 | | /* 17382 */ "EVMHESMFANW\0" |
8678 | | /* 17394 */ "EVMHOSMFANW\0" |
8679 | | /* 17406 */ "EVMHESSFANW\0" |
8680 | | /* 17418 */ "EVMHOSSFANW\0" |
8681 | | /* 17430 */ "EVMHESMIANW\0" |
8682 | | /* 17442 */ "EVMWLSMIANW\0" |
8683 | | /* 17454 */ "EVMHOSMIANW\0" |
8684 | | /* 17466 */ "EVMHEUMIANW\0" |
8685 | | /* 17478 */ "EVMWLUMIANW\0" |
8686 | | /* 17490 */ "EVMHOUMIANW\0" |
8687 | | /* 17502 */ "EVMHESSIANW\0" |
8688 | | /* 17514 */ "EVMWLSSIANW\0" |
8689 | | /* 17526 */ "EVMHOSSIANW\0" |
8690 | | /* 17538 */ "EVMHEUSIANW\0" |
8691 | | /* 17550 */ "EVMWLUSIANW\0" |
8692 | | /* 17562 */ "EVMHOUSIANW\0" |
8693 | | /* 17574 */ "VMRGOW\0" |
8694 | | /* 17581 */ "G_FPOW\0" |
8695 | | /* 17588 */ "CMPW\0" |
8696 | | /* 17593 */ "XXBRW\0" |
8697 | | /* 17599 */ "PMXVF32GERW\0" |
8698 | | /* 17611 */ "PMXVF64GERW\0" |
8699 | | /* 17623 */ "VSRW\0" |
8700 | | /* 17628 */ "PMXVI16GER2SW\0" |
8701 | | /* 17642 */ "VMODSW\0" |
8702 | | /* 17649 */ "VMULESW\0" |
8703 | | /* 17657 */ "VDIVESW\0" |
8704 | | /* 17665 */ "VAVGSW\0" |
8705 | | /* 17672 */ "VUPKHSW\0" |
8706 | | /* 17680 */ "VMULHSW\0" |
8707 | | /* 17688 */ "VSPLTISW\0" |
8708 | | /* 17697 */ "VUPKLSW\0" |
8709 | | /* 17705 */ "EVCNTLSW\0" |
8710 | | /* 17714 */ "VMINSW\0" |
8711 | | /* 17721 */ "VINSW\0" |
8712 | | /* 17727 */ "VMULOSW\0" |
8713 | | /* 17735 */ "VCMPGTSW\0" |
8714 | | /* 17744 */ "EXTSW\0" |
8715 | | /* 17750 */ "VDIVSW\0" |
8716 | | /* 17757 */ "VMAXSW\0" |
8717 | | /* 17764 */ "VSPLTW\0" |
8718 | | /* 17771 */ "XXSPLTW\0" |
8719 | | /* 17779 */ "VPOPCNTW\0" |
8720 | | /* 17788 */ "VINSERTW\0" |
8721 | | /* 17797 */ "XXINSERTW\0" |
8722 | | /* 17807 */ "SPESTW\0" |
8723 | | /* 17814 */ "PSTW\0" |
8724 | | /* 17819 */ "VSUBCUW\0" |
8725 | | /* 17827 */ "VADDCUW\0" |
8726 | | /* 17835 */ "VMODUW\0" |
8727 | | /* 17842 */ "VABSDUW\0" |
8728 | | /* 17850 */ "VMULEUW\0" |
8729 | | /* 17858 */ "VDIVEUW\0" |
8730 | | /* 17866 */ "VAVGUW\0" |
8731 | | /* 17873 */ "VMULHUW\0" |
8732 | | /* 17881 */ "VMINUW\0" |
8733 | | /* 17888 */ "VMULOUW\0" |
8734 | | /* 17896 */ "VCMPEQUW\0" |
8735 | | /* 17905 */ "VEXTRACTUW\0" |
8736 | | /* 17916 */ "XXEXTRACTUW\0" |
8737 | | /* 17928 */ "VCMPGTUW\0" |
8738 | | /* 17937 */ "VDIVUW\0" |
8739 | | /* 17944 */ "VMAXUW\0" |
8740 | | /* 17951 */ "XXBLENDVW\0" |
8741 | | /* 17961 */ "DIVW\0" |
8742 | | /* 17966 */ "XXSETACCZW\0" |
8743 | | /* 17977 */ "VCMPNEZW\0" |
8744 | | /* 17986 */ "VCLZW\0" |
8745 | | /* 17992 */ "EVCNTLZW\0" |
8746 | | /* 18001 */ "VCTZW\0" |
8747 | | /* 18007 */ "CNTTZW\0" |
8748 | | /* 18014 */ "LXVD2X\0" |
8749 | | /* 18021 */ "STXVD2X\0" |
8750 | | /* 18029 */ "LXVW4X\0" |
8751 | | /* 18036 */ "STXVW4X\0" |
8752 | | /* 18044 */ "LXVB16X\0" |
8753 | | /* 18052 */ "STXVB16X\0" |
8754 | | /* 18061 */ "LXVH8X\0" |
8755 | | /* 18068 */ "STXVH8X\0" |
8756 | | /* 18076 */ "LHAX\0" |
8757 | | /* 18081 */ "G_VECREDUCE_FMAX\0" |
8758 | | /* 18098 */ "G_ATOMICRMW_FMAX\0" |
8759 | | /* 18115 */ "G_VECREDUCE_SMAX\0" |
8760 | | /* 18132 */ "G_SMAX\0" |
8761 | | /* 18139 */ "G_VECREDUCE_UMAX\0" |
8762 | | /* 18156 */ "G_UMAX\0" |
8763 | | /* 18163 */ "G_ATOMICRMW_UMAX\0" |
8764 | | /* 18180 */ "G_ATOMICRMW_MAX\0" |
8765 | | /* 18196 */ "TLBIVAX\0" |
8766 | | /* 18204 */ "LFIWAX\0" |
8767 | | /* 18211 */ "LIWAX\0" |
8768 | | /* 18217 */ "LXSIWAX\0" |
8769 | | /* 18225 */ "LWAX\0" |
8770 | | /* 18230 */ "LVEBX\0" |
8771 | | /* 18236 */ "STVEBX\0" |
8772 | | /* 18243 */ "STXSIBX\0" |
8773 | | /* 18251 */ "LXVRBX\0" |
8774 | | /* 18258 */ "STXVRBX\0" |
8775 | | /* 18266 */ "STBX\0" |
8776 | | /* 18271 */ "STBCX\0" |
8777 | | /* 18277 */ "STDCX\0" |
8778 | | /* 18283 */ "STHCX\0" |
8779 | | /* 18289 */ "STQCX\0" |
8780 | | /* 18295 */ "STWCX\0" |
8781 | | /* 18301 */ "XXSPLTI32DX\0" |
8782 | | /* 18313 */ "EVLDDX\0" |
8783 | | /* 18320 */ "EVSTDDX\0" |
8784 | | /* 18328 */ "LFDX\0" |
8785 | | /* 18333 */ "STFDX\0" |
8786 | | /* 18339 */ "SPILLTOVSR_LDX\0" |
8787 | | /* 18354 */ "LXVRDX\0" |
8788 | | /* 18361 */ "STXVRDX\0" |
8789 | | /* 18369 */ "LXSDX\0" |
8790 | | /* 18375 */ "STXSDX\0" |
8791 | | /* 18382 */ "STDX\0" |
8792 | | /* 18387 */ "ADDEX\0" |
8793 | | /* 18393 */ "G_FRAME_INDEX\0" |
8794 | | /* 18407 */ "EVLWHEX\0" |
8795 | | /* 18415 */ "EVSTWHEX\0" |
8796 | | /* 18424 */ "DIEX\0" |
8797 | | /* 18429 */ "DTSTEX\0" |
8798 | | /* 18436 */ "EVSTWWEX\0" |
8799 | | /* 18445 */ "DXEX\0" |
8800 | | /* 18450 */ "G_SBFX\0" |
8801 | | /* 18457 */ "G_UBFX\0" |
8802 | | /* 18464 */ "EVLDHX\0" |
8803 | | /* 18471 */ "EVSTDHX\0" |
8804 | | /* 18479 */ "LVEHX\0" |
8805 | | /* 18485 */ "STVEHX\0" |
8806 | | /* 18492 */ "STXSIHX\0" |
8807 | | /* 18500 */ "LXVRHX\0" |
8808 | | /* 18507 */ "STXVRHX\0" |
8809 | | /* 18515 */ "STHX\0" |
8810 | | /* 18520 */ "GETtlsADDR32AIX\0" |
8811 | | /* 18536 */ "GETtlsTpointer32AIX\0" |
8812 | | /* 18556 */ "GETtlsADDR64AIX\0" |
8813 | | /* 18572 */ "TLSGDAIX\0" |
8814 | | /* 18581 */ "STBCIX\0" |
8815 | | /* 18588 */ "LDCIX\0" |
8816 | | /* 18594 */ "STDCIX\0" |
8817 | | /* 18601 */ "STHCIX\0" |
8818 | | /* 18608 */ "STWCIX\0" |
8819 | | /* 18615 */ "LBZCIX\0" |
8820 | | /* 18622 */ "LHZCIX\0" |
8821 | | /* 18629 */ "LWZCIX\0" |
8822 | | /* 18636 */ "DCFFIX\0" |
8823 | | /* 18643 */ "G_SMULFIX\0" |
8824 | | /* 18653 */ "G_UMULFIX\0" |
8825 | | /* 18663 */ "DCTFIX\0" |
8826 | | /* 18670 */ "G_SDIVFIX\0" |
8827 | | /* 18680 */ "G_UDIVFIX\0" |
8828 | | /* 18690 */ "XSRQPIX\0" |
8829 | | /* 18698 */ "VINSBLX\0" |
8830 | | /* 18706 */ "VEXTUBLX\0" |
8831 | | /* 18715 */ "VINSDLX\0" |
8832 | | /* 18723 */ "VINSHLX\0" |
8833 | | /* 18731 */ "VEXTUHLX\0" |
8834 | | /* 18740 */ "TLBILX\0" |
8835 | | /* 18747 */ "VINSBVLX\0" |
8836 | | /* 18756 */ "VEXTDUBVLX\0" |
8837 | | /* 18767 */ "VEXTDDVLX\0" |
8838 | | /* 18777 */ "VINSHVLX\0" |
8839 | | /* 18786 */ "VEXTDUHVLX\0" |
8840 | | /* 18797 */ "VINSWVLX\0" |
8841 | | /* 18806 */ "VEXTDUWVLX\0" |
8842 | | /* 18817 */ "VINSWLX\0" |
8843 | | /* 18825 */ "VEXTUWLX\0" |
8844 | | /* 18834 */ "XXPERMX\0" |
8845 | | /* 18842 */ "VSBOX\0" |
8846 | | /* 18848 */ "EVSTWHOX\0" |
8847 | | /* 18857 */ "EVSTWWOX\0" |
8848 | | /* 18866 */ "LBEPX\0" |
8849 | | /* 18872 */ "STBEPX\0" |
8850 | | /* 18879 */ "LFDEPX\0" |
8851 | | /* 18886 */ "STFDEPX\0" |
8852 | | /* 18894 */ "LHEPX\0" |
8853 | | /* 18900 */ "STHEPX\0" |
8854 | | /* 18907 */ "LWEPX\0" |
8855 | | /* 18913 */ "STWEPX\0" |
8856 | | /* 18920 */ "VUPKHPX\0" |
8857 | | /* 18928 */ "VPKPX\0" |
8858 | | /* 18934 */ "VUPKLPX\0" |
8859 | | /* 18942 */ "LXSSPX\0" |
8860 | | /* 18949 */ "STXSSPX\0" |
8861 | | /* 18957 */ "LXVPX\0" |
8862 | | /* 18963 */ "STXVPX\0" |
8863 | | /* 18970 */ "LBARX\0" |
8864 | | /* 18976 */ "LDARX\0" |
8865 | | /* 18982 */ "LHARX\0" |
8866 | | /* 18988 */ "LQARX\0" |
8867 | | /* 18994 */ "LWARX\0" |
8868 | | /* 19000 */ "LDBRX\0" |
8869 | | /* 19006 */ "STDBRX\0" |
8870 | | /* 19013 */ "LHBRX\0" |
8871 | | /* 19019 */ "STHBRX\0" |
8872 | | /* 19026 */ "VINSBRX\0" |
8873 | | /* 19034 */ "VEXTUBRX\0" |
8874 | | /* 19043 */ "LWBRX\0" |
8875 | | /* 19049 */ "STWBRX\0" |
8876 | | /* 19056 */ "VINSDRX\0" |
8877 | | /* 19064 */ "VINSHRX\0" |
8878 | | /* 19072 */ "VEXTUHRX\0" |
8879 | | /* 19081 */ "VINSBVRX\0" |
8880 | | /* 19090 */ "VEXTDUBVRX\0" |
8881 | | /* 19101 */ "VEXTDDVRX\0" |
8882 | | /* 19111 */ "VINSHVRX\0" |
8883 | | /* 19120 */ "VEXTDUHVRX\0" |
8884 | | /* 19131 */ "VINSWVRX\0" |
8885 | | /* 19140 */ "VEXTDUWVRX\0" |
8886 | | /* 19151 */ "VINSWRX\0" |
8887 | | /* 19159 */ "VEXTUWRX\0" |
8888 | | /* 19168 */ "MCRXRX\0" |
8889 | | /* 19175 */ "TLBSX\0" |
8890 | | /* 19181 */ "LXVDSX\0" |
8891 | | /* 19188 */ "VCFSX\0" |
8892 | | /* 19194 */ "LFSX\0" |
8893 | | /* 19199 */ "STFSX\0" |
8894 | | /* 19205 */ "EVLWHOSX\0" |
8895 | | /* 19214 */ "LXVWSX\0" |
8896 | | /* 19221 */ "EVLHHESPLATX\0" |
8897 | | /* 19234 */ "EVLWHSPLATX\0" |
8898 | | /* 19246 */ "EVLHHOSSPLATX\0" |
8899 | | /* 19260 */ "EVLHHOUSPLATX\0" |
8900 | | /* 19274 */ "EVLWWSPLATX\0" |
8901 | | /* 19286 */ "DRINTX\0" |
8902 | | /* 19293 */ "SPILLTOVSR_STX\0" |
8903 | | /* 19308 */ "LHAUX\0" |
8904 | | /* 19314 */ "LWAUX\0" |
8905 | | /* 19320 */ "STBUX\0" |
8906 | | /* 19326 */ "LFDUX\0" |
8907 | | /* 19332 */ "STFDUX\0" |
8908 | | /* 19339 */ "LDUX\0" |
8909 | | /* 19344 */ "STDUX\0" |
8910 | | /* 19350 */ "VCFUX\0" |
8911 | | /* 19356 */ "STHUX\0" |
8912 | | /* 19362 */ "EVLWHOUX\0" |
8913 | | /* 19371 */ "LFSUX\0" |
8914 | | /* 19377 */ "STFSUX\0" |
8915 | | /* 19384 */ "STWUX\0" |
8916 | | /* 19390 */ "LBZUX\0" |
8917 | | /* 19396 */ "LHZUX\0" |
8918 | | /* 19402 */ "LWZUX\0" |
8919 | | /* 19408 */ "LVX\0" |
8920 | | /* 19412 */ "STVX\0" |
8921 | | /* 19417 */ "LXVX\0" |
8922 | | /* 19422 */ "STXVX\0" |
8923 | | /* 19428 */ "EVLDWX\0" |
8924 | | /* 19435 */ "EVSTDWX\0" |
8925 | | /* 19443 */ "LVEWX\0" |
8926 | | /* 19449 */ "STVEWX\0" |
8927 | | /* 19456 */ "STFIWX\0" |
8928 | | /* 19463 */ "STXSIWX\0" |
8929 | | /* 19471 */ "STIWX\0" |
8930 | | /* 19477 */ "LXVRWX\0" |
8931 | | /* 19484 */ "STXVRWX\0" |
8932 | | /* 19492 */ "SPESTWX\0" |
8933 | | /* 19500 */ "LXSIBZX\0" |
8934 | | /* 19508 */ "LBZX\0" |
8935 | | /* 19513 */ "LXSIHZX\0" |
8936 | | /* 19521 */ "LHZX\0" |
8937 | | /* 19526 */ "LFIWZX\0" |
8938 | | /* 19533 */ "LIWZX\0" |
8939 | | /* 19539 */ "LXSIWZX\0" |
8940 | | /* 19547 */ "SPELWZX\0" |
8941 | | /* 19555 */ "G_MEMCPY\0" |
8942 | | /* 19564 */ "CP_COPY\0" |
8943 | | /* 19572 */ "DCBZ\0" |
8944 | | /* 19577 */ "PLBZ\0" |
8945 | | /* 19582 */ "XXSETACCZ\0" |
8946 | | /* 19592 */ "BDZ\0" |
8947 | | /* 19596 */ "EFDCTSIDZ\0" |
8948 | | /* 19606 */ "FCTIDZ\0" |
8949 | | /* 19613 */ "EFDCTUIDZ\0" |
8950 | | /* 19623 */ "XSCVQPSDZ\0" |
8951 | | /* 19633 */ "XSCVQPUDZ\0" |
8952 | | /* 19643 */ "PLHZ\0" |
8953 | | /* 19648 */ "VRFIZ\0" |
8954 | | /* 19654 */ "XSRDPIZ\0" |
8955 | | /* 19662 */ "XVRDPIZ\0" |
8956 | | /* 19670 */ "XVRSPIZ\0" |
8957 | | /* 19678 */ "EFDCTSIZ\0" |
8958 | | /* 19687 */ "EFSCTSIZ\0" |
8959 | | /* 19696 */ "EVFSCTSIZ\0" |
8960 | | /* 19706 */ "EFDCTUIZ\0" |
8961 | | /* 19715 */ "EFSCTUIZ\0" |
8962 | | /* 19724 */ "EVFSCTUIZ\0" |
8963 | | /* 19734 */ "G_CTLZ\0" |
8964 | | /* 19741 */ "BDNZ\0" |
8965 | | /* 19746 */ "XSCVQPSQZ\0" |
8966 | | /* 19756 */ "XSCVQPUQZ\0" |
8967 | | /* 19766 */ "DMSETDMRZ\0" |
8968 | | /* 19776 */ "G_CTTZ\0" |
8969 | | /* 19783 */ "FCTIDUZ\0" |
8970 | | /* 19791 */ "FCTIWUZ\0" |
8971 | | /* 19799 */ "FCTIWZ\0" |
8972 | | /* 19806 */ "SPELWZ\0" |
8973 | | /* 19813 */ "PLWZ\0" |
8974 | | /* 19818 */ "MFVSRWZ\0" |
8975 | | /* 19826 */ "MTVSRWZ\0" |
8976 | | /* 19834 */ "MFVRWZ\0" |
8977 | | /* 19841 */ "MTVRWZ\0" |
8978 | | /* 19848 */ "XSCVQPSWZ\0" |
8979 | | /* 19858 */ "XSCVQPUWZ\0" |
8980 | | /* 19868 */ "ADD8TLS_\0" |
8981 | | /* 19877 */ "LHAXTLS_\0" |
8982 | | /* 19886 */ "LWAXTLS_\0" |
8983 | | /* 19895 */ "STBXTLS_\0" |
8984 | | /* 19904 */ "LFDXTLS_\0" |
8985 | | /* 19913 */ "STFDXTLS_\0" |
8986 | | /* 19923 */ "LDXTLS_\0" |
8987 | | /* 19931 */ "STDXTLS_\0" |
8988 | | /* 19940 */ "STHXTLS_\0" |
8989 | | /* 19949 */ "LFSXTLS_\0" |
8990 | | /* 19958 */ "STFSXTLS_\0" |
8991 | | /* 19968 */ "STWXTLS_\0" |
8992 | | /* 19977 */ "LBZXTLS_\0" |
8993 | | /* 19986 */ "LHZXTLS_\0" |
8994 | | /* 19995 */ "LWZXTLS_\0" |
8995 | | /* 20004 */ "BL8_TLS_\0" |
8996 | | /* 20013 */ "MTFSFb\0" |
8997 | | /* 20020 */ "MTFSFIb\0" |
8998 | | /* 20028 */ "RLDICL_32_rec\0" |
8999 | | /* 20042 */ "EXTSWSLI_32_64_rec\0" |
9000 | | /* 20061 */ "EXTSW_32_64_rec\0" |
9001 | | /* 20077 */ "ADD4_rec\0" |
9002 | | /* 20086 */ "EXTSB8_rec\0" |
9003 | | /* 20097 */ "ADDC8_rec\0" |
9004 | | /* 20107 */ "ANDC8_rec\0" |
9005 | | /* 20117 */ "SUBFC8_rec\0" |
9006 | | /* 20128 */ "ORC8_rec\0" |
9007 | | /* 20137 */ "ADD8_rec\0" |
9008 | | /* 20146 */ "NAND8_rec\0" |
9009 | | /* 20156 */ "ADDE8_rec\0" |
9010 | | /* 20166 */ "SUBFE8_rec\0" |
9011 | | /* 20177 */ "ADDME8_rec\0" |
9012 | | /* 20188 */ "SUBFME8_rec\0" |
9013 | | /* 20200 */ "CP_PASTE8_rec\0" |
9014 | | /* 20214 */ "ADDZE8_rec\0" |
9015 | | /* 20225 */ "SUBFZE8_rec\0" |
9016 | | /* 20237 */ "SUBF8_rec\0" |
9017 | | /* 20247 */ "NEG8_rec\0" |
9018 | | /* 20256 */ "EXTSH8_rec\0" |
9019 | | /* 20267 */ "ANDI8_rec\0" |
9020 | | /* 20277 */ "RLWIMI8_rec\0" |
9021 | | /* 20289 */ "RLWINM8_rec\0" |
9022 | | /* 20301 */ "RLWNM8_rec\0" |
9023 | | /* 20312 */ "NOR8_rec\0" |
9024 | | /* 20321 */ "XOR8_rec\0" |
9025 | | /* 20330 */ "ANDIS8_rec\0" |
9026 | | /* 20341 */ "EQV8_rec\0" |
9027 | | /* 20350 */ "SLW8_rec\0" |
9028 | | /* 20359 */ "SRW8_rec\0" |
9029 | | /* 20368 */ "CNTLZW8_rec\0" |
9030 | | /* 20380 */ "CNTTZW8_rec\0" |
9031 | | /* 20392 */ "DQUA_rec\0" |
9032 | | /* 20401 */ "VCMPNEB_rec\0" |
9033 | | /* 20413 */ "VCMPGTSB_rec\0" |
9034 | | /* 20426 */ "EXTSB_rec\0" |
9035 | | /* 20436 */ "VCMPEQUB_rec\0" |
9036 | | /* 20449 */ "BCDSUB_rec\0" |
9037 | | /* 20460 */ "FSUB_rec\0" |
9038 | | /* 20469 */ "FMSUB_rec\0" |
9039 | | /* 20479 */ "FNMSUB_rec\0" |
9040 | | /* 20490 */ "VCMPGTUB_rec\0" |
9041 | | /* 20503 */ "VCMPNEZB_rec\0" |
9042 | | /* 20516 */ "ADDC_rec\0" |
9043 | | /* 20525 */ "ANDC_rec\0" |
9044 | | /* 20534 */ "SUBFC_rec\0" |
9045 | | /* 20544 */ "SUBIC_rec\0" |
9046 | | /* 20554 */ "ADDIC_rec\0" |
9047 | | /* 20564 */ "RLDIC_rec\0" |
9048 | | /* 20574 */ "BCDTRUNC_rec\0" |
9049 | | /* 20587 */ "BCDUTRUNC_rec\0" |
9050 | | /* 20601 */ "ORC_rec\0" |
9051 | | /* 20609 */ "SRAD_rec\0" |
9052 | | /* 20618 */ "DENBCD_rec\0" |
9053 | | /* 20629 */ "BCDADD_rec\0" |
9054 | | /* 20640 */ "FADD_rec\0" |
9055 | | /* 20649 */ "FMADD_rec\0" |
9056 | | /* 20659 */ "FNMADD_rec\0" |
9057 | | /* 20670 */ "FNEGD_rec\0" |
9058 | | /* 20680 */ "MULHD_rec\0" |
9059 | | /* 20690 */ "FCFID_rec\0" |
9060 | | /* 20700 */ "FCTID_rec\0" |
9061 | | /* 20710 */ "FSELD_rec\0" |
9062 | | /* 20720 */ "MULLD_rec\0" |
9063 | | /* 20730 */ "SLD_rec\0" |
9064 | | /* 20738 */ "FRIMD_rec\0" |
9065 | | /* 20748 */ "NAND_rec\0" |
9066 | | /* 20757 */ "FCPSGND_rec\0" |
9067 | | /* 20769 */ "FRIND_rec\0" |
9068 | | /* 20779 */ "DRRND_rec\0" |
9069 | | /* 20789 */ "DDEDPD_rec\0" |
9070 | | /* 20800 */ "FRIPD_rec\0" |
9071 | | /* 20810 */ "SRD_rec\0" |
9072 | | /* 20818 */ "FABSD_rec\0" |
9073 | | /* 20828 */ "FNABSD_rec\0" |
9074 | | /* 20839 */ "VCMPGTSD_rec\0" |
9075 | | /* 20852 */ "VCMPEQUD_rec\0" |
9076 | | /* 20865 */ "VCMPGTUD_rec\0" |
9077 | | /* 20878 */ "DIVD_rec\0" |
9078 | | /* 20887 */ "FRIZD_rec\0" |
9079 | | /* 20897 */ "CNTLZD_rec\0" |
9080 | | /* 20908 */ "CNTTZD_rec\0" |
9081 | | /* 20919 */ "ADDE_rec\0" |
9082 | | /* 20928 */ "DIVDE_rec\0" |
9083 | | /* 20938 */ "SLBFEE_rec\0" |
9084 | | /* 20949 */ "SUBFE_rec\0" |
9085 | | /* 20959 */ "ADDME_rec\0" |
9086 | | /* 20969 */ "SUBFME_rec\0" |
9087 | | /* 20980 */ "FRE_rec\0" |
9088 | | /* 20988 */ "FRSQRTE_rec\0" |
9089 | | /* 21000 */ "CP_PASTE_rec\0" |
9090 | | /* 21013 */ "DIVWE_rec\0" |
9091 | | /* 21023 */ "ADDZE_rec\0" |
9092 | | /* 21033 */ "SUBFZE_rec\0" |
9093 | | /* 21044 */ "SUBF_rec\0" |
9094 | | /* 21053 */ "MTFSF_rec\0" |
9095 | | /* 21063 */ "NEG_rec\0" |
9096 | | /* 21071 */ "VCMPNEH_rec\0" |
9097 | | /* 21083 */ "VCMPGTSH_rec\0" |
9098 | | /* 21096 */ "EXTSH_rec\0" |
9099 | | /* 21106 */ "VCMPEQUH_rec\0" |
9100 | | /* 21119 */ "VCMPGTUH_rec\0" |
9101 | | /* 21132 */ "VCMPNEZH_rec\0" |
9102 | | /* 21145 */ "DQUAI_rec\0" |
9103 | | /* 21155 */ "SRADI_rec\0" |
9104 | | /* 21165 */ "CLRLSLDI_rec\0" |
9105 | | /* 21178 */ "EXTLDI_rec\0" |
9106 | | /* 21189 */ "ANDI_rec\0" |
9107 | | /* 21198 */ "CLRRDI_rec\0" |
9108 | | /* 21209 */ "INSRDI_rec\0" |
9109 | | /* 21220 */ "ROTRDI_rec\0" |
9110 | | /* 21231 */ "EXTRDI_rec\0" |
9111 | | /* 21242 */ "MTFSFI_rec\0" |
9112 | | /* 21253 */ "DSCLI_rec\0" |
9113 | | /* 21263 */ "EXTSWSLI_rec\0" |
9114 | | /* 21276 */ "RLDIMI_rec\0" |
9115 | | /* 21287 */ "RLWIMI_rec\0" |
9116 | | /* 21298 */ "DSCRI_rec\0" |
9117 | | /* 21308 */ "SRAWI_rec\0" |
9118 | | /* 21318 */ "CLRLSLWI_rec\0" |
9119 | | /* 21331 */ "INSLWI_rec\0" |
9120 | | /* 21342 */ "EXTLWI_rec\0" |
9121 | | /* 21353 */ "CLRRWI_rec\0" |
9122 | | /* 21364 */ "INSRWI_rec\0" |
9123 | | /* 21375 */ "ROTRWI_rec\0" |
9124 | | /* 21386 */ "EXTRWI_rec\0" |
9125 | | /* 21397 */ "VSTRIBL_rec\0" |
9126 | | /* 21409 */ "RLDCL_rec\0" |
9127 | | /* 21419 */ "RLDICL_rec\0" |
9128 | | /* 21430 */ "VSTRIHL_rec\0" |
9129 | | /* 21442 */ "DMUL_rec\0" |
9130 | | /* 21451 */ "FMUL_rec\0" |
9131 | | /* 21460 */ "RLWINM_rec\0" |
9132 | | /* 21471 */ "RLWNM_rec\0" |
9133 | | /* 21481 */ "BCDCFN_rec\0" |
9134 | | /* 21492 */ "BCDCPSGN_rec\0" |
9135 | | /* 21505 */ "BCDSETSGN_rec\0" |
9136 | | /* 21519 */ "BCDCTN_rec\0" |
9137 | | /* 21530 */ "DRINTN_rec\0" |
9138 | | /* 21541 */ "ADD4O_rec\0" |
9139 | | /* 21551 */ "ADDC8O_rec\0" |
9140 | | /* 21562 */ "SUBFC8O_rec\0" |
9141 | | /* 21574 */ "ADD8O_rec\0" |
9142 | | /* 21584 */ "ADDE8O_rec\0" |
9143 | | /* 21595 */ "SUBFE8O_rec\0" |
9144 | | /* 21607 */ "ADDME8O_rec\0" |
9145 | | /* 21619 */ "SUBFME8O_rec\0" |
9146 | | /* 21632 */ "ADDZE8O_rec\0" |
9147 | | /* 21644 */ "SUBFZE8O_rec\0" |
9148 | | /* 21657 */ "SUBF8O_rec\0" |
9149 | | /* 21668 */ "NEG8O_rec\0" |
9150 | | /* 21678 */ "ADDCO_rec\0" |
9151 | | /* 21688 */ "SUBFCO_rec\0" |
9152 | | /* 21699 */ "MULLDO_rec\0" |
9153 | | /* 21710 */ "DIVDO_rec\0" |
9154 | | /* 21720 */ "ADDEO_rec\0" |
9155 | | /* 21730 */ "DIVDEO_rec\0" |
9156 | | /* 21741 */ "SUBFEO_rec\0" |
9157 | | /* 21752 */ "ADDMEO_rec\0" |
9158 | | /* 21763 */ "SUBFMEO_rec\0" |
9159 | | /* 21775 */ "DIVWEO_rec\0" |
9160 | | /* 21786 */ "ADDZEO_rec\0" |
9161 | | /* 21797 */ "SUBFZEO_rec\0" |
9162 | | /* 21809 */ "SUBFO_rec\0" |
9163 | | /* 21819 */ "NEGO_rec\0" |
9164 | | /* 21828 */ "DIVDUO_rec\0" |
9165 | | /* 21839 */ "DIVDEUO_rec\0" |
9166 | | /* 21851 */ "DIVWEUO_rec\0" |
9167 | | /* 21863 */ "DIVWUO_rec\0" |
9168 | | /* 21874 */ "MULLWO_rec\0" |
9169 | | /* 21885 */ "DIVWO_rec\0" |
9170 | | /* 21895 */ "XVCMPGEDP_rec\0" |
9171 | | /* 21909 */ "XVCMPEQDP_rec\0" |
9172 | | /* 21923 */ "DCTDP_rec\0" |
9173 | | /* 21933 */ "XVCMPGTDP_rec\0" |
9174 | | /* 21947 */ "VCMPBFP_rec\0" |
9175 | | /* 21959 */ "VCMPGEFP_rec\0" |
9176 | | /* 21972 */ "VCMPEQFP_rec\0" |
9177 | | /* 21985 */ "VCMPGTFP_rec\0" |
9178 | | /* 21998 */ "XVCMPGESP_rec\0" |
9179 | | /* 22012 */ "XVCMPEQSP_rec\0" |
9180 | | /* 22026 */ "DRSP_rec\0" |
9181 | | /* 22035 */ "FRSP_rec\0" |
9182 | | /* 22044 */ "XVCMPGTSP_rec\0" |
9183 | | /* 22058 */ "DQUAQ_rec\0" |
9184 | | /* 22068 */ "DSUBQ_rec\0" |
9185 | | /* 22078 */ "DENBCDQ_rec\0" |
9186 | | /* 22090 */ "DADDQ_rec\0" |
9187 | | /* 22100 */ "DRRNDQ_rec\0" |
9188 | | /* 22111 */ "DDEDPDQ_rec\0" |
9189 | | /* 22123 */ "DQUAIQ_rec\0" |
9190 | | /* 22134 */ "DSCLIQ_rec\0" |
9191 | | /* 22145 */ "DSCRIQ_rec\0" |
9192 | | /* 22156 */ "DMULQ_rec\0" |
9193 | | /* 22166 */ "DRINTNQ_rec\0" |
9194 | | /* 22178 */ "DRDPQ_rec\0" |
9195 | | /* 22188 */ "DCTQPQ_rec\0" |
9196 | | /* 22199 */ "BCDCFSQ_rec\0" |
9197 | | /* 22211 */ "BCDCTSQ_rec\0" |
9198 | | /* 22223 */ "VCMPGTSQ_rec\0" |
9199 | | /* 22236 */ "VCMPEQUQ_rec\0" |
9200 | | /* 22249 */ "VCMPGTUQ_rec\0" |
9201 | | /* 22262 */ "DDIVQ_rec\0" |
9202 | | /* 22272 */ "DIEXQ_rec\0" |
9203 | | /* 22282 */ "DXEXQ_rec\0" |
9204 | | /* 22292 */ "DCFFIXQ_rec\0" |
9205 | | /* 22304 */ "DCTFIXQ_rec\0" |
9206 | | /* 22316 */ "DRINTXQ_rec\0" |
9207 | | /* 22328 */ "VSTRIBR_rec\0" |
9208 | | /* 22340 */ "RLDCR_rec\0" |
9209 | | /* 22350 */ "RLDICR_rec\0" |
9210 | | /* 22361 */ "VSTRIHR_rec\0" |
9211 | | /* 22373 */ "FMR_rec\0" |
9212 | | /* 22381 */ "NOR_rec\0" |
9213 | | /* 22389 */ "XOR_rec\0" |
9214 | | /* 22397 */ "BCDSR_rec\0" |
9215 | | /* 22407 */ "FSUBS_rec\0" |
9216 | | /* 22417 */ "FMSUBS_rec\0" |
9217 | | /* 22428 */ "FNMSUBS_rec\0" |
9218 | | /* 22440 */ "BCDS_rec\0" |
9219 | | /* 22449 */ "FADDS_rec\0" |
9220 | | /* 22459 */ "FMADDS_rec\0" |
9221 | | /* 22470 */ "FNMADDS_rec\0" |
9222 | | /* 22482 */ "FCFIDS_rec\0" |
9223 | | /* 22493 */ "FRES_rec\0" |
9224 | | /* 22502 */ "FRSQRTES_rec\0" |
9225 | | /* 22515 */ "MFFS_rec\0" |
9226 | | /* 22524 */ "FNEGS_rec\0" |
9227 | | /* 22534 */ "ANDIS_rec\0" |
9228 | | /* 22544 */ "FSELS_rec\0" |
9229 | | /* 22554 */ "FMULS_rec\0" |
9230 | | /* 22564 */ "FRIMS_rec\0" |
9231 | | /* 22574 */ "FCPSGNS_rec\0" |
9232 | | /* 22586 */ "FRINS_rec\0" |
9233 | | /* 22596 */ "FRIPS_rec\0" |
9234 | | /* 22606 */ "FABSS_rec\0" |
9235 | | /* 22616 */ "FNABSS_rec\0" |
9236 | | /* 22627 */ "FSQRTS_rec\0" |
9237 | | /* 22638 */ "BCDUS_rec\0" |
9238 | | /* 22648 */ "FCFIDUS_rec\0" |
9239 | | /* 22660 */ "SUBFUS_rec\0" |
9240 | | /* 22671 */ "FDIVS_rec\0" |
9241 | | /* 22681 */ "FRIZS_rec\0" |
9242 | | /* 22691 */ "FSQRT_rec\0" |
9243 | | /* 22701 */ "MULHDU_rec\0" |
9244 | | /* 22712 */ "FCFIDU_rec\0" |
9245 | | /* 22723 */ "FCTIDU_rec\0" |
9246 | | /* 22734 */ "DIVDU_rec\0" |
9247 | | /* 22744 */ "DIVDEU_rec\0" |
9248 | | /* 22755 */ "DIVWEU_rec\0" |
9249 | | /* 22766 */ "MULHWU_rec\0" |
9250 | | /* 22777 */ "FCTIWU_rec\0" |
9251 | | /* 22788 */ "DIVWU_rec\0" |
9252 | | /* 22798 */ "DDIV_rec\0" |
9253 | | /* 22807 */ "FDIV_rec\0" |
9254 | | /* 22816 */ "EQV_rec\0" |
9255 | | /* 22824 */ "SRAW_rec\0" |
9256 | | /* 22833 */ "VCMPNEW_rec\0" |
9257 | | /* 22845 */ "MULHW_rec\0" |
9258 | | /* 22855 */ "FCTIW_rec\0" |
9259 | | /* 22865 */ "MULLW_rec\0" |
9260 | | /* 22875 */ "SLW_rec\0" |
9261 | | /* 22883 */ "SRW_rec\0" |
9262 | | /* 22891 */ "VCMPGTSW_rec\0" |
9263 | | /* 22904 */ "EXTSW_rec\0" |
9264 | | /* 22914 */ "VCMPEQUW_rec\0" |
9265 | | /* 22927 */ "VCMPGTUW_rec\0" |
9266 | | /* 22940 */ "DIVW_rec\0" |
9267 | | /* 22949 */ "VCMPNEZW_rec\0" |
9268 | | /* 22962 */ "CNTLZW_rec\0" |
9269 | | /* 22973 */ "CNTTZW_rec\0" |
9270 | | /* 22984 */ "DIEX_rec\0" |
9271 | | /* 22993 */ "DXEX_rec\0" |
9272 | | /* 23002 */ "DCFFIX_rec\0" |
9273 | | /* 23013 */ "DCTFIX_rec\0" |
9274 | | /* 23024 */ "DRINTX_rec\0" |
9275 | | /* 23035 */ "FCTIDZ_rec\0" |
9276 | | /* 23046 */ "BCDCFZ_rec\0" |
9277 | | /* 23057 */ "BCDCTZ_rec\0" |
9278 | | /* 23068 */ "FCTIDUZ_rec\0" |
9279 | | /* 23080 */ "FCTIWUZ_rec\0" |
9280 | | /* 23092 */ "FCTIWZ_rec\0" |
9281 | | /* 23103 */ "RLWIMIbm_rec\0" |
9282 | | /* 23116 */ "RLWINMbm_rec\0" |
9283 | | /* 23129 */ "RLWNMbm_rec\0" |
9284 | | /* 23141 */ "LDtoc\0" |
9285 | | /* 23147 */ "ADDItoc\0" |
9286 | | /* 23155 */ "LWZtoc\0" |
9287 | | /* 23162 */ "BCTRL8_LDinto_toc\0" |
9288 | | /* 23180 */ "BCTRL_LWZinto_toc\0" |
9289 | | /* 23198 */ "PLHA8pc\0" |
9290 | | /* 23206 */ "PLA8pc\0" |
9291 | | /* 23213 */ "PLWA8pc\0" |
9292 | | /* 23221 */ "PSTB8pc\0" |
9293 | | /* 23229 */ "PSTH8pc\0" |
9294 | | /* 23237 */ "PADDI8pc\0" |
9295 | | /* 23246 */ "PSTW8pc\0" |
9296 | | /* 23254 */ "PLBZ8pc\0" |
9297 | | /* 23262 */ "PLHZ8pc\0" |
9298 | | /* 23270 */ "PLWZ8pc\0" |
9299 | | /* 23278 */ "PLHApc\0" |
9300 | | /* 23285 */ "PLApc\0" |
9301 | | /* 23291 */ "PLWApc\0" |
9302 | | /* 23298 */ "PSTBpc\0" |
9303 | | /* 23305 */ "PLFDpc\0" |
9304 | | /* 23312 */ "PSTFDpc\0" |
9305 | | /* 23320 */ "PLDpc\0" |
9306 | | /* 23326 */ "PLXSDpc\0" |
9307 | | /* 23334 */ "PSTXSDpc\0" |
9308 | | /* 23343 */ "PSTDpc\0" |
9309 | | /* 23350 */ "PSTHpc\0" |
9310 | | /* 23357 */ "PADDIpc\0" |
9311 | | /* 23365 */ "PLXSSPpc\0" |
9312 | | /* 23374 */ "PSTXSSPpc\0" |
9313 | | /* 23384 */ "PLXVPpc\0" |
9314 | | /* 23392 */ "PSTXVPpc\0" |
9315 | | /* 23401 */ "PLFSpc\0" |
9316 | | /* 23408 */ "PSTFSpc\0" |
9317 | | /* 23416 */ "PLXVpc\0" |
9318 | | /* 23423 */ "PSTXVpc\0" |
9319 | | /* 23431 */ "PSTWpc\0" |
9320 | | /* 23438 */ "PLBZpc\0" |
9321 | | /* 23445 */ "PLHZpc\0" |
9322 | | /* 23452 */ "PLWZpc\0" |
9323 | | /* 23459 */ "PLHA8nopc\0" |
9324 | | /* 23469 */ "PLWA8nopc\0" |
9325 | | /* 23479 */ "PSTB8nopc\0" |
9326 | | /* 23489 */ "PSTH8nopc\0" |
9327 | | /* 23499 */ "PSTW8nopc\0" |
9328 | | /* 23509 */ "PLBZ8nopc\0" |
9329 | | /* 23519 */ "PLHZ8nopc\0" |
9330 | | /* 23529 */ "PLWZ8nopc\0" |
9331 | | /* 23539 */ "PLHAnopc\0" |
9332 | | /* 23548 */ "PLWAnopc\0" |
9333 | | /* 23557 */ "PSTBnopc\0" |
9334 | | /* 23566 */ "PLFDnopc\0" |
9335 | | /* 23575 */ "PSTFDnopc\0" |
9336 | | /* 23585 */ "PLDnopc\0" |
9337 | | /* 23593 */ "PLXSDnopc\0" |
9338 | | /* 23603 */ "PSTXSDnopc\0" |
9339 | | /* 23614 */ "PSTDnopc\0" |
9340 | | /* 23623 */ "PSTHnopc\0" |
9341 | | /* 23632 */ "PLXSSPnopc\0" |
9342 | | /* 23643 */ "PSTXSSPnopc\0" |
9343 | | /* 23655 */ "PLXVPnopc\0" |
9344 | | /* 23665 */ "PSTXVPnopc\0" |
9345 | | /* 23676 */ "PLFSnopc\0" |
9346 | | /* 23685 */ "PSTFSnopc\0" |
9347 | | /* 23695 */ "PLXVnopc\0" |
9348 | | /* 23704 */ "PSTXVnopc\0" |
9349 | | /* 23714 */ "PSTWnopc\0" |
9350 | | /* 23723 */ "PLBZnopc\0" |
9351 | | /* 23732 */ "PLHZnopc\0" |
9352 | | /* 23741 */ "PLWZnopc\0" |
9353 | | /* 23750 */ "PLHA8onlypc\0" |
9354 | | /* 23762 */ "PLWA8onlypc\0" |
9355 | | /* 23774 */ "PSTB8onlypc\0" |
9356 | | /* 23786 */ "PSTH8onlypc\0" |
9357 | | /* 23798 */ "PSTW8onlypc\0" |
9358 | | /* 23810 */ "PLBZ8onlypc\0" |
9359 | | /* 23822 */ "PLHZ8onlypc\0" |
9360 | | /* 23834 */ "PLWZ8onlypc\0" |
9361 | | /* 23846 */ "PLHAonlypc\0" |
9362 | | /* 23857 */ "PLWAonlypc\0" |
9363 | | /* 23868 */ "PSTBonlypc\0" |
9364 | | /* 23879 */ "PLFDonlypc\0" |
9365 | | /* 23890 */ "PSTFDonlypc\0" |
9366 | | /* 23902 */ "PLDonlypc\0" |
9367 | | /* 23912 */ "PLXSDonlypc\0" |
9368 | | /* 23924 */ "PSTXSDonlypc\0" |
9369 | | /* 23937 */ "PSTDonlypc\0" |
9370 | | /* 23948 */ "PSTHonlypc\0" |
9371 | | /* 23959 */ "PLXSSPonlypc\0" |
9372 | | /* 23972 */ "PSTXSSPonlypc\0" |
9373 | | /* 23986 */ "PLXVPonlypc\0" |
9374 | | /* 23998 */ "PSTXVPonlypc\0" |
9375 | | /* 24011 */ "PLFSonlypc\0" |
9376 | | /* 24022 */ "PSTFSonlypc\0" |
9377 | | /* 24034 */ "PLXVonlypc\0" |
9378 | | /* 24045 */ "PSTXVonlypc\0" |
9379 | | /* 24057 */ "PSTWonlypc\0" |
9380 | | /* 24068 */ "PLBZonlypc\0" |
9381 | | /* 24079 */ "PLHZonlypc\0" |
9382 | | /* 24090 */ "PLWZonlypc\0" |
9383 | | /* 24101 */ "XXLORf\0" |
9384 | | /* 24108 */ "SETRNDi\0" |
9385 | | /* 24116 */ "TCRETURNai\0" |
9386 | | /* 24127 */ "TCRETURNdi\0" |
9387 | | /* 24138 */ "TCRETURNri\0" |
9388 | | /* 24149 */ "PADDIdtprel\0" |
9389 | | /* 24161 */ "BDZLAm\0" |
9390 | | /* 24168 */ "BDNZLAm\0" |
9391 | | /* 24176 */ "BDZAm\0" |
9392 | | /* 24182 */ "BDNZAm\0" |
9393 | | /* 24189 */ "BDZLRLm\0" |
9394 | | /* 24197 */ "BDNZLRLm\0" |
9395 | | /* 24206 */ "BDZLm\0" |
9396 | | /* 24212 */ "BDNZLm\0" |
9397 | | /* 24219 */ "BDZLRm\0" |
9398 | | /* 24226 */ "BDNZLRm\0" |
9399 | | /* 24234 */ "BDZm\0" |
9400 | | /* 24239 */ "BDNZm\0" |
9401 | | /* 24245 */ "RLWIMIbm\0" |
9402 | | /* 24254 */ "RLWINMbm\0" |
9403 | | /* 24263 */ "RLWNMbm\0" |
9404 | | /* 24271 */ "BCCTRL8n\0" |
9405 | | /* 24280 */ "BCCTR8n\0" |
9406 | | /* 24288 */ "BCn\0" |
9407 | | /* 24292 */ "BCLn\0" |
9408 | | /* 24297 */ "BCLRLn\0" |
9409 | | /* 24304 */ "BCCTRLn\0" |
9410 | | /* 24312 */ "BCLRn\0" |
9411 | | /* 24318 */ "BCCTRn\0" |
9412 | | /* 24325 */ "BDZLAp\0" |
9413 | | /* 24332 */ "BDNZLAp\0" |
9414 | | /* 24340 */ "BDZAp\0" |
9415 | | /* 24346 */ "BDNZAp\0" |
9416 | | /* 24353 */ "BDZLRLp\0" |
9417 | | /* 24361 */ "BDNZLRLp\0" |
9418 | | /* 24370 */ "BDZLp\0" |
9419 | | /* 24376 */ "BDNZLp\0" |
9420 | | /* 24383 */ "BDZLRp\0" |
9421 | | /* 24390 */ "BDNZLRp\0" |
9422 | | /* 24398 */ "BDZp\0" |
9423 | | /* 24403 */ "BDNZp\0" |
9424 | | /* 24409 */ "MTCTR8loop\0" |
9425 | | /* 24420 */ "DecreaseCTR8loop\0" |
9426 | | /* 24437 */ "MTCTRloop\0" |
9427 | | /* 24447 */ "DecreaseCTRloop\0" |
9428 | | /* 24463 */ "EH_SjLj_Setup\0" |
9429 | | /* 24477 */ "VSPLTBs\0" |
9430 | | /* 24485 */ "VEXTSB2Ds\0" |
9431 | | /* 24495 */ "VEXTSH2Ds\0" |
9432 | | /* 24505 */ "VEXTSW2Ds\0" |
9433 | | /* 24515 */ "VSPLTHs\0" |
9434 | | /* 24523 */ "XXPERMDIs\0" |
9435 | | /* 24533 */ "XXSLDWIs\0" |
9436 | | /* 24542 */ "XSNABSDPs\0" |
9437 | | /* 24552 */ "XSCVDPSXDSs\0" |
9438 | | /* 24564 */ "XSCVDPUXDSs\0" |
9439 | | /* 24576 */ "XSCVDPSXWSs\0" |
9440 | | /* 24588 */ "XSCVDPUXWSs\0" |
9441 | | /* 24600 */ "VEXTSB2Ws\0" |
9442 | | /* 24610 */ "VEXTSH2Ws\0" |
9443 | | /* 24620 */ "XXSPLTWs\0" |
9444 | | /* 24629 */ "XXLEQVOnes\0" |
9445 | | /* 24640 */ "BCLalways\0" |
9446 | | /* 24650 */ "gBCAat\0" |
9447 | | /* 24657 */ "gBCLAat\0" |
9448 | | /* 24665 */ "gBCat\0" |
9449 | | /* 24671 */ "gBCLat\0" |
9450 | | /* 24678 */ "MFVRSAVEv\0" |
9451 | | /* 24688 */ "MTVRSAVEv\0" |
9452 | | /* 24698 */ "STXSIBXv\0" |
9453 | | /* 24707 */ "STXSIHXv\0" |
9454 | | /* 24716 */ "LAx\0" |
9455 | | /* 24720 */ "DCBFx\0" |
9456 | | /* 24726 */ "DCBTx\0" |
9457 | | /* 24732 */ "DCBTSTx\0" |
9458 | | /* 24740 */ "XXLXORz\0" |
9459 | | /* 24748 */ "XXLXORdpz\0" |
9460 | | /* 24758 */ "XXLXORspz\0" |
9461 | | /* 24768 */ "FADDrtz\0" |
9462 | | }; |
9463 | | #ifdef __GNUC__ |
9464 | | #pragma GCC diagnostic pop |
9465 | | #endif |
9466 | | |
9467 | | extern const unsigned PPCInstrNameIndices[] = { |
9468 | | 7362U, 9189U, 13487U, 9795U, 7955U, 7936U, 7964U, 8181U, |
9469 | | 6671U, 6686U, 6387U, 6713U, 14981U, 6216U, 16328U, 6400U, |
9470 | | 7358U, 7945U, 5892U, 19567U, 6065U, 16167U, 5277U, 5828U, |
9471 | | 5880U, 10511U, 8162U, 16051U, 5421U, 12883U, 6776U, 16040U, |
9472 | | 6101U, 11767U, 11754U, 13736U, 15654U, 15866U, 8094U, 8141U, |
9473 | | 8114U, 7988U, 13701U, 10241U, 16411U, 16441U, 9505U, 4950U, |
9474 | | 4054U, 8446U, 16694U, 16707U, 8786U, 8793U, 8800U, 8810U, |
9475 | | 5250U, 14113U, 14076U, 6385U, 7360U, 18393U, 6226U, 8231U, |
9476 | | 15606U, 14519U, 16204U, 14536U, 13989U, 4410U, 14964U, 16062U, |
9477 | | 14214U, 16259U, 6307U, 13712U, 5363U, 4384U, 5345U, 16081U, |
9478 | | 9483U, 13761U, 4774U, 4718U, 4748U, 4759U, 4699U, 4729U, |
9479 | | 6180U, 6164U, 15032U, 6727U, 6744U, 4966U, 4060U, 5256U, |
9480 | | 5205U, 14118U, 14082U, 18180U, 9644U, 18163U, 9627U, 4889U, |
9481 | | 4009U, 18098U, 9562U, 10551U, 10529U, 5872U, 6815U, 5304U, |
9482 | | 15625U, 16182U, 4350U, 15078U, 16017U, 15105U, 16425U, 4402U, |
9483 | | 16006U, 15994U, 16157U, 6768U, 16404U, 6700U, 16434U, 8080U, |
9484 | | 13835U, 13821U, 8073U, 13828U, 14207U, 8342U, 11582U, 11575U, |
9485 | | 15616U, 10134U, 5920U, 10105U, 5857U, 10126U, 5912U, 10097U, |
9486 | | 5849U, 10335U, 10327U, 6879U, 6871U, 15503U, 15493U, 15483U, |
9487 | | 15473U, 15523U, 15513U, 18643U, 18653U, 15533U, 15546U, 18670U, |
9488 | | 18680U, 15559U, 15572U, 4847U, 3988U, 8373U, 3574U, 4681U, |
9489 | | 16658U, 8765U, 17581U, 7816U, 12940U, 818U, 25U, 6761U, |
9490 | | 810U, 0U, 12915U, 12947U, 6643U, 16396U, 4374U, 7647U, |
9491 | | 7724U, 11468U, 11477U, 14252U, 9520U, 14998U, 6323U, 9279U, |
9492 | | 9289U, 5975U, 5990U, 9236U, 9268U, 16719U, 16745U, 16731U, |
9493 | | 5928U, 5956U, 5941U, 4956U, 7888U, 9596U, 18132U, 9620U, |
9494 | | 18156U, 14305U, 5336U, 5326U, 13482U, 15890U, 15918U, 15897U, |
9495 | | 14004U, 19776U, 6367U, 19734U, 6349U, 11741U, 10573U, 6188U, |
9496 | | 8086U, 14921U, 9674U, 16229U, 13975U, 16073U, 16099U, 16269U, |
9497 | | 13625U, 6052U, 4467U, 6241U, 6149U, 4875U, 3995U, 8401U, |
9498 | | 16665U, 8772U, 3580U, 16237U, 12924U, 13780U, 13796U, 19555U, |
9499 | | 6085U, 6271U, 15711U, 10447U, 4854U, 8380U, 4830U, 8356U, |
9500 | | 18081U, 9545U, 9247U, 9215U, 4934U, 8430U, 5234U, 14098U, |
9501 | | 14060U, 18115U, 9579U, 18139U, 9603U, 18450U, 18457U, 1889U, |
9502 | | 1808U, 1851U, 1829U, 1931U, 1787U, 1910U, 1872U, 5444U, |
9503 | | 4167U, 5865U, 2146U, 7237U, 21165U, 7786U, 21318U, 7268U, |
9504 | | 21198U, 7830U, 21353U, 8059U, 11568U, 14943U, 24720U, 14956U, |
9505 | | 15638U, 14410U, 15645U, 14417U, 16381U, 24732U, 16370U, 24726U, |
9506 | | 719U, 1292U, 739U, 1312U, 7246U, 21178U, 7809U, 21342U, |
9507 | | 7289U, 21231U, 7851U, 21386U, 7795U, 21331U, 7275U, 21209U, |
9508 | | 7837U, 21364U, 13842U, 24716U, 18211U, 19533U, 7164U, 24245U, |
9509 | | 23103U, 24254U, 23116U, 24263U, 23129U, 7282U, 21220U, 7844U, |
9510 | | 21375U, 7241U, 21169U, 7790U, 21322U, 5140U, 18339U, 16356U, |
9511 | | 19293U, 7277U, 21211U, 7839U, 21366U, 19471U, 7165U, 4301U, |
9512 | | 20544U, 14666U, 14672U, 729U, 1302U, 750U, 1323U, 1369U, |
9513 | | 10008U, 21541U, 14718U, 20077U, 2119U, 10029U, 21574U, 14726U, |
9514 | | 19868U, 20137U, 4252U, 2062U, 10014U, 21551U, 20097U, 10113U, |
9515 | | 21678U, 20516U, 5915U, 2154U, 10035U, 21584U, 20156U, 10178U, |
9516 | | 21720U, 18387U, 2956U, 20919U, 14238U, 2772U, 7220U, 2273U, |
9517 | | 4307U, 2081U, 20554U, 14688U, 2780U, 3427U, 120U, 3411U, |
9518 | | 3385U, 3398U, 3374U, 1965U, 8584U, 414U, 8550U, 374U, |
9519 | | 13595U, 428U, 8561U, 387U, 13610U, 445U, 23147U, 3104U, |
9520 | | 8533U, 6072U, 2167U, 10050U, 21607U, 20177U, 10198U, 21752U, |
9521 | | 20959U, 14680U, 6301U, 2182U, 10067U, 21632U, 20214U, 10220U, |
9522 | | 21786U, 21023U, 9991U, 12868U, 5179U, 2133U, 20147U, 4260U, |
9523 | | 2068U, 20107U, 20525U, 20267U, 20330U, 22534U, 21189U, 15830U, |
9524 | | 2814U, 15848U, 2833U, 20749U, 1632U, 274U, 1008U, 2449U, |
9525 | | 1514U, 156U, 890U, 2337U, 1555U, 197U, 931U, 2376U, |
9526 | | 1712U, 354U, 1088U, 2535U, 1596U, 238U, 972U, 2415U, |
9527 | | 1534U, 176U, 910U, 2356U, 1672U, 314U, 1048U, 2487U, |
9528 | | 1494U, 136U, 870U, 2305U, 1691U, 333U, 1067U, 2515U, |
9529 | | 1575U, 217U, 951U, 2395U, 1652U, 294U, 1028U, 2468U, |
9530 | | 1616U, 258U, 992U, 2434U, 9986U, 3641U, 3263U, 4138U, |
9531 | | 4248U, 3286U, 14188U, 2750U, 8310U, 2588U, 7918U, 3551U, |
9532 | | 13862U, 8259U, 14182U, 2743U, 24280U, 8303U, 2580U, 24271U, |
9533 | | 24304U, 24318U, 20629U, 21481U, 22199U, 23046U, 21492U, 21519U, |
9534 | | 22211U, 23057U, 21505U, 22397U, 20449U, 22440U, 20574U, 22638U, |
9535 | | 20587U, 7914U, 13857U, 8253U, 24297U, 24312U, 24640U, 24292U, |
9536 | | 14176U, 2737U, 8296U, 2573U, 23162U, 9147U, 9069U, 23180U, |
9537 | | 9168U, 9105U, 24288U, 19741U, 3092U, 3629U, 24182U, 24346U, |
9538 | | 8520U, 3567U, 24168U, 24332U, 13884U, 2689U, 8273U, 24197U, |
9539 | | 24361U, 24226U, 24390U, 24212U, 24376U, 24239U, 24403U, 19592U, |
9540 | | 3081U, 3624U, 24176U, 24340U, 8515U, 3561U, 24161U, 24325U, |
9541 | | 13878U, 2682U, 8266U, 24189U, 24353U, 24219U, 24383U, 24206U, |
9542 | | 24370U, 24234U, 24398U, 7910U, 2563U, 11712U, 9126U, 14883U, |
9543 | | 4493U, 9086U, 14862U, 9062U, 14854U, 20004U, 3541U, 1977U, |
9544 | | 11703U, 9114U, 9054U, 9079U, 13852U, 2665U, 8247U, 11734U, |
9545 | | 9137U, 9099U, 14876U, 5161U, 5440U, 6897U, 2254U, 4368U, |
9546 | | 17595U, 2912U, 5650U, 2138U, 4816U, 2111U, 5004U, 3768U, |
9547 | | 3756U, 2000U, 5416U, 7262U, 3761U, 5116U, 7230U, 17347U, |
9548 | | 7772U, 3776U, 2006U, 17588U, 7824U, 5808U, 8742U, 20897U, |
9549 | | 17994U, 2928U, 20368U, 22962U, 5821U, 8757U, 20908U, 18007U, |
9550 | | 2936U, 20380U, 22973U, 16220U, 19564U, 3066U, 20200U, 21000U, |
9551 | | 15690U, 15720U, 5222U, 4265U, 16764U, 5191U, 13963U, 16133U, |
9552 | | 13984U, 4539U, 15737U, 15729U, 14048U, 11318U, 4825U, 13015U, |
9553 | | 22090U, 20631U, 9957U, 3261U, 6339U, 11327U, 7140U, 16311U, |
9554 | | 11356U, 15596U, 11349U, 16343U, 11364U, 19572U, 11373U, 8509U, |
9555 | | 11341U, 7170U, 18636U, 13435U, 13210U, 22292U, 23002U, 10353U, |
9556 | | 13190U, 16555U, 13370U, 11175U, 21923U, 18663U, 13443U, 13219U, |
9557 | | 22304U, 23013U, 13203U, 22188U, 5396U, 13028U, 22111U, 20789U, |
9558 | | 16653U, 13409U, 22262U, 22798U, 4809U, 13007U, 22078U, 20618U, |
9559 | | 18424U, 13415U, 22272U, 22984U, 5791U, 5969U, 10184U, 21730U, |
9560 | | 16520U, 10467U, 21839U, 22744U, 20928U, 10172U, 21710U, 16514U, |
9561 | | 10460U, 21828U, 22734U, 20878U, 17961U, 6287U, 10213U, 21775U, |
9562 | | 16527U, 10475U, 21851U, 22755U, 21013U, 10497U, 21885U, 16618U, |
9563 | | 10483U, 21863U, 22788U, 22940U, 13918U, 19766U, 8351U, 13168U, |
9564 | | 22156U, 21442U, 14033U, 1748U, 105U, 7385U, 1732U, 89U, |
9565 | | 7366U, 3599U, 7134U, 13116U, 22123U, 21145U, 12979U, 22058U, |
9566 | | 20392U, 13197U, 22178U, 9979U, 13182U, 22166U, 21530U, 19286U, |
9567 | | 13451U, 22316U, 23024U, 5313U, 13021U, 22100U, 20779U, 12721U, |
9568 | | 22026U, 7409U, 13132U, 22134U, 21253U, 7611U, 13139U, 22145U, |
9569 | | 21298U, 15028U, 8174U, 16317U, 1108U, 16350U, 1114U, 16389U, |
9570 | | 1129U, 16376U, 1122U, 3983U, 12985U, 22068U, 20451U, 4288U, |
9571 | | 12999U, 6622U, 13108U, 18429U, 13421U, 6565U, 7318U, 13123U, |
9572 | | 13100U, 18445U, 13429U, 22282U, 22993U, 4484U, 2096U, 15697U, |
9573 | | 2799U, 24420U, 24447U, 14245U, 4823U, 14551U, 6474U, 7622U, |
9574 | | 5066U, 6572U, 7699U, 5081U, 13036U, 15743U, 15938U, 6540U, |
9575 | | 7656U, 19596U, 19678U, 6597U, 7733U, 19613U, 19706U, 16651U, |
9576 | | 8349U, 14259U, 6636U, 3981U, 13072U, 15771U, 15966U, 14284U, |
9577 | | 4919U, 5011U, 6482U, 7630U, 6580U, 7707U, 13045U, 15752U, |
9578 | | 15947U, 6548U, 7664U, 19687U, 6605U, 7741U, 19715U, 16679U, |
9579 | | 8415U, 14267U, 6650U, 4039U, 13081U, 15780U, 15975U, 761U, |
9580 | | 1334U, 779U, 1352U, 24463U, 16760U, 2902U, 20341U, 22816U, |
9581 | | 14299U, 17303U, 16922U, 17044U, 16983U, 17105U, 17217U, 5228U, |
9582 | | 4272U, 13064U, 15143U, 16572U, 15152U, 16581U, 17705U, 17992U, |
9583 | | 15308U, 16616U, 16770U, 3872U, 6984U, 14291U, 4926U, 6490U, |
9584 | | 7638U, 6588U, 7715U, 13054U, 15761U, 15956U, 6556U, 7672U, |
9585 | | 19696U, 6613U, 7749U, 19724U, 16686U, 8422U, 14275U, 6657U, |
9586 | | 4046U, 13090U, 15789U, 15984U, 4982U, 18313U, 6826U, 18464U, |
9587 | | 17224U, 19428U, 15413U, 19221U, 15436U, 19246U, 15449U, 19260U, |
9588 | | 6025U, 18407U, 14928U, 19205U, 16547U, 19362U, 15425U, 19234U, |
9589 | | 15462U, 19274U, 7336U, 10310U, 10300U, 7346U, 3149U, 9371U, |
9590 | | 3193U, 9415U, 3227U, 9449U, 6414U, 3291U, 16874U, 17382U, |
9591 | | 7471U, 3453U, 16934U, 17430U, 6505U, 3330U, 16898U, 17406U, |
9592 | | 17056U, 17502U, 7506U, 3492U, 16995U, 17466U, 17117U, 17538U, |
9593 | | 3161U, 9383U, 3205U, 9427U, 3239U, 9461U, 6432U, 3311U, |
9594 | | 16886U, 17394U, 7489U, 3473U, 16971U, 17454U, 6523U, 3350U, |
9595 | | 16910U, 17418U, 17093U, 17526U, 7533U, 3522U, 17032U, 17490U, |
9596 | | 17154U, 17562U, 3593U, 6423U, 3301U, 7480U, 3463U, 6514U, |
9597 | | 3340U, 7515U, 3502U, 16959U, 17442U, 17081U, 17514U, 7524U, |
9598 | | 3512U, 17020U, 17478U, 17142U, 17550U, 6441U, 3321U, 3173U, |
9599 | | 9395U, 7498U, 3483U, 3217U, 9439U, 6532U, 3360U, 3183U, |
9600 | | 9405U, 7542U, 3532U, 3251U, 9473U, 5198U, 6665U, 13969U, |
9601 | | 14021U, 4545U, 17353U, 7779U, 17230U, 8047U, 17359U, 7802U, |
9602 | | 7326U, 7681U, 14704U, 16539U, 15244U, 16604U, 4996U, 18320U, |
9603 | | 6832U, 18471U, 17237U, 19435U, 6032U, 18415U, 10268U, 18848U, |
9604 | | 6293U, 18436U, 10503U, 18857U, 16946U, 17068U, 17007U, 17129U, |
9605 | | 17259U, 17267U, 14054U, 3874U, 2013U, 1138U, 20086U, 20426U, |
9606 | | 6986U, 2259U, 1151U, 20256U, 21096U, 17744U, 7425U, 1164U, |
9607 | | 20042U, 21263U, 702U, 1192U, 20061U, 22904U, 10288U, 5539U, |
9608 | | 20818U, 15011U, 22606U, 4842U, 14382U, 22449U, 20640U, 24768U, |
9609 | | 5054U, 14403U, 22482U, 16491U, 15168U, 22648U, 22712U, 20690U, |
9610 | | 5389U, 14936U, 5742U, 15215U, 5290U, 20757U, 14907U, 22574U, |
9611 | | 5075U, 16498U, 19783U, 23068U, 22723U, 19606U, 23035U, 20700U, |
9612 | | 17311U, 16597U, 19791U, 23080U, 22777U, 19799U, 23092U, 22855U, |
9613 | | 16660U, 15238U, 22671U, 22807U, 5866U, 4906U, 14388U, 22459U, |
9614 | | 20649U, 13914U, 22373U, 4026U, 14367U, 22417U, 20469U, 8368U, |
9615 | | 14895U, 22554U, 21451U, 5545U, 20828U, 15017U, 22616U, 5029U, |
9616 | | 20670U, 14580U, 22524U, 4912U, 14395U, 22470U, 20659U, 4032U, |
9617 | | 14374U, 22428U, 20479U, 6145U, 14505U, 22493U, 20980U, 5154U, |
9618 | | 20738U, 14901U, 22564U, 5298U, 20769U, 14915U, 22586U, 5410U, |
9619 | | 20800U, 14950U, 22596U, 5796U, 20887U, 15396U, 22681U, 12726U, |
9620 | | 22035U, 6208U, 14510U, 22502U, 20988U, 5103U, 20710U, 14712U, |
9621 | | 22544U, 16231U, 15161U, 22627U, 22691U, 3990U, 14361U, 22407U, |
9622 | | 20460U, 16701U, 16252U, 13651U, 477U, 18520U, 18556U, 8026U, |
9623 | | 18536U, 13638U, 462U, 8008U, 7880U, 2554U, 11559U, 2612U, |
9624 | | 16321U, 2852U, 12860U, 2622U, 5060U, 7145U, 11334U, 4362U, |
9625 | | 13152U, 15601U, 14734U, 7176U, 8042U, 2567U, 4455U, 3542U, |
9626 | | 1978U, 18970U, 8463U, 18866U, 19578U, 3076U, 18615U, 16624U, |
9627 | | 2884U, 19390U, 3021U, 19508U, 3048U, 14830U, 19977U, 669U, |
9628 | | 5093U, 18976U, 8470U, 15402U, 19000U, 18588U, 16505U, 19339U, |
9629 | | 18350U, 14782U, 19923U, 8572U, 400U, 23141U, 3273U, 16139U, |
9630 | | 7690U, 8526U, 5019U, 18879U, 16465U, 19326U, 18328U, 14765U, |
9631 | | 19904U, 18204U, 19526U, 14564U, 16561U, 19371U, 19194U, 14805U, |
9632 | | 19949U, 3370U, 1960U, 18982U, 8477U, 16455U, 2860U, 19308U, |
9633 | | 2993U, 18076U, 2944U, 14741U, 19877U, 614U, 19013U, 2979U, |
9634 | | 18894U, 19644U, 3087U, 18622U, 16629U, 2890U, 19396U, 3028U, |
9635 | | 19521U, 3054U, 14838U, 19986U, 680U, 7406U, 2282U, 14694U, |
9636 | | 2787U, 17365U, 13155U, 18988U, 8484U, 10149U, 7858U, 18230U, |
9637 | | 18479U, 19443U, 8337U, 14167U, 19408U, 8498U, 3605U, 18994U, |
9638 | | 8491U, 15585U, 19314U, 18225U, 14749U, 19886U, 625U, 711U, |
9639 | | 515U, 19043U, 2986U, 18907U, 19809U, 3099U, 18629U, 16634U, |
9640 | | 2896U, 19402U, 3035U, 19550U, 3060U, 14846U, 19995U, 691U, |
9641 | | 23155U, 8542U, 5628U, 18369U, 19500U, 19513U, 18217U, 19539U, |
9642 | | 12755U, 18942U, 16782U, 18044U, 18014U, 19181U, 18061U, 13146U, |
9643 | | 8452U, 8218U, 12903U, 8281U, 8186U, 18957U, 18251U, 18354U, |
9644 | | 18500U, 8318U, 8203U, 19477U, 18029U, 19214U, 19417U, 5041U, |
9645 | | 16476U, 5096U, 2124U, 13459U, 6449U, 14568U, 19168U, 5841U, |
9646 | | 13533U, 2648U, 14195U, 2758U, 13515U, 14558U, 9970U, 7566U, |
9647 | | 5905U, 9962U, 7557U, 8331U, 22515U, 13868U, 2670U, 14150U, |
9648 | | 6454U, 2203U, 13923U, 14133U, 2719U, 14145U, 9660U, 3892U, |
9649 | | 2026U, 13545U, 5527U, 6253U, 24678U, 19834U, 13561U, 5513U, |
9650 | | 5122U, 19818U, 5553U, 17643U, 5697U, 17836U, 4447U, 4461U, |
9651 | | 6468U, 2219U, 14201U, 2765U, 24409U, 24437U, 13527U, 34U, |
9652 | | 82U, 6499U, 7311U, 21242U, 20020U, 21053U, 20013U, 13873U, |
9653 | | 2676U, 14156U, 5506U, 6461U, 2211U, 13929U, 14139U, 2726U, |
9654 | | 14162U, 9667U, 13553U, 5533U, 6262U, 24688U, 3617U, 19841U, |
9655 | | 13568U, 8615U, 7434U, 5520U, 4988U, 8680U, 8830U, 8988U, |
9656 | | 3609U, 9317U, 15251U, 19826U, 5048U, 16484U, 22701U, 20680U, |
9657 | | 17297U, 16590U, 22766U, 22845U, 5110U, 10142U, 21699U, 20720U, |
9658 | | 7415U, 2279U, 17341U, 10490U, 21874U, 22865U, 13902U, 13891U, |
9659 | | 2697U, 5186U, 2132U, 20146U, 20748U, 10520U, 6639U, 2249U, |
9660 | | 10091U, 21668U, 20247U, 10263U, 21819U, 21063U, 11708U, 1763U, |
9661 | | 1775U, 13959U, 2709U, 20312U, 22381U, 13953U, 2710U, 20313U, |
9662 | | 4535U, 2106U, 20128U, 20601U, 7618U, 2300U, 14699U, 2793U, |
9663 | | 22382U, 7219U, 2272U, 23237U, 24149U, 23357U, 5404U, 5681U, |
9664 | | 3557U, 1982U, 23206U, 23285U, 19577U, 3075U, 23509U, 23810U, |
9665 | | 23254U, 23723U, 24068U, 23438U, 5118U, 23585U, 23902U, 23320U, |
9666 | | 5018U, 23566U, 23879U, 23305U, 14563U, 23676U, 24011U, 23401U, |
9667 | | 3369U, 1959U, 23459U, 23750U, 23198U, 23539U, 23846U, 23278U, |
9668 | | 19643U, 3086U, 23519U, 23822U, 23262U, 23732U, 24079U, 23445U, |
9669 | | 7421U, 2286U, 3604U, 1987U, 23469U, 23762U, 23213U, 23548U, |
9670 | | 23857U, 23291U, 19813U, 3098U, 23529U, 23834U, 23270U, 23741U, |
9671 | | 24090U, 23452U, 5627U, 23593U, 23912U, 23326U, 12754U, 23632U, |
9672 | | 23959U, 23365U, 16781U, 12902U, 23655U, 23986U, 23384U, 23695U, |
9673 | | 24034U, 23416U, 826U, 9681U, 11589U, 9811U, 11779U, 16810U, |
9674 | | 9736U, 11644U, 9898U, 11918U, 839U, 9696U, 11604U, 9826U, |
9675 | | 11794U, 16824U, 9752U, 11660U, 9914U, 11934U, 13662U, 9710U, |
9676 | | 11618U, 9850U, 11848U, 17599U, 9767U, 11675U, 9929U, 11992U, |
9677 | | 13673U, 9723U, 11631U, 9863U, 11861U, 17611U, 9781U, 11689U, |
9678 | | 9943U, 12006U, 851U, 11808U, 14225U, 11874U, 17628U, 12020U, |
9679 | | 16837U, 11949U, 2654U, 11835U, 16862U, 11978U, 1447U, 11822U, |
9680 | | 11889U, 16850U, 11964U, 11903U, 3905U, 2032U, 5658U, 17780U, |
9681 | | 16112U, 16121U, 490U, 1204U, 543U, 1250U, 498U, 1212U, |
9682 | | 522U, 1229U, 3922U, 2041U, 23479U, 23774U, 23221U, 23557U, |
9683 | | 23868U, 23298U, 5675U, 23614U, 23937U, 23343U, 5023U, 23575U, |
9684 | | 23890U, 23312U, 14574U, 23685U, 24022U, 23408U, 7024U, 2266U, |
9685 | | 23489U, 23786U, 23229U, 23623U, 23948U, 23350U, 17814U, 2922U, |
9686 | | 23499U, 23798U, 23246U, 23714U, 24057U, 23431U, 5633U, 23603U, |
9687 | | 23924U, 23334U, 12761U, 23643U, 23972U, 23374U, 16786U, 12908U, |
9688 | | 23665U, 23998U, 23392U, 23704U, 24045U, 23423U, 10276U, 4226U, |
9689 | | 13575U, 15804U, 5459U, 4178U, 4202U, 7192U, 7225U, 3649U, |
9690 | | 7307U, 5061U, 7197U, 7923U, 21409U, 13521U, 22340U, 4313U, |
9691 | | 7929U, 594U, 1179U, 20028U, 21419U, 13538U, 604U, 22350U, |
9692 | | 20564U, 7450U, 21276U, 7457U, 2291U, 20277U, 21287U, 8957U, |
9693 | | 2597U, 20289U, 21460U, 8972U, 2605U, 20301U, 21471U, 3927U, |
9694 | | 4634U, 16639U, 1469U, 1401U, 2226U, 1424U, 2324U, 6114U, |
9695 | | 1374U, 4551U, 4503U, 4607U, 4578U, 1483U, 1414U, 2239U, |
9696 | | 1437U, 2505U, 6128U, 1389U, 4566U, 4519U, 4622U, 4594U, |
9697 | | 3887U, 2020U, 4141U, 2055U, 13508U, 2640U, 8943U, 4134U, |
9698 | | 2047U, 13500U, 2631U, 5319U, 24108U, 20938U, 3441U, 6040U, |
9699 | | 6629U, 6005U, 16643U, 6201U, 4431U, 5136U, 20730U, 17361U, |
9700 | | 2907U, 20350U, 22875U, 19806U, 19547U, 17807U, 19492U, 4238U, |
9701 | | 13586U, 15818U, 5476U, 4191U, 4215U, 5491U, 4782U, 7213U, |
9702 | | 585U, 21155U, 20609U, 17178U, 7758U, 21308U, 22824U, 5509U, |
9703 | | 20810U, 17624U, 2917U, 20359U, 22883U, 3923U, 2042U, 18581U, |
9704 | | 18271U, 18872U, 16460U, 2866U, 19320U, 3000U, 18266U, 2950U, |
9705 | | 14757U, 19895U, 636U, 5676U, 15407U, 19006U, 18594U, 18277U, |
9706 | | 16509U, 19344U, 18382U, 14789U, 19931U, 5024U, 18886U, 16470U, |
9707 | | 19332U, 18333U, 14773U, 19913U, 19456U, 14575U, 16566U, 19377U, |
9708 | | 19199U, 14813U, 19958U, 7025U, 2267U, 19019U, 18601U, 18283U, |
9709 | | 18900U, 16534U, 2872U, 19356U, 3007U, 18515U, 2963U, 14797U, |
9710 | | 19940U, 647U, 17369U, 11749U, 13277U, 18289U, 10160U, 7863U, |
9711 | | 18236U, 18485U, 19449U, 19412U, 8503U, 17810U, 2923U, 15590U, |
9712 | | 19049U, 18608U, 18295U, 18913U, 16611U, 2878U, 19384U, 3014U, |
9713 | | 19495U, 3042U, 14822U, 19968U, 658U, 5634U, 18375U, 18243U, |
9714 | | 24698U, 18492U, 24707U, 19463U, 12762U, 18949U, 16787U, 18052U, |
9715 | | 18021U, 18068U, 8457U, 8224U, 12909U, 8288U, 8194U, 18963U, |
9716 | | 18258U, 18361U, 18507U, 8324U, 8210U, 19484U, 18036U, 19422U, |
9717 | | 6344U, 2197U, 10084U, 21657U, 20237U, 4295U, 2074U, 10021U, |
9718 | | 21562U, 20117U, 10119U, 21688U, 20534U, 6019U, 2160U, 10042U, |
9719 | | 21595U, 20166U, 10191U, 21741U, 20949U, 4319U, 2088U, 6078U, |
9720 | | 2174U, 10058U, 21619U, 20188U, 10205U, 21763U, 20969U, 10235U, |
9721 | | 21809U, 15192U, 22660U, 6316U, 2189U, 10075U, 21644U, 20225U, |
9722 | | 10227U, 21797U, 21033U, 21044U, 4434U, 9U, 16213U, 4279U, |
9723 | | 7182U, 4637U, 7203U, 3720U, 1993U, 3266U, 1951U, 14172U, |
9724 | | 2733U, 9538U, 15679U, 7873U, 15668U, 24116U, 3113U, 24127U, |
9725 | | 3125U, 24138U, 3137U, 5647U, 7296U, 5272U, 3447U, 6046U, |
9726 | | 7981U, 18740U, 18196U, 5090U, 7403U, 6139U, 796U, 19175U, |
9727 | | 863U, 4673U, 4439U, 6281U, 803U, 18572U, 2969U, 10524U, |
9728 | | 16148U, 8904U, 14163U, 17768U, 7869U, 11720U, 13464U, 3934U, |
9729 | | 7029U, 17842U, 13308U, 17827U, 13336U, 9032U, 11412U, 14328U, |
9730 | | 14624U, 15276U, 8642U, 14353U, 8707U, 8876U, 14649U, 9015U, |
9731 | | 9344U, 15300U, 5229U, 4273U, 3816U, 6928U, 17665U, 3950U, |
9732 | | 7045U, 17866U, 5160U, 13174U, 19188U, 66U, 5003U, 19350U, |
9733 | | 74U, 13693U, 16299U, 3726U, 3782U, 4122U, 5802U, 8735U, |
9734 | | 7122U, 3671U, 17986U, 11380U, 21947U, 11486U, 21972U, 3972U, |
9735 | | 20436U, 5749U, 20852U, 7067U, 21106U, 13384U, 22236U, 17896U, |
9736 | | 22914U, 11427U, 21959U, 11495U, 21985U, 3863U, 20413U, 5604U, |
9737 | | 20839U, 6975U, 21083U, 13261U, 22223U, 17735U, 22891U, 4087U, |
9738 | | 20490U, 5758U, 20865U, 7087U, 21119U, 13393U, 22249U, 17928U, |
9739 | | 22927U, 3689U, 20401U, 6839U, 21071U, 17251U, 22833U, 4113U, |
9740 | | 20503U, 7113U, 21132U, 17977U, 22949U, 13254U, 13377U, 3655U, |
9741 | | 4793U, 6807U, 17183U, 15382U, 48U, 15389U, 57U, 4128U, |
9742 | | 5815U, 8750U, 7128U, 3680U, 18001U, 5567U, 13246U, 17657U, |
9743 | | 5711U, 13362U, 17858U, 5613U, 13270U, 17750U, 5767U, 13402U, |
9744 | | 17937U, 16771U, 8596U, 8670U, 8820U, 8978U, 9307U, 11442U, |
9745 | | 18767U, 19101U, 18756U, 19090U, 18786U, 19120U, 18806U, 19140U, |
9746 | | 8623U, 5640U, 8688U, 8847U, 8996U, 4076U, 7076U, 17905U, |
9747 | | 9325U, 4646U, 24485U, 16792U, 24600U, 12964U, 4655U, 24495U, |
9748 | | 16801U, 24610U, 4664U, 24505U, 18706U, 19034U, 18731U, 19072U, |
9749 | | 18825U, 19159U, 4787U, 3751U, 18698U, 19026U, 18747U, 19081U, |
9750 | | 5590U, 18715U, 19056U, 3913U, 5666U, 7015U, 17788U, 18723U, |
9751 | | 19064U, 18777U, 19111U, 17721U, 18817U, 19151U, 18797U, 19131U, |
9752 | | 11419U, 11404U, 11504U, 3880U, 5620U, 6992U, 17757U, 4096U, |
9753 | | 5774U, 7096U, 17944U, 14603U, 14613U, 11461U, 3848U, 5583U, |
9754 | | 6960U, 17714U, 3957U, 5727U, 7052U, 17881U, 8866U, 5552U, |
9755 | | 13239U, 17642U, 5696U, 13345U, 17835U, 17244U, 3697U, 6847U, |
9756 | | 17282U, 3713U, 6854U, 17326U, 17574U, 5687U, 8606U, 8838U, |
9757 | | 14632U, 8650U, 8715U, 8884U, 14657U, 13290U, 13316U, 13352U, |
9758 | | 13281U, 3794U, 5559U, 6906U, 17649U, 3942U, 5703U, 7037U, |
9759 | | 17850U, 5575U, 17680U, 5719U, 17873U, 5109U, 3855U, 5596U, |
9760 | | 6967U, 17727U, 3964U, 5734U, 7059U, 17888U, 9352U, 5199U, |
9761 | | 13684U, 16286U, 5035U, 17276U, 11388U, 13970U, 14022U, 4546U, |
9762 | | 5403U, 9041U, 13935U, 14039U, 5680U, 18928U, 15024U, 15176U, |
9763 | | 15062U, 15199U, 15070U, 15222U, 9199U, 15184U, 9207U, 15207U, |
9764 | | 9299U, 15230U, 3743U, 5168U, 6887U, 17374U, 3904U, 5657U, |
9765 | | 7006U, 17779U, 4801U, 12991U, 17191U, 11436U, 8913U, 9532U, |
9766 | | 11529U, 19648U, 3733U, 5130U, 7443U, 8950U, 6861U, 13158U, |
9767 | | 7464U, 8964U, 17354U, 7550U, 8971U, 11451U, 18842U, 8048U, |
9768 | | 4688U, 17166U, 8338U, 3738U, 5135U, 7150U, 7576U, 6866U, |
9769 | | 10322U, 13163U, 16714U, 17360U, 3897U, 24477U, 6999U, 24515U, |
9770 | | 3831U, 6943U, 17688U, 17764U, 14168U, 3643U, 4781U, 6801U, |
9771 | | 12973U, 17177U, 3789U, 5515U, 7157U, 6901U, 10455U, 13234U, |
9772 | | 16776U, 17623U, 7905U, 21397U, 13474U, 22328U, 8065U, 21430U, |
9773 | | 13813U, 22361U, 13300U, 17819U, 13327U, 9023U, 11397U, 14320U, |
9774 | | 14595U, 15268U, 8634U, 14345U, 8699U, 8858U, 14641U, 9007U, |
9775 | | 9336U, 15292U, 15259U, 14311U, 14586U, 14336U, 15284U, 18920U, |
9776 | | 3823U, 6935U, 17672U, 18934U, 3840U, 6952U, 17697U, 14055U, |
9777 | | 41U, 3635U, 6793U, 14492U, 3802U, 6914U, 15799U, 17U, |
9778 | | 6013U, 7300U, 14029U, 2714U, 20321U, 7617U, 2299U, 14698U, |
9779 | | 2792U, 22389U, 11159U, 12265U, 10719U, 12110U, 10410U, 12429U, |
9780 | | 11121U, 12228U, 11092U, 12208U, 10775U, 12136U, 11181U, 12273U, |
9781 | | 11029U, 12181U, 11239U, 12292U, 10993U, 12171U, 11511U, 12190U, |
9782 | | 12666U, 9888U, 14426U, 24552U, 15316U, 24576U, 14459U, 24564U, |
9783 | | 15349U, 24588U, 11038U, 11047U, 10343U, 19623U, 19746U, 19848U, |
9784 | | 19633U, 19756U, 19858U, 12118U, 11056U, 9840U, 12238U, 10735U, |
9785 | | 12445U, 12127U, 12247U, 10755U, 12465U, 11248U, 12301U, 10438U, |
9786 | | 12807U, 11074U, 12199U, 10645U, 12373U, 10973U, 12628U, 12101U, |
9787 | | 10400U, 10710U, 12082U, 11302U, 10884U, 10701U, 12073U, 11013U, |
9788 | | 10875U, 10603U, 12331U, 10931U, 12586U, 12046U, 10370U, 10893U, |
9789 | | 12163U, 10419U, 12548U, 11141U, 24542U, 12256U, 10831U, 12146U, |
9790 | | 10623U, 12351U, 10951U, 12606U, 12091U, 10389U, 10581U, 12309U, |
9791 | | 10909U, 12564U, 12036U, 10359U, 7583U, 4326U, 8919U, 11535U, |
9792 | | 19654U, 10795U, 12495U, 7597U, 18690U, 12956U, 12731U, 10809U, |
9793 | | 12509U, 11201U, 12283U, 10428U, 12779U, 10665U, 12055U, 10380U, |
9794 | | 12393U, 11256U, 11210U, 10681U, 12063U, 12409U, 11103U, 12219U, |
9795 | | 10847U, 12154U, 11167U, 12746U, 10727U, 12437U, 828U, 9683U, |
9796 | | 11591U, 9813U, 11781U, 16812U, 9738U, 11646U, 9900U, 11920U, |
9797 | | 11131U, 21909U, 12711U, 22012U, 10785U, 21895U, 12485U, 21998U, |
9798 | | 11191U, 21933U, 12769U, 22044U, 11003U, 12648U, 9876U, 12675U, |
9799 | | 14437U, 15327U, 14470U, 15360U, 12684U, 1458U, 11065U, 11520U, |
9800 | | 14448U, 15338U, 14481U, 15371U, 10745U, 12455U, 11282U, 12832U, |
9801 | | 10765U, 12475U, 11292U, 12842U, 11274U, 12824U, 841U, 9698U, |
9802 | | 11606U, 9828U, 11796U, 16826U, 9754U, 11662U, 9916U, 11936U, |
9803 | | 13664U, 9712U, 11620U, 9852U, 11850U, 17601U, 9769U, 11677U, |
9804 | | 9931U, 11994U, 13675U, 9725U, 11633U, 9865U, 11863U, 17613U, |
9805 | | 9783U, 11691U, 9945U, 12008U, 853U, 11810U, 14227U, 11876U, |
9806 | | 17630U, 12022U, 16839U, 11951U, 2656U, 11837U, 16864U, 11980U, |
9807 | | 1449U, 11824U, 11891U, 16852U, 11966U, 11905U, 11083U, 12693U, |
9808 | | 10655U, 12383U, 10983U, 12638U, 11310U, 12852U, 11021U, 12658U, |
9809 | | 10613U, 12341U, 10941U, 12596U, 10901U, 12556U, 11150U, 12737U, |
9810 | | 10839U, 12531U, 10634U, 12362U, 10962U, 12617U, 10592U, 12320U, |
9811 | | 10920U, 12575U, 7590U, 4334U, 8927U, 11543U, 19662U, 10802U, |
9812 | | 12502U, 7604U, 4342U, 8935U, 11551U, 19670U, 10820U, 12520U, |
9813 | | 11230U, 12798U, 10673U, 12401U, 11265U, 12815U, 3663U, 11220U, |
9814 | | 12788U, 10691U, 12419U, 11112U, 12702U, 10856U, 12539U, 4103U, |
9815 | | 5781U, 7103U, 17951U, 5438U, 6895U, 13228U, 17593U, 7898U, |
9816 | | 17916U, 8659U, 8724U, 8893U, 9360U, 17797U, 5176U, 4257U, |
9817 | | 16757U, 24629U, 5183U, 13956U, 13950U, 4532U, 24101U, 14026U, |
9818 | | 24748U, 24758U, 24740U, 4151U, 17199U, 17289U, 17333U, 4159U, |
9819 | | 17208U, 9047U, 7253U, 24523U, 13942U, 18834U, 8053U, 19582U, |
9820 | | 17966U, 7764U, 24533U, 18301U, 3704U, 10865U, 17317U, 17771U, |
9821 | | 24620U, 4147U, 3281U, 24650U, 14181U, 8302U, 7913U, 3545U, |
9822 | | 24657U, 13856U, 8252U, 24671U, 24665U, |
9823 | | }; |
9824 | | |
9825 | | extern const uint8_t PPCInstrDeprecationFeatures[] = { |
9826 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9827 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9828 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9829 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9830 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9831 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9832 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9833 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9834 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9835 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9836 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9837 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9838 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9839 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9840 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9841 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9842 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9843 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9844 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9845 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9846 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9847 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9848 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9849 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9850 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9851 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9852 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9853 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9854 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9855 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9856 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9857 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9858 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9859 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9860 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9861 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9862 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9863 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9864 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9865 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9866 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9867 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9868 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9869 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9870 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9871 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9872 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9873 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9874 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9875 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9876 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9877 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9878 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9879 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9880 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9881 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9882 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9883 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9884 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9885 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9886 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9887 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9888 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9889 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9890 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9891 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9892 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9893 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9894 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9895 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9896 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9897 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9898 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9899 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9900 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9901 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9902 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9903 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9904 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9905 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9906 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9907 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9908 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9909 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9910 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9911 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9912 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9913 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9914 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9915 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9916 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9917 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9918 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9919 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9920 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9921 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9922 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9923 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9924 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9925 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9926 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9927 | | uint8_t(-1), PPC::DeprecatedDST, PPC::DeprecatedDST, PPC::DeprecatedDST, PPC::DeprecatedDST, PPC::DeprecatedDST, PPC::DeprecatedDST, PPC::DeprecatedDST, |
9928 | | PPC::DeprecatedDST, PPC::DeprecatedDST, PPC::DeprecatedDST, uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9929 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9930 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9931 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9932 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9933 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9934 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9935 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9936 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9937 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9938 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9939 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9940 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9941 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9942 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9943 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9944 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9945 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9946 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9947 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9948 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9949 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9950 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9951 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9952 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9953 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9954 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9955 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9956 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9957 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9958 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9959 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9960 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9961 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9962 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9963 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9964 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9965 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9966 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9967 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9968 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9969 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9970 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9971 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9972 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9973 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9974 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9975 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9976 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9977 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9978 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9979 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9980 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9981 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9982 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9983 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9984 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9985 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9986 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9987 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9988 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9989 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9990 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9991 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9992 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9993 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9994 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9995 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9996 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9997 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9998 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
9999 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10000 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10001 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10002 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10003 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10004 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10005 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10006 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10007 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10008 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10009 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10010 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10011 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10012 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10013 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10014 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10015 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10016 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10017 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10018 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10019 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10020 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10021 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10022 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10023 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10024 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10025 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10026 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10027 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10028 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10029 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10030 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10031 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10032 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10033 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10034 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10035 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10036 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10037 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10038 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10039 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10040 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10041 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10042 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10043 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10044 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10045 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10046 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10047 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10048 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10049 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10050 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10051 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10052 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10053 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10054 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10055 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10056 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10057 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10058 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10059 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10060 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10061 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10062 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10063 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10064 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10065 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10066 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10067 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10068 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10069 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10070 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10071 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10072 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10073 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10074 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10075 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10076 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10077 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10078 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10079 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10080 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10081 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10082 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10083 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10084 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10085 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10086 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10087 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10088 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10089 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10090 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10091 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10092 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10093 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10094 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10095 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10096 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10097 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10098 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10099 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10100 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10101 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10102 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10103 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10104 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10105 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10106 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10107 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10108 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10109 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10110 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10111 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10112 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10113 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10114 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10115 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10116 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10117 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10118 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10119 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10120 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10121 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10122 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10123 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10124 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10125 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10126 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10127 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10128 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10129 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10130 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10131 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10132 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10133 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10134 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10135 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10136 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10137 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10138 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10139 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10140 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10141 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10142 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10143 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10144 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10145 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10146 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10147 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10148 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10149 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10150 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10151 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10152 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10153 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10154 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10155 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10156 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10157 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10158 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10159 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10160 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10161 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10162 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10163 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10164 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10165 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10166 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10167 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10168 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10169 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10170 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10171 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10172 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10173 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10174 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10175 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10176 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10177 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10178 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10179 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10180 | | uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), |
10181 | | }; |
10182 | | |
10183 | 6 | static inline void InitPPCMCInstrInfo(MCInstrInfo *II) { |
10184 | 6 | II->InitMCInstrInfo(PPCDescs.Insts, PPCInstrNameIndices, PPCInstrNameData, PPCInstrDeprecationFeatures, nullptr, 2837); |
10185 | 6 | } |
10186 | | |
10187 | | } // end namespace llvm |
10188 | | #endif // GET_INSTRINFO_MC_DESC |
10189 | | |
10190 | | #ifdef GET_INSTRINFO_HEADER |
10191 | | #undef GET_INSTRINFO_HEADER |
10192 | | namespace llvm { |
10193 | | struct PPCGenInstrInfo : public TargetInstrInfo { |
10194 | | explicit PPCGenInstrInfo(unsigned CFSetupOpcode = ~0u, unsigned CFDestroyOpcode = ~0u, unsigned CatchRetOpcode = ~0u, unsigned ReturnOpcode = ~0u); |
10195 | | ~PPCGenInstrInfo() override = default; |
10196 | | |
10197 | | }; |
10198 | | } // end namespace llvm |
10199 | | #endif // GET_INSTRINFO_HEADER |
10200 | | |
10201 | | #ifdef GET_INSTRINFO_HELPER_DECLS |
10202 | | #undef GET_INSTRINFO_HELPER_DECLS |
10203 | | |
10204 | | |
10205 | | #endif // GET_INSTRINFO_HELPER_DECLS |
10206 | | |
10207 | | #ifdef GET_INSTRINFO_HELPERS |
10208 | | #undef GET_INSTRINFO_HELPERS |
10209 | | |
10210 | | #endif // GET_INSTRINFO_HELPERS |
10211 | | |
10212 | | #ifdef GET_INSTRINFO_CTOR_DTOR |
10213 | | #undef GET_INSTRINFO_CTOR_DTOR |
10214 | | namespace llvm { |
10215 | | extern const PPCInstrTable PPCDescs; |
10216 | | extern const unsigned PPCInstrNameIndices[]; |
10217 | | extern const char PPCInstrNameData[]; |
10218 | | extern const uint8_t PPCInstrDeprecationFeatures[]; |
10219 | | PPCGenInstrInfo::PPCGenInstrInfo(unsigned CFSetupOpcode, unsigned CFDestroyOpcode, unsigned CatchRetOpcode, unsigned ReturnOpcode) |
10220 | 25 | : TargetInstrInfo(CFSetupOpcode, CFDestroyOpcode, CatchRetOpcode, ReturnOpcode) { |
10221 | 25 | InitMCInstrInfo(PPCDescs.Insts, PPCInstrNameIndices, PPCInstrNameData, PPCInstrDeprecationFeatures, nullptr, 2837); |
10222 | 25 | } |
10223 | | } // end namespace llvm |
10224 | | #endif // GET_INSTRINFO_CTOR_DTOR |
10225 | | |
10226 | | #ifdef GET_INSTRINFO_OPERAND_ENUM |
10227 | | #undef GET_INSTRINFO_OPERAND_ENUM |
10228 | | namespace llvm { |
10229 | | namespace PPC { |
10230 | | namespace OpName { |
10231 | | enum { |
10232 | | OPERAND_LAST |
10233 | | }; |
10234 | | } // end namespace OpName |
10235 | | } // end namespace PPC |
10236 | | } // end namespace llvm |
10237 | | #endif //GET_INSTRINFO_OPERAND_ENUM |
10238 | | |
10239 | | #ifdef GET_INSTRINFO_NAMED_OPS |
10240 | | #undef GET_INSTRINFO_NAMED_OPS |
10241 | | namespace llvm { |
10242 | | namespace PPC { |
10243 | | LLVM_READONLY |
10244 | | int16_t getNamedOperandIdx(uint16_t Opcode, uint16_t NamedIdx) { |
10245 | | return -1; |
10246 | | } |
10247 | | } // end namespace PPC |
10248 | | } // end namespace llvm |
10249 | | #endif //GET_INSTRINFO_NAMED_OPS |
10250 | | |
10251 | | #ifdef GET_INSTRINFO_OPERAND_TYPES_ENUM |
10252 | | #undef GET_INSTRINFO_OPERAND_TYPES_ENUM |
10253 | | namespace llvm { |
10254 | | namespace PPC { |
10255 | | namespace OpTypes { |
10256 | | enum OperandType { |
10257 | | abscalltarget = 0, |
10258 | | abscondbrtarget = 1, |
10259 | | absdirectbrtarget = 2, |
10260 | | atimm = 3, |
10261 | | calltarget = 4, |
10262 | | condbrtarget = 5, |
10263 | | crbitm = 6, |
10264 | | directbrtarget = 7, |
10265 | | dispRI = 8, |
10266 | | dispRI34 = 9, |
10267 | | dispRI34_pcrel = 10, |
10268 | | dispRIHash = 11, |
10269 | | dispRIX = 12, |
10270 | | dispRIX16 = 13, |
10271 | | dispSPE2 = 14, |
10272 | | dispSPE4 = 15, |
10273 | | dispSPE8 = 16, |
10274 | | f32imm = 17, |
10275 | | f64imm = 18, |
10276 | | i1imm = 19, |
10277 | | i8imm = 20, |
10278 | | i16imm = 21, |
10279 | | i32imm = 22, |
10280 | | i64imm = 23, |
10281 | | imm32SExt16 = 24, |
10282 | | imm64SExt16 = 25, |
10283 | | imm64ZExt32 = 26, |
10284 | | immZero = 27, |
10285 | | memr = 28, |
10286 | | memri = 29, |
10287 | | memri34 = 30, |
10288 | | memri34_pcrel = 31, |
10289 | | memrihash = 32, |
10290 | | memrix = 33, |
10291 | | memrix16 = 34, |
10292 | | memrr = 35, |
10293 | | pred = 36, |
10294 | | ptr_rc_idx = 37, |
10295 | | ptr_rc_nor0 = 38, |
10296 | | ptype0 = 39, |
10297 | | ptype1 = 40, |
10298 | | ptype2 = 41, |
10299 | | ptype3 = 42, |
10300 | | ptype4 = 43, |
10301 | | ptype5 = 44, |
10302 | | s5imm = 45, |
10303 | | s16imm = 46, |
10304 | | s16imm64 = 47, |
10305 | | s17imm = 48, |
10306 | | s17imm64 = 49, |
10307 | | s34imm = 50, |
10308 | | s34imm_pcrel = 51, |
10309 | | spe2dis = 52, |
10310 | | spe4dis = 53, |
10311 | | spe8dis = 54, |
10312 | | tlscall = 55, |
10313 | | tlscall32 = 56, |
10314 | | tlsgd = 57, |
10315 | | tlsgd32 = 58, |
10316 | | tlsreg = 59, |
10317 | | tlsreg32 = 60, |
10318 | | tocentry = 61, |
10319 | | tocentry32 = 62, |
10320 | | type0 = 63, |
10321 | | type1 = 64, |
10322 | | type2 = 65, |
10323 | | type3 = 66, |
10324 | | type4 = 67, |
10325 | | type5 = 68, |
10326 | | u1imm = 69, |
10327 | | u2imm = 70, |
10328 | | u3imm = 71, |
10329 | | u4imm = 72, |
10330 | | u5imm = 73, |
10331 | | u6imm = 74, |
10332 | | u7imm = 75, |
10333 | | u8imm = 76, |
10334 | | u10imm = 77, |
10335 | | u12imm = 78, |
10336 | | u16imm = 79, |
10337 | | u16imm64 = 80, |
10338 | | untyped_imm_0 = 81, |
10339 | | acc = 82, |
10340 | | crbitrc = 83, |
10341 | | crrc = 84, |
10342 | | dmr = 85, |
10343 | | dmrp = 86, |
10344 | | dmrrow = 87, |
10345 | | dmrrowp = 88, |
10346 | | f4rc = 89, |
10347 | | f8rc = 90, |
10348 | | fpairrc = 91, |
10349 | | g8prc = 92, |
10350 | | g8rc = 93, |
10351 | | g8rc_nox0 = 94, |
10352 | | gprc = 95, |
10353 | | gprc_nor0 = 96, |
10354 | | spe4rc = 97, |
10355 | | sperc = 98, |
10356 | | spilltovsrrc = 99, |
10357 | | uacc = 100, |
10358 | | vfrc = 101, |
10359 | | vrrc = 102, |
10360 | | vsfrc = 103, |
10361 | | vsrc = 104, |
10362 | | vsrpevenrc = 105, |
10363 | | vsrprc = 106, |
10364 | | vssrc = 107, |
10365 | | wacc = 108, |
10366 | | wacc_hi = 109, |
10367 | | ACCRC = 110, |
10368 | | CARRYRC = 111, |
10369 | | CRBITRC = 112, |
10370 | | CRRC = 113, |
10371 | | CTRRC = 114, |
10372 | | CTRRC8 = 115, |
10373 | | DMRRC = 116, |
10374 | | DMRROWRC = 117, |
10375 | | DMRROWpRC = 118, |
10376 | | DMRpRC = 119, |
10377 | | F4RC = 120, |
10378 | | F8RC = 121, |
10379 | | FpRC = 122, |
10380 | | G8RC = 123, |
10381 | | G8RC_NOX0 = 124, |
10382 | | G8pRC = 125, |
10383 | | GPRC = 126, |
10384 | | GPRC32 = 127, |
10385 | | GPRC_NOR0 = 128, |
10386 | | LR8RC = 129, |
10387 | | LRRC = 130, |
10388 | | SPERC = 131, |
10389 | | SPILLTOVSRRC = 132, |
10390 | | UACCRC = 133, |
10391 | | VFRC = 134, |
10392 | | VRRC = 135, |
10393 | | VRSAVERC = 136, |
10394 | | VSFRC = 137, |
10395 | | VSLRC = 138, |
10396 | | VSRC = 139, |
10397 | | VSRpRC = 140, |
10398 | | VSSRC = 141, |
10399 | | WACCRC = 142, |
10400 | | WACC_HIRC = 143, |
10401 | | OPERAND_TYPE_LIST_END |
10402 | | }; |
10403 | | } // end namespace OpTypes |
10404 | | } // end namespace PPC |
10405 | | } // end namespace llvm |
10406 | | #endif // GET_INSTRINFO_OPERAND_TYPES_ENUM |
10407 | | |
10408 | | #ifdef GET_INSTRINFO_OPERAND_TYPE |
10409 | | #undef GET_INSTRINFO_OPERAND_TYPE |
10410 | | namespace llvm { |
10411 | | namespace PPC { |
10412 | | LLVM_READONLY |
10413 | | static int getOperandType(uint16_t Opcode, uint16_t OpIdx) { |
10414 | | static const uint16_t Offsets[] = { |
10415 | | /* PHI */ |
10416 | | 0, |
10417 | | /* INLINEASM */ |
10418 | | 1, |
10419 | | /* INLINEASM_BR */ |
10420 | | 1, |
10421 | | /* CFI_INSTRUCTION */ |
10422 | | 1, |
10423 | | /* EH_LABEL */ |
10424 | | 2, |
10425 | | /* GC_LABEL */ |
10426 | | 3, |
10427 | | /* ANNOTATION_LABEL */ |
10428 | | 4, |
10429 | | /* KILL */ |
10430 | | 5, |
10431 | | /* EXTRACT_SUBREG */ |
10432 | | 5, |
10433 | | /* INSERT_SUBREG */ |
10434 | | 8, |
10435 | | /* IMPLICIT_DEF */ |
10436 | | 12, |
10437 | | /* SUBREG_TO_REG */ |
10438 | | 13, |
10439 | | /* COPY_TO_REGCLASS */ |
10440 | | 17, |
10441 | | /* DBG_VALUE */ |
10442 | | 20, |
10443 | | /* DBG_VALUE_LIST */ |
10444 | | 20, |
10445 | | /* DBG_INSTR_REF */ |
10446 | | 20, |
10447 | | /* DBG_PHI */ |
10448 | | 20, |
10449 | | /* DBG_LABEL */ |
10450 | | 20, |
10451 | | /* REG_SEQUENCE */ |
10452 | | 21, |
10453 | | /* COPY */ |
10454 | | 23, |
10455 | | /* BUNDLE */ |
10456 | | 25, |
10457 | | /* LIFETIME_START */ |
10458 | | 25, |
10459 | | /* LIFETIME_END */ |
10460 | | 26, |
10461 | | /* PSEUDO_PROBE */ |
10462 | | 27, |
10463 | | /* ARITH_FENCE */ |
10464 | | 31, |
10465 | | /* STACKMAP */ |
10466 | | 33, |
10467 | | /* FENTRY_CALL */ |
10468 | | 35, |
10469 | | /* PATCHPOINT */ |
10470 | | 35, |
10471 | | /* LOAD_STACK_GUARD */ |
10472 | | 41, |
10473 | | /* PREALLOCATED_SETUP */ |
10474 | | 42, |
10475 | | /* PREALLOCATED_ARG */ |
10476 | | 43, |
10477 | | /* STATEPOINT */ |
10478 | | 46, |
10479 | | /* LOCAL_ESCAPE */ |
10480 | | 46, |
10481 | | /* FAULTING_OP */ |
10482 | | 48, |
10483 | | /* PATCHABLE_OP */ |
10484 | | 49, |
10485 | | /* PATCHABLE_FUNCTION_ENTER */ |
10486 | | 49, |
10487 | | /* PATCHABLE_RET */ |
10488 | | 49, |
10489 | | /* PATCHABLE_FUNCTION_EXIT */ |
10490 | | 49, |
10491 | | /* PATCHABLE_TAIL_CALL */ |
10492 | | 49, |
10493 | | /* PATCHABLE_EVENT_CALL */ |
10494 | | 49, |
10495 | | /* PATCHABLE_TYPED_EVENT_CALL */ |
10496 | | 51, |
10497 | | /* ICALL_BRANCH_FUNNEL */ |
10498 | | 54, |
10499 | | /* MEMBARRIER */ |
10500 | | 54, |
10501 | | /* JUMP_TABLE_DEBUG_INFO */ |
10502 | | 54, |
10503 | | /* G_ASSERT_SEXT */ |
10504 | | 55, |
10505 | | /* G_ASSERT_ZEXT */ |
10506 | | 58, |
10507 | | /* G_ASSERT_ALIGN */ |
10508 | | 61, |
10509 | | /* G_ADD */ |
10510 | | 64, |
10511 | | /* G_SUB */ |
10512 | | 67, |
10513 | | /* G_MUL */ |
10514 | | 70, |
10515 | | /* G_SDIV */ |
10516 | | 73, |
10517 | | /* G_UDIV */ |
10518 | | 76, |
10519 | | /* G_SREM */ |
10520 | | 79, |
10521 | | /* G_UREM */ |
10522 | | 82, |
10523 | | /* G_SDIVREM */ |
10524 | | 85, |
10525 | | /* G_UDIVREM */ |
10526 | | 89, |
10527 | | /* G_AND */ |
10528 | | 93, |
10529 | | /* G_OR */ |
10530 | | 96, |
10531 | | /* G_XOR */ |
10532 | | 99, |
10533 | | /* G_IMPLICIT_DEF */ |
10534 | | 102, |
10535 | | /* G_PHI */ |
10536 | | 103, |
10537 | | /* G_FRAME_INDEX */ |
10538 | | 104, |
10539 | | /* G_GLOBAL_VALUE */ |
10540 | | 106, |
10541 | | /* G_CONSTANT_POOL */ |
10542 | | 108, |
10543 | | /* G_EXTRACT */ |
10544 | | 110, |
10545 | | /* G_UNMERGE_VALUES */ |
10546 | | 113, |
10547 | | /* G_INSERT */ |
10548 | | 115, |
10549 | | /* G_MERGE_VALUES */ |
10550 | | 119, |
10551 | | /* G_BUILD_VECTOR */ |
10552 | | 121, |
10553 | | /* G_BUILD_VECTOR_TRUNC */ |
10554 | | 123, |
10555 | | /* G_CONCAT_VECTORS */ |
10556 | | 125, |
10557 | | /* G_PTRTOINT */ |
10558 | | 127, |
10559 | | /* G_INTTOPTR */ |
10560 | | 129, |
10561 | | /* G_BITCAST */ |
10562 | | 131, |
10563 | | /* G_FREEZE */ |
10564 | | 133, |
10565 | | /* G_CONSTANT_FOLD_BARRIER */ |
10566 | | 135, |
10567 | | /* G_INTRINSIC_FPTRUNC_ROUND */ |
10568 | | 137, |
10569 | | /* G_INTRINSIC_TRUNC */ |
10570 | | 140, |
10571 | | /* G_INTRINSIC_ROUND */ |
10572 | | 142, |
10573 | | /* G_INTRINSIC_LRINT */ |
10574 | | 144, |
10575 | | /* G_INTRINSIC_ROUNDEVEN */ |
10576 | | 146, |
10577 | | /* G_READCYCLECOUNTER */ |
10578 | | 148, |
10579 | | /* G_LOAD */ |
10580 | | 149, |
10581 | | /* G_SEXTLOAD */ |
10582 | | 151, |
10583 | | /* G_ZEXTLOAD */ |
10584 | | 153, |
10585 | | /* G_INDEXED_LOAD */ |
10586 | | 155, |
10587 | | /* G_INDEXED_SEXTLOAD */ |
10588 | | 160, |
10589 | | /* G_INDEXED_ZEXTLOAD */ |
10590 | | 165, |
10591 | | /* G_STORE */ |
10592 | | 170, |
10593 | | /* G_INDEXED_STORE */ |
10594 | | 172, |
10595 | | /* G_ATOMIC_CMPXCHG_WITH_SUCCESS */ |
10596 | | 177, |
10597 | | /* G_ATOMIC_CMPXCHG */ |
10598 | | 182, |
10599 | | /* G_ATOMICRMW_XCHG */ |
10600 | | 186, |
10601 | | /* G_ATOMICRMW_ADD */ |
10602 | | 189, |
10603 | | /* G_ATOMICRMW_SUB */ |
10604 | | 192, |
10605 | | /* G_ATOMICRMW_AND */ |
10606 | | 195, |
10607 | | /* G_ATOMICRMW_NAND */ |
10608 | | 198, |
10609 | | /* G_ATOMICRMW_OR */ |
10610 | | 201, |
10611 | | /* G_ATOMICRMW_XOR */ |
10612 | | 204, |
10613 | | /* G_ATOMICRMW_MAX */ |
10614 | | 207, |
10615 | | /* G_ATOMICRMW_MIN */ |
10616 | | 210, |
10617 | | /* G_ATOMICRMW_UMAX */ |
10618 | | 213, |
10619 | | /* G_ATOMICRMW_UMIN */ |
10620 | | 216, |
10621 | | /* G_ATOMICRMW_FADD */ |
10622 | | 219, |
10623 | | /* G_ATOMICRMW_FSUB */ |
10624 | | 222, |
10625 | | /* G_ATOMICRMW_FMAX */ |
10626 | | 225, |
10627 | | /* G_ATOMICRMW_FMIN */ |
10628 | | 228, |
10629 | | /* G_ATOMICRMW_UINC_WRAP */ |
10630 | | 231, |
10631 | | /* G_ATOMICRMW_UDEC_WRAP */ |
10632 | | 234, |
10633 | | /* G_FENCE */ |
10634 | | 237, |
10635 | | /* G_PREFETCH */ |
10636 | | 239, |
10637 | | /* G_BRCOND */ |
10638 | | 243, |
10639 | | /* G_BRINDIRECT */ |
10640 | | 245, |
10641 | | /* G_INVOKE_REGION_START */ |
10642 | | 246, |
10643 | | /* G_INTRINSIC */ |
10644 | | 246, |
10645 | | /* G_INTRINSIC_W_SIDE_EFFECTS */ |
10646 | | 247, |
10647 | | /* G_INTRINSIC_CONVERGENT */ |
10648 | | 248, |
10649 | | /* G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS */ |
10650 | | 249, |
10651 | | /* G_ANYEXT */ |
10652 | | 250, |
10653 | | /* G_TRUNC */ |
10654 | | 252, |
10655 | | /* G_CONSTANT */ |
10656 | | 254, |
10657 | | /* G_FCONSTANT */ |
10658 | | 256, |
10659 | | /* G_VASTART */ |
10660 | | 258, |
10661 | | /* G_VAARG */ |
10662 | | 259, |
10663 | | /* G_SEXT */ |
10664 | | 262, |
10665 | | /* G_SEXT_INREG */ |
10666 | | 264, |
10667 | | /* G_ZEXT */ |
10668 | | 267, |
10669 | | /* G_SHL */ |
10670 | | 269, |
10671 | | /* G_LSHR */ |
10672 | | 272, |
10673 | | /* G_ASHR */ |
10674 | | 275, |
10675 | | /* G_FSHL */ |
10676 | | 278, |
10677 | | /* G_FSHR */ |
10678 | | 282, |
10679 | | /* G_ROTR */ |
10680 | | 286, |
10681 | | /* G_ROTL */ |
10682 | | 289, |
10683 | | /* G_ICMP */ |
10684 | | 292, |
10685 | | /* G_FCMP */ |
10686 | | 296, |
10687 | | /* G_SELECT */ |
10688 | | 300, |
10689 | | /* G_UADDO */ |
10690 | | 304, |
10691 | | /* G_UADDE */ |
10692 | | 308, |
10693 | | /* G_USUBO */ |
10694 | | 313, |
10695 | | /* G_USUBE */ |
10696 | | 317, |
10697 | | /* G_SADDO */ |
10698 | | 322, |
10699 | | /* G_SADDE */ |
10700 | | 326, |
10701 | | /* G_SSUBO */ |
10702 | | 331, |
10703 | | /* G_SSUBE */ |
10704 | | 335, |
10705 | | /* G_UMULO */ |
10706 | | 340, |
10707 | | /* G_SMULO */ |
10708 | | 344, |
10709 | | /* G_UMULH */ |
10710 | | 348, |
10711 | | /* G_SMULH */ |
10712 | | 351, |
10713 | | /* G_UADDSAT */ |
10714 | | 354, |
10715 | | /* G_SADDSAT */ |
10716 | | 357, |
10717 | | /* G_USUBSAT */ |
10718 | | 360, |
10719 | | /* G_SSUBSAT */ |
10720 | | 363, |
10721 | | /* G_USHLSAT */ |
10722 | | 366, |
10723 | | /* G_SSHLSAT */ |
10724 | | 369, |
10725 | | /* G_SMULFIX */ |
10726 | | 372, |
10727 | | /* G_UMULFIX */ |
10728 | | 376, |
10729 | | /* G_SMULFIXSAT */ |
10730 | | 380, |
10731 | | /* G_UMULFIXSAT */ |
10732 | | 384, |
10733 | | /* G_SDIVFIX */ |
10734 | | 388, |
10735 | | /* G_UDIVFIX */ |
10736 | | 392, |
10737 | | /* G_SDIVFIXSAT */ |
10738 | | 396, |
10739 | | /* G_UDIVFIXSAT */ |
10740 | | 400, |
10741 | | /* G_FADD */ |
10742 | | 404, |
10743 | | /* G_FSUB */ |
10744 | | 407, |
10745 | | /* G_FMUL */ |
10746 | | 410, |
10747 | | /* G_FMA */ |
10748 | | 413, |
10749 | | /* G_FMAD */ |
10750 | | 417, |
10751 | | /* G_FDIV */ |
10752 | | 421, |
10753 | | /* G_FREM */ |
10754 | | 424, |
10755 | | /* G_FPOW */ |
10756 | | 427, |
10757 | | /* G_FPOWI */ |
10758 | | 430, |
10759 | | /* G_FEXP */ |
10760 | | 433, |
10761 | | /* G_FEXP2 */ |
10762 | | 435, |
10763 | | /* G_FEXP10 */ |
10764 | | 437, |
10765 | | /* G_FLOG */ |
10766 | | 439, |
10767 | | /* G_FLOG2 */ |
10768 | | 441, |
10769 | | /* G_FLOG10 */ |
10770 | | 443, |
10771 | | /* G_FLDEXP */ |
10772 | | 445, |
10773 | | /* G_FFREXP */ |
10774 | | 448, |
10775 | | /* G_FNEG */ |
10776 | | 451, |
10777 | | /* G_FPEXT */ |
10778 | | 453, |
10779 | | /* G_FPTRUNC */ |
10780 | | 455, |
10781 | | /* G_FPTOSI */ |
10782 | | 457, |
10783 | | /* G_FPTOUI */ |
10784 | | 459, |
10785 | | /* G_SITOFP */ |
10786 | | 461, |
10787 | | /* G_UITOFP */ |
10788 | | 463, |
10789 | | /* G_FABS */ |
10790 | | 465, |
10791 | | /* G_FCOPYSIGN */ |
10792 | | 467, |
10793 | | /* G_IS_FPCLASS */ |
10794 | | 470, |
10795 | | /* G_FCANONICALIZE */ |
10796 | | 473, |
10797 | | /* G_FMINNUM */ |
10798 | | 475, |
10799 | | /* G_FMAXNUM */ |
10800 | | 478, |
10801 | | /* G_FMINNUM_IEEE */ |
10802 | | 481, |
10803 | | /* G_FMAXNUM_IEEE */ |
10804 | | 484, |
10805 | | /* G_FMINIMUM */ |
10806 | | 487, |
10807 | | /* G_FMAXIMUM */ |
10808 | | 490, |
10809 | | /* G_GET_FPENV */ |
10810 | | 493, |
10811 | | /* G_SET_FPENV */ |
10812 | | 494, |
10813 | | /* G_RESET_FPENV */ |
10814 | | 495, |
10815 | | /* G_GET_FPMODE */ |
10816 | | 495, |
10817 | | /* G_SET_FPMODE */ |
10818 | | 496, |
10819 | | /* G_RESET_FPMODE */ |
10820 | | 497, |
10821 | | /* G_PTR_ADD */ |
10822 | | 497, |
10823 | | /* G_PTRMASK */ |
10824 | | 500, |
10825 | | /* G_SMIN */ |
10826 | | 503, |
10827 | | /* G_SMAX */ |
10828 | | 506, |
10829 | | /* G_UMIN */ |
10830 | | 509, |
10831 | | /* G_UMAX */ |
10832 | | 512, |
10833 | | /* G_ABS */ |
10834 | | 515, |
10835 | | /* G_LROUND */ |
10836 | | 517, |
10837 | | /* G_LLROUND */ |
10838 | | 519, |
10839 | | /* G_BR */ |
10840 | | 521, |
10841 | | /* G_BRJT */ |
10842 | | 522, |
10843 | | /* G_INSERT_VECTOR_ELT */ |
10844 | | 525, |
10845 | | /* G_EXTRACT_VECTOR_ELT */ |
10846 | | 529, |
10847 | | /* G_SHUFFLE_VECTOR */ |
10848 | | 532, |
10849 | | /* G_CTTZ */ |
10850 | | 536, |
10851 | | /* G_CTTZ_ZERO_UNDEF */ |
10852 | | 538, |
10853 | | /* G_CTLZ */ |
10854 | | 540, |
10855 | | /* G_CTLZ_ZERO_UNDEF */ |
10856 | | 542, |
10857 | | /* G_CTPOP */ |
10858 | | 544, |
10859 | | /* G_BSWAP */ |
10860 | | 546, |
10861 | | /* G_BITREVERSE */ |
10862 | | 548, |
10863 | | /* G_FCEIL */ |
10864 | | 550, |
10865 | | /* G_FCOS */ |
10866 | | 552, |
10867 | | /* G_FSIN */ |
10868 | | 554, |
10869 | | /* G_FSQRT */ |
10870 | | 556, |
10871 | | /* G_FFLOOR */ |
10872 | | 558, |
10873 | | /* G_FRINT */ |
10874 | | 560, |
10875 | | /* G_FNEARBYINT */ |
10876 | | 562, |
10877 | | /* G_ADDRSPACE_CAST */ |
10878 | | 564, |
10879 | | /* G_BLOCK_ADDR */ |
10880 | | 566, |
10881 | | /* G_JUMP_TABLE */ |
10882 | | 568, |
10883 | | /* G_DYN_STACKALLOC */ |
10884 | | 570, |
10885 | | /* G_STACKSAVE */ |
10886 | | 573, |
10887 | | /* G_STACKRESTORE */ |
10888 | | 574, |
10889 | | /* G_STRICT_FADD */ |
10890 | | 575, |
10891 | | /* G_STRICT_FSUB */ |
10892 | | 578, |
10893 | | /* G_STRICT_FMUL */ |
10894 | | 581, |
10895 | | /* G_STRICT_FDIV */ |
10896 | | 584, |
10897 | | /* G_STRICT_FREM */ |
10898 | | 587, |
10899 | | /* G_STRICT_FMA */ |
10900 | | 590, |
10901 | | /* G_STRICT_FSQRT */ |
10902 | | 594, |
10903 | | /* G_STRICT_FLDEXP */ |
10904 | | 596, |
10905 | | /* G_READ_REGISTER */ |
10906 | | 599, |
10907 | | /* G_WRITE_REGISTER */ |
10908 | | 601, |
10909 | | /* G_MEMCPY */ |
10910 | | 603, |
10911 | | /* G_MEMCPY_INLINE */ |
10912 | | 607, |
10913 | | /* G_MEMMOVE */ |
10914 | | 610, |
10915 | | /* G_MEMSET */ |
10916 | | 614, |
10917 | | /* G_BZERO */ |
10918 | | 618, |
10919 | | /* G_VECREDUCE_SEQ_FADD */ |
10920 | | 621, |
10921 | | /* G_VECREDUCE_SEQ_FMUL */ |
10922 | | 624, |
10923 | | /* G_VECREDUCE_FADD */ |
10924 | | 627, |
10925 | | /* G_VECREDUCE_FMUL */ |
10926 | | 629, |
10927 | | /* G_VECREDUCE_FMAX */ |
10928 | | 631, |
10929 | | /* G_VECREDUCE_FMIN */ |
10930 | | 633, |
10931 | | /* G_VECREDUCE_FMAXIMUM */ |
10932 | | 635, |
10933 | | /* G_VECREDUCE_FMINIMUM */ |
10934 | | 637, |
10935 | | /* G_VECREDUCE_ADD */ |
10936 | | 639, |
10937 | | /* G_VECREDUCE_MUL */ |
10938 | | 641, |
10939 | | /* G_VECREDUCE_AND */ |
10940 | | 643, |
10941 | | /* G_VECREDUCE_OR */ |
10942 | | 645, |
10943 | | /* G_VECREDUCE_XOR */ |
10944 | | 647, |
10945 | | /* G_VECREDUCE_SMAX */ |
10946 | | 649, |
10947 | | /* G_VECREDUCE_SMIN */ |
10948 | | 651, |
10949 | | /* G_VECREDUCE_UMAX */ |
10950 | | 653, |
10951 | | /* G_VECREDUCE_UMIN */ |
10952 | | 655, |
10953 | | /* G_SBFX */ |
10954 | | 657, |
10955 | | /* G_UBFX */ |
10956 | | 661, |
10957 | | /* ATOMIC_CMP_SWAP_I128 */ |
10958 | | 665, |
10959 | | /* ATOMIC_LOAD_ADD_I128 */ |
10960 | | 673, |
10961 | | /* ATOMIC_LOAD_AND_I128 */ |
10962 | | 679, |
10963 | | /* ATOMIC_LOAD_NAND_I128 */ |
10964 | | 685, |
10965 | | /* ATOMIC_LOAD_OR_I128 */ |
10966 | | 691, |
10967 | | /* ATOMIC_LOAD_SUB_I128 */ |
10968 | | 697, |
10969 | | /* ATOMIC_LOAD_XOR_I128 */ |
10970 | | 703, |
10971 | | /* ATOMIC_SWAP_I128 */ |
10972 | | 709, |
10973 | | /* BUILD_QUADWORD */ |
10974 | | 715, |
10975 | | /* BUILD_UACC */ |
10976 | | 718, |
10977 | | /* CFENCE */ |
10978 | | 720, |
10979 | | /* CFENCE8 */ |
10980 | | 721, |
10981 | | /* CLRLSLDI */ |
10982 | | 722, |
10983 | | /* CLRLSLDI_rec */ |
10984 | | 726, |
10985 | | /* CLRLSLWI */ |
10986 | | 730, |
10987 | | /* CLRLSLWI_rec */ |
10988 | | 734, |
10989 | | /* CLRRDI */ |
10990 | | 738, |
10991 | | /* CLRRDI_rec */ |
10992 | | 741, |
10993 | | /* CLRRWI */ |
10994 | | 744, |
10995 | | /* CLRRWI_rec */ |
10996 | | 747, |
10997 | | /* DCBFL */ |
10998 | | 750, |
10999 | | /* DCBFLP */ |
11000 | | 752, |
11001 | | /* DCBFPS */ |
11002 | | 754, |
11003 | | /* DCBFx */ |
11004 | | 756, |
11005 | | /* DCBSTPS */ |
11006 | | 758, |
11007 | | /* DCBTCT */ |
11008 | | 760, |
11009 | | /* DCBTDS */ |
11010 | | 763, |
11011 | | /* DCBTSTCT */ |
11012 | | 766, |
11013 | | /* DCBTSTDS */ |
11014 | | 769, |
11015 | | /* DCBTSTT */ |
11016 | | 772, |
11017 | | /* DCBTSTx */ |
11018 | | 774, |
11019 | | /* DCBTT */ |
11020 | | 776, |
11021 | | /* DCBTx */ |
11022 | | 778, |
11023 | | /* DFLOADf32 */ |
11024 | | 780, |
11025 | | /* DFLOADf64 */ |
11026 | | 783, |
11027 | | /* DFSTOREf32 */ |
11028 | | 786, |
11029 | | /* DFSTOREf64 */ |
11030 | | 789, |
11031 | | /* EXTLDI */ |
11032 | | 792, |
11033 | | /* EXTLDI_rec */ |
11034 | | 796, |
11035 | | /* EXTLWI */ |
11036 | | 800, |
11037 | | /* EXTLWI_rec */ |
11038 | | 804, |
11039 | | /* EXTRDI */ |
11040 | | 808, |
11041 | | /* EXTRDI_rec */ |
11042 | | 812, |
11043 | | /* EXTRWI */ |
11044 | | 816, |
11045 | | /* EXTRWI_rec */ |
11046 | | 820, |
11047 | | /* INSLWI */ |
11048 | | 824, |
11049 | | /* INSLWI_rec */ |
11050 | | 828, |
11051 | | /* INSRDI */ |
11052 | | 832, |
11053 | | /* INSRDI_rec */ |
11054 | | 836, |
11055 | | /* INSRWI */ |
11056 | | 840, |
11057 | | /* INSRWI_rec */ |
11058 | | 844, |
11059 | | /* KILL_PAIR */ |
11060 | | 848, |
11061 | | /* LAx */ |
11062 | | 850, |
11063 | | /* LIWAX */ |
11064 | | 853, |
11065 | | /* LIWZX */ |
11066 | | 856, |
11067 | | /* PSUBI */ |
11068 | | 859, |
11069 | | /* RLWIMIbm */ |
11070 | | 862, |
11071 | | /* RLWIMIbm_rec */ |
11072 | | 866, |
11073 | | /* RLWINMbm */ |
11074 | | 870, |
11075 | | /* RLWINMbm_rec */ |
11076 | | 874, |
11077 | | /* RLWNMbm */ |
11078 | | 878, |
11079 | | /* RLWNMbm_rec */ |
11080 | | 882, |
11081 | | /* ROTRDI */ |
11082 | | 886, |
11083 | | /* ROTRDI_rec */ |
11084 | | 889, |
11085 | | /* ROTRWI */ |
11086 | | 892, |
11087 | | /* ROTRWI_rec */ |
11088 | | 895, |
11089 | | /* SLDI */ |
11090 | | 898, |
11091 | | /* SLDI_rec */ |
11092 | | 901, |
11093 | | /* SLWI */ |
11094 | | 904, |
11095 | | /* SLWI_rec */ |
11096 | | 907, |
11097 | | /* SPILLTOVSR_LD */ |
11098 | | 910, |
11099 | | /* SPILLTOVSR_LDX */ |
11100 | | 913, |
11101 | | /* SPILLTOVSR_ST */ |
11102 | | 916, |
11103 | | /* SPILLTOVSR_STX */ |
11104 | | 919, |
11105 | | /* SRDI */ |
11106 | | 922, |
11107 | | /* SRDI_rec */ |
11108 | | 925, |
11109 | | /* SRWI */ |
11110 | | 928, |
11111 | | /* SRWI_rec */ |
11112 | | 931, |
11113 | | /* STIWX */ |
11114 | | 934, |
11115 | | /* SUBI */ |
11116 | | 937, |
11117 | | /* SUBIC */ |
11118 | | 940, |
11119 | | /* SUBIC_rec */ |
11120 | | 943, |
11121 | | /* SUBIS */ |
11122 | | 946, |
11123 | | /* SUBPCIS */ |
11124 | | 949, |
11125 | | /* XFLOADf32 */ |
11126 | | 951, |
11127 | | /* XFLOADf64 */ |
11128 | | 954, |
11129 | | /* XFSTOREf32 */ |
11130 | | 957, |
11131 | | /* XFSTOREf64 */ |
11132 | | 960, |
11133 | | /* ADD4 */ |
11134 | | 963, |
11135 | | /* ADD4O */ |
11136 | | 966, |
11137 | | /* ADD4O_rec */ |
11138 | | 969, |
11139 | | /* ADD4TLS */ |
11140 | | 972, |
11141 | | /* ADD4_rec */ |
11142 | | 975, |
11143 | | /* ADD8 */ |
11144 | | 978, |
11145 | | /* ADD8O */ |
11146 | | 981, |
11147 | | /* ADD8O_rec */ |
11148 | | 984, |
11149 | | /* ADD8TLS */ |
11150 | | 987, |
11151 | | /* ADD8TLS_ */ |
11152 | | 990, |
11153 | | /* ADD8_rec */ |
11154 | | 993, |
11155 | | /* ADDC */ |
11156 | | 996, |
11157 | | /* ADDC8 */ |
11158 | | 999, |
11159 | | /* ADDC8O */ |
11160 | | 1002, |
11161 | | /* ADDC8O_rec */ |
11162 | | 1005, |
11163 | | /* ADDC8_rec */ |
11164 | | 1008, |
11165 | | /* ADDCO */ |
11166 | | 1011, |
11167 | | /* ADDCO_rec */ |
11168 | | 1014, |
11169 | | /* ADDC_rec */ |
11170 | | 1017, |
11171 | | /* ADDE */ |
11172 | | 1020, |
11173 | | /* ADDE8 */ |
11174 | | 1023, |
11175 | | /* ADDE8O */ |
11176 | | 1026, |
11177 | | /* ADDE8O_rec */ |
11178 | | 1029, |
11179 | | /* ADDE8_rec */ |
11180 | | 1032, |
11181 | | /* ADDEO */ |
11182 | | 1035, |
11183 | | /* ADDEO_rec */ |
11184 | | 1038, |
11185 | | /* ADDEX */ |
11186 | | 1041, |
11187 | | /* ADDEX8 */ |
11188 | | 1045, |
11189 | | /* ADDE_rec */ |
11190 | | 1049, |
11191 | | /* ADDG6S */ |
11192 | | 1052, |
11193 | | /* ADDG6S8 */ |
11194 | | 1055, |
11195 | | /* ADDI */ |
11196 | | 1058, |
11197 | | /* ADDI8 */ |
11198 | | 1061, |
11199 | | /* ADDIC */ |
11200 | | 1064, |
11201 | | /* ADDIC8 */ |
11202 | | 1067, |
11203 | | /* ADDIC_rec */ |
11204 | | 1070, |
11205 | | /* ADDIS */ |
11206 | | 1073, |
11207 | | /* ADDIS8 */ |
11208 | | 1076, |
11209 | | /* ADDISdtprelHA */ |
11210 | | 1079, |
11211 | | /* ADDISdtprelHA32 */ |
11212 | | 1082, |
11213 | | /* ADDISgotTprelHA */ |
11214 | | 1085, |
11215 | | /* ADDIStlsgdHA */ |
11216 | | 1088, |
11217 | | /* ADDIStlsldHA */ |
11218 | | 1091, |
11219 | | /* ADDIStocHA */ |
11220 | | 1094, |
11221 | | /* ADDIStocHA8 */ |
11222 | | 1097, |
11223 | | /* ADDIdtprelL */ |
11224 | | 1100, |
11225 | | /* ADDIdtprelL32 */ |
11226 | | 1103, |
11227 | | /* ADDItlsgdL */ |
11228 | | 1106, |
11229 | | /* ADDItlsgdL32 */ |
11230 | | 1109, |
11231 | | /* ADDItlsgdLADDR */ |
11232 | | 1112, |
11233 | | /* ADDItlsgdLADDR32 */ |
11234 | | 1116, |
11235 | | /* ADDItlsldL */ |
11236 | | 1120, |
11237 | | /* ADDItlsldL32 */ |
11238 | | 1123, |
11239 | | /* ADDItlsldLADDR */ |
11240 | | 1126, |
11241 | | /* ADDItlsldLADDR32 */ |
11242 | | 1130, |
11243 | | /* ADDItoc */ |
11244 | | 1134, |
11245 | | /* ADDItoc8 */ |
11246 | | 1137, |
11247 | | /* ADDItocL */ |
11248 | | 1140, |
11249 | | /* ADDME */ |
11250 | | 1143, |
11251 | | /* ADDME8 */ |
11252 | | 1145, |
11253 | | /* ADDME8O */ |
11254 | | 1147, |
11255 | | /* ADDME8O_rec */ |
11256 | | 1149, |
11257 | | /* ADDME8_rec */ |
11258 | | 1151, |
11259 | | /* ADDMEO */ |
11260 | | 1153, |
11261 | | /* ADDMEO_rec */ |
11262 | | 1155, |
11263 | | /* ADDME_rec */ |
11264 | | 1157, |
11265 | | /* ADDPCIS */ |
11266 | | 1159, |
11267 | | /* ADDZE */ |
11268 | | 1161, |
11269 | | /* ADDZE8 */ |
11270 | | 1163, |
11271 | | /* ADDZE8O */ |
11272 | | 1165, |
11273 | | /* ADDZE8O_rec */ |
11274 | | 1167, |
11275 | | /* ADDZE8_rec */ |
11276 | | 1169, |
11277 | | /* ADDZEO */ |
11278 | | 1171, |
11279 | | /* ADDZEO_rec */ |
11280 | | 1173, |
11281 | | /* ADDZE_rec */ |
11282 | | 1175, |
11283 | | /* ADJCALLSTACKDOWN */ |
11284 | | 1177, |
11285 | | /* ADJCALLSTACKUP */ |
11286 | | 1179, |
11287 | | /* AND */ |
11288 | | 1181, |
11289 | | /* AND8 */ |
11290 | | 1184, |
11291 | | /* AND8_rec */ |
11292 | | 1187, |
11293 | | /* ANDC */ |
11294 | | 1190, |
11295 | | /* ANDC8 */ |
11296 | | 1193, |
11297 | | /* ANDC8_rec */ |
11298 | | 1196, |
11299 | | /* ANDC_rec */ |
11300 | | 1199, |
11301 | | /* ANDI8_rec */ |
11302 | | 1202, |
11303 | | /* ANDIS8_rec */ |
11304 | | 1205, |
11305 | | /* ANDIS_rec */ |
11306 | | 1208, |
11307 | | /* ANDI_rec */ |
11308 | | 1211, |
11309 | | /* ANDI_rec_1_EQ_BIT */ |
11310 | | 1214, |
11311 | | /* ANDI_rec_1_EQ_BIT8 */ |
11312 | | 1216, |
11313 | | /* ANDI_rec_1_GT_BIT */ |
11314 | | 1218, |
11315 | | /* ANDI_rec_1_GT_BIT8 */ |
11316 | | 1220, |
11317 | | /* AND_rec */ |
11318 | | 1222, |
11319 | | /* ATOMIC_CMP_SWAP_I16 */ |
11320 | | 1225, |
11321 | | /* ATOMIC_CMP_SWAP_I32 */ |
11322 | | 1230, |
11323 | | /* ATOMIC_CMP_SWAP_I64 */ |
11324 | | 1235, |
11325 | | /* ATOMIC_CMP_SWAP_I8 */ |
11326 | | 1240, |
11327 | | /* ATOMIC_LOAD_ADD_I16 */ |
11328 | | 1245, |
11329 | | /* ATOMIC_LOAD_ADD_I32 */ |
11330 | | 1249, |
11331 | | /* ATOMIC_LOAD_ADD_I64 */ |
11332 | | 1253, |
11333 | | /* ATOMIC_LOAD_ADD_I8 */ |
11334 | | 1257, |
11335 | | /* ATOMIC_LOAD_AND_I16 */ |
11336 | | 1261, |
11337 | | /* ATOMIC_LOAD_AND_I32 */ |
11338 | | 1265, |
11339 | | /* ATOMIC_LOAD_AND_I64 */ |
11340 | | 1269, |
11341 | | /* ATOMIC_LOAD_AND_I8 */ |
11342 | | 1273, |
11343 | | /* ATOMIC_LOAD_MAX_I16 */ |
11344 | | 1277, |
11345 | | /* ATOMIC_LOAD_MAX_I32 */ |
11346 | | 1281, |
11347 | | /* ATOMIC_LOAD_MAX_I64 */ |
11348 | | 1285, |
11349 | | /* ATOMIC_LOAD_MAX_I8 */ |
11350 | | 1289, |
11351 | | /* ATOMIC_LOAD_MIN_I16 */ |
11352 | | 1293, |
11353 | | /* ATOMIC_LOAD_MIN_I32 */ |
11354 | | 1297, |
11355 | | /* ATOMIC_LOAD_MIN_I64 */ |
11356 | | 1301, |
11357 | | /* ATOMIC_LOAD_MIN_I8 */ |
11358 | | 1305, |
11359 | | /* ATOMIC_LOAD_NAND_I16 */ |
11360 | | 1309, |
11361 | | /* ATOMIC_LOAD_NAND_I32 */ |
11362 | | 1313, |
11363 | | /* ATOMIC_LOAD_NAND_I64 */ |
11364 | | 1317, |
11365 | | /* ATOMIC_LOAD_NAND_I8 */ |
11366 | | 1321, |
11367 | | /* ATOMIC_LOAD_OR_I16 */ |
11368 | | 1325, |
11369 | | /* ATOMIC_LOAD_OR_I32 */ |
11370 | | 1329, |
11371 | | /* ATOMIC_LOAD_OR_I64 */ |
11372 | | 1333, |
11373 | | /* ATOMIC_LOAD_OR_I8 */ |
11374 | | 1337, |
11375 | | /* ATOMIC_LOAD_SUB_I16 */ |
11376 | | 1341, |
11377 | | /* ATOMIC_LOAD_SUB_I32 */ |
11378 | | 1345, |
11379 | | /* ATOMIC_LOAD_SUB_I64 */ |
11380 | | 1349, |
11381 | | /* ATOMIC_LOAD_SUB_I8 */ |
11382 | | 1353, |
11383 | | /* ATOMIC_LOAD_UMAX_I16 */ |
11384 | | 1357, |
11385 | | /* ATOMIC_LOAD_UMAX_I32 */ |
11386 | | 1361, |
11387 | | /* ATOMIC_LOAD_UMAX_I64 */ |
11388 | | 1365, |
11389 | | /* ATOMIC_LOAD_UMAX_I8 */ |
11390 | | 1369, |
11391 | | /* ATOMIC_LOAD_UMIN_I16 */ |
11392 | | 1373, |
11393 | | /* ATOMIC_LOAD_UMIN_I32 */ |
11394 | | 1377, |
11395 | | /* ATOMIC_LOAD_UMIN_I64 */ |
11396 | | 1381, |
11397 | | /* ATOMIC_LOAD_UMIN_I8 */ |
11398 | | 1385, |
11399 | | /* ATOMIC_LOAD_XOR_I16 */ |
11400 | | 1389, |
11401 | | /* ATOMIC_LOAD_XOR_I32 */ |
11402 | | 1393, |
11403 | | /* ATOMIC_LOAD_XOR_I64 */ |
11404 | | 1397, |
11405 | | /* ATOMIC_LOAD_XOR_I8 */ |
11406 | | 1401, |
11407 | | /* ATOMIC_SWAP_I16 */ |
11408 | | 1405, |
11409 | | /* ATOMIC_SWAP_I32 */ |
11410 | | 1409, |
11411 | | /* ATOMIC_SWAP_I64 */ |
11412 | | 1413, |
11413 | | /* ATOMIC_SWAP_I8 */ |
11414 | | 1417, |
11415 | | /* ATTN */ |
11416 | | 1421, |
11417 | | /* B */ |
11418 | | 1421, |
11419 | | /* BA */ |
11420 | | 1422, |
11421 | | /* BC */ |
11422 | | 1423, |
11423 | | /* BCC */ |
11424 | | 1425, |
11425 | | /* BCCA */ |
11426 | | 1428, |
11427 | | /* BCCCTR */ |
11428 | | 1431, |
11429 | | /* BCCCTR8 */ |
11430 | | 1433, |
11431 | | /* BCCCTRL */ |
11432 | | 1435, |
11433 | | /* BCCCTRL8 */ |
11434 | | 1437, |
11435 | | /* BCCL */ |
11436 | | 1439, |
11437 | | /* BCCLA */ |
11438 | | 1442, |
11439 | | /* BCCLR */ |
11440 | | 1445, |
11441 | | /* BCCLRL */ |
11442 | | 1447, |
11443 | | /* BCCTR */ |
11444 | | 1449, |
11445 | | /* BCCTR8 */ |
11446 | | 1450, |
11447 | | /* BCCTR8n */ |
11448 | | 1451, |
11449 | | /* BCCTRL */ |
11450 | | 1452, |
11451 | | /* BCCTRL8 */ |
11452 | | 1453, |
11453 | | /* BCCTRL8n */ |
11454 | | 1454, |
11455 | | /* BCCTRLn */ |
11456 | | 1455, |
11457 | | /* BCCTRn */ |
11458 | | 1456, |
11459 | | /* BCDADD_rec */ |
11460 | | 1457, |
11461 | | /* BCDCFN_rec */ |
11462 | | 1461, |
11463 | | /* BCDCFSQ_rec */ |
11464 | | 1464, |
11465 | | /* BCDCFZ_rec */ |
11466 | | 1467, |
11467 | | /* BCDCPSGN_rec */ |
11468 | | 1470, |
11469 | | /* BCDCTN_rec */ |
11470 | | 1473, |
11471 | | /* BCDCTSQ_rec */ |
11472 | | 1475, |
11473 | | /* BCDCTZ_rec */ |
11474 | | 1477, |
11475 | | /* BCDSETSGN_rec */ |
11476 | | 1480, |
11477 | | /* BCDSR_rec */ |
11478 | | 1483, |
11479 | | /* BCDSUB_rec */ |
11480 | | 1487, |
11481 | | /* BCDS_rec */ |
11482 | | 1491, |
11483 | | /* BCDTRUNC_rec */ |
11484 | | 1495, |
11485 | | /* BCDUS_rec */ |
11486 | | 1499, |
11487 | | /* BCDUTRUNC_rec */ |
11488 | | 1502, |
11489 | | /* BCL */ |
11490 | | 1505, |
11491 | | /* BCLR */ |
11492 | | 1507, |
11493 | | /* BCLRL */ |
11494 | | 1508, |
11495 | | /* BCLRLn */ |
11496 | | 1509, |
11497 | | /* BCLRn */ |
11498 | | 1510, |
11499 | | /* BCLalways */ |
11500 | | 1511, |
11501 | | /* BCLn */ |
11502 | | 1512, |
11503 | | /* BCTR */ |
11504 | | 1514, |
11505 | | /* BCTR8 */ |
11506 | | 1514, |
11507 | | /* BCTRL */ |
11508 | | 1514, |
11509 | | /* BCTRL8 */ |
11510 | | 1514, |
11511 | | /* BCTRL8_LDinto_toc */ |
11512 | | 1514, |
11513 | | /* BCTRL8_LDinto_toc_RM */ |
11514 | | 1516, |
11515 | | /* BCTRL8_RM */ |
11516 | | 1518, |
11517 | | /* BCTRL_LWZinto_toc */ |
11518 | | 1518, |
11519 | | /* BCTRL_LWZinto_toc_RM */ |
11520 | | 1520, |
11521 | | /* BCTRL_RM */ |
11522 | | 1522, |
11523 | | /* BCn */ |
11524 | | 1522, |
11525 | | /* BDNZ */ |
11526 | | 1524, |
11527 | | /* BDNZ8 */ |
11528 | | 1525, |
11529 | | /* BDNZA */ |
11530 | | 1526, |
11531 | | /* BDNZAm */ |
11532 | | 1527, |
11533 | | /* BDNZAp */ |
11534 | | 1528, |
11535 | | /* BDNZL */ |
11536 | | 1529, |
11537 | | /* BDNZLA */ |
11538 | | 1530, |
11539 | | /* BDNZLAm */ |
11540 | | 1531, |
11541 | | /* BDNZLAp */ |
11542 | | 1532, |
11543 | | /* BDNZLR */ |
11544 | | 1533, |
11545 | | /* BDNZLR8 */ |
11546 | | 1533, |
11547 | | /* BDNZLRL */ |
11548 | | 1533, |
11549 | | /* BDNZLRLm */ |
11550 | | 1533, |
11551 | | /* BDNZLRLp */ |
11552 | | 1533, |
11553 | | /* BDNZLRm */ |
11554 | | 1533, |
11555 | | /* BDNZLRp */ |
11556 | | 1533, |
11557 | | /* BDNZLm */ |
11558 | | 1533, |
11559 | | /* BDNZLp */ |
11560 | | 1534, |
11561 | | /* BDNZm */ |
11562 | | 1535, |
11563 | | /* BDNZp */ |
11564 | | 1536, |
11565 | | /* BDZ */ |
11566 | | 1537, |
11567 | | /* BDZ8 */ |
11568 | | 1538, |
11569 | | /* BDZA */ |
11570 | | 1539, |
11571 | | /* BDZAm */ |
11572 | | 1540, |
11573 | | /* BDZAp */ |
11574 | | 1541, |
11575 | | /* BDZL */ |
11576 | | 1542, |
11577 | | /* BDZLA */ |
11578 | | 1543, |
11579 | | /* BDZLAm */ |
11580 | | 1544, |
11581 | | /* BDZLAp */ |
11582 | | 1545, |
11583 | | /* BDZLR */ |
11584 | | 1546, |
11585 | | /* BDZLR8 */ |
11586 | | 1546, |
11587 | | /* BDZLRL */ |
11588 | | 1546, |
11589 | | /* BDZLRLm */ |
11590 | | 1546, |
11591 | | /* BDZLRLp */ |
11592 | | 1546, |
11593 | | /* BDZLRm */ |
11594 | | 1546, |
11595 | | /* BDZLRp */ |
11596 | | 1546, |
11597 | | /* BDZLm */ |
11598 | | 1546, |
11599 | | /* BDZLp */ |
11600 | | 1547, |
11601 | | /* BDZm */ |
11602 | | 1548, |
11603 | | /* BDZp */ |
11604 | | 1549, |
11605 | | /* BL */ |
11606 | | 1550, |
11607 | | /* BL8 */ |
11608 | | 1551, |
11609 | | /* BL8_NOP */ |
11610 | | 1552, |
11611 | | /* BL8_NOP_RM */ |
11612 | | 1553, |
11613 | | /* BL8_NOP_TLS */ |
11614 | | 1554, |
11615 | | /* BL8_NOTOC */ |
11616 | | 1556, |
11617 | | /* BL8_NOTOC_RM */ |
11618 | | 1557, |
11619 | | /* BL8_NOTOC_TLS */ |
11620 | | 1558, |
11621 | | /* BL8_RM */ |
11622 | | 1560, |
11623 | | /* BL8_TLS */ |
11624 | | 1561, |
11625 | | /* BL8_TLS_ */ |
11626 | | 1563, |
11627 | | /* BLA */ |
11628 | | 1565, |
11629 | | /* BLA8 */ |
11630 | | 1566, |
11631 | | /* BLA8_NOP */ |
11632 | | 1567, |
11633 | | /* BLA8_NOP_RM */ |
11634 | | 1568, |
11635 | | /* BLA8_RM */ |
11636 | | 1569, |
11637 | | /* BLA_RM */ |
11638 | | 1570, |
11639 | | /* BLR */ |
11640 | | 1571, |
11641 | | /* BLR8 */ |
11642 | | 1571, |
11643 | | /* BLRL */ |
11644 | | 1571, |
11645 | | /* BL_NOP */ |
11646 | | 1571, |
11647 | | /* BL_NOP_RM */ |
11648 | | 1572, |
11649 | | /* BL_RM */ |
11650 | | 1573, |
11651 | | /* BL_TLS */ |
11652 | | 1574, |
11653 | | /* BPERMD */ |
11654 | | 1576, |
11655 | | /* BRD */ |
11656 | | 1579, |
11657 | | /* BRH */ |
11658 | | 1581, |
11659 | | /* BRH8 */ |
11660 | | 1583, |
11661 | | /* BRINC */ |
11662 | | 1585, |
11663 | | /* BRW */ |
11664 | | 1588, |
11665 | | /* BRW8 */ |
11666 | | 1590, |
11667 | | /* CBCDTD */ |
11668 | | 1592, |
11669 | | /* CBCDTD8 */ |
11670 | | 1594, |
11671 | | /* CDTBCD */ |
11672 | | 1596, |
11673 | | /* CDTBCD8 */ |
11674 | | 1598, |
11675 | | /* CFUGED */ |
11676 | | 1600, |
11677 | | /* CLRBHRB */ |
11678 | | 1603, |
11679 | | /* CMPB */ |
11680 | | 1603, |
11681 | | /* CMPB8 */ |
11682 | | 1606, |
11683 | | /* CMPD */ |
11684 | | 1609, |
11685 | | /* CMPDI */ |
11686 | | 1612, |
11687 | | /* CMPEQB */ |
11688 | | 1615, |
11689 | | /* CMPLD */ |
11690 | | 1618, |
11691 | | /* CMPLDI */ |
11692 | | 1621, |
11693 | | /* CMPLW */ |
11694 | | 1624, |
11695 | | /* CMPLWI */ |
11696 | | 1627, |
11697 | | /* CMPRB */ |
11698 | | 1630, |
11699 | | /* CMPRB8 */ |
11700 | | 1634, |
11701 | | /* CMPW */ |
11702 | | 1638, |
11703 | | /* CMPWI */ |
11704 | | 1641, |
11705 | | /* CNTLZD */ |
11706 | | 1644, |
11707 | | /* CNTLZDM */ |
11708 | | 1646, |
11709 | | /* CNTLZD_rec */ |
11710 | | 1649, |
11711 | | /* CNTLZW */ |
11712 | | 1651, |
11713 | | /* CNTLZW8 */ |
11714 | | 1653, |
11715 | | /* CNTLZW8_rec */ |
11716 | | 1655, |
11717 | | /* CNTLZW_rec */ |
11718 | | 1657, |
11719 | | /* CNTTZD */ |
11720 | | 1659, |
11721 | | /* CNTTZDM */ |
11722 | | 1661, |
11723 | | /* CNTTZD_rec */ |
11724 | | 1664, |
11725 | | /* CNTTZW */ |
11726 | | 1666, |
11727 | | /* CNTTZW8 */ |
11728 | | 1668, |
11729 | | /* CNTTZW8_rec */ |
11730 | | 1670, |
11731 | | /* CNTTZW_rec */ |
11732 | | 1672, |
11733 | | /* CP_ABORT */ |
11734 | | 1674, |
11735 | | /* CP_COPY */ |
11736 | | 1674, |
11737 | | /* CP_COPY8 */ |
11738 | | 1677, |
11739 | | /* CP_PASTE8_rec */ |
11740 | | 1680, |
11741 | | /* CP_PASTE_rec */ |
11742 | | 1683, |
11743 | | /* CR6SET */ |
11744 | | 1686, |
11745 | | /* CR6UNSET */ |
11746 | | 1686, |
11747 | | /* CRAND */ |
11748 | | 1686, |
11749 | | /* CRANDC */ |
11750 | | 1689, |
11751 | | /* CREQV */ |
11752 | | 1692, |
11753 | | /* CRNAND */ |
11754 | | 1695, |
11755 | | /* CRNOR */ |
11756 | | 1698, |
11757 | | /* CRNOT */ |
11758 | | 1701, |
11759 | | /* CROR */ |
11760 | | 1703, |
11761 | | /* CRORC */ |
11762 | | 1706, |
11763 | | /* CRSET */ |
11764 | | 1709, |
11765 | | /* CRUNSET */ |
11766 | | 1710, |
11767 | | /* CRXOR */ |
11768 | | 1711, |
11769 | | /* CTRL_DEP */ |
11770 | | 1714, |
11771 | | /* DADD */ |
11772 | | 1717, |
11773 | | /* DADDQ */ |
11774 | | 1720, |
11775 | | /* DADDQ_rec */ |
11776 | | 1723, |
11777 | | /* DADD_rec */ |
11778 | | 1726, |
11779 | | /* DARN */ |
11780 | | 1729, |
11781 | | /* DCBA */ |
11782 | | 1731, |
11783 | | /* DCBF */ |
11784 | | 1733, |
11785 | | /* DCBFEP */ |
11786 | | 1736, |
11787 | | /* DCBI */ |
11788 | | 1738, |
11789 | | /* DCBST */ |
11790 | | 1740, |
11791 | | /* DCBSTEP */ |
11792 | | 1742, |
11793 | | /* DCBT */ |
11794 | | 1744, |
11795 | | /* DCBTEP */ |
11796 | | 1747, |
11797 | | /* DCBTST */ |
11798 | | 1750, |
11799 | | /* DCBTSTEP */ |
11800 | | 1753, |
11801 | | /* DCBZ */ |
11802 | | 1756, |
11803 | | /* DCBZEP */ |
11804 | | 1758, |
11805 | | /* DCBZL */ |
11806 | | 1760, |
11807 | | /* DCBZLEP */ |
11808 | | 1762, |
11809 | | /* DCCCI */ |
11810 | | 1764, |
11811 | | /* DCFFIX */ |
11812 | | 1766, |
11813 | | /* DCFFIXQ */ |
11814 | | 1768, |
11815 | | /* DCFFIXQQ */ |
11816 | | 1770, |
11817 | | /* DCFFIXQ_rec */ |
11818 | | 1772, |
11819 | | /* DCFFIX_rec */ |
11820 | | 1774, |
11821 | | /* DCMPO */ |
11822 | | 1776, |
11823 | | /* DCMPOQ */ |
11824 | | 1779, |
11825 | | /* DCMPU */ |
11826 | | 1782, |
11827 | | /* DCMPUQ */ |
11828 | | 1785, |
11829 | | /* DCTDP */ |
11830 | | 1788, |
11831 | | /* DCTDP_rec */ |
11832 | | 1790, |
11833 | | /* DCTFIX */ |
11834 | | 1792, |
11835 | | /* DCTFIXQ */ |
11836 | | 1794, |
11837 | | /* DCTFIXQQ */ |
11838 | | 1796, |
11839 | | /* DCTFIXQ_rec */ |
11840 | | 1798, |
11841 | | /* DCTFIX_rec */ |
11842 | | 1800, |
11843 | | /* DCTQPQ */ |
11844 | | 1802, |
11845 | | /* DCTQPQ_rec */ |
11846 | | 1804, |
11847 | | /* DDEDPD */ |
11848 | | 1806, |
11849 | | /* DDEDPDQ */ |
11850 | | 1809, |
11851 | | /* DDEDPDQ_rec */ |
11852 | | 1812, |
11853 | | /* DDEDPD_rec */ |
11854 | | 1815, |
11855 | | /* DDIV */ |
11856 | | 1818, |
11857 | | /* DDIVQ */ |
11858 | | 1821, |
11859 | | /* DDIVQ_rec */ |
11860 | | 1824, |
11861 | | /* DDIV_rec */ |
11862 | | 1827, |
11863 | | /* DENBCD */ |
11864 | | 1830, |
11865 | | /* DENBCDQ */ |
11866 | | 1833, |
11867 | | /* DENBCDQ_rec */ |
11868 | | 1836, |
11869 | | /* DENBCD_rec */ |
11870 | | 1839, |
11871 | | /* DIEX */ |
11872 | | 1842, |
11873 | | /* DIEXQ */ |
11874 | | 1845, |
11875 | | /* DIEXQ_rec */ |
11876 | | 1848, |
11877 | | /* DIEX_rec */ |
11878 | | 1851, |
11879 | | /* DIVD */ |
11880 | | 1854, |
11881 | | /* DIVDE */ |
11882 | | 1857, |
11883 | | /* DIVDEO */ |
11884 | | 1860, |
11885 | | /* DIVDEO_rec */ |
11886 | | 1863, |
11887 | | /* DIVDEU */ |
11888 | | 1866, |
11889 | | /* DIVDEUO */ |
11890 | | 1869, |
11891 | | /* DIVDEUO_rec */ |
11892 | | 1872, |
11893 | | /* DIVDEU_rec */ |
11894 | | 1875, |
11895 | | /* DIVDE_rec */ |
11896 | | 1878, |
11897 | | /* DIVDO */ |
11898 | | 1881, |
11899 | | /* DIVDO_rec */ |
11900 | | 1884, |
11901 | | /* DIVDU */ |
11902 | | 1887, |
11903 | | /* DIVDUO */ |
11904 | | 1890, |
11905 | | /* DIVDUO_rec */ |
11906 | | 1893, |
11907 | | /* DIVDU_rec */ |
11908 | | 1896, |
11909 | | /* DIVD_rec */ |
11910 | | 1899, |
11911 | | /* DIVW */ |
11912 | | 1902, |
11913 | | /* DIVWE */ |
11914 | | 1905, |
11915 | | /* DIVWEO */ |
11916 | | 1908, |
11917 | | /* DIVWEO_rec */ |
11918 | | 1911, |
11919 | | /* DIVWEU */ |
11920 | | 1914, |
11921 | | /* DIVWEUO */ |
11922 | | 1917, |
11923 | | /* DIVWEUO_rec */ |
11924 | | 1920, |
11925 | | /* DIVWEU_rec */ |
11926 | | 1923, |
11927 | | /* DIVWE_rec */ |
11928 | | 1926, |
11929 | | /* DIVWO */ |
11930 | | 1929, |
11931 | | /* DIVWO_rec */ |
11932 | | 1932, |
11933 | | /* DIVWU */ |
11934 | | 1935, |
11935 | | /* DIVWUO */ |
11936 | | 1938, |
11937 | | /* DIVWUO_rec */ |
11938 | | 1941, |
11939 | | /* DIVWU_rec */ |
11940 | | 1944, |
11941 | | /* DIVW_rec */ |
11942 | | 1947, |
11943 | | /* DMMR */ |
11944 | | 1950, |
11945 | | /* DMSETDMRZ */ |
11946 | | 1952, |
11947 | | /* DMUL */ |
11948 | | 1953, |
11949 | | /* DMULQ */ |
11950 | | 1956, |
11951 | | /* DMULQ_rec */ |
11952 | | 1959, |
11953 | | /* DMUL_rec */ |
11954 | | 1962, |
11955 | | /* DMXOR */ |
11956 | | 1965, |
11957 | | /* DMXXEXTFDMR256 */ |
11958 | | 1968, |
11959 | | /* DMXXEXTFDMR512 */ |
11960 | | 1971, |
11961 | | /* DMXXEXTFDMR512_HI */ |
11962 | | 1974, |
11963 | | /* DMXXINSTFDMR256 */ |
11964 | | 1977, |
11965 | | /* DMXXINSTFDMR512 */ |
11966 | | 1980, |
11967 | | /* DMXXINSTFDMR512_HI */ |
11968 | | 1983, |
11969 | | /* DQUA */ |
11970 | | 1986, |
11971 | | /* DQUAI */ |
11972 | | 1990, |
11973 | | /* DQUAIQ */ |
11974 | | 1994, |
11975 | | /* DQUAIQ_rec */ |
11976 | | 1998, |
11977 | | /* DQUAI_rec */ |
11978 | | 2002, |
11979 | | /* DQUAQ */ |
11980 | | 2006, |
11981 | | /* DQUAQ_rec */ |
11982 | | 2010, |
11983 | | /* DQUA_rec */ |
11984 | | 2014, |
11985 | | /* DRDPQ */ |
11986 | | 2018, |
11987 | | /* DRDPQ_rec */ |
11988 | | 2020, |
11989 | | /* DRINTN */ |
11990 | | 2022, |
11991 | | /* DRINTNQ */ |
11992 | | 2026, |
11993 | | /* DRINTNQ_rec */ |
11994 | | 2030, |
11995 | | /* DRINTN_rec */ |
11996 | | 2034, |
11997 | | /* DRINTX */ |
11998 | | 2038, |
11999 | | /* DRINTXQ */ |
12000 | | 2042, |
12001 | | /* DRINTXQ_rec */ |
12002 | | 2046, |
12003 | | /* DRINTX_rec */ |
12004 | | 2050, |
12005 | | /* DRRND */ |
12006 | | 2054, |
12007 | | /* DRRNDQ */ |
12008 | | 2058, |
12009 | | /* DRRNDQ_rec */ |
12010 | | 2062, |
12011 | | /* DRRND_rec */ |
12012 | | 2066, |
12013 | | /* DRSP */ |
12014 | | 2070, |
12015 | | /* DRSP_rec */ |
12016 | | 2072, |
12017 | | /* DSCLI */ |
12018 | | 2074, |
12019 | | /* DSCLIQ */ |
12020 | | 2077, |
12021 | | /* DSCLIQ_rec */ |
12022 | | 2080, |
12023 | | /* DSCLI_rec */ |
12024 | | 2083, |
12025 | | /* DSCRI */ |
12026 | | 2086, |
12027 | | /* DSCRIQ */ |
12028 | | 2089, |
12029 | | /* DSCRIQ_rec */ |
12030 | | 2092, |
12031 | | /* DSCRI_rec */ |
12032 | | 2095, |
12033 | | /* DSS */ |
12034 | | 2098, |
12035 | | /* DSSALL */ |
12036 | | 2099, |
12037 | | /* DST */ |
12038 | | 2099, |
12039 | | /* DST64 */ |
12040 | | 2102, |
12041 | | /* DSTST */ |
12042 | | 2105, |
12043 | | /* DSTST64 */ |
12044 | | 2108, |
12045 | | /* DSTSTT */ |
12046 | | 2111, |
12047 | | /* DSTSTT64 */ |
12048 | | 2114, |
12049 | | /* DSTT */ |
12050 | | 2117, |
12051 | | /* DSTT64 */ |
12052 | | 2120, |
12053 | | /* DSUB */ |
12054 | | 2123, |
12055 | | /* DSUBQ */ |
12056 | | 2126, |
12057 | | /* DSUBQ_rec */ |
12058 | | 2129, |
12059 | | /* DSUB_rec */ |
12060 | | 2132, |
12061 | | /* DTSTDC */ |
12062 | | 2135, |
12063 | | /* DTSTDCQ */ |
12064 | | 2138, |
12065 | | /* DTSTDG */ |
12066 | | 2141, |
12067 | | /* DTSTDGQ */ |
12068 | | 2144, |
12069 | | /* DTSTEX */ |
12070 | | 2147, |
12071 | | /* DTSTEXQ */ |
12072 | | 2150, |
12073 | | /* DTSTSF */ |
12074 | | 2153, |
12075 | | /* DTSTSFI */ |
12076 | | 2156, |
12077 | | /* DTSTSFIQ */ |
12078 | | 2159, |
12079 | | /* DTSTSFQ */ |
12080 | | 2162, |
12081 | | /* DXEX */ |
12082 | | 2165, |
12083 | | /* DXEXQ */ |
12084 | | 2167, |
12085 | | /* DXEXQ_rec */ |
12086 | | 2169, |
12087 | | /* DXEX_rec */ |
12088 | | 2171, |
12089 | | /* DYNALLOC */ |
12090 | | 2173, |
12091 | | /* DYNALLOC8 */ |
12092 | | 2177, |
12093 | | /* DYNAREAOFFSET */ |
12094 | | 2181, |
12095 | | /* DYNAREAOFFSET8 */ |
12096 | | 2184, |
12097 | | /* DecreaseCTR8loop */ |
12098 | | 2187, |
12099 | | /* DecreaseCTRloop */ |
12100 | | 2189, |
12101 | | /* EFDABS */ |
12102 | | 2191, |
12103 | | /* EFDADD */ |
12104 | | 2193, |
12105 | | /* EFDCFS */ |
12106 | | 2196, |
12107 | | /* EFDCFSF */ |
12108 | | 2198, |
12109 | | /* EFDCFSI */ |
12110 | | 2200, |
12111 | | /* EFDCFSID */ |
12112 | | 2202, |
12113 | | /* EFDCFUF */ |
12114 | | 2204, |
12115 | | /* EFDCFUI */ |
12116 | | 2206, |
12117 | | /* EFDCFUID */ |
12118 | | 2208, |
12119 | | /* EFDCMPEQ */ |
12120 | | 2210, |
12121 | | /* EFDCMPGT */ |
12122 | | 2213, |
12123 | | /* EFDCMPLT */ |
12124 | | 2216, |
12125 | | /* EFDCTSF */ |
12126 | | 2219, |
12127 | | /* EFDCTSI */ |
12128 | | 2221, |
12129 | | /* EFDCTSIDZ */ |
12130 | | 2223, |
12131 | | /* EFDCTSIZ */ |
12132 | | 2225, |
12133 | | /* EFDCTUF */ |
12134 | | 2227, |
12135 | | /* EFDCTUI */ |
12136 | | 2229, |
12137 | | /* EFDCTUIDZ */ |
12138 | | 2231, |
12139 | | /* EFDCTUIZ */ |
12140 | | 2233, |
12141 | | /* EFDDIV */ |
12142 | | 2235, |
12143 | | /* EFDMUL */ |
12144 | | 2238, |
12145 | | /* EFDNABS */ |
12146 | | 2241, |
12147 | | /* EFDNEG */ |
12148 | | 2243, |
12149 | | /* EFDSUB */ |
12150 | | 2245, |
12151 | | /* EFDTSTEQ */ |
12152 | | 2248, |
12153 | | /* EFDTSTGT */ |
12154 | | 2251, |
12155 | | /* EFDTSTLT */ |
12156 | | 2254, |
12157 | | /* EFSABS */ |
12158 | | 2257, |
12159 | | /* EFSADD */ |
12160 | | 2259, |
12161 | | /* EFSCFD */ |
12162 | | 2262, |
12163 | | /* EFSCFSF */ |
12164 | | 2264, |
12165 | | /* EFSCFSI */ |
12166 | | 2266, |
12167 | | /* EFSCFUF */ |
12168 | | 2268, |
12169 | | /* EFSCFUI */ |
12170 | | 2270, |
12171 | | /* EFSCMPEQ */ |
12172 | | 2272, |
12173 | | /* EFSCMPGT */ |
12174 | | 2275, |
12175 | | /* EFSCMPLT */ |
12176 | | 2278, |
12177 | | /* EFSCTSF */ |
12178 | | 2281, |
12179 | | /* EFSCTSI */ |
12180 | | 2283, |
12181 | | /* EFSCTSIZ */ |
12182 | | 2285, |
12183 | | /* EFSCTUF */ |
12184 | | 2287, |
12185 | | /* EFSCTUI */ |
12186 | | 2289, |
12187 | | /* EFSCTUIZ */ |
12188 | | 2291, |
12189 | | /* EFSDIV */ |
12190 | | 2293, |
12191 | | /* EFSMUL */ |
12192 | | 2296, |
12193 | | /* EFSNABS */ |
12194 | | 2299, |
12195 | | /* EFSNEG */ |
12196 | | 2301, |
12197 | | /* EFSSUB */ |
12198 | | 2303, |
12199 | | /* EFSTSTEQ */ |
12200 | | 2306, |
12201 | | /* EFSTSTGT */ |
12202 | | 2309, |
12203 | | /* EFSTSTLT */ |
12204 | | 2312, |
12205 | | /* EH_SjLj_LongJmp32 */ |
12206 | | 2315, |
12207 | | /* EH_SjLj_LongJmp64 */ |
12208 | | 2316, |
12209 | | /* EH_SjLj_SetJmp32 */ |
12210 | | 2317, |
12211 | | /* EH_SjLj_SetJmp64 */ |
12212 | | 2319, |
12213 | | /* EH_SjLj_Setup */ |
12214 | | 2321, |
12215 | | /* EQV */ |
12216 | | 2322, |
12217 | | /* EQV8 */ |
12218 | | 2325, |
12219 | | /* EQV8_rec */ |
12220 | | 2328, |
12221 | | /* EQV_rec */ |
12222 | | 2331, |
12223 | | /* EVABS */ |
12224 | | 2334, |
12225 | | /* EVADDIW */ |
12226 | | 2336, |
12227 | | /* EVADDSMIAAW */ |
12228 | | 2339, |
12229 | | /* EVADDSSIAAW */ |
12230 | | 2341, |
12231 | | /* EVADDUMIAAW */ |
12232 | | 2343, |
12233 | | /* EVADDUSIAAW */ |
12234 | | 2345, |
12235 | | /* EVADDW */ |
12236 | | 2347, |
12237 | | /* EVAND */ |
12238 | | 2350, |
12239 | | /* EVANDC */ |
12240 | | 2353, |
12241 | | /* EVCMPEQ */ |
12242 | | 2356, |
12243 | | /* EVCMPGTS */ |
12244 | | 2359, |
12245 | | /* EVCMPGTU */ |
12246 | | 2362, |
12247 | | /* EVCMPLTS */ |
12248 | | 2365, |
12249 | | /* EVCMPLTU */ |
12250 | | 2368, |
12251 | | /* EVCNTLSW */ |
12252 | | 2371, |
12253 | | /* EVCNTLZW */ |
12254 | | 2373, |
12255 | | /* EVDIVWS */ |
12256 | | 2375, |
12257 | | /* EVDIVWU */ |
12258 | | 2378, |
12259 | | /* EVEQV */ |
12260 | | 2381, |
12261 | | /* EVEXTSB */ |
12262 | | 2384, |
12263 | | /* EVEXTSH */ |
12264 | | 2386, |
12265 | | /* EVFSABS */ |
12266 | | 2388, |
12267 | | /* EVFSADD */ |
12268 | | 2390, |
12269 | | /* EVFSCFSF */ |
12270 | | 2393, |
12271 | | /* EVFSCFSI */ |
12272 | | 2395, |
12273 | | /* EVFSCFUF */ |
12274 | | 2397, |
12275 | | /* EVFSCFUI */ |
12276 | | 2399, |
12277 | | /* EVFSCMPEQ */ |
12278 | | 2401, |
12279 | | /* EVFSCMPGT */ |
12280 | | 2404, |
12281 | | /* EVFSCMPLT */ |
12282 | | 2407, |
12283 | | /* EVFSCTSF */ |
12284 | | 2410, |
12285 | | /* EVFSCTSI */ |
12286 | | 2412, |
12287 | | /* EVFSCTSIZ */ |
12288 | | 2414, |
12289 | | /* EVFSCTUF */ |
12290 | | 2416, |
12291 | | /* EVFSCTUI */ |
12292 | | 2418, |
12293 | | /* EVFSCTUIZ */ |
12294 | | 2420, |
12295 | | /* EVFSDIV */ |
12296 | | 2422, |
12297 | | /* EVFSMUL */ |
12298 | | 2425, |
12299 | | /* EVFSNABS */ |
12300 | | 2428, |
12301 | | /* EVFSNEG */ |
12302 | | 2430, |
12303 | | /* EVFSSUB */ |
12304 | | 2432, |
12305 | | /* EVFSTSTEQ */ |
12306 | | 2435, |
12307 | | /* EVFSTSTGT */ |
12308 | | 2438, |
12309 | | /* EVFSTSTLT */ |
12310 | | 2441, |
12311 | | /* EVLDD */ |
12312 | | 2444, |
12313 | | /* EVLDDX */ |
12314 | | 2447, |
12315 | | /* EVLDH */ |
12316 | | 2450, |
12317 | | /* EVLDHX */ |
12318 | | 2453, |
12319 | | /* EVLDW */ |
12320 | | 2456, |
12321 | | /* EVLDWX */ |
12322 | | 2459, |
12323 | | /* EVLHHESPLAT */ |
12324 | | 2462, |
12325 | | /* EVLHHESPLATX */ |
12326 | | 2465, |
12327 | | /* EVLHHOSSPLAT */ |
12328 | | 2468, |
12329 | | /* EVLHHOSSPLATX */ |
12330 | | 2471, |
12331 | | /* EVLHHOUSPLAT */ |
12332 | | 2474, |
12333 | | /* EVLHHOUSPLATX */ |
12334 | | 2477, |
12335 | | /* EVLWHE */ |
12336 | | 2480, |
12337 | | /* EVLWHEX */ |
12338 | | 2483, |
12339 | | /* EVLWHOS */ |
12340 | | 2486, |
12341 | | /* EVLWHOSX */ |
12342 | | 2489, |
12343 | | /* EVLWHOU */ |
12344 | | 2492, |
12345 | | /* EVLWHOUX */ |
12346 | | 2495, |
12347 | | /* EVLWHSPLAT */ |
12348 | | 2498, |
12349 | | /* EVLWHSPLATX */ |
12350 | | 2501, |
12351 | | /* EVLWWSPLAT */ |
12352 | | 2504, |
12353 | | /* EVLWWSPLATX */ |
12354 | | 2507, |
12355 | | /* EVMERGEHI */ |
12356 | | 2510, |
12357 | | /* EVMERGEHILO */ |
12358 | | 2513, |
12359 | | /* EVMERGELO */ |
12360 | | 2516, |
12361 | | /* EVMERGELOHI */ |
12362 | | 2519, |
12363 | | /* EVMHEGSMFAA */ |
12364 | | 2522, |
12365 | | /* EVMHEGSMFAN */ |
12366 | | 2525, |
12367 | | /* EVMHEGSMIAA */ |
12368 | | 2528, |
12369 | | /* EVMHEGSMIAN */ |
12370 | | 2531, |
12371 | | /* EVMHEGUMIAA */ |
12372 | | 2534, |
12373 | | /* EVMHEGUMIAN */ |
12374 | | 2537, |
12375 | | /* EVMHESMF */ |
12376 | | 2540, |
12377 | | /* EVMHESMFA */ |
12378 | | 2543, |
12379 | | /* EVMHESMFAAW */ |
12380 | | 2546, |
12381 | | /* EVMHESMFANW */ |
12382 | | 2549, |
12383 | | /* EVMHESMI */ |
12384 | | 2552, |
12385 | | /* EVMHESMIA */ |
12386 | | 2555, |
12387 | | /* EVMHESMIAAW */ |
12388 | | 2558, |
12389 | | /* EVMHESMIANW */ |
12390 | | 2561, |
12391 | | /* EVMHESSF */ |
12392 | | 2564, |
12393 | | /* EVMHESSFA */ |
12394 | | 2567, |
12395 | | /* EVMHESSFAAW */ |
12396 | | 2570, |
12397 | | /* EVMHESSFANW */ |
12398 | | 2573, |
12399 | | /* EVMHESSIAAW */ |
12400 | | 2576, |
12401 | | /* EVMHESSIANW */ |
12402 | | 2579, |
12403 | | /* EVMHEUMI */ |
12404 | | 2582, |
12405 | | /* EVMHEUMIA */ |
12406 | | 2585, |
12407 | | /* EVMHEUMIAAW */ |
12408 | | 2588, |
12409 | | /* EVMHEUMIANW */ |
12410 | | 2591, |
12411 | | /* EVMHEUSIAAW */ |
12412 | | 2594, |
12413 | | /* EVMHEUSIANW */ |
12414 | | 2597, |
12415 | | /* EVMHOGSMFAA */ |
12416 | | 2600, |
12417 | | /* EVMHOGSMFAN */ |
12418 | | 2603, |
12419 | | /* EVMHOGSMIAA */ |
12420 | | 2606, |
12421 | | /* EVMHOGSMIAN */ |
12422 | | 2609, |
12423 | | /* EVMHOGUMIAA */ |
12424 | | 2612, |
12425 | | /* EVMHOGUMIAN */ |
12426 | | 2615, |
12427 | | /* EVMHOSMF */ |
12428 | | 2618, |
12429 | | /* EVMHOSMFA */ |
12430 | | 2621, |
12431 | | /* EVMHOSMFAAW */ |
12432 | | 2624, |
12433 | | /* EVMHOSMFANW */ |
12434 | | 2627, |
12435 | | /* EVMHOSMI */ |
12436 | | 2630, |
12437 | | /* EVMHOSMIA */ |
12438 | | 2633, |
12439 | | /* EVMHOSMIAAW */ |
12440 | | 2636, |
12441 | | /* EVMHOSMIANW */ |
12442 | | 2639, |
12443 | | /* EVMHOSSF */ |
12444 | | 2642, |
12445 | | /* EVMHOSSFA */ |
12446 | | 2645, |
12447 | | /* EVMHOSSFAAW */ |
12448 | | 2648, |
12449 | | /* EVMHOSSFANW */ |
12450 | | 2651, |
12451 | | /* EVMHOSSIAAW */ |
12452 | | 2654, |
12453 | | /* EVMHOSSIANW */ |
12454 | | 2657, |
12455 | | /* EVMHOUMI */ |
12456 | | 2660, |
12457 | | /* EVMHOUMIA */ |
12458 | | 2663, |
12459 | | /* EVMHOUMIAAW */ |
12460 | | 2666, |
12461 | | /* EVMHOUMIANW */ |
12462 | | 2669, |
12463 | | /* EVMHOUSIAAW */ |
12464 | | 2672, |
12465 | | /* EVMHOUSIANW */ |
12466 | | 2675, |
12467 | | /* EVMRA */ |
12468 | | 2678, |
12469 | | /* EVMWHSMF */ |
12470 | | 2680, |
12471 | | /* EVMWHSMFA */ |
12472 | | 2683, |
12473 | | /* EVMWHSMI */ |
12474 | | 2686, |
12475 | | /* EVMWHSMIA */ |
12476 | | 2689, |
12477 | | /* EVMWHSSF */ |
12478 | | 2692, |
12479 | | /* EVMWHSSFA */ |
12480 | | 2695, |
12481 | | /* EVMWHUMI */ |
12482 | | 2698, |
12483 | | /* EVMWHUMIA */ |
12484 | | 2701, |
12485 | | /* EVMWLSMIAAW */ |
12486 | | 2704, |
12487 | | /* EVMWLSMIANW */ |
12488 | | 2707, |
12489 | | /* EVMWLSSIAAW */ |
12490 | | 2710, |
12491 | | /* EVMWLSSIANW */ |
12492 | | 2713, |
12493 | | /* EVMWLUMI */ |
12494 | | 2716, |
12495 | | /* EVMWLUMIA */ |
12496 | | 2719, |
12497 | | /* EVMWLUMIAAW */ |
12498 | | 2722, |
12499 | | /* EVMWLUMIANW */ |
12500 | | 2725, |
12501 | | /* EVMWLUSIAAW */ |
12502 | | 2728, |
12503 | | /* EVMWLUSIANW */ |
12504 | | 2731, |
12505 | | /* EVMWSMF */ |
12506 | | 2734, |
12507 | | /* EVMWSMFA */ |
12508 | | 2737, |
12509 | | /* EVMWSMFAA */ |
12510 | | 2740, |
12511 | | /* EVMWSMFAN */ |
12512 | | 2743, |
12513 | | /* EVMWSMI */ |
12514 | | 2746, |
12515 | | /* EVMWSMIA */ |
12516 | | 2749, |
12517 | | /* EVMWSMIAA */ |
12518 | | 2752, |
12519 | | /* EVMWSMIAN */ |
12520 | | 2755, |
12521 | | /* EVMWSSF */ |
12522 | | 2758, |
12523 | | /* EVMWSSFA */ |
12524 | | 2761, |
12525 | | /* EVMWSSFAA */ |
12526 | | 2764, |
12527 | | /* EVMWSSFAN */ |
12528 | | 2767, |
12529 | | /* EVMWUMI */ |
12530 | | 2770, |
12531 | | /* EVMWUMIA */ |
12532 | | 2773, |
12533 | | /* EVMWUMIAA */ |
12534 | | 2776, |
12535 | | /* EVMWUMIAN */ |
12536 | | 2779, |
12537 | | /* EVNAND */ |
12538 | | 2782, |
12539 | | /* EVNEG */ |
12540 | | 2785, |
12541 | | /* EVNOR */ |
12542 | | 2787, |
12543 | | /* EVOR */ |
12544 | | 2790, |
12545 | | /* EVORC */ |
12546 | | 2793, |
12547 | | /* EVRLW */ |
12548 | | 2796, |
12549 | | /* EVRLWI */ |
12550 | | 2799, |
12551 | | /* EVRNDW */ |
12552 | | 2802, |
12553 | | /* EVSEL */ |
12554 | | 2804, |
12555 | | /* EVSLW */ |
12556 | | 2808, |
12557 | | /* EVSLWI */ |
12558 | | 2811, |
12559 | | /* EVSPLATFI */ |
12560 | | 2814, |
12561 | | /* EVSPLATI */ |
12562 | | 2816, |
12563 | | /* EVSRWIS */ |
12564 | | 2818, |
12565 | | /* EVSRWIU */ |
12566 | | 2821, |
12567 | | /* EVSRWS */ |
12568 | | 2824, |
12569 | | /* EVSRWU */ |
12570 | | 2827, |
12571 | | /* EVSTDD */ |
12572 | | 2830, |
12573 | | /* EVSTDDX */ |
12574 | | 2833, |
12575 | | /* EVSTDH */ |
12576 | | 2836, |
12577 | | /* EVSTDHX */ |
12578 | | 2839, |
12579 | | /* EVSTDW */ |
12580 | | 2842, |
12581 | | /* EVSTDWX */ |
12582 | | 2845, |
12583 | | /* EVSTWHE */ |
12584 | | 2848, |
12585 | | /* EVSTWHEX */ |
12586 | | 2851, |
12587 | | /* EVSTWHO */ |
12588 | | 2854, |
12589 | | /* EVSTWHOX */ |
12590 | | 2857, |
12591 | | /* EVSTWWE */ |
12592 | | 2860, |
12593 | | /* EVSTWWEX */ |
12594 | | 2863, |
12595 | | /* EVSTWWO */ |
12596 | | 2866, |
12597 | | /* EVSTWWOX */ |
12598 | | 2869, |
12599 | | /* EVSUBFSMIAAW */ |
12600 | | 2872, |
12601 | | /* EVSUBFSSIAAW */ |
12602 | | 2874, |
12603 | | /* EVSUBFUMIAAW */ |
12604 | | 2876, |
12605 | | /* EVSUBFUSIAAW */ |
12606 | | 2878, |
12607 | | /* EVSUBFW */ |
12608 | | 2880, |
12609 | | /* EVSUBIFW */ |
12610 | | 2883, |
12611 | | /* EVXOR */ |
12612 | | 2886, |
12613 | | /* EXTSB */ |
12614 | | 2889, |
12615 | | /* EXTSB8 */ |
12616 | | 2891, |
12617 | | /* EXTSB8_32_64 */ |
12618 | | 2893, |
12619 | | /* EXTSB8_rec */ |
12620 | | 2895, |
12621 | | /* EXTSB_rec */ |
12622 | | 2897, |
12623 | | /* EXTSH */ |
12624 | | 2899, |
12625 | | /* EXTSH8 */ |
12626 | | 2901, |
12627 | | /* EXTSH8_32_64 */ |
12628 | | 2903, |
12629 | | /* EXTSH8_rec */ |
12630 | | 2905, |
12631 | | /* EXTSH_rec */ |
12632 | | 2907, |
12633 | | /* EXTSW */ |
12634 | | 2909, |
12635 | | /* EXTSWSLI */ |
12636 | | 2911, |
12637 | | /* EXTSWSLI_32_64 */ |
12638 | | 2914, |
12639 | | /* EXTSWSLI_32_64_rec */ |
12640 | | 2917, |
12641 | | /* EXTSWSLI_rec */ |
12642 | | 2920, |
12643 | | /* EXTSW_32 */ |
12644 | | 2923, |
12645 | | /* EXTSW_32_64 */ |
12646 | | 2925, |
12647 | | /* EXTSW_32_64_rec */ |
12648 | | 2927, |
12649 | | /* EXTSW_rec */ |
12650 | | 2929, |
12651 | | /* EnforceIEIO */ |
12652 | | 2931, |
12653 | | /* FABSD */ |
12654 | | 2931, |
12655 | | /* FABSD_rec */ |
12656 | | 2933, |
12657 | | /* FABSS */ |
12658 | | 2935, |
12659 | | /* FABSS_rec */ |
12660 | | 2937, |
12661 | | /* FADD */ |
12662 | | 2939, |
12663 | | /* FADDS */ |
12664 | | 2942, |
12665 | | /* FADDS_rec */ |
12666 | | 2945, |
12667 | | /* FADD_rec */ |
12668 | | 2948, |
12669 | | /* FADDrtz */ |
12670 | | 2951, |
12671 | | /* FCFID */ |
12672 | | 2954, |
12673 | | /* FCFIDS */ |
12674 | | 2956, |
12675 | | /* FCFIDS_rec */ |
12676 | | 2958, |
12677 | | /* FCFIDU */ |
12678 | | 2960, |
12679 | | /* FCFIDUS */ |
12680 | | 2962, |
12681 | | /* FCFIDUS_rec */ |
12682 | | 2964, |
12683 | | /* FCFIDU_rec */ |
12684 | | 2966, |
12685 | | /* FCFID_rec */ |
12686 | | 2968, |
12687 | | /* FCMPOD */ |
12688 | | 2970, |
12689 | | /* FCMPOS */ |
12690 | | 2973, |
12691 | | /* FCMPUD */ |
12692 | | 2976, |
12693 | | /* FCMPUS */ |
12694 | | 2979, |
12695 | | /* FCPSGND */ |
12696 | | 2982, |
12697 | | /* FCPSGND_rec */ |
12698 | | 2985, |
12699 | | /* FCPSGNS */ |
12700 | | 2988, |
12701 | | /* FCPSGNS_rec */ |
12702 | | 2991, |
12703 | | /* FCTID */ |
12704 | | 2994, |
12705 | | /* FCTIDU */ |
12706 | | 2996, |
12707 | | /* FCTIDUZ */ |
12708 | | 2998, |
12709 | | /* FCTIDUZ_rec */ |
12710 | | 3000, |
12711 | | /* FCTIDU_rec */ |
12712 | | 3002, |
12713 | | /* FCTIDZ */ |
12714 | | 3004, |
12715 | | /* FCTIDZ_rec */ |
12716 | | 3006, |
12717 | | /* FCTID_rec */ |
12718 | | 3008, |
12719 | | /* FCTIW */ |
12720 | | 3010, |
12721 | | /* FCTIWU */ |
12722 | | 3012, |
12723 | | /* FCTIWUZ */ |
12724 | | 3014, |
12725 | | /* FCTIWUZ_rec */ |
12726 | | 3016, |
12727 | | /* FCTIWU_rec */ |
12728 | | 3018, |
12729 | | /* FCTIWZ */ |
12730 | | 3020, |
12731 | | /* FCTIWZ_rec */ |
12732 | | 3022, |
12733 | | /* FCTIW_rec */ |
12734 | | 3024, |
12735 | | /* FDIV */ |
12736 | | 3026, |
12737 | | /* FDIVS */ |
12738 | | 3029, |
12739 | | /* FDIVS_rec */ |
12740 | | 3032, |
12741 | | /* FDIV_rec */ |
12742 | | 3035, |
12743 | | /* FENCE */ |
12744 | | 3038, |
12745 | | /* FMADD */ |
12746 | | 3038, |
12747 | | /* FMADDS */ |
12748 | | 3042, |
12749 | | /* FMADDS_rec */ |
12750 | | 3046, |
12751 | | /* FMADD_rec */ |
12752 | | 3050, |
12753 | | /* FMR */ |
12754 | | 3054, |
12755 | | /* FMR_rec */ |
12756 | | 3056, |
12757 | | /* FMSUB */ |
12758 | | 3058, |
12759 | | /* FMSUBS */ |
12760 | | 3062, |
12761 | | /* FMSUBS_rec */ |
12762 | | 3066, |
12763 | | /* FMSUB_rec */ |
12764 | | 3070, |
12765 | | /* FMUL */ |
12766 | | 3074, |
12767 | | /* FMULS */ |
12768 | | 3077, |
12769 | | /* FMULS_rec */ |
12770 | | 3080, |
12771 | | /* FMUL_rec */ |
12772 | | 3083, |
12773 | | /* FNABSD */ |
12774 | | 3086, |
12775 | | /* FNABSD_rec */ |
12776 | | 3088, |
12777 | | /* FNABSS */ |
12778 | | 3090, |
12779 | | /* FNABSS_rec */ |
12780 | | 3092, |
12781 | | /* FNEGD */ |
12782 | | 3094, |
12783 | | /* FNEGD_rec */ |
12784 | | 3096, |
12785 | | /* FNEGS */ |
12786 | | 3098, |
12787 | | /* FNEGS_rec */ |
12788 | | 3100, |
12789 | | /* FNMADD */ |
12790 | | 3102, |
12791 | | /* FNMADDS */ |
12792 | | 3106, |
12793 | | /* FNMADDS_rec */ |
12794 | | 3110, |
12795 | | /* FNMADD_rec */ |
12796 | | 3114, |
12797 | | /* FNMSUB */ |
12798 | | 3118, |
12799 | | /* FNMSUBS */ |
12800 | | 3122, |
12801 | | /* FNMSUBS_rec */ |
12802 | | 3126, |
12803 | | /* FNMSUB_rec */ |
12804 | | 3130, |
12805 | | /* FRE */ |
12806 | | 3134, |
12807 | | /* FRES */ |
12808 | | 3136, |
12809 | | /* FRES_rec */ |
12810 | | 3138, |
12811 | | /* FRE_rec */ |
12812 | | 3140, |
12813 | | /* FRIMD */ |
12814 | | 3142, |
12815 | | /* FRIMD_rec */ |
12816 | | 3144, |
12817 | | /* FRIMS */ |
12818 | | 3146, |
12819 | | /* FRIMS_rec */ |
12820 | | 3148, |
12821 | | /* FRIND */ |
12822 | | 3150, |
12823 | | /* FRIND_rec */ |
12824 | | 3152, |
12825 | | /* FRINS */ |
12826 | | 3154, |
12827 | | /* FRINS_rec */ |
12828 | | 3156, |
12829 | | /* FRIPD */ |
12830 | | 3158, |
12831 | | /* FRIPD_rec */ |
12832 | | 3160, |
12833 | | /* FRIPS */ |
12834 | | 3162, |
12835 | | /* FRIPS_rec */ |
12836 | | 3164, |
12837 | | /* FRIZD */ |
12838 | | 3166, |
12839 | | /* FRIZD_rec */ |
12840 | | 3168, |
12841 | | /* FRIZS */ |
12842 | | 3170, |
12843 | | /* FRIZS_rec */ |
12844 | | 3172, |
12845 | | /* FRSP */ |
12846 | | 3174, |
12847 | | /* FRSP_rec */ |
12848 | | 3176, |
12849 | | /* FRSQRTE */ |
12850 | | 3178, |
12851 | | /* FRSQRTES */ |
12852 | | 3180, |
12853 | | /* FRSQRTES_rec */ |
12854 | | 3182, |
12855 | | /* FRSQRTE_rec */ |
12856 | | 3184, |
12857 | | /* FSELD */ |
12858 | | 3186, |
12859 | | /* FSELD_rec */ |
12860 | | 3190, |
12861 | | /* FSELS */ |
12862 | | 3194, |
12863 | | /* FSELS_rec */ |
12864 | | 3198, |
12865 | | /* FSQRT */ |
12866 | | 3202, |
12867 | | /* FSQRTS */ |
12868 | | 3204, |
12869 | | /* FSQRTS_rec */ |
12870 | | 3206, |
12871 | | /* FSQRT_rec */ |
12872 | | 3208, |
12873 | | /* FSUB */ |
12874 | | 3210, |
12875 | | /* FSUBS */ |
12876 | | 3213, |
12877 | | /* FSUBS_rec */ |
12878 | | 3216, |
12879 | | /* FSUB_rec */ |
12880 | | 3219, |
12881 | | /* FTDIV */ |
12882 | | 3222, |
12883 | | /* FTSQRT */ |
12884 | | 3225, |
12885 | | /* GETtlsADDR */ |
12886 | | 3227, |
12887 | | /* GETtlsADDR32 */ |
12888 | | 3230, |
12889 | | /* GETtlsADDR32AIX */ |
12890 | | 3233, |
12891 | | /* GETtlsADDR64AIX */ |
12892 | | 3236, |
12893 | | /* GETtlsADDRPCREL */ |
12894 | | 3239, |
12895 | | /* GETtlsTpointer32AIX */ |
12896 | | 3242, |
12897 | | /* GETtlsldADDR */ |
12898 | | 3243, |
12899 | | /* GETtlsldADDR32 */ |
12900 | | 3246, |
12901 | | /* GETtlsldADDRPCREL */ |
12902 | | 3249, |
12903 | | /* HASHCHK */ |
12904 | | 3252, |
12905 | | /* HASHCHK8 */ |
12906 | | 3255, |
12907 | | /* HASHCHKP */ |
12908 | | 3258, |
12909 | | /* HASHCHKP8 */ |
12910 | | 3261, |
12911 | | /* HASHST */ |
12912 | | 3264, |
12913 | | /* HASHST8 */ |
12914 | | 3267, |
12915 | | /* HASHSTP */ |
12916 | | 3270, |
12917 | | /* HASHSTP8 */ |
12918 | | 3273, |
12919 | | /* HRFID */ |
12920 | | 3276, |
12921 | | /* ICBI */ |
12922 | | 3276, |
12923 | | /* ICBIEP */ |
12924 | | 3278, |
12925 | | /* ICBLC */ |
12926 | | 3280, |
12927 | | /* ICBLQ */ |
12928 | | 3283, |
12929 | | /* ICBT */ |
12930 | | 3286, |
12931 | | /* ICBTLS */ |
12932 | | 3289, |
12933 | | /* ICCCI */ |
12934 | | 3292, |
12935 | | /* ISEL */ |
12936 | | 3294, |
12937 | | /* ISEL8 */ |
12938 | | 3298, |
12939 | | /* ISYNC */ |
12940 | | 3302, |
12941 | | /* LA */ |
12942 | | 3302, |
12943 | | /* LA8 */ |
12944 | | 3305, |
12945 | | /* LBARX */ |
12946 | | 3308, |
12947 | | /* LBARXL */ |
12948 | | 3311, |
12949 | | /* LBEPX */ |
12950 | | 3314, |
12951 | | /* LBZ */ |
12952 | | 3317, |
12953 | | /* LBZ8 */ |
12954 | | 3320, |
12955 | | /* LBZCIX */ |
12956 | | 3323, |
12957 | | /* LBZU */ |
12958 | | 3326, |
12959 | | /* LBZU8 */ |
12960 | | 3330, |
12961 | | /* LBZUX */ |
12962 | | 3334, |
12963 | | /* LBZUX8 */ |
12964 | | 3338, |
12965 | | /* LBZX */ |
12966 | | 3342, |
12967 | | /* LBZX8 */ |
12968 | | 3345, |
12969 | | /* LBZXTLS */ |
12970 | | 3348, |
12971 | | /* LBZXTLS_ */ |
12972 | | 3351, |
12973 | | /* LBZXTLS_32 */ |
12974 | | 3354, |
12975 | | /* LD */ |
12976 | | 3357, |
12977 | | /* LDARX */ |
12978 | | 3360, |
12979 | | /* LDARXL */ |
12980 | | 3363, |
12981 | | /* LDAT */ |
12982 | | 3366, |
12983 | | /* LDBRX */ |
12984 | | 3369, |
12985 | | /* LDCIX */ |
12986 | | 3372, |
12987 | | /* LDU */ |
12988 | | 3375, |
12989 | | /* LDUX */ |
12990 | | 3379, |
12991 | | /* LDX */ |
12992 | | 3383, |
12993 | | /* LDXTLS */ |
12994 | | 3386, |
12995 | | /* LDXTLS_ */ |
12996 | | 3389, |
12997 | | /* LDgotTprelL */ |
12998 | | 3392, |
12999 | | /* LDgotTprelL32 */ |
13000 | | 3395, |
13001 | | /* LDtoc */ |
13002 | | 3398, |
13003 | | /* LDtocBA */ |
13004 | | 3401, |
13005 | | /* LDtocCPT */ |
13006 | | 3404, |
13007 | | /* LDtocJTI */ |
13008 | | 3407, |
13009 | | /* LDtocL */ |
13010 | | 3410, |
13011 | | /* LFD */ |
13012 | | 3413, |
13013 | | /* LFDEPX */ |
13014 | | 3416, |
13015 | | /* LFDU */ |
13016 | | 3419, |
13017 | | /* LFDUX */ |
13018 | | 3423, |
13019 | | /* LFDX */ |
13020 | | 3427, |
13021 | | /* LFDXTLS */ |
13022 | | 3430, |
13023 | | /* LFDXTLS_ */ |
13024 | | 3433, |
13025 | | /* LFIWAX */ |
13026 | | 3436, |
13027 | | /* LFIWZX */ |
13028 | | 3439, |
13029 | | /* LFS */ |
13030 | | 3442, |
13031 | | /* LFSU */ |
13032 | | 3445, |
13033 | | /* LFSUX */ |
13034 | | 3449, |
13035 | | /* LFSX */ |
13036 | | 3453, |
13037 | | /* LFSXTLS */ |
13038 | | 3456, |
13039 | | /* LFSXTLS_ */ |
13040 | | 3459, |
13041 | | /* LHA */ |
13042 | | 3462, |
13043 | | /* LHA8 */ |
13044 | | 3465, |
13045 | | /* LHARX */ |
13046 | | 3468, |
13047 | | /* LHARXL */ |
13048 | | 3471, |
13049 | | /* LHAU */ |
13050 | | 3474, |
13051 | | /* LHAU8 */ |
13052 | | 3478, |
13053 | | /* LHAUX */ |
13054 | | 3482, |
13055 | | /* LHAUX8 */ |
13056 | | 3486, |
13057 | | /* LHAX */ |
13058 | | 3490, |
13059 | | /* LHAX8 */ |
13060 | | 3493, |
13061 | | /* LHAXTLS */ |
13062 | | 3496, |
13063 | | /* LHAXTLS_ */ |
13064 | | 3499, |
13065 | | /* LHAXTLS_32 */ |
13066 | | 3502, |
13067 | | /* LHBRX */ |
13068 | | 3505, |
13069 | | /* LHBRX8 */ |
13070 | | 3508, |
13071 | | /* LHEPX */ |
13072 | | 3511, |
13073 | | /* LHZ */ |
13074 | | 3514, |
13075 | | /* LHZ8 */ |
13076 | | 3517, |
13077 | | /* LHZCIX */ |
13078 | | 3520, |
13079 | | /* LHZU */ |
13080 | | 3523, |
13081 | | /* LHZU8 */ |
13082 | | 3527, |
13083 | | /* LHZUX */ |
13084 | | 3531, |
13085 | | /* LHZUX8 */ |
13086 | | 3535, |
13087 | | /* LHZX */ |
13088 | | 3539, |
13089 | | /* LHZX8 */ |
13090 | | 3542, |
13091 | | /* LHZXTLS */ |
13092 | | 3545, |
13093 | | /* LHZXTLS_ */ |
13094 | | 3548, |
13095 | | /* LHZXTLS_32 */ |
13096 | | 3551, |
13097 | | /* LI */ |
13098 | | 3554, |
13099 | | /* LI8 */ |
13100 | | 3556, |
13101 | | /* LIS */ |
13102 | | 3558, |
13103 | | /* LIS8 */ |
13104 | | 3560, |
13105 | | /* LMW */ |
13106 | | 3562, |
13107 | | /* LQ */ |
13108 | | 3565, |
13109 | | /* LQARX */ |
13110 | | 3568, |
13111 | | /* LQARXL */ |
13112 | | 3571, |
13113 | | /* LQX_PSEUDO */ |
13114 | | 3574, |
13115 | | /* LSWI */ |
13116 | | 3577, |
13117 | | /* LVEBX */ |
13118 | | 3580, |
13119 | | /* LVEHX */ |
13120 | | 3583, |
13121 | | /* LVEWX */ |
13122 | | 3586, |
13123 | | /* LVSL */ |
13124 | | 3589, |
13125 | | /* LVSR */ |
13126 | | 3592, |
13127 | | /* LVX */ |
13128 | | 3595, |
13129 | | /* LVXL */ |
13130 | | 3598, |
13131 | | /* LWA */ |
13132 | | 3601, |
13133 | | /* LWARX */ |
13134 | | 3604, |
13135 | | /* LWARXL */ |
13136 | | 3607, |
13137 | | /* LWAT */ |
13138 | | 3610, |
13139 | | /* LWAUX */ |
13140 | | 3613, |
13141 | | /* LWAX */ |
13142 | | 3617, |
13143 | | /* LWAXTLS */ |
13144 | | 3620, |
13145 | | /* LWAXTLS_ */ |
13146 | | 3623, |
13147 | | /* LWAXTLS_32 */ |
13148 | | 3626, |
13149 | | /* LWAX_32 */ |
13150 | | 3629, |
13151 | | /* LWA_32 */ |
13152 | | 3632, |
13153 | | /* LWBRX */ |
13154 | | 3635, |
13155 | | /* LWBRX8 */ |
13156 | | 3638, |
13157 | | /* LWEPX */ |
13158 | | 3641, |
13159 | | /* LWZ */ |
13160 | | 3644, |
13161 | | /* LWZ8 */ |
13162 | | 3647, |
13163 | | /* LWZCIX */ |
13164 | | 3650, |
13165 | | /* LWZU */ |
13166 | | 3653, |
13167 | | /* LWZU8 */ |
13168 | | 3657, |
13169 | | /* LWZUX */ |
13170 | | 3661, |
13171 | | /* LWZUX8 */ |
13172 | | 3665, |
13173 | | /* LWZX */ |
13174 | | 3669, |
13175 | | /* LWZX8 */ |
13176 | | 3672, |
13177 | | /* LWZXTLS */ |
13178 | | 3675, |
13179 | | /* LWZXTLS_ */ |
13180 | | 3678, |
13181 | | /* LWZXTLS_32 */ |
13182 | | 3681, |
13183 | | /* LWZtoc */ |
13184 | | 3684, |
13185 | | /* LWZtocL */ |
13186 | | 3687, |
13187 | | /* LXSD */ |
13188 | | 3690, |
13189 | | /* LXSDX */ |
13190 | | 3693, |
13191 | | /* LXSIBZX */ |
13192 | | 3696, |
13193 | | /* LXSIHZX */ |
13194 | | 3699, |
13195 | | /* LXSIWAX */ |
13196 | | 3702, |
13197 | | /* LXSIWZX */ |
13198 | | 3705, |
13199 | | /* LXSSP */ |
13200 | | 3708, |
13201 | | /* LXSSPX */ |
13202 | | 3711, |
13203 | | /* LXV */ |
13204 | | 3714, |
13205 | | /* LXVB16X */ |
13206 | | 3717, |
13207 | | /* LXVD2X */ |
13208 | | 3720, |
13209 | | /* LXVDSX */ |
13210 | | 3723, |
13211 | | /* LXVH8X */ |
13212 | | 3726, |
13213 | | /* LXVKQ */ |
13214 | | 3729, |
13215 | | /* LXVL */ |
13216 | | 3731, |
13217 | | /* LXVLL */ |
13218 | | 3734, |
13219 | | /* LXVP */ |
13220 | | 3737, |
13221 | | /* LXVPRL */ |
13222 | | 3740, |
13223 | | /* LXVPRLL */ |
13224 | | 3743, |
13225 | | /* LXVPX */ |
13226 | | 3746, |
13227 | | /* LXVRBX */ |
13228 | | 3749, |
13229 | | /* LXVRDX */ |
13230 | | 3752, |
13231 | | /* LXVRHX */ |
13232 | | 3755, |
13233 | | /* LXVRL */ |
13234 | | 3758, |
13235 | | /* LXVRLL */ |
13236 | | 3761, |
13237 | | /* LXVRWX */ |
13238 | | 3764, |
13239 | | /* LXVW4X */ |
13240 | | 3767, |
13241 | | /* LXVWSX */ |
13242 | | 3770, |
13243 | | /* LXVX */ |
13244 | | 3773, |
13245 | | /* MADDHD */ |
13246 | | 3776, |
13247 | | /* MADDHDU */ |
13248 | | 3780, |
13249 | | /* MADDLD */ |
13250 | | 3784, |
13251 | | /* MADDLD8 */ |
13252 | | 3788, |
13253 | | /* MBAR */ |
13254 | | 3792, |
13255 | | /* MCRF */ |
13256 | | 3793, |
13257 | | /* MCRFS */ |
13258 | | 3795, |
13259 | | /* MCRXRX */ |
13260 | | 3797, |
13261 | | /* MFBHRBE */ |
13262 | | 3798, |
13263 | | /* MFCR */ |
13264 | | 3801, |
13265 | | /* MFCR8 */ |
13266 | | 3802, |
13267 | | /* MFCTR */ |
13268 | | 3803, |
13269 | | /* MFCTR8 */ |
13270 | | 3804, |
13271 | | /* MFDCR */ |
13272 | | 3805, |
13273 | | /* MFFS */ |
13274 | | 3807, |
13275 | | /* MFFSCDRN */ |
13276 | | 3808, |
13277 | | /* MFFSCDRNI */ |
13278 | | 3810, |
13279 | | /* MFFSCE */ |
13280 | | 3812, |
13281 | | /* MFFSCRN */ |
13282 | | 3813, |
13283 | | /* MFFSCRNI */ |
13284 | | 3815, |
13285 | | /* MFFSL */ |
13286 | | 3817, |
13287 | | /* MFFS_rec */ |
13288 | | 3818, |
13289 | | /* MFLR */ |
13290 | | 3819, |
13291 | | /* MFLR8 */ |
13292 | | 3820, |
13293 | | /* MFMSR */ |
13294 | | 3821, |
13295 | | /* MFOCRF */ |
13296 | | 3822, |
13297 | | /* MFOCRF8 */ |
13298 | | 3824, |
13299 | | /* MFPMR */ |
13300 | | 3826, |
13301 | | /* MFSPR */ |
13302 | | 3828, |
13303 | | /* MFSPR8 */ |
13304 | | 3830, |
13305 | | /* MFSR */ |
13306 | | 3832, |
13307 | | /* MFSRIN */ |
13308 | | 3834, |
13309 | | /* MFTB */ |
13310 | | 3836, |
13311 | | /* MFTB8 */ |
13312 | | 3838, |
13313 | | /* MFUDSCR */ |
13314 | | 3839, |
13315 | | /* MFVRD */ |
13316 | | 3840, |
13317 | | /* MFVRSAVE */ |
13318 | | 3842, |
13319 | | /* MFVRSAVEv */ |
13320 | | 3843, |
13321 | | /* MFVRWZ */ |
13322 | | 3845, |
13323 | | /* MFVSCR */ |
13324 | | 3847, |
13325 | | /* MFVSRD */ |
13326 | | 3848, |
13327 | | /* MFVSRLD */ |
13328 | | 3850, |
13329 | | /* MFVSRWZ */ |
13330 | | 3852, |
13331 | | /* MODSD */ |
13332 | | 3854, |
13333 | | /* MODSW */ |
13334 | | 3857, |
13335 | | /* MODUD */ |
13336 | | 3860, |
13337 | | /* MODUW */ |
13338 | | 3863, |
13339 | | /* MSGSYNC */ |
13340 | | 3866, |
13341 | | /* MSYNC */ |
13342 | | 3866, |
13343 | | /* MTCRF */ |
13344 | | 3866, |
13345 | | /* MTCRF8 */ |
13346 | | 3868, |
13347 | | /* MTCTR */ |
13348 | | 3870, |
13349 | | /* MTCTR8 */ |
13350 | | 3871, |
13351 | | /* MTCTR8loop */ |
13352 | | 3872, |
13353 | | /* MTCTRloop */ |
13354 | | 3873, |
13355 | | /* MTDCR */ |
13356 | | 3874, |
13357 | | /* MTFSB0 */ |
13358 | | 3876, |
13359 | | /* MTFSB1 */ |
13360 | | 3877, |
13361 | | /* MTFSF */ |
13362 | | 3878, |
13363 | | /* MTFSFI */ |
13364 | | 3882, |
13365 | | /* MTFSFI_rec */ |
13366 | | 3885, |
13367 | | /* MTFSFIb */ |
13368 | | 3888, |
13369 | | /* MTFSF_rec */ |
13370 | | 3890, |
13371 | | /* MTFSFb */ |
13372 | | 3894, |
13373 | | /* MTLR */ |
13374 | | 3896, |
13375 | | /* MTLR8 */ |
13376 | | 3897, |
13377 | | /* MTMSR */ |
13378 | | 3898, |
13379 | | /* MTMSRD */ |
13380 | | 3900, |
13381 | | /* MTOCRF */ |
13382 | | 3902, |
13383 | | /* MTOCRF8 */ |
13384 | | 3904, |
13385 | | /* MTPMR */ |
13386 | | 3906, |
13387 | | /* MTSPR */ |
13388 | | 3908, |
13389 | | /* MTSPR8 */ |
13390 | | 3910, |
13391 | | /* MTSR */ |
13392 | | 3912, |
13393 | | /* MTSRIN */ |
13394 | | 3914, |
13395 | | /* MTUDSCR */ |
13396 | | 3916, |
13397 | | /* MTVRD */ |
13398 | | 3917, |
13399 | | /* MTVRSAVE */ |
13400 | | 3919, |
13401 | | /* MTVRSAVEv */ |
13402 | | 3920, |
13403 | | /* MTVRWA */ |
13404 | | 3922, |
13405 | | /* MTVRWZ */ |
13406 | | 3924, |
13407 | | /* MTVSCR */ |
13408 | | 3926, |
13409 | | /* MTVSRBM */ |
13410 | | 3927, |
13411 | | /* MTVSRBMI */ |
13412 | | 3929, |
13413 | | /* MTVSRD */ |
13414 | | 3931, |
13415 | | /* MTVSRDD */ |
13416 | | 3933, |
13417 | | /* MTVSRDM */ |
13418 | | 3936, |
13419 | | /* MTVSRHM */ |
13420 | | 3938, |
13421 | | /* MTVSRQM */ |
13422 | | 3940, |
13423 | | /* MTVSRWA */ |
13424 | | 3942, |
13425 | | /* MTVSRWM */ |
13426 | | 3944, |
13427 | | /* MTVSRWS */ |
13428 | | 3946, |
13429 | | /* MTVSRWZ */ |
13430 | | 3948, |
13431 | | /* MULHD */ |
13432 | | 3950, |
13433 | | /* MULHDU */ |
13434 | | 3953, |
13435 | | /* MULHDU_rec */ |
13436 | | 3956, |
13437 | | /* MULHD_rec */ |
13438 | | 3959, |
13439 | | /* MULHW */ |
13440 | | 3962, |
13441 | | /* MULHWU */ |
13442 | | 3965, |
13443 | | /* MULHWU_rec */ |
13444 | | 3968, |
13445 | | /* MULHW_rec */ |
13446 | | 3971, |
13447 | | /* MULLD */ |
13448 | | 3974, |
13449 | | /* MULLDO */ |
13450 | | 3977, |
13451 | | /* MULLDO_rec */ |
13452 | | 3980, |
13453 | | /* MULLD_rec */ |
13454 | | 3983, |
13455 | | /* MULLI */ |
13456 | | 3986, |
13457 | | /* MULLI8 */ |
13458 | | 3989, |
13459 | | /* MULLW */ |
13460 | | 3992, |
13461 | | /* MULLWO */ |
13462 | | 3995, |
13463 | | /* MULLWO_rec */ |
13464 | | 3998, |
13465 | | /* MULLW_rec */ |
13466 | | 4001, |
13467 | | /* MoveGOTtoLR */ |
13468 | | 4004, |
13469 | | /* MovePCtoLR */ |
13470 | | 4004, |
13471 | | /* MovePCtoLR8 */ |
13472 | | 4004, |
13473 | | /* NAND */ |
13474 | | 4004, |
13475 | | /* NAND8 */ |
13476 | | 4007, |
13477 | | /* NAND8_rec */ |
13478 | | 4010, |
13479 | | /* NAND_rec */ |
13480 | | 4013, |
13481 | | /* NAP */ |
13482 | | 4016, |
13483 | | /* NEG */ |
13484 | | 4016, |
13485 | | /* NEG8 */ |
13486 | | 4018, |
13487 | | /* NEG8O */ |
13488 | | 4020, |
13489 | | /* NEG8O_rec */ |
13490 | | 4022, |
13491 | | /* NEG8_rec */ |
13492 | | 4024, |
13493 | | /* NEGO */ |
13494 | | 4026, |
13495 | | /* NEGO_rec */ |
13496 | | 4028, |
13497 | | /* NEG_rec */ |
13498 | | 4030, |
13499 | | /* NOP */ |
13500 | | 4032, |
13501 | | /* NOP_GT_PWR6 */ |
13502 | | 4032, |
13503 | | /* NOP_GT_PWR7 */ |
13504 | | 4032, |
13505 | | /* NOR */ |
13506 | | 4032, |
13507 | | /* NOR8 */ |
13508 | | 4035, |
13509 | | /* NOR8_rec */ |
13510 | | 4038, |
13511 | | /* NOR_rec */ |
13512 | | 4041, |
13513 | | /* OR */ |
13514 | | 4044, |
13515 | | /* OR8 */ |
13516 | | 4047, |
13517 | | /* OR8_rec */ |
13518 | | 4050, |
13519 | | /* ORC */ |
13520 | | 4053, |
13521 | | /* ORC8 */ |
13522 | | 4056, |
13523 | | /* ORC8_rec */ |
13524 | | 4059, |
13525 | | /* ORC_rec */ |
13526 | | 4062, |
13527 | | /* ORI */ |
13528 | | 4065, |
13529 | | /* ORI8 */ |
13530 | | 4068, |
13531 | | /* ORIS */ |
13532 | | 4071, |
13533 | | /* ORIS8 */ |
13534 | | 4074, |
13535 | | /* OR_rec */ |
13536 | | 4077, |
13537 | | /* PADDI */ |
13538 | | 4080, |
13539 | | /* PADDI8 */ |
13540 | | 4083, |
13541 | | /* PADDI8pc */ |
13542 | | 4086, |
13543 | | /* PADDIdtprel */ |
13544 | | 4089, |
13545 | | /* PADDIpc */ |
13546 | | 4092, |
13547 | | /* PDEPD */ |
13548 | | 4095, |
13549 | | /* PEXTD */ |
13550 | | 4098, |
13551 | | /* PLA */ |
13552 | | 4101, |
13553 | | /* PLA8 */ |
13554 | | 4104, |
13555 | | /* PLA8pc */ |
13556 | | 4107, |
13557 | | /* PLApc */ |
13558 | | 4109, |
13559 | | /* PLBZ */ |
13560 | | 4111, |
13561 | | /* PLBZ8 */ |
13562 | | 4114, |
13563 | | /* PLBZ8nopc */ |
13564 | | 4117, |
13565 | | /* PLBZ8onlypc */ |
13566 | | 4120, |
13567 | | /* PLBZ8pc */ |
13568 | | 4122, |
13569 | | /* PLBZnopc */ |
13570 | | 4125, |
13571 | | /* PLBZonlypc */ |
13572 | | 4128, |
13573 | | /* PLBZpc */ |
13574 | | 4130, |
13575 | | /* PLD */ |
13576 | | 4133, |
13577 | | /* PLDnopc */ |
13578 | | 4136, |
13579 | | /* PLDonlypc */ |
13580 | | 4139, |
13581 | | /* PLDpc */ |
13582 | | 4141, |
13583 | | /* PLFD */ |
13584 | | 4144, |
13585 | | /* PLFDnopc */ |
13586 | | 4147, |
13587 | | /* PLFDonlypc */ |
13588 | | 4150, |
13589 | | /* PLFDpc */ |
13590 | | 4152, |
13591 | | /* PLFS */ |
13592 | | 4155, |
13593 | | /* PLFSnopc */ |
13594 | | 4158, |
13595 | | /* PLFSonlypc */ |
13596 | | 4161, |
13597 | | /* PLFSpc */ |
13598 | | 4163, |
13599 | | /* PLHA */ |
13600 | | 4166, |
13601 | | /* PLHA8 */ |
13602 | | 4169, |
13603 | | /* PLHA8nopc */ |
13604 | | 4172, |
13605 | | /* PLHA8onlypc */ |
13606 | | 4175, |
13607 | | /* PLHA8pc */ |
13608 | | 4177, |
13609 | | /* PLHAnopc */ |
13610 | | 4180, |
13611 | | /* PLHAonlypc */ |
13612 | | 4183, |
13613 | | /* PLHApc */ |
13614 | | 4185, |
13615 | | /* PLHZ */ |
13616 | | 4188, |
13617 | | /* PLHZ8 */ |
13618 | | 4191, |
13619 | | /* PLHZ8nopc */ |
13620 | | 4194, |
13621 | | /* PLHZ8onlypc */ |
13622 | | 4197, |
13623 | | /* PLHZ8pc */ |
13624 | | 4199, |
13625 | | /* PLHZnopc */ |
13626 | | 4202, |
13627 | | /* PLHZonlypc */ |
13628 | | 4205, |
13629 | | /* PLHZpc */ |
13630 | | 4207, |
13631 | | /* PLI */ |
13632 | | 4210, |
13633 | | /* PLI8 */ |
13634 | | 4212, |
13635 | | /* PLWA */ |
13636 | | 4214, |
13637 | | /* PLWA8 */ |
13638 | | 4217, |
13639 | | /* PLWA8nopc */ |
13640 | | 4220, |
13641 | | /* PLWA8onlypc */ |
13642 | | 4223, |
13643 | | /* PLWA8pc */ |
13644 | | 4225, |
13645 | | /* PLWAnopc */ |
13646 | | 4228, |
13647 | | /* PLWAonlypc */ |
13648 | | 4231, |
13649 | | /* PLWApc */ |
13650 | | 4233, |
13651 | | /* PLWZ */ |
13652 | | 4236, |
13653 | | /* PLWZ8 */ |
13654 | | 4239, |
13655 | | /* PLWZ8nopc */ |
13656 | | 4242, |
13657 | | /* PLWZ8onlypc */ |
13658 | | 4245, |
13659 | | /* PLWZ8pc */ |
13660 | | 4247, |
13661 | | /* PLWZnopc */ |
13662 | | 4250, |
13663 | | /* PLWZonlypc */ |
13664 | | 4253, |
13665 | | /* PLWZpc */ |
13666 | | 4255, |
13667 | | /* PLXSD */ |
13668 | | 4258, |
13669 | | /* PLXSDnopc */ |
13670 | | 4261, |
13671 | | /* PLXSDonlypc */ |
13672 | | 4264, |
13673 | | /* PLXSDpc */ |
13674 | | 4266, |
13675 | | /* PLXSSP */ |
13676 | | 4269, |
13677 | | /* PLXSSPnopc */ |
13678 | | 4272, |
13679 | | /* PLXSSPonlypc */ |
13680 | | 4275, |
13681 | | /* PLXSSPpc */ |
13682 | | 4277, |
13683 | | /* PLXV */ |
13684 | | 4280, |
13685 | | /* PLXVP */ |
13686 | | 4283, |
13687 | | /* PLXVPnopc */ |
13688 | | 4286, |
13689 | | /* PLXVPonlypc */ |
13690 | | 4289, |
13691 | | /* PLXVPpc */ |
13692 | | 4291, |
13693 | | /* PLXVnopc */ |
13694 | | 4294, |
13695 | | /* PLXVonlypc */ |
13696 | | 4297, |
13697 | | /* PLXVpc */ |
13698 | | 4299, |
13699 | | /* PMXVBF16GER2 */ |
13700 | | 4302, |
13701 | | /* PMXVBF16GER2NN */ |
13702 | | 4308, |
13703 | | /* PMXVBF16GER2NP */ |
13704 | | 4315, |
13705 | | /* PMXVBF16GER2PN */ |
13706 | | 4322, |
13707 | | /* PMXVBF16GER2PP */ |
13708 | | 4329, |
13709 | | /* PMXVBF16GER2W */ |
13710 | | 4336, |
13711 | | /* PMXVBF16GER2WNN */ |
13712 | | 4342, |
13713 | | /* PMXVBF16GER2WNP */ |
13714 | | 4349, |
13715 | | /* PMXVBF16GER2WPN */ |
13716 | | 4356, |
13717 | | /* PMXVBF16GER2WPP */ |
13718 | | 4363, |
13719 | | /* PMXVF16GER2 */ |
13720 | | 4370, |
13721 | | /* PMXVF16GER2NN */ |
13722 | | 4376, |
13723 | | /* PMXVF16GER2NP */ |
13724 | | 4383, |
13725 | | /* PMXVF16GER2PN */ |
13726 | | 4390, |
13727 | | /* PMXVF16GER2PP */ |
13728 | | 4397, |
13729 | | /* PMXVF16GER2W */ |
13730 | | 4404, |
13731 | | /* PMXVF16GER2WNN */ |
13732 | | 4410, |
13733 | | /* PMXVF16GER2WNP */ |
13734 | | 4417, |
13735 | | /* PMXVF16GER2WPN */ |
13736 | | 4424, |
13737 | | /* PMXVF16GER2WPP */ |
13738 | | 4431, |
13739 | | /* PMXVF32GER */ |
13740 | | 4438, |
13741 | | /* PMXVF32GERNN */ |
13742 | | 4443, |
13743 | | /* PMXVF32GERNP */ |
13744 | | 4449, |
13745 | | /* PMXVF32GERPN */ |
13746 | | 4455, |
13747 | | /* PMXVF32GERPP */ |
13748 | | 4461, |
13749 | | /* PMXVF32GERW */ |
13750 | | 4467, |
13751 | | /* PMXVF32GERWNN */ |
13752 | | 4472, |
13753 | | /* PMXVF32GERWNP */ |
13754 | | 4478, |
13755 | | /* PMXVF32GERWPN */ |
13756 | | 4484, |
13757 | | /* PMXVF32GERWPP */ |
13758 | | 4490, |
13759 | | /* PMXVF64GER */ |
13760 | | 4496, |
13761 | | /* PMXVF64GERNN */ |
13762 | | 4501, |
13763 | | /* PMXVF64GERNP */ |
13764 | | 4507, |
13765 | | /* PMXVF64GERPN */ |
13766 | | 4513, |
13767 | | /* PMXVF64GERPP */ |
13768 | | 4519, |
13769 | | /* PMXVF64GERW */ |
13770 | | 4525, |
13771 | | /* PMXVF64GERWNN */ |
13772 | | 4530, |
13773 | | /* PMXVF64GERWNP */ |
13774 | | 4536, |
13775 | | /* PMXVF64GERWPN */ |
13776 | | 4542, |
13777 | | /* PMXVF64GERWPP */ |
13778 | | 4548, |
13779 | | /* PMXVI16GER2 */ |
13780 | | 4554, |
13781 | | /* PMXVI16GER2PP */ |
13782 | | 4560, |
13783 | | /* PMXVI16GER2S */ |
13784 | | 4567, |
13785 | | /* PMXVI16GER2SPP */ |
13786 | | 4573, |
13787 | | /* PMXVI16GER2SW */ |
13788 | | 4580, |
13789 | | /* PMXVI16GER2SWPP */ |
13790 | | 4586, |
13791 | | /* PMXVI16GER2W */ |
13792 | | 4593, |
13793 | | /* PMXVI16GER2WPP */ |
13794 | | 4599, |
13795 | | /* PMXVI4GER8 */ |
13796 | | 4606, |
13797 | | /* PMXVI4GER8PP */ |
13798 | | 4612, |
13799 | | /* PMXVI4GER8W */ |
13800 | | 4619, |
13801 | | /* PMXVI4GER8WPP */ |
13802 | | 4625, |
13803 | | /* PMXVI8GER4 */ |
13804 | | 4632, |
13805 | | /* PMXVI8GER4PP */ |
13806 | | 4638, |
13807 | | /* PMXVI8GER4SPP */ |
13808 | | 4645, |
13809 | | /* PMXVI8GER4W */ |
13810 | | 4652, |
13811 | | /* PMXVI8GER4WPP */ |
13812 | | 4658, |
13813 | | /* PMXVI8GER4WSPP */ |
13814 | | 4665, |
13815 | | /* POPCNTB */ |
13816 | | 4672, |
13817 | | /* POPCNTB8 */ |
13818 | | 4674, |
13819 | | /* POPCNTD */ |
13820 | | 4676, |
13821 | | /* POPCNTW */ |
13822 | | 4678, |
13823 | | /* PPC32GOT */ |
13824 | | 4680, |
13825 | | /* PPC32PICGOT */ |
13826 | | 4681, |
13827 | | /* PREPARE_PROBED_ALLOCA_32 */ |
13828 | | 4683, |
13829 | | /* PREPARE_PROBED_ALLOCA_64 */ |
13830 | | 4688, |
13831 | | /* PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_32 */ |
13832 | | 4693, |
13833 | | /* PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_64 */ |
13834 | | 4698, |
13835 | | /* PROBED_ALLOCA_32 */ |
13836 | | 4703, |
13837 | | /* PROBED_ALLOCA_64 */ |
13838 | | 4707, |
13839 | | /* PROBED_STACKALLOC_32 */ |
13840 | | 4711, |
13841 | | /* PROBED_STACKALLOC_64 */ |
13842 | | 4714, |
13843 | | /* PSTB */ |
13844 | | 4717, |
13845 | | /* PSTB8 */ |
13846 | | 4720, |
13847 | | /* PSTB8nopc */ |
13848 | | 4723, |
13849 | | /* PSTB8onlypc */ |
13850 | | 4726, |
13851 | | /* PSTB8pc */ |
13852 | | 4728, |
13853 | | /* PSTBnopc */ |
13854 | | 4731, |
13855 | | /* PSTBonlypc */ |
13856 | | 4734, |
13857 | | /* PSTBpc */ |
13858 | | 4736, |
13859 | | /* PSTD */ |
13860 | | 4739, |
13861 | | /* PSTDnopc */ |
13862 | | 4742, |
13863 | | /* PSTDonlypc */ |
13864 | | 4745, |
13865 | | /* PSTDpc */ |
13866 | | 4747, |
13867 | | /* PSTFD */ |
13868 | | 4750, |
13869 | | /* PSTFDnopc */ |
13870 | | 4753, |
13871 | | /* PSTFDonlypc */ |
13872 | | 4756, |
13873 | | /* PSTFDpc */ |
13874 | | 4758, |
13875 | | /* PSTFS */ |
13876 | | 4761, |
13877 | | /* PSTFSnopc */ |
13878 | | 4764, |
13879 | | /* PSTFSonlypc */ |
13880 | | 4767, |
13881 | | /* PSTFSpc */ |
13882 | | 4769, |
13883 | | /* PSTH */ |
13884 | | 4772, |
13885 | | /* PSTH8 */ |
13886 | | 4775, |
13887 | | /* PSTH8nopc */ |
13888 | | 4778, |
13889 | | /* PSTH8onlypc */ |
13890 | | 4781, |
13891 | | /* PSTH8pc */ |
13892 | | 4783, |
13893 | | /* PSTHnopc */ |
13894 | | 4786, |
13895 | | /* PSTHonlypc */ |
13896 | | 4789, |
13897 | | /* PSTHpc */ |
13898 | | 4791, |
13899 | | /* PSTW */ |
13900 | | 4794, |
13901 | | /* PSTW8 */ |
13902 | | 4797, |
13903 | | /* PSTW8nopc */ |
13904 | | 4800, |
13905 | | /* PSTW8onlypc */ |
13906 | | 4803, |
13907 | | /* PSTW8pc */ |
13908 | | 4805, |
13909 | | /* PSTWnopc */ |
13910 | | 4808, |
13911 | | /* PSTWonlypc */ |
13912 | | 4811, |
13913 | | /* PSTWpc */ |
13914 | | 4813, |
13915 | | /* PSTXSD */ |
13916 | | 4816, |
13917 | | /* PSTXSDnopc */ |
13918 | | 4819, |
13919 | | /* PSTXSDonlypc */ |
13920 | | 4822, |
13921 | | /* PSTXSDpc */ |
13922 | | 4824, |
13923 | | /* PSTXSSP */ |
13924 | | 4827, |
13925 | | /* PSTXSSPnopc */ |
13926 | | 4830, |
13927 | | /* PSTXSSPonlypc */ |
13928 | | 4833, |
13929 | | /* PSTXSSPpc */ |
13930 | | 4835, |
13931 | | /* PSTXV */ |
13932 | | 4838, |
13933 | | /* PSTXVP */ |
13934 | | 4841, |
13935 | | /* PSTXVPnopc */ |
13936 | | 4844, |
13937 | | /* PSTXVPonlypc */ |
13938 | | 4847, |
13939 | | /* PSTXVPpc */ |
13940 | | 4849, |
13941 | | /* PSTXVnopc */ |
13942 | | 4852, |
13943 | | /* PSTXVonlypc */ |
13944 | | 4855, |
13945 | | /* PSTXVpc */ |
13946 | | 4857, |
13947 | | /* PseudoEIEIO */ |
13948 | | 4860, |
13949 | | /* RESTORE_ACC */ |
13950 | | 4860, |
13951 | | /* RESTORE_CR */ |
13952 | | 4863, |
13953 | | /* RESTORE_CRBIT */ |
13954 | | 4866, |
13955 | | /* RESTORE_QUADWORD */ |
13956 | | 4869, |
13957 | | /* RESTORE_UACC */ |
13958 | | 4872, |
13959 | | /* RESTORE_WACC */ |
13960 | | 4875, |
13961 | | /* RFCI */ |
13962 | | 4878, |
13963 | | /* RFDI */ |
13964 | | 4878, |
13965 | | /* RFEBB */ |
13966 | | 4878, |
13967 | | /* RFI */ |
13968 | | 4879, |
13969 | | /* RFID */ |
13970 | | 4879, |
13971 | | /* RFMCI */ |
13972 | | 4879, |
13973 | | /* RLDCL */ |
13974 | | 4879, |
13975 | | /* RLDCL_rec */ |
13976 | | 4883, |
13977 | | /* RLDCR */ |
13978 | | 4887, |
13979 | | /* RLDCR_rec */ |
13980 | | 4891, |
13981 | | /* RLDIC */ |
13982 | | 4895, |
13983 | | /* RLDICL */ |
13984 | | 4899, |
13985 | | /* RLDICL_32 */ |
13986 | | 4903, |
13987 | | /* RLDICL_32_64 */ |
13988 | | 4907, |
13989 | | /* RLDICL_32_rec */ |
13990 | | 4911, |
13991 | | /* RLDICL_rec */ |
13992 | | 4915, |
13993 | | /* RLDICR */ |
13994 | | 4919, |
13995 | | /* RLDICR_32 */ |
13996 | | 4923, |
13997 | | /* RLDICR_rec */ |
13998 | | 4927, |
13999 | | /* RLDIC_rec */ |
14000 | | 4931, |
14001 | | /* RLDIMI */ |
14002 | | 4935, |
14003 | | /* RLDIMI_rec */ |
14004 | | 4940, |
14005 | | /* RLWIMI */ |
14006 | | 4945, |
14007 | | /* RLWIMI8 */ |
14008 | | 4951, |
14009 | | /* RLWIMI8_rec */ |
14010 | | 4957, |
14011 | | /* RLWIMI_rec */ |
14012 | | 4963, |
14013 | | /* RLWINM */ |
14014 | | 4969, |
14015 | | /* RLWINM8 */ |
14016 | | 4974, |
14017 | | /* RLWINM8_rec */ |
14018 | | 4979, |
14019 | | /* RLWINM_rec */ |
14020 | | 4984, |
14021 | | /* RLWNM */ |
14022 | | 4989, |
14023 | | /* RLWNM8 */ |
14024 | | 4994, |
14025 | | /* RLWNM8_rec */ |
14026 | | 4999, |
14027 | | /* RLWNM_rec */ |
14028 | | 5004, |
14029 | | /* ReadTB */ |
14030 | | 5009, |
14031 | | /* SC */ |
14032 | | 5011, |
14033 | | /* SCV */ |
14034 | | 5012, |
14035 | | /* SELECT_CC_F16 */ |
14036 | | 5013, |
14037 | | /* SELECT_CC_F4 */ |
14038 | | 5018, |
14039 | | /* SELECT_CC_F8 */ |
14040 | | 5023, |
14041 | | /* SELECT_CC_I4 */ |
14042 | | 5028, |
14043 | | /* SELECT_CC_I8 */ |
14044 | | 5033, |
14045 | | /* SELECT_CC_SPE */ |
14046 | | 5038, |
14047 | | /* SELECT_CC_SPE4 */ |
14048 | | 5043, |
14049 | | /* SELECT_CC_VRRC */ |
14050 | | 5048, |
14051 | | /* SELECT_CC_VSFRC */ |
14052 | | 5053, |
14053 | | /* SELECT_CC_VSRC */ |
14054 | | 5058, |
14055 | | /* SELECT_CC_VSSRC */ |
14056 | | 5063, |
14057 | | /* SELECT_F16 */ |
14058 | | 5068, |
14059 | | /* SELECT_F4 */ |
14060 | | 5072, |
14061 | | /* SELECT_F8 */ |
14062 | | 5076, |
14063 | | /* SELECT_I4 */ |
14064 | | 5080, |
14065 | | /* SELECT_I8 */ |
14066 | | 5084, |
14067 | | /* SELECT_SPE */ |
14068 | | 5088, |
14069 | | /* SELECT_SPE4 */ |
14070 | | 5092, |
14071 | | /* SELECT_VRRC */ |
14072 | | 5096, |
14073 | | /* SELECT_VSFRC */ |
14074 | | 5100, |
14075 | | /* SELECT_VSRC */ |
14076 | | 5104, |
14077 | | /* SELECT_VSSRC */ |
14078 | | 5108, |
14079 | | /* SETB */ |
14080 | | 5112, |
14081 | | /* SETB8 */ |
14082 | | 5114, |
14083 | | /* SETBC */ |
14084 | | 5116, |
14085 | | /* SETBC8 */ |
14086 | | 5118, |
14087 | | /* SETBCR */ |
14088 | | 5120, |
14089 | | /* SETBCR8 */ |
14090 | | 5122, |
14091 | | /* SETFLM */ |
14092 | | 5124, |
14093 | | /* SETNBC */ |
14094 | | 5126, |
14095 | | /* SETNBC8 */ |
14096 | | 5128, |
14097 | | /* SETNBCR */ |
14098 | | 5130, |
14099 | | /* SETNBCR8 */ |
14100 | | 5132, |
14101 | | /* SETRND */ |
14102 | | 5134, |
14103 | | /* SETRNDi */ |
14104 | | 5136, |
14105 | | /* SLBFEE_rec */ |
14106 | | 5138, |
14107 | | /* SLBIA */ |
14108 | | 5140, |
14109 | | /* SLBIE */ |
14110 | | 5140, |
14111 | | /* SLBIEG */ |
14112 | | 5141, |
14113 | | /* SLBMFEE */ |
14114 | | 5143, |
14115 | | /* SLBMFEV */ |
14116 | | 5145, |
14117 | | /* SLBMTE */ |
14118 | | 5147, |
14119 | | /* SLBSYNC */ |
14120 | | 5149, |
14121 | | /* SLD */ |
14122 | | 5149, |
14123 | | /* SLD_rec */ |
14124 | | 5152, |
14125 | | /* SLW */ |
14126 | | 5155, |
14127 | | /* SLW8 */ |
14128 | | 5158, |
14129 | | /* SLW8_rec */ |
14130 | | 5161, |
14131 | | /* SLW_rec */ |
14132 | | 5164, |
14133 | | /* SPELWZ */ |
14134 | | 5167, |
14135 | | /* SPELWZX */ |
14136 | | 5170, |
14137 | | /* SPESTW */ |
14138 | | 5173, |
14139 | | /* SPESTWX */ |
14140 | | 5176, |
14141 | | /* SPILL_ACC */ |
14142 | | 5179, |
14143 | | /* SPILL_CR */ |
14144 | | 5182, |
14145 | | /* SPILL_CRBIT */ |
14146 | | 5185, |
14147 | | /* SPILL_QUADWORD */ |
14148 | | 5188, |
14149 | | /* SPILL_UACC */ |
14150 | | 5191, |
14151 | | /* SPILL_WACC */ |
14152 | | 5194, |
14153 | | /* SPLIT_QUADWORD */ |
14154 | | 5197, |
14155 | | /* SRAD */ |
14156 | | 5200, |
14157 | | /* SRADI */ |
14158 | | 5203, |
14159 | | /* SRADI_32 */ |
14160 | | 5206, |
14161 | | /* SRADI_rec */ |
14162 | | 5209, |
14163 | | /* SRAD_rec */ |
14164 | | 5212, |
14165 | | /* SRAW */ |
14166 | | 5215, |
14167 | | /* SRAWI */ |
14168 | | 5218, |
14169 | | /* SRAWI_rec */ |
14170 | | 5221, |
14171 | | /* SRAW_rec */ |
14172 | | 5224, |
14173 | | /* SRD */ |
14174 | | 5227, |
14175 | | /* SRD_rec */ |
14176 | | 5230, |
14177 | | /* SRW */ |
14178 | | 5233, |
14179 | | /* SRW8 */ |
14180 | | 5236, |
14181 | | /* SRW8_rec */ |
14182 | | 5239, |
14183 | | /* SRW_rec */ |
14184 | | 5242, |
14185 | | /* STB */ |
14186 | | 5245, |
14187 | | /* STB8 */ |
14188 | | 5248, |
14189 | | /* STBCIX */ |
14190 | | 5251, |
14191 | | /* STBCX */ |
14192 | | 5254, |
14193 | | /* STBEPX */ |
14194 | | 5257, |
14195 | | /* STBU */ |
14196 | | 5260, |
14197 | | /* STBU8 */ |
14198 | | 5264, |
14199 | | /* STBUX */ |
14200 | | 5268, |
14201 | | /* STBUX8 */ |
14202 | | 5272, |
14203 | | /* STBX */ |
14204 | | 5276, |
14205 | | /* STBX8 */ |
14206 | | 5279, |
14207 | | /* STBXTLS */ |
14208 | | 5282, |
14209 | | /* STBXTLS_ */ |
14210 | | 5285, |
14211 | | /* STBXTLS_32 */ |
14212 | | 5288, |
14213 | | /* STD */ |
14214 | | 5291, |
14215 | | /* STDAT */ |
14216 | | 5294, |
14217 | | /* STDBRX */ |
14218 | | 5297, |
14219 | | /* STDCIX */ |
14220 | | 5300, |
14221 | | /* STDCX */ |
14222 | | 5303, |
14223 | | /* STDU */ |
14224 | | 5306, |
14225 | | /* STDUX */ |
14226 | | 5310, |
14227 | | /* STDX */ |
14228 | | 5314, |
14229 | | /* STDXTLS */ |
14230 | | 5317, |
14231 | | /* STDXTLS_ */ |
14232 | | 5320, |
14233 | | /* STFD */ |
14234 | | 5323, |
14235 | | /* STFDEPX */ |
14236 | | 5326, |
14237 | | /* STFDU */ |
14238 | | 5329, |
14239 | | /* STFDUX */ |
14240 | | 5333, |
14241 | | /* STFDX */ |
14242 | | 5337, |
14243 | | /* STFDXTLS */ |
14244 | | 5340, |
14245 | | /* STFDXTLS_ */ |
14246 | | 5343, |
14247 | | /* STFIWX */ |
14248 | | 5346, |
14249 | | /* STFS */ |
14250 | | 5349, |
14251 | | /* STFSU */ |
14252 | | 5352, |
14253 | | /* STFSUX */ |
14254 | | 5356, |
14255 | | /* STFSX */ |
14256 | | 5360, |
14257 | | /* STFSXTLS */ |
14258 | | 5363, |
14259 | | /* STFSXTLS_ */ |
14260 | | 5366, |
14261 | | /* STH */ |
14262 | | 5369, |
14263 | | /* STH8 */ |
14264 | | 5372, |
14265 | | /* STHBRX */ |
14266 | | 5375, |
14267 | | /* STHCIX */ |
14268 | | 5378, |
14269 | | /* STHCX */ |
14270 | | 5381, |
14271 | | /* STHEPX */ |
14272 | | 5384, |
14273 | | /* STHU */ |
14274 | | 5387, |
14275 | | /* STHU8 */ |
14276 | | 5391, |
14277 | | /* STHUX */ |
14278 | | 5395, |
14279 | | /* STHUX8 */ |
14280 | | 5399, |
14281 | | /* STHX */ |
14282 | | 5403, |
14283 | | /* STHX8 */ |
14284 | | 5406, |
14285 | | /* STHXTLS */ |
14286 | | 5409, |
14287 | | /* STHXTLS_ */ |
14288 | | 5412, |
14289 | | /* STHXTLS_32 */ |
14290 | | 5415, |
14291 | | /* STMW */ |
14292 | | 5418, |
14293 | | /* STOP */ |
14294 | | 5421, |
14295 | | /* STQ */ |
14296 | | 5421, |
14297 | | /* STQCX */ |
14298 | | 5424, |
14299 | | /* STQX_PSEUDO */ |
14300 | | 5427, |
14301 | | /* STSWI */ |
14302 | | 5430, |
14303 | | /* STVEBX */ |
14304 | | 5433, |
14305 | | /* STVEHX */ |
14306 | | 5436, |
14307 | | /* STVEWX */ |
14308 | | 5439, |
14309 | | /* STVX */ |
14310 | | 5442, |
14311 | | /* STVXL */ |
14312 | | 5445, |
14313 | | /* STW */ |
14314 | | 5448, |
14315 | | /* STW8 */ |
14316 | | 5451, |
14317 | | /* STWAT */ |
14318 | | 5454, |
14319 | | /* STWBRX */ |
14320 | | 5457, |
14321 | | /* STWCIX */ |
14322 | | 5460, |
14323 | | /* STWCX */ |
14324 | | 5463, |
14325 | | /* STWEPX */ |
14326 | | 5466, |
14327 | | /* STWU */ |
14328 | | 5469, |
14329 | | /* STWU8 */ |
14330 | | 5473, |
14331 | | /* STWUX */ |
14332 | | 5477, |
14333 | | /* STWUX8 */ |
14334 | | 5481, |
14335 | | /* STWX */ |
14336 | | 5485, |
14337 | | /* STWX8 */ |
14338 | | 5488, |
14339 | | /* STWXTLS */ |
14340 | | 5491, |
14341 | | /* STWXTLS_ */ |
14342 | | 5494, |
14343 | | /* STWXTLS_32 */ |
14344 | | 5497, |
14345 | | /* STXSD */ |
14346 | | 5500, |
14347 | | /* STXSDX */ |
14348 | | 5503, |
14349 | | /* STXSIBX */ |
14350 | | 5506, |
14351 | | /* STXSIBXv */ |
14352 | | 5509, |
14353 | | /* STXSIHX */ |
14354 | | 5512, |
14355 | | /* STXSIHXv */ |
14356 | | 5515, |
14357 | | /* STXSIWX */ |
14358 | | 5518, |
14359 | | /* STXSSP */ |
14360 | | 5521, |
14361 | | /* STXSSPX */ |
14362 | | 5524, |
14363 | | /* STXV */ |
14364 | | 5527, |
14365 | | /* STXVB16X */ |
14366 | | 5530, |
14367 | | /* STXVD2X */ |
14368 | | 5533, |
14369 | | /* STXVH8X */ |
14370 | | 5536, |
14371 | | /* STXVL */ |
14372 | | 5539, |
14373 | | /* STXVLL */ |
14374 | | 5542, |
14375 | | /* STXVP */ |
14376 | | 5545, |
14377 | | /* STXVPRL */ |
14378 | | 5548, |
14379 | | /* STXVPRLL */ |
14380 | | 5551, |
14381 | | /* STXVPX */ |
14382 | | 5554, |
14383 | | /* STXVRBX */ |
14384 | | 5557, |
14385 | | /* STXVRDX */ |
14386 | | 5560, |
14387 | | /* STXVRHX */ |
14388 | | 5563, |
14389 | | /* STXVRL */ |
14390 | | 5566, |
14391 | | /* STXVRLL */ |
14392 | | 5569, |
14393 | | /* STXVRWX */ |
14394 | | 5572, |
14395 | | /* STXVW4X */ |
14396 | | 5575, |
14397 | | /* STXVX */ |
14398 | | 5578, |
14399 | | /* SUBF */ |
14400 | | 5581, |
14401 | | /* SUBF8 */ |
14402 | | 5584, |
14403 | | /* SUBF8O */ |
14404 | | 5587, |
14405 | | /* SUBF8O_rec */ |
14406 | | 5590, |
14407 | | /* SUBF8_rec */ |
14408 | | 5593, |
14409 | | /* SUBFC */ |
14410 | | 5596, |
14411 | | /* SUBFC8 */ |
14412 | | 5599, |
14413 | | /* SUBFC8O */ |
14414 | | 5602, |
14415 | | /* SUBFC8O_rec */ |
14416 | | 5605, |
14417 | | /* SUBFC8_rec */ |
14418 | | 5608, |
14419 | | /* SUBFCO */ |
14420 | | 5611, |
14421 | | /* SUBFCO_rec */ |
14422 | | 5614, |
14423 | | /* SUBFC_rec */ |
14424 | | 5617, |
14425 | | /* SUBFE */ |
14426 | | 5620, |
14427 | | /* SUBFE8 */ |
14428 | | 5623, |
14429 | | /* SUBFE8O */ |
14430 | | 5626, |
14431 | | /* SUBFE8O_rec */ |
14432 | | 5629, |
14433 | | /* SUBFE8_rec */ |
14434 | | 5632, |
14435 | | /* SUBFEO */ |
14436 | | 5635, |
14437 | | /* SUBFEO_rec */ |
14438 | | 5638, |
14439 | | /* SUBFE_rec */ |
14440 | | 5641, |
14441 | | /* SUBFIC */ |
14442 | | 5644, |
14443 | | /* SUBFIC8 */ |
14444 | | 5647, |
14445 | | /* SUBFME */ |
14446 | | 5650, |
14447 | | /* SUBFME8 */ |
14448 | | 5652, |
14449 | | /* SUBFME8O */ |
14450 | | 5654, |
14451 | | /* SUBFME8O_rec */ |
14452 | | 5656, |
14453 | | /* SUBFME8_rec */ |
14454 | | 5658, |
14455 | | /* SUBFMEO */ |
14456 | | 5660, |
14457 | | /* SUBFMEO_rec */ |
14458 | | 5662, |
14459 | | /* SUBFME_rec */ |
14460 | | 5664, |
14461 | | /* SUBFO */ |
14462 | | 5666, |
14463 | | /* SUBFO_rec */ |
14464 | | 5669, |
14465 | | /* SUBFUS */ |
14466 | | 5672, |
14467 | | /* SUBFUS_rec */ |
14468 | | 5676, |
14469 | | /* SUBFZE */ |
14470 | | 5680, |
14471 | | /* SUBFZE8 */ |
14472 | | 5682, |
14473 | | /* SUBFZE8O */ |
14474 | | 5684, |
14475 | | /* SUBFZE8O_rec */ |
14476 | | 5686, |
14477 | | /* SUBFZE8_rec */ |
14478 | | 5688, |
14479 | | /* SUBFZEO */ |
14480 | | 5690, |
14481 | | /* SUBFZEO_rec */ |
14482 | | 5692, |
14483 | | /* SUBFZE_rec */ |
14484 | | 5694, |
14485 | | /* SUBF_rec */ |
14486 | | 5696, |
14487 | | /* SYNC */ |
14488 | | 5699, |
14489 | | /* SYNCP10 */ |
14490 | | 5700, |
14491 | | /* TABORT */ |
14492 | | 5702, |
14493 | | /* TABORTDC */ |
14494 | | 5703, |
14495 | | /* TABORTDCI */ |
14496 | | 5706, |
14497 | | /* TABORTWC */ |
14498 | | 5709, |
14499 | | /* TABORTWCI */ |
14500 | | 5712, |
14501 | | /* TAILB */ |
14502 | | 5715, |
14503 | | /* TAILB8 */ |
14504 | | 5716, |
14505 | | /* TAILBA */ |
14506 | | 5717, |
14507 | | /* TAILBA8 */ |
14508 | | 5718, |
14509 | | /* TAILBCTR */ |
14510 | | 5719, |
14511 | | /* TAILBCTR8 */ |
14512 | | 5719, |
14513 | | /* TBEGIN */ |
14514 | | 5719, |
14515 | | /* TBEGIN_RET */ |
14516 | | 5720, |
14517 | | /* TCHECK */ |
14518 | | 5722, |
14519 | | /* TCHECK_RET */ |
14520 | | 5723, |
14521 | | /* TCRETURNai */ |
14522 | | 5724, |
14523 | | /* TCRETURNai8 */ |
14524 | | 5726, |
14525 | | /* TCRETURNdi */ |
14526 | | 5728, |
14527 | | /* TCRETURNdi8 */ |
14528 | | 5730, |
14529 | | /* TCRETURNri */ |
14530 | | 5732, |
14531 | | /* TCRETURNri8 */ |
14532 | | 5734, |
14533 | | /* TD */ |
14534 | | 5736, |
14535 | | /* TDI */ |
14536 | | 5739, |
14537 | | /* TEND */ |
14538 | | 5742, |
14539 | | /* TLBIA */ |
14540 | | 5743, |
14541 | | /* TLBIE */ |
14542 | | 5743, |
14543 | | /* TLBIEL */ |
14544 | | 5745, |
14545 | | /* TLBILX */ |
14546 | | 5746, |
14547 | | /* TLBIVAX */ |
14548 | | 5749, |
14549 | | /* TLBLD */ |
14550 | | 5751, |
14551 | | /* TLBLI */ |
14552 | | 5752, |
14553 | | /* TLBRE */ |
14554 | | 5753, |
14555 | | /* TLBRE2 */ |
14556 | | 5753, |
14557 | | /* TLBSX */ |
14558 | | 5756, |
14559 | | /* TLBSX2 */ |
14560 | | 5758, |
14561 | | /* TLBSX2D */ |
14562 | | 5761, |
14563 | | /* TLBSYNC */ |
14564 | | 5764, |
14565 | | /* TLBWE */ |
14566 | | 5764, |
14567 | | /* TLBWE2 */ |
14568 | | 5764, |
14569 | | /* TLSGDAIX */ |
14570 | | 5767, |
14571 | | /* TLSGDAIX8 */ |
14572 | | 5770, |
14573 | | /* TRAP */ |
14574 | | 5773, |
14575 | | /* TRECHKPT */ |
14576 | | 5773, |
14577 | | /* TRECLAIM */ |
14578 | | 5773, |
14579 | | /* TSR */ |
14580 | | 5774, |
14581 | | /* TW */ |
14582 | | 5775, |
14583 | | /* TWI */ |
14584 | | 5778, |
14585 | | /* UNENCODED_NOP */ |
14586 | | 5781, |
14587 | | /* UpdateGBR */ |
14588 | | 5781, |
14589 | | /* VABSDUB */ |
14590 | | 5784, |
14591 | | /* VABSDUH */ |
14592 | | 5787, |
14593 | | /* VABSDUW */ |
14594 | | 5790, |
14595 | | /* VADDCUQ */ |
14596 | | 5793, |
14597 | | /* VADDCUW */ |
14598 | | 5796, |
14599 | | /* VADDECUQ */ |
14600 | | 5799, |
14601 | | /* VADDEUQM */ |
14602 | | 5803, |
14603 | | /* VADDFP */ |
14604 | | 5807, |
14605 | | /* VADDSBS */ |
14606 | | 5810, |
14607 | | /* VADDSHS */ |
14608 | | 5813, |
14609 | | /* VADDSWS */ |
14610 | | 5816, |
14611 | | /* VADDUBM */ |
14612 | | 5819, |
14613 | | /* VADDUBS */ |
14614 | | 5822, |
14615 | | /* VADDUDM */ |
14616 | | 5825, |
14617 | | /* VADDUHM */ |
14618 | | 5828, |
14619 | | /* VADDUHS */ |
14620 | | 5831, |
14621 | | /* VADDUQM */ |
14622 | | 5834, |
14623 | | /* VADDUWM */ |
14624 | | 5837, |
14625 | | /* VADDUWS */ |
14626 | | 5840, |
14627 | | /* VAND */ |
14628 | | 5843, |
14629 | | /* VANDC */ |
14630 | | 5846, |
14631 | | /* VAVGSB */ |
14632 | | 5849, |
14633 | | /* VAVGSH */ |
14634 | | 5852, |
14635 | | /* VAVGSW */ |
14636 | | 5855, |
14637 | | /* VAVGUB */ |
14638 | | 5858, |
14639 | | /* VAVGUH */ |
14640 | | 5861, |
14641 | | /* VAVGUW */ |
14642 | | 5864, |
14643 | | /* VBPERMD */ |
14644 | | 5867, |
14645 | | /* VBPERMQ */ |
14646 | | 5870, |
14647 | | /* VCFSX */ |
14648 | | 5873, |
14649 | | /* VCFSX_0 */ |
14650 | | 5876, |
14651 | | /* VCFUGED */ |
14652 | | 5878, |
14653 | | /* VCFUX */ |
14654 | | 5881, |
14655 | | /* VCFUX_0 */ |
14656 | | 5884, |
14657 | | /* VCIPHER */ |
14658 | | 5886, |
14659 | | /* VCIPHERLAST */ |
14660 | | 5889, |
14661 | | /* VCLRLB */ |
14662 | | 5892, |
14663 | | /* VCLRRB */ |
14664 | | 5895, |
14665 | | /* VCLZB */ |
14666 | | 5898, |
14667 | | /* VCLZD */ |
14668 | | 5900, |
14669 | | /* VCLZDM */ |
14670 | | 5902, |
14671 | | /* VCLZH */ |
14672 | | 5905, |
14673 | | /* VCLZLSBB */ |
14674 | | 5907, |
14675 | | /* VCLZW */ |
14676 | | 5909, |
14677 | | /* VCMPBFP */ |
14678 | | 5911, |
14679 | | /* VCMPBFP_rec */ |
14680 | | 5914, |
14681 | | /* VCMPEQFP */ |
14682 | | 5917, |
14683 | | /* VCMPEQFP_rec */ |
14684 | | 5920, |
14685 | | /* VCMPEQUB */ |
14686 | | 5923, |
14687 | | /* VCMPEQUB_rec */ |
14688 | | 5926, |
14689 | | /* VCMPEQUD */ |
14690 | | 5929, |
14691 | | /* VCMPEQUD_rec */ |
14692 | | 5932, |
14693 | | /* VCMPEQUH */ |
14694 | | 5935, |
14695 | | /* VCMPEQUH_rec */ |
14696 | | 5938, |
14697 | | /* VCMPEQUQ */ |
14698 | | 5941, |
14699 | | /* VCMPEQUQ_rec */ |
14700 | | 5944, |
14701 | | /* VCMPEQUW */ |
14702 | | 5947, |
14703 | | /* VCMPEQUW_rec */ |
14704 | | 5950, |
14705 | | /* VCMPGEFP */ |
14706 | | 5953, |
14707 | | /* VCMPGEFP_rec */ |
14708 | | 5956, |
14709 | | /* VCMPGTFP */ |
14710 | | 5959, |
14711 | | /* VCMPGTFP_rec */ |
14712 | | 5962, |
14713 | | /* VCMPGTSB */ |
14714 | | 5965, |
14715 | | /* VCMPGTSB_rec */ |
14716 | | 5968, |
14717 | | /* VCMPGTSD */ |
14718 | | 5971, |
14719 | | /* VCMPGTSD_rec */ |
14720 | | 5974, |
14721 | | /* VCMPGTSH */ |
14722 | | 5977, |
14723 | | /* VCMPGTSH_rec */ |
14724 | | 5980, |
14725 | | /* VCMPGTSQ */ |
14726 | | 5983, |
14727 | | /* VCMPGTSQ_rec */ |
14728 | | 5986, |
14729 | | /* VCMPGTSW */ |
14730 | | 5989, |
14731 | | /* VCMPGTSW_rec */ |
14732 | | 5992, |
14733 | | /* VCMPGTUB */ |
14734 | | 5995, |
14735 | | /* VCMPGTUB_rec */ |
14736 | | 5998, |
14737 | | /* VCMPGTUD */ |
14738 | | 6001, |
14739 | | /* VCMPGTUD_rec */ |
14740 | | 6004, |
14741 | | /* VCMPGTUH */ |
14742 | | 6007, |
14743 | | /* VCMPGTUH_rec */ |
14744 | | 6010, |
14745 | | /* VCMPGTUQ */ |
14746 | | 6013, |
14747 | | /* VCMPGTUQ_rec */ |
14748 | | 6016, |
14749 | | /* VCMPGTUW */ |
14750 | | 6019, |
14751 | | /* VCMPGTUW_rec */ |
14752 | | 6022, |
14753 | | /* VCMPNEB */ |
14754 | | 6025, |
14755 | | /* VCMPNEB_rec */ |
14756 | | 6028, |
14757 | | /* VCMPNEH */ |
14758 | | 6031, |
14759 | | /* VCMPNEH_rec */ |
14760 | | 6034, |
14761 | | /* VCMPNEW */ |
14762 | | 6037, |
14763 | | /* VCMPNEW_rec */ |
14764 | | 6040, |
14765 | | /* VCMPNEZB */ |
14766 | | 6043, |
14767 | | /* VCMPNEZB_rec */ |
14768 | | 6046, |
14769 | | /* VCMPNEZH */ |
14770 | | 6049, |
14771 | | /* VCMPNEZH_rec */ |
14772 | | 6052, |
14773 | | /* VCMPNEZW */ |
14774 | | 6055, |
14775 | | /* VCMPNEZW_rec */ |
14776 | | 6058, |
14777 | | /* VCMPSQ */ |
14778 | | 6061, |
14779 | | /* VCMPUQ */ |
14780 | | 6064, |
14781 | | /* VCNTMBB */ |
14782 | | 6067, |
14783 | | /* VCNTMBD */ |
14784 | | 6070, |
14785 | | /* VCNTMBH */ |
14786 | | 6073, |
14787 | | /* VCNTMBW */ |
14788 | | 6076, |
14789 | | /* VCTSXS */ |
14790 | | 6079, |
14791 | | /* VCTSXS_0 */ |
14792 | | 6082, |
14793 | | /* VCTUXS */ |
14794 | | 6084, |
14795 | | /* VCTUXS_0 */ |
14796 | | 6087, |
14797 | | /* VCTZB */ |
14798 | | 6089, |
14799 | | /* VCTZD */ |
14800 | | 6091, |
14801 | | /* VCTZDM */ |
14802 | | 6093, |
14803 | | /* VCTZH */ |
14804 | | 6096, |
14805 | | /* VCTZLSBB */ |
14806 | | 6098, |
14807 | | /* VCTZW */ |
14808 | | 6100, |
14809 | | /* VDIVESD */ |
14810 | | 6102, |
14811 | | /* VDIVESQ */ |
14812 | | 6105, |
14813 | | /* VDIVESW */ |
14814 | | 6108, |
14815 | | /* VDIVEUD */ |
14816 | | 6111, |
14817 | | /* VDIVEUQ */ |
14818 | | 6114, |
14819 | | /* VDIVEUW */ |
14820 | | 6117, |
14821 | | /* VDIVSD */ |
14822 | | 6120, |
14823 | | /* VDIVSQ */ |
14824 | | 6123, |
14825 | | /* VDIVSW */ |
14826 | | 6126, |
14827 | | /* VDIVUD */ |
14828 | | 6129, |
14829 | | /* VDIVUQ */ |
14830 | | 6132, |
14831 | | /* VDIVUW */ |
14832 | | 6135, |
14833 | | /* VEQV */ |
14834 | | 6138, |
14835 | | /* VEXPANDBM */ |
14836 | | 6141, |
14837 | | /* VEXPANDDM */ |
14838 | | 6143, |
14839 | | /* VEXPANDHM */ |
14840 | | 6145, |
14841 | | /* VEXPANDQM */ |
14842 | | 6147, |
14843 | | /* VEXPANDWM */ |
14844 | | 6149, |
14845 | | /* VEXPTEFP */ |
14846 | | 6151, |
14847 | | /* VEXTDDVLX */ |
14848 | | 6153, |
14849 | | /* VEXTDDVRX */ |
14850 | | 6157, |
14851 | | /* VEXTDUBVLX */ |
14852 | | 6161, |
14853 | | /* VEXTDUBVRX */ |
14854 | | 6165, |
14855 | | /* VEXTDUHVLX */ |
14856 | | 6169, |
14857 | | /* VEXTDUHVRX */ |
14858 | | 6173, |
14859 | | /* VEXTDUWVLX */ |
14860 | | 6177, |
14861 | | /* VEXTDUWVRX */ |
14862 | | 6181, |
14863 | | /* VEXTRACTBM */ |
14864 | | 6185, |
14865 | | /* VEXTRACTD */ |
14866 | | 6187, |
14867 | | /* VEXTRACTDM */ |
14868 | | 6190, |
14869 | | /* VEXTRACTHM */ |
14870 | | 6192, |
14871 | | /* VEXTRACTQM */ |
14872 | | 6194, |
14873 | | /* VEXTRACTUB */ |
14874 | | 6196, |
14875 | | /* VEXTRACTUH */ |
14876 | | 6199, |
14877 | | /* VEXTRACTUW */ |
14878 | | 6202, |
14879 | | /* VEXTRACTWM */ |
14880 | | 6205, |
14881 | | /* VEXTSB2D */ |
14882 | | 6207, |
14883 | | /* VEXTSB2Ds */ |
14884 | | 6209, |
14885 | | /* VEXTSB2W */ |
14886 | | 6211, |
14887 | | /* VEXTSB2Ws */ |
14888 | | 6213, |
14889 | | /* VEXTSD2Q */ |
14890 | | 6215, |
14891 | | /* VEXTSH2D */ |
14892 | | 6217, |
14893 | | /* VEXTSH2Ds */ |
14894 | | 6219, |
14895 | | /* VEXTSH2W */ |
14896 | | 6221, |
14897 | | /* VEXTSH2Ws */ |
14898 | | 6223, |
14899 | | /* VEXTSW2D */ |
14900 | | 6225, |
14901 | | /* VEXTSW2Ds */ |
14902 | | 6227, |
14903 | | /* VEXTUBLX */ |
14904 | | 6229, |
14905 | | /* VEXTUBRX */ |
14906 | | 6232, |
14907 | | /* VEXTUHLX */ |
14908 | | 6235, |
14909 | | /* VEXTUHRX */ |
14910 | | 6238, |
14911 | | /* VEXTUWLX */ |
14912 | | 6241, |
14913 | | /* VEXTUWRX */ |
14914 | | 6244, |
14915 | | /* VGBBD */ |
14916 | | 6247, |
14917 | | /* VGNB */ |
14918 | | 6249, |
14919 | | /* VINSBLX */ |
14920 | | 6252, |
14921 | | /* VINSBRX */ |
14922 | | 6256, |
14923 | | /* VINSBVLX */ |
14924 | | 6260, |
14925 | | /* VINSBVRX */ |
14926 | | 6264, |
14927 | | /* VINSD */ |
14928 | | 6268, |
14929 | | /* VINSDLX */ |
14930 | | 6272, |
14931 | | /* VINSDRX */ |
14932 | | 6276, |
14933 | | /* VINSERTB */ |
14934 | | 6280, |
14935 | | /* VINSERTD */ |
14936 | | 6284, |
14937 | | /* VINSERTH */ |
14938 | | 6287, |
14939 | | /* VINSERTW */ |
14940 | | 6291, |
14941 | | /* VINSHLX */ |
14942 | | 6294, |
14943 | | /* VINSHRX */ |
14944 | | 6298, |
14945 | | /* VINSHVLX */ |
14946 | | 6302, |
14947 | | /* VINSHVRX */ |
14948 | | 6306, |
14949 | | /* VINSW */ |
14950 | | 6310, |
14951 | | /* VINSWLX */ |
14952 | | 6314, |
14953 | | /* VINSWRX */ |
14954 | | 6318, |
14955 | | /* VINSWVLX */ |
14956 | | 6322, |
14957 | | /* VINSWVRX */ |
14958 | | 6326, |
14959 | | /* VLOGEFP */ |
14960 | | 6330, |
14961 | | /* VMADDFP */ |
14962 | | 6332, |
14963 | | /* VMAXFP */ |
14964 | | 6336, |
14965 | | /* VMAXSB */ |
14966 | | 6339, |
14967 | | /* VMAXSD */ |
14968 | | 6342, |
14969 | | /* VMAXSH */ |
14970 | | 6345, |
14971 | | /* VMAXSW */ |
14972 | | 6348, |
14973 | | /* VMAXUB */ |
14974 | | 6351, |
14975 | | /* VMAXUD */ |
14976 | | 6354, |
14977 | | /* VMAXUH */ |
14978 | | 6357, |
14979 | | /* VMAXUW */ |
14980 | | 6360, |
14981 | | /* VMHADDSHS */ |
14982 | | 6363, |
14983 | | /* VMHRADDSHS */ |
14984 | | 6367, |
14985 | | /* VMINFP */ |
14986 | | 6371, |
14987 | | /* VMINSB */ |
14988 | | 6374, |
14989 | | /* VMINSD */ |
14990 | | 6377, |
14991 | | /* VMINSH */ |
14992 | | 6380, |
14993 | | /* VMINSW */ |
14994 | | 6383, |
14995 | | /* VMINUB */ |
14996 | | 6386, |
14997 | | /* VMINUD */ |
14998 | | 6389, |
14999 | | /* VMINUH */ |
15000 | | 6392, |
15001 | | /* VMINUW */ |
15002 | | 6395, |
15003 | | /* VMLADDUHM */ |
15004 | | 6398, |
15005 | | /* VMODSD */ |
15006 | | 6402, |
15007 | | /* VMODSQ */ |
15008 | | 6405, |
15009 | | /* VMODSW */ |
15010 | | 6408, |
15011 | | /* VMODUD */ |
15012 | | 6411, |
15013 | | /* VMODUQ */ |
15014 | | 6414, |
15015 | | /* VMODUW */ |
15016 | | 6417, |
15017 | | /* VMRGEW */ |
15018 | | 6420, |
15019 | | /* VMRGHB */ |
15020 | | 6423, |
15021 | | /* VMRGHH */ |
15022 | | 6426, |
15023 | | /* VMRGHW */ |
15024 | | 6429, |
15025 | | /* VMRGLB */ |
15026 | | 6432, |
15027 | | /* VMRGLH */ |
15028 | | 6435, |
15029 | | /* VMRGLW */ |
15030 | | 6438, |
15031 | | /* VMRGOW */ |
15032 | | 6441, |
15033 | | /* VMSUMCUD */ |
15034 | | 6444, |
15035 | | /* VMSUMMBM */ |
15036 | | 6448, |
15037 | | /* VMSUMSHM */ |
15038 | | 6452, |
15039 | | /* VMSUMSHS */ |
15040 | | 6456, |
15041 | | /* VMSUMUBM */ |
15042 | | 6460, |
15043 | | /* VMSUMUDM */ |
15044 | | 6464, |
15045 | | /* VMSUMUHM */ |
15046 | | 6468, |
15047 | | /* VMSUMUHS */ |
15048 | | 6472, |
15049 | | /* VMUL10CUQ */ |
15050 | | 6476, |
15051 | | /* VMUL10ECUQ */ |
15052 | | 6478, |
15053 | | /* VMUL10EUQ */ |
15054 | | 6481, |
15055 | | /* VMUL10UQ */ |
15056 | | 6484, |
15057 | | /* VMULESB */ |
15058 | | 6486, |
15059 | | /* VMULESD */ |
15060 | | 6489, |
15061 | | /* VMULESH */ |
15062 | | 6492, |
15063 | | /* VMULESW */ |
15064 | | 6495, |
15065 | | /* VMULEUB */ |
15066 | | 6498, |
15067 | | /* VMULEUD */ |
15068 | | 6501, |
15069 | | /* VMULEUH */ |
15070 | | 6504, |
15071 | | /* VMULEUW */ |
15072 | | 6507, |
15073 | | /* VMULHSD */ |
15074 | | 6510, |
15075 | | /* VMULHSW */ |
15076 | | 6513, |
15077 | | /* VMULHUD */ |
15078 | | 6516, |
15079 | | /* VMULHUW */ |
15080 | | 6519, |
15081 | | /* VMULLD */ |
15082 | | 6522, |
15083 | | /* VMULOSB */ |
15084 | | 6525, |
15085 | | /* VMULOSD */ |
15086 | | 6528, |
15087 | | /* VMULOSH */ |
15088 | | 6531, |
15089 | | /* VMULOSW */ |
15090 | | 6534, |
15091 | | /* VMULOUB */ |
15092 | | 6537, |
15093 | | /* VMULOUD */ |
15094 | | 6540, |
15095 | | /* VMULOUH */ |
15096 | | 6543, |
15097 | | /* VMULOUW */ |
15098 | | 6546, |
15099 | | /* VMULUWM */ |
15100 | | 6549, |
15101 | | /* VNAND */ |
15102 | | 6552, |
15103 | | /* VNCIPHER */ |
15104 | | 6555, |
15105 | | /* VNCIPHERLAST */ |
15106 | | 6558, |
15107 | | /* VNEGD */ |
15108 | | 6561, |
15109 | | /* VNEGW */ |
15110 | | 6563, |
15111 | | /* VNMSUBFP */ |
15112 | | 6565, |
15113 | | /* VNOR */ |
15114 | | 6569, |
15115 | | /* VOR */ |
15116 | | 6572, |
15117 | | /* VORC */ |
15118 | | 6575, |
15119 | | /* VPDEPD */ |
15120 | | 6578, |
15121 | | /* VPERM */ |
15122 | | 6581, |
15123 | | /* VPERMR */ |
15124 | | 6585, |
15125 | | /* VPERMXOR */ |
15126 | | 6589, |
15127 | | /* VPEXTD */ |
15128 | | 6593, |
15129 | | /* VPKPX */ |
15130 | | 6596, |
15131 | | /* VPKSDSS */ |
15132 | | 6599, |
15133 | | /* VPKSDUS */ |
15134 | | 6602, |
15135 | | /* VPKSHSS */ |
15136 | | 6605, |
15137 | | /* VPKSHUS */ |
15138 | | 6608, |
15139 | | /* VPKSWSS */ |
15140 | | 6611, |
15141 | | /* VPKSWUS */ |
15142 | | 6614, |
15143 | | /* VPKUDUM */ |
15144 | | 6617, |
15145 | | /* VPKUDUS */ |
15146 | | 6620, |
15147 | | /* VPKUHUM */ |
15148 | | 6623, |
15149 | | /* VPKUHUS */ |
15150 | | 6626, |
15151 | | /* VPKUWUM */ |
15152 | | 6629, |
15153 | | /* VPKUWUS */ |
15154 | | 6632, |
15155 | | /* VPMSUMB */ |
15156 | | 6635, |
15157 | | /* VPMSUMD */ |
15158 | | 6638, |
15159 | | /* VPMSUMH */ |
15160 | | 6641, |
15161 | | /* VPMSUMW */ |
15162 | | 6644, |
15163 | | /* VPOPCNTB */ |
15164 | | 6647, |
15165 | | /* VPOPCNTD */ |
15166 | | 6649, |
15167 | | /* VPOPCNTH */ |
15168 | | 6651, |
15169 | | /* VPOPCNTW */ |
15170 | | 6653, |
15171 | | /* VPRTYBD */ |
15172 | | 6655, |
15173 | | /* VPRTYBQ */ |
15174 | | 6657, |
15175 | | /* VPRTYBW */ |
15176 | | 6659, |
15177 | | /* VREFP */ |
15178 | | 6661, |
15179 | | /* VRFIM */ |
15180 | | 6663, |
15181 | | /* VRFIN */ |
15182 | | 6665, |
15183 | | /* VRFIP */ |
15184 | | 6667, |
15185 | | /* VRFIZ */ |
15186 | | 6669, |
15187 | | /* VRLB */ |
15188 | | 6671, |
15189 | | /* VRLD */ |
15190 | | 6674, |
15191 | | /* VRLDMI */ |
15192 | | 6677, |
15193 | | /* VRLDNM */ |
15194 | | 6681, |
15195 | | /* VRLH */ |
15196 | | 6684, |
15197 | | /* VRLQ */ |
15198 | | 6687, |
15199 | | /* VRLQMI */ |
15200 | | 6690, |
15201 | | /* VRLQNM */ |
15202 | | 6694, |
15203 | | /* VRLW */ |
15204 | | 6697, |
15205 | | /* VRLWMI */ |
15206 | | 6700, |
15207 | | /* VRLWNM */ |
15208 | | 6704, |
15209 | | /* VRSQRTEFP */ |
15210 | | 6707, |
15211 | | /* VSBOX */ |
15212 | | 6709, |
15213 | | /* VSEL */ |
15214 | | 6711, |
15215 | | /* VSHASIGMAD */ |
15216 | | 6715, |
15217 | | /* VSHASIGMAW */ |
15218 | | 6719, |
15219 | | /* VSL */ |
15220 | | 6723, |
15221 | | /* VSLB */ |
15222 | | 6726, |
15223 | | /* VSLD */ |
15224 | | 6729, |
15225 | | /* VSLDBI */ |
15226 | | 6732, |
15227 | | /* VSLDOI */ |
15228 | | 6736, |
15229 | | /* VSLH */ |
15230 | | 6740, |
15231 | | /* VSLO */ |
15232 | | 6743, |
15233 | | /* VSLQ */ |
15234 | | 6746, |
15235 | | /* VSLV */ |
15236 | | 6749, |
15237 | | /* VSLW */ |
15238 | | 6752, |
15239 | | /* VSPLTB */ |
15240 | | 6755, |
15241 | | /* VSPLTBs */ |
15242 | | 6758, |
15243 | | /* VSPLTH */ |
15244 | | 6761, |
15245 | | /* VSPLTHs */ |
15246 | | 6764, |
15247 | | /* VSPLTISB */ |
15248 | | 6767, |
15249 | | /* VSPLTISH */ |
15250 | | 6769, |
15251 | | /* VSPLTISW */ |
15252 | | 6771, |
15253 | | /* VSPLTW */ |
15254 | | 6773, |
15255 | | /* VSR */ |
15256 | | 6776, |
15257 | | /* VSRAB */ |
15258 | | 6779, |
15259 | | /* VSRAD */ |
15260 | | 6782, |
15261 | | /* VSRAH */ |
15262 | | 6785, |
15263 | | /* VSRAQ */ |
15264 | | 6788, |
15265 | | /* VSRAW */ |
15266 | | 6791, |
15267 | | /* VSRB */ |
15268 | | 6794, |
15269 | | /* VSRD */ |
15270 | | 6797, |
15271 | | /* VSRDBI */ |
15272 | | 6800, |
15273 | | /* VSRH */ |
15274 | | 6804, |
15275 | | /* VSRO */ |
15276 | | 6807, |
15277 | | /* VSRQ */ |
15278 | | 6810, |
15279 | | /* VSRV */ |
15280 | | 6813, |
15281 | | /* VSRW */ |
15282 | | 6816, |
15283 | | /* VSTRIBL */ |
15284 | | 6819, |
15285 | | /* VSTRIBL_rec */ |
15286 | | 6821, |
15287 | | /* VSTRIBR */ |
15288 | | 6823, |
15289 | | /* VSTRIBR_rec */ |
15290 | | 6825, |
15291 | | /* VSTRIHL */ |
15292 | | 6827, |
15293 | | /* VSTRIHL_rec */ |
15294 | | 6829, |
15295 | | /* VSTRIHR */ |
15296 | | 6831, |
15297 | | /* VSTRIHR_rec */ |
15298 | | 6833, |
15299 | | /* VSUBCUQ */ |
15300 | | 6835, |
15301 | | /* VSUBCUW */ |
15302 | | 6838, |
15303 | | /* VSUBECUQ */ |
15304 | | 6841, |
15305 | | /* VSUBEUQM */ |
15306 | | 6845, |
15307 | | /* VSUBFP */ |
15308 | | 6849, |
15309 | | /* VSUBSBS */ |
15310 | | 6852, |
15311 | | /* VSUBSHS */ |
15312 | | 6855, |
15313 | | /* VSUBSWS */ |
15314 | | 6858, |
15315 | | /* VSUBUBM */ |
15316 | | 6861, |
15317 | | /* VSUBUBS */ |
15318 | | 6864, |
15319 | | /* VSUBUDM */ |
15320 | | 6867, |
15321 | | /* VSUBUHM */ |
15322 | | 6870, |
15323 | | /* VSUBUHS */ |
15324 | | 6873, |
15325 | | /* VSUBUQM */ |
15326 | | 6876, |
15327 | | /* VSUBUWM */ |
15328 | | 6879, |
15329 | | /* VSUBUWS */ |
15330 | | 6882, |
15331 | | /* VSUM2SWS */ |
15332 | | 6885, |
15333 | | /* VSUM4SBS */ |
15334 | | 6888, |
15335 | | /* VSUM4SHS */ |
15336 | | 6891, |
15337 | | /* VSUM4UBS */ |
15338 | | 6894, |
15339 | | /* VSUMSWS */ |
15340 | | 6897, |
15341 | | /* VUPKHPX */ |
15342 | | 6900, |
15343 | | /* VUPKHSB */ |
15344 | | 6902, |
15345 | | /* VUPKHSH */ |
15346 | | 6904, |
15347 | | /* VUPKHSW */ |
15348 | | 6906, |
15349 | | /* VUPKLPX */ |
15350 | | 6908, |
15351 | | /* VUPKLSB */ |
15352 | | 6910, |
15353 | | /* VUPKLSH */ |
15354 | | 6912, |
15355 | | /* VUPKLSW */ |
15356 | | 6914, |
15357 | | /* VXOR */ |
15358 | | 6916, |
15359 | | /* V_SET0 */ |
15360 | | 6919, |
15361 | | /* V_SET0B */ |
15362 | | 6920, |
15363 | | /* V_SET0H */ |
15364 | | 6921, |
15365 | | /* V_SETALLONES */ |
15366 | | 6922, |
15367 | | /* V_SETALLONESB */ |
15368 | | 6923, |
15369 | | /* V_SETALLONESH */ |
15370 | | 6924, |
15371 | | /* WAIT */ |
15372 | | 6925, |
15373 | | /* WAITP10 */ |
15374 | | 6926, |
15375 | | /* WRTEE */ |
15376 | | 6928, |
15377 | | /* WRTEEI */ |
15378 | | 6929, |
15379 | | /* XOR */ |
15380 | | 6930, |
15381 | | /* XOR8 */ |
15382 | | 6933, |
15383 | | /* XOR8_rec */ |
15384 | | 6936, |
15385 | | /* XORI */ |
15386 | | 6939, |
15387 | | /* XORI8 */ |
15388 | | 6942, |
15389 | | /* XORIS */ |
15390 | | 6945, |
15391 | | /* XORIS8 */ |
15392 | | 6948, |
15393 | | /* XOR_rec */ |
15394 | | 6951, |
15395 | | /* XSABSDP */ |
15396 | | 6954, |
15397 | | /* XSABSQP */ |
15398 | | 6956, |
15399 | | /* XSADDDP */ |
15400 | | 6958, |
15401 | | /* XSADDQP */ |
15402 | | 6961, |
15403 | | /* XSADDQPO */ |
15404 | | 6964, |
15405 | | /* XSADDSP */ |
15406 | | 6967, |
15407 | | /* XSCMPEQDP */ |
15408 | | 6970, |
15409 | | /* XSCMPEQQP */ |
15410 | | 6973, |
15411 | | /* XSCMPEXPDP */ |
15412 | | 6976, |
15413 | | /* XSCMPEXPQP */ |
15414 | | 6979, |
15415 | | /* XSCMPGEDP */ |
15416 | | 6982, |
15417 | | /* XSCMPGEQP */ |
15418 | | 6985, |
15419 | | /* XSCMPGTDP */ |
15420 | | 6988, |
15421 | | /* XSCMPGTQP */ |
15422 | | 6991, |
15423 | | /* XSCMPODP */ |
15424 | | 6994, |
15425 | | /* XSCMPOQP */ |
15426 | | 6997, |
15427 | | /* XSCMPUDP */ |
15428 | | 7000, |
15429 | | /* XSCMPUQP */ |
15430 | | 7003, |
15431 | | /* XSCPSGNDP */ |
15432 | | 7006, |
15433 | | /* XSCPSGNQP */ |
15434 | | 7009, |
15435 | | /* XSCVDPHP */ |
15436 | | 7012, |
15437 | | /* XSCVDPQP */ |
15438 | | 7014, |
15439 | | /* XSCVDPSP */ |
15440 | | 7016, |
15441 | | /* XSCVDPSPN */ |
15442 | | 7018, |
15443 | | /* XSCVDPSXDS */ |
15444 | | 7020, |
15445 | | /* XSCVDPSXDSs */ |
15446 | | 7022, |
15447 | | /* XSCVDPSXWS */ |
15448 | | 7024, |
15449 | | /* XSCVDPSXWSs */ |
15450 | | 7026, |
15451 | | /* XSCVDPUXDS */ |
15452 | | 7028, |
15453 | | /* XSCVDPUXDSs */ |
15454 | | 7030, |
15455 | | /* XSCVDPUXWS */ |
15456 | | 7032, |
15457 | | /* XSCVDPUXWSs */ |
15458 | | 7034, |
15459 | | /* XSCVHPDP */ |
15460 | | 7036, |
15461 | | /* XSCVQPDP */ |
15462 | | 7038, |
15463 | | /* XSCVQPDPO */ |
15464 | | 7040, |
15465 | | /* XSCVQPSDZ */ |
15466 | | 7042, |
15467 | | /* XSCVQPSQZ */ |
15468 | | 7044, |
15469 | | /* XSCVQPSWZ */ |
15470 | | 7046, |
15471 | | /* XSCVQPUDZ */ |
15472 | | 7048, |
15473 | | /* XSCVQPUQZ */ |
15474 | | 7050, |
15475 | | /* XSCVQPUWZ */ |
15476 | | 7052, |
15477 | | /* XSCVSDQP */ |
15478 | | 7054, |
15479 | | /* XSCVSPDP */ |
15480 | | 7056, |
15481 | | /* XSCVSPDPN */ |
15482 | | 7058, |
15483 | | /* XSCVSQQP */ |
15484 | | 7060, |
15485 | | /* XSCVSXDDP */ |
15486 | | 7062, |
15487 | | /* XSCVSXDSP */ |
15488 | | 7064, |
15489 | | /* XSCVUDQP */ |
15490 | | 7066, |
15491 | | /* XSCVUQQP */ |
15492 | | 7068, |
15493 | | /* XSCVUXDDP */ |
15494 | | 7070, |
15495 | | /* XSCVUXDSP */ |
15496 | | 7072, |
15497 | | /* XSDIVDP */ |
15498 | | 7074, |
15499 | | /* XSDIVQP */ |
15500 | | 7077, |
15501 | | /* XSDIVQPO */ |
15502 | | 7080, |
15503 | | /* XSDIVSP */ |
15504 | | 7083, |
15505 | | /* XSIEXPDP */ |
15506 | | 7086, |
15507 | | /* XSIEXPQP */ |
15508 | | 7089, |
15509 | | /* XSMADDADP */ |
15510 | | 7092, |
15511 | | /* XSMADDASP */ |
15512 | | 7096, |
15513 | | /* XSMADDMDP */ |
15514 | | 7100, |
15515 | | /* XSMADDMSP */ |
15516 | | 7104, |
15517 | | /* XSMADDQP */ |
15518 | | 7108, |
15519 | | /* XSMADDQPO */ |
15520 | | 7112, |
15521 | | /* XSMAXCDP */ |
15522 | | 7116, |
15523 | | /* XSMAXCQP */ |
15524 | | 7119, |
15525 | | /* XSMAXDP */ |
15526 | | 7122, |
15527 | | /* XSMAXJDP */ |
15528 | | 7125, |
15529 | | /* XSMINCDP */ |
15530 | | 7128, |
15531 | | /* XSMINCQP */ |
15532 | | 7131, |
15533 | | /* XSMINDP */ |
15534 | | 7134, |
15535 | | /* XSMINJDP */ |
15536 | | 7137, |
15537 | | /* XSMSUBADP */ |
15538 | | 7140, |
15539 | | /* XSMSUBASP */ |
15540 | | 7144, |
15541 | | /* XSMSUBMDP */ |
15542 | | 7148, |
15543 | | /* XSMSUBMSP */ |
15544 | | 7152, |
15545 | | /* XSMSUBQP */ |
15546 | | 7156, |
15547 | | /* XSMSUBQPO */ |
15548 | | 7160, |
15549 | | /* XSMULDP */ |
15550 | | 7164, |
15551 | | /* XSMULQP */ |
15552 | | 7167, |
15553 | | /* XSMULQPO */ |
15554 | | 7170, |
15555 | | /* XSMULSP */ |
15556 | | 7173, |
15557 | | /* XSNABSDP */ |
15558 | | 7176, |
15559 | | /* XSNABSDPs */ |
15560 | | 7178, |
15561 | | /* XSNABSQP */ |
15562 | | 7180, |
15563 | | /* XSNEGDP */ |
15564 | | 7182, |
15565 | | /* XSNEGQP */ |
15566 | | 7184, |
15567 | | /* XSNMADDADP */ |
15568 | | 7186, |
15569 | | /* XSNMADDASP */ |
15570 | | 7190, |
15571 | | /* XSNMADDMDP */ |
15572 | | 7194, |
15573 | | /* XSNMADDMSP */ |
15574 | | 7198, |
15575 | | /* XSNMADDQP */ |
15576 | | 7202, |
15577 | | /* XSNMADDQPO */ |
15578 | | 7206, |
15579 | | /* XSNMSUBADP */ |
15580 | | 7210, |
15581 | | /* XSNMSUBASP */ |
15582 | | 7214, |
15583 | | /* XSNMSUBMDP */ |
15584 | | 7218, |
15585 | | /* XSNMSUBMSP */ |
15586 | | 7222, |
15587 | | /* XSNMSUBQP */ |
15588 | | 7226, |
15589 | | /* XSNMSUBQPO */ |
15590 | | 7230, |
15591 | | /* XSRDPI */ |
15592 | | 7234, |
15593 | | /* XSRDPIC */ |
15594 | | 7236, |
15595 | | /* XSRDPIM */ |
15596 | | 7238, |
15597 | | /* XSRDPIP */ |
15598 | | 7240, |
15599 | | /* XSRDPIZ */ |
15600 | | 7242, |
15601 | | /* XSREDP */ |
15602 | | 7244, |
15603 | | /* XSRESP */ |
15604 | | 7246, |
15605 | | /* XSRQPI */ |
15606 | | 7248, |
15607 | | /* XSRQPIX */ |
15608 | | 7252, |
15609 | | /* XSRQPXP */ |
15610 | | 7256, |
15611 | | /* XSRSP */ |
15612 | | 7260, |
15613 | | /* XSRSQRTEDP */ |
15614 | | 7262, |
15615 | | /* XSRSQRTESP */ |
15616 | | 7264, |
15617 | | /* XSSQRTDP */ |
15618 | | 7266, |
15619 | | /* XSSQRTQP */ |
15620 | | 7268, |
15621 | | /* XSSQRTQPO */ |
15622 | | 7270, |
15623 | | /* XSSQRTSP */ |
15624 | | 7272, |
15625 | | /* XSSUBDP */ |
15626 | | 7274, |
15627 | | /* XSSUBQP */ |
15628 | | 7277, |
15629 | | /* XSSUBQPO */ |
15630 | | 7280, |
15631 | | /* XSSUBSP */ |
15632 | | 7283, |
15633 | | /* XSTDIVDP */ |
15634 | | 7286, |
15635 | | /* XSTSQRTDP */ |
15636 | | 7289, |
15637 | | /* XSTSTDCDP */ |
15638 | | 7291, |
15639 | | /* XSTSTDCQP */ |
15640 | | 7294, |
15641 | | /* XSTSTDCSP */ |
15642 | | 7297, |
15643 | | /* XSXEXPDP */ |
15644 | | 7300, |
15645 | | /* XSXEXPQP */ |
15646 | | 7302, |
15647 | | /* XSXSIGDP */ |
15648 | | 7304, |
15649 | | /* XSXSIGQP */ |
15650 | | 7306, |
15651 | | /* XVABSDP */ |
15652 | | 7308, |
15653 | | /* XVABSSP */ |
15654 | | 7310, |
15655 | | /* XVADDDP */ |
15656 | | 7312, |
15657 | | /* XVADDSP */ |
15658 | | 7315, |
15659 | | /* XVBF16GER2 */ |
15660 | | 7318, |
15661 | | /* XVBF16GER2NN */ |
15662 | | 7321, |
15663 | | /* XVBF16GER2NP */ |
15664 | | 7325, |
15665 | | /* XVBF16GER2PN */ |
15666 | | 7329, |
15667 | | /* XVBF16GER2PP */ |
15668 | | 7333, |
15669 | | /* XVBF16GER2W */ |
15670 | | 7337, |
15671 | | /* XVBF16GER2WNN */ |
15672 | | 7340, |
15673 | | /* XVBF16GER2WNP */ |
15674 | | 7344, |
15675 | | /* XVBF16GER2WPN */ |
15676 | | 7348, |
15677 | | /* XVBF16GER2WPP */ |
15678 | | 7352, |
15679 | | /* XVCMPEQDP */ |
15680 | | 7356, |
15681 | | /* XVCMPEQDP_rec */ |
15682 | | 7359, |
15683 | | /* XVCMPEQSP */ |
15684 | | 7362, |
15685 | | /* XVCMPEQSP_rec */ |
15686 | | 7365, |
15687 | | /* XVCMPGEDP */ |
15688 | | 7368, |
15689 | | /* XVCMPGEDP_rec */ |
15690 | | 7371, |
15691 | | /* XVCMPGESP */ |
15692 | | 7374, |
15693 | | /* XVCMPGESP_rec */ |
15694 | | 7377, |
15695 | | /* XVCMPGTDP */ |
15696 | | 7380, |
15697 | | /* XVCMPGTDP_rec */ |
15698 | | 7383, |
15699 | | /* XVCMPGTSP */ |
15700 | | 7386, |
15701 | | /* XVCMPGTSP_rec */ |
15702 | | 7389, |
15703 | | /* XVCPSGNDP */ |
15704 | | 7392, |
15705 | | /* XVCPSGNSP */ |
15706 | | 7395, |
15707 | | /* XVCVBF16SPN */ |
15708 | | 7398, |
15709 | | /* XVCVDPSP */ |
15710 | | 7400, |
15711 | | /* XVCVDPSXDS */ |
15712 | | 7402, |
15713 | | /* XVCVDPSXWS */ |
15714 | | 7404, |
15715 | | /* XVCVDPUXDS */ |
15716 | | 7406, |
15717 | | /* XVCVDPUXWS */ |
15718 | | 7408, |
15719 | | /* XVCVHPSP */ |
15720 | | 7410, |
15721 | | /* XVCVSPBF16 */ |
15722 | | 7412, |
15723 | | /* XVCVSPDP */ |
15724 | | 7414, |
15725 | | /* XVCVSPHP */ |
15726 | | 7416, |
15727 | | /* XVCVSPSXDS */ |
15728 | | 7418, |
15729 | | /* XVCVSPSXWS */ |
15730 | | 7420, |
15731 | | /* XVCVSPUXDS */ |
15732 | | 7422, |
15733 | | /* XVCVSPUXWS */ |
15734 | | 7424, |
15735 | | /* XVCVSXDDP */ |
15736 | | 7426, |
15737 | | /* XVCVSXDSP */ |
15738 | | 7428, |
15739 | | /* XVCVSXWDP */ |
15740 | | 7430, |
15741 | | /* XVCVSXWSP */ |
15742 | | 7432, |
15743 | | /* XVCVUXDDP */ |
15744 | | 7434, |
15745 | | /* XVCVUXDSP */ |
15746 | | 7436, |
15747 | | /* XVCVUXWDP */ |
15748 | | 7438, |
15749 | | /* XVCVUXWSP */ |
15750 | | 7440, |
15751 | | /* XVDIVDP */ |
15752 | | 7442, |
15753 | | /* XVDIVSP */ |
15754 | | 7445, |
15755 | | /* XVF16GER2 */ |
15756 | | 7448, |
15757 | | /* XVF16GER2NN */ |
15758 | | 7451, |
15759 | | /* XVF16GER2NP */ |
15760 | | 7455, |
15761 | | /* XVF16GER2PN */ |
15762 | | 7459, |
15763 | | /* XVF16GER2PP */ |
15764 | | 7463, |
15765 | | /* XVF16GER2W */ |
15766 | | 7467, |
15767 | | /* XVF16GER2WNN */ |
15768 | | 7470, |
15769 | | /* XVF16GER2WNP */ |
15770 | | 7474, |
15771 | | /* XVF16GER2WPN */ |
15772 | | 7478, |
15773 | | /* XVF16GER2WPP */ |
15774 | | 7482, |
15775 | | /* XVF32GER */ |
15776 | | 7486, |
15777 | | /* XVF32GERNN */ |
15778 | | 7489, |
15779 | | /* XVF32GERNP */ |
15780 | | 7493, |
15781 | | /* XVF32GERPN */ |
15782 | | 7497, |
15783 | | /* XVF32GERPP */ |
15784 | | 7501, |
15785 | | /* XVF32GERW */ |
15786 | | 7505, |
15787 | | /* XVF32GERWNN */ |
15788 | | 7508, |
15789 | | /* XVF32GERWNP */ |
15790 | | 7512, |
15791 | | /* XVF32GERWPN */ |
15792 | | 7516, |
15793 | | /* XVF32GERWPP */ |
15794 | | 7520, |
15795 | | /* XVF64GER */ |
15796 | | 7524, |
15797 | | /* XVF64GERNN */ |
15798 | | 7527, |
15799 | | /* XVF64GERNP */ |
15800 | | 7531, |
15801 | | /* XVF64GERPN */ |
15802 | | 7535, |
15803 | | /* XVF64GERPP */ |
15804 | | 7539, |
15805 | | /* XVF64GERW */ |
15806 | | 7543, |
15807 | | /* XVF64GERWNN */ |
15808 | | 7546, |
15809 | | /* XVF64GERWNP */ |
15810 | | 7550, |
15811 | | /* XVF64GERWPN */ |
15812 | | 7554, |
15813 | | /* XVF64GERWPP */ |
15814 | | 7558, |
15815 | | /* XVI16GER2 */ |
15816 | | 7562, |
15817 | | /* XVI16GER2PP */ |
15818 | | 7565, |
15819 | | /* XVI16GER2S */ |
15820 | | 7569, |
15821 | | /* XVI16GER2SPP */ |
15822 | | 7572, |
15823 | | /* XVI16GER2SW */ |
15824 | | 7576, |
15825 | | /* XVI16GER2SWPP */ |
15826 | | 7579, |
15827 | | /* XVI16GER2W */ |
15828 | | 7583, |
15829 | | /* XVI16GER2WPP */ |
15830 | | 7586, |
15831 | | /* XVI4GER8 */ |
15832 | | 7590, |
15833 | | /* XVI4GER8PP */ |
15834 | | 7593, |
15835 | | /* XVI4GER8W */ |
15836 | | 7597, |
15837 | | /* XVI4GER8WPP */ |
15838 | | 7600, |
15839 | | /* XVI8GER4 */ |
15840 | | 7604, |
15841 | | /* XVI8GER4PP */ |
15842 | | 7607, |
15843 | | /* XVI8GER4SPP */ |
15844 | | 7611, |
15845 | | /* XVI8GER4W */ |
15846 | | 7615, |
15847 | | /* XVI8GER4WPP */ |
15848 | | 7618, |
15849 | | /* XVI8GER4WSPP */ |
15850 | | 7622, |
15851 | | /* XVIEXPDP */ |
15852 | | 7626, |
15853 | | /* XVIEXPSP */ |
15854 | | 7629, |
15855 | | /* XVMADDADP */ |
15856 | | 7632, |
15857 | | /* XVMADDASP */ |
15858 | | 7636, |
15859 | | /* XVMADDMDP */ |
15860 | | 7640, |
15861 | | /* XVMADDMSP */ |
15862 | | 7644, |
15863 | | /* XVMAXDP */ |
15864 | | 7648, |
15865 | | /* XVMAXSP */ |
15866 | | 7651, |
15867 | | /* XVMINDP */ |
15868 | | 7654, |
15869 | | /* XVMINSP */ |
15870 | | 7657, |
15871 | | /* XVMSUBADP */ |
15872 | | 7660, |
15873 | | /* XVMSUBASP */ |
15874 | | 7664, |
15875 | | /* XVMSUBMDP */ |
15876 | | 7668, |
15877 | | /* XVMSUBMSP */ |
15878 | | 7672, |
15879 | | /* XVMULDP */ |
15880 | | 7676, |
15881 | | /* XVMULSP */ |
15882 | | 7679, |
15883 | | /* XVNABSDP */ |
15884 | | 7682, |
15885 | | /* XVNABSSP */ |
15886 | | 7684, |
15887 | | /* XVNEGDP */ |
15888 | | 7686, |
15889 | | /* XVNEGSP */ |
15890 | | 7688, |
15891 | | /* XVNMADDADP */ |
15892 | | 7690, |
15893 | | /* XVNMADDASP */ |
15894 | | 7694, |
15895 | | /* XVNMADDMDP */ |
15896 | | 7698, |
15897 | | /* XVNMADDMSP */ |
15898 | | 7702, |
15899 | | /* XVNMSUBADP */ |
15900 | | 7706, |
15901 | | /* XVNMSUBASP */ |
15902 | | 7710, |
15903 | | /* XVNMSUBMDP */ |
15904 | | 7714, |
15905 | | /* XVNMSUBMSP */ |
15906 | | 7718, |
15907 | | /* XVRDPI */ |
15908 | | 7722, |
15909 | | /* XVRDPIC */ |
15910 | | 7724, |
15911 | | /* XVRDPIM */ |
15912 | | 7726, |
15913 | | /* XVRDPIP */ |
15914 | | 7728, |
15915 | | /* XVRDPIZ */ |
15916 | | 7730, |
15917 | | /* XVREDP */ |
15918 | | 7732, |
15919 | | /* XVRESP */ |
15920 | | 7734, |
15921 | | /* XVRSPI */ |
15922 | | 7736, |
15923 | | /* XVRSPIC */ |
15924 | | 7738, |
15925 | | /* XVRSPIM */ |
15926 | | 7740, |
15927 | | /* XVRSPIP */ |
15928 | | 7742, |
15929 | | /* XVRSPIZ */ |
15930 | | 7744, |
15931 | | /* XVRSQRTEDP */ |
15932 | | 7746, |
15933 | | /* XVRSQRTESP */ |
15934 | | 7748, |
15935 | | /* XVSQRTDP */ |
15936 | | 7750, |
15937 | | /* XVSQRTSP */ |
15938 | | 7752, |
15939 | | /* XVSUBDP */ |
15940 | | 7754, |
15941 | | /* XVSUBSP */ |
15942 | | 7757, |
15943 | | /* XVTDIVDP */ |
15944 | | 7760, |
15945 | | /* XVTDIVSP */ |
15946 | | 7763, |
15947 | | /* XVTLSBB */ |
15948 | | 7766, |
15949 | | /* XVTSQRTDP */ |
15950 | | 7768, |
15951 | | /* XVTSQRTSP */ |
15952 | | 7770, |
15953 | | /* XVTSTDCDP */ |
15954 | | 7772, |
15955 | | /* XVTSTDCSP */ |
15956 | | 7775, |
15957 | | /* XVXEXPDP */ |
15958 | | 7778, |
15959 | | /* XVXEXPSP */ |
15960 | | 7780, |
15961 | | /* XVXSIGDP */ |
15962 | | 7782, |
15963 | | /* XVXSIGSP */ |
15964 | | 7784, |
15965 | | /* XXBLENDVB */ |
15966 | | 7786, |
15967 | | /* XXBLENDVD */ |
15968 | | 7790, |
15969 | | /* XXBLENDVH */ |
15970 | | 7794, |
15971 | | /* XXBLENDVW */ |
15972 | | 7798, |
15973 | | /* XXBRD */ |
15974 | | 7802, |
15975 | | /* XXBRH */ |
15976 | | 7804, |
15977 | | /* XXBRQ */ |
15978 | | 7806, |
15979 | | /* XXBRW */ |
15980 | | 7808, |
15981 | | /* XXEVAL */ |
15982 | | 7810, |
15983 | | /* XXEXTRACTUW */ |
15984 | | 7815, |
15985 | | /* XXGENPCVBM */ |
15986 | | 7818, |
15987 | | /* XXGENPCVDM */ |
15988 | | 7821, |
15989 | | /* XXGENPCVHM */ |
15990 | | 7824, |
15991 | | /* XXGENPCVWM */ |
15992 | | 7827, |
15993 | | /* XXINSERTW */ |
15994 | | 7830, |
15995 | | /* XXLAND */ |
15996 | | 7834, |
15997 | | /* XXLANDC */ |
15998 | | 7837, |
15999 | | /* XXLEQV */ |
16000 | | 7840, |
16001 | | /* XXLEQVOnes */ |
16002 | | 7843, |
16003 | | /* XXLNAND */ |
16004 | | 7844, |
16005 | | /* XXLNOR */ |
16006 | | 7847, |
16007 | | /* XXLOR */ |
16008 | | 7850, |
16009 | | /* XXLORC */ |
16010 | | 7853, |
16011 | | /* XXLORf */ |
16012 | | 7856, |
16013 | | /* XXLXOR */ |
16014 | | 7859, |
16015 | | /* XXLXORdpz */ |
16016 | | 7862, |
16017 | | /* XXLXORspz */ |
16018 | | 7863, |
16019 | | /* XXLXORz */ |
16020 | | 7864, |
16021 | | /* XXMFACC */ |
16022 | | 7865, |
16023 | | /* XXMFACCW */ |
16024 | | 7867, |
16025 | | /* XXMRGHW */ |
16026 | | 7869, |
16027 | | /* XXMRGLW */ |
16028 | | 7872, |
16029 | | /* XXMTACC */ |
16030 | | 7875, |
16031 | | /* XXMTACCW */ |
16032 | | 7877, |
16033 | | /* XXPERM */ |
16034 | | 7879, |
16035 | | /* XXPERMDI */ |
16036 | | 7883, |
16037 | | /* XXPERMDIs */ |
16038 | | 7887, |
16039 | | /* XXPERMR */ |
16040 | | 7890, |
16041 | | /* XXPERMX */ |
16042 | | 7894, |
16043 | | /* XXSEL */ |
16044 | | 7899, |
16045 | | /* XXSETACCZ */ |
16046 | | 7903, |
16047 | | /* XXSETACCZW */ |
16048 | | 7904, |
16049 | | /* XXSLDWI */ |
16050 | | 7905, |
16051 | | /* XXSLDWIs */ |
16052 | | 7909, |
16053 | | /* XXSPLTI32DX */ |
16054 | | 7912, |
16055 | | /* XXSPLTIB */ |
16056 | | 7916, |
16057 | | /* XXSPLTIDP */ |
16058 | | 7918, |
16059 | | /* XXSPLTIW */ |
16060 | | 7920, |
16061 | | /* XXSPLTW */ |
16062 | | 7922, |
16063 | | /* XXSPLTWs */ |
16064 | | 7925, |
16065 | | /* gBC */ |
16066 | | 7928, |
16067 | | /* gBCA */ |
16068 | | 7931, |
16069 | | /* gBCAat */ |
16070 | | 7934, |
16071 | | /* gBCCTR */ |
16072 | | 7938, |
16073 | | /* gBCCTRL */ |
16074 | | 7941, |
16075 | | /* gBCL */ |
16076 | | 7944, |
16077 | | /* gBCLA */ |
16078 | | 7947, |
16079 | | /* gBCLAat */ |
16080 | | 7950, |
16081 | | /* gBCLR */ |
16082 | | 7954, |
16083 | | /* gBCLRL */ |
16084 | | 7957, |
16085 | | /* gBCLat */ |
16086 | | 7960, |
16087 | | /* gBCat */ |
16088 | | 7964, |
16089 | | }; |
16090 | | |
16091 | | using namespace OpTypes; |
16092 | | static const int16_t OpcodeOperandTypes[] = { |
16093 | | |
16094 | | /* PHI */ |
16095 | | -1, |
16096 | | /* INLINEASM */ |
16097 | | /* INLINEASM_BR */ |
16098 | | /* CFI_INSTRUCTION */ |
16099 | | i32imm, |
16100 | | /* EH_LABEL */ |
16101 | | i32imm, |
16102 | | /* GC_LABEL */ |
16103 | | i32imm, |
16104 | | /* ANNOTATION_LABEL */ |
16105 | | i32imm, |
16106 | | /* KILL */ |
16107 | | /* EXTRACT_SUBREG */ |
16108 | | -1, -1, i32imm, |
16109 | | /* INSERT_SUBREG */ |
16110 | | -1, -1, -1, i32imm, |
16111 | | /* IMPLICIT_DEF */ |
16112 | | -1, |
16113 | | /* SUBREG_TO_REG */ |
16114 | | -1, -1, -1, i32imm, |
16115 | | /* COPY_TO_REGCLASS */ |
16116 | | -1, -1, i32imm, |
16117 | | /* DBG_VALUE */ |
16118 | | /* DBG_VALUE_LIST */ |
16119 | | /* DBG_INSTR_REF */ |
16120 | | /* DBG_PHI */ |
16121 | | /* DBG_LABEL */ |
16122 | | -1, |
16123 | | /* REG_SEQUENCE */ |
16124 | | -1, -1, |
16125 | | /* COPY */ |
16126 | | -1, -1, |
16127 | | /* BUNDLE */ |
16128 | | /* LIFETIME_START */ |
16129 | | i32imm, |
16130 | | /* LIFETIME_END */ |
16131 | | i32imm, |
16132 | | /* PSEUDO_PROBE */ |
16133 | | i64imm, i64imm, i8imm, i32imm, |
16134 | | /* ARITH_FENCE */ |
16135 | | -1, -1, |
16136 | | /* STACKMAP */ |
16137 | | i64imm, i32imm, |
16138 | | /* FENTRY_CALL */ |
16139 | | /* PATCHPOINT */ |
16140 | | -1, i64imm, i32imm, -1, i32imm, i32imm, |
16141 | | /* LOAD_STACK_GUARD */ |
16142 | | -1, |
16143 | | /* PREALLOCATED_SETUP */ |
16144 | | i32imm, |
16145 | | /* PREALLOCATED_ARG */ |
16146 | | -1, i32imm, i32imm, |
16147 | | /* STATEPOINT */ |
16148 | | /* LOCAL_ESCAPE */ |
16149 | | -1, i32imm, |
16150 | | /* FAULTING_OP */ |
16151 | | -1, |
16152 | | /* PATCHABLE_OP */ |
16153 | | /* PATCHABLE_FUNCTION_ENTER */ |
16154 | | /* PATCHABLE_RET */ |
16155 | | /* PATCHABLE_FUNCTION_EXIT */ |
16156 | | /* PATCHABLE_TAIL_CALL */ |
16157 | | /* PATCHABLE_EVENT_CALL */ |
16158 | | -1, -1, |
16159 | | /* PATCHABLE_TYPED_EVENT_CALL */ |
16160 | | -1, -1, -1, |
16161 | | /* ICALL_BRANCH_FUNNEL */ |
16162 | | /* MEMBARRIER */ |
16163 | | /* JUMP_TABLE_DEBUG_INFO */ |
16164 | | i64imm, |
16165 | | /* G_ASSERT_SEXT */ |
16166 | | type0, type0, untyped_imm_0, |
16167 | | /* G_ASSERT_ZEXT */ |
16168 | | type0, type0, untyped_imm_0, |
16169 | | /* G_ASSERT_ALIGN */ |
16170 | | type0, type0, untyped_imm_0, |
16171 | | /* G_ADD */ |
16172 | | type0, type0, type0, |
16173 | | /* G_SUB */ |
16174 | | type0, type0, type0, |
16175 | | /* G_MUL */ |
16176 | | type0, type0, type0, |
16177 | | /* G_SDIV */ |
16178 | | type0, type0, type0, |
16179 | | /* G_UDIV */ |
16180 | | type0, type0, type0, |
16181 | | /* G_SREM */ |
16182 | | type0, type0, type0, |
16183 | | /* G_UREM */ |
16184 | | type0, type0, type0, |
16185 | | /* G_SDIVREM */ |
16186 | | type0, type0, type0, type0, |
16187 | | /* G_UDIVREM */ |
16188 | | type0, type0, type0, type0, |
16189 | | /* G_AND */ |
16190 | | type0, type0, type0, |
16191 | | /* G_OR */ |
16192 | | type0, type0, type0, |
16193 | | /* G_XOR */ |
16194 | | type0, type0, type0, |
16195 | | /* G_IMPLICIT_DEF */ |
16196 | | type0, |
16197 | | /* G_PHI */ |
16198 | | type0, |
16199 | | /* G_FRAME_INDEX */ |
16200 | | type0, -1, |
16201 | | /* G_GLOBAL_VALUE */ |
16202 | | type0, -1, |
16203 | | /* G_CONSTANT_POOL */ |
16204 | | type0, -1, |
16205 | | /* G_EXTRACT */ |
16206 | | type0, type1, untyped_imm_0, |
16207 | | /* G_UNMERGE_VALUES */ |
16208 | | type0, type1, |
16209 | | /* G_INSERT */ |
16210 | | type0, type0, type1, untyped_imm_0, |
16211 | | /* G_MERGE_VALUES */ |
16212 | | type0, type1, |
16213 | | /* G_BUILD_VECTOR */ |
16214 | | type0, type1, |
16215 | | /* G_BUILD_VECTOR_TRUNC */ |
16216 | | type0, type1, |
16217 | | /* G_CONCAT_VECTORS */ |
16218 | | type0, type1, |
16219 | | /* G_PTRTOINT */ |
16220 | | type0, type1, |
16221 | | /* G_INTTOPTR */ |
16222 | | type0, type1, |
16223 | | /* G_BITCAST */ |
16224 | | type0, type1, |
16225 | | /* G_FREEZE */ |
16226 | | type0, type0, |
16227 | | /* G_CONSTANT_FOLD_BARRIER */ |
16228 | | type0, type0, |
16229 | | /* G_INTRINSIC_FPTRUNC_ROUND */ |
16230 | | type0, type1, i32imm, |
16231 | | /* G_INTRINSIC_TRUNC */ |
16232 | | type0, type0, |
16233 | | /* G_INTRINSIC_ROUND */ |
16234 | | type0, type0, |
16235 | | /* G_INTRINSIC_LRINT */ |
16236 | | type0, type1, |
16237 | | /* G_INTRINSIC_ROUNDEVEN */ |
16238 | | type0, type0, |
16239 | | /* G_READCYCLECOUNTER */ |
16240 | | type0, |
16241 | | /* G_LOAD */ |
16242 | | type0, ptype1, |
16243 | | /* G_SEXTLOAD */ |
16244 | | type0, ptype1, |
16245 | | /* G_ZEXTLOAD */ |
16246 | | type0, ptype1, |
16247 | | /* G_INDEXED_LOAD */ |
16248 | | type0, ptype1, ptype1, type2, -1, |
16249 | | /* G_INDEXED_SEXTLOAD */ |
16250 | | type0, ptype1, ptype1, type2, -1, |
16251 | | /* G_INDEXED_ZEXTLOAD */ |
16252 | | type0, ptype1, ptype1, type2, -1, |
16253 | | /* G_STORE */ |
16254 | | type0, ptype1, |
16255 | | /* G_INDEXED_STORE */ |
16256 | | ptype0, type1, ptype0, ptype2, -1, |
16257 | | /* G_ATOMIC_CMPXCHG_WITH_SUCCESS */ |
16258 | | type0, type1, type2, type0, type0, |
16259 | | /* G_ATOMIC_CMPXCHG */ |
16260 | | type0, ptype1, type0, type0, |
16261 | | /* G_ATOMICRMW_XCHG */ |
16262 | | type0, ptype1, type0, |
16263 | | /* G_ATOMICRMW_ADD */ |
16264 | | type0, ptype1, type0, |
16265 | | /* G_ATOMICRMW_SUB */ |
16266 | | type0, ptype1, type0, |
16267 | | /* G_ATOMICRMW_AND */ |
16268 | | type0, ptype1, type0, |
16269 | | /* G_ATOMICRMW_NAND */ |
16270 | | type0, ptype1, type0, |
16271 | | /* G_ATOMICRMW_OR */ |
16272 | | type0, ptype1, type0, |
16273 | | /* G_ATOMICRMW_XOR */ |
16274 | | type0, ptype1, type0, |
16275 | | /* G_ATOMICRMW_MAX */ |
16276 | | type0, ptype1, type0, |
16277 | | /* G_ATOMICRMW_MIN */ |
16278 | | type0, ptype1, type0, |
16279 | | /* G_ATOMICRMW_UMAX */ |
16280 | | type0, ptype1, type0, |
16281 | | /* G_ATOMICRMW_UMIN */ |
16282 | | type0, ptype1, type0, |
16283 | | /* G_ATOMICRMW_FADD */ |
16284 | | type0, ptype1, type0, |
16285 | | /* G_ATOMICRMW_FSUB */ |
16286 | | type0, ptype1, type0, |
16287 | | /* G_ATOMICRMW_FMAX */ |
16288 | | type0, ptype1, type0, |
16289 | | /* G_ATOMICRMW_FMIN */ |
16290 | | type0, ptype1, type0, |
16291 | | /* G_ATOMICRMW_UINC_WRAP */ |
16292 | | type0, ptype1, type0, |
16293 | | /* G_ATOMICRMW_UDEC_WRAP */ |
16294 | | type0, ptype1, type0, |
16295 | | /* G_FENCE */ |
16296 | | i32imm, i32imm, |
16297 | | /* G_PREFETCH */ |
16298 | | ptype0, i32imm, i32imm, i32imm, |
16299 | | /* G_BRCOND */ |
16300 | | type0, -1, |
16301 | | /* G_BRINDIRECT */ |
16302 | | type0, |
16303 | | /* G_INVOKE_REGION_START */ |
16304 | | /* G_INTRINSIC */ |
16305 | | -1, |
16306 | | /* G_INTRINSIC_W_SIDE_EFFECTS */ |
16307 | | -1, |
16308 | | /* G_INTRINSIC_CONVERGENT */ |
16309 | | -1, |
16310 | | /* G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS */ |
16311 | | -1, |
16312 | | /* G_ANYEXT */ |
16313 | | type0, type1, |
16314 | | /* G_TRUNC */ |
16315 | | type0, type1, |
16316 | | /* G_CONSTANT */ |
16317 | | type0, -1, |
16318 | | /* G_FCONSTANT */ |
16319 | | type0, -1, |
16320 | | /* G_VASTART */ |
16321 | | type0, |
16322 | | /* G_VAARG */ |
16323 | | type0, type1, -1, |
16324 | | /* G_SEXT */ |
16325 | | type0, type1, |
16326 | | /* G_SEXT_INREG */ |
16327 | | type0, type0, untyped_imm_0, |
16328 | | /* G_ZEXT */ |
16329 | | type0, type1, |
16330 | | /* G_SHL */ |
16331 | | type0, type0, type1, |
16332 | | /* G_LSHR */ |
16333 | | type0, type0, type1, |
16334 | | /* G_ASHR */ |
16335 | | type0, type0, type1, |
16336 | | /* G_FSHL */ |
16337 | | type0, type0, type0, type1, |
16338 | | /* G_FSHR */ |
16339 | | type0, type0, type0, type1, |
16340 | | /* G_ROTR */ |
16341 | | type0, type0, type1, |
16342 | | /* G_ROTL */ |
16343 | | type0, type0, type1, |
16344 | | /* G_ICMP */ |
16345 | | type0, -1, type1, type1, |
16346 | | /* G_FCMP */ |
16347 | | type0, -1, type1, type1, |
16348 | | /* G_SELECT */ |
16349 | | type0, type1, type0, type0, |
16350 | | /* G_UADDO */ |
16351 | | type0, type1, type0, type0, |
16352 | | /* G_UADDE */ |
16353 | | type0, type1, type0, type0, type1, |
16354 | | /* G_USUBO */ |
16355 | | type0, type1, type0, type0, |
16356 | | /* G_USUBE */ |
16357 | | type0, type1, type0, type0, type1, |
16358 | | /* G_SADDO */ |
16359 | | type0, type1, type0, type0, |
16360 | | /* G_SADDE */ |
16361 | | type0, type1, type0, type0, type1, |
16362 | | /* G_SSUBO */ |
16363 | | type0, type1, type0, type0, |
16364 | | /* G_SSUBE */ |
16365 | | type0, type1, type0, type0, type1, |
16366 | | /* G_UMULO */ |
16367 | | type0, type1, type0, type0, |
16368 | | /* G_SMULO */ |
16369 | | type0, type1, type0, type0, |
16370 | | /* G_UMULH */ |
16371 | | type0, type0, type0, |
16372 | | /* G_SMULH */ |
16373 | | type0, type0, type0, |
16374 | | /* G_UADDSAT */ |
16375 | | type0, type0, type0, |
16376 | | /* G_SADDSAT */ |
16377 | | type0, type0, type0, |
16378 | | /* G_USUBSAT */ |
16379 | | type0, type0, type0, |
16380 | | /* G_SSUBSAT */ |
16381 | | type0, type0, type0, |
16382 | | /* G_USHLSAT */ |
16383 | | type0, type0, type1, |
16384 | | /* G_SSHLSAT */ |
16385 | | type0, type0, type1, |
16386 | | /* G_SMULFIX */ |
16387 | | type0, type0, type0, untyped_imm_0, |
16388 | | /* G_UMULFIX */ |
16389 | | type0, type0, type0, untyped_imm_0, |
16390 | | /* G_SMULFIXSAT */ |
16391 | | type0, type0, type0, untyped_imm_0, |
16392 | | /* G_UMULFIXSAT */ |
16393 | | type0, type0, type0, untyped_imm_0, |
16394 | | /* G_SDIVFIX */ |
16395 | | type0, type0, type0, untyped_imm_0, |
16396 | | /* G_UDIVFIX */ |
16397 | | type0, type0, type0, untyped_imm_0, |
16398 | | /* G_SDIVFIXSAT */ |
16399 | | type0, type0, type0, untyped_imm_0, |
16400 | | /* G_UDIVFIXSAT */ |
16401 | | type0, type0, type0, untyped_imm_0, |
16402 | | /* G_FADD */ |
16403 | | type0, type0, type0, |
16404 | | /* G_FSUB */ |
16405 | | type0, type0, type0, |
16406 | | /* G_FMUL */ |
16407 | | type0, type0, type0, |
16408 | | /* G_FMA */ |
16409 | | type0, type0, type0, type0, |
16410 | | /* G_FMAD */ |
16411 | | type0, type0, type0, type0, |
16412 | | /* G_FDIV */ |
16413 | | type0, type0, type0, |
16414 | | /* G_FREM */ |
16415 | | type0, type0, type0, |
16416 | | /* G_FPOW */ |
16417 | | type0, type0, type0, |
16418 | | /* G_FPOWI */ |
16419 | | type0, type0, type1, |
16420 | | /* G_FEXP */ |
16421 | | type0, type0, |
16422 | | /* G_FEXP2 */ |
16423 | | type0, type0, |
16424 | | /* G_FEXP10 */ |
16425 | | type0, type0, |
16426 | | /* G_FLOG */ |
16427 | | type0, type0, |
16428 | | /* G_FLOG2 */ |
16429 | | type0, type0, |
16430 | | /* G_FLOG10 */ |
16431 | | type0, type0, |
16432 | | /* G_FLDEXP */ |
16433 | | type0, type0, type1, |
16434 | | /* G_FFREXP */ |
16435 | | type0, type1, type0, |
16436 | | /* G_FNEG */ |
16437 | | type0, type0, |
16438 | | /* G_FPEXT */ |
16439 | | type0, type1, |
16440 | | /* G_FPTRUNC */ |
16441 | | type0, type1, |
16442 | | /* G_FPTOSI */ |
16443 | | type0, type1, |
16444 | | /* G_FPTOUI */ |
16445 | | type0, type1, |
16446 | | /* G_SITOFP */ |
16447 | | type0, type1, |
16448 | | /* G_UITOFP */ |
16449 | | type0, type1, |
16450 | | /* G_FABS */ |
16451 | | type0, type0, |
16452 | | /* G_FCOPYSIGN */ |
16453 | | type0, type0, type1, |
16454 | | /* G_IS_FPCLASS */ |
16455 | | type0, type1, -1, |
16456 | | /* G_FCANONICALIZE */ |
16457 | | type0, type0, |
16458 | | /* G_FMINNUM */ |
16459 | | type0, type0, type0, |
16460 | | /* G_FMAXNUM */ |
16461 | | type0, type0, type0, |
16462 | | /* G_FMINNUM_IEEE */ |
16463 | | type0, type0, type0, |
16464 | | /* G_FMAXNUM_IEEE */ |
16465 | | type0, type0, type0, |
16466 | | /* G_FMINIMUM */ |
16467 | | type0, type0, type0, |
16468 | | /* G_FMAXIMUM */ |
16469 | | type0, type0, type0, |
16470 | | /* G_GET_FPENV */ |
16471 | | type0, |
16472 | | /* G_SET_FPENV */ |
16473 | | type0, |
16474 | | /* G_RESET_FPENV */ |
16475 | | /* G_GET_FPMODE */ |
16476 | | type0, |
16477 | | /* G_SET_FPMODE */ |
16478 | | type0, |
16479 | | /* G_RESET_FPMODE */ |
16480 | | /* G_PTR_ADD */ |
16481 | | ptype0, ptype0, type1, |
16482 | | /* G_PTRMASK */ |
16483 | | ptype0, ptype0, type1, |
16484 | | /* G_SMIN */ |
16485 | | type0, type0, type0, |
16486 | | /* G_SMAX */ |
16487 | | type0, type0, type0, |
16488 | | /* G_UMIN */ |
16489 | | type0, type0, type0, |
16490 | | /* G_UMAX */ |
16491 | | type0, type0, type0, |
16492 | | /* G_ABS */ |
16493 | | type0, type0, |
16494 | | /* G_LROUND */ |
16495 | | type0, type1, |
16496 | | /* G_LLROUND */ |
16497 | | type0, type1, |
16498 | | /* G_BR */ |
16499 | | -1, |
16500 | | /* G_BRJT */ |
16501 | | ptype0, -1, type1, |
16502 | | /* G_INSERT_VECTOR_ELT */ |
16503 | | type0, type0, type1, type2, |
16504 | | /* G_EXTRACT_VECTOR_ELT */ |
16505 | | type0, type1, type2, |
16506 | | /* G_SHUFFLE_VECTOR */ |
16507 | | type0, type1, type1, -1, |
16508 | | /* G_CTTZ */ |
16509 | | type0, type1, |
16510 | | /* G_CTTZ_ZERO_UNDEF */ |
16511 | | type0, type1, |
16512 | | /* G_CTLZ */ |
16513 | | type0, type1, |
16514 | | /* G_CTLZ_ZERO_UNDEF */ |
16515 | | type0, type1, |
16516 | | /* G_CTPOP */ |
16517 | | type0, type1, |
16518 | | /* G_BSWAP */ |
16519 | | type0, type0, |
16520 | | /* G_BITREVERSE */ |
16521 | | type0, type0, |
16522 | | /* G_FCEIL */ |
16523 | | type0, type0, |
16524 | | /* G_FCOS */ |
16525 | | type0, type0, |
16526 | | /* G_FSIN */ |
16527 | | type0, type0, |
16528 | | /* G_FSQRT */ |
16529 | | type0, type0, |
16530 | | /* G_FFLOOR */ |
16531 | | type0, type0, |
16532 | | /* G_FRINT */ |
16533 | | type0, type0, |
16534 | | /* G_FNEARBYINT */ |
16535 | | type0, type0, |
16536 | | /* G_ADDRSPACE_CAST */ |
16537 | | type0, type1, |
16538 | | /* G_BLOCK_ADDR */ |
16539 | | type0, -1, |
16540 | | /* G_JUMP_TABLE */ |
16541 | | type0, -1, |
16542 | | /* G_DYN_STACKALLOC */ |
16543 | | ptype0, type1, i32imm, |
16544 | | /* G_STACKSAVE */ |
16545 | | ptype0, |
16546 | | /* G_STACKRESTORE */ |
16547 | | ptype0, |
16548 | | /* G_STRICT_FADD */ |
16549 | | type0, type0, type0, |
16550 | | /* G_STRICT_FSUB */ |
16551 | | type0, type0, type0, |
16552 | | /* G_STRICT_FMUL */ |
16553 | | type0, type0, type0, |
16554 | | /* G_STRICT_FDIV */ |
16555 | | type0, type0, type0, |
16556 | | /* G_STRICT_FREM */ |
16557 | | type0, type0, type0, |
16558 | | /* G_STRICT_FMA */ |
16559 | | type0, type0, type0, type0, |
16560 | | /* G_STRICT_FSQRT */ |
16561 | | type0, type0, |
16562 | | /* G_STRICT_FLDEXP */ |
16563 | | type0, type0, type1, |
16564 | | /* G_READ_REGISTER */ |
16565 | | type0, -1, |
16566 | | /* G_WRITE_REGISTER */ |
16567 | | -1, type0, |
16568 | | /* G_MEMCPY */ |
16569 | | ptype0, ptype1, type2, untyped_imm_0, |
16570 | | /* G_MEMCPY_INLINE */ |
16571 | | ptype0, ptype1, type2, |
16572 | | /* G_MEMMOVE */ |
16573 | | ptype0, ptype1, type2, untyped_imm_0, |
16574 | | /* G_MEMSET */ |
16575 | | ptype0, type1, type2, untyped_imm_0, |
16576 | | /* G_BZERO */ |
16577 | | ptype0, type1, untyped_imm_0, |
16578 | | /* G_VECREDUCE_SEQ_FADD */ |
16579 | | type0, type1, type2, |
16580 | | /* G_VECREDUCE_SEQ_FMUL */ |
16581 | | type0, type1, type2, |
16582 | | /* G_VECREDUCE_FADD */ |
16583 | | type0, type1, |
16584 | | /* G_VECREDUCE_FMUL */ |
16585 | | type0, type1, |
16586 | | /* G_VECREDUCE_FMAX */ |
16587 | | type0, type1, |
16588 | | /* G_VECREDUCE_FMIN */ |
16589 | | type0, type1, |
16590 | | /* G_VECREDUCE_FMAXIMUM */ |
16591 | | type0, type1, |
16592 | | /* G_VECREDUCE_FMINIMUM */ |
16593 | | type0, type1, |
16594 | | /* G_VECREDUCE_ADD */ |
16595 | | type0, type1, |
16596 | | /* G_VECREDUCE_MUL */ |
16597 | | type0, type1, |
16598 | | /* G_VECREDUCE_AND */ |
16599 | | type0, type1, |
16600 | | /* G_VECREDUCE_OR */ |
16601 | | type0, type1, |
16602 | | /* G_VECREDUCE_XOR */ |
16603 | | type0, type1, |
16604 | | /* G_VECREDUCE_SMAX */ |
16605 | | type0, type1, |
16606 | | /* G_VECREDUCE_SMIN */ |
16607 | | type0, type1, |
16608 | | /* G_VECREDUCE_UMAX */ |
16609 | | type0, type1, |
16610 | | /* G_VECREDUCE_UMIN */ |
16611 | | type0, type1, |
16612 | | /* G_SBFX */ |
16613 | | type0, type0, type1, type1, |
16614 | | /* G_UBFX */ |
16615 | | type0, type0, type1, type1, |
16616 | | /* ATOMIC_CMP_SWAP_I128 */ |
16617 | | g8prc, g8prc, ptr_rc_nor0, ptr_rc_idx, g8rc, g8rc, g8rc, g8rc, |
16618 | | /* ATOMIC_LOAD_ADD_I128 */ |
16619 | | g8prc, g8prc, ptr_rc_nor0, ptr_rc_idx, g8rc, g8rc, |
16620 | | /* ATOMIC_LOAD_AND_I128 */ |
16621 | | g8prc, g8prc, ptr_rc_nor0, ptr_rc_idx, g8rc, g8rc, |
16622 | | /* ATOMIC_LOAD_NAND_I128 */ |
16623 | | g8prc, g8prc, ptr_rc_nor0, ptr_rc_idx, g8rc, g8rc, |
16624 | | /* ATOMIC_LOAD_OR_I128 */ |
16625 | | g8prc, g8prc, ptr_rc_nor0, ptr_rc_idx, g8rc, g8rc, |
16626 | | /* ATOMIC_LOAD_SUB_I128 */ |
16627 | | g8prc, g8prc, ptr_rc_nor0, ptr_rc_idx, g8rc, g8rc, |
16628 | | /* ATOMIC_LOAD_XOR_I128 */ |
16629 | | g8prc, g8prc, ptr_rc_nor0, ptr_rc_idx, g8rc, g8rc, |
16630 | | /* ATOMIC_SWAP_I128 */ |
16631 | | g8prc, g8prc, ptr_rc_nor0, ptr_rc_idx, g8rc, g8rc, |
16632 | | /* BUILD_QUADWORD */ |
16633 | | g8prc, g8rc, g8rc, |
16634 | | /* BUILD_UACC */ |
16635 | | acc, uacc, |
16636 | | /* CFENCE */ |
16637 | | gprc, |
16638 | | /* CFENCE8 */ |
16639 | | g8rc, |
16640 | | /* CLRLSLDI */ |
16641 | | g8rc, g8rc, u6imm, u6imm, |
16642 | | /* CLRLSLDI_rec */ |
16643 | | g8rc, g8rc, u6imm, u6imm, |
16644 | | /* CLRLSLWI */ |
16645 | | gprc, gprc, u5imm, u5imm, |
16646 | | /* CLRLSLWI_rec */ |
16647 | | gprc, gprc, u5imm, u5imm, |
16648 | | /* CLRRDI */ |
16649 | | g8rc, g8rc, u6imm, |
16650 | | /* CLRRDI_rec */ |
16651 | | g8rc, g8rc, u6imm, |
16652 | | /* CLRRWI */ |
16653 | | gprc, gprc, u5imm, |
16654 | | /* CLRRWI_rec */ |
16655 | | gprc, gprc, u5imm, |
16656 | | /* DCBFL */ |
16657 | | ptr_rc_nor0, ptr_rc_idx, |
16658 | | /* DCBFLP */ |
16659 | | ptr_rc_nor0, ptr_rc_idx, |
16660 | | /* DCBFPS */ |
16661 | | ptr_rc_nor0, ptr_rc_idx, |
16662 | | /* DCBFx */ |
16663 | | ptr_rc_nor0, ptr_rc_idx, |
16664 | | /* DCBSTPS */ |
16665 | | ptr_rc_nor0, ptr_rc_idx, |
16666 | | /* DCBTCT */ |
16667 | | ptr_rc_nor0, ptr_rc_idx, u5imm, |
16668 | | /* DCBTDS */ |
16669 | | ptr_rc_nor0, ptr_rc_idx, u5imm, |
16670 | | /* DCBTSTCT */ |
16671 | | ptr_rc_nor0, ptr_rc_idx, u5imm, |
16672 | | /* DCBTSTDS */ |
16673 | | ptr_rc_nor0, ptr_rc_idx, u5imm, |
16674 | | /* DCBTSTT */ |
16675 | | ptr_rc_nor0, ptr_rc_idx, |
16676 | | /* DCBTSTx */ |
16677 | | ptr_rc_nor0, ptr_rc_idx, |
16678 | | /* DCBTT */ |
16679 | | ptr_rc_nor0, ptr_rc_idx, |
16680 | | /* DCBTx */ |
16681 | | ptr_rc_nor0, ptr_rc_idx, |
16682 | | /* DFLOADf32 */ |
16683 | | vssrc, dispRIX, ptr_rc_nor0, |
16684 | | /* DFLOADf64 */ |
16685 | | vsfrc, dispRIX, ptr_rc_nor0, |
16686 | | /* DFSTOREf32 */ |
16687 | | vssrc, dispRIX, ptr_rc_nor0, |
16688 | | /* DFSTOREf64 */ |
16689 | | vsfrc, dispRIX, ptr_rc_nor0, |
16690 | | /* EXTLDI */ |
16691 | | g8rc, g8rc, u6imm, u6imm, |
16692 | | /* EXTLDI_rec */ |
16693 | | g8rc, g8rc, u6imm, u6imm, |
16694 | | /* EXTLWI */ |
16695 | | gprc, gprc, u5imm, u5imm, |
16696 | | /* EXTLWI_rec */ |
16697 | | gprc, gprc, u5imm, u5imm, |
16698 | | /* EXTRDI */ |
16699 | | g8rc, g8rc, u6imm, u6imm, |
16700 | | /* EXTRDI_rec */ |
16701 | | g8rc, g8rc, u6imm, u6imm, |
16702 | | /* EXTRWI */ |
16703 | | gprc, gprc, u5imm, u5imm, |
16704 | | /* EXTRWI_rec */ |
16705 | | gprc, gprc, u5imm, u5imm, |
16706 | | /* INSLWI */ |
16707 | | gprc, gprc, u5imm, u5imm, |
16708 | | /* INSLWI_rec */ |
16709 | | gprc, gprc, u5imm, u5imm, |
16710 | | /* INSRDI */ |
16711 | | g8rc, g8rc, u6imm, u6imm, |
16712 | | /* INSRDI_rec */ |
16713 | | g8rc, g8rc, u6imm, u6imm, |
16714 | | /* INSRWI */ |
16715 | | gprc, gprc, u5imm, u5imm, |
16716 | | /* INSRWI_rec */ |
16717 | | gprc, gprc, u5imm, u5imm, |
16718 | | /* KILL_PAIR */ |
16719 | | vsrprc, vsrprc, |
16720 | | /* LAx */ |
16721 | | gprc, dispRI, ptr_rc_nor0, |
16722 | | /* LIWAX */ |
16723 | | vsfrc, ptr_rc_nor0, ptr_rc_idx, |
16724 | | /* LIWZX */ |
16725 | | vsfrc, ptr_rc_nor0, ptr_rc_idx, |
16726 | | /* PSUBI */ |
16727 | | g8rc, g8rc_nox0, s34imm, |
16728 | | /* RLWIMIbm */ |
16729 | | g8rc, g8rc, u5imm, i32imm, |
16730 | | /* RLWIMIbm_rec */ |
16731 | | g8rc, g8rc, u5imm, i32imm, |
16732 | | /* RLWINMbm */ |
16733 | | g8rc, g8rc, u5imm, i32imm, |
16734 | | /* RLWINMbm_rec */ |
16735 | | g8rc, g8rc, u5imm, i32imm, |
16736 | | /* RLWNMbm */ |
16737 | | g8rc, g8rc, u5imm, i32imm, |
16738 | | /* RLWNMbm_rec */ |
16739 | | g8rc, g8rc, u5imm, i32imm, |
16740 | | /* ROTRDI */ |
16741 | | g8rc, g8rc, u6imm, |
16742 | | /* ROTRDI_rec */ |
16743 | | g8rc, g8rc, u6imm, |
16744 | | /* ROTRWI */ |
16745 | | gprc, gprc, u5imm, |
16746 | | /* ROTRWI_rec */ |
16747 | | gprc, gprc, u5imm, |
16748 | | /* SLDI */ |
16749 | | g8rc, g8rc, u6imm, |
16750 | | /* SLDI_rec */ |
16751 | | g8rc, g8rc, u6imm, |
16752 | | /* SLWI */ |
16753 | | gprc, gprc, u5imm, |
16754 | | /* SLWI_rec */ |
16755 | | gprc, gprc, u5imm, |
16756 | | /* SPILLTOVSR_LD */ |
16757 | | spilltovsrrc, dispRIX, ptr_rc_nor0, |
16758 | | /* SPILLTOVSR_LDX */ |
16759 | | spilltovsrrc, ptr_rc_nor0, ptr_rc_idx, |
16760 | | /* SPILLTOVSR_ST */ |
16761 | | spilltovsrrc, dispRIX, ptr_rc_nor0, |
16762 | | /* SPILLTOVSR_STX */ |
16763 | | spilltovsrrc, ptr_rc_nor0, ptr_rc_idx, |
16764 | | /* SRDI */ |
16765 | | g8rc, g8rc, u6imm, |
16766 | | /* SRDI_rec */ |
16767 | | g8rc, g8rc, u6imm, |
16768 | | /* SRWI */ |
16769 | | gprc, gprc, u5imm, |
16770 | | /* SRWI_rec */ |
16771 | | gprc, gprc, u5imm, |
16772 | | /* STIWX */ |
16773 | | vsfrc, ptr_rc_nor0, ptr_rc_idx, |
16774 | | /* SUBI */ |
16775 | | gprc, gprc, s16imm, |
16776 | | /* SUBIC */ |
16777 | | gprc, gprc, s16imm, |
16778 | | /* SUBIC_rec */ |
16779 | | gprc, gprc, s16imm, |
16780 | | /* SUBIS */ |
16781 | | gprc, gprc, s16imm, |
16782 | | /* SUBPCIS */ |
16783 | | g8rc, s16imm, |
16784 | | /* XFLOADf32 */ |
16785 | | vssrc, ptr_rc_nor0, ptr_rc_idx, |
16786 | | /* XFLOADf64 */ |
16787 | | vsfrc, ptr_rc_nor0, ptr_rc_idx, |
16788 | | /* XFSTOREf32 */ |
16789 | | vssrc, ptr_rc_nor0, ptr_rc_idx, |
16790 | | /* XFSTOREf64 */ |
16791 | | vsfrc, ptr_rc_nor0, ptr_rc_idx, |
16792 | | /* ADD4 */ |
16793 | | gprc, gprc, gprc, |
16794 | | /* ADD4O */ |
16795 | | gprc, gprc, gprc, |
16796 | | /* ADD4O_rec */ |
16797 | | gprc, gprc, gprc, |
16798 | | /* ADD4TLS */ |
16799 | | gprc, gprc, tlsreg32, |
16800 | | /* ADD4_rec */ |
16801 | | gprc, gprc, gprc, |
16802 | | /* ADD8 */ |
16803 | | g8rc, g8rc, g8rc, |
16804 | | /* ADD8O */ |
16805 | | g8rc, g8rc, g8rc, |
16806 | | /* ADD8O_rec */ |
16807 | | g8rc, g8rc, g8rc, |
16808 | | /* ADD8TLS */ |
16809 | | g8rc, g8rc_nox0, tlsreg, |
16810 | | /* ADD8TLS_ */ |
16811 | | g8rc, g8rc, tlsreg, |
16812 | | /* ADD8_rec */ |
16813 | | g8rc, g8rc, g8rc, |
16814 | | /* ADDC */ |
16815 | | gprc, gprc, gprc, |
16816 | | /* ADDC8 */ |
16817 | | g8rc, g8rc, g8rc, |
16818 | | /* ADDC8O */ |
16819 | | g8rc, g8rc, g8rc, |
16820 | | /* ADDC8O_rec */ |
16821 | | g8rc, g8rc, g8rc, |
16822 | | /* ADDC8_rec */ |
16823 | | g8rc, g8rc, g8rc, |
16824 | | /* ADDCO */ |
16825 | | gprc, gprc, gprc, |
16826 | | /* ADDCO_rec */ |
16827 | | gprc, gprc, gprc, |
16828 | | /* ADDC_rec */ |
16829 | | gprc, gprc, gprc, |
16830 | | /* ADDE */ |
16831 | | gprc, gprc, gprc, |
16832 | | /* ADDE8 */ |
16833 | | g8rc, g8rc, g8rc, |
16834 | | /* ADDE8O */ |
16835 | | g8rc, g8rc, g8rc, |
16836 | | /* ADDE8O_rec */ |
16837 | | g8rc, g8rc, g8rc, |
16838 | | /* ADDE8_rec */ |
16839 | | g8rc, g8rc, g8rc, |
16840 | | /* ADDEO */ |
16841 | | gprc, gprc, gprc, |
16842 | | /* ADDEO_rec */ |
16843 | | gprc, gprc, gprc, |
16844 | | /* ADDEX */ |
16845 | | gprc, gprc, gprc, u2imm, |
16846 | | /* ADDEX8 */ |
16847 | | g8rc, g8rc, g8rc, u2imm, |
16848 | | /* ADDE_rec */ |
16849 | | gprc, gprc, gprc, |
16850 | | /* ADDG6S */ |
16851 | | gprc, gprc, gprc, |
16852 | | /* ADDG6S8 */ |
16853 | | g8rc, g8rc, g8rc, |
16854 | | /* ADDI */ |
16855 | | gprc, gprc_nor0, s16imm, |
16856 | | /* ADDI8 */ |
16857 | | g8rc, g8rc_nox0, s16imm64, |
16858 | | /* ADDIC */ |
16859 | | gprc, gprc, s16imm, |
16860 | | /* ADDIC8 */ |
16861 | | g8rc, g8rc, s16imm64, |
16862 | | /* ADDIC_rec */ |
16863 | | gprc, gprc, s16imm, |
16864 | | /* ADDIS */ |
16865 | | gprc, gprc_nor0, s17imm, |
16866 | | /* ADDIS8 */ |
16867 | | g8rc, g8rc_nox0, s17imm64, |
16868 | | /* ADDISdtprelHA */ |
16869 | | g8rc, g8rc_nox0, s16imm64, |
16870 | | /* ADDISdtprelHA32 */ |
16871 | | gprc, gprc_nor0, s16imm, |
16872 | | /* ADDISgotTprelHA */ |
16873 | | g8rc, g8rc_nox0, s16imm64, |
16874 | | /* ADDIStlsgdHA */ |
16875 | | g8rc, g8rc_nox0, s16imm64, |
16876 | | /* ADDIStlsldHA */ |
16877 | | g8rc, g8rc_nox0, s16imm64, |
16878 | | /* ADDIStocHA */ |
16879 | | gprc, gprc_nor0, i32imm, |
16880 | | /* ADDIStocHA8 */ |
16881 | | g8rc, g8rc_nox0, i64imm, |
16882 | | /* ADDIdtprelL */ |
16883 | | g8rc, g8rc_nox0, s16imm64, |
16884 | | /* ADDIdtprelL32 */ |
16885 | | gprc, gprc_nor0, s16imm, |
16886 | | /* ADDItlsgdL */ |
16887 | | g8rc, g8rc_nox0, s16imm64, |
16888 | | /* ADDItlsgdL32 */ |
16889 | | gprc, gprc_nor0, s16imm, |
16890 | | /* ADDItlsgdLADDR */ |
16891 | | g8rc, g8rc_nox0, s16imm64, tlsgd, |
16892 | | /* ADDItlsgdLADDR32 */ |
16893 | | gprc, gprc_nor0, s16imm, tlsgd32, |
16894 | | /* ADDItlsldL */ |
16895 | | g8rc, g8rc_nox0, s16imm64, |
16896 | | /* ADDItlsldL32 */ |
16897 | | gprc, gprc_nor0, s16imm, |
16898 | | /* ADDItlsldLADDR */ |
16899 | | g8rc, g8rc_nox0, s16imm64, tlsgd, |
16900 | | /* ADDItlsldLADDR32 */ |
16901 | | gprc, gprc_nor0, s16imm, tlsgd32, |
16902 | | /* ADDItoc */ |
16903 | | gprc, i32imm, gprc, |
16904 | | /* ADDItoc8 */ |
16905 | | g8rc, i64imm, g8rc_nox0, |
16906 | | /* ADDItocL */ |
16907 | | g8rc, g8rc_nox0, i64imm, |
16908 | | /* ADDME */ |
16909 | | gprc, gprc, |
16910 | | /* ADDME8 */ |
16911 | | g8rc, g8rc, |
16912 | | /* ADDME8O */ |
16913 | | g8rc, g8rc, |
16914 | | /* ADDME8O_rec */ |
16915 | | g8rc, g8rc, |
16916 | | /* ADDME8_rec */ |
16917 | | g8rc, g8rc, |
16918 | | /* ADDMEO */ |
16919 | | gprc, gprc, |
16920 | | /* ADDMEO_rec */ |
16921 | | gprc, gprc, |
16922 | | /* ADDME_rec */ |
16923 | | gprc, gprc, |
16924 | | /* ADDPCIS */ |
16925 | | g8rc, i32imm, |
16926 | | /* ADDZE */ |
16927 | | gprc, gprc, |
16928 | | /* ADDZE8 */ |
16929 | | g8rc, g8rc, |
16930 | | /* ADDZE8O */ |
16931 | | g8rc, g8rc, |
16932 | | /* ADDZE8O_rec */ |
16933 | | g8rc, g8rc, |
16934 | | /* ADDZE8_rec */ |
16935 | | g8rc, g8rc, |
16936 | | /* ADDZEO */ |
16937 | | gprc, gprc, |
16938 | | /* ADDZEO_rec */ |
16939 | | gprc, gprc, |
16940 | | /* ADDZE_rec */ |
16941 | | gprc, gprc, |
16942 | | /* ADJCALLSTACKDOWN */ |
16943 | | u16imm, u16imm, |
16944 | | /* ADJCALLSTACKUP */ |
16945 | | u16imm, u16imm, |
16946 | | /* AND */ |
16947 | | gprc, gprc, gprc, |
16948 | | /* AND8 */ |
16949 | | g8rc, g8rc, g8rc, |
16950 | | /* AND8_rec */ |
16951 | | g8rc, g8rc, g8rc, |
16952 | | /* ANDC */ |
16953 | | gprc, gprc, gprc, |
16954 | | /* ANDC8 */ |
16955 | | g8rc, g8rc, g8rc, |
16956 | | /* ANDC8_rec */ |
16957 | | g8rc, g8rc, g8rc, |
16958 | | /* ANDC_rec */ |
16959 | | gprc, gprc, gprc, |
16960 | | /* ANDI8_rec */ |
16961 | | g8rc, g8rc, u16imm64, |
16962 | | /* ANDIS8_rec */ |
16963 | | g8rc, g8rc, u16imm64, |
16964 | | /* ANDIS_rec */ |
16965 | | gprc, gprc, u16imm, |
16966 | | /* ANDI_rec */ |
16967 | | gprc, gprc, u16imm, |
16968 | | /* ANDI_rec_1_EQ_BIT */ |
16969 | | crbitrc, gprc, |
16970 | | /* ANDI_rec_1_EQ_BIT8 */ |
16971 | | crbitrc, g8rc, |
16972 | | /* ANDI_rec_1_GT_BIT */ |
16973 | | crbitrc, gprc, |
16974 | | /* ANDI_rec_1_GT_BIT8 */ |
16975 | | crbitrc, g8rc, |
16976 | | /* AND_rec */ |
16977 | | gprc, gprc, gprc, |
16978 | | /* ATOMIC_CMP_SWAP_I16 */ |
16979 | | gprc, ptr_rc_nor0, ptr_rc_idx, gprc, gprc, |
16980 | | /* ATOMIC_CMP_SWAP_I32 */ |
16981 | | gprc, ptr_rc_nor0, ptr_rc_idx, gprc, gprc, |
16982 | | /* ATOMIC_CMP_SWAP_I64 */ |
16983 | | g8rc, ptr_rc_nor0, ptr_rc_idx, g8rc, g8rc, |
16984 | | /* ATOMIC_CMP_SWAP_I8 */ |
16985 | | gprc, ptr_rc_nor0, ptr_rc_idx, gprc, gprc, |
16986 | | /* ATOMIC_LOAD_ADD_I16 */ |
16987 | | gprc, ptr_rc_nor0, ptr_rc_idx, gprc, |
16988 | | /* ATOMIC_LOAD_ADD_I32 */ |
16989 | | gprc, ptr_rc_nor0, ptr_rc_idx, gprc, |
16990 | | /* ATOMIC_LOAD_ADD_I64 */ |
16991 | | g8rc, ptr_rc_nor0, ptr_rc_idx, g8rc, |
16992 | | /* ATOMIC_LOAD_ADD_I8 */ |
16993 | | gprc, ptr_rc_nor0, ptr_rc_idx, gprc, |
16994 | | /* ATOMIC_LOAD_AND_I16 */ |
16995 | | gprc, ptr_rc_nor0, ptr_rc_idx, gprc, |
16996 | | /* ATOMIC_LOAD_AND_I32 */ |
16997 | | gprc, ptr_rc_nor0, ptr_rc_idx, gprc, |
16998 | | /* ATOMIC_LOAD_AND_I64 */ |
16999 | | g8rc, ptr_rc_nor0, ptr_rc_idx, g8rc, |
17000 | | /* ATOMIC_LOAD_AND_I8 */ |
17001 | | gprc, ptr_rc_nor0, ptr_rc_idx, gprc, |
17002 | | /* ATOMIC_LOAD_MAX_I16 */ |
17003 | | gprc, ptr_rc_nor0, ptr_rc_idx, gprc, |
17004 | | /* ATOMIC_LOAD_MAX_I32 */ |
17005 | | gprc, ptr_rc_nor0, ptr_rc_idx, gprc, |
17006 | | /* ATOMIC_LOAD_MAX_I64 */ |
17007 | | g8rc, ptr_rc_nor0, ptr_rc_idx, g8rc, |
17008 | | /* ATOMIC_LOAD_MAX_I8 */ |
17009 | | gprc, ptr_rc_nor0, ptr_rc_idx, gprc, |
17010 | | /* ATOMIC_LOAD_MIN_I16 */ |
17011 | | gprc, ptr_rc_nor0, ptr_rc_idx, gprc, |
17012 | | /* ATOMIC_LOAD_MIN_I32 */ |
17013 | | gprc, ptr_rc_nor0, ptr_rc_idx, gprc, |
17014 | | /* ATOMIC_LOAD_MIN_I64 */ |
17015 | | g8rc, ptr_rc_nor0, ptr_rc_idx, g8rc, |
17016 | | /* ATOMIC_LOAD_MIN_I8 */ |
17017 | | gprc, ptr_rc_nor0, ptr_rc_idx, gprc, |
17018 | | /* ATOMIC_LOAD_NAND_I16 */ |
17019 | | gprc, ptr_rc_nor0, ptr_rc_idx, gprc, |
17020 | | /* ATOMIC_LOAD_NAND_I32 */ |
17021 | | gprc, ptr_rc_nor0, ptr_rc_idx, gprc, |
17022 | | /* ATOMIC_LOAD_NAND_I64 */ |
17023 | | g8rc, ptr_rc_nor0, ptr_rc_idx, g8rc, |
17024 | | /* ATOMIC_LOAD_NAND_I8 */ |
17025 | | gprc, ptr_rc_nor0, ptr_rc_idx, gprc, |
17026 | | /* ATOMIC_LOAD_OR_I16 */ |
17027 | | gprc, ptr_rc_nor0, ptr_rc_idx, gprc, |
17028 | | /* ATOMIC_LOAD_OR_I32 */ |
17029 | | gprc, ptr_rc_nor0, ptr_rc_idx, gprc, |
17030 | | /* ATOMIC_LOAD_OR_I64 */ |
17031 | | g8rc, ptr_rc_nor0, ptr_rc_idx, g8rc, |
17032 | | /* ATOMIC_LOAD_OR_I8 */ |
17033 | | gprc, ptr_rc_nor0, ptr_rc_idx, gprc, |
17034 | | /* ATOMIC_LOAD_SUB_I16 */ |
17035 | | gprc, ptr_rc_nor0, ptr_rc_idx, gprc, |
17036 | | /* ATOMIC_LOAD_SUB_I32 */ |
17037 | | gprc, ptr_rc_nor0, ptr_rc_idx, gprc, |
17038 | | /* ATOMIC_LOAD_SUB_I64 */ |
17039 | | g8rc, ptr_rc_nor0, ptr_rc_idx, g8rc, |
17040 | | /* ATOMIC_LOAD_SUB_I8 */ |
17041 | | gprc, ptr_rc_nor0, ptr_rc_idx, gprc, |
17042 | | /* ATOMIC_LOAD_UMAX_I16 */ |
17043 | | gprc, ptr_rc_nor0, ptr_rc_idx, gprc, |
17044 | | /* ATOMIC_LOAD_UMAX_I32 */ |
17045 | | gprc, ptr_rc_nor0, ptr_rc_idx, gprc, |
17046 | | /* ATOMIC_LOAD_UMAX_I64 */ |
17047 | | g8rc, ptr_rc_nor0, ptr_rc_idx, g8rc, |
17048 | | /* ATOMIC_LOAD_UMAX_I8 */ |
17049 | | gprc, ptr_rc_nor0, ptr_rc_idx, gprc, |
17050 | | /* ATOMIC_LOAD_UMIN_I16 */ |
17051 | | gprc, ptr_rc_nor0, ptr_rc_idx, gprc, |
17052 | | /* ATOMIC_LOAD_UMIN_I32 */ |
17053 | | gprc, ptr_rc_nor0, ptr_rc_idx, gprc, |
17054 | | /* ATOMIC_LOAD_UMIN_I64 */ |
17055 | | g8rc, ptr_rc_nor0, ptr_rc_idx, g8rc, |
17056 | | /* ATOMIC_LOAD_UMIN_I8 */ |
17057 | | gprc, ptr_rc_nor0, ptr_rc_idx, gprc, |
17058 | | /* ATOMIC_LOAD_XOR_I16 */ |
17059 | | gprc, ptr_rc_nor0, ptr_rc_idx, gprc, |
17060 | | /* ATOMIC_LOAD_XOR_I32 */ |
17061 | | gprc, ptr_rc_nor0, ptr_rc_idx, gprc, |
17062 | | /* ATOMIC_LOAD_XOR_I64 */ |
17063 | | g8rc, ptr_rc_nor0, ptr_rc_idx, g8rc, |
17064 | | /* ATOMIC_LOAD_XOR_I8 */ |
17065 | | gprc, ptr_rc_nor0, ptr_rc_idx, gprc, |
17066 | | /* ATOMIC_SWAP_I16 */ |
17067 | | gprc, ptr_rc_nor0, ptr_rc_idx, gprc, |
17068 | | /* ATOMIC_SWAP_I32 */ |
17069 | | gprc, ptr_rc_nor0, ptr_rc_idx, gprc, |
17070 | | /* ATOMIC_SWAP_I64 */ |
17071 | | g8rc, ptr_rc_nor0, ptr_rc_idx, g8rc, |
17072 | | /* ATOMIC_SWAP_I8 */ |
17073 | | gprc, ptr_rc_nor0, ptr_rc_idx, gprc, |
17074 | | /* ATTN */ |
17075 | | /* B */ |
17076 | | directbrtarget, |
17077 | | /* BA */ |
17078 | | absdirectbrtarget, |
17079 | | /* BC */ |
17080 | | crbitrc, condbrtarget, |
17081 | | /* BCC */ |
17082 | | i32imm, crrc, condbrtarget, |
17083 | | /* BCCA */ |
17084 | | i32imm, crrc, abscondbrtarget, |
17085 | | /* BCCCTR */ |
17086 | | i32imm, crrc, |
17087 | | /* BCCCTR8 */ |
17088 | | i32imm, crrc, |
17089 | | /* BCCCTRL */ |
17090 | | i32imm, crrc, |
17091 | | /* BCCCTRL8 */ |
17092 | | i32imm, crrc, |
17093 | | /* BCCL */ |
17094 | | i32imm, crrc, condbrtarget, |
17095 | | /* BCCLA */ |
17096 | | i32imm, crrc, abscondbrtarget, |
17097 | | /* BCCLR */ |
17098 | | i32imm, crrc, |
17099 | | /* BCCLRL */ |
17100 | | i32imm, crrc, |
17101 | | /* BCCTR */ |
17102 | | crbitrc, |
17103 | | /* BCCTR8 */ |
17104 | | crbitrc, |
17105 | | /* BCCTR8n */ |
17106 | | crbitrc, |
17107 | | /* BCCTRL */ |
17108 | | crbitrc, |
17109 | | /* BCCTRL8 */ |
17110 | | crbitrc, |
17111 | | /* BCCTRL8n */ |
17112 | | crbitrc, |
17113 | | /* BCCTRLn */ |
17114 | | crbitrc, |
17115 | | /* BCCTRn */ |
17116 | | crbitrc, |
17117 | | /* BCDADD_rec */ |
17118 | | vrrc, vrrc, vrrc, u1imm, |
17119 | | /* BCDCFN_rec */ |
17120 | | vrrc, vrrc, u1imm, |
17121 | | /* BCDCFSQ_rec */ |
17122 | | vrrc, vrrc, u1imm, |
17123 | | /* BCDCFZ_rec */ |
17124 | | vrrc, vrrc, u1imm, |
17125 | | /* BCDCPSGN_rec */ |
17126 | | vrrc, vrrc, vrrc, |
17127 | | /* BCDCTN_rec */ |
17128 | | vrrc, vrrc, |
17129 | | /* BCDCTSQ_rec */ |
17130 | | vrrc, vrrc, |
17131 | | /* BCDCTZ_rec */ |
17132 | | vrrc, vrrc, u1imm, |
17133 | | /* BCDSETSGN_rec */ |
17134 | | vrrc, vrrc, u1imm, |
17135 | | /* BCDSR_rec */ |
17136 | | vrrc, vrrc, vrrc, u1imm, |
17137 | | /* BCDSUB_rec */ |
17138 | | vrrc, vrrc, vrrc, u1imm, |
17139 | | /* BCDS_rec */ |
17140 | | vrrc, vrrc, vrrc, u1imm, |
17141 | | /* BCDTRUNC_rec */ |
17142 | | vrrc, vrrc, vrrc, u1imm, |
17143 | | /* BCDUS_rec */ |
17144 | | vrrc, vrrc, vrrc, |
17145 | | /* BCDUTRUNC_rec */ |
17146 | | vrrc, vrrc, vrrc, |
17147 | | /* BCL */ |
17148 | | crbitrc, condbrtarget, |
17149 | | /* BCLR */ |
17150 | | crbitrc, |
17151 | | /* BCLRL */ |
17152 | | crbitrc, |
17153 | | /* BCLRLn */ |
17154 | | crbitrc, |
17155 | | /* BCLRn */ |
17156 | | crbitrc, |
17157 | | /* BCLalways */ |
17158 | | condbrtarget, |
17159 | | /* BCLn */ |
17160 | | crbitrc, condbrtarget, |
17161 | | /* BCTR */ |
17162 | | /* BCTR8 */ |
17163 | | /* BCTRL */ |
17164 | | /* BCTRL8 */ |
17165 | | /* BCTRL8_LDinto_toc */ |
17166 | | dispRIX, ptr_rc_nor0, |
17167 | | /* BCTRL8_LDinto_toc_RM */ |
17168 | | dispRIX, ptr_rc_nor0, |
17169 | | /* BCTRL8_RM */ |
17170 | | /* BCTRL_LWZinto_toc */ |
17171 | | dispRI, ptr_rc_nor0, |
17172 | | /* BCTRL_LWZinto_toc_RM */ |
17173 | | dispRI, ptr_rc_nor0, |
17174 | | /* BCTRL_RM */ |
17175 | | /* BCn */ |
17176 | | crbitrc, condbrtarget, |
17177 | | /* BDNZ */ |
17178 | | condbrtarget, |
17179 | | /* BDNZ8 */ |
17180 | | condbrtarget, |
17181 | | /* BDNZA */ |
17182 | | abscondbrtarget, |
17183 | | /* BDNZAm */ |
17184 | | abscondbrtarget, |
17185 | | /* BDNZAp */ |
17186 | | abscondbrtarget, |
17187 | | /* BDNZL */ |
17188 | | condbrtarget, |
17189 | | /* BDNZLA */ |
17190 | | abscondbrtarget, |
17191 | | /* BDNZLAm */ |
17192 | | abscondbrtarget, |
17193 | | /* BDNZLAp */ |
17194 | | abscondbrtarget, |
17195 | | /* BDNZLR */ |
17196 | | /* BDNZLR8 */ |
17197 | | /* BDNZLRL */ |
17198 | | /* BDNZLRLm */ |
17199 | | /* BDNZLRLp */ |
17200 | | /* BDNZLRm */ |
17201 | | /* BDNZLRp */ |
17202 | | /* BDNZLm */ |
17203 | | condbrtarget, |
17204 | | /* BDNZLp */ |
17205 | | condbrtarget, |
17206 | | /* BDNZm */ |
17207 | | condbrtarget, |
17208 | | /* BDNZp */ |
17209 | | condbrtarget, |
17210 | | /* BDZ */ |
17211 | | condbrtarget, |
17212 | | /* BDZ8 */ |
17213 | | condbrtarget, |
17214 | | /* BDZA */ |
17215 | | abscondbrtarget, |
17216 | | /* BDZAm */ |
17217 | | abscondbrtarget, |
17218 | | /* BDZAp */ |
17219 | | abscondbrtarget, |
17220 | | /* BDZL */ |
17221 | | condbrtarget, |
17222 | | /* BDZLA */ |
17223 | | abscondbrtarget, |
17224 | | /* BDZLAm */ |
17225 | | abscondbrtarget, |
17226 | | /* BDZLAp */ |
17227 | | abscondbrtarget, |
17228 | | /* BDZLR */ |
17229 | | /* BDZLR8 */ |
17230 | | /* BDZLRL */ |
17231 | | /* BDZLRLm */ |
17232 | | /* BDZLRLp */ |
17233 | | /* BDZLRm */ |
17234 | | /* BDZLRp */ |
17235 | | /* BDZLm */ |
17236 | | condbrtarget, |
17237 | | /* BDZLp */ |
17238 | | condbrtarget, |
17239 | | /* BDZm */ |
17240 | | condbrtarget, |
17241 | | /* BDZp */ |
17242 | | condbrtarget, |
17243 | | /* BL */ |
17244 | | calltarget, |
17245 | | /* BL8 */ |
17246 | | calltarget, |
17247 | | /* BL8_NOP */ |
17248 | | calltarget, |
17249 | | /* BL8_NOP_RM */ |
17250 | | calltarget, |
17251 | | /* BL8_NOP_TLS */ |
17252 | | calltarget, tlsgd, |
17253 | | /* BL8_NOTOC */ |
17254 | | calltarget, |
17255 | | /* BL8_NOTOC_RM */ |
17256 | | calltarget, |
17257 | | /* BL8_NOTOC_TLS */ |
17258 | | calltarget, tlsgd, |
17259 | | /* BL8_RM */ |
17260 | | calltarget, |
17261 | | /* BL8_TLS */ |
17262 | | calltarget, tlsgd, |
17263 | | /* BL8_TLS_ */ |
17264 | | calltarget, tlsgd, |
17265 | | /* BLA */ |
17266 | | abscalltarget, |
17267 | | /* BLA8 */ |
17268 | | abscalltarget, |
17269 | | /* BLA8_NOP */ |
17270 | | abscalltarget, |
17271 | | /* BLA8_NOP_RM */ |
17272 | | abscalltarget, |
17273 | | /* BLA8_RM */ |
17274 | | abscalltarget, |
17275 | | /* BLA_RM */ |
17276 | | abscalltarget, |
17277 | | /* BLR */ |
17278 | | /* BLR8 */ |
17279 | | /* BLRL */ |
17280 | | /* BL_NOP */ |
17281 | | calltarget, |
17282 | | /* BL_NOP_RM */ |
17283 | | calltarget, |
17284 | | /* BL_RM */ |
17285 | | calltarget, |
17286 | | /* BL_TLS */ |
17287 | | calltarget, tlsgd32, |
17288 | | /* BPERMD */ |
17289 | | g8rc, g8rc, g8rc, |
17290 | | /* BRD */ |
17291 | | g8rc, g8rc, |
17292 | | /* BRH */ |
17293 | | gprc, gprc, |
17294 | | /* BRH8 */ |
17295 | | g8rc, g8rc, |
17296 | | /* BRINC */ |
17297 | | gprc, gprc, gprc, |
17298 | | /* BRW */ |
17299 | | gprc, gprc, |
17300 | | /* BRW8 */ |
17301 | | g8rc, g8rc, |
17302 | | /* CBCDTD */ |
17303 | | gprc, gprc, |
17304 | | /* CBCDTD8 */ |
17305 | | g8rc, g8rc, |
17306 | | /* CDTBCD */ |
17307 | | gprc, gprc, |
17308 | | /* CDTBCD8 */ |
17309 | | g8rc, g8rc, |
17310 | | /* CFUGED */ |
17311 | | g8rc, g8rc, g8rc, |
17312 | | /* CLRBHRB */ |
17313 | | /* CMPB */ |
17314 | | gprc, gprc, gprc, |
17315 | | /* CMPB8 */ |
17316 | | g8rc, g8rc, g8rc, |
17317 | | /* CMPD */ |
17318 | | crrc, g8rc, g8rc, |
17319 | | /* CMPDI */ |
17320 | | crrc, g8rc, s16imm64, |
17321 | | /* CMPEQB */ |
17322 | | crrc, g8rc, g8rc, |
17323 | | /* CMPLD */ |
17324 | | crrc, g8rc, g8rc, |
17325 | | /* CMPLDI */ |
17326 | | crrc, g8rc, u16imm64, |
17327 | | /* CMPLW */ |
17328 | | crrc, gprc, gprc, |
17329 | | /* CMPLWI */ |
17330 | | crrc, gprc, u16imm, |
17331 | | /* CMPRB */ |
17332 | | crrc, u1imm, gprc, gprc, |
17333 | | /* CMPRB8 */ |
17334 | | crrc, u1imm, g8rc, g8rc, |
17335 | | /* CMPW */ |
17336 | | crrc, gprc, gprc, |
17337 | | /* CMPWI */ |
17338 | | crrc, gprc, s16imm, |
17339 | | /* CNTLZD */ |
17340 | | g8rc, g8rc, |
17341 | | /* CNTLZDM */ |
17342 | | g8rc, g8rc, g8rc, |
17343 | | /* CNTLZD_rec */ |
17344 | | g8rc, g8rc, |
17345 | | /* CNTLZW */ |
17346 | | gprc, gprc, |
17347 | | /* CNTLZW8 */ |
17348 | | g8rc, g8rc, |
17349 | | /* CNTLZW8_rec */ |
17350 | | g8rc, g8rc, |
17351 | | /* CNTLZW_rec */ |
17352 | | gprc, gprc, |
17353 | | /* CNTTZD */ |
17354 | | g8rc, g8rc, |
17355 | | /* CNTTZDM */ |
17356 | | g8rc, g8rc, g8rc, |
17357 | | /* CNTTZD_rec */ |
17358 | | g8rc, g8rc, |
17359 | | /* CNTTZW */ |
17360 | | gprc, gprc, |
17361 | | /* CNTTZW8 */ |
17362 | | g8rc, g8rc, |
17363 | | /* CNTTZW8_rec */ |
17364 | | g8rc, g8rc, |
17365 | | /* CNTTZW_rec */ |
17366 | | gprc, gprc, |
17367 | | /* CP_ABORT */ |
17368 | | /* CP_COPY */ |
17369 | | gprc, gprc, u1imm, |
17370 | | /* CP_COPY8 */ |
17371 | | g8rc, g8rc, u1imm, |
17372 | | /* CP_PASTE8_rec */ |
17373 | | g8rc, g8rc, u1imm, |
17374 | | /* CP_PASTE_rec */ |
17375 | | gprc, gprc, u1imm, |
17376 | | /* CR6SET */ |
17377 | | /* CR6UNSET */ |
17378 | | /* CRAND */ |
17379 | | crbitrc, crbitrc, crbitrc, |
17380 | | /* CRANDC */ |
17381 | | crbitrc, crbitrc, crbitrc, |
17382 | | /* CREQV */ |
17383 | | crbitrc, crbitrc, crbitrc, |
17384 | | /* CRNAND */ |
17385 | | crbitrc, crbitrc, crbitrc, |
17386 | | /* CRNOR */ |
17387 | | crbitrc, crbitrc, crbitrc, |
17388 | | /* CRNOT */ |
17389 | | crbitrc, crbitrc, |
17390 | | /* CROR */ |
17391 | | crbitrc, crbitrc, crbitrc, |
17392 | | /* CRORC */ |
17393 | | crbitrc, crbitrc, crbitrc, |
17394 | | /* CRSET */ |
17395 | | crbitrc, |
17396 | | /* CRUNSET */ |
17397 | | crbitrc, |
17398 | | /* CRXOR */ |
17399 | | crbitrc, crbitrc, crbitrc, |
17400 | | /* CTRL_DEP */ |
17401 | | i32imm, crrc, condbrtarget, |
17402 | | /* DADD */ |
17403 | | f8rc, f8rc, f8rc, |
17404 | | /* DADDQ */ |
17405 | | fpairrc, fpairrc, fpairrc, |
17406 | | /* DADDQ_rec */ |
17407 | | fpairrc, fpairrc, fpairrc, |
17408 | | /* DADD_rec */ |
17409 | | f8rc, f8rc, f8rc, |
17410 | | /* DARN */ |
17411 | | g8rc, u2imm, |
17412 | | /* DCBA */ |
17413 | | ptr_rc_nor0, ptr_rc_idx, |
17414 | | /* DCBF */ |
17415 | | u3imm, ptr_rc_nor0, ptr_rc_idx, |
17416 | | /* DCBFEP */ |
17417 | | ptr_rc_nor0, ptr_rc_idx, |
17418 | | /* DCBI */ |
17419 | | ptr_rc_nor0, ptr_rc_idx, |
17420 | | /* DCBST */ |
17421 | | ptr_rc_nor0, ptr_rc_idx, |
17422 | | /* DCBSTEP */ |
17423 | | ptr_rc_nor0, ptr_rc_idx, |
17424 | | /* DCBT */ |
17425 | | u5imm, ptr_rc_nor0, ptr_rc_idx, |
17426 | | /* DCBTEP */ |
17427 | | ptr_rc_nor0, ptr_rc_idx, u5imm, |
17428 | | /* DCBTST */ |
17429 | | u5imm, ptr_rc_nor0, ptr_rc_idx, |
17430 | | /* DCBTSTEP */ |
17431 | | ptr_rc_nor0, ptr_rc_idx, u5imm, |
17432 | | /* DCBZ */ |
17433 | | ptr_rc_nor0, ptr_rc_idx, |
17434 | | /* DCBZEP */ |
17435 | | ptr_rc_nor0, ptr_rc_idx, |
17436 | | /* DCBZL */ |
17437 | | ptr_rc_nor0, ptr_rc_idx, |
17438 | | /* DCBZLEP */ |
17439 | | ptr_rc_nor0, ptr_rc_idx, |
17440 | | /* DCCCI */ |
17441 | | gprc, gprc, |
17442 | | /* DCFFIX */ |
17443 | | f8rc, f8rc, |
17444 | | /* DCFFIXQ */ |
17445 | | fpairrc, f8rc, |
17446 | | /* DCFFIXQQ */ |
17447 | | fpairrc, vrrc, |
17448 | | /* DCFFIXQ_rec */ |
17449 | | fpairrc, f8rc, |
17450 | | /* DCFFIX_rec */ |
17451 | | f8rc, f8rc, |
17452 | | /* DCMPO */ |
17453 | | crrc, f8rc, f8rc, |
17454 | | /* DCMPOQ */ |
17455 | | crrc, fpairrc, fpairrc, |
17456 | | /* DCMPU */ |
17457 | | crrc, f8rc, f8rc, |
17458 | | /* DCMPUQ */ |
17459 | | crrc, fpairrc, fpairrc, |
17460 | | /* DCTDP */ |
17461 | | f8rc, f8rc, |
17462 | | /* DCTDP_rec */ |
17463 | | f8rc, f8rc, |
17464 | | /* DCTFIX */ |
17465 | | f8rc, f8rc, |
17466 | | /* DCTFIXQ */ |
17467 | | f8rc, fpairrc, |
17468 | | /* DCTFIXQQ */ |
17469 | | vrrc, fpairrc, |
17470 | | /* DCTFIXQ_rec */ |
17471 | | f8rc, fpairrc, |
17472 | | /* DCTFIX_rec */ |
17473 | | f8rc, f8rc, |
17474 | | /* DCTQPQ */ |
17475 | | fpairrc, f8rc, |
17476 | | /* DCTQPQ_rec */ |
17477 | | fpairrc, f8rc, |
17478 | | /* DDEDPD */ |
17479 | | f8rc, u2imm, f8rc, |
17480 | | /* DDEDPDQ */ |
17481 | | fpairrc, u2imm, fpairrc, |
17482 | | /* DDEDPDQ_rec */ |
17483 | | fpairrc, u2imm, fpairrc, |
17484 | | /* DDEDPD_rec */ |
17485 | | f8rc, u2imm, f8rc, |
17486 | | /* DDIV */ |
17487 | | f8rc, f8rc, f8rc, |
17488 | | /* DDIVQ */ |
17489 | | fpairrc, fpairrc, fpairrc, |
17490 | | /* DDIVQ_rec */ |
17491 | | fpairrc, fpairrc, fpairrc, |
17492 | | /* DDIV_rec */ |
17493 | | f8rc, f8rc, f8rc, |
17494 | | /* DENBCD */ |
17495 | | f8rc, u1imm, f8rc, |
17496 | | /* DENBCDQ */ |
17497 | | fpairrc, u1imm, fpairrc, |
17498 | | /* DENBCDQ_rec */ |
17499 | | fpairrc, u1imm, fpairrc, |
17500 | | /* DENBCD_rec */ |
17501 | | f8rc, u1imm, f8rc, |
17502 | | /* DIEX */ |
17503 | | f8rc, f8rc, f8rc, |
17504 | | /* DIEXQ */ |
17505 | | fpairrc, f8rc, fpairrc, |
17506 | | /* DIEXQ_rec */ |
17507 | | fpairrc, f8rc, fpairrc, |
17508 | | /* DIEX_rec */ |
17509 | | f8rc, f8rc, f8rc, |
17510 | | /* DIVD */ |
17511 | | g8rc, g8rc, g8rc, |
17512 | | /* DIVDE */ |
17513 | | g8rc, g8rc, g8rc, |
17514 | | /* DIVDEO */ |
17515 | | g8rc, g8rc, g8rc, |
17516 | | /* DIVDEO_rec */ |
17517 | | g8rc, g8rc, g8rc, |
17518 | | /* DIVDEU */ |
17519 | | g8rc, g8rc, g8rc, |
17520 | | /* DIVDEUO */ |
17521 | | g8rc, g8rc, g8rc, |
17522 | | /* DIVDEUO_rec */ |
17523 | | g8rc, g8rc, g8rc, |
17524 | | /* DIVDEU_rec */ |
17525 | | g8rc, g8rc, g8rc, |
17526 | | /* DIVDE_rec */ |
17527 | | g8rc, g8rc, g8rc, |
17528 | | /* DIVDO */ |
17529 | | g8rc, g8rc, g8rc, |
17530 | | /* DIVDO_rec */ |
17531 | | g8rc, g8rc, g8rc, |
17532 | | /* DIVDU */ |
17533 | | g8rc, g8rc, g8rc, |
17534 | | /* DIVDUO */ |
17535 | | g8rc, g8rc, g8rc, |
17536 | | /* DIVDUO_rec */ |
17537 | | g8rc, g8rc, g8rc, |
17538 | | /* DIVDU_rec */ |
17539 | | g8rc, g8rc, g8rc, |
17540 | | /* DIVD_rec */ |
17541 | | g8rc, g8rc, g8rc, |
17542 | | /* DIVW */ |
17543 | | gprc, gprc, gprc, |
17544 | | /* DIVWE */ |
17545 | | gprc, gprc, gprc, |
17546 | | /* DIVWEO */ |
17547 | | gprc, gprc, gprc, |
17548 | | /* DIVWEO_rec */ |
17549 | | gprc, gprc, gprc, |
17550 | | /* DIVWEU */ |
17551 | | gprc, gprc, gprc, |
17552 | | /* DIVWEUO */ |
17553 | | gprc, gprc, gprc, |
17554 | | /* DIVWEUO_rec */ |
17555 | | gprc, gprc, gprc, |
17556 | | /* DIVWEU_rec */ |
17557 | | gprc, gprc, gprc, |
17558 | | /* DIVWE_rec */ |
17559 | | gprc, gprc, gprc, |
17560 | | /* DIVWO */ |
17561 | | gprc, gprc, gprc, |
17562 | | /* DIVWO_rec */ |
17563 | | gprc, gprc, gprc, |
17564 | | /* DIVWU */ |
17565 | | gprc, gprc, gprc, |
17566 | | /* DIVWUO */ |
17567 | | gprc, gprc, gprc, |
17568 | | /* DIVWUO_rec */ |
17569 | | gprc, gprc, gprc, |
17570 | | /* DIVWU_rec */ |
17571 | | gprc, gprc, gprc, |
17572 | | /* DIVW_rec */ |
17573 | | gprc, gprc, gprc, |
17574 | | /* DMMR */ |
17575 | | dmr, dmr, |
17576 | | /* DMSETDMRZ */ |
17577 | | dmr, |
17578 | | /* DMUL */ |
17579 | | f8rc, f8rc, f8rc, |
17580 | | /* DMULQ */ |
17581 | | fpairrc, fpairrc, fpairrc, |
17582 | | /* DMULQ_rec */ |
17583 | | fpairrc, fpairrc, fpairrc, |
17584 | | /* DMUL_rec */ |
17585 | | f8rc, f8rc, f8rc, |
17586 | | /* DMXOR */ |
17587 | | dmr, dmr, dmr, |
17588 | | /* DMXXEXTFDMR256 */ |
17589 | | vsrprc, dmrrowp, u2imm, |
17590 | | /* DMXXEXTFDMR512 */ |
17591 | | vsrprc, vsrprc, wacc, |
17592 | | /* DMXXEXTFDMR512_HI */ |
17593 | | vsrprc, vsrprc, wacc_hi, |
17594 | | /* DMXXINSTFDMR256 */ |
17595 | | dmrrowp, vsrprc, u2imm, |
17596 | | /* DMXXINSTFDMR512 */ |
17597 | | wacc, vsrprc, vsrprc, |
17598 | | /* DMXXINSTFDMR512_HI */ |
17599 | | wacc_hi, vsrprc, vsrprc, |
17600 | | /* DQUA */ |
17601 | | f8rc, f8rc, f8rc, u2imm, |
17602 | | /* DQUAI */ |
17603 | | f8rc, s5imm, f8rc, u2imm, |
17604 | | /* DQUAIQ */ |
17605 | | fpairrc, s5imm, fpairrc, u2imm, |
17606 | | /* DQUAIQ_rec */ |
17607 | | fpairrc, s5imm, fpairrc, u2imm, |
17608 | | /* DQUAI_rec */ |
17609 | | f8rc, s5imm, f8rc, u2imm, |
17610 | | /* DQUAQ */ |
17611 | | fpairrc, fpairrc, fpairrc, u2imm, |
17612 | | /* DQUAQ_rec */ |
17613 | | fpairrc, fpairrc, fpairrc, u2imm, |
17614 | | /* DQUA_rec */ |
17615 | | f8rc, f8rc, f8rc, u2imm, |
17616 | | /* DRDPQ */ |
17617 | | fpairrc, fpairrc, |
17618 | | /* DRDPQ_rec */ |
17619 | | fpairrc, fpairrc, |
17620 | | /* DRINTN */ |
17621 | | f8rc, u1imm, f8rc, u2imm, |
17622 | | /* DRINTNQ */ |
17623 | | fpairrc, u1imm, fpairrc, u2imm, |
17624 | | /* DRINTNQ_rec */ |
17625 | | fpairrc, u1imm, fpairrc, u2imm, |
17626 | | /* DRINTN_rec */ |
17627 | | f8rc, u1imm, f8rc, u2imm, |
17628 | | /* DRINTX */ |
17629 | | f8rc, u1imm, f8rc, u2imm, |
17630 | | /* DRINTXQ */ |
17631 | | fpairrc, u1imm, fpairrc, u2imm, |
17632 | | /* DRINTXQ_rec */ |
17633 | | fpairrc, u1imm, fpairrc, u2imm, |
17634 | | /* DRINTX_rec */ |
17635 | | f8rc, u1imm, f8rc, u2imm, |
17636 | | /* DRRND */ |
17637 | | f8rc, f8rc, f8rc, u2imm, |
17638 | | /* DRRNDQ */ |
17639 | | fpairrc, f8rc, fpairrc, u2imm, |
17640 | | /* DRRNDQ_rec */ |
17641 | | fpairrc, f8rc, fpairrc, u2imm, |
17642 | | /* DRRND_rec */ |
17643 | | f8rc, f8rc, f8rc, u2imm, |
17644 | | /* DRSP */ |
17645 | | f8rc, f8rc, |
17646 | | /* DRSP_rec */ |
17647 | | f8rc, f8rc, |
17648 | | /* DSCLI */ |
17649 | | f8rc, f8rc, u6imm, |
17650 | | /* DSCLIQ */ |
17651 | | fpairrc, fpairrc, u6imm, |
17652 | | /* DSCLIQ_rec */ |
17653 | | fpairrc, fpairrc, u6imm, |
17654 | | /* DSCLI_rec */ |
17655 | | f8rc, f8rc, u6imm, |
17656 | | /* DSCRI */ |
17657 | | f8rc, f8rc, u6imm, |
17658 | | /* DSCRIQ */ |
17659 | | fpairrc, fpairrc, u6imm, |
17660 | | /* DSCRIQ_rec */ |
17661 | | fpairrc, fpairrc, u6imm, |
17662 | | /* DSCRI_rec */ |
17663 | | f8rc, f8rc, u6imm, |
17664 | | /* DSS */ |
17665 | | u5imm, |
17666 | | /* DSSALL */ |
17667 | | /* DST */ |
17668 | | u5imm, gprc, gprc, |
17669 | | /* DST64 */ |
17670 | | u5imm, g8rc, gprc, |
17671 | | /* DSTST */ |
17672 | | u5imm, gprc, gprc, |
17673 | | /* DSTST64 */ |
17674 | | u5imm, g8rc, gprc, |
17675 | | /* DSTSTT */ |
17676 | | u5imm, gprc, gprc, |
17677 | | /* DSTSTT64 */ |
17678 | | u5imm, g8rc, gprc, |
17679 | | /* DSTT */ |
17680 | | u5imm, gprc, gprc, |
17681 | | /* DSTT64 */ |
17682 | | u5imm, g8rc, gprc, |
17683 | | /* DSUB */ |
17684 | | f8rc, f8rc, f8rc, |
17685 | | /* DSUBQ */ |
17686 | | fpairrc, fpairrc, fpairrc, |
17687 | | /* DSUBQ_rec */ |
17688 | | fpairrc, fpairrc, fpairrc, |
17689 | | /* DSUB_rec */ |
17690 | | f8rc, f8rc, f8rc, |
17691 | | /* DTSTDC */ |
17692 | | crrc, f8rc, u6imm, |
17693 | | /* DTSTDCQ */ |
17694 | | crrc, fpairrc, u6imm, |
17695 | | /* DTSTDG */ |
17696 | | crrc, f8rc, u6imm, |
17697 | | /* DTSTDGQ */ |
17698 | | crrc, fpairrc, u6imm, |
17699 | | /* DTSTEX */ |
17700 | | crrc, f8rc, f8rc, |
17701 | | /* DTSTEXQ */ |
17702 | | crrc, fpairrc, fpairrc, |
17703 | | /* DTSTSF */ |
17704 | | crrc, f8rc, f8rc, |
17705 | | /* DTSTSFI */ |
17706 | | crrc, u6imm, f8rc, |
17707 | | /* DTSTSFIQ */ |
17708 | | crrc, u6imm, fpairrc, |
17709 | | /* DTSTSFQ */ |
17710 | | crrc, f8rc, fpairrc, |
17711 | | /* DXEX */ |
17712 | | f8rc, f8rc, |
17713 | | /* DXEXQ */ |
17714 | | f8rc, fpairrc, |
17715 | | /* DXEXQ_rec */ |
17716 | | f8rc, fpairrc, |
17717 | | /* DXEX_rec */ |
17718 | | f8rc, f8rc, |
17719 | | /* DYNALLOC */ |
17720 | | gprc, gprc, dispRI, ptr_rc_nor0, |
17721 | | /* DYNALLOC8 */ |
17722 | | g8rc, g8rc, dispRI, ptr_rc_nor0, |
17723 | | /* DYNAREAOFFSET */ |
17724 | | i32imm, dispRI, ptr_rc_nor0, |
17725 | | /* DYNAREAOFFSET8 */ |
17726 | | i64imm, dispRI, ptr_rc_nor0, |
17727 | | /* DecreaseCTR8loop */ |
17728 | | crbitrc, i64imm, |
17729 | | /* DecreaseCTRloop */ |
17730 | | crbitrc, i32imm, |
17731 | | /* EFDABS */ |
17732 | | sperc, sperc, |
17733 | | /* EFDADD */ |
17734 | | sperc, sperc, sperc, |
17735 | | /* EFDCFS */ |
17736 | | sperc, spe4rc, |
17737 | | /* EFDCFSF */ |
17738 | | sperc, spe4rc, |
17739 | | /* EFDCFSI */ |
17740 | | sperc, gprc, |
17741 | | /* EFDCFSID */ |
17742 | | sperc, gprc, |
17743 | | /* EFDCFUF */ |
17744 | | sperc, spe4rc, |
17745 | | /* EFDCFUI */ |
17746 | | sperc, gprc, |
17747 | | /* EFDCFUID */ |
17748 | | sperc, gprc, |
17749 | | /* EFDCMPEQ */ |
17750 | | crrc, sperc, sperc, |
17751 | | /* EFDCMPGT */ |
17752 | | crrc, sperc, sperc, |
17753 | | /* EFDCMPLT */ |
17754 | | crrc, sperc, sperc, |
17755 | | /* EFDCTSF */ |
17756 | | sperc, spe4rc, |
17757 | | /* EFDCTSI */ |
17758 | | gprc, sperc, |
17759 | | /* EFDCTSIDZ */ |
17760 | | gprc, sperc, |
17761 | | /* EFDCTSIZ */ |
17762 | | gprc, sperc, |
17763 | | /* EFDCTUF */ |
17764 | | sperc, spe4rc, |
17765 | | /* EFDCTUI */ |
17766 | | gprc, sperc, |
17767 | | /* EFDCTUIDZ */ |
17768 | | gprc, sperc, |
17769 | | /* EFDCTUIZ */ |
17770 | | gprc, sperc, |
17771 | | /* EFDDIV */ |
17772 | | sperc, sperc, sperc, |
17773 | | /* EFDMUL */ |
17774 | | sperc, sperc, sperc, |
17775 | | /* EFDNABS */ |
17776 | | sperc, sperc, |
17777 | | /* EFDNEG */ |
17778 | | sperc, sperc, |
17779 | | /* EFDSUB */ |
17780 | | sperc, sperc, sperc, |
17781 | | /* EFDTSTEQ */ |
17782 | | crrc, sperc, sperc, |
17783 | | /* EFDTSTGT */ |
17784 | | crrc, sperc, sperc, |
17785 | | /* EFDTSTLT */ |
17786 | | crrc, sperc, sperc, |
17787 | | /* EFSABS */ |
17788 | | spe4rc, spe4rc, |
17789 | | /* EFSADD */ |
17790 | | spe4rc, spe4rc, spe4rc, |
17791 | | /* EFSCFD */ |
17792 | | spe4rc, sperc, |
17793 | | /* EFSCFSF */ |
17794 | | spe4rc, spe4rc, |
17795 | | /* EFSCFSI */ |
17796 | | spe4rc, gprc, |
17797 | | /* EFSCFUF */ |
17798 | | spe4rc, spe4rc, |
17799 | | /* EFSCFUI */ |
17800 | | spe4rc, gprc, |
17801 | | /* EFSCMPEQ */ |
17802 | | crrc, spe4rc, spe4rc, |
17803 | | /* EFSCMPGT */ |
17804 | | crrc, spe4rc, spe4rc, |
17805 | | /* EFSCMPLT */ |
17806 | | crrc, spe4rc, spe4rc, |
17807 | | /* EFSCTSF */ |
17808 | | spe4rc, spe4rc, |
17809 | | /* EFSCTSI */ |
17810 | | gprc, spe4rc, |
17811 | | /* EFSCTSIZ */ |
17812 | | gprc, spe4rc, |
17813 | | /* EFSCTUF */ |
17814 | | sperc, spe4rc, |
17815 | | /* EFSCTUI */ |
17816 | | gprc, spe4rc, |
17817 | | /* EFSCTUIZ */ |
17818 | | gprc, spe4rc, |
17819 | | /* EFSDIV */ |
17820 | | spe4rc, spe4rc, spe4rc, |
17821 | | /* EFSMUL */ |
17822 | | spe4rc, spe4rc, spe4rc, |
17823 | | /* EFSNABS */ |
17824 | | spe4rc, spe4rc, |
17825 | | /* EFSNEG */ |
17826 | | spe4rc, spe4rc, |
17827 | | /* EFSSUB */ |
17828 | | spe4rc, spe4rc, spe4rc, |
17829 | | /* EFSTSTEQ */ |
17830 | | crrc, sperc, sperc, |
17831 | | /* EFSTSTGT */ |
17832 | | crrc, sperc, sperc, |
17833 | | /* EFSTSTLT */ |
17834 | | crrc, sperc, sperc, |
17835 | | /* EH_SjLj_LongJmp32 */ |
17836 | | ptr_rc_nor0, |
17837 | | /* EH_SjLj_LongJmp64 */ |
17838 | | ptr_rc_nor0, |
17839 | | /* EH_SjLj_SetJmp32 */ |
17840 | | gprc, ptr_rc_nor0, |
17841 | | /* EH_SjLj_SetJmp64 */ |
17842 | | gprc, ptr_rc_nor0, |
17843 | | /* EH_SjLj_Setup */ |
17844 | | directbrtarget, |
17845 | | /* EQV */ |
17846 | | gprc, gprc, gprc, |
17847 | | /* EQV8 */ |
17848 | | g8rc, g8rc, g8rc, |
17849 | | /* EQV8_rec */ |
17850 | | g8rc, g8rc, g8rc, |
17851 | | /* EQV_rec */ |
17852 | | gprc, gprc, gprc, |
17853 | | /* EVABS */ |
17854 | | sperc, sperc, |
17855 | | /* EVADDIW */ |
17856 | | sperc, sperc, u5imm, |
17857 | | /* EVADDSMIAAW */ |
17858 | | sperc, sperc, |
17859 | | /* EVADDSSIAAW */ |
17860 | | sperc, sperc, |
17861 | | /* EVADDUMIAAW */ |
17862 | | sperc, sperc, |
17863 | | /* EVADDUSIAAW */ |
17864 | | sperc, sperc, |
17865 | | /* EVADDW */ |
17866 | | sperc, sperc, sperc, |
17867 | | /* EVAND */ |
17868 | | sperc, sperc, sperc, |
17869 | | /* EVANDC */ |
17870 | | sperc, sperc, sperc, |
17871 | | /* EVCMPEQ */ |
17872 | | crrc, sperc, sperc, |
17873 | | /* EVCMPGTS */ |
17874 | | crrc, sperc, sperc, |
17875 | | /* EVCMPGTU */ |
17876 | | crrc, sperc, sperc, |
17877 | | /* EVCMPLTS */ |
17878 | | crrc, sperc, sperc, |
17879 | | /* EVCMPLTU */ |
17880 | | crrc, sperc, sperc, |
17881 | | /* EVCNTLSW */ |
17882 | | sperc, sperc, |
17883 | | /* EVCNTLZW */ |
17884 | | sperc, sperc, |
17885 | | /* EVDIVWS */ |
17886 | | sperc, sperc, sperc, |
17887 | | /* EVDIVWU */ |
17888 | | sperc, sperc, sperc, |
17889 | | /* EVEQV */ |
17890 | | sperc, sperc, sperc, |
17891 | | /* EVEXTSB */ |
17892 | | sperc, sperc, |
17893 | | /* EVEXTSH */ |
17894 | | sperc, sperc, |
17895 | | /* EVFSABS */ |
17896 | | sperc, sperc, |
17897 | | /* EVFSADD */ |
17898 | | sperc, sperc, sperc, |
17899 | | /* EVFSCFSF */ |
17900 | | sperc, sperc, |
17901 | | /* EVFSCFSI */ |
17902 | | sperc, sperc, |
17903 | | /* EVFSCFUF */ |
17904 | | sperc, sperc, |
17905 | | /* EVFSCFUI */ |
17906 | | sperc, sperc, |
17907 | | /* EVFSCMPEQ */ |
17908 | | crrc, sperc, sperc, |
17909 | | /* EVFSCMPGT */ |
17910 | | crrc, sperc, sperc, |
17911 | | /* EVFSCMPLT */ |
17912 | | crrc, sperc, sperc, |
17913 | | /* EVFSCTSF */ |
17914 | | sperc, sperc, |
17915 | | /* EVFSCTSI */ |
17916 | | sperc, sperc, |
17917 | | /* EVFSCTSIZ */ |
17918 | | sperc, sperc, |
17919 | | /* EVFSCTUF */ |
17920 | | sperc, sperc, |
17921 | | /* EVFSCTUI */ |
17922 | | sperc, sperc, |
17923 | | /* EVFSCTUIZ */ |
17924 | | sperc, sperc, |
17925 | | /* EVFSDIV */ |
17926 | | sperc, sperc, sperc, |
17927 | | /* EVFSMUL */ |
17928 | | sperc, sperc, sperc, |
17929 | | /* EVFSNABS */ |
17930 | | sperc, sperc, |
17931 | | /* EVFSNEG */ |
17932 | | sperc, sperc, |
17933 | | /* EVFSSUB */ |
17934 | | sperc, sperc, sperc, |
17935 | | /* EVFSTSTEQ */ |
17936 | | crrc, sperc, sperc, |
17937 | | /* EVFSTSTGT */ |
17938 | | crrc, sperc, sperc, |
17939 | | /* EVFSTSTLT */ |
17940 | | crrc, sperc, sperc, |
17941 | | /* EVLDD */ |
17942 | | sperc, dispSPE8, ptr_rc_nor0, |
17943 | | /* EVLDDX */ |
17944 | | sperc, ptr_rc_nor0, ptr_rc_idx, |
17945 | | /* EVLDH */ |
17946 | | sperc, dispSPE8, ptr_rc_nor0, |
17947 | | /* EVLDHX */ |
17948 | | sperc, ptr_rc_nor0, ptr_rc_idx, |
17949 | | /* EVLDW */ |
17950 | | sperc, dispSPE8, ptr_rc_nor0, |
17951 | | /* EVLDWX */ |
17952 | | sperc, ptr_rc_nor0, ptr_rc_idx, |
17953 | | /* EVLHHESPLAT */ |
17954 | | sperc, dispSPE2, ptr_rc_nor0, |
17955 | | /* EVLHHESPLATX */ |
17956 | | sperc, ptr_rc_nor0, ptr_rc_idx, |
17957 | | /* EVLHHOSSPLAT */ |
17958 | | sperc, dispSPE2, ptr_rc_nor0, |
17959 | | /* EVLHHOSSPLATX */ |
17960 | | sperc, ptr_rc_nor0, ptr_rc_idx, |
17961 | | /* EVLHHOUSPLAT */ |
17962 | | sperc, dispSPE2, ptr_rc_nor0, |
17963 | | /* EVLHHOUSPLATX */ |
17964 | | sperc, ptr_rc_nor0, ptr_rc_idx, |
17965 | | /* EVLWHE */ |
17966 | | sperc, dispSPE4, ptr_rc_nor0, |
17967 | | /* EVLWHEX */ |
17968 | | sperc, ptr_rc_nor0, ptr_rc_idx, |
17969 | | /* EVLWHOS */ |
17970 | | sperc, dispSPE4, ptr_rc_nor0, |
17971 | | /* EVLWHOSX */ |
17972 | | sperc, ptr_rc_nor0, ptr_rc_idx, |
17973 | | /* EVLWHOU */ |
17974 | | sperc, dispSPE4, ptr_rc_nor0, |
17975 | | /* EVLWHOUX */ |
17976 | | sperc, ptr_rc_nor0, ptr_rc_idx, |
17977 | | /* EVLWHSPLAT */ |
17978 | | sperc, dispSPE4, ptr_rc_nor0, |
17979 | | /* EVLWHSPLATX */ |
17980 | | sperc, ptr_rc_nor0, ptr_rc_idx, |
17981 | | /* EVLWWSPLAT */ |
17982 | | sperc, dispSPE4, ptr_rc_nor0, |
17983 | | /* EVLWWSPLATX */ |
17984 | | sperc, ptr_rc_nor0, ptr_rc_idx, |
17985 | | /* EVMERGEHI */ |
17986 | | sperc, sperc, sperc, |
17987 | | /* EVMERGEHILO */ |
17988 | | sperc, sperc, sperc, |
17989 | | /* EVMERGELO */ |
17990 | | sperc, gprc, gprc, |
17991 | | /* EVMERGELOHI */ |
17992 | | sperc, sperc, sperc, |
17993 | | /* EVMHEGSMFAA */ |
17994 | | sperc, sperc, sperc, |
17995 | | /* EVMHEGSMFAN */ |
17996 | | sperc, sperc, sperc, |
17997 | | /* EVMHEGSMIAA */ |
17998 | | sperc, sperc, sperc, |
17999 | | /* EVMHEGSMIAN */ |
18000 | | sperc, sperc, sperc, |
18001 | | /* EVMHEGUMIAA */ |
18002 | | sperc, sperc, sperc, |
18003 | | /* EVMHEGUMIAN */ |
18004 | | sperc, sperc, sperc, |
18005 | | /* EVMHESMF */ |
18006 | | sperc, sperc, sperc, |
18007 | | /* EVMHESMFA */ |
18008 | | sperc, sperc, sperc, |
18009 | | /* EVMHESMFAAW */ |
18010 | | sperc, sperc, sperc, |
18011 | | /* EVMHESMFANW */ |
18012 | | sperc, sperc, sperc, |
18013 | | /* EVMHESMI */ |
18014 | | sperc, sperc, sperc, |
18015 | | /* EVMHESMIA */ |
18016 | | sperc, sperc, sperc, |
18017 | | /* EVMHESMIAAW */ |
18018 | | sperc, sperc, sperc, |
18019 | | /* EVMHESMIANW */ |
18020 | | sperc, sperc, sperc, |
18021 | | /* EVMHESSF */ |
18022 | | sperc, sperc, sperc, |
18023 | | /* EVMHESSFA */ |
18024 | | sperc, sperc, sperc, |
18025 | | /* EVMHESSFAAW */ |
18026 | | sperc, sperc, sperc, |
18027 | | /* EVMHESSFANW */ |
18028 | | sperc, sperc, sperc, |
18029 | | /* EVMHESSIAAW */ |
18030 | | sperc, sperc, sperc, |
18031 | | /* EVMHESSIANW */ |
18032 | | sperc, sperc, sperc, |
18033 | | /* EVMHEUMI */ |
18034 | | sperc, sperc, sperc, |
18035 | | /* EVMHEUMIA */ |
18036 | | sperc, sperc, sperc, |
18037 | | /* EVMHEUMIAAW */ |
18038 | | sperc, sperc, sperc, |
18039 | | /* EVMHEUMIANW */ |
18040 | | sperc, sperc, sperc, |
18041 | | /* EVMHEUSIAAW */ |
18042 | | sperc, sperc, sperc, |
18043 | | /* EVMHEUSIANW */ |
18044 | | sperc, sperc, sperc, |
18045 | | /* EVMHOGSMFAA */ |
18046 | | sperc, sperc, sperc, |
18047 | | /* EVMHOGSMFAN */ |
18048 | | sperc, sperc, sperc, |
18049 | | /* EVMHOGSMIAA */ |
18050 | | sperc, sperc, sperc, |
18051 | | /* EVMHOGSMIAN */ |
18052 | | sperc, sperc, sperc, |
18053 | | /* EVMHOGUMIAA */ |
18054 | | sperc, sperc, sperc, |
18055 | | /* EVMHOGUMIAN */ |
18056 | | sperc, sperc, sperc, |
18057 | | /* EVMHOSMF */ |
18058 | | sperc, sperc, sperc, |
18059 | | /* EVMHOSMFA */ |
18060 | | sperc, sperc, sperc, |
18061 | | /* EVMHOSMFAAW */ |
18062 | | sperc, sperc, sperc, |
18063 | | /* EVMHOSMFANW */ |
18064 | | sperc, sperc, sperc, |
18065 | | /* EVMHOSMI */ |
18066 | | sperc, sperc, sperc, |
18067 | | /* EVMHOSMIA */ |
18068 | | sperc, sperc, sperc, |
18069 | | /* EVMHOSMIAAW */ |
18070 | | sperc, sperc, sperc, |
18071 | | /* EVMHOSMIANW */ |
18072 | | sperc, sperc, sperc, |
18073 | | /* EVMHOSSF */ |
18074 | | sperc, sperc, sperc, |
18075 | | /* EVMHOSSFA */ |
18076 | | sperc, sperc, sperc, |
18077 | | /* EVMHOSSFAAW */ |
18078 | | sperc, sperc, sperc, |
18079 | | /* EVMHOSSFANW */ |
18080 | | sperc, sperc, sperc, |
18081 | | /* EVMHOSSIAAW */ |
18082 | | sperc, sperc, sperc, |
18083 | | /* EVMHOSSIANW */ |
18084 | | sperc, sperc, sperc, |
18085 | | /* EVMHOUMI */ |
18086 | | sperc, sperc, sperc, |
18087 | | /* EVMHOUMIA */ |
18088 | | sperc, sperc, sperc, |
18089 | | /* EVMHOUMIAAW */ |
18090 | | sperc, sperc, sperc, |
18091 | | /* EVMHOUMIANW */ |
18092 | | sperc, sperc, sperc, |
18093 | | /* EVMHOUSIAAW */ |
18094 | | sperc, sperc, sperc, |
18095 | | /* EVMHOUSIANW */ |
18096 | | sperc, sperc, sperc, |
18097 | | /* EVMRA */ |
18098 | | sperc, sperc, |
18099 | | /* EVMWHSMF */ |
18100 | | sperc, sperc, sperc, |
18101 | | /* EVMWHSMFA */ |
18102 | | sperc, sperc, sperc, |
18103 | | /* EVMWHSMI */ |
18104 | | sperc, sperc, sperc, |
18105 | | /* EVMWHSMIA */ |
18106 | | sperc, sperc, sperc, |
18107 | | /* EVMWHSSF */ |
18108 | | sperc, sperc, sperc, |
18109 | | /* EVMWHSSFA */ |
18110 | | sperc, sperc, sperc, |
18111 | | /* EVMWHUMI */ |
18112 | | sperc, sperc, sperc, |
18113 | | /* EVMWHUMIA */ |
18114 | | sperc, sperc, sperc, |
18115 | | /* EVMWLSMIAAW */ |
18116 | | sperc, sperc, sperc, |
18117 | | /* EVMWLSMIANW */ |
18118 | | sperc, sperc, sperc, |
18119 | | /* EVMWLSSIAAW */ |
18120 | | sperc, sperc, sperc, |
18121 | | /* EVMWLSSIANW */ |
18122 | | sperc, sperc, sperc, |
18123 | | /* EVMWLUMI */ |
18124 | | sperc, sperc, sperc, |
18125 | | /* EVMWLUMIA */ |
18126 | | sperc, sperc, sperc, |
18127 | | /* EVMWLUMIAAW */ |
18128 | | sperc, sperc, sperc, |
18129 | | /* EVMWLUMIANW */ |
18130 | | sperc, sperc, sperc, |
18131 | | /* EVMWLUSIAAW */ |
18132 | | sperc, sperc, sperc, |
18133 | | /* EVMWLUSIANW */ |
18134 | | sperc, sperc, sperc, |
18135 | | /* EVMWSMF */ |
18136 | | sperc, sperc, sperc, |
18137 | | /* EVMWSMFA */ |
18138 | | sperc, sperc, sperc, |
18139 | | /* EVMWSMFAA */ |
18140 | | sperc, sperc, sperc, |
18141 | | /* EVMWSMFAN */ |
18142 | | sperc, sperc, sperc, |
18143 | | /* EVMWSMI */ |
18144 | | sperc, sperc, sperc, |
18145 | | /* EVMWSMIA */ |
18146 | | sperc, sperc, sperc, |
18147 | | /* EVMWSMIAA */ |
18148 | | sperc, sperc, sperc, |
18149 | | /* EVMWSMIAN */ |
18150 | | sperc, sperc, sperc, |
18151 | | /* EVMWSSF */ |
18152 | | sperc, sperc, sperc, |
18153 | | /* EVMWSSFA */ |
18154 | | sperc, sperc, sperc, |
18155 | | /* EVMWSSFAA */ |
18156 | | sperc, sperc, sperc, |
18157 | | /* EVMWSSFAN */ |
18158 | | sperc, sperc, sperc, |
18159 | | /* EVMWUMI */ |
18160 | | sperc, sperc, sperc, |
18161 | | /* EVMWUMIA */ |
18162 | | sperc, sperc, sperc, |
18163 | | /* EVMWUMIAA */ |
18164 | | sperc, sperc, sperc, |
18165 | | /* EVMWUMIAN */ |
18166 | | sperc, sperc, sperc, |
18167 | | /* EVNAND */ |
18168 | | sperc, sperc, sperc, |
18169 | | /* EVNEG */ |
18170 | | sperc, sperc, |
18171 | | /* EVNOR */ |
18172 | | sperc, sperc, sperc, |
18173 | | /* EVOR */ |
18174 | | sperc, sperc, sperc, |
18175 | | /* EVORC */ |
18176 | | sperc, sperc, sperc, |
18177 | | /* EVRLW */ |
18178 | | sperc, sperc, sperc, |
18179 | | /* EVRLWI */ |
18180 | | sperc, sperc, u5imm, |
18181 | | /* EVRNDW */ |
18182 | | sperc, sperc, |
18183 | | /* EVSEL */ |
18184 | | sperc, sperc, sperc, crrc, |
18185 | | /* EVSLW */ |
18186 | | sperc, sperc, sperc, |
18187 | | /* EVSLWI */ |
18188 | | sperc, sperc, u5imm, |
18189 | | /* EVSPLATFI */ |
18190 | | sperc, s5imm, |
18191 | | /* EVSPLATI */ |
18192 | | sperc, s5imm, |
18193 | | /* EVSRWIS */ |
18194 | | sperc, sperc, u5imm, |
18195 | | /* EVSRWIU */ |
18196 | | sperc, sperc, u5imm, |
18197 | | /* EVSRWS */ |
18198 | | sperc, sperc, sperc, |
18199 | | /* EVSRWU */ |
18200 | | sperc, sperc, sperc, |
18201 | | /* EVSTDD */ |
18202 | | sperc, dispSPE8, ptr_rc_nor0, |
18203 | | /* EVSTDDX */ |
18204 | | sperc, ptr_rc_nor0, ptr_rc_idx, |
18205 | | /* EVSTDH */ |
18206 | | sperc, dispSPE8, ptr_rc_nor0, |
18207 | | /* EVSTDHX */ |
18208 | | sperc, ptr_rc_nor0, ptr_rc_idx, |
18209 | | /* EVSTDW */ |
18210 | | sperc, dispSPE8, ptr_rc_nor0, |
18211 | | /* EVSTDWX */ |
18212 | | sperc, ptr_rc_nor0, ptr_rc_idx, |
18213 | | /* EVSTWHE */ |
18214 | | sperc, dispSPE4, ptr_rc_nor0, |
18215 | | /* EVSTWHEX */ |
18216 | | sperc, ptr_rc_nor0, ptr_rc_idx, |
18217 | | /* EVSTWHO */ |
18218 | | sperc, dispSPE4, ptr_rc_nor0, |
18219 | | /* EVSTWHOX */ |
18220 | | sperc, ptr_rc_nor0, ptr_rc_idx, |
18221 | | /* EVSTWWE */ |
18222 | | sperc, dispSPE4, ptr_rc_nor0, |
18223 | | /* EVSTWWEX */ |
18224 | | sperc, ptr_rc_nor0, ptr_rc_idx, |
18225 | | /* EVSTWWO */ |
18226 | | sperc, dispSPE4, ptr_rc_nor0, |
18227 | | /* EVSTWWOX */ |
18228 | | sperc, ptr_rc_nor0, ptr_rc_idx, |
18229 | | /* EVSUBFSMIAAW */ |
18230 | | sperc, sperc, |
18231 | | /* EVSUBFSSIAAW */ |
18232 | | sperc, sperc, |
18233 | | /* EVSUBFUMIAAW */ |
18234 | | sperc, sperc, |
18235 | | /* EVSUBFUSIAAW */ |
18236 | | sperc, sperc, |
18237 | | /* EVSUBFW */ |
18238 | | sperc, sperc, sperc, |
18239 | | /* EVSUBIFW */ |
18240 | | sperc, u5imm, sperc, |
18241 | | /* EVXOR */ |
18242 | | sperc, sperc, sperc, |
18243 | | /* EXTSB */ |
18244 | | gprc, gprc, |
18245 | | /* EXTSB8 */ |
18246 | | g8rc, g8rc, |
18247 | | /* EXTSB8_32_64 */ |
18248 | | g8rc, gprc, |
18249 | | /* EXTSB8_rec */ |
18250 | | g8rc, g8rc, |
18251 | | /* EXTSB_rec */ |
18252 | | gprc, gprc, |
18253 | | /* EXTSH */ |
18254 | | gprc, gprc, |
18255 | | /* EXTSH8 */ |
18256 | | g8rc, g8rc, |
18257 | | /* EXTSH8_32_64 */ |
18258 | | g8rc, gprc, |
18259 | | /* EXTSH8_rec */ |
18260 | | g8rc, g8rc, |
18261 | | /* EXTSH_rec */ |
18262 | | gprc, gprc, |
18263 | | /* EXTSW */ |
18264 | | g8rc, g8rc, |
18265 | | /* EXTSWSLI */ |
18266 | | g8rc, g8rc, u6imm, |
18267 | | /* EXTSWSLI_32_64 */ |
18268 | | g8rc, gprc, u6imm, |
18269 | | /* EXTSWSLI_32_64_rec */ |
18270 | | g8rc, gprc, u6imm, |
18271 | | /* EXTSWSLI_rec */ |
18272 | | g8rc, g8rc, u6imm, |
18273 | | /* EXTSW_32 */ |
18274 | | gprc, gprc, |
18275 | | /* EXTSW_32_64 */ |
18276 | | g8rc, gprc, |
18277 | | /* EXTSW_32_64_rec */ |
18278 | | g8rc, gprc, |
18279 | | /* EXTSW_rec */ |
18280 | | g8rc, g8rc, |
18281 | | /* EnforceIEIO */ |
18282 | | /* FABSD */ |
18283 | | f8rc, f8rc, |
18284 | | /* FABSD_rec */ |
18285 | | f8rc, f8rc, |
18286 | | /* FABSS */ |
18287 | | f4rc, f4rc, |
18288 | | /* FABSS_rec */ |
18289 | | f4rc, f4rc, |
18290 | | /* FADD */ |
18291 | | f8rc, f8rc, f8rc, |
18292 | | /* FADDS */ |
18293 | | f4rc, f4rc, f4rc, |
18294 | | /* FADDS_rec */ |
18295 | | f4rc, f4rc, f4rc, |
18296 | | /* FADD_rec */ |
18297 | | f8rc, f8rc, f8rc, |
18298 | | /* FADDrtz */ |
18299 | | f8rc, f8rc, f8rc, |
18300 | | /* FCFID */ |
18301 | | f8rc, f8rc, |
18302 | | /* FCFIDS */ |
18303 | | f4rc, f8rc, |
18304 | | /* FCFIDS_rec */ |
18305 | | f4rc, f8rc, |
18306 | | /* FCFIDU */ |
18307 | | f8rc, f8rc, |
18308 | | /* FCFIDUS */ |
18309 | | f4rc, f8rc, |
18310 | | /* FCFIDUS_rec */ |
18311 | | f4rc, f8rc, |
18312 | | /* FCFIDU_rec */ |
18313 | | f8rc, f8rc, |
18314 | | /* FCFID_rec */ |
18315 | | f8rc, f8rc, |
18316 | | /* FCMPOD */ |
18317 | | crrc, f8rc, f8rc, |
18318 | | /* FCMPOS */ |
18319 | | crrc, f4rc, f4rc, |
18320 | | /* FCMPUD */ |
18321 | | crrc, f8rc, f8rc, |
18322 | | /* FCMPUS */ |
18323 | | crrc, f4rc, f4rc, |
18324 | | /* FCPSGND */ |
18325 | | f8rc, f8rc, f8rc, |
18326 | | /* FCPSGND_rec */ |
18327 | | f8rc, f8rc, f8rc, |
18328 | | /* FCPSGNS */ |
18329 | | f4rc, f4rc, f4rc, |
18330 | | /* FCPSGNS_rec */ |
18331 | | f4rc, f4rc, f4rc, |
18332 | | /* FCTID */ |
18333 | | f8rc, f8rc, |
18334 | | /* FCTIDU */ |
18335 | | f8rc, f8rc, |
18336 | | /* FCTIDUZ */ |
18337 | | f8rc, f8rc, |
18338 | | /* FCTIDUZ_rec */ |
18339 | | f8rc, f8rc, |
18340 | | /* FCTIDU_rec */ |
18341 | | f8rc, f8rc, |
18342 | | /* FCTIDZ */ |
18343 | | f8rc, f8rc, |
18344 | | /* FCTIDZ_rec */ |
18345 | | f8rc, f8rc, |
18346 | | /* FCTID_rec */ |
18347 | | f8rc, f8rc, |
18348 | | /* FCTIW */ |
18349 | | f8rc, f8rc, |
18350 | | /* FCTIWU */ |
18351 | | f8rc, f8rc, |
18352 | | /* FCTIWUZ */ |
18353 | | f8rc, f8rc, |
18354 | | /* FCTIWUZ_rec */ |
18355 | | f8rc, f8rc, |
18356 | | /* FCTIWU_rec */ |
18357 | | f8rc, f8rc, |
18358 | | /* FCTIWZ */ |
18359 | | f8rc, f8rc, |
18360 | | /* FCTIWZ_rec */ |
18361 | | f8rc, f8rc, |
18362 | | /* FCTIW_rec */ |
18363 | | f8rc, f8rc, |
18364 | | /* FDIV */ |
18365 | | f8rc, f8rc, f8rc, |
18366 | | /* FDIVS */ |
18367 | | f4rc, f4rc, f4rc, |
18368 | | /* FDIVS_rec */ |
18369 | | f4rc, f4rc, f4rc, |
18370 | | /* FDIV_rec */ |
18371 | | f8rc, f8rc, f8rc, |
18372 | | /* FENCE */ |
18373 | | /* FMADD */ |
18374 | | f8rc, f8rc, f8rc, f8rc, |
18375 | | /* FMADDS */ |
18376 | | f4rc, f4rc, f4rc, f4rc, |
18377 | | /* FMADDS_rec */ |
18378 | | f4rc, f4rc, f4rc, f4rc, |
18379 | | /* FMADD_rec */ |
18380 | | f8rc, f8rc, f8rc, f8rc, |
18381 | | /* FMR */ |
18382 | | f4rc, f4rc, |
18383 | | /* FMR_rec */ |
18384 | | f4rc, f4rc, |
18385 | | /* FMSUB */ |
18386 | | f8rc, f8rc, f8rc, f8rc, |
18387 | | /* FMSUBS */ |
18388 | | f4rc, f4rc, f4rc, f4rc, |
18389 | | /* FMSUBS_rec */ |
18390 | | f4rc, f4rc, f4rc, f4rc, |
18391 | | /* FMSUB_rec */ |
18392 | | f8rc, f8rc, f8rc, f8rc, |
18393 | | /* FMUL */ |
18394 | | f8rc, f8rc, f8rc, |
18395 | | /* FMULS */ |
18396 | | f4rc, f4rc, f4rc, |
18397 | | /* FMULS_rec */ |
18398 | | f4rc, f4rc, f4rc, |
18399 | | /* FMUL_rec */ |
18400 | | f8rc, f8rc, f8rc, |
18401 | | /* FNABSD */ |
18402 | | f8rc, f8rc, |
18403 | | /* FNABSD_rec */ |
18404 | | f8rc, f8rc, |
18405 | | /* FNABSS */ |
18406 | | f4rc, f4rc, |
18407 | | /* FNABSS_rec */ |
18408 | | f4rc, f4rc, |
18409 | | /* FNEGD */ |
18410 | | f8rc, f8rc, |
18411 | | /* FNEGD_rec */ |
18412 | | f8rc, f8rc, |
18413 | | /* FNEGS */ |
18414 | | f4rc, f4rc, |
18415 | | /* FNEGS_rec */ |
18416 | | f4rc, f4rc, |
18417 | | /* FNMADD */ |
18418 | | f8rc, f8rc, f8rc, f8rc, |
18419 | | /* FNMADDS */ |
18420 | | f4rc, f4rc, f4rc, f4rc, |
18421 | | /* FNMADDS_rec */ |
18422 | | f4rc, f4rc, f4rc, f4rc, |
18423 | | /* FNMADD_rec */ |
18424 | | f8rc, f8rc, f8rc, f8rc, |
18425 | | /* FNMSUB */ |
18426 | | f8rc, f8rc, f8rc, f8rc, |
18427 | | /* FNMSUBS */ |
18428 | | f4rc, f4rc, f4rc, f4rc, |
18429 | | /* FNMSUBS_rec */ |
18430 | | f4rc, f4rc, f4rc, f4rc, |
18431 | | /* FNMSUB_rec */ |
18432 | | f8rc, f8rc, f8rc, f8rc, |
18433 | | /* FRE */ |
18434 | | f8rc, f8rc, |
18435 | | /* FRES */ |
18436 | | f4rc, f4rc, |
18437 | | /* FRES_rec */ |
18438 | | f4rc, f4rc, |
18439 | | /* FRE_rec */ |
18440 | | f8rc, f8rc, |
18441 | | /* FRIMD */ |
18442 | | f8rc, f8rc, |
18443 | | /* FRIMD_rec */ |
18444 | | f8rc, f8rc, |
18445 | | /* FRIMS */ |
18446 | | f4rc, f4rc, |
18447 | | /* FRIMS_rec */ |
18448 | | f4rc, f4rc, |
18449 | | /* FRIND */ |
18450 | | f8rc, f8rc, |
18451 | | /* FRIND_rec */ |
18452 | | f8rc, f8rc, |
18453 | | /* FRINS */ |
18454 | | f4rc, f4rc, |
18455 | | /* FRINS_rec */ |
18456 | | f4rc, f4rc, |
18457 | | /* FRIPD */ |
18458 | | f8rc, f8rc, |
18459 | | /* FRIPD_rec */ |
18460 | | f8rc, f8rc, |
18461 | | /* FRIPS */ |
18462 | | f4rc, f4rc, |
18463 | | /* FRIPS_rec */ |
18464 | | f4rc, f4rc, |
18465 | | /* FRIZD */ |
18466 | | f8rc, f8rc, |
18467 | | /* FRIZD_rec */ |
18468 | | f8rc, f8rc, |
18469 | | /* FRIZS */ |
18470 | | f4rc, f4rc, |
18471 | | /* FRIZS_rec */ |
18472 | | f4rc, f4rc, |
18473 | | /* FRSP */ |
18474 | | f4rc, f8rc, |
18475 | | /* FRSP_rec */ |
18476 | | f4rc, f8rc, |
18477 | | /* FRSQRTE */ |
18478 | | f8rc, f8rc, |
18479 | | /* FRSQRTES */ |
18480 | | f4rc, f4rc, |
18481 | | /* FRSQRTES_rec */ |
18482 | | f4rc, f4rc, |
18483 | | /* FRSQRTE_rec */ |
18484 | | f8rc, f8rc, |
18485 | | /* FSELD */ |
18486 | | f8rc, f8rc, f8rc, f8rc, |
18487 | | /* FSELD_rec */ |
18488 | | f8rc, f8rc, f8rc, f8rc, |
18489 | | /* FSELS */ |
18490 | | f4rc, f8rc, f4rc, f4rc, |
18491 | | /* FSELS_rec */ |
18492 | | f4rc, f8rc, f4rc, f4rc, |
18493 | | /* FSQRT */ |
18494 | | f8rc, f8rc, |
18495 | | /* FSQRTS */ |
18496 | | f4rc, f4rc, |
18497 | | /* FSQRTS_rec */ |
18498 | | f4rc, f4rc, |
18499 | | /* FSQRT_rec */ |
18500 | | f8rc, f8rc, |
18501 | | /* FSUB */ |
18502 | | f8rc, f8rc, f8rc, |
18503 | | /* FSUBS */ |
18504 | | f4rc, f4rc, f4rc, |
18505 | | /* FSUBS_rec */ |
18506 | | f4rc, f4rc, f4rc, |
18507 | | /* FSUB_rec */ |
18508 | | f8rc, f8rc, f8rc, |
18509 | | /* FTDIV */ |
18510 | | crrc, f8rc, f8rc, |
18511 | | /* FTSQRT */ |
18512 | | crrc, f8rc, |
18513 | | /* GETtlsADDR */ |
18514 | | g8rc, g8rc, tlsgd, |
18515 | | /* GETtlsADDR32 */ |
18516 | | gprc, gprc, tlsgd32, |
18517 | | /* GETtlsADDR32AIX */ |
18518 | | gprc, gprc, gprc, |
18519 | | /* GETtlsADDR64AIX */ |
18520 | | g8rc, g8rc, g8rc, |
18521 | | /* GETtlsADDRPCREL */ |
18522 | | g8rc, g8rc, tlsgd, |
18523 | | /* GETtlsTpointer32AIX */ |
18524 | | gprc, |
18525 | | /* GETtlsldADDR */ |
18526 | | g8rc, g8rc, tlsgd, |
18527 | | /* GETtlsldADDR32 */ |
18528 | | gprc, gprc, tlsgd32, |
18529 | | /* GETtlsldADDRPCREL */ |
18530 | | g8rc, g8rc, tlsgd, |
18531 | | /* HASHCHK */ |
18532 | | gprc, dispRIHash, ptr_rc_nor0, |
18533 | | /* HASHCHK8 */ |
18534 | | g8rc, dispRIHash, ptr_rc_nor0, |
18535 | | /* HASHCHKP */ |
18536 | | gprc, dispRIHash, ptr_rc_nor0, |
18537 | | /* HASHCHKP8 */ |
18538 | | g8rc, dispRIHash, ptr_rc_nor0, |
18539 | | /* HASHST */ |
18540 | | gprc, dispRIHash, ptr_rc_nor0, |
18541 | | /* HASHST8 */ |
18542 | | g8rc, dispRIHash, ptr_rc_nor0, |
18543 | | /* HASHSTP */ |
18544 | | gprc, dispRIHash, ptr_rc_nor0, |
18545 | | /* HASHSTP8 */ |
18546 | | g8rc, dispRIHash, ptr_rc_nor0, |
18547 | | /* HRFID */ |
18548 | | /* ICBI */ |
18549 | | ptr_rc_nor0, ptr_rc_idx, |
18550 | | /* ICBIEP */ |
18551 | | ptr_rc_nor0, ptr_rc_idx, |
18552 | | /* ICBLC */ |
18553 | | u4imm, ptr_rc_nor0, ptr_rc_idx, |
18554 | | /* ICBLQ */ |
18555 | | u4imm, ptr_rc_nor0, ptr_rc_idx, |
18556 | | /* ICBT */ |
18557 | | u4imm, ptr_rc_nor0, ptr_rc_idx, |
18558 | | /* ICBTLS */ |
18559 | | u4imm, ptr_rc_nor0, ptr_rc_idx, |
18560 | | /* ICCCI */ |
18561 | | gprc, gprc, |
18562 | | /* ISEL */ |
18563 | | gprc, gprc_nor0, gprc, crbitrc, |
18564 | | /* ISEL8 */ |
18565 | | g8rc, g8rc_nox0, g8rc, crbitrc, |
18566 | | /* ISYNC */ |
18567 | | /* LA */ |
18568 | | gprc, gprc_nor0, s16imm, |
18569 | | /* LA8 */ |
18570 | | g8rc, g8rc_nox0, s16imm64, |
18571 | | /* LBARX */ |
18572 | | gprc, ptr_rc_nor0, ptr_rc_idx, |
18573 | | /* LBARXL */ |
18574 | | gprc, ptr_rc_nor0, ptr_rc_idx, |
18575 | | /* LBEPX */ |
18576 | | gprc, ptr_rc_nor0, ptr_rc_idx, |
18577 | | /* LBZ */ |
18578 | | gprc, dispRI, ptr_rc_nor0, |
18579 | | /* LBZ8 */ |
18580 | | g8rc, dispRI, ptr_rc_nor0, |
18581 | | /* LBZCIX */ |
18582 | | gprc, gprc, gprc, |
18583 | | /* LBZU */ |
18584 | | gprc, ptr_rc_nor0, dispRI, ptr_rc_nor0, |
18585 | | /* LBZU8 */ |
18586 | | g8rc, ptr_rc_nor0, dispRI, ptr_rc_nor0, |
18587 | | /* LBZUX */ |
18588 | | gprc, ptr_rc_nor0, ptr_rc_nor0, ptr_rc_idx, |
18589 | | /* LBZUX8 */ |
18590 | | g8rc, ptr_rc_nor0, ptr_rc_nor0, ptr_rc_idx, |
18591 | | /* LBZX */ |
18592 | | gprc, ptr_rc_nor0, ptr_rc_idx, |
18593 | | /* LBZX8 */ |
18594 | | g8rc, ptr_rc_nor0, ptr_rc_idx, |
18595 | | /* LBZXTLS */ |
18596 | | g8rc, ptr_rc_nor0, tlsreg, |
18597 | | /* LBZXTLS_ */ |
18598 | | g8rc, ptr_rc_nor0, tlsreg, |
18599 | | /* LBZXTLS_32 */ |
18600 | | gprc, ptr_rc_nor0, tlsreg, |
18601 | | /* LD */ |
18602 | | g8rc, dispRIX, ptr_rc_nor0, |
18603 | | /* LDARX */ |
18604 | | g8rc, ptr_rc_nor0, ptr_rc_idx, |
18605 | | /* LDARXL */ |
18606 | | g8rc, ptr_rc_nor0, ptr_rc_idx, |
18607 | | /* LDAT */ |
18608 | | g8rc, g8rc, u5imm, |
18609 | | /* LDBRX */ |
18610 | | g8rc, ptr_rc_nor0, ptr_rc_idx, |
18611 | | /* LDCIX */ |
18612 | | gprc, gprc, gprc, |
18613 | | /* LDU */ |
18614 | | g8rc, ptr_rc_nor0, dispRIX, ptr_rc_nor0, |
18615 | | /* LDUX */ |
18616 | | g8rc, ptr_rc_nor0, ptr_rc_nor0, ptr_rc_idx, |
18617 | | /* LDX */ |
18618 | | g8rc, ptr_rc_nor0, ptr_rc_idx, |
18619 | | /* LDXTLS */ |
18620 | | g8rc, ptr_rc_nor0, tlsreg, |
18621 | | /* LDXTLS_ */ |
18622 | | g8rc, ptr_rc_nor0, tlsreg, |
18623 | | /* LDgotTprelL */ |
18624 | | g8rc_nox0, s16imm64, g8rc_nox0, |
18625 | | /* LDgotTprelL32 */ |
18626 | | gprc_nor0, s16imm, gprc_nor0, |
18627 | | /* LDtoc */ |
18628 | | g8rc, i64imm, g8rc, |
18629 | | /* LDtocBA */ |
18630 | | g8rc, i64imm, g8rc, |
18631 | | /* LDtocCPT */ |
18632 | | g8rc, i64imm, g8rc, |
18633 | | /* LDtocJTI */ |
18634 | | g8rc, i64imm, g8rc, |
18635 | | /* LDtocL */ |
18636 | | g8rc, i64imm, g8rc_nox0, |
18637 | | /* LFD */ |
18638 | | f8rc, dispRI, ptr_rc_nor0, |
18639 | | /* LFDEPX */ |
18640 | | f8rc, ptr_rc_nor0, ptr_rc_idx, |
18641 | | /* LFDU */ |
18642 | | f8rc, ptr_rc_nor0, dispRI, ptr_rc_nor0, |
18643 | | /* LFDUX */ |
18644 | | f8rc, ptr_rc_nor0, ptr_rc_nor0, ptr_rc_idx, |
18645 | | /* LFDX */ |
18646 | | f8rc, ptr_rc_nor0, ptr_rc_idx, |
18647 | | /* LFDXTLS */ |
18648 | | f8rc, ptr_rc_nor0, tlsreg, |
18649 | | /* LFDXTLS_ */ |
18650 | | f8rc, ptr_rc_nor0, tlsreg, |
18651 | | /* LFIWAX */ |
18652 | | f8rc, ptr_rc_nor0, ptr_rc_idx, |
18653 | | /* LFIWZX */ |
18654 | | f8rc, ptr_rc_nor0, ptr_rc_idx, |
18655 | | /* LFS */ |
18656 | | f4rc, dispRI, ptr_rc_nor0, |
18657 | | /* LFSU */ |
18658 | | f4rc, ptr_rc_nor0, dispRI, ptr_rc_nor0, |
18659 | | /* LFSUX */ |
18660 | | f4rc, ptr_rc_nor0, ptr_rc_nor0, ptr_rc_idx, |
18661 | | /* LFSX */ |
18662 | | f4rc, ptr_rc_nor0, ptr_rc_idx, |
18663 | | /* LFSXTLS */ |
18664 | | f4rc, ptr_rc_nor0, tlsreg, |
18665 | | /* LFSXTLS_ */ |
18666 | | f4rc, ptr_rc_nor0, tlsreg, |
18667 | | /* LHA */ |
18668 | | gprc, dispRI, ptr_rc_nor0, |
18669 | | /* LHA8 */ |
18670 | | g8rc, dispRI, ptr_rc_nor0, |
18671 | | /* LHARX */ |
18672 | | gprc, ptr_rc_nor0, ptr_rc_idx, |
18673 | | /* LHARXL */ |
18674 | | gprc, ptr_rc_nor0, ptr_rc_idx, |
18675 | | /* LHAU */ |
18676 | | gprc, ptr_rc_nor0, dispRI, ptr_rc_nor0, |
18677 | | /* LHAU8 */ |
18678 | | g8rc, ptr_rc_nor0, dispRI, ptr_rc_nor0, |
18679 | | /* LHAUX */ |
18680 | | gprc, ptr_rc_nor0, ptr_rc_nor0, ptr_rc_idx, |
18681 | | /* LHAUX8 */ |
18682 | | g8rc, ptr_rc_nor0, ptr_rc_nor0, ptr_rc_idx, |
18683 | | /* LHAX */ |
18684 | | gprc, ptr_rc_nor0, ptr_rc_idx, |
18685 | | /* LHAX8 */ |
18686 | | g8rc, ptr_rc_nor0, ptr_rc_idx, |
18687 | | /* LHAXTLS */ |
18688 | | g8rc, ptr_rc_nor0, tlsreg, |
18689 | | /* LHAXTLS_ */ |
18690 | | g8rc, ptr_rc_nor0, tlsreg, |
18691 | | /* LHAXTLS_32 */ |
18692 | | gprc, ptr_rc_nor0, tlsreg, |
18693 | | /* LHBRX */ |
18694 | | gprc, ptr_rc_nor0, ptr_rc_idx, |
18695 | | /* LHBRX8 */ |
18696 | | g8rc, ptr_rc_nor0, ptr_rc_idx, |
18697 | | /* LHEPX */ |
18698 | | gprc, ptr_rc_nor0, ptr_rc_idx, |
18699 | | /* LHZ */ |
18700 | | gprc, dispRI, ptr_rc_nor0, |
18701 | | /* LHZ8 */ |
18702 | | g8rc, dispRI, ptr_rc_nor0, |
18703 | | /* LHZCIX */ |
18704 | | gprc, gprc, gprc, |
18705 | | /* LHZU */ |
18706 | | gprc, ptr_rc_nor0, dispRI, ptr_rc_nor0, |
18707 | | /* LHZU8 */ |
18708 | | g8rc, ptr_rc_nor0, dispRI, ptr_rc_nor0, |
18709 | | /* LHZUX */ |
18710 | | gprc, ptr_rc_nor0, ptr_rc_nor0, ptr_rc_idx, |
18711 | | /* LHZUX8 */ |
18712 | | g8rc, ptr_rc_nor0, ptr_rc_nor0, ptr_rc_idx, |
18713 | | /* LHZX */ |
18714 | | gprc, ptr_rc_nor0, ptr_rc_idx, |
18715 | | /* LHZX8 */ |
18716 | | g8rc, ptr_rc_nor0, ptr_rc_idx, |
18717 | | /* LHZXTLS */ |
18718 | | g8rc, ptr_rc_nor0, tlsreg, |
18719 | | /* LHZXTLS_ */ |
18720 | | g8rc, ptr_rc_nor0, tlsreg, |
18721 | | /* LHZXTLS_32 */ |
18722 | | gprc, ptr_rc_nor0, tlsreg, |
18723 | | /* LI */ |
18724 | | gprc, s16imm, |
18725 | | /* LI8 */ |
18726 | | g8rc, s16imm64, |
18727 | | /* LIS */ |
18728 | | gprc, s17imm, |
18729 | | /* LIS8 */ |
18730 | | g8rc, s17imm64, |
18731 | | /* LMW */ |
18732 | | gprc, dispRI, ptr_rc_nor0, |
18733 | | /* LQ */ |
18734 | | g8prc, dispRIX16, ptr_rc_nor0, |
18735 | | /* LQARX */ |
18736 | | g8prc, ptr_rc_nor0, ptr_rc_idx, |
18737 | | /* LQARXL */ |
18738 | | g8prc, ptr_rc_nor0, ptr_rc_idx, |
18739 | | /* LQX_PSEUDO */ |
18740 | | g8prc, ptr_rc_nor0, ptr_rc_idx, |
18741 | | /* LSWI */ |
18742 | | gprc, gprc, u5imm, |
18743 | | /* LVEBX */ |
18744 | | vrrc, ptr_rc_nor0, ptr_rc_idx, |
18745 | | /* LVEHX */ |
18746 | | vrrc, ptr_rc_nor0, ptr_rc_idx, |
18747 | | /* LVEWX */ |
18748 | | vrrc, ptr_rc_nor0, ptr_rc_idx, |
18749 | | /* LVSL */ |
18750 | | vrrc, ptr_rc_nor0, ptr_rc_idx, |
18751 | | /* LVSR */ |
18752 | | vrrc, ptr_rc_nor0, ptr_rc_idx, |
18753 | | /* LVX */ |
18754 | | vrrc, ptr_rc_nor0, ptr_rc_idx, |
18755 | | /* LVXL */ |
18756 | | vrrc, ptr_rc_nor0, ptr_rc_idx, |
18757 | | /* LWA */ |
18758 | | g8rc, dispRIX, ptr_rc_nor0, |
18759 | | /* LWARX */ |
18760 | | gprc, ptr_rc_nor0, ptr_rc_idx, |
18761 | | /* LWARXL */ |
18762 | | gprc, ptr_rc_nor0, ptr_rc_idx, |
18763 | | /* LWAT */ |
18764 | | gprc, gprc, u5imm, |
18765 | | /* LWAUX */ |
18766 | | g8rc, ptr_rc_nor0, ptr_rc_nor0, ptr_rc_idx, |
18767 | | /* LWAX */ |
18768 | | g8rc, ptr_rc_nor0, ptr_rc_idx, |
18769 | | /* LWAXTLS */ |
18770 | | g8rc, ptr_rc_nor0, tlsreg, |
18771 | | /* LWAXTLS_ */ |
18772 | | g8rc, ptr_rc_nor0, tlsreg, |
18773 | | /* LWAXTLS_32 */ |
18774 | | gprc, ptr_rc_nor0, tlsreg, |
18775 | | /* LWAX_32 */ |
18776 | | gprc, ptr_rc_nor0, ptr_rc_idx, |
18777 | | /* LWA_32 */ |
18778 | | gprc, dispRIX, ptr_rc_nor0, |
18779 | | /* LWBRX */ |
18780 | | gprc, ptr_rc_nor0, ptr_rc_idx, |
18781 | | /* LWBRX8 */ |
18782 | | g8rc, ptr_rc_nor0, ptr_rc_idx, |
18783 | | /* LWEPX */ |
18784 | | gprc, ptr_rc_nor0, ptr_rc_idx, |
18785 | | /* LWZ */ |
18786 | | gprc, dispRI, ptr_rc_nor0, |
18787 | | /* LWZ8 */ |
18788 | | g8rc, dispRI, ptr_rc_nor0, |
18789 | | /* LWZCIX */ |
18790 | | gprc, gprc, gprc, |
18791 | | /* LWZU */ |
18792 | | gprc, ptr_rc_nor0, dispRI, ptr_rc_nor0, |
18793 | | /* LWZU8 */ |
18794 | | g8rc, ptr_rc_nor0, dispRI, ptr_rc_nor0, |
18795 | | /* LWZUX */ |
18796 | | gprc, ptr_rc_nor0, ptr_rc_nor0, ptr_rc_idx, |
18797 | | /* LWZUX8 */ |
18798 | | g8rc, ptr_rc_nor0, ptr_rc_nor0, ptr_rc_idx, |
18799 | | /* LWZX */ |
18800 | | gprc, ptr_rc_nor0, ptr_rc_idx, |
18801 | | /* LWZX8 */ |
18802 | | g8rc, ptr_rc_nor0, ptr_rc_idx, |
18803 | | /* LWZXTLS */ |
18804 | | g8rc, ptr_rc_nor0, tlsreg, |
18805 | | /* LWZXTLS_ */ |
18806 | | g8rc, ptr_rc_nor0, tlsreg, |
18807 | | /* LWZXTLS_32 */ |
18808 | | gprc, ptr_rc_nor0, tlsreg, |
18809 | | /* LWZtoc */ |
18810 | | gprc, i32imm, gprc, |
18811 | | /* LWZtocL */ |
18812 | | gprc, i32imm, gprc_nor0, |
18813 | | /* LXSD */ |
18814 | | vfrc, dispRIX, ptr_rc_nor0, |
18815 | | /* LXSDX */ |
18816 | | vsfrc, ptr_rc_nor0, ptr_rc_idx, |
18817 | | /* LXSIBZX */ |
18818 | | vsfrc, ptr_rc_nor0, ptr_rc_idx, |
18819 | | /* LXSIHZX */ |
18820 | | vsfrc, ptr_rc_nor0, ptr_rc_idx, |
18821 | | /* LXSIWAX */ |
18822 | | vsfrc, ptr_rc_nor0, ptr_rc_idx, |
18823 | | /* LXSIWZX */ |
18824 | | vsfrc, ptr_rc_nor0, ptr_rc_idx, |
18825 | | /* LXSSP */ |
18826 | | vfrc, dispRIX, ptr_rc_nor0, |
18827 | | /* LXSSPX */ |
18828 | | vssrc, ptr_rc_nor0, ptr_rc_idx, |
18829 | | /* LXV */ |
18830 | | vsrc, dispRIX16, ptr_rc_nor0, |
18831 | | /* LXVB16X */ |
18832 | | vsrc, ptr_rc_nor0, ptr_rc_idx, |
18833 | | /* LXVD2X */ |
18834 | | vsrc, ptr_rc_nor0, ptr_rc_idx, |
18835 | | /* LXVDSX */ |
18836 | | vsrc, ptr_rc_nor0, ptr_rc_idx, |
18837 | | /* LXVH8X */ |
18838 | | vsrc, ptr_rc_nor0, ptr_rc_idx, |
18839 | | /* LXVKQ */ |
18840 | | vsrc, u5imm, |
18841 | | /* LXVL */ |
18842 | | vsrc, ptr_rc_nor0, g8rc, |
18843 | | /* LXVLL */ |
18844 | | vsrc, ptr_rc_nor0, g8rc, |
18845 | | /* LXVP */ |
18846 | | vsrprc, dispRIX16, ptr_rc_nor0, |
18847 | | /* LXVPRL */ |
18848 | | vsrprc, ptr_rc_nor0, g8rc, |
18849 | | /* LXVPRLL */ |
18850 | | vsrprc, ptr_rc_nor0, g8rc, |
18851 | | /* LXVPX */ |
18852 | | vsrprc, ptr_rc_nor0, ptr_rc_idx, |
18853 | | /* LXVRBX */ |
18854 | | vsrc, ptr_rc_nor0, ptr_rc_idx, |
18855 | | /* LXVRDX */ |
18856 | | vsrc, ptr_rc_nor0, ptr_rc_idx, |
18857 | | /* LXVRHX */ |
18858 | | vsrc, ptr_rc_nor0, ptr_rc_idx, |
18859 | | /* LXVRL */ |
18860 | | vsrc, ptr_rc_nor0, g8rc, |
18861 | | /* LXVRLL */ |
18862 | | vsrc, ptr_rc_nor0, g8rc, |
18863 | | /* LXVRWX */ |
18864 | | vsrc, ptr_rc_nor0, ptr_rc_idx, |
18865 | | /* LXVW4X */ |
18866 | | vsrc, ptr_rc_nor0, ptr_rc_idx, |
18867 | | /* LXVWSX */ |
18868 | | vsrc, ptr_rc_nor0, ptr_rc_idx, |
18869 | | /* LXVX */ |
18870 | | vsrc, ptr_rc_nor0, ptr_rc_idx, |
18871 | | /* MADDHD */ |
18872 | | g8rc, g8rc, g8rc, g8rc, |
18873 | | /* MADDHDU */ |
18874 | | g8rc, g8rc, g8rc, g8rc, |
18875 | | /* MADDLD */ |
18876 | | gprc, gprc, gprc, gprc, |
18877 | | /* MADDLD8 */ |
18878 | | g8rc, g8rc, g8rc, g8rc, |
18879 | | /* MBAR */ |
18880 | | u5imm, |
18881 | | /* MCRF */ |
18882 | | crrc, crrc, |
18883 | | /* MCRFS */ |
18884 | | crrc, crrc, |
18885 | | /* MCRXRX */ |
18886 | | crrc, |
18887 | | /* MFBHRBE */ |
18888 | | gprc, u10imm, u10imm, |
18889 | | /* MFCR */ |
18890 | | gprc, |
18891 | | /* MFCR8 */ |
18892 | | g8rc, |
18893 | | /* MFCTR */ |
18894 | | gprc, |
18895 | | /* MFCTR8 */ |
18896 | | g8rc, |
18897 | | /* MFDCR */ |
18898 | | gprc, i32imm, |
18899 | | /* MFFS */ |
18900 | | f8rc, |
18901 | | /* MFFSCDRN */ |
18902 | | f8rc, f8rc, |
18903 | | /* MFFSCDRNI */ |
18904 | | f8rc, u3imm, |
18905 | | /* MFFSCE */ |
18906 | | f8rc, |
18907 | | /* MFFSCRN */ |
18908 | | f8rc, f8rc, |
18909 | | /* MFFSCRNI */ |
18910 | | f8rc, u2imm, |
18911 | | /* MFFSL */ |
18912 | | f8rc, |
18913 | | /* MFFS_rec */ |
18914 | | f8rc, |
18915 | | /* MFLR */ |
18916 | | gprc, |
18917 | | /* MFLR8 */ |
18918 | | g8rc, |
18919 | | /* MFMSR */ |
18920 | | gprc, |
18921 | | /* MFOCRF */ |
18922 | | gprc, crbitm, |
18923 | | /* MFOCRF8 */ |
18924 | | g8rc, crbitm, |
18925 | | /* MFPMR */ |
18926 | | gprc, i32imm, |
18927 | | /* MFSPR */ |
18928 | | gprc, i32imm, |
18929 | | /* MFSPR8 */ |
18930 | | g8rc, i32imm, |
18931 | | /* MFSR */ |
18932 | | gprc, u4imm, |
18933 | | /* MFSRIN */ |
18934 | | gprc, gprc, |
18935 | | /* MFTB */ |
18936 | | gprc, i32imm, |
18937 | | /* MFTB8 */ |
18938 | | g8rc, |
18939 | | /* MFUDSCR */ |
18940 | | gprc, |
18941 | | /* MFVRD */ |
18942 | | g8rc, vsrc, |
18943 | | /* MFVRSAVE */ |
18944 | | gprc, |
18945 | | /* MFVRSAVEv */ |
18946 | | gprc, VRSAVERC, |
18947 | | /* MFVRWZ */ |
18948 | | gprc, vsrc, |
18949 | | /* MFVSCR */ |
18950 | | vrrc, |
18951 | | /* MFVSRD */ |
18952 | | g8rc, vsfrc, |
18953 | | /* MFVSRLD */ |
18954 | | g8rc, vsrc, |
18955 | | /* MFVSRWZ */ |
18956 | | gprc, vsfrc, |
18957 | | /* MODSD */ |
18958 | | g8rc, g8rc, g8rc, |
18959 | | /* MODSW */ |
18960 | | gprc, gprc, gprc, |
18961 | | /* MODUD */ |
18962 | | g8rc, g8rc, g8rc, |
18963 | | /* MODUW */ |
18964 | | gprc, gprc, gprc, |
18965 | | /* MSGSYNC */ |
18966 | | /* MSYNC */ |
18967 | | /* MTCRF */ |
18968 | | i32imm, gprc, |
18969 | | /* MTCRF8 */ |
18970 | | i32imm, g8rc, |
18971 | | /* MTCTR */ |
18972 | | gprc, |
18973 | | /* MTCTR8 */ |
18974 | | g8rc, |
18975 | | /* MTCTR8loop */ |
18976 | | g8rc, |
18977 | | /* MTCTRloop */ |
18978 | | gprc, |
18979 | | /* MTDCR */ |
18980 | | gprc, i32imm, |
18981 | | /* MTFSB0 */ |
18982 | | u5imm, |
18983 | | /* MTFSB1 */ |
18984 | | u5imm, |
18985 | | /* MTFSF */ |
18986 | | i32imm, f8rc, u1imm, i32imm, |
18987 | | /* MTFSFI */ |
18988 | | u3imm, u4imm, i32imm, |
18989 | | /* MTFSFI_rec */ |
18990 | | u3imm, u4imm, u1imm, |
18991 | | /* MTFSFIb */ |
18992 | | u3imm, u4imm, |
18993 | | /* MTFSF_rec */ |
18994 | | i32imm, f8rc, u1imm, i32imm, |
18995 | | /* MTFSFb */ |
18996 | | i32imm, f8rc, |
18997 | | /* MTLR */ |
18998 | | gprc, |
18999 | | /* MTLR8 */ |
19000 | | g8rc, |
19001 | | /* MTMSR */ |
19002 | | gprc, u1imm, |
19003 | | /* MTMSRD */ |
19004 | | gprc, u1imm, |
19005 | | /* MTOCRF */ |
19006 | | crbitm, gprc, |
19007 | | /* MTOCRF8 */ |
19008 | | crbitm, g8rc, |
19009 | | /* MTPMR */ |
19010 | | i32imm, gprc, |
19011 | | /* MTSPR */ |
19012 | | i32imm, gprc, |
19013 | | /* MTSPR8 */ |
19014 | | i32imm, g8rc, |
19015 | | /* MTSR */ |
19016 | | gprc, u4imm, |
19017 | | /* MTSRIN */ |
19018 | | gprc, gprc, |
19019 | | /* MTUDSCR */ |
19020 | | gprc, |
19021 | | /* MTVRD */ |
19022 | | vsrc, g8rc, |
19023 | | /* MTVRSAVE */ |
19024 | | gprc, |
19025 | | /* MTVRSAVEv */ |
19026 | | VRSAVERC, gprc, |
19027 | | /* MTVRWA */ |
19028 | | vsrc, gprc, |
19029 | | /* MTVRWZ */ |
19030 | | vsrc, gprc, |
19031 | | /* MTVSCR */ |
19032 | | vrrc, |
19033 | | /* MTVSRBM */ |
19034 | | vrrc, g8rc, |
19035 | | /* MTVSRBMI */ |
19036 | | vrrc, u16imm64, |
19037 | | /* MTVSRD */ |
19038 | | vsfrc, g8rc, |
19039 | | /* MTVSRDD */ |
19040 | | vsrc, g8rc_nox0, g8rc, |
19041 | | /* MTVSRDM */ |
19042 | | vrrc, g8rc, |
19043 | | /* MTVSRHM */ |
19044 | | vrrc, g8rc, |
19045 | | /* MTVSRQM */ |
19046 | | vrrc, g8rc, |
19047 | | /* MTVSRWA */ |
19048 | | vsfrc, gprc, |
19049 | | /* MTVSRWM */ |
19050 | | vrrc, g8rc, |
19051 | | /* MTVSRWS */ |
19052 | | vsrc, gprc, |
19053 | | /* MTVSRWZ */ |
19054 | | vsfrc, gprc, |
19055 | | /* MULHD */ |
19056 | | g8rc, g8rc, g8rc, |
19057 | | /* MULHDU */ |
19058 | | g8rc, g8rc, g8rc, |
19059 | | /* MULHDU_rec */ |
19060 | | g8rc, g8rc, g8rc, |
19061 | | /* MULHD_rec */ |
19062 | | g8rc, g8rc, g8rc, |
19063 | | /* MULHW */ |
19064 | | gprc, gprc, gprc, |
19065 | | /* MULHWU */ |
19066 | | gprc, gprc, gprc, |
19067 | | /* MULHWU_rec */ |
19068 | | gprc, gprc, gprc, |
19069 | | /* MULHW_rec */ |
19070 | | gprc, gprc, gprc, |
19071 | | /* MULLD */ |
19072 | | g8rc, g8rc, g8rc, |
19073 | | /* MULLDO */ |
19074 | | g8rc, g8rc, g8rc, |
19075 | | /* MULLDO_rec */ |
19076 | | g8rc, g8rc, g8rc, |
19077 | | /* MULLD_rec */ |
19078 | | g8rc, g8rc, g8rc, |
19079 | | /* MULLI */ |
19080 | | gprc, gprc, s16imm, |
19081 | | /* MULLI8 */ |
19082 | | g8rc, g8rc, s16imm64, |
19083 | | /* MULLW */ |
19084 | | gprc, gprc, gprc, |
19085 | | /* MULLWO */ |
19086 | | gprc, gprc, gprc, |
19087 | | /* MULLWO_rec */ |
19088 | | gprc, gprc, gprc, |
19089 | | /* MULLW_rec */ |
19090 | | gprc, gprc, gprc, |
19091 | | /* MoveGOTtoLR */ |
19092 | | /* MovePCtoLR */ |
19093 | | /* MovePCtoLR8 */ |
19094 | | /* NAND */ |
19095 | | gprc, gprc, gprc, |
19096 | | /* NAND8 */ |
19097 | | g8rc, g8rc, g8rc, |
19098 | | /* NAND8_rec */ |
19099 | | g8rc, g8rc, g8rc, |
19100 | | /* NAND_rec */ |
19101 | | gprc, gprc, gprc, |
19102 | | /* NAP */ |
19103 | | /* NEG */ |
19104 | | gprc, gprc, |
19105 | | /* NEG8 */ |
19106 | | g8rc, g8rc, |
19107 | | /* NEG8O */ |
19108 | | g8rc, g8rc, |
19109 | | /* NEG8O_rec */ |
19110 | | g8rc, g8rc, |
19111 | | /* NEG8_rec */ |
19112 | | g8rc, g8rc, |
19113 | | /* NEGO */ |
19114 | | gprc, gprc, |
19115 | | /* NEGO_rec */ |
19116 | | gprc, gprc, |
19117 | | /* NEG_rec */ |
19118 | | gprc, gprc, |
19119 | | /* NOP */ |
19120 | | /* NOP_GT_PWR6 */ |
19121 | | /* NOP_GT_PWR7 */ |
19122 | | /* NOR */ |
19123 | | gprc, gprc, gprc, |
19124 | | /* NOR8 */ |
19125 | | g8rc, g8rc, g8rc, |
19126 | | /* NOR8_rec */ |
19127 | | g8rc, g8rc, g8rc, |
19128 | | /* NOR_rec */ |
19129 | | gprc, gprc, gprc, |
19130 | | /* OR */ |
19131 | | gprc, gprc, gprc, |
19132 | | /* OR8 */ |
19133 | | g8rc, g8rc, g8rc, |
19134 | | /* OR8_rec */ |
19135 | | g8rc, g8rc, g8rc, |
19136 | | /* ORC */ |
19137 | | gprc, gprc, gprc, |
19138 | | /* ORC8 */ |
19139 | | g8rc, g8rc, g8rc, |
19140 | | /* ORC8_rec */ |
19141 | | g8rc, g8rc, g8rc, |
19142 | | /* ORC_rec */ |
19143 | | gprc, gprc, gprc, |
19144 | | /* ORI */ |
19145 | | gprc, gprc, u16imm, |
19146 | | /* ORI8 */ |
19147 | | g8rc, g8rc, u16imm64, |
19148 | | /* ORIS */ |
19149 | | gprc, gprc, u16imm, |
19150 | | /* ORIS8 */ |
19151 | | g8rc, g8rc, u16imm64, |
19152 | | /* OR_rec */ |
19153 | | gprc, gprc, gprc, |
19154 | | /* PADDI */ |
19155 | | gprc, gprc_nor0, s34imm, |
19156 | | /* PADDI8 */ |
19157 | | g8rc, g8rc_nox0, s34imm, |
19158 | | /* PADDI8pc */ |
19159 | | g8rc, immZero, s34imm_pcrel, |
19160 | | /* PADDIdtprel */ |
19161 | | g8rc, g8rc_nox0, s16imm64, |
19162 | | /* PADDIpc */ |
19163 | | gprc, immZero, s34imm_pcrel, |
19164 | | /* PDEPD */ |
19165 | | g8rc, g8rc, g8rc, |
19166 | | /* PEXTD */ |
19167 | | g8rc, g8rc, g8rc, |
19168 | | /* PLA */ |
19169 | | gprc, gprc_nor0, s34imm, |
19170 | | /* PLA8 */ |
19171 | | g8rc, g8rc_nox0, s34imm, |
19172 | | /* PLA8pc */ |
19173 | | g8rc, s34imm_pcrel, |
19174 | | /* PLApc */ |
19175 | | gprc, s34imm_pcrel, |
19176 | | /* PLBZ */ |
19177 | | gprc, dispRI34, ptr_rc_nor0, |
19178 | | /* PLBZ8 */ |
19179 | | g8rc, dispRI34, ptr_rc_nor0, |
19180 | | /* PLBZ8nopc */ |
19181 | | g8rc, dispRI34, ptr_rc_nor0, |
19182 | | /* PLBZ8onlypc */ |
19183 | | g8rc, s34imm_pcrel, |
19184 | | /* PLBZ8pc */ |
19185 | | g8rc, dispRI34_pcrel, immZero, |
19186 | | /* PLBZnopc */ |
19187 | | gprc, dispRI34, ptr_rc_nor0, |
19188 | | /* PLBZonlypc */ |
19189 | | gprc, s34imm_pcrel, |
19190 | | /* PLBZpc */ |
19191 | | gprc, dispRI34_pcrel, immZero, |
19192 | | /* PLD */ |
19193 | | g8rc, dispRI34, ptr_rc_nor0, |
19194 | | /* PLDnopc */ |
19195 | | g8rc, dispRI34, ptr_rc_nor0, |
19196 | | /* PLDonlypc */ |
19197 | | g8rc, s34imm_pcrel, |
19198 | | /* PLDpc */ |
19199 | | g8rc, dispRI34_pcrel, immZero, |
19200 | | /* PLFD */ |
19201 | | f8rc, dispRI34, ptr_rc_nor0, |
19202 | | /* PLFDnopc */ |
19203 | | f8rc, dispRI34, ptr_rc_nor0, |
19204 | | /* PLFDonlypc */ |
19205 | | f8rc, s34imm_pcrel, |
19206 | | /* PLFDpc */ |
19207 | | f8rc, dispRI34_pcrel, immZero, |
19208 | | /* PLFS */ |
19209 | | f4rc, dispRI34, ptr_rc_nor0, |
19210 | | /* PLFSnopc */ |
19211 | | f4rc, dispRI34, ptr_rc_nor0, |
19212 | | /* PLFSonlypc */ |
19213 | | f4rc, s34imm_pcrel, |
19214 | | /* PLFSpc */ |
19215 | | f4rc, dispRI34_pcrel, immZero, |
19216 | | /* PLHA */ |
19217 | | gprc, dispRI34, ptr_rc_nor0, |
19218 | | /* PLHA8 */ |
19219 | | g8rc, dispRI34, ptr_rc_nor0, |
19220 | | /* PLHA8nopc */ |
19221 | | g8rc, dispRI34, ptr_rc_nor0, |
19222 | | /* PLHA8onlypc */ |
19223 | | g8rc, s34imm_pcrel, |
19224 | | /* PLHA8pc */ |
19225 | | g8rc, dispRI34_pcrel, immZero, |
19226 | | /* PLHAnopc */ |
19227 | | gprc, dispRI34, ptr_rc_nor0, |
19228 | | /* PLHAonlypc */ |
19229 | | gprc, s34imm_pcrel, |
19230 | | /* PLHApc */ |
19231 | | gprc, dispRI34_pcrel, immZero, |
19232 | | /* PLHZ */ |
19233 | | gprc, dispRI34, ptr_rc_nor0, |
19234 | | /* PLHZ8 */ |
19235 | | g8rc, dispRI34, ptr_rc_nor0, |
19236 | | /* PLHZ8nopc */ |
19237 | | g8rc, dispRI34, ptr_rc_nor0, |
19238 | | /* PLHZ8onlypc */ |
19239 | | g8rc, s34imm_pcrel, |
19240 | | /* PLHZ8pc */ |
19241 | | g8rc, dispRI34_pcrel, immZero, |
19242 | | /* PLHZnopc */ |
19243 | | gprc, dispRI34, ptr_rc_nor0, |
19244 | | /* PLHZonlypc */ |
19245 | | gprc, s34imm_pcrel, |
19246 | | /* PLHZpc */ |
19247 | | gprc, dispRI34_pcrel, immZero, |
19248 | | /* PLI */ |
19249 | | gprc, s34imm, |
19250 | | /* PLI8 */ |
19251 | | g8rc, s34imm, |
19252 | | /* PLWA */ |
19253 | | gprc, dispRI34, ptr_rc_nor0, |
19254 | | /* PLWA8 */ |
19255 | | g8rc, dispRI34, ptr_rc_nor0, |
19256 | | /* PLWA8nopc */ |
19257 | | g8rc, dispRI34, ptr_rc_nor0, |
19258 | | /* PLWA8onlypc */ |
19259 | | g8rc, s34imm_pcrel, |
19260 | | /* PLWA8pc */ |
19261 | | g8rc, dispRI34_pcrel, immZero, |
19262 | | /* PLWAnopc */ |
19263 | | gprc, dispRI34, ptr_rc_nor0, |
19264 | | /* PLWAonlypc */ |
19265 | | gprc, s34imm_pcrel, |
19266 | | /* PLWApc */ |
19267 | | gprc, dispRI34_pcrel, immZero, |
19268 | | /* PLWZ */ |
19269 | | gprc, dispRI34, ptr_rc_nor0, |
19270 | | /* PLWZ8 */ |
19271 | | g8rc, dispRI34, ptr_rc_nor0, |
19272 | | /* PLWZ8nopc */ |
19273 | | g8rc, dispRI34, ptr_rc_nor0, |
19274 | | /* PLWZ8onlypc */ |
19275 | | g8rc, s34imm_pcrel, |
19276 | | /* PLWZ8pc */ |
19277 | | g8rc, dispRI34_pcrel, immZero, |
19278 | | /* PLWZnopc */ |
19279 | | gprc, dispRI34, ptr_rc_nor0, |
19280 | | /* PLWZonlypc */ |
19281 | | gprc, s34imm_pcrel, |
19282 | | /* PLWZpc */ |
19283 | | gprc, dispRI34_pcrel, immZero, |
19284 | | /* PLXSD */ |
19285 | | vfrc, dispRI34, ptr_rc_nor0, |
19286 | | /* PLXSDnopc */ |
19287 | | vfrc, dispRI34, ptr_rc_nor0, |
19288 | | /* PLXSDonlypc */ |
19289 | | vfrc, s34imm_pcrel, |
19290 | | /* PLXSDpc */ |
19291 | | vfrc, dispRI34_pcrel, immZero, |
19292 | | /* PLXSSP */ |
19293 | | vfrc, dispRI34, ptr_rc_nor0, |
19294 | | /* PLXSSPnopc */ |
19295 | | vfrc, dispRI34, ptr_rc_nor0, |
19296 | | /* PLXSSPonlypc */ |
19297 | | vfrc, s34imm_pcrel, |
19298 | | /* PLXSSPpc */ |
19299 | | vfrc, dispRI34_pcrel, immZero, |
19300 | | /* PLXV */ |
19301 | | vsrc, dispRI34, ptr_rc_nor0, |
19302 | | /* PLXVP */ |
19303 | | vsrprc, dispRI34, ptr_rc_nor0, |
19304 | | /* PLXVPnopc */ |
19305 | | vsrprc, dispRI34, ptr_rc_nor0, |
19306 | | /* PLXVPonlypc */ |
19307 | | vsrprc, s34imm_pcrel, |
19308 | | /* PLXVPpc */ |
19309 | | vsrprc, dispRI34_pcrel, immZero, |
19310 | | /* PLXVnopc */ |
19311 | | vsrc, dispRI34, ptr_rc_nor0, |
19312 | | /* PLXVonlypc */ |
19313 | | vsrc, s34imm_pcrel, |
19314 | | /* PLXVpc */ |
19315 | | vsrc, dispRI34_pcrel, immZero, |
19316 | | /* PMXVBF16GER2 */ |
19317 | | acc, vsrc, vsrc, u4imm, u4imm, u2imm, |
19318 | | /* PMXVBF16GER2NN */ |
19319 | | acc, acc, vsrc, vsrc, u4imm, u4imm, u2imm, |
19320 | | /* PMXVBF16GER2NP */ |
19321 | | acc, acc, vsrc, vsrc, u4imm, u4imm, u2imm, |
19322 | | /* PMXVBF16GER2PN */ |
19323 | | acc, acc, vsrc, vsrc, u4imm, u4imm, u2imm, |
19324 | | /* PMXVBF16GER2PP */ |
19325 | | acc, acc, vsrc, vsrc, u4imm, u4imm, u2imm, |
19326 | | /* PMXVBF16GER2W */ |
19327 | | wacc, vsrc, vsrc, u4imm, u4imm, u2imm, |
19328 | | /* PMXVBF16GER2WNN */ |
19329 | | wacc, wacc, vsrc, vsrc, u4imm, u4imm, u2imm, |
19330 | | /* PMXVBF16GER2WNP */ |
19331 | | wacc, wacc, vsrc, vsrc, u4imm, u4imm, u2imm, |
19332 | | /* PMXVBF16GER2WPN */ |
19333 | | wacc, wacc, vsrc, vsrc, u4imm, u4imm, u2imm, |
19334 | | /* PMXVBF16GER2WPP */ |
19335 | | wacc, wacc, vsrc, vsrc, u4imm, u4imm, u2imm, |
19336 | | /* PMXVF16GER2 */ |
19337 | | acc, vsrc, vsrc, u4imm, u4imm, u2imm, |
19338 | | /* PMXVF16GER2NN */ |
19339 | | acc, acc, vsrc, vsrc, u4imm, u4imm, u2imm, |
19340 | | /* PMXVF16GER2NP */ |
19341 | | acc, acc, vsrc, vsrc, u4imm, u4imm, u2imm, |
19342 | | /* PMXVF16GER2PN */ |
19343 | | acc, acc, vsrc, vsrc, u4imm, u4imm, u2imm, |
19344 | | /* PMXVF16GER2PP */ |
19345 | | acc, acc, vsrc, vsrc, u4imm, u4imm, u2imm, |
19346 | | /* PMXVF16GER2W */ |
19347 | | wacc, vsrc, vsrc, u4imm, u4imm, u2imm, |
19348 | | /* PMXVF16GER2WNN */ |
19349 | | wacc, wacc, vsrc, vsrc, u4imm, u4imm, u2imm, |
19350 | | /* PMXVF16GER2WNP */ |
19351 | | wacc, wacc, vsrc, vsrc, u4imm, u4imm, u2imm, |
19352 | | /* PMXVF16GER2WPN */ |
19353 | | wacc, wacc, vsrc, vsrc, u4imm, u4imm, u2imm, |
19354 | | /* PMXVF16GER2WPP */ |
19355 | | wacc, wacc, vsrc, vsrc, u4imm, u4imm, u2imm, |
19356 | | /* PMXVF32GER */ |
19357 | | acc, vsrc, vsrc, u4imm, u4imm, |
19358 | | /* PMXVF32GERNN */ |
19359 | | acc, acc, vsrc, vsrc, u4imm, u4imm, |
19360 | | /* PMXVF32GERNP */ |
19361 | | acc, acc, vsrc, vsrc, u4imm, u4imm, |
19362 | | /* PMXVF32GERPN */ |
19363 | | acc, acc, vsrc, vsrc, u4imm, u4imm, |
19364 | | /* PMXVF32GERPP */ |
19365 | | acc, acc, vsrc, vsrc, u4imm, u4imm, |
19366 | | /* PMXVF32GERW */ |
19367 | | wacc, vsrc, vsrc, u4imm, u4imm, |
19368 | | /* PMXVF32GERWNN */ |
19369 | | wacc, wacc, vsrc, vsrc, u4imm, u4imm, |
19370 | | /* PMXVF32GERWNP */ |
19371 | | wacc, wacc, vsrc, vsrc, u4imm, u4imm, |
19372 | | /* PMXVF32GERWPN */ |
19373 | | wacc, wacc, vsrc, vsrc, u4imm, u4imm, |
19374 | | /* PMXVF32GERWPP */ |
19375 | | wacc, wacc, vsrc, vsrc, u4imm, u4imm, |
19376 | | /* PMXVF64GER */ |
19377 | | acc, vsrpevenrc, vsrc, u4imm, u2imm, |
19378 | | /* PMXVF64GERNN */ |
19379 | | acc, acc, vsrpevenrc, vsrc, u4imm, u2imm, |
19380 | | /* PMXVF64GERNP */ |
19381 | | acc, acc, vsrpevenrc, vsrc, u4imm, u2imm, |
19382 | | /* PMXVF64GERPN */ |
19383 | | acc, acc, vsrpevenrc, vsrc, u4imm, u2imm, |
19384 | | /* PMXVF64GERPP */ |
19385 | | acc, acc, vsrpevenrc, vsrc, u4imm, u2imm, |
19386 | | /* PMXVF64GERW */ |
19387 | | wacc, vsrpevenrc, vsrc, u4imm, u2imm, |
19388 | | /* PMXVF64GERWNN */ |
19389 | | wacc, wacc, vsrpevenrc, vsrc, u4imm, u2imm, |
19390 | | /* PMXVF64GERWNP */ |
19391 | | wacc, wacc, vsrpevenrc, vsrc, u4imm, u2imm, |
19392 | | /* PMXVF64GERWPN */ |
19393 | | wacc, wacc, vsrpevenrc, vsrc, u4imm, u2imm, |
19394 | | /* PMXVF64GERWPP */ |
19395 | | wacc, wacc, vsrpevenrc, vsrc, u4imm, u2imm, |
19396 | | /* PMXVI16GER2 */ |
19397 | | acc, vsrc, vsrc, u4imm, u4imm, u2imm, |
19398 | | /* PMXVI16GER2PP */ |
19399 | | acc, acc, vsrc, vsrc, u4imm, u4imm, u2imm, |
19400 | | /* PMXVI16GER2S */ |
19401 | | acc, vsrc, vsrc, u4imm, u4imm, u2imm, |
19402 | | /* PMXVI16GER2SPP */ |
19403 | | acc, acc, vsrc, vsrc, u4imm, u4imm, u2imm, |
19404 | | /* PMXVI16GER2SW */ |
19405 | | wacc, vsrc, vsrc, u4imm, u4imm, u2imm, |
19406 | | /* PMXVI16GER2SWPP */ |
19407 | | wacc, wacc, vsrc, vsrc, u4imm, u4imm, u2imm, |
19408 | | /* PMXVI16GER2W */ |
19409 | | wacc, vsrc, vsrc, u4imm, u4imm, u2imm, |
19410 | | /* PMXVI16GER2WPP */ |
19411 | | acc, wacc, vsrc, vsrc, u4imm, u4imm, u2imm, |
19412 | | /* PMXVI4GER8 */ |
19413 | | acc, vsrc, vsrc, u4imm, u4imm, u8imm, |
19414 | | /* PMXVI4GER8PP */ |
19415 | | acc, acc, vsrc, vsrc, u4imm, u4imm, u8imm, |
19416 | | /* PMXVI4GER8W */ |
19417 | | wacc, vsrc, vsrc, u4imm, u4imm, u8imm, |
19418 | | /* PMXVI4GER8WPP */ |
19419 | | wacc, wacc, vsrc, vsrc, u4imm, u4imm, u8imm, |
19420 | | /* PMXVI8GER4 */ |
19421 | | acc, vsrc, vsrc, u4imm, u4imm, u4imm, |
19422 | | /* PMXVI8GER4PP */ |
19423 | | acc, acc, vsrc, vsrc, u4imm, u4imm, u4imm, |
19424 | | /* PMXVI8GER4SPP */ |
19425 | | acc, acc, vsrc, vsrc, u4imm, u4imm, u4imm, |
19426 | | /* PMXVI8GER4W */ |
19427 | | wacc, vsrc, vsrc, u4imm, u4imm, u4imm, |
19428 | | /* PMXVI8GER4WPP */ |
19429 | | wacc, wacc, vsrc, vsrc, u4imm, u4imm, u4imm, |
19430 | | /* PMXVI8GER4WSPP */ |
19431 | | wacc, wacc, vsrc, vsrc, u4imm, u4imm, u4imm, |
19432 | | /* POPCNTB */ |
19433 | | gprc, gprc, |
19434 | | /* POPCNTB8 */ |
19435 | | g8rc, g8rc, |
19436 | | /* POPCNTD */ |
19437 | | g8rc, g8rc, |
19438 | | /* POPCNTW */ |
19439 | | gprc, gprc, |
19440 | | /* PPC32GOT */ |
19441 | | gprc, |
19442 | | /* PPC32PICGOT */ |
19443 | | gprc, gprc, |
19444 | | /* PREPARE_PROBED_ALLOCA_32 */ |
19445 | | gprc, gprc, gprc, dispRI, ptr_rc_nor0, |
19446 | | /* PREPARE_PROBED_ALLOCA_64 */ |
19447 | | g8rc, g8rc, g8rc, dispRI, ptr_rc_nor0, |
19448 | | /* PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_32 */ |
19449 | | gprc, gprc, gprc, dispRI, ptr_rc_nor0, |
19450 | | /* PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_64 */ |
19451 | | g8rc, g8rc, g8rc, dispRI, ptr_rc_nor0, |
19452 | | /* PROBED_ALLOCA_32 */ |
19453 | | gprc, gprc, dispRI, ptr_rc_nor0, |
19454 | | /* PROBED_ALLOCA_64 */ |
19455 | | g8rc, g8rc, dispRI, ptr_rc_nor0, |
19456 | | /* PROBED_STACKALLOC_32 */ |
19457 | | gprc, gprc, i64imm, |
19458 | | /* PROBED_STACKALLOC_64 */ |
19459 | | g8rc, g8rc, i64imm, |
19460 | | /* PSTB */ |
19461 | | gprc, dispRI34, ptr_rc_nor0, |
19462 | | /* PSTB8 */ |
19463 | | g8rc, dispRI34, ptr_rc_nor0, |
19464 | | /* PSTB8nopc */ |
19465 | | g8rc, dispRI34, ptr_rc_nor0, |
19466 | | /* PSTB8onlypc */ |
19467 | | g8rc, s34imm_pcrel, |
19468 | | /* PSTB8pc */ |
19469 | | g8rc, dispRI34_pcrel, immZero, |
19470 | | /* PSTBnopc */ |
19471 | | gprc, dispRI34, ptr_rc_nor0, |
19472 | | /* PSTBonlypc */ |
19473 | | gprc, s34imm_pcrel, |
19474 | | /* PSTBpc */ |
19475 | | gprc, dispRI34_pcrel, immZero, |
19476 | | /* PSTD */ |
19477 | | g8rc, dispRI34, ptr_rc_nor0, |
19478 | | /* PSTDnopc */ |
19479 | | g8rc, dispRI34, ptr_rc_nor0, |
19480 | | /* PSTDonlypc */ |
19481 | | g8rc, s34imm_pcrel, |
19482 | | /* PSTDpc */ |
19483 | | g8rc, dispRI34_pcrel, immZero, |
19484 | | /* PSTFD */ |
19485 | | f8rc, dispRI34, ptr_rc_nor0, |
19486 | | /* PSTFDnopc */ |
19487 | | f8rc, dispRI34, ptr_rc_nor0, |
19488 | | /* PSTFDonlypc */ |
19489 | | f8rc, s34imm_pcrel, |
19490 | | /* PSTFDpc */ |
19491 | | f8rc, dispRI34_pcrel, immZero, |
19492 | | /* PSTFS */ |
19493 | | f4rc, dispRI34, ptr_rc_nor0, |
19494 | | /* PSTFSnopc */ |
19495 | | f4rc, dispRI34, ptr_rc_nor0, |
19496 | | /* PSTFSonlypc */ |
19497 | | f4rc, s34imm_pcrel, |
19498 | | /* PSTFSpc */ |
19499 | | f4rc, dispRI34_pcrel, immZero, |
19500 | | /* PSTH */ |
19501 | | gprc, dispRI34, ptr_rc_nor0, |
19502 | | /* PSTH8 */ |
19503 | | g8rc, dispRI34, ptr_rc_nor0, |
19504 | | /* PSTH8nopc */ |
19505 | | g8rc, dispRI34, ptr_rc_nor0, |
19506 | | /* PSTH8onlypc */ |
19507 | | g8rc, s34imm_pcrel, |
19508 | | /* PSTH8pc */ |
19509 | | g8rc, dispRI34_pcrel, immZero, |
19510 | | /* PSTHnopc */ |
19511 | | gprc, dispRI34, ptr_rc_nor0, |
19512 | | /* PSTHonlypc */ |
19513 | | gprc, s34imm_pcrel, |
19514 | | /* PSTHpc */ |
19515 | | gprc, dispRI34_pcrel, immZero, |
19516 | | /* PSTW */ |
19517 | | gprc, dispRI34, ptr_rc_nor0, |
19518 | | /* PSTW8 */ |
19519 | | g8rc, dispRI34, ptr_rc_nor0, |
19520 | | /* PSTW8nopc */ |
19521 | | g8rc, dispRI34, ptr_rc_nor0, |
19522 | | /* PSTW8onlypc */ |
19523 | | g8rc, s34imm_pcrel, |
19524 | | /* PSTW8pc */ |
19525 | | g8rc, dispRI34_pcrel, immZero, |
19526 | | /* PSTWnopc */ |
19527 | | gprc, dispRI34, ptr_rc_nor0, |
19528 | | /* PSTWonlypc */ |
19529 | | gprc, s34imm_pcrel, |
19530 | | /* PSTWpc */ |
19531 | | gprc, dispRI34_pcrel, immZero, |
19532 | | /* PSTXSD */ |
19533 | | vfrc, dispRI34, ptr_rc_nor0, |
19534 | | /* PSTXSDnopc */ |
19535 | | vfrc, dispRI34, ptr_rc_nor0, |
19536 | | /* PSTXSDonlypc */ |
19537 | | vfrc, s34imm_pcrel, |
19538 | | /* PSTXSDpc */ |
19539 | | vfrc, dispRI34_pcrel, immZero, |
19540 | | /* PSTXSSP */ |
19541 | | vfrc, dispRI34, ptr_rc_nor0, |
19542 | | /* PSTXSSPnopc */ |
19543 | | vfrc, dispRI34, ptr_rc_nor0, |
19544 | | /* PSTXSSPonlypc */ |
19545 | | vfrc, s34imm_pcrel, |
19546 | | /* PSTXSSPpc */ |
19547 | | vfrc, dispRI34_pcrel, immZero, |
19548 | | /* PSTXV */ |
19549 | | vsrc, dispRI34, ptr_rc_nor0, |
19550 | | /* PSTXVP */ |
19551 | | vsrprc, dispRI34, ptr_rc_nor0, |
19552 | | /* PSTXVPnopc */ |
19553 | | vsrprc, dispRI34, ptr_rc_nor0, |
19554 | | /* PSTXVPonlypc */ |
19555 | | vsrprc, s34imm_pcrel, |
19556 | | /* PSTXVPpc */ |
19557 | | vsrprc, dispRI34_pcrel, immZero, |
19558 | | /* PSTXVnopc */ |
19559 | | vsrc, dispRI34, ptr_rc_nor0, |
19560 | | /* PSTXVonlypc */ |
19561 | | vsrc, s34imm_pcrel, |
19562 | | /* PSTXVpc */ |
19563 | | vsrc, dispRI34_pcrel, immZero, |
19564 | | /* PseudoEIEIO */ |
19565 | | /* RESTORE_ACC */ |
19566 | | acc, dispRIX16, ptr_rc_nor0, |
19567 | | /* RESTORE_CR */ |
19568 | | crrc, dispRI, ptr_rc_nor0, |
19569 | | /* RESTORE_CRBIT */ |
19570 | | crbitrc, dispRI, ptr_rc_nor0, |
19571 | | /* RESTORE_QUADWORD */ |
19572 | | g8prc, dispRIX, ptr_rc_nor0, |
19573 | | /* RESTORE_UACC */ |
19574 | | uacc, dispRIX16, ptr_rc_nor0, |
19575 | | /* RESTORE_WACC */ |
19576 | | wacc, dispRIX16, ptr_rc_nor0, |
19577 | | /* RFCI */ |
19578 | | /* RFDI */ |
19579 | | /* RFEBB */ |
19580 | | u1imm, |
19581 | | /* RFI */ |
19582 | | /* RFID */ |
19583 | | /* RFMCI */ |
19584 | | /* RLDCL */ |
19585 | | g8rc, g8rc, gprc, u6imm, |
19586 | | /* RLDCL_rec */ |
19587 | | g8rc, g8rc, gprc, u6imm, |
19588 | | /* RLDCR */ |
19589 | | g8rc, g8rc, gprc, u6imm, |
19590 | | /* RLDCR_rec */ |
19591 | | g8rc, g8rc, gprc, u6imm, |
19592 | | /* RLDIC */ |
19593 | | g8rc, g8rc, u6imm, u6imm, |
19594 | | /* RLDICL */ |
19595 | | g8rc, g8rc, u6imm, u6imm, |
19596 | | /* RLDICL_32 */ |
19597 | | gprc, gprc, u6imm, u6imm, |
19598 | | /* RLDICL_32_64 */ |
19599 | | g8rc, gprc, u6imm, u6imm, |
19600 | | /* RLDICL_32_rec */ |
19601 | | gprc, gprc, u6imm, u6imm, |
19602 | | /* RLDICL_rec */ |
19603 | | g8rc, g8rc, u6imm, u6imm, |
19604 | | /* RLDICR */ |
19605 | | g8rc, g8rc, u6imm, u6imm, |
19606 | | /* RLDICR_32 */ |
19607 | | gprc, gprc, u6imm, u6imm, |
19608 | | /* RLDICR_rec */ |
19609 | | g8rc, g8rc, u6imm, u6imm, |
19610 | | /* RLDIC_rec */ |
19611 | | g8rc, g8rc, u6imm, u6imm, |
19612 | | /* RLDIMI */ |
19613 | | g8rc, g8rc, g8rc, u6imm, u6imm, |
19614 | | /* RLDIMI_rec */ |
19615 | | g8rc, g8rc, g8rc, u6imm, u6imm, |
19616 | | /* RLWIMI */ |
19617 | | gprc, gprc, gprc, u5imm, u5imm, u5imm, |
19618 | | /* RLWIMI8 */ |
19619 | | g8rc, g8rc, g8rc, u5imm, u5imm, u5imm, |
19620 | | /* RLWIMI8_rec */ |
19621 | | g8rc, g8rc, g8rc, u5imm, u5imm, u5imm, |
19622 | | /* RLWIMI_rec */ |
19623 | | gprc, gprc, gprc, u5imm, u5imm, u5imm, |
19624 | | /* RLWINM */ |
19625 | | gprc, gprc, u5imm, u5imm, u5imm, |
19626 | | /* RLWINM8 */ |
19627 | | g8rc, g8rc, u5imm, u5imm, u5imm, |
19628 | | /* RLWINM8_rec */ |
19629 | | g8rc, g8rc, u5imm, u5imm, u5imm, |
19630 | | /* RLWINM_rec */ |
19631 | | gprc, gprc, u5imm, u5imm, u5imm, |
19632 | | /* RLWNM */ |
19633 | | gprc, gprc, gprc, u5imm, u5imm, |
19634 | | /* RLWNM8 */ |
19635 | | g8rc, g8rc, g8rc, u5imm, u5imm, |
19636 | | /* RLWNM8_rec */ |
19637 | | g8rc, g8rc, g8rc, u5imm, u5imm, |
19638 | | /* RLWNM_rec */ |
19639 | | gprc, gprc, gprc, u5imm, u5imm, |
19640 | | /* ReadTB */ |
19641 | | gprc, gprc, |
19642 | | /* SC */ |
19643 | | i32imm, |
19644 | | /* SCV */ |
19645 | | i32imm, |
19646 | | /* SELECT_CC_F16 */ |
19647 | | vrrc, crrc, vrrc, vrrc, i32imm, |
19648 | | /* SELECT_CC_F4 */ |
19649 | | f4rc, crrc, f4rc, f4rc, i32imm, |
19650 | | /* SELECT_CC_F8 */ |
19651 | | f8rc, crrc, f8rc, f8rc, i32imm, |
19652 | | /* SELECT_CC_I4 */ |
19653 | | gprc, crrc, gprc_nor0, gprc_nor0, i32imm, |
19654 | | /* SELECT_CC_I8 */ |
19655 | | g8rc, crrc, g8rc_nox0, g8rc_nox0, i32imm, |
19656 | | /* SELECT_CC_SPE */ |
19657 | | sperc, crrc, sperc, sperc, i32imm, |
19658 | | /* SELECT_CC_SPE4 */ |
19659 | | spe4rc, crrc, spe4rc, spe4rc, i32imm, |
19660 | | /* SELECT_CC_VRRC */ |
19661 | | vrrc, crrc, vrrc, vrrc, i32imm, |
19662 | | /* SELECT_CC_VSFRC */ |
19663 | | f8rc, crrc, f8rc, f8rc, i32imm, |
19664 | | /* SELECT_CC_VSRC */ |
19665 | | vsrc, crrc, vsrc, vsrc, i32imm, |
19666 | | /* SELECT_CC_VSSRC */ |
19667 | | f4rc, crrc, f4rc, f4rc, i32imm, |
19668 | | /* SELECT_F16 */ |
19669 | | vrrc, crbitrc, vrrc, vrrc, |
19670 | | /* SELECT_F4 */ |
19671 | | f4rc, crbitrc, f4rc, f4rc, |
19672 | | /* SELECT_F8 */ |
19673 | | f8rc, crbitrc, f8rc, f8rc, |
19674 | | /* SELECT_I4 */ |
19675 | | gprc, crbitrc, gprc_nor0, gprc_nor0, |
19676 | | /* SELECT_I8 */ |
19677 | | g8rc, crbitrc, g8rc_nox0, g8rc_nox0, |
19678 | | /* SELECT_SPE */ |
19679 | | sperc, crbitrc, sperc, sperc, |
19680 | | /* SELECT_SPE4 */ |
19681 | | spe4rc, crbitrc, spe4rc, spe4rc, |
19682 | | /* SELECT_VRRC */ |
19683 | | vrrc, crbitrc, vrrc, vrrc, |
19684 | | /* SELECT_VSFRC */ |
19685 | | f8rc, crbitrc, f8rc, f8rc, |
19686 | | /* SELECT_VSRC */ |
19687 | | vsrc, crbitrc, vsrc, vsrc, |
19688 | | /* SELECT_VSSRC */ |
19689 | | f4rc, crbitrc, f4rc, f4rc, |
19690 | | /* SETB */ |
19691 | | gprc, crrc, |
19692 | | /* SETB8 */ |
19693 | | g8rc, crrc, |
19694 | | /* SETBC */ |
19695 | | gprc, crbitrc, |
19696 | | /* SETBC8 */ |
19697 | | g8rc, crbitrc, |
19698 | | /* SETBCR */ |
19699 | | gprc, crbitrc, |
19700 | | /* SETBCR8 */ |
19701 | | g8rc, crbitrc, |
19702 | | /* SETFLM */ |
19703 | | f8rc, f8rc, |
19704 | | /* SETNBC */ |
19705 | | gprc, crbitrc, |
19706 | | /* SETNBC8 */ |
19707 | | g8rc, crbitrc, |
19708 | | /* SETNBCR */ |
19709 | | gprc, crbitrc, |
19710 | | /* SETNBCR8 */ |
19711 | | g8rc, crbitrc, |
19712 | | /* SETRND */ |
19713 | | f8rc, gprc, |
19714 | | /* SETRNDi */ |
19715 | | f8rc, u2imm, |
19716 | | /* SLBFEE_rec */ |
19717 | | gprc, gprc, |
19718 | | /* SLBIA */ |
19719 | | /* SLBIE */ |
19720 | | gprc, |
19721 | | /* SLBIEG */ |
19722 | | gprc, gprc, |
19723 | | /* SLBMFEE */ |
19724 | | gprc, gprc, |
19725 | | /* SLBMFEV */ |
19726 | | gprc, gprc, |
19727 | | /* SLBMTE */ |
19728 | | gprc, gprc, |
19729 | | /* SLBSYNC */ |
19730 | | /* SLD */ |
19731 | | g8rc, g8rc, gprc, |
19732 | | /* SLD_rec */ |
19733 | | g8rc, g8rc, gprc, |
19734 | | /* SLW */ |
19735 | | gprc, gprc, gprc, |
19736 | | /* SLW8 */ |
19737 | | g8rc, g8rc, g8rc, |
19738 | | /* SLW8_rec */ |
19739 | | g8rc, g8rc, g8rc, |
19740 | | /* SLW_rec */ |
19741 | | gprc, gprc, gprc, |
19742 | | /* SPELWZ */ |
19743 | | spe4rc, dispRI, ptr_rc_nor0, |
19744 | | /* SPELWZX */ |
19745 | | spe4rc, ptr_rc_nor0, ptr_rc_idx, |
19746 | | /* SPESTW */ |
19747 | | spe4rc, dispRI, ptr_rc_nor0, |
19748 | | /* SPESTWX */ |
19749 | | spe4rc, ptr_rc_nor0, ptr_rc_idx, |
19750 | | /* SPILL_ACC */ |
19751 | | acc, dispRIX16, ptr_rc_nor0, |
19752 | | /* SPILL_CR */ |
19753 | | crrc, dispRI, ptr_rc_nor0, |
19754 | | /* SPILL_CRBIT */ |
19755 | | crbitrc, dispRI, ptr_rc_nor0, |
19756 | | /* SPILL_QUADWORD */ |
19757 | | g8prc, dispRIX, ptr_rc_nor0, |
19758 | | /* SPILL_UACC */ |
19759 | | uacc, dispRIX16, ptr_rc_nor0, |
19760 | | /* SPILL_WACC */ |
19761 | | wacc, dispRIX16, ptr_rc_nor0, |
19762 | | /* SPLIT_QUADWORD */ |
19763 | | g8rc, g8rc, g8prc, |
19764 | | /* SRAD */ |
19765 | | g8rc, g8rc, gprc, |
19766 | | /* SRADI */ |
19767 | | g8rc, g8rc, u6imm, |
19768 | | /* SRADI_32 */ |
19769 | | gprc, gprc, u6imm, |
19770 | | /* SRADI_rec */ |
19771 | | g8rc, g8rc, u6imm, |
19772 | | /* SRAD_rec */ |
19773 | | g8rc, g8rc, gprc, |
19774 | | /* SRAW */ |
19775 | | gprc, gprc, gprc, |
19776 | | /* SRAWI */ |
19777 | | gprc, gprc, u5imm, |
19778 | | /* SRAWI_rec */ |
19779 | | gprc, gprc, u5imm, |
19780 | | /* SRAW_rec */ |
19781 | | gprc, gprc, gprc, |
19782 | | /* SRD */ |
19783 | | g8rc, g8rc, gprc, |
19784 | | /* SRD_rec */ |
19785 | | g8rc, g8rc, gprc, |
19786 | | /* SRW */ |
19787 | | gprc, gprc, gprc, |
19788 | | /* SRW8 */ |
19789 | | g8rc, g8rc, g8rc, |
19790 | | /* SRW8_rec */ |
19791 | | g8rc, g8rc, g8rc, |
19792 | | /* SRW_rec */ |
19793 | | gprc, gprc, gprc, |
19794 | | /* STB */ |
19795 | | gprc, dispRI, ptr_rc_nor0, |
19796 | | /* STB8 */ |
19797 | | g8rc, dispRI, ptr_rc_nor0, |
19798 | | /* STBCIX */ |
19799 | | gprc, gprc, gprc, |
19800 | | /* STBCX */ |
19801 | | gprc, ptr_rc_nor0, ptr_rc_idx, |
19802 | | /* STBEPX */ |
19803 | | gprc, ptr_rc_nor0, ptr_rc_idx, |
19804 | | /* STBU */ |
19805 | | ptr_rc_nor0, gprc, dispRI, ptr_rc_nor0, |
19806 | | /* STBU8 */ |
19807 | | ptr_rc_nor0, g8rc, dispRI, ptr_rc_nor0, |
19808 | | /* STBUX */ |
19809 | | ptr_rc_nor0, gprc, ptr_rc_nor0, ptr_rc_idx, |
19810 | | /* STBUX8 */ |
19811 | | ptr_rc_nor0, g8rc, ptr_rc_nor0, ptr_rc_idx, |
19812 | | /* STBX */ |
19813 | | gprc, ptr_rc_nor0, ptr_rc_idx, |
19814 | | /* STBX8 */ |
19815 | | g8rc, ptr_rc_nor0, ptr_rc_idx, |
19816 | | /* STBXTLS */ |
19817 | | g8rc, ptr_rc_nor0, tlsreg, |
19818 | | /* STBXTLS_ */ |
19819 | | g8rc, ptr_rc_nor0, tlsreg, |
19820 | | /* STBXTLS_32 */ |
19821 | | gprc, ptr_rc_nor0, tlsreg, |
19822 | | /* STD */ |
19823 | | g8rc, dispRIX, ptr_rc_nor0, |
19824 | | /* STDAT */ |
19825 | | g8rc, g8rc, u5imm, |
19826 | | /* STDBRX */ |
19827 | | g8rc, ptr_rc_nor0, ptr_rc_idx, |
19828 | | /* STDCIX */ |
19829 | | gprc, gprc, gprc, |
19830 | | /* STDCX */ |
19831 | | g8rc, ptr_rc_nor0, ptr_rc_idx, |
19832 | | /* STDU */ |
19833 | | ptr_rc_nor0, g8rc, dispRIX, ptr_rc_nor0, |
19834 | | /* STDUX */ |
19835 | | ptr_rc_nor0, g8rc, ptr_rc_nor0, ptr_rc_idx, |
19836 | | /* STDX */ |
19837 | | g8rc, ptr_rc_nor0, ptr_rc_idx, |
19838 | | /* STDXTLS */ |
19839 | | g8rc, ptr_rc_nor0, tlsreg, |
19840 | | /* STDXTLS_ */ |
19841 | | g8rc, ptr_rc_nor0, tlsreg, |
19842 | | /* STFD */ |
19843 | | f8rc, dispRI, ptr_rc_nor0, |
19844 | | /* STFDEPX */ |
19845 | | f8rc, ptr_rc_nor0, ptr_rc_idx, |
19846 | | /* STFDU */ |
19847 | | ptr_rc_nor0, f8rc, dispRI, ptr_rc_nor0, |
19848 | | /* STFDUX */ |
19849 | | ptr_rc_nor0, f8rc, ptr_rc_nor0, ptr_rc_idx, |
19850 | | /* STFDX */ |
19851 | | f8rc, ptr_rc_nor0, ptr_rc_idx, |
19852 | | /* STFDXTLS */ |
19853 | | f8rc, ptr_rc_nor0, tlsreg, |
19854 | | /* STFDXTLS_ */ |
19855 | | f8rc, ptr_rc_nor0, tlsreg, |
19856 | | /* STFIWX */ |
19857 | | f8rc, ptr_rc_nor0, ptr_rc_idx, |
19858 | | /* STFS */ |
19859 | | f4rc, dispRI, ptr_rc_nor0, |
19860 | | /* STFSU */ |
19861 | | ptr_rc_nor0, f4rc, dispRI, ptr_rc_nor0, |
19862 | | /* STFSUX */ |
19863 | | ptr_rc_nor0, f4rc, ptr_rc_nor0, ptr_rc_idx, |
19864 | | /* STFSX */ |
19865 | | f4rc, ptr_rc_nor0, ptr_rc_idx, |
19866 | | /* STFSXTLS */ |
19867 | | f4rc, ptr_rc_nor0, tlsreg, |
19868 | | /* STFSXTLS_ */ |
19869 | | f4rc, ptr_rc_nor0, tlsreg, |
19870 | | /* STH */ |
19871 | | gprc, dispRI, ptr_rc_nor0, |
19872 | | /* STH8 */ |
19873 | | g8rc, dispRI, ptr_rc_nor0, |
19874 | | /* STHBRX */ |
19875 | | gprc, ptr_rc_nor0, ptr_rc_idx, |
19876 | | /* STHCIX */ |
19877 | | gprc, gprc, gprc, |
19878 | | /* STHCX */ |
19879 | | gprc, ptr_rc_nor0, ptr_rc_idx, |
19880 | | /* STHEPX */ |
19881 | | gprc, ptr_rc_nor0, ptr_rc_idx, |
19882 | | /* STHU */ |
19883 | | ptr_rc_nor0, gprc, dispRI, ptr_rc_nor0, |
19884 | | /* STHU8 */ |
19885 | | ptr_rc_nor0, g8rc, dispRI, ptr_rc_nor0, |
19886 | | /* STHUX */ |
19887 | | ptr_rc_nor0, gprc, ptr_rc_nor0, ptr_rc_idx, |
19888 | | /* STHUX8 */ |
19889 | | ptr_rc_nor0, g8rc, ptr_rc_nor0, ptr_rc_idx, |
19890 | | /* STHX */ |
19891 | | gprc, ptr_rc_nor0, ptr_rc_idx, |
19892 | | /* STHX8 */ |
19893 | | g8rc, ptr_rc_nor0, ptr_rc_idx, |
19894 | | /* STHXTLS */ |
19895 | | g8rc, ptr_rc_nor0, tlsreg, |
19896 | | /* STHXTLS_ */ |
19897 | | g8rc, ptr_rc_nor0, tlsreg, |
19898 | | /* STHXTLS_32 */ |
19899 | | gprc, ptr_rc_nor0, tlsreg, |
19900 | | /* STMW */ |
19901 | | gprc, dispRI, ptr_rc_nor0, |
19902 | | /* STOP */ |
19903 | | /* STQ */ |
19904 | | g8prc, dispRIX, ptr_rc_nor0, |
19905 | | /* STQCX */ |
19906 | | g8prc, ptr_rc_nor0, ptr_rc_idx, |
19907 | | /* STQX_PSEUDO */ |
19908 | | g8prc, ptr_rc_nor0, ptr_rc_idx, |
19909 | | /* STSWI */ |
19910 | | gprc, gprc, u5imm, |
19911 | | /* STVEBX */ |
19912 | | vrrc, ptr_rc_nor0, ptr_rc_idx, |
19913 | | /* STVEHX */ |
19914 | | vrrc, ptr_rc_nor0, ptr_rc_idx, |
19915 | | /* STVEWX */ |
19916 | | vrrc, ptr_rc_nor0, ptr_rc_idx, |
19917 | | /* STVX */ |
19918 | | vrrc, ptr_rc_nor0, ptr_rc_idx, |
19919 | | /* STVXL */ |
19920 | | vrrc, ptr_rc_nor0, ptr_rc_idx, |
19921 | | /* STW */ |
19922 | | gprc, dispRI, ptr_rc_nor0, |
19923 | | /* STW8 */ |
19924 | | g8rc, dispRI, ptr_rc_nor0, |
19925 | | /* STWAT */ |
19926 | | gprc, gprc, u5imm, |
19927 | | /* STWBRX */ |
19928 | | gprc, ptr_rc_nor0, ptr_rc_idx, |
19929 | | /* STWCIX */ |
19930 | | gprc, gprc, gprc, |
19931 | | /* STWCX */ |
19932 | | gprc, ptr_rc_nor0, ptr_rc_idx, |
19933 | | /* STWEPX */ |
19934 | | gprc, ptr_rc_nor0, ptr_rc_idx, |
19935 | | /* STWU */ |
19936 | | ptr_rc_nor0, gprc, dispRI, ptr_rc_nor0, |
19937 | | /* STWU8 */ |
19938 | | ptr_rc_nor0, g8rc, dispRI, ptr_rc_nor0, |
19939 | | /* STWUX */ |
19940 | | ptr_rc_nor0, gprc, ptr_rc_nor0, ptr_rc_idx, |
19941 | | /* STWUX8 */ |
19942 | | ptr_rc_nor0, g8rc, ptr_rc_nor0, ptr_rc_idx, |
19943 | | /* STWX */ |
19944 | | gprc, ptr_rc_nor0, ptr_rc_idx, |
19945 | | /* STWX8 */ |
19946 | | g8rc, ptr_rc_nor0, ptr_rc_idx, |
19947 | | /* STWXTLS */ |
19948 | | g8rc, ptr_rc_nor0, tlsreg, |
19949 | | /* STWXTLS_ */ |
19950 | | g8rc, ptr_rc_nor0, tlsreg, |
19951 | | /* STWXTLS_32 */ |
19952 | | gprc, ptr_rc_nor0, tlsreg, |
19953 | | /* STXSD */ |
19954 | | vfrc, dispRIX, ptr_rc_nor0, |
19955 | | /* STXSDX */ |
19956 | | vsfrc, ptr_rc_nor0, ptr_rc_idx, |
19957 | | /* STXSIBX */ |
19958 | | vsfrc, ptr_rc_nor0, ptr_rc_idx, |
19959 | | /* STXSIBXv */ |
19960 | | vsrc, ptr_rc_nor0, ptr_rc_idx, |
19961 | | /* STXSIHX */ |
19962 | | vsfrc, ptr_rc_nor0, ptr_rc_idx, |
19963 | | /* STXSIHXv */ |
19964 | | vsrc, ptr_rc_nor0, ptr_rc_idx, |
19965 | | /* STXSIWX */ |
19966 | | vsfrc, ptr_rc_nor0, ptr_rc_idx, |
19967 | | /* STXSSP */ |
19968 | | vfrc, dispRIX, ptr_rc_nor0, |
19969 | | /* STXSSPX */ |
19970 | | vssrc, ptr_rc_nor0, ptr_rc_idx, |
19971 | | /* STXV */ |
19972 | | vsrc, dispRIX16, ptr_rc_nor0, |
19973 | | /* STXVB16X */ |
19974 | | vsrc, ptr_rc_nor0, ptr_rc_idx, |
19975 | | /* STXVD2X */ |
19976 | | vsrc, ptr_rc_nor0, ptr_rc_idx, |
19977 | | /* STXVH8X */ |
19978 | | vsrc, ptr_rc_nor0, ptr_rc_idx, |
19979 | | /* STXVL */ |
19980 | | vsrc, ptr_rc_nor0, g8rc, |
19981 | | /* STXVLL */ |
19982 | | vsrc, ptr_rc_nor0, g8rc, |
19983 | | /* STXVP */ |
19984 | | vsrprc, dispRIX16, ptr_rc_nor0, |
19985 | | /* STXVPRL */ |
19986 | | vsrprc, ptr_rc_nor0, g8rc, |
19987 | | /* STXVPRLL */ |
19988 | | vsrprc, ptr_rc_nor0, g8rc, |
19989 | | /* STXVPX */ |
19990 | | vsrprc, ptr_rc_nor0, ptr_rc_idx, |
19991 | | /* STXVRBX */ |
19992 | | vsrc, ptr_rc_nor0, ptr_rc_idx, |
19993 | | /* STXVRDX */ |
19994 | | vsrc, ptr_rc_nor0, ptr_rc_idx, |
19995 | | /* STXVRHX */ |
19996 | | vsrc, ptr_rc_nor0, ptr_rc_idx, |
19997 | | /* STXVRL */ |
19998 | | vsrc, ptr_rc_nor0, g8rc, |
19999 | | /* STXVRLL */ |
20000 | | vsrc, ptr_rc_nor0, g8rc, |
20001 | | /* STXVRWX */ |
20002 | | vsrc, ptr_rc_nor0, ptr_rc_idx, |
20003 | | /* STXVW4X */ |
20004 | | vsrc, ptr_rc_nor0, ptr_rc_idx, |
20005 | | /* STXVX */ |
20006 | | vsrc, ptr_rc_nor0, ptr_rc_idx, |
20007 | | /* SUBF */ |
20008 | | gprc, gprc, gprc, |
20009 | | /* SUBF8 */ |
20010 | | g8rc, g8rc, g8rc, |
20011 | | /* SUBF8O */ |
20012 | | g8rc, g8rc, g8rc, |
20013 | | /* SUBF8O_rec */ |
20014 | | g8rc, g8rc, g8rc, |
20015 | | /* SUBF8_rec */ |
20016 | | g8rc, g8rc, g8rc, |
20017 | | /* SUBFC */ |
20018 | | gprc, gprc, gprc, |
20019 | | /* SUBFC8 */ |
20020 | | g8rc, g8rc, g8rc, |
20021 | | /* SUBFC8O */ |
20022 | | g8rc, g8rc, g8rc, |
20023 | | /* SUBFC8O_rec */ |
20024 | | g8rc, g8rc, g8rc, |
20025 | | /* SUBFC8_rec */ |
20026 | | g8rc, g8rc, g8rc, |
20027 | | /* SUBFCO */ |
20028 | | gprc, gprc, gprc, |
20029 | | /* SUBFCO_rec */ |
20030 | | gprc, gprc, gprc, |
20031 | | /* SUBFC_rec */ |
20032 | | gprc, gprc, gprc, |
20033 | | /* SUBFE */ |
20034 | | gprc, gprc, gprc, |
20035 | | /* SUBFE8 */ |
20036 | | g8rc, g8rc, g8rc, |
20037 | | /* SUBFE8O */ |
20038 | | g8rc, g8rc, g8rc, |
20039 | | /* SUBFE8O_rec */ |
20040 | | g8rc, g8rc, g8rc, |
20041 | | /* SUBFE8_rec */ |
20042 | | g8rc, g8rc, g8rc, |
20043 | | /* SUBFEO */ |
20044 | | gprc, gprc, gprc, |
20045 | | /* SUBFEO_rec */ |
20046 | | gprc, gprc, gprc, |
20047 | | /* SUBFE_rec */ |
20048 | | gprc, gprc, gprc, |
20049 | | /* SUBFIC */ |
20050 | | gprc, gprc, s16imm, |
20051 | | /* SUBFIC8 */ |
20052 | | g8rc, g8rc, s16imm64, |
20053 | | /* SUBFME */ |
20054 | | gprc, gprc, |
20055 | | /* SUBFME8 */ |
20056 | | g8rc, g8rc, |
20057 | | /* SUBFME8O */ |
20058 | | g8rc, g8rc, |
20059 | | /* SUBFME8O_rec */ |
20060 | | g8rc, g8rc, |
20061 | | /* SUBFME8_rec */ |
20062 | | g8rc, g8rc, |
20063 | | /* SUBFMEO */ |
20064 | | gprc, gprc, |
20065 | | /* SUBFMEO_rec */ |
20066 | | gprc, gprc, |
20067 | | /* SUBFME_rec */ |
20068 | | gprc, gprc, |
20069 | | /* SUBFO */ |
20070 | | gprc, gprc, gprc, |
20071 | | /* SUBFO_rec */ |
20072 | | gprc, gprc, gprc, |
20073 | | /* SUBFUS */ |
20074 | | g8rc, g8rc, g8rc, u1imm, |
20075 | | /* SUBFUS_rec */ |
20076 | | g8rc, g8rc, g8rc, u1imm, |
20077 | | /* SUBFZE */ |
20078 | | gprc, gprc, |
20079 | | /* SUBFZE8 */ |
20080 | | g8rc, g8rc, |
20081 | | /* SUBFZE8O */ |
20082 | | g8rc, g8rc, |
20083 | | /* SUBFZE8O_rec */ |
20084 | | g8rc, g8rc, |
20085 | | /* SUBFZE8_rec */ |
20086 | | g8rc, g8rc, |
20087 | | /* SUBFZEO */ |
20088 | | gprc, gprc, |
20089 | | /* SUBFZEO_rec */ |
20090 | | gprc, gprc, |
20091 | | /* SUBFZE_rec */ |
20092 | | gprc, gprc, |
20093 | | /* SUBF_rec */ |
20094 | | gprc, gprc, gprc, |
20095 | | /* SYNC */ |
20096 | | u2imm, |
20097 | | /* SYNCP10 */ |
20098 | | u3imm, u2imm, |
20099 | | /* TABORT */ |
20100 | | gprc, |
20101 | | /* TABORTDC */ |
20102 | | u5imm, gprc, gprc, |
20103 | | /* TABORTDCI */ |
20104 | | u5imm, gprc, u5imm, |
20105 | | /* TABORTWC */ |
20106 | | u5imm, gprc, gprc, |
20107 | | /* TABORTWCI */ |
20108 | | u5imm, gprc, u5imm, |
20109 | | /* TAILB */ |
20110 | | calltarget, |
20111 | | /* TAILB8 */ |
20112 | | calltarget, |
20113 | | /* TAILBA */ |
20114 | | abscalltarget, |
20115 | | /* TAILBA8 */ |
20116 | | abscalltarget, |
20117 | | /* TAILBCTR */ |
20118 | | /* TAILBCTR8 */ |
20119 | | /* TBEGIN */ |
20120 | | u1imm, |
20121 | | /* TBEGIN_RET */ |
20122 | | gprc, u1imm, |
20123 | | /* TCHECK */ |
20124 | | crrc, |
20125 | | /* TCHECK_RET */ |
20126 | | gprc, |
20127 | | /* TCRETURNai */ |
20128 | | abscalltarget, i32imm, |
20129 | | /* TCRETURNai8 */ |
20130 | | abscalltarget, i32imm, |
20131 | | /* TCRETURNdi */ |
20132 | | calltarget, i32imm, |
20133 | | /* TCRETURNdi8 */ |
20134 | | calltarget, i32imm, |
20135 | | /* TCRETURNri */ |
20136 | | CTRRC, i32imm, |
20137 | | /* TCRETURNri8 */ |
20138 | | CTRRC8, i32imm, |
20139 | | /* TD */ |
20140 | | u5imm, g8rc, g8rc, |
20141 | | /* TDI */ |
20142 | | u5imm, g8rc, s16imm, |
20143 | | /* TEND */ |
20144 | | u1imm, |
20145 | | /* TLBIA */ |
20146 | | /* TLBIE */ |
20147 | | gprc, gprc, |
20148 | | /* TLBIEL */ |
20149 | | gprc, |
20150 | | /* TLBILX */ |
20151 | | u2imm, gprc, gprc, |
20152 | | /* TLBIVAX */ |
20153 | | gprc, gprc, |
20154 | | /* TLBLD */ |
20155 | | gprc, |
20156 | | /* TLBLI */ |
20157 | | gprc, |
20158 | | /* TLBRE */ |
20159 | | /* TLBRE2 */ |
20160 | | gprc, gprc, i1imm, |
20161 | | /* TLBSX */ |
20162 | | gprc, gprc, |
20163 | | /* TLBSX2 */ |
20164 | | gprc, gprc, gprc, |
20165 | | /* TLBSX2D */ |
20166 | | gprc, gprc, gprc, |
20167 | | /* TLBSYNC */ |
20168 | | /* TLBWE */ |
20169 | | /* TLBWE2 */ |
20170 | | gprc, gprc, i1imm, |
20171 | | /* TLSGDAIX */ |
20172 | | gprc, gprc, gprc, |
20173 | | /* TLSGDAIX8 */ |
20174 | | g8rc, g8rc, g8rc, |
20175 | | /* TRAP */ |
20176 | | /* TRECHKPT */ |
20177 | | /* TRECLAIM */ |
20178 | | gprc, |
20179 | | /* TSR */ |
20180 | | u1imm, |
20181 | | /* TW */ |
20182 | | u5imm, gprc, gprc, |
20183 | | /* TWI */ |
20184 | | u5imm, gprc, s16imm, |
20185 | | /* UNENCODED_NOP */ |
20186 | | /* UpdateGBR */ |
20187 | | gprc, gprc, gprc, |
20188 | | /* VABSDUB */ |
20189 | | vrrc, vrrc, vrrc, |
20190 | | /* VABSDUH */ |
20191 | | vrrc, vrrc, vrrc, |
20192 | | /* VABSDUW */ |
20193 | | vrrc, vrrc, vrrc, |
20194 | | /* VADDCUQ */ |
20195 | | vrrc, vrrc, vrrc, |
20196 | | /* VADDCUW */ |
20197 | | vrrc, vrrc, vrrc, |
20198 | | /* VADDECUQ */ |
20199 | | vrrc, vrrc, vrrc, vrrc, |
20200 | | /* VADDEUQM */ |
20201 | | vrrc, vrrc, vrrc, vrrc, |
20202 | | /* VADDFP */ |
20203 | | vrrc, vrrc, vrrc, |
20204 | | /* VADDSBS */ |
20205 | | vrrc, vrrc, vrrc, |
20206 | | /* VADDSHS */ |
20207 | | vrrc, vrrc, vrrc, |
20208 | | /* VADDSWS */ |
20209 | | vrrc, vrrc, vrrc, |
20210 | | /* VADDUBM */ |
20211 | | vrrc, vrrc, vrrc, |
20212 | | /* VADDUBS */ |
20213 | | vrrc, vrrc, vrrc, |
20214 | | /* VADDUDM */ |
20215 | | vrrc, vrrc, vrrc, |
20216 | | /* VADDUHM */ |
20217 | | vrrc, vrrc, vrrc, |
20218 | | /* VADDUHS */ |
20219 | | vrrc, vrrc, vrrc, |
20220 | | /* VADDUQM */ |
20221 | | vrrc, vrrc, vrrc, |
20222 | | /* VADDUWM */ |
20223 | | vrrc, vrrc, vrrc, |
20224 | | /* VADDUWS */ |
20225 | | vrrc, vrrc, vrrc, |
20226 | | /* VAND */ |
20227 | | vrrc, vrrc, vrrc, |
20228 | | /* VANDC */ |
20229 | | vrrc, vrrc, vrrc, |
20230 | | /* VAVGSB */ |
20231 | | vrrc, vrrc, vrrc, |
20232 | | /* VAVGSH */ |
20233 | | vrrc, vrrc, vrrc, |
20234 | | /* VAVGSW */ |
20235 | | vrrc, vrrc, vrrc, |
20236 | | /* VAVGUB */ |
20237 | | vrrc, vrrc, vrrc, |
20238 | | /* VAVGUH */ |
20239 | | vrrc, vrrc, vrrc, |
20240 | | /* VAVGUW */ |
20241 | | vrrc, vrrc, vrrc, |
20242 | | /* VBPERMD */ |
20243 | | vrrc, vrrc, vrrc, |
20244 | | /* VBPERMQ */ |
20245 | | vrrc, vrrc, vrrc, |
20246 | | /* VCFSX */ |
20247 | | vrrc, u5imm, vrrc, |
20248 | | /* VCFSX_0 */ |
20249 | | vrrc, vrrc, |
20250 | | /* VCFUGED */ |
20251 | | vrrc, vrrc, vrrc, |
20252 | | /* VCFUX */ |
20253 | | vrrc, u5imm, vrrc, |
20254 | | /* VCFUX_0 */ |
20255 | | vrrc, vrrc, |
20256 | | /* VCIPHER */ |
20257 | | vrrc, vrrc, vrrc, |
20258 | | /* VCIPHERLAST */ |
20259 | | vrrc, vrrc, vrrc, |
20260 | | /* VCLRLB */ |
20261 | | vrrc, vrrc, gprc, |
20262 | | /* VCLRRB */ |
20263 | | vrrc, vrrc, gprc, |
20264 | | /* VCLZB */ |
20265 | | vrrc, vrrc, |
20266 | | /* VCLZD */ |
20267 | | vrrc, vrrc, |
20268 | | /* VCLZDM */ |
20269 | | vrrc, vrrc, vrrc, |
20270 | | /* VCLZH */ |
20271 | | vrrc, vrrc, |
20272 | | /* VCLZLSBB */ |
20273 | | gprc, vrrc, |
20274 | | /* VCLZW */ |
20275 | | vrrc, vrrc, |
20276 | | /* VCMPBFP */ |
20277 | | vrrc, vrrc, vrrc, |
20278 | | /* VCMPBFP_rec */ |
20279 | | vrrc, vrrc, vrrc, |
20280 | | /* VCMPEQFP */ |
20281 | | vrrc, vrrc, vrrc, |
20282 | | /* VCMPEQFP_rec */ |
20283 | | vrrc, vrrc, vrrc, |
20284 | | /* VCMPEQUB */ |
20285 | | vrrc, vrrc, vrrc, |
20286 | | /* VCMPEQUB_rec */ |
20287 | | vrrc, vrrc, vrrc, |
20288 | | /* VCMPEQUD */ |
20289 | | vrrc, vrrc, vrrc, |
20290 | | /* VCMPEQUD_rec */ |
20291 | | vrrc, vrrc, vrrc, |
20292 | | /* VCMPEQUH */ |
20293 | | vrrc, vrrc, vrrc, |
20294 | | /* VCMPEQUH_rec */ |
20295 | | vrrc, vrrc, vrrc, |
20296 | | /* VCMPEQUQ */ |
20297 | | vrrc, vrrc, vrrc, |
20298 | | /* VCMPEQUQ_rec */ |
20299 | | vrrc, vrrc, vrrc, |
20300 | | /* VCMPEQUW */ |
20301 | | vrrc, vrrc, vrrc, |
20302 | | /* VCMPEQUW_rec */ |
20303 | | vrrc, vrrc, vrrc, |
20304 | | /* VCMPGEFP */ |
20305 | | vrrc, vrrc, vrrc, |
20306 | | /* VCMPGEFP_rec */ |
20307 | | vrrc, vrrc, vrrc, |
20308 | | /* VCMPGTFP */ |
20309 | | vrrc, vrrc, vrrc, |
20310 | | /* VCMPGTFP_rec */ |
20311 | | vrrc, vrrc, vrrc, |
20312 | | /* VCMPGTSB */ |
20313 | | vrrc, vrrc, vrrc, |
20314 | | /* VCMPGTSB_rec */ |
20315 | | vrrc, vrrc, vrrc, |
20316 | | /* VCMPGTSD */ |
20317 | | vrrc, vrrc, vrrc, |
20318 | | /* VCMPGTSD_rec */ |
20319 | | vrrc, vrrc, vrrc, |
20320 | | /* VCMPGTSH */ |
20321 | | vrrc, vrrc, vrrc, |
20322 | | /* VCMPGTSH_rec */ |
20323 | | vrrc, vrrc, vrrc, |
20324 | | /* VCMPGTSQ */ |
20325 | | vrrc, vrrc, vrrc, |
20326 | | /* VCMPGTSQ_rec */ |
20327 | | vrrc, vrrc, vrrc, |
20328 | | /* VCMPGTSW */ |
20329 | | vrrc, vrrc, vrrc, |
20330 | | /* VCMPGTSW_rec */ |
20331 | | vrrc, vrrc, vrrc, |
20332 | | /* VCMPGTUB */ |
20333 | | vrrc, vrrc, vrrc, |
20334 | | /* VCMPGTUB_rec */ |
20335 | | vrrc, vrrc, vrrc, |
20336 | | /* VCMPGTUD */ |
20337 | | vrrc, vrrc, vrrc, |
20338 | | /* VCMPGTUD_rec */ |
20339 | | vrrc, vrrc, vrrc, |
20340 | | /* VCMPGTUH */ |
20341 | | vrrc, vrrc, vrrc, |
20342 | | /* VCMPGTUH_rec */ |
20343 | | vrrc, vrrc, vrrc, |
20344 | | /* VCMPGTUQ */ |
20345 | | vrrc, vrrc, vrrc, |
20346 | | /* VCMPGTUQ_rec */ |
20347 | | vrrc, vrrc, vrrc, |
20348 | | /* VCMPGTUW */ |
20349 | | vrrc, vrrc, vrrc, |
20350 | | /* VCMPGTUW_rec */ |
20351 | | vrrc, vrrc, vrrc, |
20352 | | /* VCMPNEB */ |
20353 | | vrrc, vrrc, vrrc, |
20354 | | /* VCMPNEB_rec */ |
20355 | | vrrc, vrrc, vrrc, |
20356 | | /* VCMPNEH */ |
20357 | | vrrc, vrrc, vrrc, |
20358 | | /* VCMPNEH_rec */ |
20359 | | vrrc, vrrc, vrrc, |
20360 | | /* VCMPNEW */ |
20361 | | vrrc, vrrc, vrrc, |
20362 | | /* VCMPNEW_rec */ |
20363 | | vrrc, vrrc, vrrc, |
20364 | | /* VCMPNEZB */ |
20365 | | vrrc, vrrc, vrrc, |
20366 | | /* VCMPNEZB_rec */ |
20367 | | vrrc, vrrc, vrrc, |
20368 | | /* VCMPNEZH */ |
20369 | | vrrc, vrrc, vrrc, |
20370 | | /* VCMPNEZH_rec */ |
20371 | | vrrc, vrrc, vrrc, |
20372 | | /* VCMPNEZW */ |
20373 | | vrrc, vrrc, vrrc, |
20374 | | /* VCMPNEZW_rec */ |
20375 | | vrrc, vrrc, vrrc, |
20376 | | /* VCMPSQ */ |
20377 | | crrc, vrrc, vrrc, |
20378 | | /* VCMPUQ */ |
20379 | | crrc, vrrc, vrrc, |
20380 | | /* VCNTMBB */ |
20381 | | g8rc, vrrc, u1imm, |
20382 | | /* VCNTMBD */ |
20383 | | g8rc, vrrc, u1imm, |
20384 | | /* VCNTMBH */ |
20385 | | g8rc, vrrc, u1imm, |
20386 | | /* VCNTMBW */ |
20387 | | g8rc, vrrc, u1imm, |
20388 | | /* VCTSXS */ |
20389 | | vrrc, u5imm, vrrc, |
20390 | | /* VCTSXS_0 */ |
20391 | | vrrc, vrrc, |
20392 | | /* VCTUXS */ |
20393 | | vrrc, u5imm, vrrc, |
20394 | | /* VCTUXS_0 */ |
20395 | | vrrc, vrrc, |
20396 | | /* VCTZB */ |
20397 | | vrrc, vrrc, |
20398 | | /* VCTZD */ |
20399 | | vrrc, vrrc, |
20400 | | /* VCTZDM */ |
20401 | | vrrc, vrrc, vrrc, |
20402 | | /* VCTZH */ |
20403 | | vrrc, vrrc, |
20404 | | /* VCTZLSBB */ |
20405 | | gprc, vrrc, |
20406 | | /* VCTZW */ |
20407 | | vrrc, vrrc, |
20408 | | /* VDIVESD */ |
20409 | | vrrc, vrrc, vrrc, |
20410 | | /* VDIVESQ */ |
20411 | | vrrc, vrrc, vrrc, |
20412 | | /* VDIVESW */ |
20413 | | vrrc, vrrc, vrrc, |
20414 | | /* VDIVEUD */ |
20415 | | vrrc, vrrc, vrrc, |
20416 | | /* VDIVEUQ */ |
20417 | | vrrc, vrrc, vrrc, |
20418 | | /* VDIVEUW */ |
20419 | | vrrc, vrrc, vrrc, |
20420 | | /* VDIVSD */ |
20421 | | vrrc, vrrc, vrrc, |
20422 | | /* VDIVSQ */ |
20423 | | vrrc, vrrc, vrrc, |
20424 | | /* VDIVSW */ |
20425 | | vrrc, vrrc, vrrc, |
20426 | | /* VDIVUD */ |
20427 | | vrrc, vrrc, vrrc, |
20428 | | /* VDIVUQ */ |
20429 | | vrrc, vrrc, vrrc, |
20430 | | /* VDIVUW */ |
20431 | | vrrc, vrrc, vrrc, |
20432 | | /* VEQV */ |
20433 | | vrrc, vrrc, vrrc, |
20434 | | /* VEXPANDBM */ |
20435 | | vrrc, vrrc, |
20436 | | /* VEXPANDDM */ |
20437 | | vrrc, vrrc, |
20438 | | /* VEXPANDHM */ |
20439 | | vrrc, vrrc, |
20440 | | /* VEXPANDQM */ |
20441 | | vrrc, vrrc, |
20442 | | /* VEXPANDWM */ |
20443 | | vrrc, vrrc, |
20444 | | /* VEXPTEFP */ |
20445 | | vrrc, vrrc, |
20446 | | /* VEXTDDVLX */ |
20447 | | vrrc, vrrc, vrrc, gprc, |
20448 | | /* VEXTDDVRX */ |
20449 | | vrrc, vrrc, vrrc, gprc, |
20450 | | /* VEXTDUBVLX */ |
20451 | | vrrc, vrrc, vrrc, gprc, |
20452 | | /* VEXTDUBVRX */ |
20453 | | vrrc, vrrc, vrrc, gprc, |
20454 | | /* VEXTDUHVLX */ |
20455 | | vrrc, vrrc, vrrc, gprc, |
20456 | | /* VEXTDUHVRX */ |
20457 | | vrrc, vrrc, vrrc, gprc, |
20458 | | /* VEXTDUWVLX */ |
20459 | | vrrc, vrrc, vrrc, gprc, |
20460 | | /* VEXTDUWVRX */ |
20461 | | vrrc, vrrc, vrrc, gprc, |
20462 | | /* VEXTRACTBM */ |
20463 | | gprc, vrrc, |
20464 | | /* VEXTRACTD */ |
20465 | | vrrc, u4imm, vrrc, |
20466 | | /* VEXTRACTDM */ |
20467 | | gprc, vrrc, |
20468 | | /* VEXTRACTHM */ |
20469 | | gprc, vrrc, |
20470 | | /* VEXTRACTQM */ |
20471 | | gprc, vrrc, |
20472 | | /* VEXTRACTUB */ |
20473 | | vrrc, u4imm, vrrc, |
20474 | | /* VEXTRACTUH */ |
20475 | | vrrc, u4imm, vrrc, |
20476 | | /* VEXTRACTUW */ |
20477 | | vrrc, u4imm, vrrc, |
20478 | | /* VEXTRACTWM */ |
20479 | | gprc, vrrc, |
20480 | | /* VEXTSB2D */ |
20481 | | vrrc, vrrc, |
20482 | | /* VEXTSB2Ds */ |
20483 | | vfrc, vfrc, |
20484 | | /* VEXTSB2W */ |
20485 | | vrrc, vrrc, |
20486 | | /* VEXTSB2Ws */ |
20487 | | vfrc, vfrc, |
20488 | | /* VEXTSD2Q */ |
20489 | | vrrc, vrrc, |
20490 | | /* VEXTSH2D */ |
20491 | | vrrc, vrrc, |
20492 | | /* VEXTSH2Ds */ |
20493 | | vfrc, vfrc, |
20494 | | /* VEXTSH2W */ |
20495 | | vrrc, vrrc, |
20496 | | /* VEXTSH2Ws */ |
20497 | | vfrc, vfrc, |
20498 | | /* VEXTSW2D */ |
20499 | | vrrc, vrrc, |
20500 | | /* VEXTSW2Ds */ |
20501 | | vfrc, vfrc, |
20502 | | /* VEXTUBLX */ |
20503 | | g8rc, g8rc, vrrc, |
20504 | | /* VEXTUBRX */ |
20505 | | g8rc, g8rc, vrrc, |
20506 | | /* VEXTUHLX */ |
20507 | | g8rc, g8rc, vrrc, |
20508 | | /* VEXTUHRX */ |
20509 | | g8rc, g8rc, vrrc, |
20510 | | /* VEXTUWLX */ |
20511 | | g8rc, g8rc, vrrc, |
20512 | | /* VEXTUWRX */ |
20513 | | g8rc, g8rc, vrrc, |
20514 | | /* VGBBD */ |
20515 | | vrrc, vrrc, |
20516 | | /* VGNB */ |
20517 | | g8rc, vrrc, u3imm, |
20518 | | /* VINSBLX */ |
20519 | | vrrc, vrrc, gprc, gprc, |
20520 | | /* VINSBRX */ |
20521 | | vrrc, vrrc, gprc, gprc, |
20522 | | /* VINSBVLX */ |
20523 | | vrrc, vrrc, gprc, vrrc, |
20524 | | /* VINSBVRX */ |
20525 | | vrrc, vrrc, gprc, vrrc, |
20526 | | /* VINSD */ |
20527 | | vrrc, vrrc, u4imm, g8rc, |
20528 | | /* VINSDLX */ |
20529 | | vrrc, vrrc, g8rc, g8rc, |
20530 | | /* VINSDRX */ |
20531 | | vrrc, vrrc, g8rc, g8rc, |
20532 | | /* VINSERTB */ |
20533 | | vrrc, vrrc, u4imm, vrrc, |
20534 | | /* VINSERTD */ |
20535 | | vrrc, u4imm, vrrc, |
20536 | | /* VINSERTH */ |
20537 | | vrrc, vrrc, u4imm, vrrc, |
20538 | | /* VINSERTW */ |
20539 | | vrrc, u4imm, vrrc, |
20540 | | /* VINSHLX */ |
20541 | | vrrc, vrrc, gprc, gprc, |
20542 | | /* VINSHRX */ |
20543 | | vrrc, vrrc, gprc, gprc, |
20544 | | /* VINSHVLX */ |
20545 | | vrrc, vrrc, gprc, vrrc, |
20546 | | /* VINSHVRX */ |
20547 | | vrrc, vrrc, gprc, vrrc, |
20548 | | /* VINSW */ |
20549 | | vrrc, vrrc, u4imm, gprc, |
20550 | | /* VINSWLX */ |
20551 | | vrrc, vrrc, gprc, gprc, |
20552 | | /* VINSWRX */ |
20553 | | vrrc, vrrc, gprc, gprc, |
20554 | | /* VINSWVLX */ |
20555 | | vrrc, vrrc, gprc, vrrc, |
20556 | | /* VINSWVRX */ |
20557 | | vrrc, vrrc, gprc, vrrc, |
20558 | | /* VLOGEFP */ |
20559 | | vrrc, vrrc, |
20560 | | /* VMADDFP */ |
20561 | | vrrc, vrrc, vrrc, vrrc, |
20562 | | /* VMAXFP */ |
20563 | | vrrc, vrrc, vrrc, |
20564 | | /* VMAXSB */ |
20565 | | vrrc, vrrc, vrrc, |
20566 | | /* VMAXSD */ |
20567 | | vrrc, vrrc, vrrc, |
20568 | | /* VMAXSH */ |
20569 | | vrrc, vrrc, vrrc, |
20570 | | /* VMAXSW */ |
20571 | | vrrc, vrrc, vrrc, |
20572 | | /* VMAXUB */ |
20573 | | vrrc, vrrc, vrrc, |
20574 | | /* VMAXUD */ |
20575 | | vrrc, vrrc, vrrc, |
20576 | | /* VMAXUH */ |
20577 | | vrrc, vrrc, vrrc, |
20578 | | /* VMAXUW */ |
20579 | | vrrc, vrrc, vrrc, |
20580 | | /* VMHADDSHS */ |
20581 | | vrrc, vrrc, vrrc, vrrc, |
20582 | | /* VMHRADDSHS */ |
20583 | | vrrc, vrrc, vrrc, vrrc, |
20584 | | /* VMINFP */ |
20585 | | vrrc, vrrc, vrrc, |
20586 | | /* VMINSB */ |
20587 | | vrrc, vrrc, vrrc, |
20588 | | /* VMINSD */ |
20589 | | vrrc, vrrc, vrrc, |
20590 | | /* VMINSH */ |
20591 | | vrrc, vrrc, vrrc, |
20592 | | /* VMINSW */ |
20593 | | vrrc, vrrc, vrrc, |
20594 | | /* VMINUB */ |
20595 | | vrrc, vrrc, vrrc, |
20596 | | /* VMINUD */ |
20597 | | vrrc, vrrc, vrrc, |
20598 | | /* VMINUH */ |
20599 | | vrrc, vrrc, vrrc, |
20600 | | /* VMINUW */ |
20601 | | vrrc, vrrc, vrrc, |
20602 | | /* VMLADDUHM */ |
20603 | | vrrc, vrrc, vrrc, vrrc, |
20604 | | /* VMODSD */ |
20605 | | vrrc, vrrc, vrrc, |
20606 | | /* VMODSQ */ |
20607 | | vrrc, vrrc, vrrc, |
20608 | | /* VMODSW */ |
20609 | | vrrc, vrrc, vrrc, |
20610 | | /* VMODUD */ |
20611 | | vrrc, vrrc, vrrc, |
20612 | | /* VMODUQ */ |
20613 | | vrrc, vrrc, vrrc, |
20614 | | /* VMODUW */ |
20615 | | vrrc, vrrc, vrrc, |
20616 | | /* VMRGEW */ |
20617 | | vrrc, vrrc, vrrc, |
20618 | | /* VMRGHB */ |
20619 | | vrrc, vrrc, vrrc, |
20620 | | /* VMRGHH */ |
20621 | | vrrc, vrrc, vrrc, |
20622 | | /* VMRGHW */ |
20623 | | vrrc, vrrc, vrrc, |
20624 | | /* VMRGLB */ |
20625 | | vrrc, vrrc, vrrc, |
20626 | | /* VMRGLH */ |
20627 | | vrrc, vrrc, vrrc, |
20628 | | /* VMRGLW */ |
20629 | | vrrc, vrrc, vrrc, |
20630 | | /* VMRGOW */ |
20631 | | vrrc, vrrc, vrrc, |
20632 | | /* VMSUMCUD */ |
20633 | | vrrc, vrrc, vrrc, vrrc, |
20634 | | /* VMSUMMBM */ |
20635 | | vrrc, vrrc, vrrc, vrrc, |
20636 | | /* VMSUMSHM */ |
20637 | | vrrc, vrrc, vrrc, vrrc, |
20638 | | /* VMSUMSHS */ |
20639 | | vrrc, vrrc, vrrc, vrrc, |
20640 | | /* VMSUMUBM */ |
20641 | | vrrc, vrrc, vrrc, vrrc, |
20642 | | /* VMSUMUDM */ |
20643 | | vrrc, vrrc, vrrc, vrrc, |
20644 | | /* VMSUMUHM */ |
20645 | | vrrc, vrrc, vrrc, vrrc, |
20646 | | /* VMSUMUHS */ |
20647 | | vrrc, vrrc, vrrc, vrrc, |
20648 | | /* VMUL10CUQ */ |
20649 | | vrrc, vrrc, |
20650 | | /* VMUL10ECUQ */ |
20651 | | vrrc, vrrc, vrrc, |
20652 | | /* VMUL10EUQ */ |
20653 | | vrrc, vrrc, vrrc, |
20654 | | /* VMUL10UQ */ |
20655 | | vrrc, vrrc, |
20656 | | /* VMULESB */ |
20657 | | vrrc, vrrc, vrrc, |
20658 | | /* VMULESD */ |
20659 | | vrrc, vrrc, vrrc, |
20660 | | /* VMULESH */ |
20661 | | vrrc, vrrc, vrrc, |
20662 | | /* VMULESW */ |
20663 | | vrrc, vrrc, vrrc, |
20664 | | /* VMULEUB */ |
20665 | | vrrc, vrrc, vrrc, |
20666 | | /* VMULEUD */ |
20667 | | vrrc, vrrc, vrrc, |
20668 | | /* VMULEUH */ |
20669 | | vrrc, vrrc, vrrc, |
20670 | | /* VMULEUW */ |
20671 | | vrrc, vrrc, vrrc, |
20672 | | /* VMULHSD */ |
20673 | | vrrc, vrrc, vrrc, |
20674 | | /* VMULHSW */ |
20675 | | vrrc, vrrc, vrrc, |
20676 | | /* VMULHUD */ |
20677 | | vrrc, vrrc, vrrc, |
20678 | | /* VMULHUW */ |
20679 | | vrrc, vrrc, vrrc, |
20680 | | /* VMULLD */ |
20681 | | vrrc, vrrc, vrrc, |
20682 | | /* VMULOSB */ |
20683 | | vrrc, vrrc, vrrc, |
20684 | | /* VMULOSD */ |
20685 | | vrrc, vrrc, vrrc, |
20686 | | /* VMULOSH */ |
20687 | | vrrc, vrrc, vrrc, |
20688 | | /* VMULOSW */ |
20689 | | vrrc, vrrc, vrrc, |
20690 | | /* VMULOUB */ |
20691 | | vrrc, vrrc, vrrc, |
20692 | | /* VMULOUD */ |
20693 | | vrrc, vrrc, vrrc, |
20694 | | /* VMULOUH */ |
20695 | | vrrc, vrrc, vrrc, |
20696 | | /* VMULOUW */ |
20697 | | vrrc, vrrc, vrrc, |
20698 | | /* VMULUWM */ |
20699 | | vrrc, vrrc, vrrc, |
20700 | | /* VNAND */ |
20701 | | vrrc, vrrc, vrrc, |
20702 | | /* VNCIPHER */ |
20703 | | vrrc, vrrc, vrrc, |
20704 | | /* VNCIPHERLAST */ |
20705 | | vrrc, vrrc, vrrc, |
20706 | | /* VNEGD */ |
20707 | | vrrc, vrrc, |
20708 | | /* VNEGW */ |
20709 | | vrrc, vrrc, |
20710 | | /* VNMSUBFP */ |
20711 | | vrrc, vrrc, vrrc, vrrc, |
20712 | | /* VNOR */ |
20713 | | vrrc, vrrc, vrrc, |
20714 | | /* VOR */ |
20715 | | vrrc, vrrc, vrrc, |
20716 | | /* VORC */ |
20717 | | vrrc, vrrc, vrrc, |
20718 | | /* VPDEPD */ |
20719 | | vrrc, vrrc, vrrc, |
20720 | | /* VPERM */ |
20721 | | vrrc, vrrc, vrrc, vrrc, |
20722 | | /* VPERMR */ |
20723 | | vrrc, vrrc, vrrc, vrrc, |
20724 | | /* VPERMXOR */ |
20725 | | vrrc, vrrc, vrrc, vrrc, |
20726 | | /* VPEXTD */ |
20727 | | vrrc, vrrc, vrrc, |
20728 | | /* VPKPX */ |
20729 | | vrrc, vrrc, vrrc, |
20730 | | /* VPKSDSS */ |
20731 | | vrrc, vrrc, vrrc, |
20732 | | /* VPKSDUS */ |
20733 | | vrrc, vrrc, vrrc, |
20734 | | /* VPKSHSS */ |
20735 | | vrrc, vrrc, vrrc, |
20736 | | /* VPKSHUS */ |
20737 | | vrrc, vrrc, vrrc, |
20738 | | /* VPKSWSS */ |
20739 | | vrrc, vrrc, vrrc, |
20740 | | /* VPKSWUS */ |
20741 | | vrrc, vrrc, vrrc, |
20742 | | /* VPKUDUM */ |
20743 | | vrrc, vrrc, vrrc, |
20744 | | /* VPKUDUS */ |
20745 | | vrrc, vrrc, vrrc, |
20746 | | /* VPKUHUM */ |
20747 | | vrrc, vrrc, vrrc, |
20748 | | /* VPKUHUS */ |
20749 | | vrrc, vrrc, vrrc, |
20750 | | /* VPKUWUM */ |
20751 | | vrrc, vrrc, vrrc, |
20752 | | /* VPKUWUS */ |
20753 | | vrrc, vrrc, vrrc, |
20754 | | /* VPMSUMB */ |
20755 | | vrrc, vrrc, vrrc, |
20756 | | /* VPMSUMD */ |
20757 | | vrrc, vrrc, vrrc, |
20758 | | /* VPMSUMH */ |
20759 | | vrrc, vrrc, vrrc, |
20760 | | /* VPMSUMW */ |
20761 | | vrrc, vrrc, vrrc, |
20762 | | /* VPOPCNTB */ |
20763 | | vrrc, vrrc, |
20764 | | /* VPOPCNTD */ |
20765 | | vrrc, vrrc, |
20766 | | /* VPOPCNTH */ |
20767 | | vrrc, vrrc, |
20768 | | /* VPOPCNTW */ |
20769 | | vrrc, vrrc, |
20770 | | /* VPRTYBD */ |
20771 | | vrrc, vrrc, |
20772 | | /* VPRTYBQ */ |
20773 | | vrrc, vrrc, |
20774 | | /* VPRTYBW */ |
20775 | | vrrc, vrrc, |
20776 | | /* VREFP */ |
20777 | | vrrc, vrrc, |
20778 | | /* VRFIM */ |
20779 | | vrrc, vrrc, |
20780 | | /* VRFIN */ |
20781 | | vrrc, vrrc, |
20782 | | /* VRFIP */ |
20783 | | vrrc, vrrc, |
20784 | | /* VRFIZ */ |
20785 | | vrrc, vrrc, |
20786 | | /* VRLB */ |
20787 | | vrrc, vrrc, vrrc, |
20788 | | /* VRLD */ |
20789 | | vrrc, vrrc, vrrc, |
20790 | | /* VRLDMI */ |
20791 | | vrrc, vrrc, vrrc, vrrc, |
20792 | | /* VRLDNM */ |
20793 | | vrrc, vrrc, vrrc, |
20794 | | /* VRLH */ |
20795 | | vrrc, vrrc, vrrc, |
20796 | | /* VRLQ */ |
20797 | | vrrc, vrrc, vrrc, |
20798 | | /* VRLQMI */ |
20799 | | vrrc, vrrc, vrrc, vrrc, |
20800 | | /* VRLQNM */ |
20801 | | vrrc, vrrc, vrrc, |
20802 | | /* VRLW */ |
20803 | | vrrc, vrrc, vrrc, |
20804 | | /* VRLWMI */ |
20805 | | vrrc, vrrc, vrrc, vrrc, |
20806 | | /* VRLWNM */ |
20807 | | vrrc, vrrc, vrrc, |
20808 | | /* VRSQRTEFP */ |
20809 | | vrrc, vrrc, |
20810 | | /* VSBOX */ |
20811 | | vrrc, vrrc, |
20812 | | /* VSEL */ |
20813 | | vrrc, vrrc, vrrc, vrrc, |
20814 | | /* VSHASIGMAD */ |
20815 | | vrrc, vrrc, u1imm, u4imm, |
20816 | | /* VSHASIGMAW */ |
20817 | | vrrc, vrrc, u1imm, u4imm, |
20818 | | /* VSL */ |
20819 | | vrrc, vrrc, vrrc, |
20820 | | /* VSLB */ |
20821 | | vrrc, vrrc, vrrc, |
20822 | | /* VSLD */ |
20823 | | vrrc, vrrc, vrrc, |
20824 | | /* VSLDBI */ |
20825 | | vrrc, vrrc, vrrc, u3imm, |
20826 | | /* VSLDOI */ |
20827 | | vrrc, vrrc, vrrc, u4imm, |
20828 | | /* VSLH */ |
20829 | | vrrc, vrrc, vrrc, |
20830 | | /* VSLO */ |
20831 | | vrrc, vrrc, vrrc, |
20832 | | /* VSLQ */ |
20833 | | vrrc, vrrc, vrrc, |
20834 | | /* VSLV */ |
20835 | | vrrc, vrrc, vrrc, |
20836 | | /* VSLW */ |
20837 | | vrrc, vrrc, vrrc, |
20838 | | /* VSPLTB */ |
20839 | | vrrc, u5imm, vrrc, |
20840 | | /* VSPLTBs */ |
20841 | | vrrc, u5imm, vfrc, |
20842 | | /* VSPLTH */ |
20843 | | vrrc, u5imm, vrrc, |
20844 | | /* VSPLTHs */ |
20845 | | vrrc, u5imm, vfrc, |
20846 | | /* VSPLTISB */ |
20847 | | vrrc, s5imm, |
20848 | | /* VSPLTISH */ |
20849 | | vrrc, s5imm, |
20850 | | /* VSPLTISW */ |
20851 | | vrrc, s5imm, |
20852 | | /* VSPLTW */ |
20853 | | vrrc, u5imm, vrrc, |
20854 | | /* VSR */ |
20855 | | vrrc, vrrc, vrrc, |
20856 | | /* VSRAB */ |
20857 | | vrrc, vrrc, vrrc, |
20858 | | /* VSRAD */ |
20859 | | vrrc, vrrc, vrrc, |
20860 | | /* VSRAH */ |
20861 | | vrrc, vrrc, vrrc, |
20862 | | /* VSRAQ */ |
20863 | | vrrc, vrrc, vrrc, |
20864 | | /* VSRAW */ |
20865 | | vrrc, vrrc, vrrc, |
20866 | | /* VSRB */ |
20867 | | vrrc, vrrc, vrrc, |
20868 | | /* VSRD */ |
20869 | | vrrc, vrrc, vrrc, |
20870 | | /* VSRDBI */ |
20871 | | vrrc, vrrc, vrrc, u3imm, |
20872 | | /* VSRH */ |
20873 | | vrrc, vrrc, vrrc, |
20874 | | /* VSRO */ |
20875 | | vrrc, vrrc, vrrc, |
20876 | | /* VSRQ */ |
20877 | | vrrc, vrrc, vrrc, |
20878 | | /* VSRV */ |
20879 | | vrrc, vrrc, vrrc, |
20880 | | /* VSRW */ |
20881 | | vrrc, vrrc, vrrc, |
20882 | | /* VSTRIBL */ |
20883 | | vrrc, vrrc, |
20884 | | /* VSTRIBL_rec */ |
20885 | | vrrc, vrrc, |
20886 | | /* VSTRIBR */ |
20887 | | vrrc, vrrc, |
20888 | | /* VSTRIBR_rec */ |
20889 | | vrrc, vrrc, |
20890 | | /* VSTRIHL */ |
20891 | | vrrc, vrrc, |
20892 | | /* VSTRIHL_rec */ |
20893 | | vrrc, vrrc, |
20894 | | /* VSTRIHR */ |
20895 | | vrrc, vrrc, |
20896 | | /* VSTRIHR_rec */ |
20897 | | vrrc, vrrc, |
20898 | | /* VSUBCUQ */ |
20899 | | vrrc, vrrc, vrrc, |
20900 | | /* VSUBCUW */ |
20901 | | vrrc, vrrc, vrrc, |
20902 | | /* VSUBECUQ */ |
20903 | | vrrc, vrrc, vrrc, vrrc, |
20904 | | /* VSUBEUQM */ |
20905 | | vrrc, vrrc, vrrc, vrrc, |
20906 | | /* VSUBFP */ |
20907 | | vrrc, vrrc, vrrc, |
20908 | | /* VSUBSBS */ |
20909 | | vrrc, vrrc, vrrc, |
20910 | | /* VSUBSHS */ |
20911 | | vrrc, vrrc, vrrc, |
20912 | | /* VSUBSWS */ |
20913 | | vrrc, vrrc, vrrc, |
20914 | | /* VSUBUBM */ |
20915 | | vrrc, vrrc, vrrc, |
20916 | | /* VSUBUBS */ |
20917 | | vrrc, vrrc, vrrc, |
20918 | | /* VSUBUDM */ |
20919 | | vrrc, vrrc, vrrc, |
20920 | | /* VSUBUHM */ |
20921 | | vrrc, vrrc, vrrc, |
20922 | | /* VSUBUHS */ |
20923 | | vrrc, vrrc, vrrc, |
20924 | | /* VSUBUQM */ |
20925 | | vrrc, vrrc, vrrc, |
20926 | | /* VSUBUWM */ |
20927 | | vrrc, vrrc, vrrc, |
20928 | | /* VSUBUWS */ |
20929 | | vrrc, vrrc, vrrc, |
20930 | | /* VSUM2SWS */ |
20931 | | vrrc, vrrc, vrrc, |
20932 | | /* VSUM4SBS */ |
20933 | | vrrc, vrrc, vrrc, |
20934 | | /* VSUM4SHS */ |
20935 | | vrrc, vrrc, vrrc, |
20936 | | /* VSUM4UBS */ |
20937 | | vrrc, vrrc, vrrc, |
20938 | | /* VSUMSWS */ |
20939 | | vrrc, vrrc, vrrc, |
20940 | | /* VUPKHPX */ |
20941 | | vrrc, vrrc, |
20942 | | /* VUPKHSB */ |
20943 | | vrrc, vrrc, |
20944 | | /* VUPKHSH */ |
20945 | | vrrc, vrrc, |
20946 | | /* VUPKHSW */ |
20947 | | vrrc, vrrc, |
20948 | | /* VUPKLPX */ |
20949 | | vrrc, vrrc, |
20950 | | /* VUPKLSB */ |
20951 | | vrrc, vrrc, |
20952 | | /* VUPKLSH */ |
20953 | | vrrc, vrrc, |
20954 | | /* VUPKLSW */ |
20955 | | vrrc, vrrc, |
20956 | | /* VXOR */ |
20957 | | vrrc, vrrc, vrrc, |
20958 | | /* V_SET0 */ |
20959 | | vrrc, |
20960 | | /* V_SET0B */ |
20961 | | vrrc, |
20962 | | /* V_SET0H */ |
20963 | | vrrc, |
20964 | | /* V_SETALLONES */ |
20965 | | vrrc, |
20966 | | /* V_SETALLONESB */ |
20967 | | vrrc, |
20968 | | /* V_SETALLONESH */ |
20969 | | vrrc, |
20970 | | /* WAIT */ |
20971 | | u2imm, |
20972 | | /* WAITP10 */ |
20973 | | u2imm, u2imm, |
20974 | | /* WRTEE */ |
20975 | | gprc, |
20976 | | /* WRTEEI */ |
20977 | | i1imm, |
20978 | | /* XOR */ |
20979 | | gprc, gprc, gprc, |
20980 | | /* XOR8 */ |
20981 | | g8rc, g8rc, g8rc, |
20982 | | /* XOR8_rec */ |
20983 | | g8rc, g8rc, g8rc, |
20984 | | /* XORI */ |
20985 | | gprc, gprc, u16imm, |
20986 | | /* XORI8 */ |
20987 | | g8rc, g8rc, u16imm64, |
20988 | | /* XORIS */ |
20989 | | gprc, gprc, u16imm, |
20990 | | /* XORIS8 */ |
20991 | | g8rc, g8rc, u16imm64, |
20992 | | /* XOR_rec */ |
20993 | | gprc, gprc, gprc, |
20994 | | /* XSABSDP */ |
20995 | | vsfrc, vsfrc, |
20996 | | /* XSABSQP */ |
20997 | | vrrc, vrrc, |
20998 | | /* XSADDDP */ |
20999 | | vsfrc, vsfrc, vsfrc, |
21000 | | /* XSADDQP */ |
21001 | | vrrc, vrrc, vrrc, |
21002 | | /* XSADDQPO */ |
21003 | | vrrc, vrrc, vrrc, |
21004 | | /* XSADDSP */ |
21005 | | vssrc, vssrc, vssrc, |
21006 | | /* XSCMPEQDP */ |
21007 | | vsrc, vsfrc, vsfrc, |
21008 | | /* XSCMPEQQP */ |
21009 | | vrrc, vrrc, vrrc, |
21010 | | /* XSCMPEXPDP */ |
21011 | | crrc, vsfrc, vsfrc, |
21012 | | /* XSCMPEXPQP */ |
21013 | | crrc, vrrc, vrrc, |
21014 | | /* XSCMPGEDP */ |
21015 | | vsrc, vsfrc, vsfrc, |
21016 | | /* XSCMPGEQP */ |
21017 | | vrrc, vrrc, vrrc, |
21018 | | /* XSCMPGTDP */ |
21019 | | vsrc, vsfrc, vsfrc, |
21020 | | /* XSCMPGTQP */ |
21021 | | vrrc, vrrc, vrrc, |
21022 | | /* XSCMPODP */ |
21023 | | crrc, vsfrc, vsfrc, |
21024 | | /* XSCMPOQP */ |
21025 | | crrc, vrrc, vrrc, |
21026 | | /* XSCMPUDP */ |
21027 | | crrc, vsfrc, vsfrc, |
21028 | | /* XSCMPUQP */ |
21029 | | crrc, vrrc, vrrc, |
21030 | | /* XSCPSGNDP */ |
21031 | | vsfrc, vsfrc, vsfrc, |
21032 | | /* XSCPSGNQP */ |
21033 | | vrrc, vrrc, vrrc, |
21034 | | /* XSCVDPHP */ |
21035 | | vsfrc, vsfrc, |
21036 | | /* XSCVDPQP */ |
21037 | | vrrc, vfrc, |
21038 | | /* XSCVDPSP */ |
21039 | | vsfrc, vsfrc, |
21040 | | /* XSCVDPSPN */ |
21041 | | vsrc, vssrc, |
21042 | | /* XSCVDPSXDS */ |
21043 | | vsfrc, vsfrc, |
21044 | | /* XSCVDPSXDSs */ |
21045 | | vssrc, vssrc, |
21046 | | /* XSCVDPSXWS */ |
21047 | | vsfrc, vsfrc, |
21048 | | /* XSCVDPSXWSs */ |
21049 | | vssrc, vssrc, |
21050 | | /* XSCVDPUXDS */ |
21051 | | vsfrc, vsfrc, |
21052 | | /* XSCVDPUXDSs */ |
21053 | | vssrc, vssrc, |
21054 | | /* XSCVDPUXWS */ |
21055 | | vsfrc, vsfrc, |
21056 | | /* XSCVDPUXWSs */ |
21057 | | vssrc, vssrc, |
21058 | | /* XSCVHPDP */ |
21059 | | vsfrc, vsfrc, |
21060 | | /* XSCVQPDP */ |
21061 | | vfrc, vrrc, |
21062 | | /* XSCVQPDPO */ |
21063 | | vfrc, vrrc, |
21064 | | /* XSCVQPSDZ */ |
21065 | | vrrc, vrrc, |
21066 | | /* XSCVQPSQZ */ |
21067 | | vrrc, vrrc, |
21068 | | /* XSCVQPSWZ */ |
21069 | | vrrc, vrrc, |
21070 | | /* XSCVQPUDZ */ |
21071 | | vrrc, vrrc, |
21072 | | /* XSCVQPUQZ */ |
21073 | | vrrc, vrrc, |
21074 | | /* XSCVQPUWZ */ |
21075 | | vrrc, vrrc, |
21076 | | /* XSCVSDQP */ |
21077 | | vrrc, vfrc, |
21078 | | /* XSCVSPDP */ |
21079 | | vsfrc, vsfrc, |
21080 | | /* XSCVSPDPN */ |
21081 | | vssrc, vsrc, |
21082 | | /* XSCVSQQP */ |
21083 | | vrrc, vrrc, |
21084 | | /* XSCVSXDDP */ |
21085 | | vsfrc, vsfrc, |
21086 | | /* XSCVSXDSP */ |
21087 | | vssrc, vsfrc, |
21088 | | /* XSCVUDQP */ |
21089 | | vrrc, vfrc, |
21090 | | /* XSCVUQQP */ |
21091 | | vrrc, vrrc, |
21092 | | /* XSCVUXDDP */ |
21093 | | vsfrc, vsfrc, |
21094 | | /* XSCVUXDSP */ |
21095 | | vssrc, vsfrc, |
21096 | | /* XSDIVDP */ |
21097 | | vsfrc, vsfrc, vsfrc, |
21098 | | /* XSDIVQP */ |
21099 | | vrrc, vrrc, vrrc, |
21100 | | /* XSDIVQPO */ |
21101 | | vrrc, vrrc, vrrc, |
21102 | | /* XSDIVSP */ |
21103 | | vssrc, vssrc, vssrc, |
21104 | | /* XSIEXPDP */ |
21105 | | vsrc, g8rc, g8rc, |
21106 | | /* XSIEXPQP */ |
21107 | | vrrc, vrrc, vsfrc, |
21108 | | /* XSMADDADP */ |
21109 | | vsfrc, vsfrc, vsfrc, vsfrc, |
21110 | | /* XSMADDASP */ |
21111 | | vssrc, vssrc, vssrc, vssrc, |
21112 | | /* XSMADDMDP */ |
21113 | | vsfrc, vsfrc, vsfrc, vsfrc, |
21114 | | /* XSMADDMSP */ |
21115 | | vssrc, vssrc, vssrc, vssrc, |
21116 | | /* XSMADDQP */ |
21117 | | vrrc, vrrc, vrrc, vrrc, |
21118 | | /* XSMADDQPO */ |
21119 | | vrrc, vrrc, vrrc, vrrc, |
21120 | | /* XSMAXCDP */ |
21121 | | vsfrc, vsfrc, vsfrc, |
21122 | | /* XSMAXCQP */ |
21123 | | vrrc, vrrc, vrrc, |
21124 | | /* XSMAXDP */ |
21125 | | vsfrc, vsfrc, vsfrc, |
21126 | | /* XSMAXJDP */ |
21127 | | vsrc, vsfrc, vsfrc, |
21128 | | /* XSMINCDP */ |
21129 | | vsfrc, vsfrc, vsfrc, |
21130 | | /* XSMINCQP */ |
21131 | | vrrc, vrrc, vrrc, |
21132 | | /* XSMINDP */ |
21133 | | vsfrc, vsfrc, vsfrc, |
21134 | | /* XSMINJDP */ |
21135 | | vsrc, vsfrc, vsfrc, |
21136 | | /* XSMSUBADP */ |
21137 | | vsfrc, vsfrc, vsfrc, vsfrc, |
21138 | | /* XSMSUBASP */ |
21139 | | vssrc, vssrc, vssrc, vssrc, |
21140 | | /* XSMSUBMDP */ |
21141 | | vsfrc, vsfrc, vsfrc, vsfrc, |
21142 | | /* XSMSUBMSP */ |
21143 | | vssrc, vssrc, vssrc, vssrc, |
21144 | | /* XSMSUBQP */ |
21145 | | vrrc, vrrc, vrrc, vrrc, |
21146 | | /* XSMSUBQPO */ |
21147 | | vrrc, vrrc, vrrc, vrrc, |
21148 | | /* XSMULDP */ |
21149 | | vsfrc, vsfrc, vsfrc, |
21150 | | /* XSMULQP */ |
21151 | | vrrc, vrrc, vrrc, |
21152 | | /* XSMULQPO */ |
21153 | | vrrc, vrrc, vrrc, |
21154 | | /* XSMULSP */ |
21155 | | vssrc, vssrc, vssrc, |
21156 | | /* XSNABSDP */ |
21157 | | vsfrc, vsfrc, |
21158 | | /* XSNABSDPs */ |
21159 | | vssrc, vssrc, |
21160 | | /* XSNABSQP */ |
21161 | | vrrc, vrrc, |
21162 | | /* XSNEGDP */ |
21163 | | vsfrc, vsfrc, |
21164 | | /* XSNEGQP */ |
21165 | | vrrc, vrrc, |
21166 | | /* XSNMADDADP */ |
21167 | | vsfrc, vsfrc, vsfrc, vsfrc, |
21168 | | /* XSNMADDASP */ |
21169 | | vssrc, vssrc, vssrc, vssrc, |
21170 | | /* XSNMADDMDP */ |
21171 | | vsfrc, vsfrc, vsfrc, vsfrc, |
21172 | | /* XSNMADDMSP */ |
21173 | | vssrc, vssrc, vssrc, vssrc, |
21174 | | /* XSNMADDQP */ |
21175 | | vrrc, vrrc, vrrc, vrrc, |
21176 | | /* XSNMADDQPO */ |
21177 | | vrrc, vrrc, vrrc, vrrc, |
21178 | | /* XSNMSUBADP */ |
21179 | | vsfrc, vsfrc, vsfrc, vsfrc, |
21180 | | /* XSNMSUBASP */ |
21181 | | vssrc, vssrc, vssrc, vssrc, |
21182 | | /* XSNMSUBMDP */ |
21183 | | vsfrc, vsfrc, vsfrc, vsfrc, |
21184 | | /* XSNMSUBMSP */ |
21185 | | vssrc, vssrc, vssrc, vssrc, |
21186 | | /* XSNMSUBQP */ |
21187 | | vrrc, vrrc, vrrc, vrrc, |
21188 | | /* XSNMSUBQPO */ |
21189 | | vrrc, vrrc, vrrc, vrrc, |
21190 | | /* XSRDPI */ |
21191 | | vsfrc, vsfrc, |
21192 | | /* XSRDPIC */ |
21193 | | vsfrc, vsfrc, |
21194 | | /* XSRDPIM */ |
21195 | | vsfrc, vsfrc, |
21196 | | /* XSRDPIP */ |
21197 | | vsfrc, vsfrc, |
21198 | | /* XSRDPIZ */ |
21199 | | vsfrc, vsfrc, |
21200 | | /* XSREDP */ |
21201 | | vsfrc, vsfrc, |
21202 | | /* XSRESP */ |
21203 | | vssrc, vssrc, |
21204 | | /* XSRQPI */ |
21205 | | vrrc, u1imm, vrrc, u2imm, |
21206 | | /* XSRQPIX */ |
21207 | | vrrc, u1imm, vrrc, u2imm, |
21208 | | /* XSRQPXP */ |
21209 | | vrrc, u1imm, vrrc, u2imm, |
21210 | | /* XSRSP */ |
21211 | | vssrc, vsfrc, |
21212 | | /* XSRSQRTEDP */ |
21213 | | vsfrc, vsfrc, |
21214 | | /* XSRSQRTESP */ |
21215 | | vssrc, vssrc, |
21216 | | /* XSSQRTDP */ |
21217 | | vsfrc, vsfrc, |
21218 | | /* XSSQRTQP */ |
21219 | | vrrc, vrrc, |
21220 | | /* XSSQRTQPO */ |
21221 | | vrrc, vrrc, |
21222 | | /* XSSQRTSP */ |
21223 | | vssrc, vssrc, |
21224 | | /* XSSUBDP */ |
21225 | | vsfrc, vsfrc, vsfrc, |
21226 | | /* XSSUBQP */ |
21227 | | vrrc, vrrc, vrrc, |
21228 | | /* XSSUBQPO */ |
21229 | | vrrc, vrrc, vrrc, |
21230 | | /* XSSUBSP */ |
21231 | | vssrc, vssrc, vssrc, |
21232 | | /* XSTDIVDP */ |
21233 | | crrc, vsfrc, vsfrc, |
21234 | | /* XSTSQRTDP */ |
21235 | | crrc, vsfrc, |
21236 | | /* XSTSTDCDP */ |
21237 | | crrc, u7imm, vsfrc, |
21238 | | /* XSTSTDCQP */ |
21239 | | crrc, u7imm, vrrc, |
21240 | | /* XSTSTDCSP */ |
21241 | | crrc, u7imm, vsfrc, |
21242 | | /* XSXEXPDP */ |
21243 | | g8rc, vsfrc, |
21244 | | /* XSXEXPQP */ |
21245 | | vrrc, vrrc, |
21246 | | /* XSXSIGDP */ |
21247 | | g8rc, vsfrc, |
21248 | | /* XSXSIGQP */ |
21249 | | vrrc, vrrc, |
21250 | | /* XVABSDP */ |
21251 | | vsrc, vsrc, |
21252 | | /* XVABSSP */ |
21253 | | vsrc, vsrc, |
21254 | | /* XVADDDP */ |
21255 | | vsrc, vsrc, vsrc, |
21256 | | /* XVADDSP */ |
21257 | | vsrc, vsrc, vsrc, |
21258 | | /* XVBF16GER2 */ |
21259 | | acc, vsrc, vsrc, |
21260 | | /* XVBF16GER2NN */ |
21261 | | acc, acc, vsrc, vsrc, |
21262 | | /* XVBF16GER2NP */ |
21263 | | acc, acc, vsrc, vsrc, |
21264 | | /* XVBF16GER2PN */ |
21265 | | acc, acc, vsrc, vsrc, |
21266 | | /* XVBF16GER2PP */ |
21267 | | acc, acc, vsrc, vsrc, |
21268 | | /* XVBF16GER2W */ |
21269 | | wacc, vsrc, vsrc, |
21270 | | /* XVBF16GER2WNN */ |
21271 | | wacc, wacc, vsrc, vsrc, |
21272 | | /* XVBF16GER2WNP */ |
21273 | | wacc, wacc, vsrc, vsrc, |
21274 | | /* XVBF16GER2WPN */ |
21275 | | wacc, wacc, vsrc, vsrc, |
21276 | | /* XVBF16GER2WPP */ |
21277 | | wacc, wacc, vsrc, vsrc, |
21278 | | /* XVCMPEQDP */ |
21279 | | vsrc, vsrc, vsrc, |
21280 | | /* XVCMPEQDP_rec */ |
21281 | | vsrc, vsrc, vsrc, |
21282 | | /* XVCMPEQSP */ |
21283 | | vsrc, vsrc, vsrc, |
21284 | | /* XVCMPEQSP_rec */ |
21285 | | vsrc, vsrc, vsrc, |
21286 | | /* XVCMPGEDP */ |
21287 | | vsrc, vsrc, vsrc, |
21288 | | /* XVCMPGEDP_rec */ |
21289 | | vsrc, vsrc, vsrc, |
21290 | | /* XVCMPGESP */ |
21291 | | vsrc, vsrc, vsrc, |
21292 | | /* XVCMPGESP_rec */ |
21293 | | vsrc, vsrc, vsrc, |
21294 | | /* XVCMPGTDP */ |
21295 | | vsrc, vsrc, vsrc, |
21296 | | /* XVCMPGTDP_rec */ |
21297 | | vsrc, vsrc, vsrc, |
21298 | | /* XVCMPGTSP */ |
21299 | | vsrc, vsrc, vsrc, |
21300 | | /* XVCMPGTSP_rec */ |
21301 | | vsrc, vsrc, vsrc, |
21302 | | /* XVCPSGNDP */ |
21303 | | vsrc, vsrc, vsrc, |
21304 | | /* XVCPSGNSP */ |
21305 | | vsrc, vsrc, vsrc, |
21306 | | /* XVCVBF16SPN */ |
21307 | | vsrc, vsrc, |
21308 | | /* XVCVDPSP */ |
21309 | | vsrc, vsrc, |
21310 | | /* XVCVDPSXDS */ |
21311 | | vsrc, vsrc, |
21312 | | /* XVCVDPSXWS */ |
21313 | | vsrc, vsrc, |
21314 | | /* XVCVDPUXDS */ |
21315 | | vsrc, vsrc, |
21316 | | /* XVCVDPUXWS */ |
21317 | | vsrc, vsrc, |
21318 | | /* XVCVHPSP */ |
21319 | | vsrc, vsrc, |
21320 | | /* XVCVSPBF16 */ |
21321 | | vsrc, vsrc, |
21322 | | /* XVCVSPDP */ |
21323 | | vsrc, vsrc, |
21324 | | /* XVCVSPHP */ |
21325 | | vsrc, vsrc, |
21326 | | /* XVCVSPSXDS */ |
21327 | | vsrc, vsrc, |
21328 | | /* XVCVSPSXWS */ |
21329 | | vsrc, vsrc, |
21330 | | /* XVCVSPUXDS */ |
21331 | | vsrc, vsrc, |
21332 | | /* XVCVSPUXWS */ |
21333 | | vsrc, vsrc, |
21334 | | /* XVCVSXDDP */ |
21335 | | vsrc, vsrc, |
21336 | | /* XVCVSXDSP */ |
21337 | | vsrc, vsrc, |
21338 | | /* XVCVSXWDP */ |
21339 | | vsrc, vsrc, |
21340 | | /* XVCVSXWSP */ |
21341 | | vsrc, vsrc, |
21342 | | /* XVCVUXDDP */ |
21343 | | vsrc, vsrc, |
21344 | | /* XVCVUXDSP */ |
21345 | | vsrc, vsrc, |
21346 | | /* XVCVUXWDP */ |
21347 | | vsrc, vsrc, |
21348 | | /* XVCVUXWSP */ |
21349 | | vsrc, vsrc, |
21350 | | /* XVDIVDP */ |
21351 | | vsrc, vsrc, vsrc, |
21352 | | /* XVDIVSP */ |
21353 | | vsrc, vsrc, vsrc, |
21354 | | /* XVF16GER2 */ |
21355 | | acc, vsrc, vsrc, |
21356 | | /* XVF16GER2NN */ |
21357 | | acc, acc, vsrc, vsrc, |
21358 | | /* XVF16GER2NP */ |
21359 | | acc, acc, vsrc, vsrc, |
21360 | | /* XVF16GER2PN */ |
21361 | | acc, acc, vsrc, vsrc, |
21362 | | /* XVF16GER2PP */ |
21363 | | acc, acc, vsrc, vsrc, |
21364 | | /* XVF16GER2W */ |
21365 | | wacc, vsrc, vsrc, |
21366 | | /* XVF16GER2WNN */ |
21367 | | wacc, wacc, vsrc, vsrc, |
21368 | | /* XVF16GER2WNP */ |
21369 | | wacc, wacc, vsrc, vsrc, |
21370 | | /* XVF16GER2WPN */ |
21371 | | wacc, wacc, vsrc, vsrc, |
21372 | | /* XVF16GER2WPP */ |
21373 | | wacc, wacc, vsrc, vsrc, |
21374 | | /* XVF32GER */ |
21375 | | acc, vsrc, vsrc, |
21376 | | /* XVF32GERNN */ |
21377 | | acc, acc, vsrc, vsrc, |
21378 | | /* XVF32GERNP */ |
21379 | | acc, acc, vsrc, vsrc, |
21380 | | /* XVF32GERPN */ |
21381 | | acc, acc, vsrc, vsrc, |
21382 | | /* XVF32GERPP */ |
21383 | | acc, acc, vsrc, vsrc, |
21384 | | /* XVF32GERW */ |
21385 | | wacc, vsrc, vsrc, |
21386 | | /* XVF32GERWNN */ |
21387 | | wacc, wacc, vsrc, vsrc, |
21388 | | /* XVF32GERWNP */ |
21389 | | wacc, wacc, vsrc, vsrc, |
21390 | | /* XVF32GERWPN */ |
21391 | | wacc, wacc, vsrc, vsrc, |
21392 | | /* XVF32GERWPP */ |
21393 | | wacc, wacc, vsrc, vsrc, |
21394 | | /* XVF64GER */ |
21395 | | acc, vsrpevenrc, vsrc, |
21396 | | /* XVF64GERNN */ |
21397 | | acc, acc, vsrpevenrc, vsrc, |
21398 | | /* XVF64GERNP */ |
21399 | | acc, acc, vsrpevenrc, vsrc, |
21400 | | /* XVF64GERPN */ |
21401 | | acc, acc, vsrpevenrc, vsrc, |
21402 | | /* XVF64GERPP */ |
21403 | | acc, acc, vsrpevenrc, vsrc, |
21404 | | /* XVF64GERW */ |
21405 | | wacc, vsrpevenrc, vsrc, |
21406 | | /* XVF64GERWNN */ |
21407 | | wacc, wacc, vsrpevenrc, vsrc, |
21408 | | /* XVF64GERWNP */ |
21409 | | wacc, wacc, vsrpevenrc, vsrc, |
21410 | | /* XVF64GERWPN */ |
21411 | | wacc, wacc, vsrpevenrc, vsrc, |
21412 | | /* XVF64GERWPP */ |
21413 | | wacc, wacc, vsrpevenrc, vsrc, |
21414 | | /* XVI16GER2 */ |
21415 | | acc, vsrc, vsrc, |
21416 | | /* XVI16GER2PP */ |
21417 | | acc, acc, vsrc, vsrc, |
21418 | | /* XVI16GER2S */ |
21419 | | acc, vsrc, vsrc, |
21420 | | /* XVI16GER2SPP */ |
21421 | | acc, acc, vsrc, vsrc, |
21422 | | /* XVI16GER2SW */ |
21423 | | wacc, vsrc, vsrc, |
21424 | | /* XVI16GER2SWPP */ |
21425 | | wacc, wacc, vsrc, vsrc, |
21426 | | /* XVI16GER2W */ |
21427 | | wacc, vsrc, vsrc, |
21428 | | /* XVI16GER2WPP */ |
21429 | | wacc, wacc, vsrc, vsrc, |
21430 | | /* XVI4GER8 */ |
21431 | | acc, vsrc, vsrc, |
21432 | | /* XVI4GER8PP */ |
21433 | | acc, acc, vsrc, vsrc, |
21434 | | /* XVI4GER8W */ |
21435 | | wacc, vsrc, vsrc, |
21436 | | /* XVI4GER8WPP */ |
21437 | | wacc, wacc, vsrc, vsrc, |
21438 | | /* XVI8GER4 */ |
21439 | | acc, vsrc, vsrc, |
21440 | | /* XVI8GER4PP */ |
21441 | | acc, acc, vsrc, vsrc, |
21442 | | /* XVI8GER4SPP */ |
21443 | | acc, acc, vsrc, vsrc, |
21444 | | /* XVI8GER4W */ |
21445 | | wacc, vsrc, vsrc, |
21446 | | /* XVI8GER4WPP */ |
21447 | | wacc, wacc, vsrc, vsrc, |
21448 | | /* XVI8GER4WSPP */ |
21449 | | wacc, wacc, vsrc, vsrc, |
21450 | | /* XVIEXPDP */ |
21451 | | vsrc, vsrc, vsrc, |
21452 | | /* XVIEXPSP */ |
21453 | | vsrc, vsrc, vsrc, |
21454 | | /* XVMADDADP */ |
21455 | | vsrc, vsrc, vsrc, vsrc, |
21456 | | /* XVMADDASP */ |
21457 | | vsrc, vsrc, vsrc, vsrc, |
21458 | | /* XVMADDMDP */ |
21459 | | vsrc, vsrc, vsrc, vsrc, |
21460 | | /* XVMADDMSP */ |
21461 | | vsrc, vsrc, vsrc, vsrc, |
21462 | | /* XVMAXDP */ |
21463 | | vsrc, vsrc, vsrc, |
21464 | | /* XVMAXSP */ |
21465 | | vsrc, vsrc, vsrc, |
21466 | | /* XVMINDP */ |
21467 | | vsrc, vsrc, vsrc, |
21468 | | /* XVMINSP */ |
21469 | | vsrc, vsrc, vsrc, |
21470 | | /* XVMSUBADP */ |
21471 | | vsrc, vsrc, vsrc, vsrc, |
21472 | | /* XVMSUBASP */ |
21473 | | vsrc, vsrc, vsrc, vsrc, |
21474 | | /* XVMSUBMDP */ |
21475 | | vsrc, vsrc, vsrc, vsrc, |
21476 | | /* XVMSUBMSP */ |
21477 | | vsrc, vsrc, vsrc, vsrc, |
21478 | | /* XVMULDP */ |
21479 | | vsrc, vsrc, vsrc, |
21480 | | /* XVMULSP */ |
21481 | | vsrc, vsrc, vsrc, |
21482 | | /* XVNABSDP */ |
21483 | | vsrc, vsrc, |
21484 | | /* XVNABSSP */ |
21485 | | vsrc, vsrc, |
21486 | | /* XVNEGDP */ |
21487 | | vsrc, vsrc, |
21488 | | /* XVNEGSP */ |
21489 | | vsrc, vsrc, |
21490 | | /* XVNMADDADP */ |
21491 | | vsrc, vsrc, vsrc, vsrc, |
21492 | | /* XVNMADDASP */ |
21493 | | vsrc, vsrc, vsrc, vsrc, |
21494 | | /* XVNMADDMDP */ |
21495 | | vsrc, vsrc, vsrc, vsrc, |
21496 | | /* XVNMADDMSP */ |
21497 | | vsrc, vsrc, vsrc, vsrc, |
21498 | | /* XVNMSUBADP */ |
21499 | | vsrc, vsrc, vsrc, vsrc, |
21500 | | /* XVNMSUBASP */ |
21501 | | vsrc, vsrc, vsrc, vsrc, |
21502 | | /* XVNMSUBMDP */ |
21503 | | vsrc, vsrc, vsrc, vsrc, |
21504 | | /* XVNMSUBMSP */ |
21505 | | vsrc, vsrc, vsrc, vsrc, |
21506 | | /* XVRDPI */ |
21507 | | vsrc, vsrc, |
21508 | | /* XVRDPIC */ |
21509 | | vsrc, vsrc, |
21510 | | /* XVRDPIM */ |
21511 | | vsrc, vsrc, |
21512 | | /* XVRDPIP */ |
21513 | | vsrc, vsrc, |
21514 | | /* XVRDPIZ */ |
21515 | | vsrc, vsrc, |
21516 | | /* XVREDP */ |
21517 | | vsrc, vsrc, |
21518 | | /* XVRESP */ |
21519 | | vsrc, vsrc, |
21520 | | /* XVRSPI */ |
21521 | | vsrc, vsrc, |
21522 | | /* XVRSPIC */ |
21523 | | vsrc, vsrc, |
21524 | | /* XVRSPIM */ |
21525 | | vsrc, vsrc, |
21526 | | /* XVRSPIP */ |
21527 | | vsrc, vsrc, |
21528 | | /* XVRSPIZ */ |
21529 | | vsrc, vsrc, |
21530 | | /* XVRSQRTEDP */ |
21531 | | vsrc, vsrc, |
21532 | | /* XVRSQRTESP */ |
21533 | | vsrc, vsrc, |
21534 | | /* XVSQRTDP */ |
21535 | | vsrc, vsrc, |
21536 | | /* XVSQRTSP */ |
21537 | | vsrc, vsrc, |
21538 | | /* XVSUBDP */ |
21539 | | vsrc, vsrc, vsrc, |
21540 | | /* XVSUBSP */ |
21541 | | vsrc, vsrc, vsrc, |
21542 | | /* XVTDIVDP */ |
21543 | | crrc, vsrc, vsrc, |
21544 | | /* XVTDIVSP */ |
21545 | | crrc, vsrc, vsrc, |
21546 | | /* XVTLSBB */ |
21547 | | crrc, vsrc, |
21548 | | /* XVTSQRTDP */ |
21549 | | crrc, vsrc, |
21550 | | /* XVTSQRTSP */ |
21551 | | crrc, vsrc, |
21552 | | /* XVTSTDCDP */ |
21553 | | vsrc, u7imm, vsrc, |
21554 | | /* XVTSTDCSP */ |
21555 | | vsrc, u7imm, vsrc, |
21556 | | /* XVXEXPDP */ |
21557 | | vsrc, vsrc, |
21558 | | /* XVXEXPSP */ |
21559 | | vsrc, vsrc, |
21560 | | /* XVXSIGDP */ |
21561 | | vsrc, vsrc, |
21562 | | /* XVXSIGSP */ |
21563 | | vsrc, vsrc, |
21564 | | /* XXBLENDVB */ |
21565 | | vsrc, vsrc, vsrc, vsrc, |
21566 | | /* XXBLENDVD */ |
21567 | | vsrc, vsrc, vsrc, vsrc, |
21568 | | /* XXBLENDVH */ |
21569 | | vsrc, vsrc, vsrc, vsrc, |
21570 | | /* XXBLENDVW */ |
21571 | | vsrc, vsrc, vsrc, vsrc, |
21572 | | /* XXBRD */ |
21573 | | vsrc, vsrc, |
21574 | | /* XXBRH */ |
21575 | | vsrc, vsrc, |
21576 | | /* XXBRQ */ |
21577 | | vsrc, vsrc, |
21578 | | /* XXBRW */ |
21579 | | vsrc, vsrc, |
21580 | | /* XXEVAL */ |
21581 | | vsrc, vsrc, vsrc, vsrc, u8imm, |
21582 | | /* XXEXTRACTUW */ |
21583 | | vsfrc, vsrc, u4imm, |
21584 | | /* XXGENPCVBM */ |
21585 | | vsrc, vrrc, s5imm, |
21586 | | /* XXGENPCVDM */ |
21587 | | vsrc, vrrc, s5imm, |
21588 | | /* XXGENPCVHM */ |
21589 | | vsrc, vrrc, s5imm, |
21590 | | /* XXGENPCVWM */ |
21591 | | vsrc, vrrc, s5imm, |
21592 | | /* XXINSERTW */ |
21593 | | vsrc, vsrc, vsrc, u4imm, |
21594 | | /* XXLAND */ |
21595 | | vsrc, vsrc, vsrc, |
21596 | | /* XXLANDC */ |
21597 | | vsrc, vsrc, vsrc, |
21598 | | /* XXLEQV */ |
21599 | | vsrc, vsrc, vsrc, |
21600 | | /* XXLEQVOnes */ |
21601 | | vsrc, |
21602 | | /* XXLNAND */ |
21603 | | vsrc, vsrc, vsrc, |
21604 | | /* XXLNOR */ |
21605 | | vsrc, vsrc, vsrc, |
21606 | | /* XXLOR */ |
21607 | | vsrc, vsrc, vsrc, |
21608 | | /* XXLORC */ |
21609 | | vsrc, vsrc, vsrc, |
21610 | | /* XXLORf */ |
21611 | | vsfrc, vsfrc, vsfrc, |
21612 | | /* XXLXOR */ |
21613 | | vsrc, vsrc, vsrc, |
21614 | | /* XXLXORdpz */ |
21615 | | vsfrc, |
21616 | | /* XXLXORspz */ |
21617 | | vssrc, |
21618 | | /* XXLXORz */ |
21619 | | vsrc, |
21620 | | /* XXMFACC */ |
21621 | | acc, acc, |
21622 | | /* XXMFACCW */ |
21623 | | wacc, wacc, |
21624 | | /* XXMRGHW */ |
21625 | | vsrc, vsrc, vsrc, |
21626 | | /* XXMRGLW */ |
21627 | | vsrc, vsrc, vsrc, |
21628 | | /* XXMTACC */ |
21629 | | acc, acc, |
21630 | | /* XXMTACCW */ |
21631 | | wacc, wacc, |
21632 | | /* XXPERM */ |
21633 | | vsrc, vsrc, vsrc, vsrc, |
21634 | | /* XXPERMDI */ |
21635 | | vsrc, vsrc, vsrc, u2imm, |
21636 | | /* XXPERMDIs */ |
21637 | | vsrc, vsfrc, u2imm, |
21638 | | /* XXPERMR */ |
21639 | | vsrc, vsrc, vsrc, vsrc, |
21640 | | /* XXPERMX */ |
21641 | | vsrc, vsrc, vsrc, vsrc, u3imm, |
21642 | | /* XXSEL */ |
21643 | | vsrc, vsrc, vsrc, vsrc, |
21644 | | /* XXSETACCZ */ |
21645 | | acc, |
21646 | | /* XXSETACCZW */ |
21647 | | wacc, |
21648 | | /* XXSLDWI */ |
21649 | | vsrc, vsrc, vsrc, u2imm, |
21650 | | /* XXSLDWIs */ |
21651 | | vsrc, vsfrc, u2imm, |
21652 | | /* XXSPLTI32DX */ |
21653 | | vsrc, vsrc, u1imm, i32imm, |
21654 | | /* XXSPLTIB */ |
21655 | | vsrc, u8imm, |
21656 | | /* XXSPLTIDP */ |
21657 | | vsrc, i32imm, |
21658 | | /* XXSPLTIW */ |
21659 | | vsrc, i32imm, |
21660 | | /* XXSPLTW */ |
21661 | | vsrc, vsrc, u2imm, |
21662 | | /* XXSPLTWs */ |
21663 | | vsrc, vsfrc, u2imm, |
21664 | | /* gBC */ |
21665 | | u5imm, crbitrc, condbrtarget, |
21666 | | /* gBCA */ |
21667 | | u5imm, crbitrc, abscondbrtarget, |
21668 | | /* gBCAat */ |
21669 | | u5imm, atimm, crbitrc, abscondbrtarget, |
21670 | | /* gBCCTR */ |
21671 | | u5imm, crbitrc, i32imm, |
21672 | | /* gBCCTRL */ |
21673 | | u5imm, crbitrc, i32imm, |
21674 | | /* gBCL */ |
21675 | | u5imm, crbitrc, condbrtarget, |
21676 | | /* gBCLA */ |
21677 | | u5imm, crbitrc, abscondbrtarget, |
21678 | | /* gBCLAat */ |
21679 | | u5imm, atimm, crbitrc, abscondbrtarget, |
21680 | | /* gBCLR */ |
21681 | | u5imm, crbitrc, i32imm, |
21682 | | /* gBCLRL */ |
21683 | | u5imm, crbitrc, i32imm, |
21684 | | /* gBCLat */ |
21685 | | u5imm, atimm, crbitrc, condbrtarget, |
21686 | | /* gBCat */ |
21687 | | u5imm, atimm, crbitrc, condbrtarget, |
21688 | | }; |
21689 | | return OpcodeOperandTypes[Offsets[Opcode] + OpIdx]; |
21690 | | } |
21691 | | } // end namespace PPC |
21692 | | } // end namespace llvm |
21693 | | #endif // GET_INSTRINFO_OPERAND_TYPE |
21694 | | |
21695 | | #ifdef GET_INSTRINFO_MEM_OPERAND_SIZE |
21696 | | #undef GET_INSTRINFO_MEM_OPERAND_SIZE |
21697 | | namespace llvm { |
21698 | | namespace PPC { |
21699 | | LLVM_READONLY |
21700 | | static int getMemOperandSize(int OpType) { |
21701 | | switch (OpType) { |
21702 | | default: return 0; |
21703 | | } |
21704 | | } |
21705 | | } // end namespace PPC |
21706 | | } // end namespace llvm |
21707 | | #endif // GET_INSTRINFO_MEM_OPERAND_SIZE |
21708 | | |
21709 | | #ifdef GET_INSTRINFO_LOGICAL_OPERAND_SIZE_MAP |
21710 | | #undef GET_INSTRINFO_LOGICAL_OPERAND_SIZE_MAP |
21711 | | namespace llvm { |
21712 | | namespace PPC { |
21713 | | LLVM_READONLY static unsigned |
21714 | | getLogicalOperandSize(uint16_t Opcode, uint16_t LogicalOpIdx) { |
21715 | | return LogicalOpIdx; |
21716 | | } |
21717 | | LLVM_READONLY static inline unsigned |
21718 | | getLogicalOperandIdx(uint16_t Opcode, uint16_t LogicalOpIdx) { |
21719 | | auto S = 0U; |
21720 | | for (auto i = 0U; i < LogicalOpIdx; ++i) |
21721 | | S += getLogicalOperandSize(Opcode, i); |
21722 | | return S; |
21723 | | } |
21724 | | } // end namespace PPC |
21725 | | } // end namespace llvm |
21726 | | #endif // GET_INSTRINFO_LOGICAL_OPERAND_SIZE_MAP |
21727 | | |
21728 | | #ifdef GET_INSTRINFO_LOGICAL_OPERAND_TYPE_MAP |
21729 | | #undef GET_INSTRINFO_LOGICAL_OPERAND_TYPE_MAP |
21730 | | namespace llvm { |
21731 | | namespace PPC { |
21732 | | LLVM_READONLY static int |
21733 | | getLogicalOperandType(uint16_t Opcode, uint16_t LogicalOpIdx) { |
21734 | | return -1; |
21735 | | } |
21736 | | } // end namespace PPC |
21737 | | } // end namespace llvm |
21738 | | #endif // GET_INSTRINFO_LOGICAL_OPERAND_TYPE_MAP |
21739 | | |
21740 | | #ifdef GET_INSTRINFO_MC_HELPER_DECLS |
21741 | | #undef GET_INSTRINFO_MC_HELPER_DECLS |
21742 | | |
21743 | | namespace llvm { |
21744 | | class MCInst; |
21745 | | class FeatureBitset; |
21746 | | |
21747 | | namespace PPC_MC { |
21748 | | |
21749 | | void verifyInstructionPredicates(unsigned Opcode, const FeatureBitset &Features); |
21750 | | |
21751 | | } // end namespace PPC_MC |
21752 | | } // end namespace llvm |
21753 | | |
21754 | | #endif // GET_INSTRINFO_MC_HELPER_DECLS |
21755 | | |
21756 | | #ifdef GET_INSTRINFO_MC_HELPERS |
21757 | | #undef GET_INSTRINFO_MC_HELPERS |
21758 | | |
21759 | | namespace llvm { |
21760 | | namespace PPC_MC { |
21761 | | |
21762 | | } // end namespace PPC_MC |
21763 | | } // end namespace llvm |
21764 | | |
21765 | | #endif // GET_GENISTRINFO_MC_HELPERS |
21766 | | |
21767 | | #if (defined(ENABLE_INSTR_PREDICATE_VERIFIER) && !defined(NDEBUG)) ||\ |
21768 | | defined(GET_AVAILABLE_OPCODE_CHECKER) |
21769 | | #define GET_COMPUTE_FEATURES |
21770 | | #endif |
21771 | | #ifdef GET_COMPUTE_FEATURES |
21772 | | #undef GET_COMPUTE_FEATURES |
21773 | | namespace llvm { |
21774 | | namespace PPC_MC { |
21775 | | |
21776 | | // Bits for subtarget features that participate in instruction matching. |
21777 | | enum SubtargetFeatureBits : uint8_t { |
21778 | | Feature_ModernAsBit = 0, |
21779 | | }; |
21780 | | |
21781 | 1.34M | inline FeatureBitset computeAvailableFeatures(const FeatureBitset &FB) { |
21782 | 1.34M | FeatureBitset Features; |
21783 | 1.34M | if (!FB[PPC::AIXOS] || FB[PPC::FeatureModernAIXAs]) |
21784 | 1.34M | Features.set(Feature_ModernAsBit); |
21785 | 1.34M | return Features; |
21786 | 1.34M | } |
21787 | | |
21788 | 1.34M | inline FeatureBitset computeRequiredFeatures(unsigned Opcode) { |
21789 | 1.34M | enum : uint8_t { |
21790 | 1.34M | CEFBS_None, |
21791 | 1.34M | }; |
21792 | | |
21793 | 1.34M | static constexpr FeatureBitset FeatureBitsets[] = { |
21794 | 1.34M | {}, // CEFBS_None |
21795 | 1.34M | }; |
21796 | 1.34M | static constexpr uint8_t RequiredFeaturesRefs[] = { |
21797 | 1.34M | CEFBS_None, // PHI = 0 |
21798 | 1.34M | CEFBS_None, // INLINEASM = 1 |
21799 | 1.34M | CEFBS_None, // INLINEASM_BR = 2 |
21800 | 1.34M | CEFBS_None, // CFI_INSTRUCTION = 3 |
21801 | 1.34M | CEFBS_None, // EH_LABEL = 4 |
21802 | 1.34M | CEFBS_None, // GC_LABEL = 5 |
21803 | 1.34M | CEFBS_None, // ANNOTATION_LABEL = 6 |
21804 | 1.34M | CEFBS_None, // KILL = 7 |
21805 | 1.34M | CEFBS_None, // EXTRACT_SUBREG = 8 |
21806 | 1.34M | CEFBS_None, // INSERT_SUBREG = 9 |
21807 | 1.34M | CEFBS_None, // IMPLICIT_DEF = 10 |
21808 | 1.34M | CEFBS_None, // SUBREG_TO_REG = 11 |
21809 | 1.34M | CEFBS_None, // COPY_TO_REGCLASS = 12 |
21810 | 1.34M | CEFBS_None, // DBG_VALUE = 13 |
21811 | 1.34M | CEFBS_None, // DBG_VALUE_LIST = 14 |
21812 | 1.34M | CEFBS_None, // DBG_INSTR_REF = 15 |
21813 | 1.34M | CEFBS_None, // DBG_PHI = 16 |
21814 | 1.34M | CEFBS_None, // DBG_LABEL = 17 |
21815 | 1.34M | CEFBS_None, // REG_SEQUENCE = 18 |
21816 | 1.34M | CEFBS_None, // COPY = 19 |
21817 | 1.34M | CEFBS_None, // BUNDLE = 20 |
21818 | 1.34M | CEFBS_None, // LIFETIME_START = 21 |
21819 | 1.34M | CEFBS_None, // LIFETIME_END = 22 |
21820 | 1.34M | CEFBS_None, // PSEUDO_PROBE = 23 |
21821 | 1.34M | CEFBS_None, // ARITH_FENCE = 24 |
21822 | 1.34M | CEFBS_None, // STACKMAP = 25 |
21823 | 1.34M | CEFBS_None, // FENTRY_CALL = 26 |
21824 | 1.34M | CEFBS_None, // PATCHPOINT = 27 |
21825 | 1.34M | CEFBS_None, // LOAD_STACK_GUARD = 28 |
21826 | 1.34M | CEFBS_None, // PREALLOCATED_SETUP = 29 |
21827 | 1.34M | CEFBS_None, // PREALLOCATED_ARG = 30 |
21828 | 1.34M | CEFBS_None, // STATEPOINT = 31 |
21829 | 1.34M | CEFBS_None, // LOCAL_ESCAPE = 32 |
21830 | 1.34M | CEFBS_None, // FAULTING_OP = 33 |
21831 | 1.34M | CEFBS_None, // PATCHABLE_OP = 34 |
21832 | 1.34M | CEFBS_None, // PATCHABLE_FUNCTION_ENTER = 35 |
21833 | 1.34M | CEFBS_None, // PATCHABLE_RET = 36 |
21834 | 1.34M | CEFBS_None, // PATCHABLE_FUNCTION_EXIT = 37 |
21835 | 1.34M | CEFBS_None, // PATCHABLE_TAIL_CALL = 38 |
21836 | 1.34M | CEFBS_None, // PATCHABLE_EVENT_CALL = 39 |
21837 | 1.34M | CEFBS_None, // PATCHABLE_TYPED_EVENT_CALL = 40 |
21838 | 1.34M | CEFBS_None, // ICALL_BRANCH_FUNNEL = 41 |
21839 | 1.34M | CEFBS_None, // MEMBARRIER = 42 |
21840 | 1.34M | CEFBS_None, // JUMP_TABLE_DEBUG_INFO = 43 |
21841 | 1.34M | CEFBS_None, // G_ASSERT_SEXT = 44 |
21842 | 1.34M | CEFBS_None, // G_ASSERT_ZEXT = 45 |
21843 | 1.34M | CEFBS_None, // G_ASSERT_ALIGN = 46 |
21844 | 1.34M | CEFBS_None, // G_ADD = 47 |
21845 | 1.34M | CEFBS_None, // G_SUB = 48 |
21846 | 1.34M | CEFBS_None, // G_MUL = 49 |
21847 | 1.34M | CEFBS_None, // G_SDIV = 50 |
21848 | 1.34M | CEFBS_None, // G_UDIV = 51 |
21849 | 1.34M | CEFBS_None, // G_SREM = 52 |
21850 | 1.34M | CEFBS_None, // G_UREM = 53 |
21851 | 1.34M | CEFBS_None, // G_SDIVREM = 54 |
21852 | 1.34M | CEFBS_None, // G_UDIVREM = 55 |
21853 | 1.34M | CEFBS_None, // G_AND = 56 |
21854 | 1.34M | CEFBS_None, // G_OR = 57 |
21855 | 1.34M | CEFBS_None, // G_XOR = 58 |
21856 | 1.34M | CEFBS_None, // G_IMPLICIT_DEF = 59 |
21857 | 1.34M | CEFBS_None, // G_PHI = 60 |
21858 | 1.34M | CEFBS_None, // G_FRAME_INDEX = 61 |
21859 | 1.34M | CEFBS_None, // G_GLOBAL_VALUE = 62 |
21860 | 1.34M | CEFBS_None, // G_CONSTANT_POOL = 63 |
21861 | 1.34M | CEFBS_None, // G_EXTRACT = 64 |
21862 | 1.34M | CEFBS_None, // G_UNMERGE_VALUES = 65 |
21863 | 1.34M | CEFBS_None, // G_INSERT = 66 |
21864 | 1.34M | CEFBS_None, // G_MERGE_VALUES = 67 |
21865 | 1.34M | CEFBS_None, // G_BUILD_VECTOR = 68 |
21866 | 1.34M | CEFBS_None, // G_BUILD_VECTOR_TRUNC = 69 |
21867 | 1.34M | CEFBS_None, // G_CONCAT_VECTORS = 70 |
21868 | 1.34M | CEFBS_None, // G_PTRTOINT = 71 |
21869 | 1.34M | CEFBS_None, // G_INTTOPTR = 72 |
21870 | 1.34M | CEFBS_None, // G_BITCAST = 73 |
21871 | 1.34M | CEFBS_None, // G_FREEZE = 74 |
21872 | 1.34M | CEFBS_None, // G_CONSTANT_FOLD_BARRIER = 75 |
21873 | 1.34M | CEFBS_None, // G_INTRINSIC_FPTRUNC_ROUND = 76 |
21874 | 1.34M | CEFBS_None, // G_INTRINSIC_TRUNC = 77 |
21875 | 1.34M | CEFBS_None, // G_INTRINSIC_ROUND = 78 |
21876 | 1.34M | CEFBS_None, // G_INTRINSIC_LRINT = 79 |
21877 | 1.34M | CEFBS_None, // G_INTRINSIC_ROUNDEVEN = 80 |
21878 | 1.34M | CEFBS_None, // G_READCYCLECOUNTER = 81 |
21879 | 1.34M | CEFBS_None, // G_LOAD = 82 |
21880 | 1.34M | CEFBS_None, // G_SEXTLOAD = 83 |
21881 | 1.34M | CEFBS_None, // G_ZEXTLOAD = 84 |
21882 | 1.34M | CEFBS_None, // G_INDEXED_LOAD = 85 |
21883 | 1.34M | CEFBS_None, // G_INDEXED_SEXTLOAD = 86 |
21884 | 1.34M | CEFBS_None, // G_INDEXED_ZEXTLOAD = 87 |
21885 | 1.34M | CEFBS_None, // G_STORE = 88 |
21886 | 1.34M | CEFBS_None, // G_INDEXED_STORE = 89 |
21887 | 1.34M | CEFBS_None, // G_ATOMIC_CMPXCHG_WITH_SUCCESS = 90 |
21888 | 1.34M | CEFBS_None, // G_ATOMIC_CMPXCHG = 91 |
21889 | 1.34M | CEFBS_None, // G_ATOMICRMW_XCHG = 92 |
21890 | 1.34M | CEFBS_None, // G_ATOMICRMW_ADD = 93 |
21891 | 1.34M | CEFBS_None, // G_ATOMICRMW_SUB = 94 |
21892 | 1.34M | CEFBS_None, // G_ATOMICRMW_AND = 95 |
21893 | 1.34M | CEFBS_None, // G_ATOMICRMW_NAND = 96 |
21894 | 1.34M | CEFBS_None, // G_ATOMICRMW_OR = 97 |
21895 | 1.34M | CEFBS_None, // G_ATOMICRMW_XOR = 98 |
21896 | 1.34M | CEFBS_None, // G_ATOMICRMW_MAX = 99 |
21897 | 1.34M | CEFBS_None, // G_ATOMICRMW_MIN = 100 |
21898 | 1.34M | CEFBS_None, // G_ATOMICRMW_UMAX = 101 |
21899 | 1.34M | CEFBS_None, // G_ATOMICRMW_UMIN = 102 |
21900 | 1.34M | CEFBS_None, // G_ATOMICRMW_FADD = 103 |
21901 | 1.34M | CEFBS_None, // G_ATOMICRMW_FSUB = 104 |
21902 | 1.34M | CEFBS_None, // G_ATOMICRMW_FMAX = 105 |
21903 | 1.34M | CEFBS_None, // G_ATOMICRMW_FMIN = 106 |
21904 | 1.34M | CEFBS_None, // G_ATOMICRMW_UINC_WRAP = 107 |
21905 | 1.34M | CEFBS_None, // G_ATOMICRMW_UDEC_WRAP = 108 |
21906 | 1.34M | CEFBS_None, // G_FENCE = 109 |
21907 | 1.34M | CEFBS_None, // G_PREFETCH = 110 |
21908 | 1.34M | CEFBS_None, // G_BRCOND = 111 |
21909 | 1.34M | CEFBS_None, // G_BRINDIRECT = 112 |
21910 | 1.34M | CEFBS_None, // G_INVOKE_REGION_START = 113 |
21911 | 1.34M | CEFBS_None, // G_INTRINSIC = 114 |
21912 | 1.34M | CEFBS_None, // G_INTRINSIC_W_SIDE_EFFECTS = 115 |
21913 | 1.34M | CEFBS_None, // G_INTRINSIC_CONVERGENT = 116 |
21914 | 1.34M | CEFBS_None, // G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS = 117 |
21915 | 1.34M | CEFBS_None, // G_ANYEXT = 118 |
21916 | 1.34M | CEFBS_None, // G_TRUNC = 119 |
21917 | 1.34M | CEFBS_None, // G_CONSTANT = 120 |
21918 | 1.34M | CEFBS_None, // G_FCONSTANT = 121 |
21919 | 1.34M | CEFBS_None, // G_VASTART = 122 |
21920 | 1.34M | CEFBS_None, // G_VAARG = 123 |
21921 | 1.34M | CEFBS_None, // G_SEXT = 124 |
21922 | 1.34M | CEFBS_None, // G_SEXT_INREG = 125 |
21923 | 1.34M | CEFBS_None, // G_ZEXT = 126 |
21924 | 1.34M | CEFBS_None, // G_SHL = 127 |
21925 | 1.34M | CEFBS_None, // G_LSHR = 128 |
21926 | 1.34M | CEFBS_None, // G_ASHR = 129 |
21927 | 1.34M | CEFBS_None, // G_FSHL = 130 |
21928 | 1.34M | CEFBS_None, // G_FSHR = 131 |
21929 | 1.34M | CEFBS_None, // G_ROTR = 132 |
21930 | 1.34M | CEFBS_None, // G_ROTL = 133 |
21931 | 1.34M | CEFBS_None, // G_ICMP = 134 |
21932 | 1.34M | CEFBS_None, // G_FCMP = 135 |
21933 | 1.34M | CEFBS_None, // G_SELECT = 136 |
21934 | 1.34M | CEFBS_None, // G_UADDO = 137 |
21935 | 1.34M | CEFBS_None, // G_UADDE = 138 |
21936 | 1.34M | CEFBS_None, // G_USUBO = 139 |
21937 | 1.34M | CEFBS_None, // G_USUBE = 140 |
21938 | 1.34M | CEFBS_None, // G_SADDO = 141 |
21939 | 1.34M | CEFBS_None, // G_SADDE = 142 |
21940 | 1.34M | CEFBS_None, // G_SSUBO = 143 |
21941 | 1.34M | CEFBS_None, // G_SSUBE = 144 |
21942 | 1.34M | CEFBS_None, // G_UMULO = 145 |
21943 | 1.34M | CEFBS_None, // G_SMULO = 146 |
21944 | 1.34M | CEFBS_None, // G_UMULH = 147 |
21945 | 1.34M | CEFBS_None, // G_SMULH = 148 |
21946 | 1.34M | CEFBS_None, // G_UADDSAT = 149 |
21947 | 1.34M | CEFBS_None, // G_SADDSAT = 150 |
21948 | 1.34M | CEFBS_None, // G_USUBSAT = 151 |
21949 | 1.34M | CEFBS_None, // G_SSUBSAT = 152 |
21950 | 1.34M | CEFBS_None, // G_USHLSAT = 153 |
21951 | 1.34M | CEFBS_None, // G_SSHLSAT = 154 |
21952 | 1.34M | CEFBS_None, // G_SMULFIX = 155 |
21953 | 1.34M | CEFBS_None, // G_UMULFIX = 156 |
21954 | 1.34M | CEFBS_None, // G_SMULFIXSAT = 157 |
21955 | 1.34M | CEFBS_None, // G_UMULFIXSAT = 158 |
21956 | 1.34M | CEFBS_None, // G_SDIVFIX = 159 |
21957 | 1.34M | CEFBS_None, // G_UDIVFIX = 160 |
21958 | 1.34M | CEFBS_None, // G_SDIVFIXSAT = 161 |
21959 | 1.34M | CEFBS_None, // G_UDIVFIXSAT = 162 |
21960 | 1.34M | CEFBS_None, // G_FADD = 163 |
21961 | 1.34M | CEFBS_None, // G_FSUB = 164 |
21962 | 1.34M | CEFBS_None, // G_FMUL = 165 |
21963 | 1.34M | CEFBS_None, // G_FMA = 166 |
21964 | 1.34M | CEFBS_None, // G_FMAD = 167 |
21965 | 1.34M | CEFBS_None, // G_FDIV = 168 |
21966 | 1.34M | CEFBS_None, // G_FREM = 169 |
21967 | 1.34M | CEFBS_None, // G_FPOW = 170 |
21968 | 1.34M | CEFBS_None, // G_FPOWI = 171 |
21969 | 1.34M | CEFBS_None, // G_FEXP = 172 |
21970 | 1.34M | CEFBS_None, // G_FEXP2 = 173 |
21971 | 1.34M | CEFBS_None, // G_FEXP10 = 174 |
21972 | 1.34M | CEFBS_None, // G_FLOG = 175 |
21973 | 1.34M | CEFBS_None, // G_FLOG2 = 176 |
21974 | 1.34M | CEFBS_None, // G_FLOG10 = 177 |
21975 | 1.34M | CEFBS_None, // G_FLDEXP = 178 |
21976 | 1.34M | CEFBS_None, // G_FFREXP = 179 |
21977 | 1.34M | CEFBS_None, // G_FNEG = 180 |
21978 | 1.34M | CEFBS_None, // G_FPEXT = 181 |
21979 | 1.34M | CEFBS_None, // G_FPTRUNC = 182 |
21980 | 1.34M | CEFBS_None, // G_FPTOSI = 183 |
21981 | 1.34M | CEFBS_None, // G_FPTOUI = 184 |
21982 | 1.34M | CEFBS_None, // G_SITOFP = 185 |
21983 | 1.34M | CEFBS_None, // G_UITOFP = 186 |
21984 | 1.34M | CEFBS_None, // G_FABS = 187 |
21985 | 1.34M | CEFBS_None, // G_FCOPYSIGN = 188 |
21986 | 1.34M | CEFBS_None, // G_IS_FPCLASS = 189 |
21987 | 1.34M | CEFBS_None, // G_FCANONICALIZE = 190 |
21988 | 1.34M | CEFBS_None, // G_FMINNUM = 191 |
21989 | 1.34M | CEFBS_None, // G_FMAXNUM = 192 |
21990 | 1.34M | CEFBS_None, // G_FMINNUM_IEEE = 193 |
21991 | 1.34M | CEFBS_None, // G_FMAXNUM_IEEE = 194 |
21992 | 1.34M | CEFBS_None, // G_FMINIMUM = 195 |
21993 | 1.34M | CEFBS_None, // G_FMAXIMUM = 196 |
21994 | 1.34M | CEFBS_None, // G_GET_FPENV = 197 |
21995 | 1.34M | CEFBS_None, // G_SET_FPENV = 198 |
21996 | 1.34M | CEFBS_None, // G_RESET_FPENV = 199 |
21997 | 1.34M | CEFBS_None, // G_GET_FPMODE = 200 |
21998 | 1.34M | CEFBS_None, // G_SET_FPMODE = 201 |
21999 | 1.34M | CEFBS_None, // G_RESET_FPMODE = 202 |
22000 | 1.34M | CEFBS_None, // G_PTR_ADD = 203 |
22001 | 1.34M | CEFBS_None, // G_PTRMASK = 204 |
22002 | 1.34M | CEFBS_None, // G_SMIN = 205 |
22003 | 1.34M | CEFBS_None, // G_SMAX = 206 |
22004 | 1.34M | CEFBS_None, // G_UMIN = 207 |
22005 | 1.34M | CEFBS_None, // G_UMAX = 208 |
22006 | 1.34M | CEFBS_None, // G_ABS = 209 |
22007 | 1.34M | CEFBS_None, // G_LROUND = 210 |
22008 | 1.34M | CEFBS_None, // G_LLROUND = 211 |
22009 | 1.34M | CEFBS_None, // G_BR = 212 |
22010 | 1.34M | CEFBS_None, // G_BRJT = 213 |
22011 | 1.34M | CEFBS_None, // G_INSERT_VECTOR_ELT = 214 |
22012 | 1.34M | CEFBS_None, // G_EXTRACT_VECTOR_ELT = 215 |
22013 | 1.34M | CEFBS_None, // G_SHUFFLE_VECTOR = 216 |
22014 | 1.34M | CEFBS_None, // G_CTTZ = 217 |
22015 | 1.34M | CEFBS_None, // G_CTTZ_ZERO_UNDEF = 218 |
22016 | 1.34M | CEFBS_None, // G_CTLZ = 219 |
22017 | 1.34M | CEFBS_None, // G_CTLZ_ZERO_UNDEF = 220 |
22018 | 1.34M | CEFBS_None, // G_CTPOP = 221 |
22019 | 1.34M | CEFBS_None, // G_BSWAP = 222 |
22020 | 1.34M | CEFBS_None, // G_BITREVERSE = 223 |
22021 | 1.34M | CEFBS_None, // G_FCEIL = 224 |
22022 | 1.34M | CEFBS_None, // G_FCOS = 225 |
22023 | 1.34M | CEFBS_None, // G_FSIN = 226 |
22024 | 1.34M | CEFBS_None, // G_FSQRT = 227 |
22025 | 1.34M | CEFBS_None, // G_FFLOOR = 228 |
22026 | 1.34M | CEFBS_None, // G_FRINT = 229 |
22027 | 1.34M | CEFBS_None, // G_FNEARBYINT = 230 |
22028 | 1.34M | CEFBS_None, // G_ADDRSPACE_CAST = 231 |
22029 | 1.34M | CEFBS_None, // G_BLOCK_ADDR = 232 |
22030 | 1.34M | CEFBS_None, // G_JUMP_TABLE = 233 |
22031 | 1.34M | CEFBS_None, // G_DYN_STACKALLOC = 234 |
22032 | 1.34M | CEFBS_None, // G_STACKSAVE = 235 |
22033 | 1.34M | CEFBS_None, // G_STACKRESTORE = 236 |
22034 | 1.34M | CEFBS_None, // G_STRICT_FADD = 237 |
22035 | 1.34M | CEFBS_None, // G_STRICT_FSUB = 238 |
22036 | 1.34M | CEFBS_None, // G_STRICT_FMUL = 239 |
22037 | 1.34M | CEFBS_None, // G_STRICT_FDIV = 240 |
22038 | 1.34M | CEFBS_None, // G_STRICT_FREM = 241 |
22039 | 1.34M | CEFBS_None, // G_STRICT_FMA = 242 |
22040 | 1.34M | CEFBS_None, // G_STRICT_FSQRT = 243 |
22041 | 1.34M | CEFBS_None, // G_STRICT_FLDEXP = 244 |
22042 | 1.34M | CEFBS_None, // G_READ_REGISTER = 245 |
22043 | 1.34M | CEFBS_None, // G_WRITE_REGISTER = 246 |
22044 | 1.34M | CEFBS_None, // G_MEMCPY = 247 |
22045 | 1.34M | CEFBS_None, // G_MEMCPY_INLINE = 248 |
22046 | 1.34M | CEFBS_None, // G_MEMMOVE = 249 |
22047 | 1.34M | CEFBS_None, // G_MEMSET = 250 |
22048 | 1.34M | CEFBS_None, // G_BZERO = 251 |
22049 | 1.34M | CEFBS_None, // G_VECREDUCE_SEQ_FADD = 252 |
22050 | 1.34M | CEFBS_None, // G_VECREDUCE_SEQ_FMUL = 253 |
22051 | 1.34M | CEFBS_None, // G_VECREDUCE_FADD = 254 |
22052 | 1.34M | CEFBS_None, // G_VECREDUCE_FMUL = 255 |
22053 | 1.34M | CEFBS_None, // G_VECREDUCE_FMAX = 256 |
22054 | 1.34M | CEFBS_None, // G_VECREDUCE_FMIN = 257 |
22055 | 1.34M | CEFBS_None, // G_VECREDUCE_FMAXIMUM = 258 |
22056 | 1.34M | CEFBS_None, // G_VECREDUCE_FMINIMUM = 259 |
22057 | 1.34M | CEFBS_None, // G_VECREDUCE_ADD = 260 |
22058 | 1.34M | CEFBS_None, // G_VECREDUCE_MUL = 261 |
22059 | 1.34M | CEFBS_None, // G_VECREDUCE_AND = 262 |
22060 | 1.34M | CEFBS_None, // G_VECREDUCE_OR = 263 |
22061 | 1.34M | CEFBS_None, // G_VECREDUCE_XOR = 264 |
22062 | 1.34M | CEFBS_None, // G_VECREDUCE_SMAX = 265 |
22063 | 1.34M | CEFBS_None, // G_VECREDUCE_SMIN = 266 |
22064 | 1.34M | CEFBS_None, // G_VECREDUCE_UMAX = 267 |
22065 | 1.34M | CEFBS_None, // G_VECREDUCE_UMIN = 268 |
22066 | 1.34M | CEFBS_None, // G_SBFX = 269 |
22067 | 1.34M | CEFBS_None, // G_UBFX = 270 |
22068 | 1.34M | CEFBS_None, // ATOMIC_CMP_SWAP_I128 = 271 |
22069 | 1.34M | CEFBS_None, // ATOMIC_LOAD_ADD_I128 = 272 |
22070 | 1.34M | CEFBS_None, // ATOMIC_LOAD_AND_I128 = 273 |
22071 | 1.34M | CEFBS_None, // ATOMIC_LOAD_NAND_I128 = 274 |
22072 | 1.34M | CEFBS_None, // ATOMIC_LOAD_OR_I128 = 275 |
22073 | 1.34M | CEFBS_None, // ATOMIC_LOAD_SUB_I128 = 276 |
22074 | 1.34M | CEFBS_None, // ATOMIC_LOAD_XOR_I128 = 277 |
22075 | 1.34M | CEFBS_None, // ATOMIC_SWAP_I128 = 278 |
22076 | 1.34M | CEFBS_None, // BUILD_QUADWORD = 279 |
22077 | 1.34M | CEFBS_None, // BUILD_UACC = 280 |
22078 | 1.34M | CEFBS_None, // CFENCE = 281 |
22079 | 1.34M | CEFBS_None, // CFENCE8 = 282 |
22080 | 1.34M | CEFBS_None, // CLRLSLDI = 283 |
22081 | 1.34M | CEFBS_None, // CLRLSLDI_rec = 284 |
22082 | 1.34M | CEFBS_None, // CLRLSLWI = 285 |
22083 | 1.34M | CEFBS_None, // CLRLSLWI_rec = 286 |
22084 | 1.34M | CEFBS_None, // CLRRDI = 287 |
22085 | 1.34M | CEFBS_None, // CLRRDI_rec = 288 |
22086 | 1.34M | CEFBS_None, // CLRRWI = 289 |
22087 | 1.34M | CEFBS_None, // CLRRWI_rec = 290 |
22088 | 1.34M | CEFBS_None, // DCBFL = 291 |
22089 | 1.34M | CEFBS_None, // DCBFLP = 292 |
22090 | 1.34M | CEFBS_None, // DCBFPS = 293 |
22091 | 1.34M | CEFBS_None, // DCBFx = 294 |
22092 | 1.34M | CEFBS_None, // DCBSTPS = 295 |
22093 | 1.34M | CEFBS_None, // DCBTCT = 296 |
22094 | 1.34M | CEFBS_None, // DCBTDS = 297 |
22095 | 1.34M | CEFBS_None, // DCBTSTCT = 298 |
22096 | 1.34M | CEFBS_None, // DCBTSTDS = 299 |
22097 | 1.34M | CEFBS_None, // DCBTSTT = 300 |
22098 | 1.34M | CEFBS_None, // DCBTSTx = 301 |
22099 | 1.34M | CEFBS_None, // DCBTT = 302 |
22100 | 1.34M | CEFBS_None, // DCBTx = 303 |
22101 | 1.34M | CEFBS_None, // DFLOADf32 = 304 |
22102 | 1.34M | CEFBS_None, // DFLOADf64 = 305 |
22103 | 1.34M | CEFBS_None, // DFSTOREf32 = 306 |
22104 | 1.34M | CEFBS_None, // DFSTOREf64 = 307 |
22105 | 1.34M | CEFBS_None, // EXTLDI = 308 |
22106 | 1.34M | CEFBS_None, // EXTLDI_rec = 309 |
22107 | 1.34M | CEFBS_None, // EXTLWI = 310 |
22108 | 1.34M | CEFBS_None, // EXTLWI_rec = 311 |
22109 | 1.34M | CEFBS_None, // EXTRDI = 312 |
22110 | 1.34M | CEFBS_None, // EXTRDI_rec = 313 |
22111 | 1.34M | CEFBS_None, // EXTRWI = 314 |
22112 | 1.34M | CEFBS_None, // EXTRWI_rec = 315 |
22113 | 1.34M | CEFBS_None, // INSLWI = 316 |
22114 | 1.34M | CEFBS_None, // INSLWI_rec = 317 |
22115 | 1.34M | CEFBS_None, // INSRDI = 318 |
22116 | 1.34M | CEFBS_None, // INSRDI_rec = 319 |
22117 | 1.34M | CEFBS_None, // INSRWI = 320 |
22118 | 1.34M | CEFBS_None, // INSRWI_rec = 321 |
22119 | 1.34M | CEFBS_None, // KILL_PAIR = 322 |
22120 | 1.34M | CEFBS_None, // LAx = 323 |
22121 | 1.34M | CEFBS_None, // LIWAX = 324 |
22122 | 1.34M | CEFBS_None, // LIWZX = 325 |
22123 | 1.34M | CEFBS_None, // PSUBI = 326 |
22124 | 1.34M | CEFBS_None, // RLWIMIbm = 327 |
22125 | 1.34M | CEFBS_None, // RLWIMIbm_rec = 328 |
22126 | 1.34M | CEFBS_None, // RLWINMbm = 329 |
22127 | 1.34M | CEFBS_None, // RLWINMbm_rec = 330 |
22128 | 1.34M | CEFBS_None, // RLWNMbm = 331 |
22129 | 1.34M | CEFBS_None, // RLWNMbm_rec = 332 |
22130 | 1.34M | CEFBS_None, // ROTRDI = 333 |
22131 | 1.34M | CEFBS_None, // ROTRDI_rec = 334 |
22132 | 1.34M | CEFBS_None, // ROTRWI = 335 |
22133 | 1.34M | CEFBS_None, // ROTRWI_rec = 336 |
22134 | 1.34M | CEFBS_None, // SLDI = 337 |
22135 | 1.34M | CEFBS_None, // SLDI_rec = 338 |
22136 | 1.34M | CEFBS_None, // SLWI = 339 |
22137 | 1.34M | CEFBS_None, // SLWI_rec = 340 |
22138 | 1.34M | CEFBS_None, // SPILLTOVSR_LD = 341 |
22139 | 1.34M | CEFBS_None, // SPILLTOVSR_LDX = 342 |
22140 | 1.34M | CEFBS_None, // SPILLTOVSR_ST = 343 |
22141 | 1.34M | CEFBS_None, // SPILLTOVSR_STX = 344 |
22142 | 1.34M | CEFBS_None, // SRDI = 345 |
22143 | 1.34M | CEFBS_None, // SRDI_rec = 346 |
22144 | 1.34M | CEFBS_None, // SRWI = 347 |
22145 | 1.34M | CEFBS_None, // SRWI_rec = 348 |
22146 | 1.34M | CEFBS_None, // STIWX = 349 |
22147 | 1.34M | CEFBS_None, // SUBI = 350 |
22148 | 1.34M | CEFBS_None, // SUBIC = 351 |
22149 | 1.34M | CEFBS_None, // SUBIC_rec = 352 |
22150 | 1.34M | CEFBS_None, // SUBIS = 353 |
22151 | 1.34M | CEFBS_None, // SUBPCIS = 354 |
22152 | 1.34M | CEFBS_None, // XFLOADf32 = 355 |
22153 | 1.34M | CEFBS_None, // XFLOADf64 = 356 |
22154 | 1.34M | CEFBS_None, // XFSTOREf32 = 357 |
22155 | 1.34M | CEFBS_None, // XFSTOREf64 = 358 |
22156 | 1.34M | CEFBS_None, // ADD4 = 359 |
22157 | 1.34M | CEFBS_None, // ADD4O = 360 |
22158 | 1.34M | CEFBS_None, // ADD4O_rec = 361 |
22159 | 1.34M | CEFBS_None, // ADD4TLS = 362 |
22160 | 1.34M | CEFBS_None, // ADD4_rec = 363 |
22161 | 1.34M | CEFBS_None, // ADD8 = 364 |
22162 | 1.34M | CEFBS_None, // ADD8O = 365 |
22163 | 1.34M | CEFBS_None, // ADD8O_rec = 366 |
22164 | 1.34M | CEFBS_None, // ADD8TLS = 367 |
22165 | 1.34M | CEFBS_None, // ADD8TLS_ = 368 |
22166 | 1.34M | CEFBS_None, // ADD8_rec = 369 |
22167 | 1.34M | CEFBS_None, // ADDC = 370 |
22168 | 1.34M | CEFBS_None, // ADDC8 = 371 |
22169 | 1.34M | CEFBS_None, // ADDC8O = 372 |
22170 | 1.34M | CEFBS_None, // ADDC8O_rec = 373 |
22171 | 1.34M | CEFBS_None, // ADDC8_rec = 374 |
22172 | 1.34M | CEFBS_None, // ADDCO = 375 |
22173 | 1.34M | CEFBS_None, // ADDCO_rec = 376 |
22174 | 1.34M | CEFBS_None, // ADDC_rec = 377 |
22175 | 1.34M | CEFBS_None, // ADDE = 378 |
22176 | 1.34M | CEFBS_None, // ADDE8 = 379 |
22177 | 1.34M | CEFBS_None, // ADDE8O = 380 |
22178 | 1.34M | CEFBS_None, // ADDE8O_rec = 381 |
22179 | 1.34M | CEFBS_None, // ADDE8_rec = 382 |
22180 | 1.34M | CEFBS_None, // ADDEO = 383 |
22181 | 1.34M | CEFBS_None, // ADDEO_rec = 384 |
22182 | 1.34M | CEFBS_None, // ADDEX = 385 |
22183 | 1.34M | CEFBS_None, // ADDEX8 = 386 |
22184 | 1.34M | CEFBS_None, // ADDE_rec = 387 |
22185 | 1.34M | CEFBS_None, // ADDG6S = 388 |
22186 | 1.34M | CEFBS_None, // ADDG6S8 = 389 |
22187 | 1.34M | CEFBS_None, // ADDI = 390 |
22188 | 1.34M | CEFBS_None, // ADDI8 = 391 |
22189 | 1.34M | CEFBS_None, // ADDIC = 392 |
22190 | 1.34M | CEFBS_None, // ADDIC8 = 393 |
22191 | 1.34M | CEFBS_None, // ADDIC_rec = 394 |
22192 | 1.34M | CEFBS_None, // ADDIS = 395 |
22193 | 1.34M | CEFBS_None, // ADDIS8 = 396 |
22194 | 1.34M | CEFBS_None, // ADDISdtprelHA = 397 |
22195 | 1.34M | CEFBS_None, // ADDISdtprelHA32 = 398 |
22196 | 1.34M | CEFBS_None, // ADDISgotTprelHA = 399 |
22197 | 1.34M | CEFBS_None, // ADDIStlsgdHA = 400 |
22198 | 1.34M | CEFBS_None, // ADDIStlsldHA = 401 |
22199 | 1.34M | CEFBS_None, // ADDIStocHA = 402 |
22200 | 1.34M | CEFBS_None, // ADDIStocHA8 = 403 |
22201 | 1.34M | CEFBS_None, // ADDIdtprelL = 404 |
22202 | 1.34M | CEFBS_None, // ADDIdtprelL32 = 405 |
22203 | 1.34M | CEFBS_None, // ADDItlsgdL = 406 |
22204 | 1.34M | CEFBS_None, // ADDItlsgdL32 = 407 |
22205 | 1.34M | CEFBS_None, // ADDItlsgdLADDR = 408 |
22206 | 1.34M | CEFBS_None, // ADDItlsgdLADDR32 = 409 |
22207 | 1.34M | CEFBS_None, // ADDItlsldL = 410 |
22208 | 1.34M | CEFBS_None, // ADDItlsldL32 = 411 |
22209 | 1.34M | CEFBS_None, // ADDItlsldLADDR = 412 |
22210 | 1.34M | CEFBS_None, // ADDItlsldLADDR32 = 413 |
22211 | 1.34M | CEFBS_None, // ADDItoc = 414 |
22212 | 1.34M | CEFBS_None, // ADDItoc8 = 415 |
22213 | 1.34M | CEFBS_None, // ADDItocL = 416 |
22214 | 1.34M | CEFBS_None, // ADDME = 417 |
22215 | 1.34M | CEFBS_None, // ADDME8 = 418 |
22216 | 1.34M | CEFBS_None, // ADDME8O = 419 |
22217 | 1.34M | CEFBS_None, // ADDME8O_rec = 420 |
22218 | 1.34M | CEFBS_None, // ADDME8_rec = 421 |
22219 | 1.34M | CEFBS_None, // ADDMEO = 422 |
22220 | 1.34M | CEFBS_None, // ADDMEO_rec = 423 |
22221 | 1.34M | CEFBS_None, // ADDME_rec = 424 |
22222 | 1.34M | CEFBS_None, // ADDPCIS = 425 |
22223 | 1.34M | CEFBS_None, // ADDZE = 426 |
22224 | 1.34M | CEFBS_None, // ADDZE8 = 427 |
22225 | 1.34M | CEFBS_None, // ADDZE8O = 428 |
22226 | 1.34M | CEFBS_None, // ADDZE8O_rec = 429 |
22227 | 1.34M | CEFBS_None, // ADDZE8_rec = 430 |
22228 | 1.34M | CEFBS_None, // ADDZEO = 431 |
22229 | 1.34M | CEFBS_None, // ADDZEO_rec = 432 |
22230 | 1.34M | CEFBS_None, // ADDZE_rec = 433 |
22231 | 1.34M | CEFBS_None, // ADJCALLSTACKDOWN = 434 |
22232 | 1.34M | CEFBS_None, // ADJCALLSTACKUP = 435 |
22233 | 1.34M | CEFBS_None, // AND = 436 |
22234 | 1.34M | CEFBS_None, // AND8 = 437 |
22235 | 1.34M | CEFBS_None, // AND8_rec = 438 |
22236 | 1.34M | CEFBS_None, // ANDC = 439 |
22237 | 1.34M | CEFBS_None, // ANDC8 = 440 |
22238 | 1.34M | CEFBS_None, // ANDC8_rec = 441 |
22239 | 1.34M | CEFBS_None, // ANDC_rec = 442 |
22240 | 1.34M | CEFBS_None, // ANDI8_rec = 443 |
22241 | 1.34M | CEFBS_None, // ANDIS8_rec = 444 |
22242 | 1.34M | CEFBS_None, // ANDIS_rec = 445 |
22243 | 1.34M | CEFBS_None, // ANDI_rec = 446 |
22244 | 1.34M | CEFBS_None, // ANDI_rec_1_EQ_BIT = 447 |
22245 | 1.34M | CEFBS_None, // ANDI_rec_1_EQ_BIT8 = 448 |
22246 | 1.34M | CEFBS_None, // ANDI_rec_1_GT_BIT = 449 |
22247 | 1.34M | CEFBS_None, // ANDI_rec_1_GT_BIT8 = 450 |
22248 | 1.34M | CEFBS_None, // AND_rec = 451 |
22249 | 1.34M | CEFBS_None, // ATOMIC_CMP_SWAP_I16 = 452 |
22250 | 1.34M | CEFBS_None, // ATOMIC_CMP_SWAP_I32 = 453 |
22251 | 1.34M | CEFBS_None, // ATOMIC_CMP_SWAP_I64 = 454 |
22252 | 1.34M | CEFBS_None, // ATOMIC_CMP_SWAP_I8 = 455 |
22253 | 1.34M | CEFBS_None, // ATOMIC_LOAD_ADD_I16 = 456 |
22254 | 1.34M | CEFBS_None, // ATOMIC_LOAD_ADD_I32 = 457 |
22255 | 1.34M | CEFBS_None, // ATOMIC_LOAD_ADD_I64 = 458 |
22256 | 1.34M | CEFBS_None, // ATOMIC_LOAD_ADD_I8 = 459 |
22257 | 1.34M | CEFBS_None, // ATOMIC_LOAD_AND_I16 = 460 |
22258 | 1.34M | CEFBS_None, // ATOMIC_LOAD_AND_I32 = 461 |
22259 | 1.34M | CEFBS_None, // ATOMIC_LOAD_AND_I64 = 462 |
22260 | 1.34M | CEFBS_None, // ATOMIC_LOAD_AND_I8 = 463 |
22261 | 1.34M | CEFBS_None, // ATOMIC_LOAD_MAX_I16 = 464 |
22262 | 1.34M | CEFBS_None, // ATOMIC_LOAD_MAX_I32 = 465 |
22263 | 1.34M | CEFBS_None, // ATOMIC_LOAD_MAX_I64 = 466 |
22264 | 1.34M | CEFBS_None, // ATOMIC_LOAD_MAX_I8 = 467 |
22265 | 1.34M | CEFBS_None, // ATOMIC_LOAD_MIN_I16 = 468 |
22266 | 1.34M | CEFBS_None, // ATOMIC_LOAD_MIN_I32 = 469 |
22267 | 1.34M | CEFBS_None, // ATOMIC_LOAD_MIN_I64 = 470 |
22268 | 1.34M | CEFBS_None, // ATOMIC_LOAD_MIN_I8 = 471 |
22269 | 1.34M | CEFBS_None, // ATOMIC_LOAD_NAND_I16 = 472 |
22270 | 1.34M | CEFBS_None, // ATOMIC_LOAD_NAND_I32 = 473 |
22271 | 1.34M | CEFBS_None, // ATOMIC_LOAD_NAND_I64 = 474 |
22272 | 1.34M | CEFBS_None, // ATOMIC_LOAD_NAND_I8 = 475 |
22273 | 1.34M | CEFBS_None, // ATOMIC_LOAD_OR_I16 = 476 |
22274 | 1.34M | CEFBS_None, // ATOMIC_LOAD_OR_I32 = 477 |
22275 | 1.34M | CEFBS_None, // ATOMIC_LOAD_OR_I64 = 478 |
22276 | 1.34M | CEFBS_None, // ATOMIC_LOAD_OR_I8 = 479 |
22277 | 1.34M | CEFBS_None, // ATOMIC_LOAD_SUB_I16 = 480 |
22278 | 1.34M | CEFBS_None, // ATOMIC_LOAD_SUB_I32 = 481 |
22279 | 1.34M | CEFBS_None, // ATOMIC_LOAD_SUB_I64 = 482 |
22280 | 1.34M | CEFBS_None, // ATOMIC_LOAD_SUB_I8 = 483 |
22281 | 1.34M | CEFBS_None, // ATOMIC_LOAD_UMAX_I16 = 484 |
22282 | 1.34M | CEFBS_None, // ATOMIC_LOAD_UMAX_I32 = 485 |
22283 | 1.34M | CEFBS_None, // ATOMIC_LOAD_UMAX_I64 = 486 |
22284 | 1.34M | CEFBS_None, // ATOMIC_LOAD_UMAX_I8 = 487 |
22285 | 1.34M | CEFBS_None, // ATOMIC_LOAD_UMIN_I16 = 488 |
22286 | 1.34M | CEFBS_None, // ATOMIC_LOAD_UMIN_I32 = 489 |
22287 | 1.34M | CEFBS_None, // ATOMIC_LOAD_UMIN_I64 = 490 |
22288 | 1.34M | CEFBS_None, // ATOMIC_LOAD_UMIN_I8 = 491 |
22289 | 1.34M | CEFBS_None, // ATOMIC_LOAD_XOR_I16 = 492 |
22290 | 1.34M | CEFBS_None, // ATOMIC_LOAD_XOR_I32 = 493 |
22291 | 1.34M | CEFBS_None, // ATOMIC_LOAD_XOR_I64 = 494 |
22292 | 1.34M | CEFBS_None, // ATOMIC_LOAD_XOR_I8 = 495 |
22293 | 1.34M | CEFBS_None, // ATOMIC_SWAP_I16 = 496 |
22294 | 1.34M | CEFBS_None, // ATOMIC_SWAP_I32 = 497 |
22295 | 1.34M | CEFBS_None, // ATOMIC_SWAP_I64 = 498 |
22296 | 1.34M | CEFBS_None, // ATOMIC_SWAP_I8 = 499 |
22297 | 1.34M | CEFBS_None, // ATTN = 500 |
22298 | 1.34M | CEFBS_None, // B = 501 |
22299 | 1.34M | CEFBS_None, // BA = 502 |
22300 | 1.34M | CEFBS_None, // BC = 503 |
22301 | 1.34M | CEFBS_None, // BCC = 504 |
22302 | 1.34M | CEFBS_None, // BCCA = 505 |
22303 | 1.34M | CEFBS_None, // BCCCTR = 506 |
22304 | 1.34M | CEFBS_None, // BCCCTR8 = 507 |
22305 | 1.34M | CEFBS_None, // BCCCTRL = 508 |
22306 | 1.34M | CEFBS_None, // BCCCTRL8 = 509 |
22307 | 1.34M | CEFBS_None, // BCCL = 510 |
22308 | 1.34M | CEFBS_None, // BCCLA = 511 |
22309 | 1.34M | CEFBS_None, // BCCLR = 512 |
22310 | 1.34M | CEFBS_None, // BCCLRL = 513 |
22311 | 1.34M | CEFBS_None, // BCCTR = 514 |
22312 | 1.34M | CEFBS_None, // BCCTR8 = 515 |
22313 | 1.34M | CEFBS_None, // BCCTR8n = 516 |
22314 | 1.34M | CEFBS_None, // BCCTRL = 517 |
22315 | 1.34M | CEFBS_None, // BCCTRL8 = 518 |
22316 | 1.34M | CEFBS_None, // BCCTRL8n = 519 |
22317 | 1.34M | CEFBS_None, // BCCTRLn = 520 |
22318 | 1.34M | CEFBS_None, // BCCTRn = 521 |
22319 | 1.34M | CEFBS_None, // BCDADD_rec = 522 |
22320 | 1.34M | CEFBS_None, // BCDCFN_rec = 523 |
22321 | 1.34M | CEFBS_None, // BCDCFSQ_rec = 524 |
22322 | 1.34M | CEFBS_None, // BCDCFZ_rec = 525 |
22323 | 1.34M | CEFBS_None, // BCDCPSGN_rec = 526 |
22324 | 1.34M | CEFBS_None, // BCDCTN_rec = 527 |
22325 | 1.34M | CEFBS_None, // BCDCTSQ_rec = 528 |
22326 | 1.34M | CEFBS_None, // BCDCTZ_rec = 529 |
22327 | 1.34M | CEFBS_None, // BCDSETSGN_rec = 530 |
22328 | 1.34M | CEFBS_None, // BCDSR_rec = 531 |
22329 | 1.34M | CEFBS_None, // BCDSUB_rec = 532 |
22330 | 1.34M | CEFBS_None, // BCDS_rec = 533 |
22331 | 1.34M | CEFBS_None, // BCDTRUNC_rec = 534 |
22332 | 1.34M | CEFBS_None, // BCDUS_rec = 535 |
22333 | 1.34M | CEFBS_None, // BCDUTRUNC_rec = 536 |
22334 | 1.34M | CEFBS_None, // BCL = 537 |
22335 | 1.34M | CEFBS_None, // BCLR = 538 |
22336 | 1.34M | CEFBS_None, // BCLRL = 539 |
22337 | 1.34M | CEFBS_None, // BCLRLn = 540 |
22338 | 1.34M | CEFBS_None, // BCLRn = 541 |
22339 | 1.34M | CEFBS_None, // BCLalways = 542 |
22340 | 1.34M | CEFBS_None, // BCLn = 543 |
22341 | 1.34M | CEFBS_None, // BCTR = 544 |
22342 | 1.34M | CEFBS_None, // BCTR8 = 545 |
22343 | 1.34M | CEFBS_None, // BCTRL = 546 |
22344 | 1.34M | CEFBS_None, // BCTRL8 = 547 |
22345 | 1.34M | CEFBS_None, // BCTRL8_LDinto_toc = 548 |
22346 | 1.34M | CEFBS_None, // BCTRL8_LDinto_toc_RM = 549 |
22347 | 1.34M | CEFBS_None, // BCTRL8_RM = 550 |
22348 | 1.34M | CEFBS_None, // BCTRL_LWZinto_toc = 551 |
22349 | 1.34M | CEFBS_None, // BCTRL_LWZinto_toc_RM = 552 |
22350 | 1.34M | CEFBS_None, // BCTRL_RM = 553 |
22351 | 1.34M | CEFBS_None, // BCn = 554 |
22352 | 1.34M | CEFBS_None, // BDNZ = 555 |
22353 | 1.34M | CEFBS_None, // BDNZ8 = 556 |
22354 | 1.34M | CEFBS_None, // BDNZA = 557 |
22355 | 1.34M | CEFBS_None, // BDNZAm = 558 |
22356 | 1.34M | CEFBS_None, // BDNZAp = 559 |
22357 | 1.34M | CEFBS_None, // BDNZL = 560 |
22358 | 1.34M | CEFBS_None, // BDNZLA = 561 |
22359 | 1.34M | CEFBS_None, // BDNZLAm = 562 |
22360 | 1.34M | CEFBS_None, // BDNZLAp = 563 |
22361 | 1.34M | CEFBS_None, // BDNZLR = 564 |
22362 | 1.34M | CEFBS_None, // BDNZLR8 = 565 |
22363 | 1.34M | CEFBS_None, // BDNZLRL = 566 |
22364 | 1.34M | CEFBS_None, // BDNZLRLm = 567 |
22365 | 1.34M | CEFBS_None, // BDNZLRLp = 568 |
22366 | 1.34M | CEFBS_None, // BDNZLRm = 569 |
22367 | 1.34M | CEFBS_None, // BDNZLRp = 570 |
22368 | 1.34M | CEFBS_None, // BDNZLm = 571 |
22369 | 1.34M | CEFBS_None, // BDNZLp = 572 |
22370 | 1.34M | CEFBS_None, // BDNZm = 573 |
22371 | 1.34M | CEFBS_None, // BDNZp = 574 |
22372 | 1.34M | CEFBS_None, // BDZ = 575 |
22373 | 1.34M | CEFBS_None, // BDZ8 = 576 |
22374 | 1.34M | CEFBS_None, // BDZA = 577 |
22375 | 1.34M | CEFBS_None, // BDZAm = 578 |
22376 | 1.34M | CEFBS_None, // BDZAp = 579 |
22377 | 1.34M | CEFBS_None, // BDZL = 580 |
22378 | 1.34M | CEFBS_None, // BDZLA = 581 |
22379 | 1.34M | CEFBS_None, // BDZLAm = 582 |
22380 | 1.34M | CEFBS_None, // BDZLAp = 583 |
22381 | 1.34M | CEFBS_None, // BDZLR = 584 |
22382 | 1.34M | CEFBS_None, // BDZLR8 = 585 |
22383 | 1.34M | CEFBS_None, // BDZLRL = 586 |
22384 | 1.34M | CEFBS_None, // BDZLRLm = 587 |
22385 | 1.34M | CEFBS_None, // BDZLRLp = 588 |
22386 | 1.34M | CEFBS_None, // BDZLRm = 589 |
22387 | 1.34M | CEFBS_None, // BDZLRp = 590 |
22388 | 1.34M | CEFBS_None, // BDZLm = 591 |
22389 | 1.34M | CEFBS_None, // BDZLp = 592 |
22390 | 1.34M | CEFBS_None, // BDZm = 593 |
22391 | 1.34M | CEFBS_None, // BDZp = 594 |
22392 | 1.34M | CEFBS_None, // BL = 595 |
22393 | 1.34M | CEFBS_None, // BL8 = 596 |
22394 | 1.34M | CEFBS_None, // BL8_NOP = 597 |
22395 | 1.34M | CEFBS_None, // BL8_NOP_RM = 598 |
22396 | 1.34M | CEFBS_None, // BL8_NOP_TLS = 599 |
22397 | 1.34M | CEFBS_None, // BL8_NOTOC = 600 |
22398 | 1.34M | CEFBS_None, // BL8_NOTOC_RM = 601 |
22399 | 1.34M | CEFBS_None, // BL8_NOTOC_TLS = 602 |
22400 | 1.34M | CEFBS_None, // BL8_RM = 603 |
22401 | 1.34M | CEFBS_None, // BL8_TLS = 604 |
22402 | 1.34M | CEFBS_None, // BL8_TLS_ = 605 |
22403 | 1.34M | CEFBS_None, // BLA = 606 |
22404 | 1.34M | CEFBS_None, // BLA8 = 607 |
22405 | 1.34M | CEFBS_None, // BLA8_NOP = 608 |
22406 | 1.34M | CEFBS_None, // BLA8_NOP_RM = 609 |
22407 | 1.34M | CEFBS_None, // BLA8_RM = 610 |
22408 | 1.34M | CEFBS_None, // BLA_RM = 611 |
22409 | 1.34M | CEFBS_None, // BLR = 612 |
22410 | 1.34M | CEFBS_None, // BLR8 = 613 |
22411 | 1.34M | CEFBS_None, // BLRL = 614 |
22412 | 1.34M | CEFBS_None, // BL_NOP = 615 |
22413 | 1.34M | CEFBS_None, // BL_NOP_RM = 616 |
22414 | 1.34M | CEFBS_None, // BL_RM = 617 |
22415 | 1.34M | CEFBS_None, // BL_TLS = 618 |
22416 | 1.34M | CEFBS_None, // BPERMD = 619 |
22417 | 1.34M | CEFBS_None, // BRD = 620 |
22418 | 1.34M | CEFBS_None, // BRH = 621 |
22419 | 1.34M | CEFBS_None, // BRH8 = 622 |
22420 | 1.34M | CEFBS_None, // BRINC = 623 |
22421 | 1.34M | CEFBS_None, // BRW = 624 |
22422 | 1.34M | CEFBS_None, // BRW8 = 625 |
22423 | 1.34M | CEFBS_None, // CBCDTD = 626 |
22424 | 1.34M | CEFBS_None, // CBCDTD8 = 627 |
22425 | 1.34M | CEFBS_None, // CDTBCD = 628 |
22426 | 1.34M | CEFBS_None, // CDTBCD8 = 629 |
22427 | 1.34M | CEFBS_None, // CFUGED = 630 |
22428 | 1.34M | CEFBS_None, // CLRBHRB = 631 |
22429 | 1.34M | CEFBS_None, // CMPB = 632 |
22430 | 1.34M | CEFBS_None, // CMPB8 = 633 |
22431 | 1.34M | CEFBS_None, // CMPD = 634 |
22432 | 1.34M | CEFBS_None, // CMPDI = 635 |
22433 | 1.34M | CEFBS_None, // CMPEQB = 636 |
22434 | 1.34M | CEFBS_None, // CMPLD = 637 |
22435 | 1.34M | CEFBS_None, // CMPLDI = 638 |
22436 | 1.34M | CEFBS_None, // CMPLW = 639 |
22437 | 1.34M | CEFBS_None, // CMPLWI = 640 |
22438 | 1.34M | CEFBS_None, // CMPRB = 641 |
22439 | 1.34M | CEFBS_None, // CMPRB8 = 642 |
22440 | 1.34M | CEFBS_None, // CMPW = 643 |
22441 | 1.34M | CEFBS_None, // CMPWI = 644 |
22442 | 1.34M | CEFBS_None, // CNTLZD = 645 |
22443 | 1.34M | CEFBS_None, // CNTLZDM = 646 |
22444 | 1.34M | CEFBS_None, // CNTLZD_rec = 647 |
22445 | 1.34M | CEFBS_None, // CNTLZW = 648 |
22446 | 1.34M | CEFBS_None, // CNTLZW8 = 649 |
22447 | 1.34M | CEFBS_None, // CNTLZW8_rec = 650 |
22448 | 1.34M | CEFBS_None, // CNTLZW_rec = 651 |
22449 | 1.34M | CEFBS_None, // CNTTZD = 652 |
22450 | 1.34M | CEFBS_None, // CNTTZDM = 653 |
22451 | 1.34M | CEFBS_None, // CNTTZD_rec = 654 |
22452 | 1.34M | CEFBS_None, // CNTTZW = 655 |
22453 | 1.34M | CEFBS_None, // CNTTZW8 = 656 |
22454 | 1.34M | CEFBS_None, // CNTTZW8_rec = 657 |
22455 | 1.34M | CEFBS_None, // CNTTZW_rec = 658 |
22456 | 1.34M | CEFBS_None, // CP_ABORT = 659 |
22457 | 1.34M | CEFBS_None, // CP_COPY = 660 |
22458 | 1.34M | CEFBS_None, // CP_COPY8 = 661 |
22459 | 1.34M | CEFBS_None, // CP_PASTE8_rec = 662 |
22460 | 1.34M | CEFBS_None, // CP_PASTE_rec = 663 |
22461 | 1.34M | CEFBS_None, // CR6SET = 664 |
22462 | 1.34M | CEFBS_None, // CR6UNSET = 665 |
22463 | 1.34M | CEFBS_None, // CRAND = 666 |
22464 | 1.34M | CEFBS_None, // CRANDC = 667 |
22465 | 1.34M | CEFBS_None, // CREQV = 668 |
22466 | 1.34M | CEFBS_None, // CRNAND = 669 |
22467 | 1.34M | CEFBS_None, // CRNOR = 670 |
22468 | 1.34M | CEFBS_None, // CRNOT = 671 |
22469 | 1.34M | CEFBS_None, // CROR = 672 |
22470 | 1.34M | CEFBS_None, // CRORC = 673 |
22471 | 1.34M | CEFBS_None, // CRSET = 674 |
22472 | 1.34M | CEFBS_None, // CRUNSET = 675 |
22473 | 1.34M | CEFBS_None, // CRXOR = 676 |
22474 | 1.34M | CEFBS_None, // CTRL_DEP = 677 |
22475 | 1.34M | CEFBS_None, // DADD = 678 |
22476 | 1.34M | CEFBS_None, // DADDQ = 679 |
22477 | 1.34M | CEFBS_None, // DADDQ_rec = 680 |
22478 | 1.34M | CEFBS_None, // DADD_rec = 681 |
22479 | 1.34M | CEFBS_None, // DARN = 682 |
22480 | 1.34M | CEFBS_None, // DCBA = 683 |
22481 | 1.34M | CEFBS_None, // DCBF = 684 |
22482 | 1.34M | CEFBS_None, // DCBFEP = 685 |
22483 | 1.34M | CEFBS_None, // DCBI = 686 |
22484 | 1.34M | CEFBS_None, // DCBST = 687 |
22485 | 1.34M | CEFBS_None, // DCBSTEP = 688 |
22486 | 1.34M | CEFBS_None, // DCBT = 689 |
22487 | 1.34M | CEFBS_None, // DCBTEP = 690 |
22488 | 1.34M | CEFBS_None, // DCBTST = 691 |
22489 | 1.34M | CEFBS_None, // DCBTSTEP = 692 |
22490 | 1.34M | CEFBS_None, // DCBZ = 693 |
22491 | 1.34M | CEFBS_None, // DCBZEP = 694 |
22492 | 1.34M | CEFBS_None, // DCBZL = 695 |
22493 | 1.34M | CEFBS_None, // DCBZLEP = 696 |
22494 | 1.34M | CEFBS_None, // DCCCI = 697 |
22495 | 1.34M | CEFBS_None, // DCFFIX = 698 |
22496 | 1.34M | CEFBS_None, // DCFFIXQ = 699 |
22497 | 1.34M | CEFBS_None, // DCFFIXQQ = 700 |
22498 | 1.34M | CEFBS_None, // DCFFIXQ_rec = 701 |
22499 | 1.34M | CEFBS_None, // DCFFIX_rec = 702 |
22500 | 1.34M | CEFBS_None, // DCMPO = 703 |
22501 | 1.34M | CEFBS_None, // DCMPOQ = 704 |
22502 | 1.34M | CEFBS_None, // DCMPU = 705 |
22503 | 1.34M | CEFBS_None, // DCMPUQ = 706 |
22504 | 1.34M | CEFBS_None, // DCTDP = 707 |
22505 | 1.34M | CEFBS_None, // DCTDP_rec = 708 |
22506 | 1.34M | CEFBS_None, // DCTFIX = 709 |
22507 | 1.34M | CEFBS_None, // DCTFIXQ = 710 |
22508 | 1.34M | CEFBS_None, // DCTFIXQQ = 711 |
22509 | 1.34M | CEFBS_None, // DCTFIXQ_rec = 712 |
22510 | 1.34M | CEFBS_None, // DCTFIX_rec = 713 |
22511 | 1.34M | CEFBS_None, // DCTQPQ = 714 |
22512 | 1.34M | CEFBS_None, // DCTQPQ_rec = 715 |
22513 | 1.34M | CEFBS_None, // DDEDPD = 716 |
22514 | 1.34M | CEFBS_None, // DDEDPDQ = 717 |
22515 | 1.34M | CEFBS_None, // DDEDPDQ_rec = 718 |
22516 | 1.34M | CEFBS_None, // DDEDPD_rec = 719 |
22517 | 1.34M | CEFBS_None, // DDIV = 720 |
22518 | 1.34M | CEFBS_None, // DDIVQ = 721 |
22519 | 1.34M | CEFBS_None, // DDIVQ_rec = 722 |
22520 | 1.34M | CEFBS_None, // DDIV_rec = 723 |
22521 | 1.34M | CEFBS_None, // DENBCD = 724 |
22522 | 1.34M | CEFBS_None, // DENBCDQ = 725 |
22523 | 1.34M | CEFBS_None, // DENBCDQ_rec = 726 |
22524 | 1.34M | CEFBS_None, // DENBCD_rec = 727 |
22525 | 1.34M | CEFBS_None, // DIEX = 728 |
22526 | 1.34M | CEFBS_None, // DIEXQ = 729 |
22527 | 1.34M | CEFBS_None, // DIEXQ_rec = 730 |
22528 | 1.34M | CEFBS_None, // DIEX_rec = 731 |
22529 | 1.34M | CEFBS_None, // DIVD = 732 |
22530 | 1.34M | CEFBS_None, // DIVDE = 733 |
22531 | 1.34M | CEFBS_None, // DIVDEO = 734 |
22532 | 1.34M | CEFBS_None, // DIVDEO_rec = 735 |
22533 | 1.34M | CEFBS_None, // DIVDEU = 736 |
22534 | 1.34M | CEFBS_None, // DIVDEUO = 737 |
22535 | 1.34M | CEFBS_None, // DIVDEUO_rec = 738 |
22536 | 1.34M | CEFBS_None, // DIVDEU_rec = 739 |
22537 | 1.34M | CEFBS_None, // DIVDE_rec = 740 |
22538 | 1.34M | CEFBS_None, // DIVDO = 741 |
22539 | 1.34M | CEFBS_None, // DIVDO_rec = 742 |
22540 | 1.34M | CEFBS_None, // DIVDU = 743 |
22541 | 1.34M | CEFBS_None, // DIVDUO = 744 |
22542 | 1.34M | CEFBS_None, // DIVDUO_rec = 745 |
22543 | 1.34M | CEFBS_None, // DIVDU_rec = 746 |
22544 | 1.34M | CEFBS_None, // DIVD_rec = 747 |
22545 | 1.34M | CEFBS_None, // DIVW = 748 |
22546 | 1.34M | CEFBS_None, // DIVWE = 749 |
22547 | 1.34M | CEFBS_None, // DIVWEO = 750 |
22548 | 1.34M | CEFBS_None, // DIVWEO_rec = 751 |
22549 | 1.34M | CEFBS_None, // DIVWEU = 752 |
22550 | 1.34M | CEFBS_None, // DIVWEUO = 753 |
22551 | 1.34M | CEFBS_None, // DIVWEUO_rec = 754 |
22552 | 1.34M | CEFBS_None, // DIVWEU_rec = 755 |
22553 | 1.34M | CEFBS_None, // DIVWE_rec = 756 |
22554 | 1.34M | CEFBS_None, // DIVWO = 757 |
22555 | 1.34M | CEFBS_None, // DIVWO_rec = 758 |
22556 | 1.34M | CEFBS_None, // DIVWU = 759 |
22557 | 1.34M | CEFBS_None, // DIVWUO = 760 |
22558 | 1.34M | CEFBS_None, // DIVWUO_rec = 761 |
22559 | 1.34M | CEFBS_None, // DIVWU_rec = 762 |
22560 | 1.34M | CEFBS_None, // DIVW_rec = 763 |
22561 | 1.34M | CEFBS_None, // DMMR = 764 |
22562 | 1.34M | CEFBS_None, // DMSETDMRZ = 765 |
22563 | 1.34M | CEFBS_None, // DMUL = 766 |
22564 | 1.34M | CEFBS_None, // DMULQ = 767 |
22565 | 1.34M | CEFBS_None, // DMULQ_rec = 768 |
22566 | 1.34M | CEFBS_None, // DMUL_rec = 769 |
22567 | 1.34M | CEFBS_None, // DMXOR = 770 |
22568 | 1.34M | CEFBS_None, // DMXXEXTFDMR256 = 771 |
22569 | 1.34M | CEFBS_None, // DMXXEXTFDMR512 = 772 |
22570 | 1.34M | CEFBS_None, // DMXXEXTFDMR512_HI = 773 |
22571 | 1.34M | CEFBS_None, // DMXXINSTFDMR256 = 774 |
22572 | 1.34M | CEFBS_None, // DMXXINSTFDMR512 = 775 |
22573 | 1.34M | CEFBS_None, // DMXXINSTFDMR512_HI = 776 |
22574 | 1.34M | CEFBS_None, // DQUA = 777 |
22575 | 1.34M | CEFBS_None, // DQUAI = 778 |
22576 | 1.34M | CEFBS_None, // DQUAIQ = 779 |
22577 | 1.34M | CEFBS_None, // DQUAIQ_rec = 780 |
22578 | 1.34M | CEFBS_None, // DQUAI_rec = 781 |
22579 | 1.34M | CEFBS_None, // DQUAQ = 782 |
22580 | 1.34M | CEFBS_None, // DQUAQ_rec = 783 |
22581 | 1.34M | CEFBS_None, // DQUA_rec = 784 |
22582 | 1.34M | CEFBS_None, // DRDPQ = 785 |
22583 | 1.34M | CEFBS_None, // DRDPQ_rec = 786 |
22584 | 1.34M | CEFBS_None, // DRINTN = 787 |
22585 | 1.34M | CEFBS_None, // DRINTNQ = 788 |
22586 | 1.34M | CEFBS_None, // DRINTNQ_rec = 789 |
22587 | 1.34M | CEFBS_None, // DRINTN_rec = 790 |
22588 | 1.34M | CEFBS_None, // DRINTX = 791 |
22589 | 1.34M | CEFBS_None, // DRINTXQ = 792 |
22590 | 1.34M | CEFBS_None, // DRINTXQ_rec = 793 |
22591 | 1.34M | CEFBS_None, // DRINTX_rec = 794 |
22592 | 1.34M | CEFBS_None, // DRRND = 795 |
22593 | 1.34M | CEFBS_None, // DRRNDQ = 796 |
22594 | 1.34M | CEFBS_None, // DRRNDQ_rec = 797 |
22595 | 1.34M | CEFBS_None, // DRRND_rec = 798 |
22596 | 1.34M | CEFBS_None, // DRSP = 799 |
22597 | 1.34M | CEFBS_None, // DRSP_rec = 800 |
22598 | 1.34M | CEFBS_None, // DSCLI = 801 |
22599 | 1.34M | CEFBS_None, // DSCLIQ = 802 |
22600 | 1.34M | CEFBS_None, // DSCLIQ_rec = 803 |
22601 | 1.34M | CEFBS_None, // DSCLI_rec = 804 |
22602 | 1.34M | CEFBS_None, // DSCRI = 805 |
22603 | 1.34M | CEFBS_None, // DSCRIQ = 806 |
22604 | 1.34M | CEFBS_None, // DSCRIQ_rec = 807 |
22605 | 1.34M | CEFBS_None, // DSCRI_rec = 808 |
22606 | 1.34M | CEFBS_None, // DSS = 809 |
22607 | 1.34M | CEFBS_None, // DSSALL = 810 |
22608 | 1.34M | CEFBS_None, // DST = 811 |
22609 | 1.34M | CEFBS_None, // DST64 = 812 |
22610 | 1.34M | CEFBS_None, // DSTST = 813 |
22611 | 1.34M | CEFBS_None, // DSTST64 = 814 |
22612 | 1.34M | CEFBS_None, // DSTSTT = 815 |
22613 | 1.34M | CEFBS_None, // DSTSTT64 = 816 |
22614 | 1.34M | CEFBS_None, // DSTT = 817 |
22615 | 1.34M | CEFBS_None, // DSTT64 = 818 |
22616 | 1.34M | CEFBS_None, // DSUB = 819 |
22617 | 1.34M | CEFBS_None, // DSUBQ = 820 |
22618 | 1.34M | CEFBS_None, // DSUBQ_rec = 821 |
22619 | 1.34M | CEFBS_None, // DSUB_rec = 822 |
22620 | 1.34M | CEFBS_None, // DTSTDC = 823 |
22621 | 1.34M | CEFBS_None, // DTSTDCQ = 824 |
22622 | 1.34M | CEFBS_None, // DTSTDG = 825 |
22623 | 1.34M | CEFBS_None, // DTSTDGQ = 826 |
22624 | 1.34M | CEFBS_None, // DTSTEX = 827 |
22625 | 1.34M | CEFBS_None, // DTSTEXQ = 828 |
22626 | 1.34M | CEFBS_None, // DTSTSF = 829 |
22627 | 1.34M | CEFBS_None, // DTSTSFI = 830 |
22628 | 1.34M | CEFBS_None, // DTSTSFIQ = 831 |
22629 | 1.34M | CEFBS_None, // DTSTSFQ = 832 |
22630 | 1.34M | CEFBS_None, // DXEX = 833 |
22631 | 1.34M | CEFBS_None, // DXEXQ = 834 |
22632 | 1.34M | CEFBS_None, // DXEXQ_rec = 835 |
22633 | 1.34M | CEFBS_None, // DXEX_rec = 836 |
22634 | 1.34M | CEFBS_None, // DYNALLOC = 837 |
22635 | 1.34M | CEFBS_None, // DYNALLOC8 = 838 |
22636 | 1.34M | CEFBS_None, // DYNAREAOFFSET = 839 |
22637 | 1.34M | CEFBS_None, // DYNAREAOFFSET8 = 840 |
22638 | 1.34M | CEFBS_None, // DecreaseCTR8loop = 841 |
22639 | 1.34M | CEFBS_None, // DecreaseCTRloop = 842 |
22640 | 1.34M | CEFBS_None, // EFDABS = 843 |
22641 | 1.34M | CEFBS_None, // EFDADD = 844 |
22642 | 1.34M | CEFBS_None, // EFDCFS = 845 |
22643 | 1.34M | CEFBS_None, // EFDCFSF = 846 |
22644 | 1.34M | CEFBS_None, // EFDCFSI = 847 |
22645 | 1.34M | CEFBS_None, // EFDCFSID = 848 |
22646 | 1.34M | CEFBS_None, // EFDCFUF = 849 |
22647 | 1.34M | CEFBS_None, // EFDCFUI = 850 |
22648 | 1.34M | CEFBS_None, // EFDCFUID = 851 |
22649 | 1.34M | CEFBS_None, // EFDCMPEQ = 852 |
22650 | 1.34M | CEFBS_None, // EFDCMPGT = 853 |
22651 | 1.34M | CEFBS_None, // EFDCMPLT = 854 |
22652 | 1.34M | CEFBS_None, // EFDCTSF = 855 |
22653 | 1.34M | CEFBS_None, // EFDCTSI = 856 |
22654 | 1.34M | CEFBS_None, // EFDCTSIDZ = 857 |
22655 | 1.34M | CEFBS_None, // EFDCTSIZ = 858 |
22656 | 1.34M | CEFBS_None, // EFDCTUF = 859 |
22657 | 1.34M | CEFBS_None, // EFDCTUI = 860 |
22658 | 1.34M | CEFBS_None, // EFDCTUIDZ = 861 |
22659 | 1.34M | CEFBS_None, // EFDCTUIZ = 862 |
22660 | 1.34M | CEFBS_None, // EFDDIV = 863 |
22661 | 1.34M | CEFBS_None, // EFDMUL = 864 |
22662 | 1.34M | CEFBS_None, // EFDNABS = 865 |
22663 | 1.34M | CEFBS_None, // EFDNEG = 866 |
22664 | 1.34M | CEFBS_None, // EFDSUB = 867 |
22665 | 1.34M | CEFBS_None, // EFDTSTEQ = 868 |
22666 | 1.34M | CEFBS_None, // EFDTSTGT = 869 |
22667 | 1.34M | CEFBS_None, // EFDTSTLT = 870 |
22668 | 1.34M | CEFBS_None, // EFSABS = 871 |
22669 | 1.34M | CEFBS_None, // EFSADD = 872 |
22670 | 1.34M | CEFBS_None, // EFSCFD = 873 |
22671 | 1.34M | CEFBS_None, // EFSCFSF = 874 |
22672 | 1.34M | CEFBS_None, // EFSCFSI = 875 |
22673 | 1.34M | CEFBS_None, // EFSCFUF = 876 |
22674 | 1.34M | CEFBS_None, // EFSCFUI = 877 |
22675 | 1.34M | CEFBS_None, // EFSCMPEQ = 878 |
22676 | 1.34M | CEFBS_None, // EFSCMPGT = 879 |
22677 | 1.34M | CEFBS_None, // EFSCMPLT = 880 |
22678 | 1.34M | CEFBS_None, // EFSCTSF = 881 |
22679 | 1.34M | CEFBS_None, // EFSCTSI = 882 |
22680 | 1.34M | CEFBS_None, // EFSCTSIZ = 883 |
22681 | 1.34M | CEFBS_None, // EFSCTUF = 884 |
22682 | 1.34M | CEFBS_None, // EFSCTUI = 885 |
22683 | 1.34M | CEFBS_None, // EFSCTUIZ = 886 |
22684 | 1.34M | CEFBS_None, // EFSDIV = 887 |
22685 | 1.34M | CEFBS_None, // EFSMUL = 888 |
22686 | 1.34M | CEFBS_None, // EFSNABS = 889 |
22687 | 1.34M | CEFBS_None, // EFSNEG = 890 |
22688 | 1.34M | CEFBS_None, // EFSSUB = 891 |
22689 | 1.34M | CEFBS_None, // EFSTSTEQ = 892 |
22690 | 1.34M | CEFBS_None, // EFSTSTGT = 893 |
22691 | 1.34M | CEFBS_None, // EFSTSTLT = 894 |
22692 | 1.34M | CEFBS_None, // EH_SjLj_LongJmp32 = 895 |
22693 | 1.34M | CEFBS_None, // EH_SjLj_LongJmp64 = 896 |
22694 | 1.34M | CEFBS_None, // EH_SjLj_SetJmp32 = 897 |
22695 | 1.34M | CEFBS_None, // EH_SjLj_SetJmp64 = 898 |
22696 | 1.34M | CEFBS_None, // EH_SjLj_Setup = 899 |
22697 | 1.34M | CEFBS_None, // EQV = 900 |
22698 | 1.34M | CEFBS_None, // EQV8 = 901 |
22699 | 1.34M | CEFBS_None, // EQV8_rec = 902 |
22700 | 1.34M | CEFBS_None, // EQV_rec = 903 |
22701 | 1.34M | CEFBS_None, // EVABS = 904 |
22702 | 1.34M | CEFBS_None, // EVADDIW = 905 |
22703 | 1.34M | CEFBS_None, // EVADDSMIAAW = 906 |
22704 | 1.34M | CEFBS_None, // EVADDSSIAAW = 907 |
22705 | 1.34M | CEFBS_None, // EVADDUMIAAW = 908 |
22706 | 1.34M | CEFBS_None, // EVADDUSIAAW = 909 |
22707 | 1.34M | CEFBS_None, // EVADDW = 910 |
22708 | 1.34M | CEFBS_None, // EVAND = 911 |
22709 | 1.34M | CEFBS_None, // EVANDC = 912 |
22710 | 1.34M | CEFBS_None, // EVCMPEQ = 913 |
22711 | 1.34M | CEFBS_None, // EVCMPGTS = 914 |
22712 | 1.34M | CEFBS_None, // EVCMPGTU = 915 |
22713 | 1.34M | CEFBS_None, // EVCMPLTS = 916 |
22714 | 1.34M | CEFBS_None, // EVCMPLTU = 917 |
22715 | 1.34M | CEFBS_None, // EVCNTLSW = 918 |
22716 | 1.34M | CEFBS_None, // EVCNTLZW = 919 |
22717 | 1.34M | CEFBS_None, // EVDIVWS = 920 |
22718 | 1.34M | CEFBS_None, // EVDIVWU = 921 |
22719 | 1.34M | CEFBS_None, // EVEQV = 922 |
22720 | 1.34M | CEFBS_None, // EVEXTSB = 923 |
22721 | 1.34M | CEFBS_None, // EVEXTSH = 924 |
22722 | 1.34M | CEFBS_None, // EVFSABS = 925 |
22723 | 1.34M | CEFBS_None, // EVFSADD = 926 |
22724 | 1.34M | CEFBS_None, // EVFSCFSF = 927 |
22725 | 1.34M | CEFBS_None, // EVFSCFSI = 928 |
22726 | 1.34M | CEFBS_None, // EVFSCFUF = 929 |
22727 | 1.34M | CEFBS_None, // EVFSCFUI = 930 |
22728 | 1.34M | CEFBS_None, // EVFSCMPEQ = 931 |
22729 | 1.34M | CEFBS_None, // EVFSCMPGT = 932 |
22730 | 1.34M | CEFBS_None, // EVFSCMPLT = 933 |
22731 | 1.34M | CEFBS_None, // EVFSCTSF = 934 |
22732 | 1.34M | CEFBS_None, // EVFSCTSI = 935 |
22733 | 1.34M | CEFBS_None, // EVFSCTSIZ = 936 |
22734 | 1.34M | CEFBS_None, // EVFSCTUF = 937 |
22735 | 1.34M | CEFBS_None, // EVFSCTUI = 938 |
22736 | 1.34M | CEFBS_None, // EVFSCTUIZ = 939 |
22737 | 1.34M | CEFBS_None, // EVFSDIV = 940 |
22738 | 1.34M | CEFBS_None, // EVFSMUL = 941 |
22739 | 1.34M | CEFBS_None, // EVFSNABS = 942 |
22740 | 1.34M | CEFBS_None, // EVFSNEG = 943 |
22741 | 1.34M | CEFBS_None, // EVFSSUB = 944 |
22742 | 1.34M | CEFBS_None, // EVFSTSTEQ = 945 |
22743 | 1.34M | CEFBS_None, // EVFSTSTGT = 946 |
22744 | 1.34M | CEFBS_None, // EVFSTSTLT = 947 |
22745 | 1.34M | CEFBS_None, // EVLDD = 948 |
22746 | 1.34M | CEFBS_None, // EVLDDX = 949 |
22747 | 1.34M | CEFBS_None, // EVLDH = 950 |
22748 | 1.34M | CEFBS_None, // EVLDHX = 951 |
22749 | 1.34M | CEFBS_None, // EVLDW = 952 |
22750 | 1.34M | CEFBS_None, // EVLDWX = 953 |
22751 | 1.34M | CEFBS_None, // EVLHHESPLAT = 954 |
22752 | 1.34M | CEFBS_None, // EVLHHESPLATX = 955 |
22753 | 1.34M | CEFBS_None, // EVLHHOSSPLAT = 956 |
22754 | 1.34M | CEFBS_None, // EVLHHOSSPLATX = 957 |
22755 | 1.34M | CEFBS_None, // EVLHHOUSPLAT = 958 |
22756 | 1.34M | CEFBS_None, // EVLHHOUSPLATX = 959 |
22757 | 1.34M | CEFBS_None, // EVLWHE = 960 |
22758 | 1.34M | CEFBS_None, // EVLWHEX = 961 |
22759 | 1.34M | CEFBS_None, // EVLWHOS = 962 |
22760 | 1.34M | CEFBS_None, // EVLWHOSX = 963 |
22761 | 1.34M | CEFBS_None, // EVLWHOU = 964 |
22762 | 1.34M | CEFBS_None, // EVLWHOUX = 965 |
22763 | 1.34M | CEFBS_None, // EVLWHSPLAT = 966 |
22764 | 1.34M | CEFBS_None, // EVLWHSPLATX = 967 |
22765 | 1.34M | CEFBS_None, // EVLWWSPLAT = 968 |
22766 | 1.34M | CEFBS_None, // EVLWWSPLATX = 969 |
22767 | 1.34M | CEFBS_None, // EVMERGEHI = 970 |
22768 | 1.34M | CEFBS_None, // EVMERGEHILO = 971 |
22769 | 1.34M | CEFBS_None, // EVMERGELO = 972 |
22770 | 1.34M | CEFBS_None, // EVMERGELOHI = 973 |
22771 | 1.34M | CEFBS_None, // EVMHEGSMFAA = 974 |
22772 | 1.34M | CEFBS_None, // EVMHEGSMFAN = 975 |
22773 | 1.34M | CEFBS_None, // EVMHEGSMIAA = 976 |
22774 | 1.34M | CEFBS_None, // EVMHEGSMIAN = 977 |
22775 | 1.34M | CEFBS_None, // EVMHEGUMIAA = 978 |
22776 | 1.34M | CEFBS_None, // EVMHEGUMIAN = 979 |
22777 | 1.34M | CEFBS_None, // EVMHESMF = 980 |
22778 | 1.34M | CEFBS_None, // EVMHESMFA = 981 |
22779 | 1.34M | CEFBS_None, // EVMHESMFAAW = 982 |
22780 | 1.34M | CEFBS_None, // EVMHESMFANW = 983 |
22781 | 1.34M | CEFBS_None, // EVMHESMI = 984 |
22782 | 1.34M | CEFBS_None, // EVMHESMIA = 985 |
22783 | 1.34M | CEFBS_None, // EVMHESMIAAW = 986 |
22784 | 1.34M | CEFBS_None, // EVMHESMIANW = 987 |
22785 | 1.34M | CEFBS_None, // EVMHESSF = 988 |
22786 | 1.34M | CEFBS_None, // EVMHESSFA = 989 |
22787 | 1.34M | CEFBS_None, // EVMHESSFAAW = 990 |
22788 | 1.34M | CEFBS_None, // EVMHESSFANW = 991 |
22789 | 1.34M | CEFBS_None, // EVMHESSIAAW = 992 |
22790 | 1.34M | CEFBS_None, // EVMHESSIANW = 993 |
22791 | 1.34M | CEFBS_None, // EVMHEUMI = 994 |
22792 | 1.34M | CEFBS_None, // EVMHEUMIA = 995 |
22793 | 1.34M | CEFBS_None, // EVMHEUMIAAW = 996 |
22794 | 1.34M | CEFBS_None, // EVMHEUMIANW = 997 |
22795 | 1.34M | CEFBS_None, // EVMHEUSIAAW = 998 |
22796 | 1.34M | CEFBS_None, // EVMHEUSIANW = 999 |
22797 | 1.34M | CEFBS_None, // EVMHOGSMFAA = 1000 |
22798 | 1.34M | CEFBS_None, // EVMHOGSMFAN = 1001 |
22799 | 1.34M | CEFBS_None, // EVMHOGSMIAA = 1002 |
22800 | 1.34M | CEFBS_None, // EVMHOGSMIAN = 1003 |
22801 | 1.34M | CEFBS_None, // EVMHOGUMIAA = 1004 |
22802 | 1.34M | CEFBS_None, // EVMHOGUMIAN = 1005 |
22803 | 1.34M | CEFBS_None, // EVMHOSMF = 1006 |
22804 | 1.34M | CEFBS_None, // EVMHOSMFA = 1007 |
22805 | 1.34M | CEFBS_None, // EVMHOSMFAAW = 1008 |
22806 | 1.34M | CEFBS_None, // EVMHOSMFANW = 1009 |
22807 | 1.34M | CEFBS_None, // EVMHOSMI = 1010 |
22808 | 1.34M | CEFBS_None, // EVMHOSMIA = 1011 |
22809 | 1.34M | CEFBS_None, // EVMHOSMIAAW = 1012 |
22810 | 1.34M | CEFBS_None, // EVMHOSMIANW = 1013 |
22811 | 1.34M | CEFBS_None, // EVMHOSSF = 1014 |
22812 | 1.34M | CEFBS_None, // EVMHOSSFA = 1015 |
22813 | 1.34M | CEFBS_None, // EVMHOSSFAAW = 1016 |
22814 | 1.34M | CEFBS_None, // EVMHOSSFANW = 1017 |
22815 | 1.34M | CEFBS_None, // EVMHOSSIAAW = 1018 |
22816 | 1.34M | CEFBS_None, // EVMHOSSIANW = 1019 |
22817 | 1.34M | CEFBS_None, // EVMHOUMI = 1020 |
22818 | 1.34M | CEFBS_None, // EVMHOUMIA = 1021 |
22819 | 1.34M | CEFBS_None, // EVMHOUMIAAW = 1022 |
22820 | 1.34M | CEFBS_None, // EVMHOUMIANW = 1023 |
22821 | 1.34M | CEFBS_None, // EVMHOUSIAAW = 1024 |
22822 | 1.34M | CEFBS_None, // EVMHOUSIANW = 1025 |
22823 | 1.34M | CEFBS_None, // EVMRA = 1026 |
22824 | 1.34M | CEFBS_None, // EVMWHSMF = 1027 |
22825 | 1.34M | CEFBS_None, // EVMWHSMFA = 1028 |
22826 | 1.34M | CEFBS_None, // EVMWHSMI = 1029 |
22827 | 1.34M | CEFBS_None, // EVMWHSMIA = 1030 |
22828 | 1.34M | CEFBS_None, // EVMWHSSF = 1031 |
22829 | 1.34M | CEFBS_None, // EVMWHSSFA = 1032 |
22830 | 1.34M | CEFBS_None, // EVMWHUMI = 1033 |
22831 | 1.34M | CEFBS_None, // EVMWHUMIA = 1034 |
22832 | 1.34M | CEFBS_None, // EVMWLSMIAAW = 1035 |
22833 | 1.34M | CEFBS_None, // EVMWLSMIANW = 1036 |
22834 | 1.34M | CEFBS_None, // EVMWLSSIAAW = 1037 |
22835 | 1.34M | CEFBS_None, // EVMWLSSIANW = 1038 |
22836 | 1.34M | CEFBS_None, // EVMWLUMI = 1039 |
22837 | 1.34M | CEFBS_None, // EVMWLUMIA = 1040 |
22838 | 1.34M | CEFBS_None, // EVMWLUMIAAW = 1041 |
22839 | 1.34M | CEFBS_None, // EVMWLUMIANW = 1042 |
22840 | 1.34M | CEFBS_None, // EVMWLUSIAAW = 1043 |
22841 | 1.34M | CEFBS_None, // EVMWLUSIANW = 1044 |
22842 | 1.34M | CEFBS_None, // EVMWSMF = 1045 |
22843 | 1.34M | CEFBS_None, // EVMWSMFA = 1046 |
22844 | 1.34M | CEFBS_None, // EVMWSMFAA = 1047 |
22845 | 1.34M | CEFBS_None, // EVMWSMFAN = 1048 |
22846 | 1.34M | CEFBS_None, // EVMWSMI = 1049 |
22847 | 1.34M | CEFBS_None, // EVMWSMIA = 1050 |
22848 | 1.34M | CEFBS_None, // EVMWSMIAA = 1051 |
22849 | 1.34M | CEFBS_None, // EVMWSMIAN = 1052 |
22850 | 1.34M | CEFBS_None, // EVMWSSF = 1053 |
22851 | 1.34M | CEFBS_None, // EVMWSSFA = 1054 |
22852 | 1.34M | CEFBS_None, // EVMWSSFAA = 1055 |
22853 | 1.34M | CEFBS_None, // EVMWSSFAN = 1056 |
22854 | 1.34M | CEFBS_None, // EVMWUMI = 1057 |
22855 | 1.34M | CEFBS_None, // EVMWUMIA = 1058 |
22856 | 1.34M | CEFBS_None, // EVMWUMIAA = 1059 |
22857 | 1.34M | CEFBS_None, // EVMWUMIAN = 1060 |
22858 | 1.34M | CEFBS_None, // EVNAND = 1061 |
22859 | 1.34M | CEFBS_None, // EVNEG = 1062 |
22860 | 1.34M | CEFBS_None, // EVNOR = 1063 |
22861 | 1.34M | CEFBS_None, // EVOR = 1064 |
22862 | 1.34M | CEFBS_None, // EVORC = 1065 |
22863 | 1.34M | CEFBS_None, // EVRLW = 1066 |
22864 | 1.34M | CEFBS_None, // EVRLWI = 1067 |
22865 | 1.34M | CEFBS_None, // EVRNDW = 1068 |
22866 | 1.34M | CEFBS_None, // EVSEL = 1069 |
22867 | 1.34M | CEFBS_None, // EVSLW = 1070 |
22868 | 1.34M | CEFBS_None, // EVSLWI = 1071 |
22869 | 1.34M | CEFBS_None, // EVSPLATFI = 1072 |
22870 | 1.34M | CEFBS_None, // EVSPLATI = 1073 |
22871 | 1.34M | CEFBS_None, // EVSRWIS = 1074 |
22872 | 1.34M | CEFBS_None, // EVSRWIU = 1075 |
22873 | 1.34M | CEFBS_None, // EVSRWS = 1076 |
22874 | 1.34M | CEFBS_None, // EVSRWU = 1077 |
22875 | 1.34M | CEFBS_None, // EVSTDD = 1078 |
22876 | 1.34M | CEFBS_None, // EVSTDDX = 1079 |
22877 | 1.34M | CEFBS_None, // EVSTDH = 1080 |
22878 | 1.34M | CEFBS_None, // EVSTDHX = 1081 |
22879 | 1.34M | CEFBS_None, // EVSTDW = 1082 |
22880 | 1.34M | CEFBS_None, // EVSTDWX = 1083 |
22881 | 1.34M | CEFBS_None, // EVSTWHE = 1084 |
22882 | 1.34M | CEFBS_None, // EVSTWHEX = 1085 |
22883 | 1.34M | CEFBS_None, // EVSTWHO = 1086 |
22884 | 1.34M | CEFBS_None, // EVSTWHOX = 1087 |
22885 | 1.34M | CEFBS_None, // EVSTWWE = 1088 |
22886 | 1.34M | CEFBS_None, // EVSTWWEX = 1089 |
22887 | 1.34M | CEFBS_None, // EVSTWWO = 1090 |
22888 | 1.34M | CEFBS_None, // EVSTWWOX = 1091 |
22889 | 1.34M | CEFBS_None, // EVSUBFSMIAAW = 1092 |
22890 | 1.34M | CEFBS_None, // EVSUBFSSIAAW = 1093 |
22891 | 1.34M | CEFBS_None, // EVSUBFUMIAAW = 1094 |
22892 | 1.34M | CEFBS_None, // EVSUBFUSIAAW = 1095 |
22893 | 1.34M | CEFBS_None, // EVSUBFW = 1096 |
22894 | 1.34M | CEFBS_None, // EVSUBIFW = 1097 |
22895 | 1.34M | CEFBS_None, // EVXOR = 1098 |
22896 | 1.34M | CEFBS_None, // EXTSB = 1099 |
22897 | 1.34M | CEFBS_None, // EXTSB8 = 1100 |
22898 | 1.34M | CEFBS_None, // EXTSB8_32_64 = 1101 |
22899 | 1.34M | CEFBS_None, // EXTSB8_rec = 1102 |
22900 | 1.34M | CEFBS_None, // EXTSB_rec = 1103 |
22901 | 1.34M | CEFBS_None, // EXTSH = 1104 |
22902 | 1.34M | CEFBS_None, // EXTSH8 = 1105 |
22903 | 1.34M | CEFBS_None, // EXTSH8_32_64 = 1106 |
22904 | 1.34M | CEFBS_None, // EXTSH8_rec = 1107 |
22905 | 1.34M | CEFBS_None, // EXTSH_rec = 1108 |
22906 | 1.34M | CEFBS_None, // EXTSW = 1109 |
22907 | 1.34M | CEFBS_None, // EXTSWSLI = 1110 |
22908 | 1.34M | CEFBS_None, // EXTSWSLI_32_64 = 1111 |
22909 | 1.34M | CEFBS_None, // EXTSWSLI_32_64_rec = 1112 |
22910 | 1.34M | CEFBS_None, // EXTSWSLI_rec = 1113 |
22911 | 1.34M | CEFBS_None, // EXTSW_32 = 1114 |
22912 | 1.34M | CEFBS_None, // EXTSW_32_64 = 1115 |
22913 | 1.34M | CEFBS_None, // EXTSW_32_64_rec = 1116 |
22914 | 1.34M | CEFBS_None, // EXTSW_rec = 1117 |
22915 | 1.34M | CEFBS_None, // EnforceIEIO = 1118 |
22916 | 1.34M | CEFBS_None, // FABSD = 1119 |
22917 | 1.34M | CEFBS_None, // FABSD_rec = 1120 |
22918 | 1.34M | CEFBS_None, // FABSS = 1121 |
22919 | 1.34M | CEFBS_None, // FABSS_rec = 1122 |
22920 | 1.34M | CEFBS_None, // FADD = 1123 |
22921 | 1.34M | CEFBS_None, // FADDS = 1124 |
22922 | 1.34M | CEFBS_None, // FADDS_rec = 1125 |
22923 | 1.34M | CEFBS_None, // FADD_rec = 1126 |
22924 | 1.34M | CEFBS_None, // FADDrtz = 1127 |
22925 | 1.34M | CEFBS_None, // FCFID = 1128 |
22926 | 1.34M | CEFBS_None, // FCFIDS = 1129 |
22927 | 1.34M | CEFBS_None, // FCFIDS_rec = 1130 |
22928 | 1.34M | CEFBS_None, // FCFIDU = 1131 |
22929 | 1.34M | CEFBS_None, // FCFIDUS = 1132 |
22930 | 1.34M | CEFBS_None, // FCFIDUS_rec = 1133 |
22931 | 1.34M | CEFBS_None, // FCFIDU_rec = 1134 |
22932 | 1.34M | CEFBS_None, // FCFID_rec = 1135 |
22933 | 1.34M | CEFBS_None, // FCMPOD = 1136 |
22934 | 1.34M | CEFBS_None, // FCMPOS = 1137 |
22935 | 1.34M | CEFBS_None, // FCMPUD = 1138 |
22936 | 1.34M | CEFBS_None, // FCMPUS = 1139 |
22937 | 1.34M | CEFBS_None, // FCPSGND = 1140 |
22938 | 1.34M | CEFBS_None, // FCPSGND_rec = 1141 |
22939 | 1.34M | CEFBS_None, // FCPSGNS = 1142 |
22940 | 1.34M | CEFBS_None, // FCPSGNS_rec = 1143 |
22941 | 1.34M | CEFBS_None, // FCTID = 1144 |
22942 | 1.34M | CEFBS_None, // FCTIDU = 1145 |
22943 | 1.34M | CEFBS_None, // FCTIDUZ = 1146 |
22944 | 1.34M | CEFBS_None, // FCTIDUZ_rec = 1147 |
22945 | 1.34M | CEFBS_None, // FCTIDU_rec = 1148 |
22946 | 1.34M | CEFBS_None, // FCTIDZ = 1149 |
22947 | 1.34M | CEFBS_None, // FCTIDZ_rec = 1150 |
22948 | 1.34M | CEFBS_None, // FCTID_rec = 1151 |
22949 | 1.34M | CEFBS_None, // FCTIW = 1152 |
22950 | 1.34M | CEFBS_None, // FCTIWU = 1153 |
22951 | 1.34M | CEFBS_None, // FCTIWUZ = 1154 |
22952 | 1.34M | CEFBS_None, // FCTIWUZ_rec = 1155 |
22953 | 1.34M | CEFBS_None, // FCTIWU_rec = 1156 |
22954 | 1.34M | CEFBS_None, // FCTIWZ = 1157 |
22955 | 1.34M | CEFBS_None, // FCTIWZ_rec = 1158 |
22956 | 1.34M | CEFBS_None, // FCTIW_rec = 1159 |
22957 | 1.34M | CEFBS_None, // FDIV = 1160 |
22958 | 1.34M | CEFBS_None, // FDIVS = 1161 |
22959 | 1.34M | CEFBS_None, // FDIVS_rec = 1162 |
22960 | 1.34M | CEFBS_None, // FDIV_rec = 1163 |
22961 | 1.34M | CEFBS_None, // FENCE = 1164 |
22962 | 1.34M | CEFBS_None, // FMADD = 1165 |
22963 | 1.34M | CEFBS_None, // FMADDS = 1166 |
22964 | 1.34M | CEFBS_None, // FMADDS_rec = 1167 |
22965 | 1.34M | CEFBS_None, // FMADD_rec = 1168 |
22966 | 1.34M | CEFBS_None, // FMR = 1169 |
22967 | 1.34M | CEFBS_None, // FMR_rec = 1170 |
22968 | 1.34M | CEFBS_None, // FMSUB = 1171 |
22969 | 1.34M | CEFBS_None, // FMSUBS = 1172 |
22970 | 1.34M | CEFBS_None, // FMSUBS_rec = 1173 |
22971 | 1.34M | CEFBS_None, // FMSUB_rec = 1174 |
22972 | 1.34M | CEFBS_None, // FMUL = 1175 |
22973 | 1.34M | CEFBS_None, // FMULS = 1176 |
22974 | 1.34M | CEFBS_None, // FMULS_rec = 1177 |
22975 | 1.34M | CEFBS_None, // FMUL_rec = 1178 |
22976 | 1.34M | CEFBS_None, // FNABSD = 1179 |
22977 | 1.34M | CEFBS_None, // FNABSD_rec = 1180 |
22978 | 1.34M | CEFBS_None, // FNABSS = 1181 |
22979 | 1.34M | CEFBS_None, // FNABSS_rec = 1182 |
22980 | 1.34M | CEFBS_None, // FNEGD = 1183 |
22981 | 1.34M | CEFBS_None, // FNEGD_rec = 1184 |
22982 | 1.34M | CEFBS_None, // FNEGS = 1185 |
22983 | 1.34M | CEFBS_None, // FNEGS_rec = 1186 |
22984 | 1.34M | CEFBS_None, // FNMADD = 1187 |
22985 | 1.34M | CEFBS_None, // FNMADDS = 1188 |
22986 | 1.34M | CEFBS_None, // FNMADDS_rec = 1189 |
22987 | 1.34M | CEFBS_None, // FNMADD_rec = 1190 |
22988 | 1.34M | CEFBS_None, // FNMSUB = 1191 |
22989 | 1.34M | CEFBS_None, // FNMSUBS = 1192 |
22990 | 1.34M | CEFBS_None, // FNMSUBS_rec = 1193 |
22991 | 1.34M | CEFBS_None, // FNMSUB_rec = 1194 |
22992 | 1.34M | CEFBS_None, // FRE = 1195 |
22993 | 1.34M | CEFBS_None, // FRES = 1196 |
22994 | 1.34M | CEFBS_None, // FRES_rec = 1197 |
22995 | 1.34M | CEFBS_None, // FRE_rec = 1198 |
22996 | 1.34M | CEFBS_None, // FRIMD = 1199 |
22997 | 1.34M | CEFBS_None, // FRIMD_rec = 1200 |
22998 | 1.34M | CEFBS_None, // FRIMS = 1201 |
22999 | 1.34M | CEFBS_None, // FRIMS_rec = 1202 |
23000 | 1.34M | CEFBS_None, // FRIND = 1203 |
23001 | 1.34M | CEFBS_None, // FRIND_rec = 1204 |
23002 | 1.34M | CEFBS_None, // FRINS = 1205 |
23003 | 1.34M | CEFBS_None, // FRINS_rec = 1206 |
23004 | 1.34M | CEFBS_None, // FRIPD = 1207 |
23005 | 1.34M | CEFBS_None, // FRIPD_rec = 1208 |
23006 | 1.34M | CEFBS_None, // FRIPS = 1209 |
23007 | 1.34M | CEFBS_None, // FRIPS_rec = 1210 |
23008 | 1.34M | CEFBS_None, // FRIZD = 1211 |
23009 | 1.34M | CEFBS_None, // FRIZD_rec = 1212 |
23010 | 1.34M | CEFBS_None, // FRIZS = 1213 |
23011 | 1.34M | CEFBS_None, // FRIZS_rec = 1214 |
23012 | 1.34M | CEFBS_None, // FRSP = 1215 |
23013 | 1.34M | CEFBS_None, // FRSP_rec = 1216 |
23014 | 1.34M | CEFBS_None, // FRSQRTE = 1217 |
23015 | 1.34M | CEFBS_None, // FRSQRTES = 1218 |
23016 | 1.34M | CEFBS_None, // FRSQRTES_rec = 1219 |
23017 | 1.34M | CEFBS_None, // FRSQRTE_rec = 1220 |
23018 | 1.34M | CEFBS_None, // FSELD = 1221 |
23019 | 1.34M | CEFBS_None, // FSELD_rec = 1222 |
23020 | 1.34M | CEFBS_None, // FSELS = 1223 |
23021 | 1.34M | CEFBS_None, // FSELS_rec = 1224 |
23022 | 1.34M | CEFBS_None, // FSQRT = 1225 |
23023 | 1.34M | CEFBS_None, // FSQRTS = 1226 |
23024 | 1.34M | CEFBS_None, // FSQRTS_rec = 1227 |
23025 | 1.34M | CEFBS_None, // FSQRT_rec = 1228 |
23026 | 1.34M | CEFBS_None, // FSUB = 1229 |
23027 | 1.34M | CEFBS_None, // FSUBS = 1230 |
23028 | 1.34M | CEFBS_None, // FSUBS_rec = 1231 |
23029 | 1.34M | CEFBS_None, // FSUB_rec = 1232 |
23030 | 1.34M | CEFBS_None, // FTDIV = 1233 |
23031 | 1.34M | CEFBS_None, // FTSQRT = 1234 |
23032 | 1.34M | CEFBS_None, // GETtlsADDR = 1235 |
23033 | 1.34M | CEFBS_None, // GETtlsADDR32 = 1236 |
23034 | 1.34M | CEFBS_None, // GETtlsADDR32AIX = 1237 |
23035 | 1.34M | CEFBS_None, // GETtlsADDR64AIX = 1238 |
23036 | 1.34M | CEFBS_None, // GETtlsADDRPCREL = 1239 |
23037 | 1.34M | CEFBS_None, // GETtlsTpointer32AIX = 1240 |
23038 | 1.34M | CEFBS_None, // GETtlsldADDR = 1241 |
23039 | 1.34M | CEFBS_None, // GETtlsldADDR32 = 1242 |
23040 | 1.34M | CEFBS_None, // GETtlsldADDRPCREL = 1243 |
23041 | 1.34M | CEFBS_None, // HASHCHK = 1244 |
23042 | 1.34M | CEFBS_None, // HASHCHK8 = 1245 |
23043 | 1.34M | CEFBS_None, // HASHCHKP = 1246 |
23044 | 1.34M | CEFBS_None, // HASHCHKP8 = 1247 |
23045 | 1.34M | CEFBS_None, // HASHST = 1248 |
23046 | 1.34M | CEFBS_None, // HASHST8 = 1249 |
23047 | 1.34M | CEFBS_None, // HASHSTP = 1250 |
23048 | 1.34M | CEFBS_None, // HASHSTP8 = 1251 |
23049 | 1.34M | CEFBS_None, // HRFID = 1252 |
23050 | 1.34M | CEFBS_None, // ICBI = 1253 |
23051 | 1.34M | CEFBS_None, // ICBIEP = 1254 |
23052 | 1.34M | CEFBS_None, // ICBLC = 1255 |
23053 | 1.34M | CEFBS_None, // ICBLQ = 1256 |
23054 | 1.34M | CEFBS_None, // ICBT = 1257 |
23055 | 1.34M | CEFBS_None, // ICBTLS = 1258 |
23056 | 1.34M | CEFBS_None, // ICCCI = 1259 |
23057 | 1.34M | CEFBS_None, // ISEL = 1260 |
23058 | 1.34M | CEFBS_None, // ISEL8 = 1261 |
23059 | 1.34M | CEFBS_None, // ISYNC = 1262 |
23060 | 1.34M | CEFBS_None, // LA = 1263 |
23061 | 1.34M | CEFBS_None, // LA8 = 1264 |
23062 | 1.34M | CEFBS_None, // LBARX = 1265 |
23063 | 1.34M | CEFBS_None, // LBARXL = 1266 |
23064 | 1.34M | CEFBS_None, // LBEPX = 1267 |
23065 | 1.34M | CEFBS_None, // LBZ = 1268 |
23066 | 1.34M | CEFBS_None, // LBZ8 = 1269 |
23067 | 1.34M | CEFBS_None, // LBZCIX = 1270 |
23068 | 1.34M | CEFBS_None, // LBZU = 1271 |
23069 | 1.34M | CEFBS_None, // LBZU8 = 1272 |
23070 | 1.34M | CEFBS_None, // LBZUX = 1273 |
23071 | 1.34M | CEFBS_None, // LBZUX8 = 1274 |
23072 | 1.34M | CEFBS_None, // LBZX = 1275 |
23073 | 1.34M | CEFBS_None, // LBZX8 = 1276 |
23074 | 1.34M | CEFBS_None, // LBZXTLS = 1277 |
23075 | 1.34M | CEFBS_None, // LBZXTLS_ = 1278 |
23076 | 1.34M | CEFBS_None, // LBZXTLS_32 = 1279 |
23077 | 1.34M | CEFBS_None, // LD = 1280 |
23078 | 1.34M | CEFBS_None, // LDARX = 1281 |
23079 | 1.34M | CEFBS_None, // LDARXL = 1282 |
23080 | 1.34M | CEFBS_None, // LDAT = 1283 |
23081 | 1.34M | CEFBS_None, // LDBRX = 1284 |
23082 | 1.34M | CEFBS_None, // LDCIX = 1285 |
23083 | 1.34M | CEFBS_None, // LDU = 1286 |
23084 | 1.34M | CEFBS_None, // LDUX = 1287 |
23085 | 1.34M | CEFBS_None, // LDX = 1288 |
23086 | 1.34M | CEFBS_None, // LDXTLS = 1289 |
23087 | 1.34M | CEFBS_None, // LDXTLS_ = 1290 |
23088 | 1.34M | CEFBS_None, // LDgotTprelL = 1291 |
23089 | 1.34M | CEFBS_None, // LDgotTprelL32 = 1292 |
23090 | 1.34M | CEFBS_None, // LDtoc = 1293 |
23091 | 1.34M | CEFBS_None, // LDtocBA = 1294 |
23092 | 1.34M | CEFBS_None, // LDtocCPT = 1295 |
23093 | 1.34M | CEFBS_None, // LDtocJTI = 1296 |
23094 | 1.34M | CEFBS_None, // LDtocL = 1297 |
23095 | 1.34M | CEFBS_None, // LFD = 1298 |
23096 | 1.34M | CEFBS_None, // LFDEPX = 1299 |
23097 | 1.34M | CEFBS_None, // LFDU = 1300 |
23098 | 1.34M | CEFBS_None, // LFDUX = 1301 |
23099 | 1.34M | CEFBS_None, // LFDX = 1302 |
23100 | 1.34M | CEFBS_None, // LFDXTLS = 1303 |
23101 | 1.34M | CEFBS_None, // LFDXTLS_ = 1304 |
23102 | 1.34M | CEFBS_None, // LFIWAX = 1305 |
23103 | 1.34M | CEFBS_None, // LFIWZX = 1306 |
23104 | 1.34M | CEFBS_None, // LFS = 1307 |
23105 | 1.34M | CEFBS_None, // LFSU = 1308 |
23106 | 1.34M | CEFBS_None, // LFSUX = 1309 |
23107 | 1.34M | CEFBS_None, // LFSX = 1310 |
23108 | 1.34M | CEFBS_None, // LFSXTLS = 1311 |
23109 | 1.34M | CEFBS_None, // LFSXTLS_ = 1312 |
23110 | 1.34M | CEFBS_None, // LHA = 1313 |
23111 | 1.34M | CEFBS_None, // LHA8 = 1314 |
23112 | 1.34M | CEFBS_None, // LHARX = 1315 |
23113 | 1.34M | CEFBS_None, // LHARXL = 1316 |
23114 | 1.34M | CEFBS_None, // LHAU = 1317 |
23115 | 1.34M | CEFBS_None, // LHAU8 = 1318 |
23116 | 1.34M | CEFBS_None, // LHAUX = 1319 |
23117 | 1.34M | CEFBS_None, // LHAUX8 = 1320 |
23118 | 1.34M | CEFBS_None, // LHAX = 1321 |
23119 | 1.34M | CEFBS_None, // LHAX8 = 1322 |
23120 | 1.34M | CEFBS_None, // LHAXTLS = 1323 |
23121 | 1.34M | CEFBS_None, // LHAXTLS_ = 1324 |
23122 | 1.34M | CEFBS_None, // LHAXTLS_32 = 1325 |
23123 | 1.34M | CEFBS_None, // LHBRX = 1326 |
23124 | 1.34M | CEFBS_None, // LHBRX8 = 1327 |
23125 | 1.34M | CEFBS_None, // LHEPX = 1328 |
23126 | 1.34M | CEFBS_None, // LHZ = 1329 |
23127 | 1.34M | CEFBS_None, // LHZ8 = 1330 |
23128 | 1.34M | CEFBS_None, // LHZCIX = 1331 |
23129 | 1.34M | CEFBS_None, // LHZU = 1332 |
23130 | 1.34M | CEFBS_None, // LHZU8 = 1333 |
23131 | 1.34M | CEFBS_None, // LHZUX = 1334 |
23132 | 1.34M | CEFBS_None, // LHZUX8 = 1335 |
23133 | 1.34M | CEFBS_None, // LHZX = 1336 |
23134 | 1.34M | CEFBS_None, // LHZX8 = 1337 |
23135 | 1.34M | CEFBS_None, // LHZXTLS = 1338 |
23136 | 1.34M | CEFBS_None, // LHZXTLS_ = 1339 |
23137 | 1.34M | CEFBS_None, // LHZXTLS_32 = 1340 |
23138 | 1.34M | CEFBS_None, // LI = 1341 |
23139 | 1.34M | CEFBS_None, // LI8 = 1342 |
23140 | 1.34M | CEFBS_None, // LIS = 1343 |
23141 | 1.34M | CEFBS_None, // LIS8 = 1344 |
23142 | 1.34M | CEFBS_None, // LMW = 1345 |
23143 | 1.34M | CEFBS_None, // LQ = 1346 |
23144 | 1.34M | CEFBS_None, // LQARX = 1347 |
23145 | 1.34M | CEFBS_None, // LQARXL = 1348 |
23146 | 1.34M | CEFBS_None, // LQX_PSEUDO = 1349 |
23147 | 1.34M | CEFBS_None, // LSWI = 1350 |
23148 | 1.34M | CEFBS_None, // LVEBX = 1351 |
23149 | 1.34M | CEFBS_None, // LVEHX = 1352 |
23150 | 1.34M | CEFBS_None, // LVEWX = 1353 |
23151 | 1.34M | CEFBS_None, // LVSL = 1354 |
23152 | 1.34M | CEFBS_None, // LVSR = 1355 |
23153 | 1.34M | CEFBS_None, // LVX = 1356 |
23154 | 1.34M | CEFBS_None, // LVXL = 1357 |
23155 | 1.34M | CEFBS_None, // LWA = 1358 |
23156 | 1.34M | CEFBS_None, // LWARX = 1359 |
23157 | 1.34M | CEFBS_None, // LWARXL = 1360 |
23158 | 1.34M | CEFBS_None, // LWAT = 1361 |
23159 | 1.34M | CEFBS_None, // LWAUX = 1362 |
23160 | 1.34M | CEFBS_None, // LWAX = 1363 |
23161 | 1.34M | CEFBS_None, // LWAXTLS = 1364 |
23162 | 1.34M | CEFBS_None, // LWAXTLS_ = 1365 |
23163 | 1.34M | CEFBS_None, // LWAXTLS_32 = 1366 |
23164 | 1.34M | CEFBS_None, // LWAX_32 = 1367 |
23165 | 1.34M | CEFBS_None, // LWA_32 = 1368 |
23166 | 1.34M | CEFBS_None, // LWBRX = 1369 |
23167 | 1.34M | CEFBS_None, // LWBRX8 = 1370 |
23168 | 1.34M | CEFBS_None, // LWEPX = 1371 |
23169 | 1.34M | CEFBS_None, // LWZ = 1372 |
23170 | 1.34M | CEFBS_None, // LWZ8 = 1373 |
23171 | 1.34M | CEFBS_None, // LWZCIX = 1374 |
23172 | 1.34M | CEFBS_None, // LWZU = 1375 |
23173 | 1.34M | CEFBS_None, // LWZU8 = 1376 |
23174 | 1.34M | CEFBS_None, // LWZUX = 1377 |
23175 | 1.34M | CEFBS_None, // LWZUX8 = 1378 |
23176 | 1.34M | CEFBS_None, // LWZX = 1379 |
23177 | 1.34M | CEFBS_None, // LWZX8 = 1380 |
23178 | 1.34M | CEFBS_None, // LWZXTLS = 1381 |
23179 | 1.34M | CEFBS_None, // LWZXTLS_ = 1382 |
23180 | 1.34M | CEFBS_None, // LWZXTLS_32 = 1383 |
23181 | 1.34M | CEFBS_None, // LWZtoc = 1384 |
23182 | 1.34M | CEFBS_None, // LWZtocL = 1385 |
23183 | 1.34M | CEFBS_None, // LXSD = 1386 |
23184 | 1.34M | CEFBS_None, // LXSDX = 1387 |
23185 | 1.34M | CEFBS_None, // LXSIBZX = 1388 |
23186 | 1.34M | CEFBS_None, // LXSIHZX = 1389 |
23187 | 1.34M | CEFBS_None, // LXSIWAX = 1390 |
23188 | 1.34M | CEFBS_None, // LXSIWZX = 1391 |
23189 | 1.34M | CEFBS_None, // LXSSP = 1392 |
23190 | 1.34M | CEFBS_None, // LXSSPX = 1393 |
23191 | 1.34M | CEFBS_None, // LXV = 1394 |
23192 | 1.34M | CEFBS_None, // LXVB16X = 1395 |
23193 | 1.34M | CEFBS_None, // LXVD2X = 1396 |
23194 | 1.34M | CEFBS_None, // LXVDSX = 1397 |
23195 | 1.34M | CEFBS_None, // LXVH8X = 1398 |
23196 | 1.34M | CEFBS_None, // LXVKQ = 1399 |
23197 | 1.34M | CEFBS_None, // LXVL = 1400 |
23198 | 1.34M | CEFBS_None, // LXVLL = 1401 |
23199 | 1.34M | CEFBS_None, // LXVP = 1402 |
23200 | 1.34M | CEFBS_None, // LXVPRL = 1403 |
23201 | 1.34M | CEFBS_None, // LXVPRLL = 1404 |
23202 | 1.34M | CEFBS_None, // LXVPX = 1405 |
23203 | 1.34M | CEFBS_None, // LXVRBX = 1406 |
23204 | 1.34M | CEFBS_None, // LXVRDX = 1407 |
23205 | 1.34M | CEFBS_None, // LXVRHX = 1408 |
23206 | 1.34M | CEFBS_None, // LXVRL = 1409 |
23207 | 1.34M | CEFBS_None, // LXVRLL = 1410 |
23208 | 1.34M | CEFBS_None, // LXVRWX = 1411 |
23209 | 1.34M | CEFBS_None, // LXVW4X = 1412 |
23210 | 1.34M | CEFBS_None, // LXVWSX = 1413 |
23211 | 1.34M | CEFBS_None, // LXVX = 1414 |
23212 | 1.34M | CEFBS_None, // MADDHD = 1415 |
23213 | 1.34M | CEFBS_None, // MADDHDU = 1416 |
23214 | 1.34M | CEFBS_None, // MADDLD = 1417 |
23215 | 1.34M | CEFBS_None, // MADDLD8 = 1418 |
23216 | 1.34M | CEFBS_None, // MBAR = 1419 |
23217 | 1.34M | CEFBS_None, // MCRF = 1420 |
23218 | 1.34M | CEFBS_None, // MCRFS = 1421 |
23219 | 1.34M | CEFBS_None, // MCRXRX = 1422 |
23220 | 1.34M | CEFBS_None, // MFBHRBE = 1423 |
23221 | 1.34M | CEFBS_None, // MFCR = 1424 |
23222 | 1.34M | CEFBS_None, // MFCR8 = 1425 |
23223 | 1.34M | CEFBS_None, // MFCTR = 1426 |
23224 | 1.34M | CEFBS_None, // MFCTR8 = 1427 |
23225 | 1.34M | CEFBS_None, // MFDCR = 1428 |
23226 | 1.34M | CEFBS_None, // MFFS = 1429 |
23227 | 1.34M | CEFBS_None, // MFFSCDRN = 1430 |
23228 | 1.34M | CEFBS_None, // MFFSCDRNI = 1431 |
23229 | 1.34M | CEFBS_None, // MFFSCE = 1432 |
23230 | 1.34M | CEFBS_None, // MFFSCRN = 1433 |
23231 | 1.34M | CEFBS_None, // MFFSCRNI = 1434 |
23232 | 1.34M | CEFBS_None, // MFFSL = 1435 |
23233 | 1.34M | CEFBS_None, // MFFS_rec = 1436 |
23234 | 1.34M | CEFBS_None, // MFLR = 1437 |
23235 | 1.34M | CEFBS_None, // MFLR8 = 1438 |
23236 | 1.34M | CEFBS_None, // MFMSR = 1439 |
23237 | 1.34M | CEFBS_None, // MFOCRF = 1440 |
23238 | 1.34M | CEFBS_None, // MFOCRF8 = 1441 |
23239 | 1.34M | CEFBS_None, // MFPMR = 1442 |
23240 | 1.34M | CEFBS_None, // MFSPR = 1443 |
23241 | 1.34M | CEFBS_None, // MFSPR8 = 1444 |
23242 | 1.34M | CEFBS_None, // MFSR = 1445 |
23243 | 1.34M | CEFBS_None, // MFSRIN = 1446 |
23244 | 1.34M | CEFBS_None, // MFTB = 1447 |
23245 | 1.34M | CEFBS_None, // MFTB8 = 1448 |
23246 | 1.34M | CEFBS_None, // MFUDSCR = 1449 |
23247 | 1.34M | CEFBS_None, // MFVRD = 1450 |
23248 | 1.34M | CEFBS_None, // MFVRSAVE = 1451 |
23249 | 1.34M | CEFBS_None, // MFVRSAVEv = 1452 |
23250 | 1.34M | CEFBS_None, // MFVRWZ = 1453 |
23251 | 1.34M | CEFBS_None, // MFVSCR = 1454 |
23252 | 1.34M | CEFBS_None, // MFVSRD = 1455 |
23253 | 1.34M | CEFBS_None, // MFVSRLD = 1456 |
23254 | 1.34M | CEFBS_None, // MFVSRWZ = 1457 |
23255 | 1.34M | CEFBS_None, // MODSD = 1458 |
23256 | 1.34M | CEFBS_None, // MODSW = 1459 |
23257 | 1.34M | CEFBS_None, // MODUD = 1460 |
23258 | 1.34M | CEFBS_None, // MODUW = 1461 |
23259 | 1.34M | CEFBS_None, // MSGSYNC = 1462 |
23260 | 1.34M | CEFBS_None, // MSYNC = 1463 |
23261 | 1.34M | CEFBS_None, // MTCRF = 1464 |
23262 | 1.34M | CEFBS_None, // MTCRF8 = 1465 |
23263 | 1.34M | CEFBS_None, // MTCTR = 1466 |
23264 | 1.34M | CEFBS_None, // MTCTR8 = 1467 |
23265 | 1.34M | CEFBS_None, // MTCTR8loop = 1468 |
23266 | 1.34M | CEFBS_None, // MTCTRloop = 1469 |
23267 | 1.34M | CEFBS_None, // MTDCR = 1470 |
23268 | 1.34M | CEFBS_None, // MTFSB0 = 1471 |
23269 | 1.34M | CEFBS_None, // MTFSB1 = 1472 |
23270 | 1.34M | CEFBS_None, // MTFSF = 1473 |
23271 | 1.34M | CEFBS_None, // MTFSFI = 1474 |
23272 | 1.34M | CEFBS_None, // MTFSFI_rec = 1475 |
23273 | 1.34M | CEFBS_None, // MTFSFIb = 1476 |
23274 | 1.34M | CEFBS_None, // MTFSF_rec = 1477 |
23275 | 1.34M | CEFBS_None, // MTFSFb = 1478 |
23276 | 1.34M | CEFBS_None, // MTLR = 1479 |
23277 | 1.34M | CEFBS_None, // MTLR8 = 1480 |
23278 | 1.34M | CEFBS_None, // MTMSR = 1481 |
23279 | 1.34M | CEFBS_None, // MTMSRD = 1482 |
23280 | 1.34M | CEFBS_None, // MTOCRF = 1483 |
23281 | 1.34M | CEFBS_None, // MTOCRF8 = 1484 |
23282 | 1.34M | CEFBS_None, // MTPMR = 1485 |
23283 | 1.34M | CEFBS_None, // MTSPR = 1486 |
23284 | 1.34M | CEFBS_None, // MTSPR8 = 1487 |
23285 | 1.34M | CEFBS_None, // MTSR = 1488 |
23286 | 1.34M | CEFBS_None, // MTSRIN = 1489 |
23287 | 1.34M | CEFBS_None, // MTUDSCR = 1490 |
23288 | 1.34M | CEFBS_None, // MTVRD = 1491 |
23289 | 1.34M | CEFBS_None, // MTVRSAVE = 1492 |
23290 | 1.34M | CEFBS_None, // MTVRSAVEv = 1493 |
23291 | 1.34M | CEFBS_None, // MTVRWA = 1494 |
23292 | 1.34M | CEFBS_None, // MTVRWZ = 1495 |
23293 | 1.34M | CEFBS_None, // MTVSCR = 1496 |
23294 | 1.34M | CEFBS_None, // MTVSRBM = 1497 |
23295 | 1.34M | CEFBS_None, // MTVSRBMI = 1498 |
23296 | 1.34M | CEFBS_None, // MTVSRD = 1499 |
23297 | 1.34M | CEFBS_None, // MTVSRDD = 1500 |
23298 | 1.34M | CEFBS_None, // MTVSRDM = 1501 |
23299 | 1.34M | CEFBS_None, // MTVSRHM = 1502 |
23300 | 1.34M | CEFBS_None, // MTVSRQM = 1503 |
23301 | 1.34M | CEFBS_None, // MTVSRWA = 1504 |
23302 | 1.34M | CEFBS_None, // MTVSRWM = 1505 |
23303 | 1.34M | CEFBS_None, // MTVSRWS = 1506 |
23304 | 1.34M | CEFBS_None, // MTVSRWZ = 1507 |
23305 | 1.34M | CEFBS_None, // MULHD = 1508 |
23306 | 1.34M | CEFBS_None, // MULHDU = 1509 |
23307 | 1.34M | CEFBS_None, // MULHDU_rec = 1510 |
23308 | 1.34M | CEFBS_None, // MULHD_rec = 1511 |
23309 | 1.34M | CEFBS_None, // MULHW = 1512 |
23310 | 1.34M | CEFBS_None, // MULHWU = 1513 |
23311 | 1.34M | CEFBS_None, // MULHWU_rec = 1514 |
23312 | 1.34M | CEFBS_None, // MULHW_rec = 1515 |
23313 | 1.34M | CEFBS_None, // MULLD = 1516 |
23314 | 1.34M | CEFBS_None, // MULLDO = 1517 |
23315 | 1.34M | CEFBS_None, // MULLDO_rec = 1518 |
23316 | 1.34M | CEFBS_None, // MULLD_rec = 1519 |
23317 | 1.34M | CEFBS_None, // MULLI = 1520 |
23318 | 1.34M | CEFBS_None, // MULLI8 = 1521 |
23319 | 1.34M | CEFBS_None, // MULLW = 1522 |
23320 | 1.34M | CEFBS_None, // MULLWO = 1523 |
23321 | 1.34M | CEFBS_None, // MULLWO_rec = 1524 |
23322 | 1.34M | CEFBS_None, // MULLW_rec = 1525 |
23323 | 1.34M | CEFBS_None, // MoveGOTtoLR = 1526 |
23324 | 1.34M | CEFBS_None, // MovePCtoLR = 1527 |
23325 | 1.34M | CEFBS_None, // MovePCtoLR8 = 1528 |
23326 | 1.34M | CEFBS_None, // NAND = 1529 |
23327 | 1.34M | CEFBS_None, // NAND8 = 1530 |
23328 | 1.34M | CEFBS_None, // NAND8_rec = 1531 |
23329 | 1.34M | CEFBS_None, // NAND_rec = 1532 |
23330 | 1.34M | CEFBS_None, // NAP = 1533 |
23331 | 1.34M | CEFBS_None, // NEG = 1534 |
23332 | 1.34M | CEFBS_None, // NEG8 = 1535 |
23333 | 1.34M | CEFBS_None, // NEG8O = 1536 |
23334 | 1.34M | CEFBS_None, // NEG8O_rec = 1537 |
23335 | 1.34M | CEFBS_None, // NEG8_rec = 1538 |
23336 | 1.34M | CEFBS_None, // NEGO = 1539 |
23337 | 1.34M | CEFBS_None, // NEGO_rec = 1540 |
23338 | 1.34M | CEFBS_None, // NEG_rec = 1541 |
23339 | 1.34M | CEFBS_None, // NOP = 1542 |
23340 | 1.34M | CEFBS_None, // NOP_GT_PWR6 = 1543 |
23341 | 1.34M | CEFBS_None, // NOP_GT_PWR7 = 1544 |
23342 | 1.34M | CEFBS_None, // NOR = 1545 |
23343 | 1.34M | CEFBS_None, // NOR8 = 1546 |
23344 | 1.34M | CEFBS_None, // NOR8_rec = 1547 |
23345 | 1.34M | CEFBS_None, // NOR_rec = 1548 |
23346 | 1.34M | CEFBS_None, // OR = 1549 |
23347 | 1.34M | CEFBS_None, // OR8 = 1550 |
23348 | 1.34M | CEFBS_None, // OR8_rec = 1551 |
23349 | 1.34M | CEFBS_None, // ORC = 1552 |
23350 | 1.34M | CEFBS_None, // ORC8 = 1553 |
23351 | 1.34M | CEFBS_None, // ORC8_rec = 1554 |
23352 | 1.34M | CEFBS_None, // ORC_rec = 1555 |
23353 | 1.34M | CEFBS_None, // ORI = 1556 |
23354 | 1.34M | CEFBS_None, // ORI8 = 1557 |
23355 | 1.34M | CEFBS_None, // ORIS = 1558 |
23356 | 1.34M | CEFBS_None, // ORIS8 = 1559 |
23357 | 1.34M | CEFBS_None, // OR_rec = 1560 |
23358 | 1.34M | CEFBS_None, // PADDI = 1561 |
23359 | 1.34M | CEFBS_None, // PADDI8 = 1562 |
23360 | 1.34M | CEFBS_None, // PADDI8pc = 1563 |
23361 | 1.34M | CEFBS_None, // PADDIdtprel = 1564 |
23362 | 1.34M | CEFBS_None, // PADDIpc = 1565 |
23363 | 1.34M | CEFBS_None, // PDEPD = 1566 |
23364 | 1.34M | CEFBS_None, // PEXTD = 1567 |
23365 | 1.34M | CEFBS_None, // PLA = 1568 |
23366 | 1.34M | CEFBS_None, // PLA8 = 1569 |
23367 | 1.34M | CEFBS_None, // PLA8pc = 1570 |
23368 | 1.34M | CEFBS_None, // PLApc = 1571 |
23369 | 1.34M | CEFBS_None, // PLBZ = 1572 |
23370 | 1.34M | CEFBS_None, // PLBZ8 = 1573 |
23371 | 1.34M | CEFBS_None, // PLBZ8nopc = 1574 |
23372 | 1.34M | CEFBS_None, // PLBZ8onlypc = 1575 |
23373 | 1.34M | CEFBS_None, // PLBZ8pc = 1576 |
23374 | 1.34M | CEFBS_None, // PLBZnopc = 1577 |
23375 | 1.34M | CEFBS_None, // PLBZonlypc = 1578 |
23376 | 1.34M | CEFBS_None, // PLBZpc = 1579 |
23377 | 1.34M | CEFBS_None, // PLD = 1580 |
23378 | 1.34M | CEFBS_None, // PLDnopc = 1581 |
23379 | 1.34M | CEFBS_None, // PLDonlypc = 1582 |
23380 | 1.34M | CEFBS_None, // PLDpc = 1583 |
23381 | 1.34M | CEFBS_None, // PLFD = 1584 |
23382 | 1.34M | CEFBS_None, // PLFDnopc = 1585 |
23383 | 1.34M | CEFBS_None, // PLFDonlypc = 1586 |
23384 | 1.34M | CEFBS_None, // PLFDpc = 1587 |
23385 | 1.34M | CEFBS_None, // PLFS = 1588 |
23386 | 1.34M | CEFBS_None, // PLFSnopc = 1589 |
23387 | 1.34M | CEFBS_None, // PLFSonlypc = 1590 |
23388 | 1.34M | CEFBS_None, // PLFSpc = 1591 |
23389 | 1.34M | CEFBS_None, // PLHA = 1592 |
23390 | 1.34M | CEFBS_None, // PLHA8 = 1593 |
23391 | 1.34M | CEFBS_None, // PLHA8nopc = 1594 |
23392 | 1.34M | CEFBS_None, // PLHA8onlypc = 1595 |
23393 | 1.34M | CEFBS_None, // PLHA8pc = 1596 |
23394 | 1.34M | CEFBS_None, // PLHAnopc = 1597 |
23395 | 1.34M | CEFBS_None, // PLHAonlypc = 1598 |
23396 | 1.34M | CEFBS_None, // PLHApc = 1599 |
23397 | 1.34M | CEFBS_None, // PLHZ = 1600 |
23398 | 1.34M | CEFBS_None, // PLHZ8 = 1601 |
23399 | 1.34M | CEFBS_None, // PLHZ8nopc = 1602 |
23400 | 1.34M | CEFBS_None, // PLHZ8onlypc = 1603 |
23401 | 1.34M | CEFBS_None, // PLHZ8pc = 1604 |
23402 | 1.34M | CEFBS_None, // PLHZnopc = 1605 |
23403 | 1.34M | CEFBS_None, // PLHZonlypc = 1606 |
23404 | 1.34M | CEFBS_None, // PLHZpc = 1607 |
23405 | 1.34M | CEFBS_None, // PLI = 1608 |
23406 | 1.34M | CEFBS_None, // PLI8 = 1609 |
23407 | 1.34M | CEFBS_None, // PLWA = 1610 |
23408 | 1.34M | CEFBS_None, // PLWA8 = 1611 |
23409 | 1.34M | CEFBS_None, // PLWA8nopc = 1612 |
23410 | 1.34M | CEFBS_None, // PLWA8onlypc = 1613 |
23411 | 1.34M | CEFBS_None, // PLWA8pc = 1614 |
23412 | 1.34M | CEFBS_None, // PLWAnopc = 1615 |
23413 | 1.34M | CEFBS_None, // PLWAonlypc = 1616 |
23414 | 1.34M | CEFBS_None, // PLWApc = 1617 |
23415 | 1.34M | CEFBS_None, // PLWZ = 1618 |
23416 | 1.34M | CEFBS_None, // PLWZ8 = 1619 |
23417 | 1.34M | CEFBS_None, // PLWZ8nopc = 1620 |
23418 | 1.34M | CEFBS_None, // PLWZ8onlypc = 1621 |
23419 | 1.34M | CEFBS_None, // PLWZ8pc = 1622 |
23420 | 1.34M | CEFBS_None, // PLWZnopc = 1623 |
23421 | 1.34M | CEFBS_None, // PLWZonlypc = 1624 |
23422 | 1.34M | CEFBS_None, // PLWZpc = 1625 |
23423 | 1.34M | CEFBS_None, // PLXSD = 1626 |
23424 | 1.34M | CEFBS_None, // PLXSDnopc = 1627 |
23425 | 1.34M | CEFBS_None, // PLXSDonlypc = 1628 |
23426 | 1.34M | CEFBS_None, // PLXSDpc = 1629 |
23427 | 1.34M | CEFBS_None, // PLXSSP = 1630 |
23428 | 1.34M | CEFBS_None, // PLXSSPnopc = 1631 |
23429 | 1.34M | CEFBS_None, // PLXSSPonlypc = 1632 |
23430 | 1.34M | CEFBS_None, // PLXSSPpc = 1633 |
23431 | 1.34M | CEFBS_None, // PLXV = 1634 |
23432 | 1.34M | CEFBS_None, // PLXVP = 1635 |
23433 | 1.34M | CEFBS_None, // PLXVPnopc = 1636 |
23434 | 1.34M | CEFBS_None, // PLXVPonlypc = 1637 |
23435 | 1.34M | CEFBS_None, // PLXVPpc = 1638 |
23436 | 1.34M | CEFBS_None, // PLXVnopc = 1639 |
23437 | 1.34M | CEFBS_None, // PLXVonlypc = 1640 |
23438 | 1.34M | CEFBS_None, // PLXVpc = 1641 |
23439 | 1.34M | CEFBS_None, // PMXVBF16GER2 = 1642 |
23440 | 1.34M | CEFBS_None, // PMXVBF16GER2NN = 1643 |
23441 | 1.34M | CEFBS_None, // PMXVBF16GER2NP = 1644 |
23442 | 1.34M | CEFBS_None, // PMXVBF16GER2PN = 1645 |
23443 | 1.34M | CEFBS_None, // PMXVBF16GER2PP = 1646 |
23444 | 1.34M | CEFBS_None, // PMXVBF16GER2W = 1647 |
23445 | 1.34M | CEFBS_None, // PMXVBF16GER2WNN = 1648 |
23446 | 1.34M | CEFBS_None, // PMXVBF16GER2WNP = 1649 |
23447 | 1.34M | CEFBS_None, // PMXVBF16GER2WPN = 1650 |
23448 | 1.34M | CEFBS_None, // PMXVBF16GER2WPP = 1651 |
23449 | 1.34M | CEFBS_None, // PMXVF16GER2 = 1652 |
23450 | 1.34M | CEFBS_None, // PMXVF16GER2NN = 1653 |
23451 | 1.34M | CEFBS_None, // PMXVF16GER2NP = 1654 |
23452 | 1.34M | CEFBS_None, // PMXVF16GER2PN = 1655 |
23453 | 1.34M | CEFBS_None, // PMXVF16GER2PP = 1656 |
23454 | 1.34M | CEFBS_None, // PMXVF16GER2W = 1657 |
23455 | 1.34M | CEFBS_None, // PMXVF16GER2WNN = 1658 |
23456 | 1.34M | CEFBS_None, // PMXVF16GER2WNP = 1659 |
23457 | 1.34M | CEFBS_None, // PMXVF16GER2WPN = 1660 |
23458 | 1.34M | CEFBS_None, // PMXVF16GER2WPP = 1661 |
23459 | 1.34M | CEFBS_None, // PMXVF32GER = 1662 |
23460 | 1.34M | CEFBS_None, // PMXVF32GERNN = 1663 |
23461 | 1.34M | CEFBS_None, // PMXVF32GERNP = 1664 |
23462 | 1.34M | CEFBS_None, // PMXVF32GERPN = 1665 |
23463 | 1.34M | CEFBS_None, // PMXVF32GERPP = 1666 |
23464 | 1.34M | CEFBS_None, // PMXVF32GERW = 1667 |
23465 | 1.34M | CEFBS_None, // PMXVF32GERWNN = 1668 |
23466 | 1.34M | CEFBS_None, // PMXVF32GERWNP = 1669 |
23467 | 1.34M | CEFBS_None, // PMXVF32GERWPN = 1670 |
23468 | 1.34M | CEFBS_None, // PMXVF32GERWPP = 1671 |
23469 | 1.34M | CEFBS_None, // PMXVF64GER = 1672 |
23470 | 1.34M | CEFBS_None, // PMXVF64GERNN = 1673 |
23471 | 1.34M | CEFBS_None, // PMXVF64GERNP = 1674 |
23472 | 1.34M | CEFBS_None, // PMXVF64GERPN = 1675 |
23473 | 1.34M | CEFBS_None, // PMXVF64GERPP = 1676 |
23474 | 1.34M | CEFBS_None, // PMXVF64GERW = 1677 |
23475 | 1.34M | CEFBS_None, // PMXVF64GERWNN = 1678 |
23476 | 1.34M | CEFBS_None, // PMXVF64GERWNP = 1679 |
23477 | 1.34M | CEFBS_None, // PMXVF64GERWPN = 1680 |
23478 | 1.34M | CEFBS_None, // PMXVF64GERWPP = 1681 |
23479 | 1.34M | CEFBS_None, // PMXVI16GER2 = 1682 |
23480 | 1.34M | CEFBS_None, // PMXVI16GER2PP = 1683 |
23481 | 1.34M | CEFBS_None, // PMXVI16GER2S = 1684 |
23482 | 1.34M | CEFBS_None, // PMXVI16GER2SPP = 1685 |
23483 | 1.34M | CEFBS_None, // PMXVI16GER2SW = 1686 |
23484 | 1.34M | CEFBS_None, // PMXVI16GER2SWPP = 1687 |
23485 | 1.34M | CEFBS_None, // PMXVI16GER2W = 1688 |
23486 | 1.34M | CEFBS_None, // PMXVI16GER2WPP = 1689 |
23487 | 1.34M | CEFBS_None, // PMXVI4GER8 = 1690 |
23488 | 1.34M | CEFBS_None, // PMXVI4GER8PP = 1691 |
23489 | 1.34M | CEFBS_None, // PMXVI4GER8W = 1692 |
23490 | 1.34M | CEFBS_None, // PMXVI4GER8WPP = 1693 |
23491 | 1.34M | CEFBS_None, // PMXVI8GER4 = 1694 |
23492 | 1.34M | CEFBS_None, // PMXVI8GER4PP = 1695 |
23493 | 1.34M | CEFBS_None, // PMXVI8GER4SPP = 1696 |
23494 | 1.34M | CEFBS_None, // PMXVI8GER4W = 1697 |
23495 | 1.34M | CEFBS_None, // PMXVI8GER4WPP = 1698 |
23496 | 1.34M | CEFBS_None, // PMXVI8GER4WSPP = 1699 |
23497 | 1.34M | CEFBS_None, // POPCNTB = 1700 |
23498 | 1.34M | CEFBS_None, // POPCNTB8 = 1701 |
23499 | 1.34M | CEFBS_None, // POPCNTD = 1702 |
23500 | 1.34M | CEFBS_None, // POPCNTW = 1703 |
23501 | 1.34M | CEFBS_None, // PPC32GOT = 1704 |
23502 | 1.34M | CEFBS_None, // PPC32PICGOT = 1705 |
23503 | 1.34M | CEFBS_None, // PREPARE_PROBED_ALLOCA_32 = 1706 |
23504 | 1.34M | CEFBS_None, // PREPARE_PROBED_ALLOCA_64 = 1707 |
23505 | 1.34M | CEFBS_None, // PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_32 = 1708 |
23506 | 1.34M | CEFBS_None, // PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_64 = 1709 |
23507 | 1.34M | CEFBS_None, // PROBED_ALLOCA_32 = 1710 |
23508 | 1.34M | CEFBS_None, // PROBED_ALLOCA_64 = 1711 |
23509 | 1.34M | CEFBS_None, // PROBED_STACKALLOC_32 = 1712 |
23510 | 1.34M | CEFBS_None, // PROBED_STACKALLOC_64 = 1713 |
23511 | 1.34M | CEFBS_None, // PSTB = 1714 |
23512 | 1.34M | CEFBS_None, // PSTB8 = 1715 |
23513 | 1.34M | CEFBS_None, // PSTB8nopc = 1716 |
23514 | 1.34M | CEFBS_None, // PSTB8onlypc = 1717 |
23515 | 1.34M | CEFBS_None, // PSTB8pc = 1718 |
23516 | 1.34M | CEFBS_None, // PSTBnopc = 1719 |
23517 | 1.34M | CEFBS_None, // PSTBonlypc = 1720 |
23518 | 1.34M | CEFBS_None, // PSTBpc = 1721 |
23519 | 1.34M | CEFBS_None, // PSTD = 1722 |
23520 | 1.34M | CEFBS_None, // PSTDnopc = 1723 |
23521 | 1.34M | CEFBS_None, // PSTDonlypc = 1724 |
23522 | 1.34M | CEFBS_None, // PSTDpc = 1725 |
23523 | 1.34M | CEFBS_None, // PSTFD = 1726 |
23524 | 1.34M | CEFBS_None, // PSTFDnopc = 1727 |
23525 | 1.34M | CEFBS_None, // PSTFDonlypc = 1728 |
23526 | 1.34M | CEFBS_None, // PSTFDpc = 1729 |
23527 | 1.34M | CEFBS_None, // PSTFS = 1730 |
23528 | 1.34M | CEFBS_None, // PSTFSnopc = 1731 |
23529 | 1.34M | CEFBS_None, // PSTFSonlypc = 1732 |
23530 | 1.34M | CEFBS_None, // PSTFSpc = 1733 |
23531 | 1.34M | CEFBS_None, // PSTH = 1734 |
23532 | 1.34M | CEFBS_None, // PSTH8 = 1735 |
23533 | 1.34M | CEFBS_None, // PSTH8nopc = 1736 |
23534 | 1.34M | CEFBS_None, // PSTH8onlypc = 1737 |
23535 | 1.34M | CEFBS_None, // PSTH8pc = 1738 |
23536 | 1.34M | CEFBS_None, // PSTHnopc = 1739 |
23537 | 1.34M | CEFBS_None, // PSTHonlypc = 1740 |
23538 | 1.34M | CEFBS_None, // PSTHpc = 1741 |
23539 | 1.34M | CEFBS_None, // PSTW = 1742 |
23540 | 1.34M | CEFBS_None, // PSTW8 = 1743 |
23541 | 1.34M | CEFBS_None, // PSTW8nopc = 1744 |
23542 | 1.34M | CEFBS_None, // PSTW8onlypc = 1745 |
23543 | 1.34M | CEFBS_None, // PSTW8pc = 1746 |
23544 | 1.34M | CEFBS_None, // PSTWnopc = 1747 |
23545 | 1.34M | CEFBS_None, // PSTWonlypc = 1748 |
23546 | 1.34M | CEFBS_None, // PSTWpc = 1749 |
23547 | 1.34M | CEFBS_None, // PSTXSD = 1750 |
23548 | 1.34M | CEFBS_None, // PSTXSDnopc = 1751 |
23549 | 1.34M | CEFBS_None, // PSTXSDonlypc = 1752 |
23550 | 1.34M | CEFBS_None, // PSTXSDpc = 1753 |
23551 | 1.34M | CEFBS_None, // PSTXSSP = 1754 |
23552 | 1.34M | CEFBS_None, // PSTXSSPnopc = 1755 |
23553 | 1.34M | CEFBS_None, // PSTXSSPonlypc = 1756 |
23554 | 1.34M | CEFBS_None, // PSTXSSPpc = 1757 |
23555 | 1.34M | CEFBS_None, // PSTXV = 1758 |
23556 | 1.34M | CEFBS_None, // PSTXVP = 1759 |
23557 | 1.34M | CEFBS_None, // PSTXVPnopc = 1760 |
23558 | 1.34M | CEFBS_None, // PSTXVPonlypc = 1761 |
23559 | 1.34M | CEFBS_None, // PSTXVPpc = 1762 |
23560 | 1.34M | CEFBS_None, // PSTXVnopc = 1763 |
23561 | 1.34M | CEFBS_None, // PSTXVonlypc = 1764 |
23562 | 1.34M | CEFBS_None, // PSTXVpc = 1765 |
23563 | 1.34M | CEFBS_None, // PseudoEIEIO = 1766 |
23564 | 1.34M | CEFBS_None, // RESTORE_ACC = 1767 |
23565 | 1.34M | CEFBS_None, // RESTORE_CR = 1768 |
23566 | 1.34M | CEFBS_None, // RESTORE_CRBIT = 1769 |
23567 | 1.34M | CEFBS_None, // RESTORE_QUADWORD = 1770 |
23568 | 1.34M | CEFBS_None, // RESTORE_UACC = 1771 |
23569 | 1.34M | CEFBS_None, // RESTORE_WACC = 1772 |
23570 | 1.34M | CEFBS_None, // RFCI = 1773 |
23571 | 1.34M | CEFBS_None, // RFDI = 1774 |
23572 | 1.34M | CEFBS_None, // RFEBB = 1775 |
23573 | 1.34M | CEFBS_None, // RFI = 1776 |
23574 | 1.34M | CEFBS_None, // RFID = 1777 |
23575 | 1.34M | CEFBS_None, // RFMCI = 1778 |
23576 | 1.34M | CEFBS_None, // RLDCL = 1779 |
23577 | 1.34M | CEFBS_None, // RLDCL_rec = 1780 |
23578 | 1.34M | CEFBS_None, // RLDCR = 1781 |
23579 | 1.34M | CEFBS_None, // RLDCR_rec = 1782 |
23580 | 1.34M | CEFBS_None, // RLDIC = 1783 |
23581 | 1.34M | CEFBS_None, // RLDICL = 1784 |
23582 | 1.34M | CEFBS_None, // RLDICL_32 = 1785 |
23583 | 1.34M | CEFBS_None, // RLDICL_32_64 = 1786 |
23584 | 1.34M | CEFBS_None, // RLDICL_32_rec = 1787 |
23585 | 1.34M | CEFBS_None, // RLDICL_rec = 1788 |
23586 | 1.34M | CEFBS_None, // RLDICR = 1789 |
23587 | 1.34M | CEFBS_None, // RLDICR_32 = 1790 |
23588 | 1.34M | CEFBS_None, // RLDICR_rec = 1791 |
23589 | 1.34M | CEFBS_None, // RLDIC_rec = 1792 |
23590 | 1.34M | CEFBS_None, // RLDIMI = 1793 |
23591 | 1.34M | CEFBS_None, // RLDIMI_rec = 1794 |
23592 | 1.34M | CEFBS_None, // RLWIMI = 1795 |
23593 | 1.34M | CEFBS_None, // RLWIMI8 = 1796 |
23594 | 1.34M | CEFBS_None, // RLWIMI8_rec = 1797 |
23595 | 1.34M | CEFBS_None, // RLWIMI_rec = 1798 |
23596 | 1.34M | CEFBS_None, // RLWINM = 1799 |
23597 | 1.34M | CEFBS_None, // RLWINM8 = 1800 |
23598 | 1.34M | CEFBS_None, // RLWINM8_rec = 1801 |
23599 | 1.34M | CEFBS_None, // RLWINM_rec = 1802 |
23600 | 1.34M | CEFBS_None, // RLWNM = 1803 |
23601 | 1.34M | CEFBS_None, // RLWNM8 = 1804 |
23602 | 1.34M | CEFBS_None, // RLWNM8_rec = 1805 |
23603 | 1.34M | CEFBS_None, // RLWNM_rec = 1806 |
23604 | 1.34M | CEFBS_None, // ReadTB = 1807 |
23605 | 1.34M | CEFBS_None, // SC = 1808 |
23606 | 1.34M | CEFBS_None, // SCV = 1809 |
23607 | 1.34M | CEFBS_None, // SELECT_CC_F16 = 1810 |
23608 | 1.34M | CEFBS_None, // SELECT_CC_F4 = 1811 |
23609 | 1.34M | CEFBS_None, // SELECT_CC_F8 = 1812 |
23610 | 1.34M | CEFBS_None, // SELECT_CC_I4 = 1813 |
23611 | 1.34M | CEFBS_None, // SELECT_CC_I8 = 1814 |
23612 | 1.34M | CEFBS_None, // SELECT_CC_SPE = 1815 |
23613 | 1.34M | CEFBS_None, // SELECT_CC_SPE4 = 1816 |
23614 | 1.34M | CEFBS_None, // SELECT_CC_VRRC = 1817 |
23615 | 1.34M | CEFBS_None, // SELECT_CC_VSFRC = 1818 |
23616 | 1.34M | CEFBS_None, // SELECT_CC_VSRC = 1819 |
23617 | 1.34M | CEFBS_None, // SELECT_CC_VSSRC = 1820 |
23618 | 1.34M | CEFBS_None, // SELECT_F16 = 1821 |
23619 | 1.34M | CEFBS_None, // SELECT_F4 = 1822 |
23620 | 1.34M | CEFBS_None, // SELECT_F8 = 1823 |
23621 | 1.34M | CEFBS_None, // SELECT_I4 = 1824 |
23622 | 1.34M | CEFBS_None, // SELECT_I8 = 1825 |
23623 | 1.34M | CEFBS_None, // SELECT_SPE = 1826 |
23624 | 1.34M | CEFBS_None, // SELECT_SPE4 = 1827 |
23625 | 1.34M | CEFBS_None, // SELECT_VRRC = 1828 |
23626 | 1.34M | CEFBS_None, // SELECT_VSFRC = 1829 |
23627 | 1.34M | CEFBS_None, // SELECT_VSRC = 1830 |
23628 | 1.34M | CEFBS_None, // SELECT_VSSRC = 1831 |
23629 | 1.34M | CEFBS_None, // SETB = 1832 |
23630 | 1.34M | CEFBS_None, // SETB8 = 1833 |
23631 | 1.34M | CEFBS_None, // SETBC = 1834 |
23632 | 1.34M | CEFBS_None, // SETBC8 = 1835 |
23633 | 1.34M | CEFBS_None, // SETBCR = 1836 |
23634 | 1.34M | CEFBS_None, // SETBCR8 = 1837 |
23635 | 1.34M | CEFBS_None, // SETFLM = 1838 |
23636 | 1.34M | CEFBS_None, // SETNBC = 1839 |
23637 | 1.34M | CEFBS_None, // SETNBC8 = 1840 |
23638 | 1.34M | CEFBS_None, // SETNBCR = 1841 |
23639 | 1.34M | CEFBS_None, // SETNBCR8 = 1842 |
23640 | 1.34M | CEFBS_None, // SETRND = 1843 |
23641 | 1.34M | CEFBS_None, // SETRNDi = 1844 |
23642 | 1.34M | CEFBS_None, // SLBFEE_rec = 1845 |
23643 | 1.34M | CEFBS_None, // SLBIA = 1846 |
23644 | 1.34M | CEFBS_None, // SLBIE = 1847 |
23645 | 1.34M | CEFBS_None, // SLBIEG = 1848 |
23646 | 1.34M | CEFBS_None, // SLBMFEE = 1849 |
23647 | 1.34M | CEFBS_None, // SLBMFEV = 1850 |
23648 | 1.34M | CEFBS_None, // SLBMTE = 1851 |
23649 | 1.34M | CEFBS_None, // SLBSYNC = 1852 |
23650 | 1.34M | CEFBS_None, // SLD = 1853 |
23651 | 1.34M | CEFBS_None, // SLD_rec = 1854 |
23652 | 1.34M | CEFBS_None, // SLW = 1855 |
23653 | 1.34M | CEFBS_None, // SLW8 = 1856 |
23654 | 1.34M | CEFBS_None, // SLW8_rec = 1857 |
23655 | 1.34M | CEFBS_None, // SLW_rec = 1858 |
23656 | 1.34M | CEFBS_None, // SPELWZ = 1859 |
23657 | 1.34M | CEFBS_None, // SPELWZX = 1860 |
23658 | 1.34M | CEFBS_None, // SPESTW = 1861 |
23659 | 1.34M | CEFBS_None, // SPESTWX = 1862 |
23660 | 1.34M | CEFBS_None, // SPILL_ACC = 1863 |
23661 | 1.34M | CEFBS_None, // SPILL_CR = 1864 |
23662 | 1.34M | CEFBS_None, // SPILL_CRBIT = 1865 |
23663 | 1.34M | CEFBS_None, // SPILL_QUADWORD = 1866 |
23664 | 1.34M | CEFBS_None, // SPILL_UACC = 1867 |
23665 | 1.34M | CEFBS_None, // SPILL_WACC = 1868 |
23666 | 1.34M | CEFBS_None, // SPLIT_QUADWORD = 1869 |
23667 | 1.34M | CEFBS_None, // SRAD = 1870 |
23668 | 1.34M | CEFBS_None, // SRADI = 1871 |
23669 | 1.34M | CEFBS_None, // SRADI_32 = 1872 |
23670 | 1.34M | CEFBS_None, // SRADI_rec = 1873 |
23671 | 1.34M | CEFBS_None, // SRAD_rec = 1874 |
23672 | 1.34M | CEFBS_None, // SRAW = 1875 |
23673 | 1.34M | CEFBS_None, // SRAWI = 1876 |
23674 | 1.34M | CEFBS_None, // SRAWI_rec = 1877 |
23675 | 1.34M | CEFBS_None, // SRAW_rec = 1878 |
23676 | 1.34M | CEFBS_None, // SRD = 1879 |
23677 | 1.34M | CEFBS_None, // SRD_rec = 1880 |
23678 | 1.34M | CEFBS_None, // SRW = 1881 |
23679 | 1.34M | CEFBS_None, // SRW8 = 1882 |
23680 | 1.34M | CEFBS_None, // SRW8_rec = 1883 |
23681 | 1.34M | CEFBS_None, // SRW_rec = 1884 |
23682 | 1.34M | CEFBS_None, // STB = 1885 |
23683 | 1.34M | CEFBS_None, // STB8 = 1886 |
23684 | 1.34M | CEFBS_None, // STBCIX = 1887 |
23685 | 1.34M | CEFBS_None, // STBCX = 1888 |
23686 | 1.34M | CEFBS_None, // STBEPX = 1889 |
23687 | 1.34M | CEFBS_None, // STBU = 1890 |
23688 | 1.34M | CEFBS_None, // STBU8 = 1891 |
23689 | 1.34M | CEFBS_None, // STBUX = 1892 |
23690 | 1.34M | CEFBS_None, // STBUX8 = 1893 |
23691 | 1.34M | CEFBS_None, // STBX = 1894 |
23692 | 1.34M | CEFBS_None, // STBX8 = 1895 |
23693 | 1.34M | CEFBS_None, // STBXTLS = 1896 |
23694 | 1.34M | CEFBS_None, // STBXTLS_ = 1897 |
23695 | 1.34M | CEFBS_None, // STBXTLS_32 = 1898 |
23696 | 1.34M | CEFBS_None, // STD = 1899 |
23697 | 1.34M | CEFBS_None, // STDAT = 1900 |
23698 | 1.34M | CEFBS_None, // STDBRX = 1901 |
23699 | 1.34M | CEFBS_None, // STDCIX = 1902 |
23700 | 1.34M | CEFBS_None, // STDCX = 1903 |
23701 | 1.34M | CEFBS_None, // STDU = 1904 |
23702 | 1.34M | CEFBS_None, // STDUX = 1905 |
23703 | 1.34M | CEFBS_None, // STDX = 1906 |
23704 | 1.34M | CEFBS_None, // STDXTLS = 1907 |
23705 | 1.34M | CEFBS_None, // STDXTLS_ = 1908 |
23706 | 1.34M | CEFBS_None, // STFD = 1909 |
23707 | 1.34M | CEFBS_None, // STFDEPX = 1910 |
23708 | 1.34M | CEFBS_None, // STFDU = 1911 |
23709 | 1.34M | CEFBS_None, // STFDUX = 1912 |
23710 | 1.34M | CEFBS_None, // STFDX = 1913 |
23711 | 1.34M | CEFBS_None, // STFDXTLS = 1914 |
23712 | 1.34M | CEFBS_None, // STFDXTLS_ = 1915 |
23713 | 1.34M | CEFBS_None, // STFIWX = 1916 |
23714 | 1.34M | CEFBS_None, // STFS = 1917 |
23715 | 1.34M | CEFBS_None, // STFSU = 1918 |
23716 | 1.34M | CEFBS_None, // STFSUX = 1919 |
23717 | 1.34M | CEFBS_None, // STFSX = 1920 |
23718 | 1.34M | CEFBS_None, // STFSXTLS = 1921 |
23719 | 1.34M | CEFBS_None, // STFSXTLS_ = 1922 |
23720 | 1.34M | CEFBS_None, // STH = 1923 |
23721 | 1.34M | CEFBS_None, // STH8 = 1924 |
23722 | 1.34M | CEFBS_None, // STHBRX = 1925 |
23723 | 1.34M | CEFBS_None, // STHCIX = 1926 |
23724 | 1.34M | CEFBS_None, // STHCX = 1927 |
23725 | 1.34M | CEFBS_None, // STHEPX = 1928 |
23726 | 1.34M | CEFBS_None, // STHU = 1929 |
23727 | 1.34M | CEFBS_None, // STHU8 = 1930 |
23728 | 1.34M | CEFBS_None, // STHUX = 1931 |
23729 | 1.34M | CEFBS_None, // STHUX8 = 1932 |
23730 | 1.34M | CEFBS_None, // STHX = 1933 |
23731 | 1.34M | CEFBS_None, // STHX8 = 1934 |
23732 | 1.34M | CEFBS_None, // STHXTLS = 1935 |
23733 | 1.34M | CEFBS_None, // STHXTLS_ = 1936 |
23734 | 1.34M | CEFBS_None, // STHXTLS_32 = 1937 |
23735 | 1.34M | CEFBS_None, // STMW = 1938 |
23736 | 1.34M | CEFBS_None, // STOP = 1939 |
23737 | 1.34M | CEFBS_None, // STQ = 1940 |
23738 | 1.34M | CEFBS_None, // STQCX = 1941 |
23739 | 1.34M | CEFBS_None, // STQX_PSEUDO = 1942 |
23740 | 1.34M | CEFBS_None, // STSWI = 1943 |
23741 | 1.34M | CEFBS_None, // STVEBX = 1944 |
23742 | 1.34M | CEFBS_None, // STVEHX = 1945 |
23743 | 1.34M | CEFBS_None, // STVEWX = 1946 |
23744 | 1.34M | CEFBS_None, // STVX = 1947 |
23745 | 1.34M | CEFBS_None, // STVXL = 1948 |
23746 | 1.34M | CEFBS_None, // STW = 1949 |
23747 | 1.34M | CEFBS_None, // STW8 = 1950 |
23748 | 1.34M | CEFBS_None, // STWAT = 1951 |
23749 | 1.34M | CEFBS_None, // STWBRX = 1952 |
23750 | 1.34M | CEFBS_None, // STWCIX = 1953 |
23751 | 1.34M | CEFBS_None, // STWCX = 1954 |
23752 | 1.34M | CEFBS_None, // STWEPX = 1955 |
23753 | 1.34M | CEFBS_None, // STWU = 1956 |
23754 | 1.34M | CEFBS_None, // STWU8 = 1957 |
23755 | 1.34M | CEFBS_None, // STWUX = 1958 |
23756 | 1.34M | CEFBS_None, // STWUX8 = 1959 |
23757 | 1.34M | CEFBS_None, // STWX = 1960 |
23758 | 1.34M | CEFBS_None, // STWX8 = 1961 |
23759 | 1.34M | CEFBS_None, // STWXTLS = 1962 |
23760 | 1.34M | CEFBS_None, // STWXTLS_ = 1963 |
23761 | 1.34M | CEFBS_None, // STWXTLS_32 = 1964 |
23762 | 1.34M | CEFBS_None, // STXSD = 1965 |
23763 | 1.34M | CEFBS_None, // STXSDX = 1966 |
23764 | 1.34M | CEFBS_None, // STXSIBX = 1967 |
23765 | 1.34M | CEFBS_None, // STXSIBXv = 1968 |
23766 | 1.34M | CEFBS_None, // STXSIHX = 1969 |
23767 | 1.34M | CEFBS_None, // STXSIHXv = 1970 |
23768 | 1.34M | CEFBS_None, // STXSIWX = 1971 |
23769 | 1.34M | CEFBS_None, // STXSSP = 1972 |
23770 | 1.34M | CEFBS_None, // STXSSPX = 1973 |
23771 | 1.34M | CEFBS_None, // STXV = 1974 |
23772 | 1.34M | CEFBS_None, // STXVB16X = 1975 |
23773 | 1.34M | CEFBS_None, // STXVD2X = 1976 |
23774 | 1.34M | CEFBS_None, // STXVH8X = 1977 |
23775 | 1.34M | CEFBS_None, // STXVL = 1978 |
23776 | 1.34M | CEFBS_None, // STXVLL = 1979 |
23777 | 1.34M | CEFBS_None, // STXVP = 1980 |
23778 | 1.34M | CEFBS_None, // STXVPRL = 1981 |
23779 | 1.34M | CEFBS_None, // STXVPRLL = 1982 |
23780 | 1.34M | CEFBS_None, // STXVPX = 1983 |
23781 | 1.34M | CEFBS_None, // STXVRBX = 1984 |
23782 | 1.34M | CEFBS_None, // STXVRDX = 1985 |
23783 | 1.34M | CEFBS_None, // STXVRHX = 1986 |
23784 | 1.34M | CEFBS_None, // STXVRL = 1987 |
23785 | 1.34M | CEFBS_None, // STXVRLL = 1988 |
23786 | 1.34M | CEFBS_None, // STXVRWX = 1989 |
23787 | 1.34M | CEFBS_None, // STXVW4X = 1990 |
23788 | 1.34M | CEFBS_None, // STXVX = 1991 |
23789 | 1.34M | CEFBS_None, // SUBF = 1992 |
23790 | 1.34M | CEFBS_None, // SUBF8 = 1993 |
23791 | 1.34M | CEFBS_None, // SUBF8O = 1994 |
23792 | 1.34M | CEFBS_None, // SUBF8O_rec = 1995 |
23793 | 1.34M | CEFBS_None, // SUBF8_rec = 1996 |
23794 | 1.34M | CEFBS_None, // SUBFC = 1997 |
23795 | 1.34M | CEFBS_None, // SUBFC8 = 1998 |
23796 | 1.34M | CEFBS_None, // SUBFC8O = 1999 |
23797 | 1.34M | CEFBS_None, // SUBFC8O_rec = 2000 |
23798 | 1.34M | CEFBS_None, // SUBFC8_rec = 2001 |
23799 | 1.34M | CEFBS_None, // SUBFCO = 2002 |
23800 | 1.34M | CEFBS_None, // SUBFCO_rec = 2003 |
23801 | 1.34M | CEFBS_None, // SUBFC_rec = 2004 |
23802 | 1.34M | CEFBS_None, // SUBFE = 2005 |
23803 | 1.34M | CEFBS_None, // SUBFE8 = 2006 |
23804 | 1.34M | CEFBS_None, // SUBFE8O = 2007 |
23805 | 1.34M | CEFBS_None, // SUBFE8O_rec = 2008 |
23806 | 1.34M | CEFBS_None, // SUBFE8_rec = 2009 |
23807 | 1.34M | CEFBS_None, // SUBFEO = 2010 |
23808 | 1.34M | CEFBS_None, // SUBFEO_rec = 2011 |
23809 | 1.34M | CEFBS_None, // SUBFE_rec = 2012 |
23810 | 1.34M | CEFBS_None, // SUBFIC = 2013 |
23811 | 1.34M | CEFBS_None, // SUBFIC8 = 2014 |
23812 | 1.34M | CEFBS_None, // SUBFME = 2015 |
23813 | 1.34M | CEFBS_None, // SUBFME8 = 2016 |
23814 | 1.34M | CEFBS_None, // SUBFME8O = 2017 |
23815 | 1.34M | CEFBS_None, // SUBFME8O_rec = 2018 |
23816 | 1.34M | CEFBS_None, // SUBFME8_rec = 2019 |
23817 | 1.34M | CEFBS_None, // SUBFMEO = 2020 |
23818 | 1.34M | CEFBS_None, // SUBFMEO_rec = 2021 |
23819 | 1.34M | CEFBS_None, // SUBFME_rec = 2022 |
23820 | 1.34M | CEFBS_None, // SUBFO = 2023 |
23821 | 1.34M | CEFBS_None, // SUBFO_rec = 2024 |
23822 | 1.34M | CEFBS_None, // SUBFUS = 2025 |
23823 | 1.34M | CEFBS_None, // SUBFUS_rec = 2026 |
23824 | 1.34M | CEFBS_None, // SUBFZE = 2027 |
23825 | 1.34M | CEFBS_None, // SUBFZE8 = 2028 |
23826 | 1.34M | CEFBS_None, // SUBFZE8O = 2029 |
23827 | 1.34M | CEFBS_None, // SUBFZE8O_rec = 2030 |
23828 | 1.34M | CEFBS_None, // SUBFZE8_rec = 2031 |
23829 | 1.34M | CEFBS_None, // SUBFZEO = 2032 |
23830 | 1.34M | CEFBS_None, // SUBFZEO_rec = 2033 |
23831 | 1.34M | CEFBS_None, // SUBFZE_rec = 2034 |
23832 | 1.34M | CEFBS_None, // SUBF_rec = 2035 |
23833 | 1.34M | CEFBS_None, // SYNC = 2036 |
23834 | 1.34M | CEFBS_None, // SYNCP10 = 2037 |
23835 | 1.34M | CEFBS_None, // TABORT = 2038 |
23836 | 1.34M | CEFBS_None, // TABORTDC = 2039 |
23837 | 1.34M | CEFBS_None, // TABORTDCI = 2040 |
23838 | 1.34M | CEFBS_None, // TABORTWC = 2041 |
23839 | 1.34M | CEFBS_None, // TABORTWCI = 2042 |
23840 | 1.34M | CEFBS_None, // TAILB = 2043 |
23841 | 1.34M | CEFBS_None, // TAILB8 = 2044 |
23842 | 1.34M | CEFBS_None, // TAILBA = 2045 |
23843 | 1.34M | CEFBS_None, // TAILBA8 = 2046 |
23844 | 1.34M | CEFBS_None, // TAILBCTR = 2047 |
23845 | 1.34M | CEFBS_None, // TAILBCTR8 = 2048 |
23846 | 1.34M | CEFBS_None, // TBEGIN = 2049 |
23847 | 1.34M | CEFBS_None, // TBEGIN_RET = 2050 |
23848 | 1.34M | CEFBS_None, // TCHECK = 2051 |
23849 | 1.34M | CEFBS_None, // TCHECK_RET = 2052 |
23850 | 1.34M | CEFBS_None, // TCRETURNai = 2053 |
23851 | 1.34M | CEFBS_None, // TCRETURNai8 = 2054 |
23852 | 1.34M | CEFBS_None, // TCRETURNdi = 2055 |
23853 | 1.34M | CEFBS_None, // TCRETURNdi8 = 2056 |
23854 | 1.34M | CEFBS_None, // TCRETURNri = 2057 |
23855 | 1.34M | CEFBS_None, // TCRETURNri8 = 2058 |
23856 | 1.34M | CEFBS_None, // TD = 2059 |
23857 | 1.34M | CEFBS_None, // TDI = 2060 |
23858 | 1.34M | CEFBS_None, // TEND = 2061 |
23859 | 1.34M | CEFBS_None, // TLBIA = 2062 |
23860 | 1.34M | CEFBS_None, // TLBIE = 2063 |
23861 | 1.34M | CEFBS_None, // TLBIEL = 2064 |
23862 | 1.34M | CEFBS_None, // TLBILX = 2065 |
23863 | 1.34M | CEFBS_None, // TLBIVAX = 2066 |
23864 | 1.34M | CEFBS_None, // TLBLD = 2067 |
23865 | 1.34M | CEFBS_None, // TLBLI = 2068 |
23866 | 1.34M | CEFBS_None, // TLBRE = 2069 |
23867 | 1.34M | CEFBS_None, // TLBRE2 = 2070 |
23868 | 1.34M | CEFBS_None, // TLBSX = 2071 |
23869 | 1.34M | CEFBS_None, // TLBSX2 = 2072 |
23870 | 1.34M | CEFBS_None, // TLBSX2D = 2073 |
23871 | 1.34M | CEFBS_None, // TLBSYNC = 2074 |
23872 | 1.34M | CEFBS_None, // TLBWE = 2075 |
23873 | 1.34M | CEFBS_None, // TLBWE2 = 2076 |
23874 | 1.34M | CEFBS_None, // TLSGDAIX = 2077 |
23875 | 1.34M | CEFBS_None, // TLSGDAIX8 = 2078 |
23876 | 1.34M | CEFBS_None, // TRAP = 2079 |
23877 | 1.34M | CEFBS_None, // TRECHKPT = 2080 |
23878 | 1.34M | CEFBS_None, // TRECLAIM = 2081 |
23879 | 1.34M | CEFBS_None, // TSR = 2082 |
23880 | 1.34M | CEFBS_None, // TW = 2083 |
23881 | 1.34M | CEFBS_None, // TWI = 2084 |
23882 | 1.34M | CEFBS_None, // UNENCODED_NOP = 2085 |
23883 | 1.34M | CEFBS_None, // UpdateGBR = 2086 |
23884 | 1.34M | CEFBS_None, // VABSDUB = 2087 |
23885 | 1.34M | CEFBS_None, // VABSDUH = 2088 |
23886 | 1.34M | CEFBS_None, // VABSDUW = 2089 |
23887 | 1.34M | CEFBS_None, // VADDCUQ = 2090 |
23888 | 1.34M | CEFBS_None, // VADDCUW = 2091 |
23889 | 1.34M | CEFBS_None, // VADDECUQ = 2092 |
23890 | 1.34M | CEFBS_None, // VADDEUQM = 2093 |
23891 | 1.34M | CEFBS_None, // VADDFP = 2094 |
23892 | 1.34M | CEFBS_None, // VADDSBS = 2095 |
23893 | 1.34M | CEFBS_None, // VADDSHS = 2096 |
23894 | 1.34M | CEFBS_None, // VADDSWS = 2097 |
23895 | 1.34M | CEFBS_None, // VADDUBM = 2098 |
23896 | 1.34M | CEFBS_None, // VADDUBS = 2099 |
23897 | 1.34M | CEFBS_None, // VADDUDM = 2100 |
23898 | 1.34M | CEFBS_None, // VADDUHM = 2101 |
23899 | 1.34M | CEFBS_None, // VADDUHS = 2102 |
23900 | 1.34M | CEFBS_None, // VADDUQM = 2103 |
23901 | 1.34M | CEFBS_None, // VADDUWM = 2104 |
23902 | 1.34M | CEFBS_None, // VADDUWS = 2105 |
23903 | 1.34M | CEFBS_None, // VAND = 2106 |
23904 | 1.34M | CEFBS_None, // VANDC = 2107 |
23905 | 1.34M | CEFBS_None, // VAVGSB = 2108 |
23906 | 1.34M | CEFBS_None, // VAVGSH = 2109 |
23907 | 1.34M | CEFBS_None, // VAVGSW = 2110 |
23908 | 1.34M | CEFBS_None, // VAVGUB = 2111 |
23909 | 1.34M | CEFBS_None, // VAVGUH = 2112 |
23910 | 1.34M | CEFBS_None, // VAVGUW = 2113 |
23911 | 1.34M | CEFBS_None, // VBPERMD = 2114 |
23912 | 1.34M | CEFBS_None, // VBPERMQ = 2115 |
23913 | 1.34M | CEFBS_None, // VCFSX = 2116 |
23914 | 1.34M | CEFBS_None, // VCFSX_0 = 2117 |
23915 | 1.34M | CEFBS_None, // VCFUGED = 2118 |
23916 | 1.34M | CEFBS_None, // VCFUX = 2119 |
23917 | 1.34M | CEFBS_None, // VCFUX_0 = 2120 |
23918 | 1.34M | CEFBS_None, // VCIPHER = 2121 |
23919 | 1.34M | CEFBS_None, // VCIPHERLAST = 2122 |
23920 | 1.34M | CEFBS_None, // VCLRLB = 2123 |
23921 | 1.34M | CEFBS_None, // VCLRRB = 2124 |
23922 | 1.34M | CEFBS_None, // VCLZB = 2125 |
23923 | 1.34M | CEFBS_None, // VCLZD = 2126 |
23924 | 1.34M | CEFBS_None, // VCLZDM = 2127 |
23925 | 1.34M | CEFBS_None, // VCLZH = 2128 |
23926 | 1.34M | CEFBS_None, // VCLZLSBB = 2129 |
23927 | 1.34M | CEFBS_None, // VCLZW = 2130 |
23928 | 1.34M | CEFBS_None, // VCMPBFP = 2131 |
23929 | 1.34M | CEFBS_None, // VCMPBFP_rec = 2132 |
23930 | 1.34M | CEFBS_None, // VCMPEQFP = 2133 |
23931 | 1.34M | CEFBS_None, // VCMPEQFP_rec = 2134 |
23932 | 1.34M | CEFBS_None, // VCMPEQUB = 2135 |
23933 | 1.34M | CEFBS_None, // VCMPEQUB_rec = 2136 |
23934 | 1.34M | CEFBS_None, // VCMPEQUD = 2137 |
23935 | 1.34M | CEFBS_None, // VCMPEQUD_rec = 2138 |
23936 | 1.34M | CEFBS_None, // VCMPEQUH = 2139 |
23937 | 1.34M | CEFBS_None, // VCMPEQUH_rec = 2140 |
23938 | 1.34M | CEFBS_None, // VCMPEQUQ = 2141 |
23939 | 1.34M | CEFBS_None, // VCMPEQUQ_rec = 2142 |
23940 | 1.34M | CEFBS_None, // VCMPEQUW = 2143 |
23941 | 1.34M | CEFBS_None, // VCMPEQUW_rec = 2144 |
23942 | 1.34M | CEFBS_None, // VCMPGEFP = 2145 |
23943 | 1.34M | CEFBS_None, // VCMPGEFP_rec = 2146 |
23944 | 1.34M | CEFBS_None, // VCMPGTFP = 2147 |
23945 | 1.34M | CEFBS_None, // VCMPGTFP_rec = 2148 |
23946 | 1.34M | CEFBS_None, // VCMPGTSB = 2149 |
23947 | 1.34M | CEFBS_None, // VCMPGTSB_rec = 2150 |
23948 | 1.34M | CEFBS_None, // VCMPGTSD = 2151 |
23949 | 1.34M | CEFBS_None, // VCMPGTSD_rec = 2152 |
23950 | 1.34M | CEFBS_None, // VCMPGTSH = 2153 |
23951 | 1.34M | CEFBS_None, // VCMPGTSH_rec = 2154 |
23952 | 1.34M | CEFBS_None, // VCMPGTSQ = 2155 |
23953 | 1.34M | CEFBS_None, // VCMPGTSQ_rec = 2156 |
23954 | 1.34M | CEFBS_None, // VCMPGTSW = 2157 |
23955 | 1.34M | CEFBS_None, // VCMPGTSW_rec = 2158 |
23956 | 1.34M | CEFBS_None, // VCMPGTUB = 2159 |
23957 | 1.34M | CEFBS_None, // VCMPGTUB_rec = 2160 |
23958 | 1.34M | CEFBS_None, // VCMPGTUD = 2161 |
23959 | 1.34M | CEFBS_None, // VCMPGTUD_rec = 2162 |
23960 | 1.34M | CEFBS_None, // VCMPGTUH = 2163 |
23961 | 1.34M | CEFBS_None, // VCMPGTUH_rec = 2164 |
23962 | 1.34M | CEFBS_None, // VCMPGTUQ = 2165 |
23963 | 1.34M | CEFBS_None, // VCMPGTUQ_rec = 2166 |
23964 | 1.34M | CEFBS_None, // VCMPGTUW = 2167 |
23965 | 1.34M | CEFBS_None, // VCMPGTUW_rec = 2168 |
23966 | 1.34M | CEFBS_None, // VCMPNEB = 2169 |
23967 | 1.34M | CEFBS_None, // VCMPNEB_rec = 2170 |
23968 | 1.34M | CEFBS_None, // VCMPNEH = 2171 |
23969 | 1.34M | CEFBS_None, // VCMPNEH_rec = 2172 |
23970 | 1.34M | CEFBS_None, // VCMPNEW = 2173 |
23971 | 1.34M | CEFBS_None, // VCMPNEW_rec = 2174 |
23972 | 1.34M | CEFBS_None, // VCMPNEZB = 2175 |
23973 | 1.34M | CEFBS_None, // VCMPNEZB_rec = 2176 |
23974 | 1.34M | CEFBS_None, // VCMPNEZH = 2177 |
23975 | 1.34M | CEFBS_None, // VCMPNEZH_rec = 2178 |
23976 | 1.34M | CEFBS_None, // VCMPNEZW = 2179 |
23977 | 1.34M | CEFBS_None, // VCMPNEZW_rec = 2180 |
23978 | 1.34M | CEFBS_None, // VCMPSQ = 2181 |
23979 | 1.34M | CEFBS_None, // VCMPUQ = 2182 |
23980 | 1.34M | CEFBS_None, // VCNTMBB = 2183 |
23981 | 1.34M | CEFBS_None, // VCNTMBD = 2184 |
23982 | 1.34M | CEFBS_None, // VCNTMBH = 2185 |
23983 | 1.34M | CEFBS_None, // VCNTMBW = 2186 |
23984 | 1.34M | CEFBS_None, // VCTSXS = 2187 |
23985 | 1.34M | CEFBS_None, // VCTSXS_0 = 2188 |
23986 | 1.34M | CEFBS_None, // VCTUXS = 2189 |
23987 | 1.34M | CEFBS_None, // VCTUXS_0 = 2190 |
23988 | 1.34M | CEFBS_None, // VCTZB = 2191 |
23989 | 1.34M | CEFBS_None, // VCTZD = 2192 |
23990 | 1.34M | CEFBS_None, // VCTZDM = 2193 |
23991 | 1.34M | CEFBS_None, // VCTZH = 2194 |
23992 | 1.34M | CEFBS_None, // VCTZLSBB = 2195 |
23993 | 1.34M | CEFBS_None, // VCTZW = 2196 |
23994 | 1.34M | CEFBS_None, // VDIVESD = 2197 |
23995 | 1.34M | CEFBS_None, // VDIVESQ = 2198 |
23996 | 1.34M | CEFBS_None, // VDIVESW = 2199 |
23997 | 1.34M | CEFBS_None, // VDIVEUD = 2200 |
23998 | 1.34M | CEFBS_None, // VDIVEUQ = 2201 |
23999 | 1.34M | CEFBS_None, // VDIVEUW = 2202 |
24000 | 1.34M | CEFBS_None, // VDIVSD = 2203 |
24001 | 1.34M | CEFBS_None, // VDIVSQ = 2204 |
24002 | 1.34M | CEFBS_None, // VDIVSW = 2205 |
24003 | 1.34M | CEFBS_None, // VDIVUD = 2206 |
24004 | 1.34M | CEFBS_None, // VDIVUQ = 2207 |
24005 | 1.34M | CEFBS_None, // VDIVUW = 2208 |
24006 | 1.34M | CEFBS_None, // VEQV = 2209 |
24007 | 1.34M | CEFBS_None, // VEXPANDBM = 2210 |
24008 | 1.34M | CEFBS_None, // VEXPANDDM = 2211 |
24009 | 1.34M | CEFBS_None, // VEXPANDHM = 2212 |
24010 | 1.34M | CEFBS_None, // VEXPANDQM = 2213 |
24011 | 1.34M | CEFBS_None, // VEXPANDWM = 2214 |
24012 | 1.34M | CEFBS_None, // VEXPTEFP = 2215 |
24013 | 1.34M | CEFBS_None, // VEXTDDVLX = 2216 |
24014 | 1.34M | CEFBS_None, // VEXTDDVRX = 2217 |
24015 | 1.34M | CEFBS_None, // VEXTDUBVLX = 2218 |
24016 | 1.34M | CEFBS_None, // VEXTDUBVRX = 2219 |
24017 | 1.34M | CEFBS_None, // VEXTDUHVLX = 2220 |
24018 | 1.34M | CEFBS_None, // VEXTDUHVRX = 2221 |
24019 | 1.34M | CEFBS_None, // VEXTDUWVLX = 2222 |
24020 | 1.34M | CEFBS_None, // VEXTDUWVRX = 2223 |
24021 | 1.34M | CEFBS_None, // VEXTRACTBM = 2224 |
24022 | 1.34M | CEFBS_None, // VEXTRACTD = 2225 |
24023 | 1.34M | CEFBS_None, // VEXTRACTDM = 2226 |
24024 | 1.34M | CEFBS_None, // VEXTRACTHM = 2227 |
24025 | 1.34M | CEFBS_None, // VEXTRACTQM = 2228 |
24026 | 1.34M | CEFBS_None, // VEXTRACTUB = 2229 |
24027 | 1.34M | CEFBS_None, // VEXTRACTUH = 2230 |
24028 | 1.34M | CEFBS_None, // VEXTRACTUW = 2231 |
24029 | 1.34M | CEFBS_None, // VEXTRACTWM = 2232 |
24030 | 1.34M | CEFBS_None, // VEXTSB2D = 2233 |
24031 | 1.34M | CEFBS_None, // VEXTSB2Ds = 2234 |
24032 | 1.34M | CEFBS_None, // VEXTSB2W = 2235 |
24033 | 1.34M | CEFBS_None, // VEXTSB2Ws = 2236 |
24034 | 1.34M | CEFBS_None, // VEXTSD2Q = 2237 |
24035 | 1.34M | CEFBS_None, // VEXTSH2D = 2238 |
24036 | 1.34M | CEFBS_None, // VEXTSH2Ds = 2239 |
24037 | 1.34M | CEFBS_None, // VEXTSH2W = 2240 |
24038 | 1.34M | CEFBS_None, // VEXTSH2Ws = 2241 |
24039 | 1.34M | CEFBS_None, // VEXTSW2D = 2242 |
24040 | 1.34M | CEFBS_None, // VEXTSW2Ds = 2243 |
24041 | 1.34M | CEFBS_None, // VEXTUBLX = 2244 |
24042 | 1.34M | CEFBS_None, // VEXTUBRX = 2245 |
24043 | 1.34M | CEFBS_None, // VEXTUHLX = 2246 |
24044 | 1.34M | CEFBS_None, // VEXTUHRX = 2247 |
24045 | 1.34M | CEFBS_None, // VEXTUWLX = 2248 |
24046 | 1.34M | CEFBS_None, // VEXTUWRX = 2249 |
24047 | 1.34M | CEFBS_None, // VGBBD = 2250 |
24048 | 1.34M | CEFBS_None, // VGNB = 2251 |
24049 | 1.34M | CEFBS_None, // VINSBLX = 2252 |
24050 | 1.34M | CEFBS_None, // VINSBRX = 2253 |
24051 | 1.34M | CEFBS_None, // VINSBVLX = 2254 |
24052 | 1.34M | CEFBS_None, // VINSBVRX = 2255 |
24053 | 1.34M | CEFBS_None, // VINSD = 2256 |
24054 | 1.34M | CEFBS_None, // VINSDLX = 2257 |
24055 | 1.34M | CEFBS_None, // VINSDRX = 2258 |
24056 | 1.34M | CEFBS_None, // VINSERTB = 2259 |
24057 | 1.34M | CEFBS_None, // VINSERTD = 2260 |
24058 | 1.34M | CEFBS_None, // VINSERTH = 2261 |
24059 | 1.34M | CEFBS_None, // VINSERTW = 2262 |
24060 | 1.34M | CEFBS_None, // VINSHLX = 2263 |
24061 | 1.34M | CEFBS_None, // VINSHRX = 2264 |
24062 | 1.34M | CEFBS_None, // VINSHVLX = 2265 |
24063 | 1.34M | CEFBS_None, // VINSHVRX = 2266 |
24064 | 1.34M | CEFBS_None, // VINSW = 2267 |
24065 | 1.34M | CEFBS_None, // VINSWLX = 2268 |
24066 | 1.34M | CEFBS_None, // VINSWRX = 2269 |
24067 | 1.34M | CEFBS_None, // VINSWVLX = 2270 |
24068 | 1.34M | CEFBS_None, // VINSWVRX = 2271 |
24069 | 1.34M | CEFBS_None, // VLOGEFP = 2272 |
24070 | 1.34M | CEFBS_None, // VMADDFP = 2273 |
24071 | 1.34M | CEFBS_None, // VMAXFP = 2274 |
24072 | 1.34M | CEFBS_None, // VMAXSB = 2275 |
24073 | 1.34M | CEFBS_None, // VMAXSD = 2276 |
24074 | 1.34M | CEFBS_None, // VMAXSH = 2277 |
24075 | 1.34M | CEFBS_None, // VMAXSW = 2278 |
24076 | 1.34M | CEFBS_None, // VMAXUB = 2279 |
24077 | 1.34M | CEFBS_None, // VMAXUD = 2280 |
24078 | 1.34M | CEFBS_None, // VMAXUH = 2281 |
24079 | 1.34M | CEFBS_None, // VMAXUW = 2282 |
24080 | 1.34M | CEFBS_None, // VMHADDSHS = 2283 |
24081 | 1.34M | CEFBS_None, // VMHRADDSHS = 2284 |
24082 | 1.34M | CEFBS_None, // VMINFP = 2285 |
24083 | 1.34M | CEFBS_None, // VMINSB = 2286 |
24084 | 1.34M | CEFBS_None, // VMINSD = 2287 |
24085 | 1.34M | CEFBS_None, // VMINSH = 2288 |
24086 | 1.34M | CEFBS_None, // VMINSW = 2289 |
24087 | 1.34M | CEFBS_None, // VMINUB = 2290 |
24088 | 1.34M | CEFBS_None, // VMINUD = 2291 |
24089 | 1.34M | CEFBS_None, // VMINUH = 2292 |
24090 | 1.34M | CEFBS_None, // VMINUW = 2293 |
24091 | 1.34M | CEFBS_None, // VMLADDUHM = 2294 |
24092 | 1.34M | CEFBS_None, // VMODSD = 2295 |
24093 | 1.34M | CEFBS_None, // VMODSQ = 2296 |
24094 | 1.34M | CEFBS_None, // VMODSW = 2297 |
24095 | 1.34M | CEFBS_None, // VMODUD = 2298 |
24096 | 1.34M | CEFBS_None, // VMODUQ = 2299 |
24097 | 1.34M | CEFBS_None, // VMODUW = 2300 |
24098 | 1.34M | CEFBS_None, // VMRGEW = 2301 |
24099 | 1.34M | CEFBS_None, // VMRGHB = 2302 |
24100 | 1.34M | CEFBS_None, // VMRGHH = 2303 |
24101 | 1.34M | CEFBS_None, // VMRGHW = 2304 |
24102 | 1.34M | CEFBS_None, // VMRGLB = 2305 |
24103 | 1.34M | CEFBS_None, // VMRGLH = 2306 |
24104 | 1.34M | CEFBS_None, // VMRGLW = 2307 |
24105 | 1.34M | CEFBS_None, // VMRGOW = 2308 |
24106 | 1.34M | CEFBS_None, // VMSUMCUD = 2309 |
24107 | 1.34M | CEFBS_None, // VMSUMMBM = 2310 |
24108 | 1.34M | CEFBS_None, // VMSUMSHM = 2311 |
24109 | 1.34M | CEFBS_None, // VMSUMSHS = 2312 |
24110 | 1.34M | CEFBS_None, // VMSUMUBM = 2313 |
24111 | 1.34M | CEFBS_None, // VMSUMUDM = 2314 |
24112 | 1.34M | CEFBS_None, // VMSUMUHM = 2315 |
24113 | 1.34M | CEFBS_None, // VMSUMUHS = 2316 |
24114 | 1.34M | CEFBS_None, // VMUL10CUQ = 2317 |
24115 | 1.34M | CEFBS_None, // VMUL10ECUQ = 2318 |
24116 | 1.34M | CEFBS_None, // VMUL10EUQ = 2319 |
24117 | 1.34M | CEFBS_None, // VMUL10UQ = 2320 |
24118 | 1.34M | CEFBS_None, // VMULESB = 2321 |
24119 | 1.34M | CEFBS_None, // VMULESD = 2322 |
24120 | 1.34M | CEFBS_None, // VMULESH = 2323 |
24121 | 1.34M | CEFBS_None, // VMULESW = 2324 |
24122 | 1.34M | CEFBS_None, // VMULEUB = 2325 |
24123 | 1.34M | CEFBS_None, // VMULEUD = 2326 |
24124 | 1.34M | CEFBS_None, // VMULEUH = 2327 |
24125 | 1.34M | CEFBS_None, // VMULEUW = 2328 |
24126 | 1.34M | CEFBS_None, // VMULHSD = 2329 |
24127 | 1.34M | CEFBS_None, // VMULHSW = 2330 |
24128 | 1.34M | CEFBS_None, // VMULHUD = 2331 |
24129 | 1.34M | CEFBS_None, // VMULHUW = 2332 |
24130 | 1.34M | CEFBS_None, // VMULLD = 2333 |
24131 | 1.34M | CEFBS_None, // VMULOSB = 2334 |
24132 | 1.34M | CEFBS_None, // VMULOSD = 2335 |
24133 | 1.34M | CEFBS_None, // VMULOSH = 2336 |
24134 | 1.34M | CEFBS_None, // VMULOSW = 2337 |
24135 | 1.34M | CEFBS_None, // VMULOUB = 2338 |
24136 | 1.34M | CEFBS_None, // VMULOUD = 2339 |
24137 | 1.34M | CEFBS_None, // VMULOUH = 2340 |
24138 | 1.34M | CEFBS_None, // VMULOUW = 2341 |
24139 | 1.34M | CEFBS_None, // VMULUWM = 2342 |
24140 | 1.34M | CEFBS_None, // VNAND = 2343 |
24141 | 1.34M | CEFBS_None, // VNCIPHER = 2344 |
24142 | 1.34M | CEFBS_None, // VNCIPHERLAST = 2345 |
24143 | 1.34M | CEFBS_None, // VNEGD = 2346 |
24144 | 1.34M | CEFBS_None, // VNEGW = 2347 |
24145 | 1.34M | CEFBS_None, // VNMSUBFP = 2348 |
24146 | 1.34M | CEFBS_None, // VNOR = 2349 |
24147 | 1.34M | CEFBS_None, // VOR = 2350 |
24148 | 1.34M | CEFBS_None, // VORC = 2351 |
24149 | 1.34M | CEFBS_None, // VPDEPD = 2352 |
24150 | 1.34M | CEFBS_None, // VPERM = 2353 |
24151 | 1.34M | CEFBS_None, // VPERMR = 2354 |
24152 | 1.34M | CEFBS_None, // VPERMXOR = 2355 |
24153 | 1.34M | CEFBS_None, // VPEXTD = 2356 |
24154 | 1.34M | CEFBS_None, // VPKPX = 2357 |
24155 | 1.34M | CEFBS_None, // VPKSDSS = 2358 |
24156 | 1.34M | CEFBS_None, // VPKSDUS = 2359 |
24157 | 1.34M | CEFBS_None, // VPKSHSS = 2360 |
24158 | 1.34M | CEFBS_None, // VPKSHUS = 2361 |
24159 | 1.34M | CEFBS_None, // VPKSWSS = 2362 |
24160 | 1.34M | CEFBS_None, // VPKSWUS = 2363 |
24161 | 1.34M | CEFBS_None, // VPKUDUM = 2364 |
24162 | 1.34M | CEFBS_None, // VPKUDUS = 2365 |
24163 | 1.34M | CEFBS_None, // VPKUHUM = 2366 |
24164 | 1.34M | CEFBS_None, // VPKUHUS = 2367 |
24165 | 1.34M | CEFBS_None, // VPKUWUM = 2368 |
24166 | 1.34M | CEFBS_None, // VPKUWUS = 2369 |
24167 | 1.34M | CEFBS_None, // VPMSUMB = 2370 |
24168 | 1.34M | CEFBS_None, // VPMSUMD = 2371 |
24169 | 1.34M | CEFBS_None, // VPMSUMH = 2372 |
24170 | 1.34M | CEFBS_None, // VPMSUMW = 2373 |
24171 | 1.34M | CEFBS_None, // VPOPCNTB = 2374 |
24172 | 1.34M | CEFBS_None, // VPOPCNTD = 2375 |
24173 | 1.34M | CEFBS_None, // VPOPCNTH = 2376 |
24174 | 1.34M | CEFBS_None, // VPOPCNTW = 2377 |
24175 | 1.34M | CEFBS_None, // VPRTYBD = 2378 |
24176 | 1.34M | CEFBS_None, // VPRTYBQ = 2379 |
24177 | 1.34M | CEFBS_None, // VPRTYBW = 2380 |
24178 | 1.34M | CEFBS_None, // VREFP = 2381 |
24179 | 1.34M | CEFBS_None, // VRFIM = 2382 |
24180 | 1.34M | CEFBS_None, // VRFIN = 2383 |
24181 | 1.34M | CEFBS_None, // VRFIP = 2384 |
24182 | 1.34M | CEFBS_None, // VRFIZ = 2385 |
24183 | 1.34M | CEFBS_None, // VRLB = 2386 |
24184 | 1.34M | CEFBS_None, // VRLD = 2387 |
24185 | 1.34M | CEFBS_None, // VRLDMI = 2388 |
24186 | 1.34M | CEFBS_None, // VRLDNM = 2389 |
24187 | 1.34M | CEFBS_None, // VRLH = 2390 |
24188 | 1.34M | CEFBS_None, // VRLQ = 2391 |
24189 | 1.34M | CEFBS_None, // VRLQMI = 2392 |
24190 | 1.34M | CEFBS_None, // VRLQNM = 2393 |
24191 | 1.34M | CEFBS_None, // VRLW = 2394 |
24192 | 1.34M | CEFBS_None, // VRLWMI = 2395 |
24193 | 1.34M | CEFBS_None, // VRLWNM = 2396 |
24194 | 1.34M | CEFBS_None, // VRSQRTEFP = 2397 |
24195 | 1.34M | CEFBS_None, // VSBOX = 2398 |
24196 | 1.34M | CEFBS_None, // VSEL = 2399 |
24197 | 1.34M | CEFBS_None, // VSHASIGMAD = 2400 |
24198 | 1.34M | CEFBS_None, // VSHASIGMAW = 2401 |
24199 | 1.34M | CEFBS_None, // VSL = 2402 |
24200 | 1.34M | CEFBS_None, // VSLB = 2403 |
24201 | 1.34M | CEFBS_None, // VSLD = 2404 |
24202 | 1.34M | CEFBS_None, // VSLDBI = 2405 |
24203 | 1.34M | CEFBS_None, // VSLDOI = 2406 |
24204 | 1.34M | CEFBS_None, // VSLH = 2407 |
24205 | 1.34M | CEFBS_None, // VSLO = 2408 |
24206 | 1.34M | CEFBS_None, // VSLQ = 2409 |
24207 | 1.34M | CEFBS_None, // VSLV = 2410 |
24208 | 1.34M | CEFBS_None, // VSLW = 2411 |
24209 | 1.34M | CEFBS_None, // VSPLTB = 2412 |
24210 | 1.34M | CEFBS_None, // VSPLTBs = 2413 |
24211 | 1.34M | CEFBS_None, // VSPLTH = 2414 |
24212 | 1.34M | CEFBS_None, // VSPLTHs = 2415 |
24213 | 1.34M | CEFBS_None, // VSPLTISB = 2416 |
24214 | 1.34M | CEFBS_None, // VSPLTISH = 2417 |
24215 | 1.34M | CEFBS_None, // VSPLTISW = 2418 |
24216 | 1.34M | CEFBS_None, // VSPLTW = 2419 |
24217 | 1.34M | CEFBS_None, // VSR = 2420 |
24218 | 1.34M | CEFBS_None, // VSRAB = 2421 |
24219 | 1.34M | CEFBS_None, // VSRAD = 2422 |
24220 | 1.34M | CEFBS_None, // VSRAH = 2423 |
24221 | 1.34M | CEFBS_None, // VSRAQ = 2424 |
24222 | 1.34M | CEFBS_None, // VSRAW = 2425 |
24223 | 1.34M | CEFBS_None, // VSRB = 2426 |
24224 | 1.34M | CEFBS_None, // VSRD = 2427 |
24225 | 1.34M | CEFBS_None, // VSRDBI = 2428 |
24226 | 1.34M | CEFBS_None, // VSRH = 2429 |
24227 | 1.34M | CEFBS_None, // VSRO = 2430 |
24228 | 1.34M | CEFBS_None, // VSRQ = 2431 |
24229 | 1.34M | CEFBS_None, // VSRV = 2432 |
24230 | 1.34M | CEFBS_None, // VSRW = 2433 |
24231 | 1.34M | CEFBS_None, // VSTRIBL = 2434 |
24232 | 1.34M | CEFBS_None, // VSTRIBL_rec = 2435 |
24233 | 1.34M | CEFBS_None, // VSTRIBR = 2436 |
24234 | 1.34M | CEFBS_None, // VSTRIBR_rec = 2437 |
24235 | 1.34M | CEFBS_None, // VSTRIHL = 2438 |
24236 | 1.34M | CEFBS_None, // VSTRIHL_rec = 2439 |
24237 | 1.34M | CEFBS_None, // VSTRIHR = 2440 |
24238 | 1.34M | CEFBS_None, // VSTRIHR_rec = 2441 |
24239 | 1.34M | CEFBS_None, // VSUBCUQ = 2442 |
24240 | 1.34M | CEFBS_None, // VSUBCUW = 2443 |
24241 | 1.34M | CEFBS_None, // VSUBECUQ = 2444 |
24242 | 1.34M | CEFBS_None, // VSUBEUQM = 2445 |
24243 | 1.34M | CEFBS_None, // VSUBFP = 2446 |
24244 | 1.34M | CEFBS_None, // VSUBSBS = 2447 |
24245 | 1.34M | CEFBS_None, // VSUBSHS = 2448 |
24246 | 1.34M | CEFBS_None, // VSUBSWS = 2449 |
24247 | 1.34M | CEFBS_None, // VSUBUBM = 2450 |
24248 | 1.34M | CEFBS_None, // VSUBUBS = 2451 |
24249 | 1.34M | CEFBS_None, // VSUBUDM = 2452 |
24250 | 1.34M | CEFBS_None, // VSUBUHM = 2453 |
24251 | 1.34M | CEFBS_None, // VSUBUHS = 2454 |
24252 | 1.34M | CEFBS_None, // VSUBUQM = 2455 |
24253 | 1.34M | CEFBS_None, // VSUBUWM = 2456 |
24254 | 1.34M | CEFBS_None, // VSUBUWS = 2457 |
24255 | 1.34M | CEFBS_None, // VSUM2SWS = 2458 |
24256 | 1.34M | CEFBS_None, // VSUM4SBS = 2459 |
24257 | 1.34M | CEFBS_None, // VSUM4SHS = 2460 |
24258 | 1.34M | CEFBS_None, // VSUM4UBS = 2461 |
24259 | 1.34M | CEFBS_None, // VSUMSWS = 2462 |
24260 | 1.34M | CEFBS_None, // VUPKHPX = 2463 |
24261 | 1.34M | CEFBS_None, // VUPKHSB = 2464 |
24262 | 1.34M | CEFBS_None, // VUPKHSH = 2465 |
24263 | 1.34M | CEFBS_None, // VUPKHSW = 2466 |
24264 | 1.34M | CEFBS_None, // VUPKLPX = 2467 |
24265 | 1.34M | CEFBS_None, // VUPKLSB = 2468 |
24266 | 1.34M | CEFBS_None, // VUPKLSH = 2469 |
24267 | 1.34M | CEFBS_None, // VUPKLSW = 2470 |
24268 | 1.34M | CEFBS_None, // VXOR = 2471 |
24269 | 1.34M | CEFBS_None, // V_SET0 = 2472 |
24270 | 1.34M | CEFBS_None, // V_SET0B = 2473 |
24271 | 1.34M | CEFBS_None, // V_SET0H = 2474 |
24272 | 1.34M | CEFBS_None, // V_SETALLONES = 2475 |
24273 | 1.34M | CEFBS_None, // V_SETALLONESB = 2476 |
24274 | 1.34M | CEFBS_None, // V_SETALLONESH = 2477 |
24275 | 1.34M | CEFBS_None, // WAIT = 2478 |
24276 | 1.34M | CEFBS_None, // WAITP10 = 2479 |
24277 | 1.34M | CEFBS_None, // WRTEE = 2480 |
24278 | 1.34M | CEFBS_None, // WRTEEI = 2481 |
24279 | 1.34M | CEFBS_None, // XOR = 2482 |
24280 | 1.34M | CEFBS_None, // XOR8 = 2483 |
24281 | 1.34M | CEFBS_None, // XOR8_rec = 2484 |
24282 | 1.34M | CEFBS_None, // XORI = 2485 |
24283 | 1.34M | CEFBS_None, // XORI8 = 2486 |
24284 | 1.34M | CEFBS_None, // XORIS = 2487 |
24285 | 1.34M | CEFBS_None, // XORIS8 = 2488 |
24286 | 1.34M | CEFBS_None, // XOR_rec = 2489 |
24287 | 1.34M | CEFBS_None, // XSABSDP = 2490 |
24288 | 1.34M | CEFBS_None, // XSABSQP = 2491 |
24289 | 1.34M | CEFBS_None, // XSADDDP = 2492 |
24290 | 1.34M | CEFBS_None, // XSADDQP = 2493 |
24291 | 1.34M | CEFBS_None, // XSADDQPO = 2494 |
24292 | 1.34M | CEFBS_None, // XSADDSP = 2495 |
24293 | 1.34M | CEFBS_None, // XSCMPEQDP = 2496 |
24294 | 1.34M | CEFBS_None, // XSCMPEQQP = 2497 |
24295 | 1.34M | CEFBS_None, // XSCMPEXPDP = 2498 |
24296 | 1.34M | CEFBS_None, // XSCMPEXPQP = 2499 |
24297 | 1.34M | CEFBS_None, // XSCMPGEDP = 2500 |
24298 | 1.34M | CEFBS_None, // XSCMPGEQP = 2501 |
24299 | 1.34M | CEFBS_None, // XSCMPGTDP = 2502 |
24300 | 1.34M | CEFBS_None, // XSCMPGTQP = 2503 |
24301 | 1.34M | CEFBS_None, // XSCMPODP = 2504 |
24302 | 1.34M | CEFBS_None, // XSCMPOQP = 2505 |
24303 | 1.34M | CEFBS_None, // XSCMPUDP = 2506 |
24304 | 1.34M | CEFBS_None, // XSCMPUQP = 2507 |
24305 | 1.34M | CEFBS_None, // XSCPSGNDP = 2508 |
24306 | 1.34M | CEFBS_None, // XSCPSGNQP = 2509 |
24307 | 1.34M | CEFBS_None, // XSCVDPHP = 2510 |
24308 | 1.34M | CEFBS_None, // XSCVDPQP = 2511 |
24309 | 1.34M | CEFBS_None, // XSCVDPSP = 2512 |
24310 | 1.34M | CEFBS_None, // XSCVDPSPN = 2513 |
24311 | 1.34M | CEFBS_None, // XSCVDPSXDS = 2514 |
24312 | 1.34M | CEFBS_None, // XSCVDPSXDSs = 2515 |
24313 | 1.34M | CEFBS_None, // XSCVDPSXWS = 2516 |
24314 | 1.34M | CEFBS_None, // XSCVDPSXWSs = 2517 |
24315 | 1.34M | CEFBS_None, // XSCVDPUXDS = 2518 |
24316 | 1.34M | CEFBS_None, // XSCVDPUXDSs = 2519 |
24317 | 1.34M | CEFBS_None, // XSCVDPUXWS = 2520 |
24318 | 1.34M | CEFBS_None, // XSCVDPUXWSs = 2521 |
24319 | 1.34M | CEFBS_None, // XSCVHPDP = 2522 |
24320 | 1.34M | CEFBS_None, // XSCVQPDP = 2523 |
24321 | 1.34M | CEFBS_None, // XSCVQPDPO = 2524 |
24322 | 1.34M | CEFBS_None, // XSCVQPSDZ = 2525 |
24323 | 1.34M | CEFBS_None, // XSCVQPSQZ = 2526 |
24324 | 1.34M | CEFBS_None, // XSCVQPSWZ = 2527 |
24325 | 1.34M | CEFBS_None, // XSCVQPUDZ = 2528 |
24326 | 1.34M | CEFBS_None, // XSCVQPUQZ = 2529 |
24327 | 1.34M | CEFBS_None, // XSCVQPUWZ = 2530 |
24328 | 1.34M | CEFBS_None, // XSCVSDQP = 2531 |
24329 | 1.34M | CEFBS_None, // XSCVSPDP = 2532 |
24330 | 1.34M | CEFBS_None, // XSCVSPDPN = 2533 |
24331 | 1.34M | CEFBS_None, // XSCVSQQP = 2534 |
24332 | 1.34M | CEFBS_None, // XSCVSXDDP = 2535 |
24333 | 1.34M | CEFBS_None, // XSCVSXDSP = 2536 |
24334 | 1.34M | CEFBS_None, // XSCVUDQP = 2537 |
24335 | 1.34M | CEFBS_None, // XSCVUQQP = 2538 |
24336 | 1.34M | CEFBS_None, // XSCVUXDDP = 2539 |
24337 | 1.34M | CEFBS_None, // XSCVUXDSP = 2540 |
24338 | 1.34M | CEFBS_None, // XSDIVDP = 2541 |
24339 | 1.34M | CEFBS_None, // XSDIVQP = 2542 |
24340 | 1.34M | CEFBS_None, // XSDIVQPO = 2543 |
24341 | 1.34M | CEFBS_None, // XSDIVSP = 2544 |
24342 | 1.34M | CEFBS_None, // XSIEXPDP = 2545 |
24343 | 1.34M | CEFBS_None, // XSIEXPQP = 2546 |
24344 | 1.34M | CEFBS_None, // XSMADDADP = 2547 |
24345 | 1.34M | CEFBS_None, // XSMADDASP = 2548 |
24346 | 1.34M | CEFBS_None, // XSMADDMDP = 2549 |
24347 | 1.34M | CEFBS_None, // XSMADDMSP = 2550 |
24348 | 1.34M | CEFBS_None, // XSMADDQP = 2551 |
24349 | 1.34M | CEFBS_None, // XSMADDQPO = 2552 |
24350 | 1.34M | CEFBS_None, // XSMAXCDP = 2553 |
24351 | 1.34M | CEFBS_None, // XSMAXCQP = 2554 |
24352 | 1.34M | CEFBS_None, // XSMAXDP = 2555 |
24353 | 1.34M | CEFBS_None, // XSMAXJDP = 2556 |
24354 | 1.34M | CEFBS_None, // XSMINCDP = 2557 |
24355 | 1.34M | CEFBS_None, // XSMINCQP = 2558 |
24356 | 1.34M | CEFBS_None, // XSMINDP = 2559 |
24357 | 1.34M | CEFBS_None, // XSMINJDP = 2560 |
24358 | 1.34M | CEFBS_None, // XSMSUBADP = 2561 |
24359 | 1.34M | CEFBS_None, // XSMSUBASP = 2562 |
24360 | 1.34M | CEFBS_None, // XSMSUBMDP = 2563 |
24361 | 1.34M | CEFBS_None, // XSMSUBMSP = 2564 |
24362 | 1.34M | CEFBS_None, // XSMSUBQP = 2565 |
24363 | 1.34M | CEFBS_None, // XSMSUBQPO = 2566 |
24364 | 1.34M | CEFBS_None, // XSMULDP = 2567 |
24365 | 1.34M | CEFBS_None, // XSMULQP = 2568 |
24366 | 1.34M | CEFBS_None, // XSMULQPO = 2569 |
24367 | 1.34M | CEFBS_None, // XSMULSP = 2570 |
24368 | 1.34M | CEFBS_None, // XSNABSDP = 2571 |
24369 | 1.34M | CEFBS_None, // XSNABSDPs = 2572 |
24370 | 1.34M | CEFBS_None, // XSNABSQP = 2573 |
24371 | 1.34M | CEFBS_None, // XSNEGDP = 2574 |
24372 | 1.34M | CEFBS_None, // XSNEGQP = 2575 |
24373 | 1.34M | CEFBS_None, // XSNMADDADP = 2576 |
24374 | 1.34M | CEFBS_None, // XSNMADDASP = 2577 |
24375 | 1.34M | CEFBS_None, // XSNMADDMDP = 2578 |
24376 | 1.34M | CEFBS_None, // XSNMADDMSP = 2579 |
24377 | 1.34M | CEFBS_None, // XSNMADDQP = 2580 |
24378 | 1.34M | CEFBS_None, // XSNMADDQPO = 2581 |
24379 | 1.34M | CEFBS_None, // XSNMSUBADP = 2582 |
24380 | 1.34M | CEFBS_None, // XSNMSUBASP = 2583 |
24381 | 1.34M | CEFBS_None, // XSNMSUBMDP = 2584 |
24382 | 1.34M | CEFBS_None, // XSNMSUBMSP = 2585 |
24383 | 1.34M | CEFBS_None, // XSNMSUBQP = 2586 |
24384 | 1.34M | CEFBS_None, // XSNMSUBQPO = 2587 |
24385 | 1.34M | CEFBS_None, // XSRDPI = 2588 |
24386 | 1.34M | CEFBS_None, // XSRDPIC = 2589 |
24387 | 1.34M | CEFBS_None, // XSRDPIM = 2590 |
24388 | 1.34M | CEFBS_None, // XSRDPIP = 2591 |
24389 | 1.34M | CEFBS_None, // XSRDPIZ = 2592 |
24390 | 1.34M | CEFBS_None, // XSREDP = 2593 |
24391 | 1.34M | CEFBS_None, // XSRESP = 2594 |
24392 | 1.34M | CEFBS_None, // XSRQPI = 2595 |
24393 | 1.34M | CEFBS_None, // XSRQPIX = 2596 |
24394 | 1.34M | CEFBS_None, // XSRQPXP = 2597 |
24395 | 1.34M | CEFBS_None, // XSRSP = 2598 |
24396 | 1.34M | CEFBS_None, // XSRSQRTEDP = 2599 |
24397 | 1.34M | CEFBS_None, // XSRSQRTESP = 2600 |
24398 | 1.34M | CEFBS_None, // XSSQRTDP = 2601 |
24399 | 1.34M | CEFBS_None, // XSSQRTQP = 2602 |
24400 | 1.34M | CEFBS_None, // XSSQRTQPO = 2603 |
24401 | 1.34M | CEFBS_None, // XSSQRTSP = 2604 |
24402 | 1.34M | CEFBS_None, // XSSUBDP = 2605 |
24403 | 1.34M | CEFBS_None, // XSSUBQP = 2606 |
24404 | 1.34M | CEFBS_None, // XSSUBQPO = 2607 |
24405 | 1.34M | CEFBS_None, // XSSUBSP = 2608 |
24406 | 1.34M | CEFBS_None, // XSTDIVDP = 2609 |
24407 | 1.34M | CEFBS_None, // XSTSQRTDP = 2610 |
24408 | 1.34M | CEFBS_None, // XSTSTDCDP = 2611 |
24409 | 1.34M | CEFBS_None, // XSTSTDCQP = 2612 |
24410 | 1.34M | CEFBS_None, // XSTSTDCSP = 2613 |
24411 | 1.34M | CEFBS_None, // XSXEXPDP = 2614 |
24412 | 1.34M | CEFBS_None, // XSXEXPQP = 2615 |
24413 | 1.34M | CEFBS_None, // XSXSIGDP = 2616 |
24414 | 1.34M | CEFBS_None, // XSXSIGQP = 2617 |
24415 | 1.34M | CEFBS_None, // XVABSDP = 2618 |
24416 | 1.34M | CEFBS_None, // XVABSSP = 2619 |
24417 | 1.34M | CEFBS_None, // XVADDDP = 2620 |
24418 | 1.34M | CEFBS_None, // XVADDSP = 2621 |
24419 | 1.34M | CEFBS_None, // XVBF16GER2 = 2622 |
24420 | 1.34M | CEFBS_None, // XVBF16GER2NN = 2623 |
24421 | 1.34M | CEFBS_None, // XVBF16GER2NP = 2624 |
24422 | 1.34M | CEFBS_None, // XVBF16GER2PN = 2625 |
24423 | 1.34M | CEFBS_None, // XVBF16GER2PP = 2626 |
24424 | 1.34M | CEFBS_None, // XVBF16GER2W = 2627 |
24425 | 1.34M | CEFBS_None, // XVBF16GER2WNN = 2628 |
24426 | 1.34M | CEFBS_None, // XVBF16GER2WNP = 2629 |
24427 | 1.34M | CEFBS_None, // XVBF16GER2WPN = 2630 |
24428 | 1.34M | CEFBS_None, // XVBF16GER2WPP = 2631 |
24429 | 1.34M | CEFBS_None, // XVCMPEQDP = 2632 |
24430 | 1.34M | CEFBS_None, // XVCMPEQDP_rec = 2633 |
24431 | 1.34M | CEFBS_None, // XVCMPEQSP = 2634 |
24432 | 1.34M | CEFBS_None, // XVCMPEQSP_rec = 2635 |
24433 | 1.34M | CEFBS_None, // XVCMPGEDP = 2636 |
24434 | 1.34M | CEFBS_None, // XVCMPGEDP_rec = 2637 |
24435 | 1.34M | CEFBS_None, // XVCMPGESP = 2638 |
24436 | 1.34M | CEFBS_None, // XVCMPGESP_rec = 2639 |
24437 | 1.34M | CEFBS_None, // XVCMPGTDP = 2640 |
24438 | 1.34M | CEFBS_None, // XVCMPGTDP_rec = 2641 |
24439 | 1.34M | CEFBS_None, // XVCMPGTSP = 2642 |
24440 | 1.34M | CEFBS_None, // XVCMPGTSP_rec = 2643 |
24441 | 1.34M | CEFBS_None, // XVCPSGNDP = 2644 |
24442 | 1.34M | CEFBS_None, // XVCPSGNSP = 2645 |
24443 | 1.34M | CEFBS_None, // XVCVBF16SPN = 2646 |
24444 | 1.34M | CEFBS_None, // XVCVDPSP = 2647 |
24445 | 1.34M | CEFBS_None, // XVCVDPSXDS = 2648 |
24446 | 1.34M | CEFBS_None, // XVCVDPSXWS = 2649 |
24447 | 1.34M | CEFBS_None, // XVCVDPUXDS = 2650 |
24448 | 1.34M | CEFBS_None, // XVCVDPUXWS = 2651 |
24449 | 1.34M | CEFBS_None, // XVCVHPSP = 2652 |
24450 | 1.34M | CEFBS_None, // XVCVSPBF16 = 2653 |
24451 | 1.34M | CEFBS_None, // XVCVSPDP = 2654 |
24452 | 1.34M | CEFBS_None, // XVCVSPHP = 2655 |
24453 | 1.34M | CEFBS_None, // XVCVSPSXDS = 2656 |
24454 | 1.34M | CEFBS_None, // XVCVSPSXWS = 2657 |
24455 | 1.34M | CEFBS_None, // XVCVSPUXDS = 2658 |
24456 | 1.34M | CEFBS_None, // XVCVSPUXWS = 2659 |
24457 | 1.34M | CEFBS_None, // XVCVSXDDP = 2660 |
24458 | 1.34M | CEFBS_None, // XVCVSXDSP = 2661 |
24459 | 1.34M | CEFBS_None, // XVCVSXWDP = 2662 |
24460 | 1.34M | CEFBS_None, // XVCVSXWSP = 2663 |
24461 | 1.34M | CEFBS_None, // XVCVUXDDP = 2664 |
24462 | 1.34M | CEFBS_None, // XVCVUXDSP = 2665 |
24463 | 1.34M | CEFBS_None, // XVCVUXWDP = 2666 |
24464 | 1.34M | CEFBS_None, // XVCVUXWSP = 2667 |
24465 | 1.34M | CEFBS_None, // XVDIVDP = 2668 |
24466 | 1.34M | CEFBS_None, // XVDIVSP = 2669 |
24467 | 1.34M | CEFBS_None, // XVF16GER2 = 2670 |
24468 | 1.34M | CEFBS_None, // XVF16GER2NN = 2671 |
24469 | 1.34M | CEFBS_None, // XVF16GER2NP = 2672 |
24470 | 1.34M | CEFBS_None, // XVF16GER2PN = 2673 |
24471 | 1.34M | CEFBS_None, // XVF16GER2PP = 2674 |
24472 | 1.34M | CEFBS_None, // XVF16GER2W = 2675 |
24473 | 1.34M | CEFBS_None, // XVF16GER2WNN = 2676 |
24474 | 1.34M | CEFBS_None, // XVF16GER2WNP = 2677 |
24475 | 1.34M | CEFBS_None, // XVF16GER2WPN = 2678 |
24476 | 1.34M | CEFBS_None, // XVF16GER2WPP = 2679 |
24477 | 1.34M | CEFBS_None, // XVF32GER = 2680 |
24478 | 1.34M | CEFBS_None, // XVF32GERNN = 2681 |
24479 | 1.34M | CEFBS_None, // XVF32GERNP = 2682 |
24480 | 1.34M | CEFBS_None, // XVF32GERPN = 2683 |
24481 | 1.34M | CEFBS_None, // XVF32GERPP = 2684 |
24482 | 1.34M | CEFBS_None, // XVF32GERW = 2685 |
24483 | 1.34M | CEFBS_None, // XVF32GERWNN = 2686 |
24484 | 1.34M | CEFBS_None, // XVF32GERWNP = 2687 |
24485 | 1.34M | CEFBS_None, // XVF32GERWPN = 2688 |
24486 | 1.34M | CEFBS_None, // XVF32GERWPP = 2689 |
24487 | 1.34M | CEFBS_None, // XVF64GER = 2690 |
24488 | 1.34M | CEFBS_None, // XVF64GERNN = 2691 |
24489 | 1.34M | CEFBS_None, // XVF64GERNP = 2692 |
24490 | 1.34M | CEFBS_None, // XVF64GERPN = 2693 |
24491 | 1.34M | CEFBS_None, // XVF64GERPP = 2694 |
24492 | 1.34M | CEFBS_None, // XVF64GERW = 2695 |
24493 | 1.34M | CEFBS_None, // XVF64GERWNN = 2696 |
24494 | 1.34M | CEFBS_None, // XVF64GERWNP = 2697 |
24495 | 1.34M | CEFBS_None, // XVF64GERWPN = 2698 |
24496 | 1.34M | CEFBS_None, // XVF64GERWPP = 2699 |
24497 | 1.34M | CEFBS_None, // XVI16GER2 = 2700 |
24498 | 1.34M | CEFBS_None, // XVI16GER2PP = 2701 |
24499 | 1.34M | CEFBS_None, // XVI16GER2S = 2702 |
24500 | 1.34M | CEFBS_None, // XVI16GER2SPP = 2703 |
24501 | 1.34M | CEFBS_None, // XVI16GER2SW = 2704 |
24502 | 1.34M | CEFBS_None, // XVI16GER2SWPP = 2705 |
24503 | 1.34M | CEFBS_None, // XVI16GER2W = 2706 |
24504 | 1.34M | CEFBS_None, // XVI16GER2WPP = 2707 |
24505 | 1.34M | CEFBS_None, // XVI4GER8 = 2708 |
24506 | 1.34M | CEFBS_None, // XVI4GER8PP = 2709 |
24507 | 1.34M | CEFBS_None, // XVI4GER8W = 2710 |
24508 | 1.34M | CEFBS_None, // XVI4GER8WPP = 2711 |
24509 | 1.34M | CEFBS_None, // XVI8GER4 = 2712 |
24510 | 1.34M | CEFBS_None, // XVI8GER4PP = 2713 |
24511 | 1.34M | CEFBS_None, // XVI8GER4SPP = 2714 |
24512 | 1.34M | CEFBS_None, // XVI8GER4W = 2715 |
24513 | 1.34M | CEFBS_None, // XVI8GER4WPP = 2716 |
24514 | 1.34M | CEFBS_None, // XVI8GER4WSPP = 2717 |
24515 | 1.34M | CEFBS_None, // XVIEXPDP = 2718 |
24516 | 1.34M | CEFBS_None, // XVIEXPSP = 2719 |
24517 | 1.34M | CEFBS_None, // XVMADDADP = 2720 |
24518 | 1.34M | CEFBS_None, // XVMADDASP = 2721 |
24519 | 1.34M | CEFBS_None, // XVMADDMDP = 2722 |
24520 | 1.34M | CEFBS_None, // XVMADDMSP = 2723 |
24521 | 1.34M | CEFBS_None, // XVMAXDP = 2724 |
24522 | 1.34M | CEFBS_None, // XVMAXSP = 2725 |
24523 | 1.34M | CEFBS_None, // XVMINDP = 2726 |
24524 | 1.34M | CEFBS_None, // XVMINSP = 2727 |
24525 | 1.34M | CEFBS_None, // XVMSUBADP = 2728 |
24526 | 1.34M | CEFBS_None, // XVMSUBASP = 2729 |
24527 | 1.34M | CEFBS_None, // XVMSUBMDP = 2730 |
24528 | 1.34M | CEFBS_None, // XVMSUBMSP = 2731 |
24529 | 1.34M | CEFBS_None, // XVMULDP = 2732 |
24530 | 1.34M | CEFBS_None, // XVMULSP = 2733 |
24531 | 1.34M | CEFBS_None, // XVNABSDP = 2734 |
24532 | 1.34M | CEFBS_None, // XVNABSSP = 2735 |
24533 | 1.34M | CEFBS_None, // XVNEGDP = 2736 |
24534 | 1.34M | CEFBS_None, // XVNEGSP = 2737 |
24535 | 1.34M | CEFBS_None, // XVNMADDADP = 2738 |
24536 | 1.34M | CEFBS_None, // XVNMADDASP = 2739 |
24537 | 1.34M | CEFBS_None, // XVNMADDMDP = 2740 |
24538 | 1.34M | CEFBS_None, // XVNMADDMSP = 2741 |
24539 | 1.34M | CEFBS_None, // XVNMSUBADP = 2742 |
24540 | 1.34M | CEFBS_None, // XVNMSUBASP = 2743 |
24541 | 1.34M | CEFBS_None, // XVNMSUBMDP = 2744 |
24542 | 1.34M | CEFBS_None, // XVNMSUBMSP = 2745 |
24543 | 1.34M | CEFBS_None, // XVRDPI = 2746 |
24544 | 1.34M | CEFBS_None, // XVRDPIC = 2747 |
24545 | 1.34M | CEFBS_None, // XVRDPIM = 2748 |
24546 | 1.34M | CEFBS_None, // XVRDPIP = 2749 |
24547 | 1.34M | CEFBS_None, // XVRDPIZ = 2750 |
24548 | 1.34M | CEFBS_None, // XVREDP = 2751 |
24549 | 1.34M | CEFBS_None, // XVRESP = 2752 |
24550 | 1.34M | CEFBS_None, // XVRSPI = 2753 |
24551 | 1.34M | CEFBS_None, // XVRSPIC = 2754 |
24552 | 1.34M | CEFBS_None, // XVRSPIM = 2755 |
24553 | 1.34M | CEFBS_None, // XVRSPIP = 2756 |
24554 | 1.34M | CEFBS_None, // XVRSPIZ = 2757 |
24555 | 1.34M | CEFBS_None, // XVRSQRTEDP = 2758 |
24556 | 1.34M | CEFBS_None, // XVRSQRTESP = 2759 |
24557 | 1.34M | CEFBS_None, // XVSQRTDP = 2760 |
24558 | 1.34M | CEFBS_None, // XVSQRTSP = 2761 |
24559 | 1.34M | CEFBS_None, // XVSUBDP = 2762 |
24560 | 1.34M | CEFBS_None, // XVSUBSP = 2763 |
24561 | 1.34M | CEFBS_None, // XVTDIVDP = 2764 |
24562 | 1.34M | CEFBS_None, // XVTDIVSP = 2765 |
24563 | 1.34M | CEFBS_None, // XVTLSBB = 2766 |
24564 | 1.34M | CEFBS_None, // XVTSQRTDP = 2767 |
24565 | 1.34M | CEFBS_None, // XVTSQRTSP = 2768 |
24566 | 1.34M | CEFBS_None, // XVTSTDCDP = 2769 |
24567 | 1.34M | CEFBS_None, // XVTSTDCSP = 2770 |
24568 | 1.34M | CEFBS_None, // XVXEXPDP = 2771 |
24569 | 1.34M | CEFBS_None, // XVXEXPSP = 2772 |
24570 | 1.34M | CEFBS_None, // XVXSIGDP = 2773 |
24571 | 1.34M | CEFBS_None, // XVXSIGSP = 2774 |
24572 | 1.34M | CEFBS_None, // XXBLENDVB = 2775 |
24573 | 1.34M | CEFBS_None, // XXBLENDVD = 2776 |
24574 | 1.34M | CEFBS_None, // XXBLENDVH = 2777 |
24575 | 1.34M | CEFBS_None, // XXBLENDVW = 2778 |
24576 | 1.34M | CEFBS_None, // XXBRD = 2779 |
24577 | 1.34M | CEFBS_None, // XXBRH = 2780 |
24578 | 1.34M | CEFBS_None, // XXBRQ = 2781 |
24579 | 1.34M | CEFBS_None, // XXBRW = 2782 |
24580 | 1.34M | CEFBS_None, // XXEVAL = 2783 |
24581 | 1.34M | CEFBS_None, // XXEXTRACTUW = 2784 |
24582 | 1.34M | CEFBS_None, // XXGENPCVBM = 2785 |
24583 | 1.34M | CEFBS_None, // XXGENPCVDM = 2786 |
24584 | 1.34M | CEFBS_None, // XXGENPCVHM = 2787 |
24585 | 1.34M | CEFBS_None, // XXGENPCVWM = 2788 |
24586 | 1.34M | CEFBS_None, // XXINSERTW = 2789 |
24587 | 1.34M | CEFBS_None, // XXLAND = 2790 |
24588 | 1.34M | CEFBS_None, // XXLANDC = 2791 |
24589 | 1.34M | CEFBS_None, // XXLEQV = 2792 |
24590 | 1.34M | CEFBS_None, // XXLEQVOnes = 2793 |
24591 | 1.34M | CEFBS_None, // XXLNAND = 2794 |
24592 | 1.34M | CEFBS_None, // XXLNOR = 2795 |
24593 | 1.34M | CEFBS_None, // XXLOR = 2796 |
24594 | 1.34M | CEFBS_None, // XXLORC = 2797 |
24595 | 1.34M | CEFBS_None, // XXLORf = 2798 |
24596 | 1.34M | CEFBS_None, // XXLXOR = 2799 |
24597 | 1.34M | CEFBS_None, // XXLXORdpz = 2800 |
24598 | 1.34M | CEFBS_None, // XXLXORspz = 2801 |
24599 | 1.34M | CEFBS_None, // XXLXORz = 2802 |
24600 | 1.34M | CEFBS_None, // XXMFACC = 2803 |
24601 | 1.34M | CEFBS_None, // XXMFACCW = 2804 |
24602 | 1.34M | CEFBS_None, // XXMRGHW = 2805 |
24603 | 1.34M | CEFBS_None, // XXMRGLW = 2806 |
24604 | 1.34M | CEFBS_None, // XXMTACC = 2807 |
24605 | 1.34M | CEFBS_None, // XXMTACCW = 2808 |
24606 | 1.34M | CEFBS_None, // XXPERM = 2809 |
24607 | 1.34M | CEFBS_None, // XXPERMDI = 2810 |
24608 | 1.34M | CEFBS_None, // XXPERMDIs = 2811 |
24609 | 1.34M | CEFBS_None, // XXPERMR = 2812 |
24610 | 1.34M | CEFBS_None, // XXPERMX = 2813 |
24611 | 1.34M | CEFBS_None, // XXSEL = 2814 |
24612 | 1.34M | CEFBS_None, // XXSETACCZ = 2815 |
24613 | 1.34M | CEFBS_None, // XXSETACCZW = 2816 |
24614 | 1.34M | CEFBS_None, // XXSLDWI = 2817 |
24615 | 1.34M | CEFBS_None, // XXSLDWIs = 2818 |
24616 | 1.34M | CEFBS_None, // XXSPLTI32DX = 2819 |
24617 | 1.34M | CEFBS_None, // XXSPLTIB = 2820 |
24618 | 1.34M | CEFBS_None, // XXSPLTIDP = 2821 |
24619 | 1.34M | CEFBS_None, // XXSPLTIW = 2822 |
24620 | 1.34M | CEFBS_None, // XXSPLTW = 2823 |
24621 | 1.34M | CEFBS_None, // XXSPLTWs = 2824 |
24622 | 1.34M | CEFBS_None, // gBC = 2825 |
24623 | 1.34M | CEFBS_None, // gBCA = 2826 |
24624 | 1.34M | CEFBS_None, // gBCAat = 2827 |
24625 | 1.34M | CEFBS_None, // gBCCTR = 2828 |
24626 | 1.34M | CEFBS_None, // gBCCTRL = 2829 |
24627 | 1.34M | CEFBS_None, // gBCL = 2830 |
24628 | 1.34M | CEFBS_None, // gBCLA = 2831 |
24629 | 1.34M | CEFBS_None, // gBCLAat = 2832 |
24630 | 1.34M | CEFBS_None, // gBCLR = 2833 |
24631 | 1.34M | CEFBS_None, // gBCLRL = 2834 |
24632 | 1.34M | CEFBS_None, // gBCLat = 2835 |
24633 | 1.34M | CEFBS_None, // gBCat = 2836 |
24634 | 1.34M | }; |
24635 | | |
24636 | 1.34M | assert(Opcode < 2837); |
24637 | 0 | return FeatureBitsets[RequiredFeaturesRefs[Opcode]]; |
24638 | 1.34M | } |
24639 | | |
24640 | | } // end namespace PPC_MC |
24641 | | } // end namespace llvm |
24642 | | #endif // GET_COMPUTE_FEATURES |
24643 | | |
24644 | | #ifdef GET_AVAILABLE_OPCODE_CHECKER |
24645 | | #undef GET_AVAILABLE_OPCODE_CHECKER |
24646 | | namespace llvm { |
24647 | | namespace PPC_MC { |
24648 | | bool isOpcodeAvailable(unsigned Opcode, const FeatureBitset &Features) { |
24649 | | FeatureBitset AvailableFeatures = computeAvailableFeatures(Features); |
24650 | | FeatureBitset RequiredFeatures = computeRequiredFeatures(Opcode); |
24651 | | FeatureBitset MissingFeatures = |
24652 | | (AvailableFeatures & RequiredFeatures) ^ |
24653 | | RequiredFeatures; |
24654 | | return !MissingFeatures.any(); |
24655 | | } |
24656 | | } // end namespace PPC_MC |
24657 | | } // end namespace llvm |
24658 | | #endif // GET_AVAILABLE_OPCODE_CHECKER |
24659 | | |
24660 | | #ifdef ENABLE_INSTR_PREDICATE_VERIFIER |
24661 | | #undef ENABLE_INSTR_PREDICATE_VERIFIER |
24662 | | #include <sstream> |
24663 | | |
24664 | | namespace llvm { |
24665 | | namespace PPC_MC { |
24666 | | |
24667 | | #ifndef NDEBUG |
24668 | | static const char *SubtargetFeatureNames[] = { |
24669 | | "Feature_ModernAs", |
24670 | | nullptr |
24671 | | }; |
24672 | | |
24673 | | #endif // NDEBUG |
24674 | | |
24675 | | void verifyInstructionPredicates( |
24676 | 1.34M | unsigned Opcode, const FeatureBitset &Features) { |
24677 | 1.34M | #ifndef NDEBUG |
24678 | 1.34M | FeatureBitset AvailableFeatures = computeAvailableFeatures(Features); |
24679 | 1.34M | FeatureBitset RequiredFeatures = computeRequiredFeatures(Opcode); |
24680 | 1.34M | FeatureBitset MissingFeatures = |
24681 | 1.34M | (AvailableFeatures & RequiredFeatures) ^ |
24682 | 1.34M | RequiredFeatures; |
24683 | 1.34M | if (MissingFeatures.any()) { |
24684 | 0 | std::ostringstream Msg; |
24685 | 0 | Msg << "Attempting to emit " << &PPCInstrNameData[PPCInstrNameIndices[Opcode]] |
24686 | 0 | << " instruction but the "; |
24687 | 0 | for (unsigned i = 0, e = MissingFeatures.size(); i != e; ++i) |
24688 | 0 | if (MissingFeatures.test(i)) |
24689 | 0 | Msg << SubtargetFeatureNames[i] << " "; |
24690 | 0 | Msg << "predicate(s) are not met"; |
24691 | 0 | report_fatal_error(Msg.str().c_str()); |
24692 | 0 | } |
24693 | 1.34M | #endif // NDEBUG |
24694 | 1.34M | } |
24695 | | } // end namespace PPC_MC |
24696 | | } // end namespace llvm |
24697 | | #endif // ENABLE_INSTR_PREDICATE_VERIFIER |
24698 | | |
24699 | | #ifdef GET_INSTRMAP_INFO |
24700 | | #undef GET_INSTRMAP_INFO |
24701 | | namespace llvm { |
24702 | | |
24703 | | namespace PPC { |
24704 | | |
24705 | | enum IsVSXFMAAlt { |
24706 | | IsVSXFMAAlt_1 |
24707 | | }; |
24708 | | |
24709 | | enum RC { |
24710 | | RC_0, |
24711 | | RC_1 |
24712 | | }; |
24713 | | |
24714 | | // getAltVSXFMAOpcode |
24715 | | LLVM_READONLY |
24716 | 592k | int getAltVSXFMAOpcode(uint16_t Opcode) { |
24717 | 592k | static const uint16_t getAltVSXFMAOpcodeTable[][2] = { |
24718 | 592k | { PPC::XSMADDADP, PPC::XSMADDMDP }, |
24719 | 592k | { PPC::XSMADDASP, PPC::XSMADDMSP }, |
24720 | 592k | { PPC::XSMSUBADP, PPC::XSMSUBMDP }, |
24721 | 592k | { PPC::XSMSUBASP, PPC::XSMSUBMSP }, |
24722 | 592k | { PPC::XSNMADDADP, PPC::XSNMADDMDP }, |
24723 | 592k | { PPC::XSNMADDASP, PPC::XSNMADDMSP }, |
24724 | 592k | { PPC::XSNMSUBADP, PPC::XSNMSUBMDP }, |
24725 | 592k | { PPC::XSNMSUBASP, PPC::XSNMSUBMSP }, |
24726 | 592k | { PPC::XVMADDADP, PPC::XVMADDMDP }, |
24727 | 592k | { PPC::XVMADDASP, PPC::XVMADDMSP }, |
24728 | 592k | { PPC::XVMSUBADP, PPC::XVMSUBMDP }, |
24729 | 592k | { PPC::XVMSUBASP, PPC::XVMSUBMSP }, |
24730 | 592k | { PPC::XVNMADDADP, PPC::XVNMADDMDP }, |
24731 | 592k | { PPC::XVNMADDASP, PPC::XVNMADDMSP }, |
24732 | 592k | { PPC::XVNMSUBADP, PPC::XVNMSUBMDP }, |
24733 | 592k | { PPC::XVNMSUBASP, PPC::XVNMSUBMSP }, |
24734 | 592k | }; // End of getAltVSXFMAOpcodeTable |
24735 | | |
24736 | 592k | unsigned mid; |
24737 | 592k | unsigned start = 0; |
24738 | 592k | unsigned end = 16; |
24739 | 3.55M | while (start < end) { |
24740 | 2.96M | mid = start + (end - start) / 2; |
24741 | 2.96M | if (Opcode == getAltVSXFMAOpcodeTable[mid][0]) { |
24742 | 0 | break; |
24743 | 0 | } |
24744 | 2.96M | if (Opcode < getAltVSXFMAOpcodeTable[mid][0]) |
24745 | 2.96M | end = mid; |
24746 | 0 | else |
24747 | 0 | start = mid + 1; |
24748 | 2.96M | } |
24749 | 592k | if (start == end) |
24750 | 592k | return -1; // Instruction doesn't exist in this table. |
24751 | | |
24752 | 0 | return getAltVSXFMAOpcodeTable[mid][1]; |
24753 | 592k | } |
24754 | | |
24755 | | // getNonRecordFormOpcode |
24756 | | LLVM_READONLY |
24757 | 272 | int getNonRecordFormOpcode(uint16_t Opcode) { |
24758 | 272 | static const uint16_t getNonRecordFormOpcodeTable[][2] = { |
24759 | 272 | { PPC::ADD4O_rec, PPC::ADD4O }, |
24760 | 272 | { PPC::ADD4_rec, PPC::ADD4 }, |
24761 | 272 | { PPC::ADD8O_rec, PPC::ADD8O }, |
24762 | 272 | { PPC::ADD8_rec, PPC::ADD8 }, |
24763 | 272 | { PPC::ADDC8O_rec, PPC::ADDC8O }, |
24764 | 272 | { PPC::ADDC8_rec, PPC::ADDC8 }, |
24765 | 272 | { PPC::ADDCO_rec, PPC::ADDCO }, |
24766 | 272 | { PPC::ADDC_rec, PPC::ADDC }, |
24767 | 272 | { PPC::ADDE8O_rec, PPC::ADDE8O }, |
24768 | 272 | { PPC::ADDE8_rec, PPC::ADDE8 }, |
24769 | 272 | { PPC::ADDEO_rec, PPC::ADDEO }, |
24770 | 272 | { PPC::ADDE_rec, PPC::ADDE }, |
24771 | 272 | { PPC::ADDIC_rec, PPC::ADDIC }, |
24772 | 272 | { PPC::ADDME8O_rec, PPC::ADDME8O }, |
24773 | 272 | { PPC::ADDME8_rec, PPC::ADDME8 }, |
24774 | 272 | { PPC::ADDMEO_rec, PPC::ADDMEO }, |
24775 | 272 | { PPC::ADDME_rec, PPC::ADDME }, |
24776 | 272 | { PPC::ADDZE8O_rec, PPC::ADDZE8O }, |
24777 | 272 | { PPC::ADDZE8_rec, PPC::ADDZE8 }, |
24778 | 272 | { PPC::ADDZEO_rec, PPC::ADDZEO }, |
24779 | 272 | { PPC::ADDZE_rec, PPC::ADDZE }, |
24780 | 272 | { PPC::AND8_rec, PPC::AND8 }, |
24781 | 272 | { PPC::ANDC8_rec, PPC::ANDC8 }, |
24782 | 272 | { PPC::ANDC_rec, PPC::ANDC }, |
24783 | 272 | { PPC::AND_rec, PPC::AND }, |
24784 | 272 | { PPC::CNTLZD_rec, PPC::CNTLZD }, |
24785 | 272 | { PPC::CNTLZW8_rec, PPC::CNTLZW8 }, |
24786 | 272 | { PPC::CNTLZW_rec, PPC::CNTLZW }, |
24787 | 272 | { PPC::CNTTZD_rec, PPC::CNTTZD }, |
24788 | 272 | { PPC::CNTTZW8_rec, PPC::CNTTZW8 }, |
24789 | 272 | { PPC::CNTTZW_rec, PPC::CNTTZW }, |
24790 | 272 | { PPC::DADDQ_rec, PPC::DADDQ }, |
24791 | 272 | { PPC::DADD_rec, PPC::DADD }, |
24792 | 272 | { PPC::DCFFIXQ_rec, PPC::DCFFIXQ }, |
24793 | 272 | { PPC::DCFFIX_rec, PPC::DCFFIX }, |
24794 | 272 | { PPC::DCTDP_rec, PPC::DCTDP }, |
24795 | 272 | { PPC::DCTFIXQ_rec, PPC::DCTFIXQ }, |
24796 | 272 | { PPC::DCTFIX_rec, PPC::DCTFIX }, |
24797 | 272 | { PPC::DCTQPQ_rec, PPC::DCTQPQ }, |
24798 | 272 | { PPC::DDEDPDQ_rec, PPC::DDEDPDQ }, |
24799 | 272 | { PPC::DDEDPD_rec, PPC::DDEDPD }, |
24800 | 272 | { PPC::DDIVQ_rec, PPC::DDIVQ }, |
24801 | 272 | { PPC::DDIV_rec, PPC::DDIV }, |
24802 | 272 | { PPC::DENBCDQ_rec, PPC::DENBCDQ }, |
24803 | 272 | { PPC::DENBCD_rec, PPC::DENBCD }, |
24804 | 272 | { PPC::DIEXQ_rec, PPC::DIEXQ }, |
24805 | 272 | { PPC::DIEX_rec, PPC::DIEX }, |
24806 | 272 | { PPC::DIVDEO_rec, PPC::DIVDEO }, |
24807 | 272 | { PPC::DIVDEUO_rec, PPC::DIVDEUO }, |
24808 | 272 | { PPC::DIVDEU_rec, PPC::DIVDEU }, |
24809 | 272 | { PPC::DIVDE_rec, PPC::DIVDE }, |
24810 | 272 | { PPC::DIVDO_rec, PPC::DIVDO }, |
24811 | 272 | { PPC::DIVDUO_rec, PPC::DIVDUO }, |
24812 | 272 | { PPC::DIVDU_rec, PPC::DIVDU }, |
24813 | 272 | { PPC::DIVD_rec, PPC::DIVD }, |
24814 | 272 | { PPC::DIVWEO_rec, PPC::DIVWEO }, |
24815 | 272 | { PPC::DIVWEUO_rec, PPC::DIVWEUO }, |
24816 | 272 | { PPC::DIVWEU_rec, PPC::DIVWEU }, |
24817 | 272 | { PPC::DIVWE_rec, PPC::DIVWE }, |
24818 | 272 | { PPC::DIVWO_rec, PPC::DIVWO }, |
24819 | 272 | { PPC::DIVWUO_rec, PPC::DIVWUO }, |
24820 | 272 | { PPC::DIVWU_rec, PPC::DIVWU }, |
24821 | 272 | { PPC::DIVW_rec, PPC::DIVW }, |
24822 | 272 | { PPC::DMULQ_rec, PPC::DMULQ }, |
24823 | 272 | { PPC::DMUL_rec, PPC::DMUL }, |
24824 | 272 | { PPC::DQUAIQ_rec, PPC::DQUAIQ }, |
24825 | 272 | { PPC::DQUAI_rec, PPC::DQUAI }, |
24826 | 272 | { PPC::DQUAQ_rec, PPC::DQUAQ }, |
24827 | 272 | { PPC::DQUA_rec, PPC::DQUA }, |
24828 | 272 | { PPC::DRDPQ_rec, PPC::DRDPQ }, |
24829 | 272 | { PPC::DRINTNQ_rec, PPC::DRINTNQ }, |
24830 | 272 | { PPC::DRINTN_rec, PPC::DRINTN }, |
24831 | 272 | { PPC::DRINTXQ_rec, PPC::DRINTXQ }, |
24832 | 272 | { PPC::DRINTX_rec, PPC::DRINTX }, |
24833 | 272 | { PPC::DRRNDQ_rec, PPC::DRRNDQ }, |
24834 | 272 | { PPC::DRRND_rec, PPC::DRRND }, |
24835 | 272 | { PPC::DRSP_rec, PPC::DRSP }, |
24836 | 272 | { PPC::DSCLIQ_rec, PPC::DSCLIQ }, |
24837 | 272 | { PPC::DSCLI_rec, PPC::DSCLI }, |
24838 | 272 | { PPC::DSCRIQ_rec, PPC::DSCRIQ }, |
24839 | 272 | { PPC::DSCRI_rec, PPC::DSCRI }, |
24840 | 272 | { PPC::DSUBQ_rec, PPC::DSUBQ }, |
24841 | 272 | { PPC::DSUB_rec, PPC::DSUB }, |
24842 | 272 | { PPC::DXEXQ_rec, PPC::DXEXQ }, |
24843 | 272 | { PPC::DXEX_rec, PPC::DXEX }, |
24844 | 272 | { PPC::EQV8_rec, PPC::EQV8 }, |
24845 | 272 | { PPC::EQV_rec, PPC::EQV }, |
24846 | 272 | { PPC::EXTSB8_rec, PPC::EXTSB8 }, |
24847 | 272 | { PPC::EXTSB_rec, PPC::EXTSB }, |
24848 | 272 | { PPC::EXTSH8_rec, PPC::EXTSH8 }, |
24849 | 272 | { PPC::EXTSH_rec, PPC::EXTSH }, |
24850 | 272 | { PPC::EXTSWSLI_32_64_rec, PPC::EXTSWSLI_32_64 }, |
24851 | 272 | { PPC::EXTSWSLI_rec, PPC::EXTSWSLI }, |
24852 | 272 | { PPC::EXTSW_32_64_rec, PPC::EXTSW_32_64 }, |
24853 | 272 | { PPC::EXTSW_rec, PPC::EXTSW }, |
24854 | 272 | { PPC::FABSD_rec, PPC::FABSD }, |
24855 | 272 | { PPC::FABSS_rec, PPC::FABSS }, |
24856 | 272 | { PPC::FADDS_rec, PPC::FADDS }, |
24857 | 272 | { PPC::FADD_rec, PPC::FADD }, |
24858 | 272 | { PPC::FCFIDS_rec, PPC::FCFIDS }, |
24859 | 272 | { PPC::FCFIDUS_rec, PPC::FCFIDUS }, |
24860 | 272 | { PPC::FCFIDU_rec, PPC::FCFIDU }, |
24861 | 272 | { PPC::FCFID_rec, PPC::FCFID }, |
24862 | 272 | { PPC::FCPSGND_rec, PPC::FCPSGND }, |
24863 | 272 | { PPC::FCPSGNS_rec, PPC::FCPSGNS }, |
24864 | 272 | { PPC::FCTIDUZ_rec, PPC::FCTIDUZ }, |
24865 | 272 | { PPC::FCTIDU_rec, PPC::FCTIDU }, |
24866 | 272 | { PPC::FCTIDZ_rec, PPC::FCTIDZ }, |
24867 | 272 | { PPC::FCTID_rec, PPC::FCTID }, |
24868 | 272 | { PPC::FCTIWUZ_rec, PPC::FCTIWUZ }, |
24869 | 272 | { PPC::FCTIWU_rec, PPC::FCTIWU }, |
24870 | 272 | { PPC::FCTIWZ_rec, PPC::FCTIWZ }, |
24871 | 272 | { PPC::FCTIW_rec, PPC::FCTIW }, |
24872 | 272 | { PPC::FDIVS_rec, PPC::FDIVS }, |
24873 | 272 | { PPC::FDIV_rec, PPC::FDIV }, |
24874 | 272 | { PPC::FMADDS_rec, PPC::FMADDS }, |
24875 | 272 | { PPC::FMADD_rec, PPC::FMADD }, |
24876 | 272 | { PPC::FMR_rec, PPC::FMR }, |
24877 | 272 | { PPC::FMSUBS_rec, PPC::FMSUBS }, |
24878 | 272 | { PPC::FMSUB_rec, PPC::FMSUB }, |
24879 | 272 | { PPC::FMULS_rec, PPC::FMULS }, |
24880 | 272 | { PPC::FMUL_rec, PPC::FMUL }, |
24881 | 272 | { PPC::FNABSD_rec, PPC::FNABSD }, |
24882 | 272 | { PPC::FNABSS_rec, PPC::FNABSS }, |
24883 | 272 | { PPC::FNEGD_rec, PPC::FNEGD }, |
24884 | 272 | { PPC::FNEGS_rec, PPC::FNEGS }, |
24885 | 272 | { PPC::FNMADDS_rec, PPC::FNMADDS }, |
24886 | 272 | { PPC::FNMADD_rec, PPC::FNMADD }, |
24887 | 272 | { PPC::FNMSUBS_rec, PPC::FNMSUBS }, |
24888 | 272 | { PPC::FNMSUB_rec, PPC::FNMSUB }, |
24889 | 272 | { PPC::FRES_rec, PPC::FRES }, |
24890 | 272 | { PPC::FRE_rec, PPC::FRE }, |
24891 | 272 | { PPC::FRIMD_rec, PPC::FRIMD }, |
24892 | 272 | { PPC::FRIMS_rec, PPC::FRIMS }, |
24893 | 272 | { PPC::FRIND_rec, PPC::FRIND }, |
24894 | 272 | { PPC::FRINS_rec, PPC::FRINS }, |
24895 | 272 | { PPC::FRIPD_rec, PPC::FRIPD }, |
24896 | 272 | { PPC::FRIPS_rec, PPC::FRIPS }, |
24897 | 272 | { PPC::FRIZD_rec, PPC::FRIZD }, |
24898 | 272 | { PPC::FRIZS_rec, PPC::FRIZS }, |
24899 | 272 | { PPC::FRSP_rec, PPC::FRSP }, |
24900 | 272 | { PPC::FRSQRTES_rec, PPC::FRSQRTES }, |
24901 | 272 | { PPC::FRSQRTE_rec, PPC::FRSQRTE }, |
24902 | 272 | { PPC::FSELD_rec, PPC::FSELD }, |
24903 | 272 | { PPC::FSELS_rec, PPC::FSELS }, |
24904 | 272 | { PPC::FSQRTS_rec, PPC::FSQRTS }, |
24905 | 272 | { PPC::FSQRT_rec, PPC::FSQRT }, |
24906 | 272 | { PPC::FSUBS_rec, PPC::FSUBS }, |
24907 | 272 | { PPC::FSUB_rec, PPC::FSUB }, |
24908 | 272 | { PPC::MULHDU_rec, PPC::MULHDU }, |
24909 | 272 | { PPC::MULHD_rec, PPC::MULHD }, |
24910 | 272 | { PPC::MULHWU_rec, PPC::MULHWU }, |
24911 | 272 | { PPC::MULHW_rec, PPC::MULHW }, |
24912 | 272 | { PPC::MULLDO_rec, PPC::MULLDO }, |
24913 | 272 | { PPC::MULLD_rec, PPC::MULLD }, |
24914 | 272 | { PPC::MULLWO_rec, PPC::MULLWO }, |
24915 | 272 | { PPC::MULLW_rec, PPC::MULLW }, |
24916 | 272 | { PPC::NAND8_rec, PPC::NAND8 }, |
24917 | 272 | { PPC::NAND_rec, PPC::NAND }, |
24918 | 272 | { PPC::NEG8O_rec, PPC::NEG8O }, |
24919 | 272 | { PPC::NEG8_rec, PPC::NEG8 }, |
24920 | 272 | { PPC::NEGO_rec, PPC::NEGO }, |
24921 | 272 | { PPC::NEG_rec, PPC::NEG }, |
24922 | 272 | { PPC::NOR8_rec, PPC::NOR8 }, |
24923 | 272 | { PPC::NOR_rec, PPC::NOR }, |
24924 | 272 | { PPC::OR8_rec, PPC::OR8 }, |
24925 | 272 | { PPC::ORC8_rec, PPC::ORC8 }, |
24926 | 272 | { PPC::ORC_rec, PPC::ORC }, |
24927 | 272 | { PPC::OR_rec, PPC::OR }, |
24928 | 272 | { PPC::RLDCL_rec, PPC::RLDCL }, |
24929 | 272 | { PPC::RLDCR_rec, PPC::RLDCR }, |
24930 | 272 | { PPC::RLDICL_32_rec, PPC::RLDICL_32 }, |
24931 | 272 | { PPC::RLDICL_rec, PPC::RLDICL }, |
24932 | 272 | { PPC::RLDICR_rec, PPC::RLDICR }, |
24933 | 272 | { PPC::RLDIC_rec, PPC::RLDIC }, |
24934 | 272 | { PPC::RLDIMI_rec, PPC::RLDIMI }, |
24935 | 272 | { PPC::RLWIMI8_rec, PPC::RLWIMI8 }, |
24936 | 272 | { PPC::RLWIMI_rec, PPC::RLWIMI }, |
24937 | 272 | { PPC::RLWINM8_rec, PPC::RLWINM8 }, |
24938 | 272 | { PPC::RLWINM_rec, PPC::RLWINM }, |
24939 | 272 | { PPC::RLWNM8_rec, PPC::RLWNM8 }, |
24940 | 272 | { PPC::RLWNM_rec, PPC::RLWNM }, |
24941 | 272 | { PPC::SLD_rec, PPC::SLD }, |
24942 | 272 | { PPC::SLW8_rec, PPC::SLW8 }, |
24943 | 272 | { PPC::SLW_rec, PPC::SLW }, |
24944 | 272 | { PPC::SRADI_rec, PPC::SRADI }, |
24945 | 272 | { PPC::SRAD_rec, PPC::SRAD }, |
24946 | 272 | { PPC::SRAWI_rec, PPC::SRAWI }, |
24947 | 272 | { PPC::SRAW_rec, PPC::SRAW }, |
24948 | 272 | { PPC::SRD_rec, PPC::SRD }, |
24949 | 272 | { PPC::SRW8_rec, PPC::SRW8 }, |
24950 | 272 | { PPC::SRW_rec, PPC::SRW }, |
24951 | 272 | { PPC::SUBF8O_rec, PPC::SUBF8O }, |
24952 | 272 | { PPC::SUBF8_rec, PPC::SUBF8 }, |
24953 | 272 | { PPC::SUBFC8O_rec, PPC::SUBFC8O }, |
24954 | 272 | { PPC::SUBFC8_rec, PPC::SUBFC8 }, |
24955 | 272 | { PPC::SUBFCO_rec, PPC::SUBFCO }, |
24956 | 272 | { PPC::SUBFC_rec, PPC::SUBFC }, |
24957 | 272 | { PPC::SUBFE8O_rec, PPC::SUBFE8O }, |
24958 | 272 | { PPC::SUBFE8_rec, PPC::SUBFE8 }, |
24959 | 272 | { PPC::SUBFEO_rec, PPC::SUBFEO }, |
24960 | 272 | { PPC::SUBFE_rec, PPC::SUBFE }, |
24961 | 272 | { PPC::SUBFME8O_rec, PPC::SUBFME8O }, |
24962 | 272 | { PPC::SUBFME8_rec, PPC::SUBFME8 }, |
24963 | 272 | { PPC::SUBFMEO_rec, PPC::SUBFMEO }, |
24964 | 272 | { PPC::SUBFME_rec, PPC::SUBFME }, |
24965 | 272 | { PPC::SUBFO_rec, PPC::SUBFO }, |
24966 | 272 | { PPC::SUBFUS_rec, PPC::SUBFUS }, |
24967 | 272 | { PPC::SUBFZE8O_rec, PPC::SUBFZE8O }, |
24968 | 272 | { PPC::SUBFZE8_rec, PPC::SUBFZE8 }, |
24969 | 272 | { PPC::SUBFZEO_rec, PPC::SUBFZEO }, |
24970 | 272 | { PPC::SUBFZE_rec, PPC::SUBFZE }, |
24971 | 272 | { PPC::SUBF_rec, PPC::SUBF }, |
24972 | 272 | { PPC::VSTRIBL_rec, PPC::VSTRIBL }, |
24973 | 272 | { PPC::VSTRIBR_rec, PPC::VSTRIBR }, |
24974 | 272 | { PPC::VSTRIHL_rec, PPC::VSTRIHL }, |
24975 | 272 | { PPC::VSTRIHR_rec, PPC::VSTRIHR }, |
24976 | 272 | { PPC::XOR8_rec, PPC::XOR8 }, |
24977 | 272 | { PPC::XOR_rec, PPC::XOR }, |
24978 | 272 | }; // End of getNonRecordFormOpcodeTable |
24979 | | |
24980 | 272 | unsigned mid; |
24981 | 272 | unsigned start = 0; |
24982 | 272 | unsigned end = 219; |
24983 | 2.44k | while (start < end) { |
24984 | 2.17k | mid = start + (end - start) / 2; |
24985 | 2.17k | if (Opcode == getNonRecordFormOpcodeTable[mid][0]) { |
24986 | 0 | break; |
24987 | 0 | } |
24988 | 2.17k | if (Opcode < getNonRecordFormOpcodeTable[mid][0]) |
24989 | 1.44k | end = mid; |
24990 | 733 | else |
24991 | 733 | start = mid + 1; |
24992 | 2.17k | } |
24993 | 272 | if (start == end) |
24994 | 272 | return -1; // Instruction doesn't exist in this table. |
24995 | | |
24996 | 0 | return getNonRecordFormOpcodeTable[mid][1]; |
24997 | 272 | } |
24998 | | |
24999 | | // getRecordFormOpcode |
25000 | | LLVM_READONLY |
25001 | 11.6k | int getRecordFormOpcode(uint16_t Opcode) { |
25002 | 11.6k | static const uint16_t getRecordFormOpcodeTable[][2] = { |
25003 | 11.6k | { PPC::ADD4, PPC::ADD4_rec }, |
25004 | 11.6k | { PPC::ADD4O, PPC::ADD4O_rec }, |
25005 | 11.6k | { PPC::ADD8, PPC::ADD8_rec }, |
25006 | 11.6k | { PPC::ADD8O, PPC::ADD8O_rec }, |
25007 | 11.6k | { PPC::ADDC, PPC::ADDC_rec }, |
25008 | 11.6k | { PPC::ADDC8, PPC::ADDC8_rec }, |
25009 | 11.6k | { PPC::ADDC8O, PPC::ADDC8O_rec }, |
25010 | 11.6k | { PPC::ADDCO, PPC::ADDCO_rec }, |
25011 | 11.6k | { PPC::ADDE, PPC::ADDE_rec }, |
25012 | 11.6k | { PPC::ADDE8, PPC::ADDE8_rec }, |
25013 | 11.6k | { PPC::ADDE8O, PPC::ADDE8O_rec }, |
25014 | 11.6k | { PPC::ADDEO, PPC::ADDEO_rec }, |
25015 | 11.6k | { PPC::ADDIC, PPC::ADDIC_rec }, |
25016 | 11.6k | { PPC::ADDME, PPC::ADDME_rec }, |
25017 | 11.6k | { PPC::ADDME8, PPC::ADDME8_rec }, |
25018 | 11.6k | { PPC::ADDME8O, PPC::ADDME8O_rec }, |
25019 | 11.6k | { PPC::ADDMEO, PPC::ADDMEO_rec }, |
25020 | 11.6k | { PPC::ADDZE, PPC::ADDZE_rec }, |
25021 | 11.6k | { PPC::ADDZE8, PPC::ADDZE8_rec }, |
25022 | 11.6k | { PPC::ADDZE8O, PPC::ADDZE8O_rec }, |
25023 | 11.6k | { PPC::ADDZEO, PPC::ADDZEO_rec }, |
25024 | 11.6k | { PPC::AND, PPC::AND_rec }, |
25025 | 11.6k | { PPC::AND8, PPC::AND8_rec }, |
25026 | 11.6k | { PPC::ANDC, PPC::ANDC_rec }, |
25027 | 11.6k | { PPC::ANDC8, PPC::ANDC8_rec }, |
25028 | 11.6k | { PPC::CNTLZD, PPC::CNTLZD_rec }, |
25029 | 11.6k | { PPC::CNTLZW, PPC::CNTLZW_rec }, |
25030 | 11.6k | { PPC::CNTLZW8, PPC::CNTLZW8_rec }, |
25031 | 11.6k | { PPC::CNTTZD, PPC::CNTTZD_rec }, |
25032 | 11.6k | { PPC::CNTTZW, PPC::CNTTZW_rec }, |
25033 | 11.6k | { PPC::CNTTZW8, PPC::CNTTZW8_rec }, |
25034 | 11.6k | { PPC::DADD, PPC::DADD_rec }, |
25035 | 11.6k | { PPC::DADDQ, PPC::DADDQ_rec }, |
25036 | 11.6k | { PPC::DCFFIX, PPC::DCFFIX_rec }, |
25037 | 11.6k | { PPC::DCFFIXQ, PPC::DCFFIXQ_rec }, |
25038 | 11.6k | { PPC::DCTDP, PPC::DCTDP_rec }, |
25039 | 11.6k | { PPC::DCTFIX, PPC::DCTFIX_rec }, |
25040 | 11.6k | { PPC::DCTFIXQ, PPC::DCTFIXQ_rec }, |
25041 | 11.6k | { PPC::DCTQPQ, PPC::DCTQPQ_rec }, |
25042 | 11.6k | { PPC::DDEDPD, PPC::DDEDPD_rec }, |
25043 | 11.6k | { PPC::DDEDPDQ, PPC::DDEDPDQ_rec }, |
25044 | 11.6k | { PPC::DDIV, PPC::DDIV_rec }, |
25045 | 11.6k | { PPC::DDIVQ, PPC::DDIVQ_rec }, |
25046 | 11.6k | { PPC::DENBCD, PPC::DENBCD_rec }, |
25047 | 11.6k | { PPC::DENBCDQ, PPC::DENBCDQ_rec }, |
25048 | 11.6k | { PPC::DIEX, PPC::DIEX_rec }, |
25049 | 11.6k | { PPC::DIEXQ, PPC::DIEXQ_rec }, |
25050 | 11.6k | { PPC::DIVD, PPC::DIVD_rec }, |
25051 | 11.6k | { PPC::DIVDE, PPC::DIVDE_rec }, |
25052 | 11.6k | { PPC::DIVDEO, PPC::DIVDEO_rec }, |
25053 | 11.6k | { PPC::DIVDEU, PPC::DIVDEU_rec }, |
25054 | 11.6k | { PPC::DIVDEUO, PPC::DIVDEUO_rec }, |
25055 | 11.6k | { PPC::DIVDO, PPC::DIVDO_rec }, |
25056 | 11.6k | { PPC::DIVDU, PPC::DIVDU_rec }, |
25057 | 11.6k | { PPC::DIVDUO, PPC::DIVDUO_rec }, |
25058 | 11.6k | { PPC::DIVW, PPC::DIVW_rec }, |
25059 | 11.6k | { PPC::DIVWE, PPC::DIVWE_rec }, |
25060 | 11.6k | { PPC::DIVWEO, PPC::DIVWEO_rec }, |
25061 | 11.6k | { PPC::DIVWEU, PPC::DIVWEU_rec }, |
25062 | 11.6k | { PPC::DIVWEUO, PPC::DIVWEUO_rec }, |
25063 | 11.6k | { PPC::DIVWO, PPC::DIVWO_rec }, |
25064 | 11.6k | { PPC::DIVWU, PPC::DIVWU_rec }, |
25065 | 11.6k | { PPC::DIVWUO, PPC::DIVWUO_rec }, |
25066 | 11.6k | { PPC::DMUL, PPC::DMUL_rec }, |
25067 | 11.6k | { PPC::DMULQ, PPC::DMULQ_rec }, |
25068 | 11.6k | { PPC::DQUA, PPC::DQUA_rec }, |
25069 | 11.6k | { PPC::DQUAI, PPC::DQUAI_rec }, |
25070 | 11.6k | { PPC::DQUAIQ, PPC::DQUAIQ_rec }, |
25071 | 11.6k | { PPC::DQUAQ, PPC::DQUAQ_rec }, |
25072 | 11.6k | { PPC::DRDPQ, PPC::DRDPQ_rec }, |
25073 | 11.6k | { PPC::DRINTN, PPC::DRINTN_rec }, |
25074 | 11.6k | { PPC::DRINTNQ, PPC::DRINTNQ_rec }, |
25075 | 11.6k | { PPC::DRINTX, PPC::DRINTX_rec }, |
25076 | 11.6k | { PPC::DRINTXQ, PPC::DRINTXQ_rec }, |
25077 | 11.6k | { PPC::DRRND, PPC::DRRND_rec }, |
25078 | 11.6k | { PPC::DRRNDQ, PPC::DRRNDQ_rec }, |
25079 | 11.6k | { PPC::DRSP, PPC::DRSP_rec }, |
25080 | 11.6k | { PPC::DSCLI, PPC::DSCLI_rec }, |
25081 | 11.6k | { PPC::DSCLIQ, PPC::DSCLIQ_rec }, |
25082 | 11.6k | { PPC::DSCRI, PPC::DSCRI_rec }, |
25083 | 11.6k | { PPC::DSCRIQ, PPC::DSCRIQ_rec }, |
25084 | 11.6k | { PPC::DSUB, PPC::DSUB_rec }, |
25085 | 11.6k | { PPC::DSUBQ, PPC::DSUBQ_rec }, |
25086 | 11.6k | { PPC::DXEX, PPC::DXEX_rec }, |
25087 | 11.6k | { PPC::DXEXQ, PPC::DXEXQ_rec }, |
25088 | 11.6k | { PPC::EQV, PPC::EQV_rec }, |
25089 | 11.6k | { PPC::EQV8, PPC::EQV8_rec }, |
25090 | 11.6k | { PPC::EXTSB, PPC::EXTSB_rec }, |
25091 | 11.6k | { PPC::EXTSB8, PPC::EXTSB8_rec }, |
25092 | 11.6k | { PPC::EXTSH, PPC::EXTSH_rec }, |
25093 | 11.6k | { PPC::EXTSH8, PPC::EXTSH8_rec }, |
25094 | 11.6k | { PPC::EXTSW, PPC::EXTSW_rec }, |
25095 | 11.6k | { PPC::EXTSWSLI, PPC::EXTSWSLI_rec }, |
25096 | 11.6k | { PPC::EXTSWSLI_32_64, PPC::EXTSWSLI_32_64_rec }, |
25097 | 11.6k | { PPC::EXTSW_32_64, PPC::EXTSW_32_64_rec }, |
25098 | 11.6k | { PPC::FABSD, PPC::FABSD_rec }, |
25099 | 11.6k | { PPC::FABSS, PPC::FABSS_rec }, |
25100 | 11.6k | { PPC::FADD, PPC::FADD_rec }, |
25101 | 11.6k | { PPC::FADDS, PPC::FADDS_rec }, |
25102 | 11.6k | { PPC::FCFID, PPC::FCFID_rec }, |
25103 | 11.6k | { PPC::FCFIDS, PPC::FCFIDS_rec }, |
25104 | 11.6k | { PPC::FCFIDU, PPC::FCFIDU_rec }, |
25105 | 11.6k | { PPC::FCFIDUS, PPC::FCFIDUS_rec }, |
25106 | 11.6k | { PPC::FCPSGND, PPC::FCPSGND_rec }, |
25107 | 11.6k | { PPC::FCPSGNS, PPC::FCPSGNS_rec }, |
25108 | 11.6k | { PPC::FCTID, PPC::FCTID_rec }, |
25109 | 11.6k | { PPC::FCTIDU, PPC::FCTIDU_rec }, |
25110 | 11.6k | { PPC::FCTIDUZ, PPC::FCTIDUZ_rec }, |
25111 | 11.6k | { PPC::FCTIDZ, PPC::FCTIDZ_rec }, |
25112 | 11.6k | { PPC::FCTIW, PPC::FCTIW_rec }, |
25113 | 11.6k | { PPC::FCTIWU, PPC::FCTIWU_rec }, |
25114 | 11.6k | { PPC::FCTIWUZ, PPC::FCTIWUZ_rec }, |
25115 | 11.6k | { PPC::FCTIWZ, PPC::FCTIWZ_rec }, |
25116 | 11.6k | { PPC::FDIV, PPC::FDIV_rec }, |
25117 | 11.6k | { PPC::FDIVS, PPC::FDIVS_rec }, |
25118 | 11.6k | { PPC::FMADD, PPC::FMADD_rec }, |
25119 | 11.6k | { PPC::FMADDS, PPC::FMADDS_rec }, |
25120 | 11.6k | { PPC::FMR, PPC::FMR_rec }, |
25121 | 11.6k | { PPC::FMSUB, PPC::FMSUB_rec }, |
25122 | 11.6k | { PPC::FMSUBS, PPC::FMSUBS_rec }, |
25123 | 11.6k | { PPC::FMUL, PPC::FMUL_rec }, |
25124 | 11.6k | { PPC::FMULS, PPC::FMULS_rec }, |
25125 | 11.6k | { PPC::FNABSD, PPC::FNABSD_rec }, |
25126 | 11.6k | { PPC::FNABSS, PPC::FNABSS_rec }, |
25127 | 11.6k | { PPC::FNEGD, PPC::FNEGD_rec }, |
25128 | 11.6k | { PPC::FNEGS, PPC::FNEGS_rec }, |
25129 | 11.6k | { PPC::FNMADD, PPC::FNMADD_rec }, |
25130 | 11.6k | { PPC::FNMADDS, PPC::FNMADDS_rec }, |
25131 | 11.6k | { PPC::FNMSUB, PPC::FNMSUB_rec }, |
25132 | 11.6k | { PPC::FNMSUBS, PPC::FNMSUBS_rec }, |
25133 | 11.6k | { PPC::FRE, PPC::FRE_rec }, |
25134 | 11.6k | { PPC::FRES, PPC::FRES_rec }, |
25135 | 11.6k | { PPC::FRIMD, PPC::FRIMD_rec }, |
25136 | 11.6k | { PPC::FRIMS, PPC::FRIMS_rec }, |
25137 | 11.6k | { PPC::FRIND, PPC::FRIND_rec }, |
25138 | 11.6k | { PPC::FRINS, PPC::FRINS_rec }, |
25139 | 11.6k | { PPC::FRIPD, PPC::FRIPD_rec }, |
25140 | 11.6k | { PPC::FRIPS, PPC::FRIPS_rec }, |
25141 | 11.6k | { PPC::FRIZD, PPC::FRIZD_rec }, |
25142 | 11.6k | { PPC::FRIZS, PPC::FRIZS_rec }, |
25143 | 11.6k | { PPC::FRSP, PPC::FRSP_rec }, |
25144 | 11.6k | { PPC::FRSQRTE, PPC::FRSQRTE_rec }, |
25145 | 11.6k | { PPC::FRSQRTES, PPC::FRSQRTES_rec }, |
25146 | 11.6k | { PPC::FSELD, PPC::FSELD_rec }, |
25147 | 11.6k | { PPC::FSELS, PPC::FSELS_rec }, |
25148 | 11.6k | { PPC::FSQRT, PPC::FSQRT_rec }, |
25149 | 11.6k | { PPC::FSQRTS, PPC::FSQRTS_rec }, |
25150 | 11.6k | { PPC::FSUB, PPC::FSUB_rec }, |
25151 | 11.6k | { PPC::FSUBS, PPC::FSUBS_rec }, |
25152 | 11.6k | { PPC::MULHD, PPC::MULHD_rec }, |
25153 | 11.6k | { PPC::MULHDU, PPC::MULHDU_rec }, |
25154 | 11.6k | { PPC::MULHW, PPC::MULHW_rec }, |
25155 | 11.6k | { PPC::MULHWU, PPC::MULHWU_rec }, |
25156 | 11.6k | { PPC::MULLD, PPC::MULLD_rec }, |
25157 | 11.6k | { PPC::MULLDO, PPC::MULLDO_rec }, |
25158 | 11.6k | { PPC::MULLW, PPC::MULLW_rec }, |
25159 | 11.6k | { PPC::MULLWO, PPC::MULLWO_rec }, |
25160 | 11.6k | { PPC::NAND, PPC::NAND_rec }, |
25161 | 11.6k | { PPC::NAND8, PPC::NAND8_rec }, |
25162 | 11.6k | { PPC::NEG, PPC::NEG_rec }, |
25163 | 11.6k | { PPC::NEG8, PPC::NEG8_rec }, |
25164 | 11.6k | { PPC::NEG8O, PPC::NEG8O_rec }, |
25165 | 11.6k | { PPC::NEGO, PPC::NEGO_rec }, |
25166 | 11.6k | { PPC::NOR, PPC::NOR_rec }, |
25167 | 11.6k | { PPC::NOR8, PPC::NOR8_rec }, |
25168 | 11.6k | { PPC::OR, PPC::OR_rec }, |
25169 | 11.6k | { PPC::OR8, PPC::OR8_rec }, |
25170 | 11.6k | { PPC::ORC, PPC::ORC_rec }, |
25171 | 11.6k | { PPC::ORC8, PPC::ORC8_rec }, |
25172 | 11.6k | { PPC::RLDCL, PPC::RLDCL_rec }, |
25173 | 11.6k | { PPC::RLDCR, PPC::RLDCR_rec }, |
25174 | 11.6k | { PPC::RLDIC, PPC::RLDIC_rec }, |
25175 | 11.6k | { PPC::RLDICL, PPC::RLDICL_rec }, |
25176 | 11.6k | { PPC::RLDICL_32, PPC::RLDICL_32_rec }, |
25177 | 11.6k | { PPC::RLDICR, PPC::RLDICR_rec }, |
25178 | 11.6k | { PPC::RLDIMI, PPC::RLDIMI_rec }, |
25179 | 11.6k | { PPC::RLWIMI, PPC::RLWIMI_rec }, |
25180 | 11.6k | { PPC::RLWIMI8, PPC::RLWIMI8_rec }, |
25181 | 11.6k | { PPC::RLWINM, PPC::RLWINM_rec }, |
25182 | 11.6k | { PPC::RLWINM8, PPC::RLWINM8_rec }, |
25183 | 11.6k | { PPC::RLWNM, PPC::RLWNM_rec }, |
25184 | 11.6k | { PPC::RLWNM8, PPC::RLWNM8_rec }, |
25185 | 11.6k | { PPC::SLD, PPC::SLD_rec }, |
25186 | 11.6k | { PPC::SLW, PPC::SLW_rec }, |
25187 | 11.6k | { PPC::SLW8, PPC::SLW8_rec }, |
25188 | 11.6k | { PPC::SRAD, PPC::SRAD_rec }, |
25189 | 11.6k | { PPC::SRADI, PPC::SRADI_rec }, |
25190 | 11.6k | { PPC::SRAW, PPC::SRAW_rec }, |
25191 | 11.6k | { PPC::SRAWI, PPC::SRAWI_rec }, |
25192 | 11.6k | { PPC::SRD, PPC::SRD_rec }, |
25193 | 11.6k | { PPC::SRW, PPC::SRW_rec }, |
25194 | 11.6k | { PPC::SRW8, PPC::SRW8_rec }, |
25195 | 11.6k | { PPC::SUBF, PPC::SUBF_rec }, |
25196 | 11.6k | { PPC::SUBF8, PPC::SUBF8_rec }, |
25197 | 11.6k | { PPC::SUBF8O, PPC::SUBF8O_rec }, |
25198 | 11.6k | { PPC::SUBFC, PPC::SUBFC_rec }, |
25199 | 11.6k | { PPC::SUBFC8, PPC::SUBFC8_rec }, |
25200 | 11.6k | { PPC::SUBFC8O, PPC::SUBFC8O_rec }, |
25201 | 11.6k | { PPC::SUBFCO, PPC::SUBFCO_rec }, |
25202 | 11.6k | { PPC::SUBFE, PPC::SUBFE_rec }, |
25203 | 11.6k | { PPC::SUBFE8, PPC::SUBFE8_rec }, |
25204 | 11.6k | { PPC::SUBFE8O, PPC::SUBFE8O_rec }, |
25205 | 11.6k | { PPC::SUBFEO, PPC::SUBFEO_rec }, |
25206 | 11.6k | { PPC::SUBFME, PPC::SUBFME_rec }, |
25207 | 11.6k | { PPC::SUBFME8, PPC::SUBFME8_rec }, |
25208 | 11.6k | { PPC::SUBFME8O, PPC::SUBFME8O_rec }, |
25209 | 11.6k | { PPC::SUBFMEO, PPC::SUBFMEO_rec }, |
25210 | 11.6k | { PPC::SUBFO, PPC::SUBFO_rec }, |
25211 | 11.6k | { PPC::SUBFUS, PPC::SUBFUS_rec }, |
25212 | 11.6k | { PPC::SUBFZE, PPC::SUBFZE_rec }, |
25213 | 11.6k | { PPC::SUBFZE8, PPC::SUBFZE8_rec }, |
25214 | 11.6k | { PPC::SUBFZE8O, PPC::SUBFZE8O_rec }, |
25215 | 11.6k | { PPC::SUBFZEO, PPC::SUBFZEO_rec }, |
25216 | 11.6k | { PPC::VSTRIBL, PPC::VSTRIBL_rec }, |
25217 | 11.6k | { PPC::VSTRIBR, PPC::VSTRIBR_rec }, |
25218 | 11.6k | { PPC::VSTRIHL, PPC::VSTRIHL_rec }, |
25219 | 11.6k | { PPC::VSTRIHR, PPC::VSTRIHR_rec }, |
25220 | 11.6k | { PPC::XOR, PPC::XOR_rec }, |
25221 | 11.6k | { PPC::XOR8, PPC::XOR8_rec }, |
25222 | 11.6k | }; // End of getRecordFormOpcodeTable |
25223 | | |
25224 | 11.6k | unsigned mid; |
25225 | 11.6k | unsigned start = 0; |
25226 | 11.6k | unsigned end = 219; |
25227 | 89.2k | while (start < end) { |
25228 | 88.9k | mid = start + (end - start) / 2; |
25229 | 88.9k | if (Opcode == getRecordFormOpcodeTable[mid][0]) { |
25230 | 11.3k | break; |
25231 | 11.3k | } |
25232 | 77.5k | if (Opcode < getRecordFormOpcodeTable[mid][0]) |
25233 | 44.9k | end = mid; |
25234 | 32.5k | else |
25235 | 32.5k | start = mid + 1; |
25236 | 77.5k | } |
25237 | 11.6k | if (start == end) |
25238 | 297 | return -1; // Instruction doesn't exist in this table. |
25239 | | |
25240 | 11.3k | return getRecordFormOpcodeTable[mid][1]; |
25241 | 11.6k | } |
25242 | | |
25243 | | } // end namespace PPC |
25244 | | } // end namespace llvm |
25245 | | #endif // GET_INSTRMAP_INFO |
25246 | | |