/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\

|*                                                                            *|

|* Assembly Matcher Source Fragment                                           *|

|*                                                                            *|

|* Automatically generated file, do not edit!                                 *|

|* From: RISCV.td                                                             *|

|*                                                                            *|

\*===----------------------------------------------------------------------===*/

#ifdef GET_ASSEMBLER_HEADER

#undef GET_ASSEMBLER_HEADER

  // This should be included into the middle of the declaration of

  // your subclasses implementation of MCTargetAsmParser.

  FeatureBitset ComputeAvailableFeatures(const FeatureBitset &FB) const;

  void convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode,

                       const OperandVector &Operands,

                       const SmallBitVector &OptionalOperandsMask);

  void convertToMapAndConstraints(unsigned Kind,

                           const OperandVector &Operands) override;

  unsigned MatchInstructionImpl(const OperandVector &Operands,

                                MCInst &Inst,

                                uint64_t &ErrorInfo,

                                FeatureBitset &MissingFeatures,

                                bool matchingInlineAsm,

                                unsigned VariantID = 0);

  unsigned MatchInstructionImpl(const OperandVector &Operands,

                                MCInst &Inst,

                                uint64_t &ErrorInfo,

                                bool matchingInlineAsm,

                                unsigned VariantID = 0) {

    FeatureBitset MissingFeatures;

    return MatchInstructionImpl(Operands, Inst, ErrorInfo, MissingFeatures,

                                matchingInlineAsm, VariantID);

  }

  ParseStatus MatchOperandParserImpl(

    OperandVector &Operands,

    StringRef Mnemonic,

    bool ParseForAllFeatures = false);

  ParseStatus tryCustomParseOperand(

    OperandVector &Operands,

    unsigned MCK);

#endif // GET_ASSEMBLER_HEADER

#ifdef GET_OPERAND_DIAGNOSTIC_TYPES

#undef GET_OPERAND_DIAGNOSTIC_TYPES

  Match_InvalidBareSymbol,

  Match_InvalidCLUIImm,

  Match_InvalidCSRSystemRegister,

  Match_InvalidCallSymbol,

  Match_InvalidImmXLenLI,

  Match_InvalidImmXLenLI_Restricted,

  Match_InvalidImmZero,

  Match_InvalidLoadFPImm,

  Match_InvalidPseudoJumpSymbol,

  Match_InvalidRTZArg,

  Match_InvalidRegReg,

  Match_InvalidRlist,

  Match_InvalidRnumArg,

  Match_InvalidSImm10Lsb0000NonZero,

  Match_InvalidSImm12,

  Match_InvalidSImm12Lsb0,

  Match_InvalidSImm12Lsb00000,

  Match_InvalidSImm13Lsb0,

  Match_InvalidSImm21Lsb0JAL,

  Match_InvalidSImm5,

  Match_InvalidSImm5Plus1,

  Match_InvalidSImm6,

  Match_InvalidSImm6NonZero,

  Match_InvalidSImm9Lsb0,

  Match_InvalidSpimm,

  Match_InvalidTPRelAddSymbol,

  Match_InvalidUImm1,

  Match_InvalidUImm10Lsb00NonZero,

  Match_InvalidUImm2,

  Match_InvalidUImm20,

  Match_InvalidUImm20AUIPC,

  Match_InvalidUImm20LUI,

  Match_InvalidUImm2Lsb0,

  Match_InvalidUImm3,

  Match_InvalidUImm4,

  Match_InvalidUImm5,

  Match_InvalidUImm6,

  Match_InvalidUImm7,

  Match_InvalidUImm7Lsb00,

  Match_InvalidUImm8,

  Match_InvalidUImm8GE32,

  Match_InvalidUImm8Lsb00,

  Match_InvalidUImm8Lsb000,

  Match_InvalidUImm9Lsb000,

  Match_InvalidUImmLog2XLen,

  Match_InvalidUImmLog2XLenHalf,

  Match_InvalidUImmLog2XLenNonZero,

  Match_InvalidVMaskRegister,

  Match_InvalidVTypeI,

  END_OPERAND_DIAGNOSTIC_TYPES

#endif // GET_OPERAND_DIAGNOSTIC_TYPES

#ifdef GET_REGISTER_MATCHER

#undef GET_REGISTER_MATCHER

// Bits for subtarget features that participate in instruction matching.

enum SubtargetFeatureBits : uint8_t {

  Feature_HasStdExtZicsrBit = 46,

  Feature_HasStdExtIBit = 10,

  Feature_HasStdExtMBit = 11,

  Feature_HasStdExtMOrZmmulBit = 12,

  Feature_HasStdExtABit = 2,

  Feature_HasStdExtFBit = 8,

  Feature_HasStdExtDBit = 7,

  Feature_HasStdExtHBit = 9,

  Feature_HasStdExtZihintpauseBit = 49,

  Feature_HasStdExtZihintntlBit = 48,

  Feature_HasStdExtZifenceiBit = 47,

  Feature_HasStdExtZfhminBit = 35,

  Feature_HasStdExtZfhBit = 32,

  Feature_HasStdExtZfhOrZfhminBit = 33,

  Feature_HasStdExtZfinxBit = 36,

  Feature_HasStdExtZdinxBit = 29,

  Feature_HasStdExtZhinxminBit = 39,

  Feature_HasStdExtZhinxBit = 37,

  Feature_HasStdExtZhinxOrZhinxminBit = 38,

  Feature_HasStdExtZfaBit = 30,

  Feature_HasStdExtCBit = 3,

  Feature_HasStdExtZbaBit = 16,

  Feature_HasStdExtZbbBit = 17,

  Feature_HasStdExtZbcBit = 19,

  Feature_HasStdExtZbsBit = 24,

  Feature_HasStdExtZbkbBit = 21,

  Feature_HasStdExtZbkxBit = 23,

  Feature_HasStdExtZbbOrZbkbBit = 18,

  Feature_HasStdExtZbkcBit = 22,

  Feature_HasStdExtZbcOrZbkcBit = 20,

  Feature_HasStdExtZkndBit = 51,

  Feature_HasStdExtZkneBit = 53,

  Feature_HasStdExtZkndOrZkneBit = 52,

  Feature_HasStdExtZknhBit = 54,

  Feature_HasStdExtZksedBit = 56,

  Feature_HasStdExtZkshBit = 57,

  Feature_HasStdExtZkrBit = 55,

  Feature_HasStdExtCOrZcaBit = 4,

  Feature_HasStdExtZcbBit = 25,

  Feature_HasStdExtCOrZcdBit = 5,

  Feature_HasStdExtZcmpBit = 27,

  Feature_HasStdExtZcmtBit = 28,

  Feature_HasStdExtCOrZcfOrZceBit = 6,

  Feature_HasRVCHintsBit = 1,

  Feature_HasVInstructionsBit = 71,

  Feature_HasVInstructionsI64Bit = 74,

  Feature_HasVInstructionsAnyFBit = 72,

  Feature_HasStdExtZfbfminBit = 31,

  Feature_HasStdExtZvfbfminBit = 61,

  Feature_HasStdExtZvfbfwmaBit = 62,

  Feature_HasVInstructionsF16MinimalBit = 73,

  Feature_HasStdExtZfhOrZvfhBit = 34,

  Feature_HasStdExtZicbomBit = 40,

  Feature_HasStdExtZicbozBit = 42,

  Feature_HasStdExtZicbopBit = 41,

  Feature_HasStdExtSvinvalBit = 13,

  Feature_HasStdExtZtsoBit = 58,

  Feature_HasStdExtZawrsBit = 15,

  Feature_HasStdExtZvkbBit = 63,

  Feature_HasStdExtZvbbBit = 59,

  Feature_HasStdExtZvbcBit = 60,

  Feature_HasStdExtZvkgBit = 64,

  Feature_HasStdExtZvknedBit = 65,

  Feature_HasStdExtZvknhaBit = 66,

  Feature_HasStdExtZvknhbBit = 68,

  Feature_HasStdExtZvknhaOrZvknhbBit = 67,

  Feature_HasStdExtZvksedBit = 69,

  Feature_HasStdExtZvkshBit = 70,

  Feature_HasStdExtZicfilpBit = 43,

  Feature_HasStdExtZicondBit = 45,

  Feature_HasStdExtZimopBit = 50,

  Feature_HasStdExtZcmopBit = 26,

  Feature_HasStdExtZicfissBit = 44,

  Feature_HasHalfFPLoadStoreMoveBit = 0,

  Feature_HasStdExtZacasBit = 14,

  Feature_HasVendorXVentanaCondOpsBit = 98,

  Feature_HasVendorXTHeadBaBit = 87,

  Feature_HasVendorXTHeadBbBit = 88,

  Feature_HasVendorXTHeadBsBit = 89,

  Feature_HasVendorXTHeadCondMovBit = 91,

  Feature_HasVendorXTHeadCmoBit = 90,

  Feature_HasVendorXTHeadFMemIdxBit = 92,

  Feature_HasVendorXTHeadMacBit = 93,

  Feature_HasVendorXTHeadMemIdxBit = 94,

  Feature_HasVendorXTHeadMemPairBit = 95,

  Feature_HasVendorXTHeadSyncBit = 96,

  Feature_HasVendorXTHeadVdotBit = 97,

  Feature_HasVendorXSfvcpBit = 82,

  Feature_HasVendorXSfvqmaccdodBit = 85,

  Feature_HasVendorXSfvqmaccqoqBit = 86,

  Feature_HasVendorXSfvfwmaccqqqBit = 84,

  Feature_HasVendorXSfvfnrclipxfqfBit = 83,

  Feature_HasVendorXCVelwBit = 78,

  Feature_HasVendorXCVbitmanipBit = 77,

  Feature_HasVendorXCVmacBit = 79,

  Feature_HasVendorXCVmemBit = 80,

  Feature_HasVendorXCValuBit = 75,

  Feature_HasVendorXCVsimdBit = 81,

  Feature_HasVendorXCVbiBit = 76,

  Feature_IsRV64Bit = 100,

  Feature_IsRV32Bit = 99,

  Feature_IsRVEBit = 101,

};

static unsigned MatchRegisterName(StringRef Name) {

  switch (Name.size()) {

  default: break;

  case 1:  // 1 string to match.

    if (Name[0] != '0')

      break;

    return 9;  // "0"

  case 2:  // 66 strings to match.

    switch (Name[0]) {

    default: break;

    case 'f':  // 30 strings to match.

      switch (Name[1]) {

      default: break;

      case '0':  // 3 strings to match.

        return 74;  // "f0"

      case '1':  // 3 strings to match.

        return 75;  // "f1"

      case '2':  // 3 strings to match.

        return 76;  // "f2"

      case '3':  // 3 strings to match.

        return 77;  // "f3"

      case '4':  // 3 strings to match.

        return 78;  // "f4"

      case '5':  // 3 strings to match.

        return 79;  // "f5"

      case '6':  // 3 strings to match.

        return 80;  // "f6"

      case '7':  // 3 strings to match.

        return 81;  // "f7"

      case '8':  // 3 strings to match.

        return 82;  // "f8"

      case '9':  // 3 strings to match.

        return 83;  // "f9"

      }

      break;

    case 'v':  // 21 strings to match.

      switch (Name[1]) {

      default: break;

      case '0':  // 4 strings to match.

        return 10;  // "v0"

      case '1':  // 1 string to match.

        return 11;  // "v1"

      case '2':  // 2 strings to match.

        return 12;  // "v2"

      case '3':  // 1 string to match.

        return 13;  // "v3"

      case '4':  // 3 strings to match.

        return 14;  // "v4"

      case '5':  // 1 string to match.

        return 15;  // "v5"

      case '6':  // 2 strings to match.

        return 16;  // "v6"

      case '7':  // 1 string to match.

        return 17;  // "v7"

      case '8':  // 4 strings to match.

        return 18;  // "v8"

      case '9':  // 1 string to match.

        return 19;  // "v9"

      case 'l':  // 1 string to match.

        return 4;  // "vl"

      }

      break;

    case 'x':  // 15 strings to match.

      switch (Name[1]) {

      default: break;

      case '0':  // 2 strings to match.

        return 42;  // "x0"

      case '1':  // 1 string to match.

        return 43;  // "x1"

      case '2':  // 2 strings to match.

        return 44;  // "x2"

      case '3':  // 1 string to match.

        return 45;  // "x3"

      case '4':  // 2 strings to match.

        return 46;  // "x4"

      case '5':  // 1 string to match.

        return 47;  // "x5"

      case '6':  // 2 strings to match.

        return 48;  // "x6"

      case '7':  // 1 string to match.

        return 49;  // "x7"

      case '8':  // 2 strings to match.

        return 50;  // "x8"

      case '9':  // 1 string to match.

        return 51;  // "x9"

      }

      break;

    }

    break;

  case 3:  // 141 strings to match.

    switch (Name[0]) {

    default: break;

    case 'f':  // 67 strings to match.

      switch (Name[1]) {

      default: break;

      case '1':  // 30 strings to match.

        switch (Name[2]) {

        default: break;

        case '0':  // 3 strings to match.

          return 84;  // "f10"

        case '1':  // 3 strings to match.

          return 85;  // "f11"

        case '2':  // 3 strings to match.

          return 86;  // "f12"

        case '3':  // 3 strings to match.

          return 87;  // "f13"

        case '4':  // 3 strings to match.

          return 88;  // "f14"

        case '5':  // 3 strings to match.

          return 89;  // "f15"

        case '6':  // 3 strings to match.

          return 90;  // "f16"

        case '7':  // 3 strings to match.

          return 91;  // "f17"

        case '8':  // 3 strings to match.

          return 92;  // "f18"

        case '9':  // 3 strings to match.

          return 93;  // "f19"

        }

        break;

      case '2':  // 30 strings to match.

        switch (Name[2]) {

        default: break;

        case '0':  // 3 strings to match.

          return 94;  // "f20"

        case '1':  // 3 strings to match.

          return 95;  // "f21"

        case '2':  // 3 strings to match.

          return 96;  // "f22"

        case '3':  // 3 strings to match.

          return 97;  // "f23"

        case '4':  // 3 strings to match.

          return 98;  // "f24"

        case '5':  // 3 strings to match.

          return 99;  // "f25"

        case '6':  // 3 strings to match.

          return 100;  // "f26"

        case '7':  // 3 strings to match.

          return 101;  // "f27"

        case '8':  // 3 strings to match.

          return 102;  // "f28"

        case '9':  // 3 strings to match.

          return 103;  // "f29"

        }

        break;

      case '3':  // 6 strings to match.

        switch (Name[2]) {

        default: break;

        case '0':  // 3 strings to match.

          return 104;  // "f30"

        case '1':  // 3 strings to match.

          return 105;  // "f31"

        }

        break;

      case 'r':  // 1 string to match.

        if (Name[2] != 'm')

          break;

        return 2;  // "frm"

      }

      break;

    case 's':  // 1 string to match.

      if (memcmp(Name.data()+1, "sp", 2) != 0)

        break;

      return 3;  // "ssp"

    case 'v':  // 40 strings to match.

      switch (Name[1]) {

      default: break;

      case '1':  // 18 strings to match.

        switch (Name[2]) {

        default: break;

        case '0':  // 2 strings to match.

          return 20;  // "v10"

        case '1':  // 1 string to match.

          return 21;  // "v11"

        case '2':  // 3 strings to match.

          return 22;  // "v12"

        case '3':  // 1 string to match.

          return 23;  // "v13"

        case '4':  // 2 strings to match.

          return 24;  // "v14"

        case '5':  // 1 string to match.

          return 25;  // "v15"

        case '6':  // 4 strings to match.

          return 26;  // "v16"

        case '7':  // 1 string to match.

          return 27;  // "v17"

        case '8':  // 2 strings to match.

          return 28;  // "v18"

        case '9':  // 1 string to match.

          return 29;  // "v19"

        }

        break;

      case '2':  // 19 strings to match.

        switch (Name[2]) {

        default: break;

        case '0':  // 3 strings to match.

          return 30;  // "v20"

        case '1':  // 1 string to match.

          return 31;  // "v21"

        case '2':  // 2 strings to match.

          return 32;  // "v22"

        case '3':  // 1 string to match.

          return 33;  // "v23"

        case '4':  // 4 strings to match.

          return 34;  // "v24"

        case '5':  // 1 string to match.

          return 35;  // "v25"

        case '6':  // 2 strings to match.

          return 36;  // "v26"

        case '7':  // 1 string to match.

          return 37;  // "v27"

        case '8':  // 3 strings to match.

          return 38;  // "v28"

        case '9':  // 1 string to match.

          return 39;  // "v29"

        }

        break;

      case '3':  // 3 strings to match.

        switch (Name[2]) {

        default: break;

        case '0':  // 2 strings to match.

          return 40;  // "v30"

        case '1':  // 1 string to match.

          return 41;  // "v31"

        }

        break;

      }

      break;

    case 'x':  // 33 strings to match.

      switch (Name[1]) {

      default: break;

      case '1':  // 15 strings to match.

        switch (Name[2]) {

        default: break;

        case '0':  // 2 strings to match.

          return 52;  // "x10"

        case '1':  // 1 string to match.

          return 53;  // "x11"

        case '2':  // 2 strings to match.

          return 54;  // "x12"

        case '3':  // 1 string to match.

          return 55;  // "x13"

        case '4':  // 2 strings to match.

          return 56;  // "x14"

        case '5':  // 1 string to match.

          return 57;  // "x15"

        case '6':  // 2 strings to match.

          return 58;  // "x16"

        case '7':  // 1 string to match.

          return 59;  // "x17"

        case '8':  // 2 strings to match.

          return 60;  // "x18"

        case '9':  // 1 string to match.

          return 61;  // "x19"

        }

        break;

      case '2':  // 15 strings to match.

        switch (Name[2]) {

        default: break;

        case '0':  // 2 strings to match.

          return 62;  // "x20"

        case '1':  // 1 string to match.

          return 63;  // "x21"

        case '2':  // 2 strings to match.

          return 64;  // "x22"

        case '3':  // 1 string to match.

          return 65;  // "x23"

        case '4':  // 2 strings to match.

          return 66;  // "x24"

        case '5':  // 1 string to match.

          return 67;  // "x25"

        case '6':  // 2 strings to match.

          return 68;  // "x26"

        case '7':  // 1 string to match.

          return 69;  // "x27"

        case '8':  // 2 strings to match.

          return 70;  // "x28"

        case '9':  // 1 string to match.

          return 71;  // "x29"

        }

        break;

      case '3':  // 3 strings to match.

        switch (Name[2]) {

        default: break;

        case '0':  // 2 strings to match.

          return 72;  // "x30"

        case '1':  // 1 string to match.

          return 73;  // "x31"

        }

        break;

      }

      break;

    }

    break;

  case 4:  // 1 string to match.

    if (memcmp(Name.data()+0, "vxrm", 4) != 0)

      break;

    return 7;  // "vxrm"

  case 5:  // 3 strings to match.

    if (Name[0] != 'v')

      break;

    switch (Name[1]) {

    default: break;

    case 'l':  // 1 string to match.

      if (memcmp(Name.data()+2, "enb", 3) != 0)

        break;

      return 5;  // "vlenb"

    case 't':  // 1 string to match.

      if (memcmp(Name.data()+2, "ype", 3) != 0)

        break;

      return 6;  // "vtype"

    case 'x':  // 1 string to match.

      if (memcmp(Name.data()+2, "sat", 3) != 0)

        break;

      return 8;  // "vxsat"

    }

    break;

  case 6:  // 1 string to match.

    if (memcmp(Name.data()+0, "fflags", 6) != 0)

      break;

    return 1;  // "fflags"

  }

  return 0;

}

Unexecuted instantiation: RISCVAsmParser.cpp:MatchRegisterName(llvm::StringRef)

Unexecuted instantiation: RISCVISelLowering.cpp:MatchRegisterName(llvm::StringRef)

static unsigned MatchRegisterAltName(StringRef Name) {

  switch (Name.size()) {

  default: break;

  case 2:  // 45 strings to match.

    switch (Name[0]) {

    default: break;

    case 'a':  // 12 strings to match.

      switch (Name[1]) {

      default: break;

      case '0':  // 2 strings to match.

        return 52;  // "a0"

      case '1':  // 1 string to match.

        return 53;  // "a1"

      case '2':  // 2 strings to match.

        return 54;  // "a2"

      case '3':  // 1 string to match.

        return 55;  // "a3"

      case '4':  // 2 strings to match.

        return 56;  // "a4"

      case '5':  // 1 string to match.

        return 57;  // "a5"

      case '6':  // 2 strings to match.

        return 58;  // "a6"

      case '7':  // 1 string to match.

        return 59;  // "a7"

      }

      break;

    case 'f':  // 2 strings to match.

      if (Name[1] != 'p')

        break;

      return 50;  // "fp"

    case 'g':  // 1 string to match.

      if (Name[1] != 'p')

        break;

      return 45;  // "gp"

    case 'r':  // 1 string to match.

      if (Name[1] != 'a')

        break;

      return 43;  // "ra"

    case 's':  // 17 strings to match.

      switch (Name[1]) {

      default: break;

      case '0':  // 2 strings to match.

        return 50;  // "s0"

      case '1':  // 1 string to match.

        return 51;  // "s1"

      case '2':  // 2 strings to match.

        return 60;  // "s2"

      case '3':  // 1 string to match.

        return 61;  // "s3"

      case '4':  // 2 strings to match.

        return 62;  // "s4"

      case '5':  // 1 string to match.

        return 63;  // "s5"

      case '6':  // 2 strings to match.

        return 64;  // "s6"

      case '7':  // 1 string to match.

        return 65;  // "s7"

      case '8':  // 2 strings to match.

        return 66;  // "s8"

      case '9':  // 1 string to match.

        return 67;  // "s9"

      case 'p':  // 2 strings to match.

        return 44;  // "sp"

      }

      break;

    case 't':  // 12 strings to match.

      switch (Name[1]) {

      default: break;

      case '0':  // 1 string to match.

        return 47;  // "t0"

      case '1':  // 2 strings to match.

        return 48;  // "t1"

      case '2':  // 1 string to match.

        return 49;  // "t2"

      case '3':  // 2 strings to match.

        return 70;  // "t3"

      case '4':  // 1 string to match.

        return 71;  // "t4"

      case '5':  // 2 strings to match.

        return 72;  // "t5"

      case '6':  // 1 string to match.

        return 73;  // "t6"

      case 'p':  // 2 strings to match.

        return 46;  // "tp"

      }

      break;

    }

    break;

  case 3:  // 87 strings to match.

    switch (Name[0]) {

    default: break;

    case 'f':  // 84 strings to match.

      switch (Name[1]) {

      default: break;

      case 'a':  // 24 strings to match.

        switch (Name[2]) {

        default: break;

        case '0':  // 3 strings to match.

          return 84;  // "fa0"

        case '1':  // 3 strings to match.

          return 85;  // "fa1"

        case '2':  // 3 strings to match.

          return 86;  // "fa2"

        case '3':  // 3 strings to match.

          return 87;  // "fa3"

        case '4':  // 3 strings to match.

          return 88;  // "fa4"

        case '5':  // 3 strings to match.

          return 89;  // "fa5"

        case '6':  // 3 strings to match.

          return 90;  // "fa6"

        case '7':  // 3 strings to match.

          return 91;  // "fa7"

        }

        break;

      case 's':  // 30 strings to match.

        switch (Name[2]) {

        default: break;

        case '0':  // 3 strings to match.

          return 82;  // "fs0"

        case '1':  // 3 strings to match.

          return 83;  // "fs1"

        case '2':  // 3 strings to match.

          return 92;  // "fs2"

        case '3':  // 3 strings to match.

          return 93;  // "fs3"

        case '4':  // 3 strings to match.

          return 94;  // "fs4"

        case '5':  // 3 strings to match.

          return 95;  // "fs5"

        case '6':  // 3 strings to match.

          return 96;  // "fs6"

        case '7':  // 3 strings to match.

          return 97;  // "fs7"

        case '8':  // 3 strings to match.

          return 98;  // "fs8"

        case '9':  // 3 strings to match.

          return 99;  // "fs9"

        }

        break;

      case 't':  // 30 strings to match.

        switch (Name[2]) {

        default: break;

        case '0':  // 3 strings to match.

          return 74;  // "ft0"

        case '1':  // 3 strings to match.

          return 75;  // "ft1"

        case '2':  // 3 strings to match.

          return 76;  // "ft2"

        case '3':  // 3 strings to match.

          return 77;  // "ft3"

        case '4':  // 3 strings to match.

          return 78;  // "ft4"

        case '5':  // 3 strings to match.

          return 79;  // "ft5"

        case '6':  // 3 strings to match.

          return 80;  // "ft6"

        case '7':  // 3 strings to match.

          return 81;  // "ft7"

        case '8':  // 3 strings to match.

          return 102;  // "ft8"

        case '9':  // 3 strings to match.

          return 103;  // "ft9"

        }

        break;

      }

      break;

    case 's':  // 3 strings to match.

      if (Name[1] != '1')

        break;

      switch (Name[2]) {

      default: break;

      case '0':  // 2 strings to match.

        return 68;  // "s10"

      case '1':  // 1 string to match.

        return 69;  // "s11"

      }

      break;

    }

    break;

  case 4:  // 14 strings to match.

    switch (Name[0]) {

    default: break;

    case 'f':  // 12 strings to match.

      switch (Name[1]) {

      default: break;

      case 's':  // 6 strings to match.

        if (Name[2] != '1')

          break;

        switch (Name[3]) {

        default: break;

        case '0':  // 3 strings to match.

          return 100;  // "fs10"

        case '1':  // 3 strings to match.

          return 101;  // "fs11"

        }

        break;

      case 't':  // 6 strings to match.

        if (Name[2] != '1')

          break;

        switch (Name[3]) {

        default: break;

        case '0':  // 3 strings to match.

          return 104;  // "ft10"

        case '1':  // 3 strings to match.

          return 105;  // "ft11"

        }

        break;

      }

      break;

    case 'z':  // 2 strings to match.

      if (memcmp(Name.data()+1, "ero", 3) != 0)

        break;

      return 42;  // "zero"

    }

    break;

  }

  return 0;

}

Unexecuted instantiation: RISCVAsmParser.cpp:MatchRegisterAltName(llvm::StringRef)

Unexecuted instantiation: RISCVISelLowering.cpp:MatchRegisterAltName(llvm::StringRef)

#endif // GET_REGISTER_MATCHER

#ifdef GET_SUBTARGET_FEATURE_NAME

#undef GET_SUBTARGET_FEATURE_NAME

// User-level names for subtarget features that participate in

// instruction matching.

static const char *getSubtargetFeatureName(uint64_t Val) {

  switch(Val) {

  case Feature_HasStdExtZicsrBit: return "'Zicsr' (CSRs)";

  case Feature_HasStdExtIBit: return "'I' (Base Integer Instruction Set)";

  case Feature_HasStdExtMBit: return "'M' (Integer Multiplication and Division)";

  case Feature_HasStdExtMOrZmmulBit: return "'M' (Integer Multiplication and Division) or 'Zmmul' (Integer Multiplication)";

  case Feature_HasStdExtABit: return "'A' (Atomic Instructions)";

  case Feature_HasStdExtFBit: return "'F' (Single-Precision Floating-Point)";

  case Feature_HasStdExtDBit: return "'D' (Double-Precision Floating-Point)";

  case Feature_HasStdExtHBit: return "'H' (Hypervisor)";

  case Feature_HasStdExtZihintpauseBit: return "'Zihintpause' (Pause Hint)";

  case Feature_HasStdExtZihintntlBit: return "'Zihintntl' (Non-Temporal Locality Hints)";

  case Feature_HasStdExtZifenceiBit: return "'Zifencei' (fence.i)";

  case Feature_HasStdExtZfhminBit: return "'Zfhmin' (Half-Precision Floating-Point Minimal)";

  case Feature_HasStdExtZfhBit: return "'Zfh' (Half-Precision Floating-Point)";

  case Feature_HasStdExtZfhOrZfhminBit: return "'Zfh' (Half-Precision Floating-Point) or 'Zfhmin' (Half-Precision Floating-Point Minimal)";

  case Feature_HasStdExtZfinxBit: return "'Zfinx' (Float in Integer)";

  case Feature_HasStdExtZdinxBit: return "'Zdinx' (Double in Integer)";

  case Feature_HasStdExtZhinxminBit: return "'Zhinxmin' (Half Float in Integer Minimal)";

  case Feature_HasStdExtZhinxBit: return "'Zhinx' (Half Float in Integer)";

  case Feature_HasStdExtZhinxOrZhinxminBit: return "'Zhinx' (Half Float in Integer) or 'Zhinxmin' (Half Float in Integer Minimal)";

  case Feature_HasStdExtZfaBit: return "'Zfa' (Additional Floating-Point)";

  case Feature_HasStdExtCBit: return "'C' (Compressed Instructions)";

  case Feature_HasStdExtZbaBit: return "'Zba' (Address Generation Instructions)";

  case Feature_HasStdExtZbbBit: return "'Zbb' (Basic Bit-Manipulation)";

  case Feature_HasStdExtZbcBit: return "'Zbc' (Carry-Less Multiplication)";

  case Feature_HasStdExtZbsBit: return "'Zbs' (Single-Bit Instructions)";

  case Feature_HasStdExtZbkbBit: return "'Zbkb' (Bitmanip instructions for Cryptography)";

  case Feature_HasStdExtZbkxBit: return "'Zbkx' (Crossbar permutation instructions)";

  case Feature_HasStdExtZbbOrZbkbBit: return "'Zbb' (Basic Bit-Manipulation) or 'Zbkb' (Bitmanip instructions for Cryptography)";

  case Feature_HasStdExtZbkcBit: return "'Zbkc' (Carry-less multiply instructions for Cryptography)";

  case Feature_HasStdExtZbcOrZbkcBit: return "'Zbc' (Carry-Less Multiplication) or 'Zbkc' (Carry-less multiply instructions for Cryptography)";

  case Feature_HasStdExtZkndBit: return "'Zknd' (NIST Suite: AES Decryption)";

  case Feature_HasStdExtZkneBit: return "'Zkne' (NIST Suite: AES Encryption)";

  case Feature_HasStdExtZkndOrZkneBit: return "'Zknd' (NIST Suite: AES Decryption) or 'Zkne' (NIST Suite: AES Encryption)";

  case Feature_HasStdExtZknhBit: return "'Zknh' (NIST Suite: Hash Function Instructions)";

  case Feature_HasStdExtZksedBit: return "'Zksed' (ShangMi Suite: SM4 Block Cipher Instructions)";

  case Feature_HasStdExtZkshBit: return "'Zksh' (ShangMi Suite: SM3 Hash Function Instructions)";

  case Feature_HasStdExtZkrBit: return "'Zkr' (Entropy Source Extension)";

  case Feature_HasStdExtCOrZcaBit: return "'C' (Compressed Instructions) or 'Zca' (part of the C extension, excluding compressed floating point loads/stores)";

  case Feature_HasStdExtZcbBit: return "'Zcb' (Compressed basic bit manipulation instructions)";

  case Feature_HasStdExtCOrZcdBit: return "'C' (Compressed Instructions) or 'Zcd' (Compressed Double-Precision Floating-Point Instructions)";

  case Feature_HasStdExtZcmpBit: return "'Zcmp' (sequenced instuctions for code-size reduction)";

  case Feature_HasStdExtZcmtBit: return "'Zcmt' (table jump instuctions for code-size reduction)";

  case Feature_HasStdExtCOrZcfOrZceBit: return "'C' (Compressed Instructions) or 'Zcf' (Compressed Single-Precision Floating-Point Instructions)";

  case Feature_HasRVCHintsBit: return "RVC Hint Instructions";

  case Feature_HasVInstructionsBit: return "'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors)";

  case Feature_HasVInstructionsI64Bit: return "'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors)";

  case Feature_HasVInstructionsAnyFBit: return "'V' (Vector Extension for Application Processors), 'Zve32f' (Vector Extensions for Embedded Processors)";

  case Feature_HasStdExtZfbfminBit: return "'Zfbfmin' (Scalar BF16 Converts)";

  case Feature_HasStdExtZvfbfminBit: return "'Zvfbfmin' (Vector BF16 Converts)";

  case Feature_HasStdExtZvfbfwmaBit: return "'Zvfbfwma' (Vector BF16 widening mul-add)";

  case Feature_HasVInstructionsF16MinimalBit: return "'Zvfhmin' (Vector Half-Precision Floating-Point Minimal) or 'Zvfh' (Vector Half-Precision Floating-Point)";

  case Feature_HasStdExtZfhOrZvfhBit: return "'Zfh' (Half-Precision Floating-Point) or 'Zvfh' (Vector Half-Precision Floating-Point)";

  case Feature_HasStdExtZicbomBit: return "'Zicbom' (Cache-Block Management Instructions)";

  case Feature_HasStdExtZicbozBit: return "'Zicboz' (Cache-Block Zero Instructions)";

  case Feature_HasStdExtZicbopBit: return "'Zicbop' (Cache-Block Prefetch Instructions)";

  case Feature_HasStdExtSvinvalBit: return "'Svinval' (Fine-Grained Address-Translation Cache Invalidation)";

  case Feature_HasStdExtZtsoBit: return "'Ztso' (Memory Model - Total Store Order)";

  case Feature_HasStdExtZawrsBit: return "'Zawrs' (Wait on Reservation Set)";

  case Feature_HasStdExtZvkbBit: return "'Zvkb' (Vector Bit-manipulation used in Cryptography)";

  case Feature_HasStdExtZvbbBit: return "'Zvbb' (Vector basic bit-manipulation instructions)";

  case Feature_HasStdExtZvbcBit: return "'Zvbc' (Vector Carryless Multiplication)";

  case Feature_HasStdExtZvkgBit: return "'Zvkg' (Vector GCM instructions for Cryptography)";

  case Feature_HasStdExtZvknedBit: return "'Zvkned' (Vector AES Encryption & Decryption (Single Round))";

  case Feature_HasStdExtZvknhaBit: return "'Zvknha' (Vector SHA-2 (SHA-256 only))";

  case Feature_HasStdExtZvknhbBit: return "'Zvknhb' (Vector SHA-2 (SHA-256 and SHA-512))";

  case Feature_HasStdExtZvknhaOrZvknhbBit: return "'Zvknha' or 'Zvknhb' (Vector SHA-2)";

  case Feature_HasStdExtZvksedBit: return "'Zvksed' (SM4 Block Cipher Instructions)";

  case Feature_HasStdExtZvkshBit: return "'Zvksh' (SM3 Hash Function Instructions)";

  case Feature_HasStdExtZicfilpBit: return "'Zicfilp' (Landing pad)";

  case Feature_HasStdExtZicondBit: return "'Zicond' (Integer Conditional Operations)";

  case Feature_HasStdExtZimopBit: return "'Zimop' (May-Be-Operations)";

  case Feature_HasStdExtZcmopBit: return "'Zcmop' (Compressed May-Be-Operations)";

  case Feature_HasStdExtZicfissBit: return "'Zicfiss' (Shadow stack)";

  case Feature_HasHalfFPLoadStoreMoveBit: return "'Zfh' (Half-Precision Floating-Point) or 'Zfhmin' (Half-Precision Floating-Point Minimal) or 'Zfbfmin' (Scalar BF16 Converts)";

  case Feature_HasStdExtZacasBit: return "'Zacas' (Atomic Compare-And-Swap Instructions)";

  case Feature_HasVendorXVentanaCondOpsBit: return "'XVentanaCondOps' (Ventana Conditional Ops)";

  case Feature_HasVendorXTHeadBaBit: return "'xtheadba' (T-Head address calculation instructions)";

  case Feature_HasVendorXTHeadBbBit: return "'xtheadbb' (T-Head basic bit-manipulation instructions)";

  case Feature_HasVendorXTHeadBsBit: return "'xtheadbs' (T-Head single-bit instructions)";

  case Feature_HasVendorXTHeadCondMovBit: return "'xtheadcondmov' (T-Head conditional move instructions)";

  case Feature_HasVendorXTHeadCmoBit: return "'xtheadcmo' (T-Head cache management instructions)";

  case Feature_HasVendorXTHeadFMemIdxBit: return "'xtheadfmemidx' (T-Head FP Indexed Memory Operations)";

  case Feature_HasVendorXTHeadMacBit: return "'xtheadmac' (T-Head Multiply-Accumulate Instructions)";

  case Feature_HasVendorXTHeadMemIdxBit: return "'xtheadmemidx' (T-Head Indexed Memory Operations)";

  case Feature_HasVendorXTHeadMemPairBit: return "'xtheadmempair' (T-Head two-GPR Memory Operations)";

  case Feature_HasVendorXTHeadSyncBit: return "'xtheadsync' (T-Head multicore synchronization instructions)";

  case Feature_HasVendorXTHeadVdotBit: return "'xtheadvdot' (T-Head Vector Extensions for Dot)";

  case Feature_HasVendorXSfvcpBit: return "'XSfvcp' (SiFive Custom Vector Coprocessor Interface Instructions)";

  case Feature_HasVendorXSfvqmaccdodBit: return "'XSfvqmaccdod' (SiFive Int8 Matrix Multiplication Instructions (2-by-8 and 8-by-2))";

  case Feature_HasVendorXSfvqmaccqoqBit: return "'XSfvqmaccqoq' (SiFive Int8 Matrix Multiplication Instructions (4-by-8 and 8-by-4))";

  case Feature_HasVendorXSfvfwmaccqqqBit: return "'XSfvfwmaccqqq' (SiFive Matrix Multiply Accumulate Instruction and 4-by-4))";

  case Feature_HasVendorXSfvfnrclipxfqfBit: return "'XSfvfnrclipxfqf' (SiFive FP32-to-int8 Ranged Clip Instructions)";

  case Feature_HasVendorXCVelwBit: return "'XCVelw' (CORE-V Event Load Word)";

  case Feature_HasVendorXCVbitmanipBit: return "'XCVbitmanip' (CORE-V Bit Manipulation)";

  case Feature_HasVendorXCVmacBit: return "'XCVmac' (CORE-V Multiply-Accumulate)";

  case Feature_HasVendorXCVmemBit: return "'XCVmem' (CORE-V Post-incrementing Load & Store)";

  case Feature_HasVendorXCValuBit: return "'XCValu' (CORE-V ALU Operations)";

  case Feature_HasVendorXCVsimdBit: return "'XCVsimd' (CORE-V SIMD ALU)";

  case Feature_HasVendorXCVbiBit: return "'XCVbi' (CORE-V Immediate Branching)";

  case Feature_IsRV64Bit: return "RV64I Base Instruction Set";

  case Feature_IsRV32Bit: return "RV32I Base Instruction Set";

  case Feature_IsRVEBit: return "";

  default: return "(unknown)";

  }

}

#endif // GET_SUBTARGET_FEATURE_NAME