/src/build/lib/Target/SystemZ/SystemZGenInstrInfo.inc
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1 | | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
2 | | |* *| |
3 | | |* Target Instruction Enum Values and Descriptors *| |
4 | | |* *| |
5 | | |* Automatically generated file, do not edit! *| |
6 | | |* *| |
7 | | \*===----------------------------------------------------------------------===*/ |
8 | | |
9 | | #ifdef GET_INSTRINFO_ENUM |
10 | | #undef GET_INSTRINFO_ENUM |
11 | | namespace llvm { |
12 | | |
13 | | namespace SystemZ { |
14 | | enum { |
15 | | PHI = 0, |
16 | | INLINEASM = 1, |
17 | | INLINEASM_BR = 2, |
18 | | CFI_INSTRUCTION = 3, |
19 | | EH_LABEL = 4, |
20 | | GC_LABEL = 5, |
21 | | ANNOTATION_LABEL = 6, |
22 | | KILL = 7, |
23 | | EXTRACT_SUBREG = 8, |
24 | | INSERT_SUBREG = 9, |
25 | | IMPLICIT_DEF = 10, |
26 | | SUBREG_TO_REG = 11, |
27 | | COPY_TO_REGCLASS = 12, |
28 | | DBG_VALUE = 13, |
29 | | DBG_VALUE_LIST = 14, |
30 | | DBG_INSTR_REF = 15, |
31 | | DBG_PHI = 16, |
32 | | DBG_LABEL = 17, |
33 | | REG_SEQUENCE = 18, |
34 | | COPY = 19, |
35 | | BUNDLE = 20, |
36 | | LIFETIME_START = 21, |
37 | | LIFETIME_END = 22, |
38 | | PSEUDO_PROBE = 23, |
39 | | ARITH_FENCE = 24, |
40 | | STACKMAP = 25, |
41 | | FENTRY_CALL = 26, |
42 | | PATCHPOINT = 27, |
43 | | LOAD_STACK_GUARD = 28, |
44 | | PREALLOCATED_SETUP = 29, |
45 | | PREALLOCATED_ARG = 30, |
46 | | STATEPOINT = 31, |
47 | | LOCAL_ESCAPE = 32, |
48 | | FAULTING_OP = 33, |
49 | | PATCHABLE_OP = 34, |
50 | | PATCHABLE_FUNCTION_ENTER = 35, |
51 | | PATCHABLE_RET = 36, |
52 | | PATCHABLE_FUNCTION_EXIT = 37, |
53 | | PATCHABLE_TAIL_CALL = 38, |
54 | | PATCHABLE_EVENT_CALL = 39, |
55 | | PATCHABLE_TYPED_EVENT_CALL = 40, |
56 | | ICALL_BRANCH_FUNNEL = 41, |
57 | | MEMBARRIER = 42, |
58 | | JUMP_TABLE_DEBUG_INFO = 43, |
59 | | G_ASSERT_SEXT = 44, |
60 | | G_ASSERT_ZEXT = 45, |
61 | | G_ASSERT_ALIGN = 46, |
62 | | G_ADD = 47, |
63 | | G_SUB = 48, |
64 | | G_MUL = 49, |
65 | | G_SDIV = 50, |
66 | | G_UDIV = 51, |
67 | | G_SREM = 52, |
68 | | G_UREM = 53, |
69 | | G_SDIVREM = 54, |
70 | | G_UDIVREM = 55, |
71 | | G_AND = 56, |
72 | | G_OR = 57, |
73 | | G_XOR = 58, |
74 | | G_IMPLICIT_DEF = 59, |
75 | | G_PHI = 60, |
76 | | G_FRAME_INDEX = 61, |
77 | | G_GLOBAL_VALUE = 62, |
78 | | G_CONSTANT_POOL = 63, |
79 | | G_EXTRACT = 64, |
80 | | G_UNMERGE_VALUES = 65, |
81 | | G_INSERT = 66, |
82 | | G_MERGE_VALUES = 67, |
83 | | G_BUILD_VECTOR = 68, |
84 | | G_BUILD_VECTOR_TRUNC = 69, |
85 | | G_CONCAT_VECTORS = 70, |
86 | | G_PTRTOINT = 71, |
87 | | G_INTTOPTR = 72, |
88 | | G_BITCAST = 73, |
89 | | G_FREEZE = 74, |
90 | | G_CONSTANT_FOLD_BARRIER = 75, |
91 | | G_INTRINSIC_FPTRUNC_ROUND = 76, |
92 | | G_INTRINSIC_TRUNC = 77, |
93 | | G_INTRINSIC_ROUND = 78, |
94 | | G_INTRINSIC_LRINT = 79, |
95 | | G_INTRINSIC_ROUNDEVEN = 80, |
96 | | G_READCYCLECOUNTER = 81, |
97 | | G_LOAD = 82, |
98 | | G_SEXTLOAD = 83, |
99 | | G_ZEXTLOAD = 84, |
100 | | G_INDEXED_LOAD = 85, |
101 | | G_INDEXED_SEXTLOAD = 86, |
102 | | G_INDEXED_ZEXTLOAD = 87, |
103 | | G_STORE = 88, |
104 | | G_INDEXED_STORE = 89, |
105 | | G_ATOMIC_CMPXCHG_WITH_SUCCESS = 90, |
106 | | G_ATOMIC_CMPXCHG = 91, |
107 | | G_ATOMICRMW_XCHG = 92, |
108 | | G_ATOMICRMW_ADD = 93, |
109 | | G_ATOMICRMW_SUB = 94, |
110 | | G_ATOMICRMW_AND = 95, |
111 | | G_ATOMICRMW_NAND = 96, |
112 | | G_ATOMICRMW_OR = 97, |
113 | | G_ATOMICRMW_XOR = 98, |
114 | | G_ATOMICRMW_MAX = 99, |
115 | | G_ATOMICRMW_MIN = 100, |
116 | | G_ATOMICRMW_UMAX = 101, |
117 | | G_ATOMICRMW_UMIN = 102, |
118 | | G_ATOMICRMW_FADD = 103, |
119 | | G_ATOMICRMW_FSUB = 104, |
120 | | G_ATOMICRMW_FMAX = 105, |
121 | | G_ATOMICRMW_FMIN = 106, |
122 | | G_ATOMICRMW_UINC_WRAP = 107, |
123 | | G_ATOMICRMW_UDEC_WRAP = 108, |
124 | | G_FENCE = 109, |
125 | | G_PREFETCH = 110, |
126 | | G_BRCOND = 111, |
127 | | G_BRINDIRECT = 112, |
128 | | G_INVOKE_REGION_START = 113, |
129 | | G_INTRINSIC = 114, |
130 | | G_INTRINSIC_W_SIDE_EFFECTS = 115, |
131 | | G_INTRINSIC_CONVERGENT = 116, |
132 | | G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS = 117, |
133 | | G_ANYEXT = 118, |
134 | | G_TRUNC = 119, |
135 | | G_CONSTANT = 120, |
136 | | G_FCONSTANT = 121, |
137 | | G_VASTART = 122, |
138 | | G_VAARG = 123, |
139 | | G_SEXT = 124, |
140 | | G_SEXT_INREG = 125, |
141 | | G_ZEXT = 126, |
142 | | G_SHL = 127, |
143 | | G_LSHR = 128, |
144 | | G_ASHR = 129, |
145 | | G_FSHL = 130, |
146 | | G_FSHR = 131, |
147 | | G_ROTR = 132, |
148 | | G_ROTL = 133, |
149 | | G_ICMP = 134, |
150 | | G_FCMP = 135, |
151 | | G_SELECT = 136, |
152 | | G_UADDO = 137, |
153 | | G_UADDE = 138, |
154 | | G_USUBO = 139, |
155 | | G_USUBE = 140, |
156 | | G_SADDO = 141, |
157 | | G_SADDE = 142, |
158 | | G_SSUBO = 143, |
159 | | G_SSUBE = 144, |
160 | | G_UMULO = 145, |
161 | | G_SMULO = 146, |
162 | | G_UMULH = 147, |
163 | | G_SMULH = 148, |
164 | | G_UADDSAT = 149, |
165 | | G_SADDSAT = 150, |
166 | | G_USUBSAT = 151, |
167 | | G_SSUBSAT = 152, |
168 | | G_USHLSAT = 153, |
169 | | G_SSHLSAT = 154, |
170 | | G_SMULFIX = 155, |
171 | | G_UMULFIX = 156, |
172 | | G_SMULFIXSAT = 157, |
173 | | G_UMULFIXSAT = 158, |
174 | | G_SDIVFIX = 159, |
175 | | G_UDIVFIX = 160, |
176 | | G_SDIVFIXSAT = 161, |
177 | | G_UDIVFIXSAT = 162, |
178 | | G_FADD = 163, |
179 | | G_FSUB = 164, |
180 | | G_FMUL = 165, |
181 | | G_FMA = 166, |
182 | | G_FMAD = 167, |
183 | | G_FDIV = 168, |
184 | | G_FREM = 169, |
185 | | G_FPOW = 170, |
186 | | G_FPOWI = 171, |
187 | | G_FEXP = 172, |
188 | | G_FEXP2 = 173, |
189 | | G_FEXP10 = 174, |
190 | | G_FLOG = 175, |
191 | | G_FLOG2 = 176, |
192 | | G_FLOG10 = 177, |
193 | | G_FLDEXP = 178, |
194 | | G_FFREXP = 179, |
195 | | G_FNEG = 180, |
196 | | G_FPEXT = 181, |
197 | | G_FPTRUNC = 182, |
198 | | G_FPTOSI = 183, |
199 | | G_FPTOUI = 184, |
200 | | G_SITOFP = 185, |
201 | | G_UITOFP = 186, |
202 | | G_FABS = 187, |
203 | | G_FCOPYSIGN = 188, |
204 | | G_IS_FPCLASS = 189, |
205 | | G_FCANONICALIZE = 190, |
206 | | G_FMINNUM = 191, |
207 | | G_FMAXNUM = 192, |
208 | | G_FMINNUM_IEEE = 193, |
209 | | G_FMAXNUM_IEEE = 194, |
210 | | G_FMINIMUM = 195, |
211 | | G_FMAXIMUM = 196, |
212 | | G_GET_FPENV = 197, |
213 | | G_SET_FPENV = 198, |
214 | | G_RESET_FPENV = 199, |
215 | | G_GET_FPMODE = 200, |
216 | | G_SET_FPMODE = 201, |
217 | | G_RESET_FPMODE = 202, |
218 | | G_PTR_ADD = 203, |
219 | | G_PTRMASK = 204, |
220 | | G_SMIN = 205, |
221 | | G_SMAX = 206, |
222 | | G_UMIN = 207, |
223 | | G_UMAX = 208, |
224 | | G_ABS = 209, |
225 | | G_LROUND = 210, |
226 | | G_LLROUND = 211, |
227 | | G_BR = 212, |
228 | | G_BRJT = 213, |
229 | | G_INSERT_VECTOR_ELT = 214, |
230 | | G_EXTRACT_VECTOR_ELT = 215, |
231 | | G_SHUFFLE_VECTOR = 216, |
232 | | G_CTTZ = 217, |
233 | | G_CTTZ_ZERO_UNDEF = 218, |
234 | | G_CTLZ = 219, |
235 | | G_CTLZ_ZERO_UNDEF = 220, |
236 | | G_CTPOP = 221, |
237 | | G_BSWAP = 222, |
238 | | G_BITREVERSE = 223, |
239 | | G_FCEIL = 224, |
240 | | G_FCOS = 225, |
241 | | G_FSIN = 226, |
242 | | G_FSQRT = 227, |
243 | | G_FFLOOR = 228, |
244 | | G_FRINT = 229, |
245 | | G_FNEARBYINT = 230, |
246 | | G_ADDRSPACE_CAST = 231, |
247 | | G_BLOCK_ADDR = 232, |
248 | | G_JUMP_TABLE = 233, |
249 | | G_DYN_STACKALLOC = 234, |
250 | | G_STACKSAVE = 235, |
251 | | G_STACKRESTORE = 236, |
252 | | G_STRICT_FADD = 237, |
253 | | G_STRICT_FSUB = 238, |
254 | | G_STRICT_FMUL = 239, |
255 | | G_STRICT_FDIV = 240, |
256 | | G_STRICT_FREM = 241, |
257 | | G_STRICT_FMA = 242, |
258 | | G_STRICT_FSQRT = 243, |
259 | | G_STRICT_FLDEXP = 244, |
260 | | G_READ_REGISTER = 245, |
261 | | G_WRITE_REGISTER = 246, |
262 | | G_MEMCPY = 247, |
263 | | G_MEMCPY_INLINE = 248, |
264 | | G_MEMMOVE = 249, |
265 | | G_MEMSET = 250, |
266 | | G_BZERO = 251, |
267 | | G_VECREDUCE_SEQ_FADD = 252, |
268 | | G_VECREDUCE_SEQ_FMUL = 253, |
269 | | G_VECREDUCE_FADD = 254, |
270 | | G_VECREDUCE_FMUL = 255, |
271 | | G_VECREDUCE_FMAX = 256, |
272 | | G_VECREDUCE_FMIN = 257, |
273 | | G_VECREDUCE_FMAXIMUM = 258, |
274 | | G_VECREDUCE_FMINIMUM = 259, |
275 | | G_VECREDUCE_ADD = 260, |
276 | | G_VECREDUCE_MUL = 261, |
277 | | G_VECREDUCE_AND = 262, |
278 | | G_VECREDUCE_OR = 263, |
279 | | G_VECREDUCE_XOR = 264, |
280 | | G_VECREDUCE_SMAX = 265, |
281 | | G_VECREDUCE_SMIN = 266, |
282 | | G_VECREDUCE_UMAX = 267, |
283 | | G_VECREDUCE_UMIN = 268, |
284 | | G_SBFX = 269, |
285 | | G_UBFX = 270, |
286 | | ADA_ENTRY = 271, |
287 | | ADA_ENTRY_VALUE = 272, |
288 | | ADB_MemFoldPseudo = 273, |
289 | | ADJCALLSTACKDOWN = 274, |
290 | | ADJCALLSTACKUP = 275, |
291 | | ADJDYNALLOC = 276, |
292 | | AEB_MemFoldPseudo = 277, |
293 | | AEXT128 = 278, |
294 | | AFIMux = 279, |
295 | | AG_MemFoldPseudo = 280, |
296 | | AHIMux = 281, |
297 | | AHIMuxK = 282, |
298 | | ALG_MemFoldPseudo = 283, |
299 | | AL_MemFoldPseudo = 284, |
300 | | ATOMIC_CMP_SWAPW = 285, |
301 | | ATOMIC_LOADW_AFI = 286, |
302 | | ATOMIC_LOADW_AR = 287, |
303 | | ATOMIC_LOADW_MAX = 288, |
304 | | ATOMIC_LOADW_MIN = 289, |
305 | | ATOMIC_LOADW_NILH = 290, |
306 | | ATOMIC_LOADW_NILHi = 291, |
307 | | ATOMIC_LOADW_NR = 292, |
308 | | ATOMIC_LOADW_NRi = 293, |
309 | | ATOMIC_LOADW_OILH = 294, |
310 | | ATOMIC_LOADW_OR = 295, |
311 | | ATOMIC_LOADW_SR = 296, |
312 | | ATOMIC_LOADW_UMAX = 297, |
313 | | ATOMIC_LOADW_UMIN = 298, |
314 | | ATOMIC_LOADW_XILF = 299, |
315 | | ATOMIC_LOADW_XR = 300, |
316 | | ATOMIC_SWAPW = 301, |
317 | | A_MemFoldPseudo = 302, |
318 | | CFIMux = 303, |
319 | | CGIBCall = 304, |
320 | | CGIBReturn = 305, |
321 | | CGRBCall = 306, |
322 | | CGRBReturn = 307, |
323 | | CHIMux = 308, |
324 | | CIBCall = 309, |
325 | | CIBReturn = 310, |
326 | | CLCImm = 311, |
327 | | CLCReg = 312, |
328 | | CLFIMux = 313, |
329 | | CLGIBCall = 314, |
330 | | CLGIBReturn = 315, |
331 | | CLGRBCall = 316, |
332 | | CLGRBReturn = 317, |
333 | | CLIBCall = 318, |
334 | | CLIBReturn = 319, |
335 | | CLMux = 320, |
336 | | CLRBCall = 321, |
337 | | CLRBReturn = 322, |
338 | | CLSTLoop = 323, |
339 | | CMux = 324, |
340 | | CRBCall = 325, |
341 | | CRBReturn = 326, |
342 | | CallBASR = 327, |
343 | | CallBASR_STACKEXT = 328, |
344 | | CallBASR_XPLINK64 = 329, |
345 | | CallBCR = 330, |
346 | | CallBR = 331, |
347 | | CallBRASL = 332, |
348 | | CallBRASL_XPLINK64 = 333, |
349 | | CallBRCL = 334, |
350 | | CallJG = 335, |
351 | | CondReturn = 336, |
352 | | CondReturn_XPLINK = 337, |
353 | | CondStore16 = 338, |
354 | | CondStore16Inv = 339, |
355 | | CondStore16Mux = 340, |
356 | | CondStore16MuxInv = 341, |
357 | | CondStore32 = 342, |
358 | | CondStore32Inv = 343, |
359 | | CondStore32Mux = 344, |
360 | | CondStore32MuxInv = 345, |
361 | | CondStore64 = 346, |
362 | | CondStore64Inv = 347, |
363 | | CondStore8 = 348, |
364 | | CondStore8Inv = 349, |
365 | | CondStore8Mux = 350, |
366 | | CondStore8MuxInv = 351, |
367 | | CondStoreF32 = 352, |
368 | | CondStoreF32Inv = 353, |
369 | | CondStoreF64 = 354, |
370 | | CondStoreF64Inv = 355, |
371 | | CondTrap = 356, |
372 | | DDB_MemFoldPseudo = 357, |
373 | | DEB_MemFoldPseudo = 358, |
374 | | EXRL_Pseudo = 359, |
375 | | GOT = 360, |
376 | | IIFMux = 361, |
377 | | IIHF64 = 362, |
378 | | IIHH64 = 363, |
379 | | IIHL64 = 364, |
380 | | IIHMux = 365, |
381 | | IILF64 = 366, |
382 | | IILH64 = 367, |
383 | | IILL64 = 368, |
384 | | IILMux = 369, |
385 | | L128 = 370, |
386 | | LBMux = 371, |
387 | | LEFR = 372, |
388 | | LFER = 373, |
389 | | LHIMux = 374, |
390 | | LHMux = 375, |
391 | | LLCMux = 376, |
392 | | LLCRMux = 377, |
393 | | LLHMux = 378, |
394 | | LLHRMux = 379, |
395 | | LMux = 380, |
396 | | LOCG_MemFoldPseudo = 381, |
397 | | LOCHIMux = 382, |
398 | | LOCMux = 383, |
399 | | LOCMux_MemFoldPseudo = 384, |
400 | | LOCRMux = 385, |
401 | | LTDBRCompare_Pseudo = 386, |
402 | | LTEBRCompare_Pseudo = 387, |
403 | | LTXBRCompare_Pseudo = 388, |
404 | | LX = 389, |
405 | | MADB_MemFoldPseudo = 390, |
406 | | MAEB_MemFoldPseudo = 391, |
407 | | MDB_MemFoldPseudo = 392, |
408 | | MEEB_MemFoldPseudo = 393, |
409 | | MSC_MemFoldPseudo = 394, |
410 | | MSDB_MemFoldPseudo = 395, |
411 | | MSEB_MemFoldPseudo = 396, |
412 | | MSGC_MemFoldPseudo = 397, |
413 | | MVCImm = 398, |
414 | | MVCReg = 399, |
415 | | MVSTLoop = 400, |
416 | | MemsetImmImm = 401, |
417 | | MemsetImmReg = 402, |
418 | | MemsetRegImm = 403, |
419 | | MemsetRegReg = 404, |
420 | | NCImm = 405, |
421 | | NCReg = 406, |
422 | | NG_MemFoldPseudo = 407, |
423 | | NIFMux = 408, |
424 | | NIHF64 = 409, |
425 | | NIHH64 = 410, |
426 | | NIHL64 = 411, |
427 | | NIHMux = 412, |
428 | | NILF64 = 413, |
429 | | NILH64 = 414, |
430 | | NILL64 = 415, |
431 | | NILMux = 416, |
432 | | N_MemFoldPseudo = 417, |
433 | | OCImm = 418, |
434 | | OCReg = 419, |
435 | | OG_MemFoldPseudo = 420, |
436 | | OIFMux = 421, |
437 | | OIHF64 = 422, |
438 | | OIHH64 = 423, |
439 | | OIHL64 = 424, |
440 | | OIHMux = 425, |
441 | | OILF64 = 426, |
442 | | OILH64 = 427, |
443 | | OILL64 = 428, |
444 | | OILMux = 429, |
445 | | O_MemFoldPseudo = 430, |
446 | | PAIR128 = 431, |
447 | | PROBED_ALLOCA = 432, |
448 | | PROBED_STACKALLOC = 433, |
449 | | RISBHH = 434, |
450 | | RISBHL = 435, |
451 | | RISBLH = 436, |
452 | | RISBLL = 437, |
453 | | RISBMux = 438, |
454 | | Return = 439, |
455 | | Return_XPLINK = 440, |
456 | | SCmp128Hi = 441, |
457 | | SDB_MemFoldPseudo = 442, |
458 | | SEB_MemFoldPseudo = 443, |
459 | | SELRMux = 444, |
460 | | SG_MemFoldPseudo = 445, |
461 | | SLG_MemFoldPseudo = 446, |
462 | | SL_MemFoldPseudo = 447, |
463 | | SRSTLoop = 448, |
464 | | ST128 = 449, |
465 | | STCMux = 450, |
466 | | STHMux = 451, |
467 | | STMux = 452, |
468 | | STOCMux = 453, |
469 | | STX = 454, |
470 | | S_MemFoldPseudo = 455, |
471 | | Select128 = 456, |
472 | | Select32 = 457, |
473 | | Select64 = 458, |
474 | | SelectF128 = 459, |
475 | | SelectF32 = 460, |
476 | | SelectF64 = 461, |
477 | | SelectVR128 = 462, |
478 | | SelectVR32 = 463, |
479 | | SelectVR64 = 464, |
480 | | Serialize = 465, |
481 | | TBEGIN_nofloat = 466, |
482 | | TLS_GDCALL = 467, |
483 | | TLS_LDCALL = 468, |
484 | | TMHH64 = 469, |
485 | | TMHL64 = 470, |
486 | | TMHMux = 471, |
487 | | TMLH64 = 472, |
488 | | TMLL64 = 473, |
489 | | TMLMux = 474, |
490 | | Trap = 475, |
491 | | UCmp128Hi = 476, |
492 | | VL32 = 477, |
493 | | VL64 = 478, |
494 | | VLR32 = 479, |
495 | | VLR64 = 480, |
496 | | VLVGP32 = 481, |
497 | | VST32 = 482, |
498 | | VST64 = 483, |
499 | | XCImm = 484, |
500 | | XCReg = 485, |
501 | | XG_MemFoldPseudo = 486, |
502 | | XIFMux = 487, |
503 | | XIHF64 = 488, |
504 | | XILF64 = 489, |
505 | | XPLINK_STACKALLOC = 490, |
506 | | X_MemFoldPseudo = 491, |
507 | | ZEXT128 = 492, |
508 | | A = 493, |
509 | | AD = 494, |
510 | | ADB = 495, |
511 | | ADBR = 496, |
512 | | ADR = 497, |
513 | | ADTR = 498, |
514 | | ADTRA = 499, |
515 | | AE = 500, |
516 | | AEB = 501, |
517 | | AEBR = 502, |
518 | | AER = 503, |
519 | | AFI = 504, |
520 | | AG = 505, |
521 | | AGF = 506, |
522 | | AGFI = 507, |
523 | | AGFR = 508, |
524 | | AGH = 509, |
525 | | AGHI = 510, |
526 | | AGHIK = 511, |
527 | | AGR = 512, |
528 | | AGRK = 513, |
529 | | AGSI = 514, |
530 | | AH = 515, |
531 | | AHHHR = 516, |
532 | | AHHLR = 517, |
533 | | AHI = 518, |
534 | | AHIK = 519, |
535 | | AHY = 520, |
536 | | AIH = 521, |
537 | | AL = 522, |
538 | | ALC = 523, |
539 | | ALCG = 524, |
540 | | ALCGR = 525, |
541 | | ALCR = 526, |
542 | | ALFI = 527, |
543 | | ALG = 528, |
544 | | ALGF = 529, |
545 | | ALGFI = 530, |
546 | | ALGFR = 531, |
547 | | ALGHSIK = 532, |
548 | | ALGR = 533, |
549 | | ALGRK = 534, |
550 | | ALGSI = 535, |
551 | | ALHHHR = 536, |
552 | | ALHHLR = 537, |
553 | | ALHSIK = 538, |
554 | | ALR = 539, |
555 | | ALRK = 540, |
556 | | ALSI = 541, |
557 | | ALSIH = 542, |
558 | | ALSIHN = 543, |
559 | | ALY = 544, |
560 | | AP = 545, |
561 | | AR = 546, |
562 | | ARK = 547, |
563 | | ASI = 548, |
564 | | AU = 549, |
565 | | AUR = 550, |
566 | | AW = 551, |
567 | | AWR = 552, |
568 | | AXBR = 553, |
569 | | AXR = 554, |
570 | | AXTR = 555, |
571 | | AXTRA = 556, |
572 | | AY = 557, |
573 | | B = 558, |
574 | | BAKR = 559, |
575 | | BAL = 560, |
576 | | BALR = 561, |
577 | | BAS = 562, |
578 | | BASR = 563, |
579 | | BASSM = 564, |
580 | | BAsmE = 565, |
581 | | BAsmH = 566, |
582 | | BAsmHE = 567, |
583 | | BAsmL = 568, |
584 | | BAsmLE = 569, |
585 | | BAsmLH = 570, |
586 | | BAsmM = 571, |
587 | | BAsmNE = 572, |
588 | | BAsmNH = 573, |
589 | | BAsmNHE = 574, |
590 | | BAsmNL = 575, |
591 | | BAsmNLE = 576, |
592 | | BAsmNLH = 577, |
593 | | BAsmNM = 578, |
594 | | BAsmNO = 579, |
595 | | BAsmNP = 580, |
596 | | BAsmNZ = 581, |
597 | | BAsmO = 582, |
598 | | BAsmP = 583, |
599 | | BAsmZ = 584, |
600 | | BC = 585, |
601 | | BCAsm = 586, |
602 | | BCR = 587, |
603 | | BCRAsm = 588, |
604 | | BCT = 589, |
605 | | BCTG = 590, |
606 | | BCTGR = 591, |
607 | | BCTR = 592, |
608 | | BI = 593, |
609 | | BIAsmE = 594, |
610 | | BIAsmH = 595, |
611 | | BIAsmHE = 596, |
612 | | BIAsmL = 597, |
613 | | BIAsmLE = 598, |
614 | | BIAsmLH = 599, |
615 | | BIAsmM = 600, |
616 | | BIAsmNE = 601, |
617 | | BIAsmNH = 602, |
618 | | BIAsmNHE = 603, |
619 | | BIAsmNL = 604, |
620 | | BIAsmNLE = 605, |
621 | | BIAsmNLH = 606, |
622 | | BIAsmNM = 607, |
623 | | BIAsmNO = 608, |
624 | | BIAsmNP = 609, |
625 | | BIAsmNZ = 610, |
626 | | BIAsmO = 611, |
627 | | BIAsmP = 612, |
628 | | BIAsmZ = 613, |
629 | | BIC = 614, |
630 | | BICAsm = 615, |
631 | | BPP = 616, |
632 | | BPRP = 617, |
633 | | BR = 618, |
634 | | BRAS = 619, |
635 | | BRASL = 620, |
636 | | BRAsmE = 621, |
637 | | BRAsmH = 622, |
638 | | BRAsmHE = 623, |
639 | | BRAsmL = 624, |
640 | | BRAsmLE = 625, |
641 | | BRAsmLH = 626, |
642 | | BRAsmM = 627, |
643 | | BRAsmNE = 628, |
644 | | BRAsmNH = 629, |
645 | | BRAsmNHE = 630, |
646 | | BRAsmNL = 631, |
647 | | BRAsmNLE = 632, |
648 | | BRAsmNLH = 633, |
649 | | BRAsmNM = 634, |
650 | | BRAsmNO = 635, |
651 | | BRAsmNP = 636, |
652 | | BRAsmNZ = 637, |
653 | | BRAsmO = 638, |
654 | | BRAsmP = 639, |
655 | | BRAsmZ = 640, |
656 | | BRC = 641, |
657 | | BRCAsm = 642, |
658 | | BRCL = 643, |
659 | | BRCLAsm = 644, |
660 | | BRCT = 645, |
661 | | BRCTG = 646, |
662 | | BRCTH = 647, |
663 | | BRXH = 648, |
664 | | BRXHG = 649, |
665 | | BRXLE = 650, |
666 | | BRXLG = 651, |
667 | | BSA = 652, |
668 | | BSG = 653, |
669 | | BSM = 654, |
670 | | BXH = 655, |
671 | | BXHG = 656, |
672 | | BXLE = 657, |
673 | | BXLEG = 658, |
674 | | C = 659, |
675 | | CD = 660, |
676 | | CDB = 661, |
677 | | CDBR = 662, |
678 | | CDFBR = 663, |
679 | | CDFBRA = 664, |
680 | | CDFR = 665, |
681 | | CDFTR = 666, |
682 | | CDGBR = 667, |
683 | | CDGBRA = 668, |
684 | | CDGR = 669, |
685 | | CDGTR = 670, |
686 | | CDGTRA = 671, |
687 | | CDLFBR = 672, |
688 | | CDLFTR = 673, |
689 | | CDLGBR = 674, |
690 | | CDLGTR = 675, |
691 | | CDPT = 676, |
692 | | CDR = 677, |
693 | | CDS = 678, |
694 | | CDSG = 679, |
695 | | CDSTR = 680, |
696 | | CDSY = 681, |
697 | | CDTR = 682, |
698 | | CDUTR = 683, |
699 | | CDZT = 684, |
700 | | CE = 685, |
701 | | CEB = 686, |
702 | | CEBR = 687, |
703 | | CEDTR = 688, |
704 | | CEFBR = 689, |
705 | | CEFBRA = 690, |
706 | | CEFR = 691, |
707 | | CEGBR = 692, |
708 | | CEGBRA = 693, |
709 | | CEGR = 694, |
710 | | CELFBR = 695, |
711 | | CELGBR = 696, |
712 | | CER = 697, |
713 | | CEXTR = 698, |
714 | | CFC = 699, |
715 | | CFDBR = 700, |
716 | | CFDBRA = 701, |
717 | | CFDR = 702, |
718 | | CFDTR = 703, |
719 | | CFEBR = 704, |
720 | | CFEBRA = 705, |
721 | | CFER = 706, |
722 | | CFI = 707, |
723 | | CFXBR = 708, |
724 | | CFXBRA = 709, |
725 | | CFXR = 710, |
726 | | CFXTR = 711, |
727 | | CG = 712, |
728 | | CGDBR = 713, |
729 | | CGDBRA = 714, |
730 | | CGDR = 715, |
731 | | CGDTR = 716, |
732 | | CGDTRA = 717, |
733 | | CGEBR = 718, |
734 | | CGEBRA = 719, |
735 | | CGER = 720, |
736 | | CGF = 721, |
737 | | CGFI = 722, |
738 | | CGFR = 723, |
739 | | CGFRL = 724, |
740 | | CGH = 725, |
741 | | CGHI = 726, |
742 | | CGHRL = 727, |
743 | | CGHSI = 728, |
744 | | CGIB = 729, |
745 | | CGIBAsm = 730, |
746 | | CGIBAsmE = 731, |
747 | | CGIBAsmH = 732, |
748 | | CGIBAsmHE = 733, |
749 | | CGIBAsmL = 734, |
750 | | CGIBAsmLE = 735, |
751 | | CGIBAsmLH = 736, |
752 | | CGIBAsmNE = 737, |
753 | | CGIBAsmNH = 738, |
754 | | CGIBAsmNHE = 739, |
755 | | CGIBAsmNL = 740, |
756 | | CGIBAsmNLE = 741, |
757 | | CGIBAsmNLH = 742, |
758 | | CGIJ = 743, |
759 | | CGIJAsm = 744, |
760 | | CGIJAsmE = 745, |
761 | | CGIJAsmH = 746, |
762 | | CGIJAsmHE = 747, |
763 | | CGIJAsmL = 748, |
764 | | CGIJAsmLE = 749, |
765 | | CGIJAsmLH = 750, |
766 | | CGIJAsmNE = 751, |
767 | | CGIJAsmNH = 752, |
768 | | CGIJAsmNHE = 753, |
769 | | CGIJAsmNL = 754, |
770 | | CGIJAsmNLE = 755, |
771 | | CGIJAsmNLH = 756, |
772 | | CGIT = 757, |
773 | | CGITAsm = 758, |
774 | | CGITAsmE = 759, |
775 | | CGITAsmH = 760, |
776 | | CGITAsmHE = 761, |
777 | | CGITAsmL = 762, |
778 | | CGITAsmLE = 763, |
779 | | CGITAsmLH = 764, |
780 | | CGITAsmNE = 765, |
781 | | CGITAsmNH = 766, |
782 | | CGITAsmNHE = 767, |
783 | | CGITAsmNL = 768, |
784 | | CGITAsmNLE = 769, |
785 | | CGITAsmNLH = 770, |
786 | | CGR = 771, |
787 | | CGRB = 772, |
788 | | CGRBAsm = 773, |
789 | | CGRBAsmE = 774, |
790 | | CGRBAsmH = 775, |
791 | | CGRBAsmHE = 776, |
792 | | CGRBAsmL = 777, |
793 | | CGRBAsmLE = 778, |
794 | | CGRBAsmLH = 779, |
795 | | CGRBAsmNE = 780, |
796 | | CGRBAsmNH = 781, |
797 | | CGRBAsmNHE = 782, |
798 | | CGRBAsmNL = 783, |
799 | | CGRBAsmNLE = 784, |
800 | | CGRBAsmNLH = 785, |
801 | | CGRJ = 786, |
802 | | CGRJAsm = 787, |
803 | | CGRJAsmE = 788, |
804 | | CGRJAsmH = 789, |
805 | | CGRJAsmHE = 790, |
806 | | CGRJAsmL = 791, |
807 | | CGRJAsmLE = 792, |
808 | | CGRJAsmLH = 793, |
809 | | CGRJAsmNE = 794, |
810 | | CGRJAsmNH = 795, |
811 | | CGRJAsmNHE = 796, |
812 | | CGRJAsmNL = 797, |
813 | | CGRJAsmNLE = 798, |
814 | | CGRJAsmNLH = 799, |
815 | | CGRL = 800, |
816 | | CGRT = 801, |
817 | | CGRTAsm = 802, |
818 | | CGRTAsmE = 803, |
819 | | CGRTAsmH = 804, |
820 | | CGRTAsmHE = 805, |
821 | | CGRTAsmL = 806, |
822 | | CGRTAsmLE = 807, |
823 | | CGRTAsmLH = 808, |
824 | | CGRTAsmNE = 809, |
825 | | CGRTAsmNH = 810, |
826 | | CGRTAsmNHE = 811, |
827 | | CGRTAsmNL = 812, |
828 | | CGRTAsmNLE = 813, |
829 | | CGRTAsmNLH = 814, |
830 | | CGXBR = 815, |
831 | | CGXBRA = 816, |
832 | | CGXR = 817, |
833 | | CGXTR = 818, |
834 | | CGXTRA = 819, |
835 | | CH = 820, |
836 | | CHF = 821, |
837 | | CHHR = 822, |
838 | | CHHSI = 823, |
839 | | CHI = 824, |
840 | | CHLR = 825, |
841 | | CHRL = 826, |
842 | | CHSI = 827, |
843 | | CHY = 828, |
844 | | CIB = 829, |
845 | | CIBAsm = 830, |
846 | | CIBAsmE = 831, |
847 | | CIBAsmH = 832, |
848 | | CIBAsmHE = 833, |
849 | | CIBAsmL = 834, |
850 | | CIBAsmLE = 835, |
851 | | CIBAsmLH = 836, |
852 | | CIBAsmNE = 837, |
853 | | CIBAsmNH = 838, |
854 | | CIBAsmNHE = 839, |
855 | | CIBAsmNL = 840, |
856 | | CIBAsmNLE = 841, |
857 | | CIBAsmNLH = 842, |
858 | | CIH = 843, |
859 | | CIJ = 844, |
860 | | CIJAsm = 845, |
861 | | CIJAsmE = 846, |
862 | | CIJAsmH = 847, |
863 | | CIJAsmHE = 848, |
864 | | CIJAsmL = 849, |
865 | | CIJAsmLE = 850, |
866 | | CIJAsmLH = 851, |
867 | | CIJAsmNE = 852, |
868 | | CIJAsmNH = 853, |
869 | | CIJAsmNHE = 854, |
870 | | CIJAsmNL = 855, |
871 | | CIJAsmNLE = 856, |
872 | | CIJAsmNLH = 857, |
873 | | CIT = 858, |
874 | | CITAsm = 859, |
875 | | CITAsmE = 860, |
876 | | CITAsmH = 861, |
877 | | CITAsmHE = 862, |
878 | | CITAsmL = 863, |
879 | | CITAsmLE = 864, |
880 | | CITAsmLH = 865, |
881 | | CITAsmNE = 866, |
882 | | CITAsmNH = 867, |
883 | | CITAsmNHE = 868, |
884 | | CITAsmNL = 869, |
885 | | CITAsmNLE = 870, |
886 | | CITAsmNLH = 871, |
887 | | CKSM = 872, |
888 | | CL = 873, |
889 | | CLC = 874, |
890 | | CLCL = 875, |
891 | | CLCLE = 876, |
892 | | CLCLU = 877, |
893 | | CLFDBR = 878, |
894 | | CLFDTR = 879, |
895 | | CLFEBR = 880, |
896 | | CLFHSI = 881, |
897 | | CLFI = 882, |
898 | | CLFIT = 883, |
899 | | CLFITAsm = 884, |
900 | | CLFITAsmE = 885, |
901 | | CLFITAsmH = 886, |
902 | | CLFITAsmHE = 887, |
903 | | CLFITAsmL = 888, |
904 | | CLFITAsmLE = 889, |
905 | | CLFITAsmLH = 890, |
906 | | CLFITAsmNE = 891, |
907 | | CLFITAsmNH = 892, |
908 | | CLFITAsmNHE = 893, |
909 | | CLFITAsmNL = 894, |
910 | | CLFITAsmNLE = 895, |
911 | | CLFITAsmNLH = 896, |
912 | | CLFXBR = 897, |
913 | | CLFXTR = 898, |
914 | | CLG = 899, |
915 | | CLGDBR = 900, |
916 | | CLGDTR = 901, |
917 | | CLGEBR = 902, |
918 | | CLGF = 903, |
919 | | CLGFI = 904, |
920 | | CLGFR = 905, |
921 | | CLGFRL = 906, |
922 | | CLGHRL = 907, |
923 | | CLGHSI = 908, |
924 | | CLGIB = 909, |
925 | | CLGIBAsm = 910, |
926 | | CLGIBAsmE = 911, |
927 | | CLGIBAsmH = 912, |
928 | | CLGIBAsmHE = 913, |
929 | | CLGIBAsmL = 914, |
930 | | CLGIBAsmLE = 915, |
931 | | CLGIBAsmLH = 916, |
932 | | CLGIBAsmNE = 917, |
933 | | CLGIBAsmNH = 918, |
934 | | CLGIBAsmNHE = 919, |
935 | | CLGIBAsmNL = 920, |
936 | | CLGIBAsmNLE = 921, |
937 | | CLGIBAsmNLH = 922, |
938 | | CLGIJ = 923, |
939 | | CLGIJAsm = 924, |
940 | | CLGIJAsmE = 925, |
941 | | CLGIJAsmH = 926, |
942 | | CLGIJAsmHE = 927, |
943 | | CLGIJAsmL = 928, |
944 | | CLGIJAsmLE = 929, |
945 | | CLGIJAsmLH = 930, |
946 | | CLGIJAsmNE = 931, |
947 | | CLGIJAsmNH = 932, |
948 | | CLGIJAsmNHE = 933, |
949 | | CLGIJAsmNL = 934, |
950 | | CLGIJAsmNLE = 935, |
951 | | CLGIJAsmNLH = 936, |
952 | | CLGIT = 937, |
953 | | CLGITAsm = 938, |
954 | | CLGITAsmE = 939, |
955 | | CLGITAsmH = 940, |
956 | | CLGITAsmHE = 941, |
957 | | CLGITAsmL = 942, |
958 | | CLGITAsmLE = 943, |
959 | | CLGITAsmLH = 944, |
960 | | CLGITAsmNE = 945, |
961 | | CLGITAsmNH = 946, |
962 | | CLGITAsmNHE = 947, |
963 | | CLGITAsmNL = 948, |
964 | | CLGITAsmNLE = 949, |
965 | | CLGITAsmNLH = 950, |
966 | | CLGR = 951, |
967 | | CLGRB = 952, |
968 | | CLGRBAsm = 953, |
969 | | CLGRBAsmE = 954, |
970 | | CLGRBAsmH = 955, |
971 | | CLGRBAsmHE = 956, |
972 | | CLGRBAsmL = 957, |
973 | | CLGRBAsmLE = 958, |
974 | | CLGRBAsmLH = 959, |
975 | | CLGRBAsmNE = 960, |
976 | | CLGRBAsmNH = 961, |
977 | | CLGRBAsmNHE = 962, |
978 | | CLGRBAsmNL = 963, |
979 | | CLGRBAsmNLE = 964, |
980 | | CLGRBAsmNLH = 965, |
981 | | CLGRJ = 966, |
982 | | CLGRJAsm = 967, |
983 | | CLGRJAsmE = 968, |
984 | | CLGRJAsmH = 969, |
985 | | CLGRJAsmHE = 970, |
986 | | CLGRJAsmL = 971, |
987 | | CLGRJAsmLE = 972, |
988 | | CLGRJAsmLH = 973, |
989 | | CLGRJAsmNE = 974, |
990 | | CLGRJAsmNH = 975, |
991 | | CLGRJAsmNHE = 976, |
992 | | CLGRJAsmNL = 977, |
993 | | CLGRJAsmNLE = 978, |
994 | | CLGRJAsmNLH = 979, |
995 | | CLGRL = 980, |
996 | | CLGRT = 981, |
997 | | CLGRTAsm = 982, |
998 | | CLGRTAsmE = 983, |
999 | | CLGRTAsmH = 984, |
1000 | | CLGRTAsmHE = 985, |
1001 | | CLGRTAsmL = 986, |
1002 | | CLGRTAsmLE = 987, |
1003 | | CLGRTAsmLH = 988, |
1004 | | CLGRTAsmNE = 989, |
1005 | | CLGRTAsmNH = 990, |
1006 | | CLGRTAsmNHE = 991, |
1007 | | CLGRTAsmNL = 992, |
1008 | | CLGRTAsmNLE = 993, |
1009 | | CLGRTAsmNLH = 994, |
1010 | | CLGT = 995, |
1011 | | CLGTAsm = 996, |
1012 | | CLGTAsmE = 997, |
1013 | | CLGTAsmH = 998, |
1014 | | CLGTAsmHE = 999, |
1015 | | CLGTAsmL = 1000, |
1016 | | CLGTAsmLE = 1001, |
1017 | | CLGTAsmLH = 1002, |
1018 | | CLGTAsmNE = 1003, |
1019 | | CLGTAsmNH = 1004, |
1020 | | CLGTAsmNHE = 1005, |
1021 | | CLGTAsmNL = 1006, |
1022 | | CLGTAsmNLE = 1007, |
1023 | | CLGTAsmNLH = 1008, |
1024 | | CLGXBR = 1009, |
1025 | | CLGXTR = 1010, |
1026 | | CLHF = 1011, |
1027 | | CLHHR = 1012, |
1028 | | CLHHSI = 1013, |
1029 | | CLHLR = 1014, |
1030 | | CLHRL = 1015, |
1031 | | CLI = 1016, |
1032 | | CLIB = 1017, |
1033 | | CLIBAsm = 1018, |
1034 | | CLIBAsmE = 1019, |
1035 | | CLIBAsmH = 1020, |
1036 | | CLIBAsmHE = 1021, |
1037 | | CLIBAsmL = 1022, |
1038 | | CLIBAsmLE = 1023, |
1039 | | CLIBAsmLH = 1024, |
1040 | | CLIBAsmNE = 1025, |
1041 | | CLIBAsmNH = 1026, |
1042 | | CLIBAsmNHE = 1027, |
1043 | | CLIBAsmNL = 1028, |
1044 | | CLIBAsmNLE = 1029, |
1045 | | CLIBAsmNLH = 1030, |
1046 | | CLIH = 1031, |
1047 | | CLIJ = 1032, |
1048 | | CLIJAsm = 1033, |
1049 | | CLIJAsmE = 1034, |
1050 | | CLIJAsmH = 1035, |
1051 | | CLIJAsmHE = 1036, |
1052 | | CLIJAsmL = 1037, |
1053 | | CLIJAsmLE = 1038, |
1054 | | CLIJAsmLH = 1039, |
1055 | | CLIJAsmNE = 1040, |
1056 | | CLIJAsmNH = 1041, |
1057 | | CLIJAsmNHE = 1042, |
1058 | | CLIJAsmNL = 1043, |
1059 | | CLIJAsmNLE = 1044, |
1060 | | CLIJAsmNLH = 1045, |
1061 | | CLIY = 1046, |
1062 | | CLM = 1047, |
1063 | | CLMH = 1048, |
1064 | | CLMY = 1049, |
1065 | | CLR = 1050, |
1066 | | CLRB = 1051, |
1067 | | CLRBAsm = 1052, |
1068 | | CLRBAsmE = 1053, |
1069 | | CLRBAsmH = 1054, |
1070 | | CLRBAsmHE = 1055, |
1071 | | CLRBAsmL = 1056, |
1072 | | CLRBAsmLE = 1057, |
1073 | | CLRBAsmLH = 1058, |
1074 | | CLRBAsmNE = 1059, |
1075 | | CLRBAsmNH = 1060, |
1076 | | CLRBAsmNHE = 1061, |
1077 | | CLRBAsmNL = 1062, |
1078 | | CLRBAsmNLE = 1063, |
1079 | | CLRBAsmNLH = 1064, |
1080 | | CLRJ = 1065, |
1081 | | CLRJAsm = 1066, |
1082 | | CLRJAsmE = 1067, |
1083 | | CLRJAsmH = 1068, |
1084 | | CLRJAsmHE = 1069, |
1085 | | CLRJAsmL = 1070, |
1086 | | CLRJAsmLE = 1071, |
1087 | | CLRJAsmLH = 1072, |
1088 | | CLRJAsmNE = 1073, |
1089 | | CLRJAsmNH = 1074, |
1090 | | CLRJAsmNHE = 1075, |
1091 | | CLRJAsmNL = 1076, |
1092 | | CLRJAsmNLE = 1077, |
1093 | | CLRJAsmNLH = 1078, |
1094 | | CLRL = 1079, |
1095 | | CLRT = 1080, |
1096 | | CLRTAsm = 1081, |
1097 | | CLRTAsmE = 1082, |
1098 | | CLRTAsmH = 1083, |
1099 | | CLRTAsmHE = 1084, |
1100 | | CLRTAsmL = 1085, |
1101 | | CLRTAsmLE = 1086, |
1102 | | CLRTAsmLH = 1087, |
1103 | | CLRTAsmNE = 1088, |
1104 | | CLRTAsmNH = 1089, |
1105 | | CLRTAsmNHE = 1090, |
1106 | | CLRTAsmNL = 1091, |
1107 | | CLRTAsmNLE = 1092, |
1108 | | CLRTAsmNLH = 1093, |
1109 | | CLST = 1094, |
1110 | | CLT = 1095, |
1111 | | CLTAsm = 1096, |
1112 | | CLTAsmE = 1097, |
1113 | | CLTAsmH = 1098, |
1114 | | CLTAsmHE = 1099, |
1115 | | CLTAsmL = 1100, |
1116 | | CLTAsmLE = 1101, |
1117 | | CLTAsmLH = 1102, |
1118 | | CLTAsmNE = 1103, |
1119 | | CLTAsmNH = 1104, |
1120 | | CLTAsmNHE = 1105, |
1121 | | CLTAsmNL = 1106, |
1122 | | CLTAsmNLE = 1107, |
1123 | | CLTAsmNLH = 1108, |
1124 | | CLY = 1109, |
1125 | | CMPSC = 1110, |
1126 | | CP = 1111, |
1127 | | CPDT = 1112, |
1128 | | CPSDRdd = 1113, |
1129 | | CPSDRds = 1114, |
1130 | | CPSDRsd = 1115, |
1131 | | CPSDRss = 1116, |
1132 | | CPXT = 1117, |
1133 | | CPYA = 1118, |
1134 | | CR = 1119, |
1135 | | CRB = 1120, |
1136 | | CRBAsm = 1121, |
1137 | | CRBAsmE = 1122, |
1138 | | CRBAsmH = 1123, |
1139 | | CRBAsmHE = 1124, |
1140 | | CRBAsmL = 1125, |
1141 | | CRBAsmLE = 1126, |
1142 | | CRBAsmLH = 1127, |
1143 | | CRBAsmNE = 1128, |
1144 | | CRBAsmNH = 1129, |
1145 | | CRBAsmNHE = 1130, |
1146 | | CRBAsmNL = 1131, |
1147 | | CRBAsmNLE = 1132, |
1148 | | CRBAsmNLH = 1133, |
1149 | | CRDTE = 1134, |
1150 | | CRDTEOpt = 1135, |
1151 | | CRJ = 1136, |
1152 | | CRJAsm = 1137, |
1153 | | CRJAsmE = 1138, |
1154 | | CRJAsmH = 1139, |
1155 | | CRJAsmHE = 1140, |
1156 | | CRJAsmL = 1141, |
1157 | | CRJAsmLE = 1142, |
1158 | | CRJAsmLH = 1143, |
1159 | | CRJAsmNE = 1144, |
1160 | | CRJAsmNH = 1145, |
1161 | | CRJAsmNHE = 1146, |
1162 | | CRJAsmNL = 1147, |
1163 | | CRJAsmNLE = 1148, |
1164 | | CRJAsmNLH = 1149, |
1165 | | CRL = 1150, |
1166 | | CRT = 1151, |
1167 | | CRTAsm = 1152, |
1168 | | CRTAsmE = 1153, |
1169 | | CRTAsmH = 1154, |
1170 | | CRTAsmHE = 1155, |
1171 | | CRTAsmL = 1156, |
1172 | | CRTAsmLE = 1157, |
1173 | | CRTAsmLH = 1158, |
1174 | | CRTAsmNE = 1159, |
1175 | | CRTAsmNH = 1160, |
1176 | | CRTAsmNHE = 1161, |
1177 | | CRTAsmNL = 1162, |
1178 | | CRTAsmNLE = 1163, |
1179 | | CRTAsmNLH = 1164, |
1180 | | CS = 1165, |
1181 | | CSCH = 1166, |
1182 | | CSDTR = 1167, |
1183 | | CSG = 1168, |
1184 | | CSP = 1169, |
1185 | | CSPG = 1170, |
1186 | | CSST = 1171, |
1187 | | CSXTR = 1172, |
1188 | | CSY = 1173, |
1189 | | CU12 = 1174, |
1190 | | CU12Opt = 1175, |
1191 | | CU14 = 1176, |
1192 | | CU14Opt = 1177, |
1193 | | CU21 = 1178, |
1194 | | CU21Opt = 1179, |
1195 | | CU24 = 1180, |
1196 | | CU24Opt = 1181, |
1197 | | CU41 = 1182, |
1198 | | CU42 = 1183, |
1199 | | CUDTR = 1184, |
1200 | | CUSE = 1185, |
1201 | | CUTFU = 1186, |
1202 | | CUTFUOpt = 1187, |
1203 | | CUUTF = 1188, |
1204 | | CUUTFOpt = 1189, |
1205 | | CUXTR = 1190, |
1206 | | CVB = 1191, |
1207 | | CVBG = 1192, |
1208 | | CVBY = 1193, |
1209 | | CVD = 1194, |
1210 | | CVDG = 1195, |
1211 | | CVDY = 1196, |
1212 | | CXBR = 1197, |
1213 | | CXFBR = 1198, |
1214 | | CXFBRA = 1199, |
1215 | | CXFR = 1200, |
1216 | | CXFTR = 1201, |
1217 | | CXGBR = 1202, |
1218 | | CXGBRA = 1203, |
1219 | | CXGR = 1204, |
1220 | | CXGTR = 1205, |
1221 | | CXGTRA = 1206, |
1222 | | CXLFBR = 1207, |
1223 | | CXLFTR = 1208, |
1224 | | CXLGBR = 1209, |
1225 | | CXLGTR = 1210, |
1226 | | CXPT = 1211, |
1227 | | CXR = 1212, |
1228 | | CXSTR = 1213, |
1229 | | CXTR = 1214, |
1230 | | CXUTR = 1215, |
1231 | | CXZT = 1216, |
1232 | | CY = 1217, |
1233 | | CZDT = 1218, |
1234 | | CZXT = 1219, |
1235 | | D = 1220, |
1236 | | DD = 1221, |
1237 | | DDB = 1222, |
1238 | | DDBR = 1223, |
1239 | | DDR = 1224, |
1240 | | DDTR = 1225, |
1241 | | DDTRA = 1226, |
1242 | | DE = 1227, |
1243 | | DEB = 1228, |
1244 | | DEBR = 1229, |
1245 | | DER = 1230, |
1246 | | DFLTCC = 1231, |
1247 | | DIAG = 1232, |
1248 | | DIDBR = 1233, |
1249 | | DIEBR = 1234, |
1250 | | DL = 1235, |
1251 | | DLG = 1236, |
1252 | | DLGR = 1237, |
1253 | | DLR = 1238, |
1254 | | DP = 1239, |
1255 | | DR = 1240, |
1256 | | DSG = 1241, |
1257 | | DSGF = 1242, |
1258 | | DSGFR = 1243, |
1259 | | DSGR = 1244, |
1260 | | DXBR = 1245, |
1261 | | DXR = 1246, |
1262 | | DXTR = 1247, |
1263 | | DXTRA = 1248, |
1264 | | EAR = 1249, |
1265 | | ECAG = 1250, |
1266 | | ECCTR = 1251, |
1267 | | ECPGA = 1252, |
1268 | | ECTG = 1253, |
1269 | | ED = 1254, |
1270 | | EDMK = 1255, |
1271 | | EEDTR = 1256, |
1272 | | EEXTR = 1257, |
1273 | | EFPC = 1258, |
1274 | | EPAIR = 1259, |
1275 | | EPAR = 1260, |
1276 | | EPCTR = 1261, |
1277 | | EPSW = 1262, |
1278 | | EREG = 1263, |
1279 | | EREGG = 1264, |
1280 | | ESAIR = 1265, |
1281 | | ESAR = 1266, |
1282 | | ESDTR = 1267, |
1283 | | ESEA = 1268, |
1284 | | ESTA = 1269, |
1285 | | ESXTR = 1270, |
1286 | | ETND = 1271, |
1287 | | EX = 1272, |
1288 | | EXRL = 1273, |
1289 | | FIDBR = 1274, |
1290 | | FIDBRA = 1275, |
1291 | | FIDR = 1276, |
1292 | | FIDTR = 1277, |
1293 | | FIEBR = 1278, |
1294 | | FIEBRA = 1279, |
1295 | | FIER = 1280, |
1296 | | FIXBR = 1281, |
1297 | | FIXBRA = 1282, |
1298 | | FIXR = 1283, |
1299 | | FIXTR = 1284, |
1300 | | FLOGR = 1285, |
1301 | | HDR = 1286, |
1302 | | HER = 1287, |
1303 | | HSCH = 1288, |
1304 | | IAC = 1289, |
1305 | | IC = 1290, |
1306 | | IC32 = 1291, |
1307 | | IC32Y = 1292, |
1308 | | ICM = 1293, |
1309 | | ICMH = 1294, |
1310 | | ICMY = 1295, |
1311 | | ICY = 1296, |
1312 | | IDTE = 1297, |
1313 | | IDTEOpt = 1298, |
1314 | | IEDTR = 1299, |
1315 | | IEXTR = 1300, |
1316 | | IIHF = 1301, |
1317 | | IIHH = 1302, |
1318 | | IIHL = 1303, |
1319 | | IILF = 1304, |
1320 | | IILH = 1305, |
1321 | | IILL = 1306, |
1322 | | IPK = 1307, |
1323 | | IPM = 1308, |
1324 | | IPTE = 1309, |
1325 | | IPTEOpt = 1310, |
1326 | | IPTEOptOpt = 1311, |
1327 | | IRBM = 1312, |
1328 | | ISKE = 1313, |
1329 | | IVSK = 1314, |
1330 | | InsnE = 1315, |
1331 | | InsnRI = 1316, |
1332 | | InsnRIE = 1317, |
1333 | | InsnRIL = 1318, |
1334 | | InsnRILU = 1319, |
1335 | | InsnRIS = 1320, |
1336 | | InsnRR = 1321, |
1337 | | InsnRRE = 1322, |
1338 | | InsnRRF = 1323, |
1339 | | InsnRRS = 1324, |
1340 | | InsnRS = 1325, |
1341 | | InsnRSE = 1326, |
1342 | | InsnRSI = 1327, |
1343 | | InsnRSY = 1328, |
1344 | | InsnRX = 1329, |
1345 | | InsnRXE = 1330, |
1346 | | InsnRXF = 1331, |
1347 | | InsnRXY = 1332, |
1348 | | InsnS = 1333, |
1349 | | InsnSI = 1334, |
1350 | | InsnSIL = 1335, |
1351 | | InsnSIY = 1336, |
1352 | | InsnSS = 1337, |
1353 | | InsnSSE = 1338, |
1354 | | InsnSSF = 1339, |
1355 | | InsnVRI = 1340, |
1356 | | InsnVRR = 1341, |
1357 | | InsnVRS = 1342, |
1358 | | InsnVRV = 1343, |
1359 | | InsnVRX = 1344, |
1360 | | InsnVSI = 1345, |
1361 | | J = 1346, |
1362 | | JAsmE = 1347, |
1363 | | JAsmH = 1348, |
1364 | | JAsmHE = 1349, |
1365 | | JAsmL = 1350, |
1366 | | JAsmLE = 1351, |
1367 | | JAsmLH = 1352, |
1368 | | JAsmM = 1353, |
1369 | | JAsmNE = 1354, |
1370 | | JAsmNH = 1355, |
1371 | | JAsmNHE = 1356, |
1372 | | JAsmNL = 1357, |
1373 | | JAsmNLE = 1358, |
1374 | | JAsmNLH = 1359, |
1375 | | JAsmNM = 1360, |
1376 | | JAsmNO = 1361, |
1377 | | JAsmNP = 1362, |
1378 | | JAsmNZ = 1363, |
1379 | | JAsmO = 1364, |
1380 | | JAsmP = 1365, |
1381 | | JAsmZ = 1366, |
1382 | | JG = 1367, |
1383 | | JGAsmE = 1368, |
1384 | | JGAsmH = 1369, |
1385 | | JGAsmHE = 1370, |
1386 | | JGAsmL = 1371, |
1387 | | JGAsmLE = 1372, |
1388 | | JGAsmLH = 1373, |
1389 | | JGAsmM = 1374, |
1390 | | JGAsmNE = 1375, |
1391 | | JGAsmNH = 1376, |
1392 | | JGAsmNHE = 1377, |
1393 | | JGAsmNL = 1378, |
1394 | | JGAsmNLE = 1379, |
1395 | | JGAsmNLH = 1380, |
1396 | | JGAsmNM = 1381, |
1397 | | JGAsmNO = 1382, |
1398 | | JGAsmNP = 1383, |
1399 | | JGAsmNZ = 1384, |
1400 | | JGAsmO = 1385, |
1401 | | JGAsmP = 1386, |
1402 | | JGAsmZ = 1387, |
1403 | | KDB = 1388, |
1404 | | KDBR = 1389, |
1405 | | KDSA = 1390, |
1406 | | KDTR = 1391, |
1407 | | KEB = 1392, |
1408 | | KEBR = 1393, |
1409 | | KIMD = 1394, |
1410 | | KLMD = 1395, |
1411 | | KM = 1396, |
1412 | | KMA = 1397, |
1413 | | KMAC = 1398, |
1414 | | KMC = 1399, |
1415 | | KMCTR = 1400, |
1416 | | KMF = 1401, |
1417 | | KMO = 1402, |
1418 | | KXBR = 1403, |
1419 | | KXTR = 1404, |
1420 | | L = 1405, |
1421 | | LA = 1406, |
1422 | | LAA = 1407, |
1423 | | LAAG = 1408, |
1424 | | LAAL = 1409, |
1425 | | LAALG = 1410, |
1426 | | LAE = 1411, |
1427 | | LAEY = 1412, |
1428 | | LAM = 1413, |
1429 | | LAMY = 1414, |
1430 | | LAN = 1415, |
1431 | | LANG = 1416, |
1432 | | LAO = 1417, |
1433 | | LAOG = 1418, |
1434 | | LARL = 1419, |
1435 | | LASP = 1420, |
1436 | | LAT = 1421, |
1437 | | LAX = 1422, |
1438 | | LAXG = 1423, |
1439 | | LAY = 1424, |
1440 | | LB = 1425, |
1441 | | LBEAR = 1426, |
1442 | | LBH = 1427, |
1443 | | LBR = 1428, |
1444 | | LCBB = 1429, |
1445 | | LCCTL = 1430, |
1446 | | LCDBR = 1431, |
1447 | | LCDFR = 1432, |
1448 | | LCDFR_32 = 1433, |
1449 | | LCDR = 1434, |
1450 | | LCEBR = 1435, |
1451 | | LCER = 1436, |
1452 | | LCGFR = 1437, |
1453 | | LCGR = 1438, |
1454 | | LCR = 1439, |
1455 | | LCTL = 1440, |
1456 | | LCTLG = 1441, |
1457 | | LCXBR = 1442, |
1458 | | LCXR = 1443, |
1459 | | LD = 1444, |
1460 | | LDE = 1445, |
1461 | | LDE32 = 1446, |
1462 | | LDEB = 1447, |
1463 | | LDEBR = 1448, |
1464 | | LDER = 1449, |
1465 | | LDETR = 1450, |
1466 | | LDGR = 1451, |
1467 | | LDR = 1452, |
1468 | | LDR32 = 1453, |
1469 | | LDXBR = 1454, |
1470 | | LDXBRA = 1455, |
1471 | | LDXR = 1456, |
1472 | | LDXTR = 1457, |
1473 | | LDY = 1458, |
1474 | | LE = 1459, |
1475 | | LEDBR = 1460, |
1476 | | LEDBRA = 1461, |
1477 | | LEDR = 1462, |
1478 | | LEDTR = 1463, |
1479 | | LER = 1464, |
1480 | | LEXBR = 1465, |
1481 | | LEXBRA = 1466, |
1482 | | LEXR = 1467, |
1483 | | LEY = 1468, |
1484 | | LFAS = 1469, |
1485 | | LFH = 1470, |
1486 | | LFHAT = 1471, |
1487 | | LFPC = 1472, |
1488 | | LG = 1473, |
1489 | | LGAT = 1474, |
1490 | | LGB = 1475, |
1491 | | LGBR = 1476, |
1492 | | LGDR = 1477, |
1493 | | LGF = 1478, |
1494 | | LGFI = 1479, |
1495 | | LGFR = 1480, |
1496 | | LGFRL = 1481, |
1497 | | LGG = 1482, |
1498 | | LGH = 1483, |
1499 | | LGHI = 1484, |
1500 | | LGHR = 1485, |
1501 | | LGHRL = 1486, |
1502 | | LGR = 1487, |
1503 | | LGRL = 1488, |
1504 | | LGSC = 1489, |
1505 | | LH = 1490, |
1506 | | LHH = 1491, |
1507 | | LHI = 1492, |
1508 | | LHR = 1493, |
1509 | | LHRL = 1494, |
1510 | | LHY = 1495, |
1511 | | LLC = 1496, |
1512 | | LLCH = 1497, |
1513 | | LLCR = 1498, |
1514 | | LLGC = 1499, |
1515 | | LLGCR = 1500, |
1516 | | LLGF = 1501, |
1517 | | LLGFAT = 1502, |
1518 | | LLGFR = 1503, |
1519 | | LLGFRL = 1504, |
1520 | | LLGFSG = 1505, |
1521 | | LLGH = 1506, |
1522 | | LLGHR = 1507, |
1523 | | LLGHRL = 1508, |
1524 | | LLGT = 1509, |
1525 | | LLGTAT = 1510, |
1526 | | LLGTR = 1511, |
1527 | | LLH = 1512, |
1528 | | LLHH = 1513, |
1529 | | LLHR = 1514, |
1530 | | LLHRL = 1515, |
1531 | | LLIHF = 1516, |
1532 | | LLIHH = 1517, |
1533 | | LLIHL = 1518, |
1534 | | LLILF = 1519, |
1535 | | LLILH = 1520, |
1536 | | LLILL = 1521, |
1537 | | LLZRGF = 1522, |
1538 | | LM = 1523, |
1539 | | LMD = 1524, |
1540 | | LMG = 1525, |
1541 | | LMH = 1526, |
1542 | | LMY = 1527, |
1543 | | LNDBR = 1528, |
1544 | | LNDFR = 1529, |
1545 | | LNDFR_32 = 1530, |
1546 | | LNDR = 1531, |
1547 | | LNEBR = 1532, |
1548 | | LNER = 1533, |
1549 | | LNGFR = 1534, |
1550 | | LNGR = 1535, |
1551 | | LNR = 1536, |
1552 | | LNXBR = 1537, |
1553 | | LNXR = 1538, |
1554 | | LOC = 1539, |
1555 | | LOCAsm = 1540, |
1556 | | LOCAsmE = 1541, |
1557 | | LOCAsmH = 1542, |
1558 | | LOCAsmHE = 1543, |
1559 | | LOCAsmL = 1544, |
1560 | | LOCAsmLE = 1545, |
1561 | | LOCAsmLH = 1546, |
1562 | | LOCAsmM = 1547, |
1563 | | LOCAsmNE = 1548, |
1564 | | LOCAsmNH = 1549, |
1565 | | LOCAsmNHE = 1550, |
1566 | | LOCAsmNL = 1551, |
1567 | | LOCAsmNLE = 1552, |
1568 | | LOCAsmNLH = 1553, |
1569 | | LOCAsmNM = 1554, |
1570 | | LOCAsmNO = 1555, |
1571 | | LOCAsmNP = 1556, |
1572 | | LOCAsmNZ = 1557, |
1573 | | LOCAsmO = 1558, |
1574 | | LOCAsmP = 1559, |
1575 | | LOCAsmZ = 1560, |
1576 | | LOCFH = 1561, |
1577 | | LOCFHAsm = 1562, |
1578 | | LOCFHAsmE = 1563, |
1579 | | LOCFHAsmH = 1564, |
1580 | | LOCFHAsmHE = 1565, |
1581 | | LOCFHAsmL = 1566, |
1582 | | LOCFHAsmLE = 1567, |
1583 | | LOCFHAsmLH = 1568, |
1584 | | LOCFHAsmM = 1569, |
1585 | | LOCFHAsmNE = 1570, |
1586 | | LOCFHAsmNH = 1571, |
1587 | | LOCFHAsmNHE = 1572, |
1588 | | LOCFHAsmNL = 1573, |
1589 | | LOCFHAsmNLE = 1574, |
1590 | | LOCFHAsmNLH = 1575, |
1591 | | LOCFHAsmNM = 1576, |
1592 | | LOCFHAsmNO = 1577, |
1593 | | LOCFHAsmNP = 1578, |
1594 | | LOCFHAsmNZ = 1579, |
1595 | | LOCFHAsmO = 1580, |
1596 | | LOCFHAsmP = 1581, |
1597 | | LOCFHAsmZ = 1582, |
1598 | | LOCFHR = 1583, |
1599 | | LOCFHRAsm = 1584, |
1600 | | LOCFHRAsmE = 1585, |
1601 | | LOCFHRAsmH = 1586, |
1602 | | LOCFHRAsmHE = 1587, |
1603 | | LOCFHRAsmL = 1588, |
1604 | | LOCFHRAsmLE = 1589, |
1605 | | LOCFHRAsmLH = 1590, |
1606 | | LOCFHRAsmM = 1591, |
1607 | | LOCFHRAsmNE = 1592, |
1608 | | LOCFHRAsmNH = 1593, |
1609 | | LOCFHRAsmNHE = 1594, |
1610 | | LOCFHRAsmNL = 1595, |
1611 | | LOCFHRAsmNLE = 1596, |
1612 | | LOCFHRAsmNLH = 1597, |
1613 | | LOCFHRAsmNM = 1598, |
1614 | | LOCFHRAsmNO = 1599, |
1615 | | LOCFHRAsmNP = 1600, |
1616 | | LOCFHRAsmNZ = 1601, |
1617 | | LOCFHRAsmO = 1602, |
1618 | | LOCFHRAsmP = 1603, |
1619 | | LOCFHRAsmZ = 1604, |
1620 | | LOCG = 1605, |
1621 | | LOCGAsm = 1606, |
1622 | | LOCGAsmE = 1607, |
1623 | | LOCGAsmH = 1608, |
1624 | | LOCGAsmHE = 1609, |
1625 | | LOCGAsmL = 1610, |
1626 | | LOCGAsmLE = 1611, |
1627 | | LOCGAsmLH = 1612, |
1628 | | LOCGAsmM = 1613, |
1629 | | LOCGAsmNE = 1614, |
1630 | | LOCGAsmNH = 1615, |
1631 | | LOCGAsmNHE = 1616, |
1632 | | LOCGAsmNL = 1617, |
1633 | | LOCGAsmNLE = 1618, |
1634 | | LOCGAsmNLH = 1619, |
1635 | | LOCGAsmNM = 1620, |
1636 | | LOCGAsmNO = 1621, |
1637 | | LOCGAsmNP = 1622, |
1638 | | LOCGAsmNZ = 1623, |
1639 | | LOCGAsmO = 1624, |
1640 | | LOCGAsmP = 1625, |
1641 | | LOCGAsmZ = 1626, |
1642 | | LOCGHI = 1627, |
1643 | | LOCGHIAsm = 1628, |
1644 | | LOCGHIAsmE = 1629, |
1645 | | LOCGHIAsmH = 1630, |
1646 | | LOCGHIAsmHE = 1631, |
1647 | | LOCGHIAsmL = 1632, |
1648 | | LOCGHIAsmLE = 1633, |
1649 | | LOCGHIAsmLH = 1634, |
1650 | | LOCGHIAsmM = 1635, |
1651 | | LOCGHIAsmNE = 1636, |
1652 | | LOCGHIAsmNH = 1637, |
1653 | | LOCGHIAsmNHE = 1638, |
1654 | | LOCGHIAsmNL = 1639, |
1655 | | LOCGHIAsmNLE = 1640, |
1656 | | LOCGHIAsmNLH = 1641, |
1657 | | LOCGHIAsmNM = 1642, |
1658 | | LOCGHIAsmNO = 1643, |
1659 | | LOCGHIAsmNP = 1644, |
1660 | | LOCGHIAsmNZ = 1645, |
1661 | | LOCGHIAsmO = 1646, |
1662 | | LOCGHIAsmP = 1647, |
1663 | | LOCGHIAsmZ = 1648, |
1664 | | LOCGR = 1649, |
1665 | | LOCGRAsm = 1650, |
1666 | | LOCGRAsmE = 1651, |
1667 | | LOCGRAsmH = 1652, |
1668 | | LOCGRAsmHE = 1653, |
1669 | | LOCGRAsmL = 1654, |
1670 | | LOCGRAsmLE = 1655, |
1671 | | LOCGRAsmLH = 1656, |
1672 | | LOCGRAsmM = 1657, |
1673 | | LOCGRAsmNE = 1658, |
1674 | | LOCGRAsmNH = 1659, |
1675 | | LOCGRAsmNHE = 1660, |
1676 | | LOCGRAsmNL = 1661, |
1677 | | LOCGRAsmNLE = 1662, |
1678 | | LOCGRAsmNLH = 1663, |
1679 | | LOCGRAsmNM = 1664, |
1680 | | LOCGRAsmNO = 1665, |
1681 | | LOCGRAsmNP = 1666, |
1682 | | LOCGRAsmNZ = 1667, |
1683 | | LOCGRAsmO = 1668, |
1684 | | LOCGRAsmP = 1669, |
1685 | | LOCGRAsmZ = 1670, |
1686 | | LOCHHI = 1671, |
1687 | | LOCHHIAsm = 1672, |
1688 | | LOCHHIAsmE = 1673, |
1689 | | LOCHHIAsmH = 1674, |
1690 | | LOCHHIAsmHE = 1675, |
1691 | | LOCHHIAsmL = 1676, |
1692 | | LOCHHIAsmLE = 1677, |
1693 | | LOCHHIAsmLH = 1678, |
1694 | | LOCHHIAsmM = 1679, |
1695 | | LOCHHIAsmNE = 1680, |
1696 | | LOCHHIAsmNH = 1681, |
1697 | | LOCHHIAsmNHE = 1682, |
1698 | | LOCHHIAsmNL = 1683, |
1699 | | LOCHHIAsmNLE = 1684, |
1700 | | LOCHHIAsmNLH = 1685, |
1701 | | LOCHHIAsmNM = 1686, |
1702 | | LOCHHIAsmNO = 1687, |
1703 | | LOCHHIAsmNP = 1688, |
1704 | | LOCHHIAsmNZ = 1689, |
1705 | | LOCHHIAsmO = 1690, |
1706 | | LOCHHIAsmP = 1691, |
1707 | | LOCHHIAsmZ = 1692, |
1708 | | LOCHI = 1693, |
1709 | | LOCHIAsm = 1694, |
1710 | | LOCHIAsmE = 1695, |
1711 | | LOCHIAsmH = 1696, |
1712 | | LOCHIAsmHE = 1697, |
1713 | | LOCHIAsmL = 1698, |
1714 | | LOCHIAsmLE = 1699, |
1715 | | LOCHIAsmLH = 1700, |
1716 | | LOCHIAsmM = 1701, |
1717 | | LOCHIAsmNE = 1702, |
1718 | | LOCHIAsmNH = 1703, |
1719 | | LOCHIAsmNHE = 1704, |
1720 | | LOCHIAsmNL = 1705, |
1721 | | LOCHIAsmNLE = 1706, |
1722 | | LOCHIAsmNLH = 1707, |
1723 | | LOCHIAsmNM = 1708, |
1724 | | LOCHIAsmNO = 1709, |
1725 | | LOCHIAsmNP = 1710, |
1726 | | LOCHIAsmNZ = 1711, |
1727 | | LOCHIAsmO = 1712, |
1728 | | LOCHIAsmP = 1713, |
1729 | | LOCHIAsmZ = 1714, |
1730 | | LOCR = 1715, |
1731 | | LOCRAsm = 1716, |
1732 | | LOCRAsmE = 1717, |
1733 | | LOCRAsmH = 1718, |
1734 | | LOCRAsmHE = 1719, |
1735 | | LOCRAsmL = 1720, |
1736 | | LOCRAsmLE = 1721, |
1737 | | LOCRAsmLH = 1722, |
1738 | | LOCRAsmM = 1723, |
1739 | | LOCRAsmNE = 1724, |
1740 | | LOCRAsmNH = 1725, |
1741 | | LOCRAsmNHE = 1726, |
1742 | | LOCRAsmNL = 1727, |
1743 | | LOCRAsmNLE = 1728, |
1744 | | LOCRAsmNLH = 1729, |
1745 | | LOCRAsmNM = 1730, |
1746 | | LOCRAsmNO = 1731, |
1747 | | LOCRAsmNP = 1732, |
1748 | | LOCRAsmNZ = 1733, |
1749 | | LOCRAsmO = 1734, |
1750 | | LOCRAsmP = 1735, |
1751 | | LOCRAsmZ = 1736, |
1752 | | LPCTL = 1737, |
1753 | | LPD = 1738, |
1754 | | LPDBR = 1739, |
1755 | | LPDFR = 1740, |
1756 | | LPDFR_32 = 1741, |
1757 | | LPDG = 1742, |
1758 | | LPDR = 1743, |
1759 | | LPEBR = 1744, |
1760 | | LPER = 1745, |
1761 | | LPGFR = 1746, |
1762 | | LPGR = 1747, |
1763 | | LPP = 1748, |
1764 | | LPQ = 1749, |
1765 | | LPR = 1750, |
1766 | | LPSW = 1751, |
1767 | | LPSWE = 1752, |
1768 | | LPSWEY = 1753, |
1769 | | LPTEA = 1754, |
1770 | | LPXBR = 1755, |
1771 | | LPXR = 1756, |
1772 | | LR = 1757, |
1773 | | LRA = 1758, |
1774 | | LRAG = 1759, |
1775 | | LRAY = 1760, |
1776 | | LRDR = 1761, |
1777 | | LRER = 1762, |
1778 | | LRL = 1763, |
1779 | | LRV = 1764, |
1780 | | LRVG = 1765, |
1781 | | LRVGR = 1766, |
1782 | | LRVH = 1767, |
1783 | | LRVR = 1768, |
1784 | | LSCTL = 1769, |
1785 | | LT = 1770, |
1786 | | LTDBR = 1771, |
1787 | | LTDR = 1772, |
1788 | | LTDTR = 1773, |
1789 | | LTEBR = 1774, |
1790 | | LTER = 1775, |
1791 | | LTG = 1776, |
1792 | | LTGF = 1777, |
1793 | | LTGFR = 1778, |
1794 | | LTGR = 1779, |
1795 | | LTR = 1780, |
1796 | | LTXBR = 1781, |
1797 | | LTXR = 1782, |
1798 | | LTXTR = 1783, |
1799 | | LURA = 1784, |
1800 | | LURAG = 1785, |
1801 | | LXD = 1786, |
1802 | | LXDB = 1787, |
1803 | | LXDBR = 1788, |
1804 | | LXDR = 1789, |
1805 | | LXDTR = 1790, |
1806 | | LXE = 1791, |
1807 | | LXEB = 1792, |
1808 | | LXEBR = 1793, |
1809 | | LXER = 1794, |
1810 | | LXR = 1795, |
1811 | | LY = 1796, |
1812 | | LZDR = 1797, |
1813 | | LZER = 1798, |
1814 | | LZRF = 1799, |
1815 | | LZRG = 1800, |
1816 | | LZXR = 1801, |
1817 | | M = 1802, |
1818 | | MAD = 1803, |
1819 | | MADB = 1804, |
1820 | | MADBR = 1805, |
1821 | | MADR = 1806, |
1822 | | MAE = 1807, |
1823 | | MAEB = 1808, |
1824 | | MAEBR = 1809, |
1825 | | MAER = 1810, |
1826 | | MAY = 1811, |
1827 | | MAYH = 1812, |
1828 | | MAYHR = 1813, |
1829 | | MAYL = 1814, |
1830 | | MAYLR = 1815, |
1831 | | MAYR = 1816, |
1832 | | MC = 1817, |
1833 | | MD = 1818, |
1834 | | MDB = 1819, |
1835 | | MDBR = 1820, |
1836 | | MDE = 1821, |
1837 | | MDEB = 1822, |
1838 | | MDEBR = 1823, |
1839 | | MDER = 1824, |
1840 | | MDR = 1825, |
1841 | | MDTR = 1826, |
1842 | | MDTRA = 1827, |
1843 | | ME = 1828, |
1844 | | MEE = 1829, |
1845 | | MEEB = 1830, |
1846 | | MEEBR = 1831, |
1847 | | MEER = 1832, |
1848 | | MER = 1833, |
1849 | | MFY = 1834, |
1850 | | MG = 1835, |
1851 | | MGH = 1836, |
1852 | | MGHI = 1837, |
1853 | | MGRK = 1838, |
1854 | | MH = 1839, |
1855 | | MHI = 1840, |
1856 | | MHY = 1841, |
1857 | | ML = 1842, |
1858 | | MLG = 1843, |
1859 | | MLGR = 1844, |
1860 | | MLR = 1845, |
1861 | | MP = 1846, |
1862 | | MR = 1847, |
1863 | | MS = 1848, |
1864 | | MSC = 1849, |
1865 | | MSCH = 1850, |
1866 | | MSD = 1851, |
1867 | | MSDB = 1852, |
1868 | | MSDBR = 1853, |
1869 | | MSDR = 1854, |
1870 | | MSE = 1855, |
1871 | | MSEB = 1856, |
1872 | | MSEBR = 1857, |
1873 | | MSER = 1858, |
1874 | | MSFI = 1859, |
1875 | | MSG = 1860, |
1876 | | MSGC = 1861, |
1877 | | MSGF = 1862, |
1878 | | MSGFI = 1863, |
1879 | | MSGFR = 1864, |
1880 | | MSGR = 1865, |
1881 | | MSGRKC = 1866, |
1882 | | MSR = 1867, |
1883 | | MSRKC = 1868, |
1884 | | MSTA = 1869, |
1885 | | MSY = 1870, |
1886 | | MVC = 1871, |
1887 | | MVCDK = 1872, |
1888 | | MVCIN = 1873, |
1889 | | MVCK = 1874, |
1890 | | MVCL = 1875, |
1891 | | MVCLE = 1876, |
1892 | | MVCLU = 1877, |
1893 | | MVCOS = 1878, |
1894 | | MVCP = 1879, |
1895 | | MVCRL = 1880, |
1896 | | MVCS = 1881, |
1897 | | MVCSK = 1882, |
1898 | | MVGHI = 1883, |
1899 | | MVHHI = 1884, |
1900 | | MVHI = 1885, |
1901 | | MVI = 1886, |
1902 | | MVIY = 1887, |
1903 | | MVN = 1888, |
1904 | | MVO = 1889, |
1905 | | MVPG = 1890, |
1906 | | MVST = 1891, |
1907 | | MVZ = 1892, |
1908 | | MXBR = 1893, |
1909 | | MXD = 1894, |
1910 | | MXDB = 1895, |
1911 | | MXDBR = 1896, |
1912 | | MXDR = 1897, |
1913 | | MXR = 1898, |
1914 | | MXTR = 1899, |
1915 | | MXTRA = 1900, |
1916 | | MY = 1901, |
1917 | | MYH = 1902, |
1918 | | MYHR = 1903, |
1919 | | MYL = 1904, |
1920 | | MYLR = 1905, |
1921 | | MYR = 1906, |
1922 | | N = 1907, |
1923 | | NC = 1908, |
1924 | | NCGRK = 1909, |
1925 | | NCRK = 1910, |
1926 | | NG = 1911, |
1927 | | NGR = 1912, |
1928 | | NGRK = 1913, |
1929 | | NI = 1914, |
1930 | | NIAI = 1915, |
1931 | | NIHF = 1916, |
1932 | | NIHH = 1917, |
1933 | | NIHL = 1918, |
1934 | | NILF = 1919, |
1935 | | NILH = 1920, |
1936 | | NILL = 1921, |
1937 | | NIY = 1922, |
1938 | | NNGRK = 1923, |
1939 | | NNPA = 1924, |
1940 | | NNRK = 1925, |
1941 | | NOGRK = 1926, |
1942 | | NOP_bare = 1927, |
1943 | | NORK = 1928, |
1944 | | NR = 1929, |
1945 | | NRK = 1930, |
1946 | | NTSTG = 1931, |
1947 | | NXGRK = 1932, |
1948 | | NXRK = 1933, |
1949 | | NY = 1934, |
1950 | | O = 1935, |
1951 | | OC = 1936, |
1952 | | OCGRK = 1937, |
1953 | | OCRK = 1938, |
1954 | | OG = 1939, |
1955 | | OGR = 1940, |
1956 | | OGRK = 1941, |
1957 | | OI = 1942, |
1958 | | OIHF = 1943, |
1959 | | OIHH = 1944, |
1960 | | OIHL = 1945, |
1961 | | OILF = 1946, |
1962 | | OILH = 1947, |
1963 | | OILL = 1948, |
1964 | | OIY = 1949, |
1965 | | OR = 1950, |
1966 | | ORK = 1951, |
1967 | | OY = 1952, |
1968 | | PACK = 1953, |
1969 | | PALB = 1954, |
1970 | | PC = 1955, |
1971 | | PCC = 1956, |
1972 | | PCKMO = 1957, |
1973 | | PFD = 1958, |
1974 | | PFDRL = 1959, |
1975 | | PFMF = 1960, |
1976 | | PFPO = 1961, |
1977 | | PGIN = 1962, |
1978 | | PGOUT = 1963, |
1979 | | PKA = 1964, |
1980 | | PKU = 1965, |
1981 | | PLO = 1966, |
1982 | | POPCNT = 1967, |
1983 | | POPCNTOpt = 1968, |
1984 | | PPA = 1969, |
1985 | | PPNO = 1970, |
1986 | | PR = 1971, |
1987 | | PRNO = 1972, |
1988 | | PT = 1973, |
1989 | | PTF = 1974, |
1990 | | PTFF = 1975, |
1991 | | PTI = 1976, |
1992 | | PTLB = 1977, |
1993 | | QADTR = 1978, |
1994 | | QAXTR = 1979, |
1995 | | QCTRI = 1980, |
1996 | | QPACI = 1981, |
1997 | | QSI = 1982, |
1998 | | RCHP = 1983, |
1999 | | RDP = 1984, |
2000 | | RDPOpt = 1985, |
2001 | | RISBG = 1986, |
2002 | | RISBG32 = 1987, |
2003 | | RISBGN = 1988, |
2004 | | RISBHG = 1989, |
2005 | | RISBLG = 1990, |
2006 | | RLL = 1991, |
2007 | | RLLG = 1992, |
2008 | | RNSBG = 1993, |
2009 | | ROSBG = 1994, |
2010 | | RP = 1995, |
2011 | | RRBE = 1996, |
2012 | | RRBM = 1997, |
2013 | | RRDTR = 1998, |
2014 | | RRXTR = 1999, |
2015 | | RSCH = 2000, |
2016 | | RXSBG = 2001, |
2017 | | S = 2002, |
2018 | | SAC = 2003, |
2019 | | SACF = 2004, |
2020 | | SAL = 2005, |
2021 | | SAM24 = 2006, |
2022 | | SAM31 = 2007, |
2023 | | SAM64 = 2008, |
2024 | | SAR = 2009, |
2025 | | SCCTR = 2010, |
2026 | | SCHM = 2011, |
2027 | | SCK = 2012, |
2028 | | SCKC = 2013, |
2029 | | SCKPF = 2014, |
2030 | | SD = 2015, |
2031 | | SDB = 2016, |
2032 | | SDBR = 2017, |
2033 | | SDR = 2018, |
2034 | | SDTR = 2019, |
2035 | | SDTRA = 2020, |
2036 | | SE = 2021, |
2037 | | SEB = 2022, |
2038 | | SEBR = 2023, |
2039 | | SELFHR = 2024, |
2040 | | SELFHRAsm = 2025, |
2041 | | SELFHRAsmE = 2026, |
2042 | | SELFHRAsmH = 2027, |
2043 | | SELFHRAsmHE = 2028, |
2044 | | SELFHRAsmL = 2029, |
2045 | | SELFHRAsmLE = 2030, |
2046 | | SELFHRAsmLH = 2031, |
2047 | | SELFHRAsmM = 2032, |
2048 | | SELFHRAsmNE = 2033, |
2049 | | SELFHRAsmNH = 2034, |
2050 | | SELFHRAsmNHE = 2035, |
2051 | | SELFHRAsmNL = 2036, |
2052 | | SELFHRAsmNLE = 2037, |
2053 | | SELFHRAsmNLH = 2038, |
2054 | | SELFHRAsmNM = 2039, |
2055 | | SELFHRAsmNO = 2040, |
2056 | | SELFHRAsmNP = 2041, |
2057 | | SELFHRAsmNZ = 2042, |
2058 | | SELFHRAsmO = 2043, |
2059 | | SELFHRAsmP = 2044, |
2060 | | SELFHRAsmZ = 2045, |
2061 | | SELGR = 2046, |
2062 | | SELGRAsm = 2047, |
2063 | | SELGRAsmE = 2048, |
2064 | | SELGRAsmH = 2049, |
2065 | | SELGRAsmHE = 2050, |
2066 | | SELGRAsmL = 2051, |
2067 | | SELGRAsmLE = 2052, |
2068 | | SELGRAsmLH = 2053, |
2069 | | SELGRAsmM = 2054, |
2070 | | SELGRAsmNE = 2055, |
2071 | | SELGRAsmNH = 2056, |
2072 | | SELGRAsmNHE = 2057, |
2073 | | SELGRAsmNL = 2058, |
2074 | | SELGRAsmNLE = 2059, |
2075 | | SELGRAsmNLH = 2060, |
2076 | | SELGRAsmNM = 2061, |
2077 | | SELGRAsmNO = 2062, |
2078 | | SELGRAsmNP = 2063, |
2079 | | SELGRAsmNZ = 2064, |
2080 | | SELGRAsmO = 2065, |
2081 | | SELGRAsmP = 2066, |
2082 | | SELGRAsmZ = 2067, |
2083 | | SELR = 2068, |
2084 | | SELRAsm = 2069, |
2085 | | SELRAsmE = 2070, |
2086 | | SELRAsmH = 2071, |
2087 | | SELRAsmHE = 2072, |
2088 | | SELRAsmL = 2073, |
2089 | | SELRAsmLE = 2074, |
2090 | | SELRAsmLH = 2075, |
2091 | | SELRAsmM = 2076, |
2092 | | SELRAsmNE = 2077, |
2093 | | SELRAsmNH = 2078, |
2094 | | SELRAsmNHE = 2079, |
2095 | | SELRAsmNL = 2080, |
2096 | | SELRAsmNLE = 2081, |
2097 | | SELRAsmNLH = 2082, |
2098 | | SELRAsmNM = 2083, |
2099 | | SELRAsmNO = 2084, |
2100 | | SELRAsmNP = 2085, |
2101 | | SELRAsmNZ = 2086, |
2102 | | SELRAsmO = 2087, |
2103 | | SELRAsmP = 2088, |
2104 | | SELRAsmZ = 2089, |
2105 | | SER = 2090, |
2106 | | SFASR = 2091, |
2107 | | SFPC = 2092, |
2108 | | SG = 2093, |
2109 | | SGF = 2094, |
2110 | | SGFR = 2095, |
2111 | | SGH = 2096, |
2112 | | SGR = 2097, |
2113 | | SGRK = 2098, |
2114 | | SH = 2099, |
2115 | | SHHHR = 2100, |
2116 | | SHHLR = 2101, |
2117 | | SHY = 2102, |
2118 | | SIE = 2103, |
2119 | | SIGA = 2104, |
2120 | | SIGP = 2105, |
2121 | | SL = 2106, |
2122 | | SLA = 2107, |
2123 | | SLAG = 2108, |
2124 | | SLAK = 2109, |
2125 | | SLB = 2110, |
2126 | | SLBG = 2111, |
2127 | | SLBGR = 2112, |
2128 | | SLBR = 2113, |
2129 | | SLDA = 2114, |
2130 | | SLDL = 2115, |
2131 | | SLDT = 2116, |
2132 | | SLFI = 2117, |
2133 | | SLG = 2118, |
2134 | | SLGF = 2119, |
2135 | | SLGFI = 2120, |
2136 | | SLGFR = 2121, |
2137 | | SLGR = 2122, |
2138 | | SLGRK = 2123, |
2139 | | SLHHHR = 2124, |
2140 | | SLHHLR = 2125, |
2141 | | SLL = 2126, |
2142 | | SLLG = 2127, |
2143 | | SLLK = 2128, |
2144 | | SLR = 2129, |
2145 | | SLRK = 2130, |
2146 | | SLXT = 2131, |
2147 | | SLY = 2132, |
2148 | | SORTL = 2133, |
2149 | | SP = 2134, |
2150 | | SPCTR = 2135, |
2151 | | SPKA = 2136, |
2152 | | SPM = 2137, |
2153 | | SPT = 2138, |
2154 | | SPX = 2139, |
2155 | | SQD = 2140, |
2156 | | SQDB = 2141, |
2157 | | SQDBR = 2142, |
2158 | | SQDR = 2143, |
2159 | | SQE = 2144, |
2160 | | SQEB = 2145, |
2161 | | SQEBR = 2146, |
2162 | | SQER = 2147, |
2163 | | SQXBR = 2148, |
2164 | | SQXR = 2149, |
2165 | | SR = 2150, |
2166 | | SRA = 2151, |
2167 | | SRAG = 2152, |
2168 | | SRAK = 2153, |
2169 | | SRDA = 2154, |
2170 | | SRDL = 2155, |
2171 | | SRDT = 2156, |
2172 | | SRK = 2157, |
2173 | | SRL = 2158, |
2174 | | SRLG = 2159, |
2175 | | SRLK = 2160, |
2176 | | SRNM = 2161, |
2177 | | SRNMB = 2162, |
2178 | | SRNMT = 2163, |
2179 | | SRP = 2164, |
2180 | | SRST = 2165, |
2181 | | SRSTU = 2166, |
2182 | | SRXT = 2167, |
2183 | | SSAIR = 2168, |
2184 | | SSAR = 2169, |
2185 | | SSCH = 2170, |
2186 | | SSKE = 2171, |
2187 | | SSKEOpt = 2172, |
2188 | | SSM = 2173, |
2189 | | ST = 2174, |
2190 | | STAM = 2175, |
2191 | | STAMY = 2176, |
2192 | | STAP = 2177, |
2193 | | STBEAR = 2178, |
2194 | | STC = 2179, |
2195 | | STCH = 2180, |
2196 | | STCK = 2181, |
2197 | | STCKC = 2182, |
2198 | | STCKE = 2183, |
2199 | | STCKF = 2184, |
2200 | | STCM = 2185, |
2201 | | STCMH = 2186, |
2202 | | STCMY = 2187, |
2203 | | STCPS = 2188, |
2204 | | STCRW = 2189, |
2205 | | STCTG = 2190, |
2206 | | STCTL = 2191, |
2207 | | STCY = 2192, |
2208 | | STD = 2193, |
2209 | | STDY = 2194, |
2210 | | STE = 2195, |
2211 | | STEY = 2196, |
2212 | | STFH = 2197, |
2213 | | STFL = 2198, |
2214 | | STFLE = 2199, |
2215 | | STFPC = 2200, |
2216 | | STG = 2201, |
2217 | | STGRL = 2202, |
2218 | | STGSC = 2203, |
2219 | | STH = 2204, |
2220 | | STHH = 2205, |
2221 | | STHRL = 2206, |
2222 | | STHY = 2207, |
2223 | | STIDP = 2208, |
2224 | | STM = 2209, |
2225 | | STMG = 2210, |
2226 | | STMH = 2211, |
2227 | | STMY = 2212, |
2228 | | STNSM = 2213, |
2229 | | STOC = 2214, |
2230 | | STOCAsm = 2215, |
2231 | | STOCAsmE = 2216, |
2232 | | STOCAsmH = 2217, |
2233 | | STOCAsmHE = 2218, |
2234 | | STOCAsmL = 2219, |
2235 | | STOCAsmLE = 2220, |
2236 | | STOCAsmLH = 2221, |
2237 | | STOCAsmM = 2222, |
2238 | | STOCAsmNE = 2223, |
2239 | | STOCAsmNH = 2224, |
2240 | | STOCAsmNHE = 2225, |
2241 | | STOCAsmNL = 2226, |
2242 | | STOCAsmNLE = 2227, |
2243 | | STOCAsmNLH = 2228, |
2244 | | STOCAsmNM = 2229, |
2245 | | STOCAsmNO = 2230, |
2246 | | STOCAsmNP = 2231, |
2247 | | STOCAsmNZ = 2232, |
2248 | | STOCAsmO = 2233, |
2249 | | STOCAsmP = 2234, |
2250 | | STOCAsmZ = 2235, |
2251 | | STOCFH = 2236, |
2252 | | STOCFHAsm = 2237, |
2253 | | STOCFHAsmE = 2238, |
2254 | | STOCFHAsmH = 2239, |
2255 | | STOCFHAsmHE = 2240, |
2256 | | STOCFHAsmL = 2241, |
2257 | | STOCFHAsmLE = 2242, |
2258 | | STOCFHAsmLH = 2243, |
2259 | | STOCFHAsmM = 2244, |
2260 | | STOCFHAsmNE = 2245, |
2261 | | STOCFHAsmNH = 2246, |
2262 | | STOCFHAsmNHE = 2247, |
2263 | | STOCFHAsmNL = 2248, |
2264 | | STOCFHAsmNLE = 2249, |
2265 | | STOCFHAsmNLH = 2250, |
2266 | | STOCFHAsmNM = 2251, |
2267 | | STOCFHAsmNO = 2252, |
2268 | | STOCFHAsmNP = 2253, |
2269 | | STOCFHAsmNZ = 2254, |
2270 | | STOCFHAsmO = 2255, |
2271 | | STOCFHAsmP = 2256, |
2272 | | STOCFHAsmZ = 2257, |
2273 | | STOCG = 2258, |
2274 | | STOCGAsm = 2259, |
2275 | | STOCGAsmE = 2260, |
2276 | | STOCGAsmH = 2261, |
2277 | | STOCGAsmHE = 2262, |
2278 | | STOCGAsmL = 2263, |
2279 | | STOCGAsmLE = 2264, |
2280 | | STOCGAsmLH = 2265, |
2281 | | STOCGAsmM = 2266, |
2282 | | STOCGAsmNE = 2267, |
2283 | | STOCGAsmNH = 2268, |
2284 | | STOCGAsmNHE = 2269, |
2285 | | STOCGAsmNL = 2270, |
2286 | | STOCGAsmNLE = 2271, |
2287 | | STOCGAsmNLH = 2272, |
2288 | | STOCGAsmNM = 2273, |
2289 | | STOCGAsmNO = 2274, |
2290 | | STOCGAsmNP = 2275, |
2291 | | STOCGAsmNZ = 2276, |
2292 | | STOCGAsmO = 2277, |
2293 | | STOCGAsmP = 2278, |
2294 | | STOCGAsmZ = 2279, |
2295 | | STOSM = 2280, |
2296 | | STPQ = 2281, |
2297 | | STPT = 2282, |
2298 | | STPX = 2283, |
2299 | | STRAG = 2284, |
2300 | | STRL = 2285, |
2301 | | STRV = 2286, |
2302 | | STRVG = 2287, |
2303 | | STRVH = 2288, |
2304 | | STSCH = 2289, |
2305 | | STSI = 2290, |
2306 | | STURA = 2291, |
2307 | | STURG = 2292, |
2308 | | STY = 2293, |
2309 | | SU = 2294, |
2310 | | SUR = 2295, |
2311 | | SVC = 2296, |
2312 | | SW = 2297, |
2313 | | SWR = 2298, |
2314 | | SXBR = 2299, |
2315 | | SXR = 2300, |
2316 | | SXTR = 2301, |
2317 | | SXTRA = 2302, |
2318 | | SY = 2303, |
2319 | | TABORT = 2304, |
2320 | | TAM = 2305, |
2321 | | TAR = 2306, |
2322 | | TB = 2307, |
2323 | | TBDR = 2308, |
2324 | | TBEDR = 2309, |
2325 | | TBEGIN = 2310, |
2326 | | TBEGINC = 2311, |
2327 | | TCDB = 2312, |
2328 | | TCEB = 2313, |
2329 | | TCXB = 2314, |
2330 | | TDCDT = 2315, |
2331 | | TDCET = 2316, |
2332 | | TDCXT = 2317, |
2333 | | TDGDT = 2318, |
2334 | | TDGET = 2319, |
2335 | | TDGXT = 2320, |
2336 | | TEND = 2321, |
2337 | | THDER = 2322, |
2338 | | THDR = 2323, |
2339 | | TM = 2324, |
2340 | | TMHH = 2325, |
2341 | | TMHL = 2326, |
2342 | | TMLH = 2327, |
2343 | | TMLL = 2328, |
2344 | | TMY = 2329, |
2345 | | TP = 2330, |
2346 | | TPI = 2331, |
2347 | | TPROT = 2332, |
2348 | | TR = 2333, |
2349 | | TRACE = 2334, |
2350 | | TRACG = 2335, |
2351 | | TRAP2 = 2336, |
2352 | | TRAP4 = 2337, |
2353 | | TRE = 2338, |
2354 | | TROO = 2339, |
2355 | | TROOOpt = 2340, |
2356 | | TROT = 2341, |
2357 | | TROTOpt = 2342, |
2358 | | TRT = 2343, |
2359 | | TRTE = 2344, |
2360 | | TRTEOpt = 2345, |
2361 | | TRTO = 2346, |
2362 | | TRTOOpt = 2347, |
2363 | | TRTR = 2348, |
2364 | | TRTRE = 2349, |
2365 | | TRTREOpt = 2350, |
2366 | | TRTT = 2351, |
2367 | | TRTTOpt = 2352, |
2368 | | TS = 2353, |
2369 | | TSCH = 2354, |
2370 | | UNPK = 2355, |
2371 | | UNPKA = 2356, |
2372 | | UNPKU = 2357, |
2373 | | UPT = 2358, |
2374 | | VA = 2359, |
2375 | | VAB = 2360, |
2376 | | VAC = 2361, |
2377 | | VACC = 2362, |
2378 | | VACCB = 2363, |
2379 | | VACCC = 2364, |
2380 | | VACCCQ = 2365, |
2381 | | VACCF = 2366, |
2382 | | VACCG = 2367, |
2383 | | VACCH = 2368, |
2384 | | VACCQ = 2369, |
2385 | | VACQ = 2370, |
2386 | | VAF = 2371, |
2387 | | VAG = 2372, |
2388 | | VAH = 2373, |
2389 | | VAP = 2374, |
2390 | | VAQ = 2375, |
2391 | | VAVG = 2376, |
2392 | | VAVGB = 2377, |
2393 | | VAVGF = 2378, |
2394 | | VAVGG = 2379, |
2395 | | VAVGH = 2380, |
2396 | | VAVGL = 2381, |
2397 | | VAVGLB = 2382, |
2398 | | VAVGLF = 2383, |
2399 | | VAVGLG = 2384, |
2400 | | VAVGLH = 2385, |
2401 | | VBPERM = 2386, |
2402 | | VCDG = 2387, |
2403 | | VCDGB = 2388, |
2404 | | VCDLG = 2389, |
2405 | | VCDLGB = 2390, |
2406 | | VCEFB = 2391, |
2407 | | VCELFB = 2392, |
2408 | | VCEQ = 2393, |
2409 | | VCEQB = 2394, |
2410 | | VCEQBS = 2395, |
2411 | | VCEQF = 2396, |
2412 | | VCEQFS = 2397, |
2413 | | VCEQG = 2398, |
2414 | | VCEQGS = 2399, |
2415 | | VCEQH = 2400, |
2416 | | VCEQHS = 2401, |
2417 | | VCFEB = 2402, |
2418 | | VCFN = 2403, |
2419 | | VCFPL = 2404, |
2420 | | VCFPS = 2405, |
2421 | | VCGD = 2406, |
2422 | | VCGDB = 2407, |
2423 | | VCH = 2408, |
2424 | | VCHB = 2409, |
2425 | | VCHBS = 2410, |
2426 | | VCHF = 2411, |
2427 | | VCHFS = 2412, |
2428 | | VCHG = 2413, |
2429 | | VCHGS = 2414, |
2430 | | VCHH = 2415, |
2431 | | VCHHS = 2416, |
2432 | | VCHL = 2417, |
2433 | | VCHLB = 2418, |
2434 | | VCHLBS = 2419, |
2435 | | VCHLF = 2420, |
2436 | | VCHLFS = 2421, |
2437 | | VCHLG = 2422, |
2438 | | VCHLGS = 2423, |
2439 | | VCHLH = 2424, |
2440 | | VCHLHS = 2425, |
2441 | | VCKSM = 2426, |
2442 | | VCLFEB = 2427, |
2443 | | VCLFNH = 2428, |
2444 | | VCLFNL = 2429, |
2445 | | VCLFP = 2430, |
2446 | | VCLGD = 2431, |
2447 | | VCLGDB = 2432, |
2448 | | VCLZ = 2433, |
2449 | | VCLZB = 2434, |
2450 | | VCLZDP = 2435, |
2451 | | VCLZF = 2436, |
2452 | | VCLZG = 2437, |
2453 | | VCLZH = 2438, |
2454 | | VCNF = 2439, |
2455 | | VCP = 2440, |
2456 | | VCRNF = 2441, |
2457 | | VCSFP = 2442, |
2458 | | VCSPH = 2443, |
2459 | | VCTZ = 2444, |
2460 | | VCTZB = 2445, |
2461 | | VCTZF = 2446, |
2462 | | VCTZG = 2447, |
2463 | | VCTZH = 2448, |
2464 | | VCVB = 2449, |
2465 | | VCVBG = 2450, |
2466 | | VCVBGOpt = 2451, |
2467 | | VCVBOpt = 2452, |
2468 | | VCVD = 2453, |
2469 | | VCVDG = 2454, |
2470 | | VDP = 2455, |
2471 | | VEC = 2456, |
2472 | | VECB = 2457, |
2473 | | VECF = 2458, |
2474 | | VECG = 2459, |
2475 | | VECH = 2460, |
2476 | | VECL = 2461, |
2477 | | VECLB = 2462, |
2478 | | VECLF = 2463, |
2479 | | VECLG = 2464, |
2480 | | VECLH = 2465, |
2481 | | VERIM = 2466, |
2482 | | VERIMB = 2467, |
2483 | | VERIMF = 2468, |
2484 | | VERIMG = 2469, |
2485 | | VERIMH = 2470, |
2486 | | VERLL = 2471, |
2487 | | VERLLB = 2472, |
2488 | | VERLLF = 2473, |
2489 | | VERLLG = 2474, |
2490 | | VERLLH = 2475, |
2491 | | VERLLV = 2476, |
2492 | | VERLLVB = 2477, |
2493 | | VERLLVF = 2478, |
2494 | | VERLLVG = 2479, |
2495 | | VERLLVH = 2480, |
2496 | | VESL = 2481, |
2497 | | VESLB = 2482, |
2498 | | VESLF = 2483, |
2499 | | VESLG = 2484, |
2500 | | VESLH = 2485, |
2501 | | VESLV = 2486, |
2502 | | VESLVB = 2487, |
2503 | | VESLVF = 2488, |
2504 | | VESLVG = 2489, |
2505 | | VESLVH = 2490, |
2506 | | VESRA = 2491, |
2507 | | VESRAB = 2492, |
2508 | | VESRAF = 2493, |
2509 | | VESRAG = 2494, |
2510 | | VESRAH = 2495, |
2511 | | VESRAV = 2496, |
2512 | | VESRAVB = 2497, |
2513 | | VESRAVF = 2498, |
2514 | | VESRAVG = 2499, |
2515 | | VESRAVH = 2500, |
2516 | | VESRL = 2501, |
2517 | | VESRLB = 2502, |
2518 | | VESRLF = 2503, |
2519 | | VESRLG = 2504, |
2520 | | VESRLH = 2505, |
2521 | | VESRLV = 2506, |
2522 | | VESRLVB = 2507, |
2523 | | VESRLVF = 2508, |
2524 | | VESRLVG = 2509, |
2525 | | VESRLVH = 2510, |
2526 | | VFA = 2511, |
2527 | | VFADB = 2512, |
2528 | | VFAE = 2513, |
2529 | | VFAEB = 2514, |
2530 | | VFAEBS = 2515, |
2531 | | VFAEF = 2516, |
2532 | | VFAEFS = 2517, |
2533 | | VFAEH = 2518, |
2534 | | VFAEHS = 2519, |
2535 | | VFAEZB = 2520, |
2536 | | VFAEZBS = 2521, |
2537 | | VFAEZF = 2522, |
2538 | | VFAEZFS = 2523, |
2539 | | VFAEZH = 2524, |
2540 | | VFAEZHS = 2525, |
2541 | | VFASB = 2526, |
2542 | | VFCE = 2527, |
2543 | | VFCEDB = 2528, |
2544 | | VFCEDBS = 2529, |
2545 | | VFCESB = 2530, |
2546 | | VFCESBS = 2531, |
2547 | | VFCH = 2532, |
2548 | | VFCHDB = 2533, |
2549 | | VFCHDBS = 2534, |
2550 | | VFCHE = 2535, |
2551 | | VFCHEDB = 2536, |
2552 | | VFCHEDBS = 2537, |
2553 | | VFCHESB = 2538, |
2554 | | VFCHESBS = 2539, |
2555 | | VFCHSB = 2540, |
2556 | | VFCHSBS = 2541, |
2557 | | VFD = 2542, |
2558 | | VFDDB = 2543, |
2559 | | VFDSB = 2544, |
2560 | | VFEE = 2545, |
2561 | | VFEEB = 2546, |
2562 | | VFEEBS = 2547, |
2563 | | VFEEF = 2548, |
2564 | | VFEEFS = 2549, |
2565 | | VFEEH = 2550, |
2566 | | VFEEHS = 2551, |
2567 | | VFEEZB = 2552, |
2568 | | VFEEZBS = 2553, |
2569 | | VFEEZF = 2554, |
2570 | | VFEEZFS = 2555, |
2571 | | VFEEZH = 2556, |
2572 | | VFEEZHS = 2557, |
2573 | | VFENE = 2558, |
2574 | | VFENEB = 2559, |
2575 | | VFENEBS = 2560, |
2576 | | VFENEF = 2561, |
2577 | | VFENEFS = 2562, |
2578 | | VFENEH = 2563, |
2579 | | VFENEHS = 2564, |
2580 | | VFENEZB = 2565, |
2581 | | VFENEZBS = 2566, |
2582 | | VFENEZF = 2567, |
2583 | | VFENEZFS = 2568, |
2584 | | VFENEZH = 2569, |
2585 | | VFENEZHS = 2570, |
2586 | | VFI = 2571, |
2587 | | VFIDB = 2572, |
2588 | | VFISB = 2573, |
2589 | | VFKEDB = 2574, |
2590 | | VFKEDBS = 2575, |
2591 | | VFKESB = 2576, |
2592 | | VFKESBS = 2577, |
2593 | | VFKHDB = 2578, |
2594 | | VFKHDBS = 2579, |
2595 | | VFKHEDB = 2580, |
2596 | | VFKHEDBS = 2581, |
2597 | | VFKHESB = 2582, |
2598 | | VFKHESBS = 2583, |
2599 | | VFKHSB = 2584, |
2600 | | VFKHSBS = 2585, |
2601 | | VFLCDB = 2586, |
2602 | | VFLCSB = 2587, |
2603 | | VFLL = 2588, |
2604 | | VFLLS = 2589, |
2605 | | VFLNDB = 2590, |
2606 | | VFLNSB = 2591, |
2607 | | VFLPDB = 2592, |
2608 | | VFLPSB = 2593, |
2609 | | VFLR = 2594, |
2610 | | VFLRD = 2595, |
2611 | | VFM = 2596, |
2612 | | VFMA = 2597, |
2613 | | VFMADB = 2598, |
2614 | | VFMASB = 2599, |
2615 | | VFMAX = 2600, |
2616 | | VFMAXDB = 2601, |
2617 | | VFMAXSB = 2602, |
2618 | | VFMDB = 2603, |
2619 | | VFMIN = 2604, |
2620 | | VFMINDB = 2605, |
2621 | | VFMINSB = 2606, |
2622 | | VFMS = 2607, |
2623 | | VFMSB = 2608, |
2624 | | VFMSDB = 2609, |
2625 | | VFMSSB = 2610, |
2626 | | VFNMA = 2611, |
2627 | | VFNMADB = 2612, |
2628 | | VFNMASB = 2613, |
2629 | | VFNMS = 2614, |
2630 | | VFNMSDB = 2615, |
2631 | | VFNMSSB = 2616, |
2632 | | VFPSO = 2617, |
2633 | | VFPSODB = 2618, |
2634 | | VFPSOSB = 2619, |
2635 | | VFS = 2620, |
2636 | | VFSDB = 2621, |
2637 | | VFSQ = 2622, |
2638 | | VFSQDB = 2623, |
2639 | | VFSQSB = 2624, |
2640 | | VFSSB = 2625, |
2641 | | VFTCI = 2626, |
2642 | | VFTCIDB = 2627, |
2643 | | VFTCISB = 2628, |
2644 | | VGBM = 2629, |
2645 | | VGEF = 2630, |
2646 | | VGEG = 2631, |
2647 | | VGFM = 2632, |
2648 | | VGFMA = 2633, |
2649 | | VGFMAB = 2634, |
2650 | | VGFMAF = 2635, |
2651 | | VGFMAG = 2636, |
2652 | | VGFMAH = 2637, |
2653 | | VGFMB = 2638, |
2654 | | VGFMF = 2639, |
2655 | | VGFMG = 2640, |
2656 | | VGFMH = 2641, |
2657 | | VGM = 2642, |
2658 | | VGMB = 2643, |
2659 | | VGMF = 2644, |
2660 | | VGMG = 2645, |
2661 | | VGMH = 2646, |
2662 | | VISTR = 2647, |
2663 | | VISTRB = 2648, |
2664 | | VISTRBS = 2649, |
2665 | | VISTRF = 2650, |
2666 | | VISTRFS = 2651, |
2667 | | VISTRH = 2652, |
2668 | | VISTRHS = 2653, |
2669 | | VL = 2654, |
2670 | | VLAlign = 2655, |
2671 | | VLBB = 2656, |
2672 | | VLBR = 2657, |
2673 | | VLBRF = 2658, |
2674 | | VLBRG = 2659, |
2675 | | VLBRH = 2660, |
2676 | | VLBRQ = 2661, |
2677 | | VLBRREP = 2662, |
2678 | | VLBRREPF = 2663, |
2679 | | VLBRREPG = 2664, |
2680 | | VLBRREPH = 2665, |
2681 | | VLC = 2666, |
2682 | | VLCB = 2667, |
2683 | | VLCF = 2668, |
2684 | | VLCG = 2669, |
2685 | | VLCH = 2670, |
2686 | | VLDE = 2671, |
2687 | | VLDEB = 2672, |
2688 | | VLEB = 2673, |
2689 | | VLEBRF = 2674, |
2690 | | VLEBRG = 2675, |
2691 | | VLEBRH = 2676, |
2692 | | VLED = 2677, |
2693 | | VLEDB = 2678, |
2694 | | VLEF = 2679, |
2695 | | VLEG = 2680, |
2696 | | VLEH = 2681, |
2697 | | VLEIB = 2682, |
2698 | | VLEIF = 2683, |
2699 | | VLEIG = 2684, |
2700 | | VLEIH = 2685, |
2701 | | VLER = 2686, |
2702 | | VLERF = 2687, |
2703 | | VLERG = 2688, |
2704 | | VLERH = 2689, |
2705 | | VLGV = 2690, |
2706 | | VLGVB = 2691, |
2707 | | VLGVF = 2692, |
2708 | | VLGVG = 2693, |
2709 | | VLGVH = 2694, |
2710 | | VLIP = 2695, |
2711 | | VLL = 2696, |
2712 | | VLLEBRZ = 2697, |
2713 | | VLLEBRZE = 2698, |
2714 | | VLLEBRZF = 2699, |
2715 | | VLLEBRZG = 2700, |
2716 | | VLLEBRZH = 2701, |
2717 | | VLLEZ = 2702, |
2718 | | VLLEZB = 2703, |
2719 | | VLLEZF = 2704, |
2720 | | VLLEZG = 2705, |
2721 | | VLLEZH = 2706, |
2722 | | VLLEZLF = 2707, |
2723 | | VLM = 2708, |
2724 | | VLMAlign = 2709, |
2725 | | VLP = 2710, |
2726 | | VLPB = 2711, |
2727 | | VLPF = 2712, |
2728 | | VLPG = 2713, |
2729 | | VLPH = 2714, |
2730 | | VLR = 2715, |
2731 | | VLREP = 2716, |
2732 | | VLREPB = 2717, |
2733 | | VLREPF = 2718, |
2734 | | VLREPG = 2719, |
2735 | | VLREPH = 2720, |
2736 | | VLRL = 2721, |
2737 | | VLRLR = 2722, |
2738 | | VLVG = 2723, |
2739 | | VLVGB = 2724, |
2740 | | VLVGF = 2725, |
2741 | | VLVGG = 2726, |
2742 | | VLVGH = 2727, |
2743 | | VLVGP = 2728, |
2744 | | VMAE = 2729, |
2745 | | VMAEB = 2730, |
2746 | | VMAEF = 2731, |
2747 | | VMAEH = 2732, |
2748 | | VMAH = 2733, |
2749 | | VMAHB = 2734, |
2750 | | VMAHF = 2735, |
2751 | | VMAHH = 2736, |
2752 | | VMAL = 2737, |
2753 | | VMALB = 2738, |
2754 | | VMALE = 2739, |
2755 | | VMALEB = 2740, |
2756 | | VMALEF = 2741, |
2757 | | VMALEH = 2742, |
2758 | | VMALF = 2743, |
2759 | | VMALH = 2744, |
2760 | | VMALHB = 2745, |
2761 | | VMALHF = 2746, |
2762 | | VMALHH = 2747, |
2763 | | VMALHW = 2748, |
2764 | | VMALO = 2749, |
2765 | | VMALOB = 2750, |
2766 | | VMALOF = 2751, |
2767 | | VMALOH = 2752, |
2768 | | VMAO = 2753, |
2769 | | VMAOB = 2754, |
2770 | | VMAOF = 2755, |
2771 | | VMAOH = 2756, |
2772 | | VME = 2757, |
2773 | | VMEB = 2758, |
2774 | | VMEF = 2759, |
2775 | | VMEH = 2760, |
2776 | | VMH = 2761, |
2777 | | VMHB = 2762, |
2778 | | VMHF = 2763, |
2779 | | VMHH = 2764, |
2780 | | VML = 2765, |
2781 | | VMLB = 2766, |
2782 | | VMLE = 2767, |
2783 | | VMLEB = 2768, |
2784 | | VMLEF = 2769, |
2785 | | VMLEH = 2770, |
2786 | | VMLF = 2771, |
2787 | | VMLH = 2772, |
2788 | | VMLHB = 2773, |
2789 | | VMLHF = 2774, |
2790 | | VMLHH = 2775, |
2791 | | VMLHW = 2776, |
2792 | | VMLO = 2777, |
2793 | | VMLOB = 2778, |
2794 | | VMLOF = 2779, |
2795 | | VMLOH = 2780, |
2796 | | VMN = 2781, |
2797 | | VMNB = 2782, |
2798 | | VMNF = 2783, |
2799 | | VMNG = 2784, |
2800 | | VMNH = 2785, |
2801 | | VMNL = 2786, |
2802 | | VMNLB = 2787, |
2803 | | VMNLF = 2788, |
2804 | | VMNLG = 2789, |
2805 | | VMNLH = 2790, |
2806 | | VMO = 2791, |
2807 | | VMOB = 2792, |
2808 | | VMOF = 2793, |
2809 | | VMOH = 2794, |
2810 | | VMP = 2795, |
2811 | | VMRH = 2796, |
2812 | | VMRHB = 2797, |
2813 | | VMRHF = 2798, |
2814 | | VMRHG = 2799, |
2815 | | VMRHH = 2800, |
2816 | | VMRL = 2801, |
2817 | | VMRLB = 2802, |
2818 | | VMRLF = 2803, |
2819 | | VMRLG = 2804, |
2820 | | VMRLH = 2805, |
2821 | | VMSL = 2806, |
2822 | | VMSLG = 2807, |
2823 | | VMSP = 2808, |
2824 | | VMX = 2809, |
2825 | | VMXB = 2810, |
2826 | | VMXF = 2811, |
2827 | | VMXG = 2812, |
2828 | | VMXH = 2813, |
2829 | | VMXL = 2814, |
2830 | | VMXLB = 2815, |
2831 | | VMXLF = 2816, |
2832 | | VMXLG = 2817, |
2833 | | VMXLH = 2818, |
2834 | | VN = 2819, |
2835 | | VNC = 2820, |
2836 | | VNN = 2821, |
2837 | | VNO = 2822, |
2838 | | VNX = 2823, |
2839 | | VO = 2824, |
2840 | | VOC = 2825, |
2841 | | VONE = 2826, |
2842 | | VPDI = 2827, |
2843 | | VPERM = 2828, |
2844 | | VPK = 2829, |
2845 | | VPKF = 2830, |
2846 | | VPKG = 2831, |
2847 | | VPKH = 2832, |
2848 | | VPKLS = 2833, |
2849 | | VPKLSF = 2834, |
2850 | | VPKLSFS = 2835, |
2851 | | VPKLSG = 2836, |
2852 | | VPKLSGS = 2837, |
2853 | | VPKLSH = 2838, |
2854 | | VPKLSHS = 2839, |
2855 | | VPKS = 2840, |
2856 | | VPKSF = 2841, |
2857 | | VPKSFS = 2842, |
2858 | | VPKSG = 2843, |
2859 | | VPKSGS = 2844, |
2860 | | VPKSH = 2845, |
2861 | | VPKSHS = 2846, |
2862 | | VPKZ = 2847, |
2863 | | VPKZR = 2848, |
2864 | | VPOPCT = 2849, |
2865 | | VPOPCTB = 2850, |
2866 | | VPOPCTF = 2851, |
2867 | | VPOPCTG = 2852, |
2868 | | VPOPCTH = 2853, |
2869 | | VPSOP = 2854, |
2870 | | VREP = 2855, |
2871 | | VREPB = 2856, |
2872 | | VREPF = 2857, |
2873 | | VREPG = 2858, |
2874 | | VREPH = 2859, |
2875 | | VREPI = 2860, |
2876 | | VREPIB = 2861, |
2877 | | VREPIF = 2862, |
2878 | | VREPIG = 2863, |
2879 | | VREPIH = 2864, |
2880 | | VRP = 2865, |
2881 | | VS = 2866, |
2882 | | VSB = 2867, |
2883 | | VSBCBI = 2868, |
2884 | | VSBCBIQ = 2869, |
2885 | | VSBI = 2870, |
2886 | | VSBIQ = 2871, |
2887 | | VSCBI = 2872, |
2888 | | VSCBIB = 2873, |
2889 | | VSCBIF = 2874, |
2890 | | VSCBIG = 2875, |
2891 | | VSCBIH = 2876, |
2892 | | VSCBIQ = 2877, |
2893 | | VSCEF = 2878, |
2894 | | VSCEG = 2879, |
2895 | | VSCHDP = 2880, |
2896 | | VSCHP = 2881, |
2897 | | VSCHSP = 2882, |
2898 | | VSCHXP = 2883, |
2899 | | VSCSHP = 2884, |
2900 | | VSDP = 2885, |
2901 | | VSEG = 2886, |
2902 | | VSEGB = 2887, |
2903 | | VSEGF = 2888, |
2904 | | VSEGH = 2889, |
2905 | | VSEL = 2890, |
2906 | | VSF = 2891, |
2907 | | VSG = 2892, |
2908 | | VSH = 2893, |
2909 | | VSL = 2894, |
2910 | | VSLB = 2895, |
2911 | | VSLD = 2896, |
2912 | | VSLDB = 2897, |
2913 | | VSP = 2898, |
2914 | | VSQ = 2899, |
2915 | | VSRA = 2900, |
2916 | | VSRAB = 2901, |
2917 | | VSRD = 2902, |
2918 | | VSRL = 2903, |
2919 | | VSRLB = 2904, |
2920 | | VSRP = 2905, |
2921 | | VSRPR = 2906, |
2922 | | VST = 2907, |
2923 | | VSTAlign = 2908, |
2924 | | VSTBR = 2909, |
2925 | | VSTBRF = 2910, |
2926 | | VSTBRG = 2911, |
2927 | | VSTBRH = 2912, |
2928 | | VSTBRQ = 2913, |
2929 | | VSTEB = 2914, |
2930 | | VSTEBRF = 2915, |
2931 | | VSTEBRG = 2916, |
2932 | | VSTEBRH = 2917, |
2933 | | VSTEF = 2918, |
2934 | | VSTEG = 2919, |
2935 | | VSTEH = 2920, |
2936 | | VSTER = 2921, |
2937 | | VSTERF = 2922, |
2938 | | VSTERG = 2923, |
2939 | | VSTERH = 2924, |
2940 | | VSTL = 2925, |
2941 | | VSTM = 2926, |
2942 | | VSTMAlign = 2927, |
2943 | | VSTRC = 2928, |
2944 | | VSTRCB = 2929, |
2945 | | VSTRCBS = 2930, |
2946 | | VSTRCF = 2931, |
2947 | | VSTRCFS = 2932, |
2948 | | VSTRCH = 2933, |
2949 | | VSTRCHS = 2934, |
2950 | | VSTRCZB = 2935, |
2951 | | VSTRCZBS = 2936, |
2952 | | VSTRCZF = 2937, |
2953 | | VSTRCZFS = 2938, |
2954 | | VSTRCZH = 2939, |
2955 | | VSTRCZHS = 2940, |
2956 | | VSTRL = 2941, |
2957 | | VSTRLR = 2942, |
2958 | | VSTRS = 2943, |
2959 | | VSTRSB = 2944, |
2960 | | VSTRSF = 2945, |
2961 | | VSTRSH = 2946, |
2962 | | VSTRSZB = 2947, |
2963 | | VSTRSZF = 2948, |
2964 | | VSTRSZH = 2949, |
2965 | | VSUM = 2950, |
2966 | | VSUMB = 2951, |
2967 | | VSUMG = 2952, |
2968 | | VSUMGF = 2953, |
2969 | | VSUMGH = 2954, |
2970 | | VSUMH = 2955, |
2971 | | VSUMQ = 2956, |
2972 | | VSUMQF = 2957, |
2973 | | VSUMQG = 2958, |
2974 | | VTM = 2959, |
2975 | | VTP = 2960, |
2976 | | VUPH = 2961, |
2977 | | VUPHB = 2962, |
2978 | | VUPHF = 2963, |
2979 | | VUPHH = 2964, |
2980 | | VUPKZ = 2965, |
2981 | | VUPKZH = 2966, |
2982 | | VUPKZL = 2967, |
2983 | | VUPL = 2968, |
2984 | | VUPLB = 2969, |
2985 | | VUPLF = 2970, |
2986 | | VUPLH = 2971, |
2987 | | VUPLHB = 2972, |
2988 | | VUPLHF = 2973, |
2989 | | VUPLHH = 2974, |
2990 | | VUPLHW = 2975, |
2991 | | VUPLL = 2976, |
2992 | | VUPLLB = 2977, |
2993 | | VUPLLF = 2978, |
2994 | | VUPLLH = 2979, |
2995 | | VX = 2980, |
2996 | | VZERO = 2981, |
2997 | | WCDGB = 2982, |
2998 | | WCDLGB = 2983, |
2999 | | WCEFB = 2984, |
3000 | | WCELFB = 2985, |
3001 | | WCFEB = 2986, |
3002 | | WCGDB = 2987, |
3003 | | WCLFEB = 2988, |
3004 | | WCLGDB = 2989, |
3005 | | WFADB = 2990, |
3006 | | WFASB = 2991, |
3007 | | WFAXB = 2992, |
3008 | | WFC = 2993, |
3009 | | WFCDB = 2994, |
3010 | | WFCEDB = 2995, |
3011 | | WFCEDBS = 2996, |
3012 | | WFCESB = 2997, |
3013 | | WFCESBS = 2998, |
3014 | | WFCEXB = 2999, |
3015 | | WFCEXBS = 3000, |
3016 | | WFCHDB = 3001, |
3017 | | WFCHDBS = 3002, |
3018 | | WFCHEDB = 3003, |
3019 | | WFCHEDBS = 3004, |
3020 | | WFCHESB = 3005, |
3021 | | WFCHESBS = 3006, |
3022 | | WFCHEXB = 3007, |
3023 | | WFCHEXBS = 3008, |
3024 | | WFCHSB = 3009, |
3025 | | WFCHSBS = 3010, |
3026 | | WFCHXB = 3011, |
3027 | | WFCHXBS = 3012, |
3028 | | WFCSB = 3013, |
3029 | | WFCXB = 3014, |
3030 | | WFDDB = 3015, |
3031 | | WFDSB = 3016, |
3032 | | WFDXB = 3017, |
3033 | | WFIDB = 3018, |
3034 | | WFISB = 3019, |
3035 | | WFIXB = 3020, |
3036 | | WFK = 3021, |
3037 | | WFKDB = 3022, |
3038 | | WFKEDB = 3023, |
3039 | | WFKEDBS = 3024, |
3040 | | WFKESB = 3025, |
3041 | | WFKESBS = 3026, |
3042 | | WFKEXB = 3027, |
3043 | | WFKEXBS = 3028, |
3044 | | WFKHDB = 3029, |
3045 | | WFKHDBS = 3030, |
3046 | | WFKHEDB = 3031, |
3047 | | WFKHEDBS = 3032, |
3048 | | WFKHESB = 3033, |
3049 | | WFKHESBS = 3034, |
3050 | | WFKHEXB = 3035, |
3051 | | WFKHEXBS = 3036, |
3052 | | WFKHSB = 3037, |
3053 | | WFKHSBS = 3038, |
3054 | | WFKHXB = 3039, |
3055 | | WFKHXBS = 3040, |
3056 | | WFKSB = 3041, |
3057 | | WFKXB = 3042, |
3058 | | WFLCDB = 3043, |
3059 | | WFLCSB = 3044, |
3060 | | WFLCXB = 3045, |
3061 | | WFLLD = 3046, |
3062 | | WFLLS = 3047, |
3063 | | WFLNDB = 3048, |
3064 | | WFLNSB = 3049, |
3065 | | WFLNXB = 3050, |
3066 | | WFLPDB = 3051, |
3067 | | WFLPSB = 3052, |
3068 | | WFLPXB = 3053, |
3069 | | WFLRD = 3054, |
3070 | | WFLRX = 3055, |
3071 | | WFMADB = 3056, |
3072 | | WFMASB = 3057, |
3073 | | WFMAXB = 3058, |
3074 | | WFMAXDB = 3059, |
3075 | | WFMAXSB = 3060, |
3076 | | WFMAXXB = 3061, |
3077 | | WFMDB = 3062, |
3078 | | WFMINDB = 3063, |
3079 | | WFMINSB = 3064, |
3080 | | WFMINXB = 3065, |
3081 | | WFMSB = 3066, |
3082 | | WFMSDB = 3067, |
3083 | | WFMSSB = 3068, |
3084 | | WFMSXB = 3069, |
3085 | | WFMXB = 3070, |
3086 | | WFNMADB = 3071, |
3087 | | WFNMASB = 3072, |
3088 | | WFNMAXB = 3073, |
3089 | | WFNMSDB = 3074, |
3090 | | WFNMSSB = 3075, |
3091 | | WFNMSXB = 3076, |
3092 | | WFPSODB = 3077, |
3093 | | WFPSOSB = 3078, |
3094 | | WFPSOXB = 3079, |
3095 | | WFSDB = 3080, |
3096 | | WFSQDB = 3081, |
3097 | | WFSQSB = 3082, |
3098 | | WFSQXB = 3083, |
3099 | | WFSSB = 3084, |
3100 | | WFSXB = 3085, |
3101 | | WFTCIDB = 3086, |
3102 | | WFTCISB = 3087, |
3103 | | WFTCIXB = 3088, |
3104 | | WLDEB = 3089, |
3105 | | WLEDB = 3090, |
3106 | | X = 3091, |
3107 | | XC = 3092, |
3108 | | XG = 3093, |
3109 | | XGR = 3094, |
3110 | | XGRK = 3095, |
3111 | | XI = 3096, |
3112 | | XIHF = 3097, |
3113 | | XILF = 3098, |
3114 | | XIY = 3099, |
3115 | | XR = 3100, |
3116 | | XRK = 3101, |
3117 | | XSCH = 3102, |
3118 | | XY = 3103, |
3119 | | ZAP = 3104, |
3120 | | INSTRUCTION_LIST_END = 3105 |
3121 | | }; |
3122 | | |
3123 | | } // end namespace SystemZ |
3124 | | } // end namespace llvm |
3125 | | #endif // GET_INSTRINFO_ENUM |
3126 | | |
3127 | | #ifdef GET_INSTRINFO_SCHED_ENUM |
3128 | | #undef GET_INSTRINFO_SCHED_ENUM |
3129 | | namespace llvm { |
3130 | | |
3131 | | namespace SystemZ { |
3132 | | namespace Sched { |
3133 | | enum { |
3134 | | NoInstrModel = 0, |
3135 | | ADJDYNALLOC = 1, |
3136 | | CallBRCL_BRC_BRCAsm_BRCL_BRCLAsm = 2, |
3137 | | CallJG_J_JAsmE_JAsmH_JAsmHE_JAsmL_JAsmLE_JAsmLH_JAsmM_JAsmNE_JAsmNH_JAsmNHE_JAsmNL_JAsmNLE_JAsmNLH_JAsmNM_JAsmNO_JAsmNP_JAsmNZ_JAsmO_JAsmP_JAsmZ_JG_JGAsmE_JGAsmH_JGAsmHE_JGAsmL_JGAsmLE_JGAsmLH_JGAsmM_JGAsmNE_JGAsmNH_JGAsmNHE_JGAsmNL_JGAsmNLE_JGAsmNLH_JGAsmNM_JGAsmNO_JGAsmNP_JGAsmNZ_JGAsmO_JGAsmP_JGAsmZ = 3, |
3138 | | CallBCR_BC_BCAsm_BCR_BCRAsm = 4, |
3139 | | CallBR_B_BAsmE_BAsmH_BAsmHE_BAsmL_BAsmLE_BAsmLH_BAsmM_BAsmNE_BAsmNH_BAsmNHE_BAsmNL_BAsmNLE_BAsmNLH_BAsmNM_BAsmNO_BAsmNP_BAsmNZ_BAsmO_BAsmP_BAsmZ_BR_BRAsmE_BRAsmH_BRAsmHE_BRAsmL_BRAsmLE_BRAsmLH_BRAsmM_BRAsmNE_BRAsmNH_BRAsmNHE_BRAsmNL_BRAsmNLE_BRAsmNLH_BRAsmNM_BRAsmNO_BRAsmNP_BRAsmNZ_BRAsmO_BRAsmP_BRAsmZ = 5, |
3140 | | BI_BIAsmE_BIAsmH_BIAsmHE_BIAsmL_BIAsmLE_BIAsmLH_BIAsmM_BIAsmNE_BIAsmNH_BIAsmNHE_BIAsmNL_BIAsmNLE_BIAsmNLH_BIAsmNM_BIAsmNO_BIAsmNP_BIAsmNZ_BIAsmO_BIAsmP_BIAsmZ_BIC_BICAsm = 6, |
3141 | | BRCT_BRCTG = 7, |
3142 | | BRCTH = 8, |
3143 | | BCT_BCTG_BCTGR_BCTR = 9, |
3144 | | BRXH_BRXHG_BRXLE_BRXLG_BXH_BXHG_BXLE_BXLEG = 10, |
3145 | | CGIJ_CGIJAsm_CGIJAsmE_CGIJAsmH_CGIJAsmHE_CGIJAsmL_CGIJAsmLE_CGIJAsmLH_CGIJAsmNE_CGIJAsmNH_CGIJAsmNHE_CGIJAsmNL_CGIJAsmNLE_CGIJAsmNLH_CGRJ_CGRJAsm_CGRJAsmE_CGRJAsmH_CGRJAsmHE_CGRJAsmL_CGRJAsmLE_CGRJAsmLH_CGRJAsmNE_CGRJAsmNH_CGRJAsmNHE_CGRJAsmNL_CGRJAsmNLE_CGRJAsmNLH_CIJ_CIJAsm_CIJAsmE_CIJAsmH_CIJAsmHE_CIJAsmL_CIJAsmLE_CIJAsmLH_CIJAsmNE_CIJAsmNH_CIJAsmNHE_CIJAsmNL_CIJAsmNLE_CIJAsmNLH_CLGIJ_CLGIJAsm_CLGIJAsmE_CLGIJAsmH_CLGIJAsmHE_CLGIJAsmL_CLGIJAsmLE_CLGIJAsmLH_CLGIJAsmNE_CLGIJAsmNH_CLGIJAsmNHE_CLGIJAsmNL_CLGIJAsmNLE_CLGIJAsmNLH_CLGRJ_CLGRJAsm_CLGRJAsmE_CLGRJAsmH_CLGRJAsmHE_CLGRJAsmL_CLGRJAsmLE_CLGRJAsmLH_CLGRJAsmNE_CLGRJAsmNH_CLGRJAsmNHE_CLGRJAsmNL_CLGRJAsmNLE_CLGRJAsmNLH_CLIJ_CLIJAsm_CLIJAsmE_CLIJAsmH_CLIJAsmHE_CLIJAsmL_CLIJAsmLE_CLIJAsmLH_CLIJAsmNE_CLIJAsmNH_CLIJAsmNHE_CLIJAsmNL_CLIJAsmNLE_CLIJAsmNLH_CLRJ_CLRJAsm_CLRJAsmE_CLRJAsmH_CLRJAsmHE_CLRJAsmL_CLRJAsmLE_CLRJAsmLH_CLRJAsmNE_CLRJAsmNH_CLRJAsmNHE_CLRJAsmNL_CLRJAsmNLE_CLRJAsmNLH_CRJ_CRJAsm_CRJAsmE_CRJAsmH_CRJAsmHE_CRJAsmL_CRJAsmLE_CRJAsmLH_CRJAsmNE_CRJAsmNH_CRJAsmNHE_CRJAsmNL_CRJAsmNLE_CRJAsmNLH = 11, |
3146 | | CGIBCall_CGIBReturn_CGRBCall_CGRBReturn_CIBCall_CIBReturn_CLGIBCall_CLGIBReturn_CLGRBCall_CLGRBReturn_CLIBCall_CLIBReturn_CLRBCall_CLRBReturn_CRBCall_CRBReturn_CGIB_CGIBAsm_CGIBAsmE_CGIBAsmH_CGIBAsmHE_CGIBAsmL_CGIBAsmLE_CGIBAsmLH_CGIBAsmNE_CGIBAsmNH_CGIBAsmNHE_CGIBAsmNL_CGIBAsmNLE_CGIBAsmNLH_CGRB_CGRBAsm_CGRBAsmE_CGRBAsmH_CGRBAsmHE_CGRBAsmL_CGRBAsmLE_CGRBAsmLH_CGRBAsmNE_CGRBAsmNH_CGRBAsmNHE_CGRBAsmNL_CGRBAsmNLE_CGRBAsmNLH_CIB_CIBAsm_CIBAsmE_CIBAsmH_CIBAsmHE_CIBAsmL_CIBAsmLE_CIBAsmLH_CIBAsmNE_CIBAsmNH_CIBAsmNHE_CIBAsmNL_CIBAsmNLE_CIBAsmNLH_CLGIB_CLGIBAsm_CLGIBAsmE_CLGIBAsmH_CLGIBAsmHE_CLGIBAsmL_CLGIBAsmLE_CLGIBAsmLH_CLGIBAsmNE_CLGIBAsmNH_CLGIBAsmNHE_CLGIBAsmNL_CLGIBAsmNLE_CLGIBAsmNLH_CLGRB_CLGRBAsm_CLGRBAsmE_CLGRBAsmH_CLGRBAsmHE_CLGRBAsmL_CLGRBAsmLE_CLGRBAsmLH_CLGRBAsmNE_CLGRBAsmNH_CLGRBAsmNHE_CLGRBAsmNL_CLGRBAsmNLE_CLGRBAsmNLH_CLIB_CLIBAsm_CLIBAsmE_CLIBAsmH_CLIBAsmHE_CLIBAsmL_CLIBAsmLE_CLIBAsmLH_CLIBAsmNE_CLIBAsmNH_CLIBAsmNHE_CLIBAsmNL_CLIBAsmNLE_CLIBAsmNLH_CLRB_CLRBAsm_CLRBAsmE_CLRBAsmH_CLRBAsmHE_CLRBAsmL_CLRBAsmLE_CLRBAsmLH_CLRBAsmNE_CLRBAsmNH_CLRBAsmNHE_CLRBAsmNL_CLRBAsmNLE_CLRBAsmNLH_CRB_CRBAsm_CRBAsmE_CRBAsmH_CRBAsmHE_CRBAsmL_CRBAsmLE_CRBAsmLH_CRBAsmNE_CRBAsmNH_CRBAsmNHE_CRBAsmNL_CRBAsmNLE_CRBAsmNLH = 12, |
3147 | | CondTrap_Trap = 13, |
3148 | | CGIT_CGITAsm_CGITAsmE_CGITAsmH_CGITAsmHE_CGITAsmL_CGITAsmLE_CGITAsmLH_CGITAsmNE_CGITAsmNH_CGITAsmNHE_CGITAsmNL_CGITAsmNLE_CGITAsmNLH_CGRT_CGRTAsm_CGRTAsmE_CGRTAsmH_CGRTAsmHE_CGRTAsmL_CGRTAsmLE_CGRTAsmLH_CGRTAsmNE_CGRTAsmNH_CGRTAsmNHE_CGRTAsmNL_CGRTAsmNLE_CGRTAsmNLH_CIT_CITAsm_CITAsmE_CITAsmH_CITAsmHE_CITAsmL_CITAsmLE_CITAsmLH_CITAsmNE_CITAsmNH_CITAsmNHE_CITAsmNL_CITAsmNLE_CITAsmNLH_CRT_CRTAsm_CRTAsmE_CRTAsmH_CRTAsmHE_CRTAsmL_CRTAsmLE_CRTAsmLH_CRTAsmNE_CRTAsmNH_CRTAsmNHE_CRTAsmNL_CRTAsmNLE_CRTAsmNLH = 14, |
3149 | | CLGRT_CLGRTAsm_CLGRTAsmE_CLGRTAsmH_CLGRTAsmHE_CLGRTAsmL_CLGRTAsmLE_CLGRTAsmLH_CLGRTAsmNE_CLGRTAsmNH_CLGRTAsmNHE_CLGRTAsmNL_CLGRTAsmNLE_CLGRTAsmNLH_CLRT_CLRTAsm_CLRTAsmE_CLRTAsmH_CLRTAsmHE_CLRTAsmL_CLRTAsmLE_CLRTAsmLH_CLRTAsmNE_CLRTAsmNH_CLRTAsmNHE_CLRTAsmNL_CLRTAsmNLE_CLRTAsmNLH = 15, |
3150 | | CLFIT_CLFITAsm_CLFITAsmE_CLFITAsmH_CLFITAsmHE_CLFITAsmL_CLFITAsmLE_CLFITAsmLH_CLFITAsmNE_CLFITAsmNH_CLFITAsmNHE_CLFITAsmNL_CLFITAsmNLE_CLFITAsmNLH_CLGIT_CLGITAsm_CLGITAsmE_CLGITAsmH_CLGITAsmHE_CLGITAsmL_CLGITAsmLE_CLGITAsmLH_CLGITAsmNE_CLGITAsmNH_CLGITAsmNHE_CLGITAsmNL_CLGITAsmNLE_CLGITAsmNLH = 16, |
3151 | | CLGT_CLGTAsm_CLGTAsmE_CLGTAsmH_CLGTAsmHE_CLGTAsmL_CLGTAsmLE_CLGTAsmLH_CLGTAsmNE_CLGTAsmNH_CLGTAsmNHE_CLGTAsmNL_CLGTAsmNLE_CLGTAsmNLH_CLT_CLTAsm_CLTAsmE_CLTAsmH_CLTAsmHE_CLTAsmL_CLTAsmLE_CLTAsmLH_CLTAsmNE_CLTAsmNH_CLTAsmNHE_CLTAsmNL_CLTAsmNLE_CLTAsmNLH = 17, |
3152 | | BRAS = 18, |
3153 | | CallBRASL_CallBRASL_XPLINK64_BRASL = 19, |
3154 | | CallBASR_CallBASR_STACKEXT_CallBASR_XPLINK64_BAS_BASR = 20, |
3155 | | TLS_GDCALL_TLS_LDCALL = 21, |
3156 | | Return_Return_XPLINK = 22, |
3157 | | CondReturn_CondReturn_XPLINK = 23, |
3158 | | MVGHI_MVHHI_MVHI = 24, |
3159 | | MVI_MVIY = 25, |
3160 | | MVC = 26, |
3161 | | MVCL_MVCLE_MVCLU = 27, |
3162 | | MVCRL = 28, |
3163 | | COPY_TO_REGCLASS_COPY = 29, |
3164 | | EXTRACT_SUBREG = 30, |
3165 | | INSERT_SUBREG = 31, |
3166 | | REG_SEQUENCE = 32, |
3167 | | LMux_L_LFH_LRL_LY = 33, |
3168 | | LCBB = 34, |
3169 | | LG_LGRL = 35, |
3170 | | L128 = 36, |
3171 | | LLIHF_LLIHH_LLIHL = 37, |
3172 | | LLILF_LLILH_LLILL = 38, |
3173 | | LGFI_LGHI = 39, |
3174 | | LHIMux_LHI = 40, |
3175 | | LR = 41, |
3176 | | LZRF_LZRG = 42, |
3177 | | LAT_LFHAT_LGAT = 43, |
3178 | | LT_LTG = 44, |
3179 | | LTGR_LTR = 45, |
3180 | | STG_STGRL = 46, |
3181 | | ST128 = 47, |
3182 | | STMux_ST_STFH_STRL_STY = 48, |
3183 | | MVST = 49, |
3184 | | LOCRMux = 50, |
3185 | | LOCFHR_LOCFHRAsm_LOCFHRAsmE_LOCFHRAsmH_LOCFHRAsmHE_LOCFHRAsmL_LOCFHRAsmLE_LOCFHRAsmLH_LOCFHRAsmM_LOCFHRAsmNE_LOCFHRAsmNH_LOCFHRAsmNHE_LOCFHRAsmNL_LOCFHRAsmNLE_LOCFHRAsmNLH_LOCFHRAsmNM_LOCFHRAsmNO_LOCFHRAsmNP_LOCFHRAsmNZ_LOCFHRAsmO_LOCFHRAsmP_LOCFHRAsmZ_LOCGR_LOCGRAsm_LOCGRAsmE_LOCGRAsmH_LOCGRAsmHE_LOCGRAsmL_LOCGRAsmLE_LOCGRAsmLH_LOCGRAsmM_LOCGRAsmNE_LOCGRAsmNH_LOCGRAsmNHE_LOCGRAsmNL_LOCGRAsmNLE_LOCGRAsmNLH_LOCGRAsmNM_LOCGRAsmNO_LOCGRAsmNP_LOCGRAsmNZ_LOCGRAsmO_LOCGRAsmP_LOCGRAsmZ_LOCR_LOCRAsm_LOCRAsmE_LOCRAsmH_LOCRAsmHE_LOCRAsmL_LOCRAsmLE_LOCRAsmLH_LOCRAsmM_LOCRAsmNE_LOCRAsmNH_LOCRAsmNHE_LOCRAsmNL_LOCRAsmNLE_LOCRAsmNLH_LOCRAsmNM_LOCRAsmNO_LOCRAsmNP_LOCRAsmNZ_LOCRAsmO_LOCRAsmP_LOCRAsmZ = 51, |
3186 | | LOCHIMux_LOCGHI_LOCGHIAsm_LOCGHIAsmE_LOCGHIAsmH_LOCGHIAsmHE_LOCGHIAsmL_LOCGHIAsmLE_LOCGHIAsmLH_LOCGHIAsmM_LOCGHIAsmNE_LOCGHIAsmNH_LOCGHIAsmNHE_LOCGHIAsmNL_LOCGHIAsmNLE_LOCGHIAsmNLH_LOCGHIAsmNM_LOCGHIAsmNO_LOCGHIAsmNP_LOCGHIAsmNZ_LOCGHIAsmO_LOCGHIAsmP_LOCGHIAsmZ_LOCHHI_LOCHHIAsm_LOCHHIAsmE_LOCHHIAsmH_LOCHHIAsmHE_LOCHHIAsmL_LOCHHIAsmLE_LOCHHIAsmLH_LOCHHIAsmM_LOCHHIAsmNE_LOCHHIAsmNH_LOCHHIAsmNHE_LOCHHIAsmNL_LOCHHIAsmNLE_LOCHHIAsmNLH_LOCHHIAsmNM_LOCHHIAsmNO_LOCHHIAsmNP_LOCHHIAsmNZ_LOCHHIAsmO_LOCHHIAsmP_LOCHHIAsmZ_LOCHI_LOCHIAsm_LOCHIAsmE_LOCHIAsmH_LOCHIAsmHE_LOCHIAsmL_LOCHIAsmLE_LOCHIAsmLH_LOCHIAsmM_LOCHIAsmNE_LOCHIAsmNH_LOCHIAsmNHE_LOCHIAsmNL_LOCHIAsmNLE_LOCHIAsmNLH_LOCHIAsmNM_LOCHIAsmNO_LOCHIAsmNP_LOCHIAsmNZ_LOCHIAsmO_LOCHIAsmP_LOCHIAsmZ = 52, |
3187 | | LOCMux_LOC_LOCAsm_LOCAsmE_LOCAsmH_LOCAsmHE_LOCAsmL_LOCAsmLE_LOCAsmLH_LOCAsmM_LOCAsmNE_LOCAsmNH_LOCAsmNHE_LOCAsmNL_LOCAsmNLE_LOCAsmNLH_LOCAsmNM_LOCAsmNO_LOCAsmNP_LOCAsmNZ_LOCAsmO_LOCAsmP_LOCAsmZ_LOCFH_LOCFHAsm_LOCFHAsmE_LOCFHAsmH_LOCFHAsmHE_LOCFHAsmL_LOCFHAsmLE_LOCFHAsmLH_LOCFHAsmM_LOCFHAsmNE_LOCFHAsmNH_LOCFHAsmNHE_LOCFHAsmNL_LOCFHAsmNLE_LOCFHAsmNLH_LOCFHAsmNM_LOCFHAsmNO_LOCFHAsmNP_LOCFHAsmNZ_LOCFHAsmO_LOCFHAsmP_LOCFHAsmZ_LOCG_LOCGAsm_LOCGAsmE_LOCGAsmH_LOCGAsmHE_LOCGAsmL_LOCGAsmLE_LOCGAsmLH_LOCGAsmM_LOCGAsmNE_LOCGAsmNH_LOCGAsmNHE_LOCGAsmNL_LOCGAsmNLE_LOCGAsmNLH_LOCGAsmNM_LOCGAsmNO_LOCGAsmNP_LOCGAsmNZ_LOCGAsmO_LOCGAsmP_LOCGAsmZ = 53, |
3188 | | STOCMux_STOC_STOCAsm_STOCAsmE_STOCAsmH_STOCAsmHE_STOCAsmL_STOCAsmLE_STOCAsmLH_STOCAsmM_STOCAsmNE_STOCAsmNH_STOCAsmNHE_STOCAsmNL_STOCAsmNLE_STOCAsmNLH_STOCAsmNM_STOCAsmNO_STOCAsmNP_STOCAsmNZ_STOCAsmO_STOCAsmP_STOCAsmZ_STOCFH_STOCFHAsm_STOCFHAsmE_STOCFHAsmH_STOCFHAsmHE_STOCFHAsmL_STOCFHAsmLE_STOCFHAsmLH_STOCFHAsmM_STOCFHAsmNE_STOCFHAsmNH_STOCFHAsmNHE_STOCFHAsmNL_STOCFHAsmNLE_STOCFHAsmNLH_STOCFHAsmNM_STOCFHAsmNO_STOCFHAsmNP_STOCFHAsmNZ_STOCFHAsmO_STOCFHAsmP_STOCFHAsmZ_STOCG_STOCGAsm_STOCGAsmE_STOCGAsmH_STOCGAsmHE_STOCGAsmL_STOCGAsmLE_STOCGAsmLH_STOCGAsmM_STOCGAsmNE_STOCGAsmNH_STOCGAsmNHE_STOCGAsmNL_STOCGAsmNLE_STOCGAsmNLH_STOCGAsmNM_STOCGAsmNO_STOCGAsmNP_STOCGAsmNZ_STOCGAsmO_STOCGAsmP_STOCGAsmZ = 54, |
3189 | | SELRMux = 55, |
3190 | | SELFHR_SELFHRAsm_SELFHRAsmE_SELFHRAsmH_SELFHRAsmHE_SELFHRAsmL_SELFHRAsmLE_SELFHRAsmLH_SELFHRAsmM_SELFHRAsmNE_SELFHRAsmNH_SELFHRAsmNHE_SELFHRAsmNL_SELFHRAsmNLE_SELFHRAsmNLH_SELFHRAsmNM_SELFHRAsmNO_SELFHRAsmNP_SELFHRAsmNZ_SELFHRAsmO_SELFHRAsmP_SELFHRAsmZ_SELGR_SELGRAsm_SELGRAsmE_SELGRAsmH_SELGRAsmHE_SELGRAsmL_SELGRAsmLE_SELGRAsmLH_SELGRAsmM_SELGRAsmNE_SELGRAsmNH_SELGRAsmNHE_SELGRAsmNL_SELGRAsmNLE_SELGRAsmNLH_SELGRAsmNM_SELGRAsmNO_SELGRAsmNP_SELGRAsmNZ_SELGRAsmO_SELGRAsmP_SELGRAsmZ_SELR_SELRAsm_SELRAsmE_SELRAsmH_SELRAsmHE_SELRAsmL_SELRAsmLE_SELRAsmLH_SELRAsmM_SELRAsmNE_SELRAsmNH_SELRAsmNHE_SELRAsmNL_SELRAsmNLE_SELRAsmNLH_SELRAsmNM_SELRAsmNO_SELRAsmNP_SELRAsmNZ_SELRAsmO_SELRAsmP_SELRAsmZ = 56, |
3191 | | LBR_LGR_LHR = 57, |
3192 | | LGBR_LGFR_LGHR = 58, |
3193 | | LTGF = 59, |
3194 | | LTGFR = 60, |
3195 | | LBMux_LB_LBH = 61, |
3196 | | LH_LHY = 62, |
3197 | | LHMux_LHH_LHRL = 63, |
3198 | | LGB_LGF_LGH = 64, |
3199 | | LGFRL_LGHRL = 65, |
3200 | | LLCRMux_LLCR = 66, |
3201 | | LLHRMux_LLHR = 67, |
3202 | | LLGCR_LLGFR_LLGHR_LLGTR = 68, |
3203 | | LLCMux_LLC = 69, |
3204 | | LLHMux_LLH = 70, |
3205 | | LLCH_LLHH = 71, |
3206 | | LLHRL = 72, |
3207 | | LLGC_LLGF_LLGFRL_LLGH_LLGHRL_LLGT = 73, |
3208 | | LLZRGF = 74, |
3209 | | LLGFAT_LLGTAT = 75, |
3210 | | STCMux_STC_STCH_STCY = 76, |
3211 | | STHMux_STH_STHH_STHRL_STHY = 77, |
3212 | | STCM_STCMH_STCMY = 78, |
3213 | | LM_LMG_LMH_LMY = 79, |
3214 | | LMD = 80, |
3215 | | STM_STMG_STMH_STMY = 81, |
3216 | | LRVGR_LRVR = 82, |
3217 | | LRV_LRVG_LRVH = 83, |
3218 | | STRV_STRVG_STRVH = 84, |
3219 | | MVCIN = 85, |
3220 | | LA_LARL_LAY = 86, |
3221 | | GOT = 87, |
3222 | | LPGR_LPR = 88, |
3223 | | LNGFR_LPGFR = 89, |
3224 | | LNGR_LNR = 90, |
3225 | | LCGR_LCR = 91, |
3226 | | LCGFR = 92, |
3227 | | IC_ICY = 93, |
3228 | | IC32_IC32Y = 94, |
3229 | | ICM_ICMH_ICMY = 95, |
3230 | | IIFMux_IIHMux_IILMux = 96, |
3231 | | IIHF64_IIHF = 97, |
3232 | | IIHH64_IIHH = 98, |
3233 | | IIHL64_IIHL = 99, |
3234 | | IILF64_IILF = 100, |
3235 | | IILH64_IILH = 101, |
3236 | | IILL64_IILL = 102, |
3237 | | A_AY = 103, |
3238 | | AH_AHY = 104, |
3239 | | AIH = 105, |
3240 | | AFIMux_AFI = 106, |
3241 | | AG = 107, |
3242 | | AGFI = 108, |
3243 | | AGHI_AGHIK = 109, |
3244 | | AGR_AGRK = 110, |
3245 | | AHI_AHIK = 111, |
3246 | | AHIMux_AHIMuxK = 112, |
3247 | | AL_ALY = 113, |
3248 | | ALFI_ALHSIK = 114, |
3249 | | ALG_ALGF = 115, |
3250 | | ALGHSIK = 116, |
3251 | | ALGFI_ALGFR = 117, |
3252 | | ALGR_ALGRK = 118, |
3253 | | ALR_ALRK = 119, |
3254 | | AR_ARK = 120, |
3255 | | AHHHR_ALHHHR = 121, |
3256 | | AHHLR_ALHHLR = 122, |
3257 | | ALSIH_ALSIHN = 123, |
3258 | | AGSI_ALGSI_ALSI_ASI = 124, |
3259 | | ALC_ALCG = 125, |
3260 | | ALCGR_ALCR = 126, |
3261 | | AGF_AGH = 127, |
3262 | | AGFR = 128, |
3263 | | S_SG_SY = 129, |
3264 | | SH_SHY = 130, |
3265 | | SGR_SGRK = 131, |
3266 | | SLFI = 132, |
3267 | | SL_SLG_SLGF_SLY = 133, |
3268 | | SLGFI_SLGFR = 134, |
3269 | | SLGR_SLGRK = 135, |
3270 | | SLR_SLRK = 136, |
3271 | | SR_SRK = 137, |
3272 | | SHHHR_SLHHHR = 138, |
3273 | | SHHLR_SLHHLR = 139, |
3274 | | SLB_SLBG = 140, |
3275 | | SLBGR_SLBR = 141, |
3276 | | SGF_SGH = 142, |
3277 | | SGFR = 143, |
3278 | | N_NG_NY = 144, |
3279 | | NGR_NGRK = 145, |
3280 | | NIFMux_NIHMux_NILMux = 146, |
3281 | | NI_NIY = 147, |
3282 | | NIHF64_NIHF = 148, |
3283 | | NIHH64_NIHH = 149, |
3284 | | NIHL64_NIHL = 150, |
3285 | | NILF64_NILF = 151, |
3286 | | NILH64_NILH = 152, |
3287 | | NILL64_NILL = 153, |
3288 | | NR_NRK = 154, |
3289 | | NC = 155, |
3290 | | O_OG_OY = 156, |
3291 | | OGR_OGRK = 157, |
3292 | | OI_OIY = 158, |
3293 | | OIFMux_OIHMux_OILMux = 159, |
3294 | | OIHF64_OIHF = 160, |
3295 | | OIHH64_OIHH = 161, |
3296 | | OIHL64_OIHL = 162, |
3297 | | OILF64_OILF = 163, |
3298 | | OILH64_OILH = 164, |
3299 | | OILL64_OILL = 165, |
3300 | | OR_ORK = 166, |
3301 | | OC = 167, |
3302 | | X_XG_XY = 168, |
3303 | | XI_XIY = 169, |
3304 | | XIFMux = 170, |
3305 | | XGR_XGRK = 171, |
3306 | | XIHF64_XIHF = 172, |
3307 | | XILF64_XILF = 173, |
3308 | | XR_XRK = 174, |
3309 | | XC = 175, |
3310 | | NCGRK_NCRK = 176, |
3311 | | OCGRK_OCRK = 177, |
3312 | | NNGRK_NNRK = 178, |
3313 | | NOGRK_NORK = 179, |
3314 | | NXGRK_NXRK = 180, |
3315 | | MS_MSGF_MSY = 181, |
3316 | | MSFI_MSR = 182, |
3317 | | MSG = 183, |
3318 | | MSGR = 184, |
3319 | | MSGFI_MSGFR = 185, |
3320 | | MLG = 186, |
3321 | | MLGR = 187, |
3322 | | MGHI = 188, |
3323 | | MHI = 189, |
3324 | | MH_MHY = 190, |
3325 | | MLR_MR = 191, |
3326 | | M_MFY_ML = 192, |
3327 | | MGH = 193, |
3328 | | MG = 194, |
3329 | | MGRK = 195, |
3330 | | MSC = 196, |
3331 | | MSGC = 197, |
3332 | | MSRKC = 198, |
3333 | | MSGRKC = 199, |
3334 | | DR = 200, |
3335 | | D = 201, |
3336 | | DSGFR_DSGR = 202, |
3337 | | DSG_DSGF = 203, |
3338 | | DLR = 204, |
3339 | | DLGR = 205, |
3340 | | DL_DLG = 206, |
3341 | | SLL_SLLG_SLLK = 207, |
3342 | | SRL_SRLG_SRLK = 208, |
3343 | | SRA_SRAG_SRAK = 209, |
3344 | | SLA_SLAG_SLAK = 210, |
3345 | | SLDA_SLDL_SRDA_SRDL = 211, |
3346 | | RLL_RLLG = 212, |
3347 | | RISBG_RISBG32_RISBGN = 213, |
3348 | | RISBHH_RISBHL_RISBHG = 214, |
3349 | | RISBLH_RISBLL_RISBLG = 215, |
3350 | | RISBMux = 216, |
3351 | | RNSBG_ROSBG_RXSBG = 217, |
3352 | | CMux_C_CG_CY = 218, |
3353 | | CRL = 219, |
3354 | | CFIMux_CHIMux_CFI_CHI = 220, |
3355 | | CGFI_CGHI = 221, |
3356 | | CGHSI_CGRL = 222, |
3357 | | CGR_CR = 223, |
3358 | | CIH = 224, |
3359 | | CHF = 225, |
3360 | | CHSI = 226, |
3361 | | CLMux_CL_CLY = 227, |
3362 | | CLFHSI = 228, |
3363 | | CLFIMux_CLFI = 229, |
3364 | | CLG = 230, |
3365 | | CLGHRL_CLGHSI = 231, |
3366 | | CLGF = 232, |
3367 | | CLGFRL = 233, |
3368 | | CLGFI_CLGFR = 234, |
3369 | | CLGR = 235, |
3370 | | CLGRL = 236, |
3371 | | CLHF = 237, |
3372 | | CLHHSI_CLHRL = 238, |
3373 | | CLIH = 239, |
3374 | | CLI_CLIY = 240, |
3375 | | CLR = 241, |
3376 | | CLRL = 242, |
3377 | | CHHR_CLHHR = 243, |
3378 | | CHLR_CLHLR = 244, |
3379 | | CH_CHY = 245, |
3380 | | CHRL = 246, |
3381 | | CGH = 247, |
3382 | | CGHRL = 248, |
3383 | | CHHSI = 249, |
3384 | | CGF = 250, |
3385 | | CGFRL = 251, |
3386 | | CGFR = 252, |
3387 | | CLC = 253, |
3388 | | CLCL_CLCLE_CLCLU = 254, |
3389 | | CLST = 255, |
3390 | | TM_TMY = 256, |
3391 | | TMHMux_TMLMux = 257, |
3392 | | TMHH64_TMHH = 258, |
3393 | | TMHL64_TMHL = 259, |
3394 | | TMLH64_TMLH = 260, |
3395 | | TMLL64_TMLL = 261, |
3396 | | CLM_CLMH_CLMY = 262, |
3397 | | PFD_PFDRL = 263, |
3398 | | BPP = 264, |
3399 | | BPRP = 265, |
3400 | | NIAI = 266, |
3401 | | Serialize = 267, |
3402 | | LAA_LAAG = 268, |
3403 | | LAAL_LAALG = 269, |
3404 | | LAN_LANG = 270, |
3405 | | LAO_LAOG = 271, |
3406 | | LAX_LAXG = 272, |
3407 | | TS = 273, |
3408 | | CS_CSG_CSY = 274, |
3409 | | CDS_CDSY = 275, |
3410 | | CDSG = 276, |
3411 | | CSST = 277, |
3412 | | PLO = 278, |
3413 | | LPQ = 279, |
3414 | | STPQ = 280, |
3415 | | LPD_LPDG = 281, |
3416 | | TR = 282, |
3417 | | TRT = 283, |
3418 | | TRTR = 284, |
3419 | | TRE = 285, |
3420 | | TRTE_TRTEOpt_TRTRE_TRTREOpt = 286, |
3421 | | TROO_TROOOpt_TROT_TROTOpt_TRTO_TRTOOpt_TRTT_TRTTOpt = 287, |
3422 | | CU12_CU12Opt_CU14_CU14Opt_CU21_CU21Opt_CU24_CU24Opt_CU41_CU42 = 288, |
3423 | | CUTFU_CUTFUOpt_CUUTF_CUUTFOpt = 289, |
3424 | | KM_KMA_KMC_KMCTR_KMF_KMO = 290, |
3425 | | KDSA_KIMD_KLMD_KMAC = 291, |
3426 | | PCC_PPNO_PRNO = 292, |
3427 | | LGG = 293, |
3428 | | LLGFSG = 294, |
3429 | | LGSC_STGSC = 295, |
3430 | | CVBG = 296, |
3431 | | CVB_CVBY = 297, |
3432 | | CVDG = 298, |
3433 | | CVD_CVDY = 299, |
3434 | | MVN_MVO_MVZ = 300, |
3435 | | PACK_PKA_PKU = 301, |
3436 | | UNPKA_UNPKU = 302, |
3437 | | UNPK = 303, |
3438 | | AP_SP_ZAP = 304, |
3439 | | MP = 305, |
3440 | | DP = 306, |
3441 | | SRP = 307, |
3442 | | CP = 308, |
3443 | | TP = 309, |
3444 | | ED_EDMK = 310, |
3445 | | CPYA_EAR_SAR = 311, |
3446 | | LAE_LAEY = 312, |
3447 | | LAM_LAMY = 313, |
3448 | | STAM_STAMY = 314, |
3449 | | IPM = 315, |
3450 | | SPM = 316, |
3451 | | BAL_BALR = 317, |
3452 | | TAM = 318, |
3453 | | SAM24_SAM31_SAM64 = 319, |
3454 | | BSM = 320, |
3455 | | BASSM = 321, |
3456 | | TBEGIN_TBEGINC = 322, |
3457 | | TEND = 323, |
3458 | | TABORT = 324, |
3459 | | ETND = 325, |
3460 | | NTSTG = 326, |
3461 | | PPA = 327, |
3462 | | FLOGR = 328, |
3463 | | POPCNT_POPCNTOpt = 329, |
3464 | | SRST_SRSTU = 330, |
3465 | | CUSE = 331, |
3466 | | CFC = 332, |
3467 | | UPT = 333, |
3468 | | CKSM = 334, |
3469 | | CMPSC = 335, |
3470 | | SORTL = 336, |
3471 | | DFLTCC = 337, |
3472 | | NNPA = 338, |
3473 | | EX_EXRL = 339, |
3474 | | InsnE_InsnRI_InsnRIE_InsnRIL_InsnRILU_InsnRIS_InsnRR_InsnRRE_InsnRRF_InsnRRS_InsnRS_InsnRSE_InsnRSI_InsnRSY_InsnRX_InsnRXE_InsnRXF_InsnRXY_InsnS_InsnSI_InsnSIL_InsnSIY_InsnSS_InsnSSE_InsnSSF_InsnVRI_InsnVRR_InsnVRS_InsnVRV_InsnVRX_InsnVSI = 340, |
3475 | | LZDR_LZER = 341, |
3476 | | LZXR = 342, |
3477 | | LER = 343, |
3478 | | LDGR_LDR_LDR32 = 344, |
3479 | | LGDR = 345, |
3480 | | LXR = 346, |
3481 | | LTDBR_LTEBR = 347, |
3482 | | LTXBR = 348, |
3483 | | CPSDRdd_CPSDRds_CPSDRsd_CPSDRss = 349, |
3484 | | LE_LEY = 350, |
3485 | | LD_LDE32_LDY = 351, |
3486 | | LX = 352, |
3487 | | STD_STDY_STE_STEY = 353, |
3488 | | STX = 354, |
3489 | | LEDBR_LEDBRA = 355, |
3490 | | LDXBR_LDXBRA_LEXBR_LEXBRA = 356, |
3491 | | LDEB = 357, |
3492 | | LDEBR = 358, |
3493 | | LXDB_LXEB = 359, |
3494 | | LXDBR_LXEBR = 360, |
3495 | | CDFBR_CDFBRA_CDGBR_CDGBRA_CEFBR_CEFBRA_CEGBR_CEGBRA = 361, |
3496 | | CXFBR_CXFBRA_CXGBR_CXGBRA = 362, |
3497 | | CDLFBR_CDLGBR_CELFBR_CELGBR = 363, |
3498 | | CXLFBR_CXLGBR = 364, |
3499 | | CFDBR_CFDBRA_CFEBR_CFEBRA_CGDBR_CGDBRA_CGEBR_CGEBRA = 365, |
3500 | | CFXBR_CFXBRA_CGXBR_CGXBRA = 366, |
3501 | | CLFEBR = 367, |
3502 | | CLFDBR = 368, |
3503 | | CLGDBR_CLGEBR = 369, |
3504 | | CLFXBR_CLGXBR = 370, |
3505 | | LCDBR_LCEBR_LNDBR_LNEBR_LPDBR_LPEBR = 371, |
3506 | | LCDFR_LCDFR_32_LNDFR_LNDFR_32_LPDFR_LPDFR_32 = 372, |
3507 | | LCXBR_LNXBR_LPXBR = 373, |
3508 | | SQDB_SQEB = 374, |
3509 | | SQEBR = 375, |
3510 | | SQDBR = 376, |
3511 | | SQXBR = 377, |
3512 | | FIDBR_FIDBRA_FIEBR_FIEBRA = 378, |
3513 | | FIXBR_FIXBRA = 379, |
3514 | | ADB_AEB = 380, |
3515 | | ADBR_AEBR = 381, |
3516 | | AXBR = 382, |
3517 | | SDB_SEB = 383, |
3518 | | SDBR_SEBR = 384, |
3519 | | SXBR = 385, |
3520 | | MDB_MDEB_MEEB = 386, |
3521 | | MDBR_MDEBR_MEEBR = 387, |
3522 | | MXDB = 388, |
3523 | | MXDBR = 389, |
3524 | | MXBR = 390, |
3525 | | MAEB_MSEB = 391, |
3526 | | MAEBR_MSEBR = 392, |
3527 | | MADB_MSDB = 393, |
3528 | | MADBR_MSDBR = 394, |
3529 | | DEB = 395, |
3530 | | DDB = 396, |
3531 | | DEBR = 397, |
3532 | | DDBR = 398, |
3533 | | DXBR = 399, |
3534 | | DIDBR_DIEBR = 400, |
3535 | | CDB_CEB_KDB_KEB = 401, |
3536 | | CDBR_CEBR_KDBR_KEBR = 402, |
3537 | | CXBR_KXBR = 403, |
3538 | | TCDB_TCEB = 404, |
3539 | | TCXB = 405, |
3540 | | EFPC = 406, |
3541 | | STFPC = 407, |
3542 | | SFPC = 408, |
3543 | | LFPC = 409, |
3544 | | SFASR = 410, |
3545 | | LFAS = 411, |
3546 | | SRNM_SRNMB_SRNMT = 412, |
3547 | | LTDR_LTER = 413, |
3548 | | LTXR = 414, |
3549 | | LEDR_LRER = 415, |
3550 | | LEXR = 416, |
3551 | | LDXR_LRDR = 417, |
3552 | | LDE = 418, |
3553 | | LDER = 419, |
3554 | | LXD_LXE = 420, |
3555 | | LXDR_LXER = 421, |
3556 | | CDFR_CDGR_CEFR_CEGR = 422, |
3557 | | CXFR_CXGR = 423, |
3558 | | CFDR_CFER_CGDR_CGER = 424, |
3559 | | CFXR_CGXR = 425, |
3560 | | THDER_THDR = 426, |
3561 | | TBDR_TBEDR = 427, |
3562 | | LCDR_LCER_LNDR_LNER_LPDR_LPER = 428, |
3563 | | LCXR_LNXR_LPXR = 429, |
3564 | | HDR_HER = 430, |
3565 | | SQD_SQE = 431, |
3566 | | SQER = 432, |
3567 | | SQDR = 433, |
3568 | | SQXR = 434, |
3569 | | FIDR_FIER = 435, |
3570 | | FIXR = 436, |
3571 | | AD_AE_AU_AW = 437, |
3572 | | ADR_AER_AUR_AWR = 438, |
3573 | | AXR = 439, |
3574 | | SD_SE_SU_SW = 440, |
3575 | | SDR_SER_SUR_SWR = 441, |
3576 | | SXR = 442, |
3577 | | MD_MDE_ME_MEE = 443, |
3578 | | MDER_MDR_MEER_MER = 444, |
3579 | | MXD = 445, |
3580 | | MXDR = 446, |
3581 | | MXR = 447, |
3582 | | MY = 448, |
3583 | | MYH_MYL = 449, |
3584 | | MYR = 450, |
3585 | | MYHR_MYLR = 451, |
3586 | | MAD_MAE_MSD_MSE = 452, |
3587 | | MADR_MAER_MSDR_MSER = 453, |
3588 | | MAY = 454, |
3589 | | MAYH_MAYL = 455, |
3590 | | MAYR = 456, |
3591 | | MAYHR_MAYLR = 457, |
3592 | | DE = 458, |
3593 | | DD = 459, |
3594 | | DER = 460, |
3595 | | DDR = 461, |
3596 | | DXR = 462, |
3597 | | CD_CE = 463, |
3598 | | CDR_CER = 464, |
3599 | | CXR = 465, |
3600 | | LTDTR = 466, |
3601 | | LTXTR = 467, |
3602 | | LEDTR = 468, |
3603 | | LDXTR = 469, |
3604 | | LDETR = 470, |
3605 | | LXDTR = 471, |
3606 | | CDFTR = 472, |
3607 | | CDGTR_CDGTRA = 473, |
3608 | | CXFTR = 474, |
3609 | | CXGTR_CXGTRA = 475, |
3610 | | CDLFTR = 476, |
3611 | | CDLGTR = 477, |
3612 | | CXLFTR = 478, |
3613 | | CXLGTR = 479, |
3614 | | CFDTR_CGDTR_CGDTRA = 480, |
3615 | | CFXTR_CGXTR_CGXTRA = 481, |
3616 | | CLFDTR_CLGDTR = 482, |
3617 | | CLFXTR_CLGXTR = 483, |
3618 | | CDSTR_CDUTR = 484, |
3619 | | CXSTR_CXUTR = 485, |
3620 | | CSDTR_CUDTR = 486, |
3621 | | CSXTR_CUXTR = 487, |
3622 | | CDZT = 488, |
3623 | | CXZT = 489, |
3624 | | CZDT = 490, |
3625 | | CZXT = 491, |
3626 | | CDPT = 492, |
3627 | | CXPT = 493, |
3628 | | CPDT = 494, |
3629 | | CPXT = 495, |
3630 | | PFPO = 496, |
3631 | | FIDTR = 497, |
3632 | | FIXTR = 498, |
3633 | | EEDTR = 499, |
3634 | | EEXTR = 500, |
3635 | | ESDTR = 501, |
3636 | | ESXTR = 502, |
3637 | | ADTR_ADTRA = 503, |
3638 | | AXTR_AXTRA = 504, |
3639 | | SDTR_SDTRA = 505, |
3640 | | SXTR_SXTRA = 506, |
3641 | | MDTR_MDTRA = 507, |
3642 | | MXTR_MXTRA = 508, |
3643 | | DDTR_DDTRA = 509, |
3644 | | DXTR_DXTRA = 510, |
3645 | | QADTR = 511, |
3646 | | QAXTR = 512, |
3647 | | RRDTR = 513, |
3648 | | RRXTR = 514, |
3649 | | SLDT_SRDT = 515, |
3650 | | SLXT_SRXT = 516, |
3651 | | IEDTR = 517, |
3652 | | IEXTR = 518, |
3653 | | CDTR_KDTR = 519, |
3654 | | CXTR_KXTR = 520, |
3655 | | CEDTR = 521, |
3656 | | CEXTR = 522, |
3657 | | TDCDT_TDCET_TDGDT_TDGET = 523, |
3658 | | TDCXT_TDGXT = 524, |
3659 | | VLR32_VLR64_VLR = 525, |
3660 | | VLGV_VLGVB_VLGVF_VLGVG_VLGVH = 526, |
3661 | | VLVG_VLVGB_VLVGF_VLVGG_VLVGH = 527, |
3662 | | VLVGP32_VLVGP = 528, |
3663 | | VZERO = 529, |
3664 | | VONE = 530, |
3665 | | VGBM = 531, |
3666 | | VGM_VGMB_VGMF_VGMG_VGMH = 532, |
3667 | | VREPI_VREPIB_VREPIF_VREPIG_VREPIH = 533, |
3668 | | VLEIB_VLEIF_VLEIG_VLEIH = 534, |
3669 | | VL_VLAlign = 535, |
3670 | | VLBB_VLL = 536, |
3671 | | VL32_VL64 = 537, |
3672 | | VLLEZ_VLLEZB_VLLEZF_VLLEZG_VLLEZH_VLLEZLF = 538, |
3673 | | VLREP_VLREPB_VLREPF_VLREPG_VLREPH = 539, |
3674 | | VLEB_VLEF_VLEG_VLEH = 540, |
3675 | | VGEF_VGEG = 541, |
3676 | | VLM_VLMAlign = 542, |
3677 | | VLRL_VLRLR = 543, |
3678 | | VST32_VST64_VST_VSTAlign_VSTL = 544, |
3679 | | VSTEF_VSTEG = 545, |
3680 | | VSTEB_VSTEH = 546, |
3681 | | VSTM_VSTMAlign = 547, |
3682 | | VSCEF_VSCEG = 548, |
3683 | | VSTRL_VSTRLR = 549, |
3684 | | VLBR_VLBRF_VLBRG_VLBRH_VLBRQ = 550, |
3685 | | VLER_VLERF_VLERG_VLERH = 551, |
3686 | | VLEBRF_VLEBRG_VLEBRH = 552, |
3687 | | VLLEBRZ_VLLEBRZE_VLLEBRZF_VLLEBRZG_VLLEBRZH = 553, |
3688 | | VLBRREP_VLBRREPF_VLBRREPG_VLBRREPH = 554, |
3689 | | VSTBR_VSTBRF_VSTBRG_VSTBRH_VSTBRQ = 555, |
3690 | | VSTER_VSTERF_VSTERG_VSTERH = 556, |
3691 | | VSTEBRH = 557, |
3692 | | VSTEBRF_VSTEBRG = 558, |
3693 | | VMRH_VMRHB_VMRHF_VMRHG_VMRHH = 559, |
3694 | | VMRL_VMRLB_VMRLF_VMRLG_VMRLH = 560, |
3695 | | VPERM = 561, |
3696 | | VPDI = 562, |
3697 | | VBPERM = 563, |
3698 | | VREP_VREPB_VREPF_VREPG_VREPH = 564, |
3699 | | VSEL = 565, |
3700 | | VPK_VPKF_VPKG_VPKH = 566, |
3701 | | VPKS_VPKSF_VPKSG_VPKSH = 567, |
3702 | | VPKSFS_VPKSGS_VPKSHS = 568, |
3703 | | VPKLS_VPKLSF_VPKLSG_VPKLSH = 569, |
3704 | | VPKLSFS_VPKLSGS_VPKLSHS = 570, |
3705 | | VSEG_VSEGB_VSEGF_VSEGH = 571, |
3706 | | VUPH_VUPHB_VUPHF_VUPHH = 572, |
3707 | | VUPL_VUPLB_VUPLF = 573, |
3708 | | VUPLH_VUPLHB_VUPLHF_VUPLHH_VUPLHW = 574, |
3709 | | VUPLL_VUPLLB_VUPLLF_VUPLLH = 575, |
3710 | | VA_VAB_VAC_VACQ_VAF_VAG_VAH_VAQ = 576, |
3711 | | VACC_VACCB_VACCC_VACCCQ_VACCF_VACCG_VACCH_VACCQ = 577, |
3712 | | VAVG_VAVGB_VAVGF_VAVGG_VAVGH = 578, |
3713 | | VAVGL_VAVGLB_VAVGLF_VAVGLG_VAVGLH = 579, |
3714 | | VN_VNC_VNN_VNO_VNX = 580, |
3715 | | VO_VOC = 581, |
3716 | | VCKSM = 582, |
3717 | | VCLZ_VCLZB_VCLZF_VCLZG_VCLZH = 583, |
3718 | | VCTZ_VCTZB_VCTZF_VCTZG_VCTZH = 584, |
3719 | | VX = 585, |
3720 | | VGFM = 586, |
3721 | | VGFMA_VGFMAB_VGFMAF_VGFMAG_VGFMAH = 587, |
3722 | | VGFMB_VGFMF_VGFMG_VGFMH = 588, |
3723 | | VLC_VLCB_VLCF_VLCG_VLCH = 589, |
3724 | | VLP_VLPB_VLPF_VLPG_VLPH = 590, |
3725 | | VMX_VMXB_VMXF_VMXG_VMXH = 591, |
3726 | | VMXL_VMXLB_VMXLF_VMXLG_VMXLH = 592, |
3727 | | VMN_VMNB_VMNF_VMNG_VMNH = 593, |
3728 | | VMNL_VMNLB_VMNLF_VMNLG_VMNLH = 594, |
3729 | | VMAL_VMALB_VMALF = 595, |
3730 | | VMALE_VMALEB_VMALEF_VMALEH = 596, |
3731 | | VMALH_VMALHB_VMALHF_VMALHH_VMALHW = 597, |
3732 | | VMALO_VMALOB_VMALOF_VMALOH = 598, |
3733 | | VMAO_VMAOB_VMAOF_VMAOH = 599, |
3734 | | VMAE_VMAEB_VMAEF_VMAEH = 600, |
3735 | | VMAH_VMAHB_VMAHF_VMAHH = 601, |
3736 | | VME_VMEB_VMEF_VMEH = 602, |
3737 | | VMH_VMHB_VMHF_VMHH = 603, |
3738 | | VML_VMLB_VMLF = 604, |
3739 | | VMLE_VMLEB_VMLEF_VMLEH = 605, |
3740 | | VMLH_VMLHB_VMLHF_VMLHH_VMLHW = 606, |
3741 | | VMLO_VMLOB_VMLOF_VMLOH = 607, |
3742 | | VMO_VMOB_VMOF_VMOH = 608, |
3743 | | VMSL_VMSLG = 609, |
3744 | | VPOPCT_VPOPCTB_VPOPCTF_VPOPCTG_VPOPCTH = 610, |
3745 | | VERLL_VERLLB_VERLLF_VERLLG_VERLLH = 611, |
3746 | | VERLLV_VERLLVB_VERLLVF_VERLLVG_VERLLVH = 612, |
3747 | | VERIM_VERIMB_VERIMF_VERIMG_VERIMH = 613, |
3748 | | VESL_VESLB_VESLF_VESLG_VESLH = 614, |
3749 | | VESLV_VESLVB_VESLVF_VESLVG_VESLVH = 615, |
3750 | | VESRA_VESRAB_VESRAF_VESRAG_VESRAH = 616, |
3751 | | VESRAV_VESRAVB_VESRAVF_VESRAVG_VESRAVH = 617, |
3752 | | VESRL_VESRLB_VESRLF_VESRLG_VESRLH = 618, |
3753 | | VESRLV_VESRLVB_VESRLVF_VESRLVG_VESRLVH = 619, |
3754 | | VSL_VSLDB = 620, |
3755 | | VSLB = 621, |
3756 | | VSRA_VSRL = 622, |
3757 | | VSRAB_VSRLB = 623, |
3758 | | VSLD = 624, |
3759 | | VSRD = 625, |
3760 | | VSB_VSBCBI_VSBCBIQ_VSBI_VSBIQ = 626, |
3761 | | VSCBI_VSCBIB_VSCBIF_VSCBIG_VSCBIH_VSCBIQ = 627, |
3762 | | VS_VSF_VSG_VSH_VSQ = 628, |
3763 | | VSUM_VSUMB_VSUMH = 629, |
3764 | | VSUMG_VSUMGF_VSUMGH = 630, |
3765 | | VSUMQ_VSUMQF_VSUMQG = 631, |
3766 | | VEC_VECB_VECF_VECG_VECH = 632, |
3767 | | VECL_VECLB_VECLF_VECLG_VECLH = 633, |
3768 | | VCEQ_VCEQB_VCEQF_VCEQG_VCEQH = 634, |
3769 | | VCEQBS_VCEQFS_VCEQGS_VCEQHS = 635, |
3770 | | VCH_VCHB_VCHF_VCHG_VCHH = 636, |
3771 | | VCHBS_VCHFS_VCHGS_VCHHS = 637, |
3772 | | VCHL_VCHLB_VCHLF_VCHLG_VCHLH = 638, |
3773 | | VCHLBS_VCHLFS_VCHLGS_VCHLHS = 639, |
3774 | | VTM = 640, |
3775 | | VCFPL_VCFPS = 641, |
3776 | | VCDG_VCDLG = 642, |
3777 | | VCDGB_VCDLGB = 643, |
3778 | | WCDGB_WCDLGB = 644, |
3779 | | VCEFB_VCELFB = 645, |
3780 | | WCEFB_WCELFB = 646, |
3781 | | VCLFP_VCSFP = 647, |
3782 | | VCGD_VCLGD = 648, |
3783 | | VCGDB_VCLGDB = 649, |
3784 | | WCGDB_WCLGDB = 650, |
3785 | | VCFEB_VCLFEB = 651, |
3786 | | WCFEB_WCLFEB = 652, |
3787 | | VLDE_VLED = 653, |
3788 | | VLDEB_VLEDB = 654, |
3789 | | WLDEB_WLEDB = 655, |
3790 | | VFLL_VFLR = 656, |
3791 | | VFLLS_VFLRD = 657, |
3792 | | WFLLS_WFLRD = 658, |
3793 | | WFLLD = 659, |
3794 | | WFLRX = 660, |
3795 | | VFI_VFIDB = 661, |
3796 | | WFIDB = 662, |
3797 | | VFISB = 663, |
3798 | | WFISB = 664, |
3799 | | WFIXB = 665, |
3800 | | VFPSO = 666, |
3801 | | VFPSODB_WFPSODB = 667, |
3802 | | VFPSOSB_WFPSOSB = 668, |
3803 | | WFPSOXB = 669, |
3804 | | VFLCDB_VFLNDB_VFLPDB_WFLCDB_WFLNDB_WFLPDB = 670, |
3805 | | VFLCSB_VFLNSB_VFLPSB_WFLCSB_WFLNSB_WFLPSB = 671, |
3806 | | WFLCXB_WFLNXB_WFLPXB = 672, |
3807 | | VFMAX_VFMIN = 673, |
3808 | | VFMAXDB_VFMINDB = 674, |
3809 | | WFMAXDB_WFMINDB = 675, |
3810 | | VFMAXSB_VFMINSB = 676, |
3811 | | WFMAXSB_WFMINSB = 677, |
3812 | | WFMAXXB_WFMINXB = 678, |
3813 | | VFTCI = 679, |
3814 | | VFTCIDB_WFTCIDB = 680, |
3815 | | VFTCISB_WFTCISB = 681, |
3816 | | WFTCIXB = 682, |
3817 | | VFA_VFS = 683, |
3818 | | VFADB_VFSDB = 684, |
3819 | | WFADB_WFSDB = 685, |
3820 | | VFASB_VFSSB = 686, |
3821 | | WFASB_WFSSB = 687, |
3822 | | WFAXB_WFSXB = 688, |
3823 | | VFM_VFMDB = 689, |
3824 | | WFMDB_WFMSB = 690, |
3825 | | VFMSB = 691, |
3826 | | WFMXB = 692, |
3827 | | VFMA_VFMS_VFNMA_VFNMS = 693, |
3828 | | VFMADB_VFMSDB_VFNMADB_VFNMSDB = 694, |
3829 | | WFMADB_WFMSDB_WFNMADB_WFNMSDB = 695, |
3830 | | VFMASB_VFMSSB_VFNMASB_VFNMSSB = 696, |
3831 | | WFMASB_WFMSSB_WFNMASB_WFNMSSB = 697, |
3832 | | WFMAXB_WFMSXB_WFNMAXB_WFNMSXB = 698, |
3833 | | VFD = 699, |
3834 | | VFDDB_WFDDB = 700, |
3835 | | WFDSB = 701, |
3836 | | VFDSB = 702, |
3837 | | WFDXB = 703, |
3838 | | VFSQ = 704, |
3839 | | VFSQDB_WFSQDB = 705, |
3840 | | WFSQSB = 706, |
3841 | | VFSQSB = 707, |
3842 | | WFSQXB = 708, |
3843 | | VFCE_VFCH_VFCHE = 709, |
3844 | | VFCEDB_VFCHDB_VFCHEDB_VFKEDB_VFKHDB_VFKHEDB = 710, |
3845 | | WFCEDB_WFCHDB_WFCHEDB = 711, |
3846 | | WFKEDB_WFKHDB_WFKHEDB = 712, |
3847 | | VFCESB_VFCHESB_VFCHSB_VFKESB_VFKHESB_VFKHSB = 713, |
3848 | | WFCESB_WFCHESB_WFCHSB = 714, |
3849 | | WFKESB_WFKHESB_WFKHSB = 715, |
3850 | | WFCEXB_WFCHEXB_WFCHXB = 716, |
3851 | | WFKEXB_WFKHEXB_WFKHXB = 717, |
3852 | | VFCEDBS_VFCHDBS_VFCHEDBS = 718, |
3853 | | VFKEDBS_VFKHDBS_VFKHEDBS = 719, |
3854 | | WFCEDBS_WFCHDBS_WFCHEDBS_WFKEDBS_WFKHDBS_WFKHEDBS = 720, |
3855 | | VFCESBS_VFCHESBS_VFCHSBS_VFKESBS_VFKHESBS_VFKHSBS = 721, |
3856 | | WFCESBS_WFCHESBS_WFCHSBS = 722, |
3857 | | WFKESBS_WFKHESBS_WFKHSBS = 723, |
3858 | | WFCEXBS_WFCHEXBS_WFCHXBS = 724, |
3859 | | WFKEXBS_WFKHEXBS_WFKHXBS = 725, |
3860 | | WFC_WFK = 726, |
3861 | | WFCDB_WFKDB = 727, |
3862 | | WFCSB_WFKSB = 728, |
3863 | | WFCXB_WFKXB = 729, |
3864 | | LEFR = 730, |
3865 | | LFER = 731, |
3866 | | VFAE_VFAEB = 732, |
3867 | | VFAEF_VFAEH = 733, |
3868 | | VFAEBS_VFAEFS_VFAEHS = 734, |
3869 | | VFAEZB_VFAEZF_VFAEZH = 735, |
3870 | | VFAEZBS_VFAEZFS_VFAEZHS = 736, |
3871 | | VFEE_VFEEB_VFEEF_VFEEH_VFEEZB_VFEEZF_VFEEZH = 737, |
3872 | | VFEEBS_VFEEFS_VFEEHS_VFEEZBS_VFEEZFS_VFEEZHS = 738, |
3873 | | VFENE_VFENEB_VFENEF_VFENEH_VFENEZB_VFENEZF_VFENEZH = 739, |
3874 | | VFENEBS_VFENEFS_VFENEHS_VFENEZBS_VFENEZFS_VFENEZHS = 740, |
3875 | | VISTR_VISTRB_VISTRF_VISTRH = 741, |
3876 | | VISTRBS_VISTRFS_VISTRHS = 742, |
3877 | | VSTRC_VSTRCB_VSTRCF_VSTRCH = 743, |
3878 | | VSTRCBS_VSTRCFS_VSTRCHS = 744, |
3879 | | VSTRCZB_VSTRCZF_VSTRCZH = 745, |
3880 | | VSTRCZBS_VSTRCZFS_VSTRCZHS = 746, |
3881 | | VSTRS_VSTRSB_VSTRSF_VSTRSH = 747, |
3882 | | VSTRSZB_VSTRSZF_VSTRSZH = 748, |
3883 | | VCFN = 749, |
3884 | | VCLFNH_VCLFNL = 750, |
3885 | | VCNF_VCRNF = 751, |
3886 | | VLIP = 752, |
3887 | | VPKZ = 753, |
3888 | | VUPKZ = 754, |
3889 | | VCVB_VCVBG_VCVBGOpt_VCVBOpt = 755, |
3890 | | VCVD_VCVDG = 756, |
3891 | | VAP_VSP = 757, |
3892 | | VMP_VMSP = 758, |
3893 | | VDP_VRP = 759, |
3894 | | VSDP = 760, |
3895 | | VSRP = 761, |
3896 | | VPSOP = 762, |
3897 | | VCP_VTP = 763, |
3898 | | VSCHDP_VSCHP_VSCHSP_VSCHXP = 764, |
3899 | | VSCSHP = 765, |
3900 | | VCSPH = 766, |
3901 | | VCLZDP = 767, |
3902 | | VSRPR = 768, |
3903 | | VPKZR = 769, |
3904 | | VUPKZH = 770, |
3905 | | VUPKZL = 771, |
3906 | | EPSW = 772, |
3907 | | LPSW_LPSWE_LPSWEY = 773, |
3908 | | IPK = 774, |
3909 | | SPKA = 775, |
3910 | | SSM = 776, |
3911 | | STNSM_STOSM = 777, |
3912 | | IAC = 778, |
3913 | | SAC_SACF = 779, |
3914 | | LCTL_LCTLG = 780, |
3915 | | STCTG_STCTL = 781, |
3916 | | EPAIR_EPAR_ESAIR_ESAR = 782, |
3917 | | SSAIR_SSAR = 783, |
3918 | | ESEA = 784, |
3919 | | SPX_STPX = 785, |
3920 | | LBEAR = 786, |
3921 | | STBEAR = 787, |
3922 | | ISKE = 788, |
3923 | | IVSK = 789, |
3924 | | SSKE_SSKEOpt = 790, |
3925 | | RRBE_RRBM = 791, |
3926 | | IRBM = 792, |
3927 | | PFMF = 793, |
3928 | | TB = 794, |
3929 | | PGIN = 795, |
3930 | | PGOUT = 796, |
3931 | | IPTE_IPTEOpt_IPTEOptOpt = 797, |
3932 | | IDTE_IDTEOpt = 798, |
3933 | | RDP_RDPOpt = 799, |
3934 | | CRDTE_CRDTEOpt = 800, |
3935 | | PTLB = 801, |
3936 | | CSP_CSPG = 802, |
3937 | | LPTEA = 803, |
3938 | | LRA_LRAG_LRAY = 804, |
3939 | | STRAG = 805, |
3940 | | LURA_LURAG = 806, |
3941 | | STURA_STURG = 807, |
3942 | | TPROT = 808, |
3943 | | MVCK_MVCP_MVCS = 809, |
3944 | | MVCDK_MVCSK = 810, |
3945 | | MVCOS = 811, |
3946 | | MVPG = 812, |
3947 | | LASP = 813, |
3948 | | PALB = 814, |
3949 | | PC = 815, |
3950 | | PR = 816, |
3951 | | PT_PTI = 817, |
3952 | | RP = 818, |
3953 | | BSA_BSG = 819, |
3954 | | TAR = 820, |
3955 | | BAKR = 821, |
3956 | | EREG_EREGG = 822, |
3957 | | ESTA_MSTA = 823, |
3958 | | PTFF = 824, |
3959 | | SCK_SCKC_SCKPF = 825, |
3960 | | SPT = 826, |
3961 | | STCK_STCKF = 827, |
3962 | | STCKE = 828, |
3963 | | STCKC = 829, |
3964 | | STPT = 830, |
3965 | | STAP = 831, |
3966 | | STIDP = 832, |
3967 | | STSI = 833, |
3968 | | STFL_STFLE = 834, |
3969 | | ECAG = 835, |
3970 | | ECTG = 836, |
3971 | | PTF = 837, |
3972 | | PCKMO = 838, |
3973 | | QPACI = 839, |
3974 | | SVC = 840, |
3975 | | MC = 841, |
3976 | | DIAG = 842, |
3977 | | TRACE_TRACG = 843, |
3978 | | TRAP2_TRAP4 = 844, |
3979 | | SIGA_SIGP = 845, |
3980 | | SIE = 846, |
3981 | | LPP = 847, |
3982 | | ECPGA = 848, |
3983 | | ECCTR_EPCTR = 849, |
3984 | | LCCTL = 850, |
3985 | | LPCTL_LSCTL = 851, |
3986 | | QCTRI_QSI = 852, |
3987 | | SCCTR_SPCTR = 853, |
3988 | | CSCH_HSCH_RSCH_XSCH = 854, |
3989 | | MSCH_SSCH_STSCH_TSCH = 855, |
3990 | | RCHP = 856, |
3991 | | SCHM = 857, |
3992 | | STCPS_STCRW = 858, |
3993 | | TPI = 859, |
3994 | | SAL = 860, |
3995 | | LPSW_LPSWE = 861, |
3996 | | KIMD_KLMD_KMAC = 862, |
3997 | | POPCNT = 863, |
3998 | | VFI = 864, |
3999 | | VFM = 865, |
4000 | | VCVB_VCVBG = 866, |
4001 | | AGF = 867, |
4002 | | SGF = 868, |
4003 | | KM_KMC_KMCTR_KMF_KMO = 869, |
4004 | | PCC_PPNO = 870, |
4005 | | VLLEZ_VLLEZB_VLLEZF_VLLEZG_VLLEZH = 871, |
4006 | | VN_VNC_VNO = 872, |
4007 | | VO = 873, |
4008 | | VPOPCT = 874, |
4009 | | WFMDB = 875, |
4010 | | VFMA_VFMS = 876, |
4011 | | VFMADB_VFMSDB = 877, |
4012 | | WFMADB_WFMSDB = 878, |
4013 | | VFCEDB_VFCHDB_VFCHEDB = 879, |
4014 | | WFCEDBS_WFCHDBS_WFCHEDBS = 880, |
4015 | | LOCGR_LOCGRAsm_LOCGRAsmE_LOCGRAsmH_LOCGRAsmHE_LOCGRAsmL_LOCGRAsmLE_LOCGRAsmLH_LOCGRAsmM_LOCGRAsmNE_LOCGRAsmNH_LOCGRAsmNHE_LOCGRAsmNL_LOCGRAsmNLE_LOCGRAsmNLH_LOCGRAsmNM_LOCGRAsmNO_LOCGRAsmNP_LOCGRAsmNZ_LOCGRAsmO_LOCGRAsmP_LOCGRAsmZ_LOCR_LOCRAsm_LOCRAsmE_LOCRAsmH_LOCRAsmHE_LOCRAsmL_LOCRAsmLE_LOCRAsmLH_LOCRAsmM_LOCRAsmNE_LOCRAsmNH_LOCRAsmNHE_LOCRAsmNL_LOCRAsmNLE_LOCRAsmNLH_LOCRAsmNM_LOCRAsmNO_LOCRAsmNP_LOCRAsmNZ_LOCRAsmO_LOCRAsmP_LOCRAsmZ = 881, |
4016 | | LOC_LOCAsm_LOCAsmE_LOCAsmH_LOCAsmHE_LOCAsmL_LOCAsmLE_LOCAsmLH_LOCAsmM_LOCAsmNE_LOCAsmNH_LOCAsmNHE_LOCAsmNL_LOCAsmNLE_LOCAsmNLH_LOCAsmNM_LOCAsmNO_LOCAsmNP_LOCAsmNZ_LOCAsmO_LOCAsmP_LOCAsmZ_LOCG_LOCGAsm_LOCGAsmE_LOCGAsmH_LOCGAsmHE_LOCGAsmL_LOCGAsmLE_LOCGAsmLH_LOCGAsmM_LOCGAsmNE_LOCGAsmNH_LOCGAsmNHE_LOCGAsmNL_LOCGAsmNLE_LOCGAsmNLH_LOCGAsmNM_LOCGAsmNO_LOCGAsmNP_LOCGAsmNZ_LOCGAsmO_LOCGAsmP_LOCGAsmZ = 882, |
4017 | | STOC_STOCAsm_STOCAsmE_STOCAsmH_STOCAsmHE_STOCAsmL_STOCAsmLE_STOCAsmLH_STOCAsmM_STOCAsmNE_STOCAsmNH_STOCAsmNHE_STOCAsmNL_STOCAsmNLE_STOCAsmNLH_STOCAsmNM_STOCAsmNO_STOCAsmNP_STOCAsmNZ_STOCAsmO_STOCAsmP_STOCAsmZ_STOCG_STOCGAsm_STOCGAsmE_STOCGAsmH_STOCGAsmHE_STOCGAsmL_STOCGAsmLE_STOCGAsmLH_STOCGAsmM_STOCGAsmNE_STOCGAsmNH_STOCGAsmNHE_STOCGAsmNL_STOCGAsmNLE_STOCGAsmNLH_STOCGAsmNM_STOCGAsmNO_STOCGAsmNP_STOCGAsmNZ_STOCGAsmO_STOCGAsmP_STOCGAsmZ = 883, |
4018 | | ALSI_ASI = 884, |
4019 | | ALGF = 885, |
4020 | | PCC = 886, |
4021 | | CELFBR_CELGBR = 887, |
4022 | | MD_MEE = 888, |
4023 | | MDR_MEER = 889, |
4024 | | CFDTR = 890, |
4025 | | CFXTR = 891, |
4026 | | TDCDT_TDGDT = 892, |
4027 | | SCK = 893, |
4028 | | SCKPF = 894, |
4029 | | RISBG_RISBG32 = 895, |
4030 | | SCHED_LIST_END = 896 |
4031 | | }; |
4032 | | } // end namespace Sched |
4033 | | } // end namespace SystemZ |
4034 | | } // end namespace llvm |
4035 | | #endif // GET_INSTRINFO_SCHED_ENUM |
4036 | | |
4037 | | #if defined(GET_INSTRINFO_MC_DESC) || defined(GET_INSTRINFO_CTOR_DTOR) |
4038 | | namespace llvm { |
4039 | | |
4040 | | struct SystemZInstrTable { |
4041 | | MCInstrDesc Insts[3105]; |
4042 | | static_assert(alignof(MCInstrDesc) >= alignof(MCOperandInfo), "Unwanted padding between Insts and OperandInfo"); |
4043 | | MCOperandInfo OperandInfo[1650]; |
4044 | | static_assert(alignof(MCOperandInfo) >= alignof(MCPhysReg), "Unwanted padding between OperandInfo and ImplicitOps"); |
4045 | | MCPhysReg ImplicitOps[102]; |
4046 | | }; |
4047 | | |
4048 | | } // end namespace llvm |
4049 | | #endif // defined(GET_INSTRINFO_MC_DESC) || defined(GET_INSTRINFO_CTOR_DTOR) |
4050 | | |
4051 | | #ifdef GET_INSTRINFO_MC_DESC |
4052 | | #undef GET_INSTRINFO_MC_DESC |
4053 | | namespace llvm { |
4054 | | |
4055 | | static_assert(sizeof(MCOperandInfo) % sizeof(MCPhysReg) == 0); |
4056 | | static constexpr unsigned SystemZImpOpBase = sizeof SystemZInstrTable::OperandInfo / (sizeof(MCPhysReg)); |
4057 | | |
4058 | | extern const SystemZInstrTable SystemZDescs = { |
4059 | | { |
4060 | | { 3104, 6, 0, 6, 304, 0, 1, SystemZImpOpBase + 0, 532, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #3104 = ZAP |
4061 | | { 3103, 5, 1, 6, 168, 0, 1, SystemZImpOpBase + 0, 475, 0|(1ULL<<MCID::MayLoad), 0x2308cULL }, // Inst #3103 = XY |
4062 | | { 3102, 0, 0, 4, 854, 1, 1, SystemZImpOpBase + 41, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3102 = XSCH |
4063 | | { 3101, 3, 1, 4, 174, 0, 1, SystemZImpOpBase + 0, 529, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #3101 = XRK |
4064 | | { 3100, 3, 1, 2, 174, 0, 1, SystemZImpOpBase + 0, 526, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #3100 = XR |
4065 | | { 3099, 3, 0, 6, 169, 0, 1, SystemZImpOpBase + 0, 455, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #3099 = XIY |
4066 | | { 3098, 3, 1, 6, 173, 0, 1, SystemZImpOpBase + 0, 503, 0, 0x23000ULL }, // Inst #3098 = XILF |
4067 | | { 3097, 3, 1, 6, 172, 0, 1, SystemZImpOpBase + 0, 523, 0, 0x23000ULL }, // Inst #3097 = XIHF |
4068 | | { 3096, 3, 0, 4, 169, 0, 1, SystemZImpOpBase + 0, 455, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #3096 = XI |
4069 | | { 3095, 3, 1, 4, 171, 0, 1, SystemZImpOpBase + 0, 370, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #3095 = XGRK |
4070 | | { 3094, 3, 1, 4, 171, 0, 1, SystemZImpOpBase + 0, 514, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #3094 = XGR |
4071 | | { 3093, 5, 1, 6, 168, 0, 1, SystemZImpOpBase + 0, 506, 0|(1ULL<<MCID::MayLoad), 0x2310cULL }, // Inst #3093 = XG |
4072 | | { 3092, 5, 0, 6, 175, 0, 1, SystemZImpOpBase + 0, 777, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #3092 = XC |
4073 | | { 3091, 5, 1, 4, 168, 0, 1, SystemZImpOpBase + 0, 475, 0|(1ULL<<MCID::MayLoad), 0x23088ULL }, // Inst #3091 = X |
4074 | | { 3090, 4, 1, 6, 655, 1, 0, SystemZImpOpBase + 12, 1620, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3090 = WLEDB |
4075 | | { 3089, 2, 1, 6, 655, 1, 0, SystemZImpOpBase + 12, 1618, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3089 = WLDEB |
4076 | | { 3088, 3, 1, 6, 682, 0, 1, SystemZImpOpBase + 0, 1460, 0, 0x0ULL }, // Inst #3088 = WFTCIXB |
4077 | | { 3087, 3, 1, 6, 681, 0, 1, SystemZImpOpBase + 0, 1647, 0, 0x0ULL }, // Inst #3087 = WFTCISB |
4078 | | { 3086, 3, 1, 6, 680, 0, 1, SystemZImpOpBase + 0, 1644, 0, 0x0ULL }, // Inst #3086 = WFTCIDB |
4079 | | { 3085, 3, 1, 6, 688, 1, 0, SystemZImpOpBase + 12, 1439, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3085 = WFSXB |
4080 | | { 3084, 3, 1, 6, 687, 1, 0, SystemZImpOpBase + 12, 1613, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3084 = WFSSB |
4081 | | { 3083, 2, 1, 6, 708, 1, 0, SystemZImpOpBase + 12, 403, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3083 = WFSQXB |
4082 | | { 3082, 2, 1, 6, 706, 1, 0, SystemZImpOpBase + 12, 468, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3082 = WFSQSB |
4083 | | { 3081, 2, 1, 6, 705, 1, 0, SystemZImpOpBase + 12, 470, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3081 = WFSQDB |
4084 | | { 3080, 3, 1, 6, 685, 1, 0, SystemZImpOpBase + 12, 1610, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3080 = WFSDB |
4085 | | { 3079, 3, 1, 6, 669, 0, 0, SystemZImpOpBase + 0, 1460, 0, 0x0ULL }, // Inst #3079 = WFPSOXB |
4086 | | { 3078, 3, 1, 6, 668, 0, 0, SystemZImpOpBase + 0, 1647, 0, 0x0ULL }, // Inst #3078 = WFPSOSB |
4087 | | { 3077, 3, 1, 6, 667, 0, 0, SystemZImpOpBase + 0, 1644, 0, 0x0ULL }, // Inst #3077 = WFPSODB |
4088 | | { 3076, 4, 1, 6, 698, 1, 0, SystemZImpOpBase + 12, 1447, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3076 = WFNMSXB |
4089 | | { 3075, 4, 1, 6, 697, 1, 0, SystemZImpOpBase + 12, 1632, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3075 = WFNMSSB |
4090 | | { 3074, 4, 1, 6, 695, 1, 0, SystemZImpOpBase + 12, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3074 = WFNMSDB |
4091 | | { 3073, 4, 1, 6, 698, 1, 0, SystemZImpOpBase + 12, 1447, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3073 = WFNMAXB |
4092 | | { 3072, 4, 1, 6, 697, 1, 0, SystemZImpOpBase + 12, 1632, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3072 = WFNMASB |
4093 | | { 3071, 4, 1, 6, 695, 1, 0, SystemZImpOpBase + 12, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3071 = WFNMADB |
4094 | | { 3070, 3, 1, 6, 692, 1, 0, SystemZImpOpBase + 12, 1439, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3070 = WFMXB |
4095 | | { 3069, 4, 1, 6, 698, 1, 0, SystemZImpOpBase + 12, 1447, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3069 = WFMSXB |
4096 | | { 3068, 4, 1, 6, 697, 1, 0, SystemZImpOpBase + 12, 1632, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3068 = WFMSSB |
4097 | | { 3067, 4, 1, 6, 878, 1, 0, SystemZImpOpBase + 12, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3067 = WFMSDB |
4098 | | { 3066, 3, 1, 6, 690, 1, 0, SystemZImpOpBase + 12, 1613, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3066 = WFMSB |
4099 | | { 3065, 4, 1, 6, 678, 1, 0, SystemZImpOpBase + 12, 1435, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3065 = WFMINXB |
4100 | | { 3064, 4, 1, 6, 677, 1, 0, SystemZImpOpBase + 12, 1640, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3064 = WFMINSB |
4101 | | { 3063, 4, 1, 6, 675, 1, 0, SystemZImpOpBase + 12, 1636, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3063 = WFMINDB |
4102 | | { 3062, 3, 1, 6, 875, 1, 0, SystemZImpOpBase + 12, 1610, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3062 = WFMDB |
4103 | | { 3061, 4, 1, 6, 678, 1, 0, SystemZImpOpBase + 12, 1435, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3061 = WFMAXXB |
4104 | | { 3060, 4, 1, 6, 677, 1, 0, SystemZImpOpBase + 12, 1640, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3060 = WFMAXSB |
4105 | | { 3059, 4, 1, 6, 675, 1, 0, SystemZImpOpBase + 12, 1636, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3059 = WFMAXDB |
4106 | | { 3058, 4, 1, 6, 698, 1, 0, SystemZImpOpBase + 12, 1447, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3058 = WFMAXB |
4107 | | { 3057, 4, 1, 6, 697, 1, 0, SystemZImpOpBase + 12, 1632, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3057 = WFMASB |
4108 | | { 3056, 4, 1, 6, 878, 1, 0, SystemZImpOpBase + 12, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3056 = WFMADB |
4109 | | { 3055, 4, 1, 6, 660, 1, 0, SystemZImpOpBase + 12, 1624, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3055 = WFLRX |
4110 | | { 3054, 4, 1, 6, 658, 1, 0, SystemZImpOpBase + 12, 1620, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3054 = WFLRD |
4111 | | { 3053, 2, 1, 6, 672, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #3053 = WFLPXB |
4112 | | { 3052, 2, 1, 6, 671, 0, 0, SystemZImpOpBase + 0, 468, 0, 0x0ULL }, // Inst #3052 = WFLPSB |
4113 | | { 3051, 2, 1, 6, 670, 0, 0, SystemZImpOpBase + 0, 470, 0, 0x0ULL }, // Inst #3051 = WFLPDB |
4114 | | { 3050, 2, 1, 6, 672, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #3050 = WFLNXB |
4115 | | { 3049, 2, 1, 6, 671, 0, 0, SystemZImpOpBase + 0, 468, 0, 0x0ULL }, // Inst #3049 = WFLNSB |
4116 | | { 3048, 2, 1, 6, 670, 0, 0, SystemZImpOpBase + 0, 470, 0, 0x0ULL }, // Inst #3048 = WFLNDB |
4117 | | { 3047, 2, 1, 6, 658, 1, 0, SystemZImpOpBase + 12, 1618, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3047 = WFLLS |
4118 | | { 3046, 2, 1, 6, 659, 1, 0, SystemZImpOpBase + 12, 1616, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3046 = WFLLD |
4119 | | { 3045, 2, 1, 6, 672, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #3045 = WFLCXB |
4120 | | { 3044, 2, 1, 6, 671, 0, 0, SystemZImpOpBase + 0, 468, 0, 0x0ULL }, // Inst #3044 = WFLCSB |
4121 | | { 3043, 2, 1, 6, 670, 0, 0, SystemZImpOpBase + 0, 470, 0, 0x0ULL }, // Inst #3043 = WFLCDB |
4122 | | { 3042, 2, 0, 6, 729, 1, 1, SystemZImpOpBase + 1, 403, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3042 = WFKXB |
4123 | | { 3041, 2, 0, 6, 728, 1, 1, SystemZImpOpBase + 1, 468, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3041 = WFKSB |
4124 | | { 3040, 3, 1, 6, 725, 1, 1, SystemZImpOpBase + 1, 1439, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3040 = WFKHXBS |
4125 | | { 3039, 3, 1, 6, 717, 1, 0, SystemZImpOpBase + 12, 1439, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3039 = WFKHXB |
4126 | | { 3038, 3, 1, 6, 723, 1, 1, SystemZImpOpBase + 1, 1613, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3038 = WFKHSBS |
4127 | | { 3037, 3, 1, 6, 715, 1, 0, SystemZImpOpBase + 12, 1613, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3037 = WFKHSB |
4128 | | { 3036, 3, 1, 6, 725, 1, 1, SystemZImpOpBase + 1, 1439, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3036 = WFKHEXBS |
4129 | | { 3035, 3, 1, 6, 717, 1, 0, SystemZImpOpBase + 12, 1439, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3035 = WFKHEXB |
4130 | | { 3034, 3, 1, 6, 723, 1, 1, SystemZImpOpBase + 1, 1613, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3034 = WFKHESBS |
4131 | | { 3033, 3, 1, 6, 715, 1, 0, SystemZImpOpBase + 12, 1613, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3033 = WFKHESB |
4132 | | { 3032, 3, 1, 6, 720, 1, 1, SystemZImpOpBase + 1, 1610, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3032 = WFKHEDBS |
4133 | | { 3031, 3, 1, 6, 712, 1, 0, SystemZImpOpBase + 12, 1610, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3031 = WFKHEDB |
4134 | | { 3030, 3, 1, 6, 720, 1, 1, SystemZImpOpBase + 1, 1610, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3030 = WFKHDBS |
4135 | | { 3029, 3, 1, 6, 712, 1, 0, SystemZImpOpBase + 12, 1610, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3029 = WFKHDB |
4136 | | { 3028, 3, 1, 6, 725, 1, 1, SystemZImpOpBase + 1, 1439, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3028 = WFKEXBS |
4137 | | { 3027, 3, 1, 6, 717, 1, 0, SystemZImpOpBase + 12, 1439, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3027 = WFKEXB |
4138 | | { 3026, 3, 1, 6, 723, 1, 1, SystemZImpOpBase + 1, 1613, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3026 = WFKESBS |
4139 | | { 3025, 3, 1, 6, 715, 1, 0, SystemZImpOpBase + 12, 1613, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3025 = WFKESB |
4140 | | { 3024, 3, 1, 6, 720, 1, 1, SystemZImpOpBase + 1, 1610, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3024 = WFKEDBS |
4141 | | { 3023, 3, 1, 6, 712, 1, 0, SystemZImpOpBase + 12, 1610, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3023 = WFKEDB |
4142 | | { 3022, 2, 0, 6, 727, 1, 1, SystemZImpOpBase + 1, 470, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3022 = WFKDB |
4143 | | { 3021, 4, 0, 6, 726, 1, 1, SystemZImpOpBase + 1, 1602, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3021 = WFK |
4144 | | { 3020, 4, 1, 6, 665, 1, 0, SystemZImpOpBase + 12, 1456, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3020 = WFIXB |
4145 | | { 3019, 4, 1, 6, 664, 1, 0, SystemZImpOpBase + 12, 1606, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3019 = WFISB |
4146 | | { 3018, 4, 1, 6, 662, 1, 0, SystemZImpOpBase + 12, 1602, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3018 = WFIDB |
4147 | | { 3017, 3, 1, 6, 703, 1, 0, SystemZImpOpBase + 12, 1439, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3017 = WFDXB |
4148 | | { 3016, 3, 1, 6, 701, 1, 0, SystemZImpOpBase + 12, 1613, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3016 = WFDSB |
4149 | | { 3015, 3, 1, 6, 700, 1, 0, SystemZImpOpBase + 12, 1610, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3015 = WFDDB |
4150 | | { 3014, 2, 0, 6, 729, 1, 1, SystemZImpOpBase + 1, 403, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3014 = WFCXB |
4151 | | { 3013, 2, 0, 6, 728, 1, 1, SystemZImpOpBase + 1, 468, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3013 = WFCSB |
4152 | | { 3012, 3, 1, 6, 724, 1, 1, SystemZImpOpBase + 1, 1439, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3012 = WFCHXBS |
4153 | | { 3011, 3, 1, 6, 716, 1, 0, SystemZImpOpBase + 12, 1439, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3011 = WFCHXB |
4154 | | { 3010, 3, 1, 6, 722, 1, 1, SystemZImpOpBase + 1, 1613, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3010 = WFCHSBS |
4155 | | { 3009, 3, 1, 6, 714, 1, 0, SystemZImpOpBase + 12, 1613, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3009 = WFCHSB |
4156 | | { 3008, 3, 1, 6, 724, 1, 1, SystemZImpOpBase + 1, 1439, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3008 = WFCHEXBS |
4157 | | { 3007, 3, 1, 6, 716, 1, 0, SystemZImpOpBase + 12, 1439, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3007 = WFCHEXB |
4158 | | { 3006, 3, 1, 6, 722, 1, 1, SystemZImpOpBase + 1, 1613, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3006 = WFCHESBS |
4159 | | { 3005, 3, 1, 6, 714, 1, 0, SystemZImpOpBase + 12, 1613, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3005 = WFCHESB |
4160 | | { 3004, 3, 1, 6, 880, 1, 1, SystemZImpOpBase + 1, 1610, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3004 = WFCHEDBS |
4161 | | { 3003, 3, 1, 6, 711, 1, 0, SystemZImpOpBase + 12, 1610, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3003 = WFCHEDB |
4162 | | { 3002, 3, 1, 6, 880, 1, 1, SystemZImpOpBase + 1, 1610, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3002 = WFCHDBS |
4163 | | { 3001, 3, 1, 6, 711, 1, 0, SystemZImpOpBase + 12, 1610, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3001 = WFCHDB |
4164 | | { 3000, 3, 1, 6, 724, 1, 1, SystemZImpOpBase + 1, 1439, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3000 = WFCEXBS |
4165 | | { 2999, 3, 1, 6, 716, 1, 0, SystemZImpOpBase + 12, 1439, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2999 = WFCEXB |
4166 | | { 2998, 3, 1, 6, 722, 1, 1, SystemZImpOpBase + 1, 1613, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2998 = WFCESBS |
4167 | | { 2997, 3, 1, 6, 714, 1, 0, SystemZImpOpBase + 12, 1613, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2997 = WFCESB |
4168 | | { 2996, 3, 1, 6, 880, 1, 1, SystemZImpOpBase + 1, 1610, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2996 = WFCEDBS |
4169 | | { 2995, 3, 1, 6, 711, 1, 0, SystemZImpOpBase + 12, 1610, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2995 = WFCEDB |
4170 | | { 2994, 2, 0, 6, 727, 1, 1, SystemZImpOpBase + 1, 470, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2994 = WFCDB |
4171 | | { 2993, 4, 0, 6, 726, 1, 1, SystemZImpOpBase + 1, 1602, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2993 = WFC |
4172 | | { 2992, 3, 1, 6, 688, 1, 0, SystemZImpOpBase + 12, 1439, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2992 = WFAXB |
4173 | | { 2991, 3, 1, 6, 687, 1, 0, SystemZImpOpBase + 12, 1613, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2991 = WFASB |
4174 | | { 2990, 3, 1, 6, 685, 1, 0, SystemZImpOpBase + 12, 1610, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2990 = WFADB |
4175 | | { 2989, 4, 1, 6, 650, 1, 0, SystemZImpOpBase + 12, 1602, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2989 = WCLGDB |
4176 | | { 2988, 4, 1, 6, 652, 1, 0, SystemZImpOpBase + 12, 1606, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2988 = WCLFEB |
4177 | | { 2987, 4, 1, 6, 650, 1, 0, SystemZImpOpBase + 12, 1602, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2987 = WCGDB |
4178 | | { 2986, 4, 1, 6, 652, 1, 0, SystemZImpOpBase + 12, 1606, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2986 = WCFEB |
4179 | | { 2985, 4, 1, 6, 646, 1, 0, SystemZImpOpBase + 12, 1606, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2985 = WCELFB |
4180 | | { 2984, 4, 1, 6, 646, 1, 0, SystemZImpOpBase + 12, 1606, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2984 = WCEFB |
4181 | | { 2983, 4, 1, 6, 644, 1, 0, SystemZImpOpBase + 12, 1602, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2983 = WCDLGB |
4182 | | { 2982, 4, 1, 6, 644, 1, 0, SystemZImpOpBase + 12, 1602, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2982 = WCDGB |
4183 | | { 2981, 1, 1, 6, 529, 0, 0, SystemZImpOpBase + 0, 1596, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2981 = VZERO |
4184 | | { 2980, 3, 1, 6, 585, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2980 = VX |
4185 | | { 2979, 2, 1, 6, 575, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2979 = VUPLLH |
4186 | | { 2978, 2, 1, 6, 575, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2978 = VUPLLF |
4187 | | { 2977, 2, 1, 6, 575, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2977 = VUPLLB |
4188 | | { 2976, 3, 1, 6, 575, 0, 0, SystemZImpOpBase + 0, 1460, 0, 0x0ULL }, // Inst #2976 = VUPLL |
4189 | | { 2975, 2, 1, 6, 574, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2975 = VUPLHW |
4190 | | { 2974, 2, 1, 6, 574, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2974 = VUPLHH |
4191 | | { 2973, 2, 1, 6, 574, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2973 = VUPLHF |
4192 | | { 2972, 2, 1, 6, 574, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2972 = VUPLHB |
4193 | | { 2971, 3, 1, 6, 574, 0, 0, SystemZImpOpBase + 0, 1460, 0, 0x0ULL }, // Inst #2971 = VUPLH |
4194 | | { 2970, 2, 1, 6, 573, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2970 = VUPLF |
4195 | | { 2969, 2, 1, 6, 573, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2969 = VUPLB |
4196 | | { 2968, 3, 1, 6, 573, 0, 0, SystemZImpOpBase + 0, 1460, 0, 0x0ULL }, // Inst #2968 = VUPL |
4197 | | { 2967, 3, 1, 6, 771, 0, 1, SystemZImpOpBase + 0, 1460, 0, 0x0ULL }, // Inst #2967 = VUPKZL |
4198 | | { 2966, 3, 1, 6, 770, 0, 1, SystemZImpOpBase + 0, 1460, 0, 0x0ULL }, // Inst #2966 = VUPKZH |
4199 | | { 2965, 4, 0, 6, 754, 0, 0, SystemZImpOpBase + 0, 1573, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2965 = VUPKZ |
4200 | | { 2964, 2, 1, 6, 572, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2964 = VUPHH |
4201 | | { 2963, 2, 1, 6, 572, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2963 = VUPHF |
4202 | | { 2962, 2, 1, 6, 572, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2962 = VUPHB |
4203 | | { 2961, 3, 1, 6, 572, 0, 0, SystemZImpOpBase + 0, 1460, 0, 0x0ULL }, // Inst #2961 = VUPH |
4204 | | { 2960, 1, 0, 6, 763, 0, 1, SystemZImpOpBase + 0, 1596, 0, 0x0ULL }, // Inst #2960 = VTP |
4205 | | { 2959, 2, 0, 6, 640, 0, 1, SystemZImpOpBase + 0, 403, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2959 = VTM |
4206 | | { 2958, 3, 1, 6, 631, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2958 = VSUMQG |
4207 | | { 2957, 3, 1, 6, 631, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2957 = VSUMQF |
4208 | | { 2956, 4, 1, 6, 631, 0, 0, SystemZImpOpBase + 0, 1435, 0, 0x0ULL }, // Inst #2956 = VSUMQ |
4209 | | { 2955, 3, 1, 6, 629, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2955 = VSUMH |
4210 | | { 2954, 3, 1, 6, 630, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2954 = VSUMGH |
4211 | | { 2953, 3, 1, 6, 630, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2953 = VSUMGF |
4212 | | { 2952, 4, 1, 6, 630, 0, 0, SystemZImpOpBase + 0, 1435, 0, 0x0ULL }, // Inst #2952 = VSUMG |
4213 | | { 2951, 3, 1, 6, 629, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2951 = VSUMB |
4214 | | { 2950, 4, 1, 6, 629, 0, 0, SystemZImpOpBase + 0, 1435, 0, 0x0ULL }, // Inst #2950 = VSUM |
4215 | | { 2949, 4, 1, 6, 748, 0, 1, SystemZImpOpBase + 0, 1447, 0, 0x0ULL }, // Inst #2949 = VSTRSZH |
4216 | | { 2948, 4, 1, 6, 748, 0, 1, SystemZImpOpBase + 0, 1447, 0, 0x0ULL }, // Inst #2948 = VSTRSZF |
4217 | | { 2947, 4, 1, 6, 748, 0, 1, SystemZImpOpBase + 0, 1447, 0, 0x0ULL }, // Inst #2947 = VSTRSZB |
4218 | | { 2946, 5, 1, 6, 747, 0, 1, SystemZImpOpBase + 0, 1442, 0, 0x0ULL }, // Inst #2946 = VSTRSH |
4219 | | { 2945, 5, 1, 6, 747, 0, 1, SystemZImpOpBase + 0, 1442, 0, 0x0ULL }, // Inst #2945 = VSTRSF |
4220 | | { 2944, 5, 1, 6, 747, 0, 1, SystemZImpOpBase + 0, 1442, 0, 0x0ULL }, // Inst #2944 = VSTRSB |
4221 | | { 2943, 6, 1, 6, 747, 0, 1, SystemZImpOpBase + 0, 1511, 0, 0x0ULL }, // Inst #2943 = VSTRS |
4222 | | { 2942, 4, 0, 6, 549, 0, 0, SystemZImpOpBase + 0, 1560, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2942 = VSTRLR |
4223 | | { 2941, 4, 0, 6, 549, 0, 0, SystemZImpOpBase + 0, 1573, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2941 = VSTRL |
4224 | | { 2940, 5, 1, 6, 746, 0, 1, SystemZImpOpBase + 0, 1442, 0, 0x0ULL }, // Inst #2940 = VSTRCZHS |
4225 | | { 2939, 5, 1, 6, 745, 0, 0, SystemZImpOpBase + 0, 1442, 0, 0x0ULL }, // Inst #2939 = VSTRCZH |
4226 | | { 2938, 5, 1, 6, 746, 0, 1, SystemZImpOpBase + 0, 1442, 0, 0x0ULL }, // Inst #2938 = VSTRCZFS |
4227 | | { 2937, 5, 1, 6, 745, 0, 0, SystemZImpOpBase + 0, 1442, 0, 0x0ULL }, // Inst #2937 = VSTRCZF |
4228 | | { 2936, 5, 1, 6, 746, 0, 1, SystemZImpOpBase + 0, 1442, 0, 0x0ULL }, // Inst #2936 = VSTRCZBS |
4229 | | { 2935, 5, 1, 6, 745, 0, 0, SystemZImpOpBase + 0, 1442, 0, 0x0ULL }, // Inst #2935 = VSTRCZB |
4230 | | { 2934, 5, 1, 6, 744, 0, 1, SystemZImpOpBase + 0, 1442, 0, 0x0ULL }, // Inst #2934 = VSTRCHS |
4231 | | { 2933, 5, 1, 6, 743, 0, 0, SystemZImpOpBase + 0, 1442, 0, 0x0ULL }, // Inst #2933 = VSTRCH |
4232 | | { 2932, 5, 1, 6, 744, 0, 1, SystemZImpOpBase + 0, 1442, 0, 0x0ULL }, // Inst #2932 = VSTRCFS |
4233 | | { 2931, 5, 1, 6, 743, 0, 0, SystemZImpOpBase + 0, 1442, 0, 0x0ULL }, // Inst #2931 = VSTRCF |
4234 | | { 2930, 5, 1, 6, 744, 0, 1, SystemZImpOpBase + 0, 1442, 0, 0x0ULL }, // Inst #2930 = VSTRCBS |
4235 | | { 2929, 5, 1, 6, 743, 0, 0, SystemZImpOpBase + 0, 1442, 0, 0x0ULL }, // Inst #2929 = VSTRCB |
4236 | | { 2928, 6, 1, 6, 743, 0, 1, SystemZImpOpBase + 0, 1511, 0, 0x0ULL }, // Inst #2928 = VSTRC |
4237 | | { 2927, 5, 0, 6, 547, 0, 0, SystemZImpOpBase + 0, 1568, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2927 = VSTMAlign |
4238 | | { 2926, 4, 0, 6, 547, 0, 0, SystemZImpOpBase + 0, 1564, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2926 = VSTM |
4239 | | { 2925, 4, 0, 6, 544, 0, 0, SystemZImpOpBase + 0, 1560, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2925 = VSTL |
4240 | | { 2924, 4, 0, 6, 556, 0, 0, SystemZImpOpBase + 0, 1532, 0|(1ULL<<MCID::MayStore), 0x200ULL }, // Inst #2924 = VSTERH |
4241 | | { 2923, 4, 0, 6, 556, 0, 0, SystemZImpOpBase + 0, 1532, 0|(1ULL<<MCID::MayStore), 0x200ULL }, // Inst #2923 = VSTERG |
4242 | | { 2922, 4, 0, 6, 556, 0, 0, SystemZImpOpBase + 0, 1532, 0|(1ULL<<MCID::MayStore), 0x200ULL }, // Inst #2922 = VSTERF |
4243 | | { 2921, 5, 0, 6, 556, 0, 0, SystemZImpOpBase + 0, 1536, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2921 = VSTER |
4244 | | { 2920, 5, 0, 6, 546, 0, 0, SystemZImpOpBase + 0, 1536, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #2920 = VSTEH |
4245 | | { 2919, 5, 0, 6, 545, 0, 0, SystemZImpOpBase + 0, 1536, 0|(1ULL<<MCID::MayStore), 0x100ULL }, // Inst #2919 = VSTEG |
4246 | | { 2918, 5, 0, 6, 545, 0, 0, SystemZImpOpBase + 0, 1536, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #2918 = VSTEF |
4247 | | { 2917, 5, 0, 6, 557, 0, 0, SystemZImpOpBase + 0, 1536, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #2917 = VSTEBRH |
4248 | | { 2916, 5, 0, 6, 558, 0, 0, SystemZImpOpBase + 0, 1536, 0|(1ULL<<MCID::MayStore), 0x100ULL }, // Inst #2916 = VSTEBRG |
4249 | | { 2915, 5, 0, 6, 558, 0, 0, SystemZImpOpBase + 0, 1536, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #2915 = VSTEBRF |
4250 | | { 2914, 5, 0, 6, 546, 0, 0, SystemZImpOpBase + 0, 1536, 0|(1ULL<<MCID::MayStore), 0x20ULL }, // Inst #2914 = VSTEB |
4251 | | { 2913, 4, 0, 6, 555, 0, 0, SystemZImpOpBase + 0, 1532, 0|(1ULL<<MCID::MayStore), 0x200ULL }, // Inst #2913 = VSTBRQ |
4252 | | { 2912, 4, 0, 6, 555, 0, 0, SystemZImpOpBase + 0, 1532, 0|(1ULL<<MCID::MayStore), 0x200ULL }, // Inst #2912 = VSTBRH |
4253 | | { 2911, 4, 0, 6, 555, 0, 0, SystemZImpOpBase + 0, 1532, 0|(1ULL<<MCID::MayStore), 0x200ULL }, // Inst #2911 = VSTBRG |
4254 | | { 2910, 4, 0, 6, 555, 0, 0, SystemZImpOpBase + 0, 1532, 0|(1ULL<<MCID::MayStore), 0x200ULL }, // Inst #2910 = VSTBRF |
4255 | | { 2909, 5, 0, 6, 555, 0, 0, SystemZImpOpBase + 0, 1536, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2909 = VSTBR |
4256 | | { 2908, 5, 0, 6, 544, 0, 0, SystemZImpOpBase + 0, 1536, 0|(1ULL<<MCID::MayStore), 0x200ULL }, // Inst #2908 = VSTAlign |
4257 | | { 2907, 4, 0, 6, 544, 0, 0, SystemZImpOpBase + 0, 1532, 0|(1ULL<<MCID::MayStore), 0x200ULL }, // Inst #2907 = VST |
4258 | | { 2906, 5, 1, 6, 768, 0, 1, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2906 = VSRPR |
4259 | | { 2905, 5, 1, 6, 761, 0, 1, SystemZImpOpBase + 0, 1451, 0, 0x0ULL }, // Inst #2905 = VSRP |
4260 | | { 2904, 3, 1, 6, 623, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2904 = VSRLB |
4261 | | { 2903, 3, 1, 6, 622, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2903 = VSRL |
4262 | | { 2902, 4, 1, 6, 625, 0, 0, SystemZImpOpBase + 0, 1435, 0, 0x0ULL }, // Inst #2902 = VSRD |
4263 | | { 2901, 3, 1, 6, 623, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2901 = VSRAB |
4264 | | { 2900, 3, 1, 6, 622, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2900 = VSRA |
4265 | | { 2899, 3, 1, 6, 628, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2899 = VSQ |
4266 | | { 2898, 5, 1, 6, 757, 0, 1, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2898 = VSP |
4267 | | { 2897, 4, 1, 6, 620, 0, 0, SystemZImpOpBase + 0, 1435, 0, 0x0ULL }, // Inst #2897 = VSLDB |
4268 | | { 2896, 4, 1, 6, 624, 0, 0, SystemZImpOpBase + 0, 1435, 0, 0x0ULL }, // Inst #2896 = VSLD |
4269 | | { 2895, 3, 1, 6, 621, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2895 = VSLB |
4270 | | { 2894, 3, 1, 6, 620, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2894 = VSL |
4271 | | { 2893, 3, 1, 6, 628, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2893 = VSH |
4272 | | { 2892, 3, 1, 6, 628, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2892 = VSG |
4273 | | { 2891, 3, 1, 6, 628, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2891 = VSF |
4274 | | { 2890, 4, 1, 6, 565, 0, 0, SystemZImpOpBase + 0, 1447, 0, 0x0ULL }, // Inst #2890 = VSEL |
4275 | | { 2889, 2, 1, 6, 571, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2889 = VSEGH |
4276 | | { 2888, 2, 1, 6, 571, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2888 = VSEGF |
4277 | | { 2887, 2, 1, 6, 571, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2887 = VSEGB |
4278 | | { 2886, 3, 1, 6, 571, 0, 0, SystemZImpOpBase + 0, 1460, 0, 0x0ULL }, // Inst #2886 = VSEG |
4279 | | { 2885, 5, 1, 6, 760, 0, 1, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2885 = VSDP |
4280 | | { 2884, 3, 1, 6, 765, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2884 = VSCSHP |
4281 | | { 2883, 4, 1, 6, 764, 0, 0, SystemZImpOpBase + 0, 1435, 0, 0x0ULL }, // Inst #2883 = VSCHXP |
4282 | | { 2882, 4, 1, 6, 764, 0, 0, SystemZImpOpBase + 0, 1435, 0, 0x0ULL }, // Inst #2882 = VSCHSP |
4283 | | { 2881, 5, 1, 6, 764, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2881 = VSCHP |
4284 | | { 2880, 4, 1, 6, 764, 0, 0, SystemZImpOpBase + 0, 1435, 0, 0x0ULL }, // Inst #2880 = VSCHDP |
4285 | | { 2879, 5, 0, 6, 548, 0, 0, SystemZImpOpBase + 0, 1597, 0|(1ULL<<MCID::MayStore), 0x100ULL }, // Inst #2879 = VSCEG |
4286 | | { 2878, 5, 0, 6, 548, 0, 0, SystemZImpOpBase + 0, 1597, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #2878 = VSCEF |
4287 | | { 2877, 3, 1, 6, 627, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2877 = VSCBIQ |
4288 | | { 2876, 3, 1, 6, 627, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2876 = VSCBIH |
4289 | | { 2875, 3, 1, 6, 627, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2875 = VSCBIG |
4290 | | { 2874, 3, 1, 6, 627, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2874 = VSCBIF |
4291 | | { 2873, 3, 1, 6, 627, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2873 = VSCBIB |
4292 | | { 2872, 4, 1, 6, 627, 0, 0, SystemZImpOpBase + 0, 1435, 0, 0x0ULL }, // Inst #2872 = VSCBI |
4293 | | { 2871, 4, 1, 6, 626, 0, 0, SystemZImpOpBase + 0, 1447, 0, 0x0ULL }, // Inst #2871 = VSBIQ |
4294 | | { 2870, 5, 1, 6, 626, 0, 0, SystemZImpOpBase + 0, 1442, 0, 0x0ULL }, // Inst #2870 = VSBI |
4295 | | { 2869, 4, 1, 6, 626, 0, 0, SystemZImpOpBase + 0, 1447, 0, 0x0ULL }, // Inst #2869 = VSBCBIQ |
4296 | | { 2868, 5, 1, 6, 626, 0, 0, SystemZImpOpBase + 0, 1442, 0, 0x0ULL }, // Inst #2868 = VSBCBI |
4297 | | { 2867, 3, 1, 6, 626, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2867 = VSB |
4298 | | { 2866, 4, 1, 6, 628, 0, 0, SystemZImpOpBase + 0, 1435, 0, 0x0ULL }, // Inst #2866 = VS |
4299 | | { 2865, 5, 1, 6, 759, 0, 1, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2865 = VRP |
4300 | | { 2864, 2, 1, 6, 533, 0, 0, SystemZImpOpBase + 0, 1517, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2864 = VREPIH |
4301 | | { 2863, 2, 1, 6, 533, 0, 0, SystemZImpOpBase + 0, 1517, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2863 = VREPIG |
4302 | | { 2862, 2, 1, 6, 533, 0, 0, SystemZImpOpBase + 0, 1517, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2862 = VREPIF |
4303 | | { 2861, 2, 1, 6, 533, 0, 0, SystemZImpOpBase + 0, 1517, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2861 = VREPIB |
4304 | | { 2860, 3, 1, 6, 533, 0, 0, SystemZImpOpBase + 0, 1529, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2860 = VREPI |
4305 | | { 2859, 3, 1, 6, 564, 0, 0, SystemZImpOpBase + 0, 1460, 0, 0x0ULL }, // Inst #2859 = VREPH |
4306 | | { 2858, 3, 1, 6, 564, 0, 0, SystemZImpOpBase + 0, 1460, 0, 0x0ULL }, // Inst #2858 = VREPG |
4307 | | { 2857, 3, 1, 6, 564, 0, 0, SystemZImpOpBase + 0, 1460, 0, 0x0ULL }, // Inst #2857 = VREPF |
4308 | | { 2856, 3, 1, 6, 564, 0, 0, SystemZImpOpBase + 0, 1460, 0, 0x0ULL }, // Inst #2856 = VREPB |
4309 | | { 2855, 4, 1, 6, 564, 0, 0, SystemZImpOpBase + 0, 1456, 0, 0x0ULL }, // Inst #2855 = VREP |
4310 | | { 2854, 5, 1, 6, 762, 0, 1, SystemZImpOpBase + 0, 1451, 0, 0x0ULL }, // Inst #2854 = VPSOP |
4311 | | { 2853, 2, 1, 6, 610, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2853 = VPOPCTH |
4312 | | { 2852, 2, 1, 6, 610, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2852 = VPOPCTG |
4313 | | { 2851, 2, 1, 6, 610, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2851 = VPOPCTF |
4314 | | { 2850, 2, 1, 6, 610, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2850 = VPOPCTB |
4315 | | { 2849, 3, 1, 6, 874, 0, 0, SystemZImpOpBase + 0, 1460, 0, 0x0ULL }, // Inst #2849 = VPOPCT |
4316 | | { 2848, 5, 1, 6, 769, 0, 1, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2848 = VPKZR |
4317 | | { 2847, 4, 1, 6, 753, 0, 0, SystemZImpOpBase + 0, 1573, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2847 = VPKZ |
4318 | | { 2846, 3, 1, 6, 568, 0, 1, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2846 = VPKSHS |
4319 | | { 2845, 3, 1, 6, 567, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2845 = VPKSH |
4320 | | { 2844, 3, 1, 6, 568, 0, 1, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2844 = VPKSGS |
4321 | | { 2843, 3, 1, 6, 567, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2843 = VPKSG |
4322 | | { 2842, 3, 1, 6, 568, 0, 1, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2842 = VPKSFS |
4323 | | { 2841, 3, 1, 6, 567, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2841 = VPKSF |
4324 | | { 2840, 5, 1, 6, 567, 0, 1, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2840 = VPKS |
4325 | | { 2839, 3, 1, 6, 570, 0, 1, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2839 = VPKLSHS |
4326 | | { 2838, 3, 1, 6, 569, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2838 = VPKLSH |
4327 | | { 2837, 3, 1, 6, 570, 0, 1, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2837 = VPKLSGS |
4328 | | { 2836, 3, 1, 6, 569, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2836 = VPKLSG |
4329 | | { 2835, 3, 1, 6, 570, 0, 1, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2835 = VPKLSFS |
4330 | | { 2834, 3, 1, 6, 569, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2834 = VPKLSF |
4331 | | { 2833, 5, 1, 6, 569, 0, 1, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2833 = VPKLS |
4332 | | { 2832, 3, 1, 6, 566, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2832 = VPKH |
4333 | | { 2831, 3, 1, 6, 566, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2831 = VPKG |
4334 | | { 2830, 3, 1, 6, 566, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2830 = VPKF |
4335 | | { 2829, 4, 1, 6, 566, 0, 0, SystemZImpOpBase + 0, 1435, 0, 0x0ULL }, // Inst #2829 = VPK |
4336 | | { 2828, 4, 1, 6, 561, 0, 0, SystemZImpOpBase + 0, 1447, 0, 0x0ULL }, // Inst #2828 = VPERM |
4337 | | { 2827, 4, 1, 6, 562, 0, 0, SystemZImpOpBase + 0, 1435, 0, 0x0ULL }, // Inst #2827 = VPDI |
4338 | | { 2826, 1, 1, 6, 530, 0, 0, SystemZImpOpBase + 0, 1596, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2826 = VONE |
4339 | | { 2825, 3, 1, 6, 581, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2825 = VOC |
4340 | | { 2824, 3, 1, 6, 873, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2824 = VO |
4341 | | { 2823, 3, 1, 6, 580, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2823 = VNX |
4342 | | { 2822, 3, 1, 6, 872, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2822 = VNO |
4343 | | { 2821, 3, 1, 6, 580, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2821 = VNN |
4344 | | { 2820, 3, 1, 6, 872, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2820 = VNC |
4345 | | { 2819, 3, 1, 6, 872, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2819 = VN |
4346 | | { 2818, 3, 1, 6, 592, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2818 = VMXLH |
4347 | | { 2817, 3, 1, 6, 592, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2817 = VMXLG |
4348 | | { 2816, 3, 1, 6, 592, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2816 = VMXLF |
4349 | | { 2815, 3, 1, 6, 592, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2815 = VMXLB |
4350 | | { 2814, 4, 1, 6, 592, 0, 0, SystemZImpOpBase + 0, 1435, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2814 = VMXL |
4351 | | { 2813, 3, 1, 6, 591, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2813 = VMXH |
4352 | | { 2812, 3, 1, 6, 591, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2812 = VMXG |
4353 | | { 2811, 3, 1, 6, 591, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2811 = VMXF |
4354 | | { 2810, 3, 1, 6, 591, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2810 = VMXB |
4355 | | { 2809, 4, 1, 6, 591, 0, 0, SystemZImpOpBase + 0, 1435, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2809 = VMX |
4356 | | { 2808, 5, 1, 6, 758, 0, 1, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2808 = VMSP |
4357 | | { 2807, 5, 1, 6, 609, 0, 0, SystemZImpOpBase + 0, 1442, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2807 = VMSLG |
4358 | | { 2806, 6, 1, 6, 609, 0, 0, SystemZImpOpBase + 0, 1511, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2806 = VMSL |
4359 | | { 2805, 3, 1, 6, 560, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2805 = VMRLH |
4360 | | { 2804, 3, 1, 6, 560, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2804 = VMRLG |
4361 | | { 2803, 3, 1, 6, 560, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2803 = VMRLF |
4362 | | { 2802, 3, 1, 6, 560, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2802 = VMRLB |
4363 | | { 2801, 4, 1, 6, 560, 0, 0, SystemZImpOpBase + 0, 1435, 0, 0x0ULL }, // Inst #2801 = VMRL |
4364 | | { 2800, 3, 1, 6, 559, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2800 = VMRHH |
4365 | | { 2799, 3, 1, 6, 559, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2799 = VMRHG |
4366 | | { 2798, 3, 1, 6, 559, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2798 = VMRHF |
4367 | | { 2797, 3, 1, 6, 559, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2797 = VMRHB |
4368 | | { 2796, 4, 1, 6, 559, 0, 0, SystemZImpOpBase + 0, 1435, 0, 0x0ULL }, // Inst #2796 = VMRH |
4369 | | { 2795, 5, 1, 6, 758, 0, 1, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2795 = VMP |
4370 | | { 2794, 3, 1, 6, 608, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2794 = VMOH |
4371 | | { 2793, 3, 1, 6, 608, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2793 = VMOF |
4372 | | { 2792, 3, 1, 6, 608, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2792 = VMOB |
4373 | | { 2791, 4, 1, 6, 608, 0, 0, SystemZImpOpBase + 0, 1435, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2791 = VMO |
4374 | | { 2790, 3, 1, 6, 594, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2790 = VMNLH |
4375 | | { 2789, 3, 1, 6, 594, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2789 = VMNLG |
4376 | | { 2788, 3, 1, 6, 594, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2788 = VMNLF |
4377 | | { 2787, 3, 1, 6, 594, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2787 = VMNLB |
4378 | | { 2786, 4, 1, 6, 594, 0, 0, SystemZImpOpBase + 0, 1435, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2786 = VMNL |
4379 | | { 2785, 3, 1, 6, 593, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2785 = VMNH |
4380 | | { 2784, 3, 1, 6, 593, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2784 = VMNG |
4381 | | { 2783, 3, 1, 6, 593, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2783 = VMNF |
4382 | | { 2782, 3, 1, 6, 593, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2782 = VMNB |
4383 | | { 2781, 4, 1, 6, 593, 0, 0, SystemZImpOpBase + 0, 1435, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2781 = VMN |
4384 | | { 2780, 3, 1, 6, 607, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2780 = VMLOH |
4385 | | { 2779, 3, 1, 6, 607, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2779 = VMLOF |
4386 | | { 2778, 3, 1, 6, 607, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2778 = VMLOB |
4387 | | { 2777, 4, 1, 6, 607, 0, 0, SystemZImpOpBase + 0, 1435, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2777 = VMLO |
4388 | | { 2776, 3, 1, 6, 606, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2776 = VMLHW |
4389 | | { 2775, 3, 1, 6, 606, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2775 = VMLHH |
4390 | | { 2774, 3, 1, 6, 606, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2774 = VMLHF |
4391 | | { 2773, 3, 1, 6, 606, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2773 = VMLHB |
4392 | | { 2772, 4, 1, 6, 606, 0, 0, SystemZImpOpBase + 0, 1435, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2772 = VMLH |
4393 | | { 2771, 3, 1, 6, 604, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2771 = VMLF |
4394 | | { 2770, 3, 1, 6, 605, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2770 = VMLEH |
4395 | | { 2769, 3, 1, 6, 605, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2769 = VMLEF |
4396 | | { 2768, 3, 1, 6, 605, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2768 = VMLEB |
4397 | | { 2767, 4, 1, 6, 605, 0, 0, SystemZImpOpBase + 0, 1435, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2767 = VMLE |
4398 | | { 2766, 3, 1, 6, 604, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2766 = VMLB |
4399 | | { 2765, 4, 1, 6, 604, 0, 0, SystemZImpOpBase + 0, 1435, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2765 = VML |
4400 | | { 2764, 3, 1, 6, 603, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2764 = VMHH |
4401 | | { 2763, 3, 1, 6, 603, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2763 = VMHF |
4402 | | { 2762, 3, 1, 6, 603, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2762 = VMHB |
4403 | | { 2761, 4, 1, 6, 603, 0, 0, SystemZImpOpBase + 0, 1435, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2761 = VMH |
4404 | | { 2760, 3, 1, 6, 602, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2760 = VMEH |
4405 | | { 2759, 3, 1, 6, 602, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2759 = VMEF |
4406 | | { 2758, 3, 1, 6, 602, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2758 = VMEB |
4407 | | { 2757, 4, 1, 6, 602, 0, 0, SystemZImpOpBase + 0, 1435, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2757 = VME |
4408 | | { 2756, 4, 1, 6, 599, 0, 0, SystemZImpOpBase + 0, 1447, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2756 = VMAOH |
4409 | | { 2755, 4, 1, 6, 599, 0, 0, SystemZImpOpBase + 0, 1447, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2755 = VMAOF |
4410 | | { 2754, 4, 1, 6, 599, 0, 0, SystemZImpOpBase + 0, 1447, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2754 = VMAOB |
4411 | | { 2753, 5, 1, 6, 599, 0, 0, SystemZImpOpBase + 0, 1442, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2753 = VMAO |
4412 | | { 2752, 4, 1, 6, 598, 0, 0, SystemZImpOpBase + 0, 1447, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2752 = VMALOH |
4413 | | { 2751, 4, 1, 6, 598, 0, 0, SystemZImpOpBase + 0, 1447, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2751 = VMALOF |
4414 | | { 2750, 4, 1, 6, 598, 0, 0, SystemZImpOpBase + 0, 1447, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2750 = VMALOB |
4415 | | { 2749, 5, 1, 6, 598, 0, 0, SystemZImpOpBase + 0, 1442, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2749 = VMALO |
4416 | | { 2748, 4, 1, 6, 597, 0, 0, SystemZImpOpBase + 0, 1447, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2748 = VMALHW |
4417 | | { 2747, 4, 1, 6, 597, 0, 0, SystemZImpOpBase + 0, 1447, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2747 = VMALHH |
4418 | | { 2746, 4, 1, 6, 597, 0, 0, SystemZImpOpBase + 0, 1447, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2746 = VMALHF |
4419 | | { 2745, 4, 1, 6, 597, 0, 0, SystemZImpOpBase + 0, 1447, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2745 = VMALHB |
4420 | | { 2744, 5, 1, 6, 597, 0, 0, SystemZImpOpBase + 0, 1442, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2744 = VMALH |
4421 | | { 2743, 4, 1, 6, 595, 0, 0, SystemZImpOpBase + 0, 1447, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2743 = VMALF |
4422 | | { 2742, 4, 1, 6, 596, 0, 0, SystemZImpOpBase + 0, 1447, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2742 = VMALEH |
4423 | | { 2741, 4, 1, 6, 596, 0, 0, SystemZImpOpBase + 0, 1447, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2741 = VMALEF |
4424 | | { 2740, 4, 1, 6, 596, 0, 0, SystemZImpOpBase + 0, 1447, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2740 = VMALEB |
4425 | | { 2739, 5, 1, 6, 596, 0, 0, SystemZImpOpBase + 0, 1442, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2739 = VMALE |
4426 | | { 2738, 4, 1, 6, 595, 0, 0, SystemZImpOpBase + 0, 1447, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2738 = VMALB |
4427 | | { 2737, 5, 1, 6, 595, 0, 0, SystemZImpOpBase + 0, 1442, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2737 = VMAL |
4428 | | { 2736, 4, 1, 6, 601, 0, 0, SystemZImpOpBase + 0, 1447, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2736 = VMAHH |
4429 | | { 2735, 4, 1, 6, 601, 0, 0, SystemZImpOpBase + 0, 1447, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2735 = VMAHF |
4430 | | { 2734, 4, 1, 6, 601, 0, 0, SystemZImpOpBase + 0, 1447, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2734 = VMAHB |
4431 | | { 2733, 5, 1, 6, 601, 0, 0, SystemZImpOpBase + 0, 1442, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2733 = VMAH |
4432 | | { 2732, 4, 1, 6, 600, 0, 0, SystemZImpOpBase + 0, 1447, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2732 = VMAEH |
4433 | | { 2731, 4, 1, 6, 600, 0, 0, SystemZImpOpBase + 0, 1447, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2731 = VMAEF |
4434 | | { 2730, 4, 1, 6, 600, 0, 0, SystemZImpOpBase + 0, 1447, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2730 = VMAEB |
4435 | | { 2729, 5, 1, 6, 600, 0, 0, SystemZImpOpBase + 0, 1442, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2729 = VMAE |
4436 | | { 2728, 3, 1, 6, 528, 0, 0, SystemZImpOpBase + 0, 1593, 0, 0x0ULL }, // Inst #2728 = VLVGP |
4437 | | { 2727, 5, 1, 6, 527, 0, 0, SystemZImpOpBase + 0, 1583, 0, 0x0ULL }, // Inst #2727 = VLVGH |
4438 | | { 2726, 5, 1, 6, 527, 0, 0, SystemZImpOpBase + 0, 1588, 0, 0x0ULL }, // Inst #2726 = VLVGG |
4439 | | { 2725, 5, 1, 6, 527, 0, 0, SystemZImpOpBase + 0, 1583, 0, 0x0ULL }, // Inst #2725 = VLVGF |
4440 | | { 2724, 5, 1, 6, 527, 0, 0, SystemZImpOpBase + 0, 1583, 0, 0x0ULL }, // Inst #2724 = VLVGB |
4441 | | { 2723, 6, 1, 6, 527, 0, 0, SystemZImpOpBase + 0, 1577, 0, 0x0ULL }, // Inst #2723 = VLVG |
4442 | | { 2722, 4, 1, 6, 543, 0, 0, SystemZImpOpBase + 0, 1560, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2722 = VLRLR |
4443 | | { 2721, 4, 1, 6, 543, 0, 0, SystemZImpOpBase + 0, 1573, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2721 = VLRL |
4444 | | { 2720, 4, 1, 6, 539, 0, 0, SystemZImpOpBase + 0, 1532, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #2720 = VLREPH |
4445 | | { 2719, 4, 1, 6, 539, 0, 0, SystemZImpOpBase + 0, 1532, 0|(1ULL<<MCID::MayLoad), 0x100ULL }, // Inst #2719 = VLREPG |
4446 | | { 2718, 4, 1, 6, 539, 0, 0, SystemZImpOpBase + 0, 1532, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #2718 = VLREPF |
4447 | | { 2717, 4, 1, 6, 539, 0, 0, SystemZImpOpBase + 0, 1532, 0|(1ULL<<MCID::MayLoad), 0x20ULL }, // Inst #2717 = VLREPB |
4448 | | { 2716, 5, 1, 6, 539, 0, 0, SystemZImpOpBase + 0, 1536, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2716 = VLREP |
4449 | | { 2715, 2, 1, 6, 525, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2715 = VLR |
4450 | | { 2714, 2, 1, 6, 590, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2714 = VLPH |
4451 | | { 2713, 2, 1, 6, 590, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2713 = VLPG |
4452 | | { 2712, 2, 1, 6, 590, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2712 = VLPF |
4453 | | { 2711, 2, 1, 6, 590, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2711 = VLPB |
4454 | | { 2710, 3, 1, 6, 590, 0, 0, SystemZImpOpBase + 0, 1460, 0, 0x0ULL }, // Inst #2710 = VLP |
4455 | | { 2709, 5, 2, 6, 542, 0, 0, SystemZImpOpBase + 0, 1568, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2709 = VLMAlign |
4456 | | { 2708, 4, 2, 6, 542, 0, 0, SystemZImpOpBase + 0, 1564, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2708 = VLM |
4457 | | { 2707, 4, 1, 6, 538, 0, 0, SystemZImpOpBase + 0, 1532, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #2707 = VLLEZLF |
4458 | | { 2706, 4, 1, 6, 871, 0, 0, SystemZImpOpBase + 0, 1532, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #2706 = VLLEZH |
4459 | | { 2705, 4, 1, 6, 871, 0, 0, SystemZImpOpBase + 0, 1532, 0|(1ULL<<MCID::MayLoad), 0x100ULL }, // Inst #2705 = VLLEZG |
4460 | | { 2704, 4, 1, 6, 871, 0, 0, SystemZImpOpBase + 0, 1532, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #2704 = VLLEZF |
4461 | | { 2703, 4, 1, 6, 871, 0, 0, SystemZImpOpBase + 0, 1532, 0|(1ULL<<MCID::MayLoad), 0x20ULL }, // Inst #2703 = VLLEZB |
4462 | | { 2702, 5, 1, 6, 871, 0, 0, SystemZImpOpBase + 0, 1536, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2702 = VLLEZ |
4463 | | { 2701, 4, 1, 6, 553, 0, 0, SystemZImpOpBase + 0, 1532, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #2701 = VLLEBRZH |
4464 | | { 2700, 4, 1, 6, 553, 0, 0, SystemZImpOpBase + 0, 1532, 0|(1ULL<<MCID::MayLoad), 0x100ULL }, // Inst #2700 = VLLEBRZG |
4465 | | { 2699, 4, 1, 6, 553, 0, 0, SystemZImpOpBase + 0, 1532, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #2699 = VLLEBRZF |
4466 | | { 2698, 4, 1, 6, 553, 0, 0, SystemZImpOpBase + 0, 1532, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #2698 = VLLEBRZE |
4467 | | { 2697, 5, 1, 6, 553, 0, 0, SystemZImpOpBase + 0, 1536, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2697 = VLLEBRZ |
4468 | | { 2696, 4, 1, 6, 536, 0, 0, SystemZImpOpBase + 0, 1560, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2696 = VLL |
4469 | | { 2695, 3, 1, 6, 752, 0, 0, SystemZImpOpBase + 0, 1529, 0, 0x0ULL }, // Inst #2695 = VLIP |
4470 | | { 2694, 4, 1, 6, 526, 0, 0, SystemZImpOpBase + 0, 1556, 0, 0x0ULL }, // Inst #2694 = VLGVH |
4471 | | { 2693, 4, 1, 6, 526, 0, 0, SystemZImpOpBase + 0, 1556, 0, 0x0ULL }, // Inst #2693 = VLGVG |
4472 | | { 2692, 4, 1, 6, 526, 0, 0, SystemZImpOpBase + 0, 1556, 0, 0x0ULL }, // Inst #2692 = VLGVF |
4473 | | { 2691, 4, 1, 6, 526, 0, 0, SystemZImpOpBase + 0, 1556, 0, 0x0ULL }, // Inst #2691 = VLGVB |
4474 | | { 2690, 5, 1, 6, 526, 0, 0, SystemZImpOpBase + 0, 1551, 0, 0x0ULL }, // Inst #2690 = VLGV |
4475 | | { 2689, 4, 1, 6, 551, 0, 0, SystemZImpOpBase + 0, 1532, 0|(1ULL<<MCID::MayLoad), 0x200ULL }, // Inst #2689 = VLERH |
4476 | | { 2688, 4, 1, 6, 551, 0, 0, SystemZImpOpBase + 0, 1532, 0|(1ULL<<MCID::MayLoad), 0x200ULL }, // Inst #2688 = VLERG |
4477 | | { 2687, 4, 1, 6, 551, 0, 0, SystemZImpOpBase + 0, 1532, 0|(1ULL<<MCID::MayLoad), 0x200ULL }, // Inst #2687 = VLERF |
4478 | | { 2686, 5, 1, 6, 551, 0, 0, SystemZImpOpBase + 0, 1536, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2686 = VLER |
4479 | | { 2685, 4, 1, 6, 534, 0, 0, SystemZImpOpBase + 0, 1547, 0, 0x0ULL }, // Inst #2685 = VLEIH |
4480 | | { 2684, 4, 1, 6, 534, 0, 0, SystemZImpOpBase + 0, 1547, 0, 0x0ULL }, // Inst #2684 = VLEIG |
4481 | | { 2683, 4, 1, 6, 534, 0, 0, SystemZImpOpBase + 0, 1547, 0, 0x0ULL }, // Inst #2683 = VLEIF |
4482 | | { 2682, 4, 1, 6, 534, 0, 0, SystemZImpOpBase + 0, 1547, 0, 0x0ULL }, // Inst #2682 = VLEIB |
4483 | | { 2681, 6, 1, 6, 540, 0, 0, SystemZImpOpBase + 0, 1541, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #2681 = VLEH |
4484 | | { 2680, 6, 1, 6, 540, 0, 0, SystemZImpOpBase + 0, 1541, 0|(1ULL<<MCID::MayLoad), 0x100ULL }, // Inst #2680 = VLEG |
4485 | | { 2679, 6, 1, 6, 540, 0, 0, SystemZImpOpBase + 0, 1541, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #2679 = VLEF |
4486 | | { 2678, 4, 1, 6, 654, 1, 0, SystemZImpOpBase + 12, 1456, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2678 = VLEDB |
4487 | | { 2677, 5, 1, 6, 653, 1, 0, SystemZImpOpBase + 12, 1451, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2677 = VLED |
4488 | | { 2676, 6, 1, 6, 552, 0, 0, SystemZImpOpBase + 0, 1541, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #2676 = VLEBRH |
4489 | | { 2675, 6, 1, 6, 552, 0, 0, SystemZImpOpBase + 0, 1541, 0|(1ULL<<MCID::MayLoad), 0x100ULL }, // Inst #2675 = VLEBRG |
4490 | | { 2674, 6, 1, 6, 552, 0, 0, SystemZImpOpBase + 0, 1541, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #2674 = VLEBRF |
4491 | | { 2673, 6, 1, 6, 540, 0, 0, SystemZImpOpBase + 0, 1541, 0|(1ULL<<MCID::MayLoad), 0x20ULL }, // Inst #2673 = VLEB |
4492 | | { 2672, 2, 1, 6, 654, 1, 0, SystemZImpOpBase + 12, 403, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2672 = VLDEB |
4493 | | { 2671, 4, 1, 6, 653, 1, 0, SystemZImpOpBase + 12, 1456, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2671 = VLDE |
4494 | | { 2670, 2, 1, 6, 589, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2670 = VLCH |
4495 | | { 2669, 2, 1, 6, 589, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2669 = VLCG |
4496 | | { 2668, 2, 1, 6, 589, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2668 = VLCF |
4497 | | { 2667, 2, 1, 6, 589, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2667 = VLCB |
4498 | | { 2666, 3, 1, 6, 589, 0, 0, SystemZImpOpBase + 0, 1460, 0, 0x0ULL }, // Inst #2666 = VLC |
4499 | | { 2665, 4, 1, 6, 554, 0, 0, SystemZImpOpBase + 0, 1532, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #2665 = VLBRREPH |
4500 | | { 2664, 4, 1, 6, 554, 0, 0, SystemZImpOpBase + 0, 1532, 0|(1ULL<<MCID::MayLoad), 0x100ULL }, // Inst #2664 = VLBRREPG |
4501 | | { 2663, 4, 1, 6, 554, 0, 0, SystemZImpOpBase + 0, 1532, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #2663 = VLBRREPF |
4502 | | { 2662, 5, 1, 6, 554, 0, 0, SystemZImpOpBase + 0, 1536, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2662 = VLBRREP |
4503 | | { 2661, 4, 1, 6, 550, 0, 0, SystemZImpOpBase + 0, 1532, 0|(1ULL<<MCID::MayLoad), 0x200ULL }, // Inst #2661 = VLBRQ |
4504 | | { 2660, 4, 1, 6, 550, 0, 0, SystemZImpOpBase + 0, 1532, 0|(1ULL<<MCID::MayLoad), 0x200ULL }, // Inst #2660 = VLBRH |
4505 | | { 2659, 4, 1, 6, 550, 0, 0, SystemZImpOpBase + 0, 1532, 0|(1ULL<<MCID::MayLoad), 0x200ULL }, // Inst #2659 = VLBRG |
4506 | | { 2658, 4, 1, 6, 550, 0, 0, SystemZImpOpBase + 0, 1532, 0|(1ULL<<MCID::MayLoad), 0x200ULL }, // Inst #2658 = VLBRF |
4507 | | { 2657, 5, 1, 6, 550, 0, 0, SystemZImpOpBase + 0, 1536, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2657 = VLBR |
4508 | | { 2656, 5, 1, 6, 536, 0, 0, SystemZImpOpBase + 0, 1536, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2656 = VLBB |
4509 | | { 2655, 5, 1, 6, 535, 0, 0, SystemZImpOpBase + 0, 1536, 0|(1ULL<<MCID::MayLoad), 0x200ULL }, // Inst #2655 = VLAlign |
4510 | | { 2654, 4, 1, 6, 535, 0, 0, SystemZImpOpBase + 0, 1532, 0|(1ULL<<MCID::MayLoad), 0x200ULL }, // Inst #2654 = VL |
4511 | | { 2653, 2, 1, 6, 742, 0, 1, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2653 = VISTRHS |
4512 | | { 2652, 3, 1, 6, 741, 0, 0, SystemZImpOpBase + 0, 1460, 0, 0x0ULL }, // Inst #2652 = VISTRH |
4513 | | { 2651, 2, 1, 6, 742, 0, 1, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2651 = VISTRFS |
4514 | | { 2650, 3, 1, 6, 741, 0, 0, SystemZImpOpBase + 0, 1460, 0, 0x0ULL }, // Inst #2650 = VISTRF |
4515 | | { 2649, 2, 1, 6, 742, 0, 1, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2649 = VISTRBS |
4516 | | { 2648, 3, 1, 6, 741, 0, 0, SystemZImpOpBase + 0, 1460, 0, 0x0ULL }, // Inst #2648 = VISTRB |
4517 | | { 2647, 4, 1, 6, 741, 0, 1, SystemZImpOpBase + 0, 1456, 0, 0x0ULL }, // Inst #2647 = VISTR |
4518 | | { 2646, 3, 1, 6, 532, 0, 0, SystemZImpOpBase + 0, 1529, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2646 = VGMH |
4519 | | { 2645, 3, 1, 6, 532, 0, 0, SystemZImpOpBase + 0, 1529, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2645 = VGMG |
4520 | | { 2644, 3, 1, 6, 532, 0, 0, SystemZImpOpBase + 0, 1529, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2644 = VGMF |
4521 | | { 2643, 3, 1, 6, 532, 0, 0, SystemZImpOpBase + 0, 1529, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2643 = VGMB |
4522 | | { 2642, 4, 1, 6, 532, 0, 0, SystemZImpOpBase + 0, 1525, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2642 = VGM |
4523 | | { 2641, 3, 1, 6, 588, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2641 = VGFMH |
4524 | | { 2640, 3, 1, 6, 588, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2640 = VGFMG |
4525 | | { 2639, 3, 1, 6, 588, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2639 = VGFMF |
4526 | | { 2638, 3, 1, 6, 588, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2638 = VGFMB |
4527 | | { 2637, 4, 1, 6, 587, 0, 0, SystemZImpOpBase + 0, 1447, 0, 0x0ULL }, // Inst #2637 = VGFMAH |
4528 | | { 2636, 4, 1, 6, 587, 0, 0, SystemZImpOpBase + 0, 1447, 0, 0x0ULL }, // Inst #2636 = VGFMAG |
4529 | | { 2635, 4, 1, 6, 587, 0, 0, SystemZImpOpBase + 0, 1447, 0, 0x0ULL }, // Inst #2635 = VGFMAF |
4530 | | { 2634, 4, 1, 6, 587, 0, 0, SystemZImpOpBase + 0, 1447, 0, 0x0ULL }, // Inst #2634 = VGFMAB |
4531 | | { 2633, 5, 1, 6, 587, 0, 0, SystemZImpOpBase + 0, 1442, 0, 0x0ULL }, // Inst #2633 = VGFMA |
4532 | | { 2632, 4, 1, 6, 586, 0, 0, SystemZImpOpBase + 0, 1435, 0, 0x0ULL }, // Inst #2632 = VGFM |
4533 | | { 2631, 6, 1, 6, 541, 0, 0, SystemZImpOpBase + 0, 1519, 0|(1ULL<<MCID::MayLoad), 0x100ULL }, // Inst #2631 = VGEG |
4534 | | { 2630, 6, 1, 6, 541, 0, 0, SystemZImpOpBase + 0, 1519, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #2630 = VGEF |
4535 | | { 2629, 2, 1, 6, 531, 0, 0, SystemZImpOpBase + 0, 1517, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2629 = VGBM |
4536 | | { 2628, 3, 1, 6, 681, 0, 1, SystemZImpOpBase + 0, 1460, 0, 0x0ULL }, // Inst #2628 = VFTCISB |
4537 | | { 2627, 3, 1, 6, 680, 0, 1, SystemZImpOpBase + 0, 1460, 0, 0x0ULL }, // Inst #2627 = VFTCIDB |
4538 | | { 2626, 5, 1, 6, 679, 0, 1, SystemZImpOpBase + 0, 1451, 0, 0x0ULL }, // Inst #2626 = VFTCI |
4539 | | { 2625, 3, 1, 6, 686, 1, 0, SystemZImpOpBase + 12, 1439, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2625 = VFSSB |
4540 | | { 2624, 2, 1, 6, 707, 1, 0, SystemZImpOpBase + 12, 403, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2624 = VFSQSB |
4541 | | { 2623, 2, 1, 6, 705, 1, 0, SystemZImpOpBase + 12, 403, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2623 = VFSQDB |
4542 | | { 2622, 4, 1, 6, 704, 1, 0, SystemZImpOpBase + 12, 1456, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2622 = VFSQ |
4543 | | { 2621, 3, 1, 6, 684, 1, 0, SystemZImpOpBase + 12, 1439, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2621 = VFSDB |
4544 | | { 2620, 5, 1, 6, 683, 1, 0, SystemZImpOpBase + 12, 415, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2620 = VFS |
4545 | | { 2619, 3, 1, 6, 668, 0, 0, SystemZImpOpBase + 0, 1460, 0, 0x0ULL }, // Inst #2619 = VFPSOSB |
4546 | | { 2618, 3, 1, 6, 667, 0, 0, SystemZImpOpBase + 0, 1460, 0, 0x0ULL }, // Inst #2618 = VFPSODB |
4547 | | { 2617, 5, 1, 6, 666, 0, 0, SystemZImpOpBase + 0, 1451, 0, 0x0ULL }, // Inst #2617 = VFPSO |
4548 | | { 2616, 4, 1, 6, 696, 1, 0, SystemZImpOpBase + 12, 1447, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2616 = VFNMSSB |
4549 | | { 2615, 4, 1, 6, 694, 1, 0, SystemZImpOpBase + 12, 1447, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2615 = VFNMSDB |
4550 | | { 2614, 6, 1, 6, 693, 1, 0, SystemZImpOpBase + 12, 1511, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2614 = VFNMS |
4551 | | { 2613, 4, 1, 6, 696, 1, 0, SystemZImpOpBase + 12, 1447, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2613 = VFNMASB |
4552 | | { 2612, 4, 1, 6, 694, 1, 0, SystemZImpOpBase + 12, 1447, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2612 = VFNMADB |
4553 | | { 2611, 6, 1, 6, 693, 1, 0, SystemZImpOpBase + 12, 1511, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2611 = VFNMA |
4554 | | { 2610, 4, 1, 6, 696, 1, 0, SystemZImpOpBase + 12, 1447, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2610 = VFMSSB |
4555 | | { 2609, 4, 1, 6, 877, 1, 0, SystemZImpOpBase + 12, 1447, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2609 = VFMSDB |
4556 | | { 2608, 3, 1, 6, 691, 1, 0, SystemZImpOpBase + 12, 1439, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2608 = VFMSB |
4557 | | { 2607, 6, 1, 6, 876, 1, 0, SystemZImpOpBase + 12, 1511, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2607 = VFMS |
4558 | | { 2606, 4, 1, 6, 676, 1, 0, SystemZImpOpBase + 12, 1435, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2606 = VFMINSB |
4559 | | { 2605, 4, 1, 6, 674, 1, 0, SystemZImpOpBase + 12, 1435, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2605 = VFMINDB |
4560 | | { 2604, 6, 1, 6, 673, 1, 0, SystemZImpOpBase + 12, 1505, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2604 = VFMIN |
4561 | | { 2603, 3, 1, 6, 689, 1, 0, SystemZImpOpBase + 12, 1439, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2603 = VFMDB |
4562 | | { 2602, 4, 1, 6, 676, 1, 0, SystemZImpOpBase + 12, 1435, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2602 = VFMAXSB |
4563 | | { 2601, 4, 1, 6, 674, 1, 0, SystemZImpOpBase + 12, 1435, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2601 = VFMAXDB |
4564 | | { 2600, 6, 1, 6, 673, 1, 0, SystemZImpOpBase + 12, 1505, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2600 = VFMAX |
4565 | | { 2599, 4, 1, 6, 696, 1, 0, SystemZImpOpBase + 12, 1447, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2599 = VFMASB |
4566 | | { 2598, 4, 1, 6, 877, 1, 0, SystemZImpOpBase + 12, 1447, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2598 = VFMADB |
4567 | | { 2597, 6, 1, 6, 876, 1, 0, SystemZImpOpBase + 12, 1511, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2597 = VFMA |
4568 | | { 2596, 5, 1, 6, 865, 1, 0, SystemZImpOpBase + 12, 415, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2596 = VFM |
4569 | | { 2595, 4, 1, 6, 657, 1, 0, SystemZImpOpBase + 12, 1456, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2595 = VFLRD |
4570 | | { 2594, 5, 1, 6, 656, 1, 0, SystemZImpOpBase + 12, 1451, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2594 = VFLR |
4571 | | { 2593, 2, 1, 6, 671, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2593 = VFLPSB |
4572 | | { 2592, 2, 1, 6, 670, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2592 = VFLPDB |
4573 | | { 2591, 2, 1, 6, 671, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2591 = VFLNSB |
4574 | | { 2590, 2, 1, 6, 670, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2590 = VFLNDB |
4575 | | { 2589, 2, 1, 6, 657, 1, 0, SystemZImpOpBase + 12, 403, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2589 = VFLLS |
4576 | | { 2588, 4, 1, 6, 656, 1, 0, SystemZImpOpBase + 12, 1456, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2588 = VFLL |
4577 | | { 2587, 2, 1, 6, 671, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2587 = VFLCSB |
4578 | | { 2586, 2, 1, 6, 670, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2586 = VFLCDB |
4579 | | { 2585, 3, 1, 6, 721, 1, 1, SystemZImpOpBase + 1, 1439, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2585 = VFKHSBS |
4580 | | { 2584, 3, 1, 6, 713, 1, 0, SystemZImpOpBase + 12, 1439, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2584 = VFKHSB |
4581 | | { 2583, 3, 1, 6, 721, 1, 1, SystemZImpOpBase + 1, 1439, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2583 = VFKHESBS |
4582 | | { 2582, 3, 1, 6, 713, 1, 0, SystemZImpOpBase + 12, 1439, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2582 = VFKHESB |
4583 | | { 2581, 3, 1, 6, 719, 1, 1, SystemZImpOpBase + 1, 1439, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2581 = VFKHEDBS |
4584 | | { 2580, 3, 1, 6, 710, 1, 0, SystemZImpOpBase + 12, 1439, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2580 = VFKHEDB |
4585 | | { 2579, 3, 1, 6, 719, 1, 1, SystemZImpOpBase + 1, 1439, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2579 = VFKHDBS |
4586 | | { 2578, 3, 1, 6, 710, 1, 0, SystemZImpOpBase + 12, 1439, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2578 = VFKHDB |
4587 | | { 2577, 3, 1, 6, 721, 1, 1, SystemZImpOpBase + 1, 1439, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2577 = VFKESBS |
4588 | | { 2576, 3, 1, 6, 713, 1, 0, SystemZImpOpBase + 12, 1439, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2576 = VFKESB |
4589 | | { 2575, 3, 1, 6, 719, 1, 1, SystemZImpOpBase + 1, 1439, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2575 = VFKEDBS |
4590 | | { 2574, 3, 1, 6, 710, 1, 0, SystemZImpOpBase + 12, 1439, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2574 = VFKEDB |
4591 | | { 2573, 4, 1, 6, 663, 1, 0, SystemZImpOpBase + 12, 1456, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2573 = VFISB |
4592 | | { 2572, 4, 1, 6, 661, 1, 0, SystemZImpOpBase + 12, 1456, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2572 = VFIDB |
4593 | | { 2571, 5, 1, 6, 864, 1, 0, SystemZImpOpBase + 12, 1451, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2571 = VFI |
4594 | | { 2570, 3, 1, 6, 740, 0, 1, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2570 = VFENEZHS |
4595 | | { 2569, 3, 1, 6, 739, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2569 = VFENEZH |
4596 | | { 2568, 3, 1, 6, 740, 0, 1, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2568 = VFENEZFS |
4597 | | { 2567, 3, 1, 6, 739, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2567 = VFENEZF |
4598 | | { 2566, 3, 1, 6, 740, 0, 1, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2566 = VFENEZBS |
4599 | | { 2565, 3, 1, 6, 739, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2565 = VFENEZB |
4600 | | { 2564, 3, 1, 6, 740, 0, 1, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2564 = VFENEHS |
4601 | | { 2563, 4, 1, 6, 739, 0, 0, SystemZImpOpBase + 0, 1435, 0, 0x0ULL }, // Inst #2563 = VFENEH |
4602 | | { 2562, 3, 1, 6, 740, 0, 1, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2562 = VFENEFS |
4603 | | { 2561, 4, 1, 6, 739, 0, 0, SystemZImpOpBase + 0, 1435, 0, 0x0ULL }, // Inst #2561 = VFENEF |
4604 | | { 2560, 3, 1, 6, 740, 0, 1, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2560 = VFENEBS |
4605 | | { 2559, 4, 1, 6, 739, 0, 0, SystemZImpOpBase + 0, 1435, 0, 0x0ULL }, // Inst #2559 = VFENEB |
4606 | | { 2558, 5, 1, 6, 739, 0, 1, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2558 = VFENE |
4607 | | { 2557, 3, 1, 6, 738, 0, 1, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2557 = VFEEZHS |
4608 | | { 2556, 3, 1, 6, 737, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2556 = VFEEZH |
4609 | | { 2555, 3, 1, 6, 738, 0, 1, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2555 = VFEEZFS |
4610 | | { 2554, 3, 1, 6, 737, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2554 = VFEEZF |
4611 | | { 2553, 3, 1, 6, 738, 0, 1, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2553 = VFEEZBS |
4612 | | { 2552, 3, 1, 6, 737, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2552 = VFEEZB |
4613 | | { 2551, 3, 1, 6, 738, 0, 1, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2551 = VFEEHS |
4614 | | { 2550, 4, 1, 6, 737, 0, 0, SystemZImpOpBase + 0, 1435, 0, 0x0ULL }, // Inst #2550 = VFEEH |
4615 | | { 2549, 3, 1, 6, 738, 0, 1, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2549 = VFEEFS |
4616 | | { 2548, 4, 1, 6, 737, 0, 0, SystemZImpOpBase + 0, 1435, 0, 0x0ULL }, // Inst #2548 = VFEEF |
4617 | | { 2547, 3, 1, 6, 738, 0, 1, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2547 = VFEEBS |
4618 | | { 2546, 4, 1, 6, 737, 0, 0, SystemZImpOpBase + 0, 1435, 0, 0x0ULL }, // Inst #2546 = VFEEB |
4619 | | { 2545, 5, 1, 6, 737, 0, 1, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2545 = VFEE |
4620 | | { 2544, 3, 1, 6, 702, 1, 0, SystemZImpOpBase + 12, 1439, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2544 = VFDSB |
4621 | | { 2543, 3, 1, 6, 700, 1, 0, SystemZImpOpBase + 12, 1439, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2543 = VFDDB |
4622 | | { 2542, 5, 1, 6, 699, 1, 0, SystemZImpOpBase + 12, 415, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2542 = VFD |
4623 | | { 2541, 3, 1, 6, 721, 1, 1, SystemZImpOpBase + 1, 1439, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2541 = VFCHSBS |
4624 | | { 2540, 3, 1, 6, 713, 1, 0, SystemZImpOpBase + 12, 1439, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2540 = VFCHSB |
4625 | | { 2539, 3, 1, 6, 721, 1, 1, SystemZImpOpBase + 1, 1439, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2539 = VFCHESBS |
4626 | | { 2538, 3, 1, 6, 713, 1, 0, SystemZImpOpBase + 12, 1439, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2538 = VFCHESB |
4627 | | { 2537, 3, 1, 6, 718, 1, 1, SystemZImpOpBase + 1, 1439, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2537 = VFCHEDBS |
4628 | | { 2536, 3, 1, 6, 879, 1, 0, SystemZImpOpBase + 12, 1439, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2536 = VFCHEDB |
4629 | | { 2535, 6, 1, 6, 709, 1, 0, SystemZImpOpBase + 12, 1505, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2535 = VFCHE |
4630 | | { 2534, 3, 1, 6, 718, 1, 1, SystemZImpOpBase + 1, 1439, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2534 = VFCHDBS |
4631 | | { 2533, 3, 1, 6, 879, 1, 0, SystemZImpOpBase + 12, 1439, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2533 = VFCHDB |
4632 | | { 2532, 6, 1, 6, 709, 1, 0, SystemZImpOpBase + 12, 1505, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2532 = VFCH |
4633 | | { 2531, 3, 1, 6, 721, 1, 1, SystemZImpOpBase + 1, 1439, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2531 = VFCESBS |
4634 | | { 2530, 3, 1, 6, 713, 1, 0, SystemZImpOpBase + 12, 1439, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2530 = VFCESB |
4635 | | { 2529, 3, 1, 6, 718, 1, 1, SystemZImpOpBase + 1, 1439, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2529 = VFCEDBS |
4636 | | { 2528, 3, 1, 6, 879, 1, 0, SystemZImpOpBase + 12, 1439, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2528 = VFCEDB |
4637 | | { 2527, 6, 1, 6, 709, 1, 0, SystemZImpOpBase + 12, 1505, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2527 = VFCE |
4638 | | { 2526, 3, 1, 6, 686, 1, 0, SystemZImpOpBase + 12, 1439, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2526 = VFASB |
4639 | | { 2525, 4, 1, 6, 736, 0, 1, SystemZImpOpBase + 0, 1435, 0, 0x0ULL }, // Inst #2525 = VFAEZHS |
4640 | | { 2524, 4, 1, 6, 735, 0, 0, SystemZImpOpBase + 0, 1435, 0, 0x0ULL }, // Inst #2524 = VFAEZH |
4641 | | { 2523, 4, 1, 6, 736, 0, 1, SystemZImpOpBase + 0, 1435, 0, 0x0ULL }, // Inst #2523 = VFAEZFS |
4642 | | { 2522, 4, 1, 6, 735, 0, 0, SystemZImpOpBase + 0, 1435, 0, 0x0ULL }, // Inst #2522 = VFAEZF |
4643 | | { 2521, 4, 1, 6, 736, 0, 1, SystemZImpOpBase + 0, 1435, 0, 0x0ULL }, // Inst #2521 = VFAEZBS |
4644 | | { 2520, 4, 1, 6, 735, 0, 0, SystemZImpOpBase + 0, 1435, 0, 0x0ULL }, // Inst #2520 = VFAEZB |
4645 | | { 2519, 4, 1, 6, 734, 0, 1, SystemZImpOpBase + 0, 1435, 0, 0x0ULL }, // Inst #2519 = VFAEHS |
4646 | | { 2518, 4, 1, 6, 733, 0, 0, SystemZImpOpBase + 0, 1435, 0, 0x0ULL }, // Inst #2518 = VFAEH |
4647 | | { 2517, 4, 1, 6, 734, 0, 1, SystemZImpOpBase + 0, 1435, 0, 0x0ULL }, // Inst #2517 = VFAEFS |
4648 | | { 2516, 4, 1, 6, 733, 0, 0, SystemZImpOpBase + 0, 1435, 0, 0x0ULL }, // Inst #2516 = VFAEF |
4649 | | { 2515, 4, 1, 6, 734, 0, 1, SystemZImpOpBase + 0, 1435, 0, 0x0ULL }, // Inst #2515 = VFAEBS |
4650 | | { 2514, 4, 1, 6, 732, 0, 0, SystemZImpOpBase + 0, 1435, 0, 0x0ULL }, // Inst #2514 = VFAEB |
4651 | | { 2513, 5, 1, 6, 732, 0, 1, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2513 = VFAE |
4652 | | { 2512, 3, 1, 6, 684, 1, 0, SystemZImpOpBase + 12, 1439, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2512 = VFADB |
4653 | | { 2511, 5, 1, 6, 683, 1, 0, SystemZImpOpBase + 12, 415, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2511 = VFA |
4654 | | { 2510, 3, 1, 6, 619, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2510 = VESRLVH |
4655 | | { 2509, 3, 1, 6, 619, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2509 = VESRLVG |
4656 | | { 2508, 3, 1, 6, 619, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2508 = VESRLVF |
4657 | | { 2507, 3, 1, 6, 619, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2507 = VESRLVB |
4658 | | { 2506, 4, 1, 6, 619, 0, 0, SystemZImpOpBase + 0, 1435, 0, 0x0ULL }, // Inst #2506 = VESRLV |
4659 | | { 2505, 4, 1, 6, 618, 0, 0, SystemZImpOpBase + 0, 1501, 0, 0x0ULL }, // Inst #2505 = VESRLH |
4660 | | { 2504, 4, 1, 6, 618, 0, 0, SystemZImpOpBase + 0, 1501, 0, 0x0ULL }, // Inst #2504 = VESRLG |
4661 | | { 2503, 4, 1, 6, 618, 0, 0, SystemZImpOpBase + 0, 1501, 0, 0x0ULL }, // Inst #2503 = VESRLF |
4662 | | { 2502, 4, 1, 6, 618, 0, 0, SystemZImpOpBase + 0, 1501, 0, 0x0ULL }, // Inst #2502 = VESRLB |
4663 | | { 2501, 5, 1, 6, 618, 0, 0, SystemZImpOpBase + 0, 1496, 0, 0x0ULL }, // Inst #2501 = VESRL |
4664 | | { 2500, 3, 1, 6, 617, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2500 = VESRAVH |
4665 | | { 2499, 3, 1, 6, 617, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2499 = VESRAVG |
4666 | | { 2498, 3, 1, 6, 617, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2498 = VESRAVF |
4667 | | { 2497, 3, 1, 6, 617, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2497 = VESRAVB |
4668 | | { 2496, 4, 1, 6, 617, 0, 0, SystemZImpOpBase + 0, 1435, 0, 0x0ULL }, // Inst #2496 = VESRAV |
4669 | | { 2495, 4, 1, 6, 616, 0, 0, SystemZImpOpBase + 0, 1501, 0, 0x0ULL }, // Inst #2495 = VESRAH |
4670 | | { 2494, 4, 1, 6, 616, 0, 0, SystemZImpOpBase + 0, 1501, 0, 0x0ULL }, // Inst #2494 = VESRAG |
4671 | | { 2493, 4, 1, 6, 616, 0, 0, SystemZImpOpBase + 0, 1501, 0, 0x0ULL }, // Inst #2493 = VESRAF |
4672 | | { 2492, 4, 1, 6, 616, 0, 0, SystemZImpOpBase + 0, 1501, 0, 0x0ULL }, // Inst #2492 = VESRAB |
4673 | | { 2491, 5, 1, 6, 616, 0, 0, SystemZImpOpBase + 0, 1496, 0, 0x0ULL }, // Inst #2491 = VESRA |
4674 | | { 2490, 3, 1, 6, 615, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2490 = VESLVH |
4675 | | { 2489, 3, 1, 6, 615, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2489 = VESLVG |
4676 | | { 2488, 3, 1, 6, 615, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2488 = VESLVF |
4677 | | { 2487, 3, 1, 6, 615, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2487 = VESLVB |
4678 | | { 2486, 4, 1, 6, 615, 0, 0, SystemZImpOpBase + 0, 1435, 0, 0x0ULL }, // Inst #2486 = VESLV |
4679 | | { 2485, 4, 1, 6, 614, 0, 0, SystemZImpOpBase + 0, 1501, 0, 0x0ULL }, // Inst #2485 = VESLH |
4680 | | { 2484, 4, 1, 6, 614, 0, 0, SystemZImpOpBase + 0, 1501, 0, 0x0ULL }, // Inst #2484 = VESLG |
4681 | | { 2483, 4, 1, 6, 614, 0, 0, SystemZImpOpBase + 0, 1501, 0, 0x0ULL }, // Inst #2483 = VESLF |
4682 | | { 2482, 4, 1, 6, 614, 0, 0, SystemZImpOpBase + 0, 1501, 0, 0x0ULL }, // Inst #2482 = VESLB |
4683 | | { 2481, 5, 1, 6, 614, 0, 0, SystemZImpOpBase + 0, 1496, 0, 0x0ULL }, // Inst #2481 = VESL |
4684 | | { 2480, 3, 1, 6, 612, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2480 = VERLLVH |
4685 | | { 2479, 3, 1, 6, 612, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2479 = VERLLVG |
4686 | | { 2478, 3, 1, 6, 612, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2478 = VERLLVF |
4687 | | { 2477, 3, 1, 6, 612, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2477 = VERLLVB |
4688 | | { 2476, 4, 1, 6, 612, 0, 0, SystemZImpOpBase + 0, 1435, 0, 0x0ULL }, // Inst #2476 = VERLLV |
4689 | | { 2475, 4, 1, 6, 611, 0, 0, SystemZImpOpBase + 0, 1501, 0, 0x0ULL }, // Inst #2475 = VERLLH |
4690 | | { 2474, 4, 1, 6, 611, 0, 0, SystemZImpOpBase + 0, 1501, 0, 0x0ULL }, // Inst #2474 = VERLLG |
4691 | | { 2473, 4, 1, 6, 611, 0, 0, SystemZImpOpBase + 0, 1501, 0, 0x0ULL }, // Inst #2473 = VERLLF |
4692 | | { 2472, 4, 1, 6, 611, 0, 0, SystemZImpOpBase + 0, 1501, 0, 0x0ULL }, // Inst #2472 = VERLLB |
4693 | | { 2471, 5, 1, 6, 611, 0, 0, SystemZImpOpBase + 0, 1496, 0, 0x0ULL }, // Inst #2471 = VERLL |
4694 | | { 2470, 5, 1, 6, 613, 0, 0, SystemZImpOpBase + 0, 1491, 0, 0x0ULL }, // Inst #2470 = VERIMH |
4695 | | { 2469, 5, 1, 6, 613, 0, 0, SystemZImpOpBase + 0, 1491, 0, 0x0ULL }, // Inst #2469 = VERIMG |
4696 | | { 2468, 5, 1, 6, 613, 0, 0, SystemZImpOpBase + 0, 1491, 0, 0x0ULL }, // Inst #2468 = VERIMF |
4697 | | { 2467, 5, 1, 6, 613, 0, 0, SystemZImpOpBase + 0, 1491, 0, 0x0ULL }, // Inst #2467 = VERIMB |
4698 | | { 2466, 6, 1, 6, 613, 0, 0, SystemZImpOpBase + 0, 1485, 0, 0x0ULL }, // Inst #2466 = VERIM |
4699 | | { 2465, 2, 0, 6, 633, 0, 1, SystemZImpOpBase + 0, 403, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2465 = VECLH |
4700 | | { 2464, 2, 0, 6, 633, 0, 1, SystemZImpOpBase + 0, 403, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2464 = VECLG |
4701 | | { 2463, 2, 0, 6, 633, 0, 1, SystemZImpOpBase + 0, 403, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2463 = VECLF |
4702 | | { 2462, 2, 0, 6, 633, 0, 1, SystemZImpOpBase + 0, 403, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2462 = VECLB |
4703 | | { 2461, 3, 0, 6, 633, 0, 1, SystemZImpOpBase + 0, 1460, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2461 = VECL |
4704 | | { 2460, 2, 0, 6, 632, 0, 1, SystemZImpOpBase + 0, 403, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2460 = VECH |
4705 | | { 2459, 2, 0, 6, 632, 0, 1, SystemZImpOpBase + 0, 403, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2459 = VECG |
4706 | | { 2458, 2, 0, 6, 632, 0, 1, SystemZImpOpBase + 0, 403, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2458 = VECF |
4707 | | { 2457, 2, 0, 6, 632, 0, 1, SystemZImpOpBase + 0, 403, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2457 = VECB |
4708 | | { 2456, 3, 0, 6, 632, 0, 1, SystemZImpOpBase + 0, 1460, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2456 = VEC |
4709 | | { 2455, 5, 1, 6, 759, 0, 1, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2455 = VDP |
4710 | | { 2454, 4, 1, 6, 756, 0, 1, SystemZImpOpBase + 0, 1481, 0, 0x0ULL }, // Inst #2454 = VCVDG |
4711 | | { 2453, 4, 1, 6, 756, 0, 1, SystemZImpOpBase + 0, 1477, 0, 0x0ULL }, // Inst #2453 = VCVD |
4712 | | { 2452, 4, 1, 6, 755, 0, 1, SystemZImpOpBase + 0, 1473, 0, 0x0ULL }, // Inst #2452 = VCVBOpt |
4713 | | { 2451, 4, 1, 6, 755, 0, 1, SystemZImpOpBase + 0, 1469, 0, 0x0ULL }, // Inst #2451 = VCVBGOpt |
4714 | | { 2450, 3, 1, 6, 866, 0, 1, SystemZImpOpBase + 0, 1466, 0, 0x0ULL }, // Inst #2450 = VCVBG |
4715 | | { 2449, 3, 1, 6, 866, 0, 1, SystemZImpOpBase + 0, 1463, 0, 0x0ULL }, // Inst #2449 = VCVB |
4716 | | { 2448, 2, 1, 6, 584, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2448 = VCTZH |
4717 | | { 2447, 2, 1, 6, 584, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2447 = VCTZG |
4718 | | { 2446, 2, 1, 6, 584, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2446 = VCTZF |
4719 | | { 2445, 2, 1, 6, 584, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2445 = VCTZB |
4720 | | { 2444, 3, 1, 6, 584, 0, 0, SystemZImpOpBase + 0, 1460, 0, 0x0ULL }, // Inst #2444 = VCTZ |
4721 | | { 2443, 4, 1, 6, 766, 0, 0, SystemZImpOpBase + 0, 1435, 0, 0x0ULL }, // Inst #2443 = VCSPH |
4722 | | { 2442, 5, 1, 6, 647, 1, 0, SystemZImpOpBase + 12, 1451, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2442 = VCSFP |
4723 | | { 2441, 5, 1, 6, 751, 1, 0, SystemZImpOpBase + 12, 415, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2441 = VCRNF |
4724 | | { 2440, 3, 0, 6, 763, 0, 1, SystemZImpOpBase + 0, 1460, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2440 = VCP |
4725 | | { 2439, 4, 1, 6, 751, 1, 0, SystemZImpOpBase + 12, 1456, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2439 = VCNF |
4726 | | { 2438, 2, 1, 6, 583, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2438 = VCLZH |
4727 | | { 2437, 2, 1, 6, 583, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2437 = VCLZG |
4728 | | { 2436, 2, 1, 6, 583, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2436 = VCLZF |
4729 | | { 2435, 3, 1, 6, 767, 0, 1, SystemZImpOpBase + 0, 1460, 0, 0x0ULL }, // Inst #2435 = VCLZDP |
4730 | | { 2434, 2, 1, 6, 583, 0, 0, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2434 = VCLZB |
4731 | | { 2433, 3, 1, 6, 583, 0, 0, SystemZImpOpBase + 0, 1460, 0, 0x0ULL }, // Inst #2433 = VCLZ |
4732 | | { 2432, 4, 1, 6, 649, 1, 0, SystemZImpOpBase + 12, 1456, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2432 = VCLGDB |
4733 | | { 2431, 5, 1, 6, 648, 1, 0, SystemZImpOpBase + 12, 1451, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2431 = VCLGD |
4734 | | { 2430, 5, 1, 6, 647, 1, 0, SystemZImpOpBase + 12, 1451, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2430 = VCLFP |
4735 | | { 2429, 4, 1, 6, 750, 1, 0, SystemZImpOpBase + 12, 1456, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2429 = VCLFNL |
4736 | | { 2428, 4, 1, 6, 750, 1, 0, SystemZImpOpBase + 12, 1456, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2428 = VCLFNH |
4737 | | { 2427, 4, 1, 6, 651, 1, 0, SystemZImpOpBase + 12, 1456, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2427 = VCLFEB |
4738 | | { 2426, 3, 1, 6, 582, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2426 = VCKSM |
4739 | | { 2425, 3, 1, 6, 639, 0, 1, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2425 = VCHLHS |
4740 | | { 2424, 3, 1, 6, 638, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2424 = VCHLH |
4741 | | { 2423, 3, 1, 6, 639, 0, 1, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2423 = VCHLGS |
4742 | | { 2422, 3, 1, 6, 638, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2422 = VCHLG |
4743 | | { 2421, 3, 1, 6, 639, 0, 1, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2421 = VCHLFS |
4744 | | { 2420, 3, 1, 6, 638, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2420 = VCHLF |
4745 | | { 2419, 3, 1, 6, 639, 0, 1, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2419 = VCHLBS |
4746 | | { 2418, 3, 1, 6, 638, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2418 = VCHLB |
4747 | | { 2417, 5, 1, 6, 638, 0, 1, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2417 = VCHL |
4748 | | { 2416, 3, 1, 6, 637, 0, 1, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2416 = VCHHS |
4749 | | { 2415, 3, 1, 6, 636, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2415 = VCHH |
4750 | | { 2414, 3, 1, 6, 637, 0, 1, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2414 = VCHGS |
4751 | | { 2413, 3, 1, 6, 636, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2413 = VCHG |
4752 | | { 2412, 3, 1, 6, 637, 0, 1, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2412 = VCHFS |
4753 | | { 2411, 3, 1, 6, 636, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2411 = VCHF |
4754 | | { 2410, 3, 1, 6, 637, 0, 1, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2410 = VCHBS |
4755 | | { 2409, 3, 1, 6, 636, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2409 = VCHB |
4756 | | { 2408, 5, 1, 6, 636, 0, 1, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2408 = VCH |
4757 | | { 2407, 4, 1, 6, 649, 1, 0, SystemZImpOpBase + 12, 1456, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2407 = VCGDB |
4758 | | { 2406, 5, 1, 6, 648, 1, 0, SystemZImpOpBase + 12, 1451, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2406 = VCGD |
4759 | | { 2405, 5, 1, 6, 641, 1, 0, SystemZImpOpBase + 12, 1451, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2405 = VCFPS |
4760 | | { 2404, 5, 1, 6, 641, 1, 0, SystemZImpOpBase + 12, 1451, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2404 = VCFPL |
4761 | | { 2403, 4, 1, 6, 749, 1, 0, SystemZImpOpBase + 12, 1456, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2403 = VCFN |
4762 | | { 2402, 4, 1, 6, 651, 1, 0, SystemZImpOpBase + 12, 1456, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2402 = VCFEB |
4763 | | { 2401, 3, 1, 6, 635, 0, 1, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2401 = VCEQHS |
4764 | | { 2400, 3, 1, 6, 634, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2400 = VCEQH |
4765 | | { 2399, 3, 1, 6, 635, 0, 1, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2399 = VCEQGS |
4766 | | { 2398, 3, 1, 6, 634, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2398 = VCEQG |
4767 | | { 2397, 3, 1, 6, 635, 0, 1, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2397 = VCEQFS |
4768 | | { 2396, 3, 1, 6, 634, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2396 = VCEQF |
4769 | | { 2395, 3, 1, 6, 635, 0, 1, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2395 = VCEQBS |
4770 | | { 2394, 3, 1, 6, 634, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2394 = VCEQB |
4771 | | { 2393, 5, 1, 6, 634, 0, 1, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2393 = VCEQ |
4772 | | { 2392, 4, 1, 6, 645, 1, 0, SystemZImpOpBase + 12, 1456, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2392 = VCELFB |
4773 | | { 2391, 4, 1, 6, 645, 1, 0, SystemZImpOpBase + 12, 1456, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2391 = VCEFB |
4774 | | { 2390, 4, 1, 6, 643, 1, 0, SystemZImpOpBase + 12, 1456, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2390 = VCDLGB |
4775 | | { 2389, 5, 1, 6, 642, 1, 0, SystemZImpOpBase + 12, 1451, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2389 = VCDLG |
4776 | | { 2388, 4, 1, 6, 643, 1, 0, SystemZImpOpBase + 12, 1456, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2388 = VCDGB |
4777 | | { 2387, 5, 1, 6, 642, 1, 0, SystemZImpOpBase + 12, 1451, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2387 = VCDG |
4778 | | { 2386, 3, 1, 6, 563, 0, 0, SystemZImpOpBase + 0, 1439, 0, 0x0ULL }, // Inst #2386 = VBPERM |
4779 | | { 2385, 3, 1, 6, 579, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2385 = VAVGLH |
4780 | | { 2384, 3, 1, 6, 579, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2384 = VAVGLG |
4781 | | { 2383, 3, 1, 6, 579, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2383 = VAVGLF |
4782 | | { 2382, 3, 1, 6, 579, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2382 = VAVGLB |
4783 | | { 2381, 4, 1, 6, 579, 0, 0, SystemZImpOpBase + 0, 1435, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2381 = VAVGL |
4784 | | { 2380, 3, 1, 6, 578, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2380 = VAVGH |
4785 | | { 2379, 3, 1, 6, 578, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2379 = VAVGG |
4786 | | { 2378, 3, 1, 6, 578, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2378 = VAVGF |
4787 | | { 2377, 3, 1, 6, 578, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2377 = VAVGB |
4788 | | { 2376, 4, 1, 6, 578, 0, 0, SystemZImpOpBase + 0, 1435, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2376 = VAVG |
4789 | | { 2375, 3, 1, 6, 576, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2375 = VAQ |
4790 | | { 2374, 5, 1, 6, 757, 0, 1, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2374 = VAP |
4791 | | { 2373, 3, 1, 6, 576, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2373 = VAH |
4792 | | { 2372, 3, 1, 6, 576, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2372 = VAG |
4793 | | { 2371, 3, 1, 6, 576, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2371 = VAF |
4794 | | { 2370, 4, 1, 6, 576, 0, 0, SystemZImpOpBase + 0, 1447, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2370 = VACQ |
4795 | | { 2369, 3, 1, 6, 577, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2369 = VACCQ |
4796 | | { 2368, 3, 1, 6, 577, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2368 = VACCH |
4797 | | { 2367, 3, 1, 6, 577, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2367 = VACCG |
4798 | | { 2366, 3, 1, 6, 577, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2366 = VACCF |
4799 | | { 2365, 4, 1, 6, 577, 0, 0, SystemZImpOpBase + 0, 1447, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2365 = VACCCQ |
4800 | | { 2364, 5, 1, 6, 577, 0, 0, SystemZImpOpBase + 0, 1442, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2364 = VACCC |
4801 | | { 2363, 3, 1, 6, 577, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2363 = VACCB |
4802 | | { 2362, 4, 1, 6, 577, 0, 0, SystemZImpOpBase + 0, 1435, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2362 = VACC |
4803 | | { 2361, 5, 1, 6, 576, 0, 0, SystemZImpOpBase + 0, 1442, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2361 = VAC |
4804 | | { 2360, 3, 1, 6, 576, 0, 0, SystemZImpOpBase + 0, 1439, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2360 = VAB |
4805 | | { 2359, 4, 1, 6, 576, 0, 0, SystemZImpOpBase + 0, 1435, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2359 = VA |
4806 | | { 2358, 0, 0, 2, 333, 6, 6, SystemZImpOpBase + 90, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2358 = UPT |
4807 | | { 2357, 5, 0, 6, 302, 0, 1, SystemZImpOpBase + 0, 777, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2357 = UNPKU |
4808 | | { 2356, 5, 0, 6, 302, 0, 1, SystemZImpOpBase + 0, 777, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2356 = UNPKA |
4809 | | { 2355, 6, 0, 6, 303, 0, 0, SystemZImpOpBase + 0, 532, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2355 = UNPK |
4810 | | { 2354, 2, 0, 4, 855, 1, 1, SystemZImpOpBase + 41, 663, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2354 = TSCH |
4811 | | { 2353, 2, 0, 4, 273, 0, 1, SystemZImpOpBase + 0, 663, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20ULL }, // Inst #2353 = TS |
4812 | | { 2352, 4, 2, 4, 287, 2, 1, SystemZImpOpBase + 43, 1419, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2352 = TRTTOpt |
4813 | | { 2351, 5, 2, 4, 287, 2, 1, SystemZImpOpBase + 43, 1423, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2351 = TRTT |
4814 | | { 2350, 3, 2, 4, 286, 1, 1, SystemZImpOpBase + 88, 1432, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2350 = TRTREOpt |
4815 | | { 2349, 4, 2, 4, 286, 1, 1, SystemZImpOpBase + 88, 1428, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2349 = TRTRE |
4816 | | { 2348, 5, 0, 6, 284, 0, 3, SystemZImpOpBase + 85, 777, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2348 = TRTR |
4817 | | { 2347, 4, 2, 4, 287, 2, 1, SystemZImpOpBase + 43, 1419, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2347 = TRTOOpt |
4818 | | { 2346, 5, 2, 4, 287, 2, 1, SystemZImpOpBase + 43, 1423, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2346 = TRTO |
4819 | | { 2345, 3, 2, 4, 286, 1, 1, SystemZImpOpBase + 88, 1432, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2345 = TRTEOpt |
4820 | | { 2344, 4, 2, 4, 286, 1, 1, SystemZImpOpBase + 88, 1428, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2344 = TRTE |
4821 | | { 2343, 5, 0, 6, 283, 0, 3, SystemZImpOpBase + 85, 777, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2343 = TRT |
4822 | | { 2342, 4, 2, 4, 287, 2, 1, SystemZImpOpBase + 43, 1419, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2342 = TROTOpt |
4823 | | { 2341, 5, 2, 4, 287, 2, 1, SystemZImpOpBase + 43, 1423, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2341 = TROT |
4824 | | { 2340, 4, 2, 4, 287, 2, 1, SystemZImpOpBase + 43, 1419, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2340 = TROOOpt |
4825 | | { 2339, 5, 2, 4, 287, 2, 1, SystemZImpOpBase + 43, 1423, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2339 = TROO |
4826 | | { 2338, 4, 2, 4, 285, 1, 0, SystemZImpOpBase + 55, 1419, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2338 = TRE |
4827 | | { 2337, 2, 0, 4, 844, 0, 0, SystemZImpOpBase + 0, 663, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2337 = TRAP4 |
4828 | | { 2336, 0, 0, 2, 844, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2336 = TRAP2 |
4829 | | { 2335, 4, 0, 6, 843, 0, 0, SystemZImpOpBase + 0, 727, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #2335 = TRACG |
4830 | | { 2334, 4, 0, 4, 843, 0, 0, SystemZImpOpBase + 0, 810, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2334 = TRACE |
4831 | | { 2333, 5, 0, 6, 282, 0, 0, SystemZImpOpBase + 0, 777, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2333 = TR |
4832 | | { 2332, 4, 0, 6, 808, 0, 1, SystemZImpOpBase + 0, 1096, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2332 = TPROT |
4833 | | { 2331, 2, 0, 4, 859, 0, 1, SystemZImpOpBase + 0, 663, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2331 = TPI |
4834 | | { 2330, 3, 0, 6, 309, 0, 1, SystemZImpOpBase + 0, 1416, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2330 = TP |
4835 | | { 2329, 3, 0, 6, 256, 0, 1, SystemZImpOpBase + 0, 455, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x4ULL }, // Inst #2329 = TMY |
4836 | | { 2328, 2, 0, 4, 261, 0, 1, SystemZImpOpBase + 0, 679, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2328 = TMLL |
4837 | | { 2327, 2, 0, 4, 260, 0, 1, SystemZImpOpBase + 0, 679, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2327 = TMLH |
4838 | | { 2326, 2, 0, 4, 259, 0, 1, SystemZImpOpBase + 0, 764, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2326 = TMHL |
4839 | | { 2325, 2, 0, 4, 258, 0, 1, SystemZImpOpBase + 0, 764, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2325 = TMHH |
4840 | | { 2324, 3, 0, 4, 256, 0, 1, SystemZImpOpBase + 0, 455, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2324 = TM |
4841 | | { 2323, 2, 1, 4, 426, 0, 1, SystemZImpOpBase + 0, 619, 0, 0x0ULL }, // Inst #2323 = THDR |
4842 | | { 2322, 2, 1, 4, 426, 0, 1, SystemZImpOpBase + 0, 1109, 0, 0x0ULL }, // Inst #2322 = THDER |
4843 | | { 2321, 0, 0, 4, 323, 0, 1, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2321 = TEND |
4844 | | { 2320, 4, 0, 6, 524, 0, 1, SystemZImpOpBase + 0, 335, 0, 0x8ULL }, // Inst #2320 = TDGXT |
4845 | | { 2319, 4, 0, 6, 523, 0, 1, SystemZImpOpBase + 0, 643, 0, 0x8ULL }, // Inst #2319 = TDGET |
4846 | | { 2318, 4, 0, 6, 892, 0, 1, SystemZImpOpBase + 0, 615, 0, 0x8ULL }, // Inst #2318 = TDGDT |
4847 | | { 2317, 4, 0, 6, 524, 0, 1, SystemZImpOpBase + 0, 335, 0, 0x8ULL }, // Inst #2317 = TDCXT |
4848 | | { 2316, 4, 0, 6, 523, 0, 1, SystemZImpOpBase + 0, 643, 0, 0x8ULL }, // Inst #2316 = TDCET |
4849 | | { 2315, 4, 0, 6, 892, 0, 1, SystemZImpOpBase + 0, 615, 0, 0x8ULL }, // Inst #2315 = TDCDT |
4850 | | { 2314, 4, 0, 6, 405, 0, 1, SystemZImpOpBase + 0, 335, 0, 0x3008ULL }, // Inst #2314 = TCXB |
4851 | | { 2313, 4, 0, 6, 404, 0, 1, SystemZImpOpBase + 0, 643, 0, 0x3008ULL }, // Inst #2313 = TCEB |
4852 | | { 2312, 4, 0, 6, 404, 0, 1, SystemZImpOpBase + 0, 615, 0, 0x3008ULL }, // Inst #2312 = TCDB |
4853 | | { 2311, 3, 0, 6, 322, 0, 1, SystemZImpOpBase + 0, 455, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2311 = TBEGINC |
4854 | | { 2310, 3, 0, 6, 322, 0, 1, SystemZImpOpBase + 0, 455, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2310 = TBEGIN |
4855 | | { 2309, 3, 1, 4, 427, 0, 1, SystemZImpOpBase + 0, 1413, 0, 0x0ULL }, // Inst #2309 = TBEDR |
4856 | | { 2308, 3, 1, 4, 427, 0, 1, SystemZImpOpBase + 0, 934, 0, 0x0ULL }, // Inst #2308 = TBDR |
4857 | | { 2307, 2, 0, 4, 794, 1, 2, SystemZImpOpBase + 68, 551, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2307 = TB |
4858 | | { 2306, 2, 0, 4, 820, 0, 1, SystemZImpOpBase + 0, 1352, 0, 0x0ULL }, // Inst #2306 = TAR |
4859 | | { 2305, 0, 0, 2, 318, 0, 1, SystemZImpOpBase + 0, 1, 0, 0x0ULL }, // Inst #2305 = TAM |
4860 | | { 2304, 2, 0, 4, 324, 0, 0, SystemZImpOpBase + 0, 663, 0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2304 = TABORT |
4861 | | { 2303, 5, 1, 6, 129, 0, 1, SystemZImpOpBase + 0, 475, 0|(1ULL<<MCID::MayLoad), 0x223c8cULL }, // Inst #2303 = SY |
4862 | | { 2302, 4, 1, 4, 506, 1, 1, SystemZImpOpBase + 1, 544, 0, 0x0ULL }, // Inst #2302 = SXTRA |
4863 | | { 2301, 3, 1, 4, 506, 1, 1, SystemZImpOpBase + 1, 541, 0, 0x0ULL }, // Inst #2301 = SXTR |
4864 | | { 2300, 3, 1, 2, 442, 0, 1, SystemZImpOpBase + 0, 538, 0, 0x0ULL }, // Inst #2300 = SXR |
4865 | | { 2299, 3, 1, 4, 385, 1, 1, SystemZImpOpBase + 1, 538, 0|(1ULL<<MCID::MayRaiseFPException), 0x3fc00ULL }, // Inst #2299 = SXBR |
4866 | | { 2298, 3, 1, 2, 441, 0, 1, SystemZImpOpBase + 0, 485, 0, 0x0ULL }, // Inst #2298 = SWR |
4867 | | { 2297, 5, 1, 4, 440, 0, 1, SystemZImpOpBase + 0, 480, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #2297 = SW |
4868 | | { 2296, 1, 0, 2, 840, 0, 1, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2296 = SVC |
4869 | | { 2295, 3, 1, 2, 441, 0, 1, SystemZImpOpBase + 0, 500, 0, 0x0ULL }, // Inst #2295 = SUR |
4870 | | { 2294, 5, 1, 4, 440, 0, 1, SystemZImpOpBase + 0, 495, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #2294 = SU |
4871 | | { 2293, 4, 0, 6, 48, 0, 0, SystemZImpOpBase + 0, 611, 0|(1ULL<<MCID::MayStore), 0x8eULL }, // Inst #2293 = STY |
4872 | | { 2292, 2, 0, 4, 807, 0, 0, SystemZImpOpBase + 0, 551, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2292 = STURG |
4873 | | { 2291, 2, 0, 4, 807, 0, 0, SystemZImpOpBase + 0, 921, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2291 = STURA |
4874 | | { 2290, 2, 0, 4, 833, 2, 2, SystemZImpOpBase + 81, 663, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2290 = STSI |
4875 | | { 2289, 2, 0, 4, 855, 1, 1, SystemZImpOpBase + 41, 663, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2289 = STSCH |
4876 | | { 2288, 4, 0, 6, 84, 0, 0, SystemZImpOpBase + 0, 611, 0|(1ULL<<MCID::MayStore), 0x4cULL }, // Inst #2288 = STRVH |
4877 | | { 2287, 4, 0, 6, 84, 0, 0, SystemZImpOpBase + 0, 149, 0|(1ULL<<MCID::MayStore), 0x10cULL }, // Inst #2287 = STRVG |
4878 | | { 2286, 4, 0, 6, 84, 0, 0, SystemZImpOpBase + 0, 611, 0|(1ULL<<MCID::MayStore), 0x8cULL }, // Inst #2286 = STRV |
4879 | | { 2285, 2, 0, 6, 48, 0, 0, SystemZImpOpBase + 0, 753, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2285 = STRL |
4880 | | { 2284, 4, 0, 6, 805, 0, 0, SystemZImpOpBase + 0, 1096, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2284 = STRAG |
4881 | | { 2283, 2, 0, 4, 785, 0, 0, SystemZImpOpBase + 0, 663, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #2283 = STPX |
4882 | | { 2282, 2, 0, 4, 830, 0, 0, SystemZImpOpBase + 0, 663, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #2282 = STPT |
4883 | | { 2281, 4, 0, 6, 280, 0, 0, SystemZImpOpBase + 0, 294, 0|(1ULL<<MCID::MayStore), 0x20cULL }, // Inst #2281 = STPQ |
4884 | | { 2280, 3, 0, 4, 777, 0, 0, SystemZImpOpBase + 0, 455, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2280 = STOSM |
4885 | | { 2279, 3, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 796, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2279 = STOCGAsmZ |
4886 | | { 2278, 3, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 796, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2278 = STOCGAsmP |
4887 | | { 2277, 3, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 796, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2277 = STOCGAsmO |
4888 | | { 2276, 3, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 796, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2276 = STOCGAsmNZ |
4889 | | { 2275, 3, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 796, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2275 = STOCGAsmNP |
4890 | | { 2274, 3, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 796, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2274 = STOCGAsmNO |
4891 | | { 2273, 3, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 796, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2273 = STOCGAsmNM |
4892 | | { 2272, 3, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 796, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2272 = STOCGAsmNLH |
4893 | | { 2271, 3, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 796, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2271 = STOCGAsmNLE |
4894 | | { 2270, 3, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 796, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2270 = STOCGAsmNL |
4895 | | { 2269, 3, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 796, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2269 = STOCGAsmNHE |
4896 | | { 2268, 3, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 796, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2268 = STOCGAsmNH |
4897 | | { 2267, 3, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 796, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2267 = STOCGAsmNE |
4898 | | { 2266, 3, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 796, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2266 = STOCGAsmM |
4899 | | { 2265, 3, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 796, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2265 = STOCGAsmLH |
4900 | | { 2264, 3, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 796, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2264 = STOCGAsmLE |
4901 | | { 2263, 3, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 796, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2263 = STOCGAsmL |
4902 | | { 2262, 3, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 796, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2262 = STOCGAsmHE |
4903 | | { 2261, 3, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 796, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2261 = STOCGAsmH |
4904 | | { 2260, 3, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 796, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2260 = STOCGAsmE |
4905 | | { 2259, 4, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 792, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2259 = STOCGAsm |
4906 | | { 2258, 5, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 1408, 0|(1ULL<<MCID::MayStore), 0x80104ULL }, // Inst #2258 = STOCG |
4907 | | { 2257, 3, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1405, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2257 = STOCFHAsmZ |
4908 | | { 2256, 3, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1405, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2256 = STOCFHAsmP |
4909 | | { 2255, 3, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1405, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2255 = STOCFHAsmO |
4910 | | { 2254, 3, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1405, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2254 = STOCFHAsmNZ |
4911 | | { 2253, 3, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1405, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2253 = STOCFHAsmNP |
4912 | | { 2252, 3, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1405, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2252 = STOCFHAsmNO |
4913 | | { 2251, 3, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1405, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2251 = STOCFHAsmNM |
4914 | | { 2250, 3, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1405, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2250 = STOCFHAsmNLH |
4915 | | { 2249, 3, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1405, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2249 = STOCFHAsmNLE |
4916 | | { 2248, 3, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1405, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2248 = STOCFHAsmNL |
4917 | | { 2247, 3, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1405, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2247 = STOCFHAsmNHE |
4918 | | { 2246, 3, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1405, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2246 = STOCFHAsmNH |
4919 | | { 2245, 3, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1405, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2245 = STOCFHAsmNE |
4920 | | { 2244, 3, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1405, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2244 = STOCFHAsmM |
4921 | | { 2243, 3, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1405, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2243 = STOCFHAsmLH |
4922 | | { 2242, 3, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1405, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2242 = STOCFHAsmLE |
4923 | | { 2241, 3, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1405, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2241 = STOCFHAsmL |
4924 | | { 2240, 3, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1405, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2240 = STOCFHAsmHE |
4925 | | { 2239, 3, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1405, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2239 = STOCFHAsmH |
4926 | | { 2238, 3, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1405, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2238 = STOCFHAsmE |
4927 | | { 2237, 4, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1401, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2237 = STOCFHAsm |
4928 | | { 2236, 5, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1396, 0|(1ULL<<MCID::MayStore), 0x80084ULL }, // Inst #2236 = STOCFH |
4929 | | { 2235, 3, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 829, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2235 = STOCAsmZ |
4930 | | { 2234, 3, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 829, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2234 = STOCAsmP |
4931 | | { 2233, 3, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 829, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2233 = STOCAsmO |
4932 | | { 2232, 3, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 829, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2232 = STOCAsmNZ |
4933 | | { 2231, 3, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 829, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2231 = STOCAsmNP |
4934 | | { 2230, 3, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 829, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2230 = STOCAsmNO |
4935 | | { 2229, 3, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 829, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2229 = STOCAsmNM |
4936 | | { 2228, 3, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 829, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2228 = STOCAsmNLH |
4937 | | { 2227, 3, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 829, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2227 = STOCAsmNLE |
4938 | | { 2226, 3, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 829, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2226 = STOCAsmNL |
4939 | | { 2225, 3, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 829, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2225 = STOCAsmNHE |
4940 | | { 2224, 3, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 829, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2224 = STOCAsmNH |
4941 | | { 2223, 3, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 829, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2223 = STOCAsmNE |
4942 | | { 2222, 3, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 829, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2222 = STOCAsmM |
4943 | | { 2221, 3, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 829, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2221 = STOCAsmLH |
4944 | | { 2220, 3, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 829, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2220 = STOCAsmLE |
4945 | | { 2219, 3, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 829, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2219 = STOCAsmL |
4946 | | { 2218, 3, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 829, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2218 = STOCAsmHE |
4947 | | { 2217, 3, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 829, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2217 = STOCAsmH |
4948 | | { 2216, 3, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 829, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2216 = STOCAsmE |
4949 | | { 2215, 4, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 825, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2215 = STOCAsm |
4950 | | { 2214, 5, 0, 6, 883, 1, 0, SystemZImpOpBase + 0, 1391, 0|(1ULL<<MCID::MayStore), 0x80084ULL }, // Inst #2214 = STOC |
4951 | | { 2213, 3, 0, 4, 777, 0, 0, SystemZImpOpBase + 0, 455, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2213 = STNSM |
4952 | | { 2212, 4, 0, 6, 81, 0, 0, SystemZImpOpBase + 0, 810, 0|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #2212 = STMY |
4953 | | { 2211, 4, 0, 6, 81, 0, 0, SystemZImpOpBase + 0, 1130, 0|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #2211 = STMH |
4954 | | { 2210, 4, 0, 6, 81, 0, 0, SystemZImpOpBase + 0, 727, 0|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #2210 = STMG |
4955 | | { 2209, 4, 0, 4, 81, 0, 0, SystemZImpOpBase + 0, 810, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2209 = STM |
4956 | | { 2208, 2, 0, 4, 832, 0, 0, SystemZImpOpBase + 0, 663, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #2208 = STIDP |
4957 | | { 2207, 4, 0, 6, 77, 0, 0, SystemZImpOpBase + 0, 611, 0|(1ULL<<MCID::MayStore), 0x4cULL }, // Inst #2207 = STHY |
4958 | | { 2206, 2, 0, 6, 77, 0, 0, SystemZImpOpBase + 0, 753, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2206 = STHRL |
4959 | | { 2205, 4, 0, 6, 77, 0, 0, SystemZImpOpBase + 0, 745, 0|(1ULL<<MCID::MayStore), 0x4cULL }, // Inst #2205 = STHH |
4960 | | { 2204, 4, 0, 4, 77, 0, 0, SystemZImpOpBase + 0, 611, 0|(1ULL<<MCID::MayStore), 0x48ULL }, // Inst #2204 = STH |
4961 | | { 2203, 4, 0, 6, 295, 0, 0, SystemZImpOpBase + 0, 149, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0xcULL }, // Inst #2203 = STGSC |
4962 | | { 2202, 2, 0, 6, 46, 0, 0, SystemZImpOpBase + 0, 704, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2202 = STGRL |
4963 | | { 2201, 4, 0, 6, 46, 0, 0, SystemZImpOpBase + 0, 149, 0|(1ULL<<MCID::MayStore), 0x10eULL }, // Inst #2201 = STG |
4964 | | { 2200, 2, 0, 4, 407, 1, 0, SystemZImpOpBase + 12, 663, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #2200 = STFPC |
4965 | | { 2199, 2, 0, 4, 834, 1, 2, SystemZImpOpBase + 68, 663, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2199 = STFLE |
4966 | | { 2198, 2, 0, 4, 834, 0, 0, SystemZImpOpBase + 0, 663, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #2198 = STFL |
4967 | | { 2197, 4, 0, 6, 48, 0, 0, SystemZImpOpBase + 0, 745, 0|(1ULL<<MCID::MayStore), 0x8eULL }, // Inst #2197 = STFH |
4968 | | { 2196, 4, 0, 6, 353, 0, 0, SystemZImpOpBase + 0, 643, 0|(1ULL<<MCID::MayStore), 0x8eULL }, // Inst #2196 = STEY |
4969 | | { 2195, 4, 0, 4, 353, 0, 0, SystemZImpOpBase + 0, 643, 0|(1ULL<<MCID::MayStore), 0x8aULL }, // Inst #2195 = STE |
4970 | | { 2194, 4, 0, 6, 353, 0, 0, SystemZImpOpBase + 0, 615, 0|(1ULL<<MCID::MayStore), 0x10eULL }, // Inst #2194 = STDY |
4971 | | { 2193, 4, 0, 4, 353, 0, 0, SystemZImpOpBase + 0, 615, 0|(1ULL<<MCID::MayStore), 0x10aULL }, // Inst #2193 = STD |
4972 | | { 2192, 4, 0, 6, 76, 0, 0, SystemZImpOpBase + 0, 611, 0|(1ULL<<MCID::MayStore), 0x2cULL }, // Inst #2192 = STCY |
4973 | | { 2191, 4, 0, 4, 781, 0, 0, SystemZImpOpBase + 0, 1105, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2191 = STCTL |
4974 | | { 2190, 4, 0, 6, 781, 0, 0, SystemZImpOpBase + 0, 1105, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #2190 = STCTG |
4975 | | { 2189, 2, 0, 4, 858, 0, 1, SystemZImpOpBase + 0, 663, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2189 = STCRW |
4976 | | { 2188, 2, 0, 4, 858, 0, 0, SystemZImpOpBase + 0, 663, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2188 = STCPS |
4977 | | { 2187, 4, 0, 6, 78, 0, 0, SystemZImpOpBase + 0, 760, 0|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #2187 = STCMY |
4978 | | { 2186, 4, 0, 6, 78, 0, 0, SystemZImpOpBase + 0, 799, 0|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #2186 = STCMH |
4979 | | { 2185, 4, 0, 4, 78, 0, 0, SystemZImpOpBase + 0, 760, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2185 = STCM |
4980 | | { 2184, 2, 0, 4, 827, 0, 1, SystemZImpOpBase + 0, 663, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #2184 = STCKF |
4981 | | { 2183, 2, 0, 4, 828, 0, 1, SystemZImpOpBase + 0, 663, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x200ULL }, // Inst #2183 = STCKE |
4982 | | { 2182, 2, 0, 4, 829, 0, 0, SystemZImpOpBase + 0, 663, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #2182 = STCKC |
4983 | | { 2181, 2, 0, 4, 827, 0, 1, SystemZImpOpBase + 0, 663, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #2181 = STCK |
4984 | | { 2180, 4, 0, 6, 76, 0, 0, SystemZImpOpBase + 0, 745, 0|(1ULL<<MCID::MayStore), 0x2cULL }, // Inst #2180 = STCH |
4985 | | { 2179, 4, 0, 4, 76, 0, 0, SystemZImpOpBase + 0, 611, 0|(1ULL<<MCID::MayStore), 0x28ULL }, // Inst #2179 = STC |
4986 | | { 2178, 2, 0, 4, 787, 0, 0, SystemZImpOpBase + 0, 663, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #2178 = STBEAR |
4987 | | { 2177, 2, 0, 4, 831, 0, 0, SystemZImpOpBase + 0, 663, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL }, // Inst #2177 = STAP |
4988 | | { 2176, 4, 0, 6, 314, 0, 0, SystemZImpOpBase + 0, 1092, 0|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #2176 = STAMY |
4989 | | { 2175, 4, 0, 4, 314, 0, 0, SystemZImpOpBase + 0, 1092, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2175 = STAM |
4990 | | { 2174, 4, 0, 4, 48, 0, 0, SystemZImpOpBase + 0, 611, 0|(1ULL<<MCID::MayStore), 0x8aULL }, // Inst #2174 = ST |
4991 | | { 2173, 2, 0, 4, 776, 0, 0, SystemZImpOpBase + 0, 663, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x20ULL }, // Inst #2173 = SSM |
4992 | | { 2172, 2, 0, 4, 790, 0, 1, SystemZImpOpBase + 0, 921, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2172 = SSKEOpt |
4993 | | { 2171, 3, 0, 4, 790, 0, 1, SystemZImpOpBase + 0, 1388, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2171 = SSKE |
4994 | | { 2170, 2, 0, 4, 855, 1, 1, SystemZImpOpBase + 41, 663, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2170 = SSCH |
4995 | | { 2169, 1, 0, 4, 783, 0, 0, SystemZImpOpBase + 0, 923, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2169 = SSAR |
4996 | | { 2168, 1, 0, 4, 783, 0, 0, SystemZImpOpBase + 0, 290, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2168 = SSAIR |
4997 | | { 2167, 5, 1, 6, 516, 0, 0, SystemZImpOpBase + 0, 1375, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #2167 = SRXT |
4998 | | { 2166, 4, 2, 4, 330, 1, 1, SystemZImpOpBase + 35, 821, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2166 = SRSTU |
4999 | | { 2165, 4, 2, 4, 330, 1, 1, SystemZImpOpBase + 35, 821, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2165 = SRST |
5000 | | { 2164, 6, 0, 6, 307, 0, 1, SystemZImpOpBase + 0, 1382, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2164 = SRP |
5001 | | { 2163, 2, 0, 4, 412, 1, 1, SystemZImpOpBase + 79, 1380, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2163 = SRNMT |
5002 | | { 2162, 2, 0, 4, 412, 1, 1, SystemZImpOpBase + 79, 1380, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2162 = SRNMB |
5003 | | { 2161, 2, 0, 4, 412, 1, 1, SystemZImpOpBase + 79, 1380, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2161 = SRNM |
5004 | | { 2160, 4, 1, 6, 208, 0, 0, SystemZImpOpBase + 0, 1348, 0, 0x4ULL }, // Inst #2160 = SRLK |
5005 | | { 2159, 4, 1, 6, 208, 0, 0, SystemZImpOpBase + 0, 917, 0, 0x4ULL }, // Inst #2159 = SRLG |
5006 | | { 2158, 4, 1, 4, 208, 0, 0, SystemZImpOpBase + 0, 1367, 0, 0x0ULL }, // Inst #2158 = SRL |
5007 | | { 2157, 3, 1, 4, 137, 0, 1, SystemZImpOpBase + 0, 529, 0, 0x223c00ULL }, // Inst #2157 = SRK |
5008 | | { 2156, 5, 1, 6, 515, 0, 0, SystemZImpOpBase + 0, 144, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #2156 = SRDT |
5009 | | { 2155, 4, 1, 4, 211, 0, 0, SystemZImpOpBase + 0, 1371, 0, 0x0ULL }, // Inst #2155 = SRDL |
5010 | | { 2154, 4, 1, 4, 211, 0, 1, SystemZImpOpBase + 0, 1371, 0, 0x3b800ULL }, // Inst #2154 = SRDA |
5011 | | { 2153, 4, 1, 6, 209, 0, 1, SystemZImpOpBase + 0, 1348, 0, 0x3b804ULL }, // Inst #2153 = SRAK |
5012 | | { 2152, 4, 1, 6, 209, 0, 1, SystemZImpOpBase + 0, 917, 0, 0x3b804ULL }, // Inst #2152 = SRAG |
5013 | | { 2151, 4, 1, 4, 209, 0, 1, SystemZImpOpBase + 0, 1367, 0, 0x3b800ULL }, // Inst #2151 = SRA |
5014 | | { 2150, 3, 1, 2, 137, 0, 1, SystemZImpOpBase + 0, 526, 0, 0x223c00ULL }, // Inst #2150 = SR |
5015 | | { 2149, 2, 1, 4, 434, 0, 0, SystemZImpOpBase + 0, 661, 0, 0x0ULL }, // Inst #2149 = SQXR |
5016 | | { 2148, 2, 1, 4, 377, 1, 0, SystemZImpOpBase + 12, 661, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2148 = SQXBR |
5017 | | { 2147, 2, 1, 4, 432, 0, 0, SystemZImpOpBase + 0, 647, 0, 0x0ULL }, // Inst #2147 = SQER |
5018 | | { 2146, 2, 1, 4, 375, 1, 0, SystemZImpOpBase + 12, 647, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2146 = SQEBR |
5019 | | { 2145, 4, 1, 6, 374, 1, 0, SystemZImpOpBase + 12, 643, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x88ULL }, // Inst #2145 = SQEB |
5020 | | { 2144, 4, 1, 6, 431, 0, 0, SystemZImpOpBase + 0, 643, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #2144 = SQE |
5021 | | { 2143, 2, 1, 4, 433, 0, 0, SystemZImpOpBase + 0, 619, 0, 0x0ULL }, // Inst #2143 = SQDR |
5022 | | { 2142, 2, 1, 4, 376, 1, 0, SystemZImpOpBase + 12, 619, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2142 = SQDBR |
5023 | | { 2141, 4, 1, 6, 374, 1, 0, SystemZImpOpBase + 12, 615, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x108ULL }, // Inst #2141 = SQDB |
5024 | | { 2140, 4, 1, 6, 431, 0, 0, SystemZImpOpBase + 0, 615, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #2140 = SQD |
5025 | | { 2139, 2, 0, 4, 785, 0, 0, SystemZImpOpBase + 0, 663, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #2139 = SPX |
5026 | | { 2138, 2, 0, 4, 826, 0, 0, SystemZImpOpBase + 0, 663, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #2138 = SPT |
5027 | | { 2137, 1, 0, 2, 316, 0, 1, SystemZImpOpBase + 0, 923, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2137 = SPM |
5028 | | { 2136, 2, 0, 4, 775, 0, 0, SystemZImpOpBase + 0, 663, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2136 = SPKA |
5029 | | { 2135, 2, 0, 4, 853, 0, 1, SystemZImpOpBase + 0, 551, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2135 = SPCTR |
5030 | | { 2134, 6, 0, 6, 304, 0, 1, SystemZImpOpBase + 0, 532, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2134 = SP |
5031 | | { 2133, 4, 2, 4, 336, 2, 1, SystemZImpOpBase + 43, 782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2133 = SORTL |
5032 | | { 2132, 5, 1, 6, 133, 0, 1, SystemZImpOpBase + 0, 475, 0|(1ULL<<MCID::MayLoad), 0x101c8cULL }, // Inst #2132 = SLY |
5033 | | { 2131, 5, 1, 6, 516, 0, 0, SystemZImpOpBase + 0, 1375, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #2131 = SLXT |
5034 | | { 2130, 3, 1, 4, 136, 0, 1, SystemZImpOpBase + 0, 529, 0, 0x101c00ULL }, // Inst #2130 = SLRK |
5035 | | { 2129, 3, 1, 2, 136, 0, 1, SystemZImpOpBase + 0, 526, 0, 0x101c00ULL }, // Inst #2129 = SLR |
5036 | | { 2128, 4, 1, 6, 207, 0, 0, SystemZImpOpBase + 0, 1348, 0, 0x4ULL }, // Inst #2128 = SLLK |
5037 | | { 2127, 4, 1, 6, 207, 0, 0, SystemZImpOpBase + 0, 917, 0, 0x4ULL }, // Inst #2127 = SLLG |
5038 | | { 2126, 4, 1, 4, 207, 0, 0, SystemZImpOpBase + 0, 1367, 0, 0x0ULL }, // Inst #2126 = SLL |
5039 | | { 2125, 3, 1, 4, 139, 0, 1, SystemZImpOpBase + 0, 520, 0, 0x101c00ULL }, // Inst #2125 = SLHHLR |
5040 | | { 2124, 3, 1, 4, 138, 0, 1, SystemZImpOpBase + 0, 517, 0, 0x101c00ULL }, // Inst #2124 = SLHHHR |
5041 | | { 2123, 3, 1, 4, 135, 0, 1, SystemZImpOpBase + 0, 370, 0, 0x101c00ULL }, // Inst #2123 = SLGRK |
5042 | | { 2122, 3, 1, 4, 135, 0, 1, SystemZImpOpBase + 0, 514, 0, 0x101c00ULL }, // Inst #2122 = SLGR |
5043 | | { 2121, 3, 1, 4, 134, 0, 1, SystemZImpOpBase + 0, 511, 0, 0x101c00ULL }, // Inst #2121 = SLGFR |
5044 | | { 2120, 3, 1, 6, 134, 0, 1, SystemZImpOpBase + 0, 291, 0, 0x101c00ULL }, // Inst #2120 = SLGFI |
5045 | | { 2119, 5, 1, 6, 133, 0, 1, SystemZImpOpBase + 0, 506, 0|(1ULL<<MCID::MayLoad), 0x101c8cULL }, // Inst #2119 = SLGF |
5046 | | { 2118, 5, 1, 6, 133, 0, 1, SystemZImpOpBase + 0, 506, 0|(1ULL<<MCID::MayLoad), 0x101d0cULL }, // Inst #2118 = SLG |
5047 | | { 2117, 3, 1, 6, 132, 0, 1, SystemZImpOpBase + 0, 503, 0, 0x101c00ULL }, // Inst #2117 = SLFI |
5048 | | { 2116, 5, 1, 6, 515, 0, 0, SystemZImpOpBase + 0, 144, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #2116 = SLDT |
5049 | | { 2115, 4, 1, 4, 211, 0, 0, SystemZImpOpBase + 0, 1371, 0, 0x0ULL }, // Inst #2115 = SLDL |
5050 | | { 2114, 4, 1, 4, 211, 0, 1, SystemZImpOpBase + 0, 1371, 0, 0x0ULL }, // Inst #2114 = SLDA |
5051 | | { 2113, 3, 1, 4, 141, 1, 1, SystemZImpOpBase + 26, 526, 0, 0x103c00ULL }, // Inst #2113 = SLBR |
5052 | | { 2112, 3, 1, 4, 141, 1, 1, SystemZImpOpBase + 26, 514, 0, 0x103c00ULL }, // Inst #2112 = SLBGR |
5053 | | { 2111, 5, 1, 6, 140, 1, 1, SystemZImpOpBase + 26, 506, 0|(1ULL<<MCID::MayLoad), 0x103d0cULL }, // Inst #2111 = SLBG |
5054 | | { 2110, 5, 1, 6, 140, 1, 1, SystemZImpOpBase + 26, 475, 0|(1ULL<<MCID::MayLoad), 0x103c8cULL }, // Inst #2110 = SLB |
5055 | | { 2109, 4, 1, 6, 210, 0, 1, SystemZImpOpBase + 0, 1348, 0, 0x4ULL }, // Inst #2109 = SLAK |
5056 | | { 2108, 4, 1, 6, 210, 0, 1, SystemZImpOpBase + 0, 917, 0, 0x4ULL }, // Inst #2108 = SLAG |
5057 | | { 2107, 4, 1, 4, 210, 0, 1, SystemZImpOpBase + 0, 1367, 0, 0x0ULL }, // Inst #2107 = SLA |
5058 | | { 2106, 5, 1, 4, 133, 0, 1, SystemZImpOpBase + 0, 475, 0|(1ULL<<MCID::MayLoad), 0x101c88ULL }, // Inst #2106 = SL |
5059 | | { 2105, 4, 0, 4, 845, 0, 1, SystemZImpOpBase + 0, 727, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2105 = SIGP |
5060 | | { 2104, 2, 0, 4, 845, 4, 1, SystemZImpOpBase + 74, 663, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2104 = SIGA |
5061 | | { 2103, 2, 0, 4, 846, 0, 1, SystemZImpOpBase + 0, 663, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2103 = SIE |
5062 | | { 2102, 5, 1, 6, 130, 0, 1, SystemZImpOpBase + 0, 475, 0|(1ULL<<MCID::MayLoad), 0x223c4cULL }, // Inst #2102 = SHY |
5063 | | { 2101, 3, 1, 4, 139, 0, 1, SystemZImpOpBase + 0, 520, 0, 0x223c00ULL }, // Inst #2101 = SHHLR |
5064 | | { 2100, 3, 1, 4, 138, 0, 1, SystemZImpOpBase + 0, 517, 0, 0x223c00ULL }, // Inst #2100 = SHHHR |
5065 | | { 2099, 5, 1, 4, 130, 0, 1, SystemZImpOpBase + 0, 475, 0|(1ULL<<MCID::MayLoad), 0x223c48ULL }, // Inst #2099 = SH |
5066 | | { 2098, 3, 1, 4, 131, 0, 1, SystemZImpOpBase + 0, 370, 0, 0x223c00ULL }, // Inst #2098 = SGRK |
5067 | | { 2097, 3, 1, 4, 131, 0, 1, SystemZImpOpBase + 0, 514, 0, 0x223c00ULL }, // Inst #2097 = SGR |
5068 | | { 2096, 5, 1, 6, 142, 0, 1, SystemZImpOpBase + 0, 506, 0|(1ULL<<MCID::MayLoad), 0x223c4cULL }, // Inst #2096 = SGH |
5069 | | { 2095, 3, 1, 4, 143, 0, 1, SystemZImpOpBase + 0, 511, 0, 0x223c00ULL }, // Inst #2095 = SGFR |
5070 | | { 2094, 5, 1, 6, 868, 0, 1, SystemZImpOpBase + 0, 506, 0|(1ULL<<MCID::MayLoad), 0x223c8cULL }, // Inst #2094 = SGF |
5071 | | { 2093, 5, 1, 6, 129, 0, 1, SystemZImpOpBase + 0, 506, 0|(1ULL<<MCID::MayLoad), 0x223d0cULL }, // Inst #2093 = SG |
5072 | | { 2092, 1, 0, 4, 408, 0, 1, SystemZImpOpBase + 12, 923, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2092 = SFPC |
5073 | | { 2091, 1, 0, 4, 410, 0, 1, SystemZImpOpBase + 12, 923, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2091 = SFASR |
5074 | | { 2090, 3, 1, 2, 441, 0, 1, SystemZImpOpBase + 0, 500, 0, 0x0ULL }, // Inst #2090 = SER |
5075 | | { 2089, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 529, 0, 0x0ULL }, // Inst #2089 = SELRAsmZ |
5076 | | { 2088, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 529, 0, 0x0ULL }, // Inst #2088 = SELRAsmP |
5077 | | { 2087, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 529, 0, 0x0ULL }, // Inst #2087 = SELRAsmO |
5078 | | { 2086, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 529, 0, 0x0ULL }, // Inst #2086 = SELRAsmNZ |
5079 | | { 2085, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 529, 0, 0x0ULL }, // Inst #2085 = SELRAsmNP |
5080 | | { 2084, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 529, 0, 0x0ULL }, // Inst #2084 = SELRAsmNO |
5081 | | { 2083, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 529, 0, 0x0ULL }, // Inst #2083 = SELRAsmNM |
5082 | | { 2082, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 529, 0, 0x0ULL }, // Inst #2082 = SELRAsmNLH |
5083 | | { 2081, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 529, 0, 0x0ULL }, // Inst #2081 = SELRAsmNLE |
5084 | | { 2080, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 529, 0, 0x0ULL }, // Inst #2080 = SELRAsmNL |
5085 | | { 2079, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 529, 0, 0x0ULL }, // Inst #2079 = SELRAsmNHE |
5086 | | { 2078, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 529, 0, 0x0ULL }, // Inst #2078 = SELRAsmNH |
5087 | | { 2077, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 529, 0, 0x0ULL }, // Inst #2077 = SELRAsmNE |
5088 | | { 2076, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 529, 0, 0x0ULL }, // Inst #2076 = SELRAsmM |
5089 | | { 2075, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 529, 0, 0x0ULL }, // Inst #2075 = SELRAsmLH |
5090 | | { 2074, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 529, 0, 0x0ULL }, // Inst #2074 = SELRAsmLE |
5091 | | { 2073, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 529, 0, 0x0ULL }, // Inst #2073 = SELRAsmL |
5092 | | { 2072, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 529, 0, 0x0ULL }, // Inst #2072 = SELRAsmHE |
5093 | | { 2071, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 529, 0, 0x0ULL }, // Inst #2071 = SELRAsmH |
5094 | | { 2070, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 529, 0, 0x0ULL }, // Inst #2070 = SELRAsmE |
5095 | | { 2069, 4, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 1363, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2069 = SELRAsm |
5096 | | { 2068, 5, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 420, 0|(1ULL<<MCID::Commutable), 0x80000ULL }, // Inst #2068 = SELR |
5097 | | { 2067, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 370, 0, 0x0ULL }, // Inst #2067 = SELGRAsmZ |
5098 | | { 2066, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 370, 0, 0x0ULL }, // Inst #2066 = SELGRAsmP |
5099 | | { 2065, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 370, 0, 0x0ULL }, // Inst #2065 = SELGRAsmO |
5100 | | { 2064, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 370, 0, 0x0ULL }, // Inst #2064 = SELGRAsmNZ |
5101 | | { 2063, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 370, 0, 0x0ULL }, // Inst #2063 = SELGRAsmNP |
5102 | | { 2062, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 370, 0, 0x0ULL }, // Inst #2062 = SELGRAsmNO |
5103 | | { 2061, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 370, 0, 0x0ULL }, // Inst #2061 = SELGRAsmNM |
5104 | | { 2060, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 370, 0, 0x0ULL }, // Inst #2060 = SELGRAsmNLH |
5105 | | { 2059, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 370, 0, 0x0ULL }, // Inst #2059 = SELGRAsmNLE |
5106 | | { 2058, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 370, 0, 0x0ULL }, // Inst #2058 = SELGRAsmNL |
5107 | | { 2057, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 370, 0, 0x0ULL }, // Inst #2057 = SELGRAsmNHE |
5108 | | { 2056, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 370, 0, 0x0ULL }, // Inst #2056 = SELGRAsmNH |
5109 | | { 2055, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 370, 0, 0x0ULL }, // Inst #2055 = SELGRAsmNE |
5110 | | { 2054, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 370, 0, 0x0ULL }, // Inst #2054 = SELGRAsmM |
5111 | | { 2053, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 370, 0, 0x0ULL }, // Inst #2053 = SELGRAsmLH |
5112 | | { 2052, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 370, 0, 0x0ULL }, // Inst #2052 = SELGRAsmLE |
5113 | | { 2051, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 370, 0, 0x0ULL }, // Inst #2051 = SELGRAsmL |
5114 | | { 2050, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 370, 0, 0x0ULL }, // Inst #2050 = SELGRAsmHE |
5115 | | { 2049, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 370, 0, 0x0ULL }, // Inst #2049 = SELGRAsmH |
5116 | | { 2048, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 370, 0, 0x0ULL }, // Inst #2048 = SELGRAsmE |
5117 | | { 2047, 4, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 965, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2047 = SELGRAsm |
5118 | | { 2046, 5, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 425, 0|(1ULL<<MCID::Commutable), 0x80000ULL }, // Inst #2046 = SELGR |
5119 | | { 2045, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 517, 0, 0x0ULL }, // Inst #2045 = SELFHRAsmZ |
5120 | | { 2044, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 517, 0, 0x0ULL }, // Inst #2044 = SELFHRAsmP |
5121 | | { 2043, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 517, 0, 0x0ULL }, // Inst #2043 = SELFHRAsmO |
5122 | | { 2042, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 517, 0, 0x0ULL }, // Inst #2042 = SELFHRAsmNZ |
5123 | | { 2041, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 517, 0, 0x0ULL }, // Inst #2041 = SELFHRAsmNP |
5124 | | { 2040, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 517, 0, 0x0ULL }, // Inst #2040 = SELFHRAsmNO |
5125 | | { 2039, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 517, 0, 0x0ULL }, // Inst #2039 = SELFHRAsmNM |
5126 | | { 2038, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 517, 0, 0x0ULL }, // Inst #2038 = SELFHRAsmNLH |
5127 | | { 2037, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 517, 0, 0x0ULL }, // Inst #2037 = SELFHRAsmNLE |
5128 | | { 2036, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 517, 0, 0x0ULL }, // Inst #2036 = SELFHRAsmNL |
5129 | | { 2035, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 517, 0, 0x0ULL }, // Inst #2035 = SELFHRAsmNHE |
5130 | | { 2034, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 517, 0, 0x0ULL }, // Inst #2034 = SELFHRAsmNH |
5131 | | { 2033, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 517, 0, 0x0ULL }, // Inst #2033 = SELFHRAsmNE |
5132 | | { 2032, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 517, 0, 0x0ULL }, // Inst #2032 = SELFHRAsmM |
5133 | | { 2031, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 517, 0, 0x0ULL }, // Inst #2031 = SELFHRAsmLH |
5134 | | { 2030, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 517, 0, 0x0ULL }, // Inst #2030 = SELFHRAsmLE |
5135 | | { 2029, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 517, 0, 0x0ULL }, // Inst #2029 = SELFHRAsmL |
5136 | | { 2028, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 517, 0, 0x0ULL }, // Inst #2028 = SELFHRAsmHE |
5137 | | { 2027, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 517, 0, 0x0ULL }, // Inst #2027 = SELFHRAsmH |
5138 | | { 2026, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 517, 0, 0x0ULL }, // Inst #2026 = SELFHRAsmE |
5139 | | { 2025, 4, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 1359, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2025 = SELFHRAsm |
5140 | | { 2024, 5, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 1354, 0|(1ULL<<MCID::Commutable), 0x80000ULL }, // Inst #2024 = SELFHR |
5141 | | { 2023, 3, 1, 4, 384, 1, 1, SystemZImpOpBase + 1, 500, 0|(1ULL<<MCID::MayRaiseFPException), 0x3fc00ULL }, // Inst #2023 = SEBR |
5142 | | { 2022, 5, 1, 6, 383, 1, 1, SystemZImpOpBase + 1, 495, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3fc88ULL }, // Inst #2022 = SEB |
5143 | | { 2021, 5, 1, 4, 440, 0, 1, SystemZImpOpBase + 0, 495, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #2021 = SE |
5144 | | { 2020, 4, 1, 4, 505, 1, 1, SystemZImpOpBase + 1, 491, 0, 0x0ULL }, // Inst #2020 = SDTRA |
5145 | | { 2019, 3, 1, 4, 505, 1, 1, SystemZImpOpBase + 1, 488, 0, 0x0ULL }, // Inst #2019 = SDTR |
5146 | | { 2018, 3, 1, 2, 441, 0, 1, SystemZImpOpBase + 0, 485, 0, 0x0ULL }, // Inst #2018 = SDR |
5147 | | { 2017, 3, 1, 4, 384, 1, 1, SystemZImpOpBase + 1, 485, 0|(1ULL<<MCID::MayRaiseFPException), 0x3fc00ULL }, // Inst #2017 = SDBR |
5148 | | { 2016, 5, 1, 6, 383, 1, 1, SystemZImpOpBase + 1, 480, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3fd08ULL }, // Inst #2016 = SDB |
5149 | | { 2015, 5, 1, 4, 440, 0, 1, SystemZImpOpBase + 0, 480, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #2015 = SD |
5150 | | { 2014, 0, 0, 2, 894, 1, 0, SystemZImpOpBase + 55, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2014 = SCKPF |
5151 | | { 2013, 2, 0, 4, 825, 0, 0, SystemZImpOpBase + 0, 663, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #2013 = SCKC |
5152 | | { 2012, 2, 0, 4, 893, 0, 1, SystemZImpOpBase + 0, 663, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #2012 = SCK |
5153 | | { 2011, 0, 0, 4, 857, 2, 0, SystemZImpOpBase + 72, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2011 = SCHM |
5154 | | { 2010, 2, 0, 4, 853, 0, 1, SystemZImpOpBase + 0, 551, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2010 = SCCTR |
5155 | | { 2009, 2, 1, 4, 311, 0, 0, SystemZImpOpBase + 0, 1352, 0, 0x0ULL }, // Inst #2009 = SAR |
5156 | | { 2008, 0, 0, 2, 319, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2008 = SAM64 |
5157 | | { 2007, 0, 0, 2, 319, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2007 = SAM31 |
5158 | | { 2006, 0, 0, 2, 319, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2006 = SAM24 |
5159 | | { 2005, 0, 0, 4, 860, 1, 0, SystemZImpOpBase + 71, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2005 = SAL |
5160 | | { 2004, 2, 0, 4, 779, 0, 0, SystemZImpOpBase + 0, 663, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2004 = SACF |
5161 | | { 2003, 2, 0, 4, 779, 0, 0, SystemZImpOpBase + 0, 663, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2003 = SAC |
5162 | | { 2002, 5, 1, 4, 129, 0, 1, SystemZImpOpBase + 0, 475, 0|(1ULL<<MCID::MayLoad), 0x223c88ULL }, // Inst #2002 = S |
5163 | | { 2001, 6, 1, 6, 217, 0, 1, SystemZImpOpBase + 0, 1330, 0, 0x0ULL }, // Inst #2001 = RXSBG |
5164 | | { 2000, 0, 0, 4, 854, 1, 1, SystemZImpOpBase + 41, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2000 = RSCH |
5165 | | { 1999, 5, 2, 4, 514, 1, 0, SystemZImpOpBase + 12, 1325, 0, 0x0ULL }, // Inst #1999 = RRXTR |
5166 | | { 1998, 5, 2, 4, 513, 1, 0, SystemZImpOpBase + 12, 902, 0, 0x0ULL }, // Inst #1998 = RRDTR |
5167 | | { 1997, 2, 1, 4, 791, 0, 0, SystemZImpOpBase + 0, 551, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1997 = RRBM |
5168 | | { 1996, 2, 0, 4, 791, 0, 1, SystemZImpOpBase + 0, 921, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1996 = RRBE |
5169 | | { 1995, 2, 0, 4, 818, 0, 1, SystemZImpOpBase + 0, 663, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1995 = RP |
5170 | | { 1994, 6, 1, 6, 217, 0, 1, SystemZImpOpBase + 0, 1330, 0, 0x0ULL }, // Inst #1994 = ROSBG |
5171 | | { 1993, 6, 1, 6, 217, 0, 1, SystemZImpOpBase + 0, 1330, 0, 0x0ULL }, // Inst #1993 = RNSBG |
5172 | | { 1992, 4, 1, 6, 212, 0, 0, SystemZImpOpBase + 0, 917, 0, 0x4ULL }, // Inst #1992 = RLLG |
5173 | | { 1991, 4, 1, 6, 212, 0, 0, SystemZImpOpBase + 0, 1348, 0, 0x4ULL }, // Inst #1991 = RLL |
5174 | | { 1990, 6, 1, 6, 215, 0, 0, SystemZImpOpBase + 0, 1342, 0, 0x0ULL }, // Inst #1990 = RISBLG |
5175 | | { 1989, 6, 1, 6, 214, 0, 0, SystemZImpOpBase + 0, 1336, 0, 0x0ULL }, // Inst #1989 = RISBHG |
5176 | | { 1988, 6, 1, 6, 213, 0, 0, SystemZImpOpBase + 0, 1330, 0, 0x0ULL }, // Inst #1988 = RISBGN |
5177 | | { 1987, 6, 1, 6, 895, 0, 1, SystemZImpOpBase + 0, 391, 0, 0x0ULL }, // Inst #1987 = RISBG32 |
5178 | | { 1986, 6, 1, 6, 895, 0, 1, SystemZImpOpBase + 0, 1330, 0, 0x3b800ULL }, // Inst #1986 = RISBG |
5179 | | { 1985, 3, 0, 4, 799, 0, 0, SystemZImpOpBase + 0, 370, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1985 = RDPOpt |
5180 | | { 1984, 4, 0, 4, 799, 0, 0, SystemZImpOpBase + 0, 965, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1984 = RDP |
5181 | | { 1983, 0, 0, 4, 856, 1, 1, SystemZImpOpBase + 41, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1983 = RCHP |
5182 | | { 1982, 2, 0, 4, 852, 0, 0, SystemZImpOpBase + 0, 663, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1982 = QSI |
5183 | | { 1981, 2, 0, 4, 839, 1, 2, SystemZImpOpBase + 68, 663, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1981 = QPACI |
5184 | | { 1980, 2, 0, 4, 852, 0, 0, SystemZImpOpBase + 0, 663, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1980 = QCTRI |
5185 | | { 1979, 5, 2, 4, 512, 1, 0, SystemZImpOpBase + 12, 1325, 0, 0x0ULL }, // Inst #1979 = QAXTR |
5186 | | { 1978, 5, 2, 4, 511, 1, 0, SystemZImpOpBase + 12, 902, 0, 0x0ULL }, // Inst #1978 = QADTR |
5187 | | { 1977, 0, 0, 4, 801, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1977 = PTLB |
5188 | | { 1976, 2, 0, 4, 817, 0, 0, SystemZImpOpBase + 0, 551, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1976 = PTI |
5189 | | { 1975, 0, 0, 2, 824, 2, 1, SystemZImpOpBase + 43, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1975 = PTFF |
5190 | | { 1974, 2, 1, 4, 837, 0, 0, SystemZImpOpBase + 0, 1323, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1974 = PTF |
5191 | | { 1973, 2, 0, 4, 817, 0, 0, SystemZImpOpBase + 0, 921, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1973 = PT |
5192 | | { 1972, 4, 2, 4, 292, 2, 1, SystemZImpOpBase + 43, 782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1972 = PRNO |
5193 | | { 1971, 0, 0, 2, 816, 0, 1, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1971 = PR |
5194 | | { 1970, 4, 2, 4, 870, 2, 1, SystemZImpOpBase + 43, 782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1970 = PPNO |
5195 | | { 1969, 3, 0, 4, 327, 0, 0, SystemZImpOpBase + 0, 211, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1969 = PPA |
5196 | | { 1968, 3, 1, 4, 329, 0, 1, SystemZImpOpBase + 0, 211, 0, 0x0ULL }, // Inst #1968 = POPCNTOpt |
5197 | | { 1967, 2, 1, 4, 863, 0, 1, SystemZImpOpBase + 0, 551, 0, 0x0ULL }, // Inst #1967 = POPCNT |
5198 | | { 1966, 6, 0, 6, 278, 2, 1, SystemZImpOpBase + 43, 1317, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1966 = PLO |
5199 | | { 1965, 5, 0, 6, 301, 0, 0, SystemZImpOpBase + 0, 1312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1965 = PKU |
5200 | | { 1964, 5, 0, 6, 301, 0, 0, SystemZImpOpBase + 0, 1312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1964 = PKA |
5201 | | { 1963, 2, 0, 4, 796, 0, 1, SystemZImpOpBase + 0, 551, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1963 = PGOUT |
5202 | | { 1962, 2, 0, 4, 795, 0, 1, SystemZImpOpBase + 0, 551, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1962 = PGIN |
5203 | | { 1961, 0, 0, 2, 496, 3, 3, SystemZImpOpBase + 62, 1, 0, 0x0ULL }, // Inst #1961 = PFPO |
5204 | | { 1960, 3, 1, 4, 793, 0, 0, SystemZImpOpBase + 0, 1309, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1960 = PFMF |
5205 | | { 1959, 2, 0, 6, 263, 0, 0, SystemZImpOpBase + 0, 582, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1959 = PFDRL |
5206 | | { 1958, 4, 0, 6, 263, 0, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xcULL }, // Inst #1958 = PFD |
5207 | | { 1957, 0, 0, 4, 838, 2, 0, SystemZImpOpBase + 60, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1957 = PCKMO |
5208 | | { 1956, 0, 0, 4, 886, 2, 1, SystemZImpOpBase + 43, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1956 = PCC |
5209 | | { 1955, 2, 0, 4, 815, 0, 0, SystemZImpOpBase + 0, 663, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1955 = PC |
5210 | | { 1954, 0, 0, 4, 814, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1954 = PALB |
5211 | | { 1953, 6, 0, 6, 301, 0, 0, SystemZImpOpBase + 0, 532, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1953 = PACK |
5212 | | { 1952, 5, 1, 6, 156, 0, 1, SystemZImpOpBase + 0, 475, 0|(1ULL<<MCID::MayLoad), 0x2308cULL }, // Inst #1952 = OY |
5213 | | { 1951, 3, 1, 4, 166, 0, 1, SystemZImpOpBase + 0, 529, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #1951 = ORK |
5214 | | { 1950, 3, 1, 2, 166, 0, 1, SystemZImpOpBase + 0, 526, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #1950 = OR |
5215 | | { 1949, 3, 0, 6, 158, 0, 1, SystemZImpOpBase + 0, 455, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1949 = OIY |
5216 | | { 1948, 3, 1, 4, 165, 0, 1, SystemZImpOpBase + 0, 503, 0, 0x0ULL }, // Inst #1948 = OILL |
5217 | | { 1947, 3, 1, 4, 164, 0, 1, SystemZImpOpBase + 0, 503, 0, 0x0ULL }, // Inst #1947 = OILH |
5218 | | { 1946, 3, 1, 6, 163, 0, 1, SystemZImpOpBase + 0, 503, 0, 0x23000ULL }, // Inst #1946 = OILF |
5219 | | { 1945, 3, 1, 4, 162, 0, 1, SystemZImpOpBase + 0, 523, 0, 0x0ULL }, // Inst #1945 = OIHL |
5220 | | { 1944, 3, 1, 4, 161, 0, 1, SystemZImpOpBase + 0, 523, 0, 0x0ULL }, // Inst #1944 = OIHH |
5221 | | { 1943, 3, 1, 6, 160, 0, 1, SystemZImpOpBase + 0, 523, 0, 0x23000ULL }, // Inst #1943 = OIHF |
5222 | | { 1942, 3, 0, 4, 158, 0, 1, SystemZImpOpBase + 0, 455, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1942 = OI |
5223 | | { 1941, 3, 1, 4, 157, 0, 1, SystemZImpOpBase + 0, 370, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #1941 = OGRK |
5224 | | { 1940, 3, 1, 4, 157, 0, 1, SystemZImpOpBase + 0, 514, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #1940 = OGR |
5225 | | { 1939, 5, 1, 6, 156, 0, 1, SystemZImpOpBase + 0, 506, 0|(1ULL<<MCID::MayLoad), 0x2310cULL }, // Inst #1939 = OG |
5226 | | { 1938, 3, 1, 4, 177, 0, 1, SystemZImpOpBase + 0, 529, 0, 0x23000ULL }, // Inst #1938 = OCRK |
5227 | | { 1937, 3, 1, 4, 177, 0, 1, SystemZImpOpBase + 0, 370, 0, 0x23000ULL }, // Inst #1937 = OCGRK |
5228 | | { 1936, 5, 0, 6, 167, 0, 1, SystemZImpOpBase + 0, 777, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1936 = OC |
5229 | | { 1935, 5, 1, 4, 156, 0, 1, SystemZImpOpBase + 0, 475, 0|(1ULL<<MCID::MayLoad), 0x23088ULL }, // Inst #1935 = O |
5230 | | { 1934, 5, 1, 6, 144, 0, 1, SystemZImpOpBase + 0, 475, 0|(1ULL<<MCID::MayLoad), 0x2308cULL }, // Inst #1934 = NY |
5231 | | { 1933, 3, 1, 4, 180, 0, 1, SystemZImpOpBase + 0, 529, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #1933 = NXRK |
5232 | | { 1932, 3, 1, 4, 180, 0, 1, SystemZImpOpBase + 0, 370, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #1932 = NXGRK |
5233 | | { 1931, 4, 0, 6, 326, 0, 0, SystemZImpOpBase + 0, 149, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x10cULL }, // Inst #1931 = NTSTG |
5234 | | { 1930, 3, 1, 4, 154, 0, 1, SystemZImpOpBase + 0, 529, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #1930 = NRK |
5235 | | { 1929, 3, 1, 2, 154, 0, 1, SystemZImpOpBase + 0, 526, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #1929 = NR |
5236 | | { 1928, 3, 1, 4, 179, 0, 1, SystemZImpOpBase + 0, 529, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #1928 = NORK |
5237 | | { 1927, 0, 0, 4, 0, 0, 0, SystemZImpOpBase + 0, 1, 0, 0x8ULL }, // Inst #1927 = NOP_bare |
5238 | | { 1926, 3, 1, 4, 179, 0, 1, SystemZImpOpBase + 0, 370, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #1926 = NOGRK |
5239 | | { 1925, 3, 1, 4, 178, 0, 1, SystemZImpOpBase + 0, 529, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #1925 = NNRK |
5240 | | { 1924, 0, 0, 4, 338, 2, 2, SystemZImpOpBase + 56, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1924 = NNPA |
5241 | | { 1923, 3, 1, 4, 178, 0, 1, SystemZImpOpBase + 0, 370, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #1923 = NNGRK |
5242 | | { 1922, 3, 0, 6, 147, 0, 1, SystemZImpOpBase + 0, 455, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1922 = NIY |
5243 | | { 1921, 3, 1, 4, 153, 0, 1, SystemZImpOpBase + 0, 503, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #1921 = NILL |
5244 | | { 1920, 3, 1, 4, 152, 0, 1, SystemZImpOpBase + 0, 503, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #1920 = NILH |
5245 | | { 1919, 3, 1, 6, 151, 0, 1, SystemZImpOpBase + 0, 503, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x23000ULL }, // Inst #1919 = NILF |
5246 | | { 1918, 3, 1, 4, 150, 0, 1, SystemZImpOpBase + 0, 523, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #1918 = NIHL |
5247 | | { 1917, 3, 1, 4, 149, 0, 1, SystemZImpOpBase + 0, 523, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #1917 = NIHH |
5248 | | { 1916, 3, 1, 6, 148, 0, 1, SystemZImpOpBase + 0, 523, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x23000ULL }, // Inst #1916 = NIHF |
5249 | | { 1915, 2, 0, 4, 266, 0, 0, SystemZImpOpBase + 0, 21, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1915 = NIAI |
5250 | | { 1914, 3, 0, 4, 147, 0, 1, SystemZImpOpBase + 0, 455, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1914 = NI |
5251 | | { 1913, 3, 1, 4, 145, 0, 1, SystemZImpOpBase + 0, 370, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #1913 = NGRK |
5252 | | { 1912, 3, 1, 4, 145, 0, 1, SystemZImpOpBase + 0, 514, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #1912 = NGR |
5253 | | { 1911, 5, 1, 6, 144, 0, 1, SystemZImpOpBase + 0, 506, 0|(1ULL<<MCID::MayLoad), 0x2310cULL }, // Inst #1911 = NG |
5254 | | { 1910, 3, 1, 4, 176, 0, 1, SystemZImpOpBase + 0, 529, 0, 0x23000ULL }, // Inst #1910 = NCRK |
5255 | | { 1909, 3, 1, 4, 176, 0, 1, SystemZImpOpBase + 0, 370, 0, 0x23000ULL }, // Inst #1909 = NCGRK |
5256 | | { 1908, 5, 0, 6, 155, 0, 1, SystemZImpOpBase + 0, 777, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1908 = NC |
5257 | | { 1907, 5, 1, 4, 144, 0, 1, SystemZImpOpBase + 0, 475, 0|(1ULL<<MCID::MayLoad), 0x23088ULL }, // Inst #1907 = N |
5258 | | { 1906, 3, 1, 4, 450, 0, 0, SystemZImpOpBase + 0, 1306, 0, 0x0ULL }, // Inst #1906 = MYR |
5259 | | { 1905, 3, 1, 4, 451, 0, 0, SystemZImpOpBase + 0, 488, 0, 0x0ULL }, // Inst #1905 = MYLR |
5260 | | { 1904, 5, 1, 6, 449, 0, 0, SystemZImpOpBase + 0, 144, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #1904 = MYL |
5261 | | { 1903, 3, 1, 4, 451, 0, 0, SystemZImpOpBase + 0, 488, 0, 0x0ULL }, // Inst #1903 = MYHR |
5262 | | { 1902, 5, 1, 6, 449, 0, 0, SystemZImpOpBase + 0, 144, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #1902 = MYH |
5263 | | { 1901, 5, 1, 6, 448, 0, 0, SystemZImpOpBase + 0, 1301, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #1901 = MY |
5264 | | { 1900, 4, 1, 4, 508, 1, 0, SystemZImpOpBase + 12, 544, 0, 0x0ULL }, // Inst #1900 = MXTRA |
5265 | | { 1899, 3, 1, 4, 508, 1, 0, SystemZImpOpBase + 12, 541, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1899 = MXTR |
5266 | | { 1898, 3, 1, 2, 447, 0, 0, SystemZImpOpBase + 0, 538, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1898 = MXR |
5267 | | { 1897, 3, 1, 2, 446, 0, 0, SystemZImpOpBase + 0, 1298, 0, 0x0ULL }, // Inst #1897 = MXDR |
5268 | | { 1896, 3, 1, 4, 389, 1, 0, SystemZImpOpBase + 12, 1298, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1896 = MXDBR |
5269 | | { 1895, 5, 1, 6, 388, 1, 0, SystemZImpOpBase + 12, 1293, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x108ULL }, // Inst #1895 = MXDB |
5270 | | { 1894, 5, 1, 4, 445, 0, 0, SystemZImpOpBase + 0, 1293, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #1894 = MXD |
5271 | | { 1893, 3, 1, 4, 390, 1, 0, SystemZImpOpBase + 12, 538, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1893 = MXBR |
5272 | | { 1892, 5, 0, 6, 300, 0, 0, SystemZImpOpBase + 0, 777, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1892 = MVZ |
5273 | | { 1891, 4, 2, 4, 49, 1, 1, SystemZImpOpBase + 35, 821, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1891 = MVST |
5274 | | { 1890, 2, 0, 4, 812, 1, 1, SystemZImpOpBase + 35, 551, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1890 = MVPG |
5275 | | { 1889, 6, 0, 6, 300, 0, 0, SystemZImpOpBase + 0, 532, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1889 = MVO |
5276 | | { 1888, 5, 0, 6, 300, 0, 0, SystemZImpOpBase + 0, 777, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1888 = MVN |
5277 | | { 1887, 3, 0, 6, 25, 0, 0, SystemZImpOpBase + 0, 455, 0|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1887 = MVIY |
5278 | | { 1886, 3, 0, 4, 25, 0, 0, SystemZImpOpBase + 0, 455, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1886 = MVI |
5279 | | { 1885, 3, 0, 6, 24, 0, 0, SystemZImpOpBase + 0, 455, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1885 = MVHI |
5280 | | { 1884, 3, 0, 6, 24, 0, 0, SystemZImpOpBase + 0, 455, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1884 = MVHHI |
5281 | | { 1883, 3, 0, 6, 24, 0, 0, SystemZImpOpBase + 0, 455, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1883 = MVGHI |
5282 | | { 1882, 4, 0, 6, 810, 2, 0, SystemZImpOpBase + 53, 1096, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1882 = MVCSK |
5283 | | { 1881, 6, 0, 6, 809, 0, 1, SystemZImpOpBase + 0, 1287, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1881 = MVCS |
5284 | | { 1880, 4, 0, 6, 28, 1, 0, SystemZImpOpBase + 55, 1096, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1880 = MVCRL |
5285 | | { 1879, 6, 0, 6, 809, 0, 1, SystemZImpOpBase + 0, 1287, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1879 = MVCP |
5286 | | { 1878, 5, 0, 6, 811, 1, 0, SystemZImpOpBase + 55, 861, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1878 = MVCOS |
5287 | | { 1877, 6, 2, 6, 27, 0, 1, SystemZImpOpBase + 0, 786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1877 = MVCLU |
5288 | | { 1876, 6, 2, 4, 27, 0, 1, SystemZImpOpBase + 0, 786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1876 = MVCLE |
5289 | | { 1875, 4, 2, 2, 27, 0, 1, SystemZImpOpBase + 0, 782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1875 = MVCL |
5290 | | { 1874, 6, 0, 6, 809, 0, 1, SystemZImpOpBase + 0, 1287, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1874 = MVCK |
5291 | | { 1873, 5, 0, 6, 85, 0, 0, SystemZImpOpBase + 0, 777, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1873 = MVCIN |
5292 | | { 1872, 4, 0, 6, 810, 2, 0, SystemZImpOpBase + 53, 1096, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1872 = MVCDK |
5293 | | { 1871, 5, 0, 6, 26, 0, 0, SystemZImpOpBase + 0, 777, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1871 = MVC |
5294 | | { 1870, 5, 1, 6, 181, 0, 0, SystemZImpOpBase + 0, 475, 0|(1ULL<<MCID::MayLoad), 0x8cULL }, // Inst #1870 = MSY |
5295 | | { 1869, 1, 0, 4, 823, 0, 0, SystemZImpOpBase + 0, 1286, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1869 = MSTA |
5296 | | { 1868, 3, 1, 4, 198, 0, 1, SystemZImpOpBase + 0, 529, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1868 = MSRKC |
5297 | | { 1867, 3, 1, 4, 182, 0, 0, SystemZImpOpBase + 0, 526, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1867 = MSR |
5298 | | { 1866, 3, 1, 4, 199, 0, 1, SystemZImpOpBase + 0, 370, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1866 = MSGRKC |
5299 | | { 1865, 3, 1, 4, 184, 0, 0, SystemZImpOpBase + 0, 514, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1865 = MSGR |
5300 | | { 1864, 3, 1, 4, 185, 0, 0, SystemZImpOpBase + 0, 511, 0, 0x0ULL }, // Inst #1864 = MSGFR |
5301 | | { 1863, 3, 1, 6, 185, 0, 0, SystemZImpOpBase + 0, 291, 0, 0x0ULL }, // Inst #1863 = MSGFI |
5302 | | { 1862, 5, 1, 6, 181, 0, 0, SystemZImpOpBase + 0, 506, 0|(1ULL<<MCID::MayLoad), 0x8cULL }, // Inst #1862 = MSGF |
5303 | | { 1861, 5, 1, 6, 197, 0, 1, SystemZImpOpBase + 0, 506, 0|(1ULL<<MCID::MayLoad), 0x10cULL }, // Inst #1861 = MSGC |
5304 | | { 1860, 5, 1, 6, 183, 0, 0, SystemZImpOpBase + 0, 506, 0|(1ULL<<MCID::MayLoad), 0x10cULL }, // Inst #1860 = MSG |
5305 | | { 1859, 3, 1, 6, 182, 0, 0, SystemZImpOpBase + 0, 503, 0, 0x0ULL }, // Inst #1859 = MSFI |
5306 | | { 1858, 4, 1, 4, 453, 0, 0, SystemZImpOpBase + 0, 1269, 0, 0x0ULL }, // Inst #1858 = MSER |
5307 | | { 1857, 4, 1, 4, 392, 1, 0, SystemZImpOpBase + 12, 1269, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1857 = MSEBR |
5308 | | { 1856, 6, 1, 6, 391, 1, 0, SystemZImpOpBase + 12, 1263, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x88ULL }, // Inst #1856 = MSEB |
5309 | | { 1855, 6, 1, 6, 452, 0, 0, SystemZImpOpBase + 0, 1263, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #1855 = MSE |
5310 | | { 1854, 4, 1, 4, 453, 0, 0, SystemZImpOpBase + 0, 1259, 0, 0x0ULL }, // Inst #1854 = MSDR |
5311 | | { 1853, 4, 1, 4, 394, 1, 0, SystemZImpOpBase + 12, 1259, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1853 = MSDBR |
5312 | | { 1852, 6, 1, 6, 393, 1, 0, SystemZImpOpBase + 12, 1253, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x108ULL }, // Inst #1852 = MSDB |
5313 | | { 1851, 6, 1, 6, 452, 0, 0, SystemZImpOpBase + 0, 1253, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #1851 = MSD |
5314 | | { 1850, 2, 0, 4, 855, 1, 1, SystemZImpOpBase + 41, 663, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1850 = MSCH |
5315 | | { 1849, 5, 1, 6, 196, 0, 1, SystemZImpOpBase + 0, 475, 0|(1ULL<<MCID::MayLoad), 0x8cULL }, // Inst #1849 = MSC |
5316 | | { 1848, 5, 1, 4, 181, 0, 0, SystemZImpOpBase + 0, 475, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #1848 = MS |
5317 | | { 1847, 3, 1, 2, 191, 0, 0, SystemZImpOpBase + 0, 912, 0, 0x0ULL }, // Inst #1847 = MR |
5318 | | { 1846, 6, 0, 6, 305, 0, 0, SystemZImpOpBase + 0, 532, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1846 = MP |
5319 | | { 1845, 3, 1, 4, 191, 0, 0, SystemZImpOpBase + 0, 912, 0, 0x0ULL }, // Inst #1845 = MLR |
5320 | | { 1844, 3, 1, 4, 187, 0, 0, SystemZImpOpBase + 0, 858, 0, 0x0ULL }, // Inst #1844 = MLGR |
5321 | | { 1843, 5, 1, 6, 186, 0, 0, SystemZImpOpBase + 0, 892, 0|(1ULL<<MCID::MayLoad), 0x10cULL }, // Inst #1843 = MLG |
5322 | | { 1842, 5, 1, 6, 192, 0, 0, SystemZImpOpBase + 0, 892, 0|(1ULL<<MCID::MayLoad), 0x8cULL }, // Inst #1842 = ML |
5323 | | { 1841, 5, 1, 6, 190, 0, 0, SystemZImpOpBase + 0, 475, 0|(1ULL<<MCID::MayLoad), 0x4cULL }, // Inst #1841 = MHY |
5324 | | { 1840, 3, 1, 4, 189, 0, 0, SystemZImpOpBase + 0, 503, 0, 0x0ULL }, // Inst #1840 = MHI |
5325 | | { 1839, 5, 1, 4, 190, 0, 0, SystemZImpOpBase + 0, 475, 0|(1ULL<<MCID::MayLoad), 0x48ULL }, // Inst #1839 = MH |
5326 | | { 1838, 3, 1, 4, 195, 0, 0, SystemZImpOpBase + 0, 367, 0, 0x0ULL }, // Inst #1838 = MGRK |
5327 | | { 1837, 3, 1, 4, 188, 0, 0, SystemZImpOpBase + 0, 291, 0, 0x0ULL }, // Inst #1837 = MGHI |
5328 | | { 1836, 5, 1, 6, 193, 0, 0, SystemZImpOpBase + 0, 506, 0|(1ULL<<MCID::MayLoad), 0x4cULL }, // Inst #1836 = MGH |
5329 | | { 1835, 5, 1, 6, 194, 0, 0, SystemZImpOpBase + 0, 892, 0|(1ULL<<MCID::MayLoad), 0x10cULL }, // Inst #1835 = MG |
5330 | | { 1834, 5, 1, 6, 192, 0, 0, SystemZImpOpBase + 0, 892, 0|(1ULL<<MCID::MayLoad), 0x8cULL }, // Inst #1834 = MFY |
5331 | | { 1833, 3, 1, 2, 444, 0, 0, SystemZImpOpBase + 0, 1283, 0, 0x0ULL }, // Inst #1833 = MER |
5332 | | { 1832, 3, 1, 4, 889, 0, 0, SystemZImpOpBase + 0, 500, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1832 = MEER |
5333 | | { 1831, 3, 1, 4, 387, 1, 0, SystemZImpOpBase + 12, 500, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1831 = MEEBR |
5334 | | { 1830, 5, 1, 6, 386, 1, 0, SystemZImpOpBase + 12, 495, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x88ULL }, // Inst #1830 = MEEB |
5335 | | { 1829, 5, 1, 6, 888, 0, 0, SystemZImpOpBase + 0, 495, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #1829 = MEE |
5336 | | { 1828, 5, 1, 4, 443, 0, 0, SystemZImpOpBase + 0, 480, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #1828 = ME |
5337 | | { 1827, 4, 1, 4, 507, 1, 0, SystemZImpOpBase + 12, 491, 0, 0x0ULL }, // Inst #1827 = MDTRA |
5338 | | { 1826, 3, 1, 4, 507, 1, 0, SystemZImpOpBase + 12, 488, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1826 = MDTR |
5339 | | { 1825, 3, 1, 2, 889, 0, 0, SystemZImpOpBase + 0, 485, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1825 = MDR |
5340 | | { 1824, 3, 1, 2, 444, 0, 0, SystemZImpOpBase + 0, 1283, 0, 0x0ULL }, // Inst #1824 = MDER |
5341 | | { 1823, 3, 1, 4, 387, 1, 0, SystemZImpOpBase + 12, 1283, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1823 = MDEBR |
5342 | | { 1822, 5, 1, 6, 386, 1, 0, SystemZImpOpBase + 12, 480, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x88ULL }, // Inst #1822 = MDEB |
5343 | | { 1821, 5, 1, 4, 443, 0, 0, SystemZImpOpBase + 0, 480, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #1821 = MDE |
5344 | | { 1820, 3, 1, 4, 387, 1, 0, SystemZImpOpBase + 12, 485, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1820 = MDBR |
5345 | | { 1819, 5, 1, 6, 386, 1, 0, SystemZImpOpBase + 12, 480, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x108ULL }, // Inst #1819 = MDB |
5346 | | { 1818, 5, 1, 4, 888, 0, 0, SystemZImpOpBase + 0, 480, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #1818 = MD |
5347 | | { 1817, 3, 0, 4, 841, 0, 0, SystemZImpOpBase + 0, 455, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1817 = MC |
5348 | | { 1816, 4, 1, 4, 456, 0, 0, SystemZImpOpBase + 0, 1279, 0, 0x0ULL }, // Inst #1816 = MAYR |
5349 | | { 1815, 4, 1, 4, 457, 0, 0, SystemZImpOpBase + 0, 1259, 0, 0x0ULL }, // Inst #1815 = MAYLR |
5350 | | { 1814, 6, 1, 6, 455, 0, 0, SystemZImpOpBase + 0, 1253, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #1814 = MAYL |
5351 | | { 1813, 4, 1, 4, 457, 0, 0, SystemZImpOpBase + 0, 1259, 0, 0x0ULL }, // Inst #1813 = MAYHR |
5352 | | { 1812, 6, 1, 6, 455, 0, 0, SystemZImpOpBase + 0, 1253, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #1812 = MAYH |
5353 | | { 1811, 6, 1, 6, 454, 0, 0, SystemZImpOpBase + 0, 1273, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #1811 = MAY |
5354 | | { 1810, 4, 1, 4, 453, 0, 0, SystemZImpOpBase + 0, 1269, 0, 0x0ULL }, // Inst #1810 = MAER |
5355 | | { 1809, 4, 1, 4, 392, 1, 0, SystemZImpOpBase + 12, 1269, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1809 = MAEBR |
5356 | | { 1808, 6, 1, 6, 391, 1, 0, SystemZImpOpBase + 12, 1263, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x88ULL }, // Inst #1808 = MAEB |
5357 | | { 1807, 6, 1, 6, 452, 0, 0, SystemZImpOpBase + 0, 1263, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #1807 = MAE |
5358 | | { 1806, 4, 1, 4, 453, 0, 0, SystemZImpOpBase + 0, 1259, 0, 0x0ULL }, // Inst #1806 = MADR |
5359 | | { 1805, 4, 1, 4, 394, 1, 0, SystemZImpOpBase + 12, 1259, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1805 = MADBR |
5360 | | { 1804, 6, 1, 6, 393, 1, 0, SystemZImpOpBase + 12, 1253, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x108ULL }, // Inst #1804 = MADB |
5361 | | { 1803, 6, 1, 6, 452, 0, 0, SystemZImpOpBase + 0, 1253, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #1803 = MAD |
5362 | | { 1802, 5, 1, 4, 192, 0, 0, SystemZImpOpBase + 0, 892, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #1802 = M |
5363 | | { 1801, 1, 1, 4, 342, 0, 0, SystemZImpOpBase + 0, 334, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1801 = LZXR |
5364 | | { 1800, 4, 1, 6, 42, 0, 0, SystemZImpOpBase + 0, 149, 0|(1ULL<<MCID::MayLoad), 0x10cULL }, // Inst #1800 = LZRG |
5365 | | { 1799, 4, 1, 6, 42, 0, 0, SystemZImpOpBase + 0, 611, 0|(1ULL<<MCID::MayLoad), 0x8cULL }, // Inst #1799 = LZRF |
5366 | | { 1798, 1, 1, 4, 341, 0, 0, SystemZImpOpBase + 0, 333, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1798 = LZER |
5367 | | { 1797, 1, 1, 4, 341, 0, 0, SystemZImpOpBase + 0, 332, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1797 = LZDR |
5368 | | { 1796, 4, 1, 6, 33, 0, 0, SystemZImpOpBase + 0, 611, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x8dULL }, // Inst #1796 = LY |
5369 | | { 1795, 2, 1, 4, 346, 0, 0, SystemZImpOpBase + 0, 661, 0, 0x0ULL }, // Inst #1795 = LXR |
5370 | | { 1794, 2, 1, 4, 421, 0, 0, SystemZImpOpBase + 0, 1251, 0, 0x0ULL }, // Inst #1794 = LXER |
5371 | | { 1793, 2, 1, 4, 360, 1, 0, SystemZImpOpBase + 12, 1251, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1793 = LXEBR |
5372 | | { 1792, 4, 1, 6, 359, 1, 0, SystemZImpOpBase + 12, 335, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x88ULL }, // Inst #1792 = LXEB |
5373 | | { 1791, 4, 1, 6, 420, 0, 0, SystemZImpOpBase + 0, 335, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #1791 = LXE |
5374 | | { 1790, 3, 1, 4, 471, 1, 0, SystemZImpOpBase + 12, 1248, 0, 0x0ULL }, // Inst #1790 = LXDTR |
5375 | | { 1789, 2, 1, 4, 421, 0, 0, SystemZImpOpBase + 0, 1246, 0, 0x0ULL }, // Inst #1789 = LXDR |
5376 | | { 1788, 2, 1, 4, 360, 1, 0, SystemZImpOpBase + 12, 1246, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1788 = LXDBR |
5377 | | { 1787, 4, 1, 6, 359, 1, 0, SystemZImpOpBase + 12, 335, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x108ULL }, // Inst #1787 = LXDB |
5378 | | { 1786, 4, 1, 6, 420, 0, 0, SystemZImpOpBase + 0, 335, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #1786 = LXD |
5379 | | { 1785, 2, 1, 4, 806, 0, 0, SystemZImpOpBase + 0, 551, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1785 = LURAG |
5380 | | { 1784, 2, 1, 4, 806, 0, 0, SystemZImpOpBase + 0, 921, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1784 = LURA |
5381 | | { 1783, 2, 1, 4, 467, 1, 1, SystemZImpOpBase + 1, 661, 0, 0x0ULL }, // Inst #1783 = LTXTR |
5382 | | { 1782, 2, 1, 4, 414, 0, 1, SystemZImpOpBase + 0, 661, 0, 0x0ULL }, // Inst #1782 = LTXR |
5383 | | { 1781, 2, 1, 4, 348, 1, 1, SystemZImpOpBase + 1, 661, 0|(1ULL<<MCID::MayRaiseFPException), 0x3fc00ULL }, // Inst #1781 = LTXBR |
5384 | | { 1780, 2, 1, 2, 45, 0, 1, SystemZImpOpBase + 0, 803, 0, 0x3b800ULL }, // Inst #1780 = LTR |
5385 | | { 1779, 2, 1, 4, 45, 0, 1, SystemZImpOpBase + 0, 551, 0, 0x3b800ULL }, // Inst #1779 = LTGR |
5386 | | { 1778, 2, 1, 4, 60, 0, 1, SystemZImpOpBase + 0, 702, 0, 0x3b800ULL }, // Inst #1778 = LTGFR |
5387 | | { 1777, 4, 1, 6, 59, 0, 1, SystemZImpOpBase + 0, 149, 0|(1ULL<<MCID::MayLoad), 0x3b88cULL }, // Inst #1777 = LTGF |
5388 | | { 1776, 4, 1, 6, 44, 0, 1, SystemZImpOpBase + 0, 149, 0|(1ULL<<MCID::MayLoad), 0x3b90cULL }, // Inst #1776 = LTG |
5389 | | { 1775, 2, 1, 2, 413, 0, 1, SystemZImpOpBase + 0, 647, 0, 0x0ULL }, // Inst #1775 = LTER |
5390 | | { 1774, 2, 1, 4, 347, 1, 1, SystemZImpOpBase + 1, 647, 0|(1ULL<<MCID::MayRaiseFPException), 0x3fc00ULL }, // Inst #1774 = LTEBR |
5391 | | { 1773, 2, 1, 4, 466, 1, 1, SystemZImpOpBase + 1, 619, 0, 0x0ULL }, // Inst #1773 = LTDTR |
5392 | | { 1772, 2, 1, 2, 413, 0, 1, SystemZImpOpBase + 0, 619, 0, 0x0ULL }, // Inst #1772 = LTDR |
5393 | | { 1771, 2, 1, 4, 347, 1, 1, SystemZImpOpBase + 1, 619, 0|(1ULL<<MCID::MayRaiseFPException), 0x3fc00ULL }, // Inst #1771 = LTDBR |
5394 | | { 1770, 4, 1, 6, 44, 0, 1, SystemZImpOpBase + 0, 611, 0|(1ULL<<MCID::MayLoad), 0x3b88cULL }, // Inst #1770 = LT |
5395 | | { 1769, 2, 0, 4, 851, 0, 1, SystemZImpOpBase + 0, 663, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1769 = LSCTL |
5396 | | { 1768, 2, 1, 4, 82, 0, 0, SystemZImpOpBase + 0, 803, 0, 0x0ULL }, // Inst #1768 = LRVR |
5397 | | { 1767, 4, 1, 6, 83, 0, 0, SystemZImpOpBase + 0, 611, 0|(1ULL<<MCID::MayLoad), 0x4cULL }, // Inst #1767 = LRVH |
5398 | | { 1766, 2, 1, 4, 82, 0, 0, SystemZImpOpBase + 0, 551, 0, 0x0ULL }, // Inst #1766 = LRVGR |
5399 | | { 1765, 4, 1, 6, 83, 0, 0, SystemZImpOpBase + 0, 149, 0|(1ULL<<MCID::MayLoad), 0x10cULL }, // Inst #1765 = LRVG |
5400 | | { 1764, 4, 1, 6, 83, 0, 0, SystemZImpOpBase + 0, 611, 0|(1ULL<<MCID::MayLoad), 0x8cULL }, // Inst #1764 = LRV |
5401 | | { 1763, 2, 1, 6, 33, 0, 0, SystemZImpOpBase + 0, 753, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1763 = LRL |
5402 | | { 1762, 2, 1, 2, 415, 0, 0, SystemZImpOpBase + 0, 1116, 0, 0x0ULL }, // Inst #1762 = LRER |
5403 | | { 1761, 2, 1, 2, 417, 0, 0, SystemZImpOpBase + 0, 1114, 0, 0x0ULL }, // Inst #1761 = LRDR |
5404 | | { 1760, 4, 1, 6, 804, 0, 1, SystemZImpOpBase + 0, 149, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xcULL }, // Inst #1760 = LRAY |
5405 | | { 1759, 4, 1, 6, 804, 0, 1, SystemZImpOpBase + 0, 149, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xcULL }, // Inst #1759 = LRAG |
5406 | | { 1758, 4, 1, 4, 804, 0, 1, SystemZImpOpBase + 0, 149, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL }, // Inst #1758 = LRA |
5407 | | { 1757, 2, 1, 2, 41, 0, 0, SystemZImpOpBase + 0, 803, 0, 0x0ULL }, // Inst #1757 = LR |
5408 | | { 1756, 2, 1, 4, 429, 0, 1, SystemZImpOpBase + 0, 661, 0, 0x0ULL }, // Inst #1756 = LPXR |
5409 | | { 1755, 2, 1, 4, 373, 0, 1, SystemZImpOpBase + 0, 661, 0, 0x3fc00ULL }, // Inst #1755 = LPXBR |
5410 | | { 1754, 5, 2, 4, 803, 0, 1, SystemZImpOpBase + 0, 1241, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1754 = LPTEA |
5411 | | { 1753, 2, 0, 6, 773, 0, 1, SystemZImpOpBase + 0, 663, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x204ULL }, // Inst #1753 = LPSWEY |
5412 | | { 1752, 2, 0, 4, 861, 0, 1, SystemZImpOpBase + 0, 663, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x200ULL }, // Inst #1752 = LPSWE |
5413 | | { 1751, 2, 0, 4, 861, 0, 1, SystemZImpOpBase + 0, 663, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #1751 = LPSW |
5414 | | { 1750, 2, 1, 2, 88, 0, 1, SystemZImpOpBase + 0, 803, 0, 0x23c00ULL }, // Inst #1750 = LPR |
5415 | | { 1749, 4, 1, 6, 279, 0, 0, SystemZImpOpBase + 0, 294, 0|(1ULL<<MCID::MayLoad), 0x20cULL }, // Inst #1749 = LPQ |
5416 | | { 1748, 2, 0, 4, 847, 0, 0, SystemZImpOpBase + 0, 663, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #1748 = LPP |
5417 | | { 1747, 2, 1, 4, 88, 0, 1, SystemZImpOpBase + 0, 551, 0, 0x23c00ULL }, // Inst #1747 = LPGR |
5418 | | { 1746, 2, 1, 4, 89, 0, 1, SystemZImpOpBase + 0, 702, 0, 0x3b800ULL }, // Inst #1746 = LPGFR |
5419 | | { 1745, 2, 1, 2, 428, 0, 1, SystemZImpOpBase + 0, 647, 0, 0x0ULL }, // Inst #1745 = LPER |
5420 | | { 1744, 2, 1, 4, 371, 0, 1, SystemZImpOpBase + 0, 647, 0, 0x3fc00ULL }, // Inst #1744 = LPEBR |
5421 | | { 1743, 2, 1, 2, 428, 0, 1, SystemZImpOpBase + 0, 619, 0, 0x0ULL }, // Inst #1743 = LPDR |
5422 | | { 1742, 5, 1, 6, 281, 0, 1, SystemZImpOpBase + 0, 1236, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1742 = LPDG |
5423 | | { 1741, 2, 1, 4, 372, 0, 0, SystemZImpOpBase + 0, 647, 0, 0x0ULL }, // Inst #1741 = LPDFR_32 |
5424 | | { 1740, 2, 1, 4, 372, 0, 0, SystemZImpOpBase + 0, 619, 0, 0x0ULL }, // Inst #1740 = LPDFR |
5425 | | { 1739, 2, 1, 4, 371, 0, 1, SystemZImpOpBase + 0, 619, 0, 0x3fc00ULL }, // Inst #1739 = LPDBR |
5426 | | { 1738, 5, 1, 6, 281, 0, 1, SystemZImpOpBase + 0, 1236, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1738 = LPD |
5427 | | { 1737, 2, 0, 4, 851, 0, 1, SystemZImpOpBase + 0, 663, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #1737 = LPCTL |
5428 | | { 1736, 3, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 526, 0, 0x0ULL }, // Inst #1736 = LOCRAsmZ |
5429 | | { 1735, 3, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 526, 0, 0x0ULL }, // Inst #1735 = LOCRAsmP |
5430 | | { 1734, 3, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 526, 0, 0x0ULL }, // Inst #1734 = LOCRAsmO |
5431 | | { 1733, 3, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 526, 0, 0x0ULL }, // Inst #1733 = LOCRAsmNZ |
5432 | | { 1732, 3, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 526, 0, 0x0ULL }, // Inst #1732 = LOCRAsmNP |
5433 | | { 1731, 3, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 526, 0, 0x0ULL }, // Inst #1731 = LOCRAsmNO |
5434 | | { 1730, 3, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 526, 0, 0x0ULL }, // Inst #1730 = LOCRAsmNM |
5435 | | { 1729, 3, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 526, 0, 0x0ULL }, // Inst #1729 = LOCRAsmNLH |
5436 | | { 1728, 3, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 526, 0, 0x0ULL }, // Inst #1728 = LOCRAsmNLE |
5437 | | { 1727, 3, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 526, 0, 0x0ULL }, // Inst #1727 = LOCRAsmNL |
5438 | | { 1726, 3, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 526, 0, 0x0ULL }, // Inst #1726 = LOCRAsmNHE |
5439 | | { 1725, 3, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 526, 0, 0x0ULL }, // Inst #1725 = LOCRAsmNH |
5440 | | { 1724, 3, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 526, 0, 0x0ULL }, // Inst #1724 = LOCRAsmNE |
5441 | | { 1723, 3, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 526, 0, 0x0ULL }, // Inst #1723 = LOCRAsmM |
5442 | | { 1722, 3, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 526, 0, 0x0ULL }, // Inst #1722 = LOCRAsmLH |
5443 | | { 1721, 3, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 526, 0, 0x0ULL }, // Inst #1721 = LOCRAsmLE |
5444 | | { 1720, 3, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 526, 0, 0x0ULL }, // Inst #1720 = LOCRAsmL |
5445 | | { 1719, 3, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 526, 0, 0x0ULL }, // Inst #1719 = LOCRAsmHE |
5446 | | { 1718, 3, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 526, 0, 0x0ULL }, // Inst #1718 = LOCRAsmH |
5447 | | { 1717, 3, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 526, 0, 0x0ULL }, // Inst #1717 = LOCRAsmE |
5448 | | { 1716, 4, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 1232, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1716 = LOCRAsm |
5449 | | { 1715, 5, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 1227, 0|(1ULL<<MCID::Commutable), 0x80000ULL }, // Inst #1715 = LOCR |
5450 | | { 1714, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 503, 0, 0x0ULL }, // Inst #1714 = LOCHIAsmZ |
5451 | | { 1713, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 503, 0, 0x0ULL }, // Inst #1713 = LOCHIAsmP |
5452 | | { 1712, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 503, 0, 0x0ULL }, // Inst #1712 = LOCHIAsmO |
5453 | | { 1711, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 503, 0, 0x0ULL }, // Inst #1711 = LOCHIAsmNZ |
5454 | | { 1710, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 503, 0, 0x0ULL }, // Inst #1710 = LOCHIAsmNP |
5455 | | { 1709, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 503, 0, 0x0ULL }, // Inst #1709 = LOCHIAsmNO |
5456 | | { 1708, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 503, 0, 0x0ULL }, // Inst #1708 = LOCHIAsmNM |
5457 | | { 1707, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 503, 0, 0x0ULL }, // Inst #1707 = LOCHIAsmNLH |
5458 | | { 1706, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 503, 0, 0x0ULL }, // Inst #1706 = LOCHIAsmNLE |
5459 | | { 1705, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 503, 0, 0x0ULL }, // Inst #1705 = LOCHIAsmNL |
5460 | | { 1704, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 503, 0, 0x0ULL }, // Inst #1704 = LOCHIAsmNHE |
5461 | | { 1703, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 503, 0, 0x0ULL }, // Inst #1703 = LOCHIAsmNH |
5462 | | { 1702, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 503, 0, 0x0ULL }, // Inst #1702 = LOCHIAsmNE |
5463 | | { 1701, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 503, 0, 0x0ULL }, // Inst #1701 = LOCHIAsmM |
5464 | | { 1700, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 503, 0, 0x0ULL }, // Inst #1700 = LOCHIAsmLH |
5465 | | { 1699, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 503, 0, 0x0ULL }, // Inst #1699 = LOCHIAsmLE |
5466 | | { 1698, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 503, 0, 0x0ULL }, // Inst #1698 = LOCHIAsmL |
5467 | | { 1697, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 503, 0, 0x0ULL }, // Inst #1697 = LOCHIAsmHE |
5468 | | { 1696, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 503, 0, 0x0ULL }, // Inst #1696 = LOCHIAsmH |
5469 | | { 1695, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 503, 0, 0x0ULL }, // Inst #1695 = LOCHIAsmE |
5470 | | { 1694, 4, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 1223, 0, 0x0ULL }, // Inst #1694 = LOCHIAsm |
5471 | | { 1693, 5, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 1218, 0, 0x80000ULL }, // Inst #1693 = LOCHI |
5472 | | { 1692, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 523, 0, 0x0ULL }, // Inst #1692 = LOCHHIAsmZ |
5473 | | { 1691, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 523, 0, 0x0ULL }, // Inst #1691 = LOCHHIAsmP |
5474 | | { 1690, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 523, 0, 0x0ULL }, // Inst #1690 = LOCHHIAsmO |
5475 | | { 1689, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 523, 0, 0x0ULL }, // Inst #1689 = LOCHHIAsmNZ |
5476 | | { 1688, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 523, 0, 0x0ULL }, // Inst #1688 = LOCHHIAsmNP |
5477 | | { 1687, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 523, 0, 0x0ULL }, // Inst #1687 = LOCHHIAsmNO |
5478 | | { 1686, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 523, 0, 0x0ULL }, // Inst #1686 = LOCHHIAsmNM |
5479 | | { 1685, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 523, 0, 0x0ULL }, // Inst #1685 = LOCHHIAsmNLH |
5480 | | { 1684, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 523, 0, 0x0ULL }, // Inst #1684 = LOCHHIAsmNLE |
5481 | | { 1683, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 523, 0, 0x0ULL }, // Inst #1683 = LOCHHIAsmNL |
5482 | | { 1682, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 523, 0, 0x0ULL }, // Inst #1682 = LOCHHIAsmNHE |
5483 | | { 1681, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 523, 0, 0x0ULL }, // Inst #1681 = LOCHHIAsmNH |
5484 | | { 1680, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 523, 0, 0x0ULL }, // Inst #1680 = LOCHHIAsmNE |
5485 | | { 1679, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 523, 0, 0x0ULL }, // Inst #1679 = LOCHHIAsmM |
5486 | | { 1678, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 523, 0, 0x0ULL }, // Inst #1678 = LOCHHIAsmLH |
5487 | | { 1677, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 523, 0, 0x0ULL }, // Inst #1677 = LOCHHIAsmLE |
5488 | | { 1676, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 523, 0, 0x0ULL }, // Inst #1676 = LOCHHIAsmL |
5489 | | { 1675, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 523, 0, 0x0ULL }, // Inst #1675 = LOCHHIAsmHE |
5490 | | { 1674, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 523, 0, 0x0ULL }, // Inst #1674 = LOCHHIAsmH |
5491 | | { 1673, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 523, 0, 0x0ULL }, // Inst #1673 = LOCHHIAsmE |
5492 | | { 1672, 4, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 1214, 0, 0x0ULL }, // Inst #1672 = LOCHHIAsm |
5493 | | { 1671, 5, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 1209, 0, 0x80000ULL }, // Inst #1671 = LOCHHI |
5494 | | { 1670, 3, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 514, 0, 0x0ULL }, // Inst #1670 = LOCGRAsmZ |
5495 | | { 1669, 3, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 514, 0, 0x0ULL }, // Inst #1669 = LOCGRAsmP |
5496 | | { 1668, 3, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 514, 0, 0x0ULL }, // Inst #1668 = LOCGRAsmO |
5497 | | { 1667, 3, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 514, 0, 0x0ULL }, // Inst #1667 = LOCGRAsmNZ |
5498 | | { 1666, 3, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 514, 0, 0x0ULL }, // Inst #1666 = LOCGRAsmNP |
5499 | | { 1665, 3, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 514, 0, 0x0ULL }, // Inst #1665 = LOCGRAsmNO |
5500 | | { 1664, 3, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 514, 0, 0x0ULL }, // Inst #1664 = LOCGRAsmNM |
5501 | | { 1663, 3, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 514, 0, 0x0ULL }, // Inst #1663 = LOCGRAsmNLH |
5502 | | { 1662, 3, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 514, 0, 0x0ULL }, // Inst #1662 = LOCGRAsmNLE |
5503 | | { 1661, 3, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 514, 0, 0x0ULL }, // Inst #1661 = LOCGRAsmNL |
5504 | | { 1660, 3, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 514, 0, 0x0ULL }, // Inst #1660 = LOCGRAsmNHE |
5505 | | { 1659, 3, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 514, 0, 0x0ULL }, // Inst #1659 = LOCGRAsmNH |
5506 | | { 1658, 3, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 514, 0, 0x0ULL }, // Inst #1658 = LOCGRAsmNE |
5507 | | { 1657, 3, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 514, 0, 0x0ULL }, // Inst #1657 = LOCGRAsmM |
5508 | | { 1656, 3, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 514, 0, 0x0ULL }, // Inst #1656 = LOCGRAsmLH |
5509 | | { 1655, 3, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 514, 0, 0x0ULL }, // Inst #1655 = LOCGRAsmLE |
5510 | | { 1654, 3, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 514, 0, 0x0ULL }, // Inst #1654 = LOCGRAsmL |
5511 | | { 1653, 3, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 514, 0, 0x0ULL }, // Inst #1653 = LOCGRAsmHE |
5512 | | { 1652, 3, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 514, 0, 0x0ULL }, // Inst #1652 = LOCGRAsmH |
5513 | | { 1651, 3, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 514, 0, 0x0ULL }, // Inst #1651 = LOCGRAsmE |
5514 | | { 1650, 4, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 1205, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1650 = LOCGRAsm |
5515 | | { 1649, 5, 1, 4, 881, 1, 0, SystemZImpOpBase + 0, 1200, 0|(1ULL<<MCID::Commutable), 0x80000ULL }, // Inst #1649 = LOCGR |
5516 | | { 1648, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 291, 0, 0x0ULL }, // Inst #1648 = LOCGHIAsmZ |
5517 | | { 1647, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 291, 0, 0x0ULL }, // Inst #1647 = LOCGHIAsmP |
5518 | | { 1646, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 291, 0, 0x0ULL }, // Inst #1646 = LOCGHIAsmO |
5519 | | { 1645, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 291, 0, 0x0ULL }, // Inst #1645 = LOCGHIAsmNZ |
5520 | | { 1644, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 291, 0, 0x0ULL }, // Inst #1644 = LOCGHIAsmNP |
5521 | | { 1643, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 291, 0, 0x0ULL }, // Inst #1643 = LOCGHIAsmNO |
5522 | | { 1642, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 291, 0, 0x0ULL }, // Inst #1642 = LOCGHIAsmNM |
5523 | | { 1641, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 291, 0, 0x0ULL }, // Inst #1641 = LOCGHIAsmNLH |
5524 | | { 1640, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 291, 0, 0x0ULL }, // Inst #1640 = LOCGHIAsmNLE |
5525 | | { 1639, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 291, 0, 0x0ULL }, // Inst #1639 = LOCGHIAsmNL |
5526 | | { 1638, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 291, 0, 0x0ULL }, // Inst #1638 = LOCGHIAsmNHE |
5527 | | { 1637, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 291, 0, 0x0ULL }, // Inst #1637 = LOCGHIAsmNH |
5528 | | { 1636, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 291, 0, 0x0ULL }, // Inst #1636 = LOCGHIAsmNE |
5529 | | { 1635, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 291, 0, 0x0ULL }, // Inst #1635 = LOCGHIAsmM |
5530 | | { 1634, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 291, 0, 0x0ULL }, // Inst #1634 = LOCGHIAsmLH |
5531 | | { 1633, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 291, 0, 0x0ULL }, // Inst #1633 = LOCGHIAsmLE |
5532 | | { 1632, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 291, 0, 0x0ULL }, // Inst #1632 = LOCGHIAsmL |
5533 | | { 1631, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 291, 0, 0x0ULL }, // Inst #1631 = LOCGHIAsmHE |
5534 | | { 1630, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 291, 0, 0x0ULL }, // Inst #1630 = LOCGHIAsmH |
5535 | | { 1629, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 291, 0, 0x0ULL }, // Inst #1629 = LOCGHIAsmE |
5536 | | { 1628, 4, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 1196, 0, 0x0ULL }, // Inst #1628 = LOCGHIAsm |
5537 | | { 1627, 5, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 1191, 0, 0x80000ULL }, // Inst #1627 = LOCGHI |
5538 | | { 1626, 4, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1187, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1626 = LOCGAsmZ |
5539 | | { 1625, 4, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1187, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1625 = LOCGAsmP |
5540 | | { 1624, 4, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1187, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1624 = LOCGAsmO |
5541 | | { 1623, 4, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1187, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1623 = LOCGAsmNZ |
5542 | | { 1622, 4, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1187, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1622 = LOCGAsmNP |
5543 | | { 1621, 4, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1187, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1621 = LOCGAsmNO |
5544 | | { 1620, 4, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1187, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1620 = LOCGAsmNM |
5545 | | { 1619, 4, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1187, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1619 = LOCGAsmNLH |
5546 | | { 1618, 4, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1187, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1618 = LOCGAsmNLE |
5547 | | { 1617, 4, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1187, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1617 = LOCGAsmNL |
5548 | | { 1616, 4, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1187, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1616 = LOCGAsmNHE |
5549 | | { 1615, 4, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1187, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1615 = LOCGAsmNH |
5550 | | { 1614, 4, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1187, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1614 = LOCGAsmNE |
5551 | | { 1613, 4, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1187, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1613 = LOCGAsmM |
5552 | | { 1612, 4, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1187, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1612 = LOCGAsmLH |
5553 | | { 1611, 4, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1187, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1611 = LOCGAsmLE |
5554 | | { 1610, 4, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1187, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1610 = LOCGAsmL |
5555 | | { 1609, 4, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1187, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1609 = LOCGAsmHE |
5556 | | { 1608, 4, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1187, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1608 = LOCGAsmH |
5557 | | { 1607, 4, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1187, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1607 = LOCGAsmE |
5558 | | { 1606, 5, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1182, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1606 = LOCGAsm |
5559 | | { 1605, 6, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1176, 0|(1ULL<<MCID::MayLoad), 0x80104ULL }, // Inst #1605 = LOCG |
5560 | | { 1604, 3, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1173, 0, 0x0ULL }, // Inst #1604 = LOCFHRAsmZ |
5561 | | { 1603, 3, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1173, 0, 0x0ULL }, // Inst #1603 = LOCFHRAsmP |
5562 | | { 1602, 3, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1173, 0, 0x0ULL }, // Inst #1602 = LOCFHRAsmO |
5563 | | { 1601, 3, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1173, 0, 0x0ULL }, // Inst #1601 = LOCFHRAsmNZ |
5564 | | { 1600, 3, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1173, 0, 0x0ULL }, // Inst #1600 = LOCFHRAsmNP |
5565 | | { 1599, 3, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1173, 0, 0x0ULL }, // Inst #1599 = LOCFHRAsmNO |
5566 | | { 1598, 3, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1173, 0, 0x0ULL }, // Inst #1598 = LOCFHRAsmNM |
5567 | | { 1597, 3, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1173, 0, 0x0ULL }, // Inst #1597 = LOCFHRAsmNLH |
5568 | | { 1596, 3, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1173, 0, 0x0ULL }, // Inst #1596 = LOCFHRAsmNLE |
5569 | | { 1595, 3, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1173, 0, 0x0ULL }, // Inst #1595 = LOCFHRAsmNL |
5570 | | { 1594, 3, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1173, 0, 0x0ULL }, // Inst #1594 = LOCFHRAsmNHE |
5571 | | { 1593, 3, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1173, 0, 0x0ULL }, // Inst #1593 = LOCFHRAsmNH |
5572 | | { 1592, 3, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1173, 0, 0x0ULL }, // Inst #1592 = LOCFHRAsmNE |
5573 | | { 1591, 3, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1173, 0, 0x0ULL }, // Inst #1591 = LOCFHRAsmM |
5574 | | { 1590, 3, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1173, 0, 0x0ULL }, // Inst #1590 = LOCFHRAsmLH |
5575 | | { 1589, 3, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1173, 0, 0x0ULL }, // Inst #1589 = LOCFHRAsmLE |
5576 | | { 1588, 3, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1173, 0, 0x0ULL }, // Inst #1588 = LOCFHRAsmL |
5577 | | { 1587, 3, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1173, 0, 0x0ULL }, // Inst #1587 = LOCFHRAsmHE |
5578 | | { 1586, 3, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1173, 0, 0x0ULL }, // Inst #1586 = LOCFHRAsmH |
5579 | | { 1585, 3, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1173, 0, 0x0ULL }, // Inst #1585 = LOCFHRAsmE |
5580 | | { 1584, 4, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1169, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1584 = LOCFHRAsm |
5581 | | { 1583, 5, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1164, 0|(1ULL<<MCID::Commutable), 0x80000ULL }, // Inst #1583 = LOCFHR |
5582 | | { 1582, 4, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1160, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1582 = LOCFHAsmZ |
5583 | | { 1581, 4, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1160, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1581 = LOCFHAsmP |
5584 | | { 1580, 4, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1160, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1580 = LOCFHAsmO |
5585 | | { 1579, 4, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1160, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1579 = LOCFHAsmNZ |
5586 | | { 1578, 4, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1160, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1578 = LOCFHAsmNP |
5587 | | { 1577, 4, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1160, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1577 = LOCFHAsmNO |
5588 | | { 1576, 4, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1160, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1576 = LOCFHAsmNM |
5589 | | { 1575, 4, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1160, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1575 = LOCFHAsmNLH |
5590 | | { 1574, 4, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1160, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1574 = LOCFHAsmNLE |
5591 | | { 1573, 4, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1160, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1573 = LOCFHAsmNL |
5592 | | { 1572, 4, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1160, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1572 = LOCFHAsmNHE |
5593 | | { 1571, 4, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1160, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1571 = LOCFHAsmNH |
5594 | | { 1570, 4, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1160, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1570 = LOCFHAsmNE |
5595 | | { 1569, 4, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1160, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1569 = LOCFHAsmM |
5596 | | { 1568, 4, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1160, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1568 = LOCFHAsmLH |
5597 | | { 1567, 4, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1160, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1567 = LOCFHAsmLE |
5598 | | { 1566, 4, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1160, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1566 = LOCFHAsmL |
5599 | | { 1565, 4, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1160, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1565 = LOCFHAsmHE |
5600 | | { 1564, 4, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1160, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1564 = LOCFHAsmH |
5601 | | { 1563, 4, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1160, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1563 = LOCFHAsmE |
5602 | | { 1562, 5, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1155, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1562 = LOCFHAsm |
5603 | | { 1561, 6, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1149, 0|(1ULL<<MCID::MayLoad), 0x80084ULL }, // Inst #1561 = LOCFH |
5604 | | { 1560, 4, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1145, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1560 = LOCAsmZ |
5605 | | { 1559, 4, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1145, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1559 = LOCAsmP |
5606 | | { 1558, 4, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1145, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1558 = LOCAsmO |
5607 | | { 1557, 4, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1145, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1557 = LOCAsmNZ |
5608 | | { 1556, 4, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1145, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1556 = LOCAsmNP |
5609 | | { 1555, 4, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1145, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1555 = LOCAsmNO |
5610 | | { 1554, 4, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1145, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1554 = LOCAsmNM |
5611 | | { 1553, 4, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1145, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1553 = LOCAsmNLH |
5612 | | { 1552, 4, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1145, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1552 = LOCAsmNLE |
5613 | | { 1551, 4, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1145, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1551 = LOCAsmNL |
5614 | | { 1550, 4, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1145, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1550 = LOCAsmNHE |
5615 | | { 1549, 4, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1145, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1549 = LOCAsmNH |
5616 | | { 1548, 4, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1145, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1548 = LOCAsmNE |
5617 | | { 1547, 4, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1145, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1547 = LOCAsmM |
5618 | | { 1546, 4, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1145, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1546 = LOCAsmLH |
5619 | | { 1545, 4, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1145, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1545 = LOCAsmLE |
5620 | | { 1544, 4, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1145, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1544 = LOCAsmL |
5621 | | { 1543, 4, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1145, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1543 = LOCAsmHE |
5622 | | { 1542, 4, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1145, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1542 = LOCAsmH |
5623 | | { 1541, 4, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1145, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1541 = LOCAsmE |
5624 | | { 1540, 5, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1140, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1540 = LOCAsm |
5625 | | { 1539, 6, 1, 6, 882, 1, 0, SystemZImpOpBase + 0, 1134, 0|(1ULL<<MCID::MayLoad), 0x80084ULL }, // Inst #1539 = LOC |
5626 | | { 1538, 2, 1, 4, 429, 0, 1, SystemZImpOpBase + 0, 661, 0, 0x0ULL }, // Inst #1538 = LNXR |
5627 | | { 1537, 2, 1, 4, 373, 0, 1, SystemZImpOpBase + 0, 661, 0, 0x3fc00ULL }, // Inst #1537 = LNXBR |
5628 | | { 1536, 2, 1, 2, 90, 0, 1, SystemZImpOpBase + 0, 803, 0, 0x23c00ULL }, // Inst #1536 = LNR |
5629 | | { 1535, 2, 1, 4, 90, 0, 1, SystemZImpOpBase + 0, 551, 0, 0x23c00ULL }, // Inst #1535 = LNGR |
5630 | | { 1534, 2, 1, 4, 89, 0, 1, SystemZImpOpBase + 0, 702, 0, 0x3b800ULL }, // Inst #1534 = LNGFR |
5631 | | { 1533, 2, 1, 2, 428, 0, 1, SystemZImpOpBase + 0, 647, 0, 0x0ULL }, // Inst #1533 = LNER |
5632 | | { 1532, 2, 1, 4, 371, 0, 1, SystemZImpOpBase + 0, 647, 0, 0x3fc00ULL }, // Inst #1532 = LNEBR |
5633 | | { 1531, 2, 1, 2, 428, 0, 1, SystemZImpOpBase + 0, 619, 0, 0x0ULL }, // Inst #1531 = LNDR |
5634 | | { 1530, 2, 1, 4, 372, 0, 0, SystemZImpOpBase + 0, 647, 0, 0x0ULL }, // Inst #1530 = LNDFR_32 |
5635 | | { 1529, 2, 1, 4, 372, 0, 0, SystemZImpOpBase + 0, 619, 0, 0x0ULL }, // Inst #1529 = LNDFR |
5636 | | { 1528, 2, 1, 4, 371, 0, 1, SystemZImpOpBase + 0, 619, 0, 0x3fc00ULL }, // Inst #1528 = LNDBR |
5637 | | { 1527, 4, 2, 6, 79, 0, 0, SystemZImpOpBase + 0, 810, 0|(1ULL<<MCID::MayLoad), 0x4ULL }, // Inst #1527 = LMY |
5638 | | { 1526, 4, 2, 6, 79, 0, 0, SystemZImpOpBase + 0, 1130, 0|(1ULL<<MCID::MayLoad), 0x4ULL }, // Inst #1526 = LMH |
5639 | | { 1525, 4, 2, 6, 79, 0, 0, SystemZImpOpBase + 0, 727, 0|(1ULL<<MCID::MayLoad), 0x4ULL }, // Inst #1525 = LMG |
5640 | | { 1524, 6, 2, 6, 80, 0, 0, SystemZImpOpBase + 0, 1124, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1524 = LMD |
5641 | | { 1523, 4, 2, 4, 79, 0, 0, SystemZImpOpBase + 0, 810, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1523 = LM |
5642 | | { 1522, 4, 1, 6, 74, 0, 0, SystemZImpOpBase + 0, 149, 0|(1ULL<<MCID::MayLoad), 0x8cULL }, // Inst #1522 = LLZRGF |
5643 | | { 1521, 2, 1, 4, 38, 0, 0, SystemZImpOpBase + 0, 458, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1521 = LLILL |
5644 | | { 1520, 2, 1, 4, 38, 0, 0, SystemZImpOpBase + 0, 458, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1520 = LLILH |
5645 | | { 1519, 2, 1, 6, 38, 0, 0, SystemZImpOpBase + 0, 458, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1519 = LLILF |
5646 | | { 1518, 2, 1, 4, 37, 0, 0, SystemZImpOpBase + 0, 458, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1518 = LLIHL |
5647 | | { 1517, 2, 1, 4, 37, 0, 0, SystemZImpOpBase + 0, 458, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1517 = LLIHH |
5648 | | { 1516, 2, 1, 6, 37, 0, 0, SystemZImpOpBase + 0, 458, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1516 = LLIHF |
5649 | | { 1515, 2, 1, 6, 72, 0, 0, SystemZImpOpBase + 0, 753, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1515 = LLHRL |
5650 | | { 1514, 2, 1, 4, 67, 0, 0, SystemZImpOpBase + 0, 803, 0, 0x0ULL }, // Inst #1514 = LLHR |
5651 | | { 1513, 4, 1, 6, 71, 0, 0, SystemZImpOpBase + 0, 745, 0|(1ULL<<MCID::MayLoad), 0x4cULL }, // Inst #1513 = LLHH |
5652 | | { 1512, 4, 1, 6, 70, 0, 0, SystemZImpOpBase + 0, 611, 0|(1ULL<<MCID::MayLoad), 0x4cULL }, // Inst #1512 = LLH |
5653 | | { 1511, 2, 1, 4, 68, 0, 0, SystemZImpOpBase + 0, 551, 0, 0x0ULL }, // Inst #1511 = LLGTR |
5654 | | { 1510, 4, 1, 6, 75, 0, 0, SystemZImpOpBase + 0, 149, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x8cULL }, // Inst #1510 = LLGTAT |
5655 | | { 1509, 4, 1, 6, 73, 0, 0, SystemZImpOpBase + 0, 149, 0|(1ULL<<MCID::MayLoad), 0x8cULL }, // Inst #1509 = LLGT |
5656 | | { 1508, 2, 1, 6, 73, 0, 0, SystemZImpOpBase + 0, 704, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1508 = LLGHRL |
5657 | | { 1507, 2, 1, 4, 68, 0, 0, SystemZImpOpBase + 0, 551, 0, 0x0ULL }, // Inst #1507 = LLGHR |
5658 | | { 1506, 4, 1, 6, 73, 0, 0, SystemZImpOpBase + 0, 149, 0|(1ULL<<MCID::MayLoad), 0x4cULL }, // Inst #1506 = LLGH |
5659 | | { 1505, 4, 1, 6, 294, 0, 0, SystemZImpOpBase + 0, 149, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x8cULL }, // Inst #1505 = LLGFSG |
5660 | | { 1504, 2, 1, 6, 73, 0, 0, SystemZImpOpBase + 0, 704, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1504 = LLGFRL |
5661 | | { 1503, 2, 1, 4, 68, 0, 0, SystemZImpOpBase + 0, 702, 0, 0x0ULL }, // Inst #1503 = LLGFR |
5662 | | { 1502, 4, 1, 6, 75, 0, 0, SystemZImpOpBase + 0, 149, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x8cULL }, // Inst #1502 = LLGFAT |
5663 | | { 1501, 4, 1, 6, 73, 0, 0, SystemZImpOpBase + 0, 149, 0|(1ULL<<MCID::MayLoad), 0x8cULL }, // Inst #1501 = LLGF |
5664 | | { 1500, 2, 1, 4, 68, 0, 0, SystemZImpOpBase + 0, 551, 0, 0x0ULL }, // Inst #1500 = LLGCR |
5665 | | { 1499, 4, 1, 6, 73, 0, 0, SystemZImpOpBase + 0, 149, 0|(1ULL<<MCID::MayLoad), 0x2cULL }, // Inst #1499 = LLGC |
5666 | | { 1498, 2, 1, 4, 66, 0, 0, SystemZImpOpBase + 0, 803, 0, 0x0ULL }, // Inst #1498 = LLCR |
5667 | | { 1497, 4, 1, 6, 71, 0, 0, SystemZImpOpBase + 0, 745, 0|(1ULL<<MCID::MayLoad), 0x2cULL }, // Inst #1497 = LLCH |
5668 | | { 1496, 4, 1, 6, 69, 0, 0, SystemZImpOpBase + 0, 611, 0|(1ULL<<MCID::MayLoad), 0x2cULL }, // Inst #1496 = LLC |
5669 | | { 1495, 4, 1, 6, 62, 0, 0, SystemZImpOpBase + 0, 611, 0|(1ULL<<MCID::MayLoad), 0x4cULL }, // Inst #1495 = LHY |
5670 | | { 1494, 2, 1, 6, 63, 0, 0, SystemZImpOpBase + 0, 753, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1494 = LHRL |
5671 | | { 1493, 2, 1, 4, 57, 0, 0, SystemZImpOpBase + 0, 803, 0, 0x0ULL }, // Inst #1493 = LHR |
5672 | | { 1492, 2, 1, 4, 40, 0, 0, SystemZImpOpBase + 0, 679, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1492 = LHI |
5673 | | { 1491, 4, 1, 6, 63, 0, 0, SystemZImpOpBase + 0, 745, 0|(1ULL<<MCID::MayLoad), 0x4cULL }, // Inst #1491 = LHH |
5674 | | { 1490, 4, 1, 4, 62, 0, 0, SystemZImpOpBase + 0, 611, 0|(1ULL<<MCID::MayLoad), 0x48ULL }, // Inst #1490 = LH |
5675 | | { 1489, 4, 0, 6, 295, 0, 0, SystemZImpOpBase + 0, 149, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0xcULL }, // Inst #1489 = LGSC |
5676 | | { 1488, 2, 1, 6, 35, 0, 0, SystemZImpOpBase + 0, 704, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1488 = LGRL |
5677 | | { 1487, 2, 1, 4, 57, 0, 0, SystemZImpOpBase + 0, 551, 0, 0x0ULL }, // Inst #1487 = LGR |
5678 | | { 1486, 2, 1, 6, 65, 0, 0, SystemZImpOpBase + 0, 704, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1486 = LGHRL |
5679 | | { 1485, 2, 1, 4, 58, 0, 0, SystemZImpOpBase + 0, 551, 0, 0x0ULL }, // Inst #1485 = LGHR |
5680 | | { 1484, 2, 1, 4, 39, 0, 0, SystemZImpOpBase + 0, 458, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1484 = LGHI |
5681 | | { 1483, 4, 1, 6, 64, 0, 0, SystemZImpOpBase + 0, 149, 0|(1ULL<<MCID::MayLoad), 0x4cULL }, // Inst #1483 = LGH |
5682 | | { 1482, 4, 1, 6, 293, 0, 0, SystemZImpOpBase + 0, 149, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x10cULL }, // Inst #1482 = LGG |
5683 | | { 1481, 2, 1, 6, 65, 0, 0, SystemZImpOpBase + 0, 704, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1481 = LGFRL |
5684 | | { 1480, 2, 1, 4, 58, 0, 0, SystemZImpOpBase + 0, 702, 0, 0x0ULL }, // Inst #1480 = LGFR |
5685 | | { 1479, 2, 1, 6, 39, 0, 0, SystemZImpOpBase + 0, 458, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1479 = LGFI |
5686 | | { 1478, 4, 1, 6, 64, 0, 0, SystemZImpOpBase + 0, 149, 0|(1ULL<<MCID::MayLoad), 0x8cULL }, // Inst #1478 = LGF |
5687 | | { 1477, 2, 1, 4, 345, 0, 0, SystemZImpOpBase + 0, 874, 0|(1ULL<<MCID::Bitcast), 0x0ULL }, // Inst #1477 = LGDR |
5688 | | { 1476, 2, 1, 4, 58, 0, 0, SystemZImpOpBase + 0, 551, 0, 0x0ULL }, // Inst #1476 = LGBR |
5689 | | { 1475, 4, 1, 6, 64, 0, 0, SystemZImpOpBase + 0, 149, 0|(1ULL<<MCID::MayLoad), 0x2cULL }, // Inst #1475 = LGB |
5690 | | { 1474, 4, 1, 6, 43, 0, 0, SystemZImpOpBase + 0, 149, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x10cULL }, // Inst #1474 = LGAT |
5691 | | { 1473, 4, 1, 6, 35, 0, 0, SystemZImpOpBase + 0, 149, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x10dULL }, // Inst #1473 = LG |
5692 | | { 1472, 2, 0, 4, 409, 0, 1, SystemZImpOpBase + 12, 663, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1472 = LFPC |
5693 | | { 1471, 4, 1, 6, 43, 0, 0, SystemZImpOpBase + 0, 745, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x8cULL }, // Inst #1471 = LFHAT |
5694 | | { 1470, 4, 1, 6, 33, 0, 0, SystemZImpOpBase + 0, 745, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x8dULL }, // Inst #1470 = LFH |
5695 | | { 1469, 2, 0, 4, 411, 0, 1, SystemZImpOpBase + 12, 663, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1469 = LFAS |
5696 | | { 1468, 4, 1, 6, 350, 0, 0, SystemZImpOpBase + 0, 643, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x8dULL }, // Inst #1468 = LEY |
5697 | | { 1467, 2, 1, 4, 416, 0, 0, SystemZImpOpBase + 0, 1122, 0, 0x0ULL }, // Inst #1467 = LEXR |
5698 | | { 1466, 4, 1, 4, 356, 1, 0, SystemZImpOpBase + 12, 951, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1466 = LEXBRA |
5699 | | { 1465, 2, 1, 4, 356, 1, 0, SystemZImpOpBase + 12, 661, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1465 = LEXBR |
5700 | | { 1464, 2, 1, 2, 343, 0, 0, SystemZImpOpBase + 0, 647, 0, 0x0ULL }, // Inst #1464 = LER |
5701 | | { 1463, 4, 1, 4, 468, 1, 0, SystemZImpOpBase + 12, 1118, 0, 0x0ULL }, // Inst #1463 = LEDTR |
5702 | | { 1462, 2, 1, 2, 415, 0, 0, SystemZImpOpBase + 0, 1116, 0, 0x0ULL }, // Inst #1462 = LEDR |
5703 | | { 1461, 4, 1, 4, 355, 1, 0, SystemZImpOpBase + 12, 1118, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1461 = LEDBRA |
5704 | | { 1460, 2, 1, 4, 355, 1, 0, SystemZImpOpBase + 12, 1116, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1460 = LEDBR |
5705 | | { 1459, 4, 1, 4, 350, 0, 0, SystemZImpOpBase + 0, 643, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x89ULL }, // Inst #1459 = LE |
5706 | | { 1458, 4, 1, 6, 351, 0, 0, SystemZImpOpBase + 0, 615, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x10dULL }, // Inst #1458 = LDY |
5707 | | { 1457, 4, 1, 4, 469, 1, 0, SystemZImpOpBase + 12, 951, 0, 0x0ULL }, // Inst #1457 = LDXTR |
5708 | | { 1456, 2, 1, 2, 417, 0, 0, SystemZImpOpBase + 0, 1114, 0, 0x0ULL }, // Inst #1456 = LDXR |
5709 | | { 1455, 4, 1, 4, 356, 1, 0, SystemZImpOpBase + 12, 951, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1455 = LDXBRA |
5710 | | { 1454, 2, 1, 4, 356, 1, 0, SystemZImpOpBase + 12, 661, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1454 = LDXBR |
5711 | | { 1453, 2, 1, 2, 344, 0, 0, SystemZImpOpBase + 0, 647, 0, 0x0ULL }, // Inst #1453 = LDR32 |
5712 | | { 1452, 2, 1, 2, 344, 0, 0, SystemZImpOpBase + 0, 619, 0, 0x0ULL }, // Inst #1452 = LDR |
5713 | | { 1451, 2, 1, 4, 344, 0, 0, SystemZImpOpBase + 0, 627, 0|(1ULL<<MCID::Bitcast), 0x0ULL }, // Inst #1451 = LDGR |
5714 | | { 1450, 3, 1, 4, 470, 1, 0, SystemZImpOpBase + 12, 1111, 0, 0x0ULL }, // Inst #1450 = LDETR |
5715 | | { 1449, 2, 1, 4, 419, 0, 0, SystemZImpOpBase + 0, 1109, 0, 0x0ULL }, // Inst #1449 = LDER |
5716 | | { 1448, 2, 1, 4, 358, 1, 0, SystemZImpOpBase + 12, 1109, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1448 = LDEBR |
5717 | | { 1447, 4, 1, 6, 357, 1, 0, SystemZImpOpBase + 12, 615, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x88ULL }, // Inst #1447 = LDEB |
5718 | | { 1446, 4, 1, 6, 351, 0, 0, SystemZImpOpBase + 0, 643, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x89ULL }, // Inst #1446 = LDE32 |
5719 | | { 1445, 4, 1, 6, 418, 0, 0, SystemZImpOpBase + 0, 615, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #1445 = LDE |
5720 | | { 1444, 4, 1, 4, 351, 0, 0, SystemZImpOpBase + 0, 615, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x109ULL }, // Inst #1444 = LD |
5721 | | { 1443, 2, 1, 4, 429, 0, 1, SystemZImpOpBase + 0, 661, 0, 0x0ULL }, // Inst #1443 = LCXR |
5722 | | { 1442, 2, 1, 4, 373, 0, 1, SystemZImpOpBase + 0, 661, 0, 0x3fc00ULL }, // Inst #1442 = LCXBR |
5723 | | { 1441, 4, 2, 6, 780, 0, 0, SystemZImpOpBase + 0, 1105, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1441 = LCTLG |
5724 | | { 1440, 4, 2, 4, 780, 0, 0, SystemZImpOpBase + 0, 1105, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1440 = LCTL |
5725 | | { 1439, 2, 1, 2, 91, 0, 1, SystemZImpOpBase + 0, 803, 0, 0x23c00ULL }, // Inst #1439 = LCR |
5726 | | { 1438, 2, 1, 4, 91, 0, 1, SystemZImpOpBase + 0, 551, 0, 0x23c00ULL }, // Inst #1438 = LCGR |
5727 | | { 1437, 2, 1, 4, 92, 0, 1, SystemZImpOpBase + 0, 702, 0, 0x3b800ULL }, // Inst #1437 = LCGFR |
5728 | | { 1436, 2, 1, 2, 428, 0, 1, SystemZImpOpBase + 0, 647, 0, 0x0ULL }, // Inst #1436 = LCER |
5729 | | { 1435, 2, 1, 4, 371, 0, 1, SystemZImpOpBase + 0, 647, 0, 0x3fc00ULL }, // Inst #1435 = LCEBR |
5730 | | { 1434, 2, 1, 2, 428, 0, 1, SystemZImpOpBase + 0, 619, 0, 0x0ULL }, // Inst #1434 = LCDR |
5731 | | { 1433, 2, 1, 4, 372, 0, 0, SystemZImpOpBase + 0, 647, 0, 0x0ULL }, // Inst #1433 = LCDFR_32 |
5732 | | { 1432, 2, 1, 4, 372, 0, 0, SystemZImpOpBase + 0, 619, 0, 0x0ULL }, // Inst #1432 = LCDFR |
5733 | | { 1431, 2, 1, 4, 371, 0, 1, SystemZImpOpBase + 0, 619, 0, 0x3fc00ULL }, // Inst #1431 = LCDBR |
5734 | | { 1430, 2, 0, 4, 850, 0, 1, SystemZImpOpBase + 0, 663, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #1430 = LCCTL |
5735 | | { 1429, 5, 1, 6, 34, 0, 1, SystemZImpOpBase + 0, 1100, 0, 0x8ULL }, // Inst #1429 = LCBB |
5736 | | { 1428, 2, 1, 4, 57, 0, 0, SystemZImpOpBase + 0, 803, 0, 0x0ULL }, // Inst #1428 = LBR |
5737 | | { 1427, 4, 1, 6, 61, 0, 0, SystemZImpOpBase + 0, 745, 0|(1ULL<<MCID::MayLoad), 0x2cULL }, // Inst #1427 = LBH |
5738 | | { 1426, 2, 0, 4, 786, 0, 0, SystemZImpOpBase + 0, 663, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #1426 = LBEAR |
5739 | | { 1425, 4, 1, 6, 61, 0, 0, SystemZImpOpBase + 0, 611, 0|(1ULL<<MCID::MayLoad), 0x2cULL }, // Inst #1425 = LB |
5740 | | { 1424, 4, 1, 6, 86, 0, 0, SystemZImpOpBase + 0, 149, 0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0xcULL }, // Inst #1424 = LAY |
5741 | | { 1423, 4, 1, 6, 272, 0, 1, SystemZImpOpBase + 0, 727, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1423 = LAXG |
5742 | | { 1422, 4, 1, 6, 272, 0, 1, SystemZImpOpBase + 0, 810, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1422 = LAX |
5743 | | { 1421, 4, 1, 6, 43, 0, 0, SystemZImpOpBase + 0, 611, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x8cULL }, // Inst #1421 = LAT |
5744 | | { 1420, 4, 0, 6, 813, 0, 1, SystemZImpOpBase + 0, 1096, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1420 = LASP |
5745 | | { 1419, 2, 1, 6, 86, 0, 0, SystemZImpOpBase + 0, 704, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1419 = LARL |
5746 | | { 1418, 4, 1, 6, 271, 0, 1, SystemZImpOpBase + 0, 727, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1418 = LAOG |
5747 | | { 1417, 4, 1, 6, 271, 0, 1, SystemZImpOpBase + 0, 810, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1417 = LAO |
5748 | | { 1416, 4, 1, 6, 270, 0, 1, SystemZImpOpBase + 0, 727, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1416 = LANG |
5749 | | { 1415, 4, 1, 6, 270, 0, 1, SystemZImpOpBase + 0, 810, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1415 = LAN |
5750 | | { 1414, 4, 2, 6, 313, 0, 0, SystemZImpOpBase + 0, 1092, 0|(1ULL<<MCID::MayLoad), 0x4ULL }, // Inst #1414 = LAMY |
5751 | | { 1413, 4, 2, 4, 313, 0, 0, SystemZImpOpBase + 0, 1092, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1413 = LAM |
5752 | | { 1412, 4, 1, 6, 312, 0, 0, SystemZImpOpBase + 0, 149, 0, 0xcULL }, // Inst #1412 = LAEY |
5753 | | { 1411, 4, 1, 4, 312, 0, 0, SystemZImpOpBase + 0, 149, 0, 0x8ULL }, // Inst #1411 = LAE |
5754 | | { 1410, 4, 1, 6, 269, 0, 1, SystemZImpOpBase + 0, 727, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1410 = LAALG |
5755 | | { 1409, 4, 1, 6, 269, 0, 1, SystemZImpOpBase + 0, 810, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1409 = LAAL |
5756 | | { 1408, 4, 1, 6, 268, 0, 1, SystemZImpOpBase + 0, 727, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1408 = LAAG |
5757 | | { 1407, 4, 1, 6, 268, 0, 1, SystemZImpOpBase + 0, 810, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1407 = LAA |
5758 | | { 1406, 4, 1, 4, 86, 0, 0, SystemZImpOpBase + 0, 149, 0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x8ULL }, // Inst #1406 = LA |
5759 | | { 1405, 4, 1, 4, 33, 0, 0, SystemZImpOpBase + 0, 611, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x89ULL }, // Inst #1405 = L |
5760 | | { 1404, 2, 0, 4, 520, 1, 1, SystemZImpOpBase + 1, 661, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #1404 = KXTR |
5761 | | { 1403, 2, 0, 4, 403, 1, 1, SystemZImpOpBase + 1, 661, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x3c00ULL }, // Inst #1403 = KXBR |
5762 | | { 1402, 4, 2, 4, 869, 2, 1, SystemZImpOpBase + 43, 782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1402 = KMO |
5763 | | { 1401, 4, 2, 4, 869, 2, 1, SystemZImpOpBase + 43, 782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1401 = KMF |
5764 | | { 1400, 6, 3, 4, 869, 2, 1, SystemZImpOpBase + 43, 1086, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1400 = KMCTR |
5765 | | { 1399, 4, 2, 4, 869, 2, 1, SystemZImpOpBase + 43, 782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1399 = KMC |
5766 | | { 1398, 3, 1, 4, 862, 2, 1, SystemZImpOpBase + 43, 1083, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1398 = KMAC |
5767 | | { 1397, 6, 3, 4, 290, 2, 1, SystemZImpOpBase + 43, 1086, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1397 = KMA |
5768 | | { 1396, 4, 2, 4, 869, 2, 1, SystemZImpOpBase + 43, 782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1396 = KM |
5769 | | { 1395, 3, 1, 4, 862, 2, 1, SystemZImpOpBase + 43, 1083, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1395 = KLMD |
5770 | | { 1394, 3, 1, 4, 862, 2, 1, SystemZImpOpBase + 43, 1083, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1394 = KIMD |
5771 | | { 1393, 2, 0, 4, 402, 1, 1, SystemZImpOpBase + 1, 647, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x3c00ULL }, // Inst #1393 = KEBR |
5772 | | { 1392, 4, 0, 6, 401, 1, 1, SystemZImpOpBase + 1, 643, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3c88ULL }, // Inst #1392 = KEB |
5773 | | { 1391, 2, 0, 4, 519, 1, 1, SystemZImpOpBase + 1, 619, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #1391 = KDTR |
5774 | | { 1390, 3, 1, 4, 291, 2, 1, SystemZImpOpBase + 43, 1083, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1390 = KDSA |
5775 | | { 1389, 2, 0, 4, 402, 1, 1, SystemZImpOpBase + 1, 619, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x3c00ULL }, // Inst #1389 = KDBR |
5776 | | { 1388, 4, 0, 6, 401, 1, 1, SystemZImpOpBase + 1, 615, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3d08ULL }, // Inst #1388 = KDB |
5777 | | { 1387, 1, 0, 6, 3, 1, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1387 = JGAsmZ |
5778 | | { 1386, 1, 0, 6, 3, 1, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1386 = JGAsmP |
5779 | | { 1385, 1, 0, 6, 3, 1, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1385 = JGAsmO |
5780 | | { 1384, 1, 0, 6, 3, 1, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1384 = JGAsmNZ |
5781 | | { 1383, 1, 0, 6, 3, 1, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1383 = JGAsmNP |
5782 | | { 1382, 1, 0, 6, 3, 1, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1382 = JGAsmNO |
5783 | | { 1381, 1, 0, 6, 3, 1, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1381 = JGAsmNM |
5784 | | { 1380, 1, 0, 6, 3, 1, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1380 = JGAsmNLH |
5785 | | { 1379, 1, 0, 6, 3, 1, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1379 = JGAsmNLE |
5786 | | { 1378, 1, 0, 6, 3, 1, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1378 = JGAsmNL |
5787 | | { 1377, 1, 0, 6, 3, 1, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1377 = JGAsmNHE |
5788 | | { 1376, 1, 0, 6, 3, 1, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1376 = JGAsmNH |
5789 | | { 1375, 1, 0, 6, 3, 1, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1375 = JGAsmNE |
5790 | | { 1374, 1, 0, 6, 3, 1, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1374 = JGAsmM |
5791 | | { 1373, 1, 0, 6, 3, 1, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1373 = JGAsmLH |
5792 | | { 1372, 1, 0, 6, 3, 1, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1372 = JGAsmLE |
5793 | | { 1371, 1, 0, 6, 3, 1, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1371 = JGAsmL |
5794 | | { 1370, 1, 0, 6, 3, 1, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1370 = JGAsmHE |
5795 | | { 1369, 1, 0, 6, 3, 1, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1369 = JGAsmH |
5796 | | { 1368, 1, 0, 6, 3, 1, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1368 = JGAsmE |
5797 | | { 1367, 1, 0, 6, 3, 0, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1367 = JG |
5798 | | { 1366, 1, 0, 4, 3, 1, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1366 = JAsmZ |
5799 | | { 1365, 1, 0, 4, 3, 1, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1365 = JAsmP |
5800 | | { 1364, 1, 0, 4, 3, 1, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1364 = JAsmO |
5801 | | { 1363, 1, 0, 4, 3, 1, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1363 = JAsmNZ |
5802 | | { 1362, 1, 0, 4, 3, 1, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1362 = JAsmNP |
5803 | | { 1361, 1, 0, 4, 3, 1, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1361 = JAsmNO |
5804 | | { 1360, 1, 0, 4, 3, 1, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1360 = JAsmNM |
5805 | | { 1359, 1, 0, 4, 3, 1, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1359 = JAsmNLH |
5806 | | { 1358, 1, 0, 4, 3, 1, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1358 = JAsmNLE |
5807 | | { 1357, 1, 0, 4, 3, 1, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1357 = JAsmNL |
5808 | | { 1356, 1, 0, 4, 3, 1, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1356 = JAsmNHE |
5809 | | { 1355, 1, 0, 4, 3, 1, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1355 = JAsmNH |
5810 | | { 1354, 1, 0, 4, 3, 1, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1354 = JAsmNE |
5811 | | { 1353, 1, 0, 4, 3, 1, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1353 = JAsmM |
5812 | | { 1352, 1, 0, 4, 3, 1, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1352 = JAsmLH |
5813 | | { 1351, 1, 0, 4, 3, 1, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1351 = JAsmLE |
5814 | | { 1350, 1, 0, 4, 3, 1, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1350 = JAsmL |
5815 | | { 1349, 1, 0, 4, 3, 1, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1349 = JAsmHE |
5816 | | { 1348, 1, 0, 4, 3, 1, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1348 = JAsmH |
5817 | | { 1347, 1, 0, 4, 3, 1, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1347 = JAsmE |
5818 | | { 1346, 1, 0, 4, 3, 0, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1346 = J |
5819 | | { 1345, 5, 0, 6, 340, 0, 0, SystemZImpOpBase + 0, 1078, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1345 = InsnVSI |
5820 | | { 1344, 6, 0, 6, 340, 0, 0, SystemZImpOpBase + 0, 1072, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1344 = InsnVRX |
5821 | | { 1343, 6, 0, 6, 340, 0, 0, SystemZImpOpBase + 0, 1066, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1343 = InsnVRV |
5822 | | { 1342, 6, 0, 6, 340, 0, 0, SystemZImpOpBase + 0, 1060, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1342 = InsnVRS |
5823 | | { 1341, 7, 0, 6, 340, 0, 0, SystemZImpOpBase + 0, 1053, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1341 = InsnVRR |
5824 | | { 1340, 6, 0, 6, 340, 0, 0, SystemZImpOpBase + 0, 1047, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1340 = InsnVRI |
5825 | | { 1339, 6, 0, 6, 340, 0, 0, SystemZImpOpBase + 0, 1041, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1339 = InsnSSF |
5826 | | { 1338, 5, 0, 6, 340, 0, 0, SystemZImpOpBase + 0, 1036, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1338 = InsnSSE |
5827 | | { 1337, 7, 0, 6, 340, 0, 0, SystemZImpOpBase + 0, 1029, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1337 = InsnSS |
5828 | | { 1336, 4, 0, 6, 340, 0, 0, SystemZImpOpBase + 0, 1025, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1336 = InsnSIY |
5829 | | { 1335, 4, 0, 6, 340, 0, 0, SystemZImpOpBase + 0, 1025, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1335 = InsnSIL |
5830 | | { 1334, 4, 0, 4, 340, 0, 0, SystemZImpOpBase + 0, 1025, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1334 = InsnSI |
5831 | | { 1333, 3, 0, 4, 340, 0, 0, SystemZImpOpBase + 0, 1022, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1333 = InsnS |
5832 | | { 1332, 5, 0, 6, 340, 0, 0, SystemZImpOpBase + 0, 1011, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xcULL }, // Inst #1332 = InsnRXY |
5833 | | { 1331, 6, 0, 6, 340, 0, 0, SystemZImpOpBase + 0, 1016, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL }, // Inst #1331 = InsnRXF |
5834 | | { 1330, 5, 0, 6, 340, 0, 0, SystemZImpOpBase + 0, 1011, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL }, // Inst #1330 = InsnRXE |
5835 | | { 1329, 5, 0, 4, 340, 0, 0, SystemZImpOpBase + 0, 1011, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL }, // Inst #1329 = InsnRX |
5836 | | { 1328, 5, 0, 6, 340, 0, 0, SystemZImpOpBase + 0, 1006, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1328 = InsnRSY |
5837 | | { 1327, 4, 0, 4, 340, 0, 0, SystemZImpOpBase + 0, 979, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1327 = InsnRSI |
5838 | | { 1326, 5, 0, 6, 340, 0, 0, SystemZImpOpBase + 0, 1006, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1326 = InsnRSE |
5839 | | { 1325, 5, 0, 4, 340, 0, 0, SystemZImpOpBase + 0, 1006, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1325 = InsnRS |
5840 | | { 1324, 6, 0, 6, 340, 0, 0, SystemZImpOpBase + 0, 1000, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1324 = InsnRRS |
5841 | | { 1323, 5, 0, 4, 340, 0, 0, SystemZImpOpBase + 0, 995, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1323 = InsnRRF |
5842 | | { 1322, 3, 0, 4, 340, 0, 0, SystemZImpOpBase + 0, 992, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1322 = InsnRRE |
5843 | | { 1321, 3, 0, 2, 340, 0, 0, SystemZImpOpBase + 0, 992, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1321 = InsnRR |
5844 | | { 1320, 6, 0, 6, 340, 0, 0, SystemZImpOpBase + 0, 986, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1320 = InsnRIS |
5845 | | { 1319, 3, 0, 6, 340, 0, 0, SystemZImpOpBase + 0, 976, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1319 = InsnRILU |
5846 | | { 1318, 3, 0, 6, 340, 0, 0, SystemZImpOpBase + 0, 983, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1318 = InsnRIL |
5847 | | { 1317, 4, 0, 6, 340, 0, 0, SystemZImpOpBase + 0, 979, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1317 = InsnRIE |
5848 | | { 1316, 3, 0, 4, 340, 0, 0, SystemZImpOpBase + 0, 976, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1316 = InsnRI |
5849 | | { 1315, 1, 0, 2, 340, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1315 = InsnE |
5850 | | { 1314, 3, 1, 4, 789, 0, 0, SystemZImpOpBase + 0, 569, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1314 = IVSK |
5851 | | { 1313, 3, 1, 4, 788, 0, 0, SystemZImpOpBase + 0, 569, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1313 = ISKE |
5852 | | { 1312, 2, 1, 4, 792, 0, 0, SystemZImpOpBase + 0, 551, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1312 = IRBM |
5853 | | { 1311, 2, 0, 4, 797, 0, 0, SystemZImpOpBase + 0, 702, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1311 = IPTEOptOpt |
5854 | | { 1310, 3, 0, 4, 797, 0, 0, SystemZImpOpBase + 0, 973, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1310 = IPTEOpt |
5855 | | { 1309, 4, 0, 4, 797, 0, 0, SystemZImpOpBase + 0, 969, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1309 = IPTE |
5856 | | { 1308, 1, 1, 4, 315, 1, 0, SystemZImpOpBase + 0, 923, 0, 0x0ULL }, // Inst #1308 = IPM |
5857 | | { 1307, 0, 0, 4, 774, 1, 1, SystemZImpOpBase + 51, 1, 0, 0x0ULL }, // Inst #1307 = IPK |
5858 | | { 1306, 3, 1, 4, 102, 0, 0, SystemZImpOpBase + 0, 503, 0, 0x0ULL }, // Inst #1306 = IILL |
5859 | | { 1305, 3, 1, 4, 101, 0, 0, SystemZImpOpBase + 0, 503, 0, 0x0ULL }, // Inst #1305 = IILH |
5860 | | { 1304, 2, 1, 6, 100, 0, 0, SystemZImpOpBase + 0, 679, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1304 = IILF |
5861 | | { 1303, 3, 1, 4, 99, 0, 0, SystemZImpOpBase + 0, 523, 0, 0x0ULL }, // Inst #1303 = IIHL |
5862 | | { 1302, 3, 1, 4, 98, 0, 0, SystemZImpOpBase + 0, 523, 0, 0x0ULL }, // Inst #1302 = IIHH |
5863 | | { 1301, 2, 1, 6, 97, 0, 0, SystemZImpOpBase + 0, 764, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1301 = IIHF |
5864 | | { 1300, 3, 1, 4, 518, 0, 0, SystemZImpOpBase + 0, 541, 0, 0x0ULL }, // Inst #1300 = IEXTR |
5865 | | { 1299, 3, 1, 4, 517, 0, 0, SystemZImpOpBase + 0, 488, 0, 0x0ULL }, // Inst #1299 = IEDTR |
5866 | | { 1298, 3, 0, 4, 798, 0, 0, SystemZImpOpBase + 0, 370, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1298 = IDTEOpt |
5867 | | { 1297, 4, 0, 4, 798, 0, 0, SystemZImpOpBase + 0, 965, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1297 = IDTE |
5868 | | { 1296, 5, 1, 6, 93, 0, 0, SystemZImpOpBase + 0, 506, 0|(1ULL<<MCID::MayLoad), 0x2cULL }, // Inst #1296 = ICY |
5869 | | { 1295, 5, 1, 6, 95, 0, 1, SystemZImpOpBase + 0, 955, 0|(1ULL<<MCID::MayLoad), 0x4ULL }, // Inst #1295 = ICMY |
5870 | | { 1294, 5, 1, 6, 95, 0, 1, SystemZImpOpBase + 0, 960, 0|(1ULL<<MCID::MayLoad), 0x4ULL }, // Inst #1294 = ICMH |
5871 | | { 1293, 5, 1, 4, 95, 0, 1, SystemZImpOpBase + 0, 955, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1293 = ICM |
5872 | | { 1292, 5, 1, 6, 94, 0, 0, SystemZImpOpBase + 0, 475, 0|(1ULL<<MCID::MayLoad), 0x2cULL }, // Inst #1292 = IC32Y |
5873 | | { 1291, 5, 1, 4, 94, 0, 0, SystemZImpOpBase + 0, 475, 0|(1ULL<<MCID::MayLoad), 0x28ULL }, // Inst #1291 = IC32 |
5874 | | { 1290, 5, 1, 4, 93, 0, 0, SystemZImpOpBase + 0, 506, 0|(1ULL<<MCID::MayLoad), 0x28ULL }, // Inst #1290 = IC |
5875 | | { 1289, 1, 1, 4, 778, 0, 0, SystemZImpOpBase + 0, 923, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1289 = IAC |
5876 | | { 1288, 0, 0, 4, 854, 1, 1, SystemZImpOpBase + 41, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1288 = HSCH |
5877 | | { 1287, 2, 1, 2, 430, 0, 0, SystemZImpOpBase + 0, 647, 0, 0x0ULL }, // Inst #1287 = HER |
5878 | | { 1286, 2, 1, 2, 430, 0, 0, SystemZImpOpBase + 0, 619, 0, 0x0ULL }, // Inst #1286 = HDR |
5879 | | { 1285, 2, 1, 4, 328, 0, 1, SystemZImpOpBase + 0, 158, 0, 0x0ULL }, // Inst #1285 = FLOGR |
5880 | | { 1284, 4, 1, 4, 498, 1, 0, SystemZImpOpBase + 12, 951, 0, 0x0ULL }, // Inst #1284 = FIXTR |
5881 | | { 1283, 2, 1, 4, 436, 0, 0, SystemZImpOpBase + 0, 661, 0, 0x0ULL }, // Inst #1283 = FIXR |
5882 | | { 1282, 4, 1, 4, 379, 1, 0, SystemZImpOpBase + 12, 951, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1282 = FIXBRA |
5883 | | { 1281, 3, 1, 4, 379, 1, 0, SystemZImpOpBase + 12, 948, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1281 = FIXBR |
5884 | | { 1280, 2, 1, 4, 435, 0, 0, SystemZImpOpBase + 0, 647, 0, 0x0ULL }, // Inst #1280 = FIER |
5885 | | { 1279, 4, 1, 4, 378, 1, 0, SystemZImpOpBase + 12, 944, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1279 = FIEBRA |
5886 | | { 1278, 3, 1, 4, 378, 1, 0, SystemZImpOpBase + 12, 941, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1278 = FIEBR |
5887 | | { 1277, 4, 1, 4, 497, 1, 0, SystemZImpOpBase + 12, 937, 0, 0x0ULL }, // Inst #1277 = FIDTR |
5888 | | { 1276, 2, 1, 4, 435, 0, 0, SystemZImpOpBase + 0, 619, 0, 0x0ULL }, // Inst #1276 = FIDR |
5889 | | { 1275, 4, 1, 4, 378, 1, 0, SystemZImpOpBase + 12, 937, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1275 = FIDBRA |
5890 | | { 1274, 3, 1, 4, 378, 1, 0, SystemZImpOpBase + 12, 934, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1274 = FIDBR |
5891 | | { 1273, 2, 0, 6, 339, 0, 0, SystemZImpOpBase + 0, 932, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1273 = EXRL |
5892 | | { 1272, 4, 0, 4, 339, 0, 0, SystemZImpOpBase + 0, 928, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL }, // Inst #1272 = EX |
5893 | | { 1271, 1, 1, 4, 325, 0, 0, SystemZImpOpBase + 0, 923, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1271 = ETND |
5894 | | { 1270, 2, 1, 4, 502, 0, 0, SystemZImpOpBase + 0, 661, 0, 0x0ULL }, // Inst #1270 = ESXTR |
5895 | | { 1269, 2, 1, 4, 823, 0, 1, SystemZImpOpBase + 0, 926, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1269 = ESTA |
5896 | | { 1268, 2, 1, 4, 784, 0, 0, SystemZImpOpBase + 0, 924, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1268 = ESEA |
5897 | | { 1267, 2, 1, 4, 501, 0, 0, SystemZImpOpBase + 0, 619, 0, 0x0ULL }, // Inst #1267 = ESDTR |
5898 | | { 1266, 1, 1, 4, 782, 0, 0, SystemZImpOpBase + 0, 923, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1266 = ESAR |
5899 | | { 1265, 1, 1, 4, 782, 0, 0, SystemZImpOpBase + 0, 290, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1265 = ESAIR |
5900 | | { 1264, 2, 0, 4, 822, 0, 0, SystemZImpOpBase + 0, 551, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1264 = EREGG |
5901 | | { 1263, 2, 0, 4, 822, 0, 0, SystemZImpOpBase + 0, 803, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1263 = EREG |
5902 | | { 1262, 2, 2, 4, 772, 1, 0, SystemZImpOpBase + 0, 803, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1262 = EPSW |
5903 | | { 1261, 2, 1, 4, 849, 0, 1, SystemZImpOpBase + 0, 551, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1261 = EPCTR |
5904 | | { 1260, 1, 1, 4, 782, 0, 0, SystemZImpOpBase + 0, 923, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1260 = EPAR |
5905 | | { 1259, 1, 1, 4, 782, 0, 0, SystemZImpOpBase + 0, 290, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1259 = EPAIR |
5906 | | { 1258, 1, 1, 4, 406, 1, 0, SystemZImpOpBase + 12, 923, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1258 = EFPC |
5907 | | { 1257, 2, 1, 4, 500, 0, 0, SystemZImpOpBase + 0, 661, 0, 0x0ULL }, // Inst #1257 = EEXTR |
5908 | | { 1256, 2, 1, 4, 499, 0, 0, SystemZImpOpBase + 0, 619, 0, 0x0ULL }, // Inst #1256 = EEDTR |
5909 | | { 1255, 5, 0, 6, 310, 0, 1, SystemZImpOpBase + 0, 777, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1255 = EDMK |
5910 | | { 1254, 5, 0, 6, 310, 0, 1, SystemZImpOpBase + 0, 777, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1254 = ED |
5911 | | { 1253, 5, 0, 6, 836, 0, 2, SystemZImpOpBase + 49, 861, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1253 = ECTG |
5912 | | { 1252, 2, 1, 4, 848, 0, 1, SystemZImpOpBase + 0, 921, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1252 = ECPGA |
5913 | | { 1251, 2, 1, 4, 849, 0, 1, SystemZImpOpBase + 0, 551, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1251 = ECCTR |
5914 | | { 1250, 4, 1, 6, 835, 0, 0, SystemZImpOpBase + 0, 917, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1250 = ECAG |
5915 | | { 1249, 2, 1, 4, 311, 0, 0, SystemZImpOpBase + 0, 915, 0, 0x0ULL }, // Inst #1249 = EAR |
5916 | | { 1248, 4, 1, 4, 510, 1, 0, SystemZImpOpBase + 12, 544, 0, 0x0ULL }, // Inst #1248 = DXTRA |
5917 | | { 1247, 3, 1, 4, 510, 1, 0, SystemZImpOpBase + 12, 541, 0, 0x0ULL }, // Inst #1247 = DXTR |
5918 | | { 1246, 3, 1, 4, 462, 0, 0, SystemZImpOpBase + 0, 538, 0, 0x0ULL }, // Inst #1246 = DXR |
5919 | | { 1245, 3, 1, 4, 399, 1, 0, SystemZImpOpBase + 12, 538, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1245 = DXBR |
5920 | | { 1244, 3, 1, 4, 202, 0, 0, SystemZImpOpBase + 0, 858, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1244 = DSGR |
5921 | | { 1243, 3, 1, 4, 202, 0, 0, SystemZImpOpBase + 0, 912, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1243 = DSGFR |
5922 | | { 1242, 5, 1, 6, 203, 0, 0, SystemZImpOpBase + 0, 892, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x8cULL }, // Inst #1242 = DSGF |
5923 | | { 1241, 5, 1, 6, 203, 0, 0, SystemZImpOpBase + 0, 892, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x10cULL }, // Inst #1241 = DSG |
5924 | | { 1240, 3, 1, 2, 200, 0, 0, SystemZImpOpBase + 0, 912, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1240 = DR |
5925 | | { 1239, 6, 0, 6, 306, 0, 0, SystemZImpOpBase + 0, 532, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1239 = DP |
5926 | | { 1238, 3, 1, 4, 204, 0, 0, SystemZImpOpBase + 0, 912, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1238 = DLR |
5927 | | { 1237, 3, 1, 4, 205, 0, 0, SystemZImpOpBase + 0, 858, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1237 = DLGR |
5928 | | { 1236, 5, 1, 6, 206, 0, 0, SystemZImpOpBase + 0, 892, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x10cULL }, // Inst #1236 = DLG |
5929 | | { 1235, 5, 1, 6, 206, 0, 0, SystemZImpOpBase + 0, 892, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x8cULL }, // Inst #1235 = DL |
5930 | | { 1234, 5, 2, 4, 400, 1, 1, SystemZImpOpBase + 1, 907, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1234 = DIEBR |
5931 | | { 1233, 5, 2, 4, 400, 1, 1, SystemZImpOpBase + 1, 902, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1233 = DIDBR |
5932 | | { 1232, 4, 0, 4, 842, 0, 0, SystemZImpOpBase + 0, 810, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1232 = DIAG |
5933 | | { 1231, 5, 2, 4, 337, 2, 1, SystemZImpOpBase + 43, 897, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1231 = DFLTCC |
5934 | | { 1230, 3, 1, 2, 460, 0, 0, SystemZImpOpBase + 0, 500, 0, 0x0ULL }, // Inst #1230 = DER |
5935 | | { 1229, 3, 1, 4, 397, 1, 0, SystemZImpOpBase + 12, 500, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1229 = DEBR |
5936 | | { 1228, 5, 1, 6, 395, 1, 0, SystemZImpOpBase + 12, 495, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x88ULL }, // Inst #1228 = DEB |
5937 | | { 1227, 5, 1, 4, 458, 0, 0, SystemZImpOpBase + 0, 495, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #1227 = DE |
5938 | | { 1226, 4, 1, 4, 509, 1, 0, SystemZImpOpBase + 12, 491, 0, 0x0ULL }, // Inst #1226 = DDTRA |
5939 | | { 1225, 3, 1, 4, 509, 1, 0, SystemZImpOpBase + 12, 488, 0, 0x0ULL }, // Inst #1225 = DDTR |
5940 | | { 1224, 3, 1, 2, 461, 0, 0, SystemZImpOpBase + 0, 485, 0, 0x0ULL }, // Inst #1224 = DDR |
5941 | | { 1223, 3, 1, 4, 398, 1, 0, SystemZImpOpBase + 12, 485, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1223 = DDBR |
5942 | | { 1222, 5, 1, 6, 396, 1, 0, SystemZImpOpBase + 12, 480, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x108ULL }, // Inst #1222 = DDB |
5943 | | { 1221, 5, 1, 4, 459, 0, 0, SystemZImpOpBase + 0, 480, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #1221 = DD |
5944 | | { 1220, 5, 1, 4, 201, 0, 0, SystemZImpOpBase + 0, 892, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x88ULL }, // Inst #1220 = D |
5945 | | { 1219, 5, 0, 6, 491, 0, 0, SystemZImpOpBase + 0, 841, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1219 = CZXT |
5946 | | { 1218, 5, 0, 6, 490, 0, 0, SystemZImpOpBase + 0, 633, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1218 = CZDT |
5947 | | { 1217, 4, 0, 6, 218, 0, 1, SystemZImpOpBase + 0, 611, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x388cULL }, // Inst #1217 = CY |
5948 | | { 1216, 5, 1, 6, 489, 0, 0, SystemZImpOpBase + 0, 841, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1216 = CXZT |
5949 | | { 1215, 2, 1, 4, 485, 0, 0, SystemZImpOpBase + 0, 890, 0, 0x0ULL }, // Inst #1215 = CXUTR |
5950 | | { 1214, 2, 0, 4, 520, 1, 1, SystemZImpOpBase + 1, 661, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #1214 = CXTR |
5951 | | { 1213, 2, 1, 4, 485, 0, 0, SystemZImpOpBase + 0, 890, 0, 0x0ULL }, // Inst #1213 = CXSTR |
5952 | | { 1212, 2, 0, 4, 465, 0, 1, SystemZImpOpBase + 0, 661, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #1212 = CXR |
5953 | | { 1211, 5, 1, 6, 493, 0, 0, SystemZImpOpBase + 0, 841, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1211 = CXPT |
5954 | | { 1210, 4, 1, 4, 479, 1, 0, SystemZImpOpBase + 12, 886, 0, 0x0ULL }, // Inst #1210 = CXLGTR |
5955 | | { 1209, 4, 1, 4, 364, 1, 0, SystemZImpOpBase + 12, 886, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1209 = CXLGBR |
5956 | | { 1208, 4, 1, 4, 478, 1, 0, SystemZImpOpBase + 12, 880, 0, 0x0ULL }, // Inst #1208 = CXLFTR |
5957 | | { 1207, 4, 1, 4, 364, 1, 0, SystemZImpOpBase + 12, 880, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1207 = CXLFBR |
5958 | | { 1206, 4, 1, 4, 475, 1, 0, SystemZImpOpBase + 12, 886, 0, 0x0ULL }, // Inst #1206 = CXGTRA |
5959 | | { 1205, 2, 1, 4, 475, 1, 0, SystemZImpOpBase + 12, 884, 0, 0x0ULL }, // Inst #1205 = CXGTR |
5960 | | { 1204, 2, 1, 4, 423, 0, 0, SystemZImpOpBase + 0, 884, 0, 0x0ULL }, // Inst #1204 = CXGR |
5961 | | { 1203, 4, 1, 4, 362, 1, 0, SystemZImpOpBase + 12, 886, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1203 = CXGBRA |
5962 | | { 1202, 2, 1, 4, 362, 1, 0, SystemZImpOpBase + 12, 884, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1202 = CXGBR |
5963 | | { 1201, 4, 1, 4, 474, 1, 0, SystemZImpOpBase + 12, 880, 0, 0x0ULL }, // Inst #1201 = CXFTR |
5964 | | { 1200, 2, 1, 4, 423, 0, 0, SystemZImpOpBase + 0, 878, 0, 0x0ULL }, // Inst #1200 = CXFR |
5965 | | { 1199, 4, 1, 4, 362, 1, 0, SystemZImpOpBase + 12, 880, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1199 = CXFBRA |
5966 | | { 1198, 2, 1, 4, 362, 1, 0, SystemZImpOpBase + 12, 878, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1198 = CXFBR |
5967 | | { 1197, 2, 0, 4, 403, 1, 1, SystemZImpOpBase + 1, 661, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x3c00ULL }, // Inst #1197 = CXBR |
5968 | | { 1196, 4, 0, 6, 299, 0, 0, SystemZImpOpBase + 0, 611, 0|(1ULL<<MCID::MayStore), 0x8cULL }, // Inst #1196 = CVDY |
5969 | | { 1195, 4, 0, 6, 298, 0, 0, SystemZImpOpBase + 0, 149, 0|(1ULL<<MCID::MayStore), 0x10cULL }, // Inst #1195 = CVDG |
5970 | | { 1194, 4, 0, 4, 299, 0, 0, SystemZImpOpBase + 0, 611, 0|(1ULL<<MCID::MayStore), 0x88ULL }, // Inst #1194 = CVD |
5971 | | { 1193, 5, 1, 6, 297, 0, 0, SystemZImpOpBase + 0, 475, 0|(1ULL<<MCID::MayLoad), 0x8cULL }, // Inst #1193 = CVBY |
5972 | | { 1192, 5, 1, 6, 296, 0, 0, SystemZImpOpBase + 0, 506, 0|(1ULL<<MCID::MayLoad), 0x10cULL }, // Inst #1192 = CVBG |
5973 | | { 1191, 5, 1, 4, 297, 0, 0, SystemZImpOpBase + 0, 475, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #1191 = CVB |
5974 | | { 1190, 2, 1, 4, 487, 0, 0, SystemZImpOpBase + 0, 876, 0, 0x0ULL }, // Inst #1190 = CUXTR |
5975 | | { 1189, 4, 2, 4, 289, 0, 1, SystemZImpOpBase + 0, 782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1189 = CUUTFOpt |
5976 | | { 1188, 5, 2, 4, 289, 0, 1, SystemZImpOpBase + 0, 869, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1188 = CUUTF |
5977 | | { 1187, 4, 2, 4, 289, 0, 1, SystemZImpOpBase + 0, 782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1187 = CUTFUOpt |
5978 | | { 1186, 5, 2, 4, 289, 0, 1, SystemZImpOpBase + 0, 869, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1186 = CUTFU |
5979 | | { 1185, 4, 2, 4, 331, 2, 1, SystemZImpOpBase + 46, 782, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1185 = CUSE |
5980 | | { 1184, 2, 1, 4, 486, 0, 0, SystemZImpOpBase + 0, 874, 0, 0x0ULL }, // Inst #1184 = CUDTR |
5981 | | { 1183, 4, 2, 4, 288, 0, 1, SystemZImpOpBase + 0, 782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1183 = CU42 |
5982 | | { 1182, 4, 2, 4, 288, 0, 1, SystemZImpOpBase + 0, 782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1182 = CU41 |
5983 | | { 1181, 4, 2, 4, 288, 0, 1, SystemZImpOpBase + 0, 782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1181 = CU24Opt |
5984 | | { 1180, 5, 2, 4, 288, 0, 1, SystemZImpOpBase + 0, 869, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1180 = CU24 |
5985 | | { 1179, 4, 2, 4, 288, 0, 1, SystemZImpOpBase + 0, 782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1179 = CU21Opt |
5986 | | { 1178, 5, 2, 4, 288, 0, 1, SystemZImpOpBase + 0, 869, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1178 = CU21 |
5987 | | { 1177, 4, 2, 4, 288, 0, 1, SystemZImpOpBase + 0, 782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1177 = CU14Opt |
5988 | | { 1176, 5, 2, 4, 288, 0, 1, SystemZImpOpBase + 0, 869, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1176 = CU14 |
5989 | | { 1175, 4, 2, 4, 288, 0, 1, SystemZImpOpBase + 0, 782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1175 = CU12Opt |
5990 | | { 1174, 5, 2, 4, 288, 0, 1, SystemZImpOpBase + 0, 869, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1174 = CU12 |
5991 | | { 1173, 5, 1, 6, 274, 0, 1, SystemZImpOpBase + 0, 601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1173 = CSY |
5992 | | { 1172, 3, 1, 4, 487, 0, 0, SystemZImpOpBase + 0, 866, 0, 0x0ULL }, // Inst #1172 = CSXTR |
5993 | | { 1171, 5, 0, 6, 277, 2, 1, SystemZImpOpBase + 43, 861, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1171 = CSST |
5994 | | { 1170, 3, 1, 4, 802, 0, 1, SystemZImpOpBase + 0, 858, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1170 = CSPG |
5995 | | { 1169, 3, 1, 4, 802, 0, 1, SystemZImpOpBase + 0, 858, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1169 = CSP |
5996 | | { 1168, 5, 1, 6, 274, 0, 1, SystemZImpOpBase + 0, 606, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1168 = CSG |
5997 | | { 1167, 3, 1, 4, 486, 0, 0, SystemZImpOpBase + 0, 855, 0, 0x0ULL }, // Inst #1167 = CSDTR |
5998 | | { 1166, 0, 0, 4, 854, 1, 1, SystemZImpOpBase + 41, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1166 = CSCH |
5999 | | { 1165, 5, 1, 4, 274, 0, 1, SystemZImpOpBase + 0, 601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1165 = CS |
6000 | | { 1164, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 803, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1164 = CRTAsmNLH |
6001 | | { 1163, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 803, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1163 = CRTAsmNLE |
6002 | | { 1162, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 803, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1162 = CRTAsmNL |
6003 | | { 1161, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 803, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1161 = CRTAsmNHE |
6004 | | { 1160, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 803, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1160 = CRTAsmNH |
6005 | | { 1159, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 803, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1159 = CRTAsmNE |
6006 | | { 1158, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 803, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1158 = CRTAsmLH |
6007 | | { 1157, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 803, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1157 = CRTAsmLE |
6008 | | { 1156, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 803, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1156 = CRTAsmL |
6009 | | { 1155, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 803, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1155 = CRTAsmHE |
6010 | | { 1154, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 803, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1154 = CRTAsmH |
6011 | | { 1153, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 803, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1153 = CRTAsmE |
6012 | | { 1152, 3, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 239, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1152 = CRTAsm |
6013 | | { 1151, 3, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 239, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1151 = CRT |
6014 | | { 1150, 2, 0, 6, 219, 0, 1, SystemZImpOpBase + 0, 753, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL }, // Inst #1150 = CRL |
6015 | | { 1149, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 818, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1149 = CRJAsmNLH |
6016 | | { 1148, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 818, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1148 = CRJAsmNLE |
6017 | | { 1147, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 818, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1147 = CRJAsmNL |
6018 | | { 1146, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 818, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1146 = CRJAsmNHE |
6019 | | { 1145, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 818, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1145 = CRJAsmNH |
6020 | | { 1144, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 818, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1144 = CRJAsmNE |
6021 | | { 1143, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 818, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1143 = CRJAsmLH |
6022 | | { 1142, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 818, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1142 = CRJAsmLE |
6023 | | { 1141, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 818, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1141 = CRJAsmL |
6024 | | { 1140, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 818, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1140 = CRJAsmHE |
6025 | | { 1139, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 818, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1139 = CRJAsmH |
6026 | | { 1138, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 818, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1138 = CRJAsmE |
6027 | | { 1137, 4, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 814, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1137 = CRJAsm |
6028 | | { 1136, 4, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 814, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1136 = CRJ |
6029 | | { 1135, 3, 0, 4, 800, 0, 1, SystemZImpOpBase + 0, 852, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1135 = CRDTEOpt |
6030 | | { 1134, 4, 0, 4, 800, 0, 1, SystemZImpOpBase + 0, 848, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1134 = CRDTE |
6031 | | { 1133, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 810, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1133 = CRBAsmNLH |
6032 | | { 1132, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 810, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1132 = CRBAsmNLE |
6033 | | { 1131, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 810, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1131 = CRBAsmNL |
6034 | | { 1130, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 810, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1130 = CRBAsmNHE |
6035 | | { 1129, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 810, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1129 = CRBAsmNH |
6036 | | { 1128, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 810, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1128 = CRBAsmNE |
6037 | | { 1127, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 810, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1127 = CRBAsmLH |
6038 | | { 1126, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 810, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1126 = CRBAsmLE |
6039 | | { 1125, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 810, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1125 = CRBAsmL |
6040 | | { 1124, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 810, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1124 = CRBAsmHE |
6041 | | { 1123, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 810, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1123 = CRBAsmH |
6042 | | { 1122, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 810, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1122 = CRBAsmE |
6043 | | { 1121, 5, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 805, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1121 = CRBAsm |
6044 | | { 1120, 5, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 805, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1120 = CRB |
6045 | | { 1119, 2, 0, 2, 223, 0, 1, SystemZImpOpBase + 0, 803, 0|(1ULL<<MCID::Compare), 0x3800ULL }, // Inst #1119 = CR |
6046 | | { 1118, 2, 1, 4, 311, 0, 0, SystemZImpOpBase + 0, 846, 0, 0x0ULL }, // Inst #1118 = CPYA |
6047 | | { 1117, 5, 0, 6, 495, 0, 0, SystemZImpOpBase + 0, 841, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1117 = CPXT |
6048 | | { 1116, 3, 1, 4, 349, 0, 0, SystemZImpOpBase + 0, 838, 0, 0x0ULL }, // Inst #1116 = CPSDRss |
6049 | | { 1115, 3, 1, 4, 349, 0, 0, SystemZImpOpBase + 0, 835, 0, 0x0ULL }, // Inst #1115 = CPSDRsd |
6050 | | { 1114, 3, 1, 4, 349, 0, 0, SystemZImpOpBase + 0, 832, 0, 0x0ULL }, // Inst #1114 = CPSDRds |
6051 | | { 1113, 3, 1, 4, 349, 0, 0, SystemZImpOpBase + 0, 488, 0, 0x0ULL }, // Inst #1113 = CPSDRdd |
6052 | | { 1112, 5, 0, 6, 494, 0, 0, SystemZImpOpBase + 0, 633, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1112 = CPDT |
6053 | | { 1111, 6, 0, 6, 308, 0, 1, SystemZImpOpBase + 0, 532, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1111 = CP |
6054 | | { 1110, 4, 2, 4, 335, 2, 2, SystemZImpOpBase + 37, 782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1110 = CMPSC |
6055 | | { 1109, 4, 0, 6, 227, 0, 1, SystemZImpOpBase + 0, 611, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x10388cULL }, // Inst #1109 = CLY |
6056 | | { 1108, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 829, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1108 = CLTAsmNLH |
6057 | | { 1107, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 829, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1107 = CLTAsmNLE |
6058 | | { 1106, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 829, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1106 = CLTAsmNL |
6059 | | { 1105, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 829, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1105 = CLTAsmNHE |
6060 | | { 1104, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 829, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1104 = CLTAsmNH |
6061 | | { 1103, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 829, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1103 = CLTAsmNE |
6062 | | { 1102, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 829, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1102 = CLTAsmLH |
6063 | | { 1101, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 829, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1101 = CLTAsmLE |
6064 | | { 1100, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 829, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1100 = CLTAsmL |
6065 | | { 1099, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 829, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1099 = CLTAsmHE |
6066 | | { 1098, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 829, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1098 = CLTAsmH |
6067 | | { 1097, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 829, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1097 = CLTAsmE |
6068 | | { 1096, 4, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 825, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1096 = CLTAsm |
6069 | | { 1095, 4, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 825, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1095 = CLT |
6070 | | { 1094, 4, 2, 4, 255, 1, 1, SystemZImpOpBase + 35, 821, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1094 = CLST |
6071 | | { 1093, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 803, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1093 = CLRTAsmNLH |
6072 | | { 1092, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 803, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1092 = CLRTAsmNLE |
6073 | | { 1091, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 803, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1091 = CLRTAsmNL |
6074 | | { 1090, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 803, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1090 = CLRTAsmNHE |
6075 | | { 1089, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 803, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1089 = CLRTAsmNH |
6076 | | { 1088, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 803, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1088 = CLRTAsmNE |
6077 | | { 1087, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 803, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1087 = CLRTAsmLH |
6078 | | { 1086, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 803, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1086 = CLRTAsmLE |
6079 | | { 1085, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 803, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1085 = CLRTAsmL |
6080 | | { 1084, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 803, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1084 = CLRTAsmHE |
6081 | | { 1083, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 803, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1083 = CLRTAsmH |
6082 | | { 1082, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 803, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1082 = CLRTAsmE |
6083 | | { 1081, 3, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 239, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1081 = CLRTAsm |
6084 | | { 1080, 3, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 239, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1080 = CLRT |
6085 | | { 1079, 2, 0, 6, 242, 0, 1, SystemZImpOpBase + 0, 753, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL }, // Inst #1079 = CLRL |
6086 | | { 1078, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 818, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1078 = CLRJAsmNLH |
6087 | | { 1077, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 818, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1077 = CLRJAsmNLE |
6088 | | { 1076, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 818, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1076 = CLRJAsmNL |
6089 | | { 1075, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 818, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1075 = CLRJAsmNHE |
6090 | | { 1074, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 818, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1074 = CLRJAsmNH |
6091 | | { 1073, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 818, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1073 = CLRJAsmNE |
6092 | | { 1072, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 818, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1072 = CLRJAsmLH |
6093 | | { 1071, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 818, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1071 = CLRJAsmLE |
6094 | | { 1070, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 818, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1070 = CLRJAsmL |
6095 | | { 1069, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 818, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1069 = CLRJAsmHE |
6096 | | { 1068, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 818, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1068 = CLRJAsmH |
6097 | | { 1067, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 818, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1067 = CLRJAsmE |
6098 | | { 1066, 4, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 814, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1066 = CLRJAsm |
6099 | | { 1065, 4, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 814, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1065 = CLRJ |
6100 | | { 1064, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 810, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1064 = CLRBAsmNLH |
6101 | | { 1063, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 810, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1063 = CLRBAsmNLE |
6102 | | { 1062, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 810, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1062 = CLRBAsmNL |
6103 | | { 1061, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 810, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1061 = CLRBAsmNHE |
6104 | | { 1060, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 810, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1060 = CLRBAsmNH |
6105 | | { 1059, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 810, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1059 = CLRBAsmNE |
6106 | | { 1058, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 810, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1058 = CLRBAsmLH |
6107 | | { 1057, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 810, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1057 = CLRBAsmLE |
6108 | | { 1056, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 810, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1056 = CLRBAsmL |
6109 | | { 1055, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 810, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1055 = CLRBAsmHE |
6110 | | { 1054, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 810, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1054 = CLRBAsmH |
6111 | | { 1053, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 810, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1053 = CLRBAsmE |
6112 | | { 1052, 5, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 805, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1052 = CLRBAsm |
6113 | | { 1051, 5, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 805, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1051 = CLRB |
6114 | | { 1050, 2, 0, 2, 241, 0, 1, SystemZImpOpBase + 0, 803, 0|(1ULL<<MCID::Compare), 0x103800ULL }, // Inst #1050 = CLR |
6115 | | { 1049, 4, 0, 6, 262, 0, 1, SystemZImpOpBase + 0, 760, 0|(1ULL<<MCID::MayLoad), 0x4ULL }, // Inst #1049 = CLMY |
6116 | | { 1048, 4, 0, 6, 262, 0, 1, SystemZImpOpBase + 0, 799, 0|(1ULL<<MCID::MayLoad), 0x4ULL }, // Inst #1048 = CLMH |
6117 | | { 1047, 4, 0, 4, 262, 0, 1, SystemZImpOpBase + 0, 760, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1047 = CLM |
6118 | | { 1046, 3, 0, 6, 240, 0, 1, SystemZImpOpBase + 0, 455, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103804ULL }, // Inst #1046 = CLIY |
6119 | | { 1045, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 770, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1045 = CLIJAsmNLH |
6120 | | { 1044, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 770, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1044 = CLIJAsmNLE |
6121 | | { 1043, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 770, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1043 = CLIJAsmNL |
6122 | | { 1042, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 770, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1042 = CLIJAsmNHE |
6123 | | { 1041, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 770, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1041 = CLIJAsmNH |
6124 | | { 1040, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 770, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1040 = CLIJAsmNE |
6125 | | { 1039, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 770, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1039 = CLIJAsmLH |
6126 | | { 1038, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 770, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1038 = CLIJAsmLE |
6127 | | { 1037, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 770, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1037 = CLIJAsmL |
6128 | | { 1036, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 770, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1036 = CLIJAsmHE |
6129 | | { 1035, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 770, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1035 = CLIJAsmH |
6130 | | { 1034, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 770, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1034 = CLIJAsmE |
6131 | | { 1033, 4, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 766, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1033 = CLIJAsm |
6132 | | { 1032, 4, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 766, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1032 = CLIJ |
6133 | | { 1031, 2, 0, 6, 239, 0, 1, SystemZImpOpBase + 0, 764, 0|(1ULL<<MCID::Compare), 0x103800ULL }, // Inst #1031 = CLIH |
6134 | | { 1030, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 760, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1030 = CLIBAsmNLH |
6135 | | { 1029, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 760, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1029 = CLIBAsmNLE |
6136 | | { 1028, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 760, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1028 = CLIBAsmNL |
6137 | | { 1027, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 760, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1027 = CLIBAsmNHE |
6138 | | { 1026, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 760, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1026 = CLIBAsmNH |
6139 | | { 1025, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 760, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1025 = CLIBAsmNE |
6140 | | { 1024, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 760, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1024 = CLIBAsmLH |
6141 | | { 1023, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 760, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1023 = CLIBAsmLE |
6142 | | { 1022, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 760, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1022 = CLIBAsmL |
6143 | | { 1021, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 760, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1021 = CLIBAsmHE |
6144 | | { 1020, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 760, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1020 = CLIBAsmH |
6145 | | { 1019, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 760, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1019 = CLIBAsmE |
6146 | | { 1018, 5, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 755, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1018 = CLIBAsm |
6147 | | { 1017, 5, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 755, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1017 = CLIB |
6148 | | { 1016, 3, 0, 4, 240, 0, 1, SystemZImpOpBase + 0, 455, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL }, // Inst #1016 = CLI |
6149 | | { 1015, 2, 0, 6, 238, 0, 1, SystemZImpOpBase + 0, 753, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL }, // Inst #1015 = CLHRL |
6150 | | { 1014, 2, 0, 4, 244, 0, 1, SystemZImpOpBase + 0, 751, 0|(1ULL<<MCID::Compare), 0x103800ULL }, // Inst #1014 = CLHLR |
6151 | | { 1013, 3, 0, 6, 238, 0, 1, SystemZImpOpBase + 0, 455, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL }, // Inst #1013 = CLHHSI |
6152 | | { 1012, 2, 0, 4, 243, 0, 1, SystemZImpOpBase + 0, 749, 0|(1ULL<<MCID::Compare), 0x103800ULL }, // Inst #1012 = CLHHR |
6153 | | { 1011, 4, 0, 6, 237, 0, 1, SystemZImpOpBase + 0, 745, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x10388cULL }, // Inst #1011 = CLHF |
6154 | | { 1010, 4, 1, 4, 483, 1, 1, SystemZImpOpBase + 1, 741, 0, 0x0ULL }, // Inst #1010 = CLGXTR |
6155 | | { 1009, 4, 1, 4, 370, 1, 1, SystemZImpOpBase + 1, 741, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1009 = CLGXBR |
6156 | | { 1008, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 796, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1008 = CLGTAsmNLH |
6157 | | { 1007, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 796, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1007 = CLGTAsmNLE |
6158 | | { 1006, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 796, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1006 = CLGTAsmNL |
6159 | | { 1005, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 796, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1005 = CLGTAsmNHE |
6160 | | { 1004, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 796, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1004 = CLGTAsmNH |
6161 | | { 1003, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 796, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1003 = CLGTAsmNE |
6162 | | { 1002, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 796, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1002 = CLGTAsmLH |
6163 | | { 1001, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 796, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1001 = CLGTAsmLE |
6164 | | { 1000, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 796, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1000 = CLGTAsmL |
6165 | | { 999, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 796, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #999 = CLGTAsmHE |
6166 | | { 998, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 796, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #998 = CLGTAsmH |
6167 | | { 997, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 796, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #997 = CLGTAsmE |
6168 | | { 996, 4, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 792, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #996 = CLGTAsm |
6169 | | { 995, 4, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 792, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #995 = CLGT |
6170 | | { 994, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 551, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #994 = CLGRTAsmNLH |
6171 | | { 993, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 551, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #993 = CLGRTAsmNLE |
6172 | | { 992, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 551, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #992 = CLGRTAsmNL |
6173 | | { 991, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 551, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #991 = CLGRTAsmNHE |
6174 | | { 990, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 551, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #990 = CLGRTAsmNH |
6175 | | { 989, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 551, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #989 = CLGRTAsmNE |
6176 | | { 988, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 551, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #988 = CLGRTAsmLH |
6177 | | { 987, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 551, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #987 = CLGRTAsmLE |
6178 | | { 986, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 551, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #986 = CLGRTAsmL |
6179 | | { 985, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 551, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #985 = CLGRTAsmHE |
6180 | | { 984, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 551, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #984 = CLGRTAsmH |
6181 | | { 983, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 551, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #983 = CLGRTAsmE |
6182 | | { 982, 3, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 211, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #982 = CLGRTAsm |
6183 | | { 981, 3, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 211, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #981 = CLGRT |
6184 | | { 980, 2, 0, 6, 236, 0, 1, SystemZImpOpBase + 0, 704, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL }, // Inst #980 = CLGRL |
6185 | | { 979, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 735, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #979 = CLGRJAsmNLH |
6186 | | { 978, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 735, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #978 = CLGRJAsmNLE |
6187 | | { 977, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 735, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #977 = CLGRJAsmNL |
6188 | | { 976, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 735, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #976 = CLGRJAsmNHE |
6189 | | { 975, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 735, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #975 = CLGRJAsmNH |
6190 | | { 974, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 735, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #974 = CLGRJAsmNE |
6191 | | { 973, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 735, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #973 = CLGRJAsmLH |
6192 | | { 972, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 735, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #972 = CLGRJAsmLE |
6193 | | { 971, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 735, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #971 = CLGRJAsmL |
6194 | | { 970, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 735, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #970 = CLGRJAsmHE |
6195 | | { 969, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 735, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #969 = CLGRJAsmH |
6196 | | { 968, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 735, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #968 = CLGRJAsmE |
6197 | | { 967, 4, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 731, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #967 = CLGRJAsm |
6198 | | { 966, 4, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 731, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #966 = CLGRJ |
6199 | | { 965, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 727, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #965 = CLGRBAsmNLH |
6200 | | { 964, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 727, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #964 = CLGRBAsmNLE |
6201 | | { 963, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 727, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #963 = CLGRBAsmNL |
6202 | | { 962, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 727, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #962 = CLGRBAsmNHE |
6203 | | { 961, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 727, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #961 = CLGRBAsmNH |
6204 | | { 960, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 727, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #960 = CLGRBAsmNE |
6205 | | { 959, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 727, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #959 = CLGRBAsmLH |
6206 | | { 958, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 727, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #958 = CLGRBAsmLE |
6207 | | { 957, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 727, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #957 = CLGRBAsmL |
6208 | | { 956, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 727, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #956 = CLGRBAsmHE |
6209 | | { 955, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 727, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #955 = CLGRBAsmH |
6210 | | { 954, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 727, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #954 = CLGRBAsmE |
6211 | | { 953, 5, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 722, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #953 = CLGRBAsm |
6212 | | { 952, 5, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 722, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #952 = CLGRB |
6213 | | { 951, 2, 0, 4, 235, 0, 1, SystemZImpOpBase + 0, 551, 0|(1ULL<<MCID::Compare), 0x103800ULL }, // Inst #951 = CLGR |
6214 | | { 950, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #950 = CLGITAsmNLH |
6215 | | { 949, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #949 = CLGITAsmNLE |
6216 | | { 948, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #948 = CLGITAsmNL |
6217 | | { 947, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #947 = CLGITAsmNHE |
6218 | | { 946, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #946 = CLGITAsmNH |
6219 | | { 945, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #945 = CLGITAsmNE |
6220 | | { 944, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #944 = CLGITAsmLH |
6221 | | { 943, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #943 = CLGITAsmLE |
6222 | | { 942, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #942 = CLGITAsmL |
6223 | | { 941, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #941 = CLGITAsmHE |
6224 | | { 940, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #940 = CLGITAsmH |
6225 | | { 939, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #939 = CLGITAsmE |
6226 | | { 938, 3, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 204, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #938 = CLGITAsm |
6227 | | { 937, 3, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 204, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #937 = CLGIT |
6228 | | { 936, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 719, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #936 = CLGIJAsmNLH |
6229 | | { 935, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 719, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #935 = CLGIJAsmNLE |
6230 | | { 934, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 719, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #934 = CLGIJAsmNL |
6231 | | { 933, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 719, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #933 = CLGIJAsmNHE |
6232 | | { 932, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 719, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #932 = CLGIJAsmNH |
6233 | | { 931, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 719, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #931 = CLGIJAsmNE |
6234 | | { 930, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 719, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #930 = CLGIJAsmLH |
6235 | | { 929, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 719, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #929 = CLGIJAsmLE |
6236 | | { 928, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 719, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #928 = CLGIJAsmL |
6237 | | { 927, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 719, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #927 = CLGIJAsmHE |
6238 | | { 926, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 719, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #926 = CLGIJAsmH |
6239 | | { 925, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 719, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #925 = CLGIJAsmE |
6240 | | { 924, 4, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 715, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #924 = CLGIJAsm |
6241 | | { 923, 4, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 715, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #923 = CLGIJ |
6242 | | { 922, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 711, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #922 = CLGIBAsmNLH |
6243 | | { 921, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 711, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #921 = CLGIBAsmNLE |
6244 | | { 920, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 711, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #920 = CLGIBAsmNL |
6245 | | { 919, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 711, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #919 = CLGIBAsmNHE |
6246 | | { 918, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 711, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #918 = CLGIBAsmNH |
6247 | | { 917, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 711, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #917 = CLGIBAsmNE |
6248 | | { 916, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 711, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #916 = CLGIBAsmLH |
6249 | | { 915, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 711, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #915 = CLGIBAsmLE |
6250 | | { 914, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 711, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #914 = CLGIBAsmL |
6251 | | { 913, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 711, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #913 = CLGIBAsmHE |
6252 | | { 912, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 711, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #912 = CLGIBAsmH |
6253 | | { 911, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 711, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #911 = CLGIBAsmE |
6254 | | { 910, 5, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 706, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #910 = CLGIBAsm |
6255 | | { 909, 5, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 706, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #909 = CLGIB |
6256 | | { 908, 3, 0, 6, 231, 0, 1, SystemZImpOpBase + 0, 455, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL }, // Inst #908 = CLGHSI |
6257 | | { 907, 2, 0, 6, 231, 0, 1, SystemZImpOpBase + 0, 704, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL }, // Inst #907 = CLGHRL |
6258 | | { 906, 2, 0, 6, 233, 0, 1, SystemZImpOpBase + 0, 704, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL }, // Inst #906 = CLGFRL |
6259 | | { 905, 2, 0, 4, 234, 0, 1, SystemZImpOpBase + 0, 702, 0|(1ULL<<MCID::Compare), 0x103800ULL }, // Inst #905 = CLGFR |
6260 | | { 904, 2, 0, 6, 234, 0, 1, SystemZImpOpBase + 0, 458, 0|(1ULL<<MCID::Compare), 0x103800ULL }, // Inst #904 = CLGFI |
6261 | | { 903, 4, 0, 6, 232, 0, 1, SystemZImpOpBase + 0, 149, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x10388cULL }, // Inst #903 = CLGF |
6262 | | { 902, 4, 1, 4, 369, 1, 1, SystemZImpOpBase + 1, 698, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #902 = CLGEBR |
6263 | | { 901, 4, 1, 4, 482, 1, 1, SystemZImpOpBase + 1, 691, 0, 0x0ULL }, // Inst #901 = CLGDTR |
6264 | | { 900, 4, 1, 4, 369, 1, 1, SystemZImpOpBase + 1, 691, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #900 = CLGDBR |
6265 | | { 899, 4, 0, 6, 230, 0, 1, SystemZImpOpBase + 0, 149, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x10390cULL }, // Inst #899 = CLG |
6266 | | { 898, 4, 1, 4, 483, 1, 1, SystemZImpOpBase + 1, 684, 0, 0x0ULL }, // Inst #898 = CLFXTR |
6267 | | { 897, 4, 1, 4, 370, 1, 1, SystemZImpOpBase + 1, 684, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #897 = CLFXBR |
6268 | | { 896, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 679, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #896 = CLFITAsmNLH |
6269 | | { 895, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 679, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #895 = CLFITAsmNLE |
6270 | | { 894, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 679, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #894 = CLFITAsmNL |
6271 | | { 893, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 679, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #893 = CLFITAsmNHE |
6272 | | { 892, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 679, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #892 = CLFITAsmNH |
6273 | | { 891, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 679, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #891 = CLFITAsmNE |
6274 | | { 890, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 679, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #890 = CLFITAsmLH |
6275 | | { 889, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 679, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #889 = CLFITAsmLE |
6276 | | { 888, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 679, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #888 = CLFITAsmL |
6277 | | { 887, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 679, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #887 = CLFITAsmHE |
6278 | | { 886, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 679, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #886 = CLFITAsmH |
6279 | | { 885, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 679, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #885 = CLFITAsmE |
6280 | | { 884, 3, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 218, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #884 = CLFITAsm |
6281 | | { 883, 3, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 218, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #883 = CLFIT |
6282 | | { 882, 2, 0, 6, 229, 0, 1, SystemZImpOpBase + 0, 679, 0|(1ULL<<MCID::Compare), 0x103800ULL }, // Inst #882 = CLFI |
6283 | | { 881, 3, 0, 6, 228, 0, 1, SystemZImpOpBase + 0, 455, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL }, // Inst #881 = CLFHSI |
6284 | | { 880, 4, 1, 4, 367, 1, 1, SystemZImpOpBase + 1, 675, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #880 = CLFEBR |
6285 | | { 879, 4, 1, 4, 482, 1, 1, SystemZImpOpBase + 1, 668, 0, 0x0ULL }, // Inst #879 = CLFDTR |
6286 | | { 878, 4, 1, 4, 368, 1, 1, SystemZImpOpBase + 1, 668, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #878 = CLFDBR |
6287 | | { 877, 6, 2, 6, 254, 0, 1, SystemZImpOpBase + 0, 786, 0|(1ULL<<MCID::MayLoad), 0x4ULL }, // Inst #877 = CLCLU |
6288 | | { 876, 6, 2, 4, 254, 0, 1, SystemZImpOpBase + 0, 786, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #876 = CLCLE |
6289 | | { 875, 4, 2, 2, 254, 0, 1, SystemZImpOpBase + 0, 782, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #875 = CLCL |
6290 | | { 874, 5, 0, 6, 253, 0, 1, SystemZImpOpBase + 0, 777, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #874 = CLC |
6291 | | { 873, 4, 0, 4, 227, 0, 1, SystemZImpOpBase + 0, 611, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103888ULL }, // Inst #873 = CL |
6292 | | { 872, 4, 2, 4, 334, 0, 1, SystemZImpOpBase + 0, 773, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #872 = CKSM |
6293 | | { 871, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 679, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #871 = CITAsmNLH |
6294 | | { 870, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 679, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #870 = CITAsmNLE |
6295 | | { 869, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 679, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #869 = CITAsmNL |
6296 | | { 868, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 679, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #868 = CITAsmNHE |
6297 | | { 867, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 679, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #867 = CITAsmNH |
6298 | | { 866, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 679, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #866 = CITAsmNE |
6299 | | { 865, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 679, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #865 = CITAsmLH |
6300 | | { 864, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 679, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #864 = CITAsmLE |
6301 | | { 863, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 679, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #863 = CITAsmL |
6302 | | { 862, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 679, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #862 = CITAsmHE |
6303 | | { 861, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 679, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #861 = CITAsmH |
6304 | | { 860, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 679, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #860 = CITAsmE |
6305 | | { 859, 3, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 218, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #859 = CITAsm |
6306 | | { 858, 3, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 218, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #858 = CIT |
6307 | | { 857, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 770, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #857 = CIJAsmNLH |
6308 | | { 856, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 770, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #856 = CIJAsmNLE |
6309 | | { 855, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 770, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #855 = CIJAsmNL |
6310 | | { 854, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 770, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #854 = CIJAsmNHE |
6311 | | { 853, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 770, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #853 = CIJAsmNH |
6312 | | { 852, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 770, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #852 = CIJAsmNE |
6313 | | { 851, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 770, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #851 = CIJAsmLH |
6314 | | { 850, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 770, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #850 = CIJAsmLE |
6315 | | { 849, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 770, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #849 = CIJAsmL |
6316 | | { 848, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 770, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #848 = CIJAsmHE |
6317 | | { 847, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 770, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #847 = CIJAsmH |
6318 | | { 846, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 770, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #846 = CIJAsmE |
6319 | | { 845, 4, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 766, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #845 = CIJAsm |
6320 | | { 844, 4, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 766, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #844 = CIJ |
6321 | | { 843, 2, 0, 6, 224, 0, 1, SystemZImpOpBase + 0, 764, 0|(1ULL<<MCID::Compare), 0x3800ULL }, // Inst #843 = CIH |
6322 | | { 842, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 760, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #842 = CIBAsmNLH |
6323 | | { 841, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 760, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #841 = CIBAsmNLE |
6324 | | { 840, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 760, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #840 = CIBAsmNL |
6325 | | { 839, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 760, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #839 = CIBAsmNHE |
6326 | | { 838, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 760, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #838 = CIBAsmNH |
6327 | | { 837, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 760, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #837 = CIBAsmNE |
6328 | | { 836, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 760, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #836 = CIBAsmLH |
6329 | | { 835, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 760, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #835 = CIBAsmLE |
6330 | | { 834, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 760, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #834 = CIBAsmL |
6331 | | { 833, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 760, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #833 = CIBAsmHE |
6332 | | { 832, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 760, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #832 = CIBAsmH |
6333 | | { 831, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 760, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #831 = CIBAsmE |
6334 | | { 830, 5, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 755, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #830 = CIBAsm |
6335 | | { 829, 5, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 755, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #829 = CIB |
6336 | | { 828, 4, 0, 6, 245, 0, 1, SystemZImpOpBase + 0, 611, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x384cULL }, // Inst #828 = CHY |
6337 | | { 827, 3, 0, 6, 226, 0, 1, SystemZImpOpBase + 0, 455, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL }, // Inst #827 = CHSI |
6338 | | { 826, 2, 0, 6, 246, 0, 1, SystemZImpOpBase + 0, 753, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL }, // Inst #826 = CHRL |
6339 | | { 825, 2, 0, 4, 244, 0, 1, SystemZImpOpBase + 0, 751, 0|(1ULL<<MCID::Compare), 0x3800ULL }, // Inst #825 = CHLR |
6340 | | { 824, 2, 0, 4, 220, 0, 1, SystemZImpOpBase + 0, 679, 0|(1ULL<<MCID::Compare), 0x3800ULL }, // Inst #824 = CHI |
6341 | | { 823, 3, 0, 6, 249, 0, 1, SystemZImpOpBase + 0, 455, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL }, // Inst #823 = CHHSI |
6342 | | { 822, 2, 0, 4, 243, 0, 1, SystemZImpOpBase + 0, 749, 0|(1ULL<<MCID::Compare), 0x3800ULL }, // Inst #822 = CHHR |
6343 | | { 821, 4, 0, 6, 225, 0, 1, SystemZImpOpBase + 0, 745, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x388cULL }, // Inst #821 = CHF |
6344 | | { 820, 4, 0, 4, 245, 0, 1, SystemZImpOpBase + 0, 611, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3848ULL }, // Inst #820 = CH |
6345 | | { 819, 4, 1, 4, 481, 1, 1, SystemZImpOpBase + 1, 741, 0, 0x0ULL }, // Inst #819 = CGXTRA |
6346 | | { 818, 3, 1, 4, 481, 1, 1, SystemZImpOpBase + 1, 738, 0, 0x0ULL }, // Inst #818 = CGXTR |
6347 | | { 817, 3, 1, 4, 425, 0, 1, SystemZImpOpBase + 0, 738, 0, 0x0ULL }, // Inst #817 = CGXR |
6348 | | { 816, 4, 1, 4, 366, 1, 1, SystemZImpOpBase + 1, 741, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #816 = CGXBRA |
6349 | | { 815, 3, 1, 4, 366, 1, 1, SystemZImpOpBase + 1, 738, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #815 = CGXBR |
6350 | | { 814, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 551, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #814 = CGRTAsmNLH |
6351 | | { 813, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 551, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #813 = CGRTAsmNLE |
6352 | | { 812, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 551, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #812 = CGRTAsmNL |
6353 | | { 811, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 551, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #811 = CGRTAsmNHE |
6354 | | { 810, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 551, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #810 = CGRTAsmNH |
6355 | | { 809, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 551, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #809 = CGRTAsmNE |
6356 | | { 808, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 551, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #808 = CGRTAsmLH |
6357 | | { 807, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 551, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #807 = CGRTAsmLE |
6358 | | { 806, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 551, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #806 = CGRTAsmL |
6359 | | { 805, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 551, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #805 = CGRTAsmHE |
6360 | | { 804, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 551, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #804 = CGRTAsmH |
6361 | | { 803, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 551, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #803 = CGRTAsmE |
6362 | | { 802, 3, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 211, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #802 = CGRTAsm |
6363 | | { 801, 3, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 211, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #801 = CGRT |
6364 | | { 800, 2, 0, 6, 222, 0, 1, SystemZImpOpBase + 0, 704, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL }, // Inst #800 = CGRL |
6365 | | { 799, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 735, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #799 = CGRJAsmNLH |
6366 | | { 798, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 735, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #798 = CGRJAsmNLE |
6367 | | { 797, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 735, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #797 = CGRJAsmNL |
6368 | | { 796, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 735, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #796 = CGRJAsmNHE |
6369 | | { 795, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 735, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #795 = CGRJAsmNH |
6370 | | { 794, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 735, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #794 = CGRJAsmNE |
6371 | | { 793, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 735, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #793 = CGRJAsmLH |
6372 | | { 792, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 735, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #792 = CGRJAsmLE |
6373 | | { 791, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 735, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #791 = CGRJAsmL |
6374 | | { 790, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 735, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #790 = CGRJAsmHE |
6375 | | { 789, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 735, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #789 = CGRJAsmH |
6376 | | { 788, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 735, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #788 = CGRJAsmE |
6377 | | { 787, 4, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 731, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #787 = CGRJAsm |
6378 | | { 786, 4, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 731, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #786 = CGRJ |
6379 | | { 785, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 727, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #785 = CGRBAsmNLH |
6380 | | { 784, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 727, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #784 = CGRBAsmNLE |
6381 | | { 783, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 727, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #783 = CGRBAsmNL |
6382 | | { 782, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 727, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #782 = CGRBAsmNHE |
6383 | | { 781, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 727, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #781 = CGRBAsmNH |
6384 | | { 780, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 727, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #780 = CGRBAsmNE |
6385 | | { 779, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 727, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #779 = CGRBAsmLH |
6386 | | { 778, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 727, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #778 = CGRBAsmLE |
6387 | | { 777, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 727, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #777 = CGRBAsmL |
6388 | | { 776, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 727, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #776 = CGRBAsmHE |
6389 | | { 775, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 727, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #775 = CGRBAsmH |
6390 | | { 774, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 727, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #774 = CGRBAsmE |
6391 | | { 773, 5, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 722, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #773 = CGRBAsm |
6392 | | { 772, 5, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 722, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #772 = CGRB |
6393 | | { 771, 2, 0, 4, 223, 0, 1, SystemZImpOpBase + 0, 551, 0|(1ULL<<MCID::Compare), 0x3800ULL }, // Inst #771 = CGR |
6394 | | { 770, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #770 = CGITAsmNLH |
6395 | | { 769, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #769 = CGITAsmNLE |
6396 | | { 768, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #768 = CGITAsmNL |
6397 | | { 767, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #767 = CGITAsmNHE |
6398 | | { 766, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #766 = CGITAsmNH |
6399 | | { 765, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #765 = CGITAsmNE |
6400 | | { 764, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #764 = CGITAsmLH |
6401 | | { 763, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #763 = CGITAsmLE |
6402 | | { 762, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #762 = CGITAsmL |
6403 | | { 761, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #761 = CGITAsmHE |
6404 | | { 760, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #760 = CGITAsmH |
6405 | | { 759, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #759 = CGITAsmE |
6406 | | { 758, 3, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 204, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #758 = CGITAsm |
6407 | | { 757, 3, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 204, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #757 = CGIT |
6408 | | { 756, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 719, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #756 = CGIJAsmNLH |
6409 | | { 755, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 719, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #755 = CGIJAsmNLE |
6410 | | { 754, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 719, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #754 = CGIJAsmNL |
6411 | | { 753, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 719, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #753 = CGIJAsmNHE |
6412 | | { 752, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 719, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #752 = CGIJAsmNH |
6413 | | { 751, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 719, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #751 = CGIJAsmNE |
6414 | | { 750, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 719, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #750 = CGIJAsmLH |
6415 | | { 749, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 719, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #749 = CGIJAsmLE |
6416 | | { 748, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 719, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #748 = CGIJAsmL |
6417 | | { 747, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 719, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #747 = CGIJAsmHE |
6418 | | { 746, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 719, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #746 = CGIJAsmH |
6419 | | { 745, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 719, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #745 = CGIJAsmE |
6420 | | { 744, 4, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 715, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #744 = CGIJAsm |
6421 | | { 743, 4, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 715, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #743 = CGIJ |
6422 | | { 742, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 711, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #742 = CGIBAsmNLH |
6423 | | { 741, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 711, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #741 = CGIBAsmNLE |
6424 | | { 740, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 711, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #740 = CGIBAsmNL |
6425 | | { 739, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 711, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #739 = CGIBAsmNHE |
6426 | | { 738, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 711, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #738 = CGIBAsmNH |
6427 | | { 737, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 711, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #737 = CGIBAsmNE |
6428 | | { 736, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 711, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #736 = CGIBAsmLH |
6429 | | { 735, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 711, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #735 = CGIBAsmLE |
6430 | | { 734, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 711, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #734 = CGIBAsmL |
6431 | | { 733, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 711, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #733 = CGIBAsmHE |
6432 | | { 732, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 711, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #732 = CGIBAsmH |
6433 | | { 731, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 711, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #731 = CGIBAsmE |
6434 | | { 730, 5, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 706, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #730 = CGIBAsm |
6435 | | { 729, 5, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 706, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #729 = CGIB |
6436 | | { 728, 3, 0, 6, 222, 0, 1, SystemZImpOpBase + 0, 455, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL }, // Inst #728 = CGHSI |
6437 | | { 727, 2, 0, 6, 248, 0, 1, SystemZImpOpBase + 0, 704, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL }, // Inst #727 = CGHRL |
6438 | | { 726, 2, 0, 4, 221, 0, 1, SystemZImpOpBase + 0, 458, 0|(1ULL<<MCID::Compare), 0x3800ULL }, // Inst #726 = CGHI |
6439 | | { 725, 4, 0, 6, 247, 0, 1, SystemZImpOpBase + 0, 149, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x384cULL }, // Inst #725 = CGH |
6440 | | { 724, 2, 0, 6, 251, 0, 1, SystemZImpOpBase + 0, 704, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL }, // Inst #724 = CGFRL |
6441 | | { 723, 2, 0, 4, 252, 0, 1, SystemZImpOpBase + 0, 702, 0|(1ULL<<MCID::Compare), 0x3800ULL }, // Inst #723 = CGFR |
6442 | | { 722, 2, 0, 6, 221, 0, 1, SystemZImpOpBase + 0, 458, 0|(1ULL<<MCID::Compare), 0x3800ULL }, // Inst #722 = CGFI |
6443 | | { 721, 4, 0, 6, 250, 0, 1, SystemZImpOpBase + 0, 149, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x388cULL }, // Inst #721 = CGF |
6444 | | { 720, 3, 1, 4, 424, 0, 1, SystemZImpOpBase + 0, 695, 0, 0x0ULL }, // Inst #720 = CGER |
6445 | | { 719, 4, 1, 4, 365, 1, 1, SystemZImpOpBase + 1, 698, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #719 = CGEBRA |
6446 | | { 718, 3, 1, 4, 365, 1, 1, SystemZImpOpBase + 1, 695, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #718 = CGEBR |
6447 | | { 717, 4, 1, 4, 480, 1, 1, SystemZImpOpBase + 1, 691, 0, 0x0ULL }, // Inst #717 = CGDTRA |
6448 | | { 716, 3, 1, 4, 480, 1, 1, SystemZImpOpBase + 1, 688, 0, 0x0ULL }, // Inst #716 = CGDTR |
6449 | | { 715, 3, 1, 4, 424, 0, 1, SystemZImpOpBase + 0, 688, 0, 0x0ULL }, // Inst #715 = CGDR |
6450 | | { 714, 4, 1, 4, 365, 1, 1, SystemZImpOpBase + 1, 691, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #714 = CGDBRA |
6451 | | { 713, 3, 1, 4, 365, 1, 1, SystemZImpOpBase + 1, 688, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #713 = CGDBR |
6452 | | { 712, 4, 0, 6, 218, 0, 1, SystemZImpOpBase + 0, 149, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x390cULL }, // Inst #712 = CG |
6453 | | { 711, 4, 1, 4, 891, 1, 1, SystemZImpOpBase + 1, 684, 0, 0x0ULL }, // Inst #711 = CFXTR |
6454 | | { 710, 3, 1, 4, 425, 0, 1, SystemZImpOpBase + 0, 681, 0, 0x0ULL }, // Inst #710 = CFXR |
6455 | | { 709, 4, 1, 4, 366, 1, 1, SystemZImpOpBase + 1, 684, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #709 = CFXBRA |
6456 | | { 708, 3, 1, 4, 366, 1, 1, SystemZImpOpBase + 1, 681, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #708 = CFXBR |
6457 | | { 707, 2, 0, 6, 220, 0, 1, SystemZImpOpBase + 0, 679, 0|(1ULL<<MCID::Compare), 0x3800ULL }, // Inst #707 = CFI |
6458 | | { 706, 3, 1, 4, 424, 0, 1, SystemZImpOpBase + 0, 672, 0, 0x0ULL }, // Inst #706 = CFER |
6459 | | { 705, 4, 1, 4, 365, 1, 1, SystemZImpOpBase + 1, 675, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #705 = CFEBRA |
6460 | | { 704, 3, 1, 4, 365, 1, 1, SystemZImpOpBase + 1, 672, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #704 = CFEBR |
6461 | | { 703, 4, 1, 4, 890, 1, 1, SystemZImpOpBase + 1, 668, 0, 0x0ULL }, // Inst #703 = CFDTR |
6462 | | { 702, 3, 1, 4, 424, 0, 1, SystemZImpOpBase + 0, 665, 0, 0x0ULL }, // Inst #702 = CFDR |
6463 | | { 701, 4, 1, 4, 365, 1, 1, SystemZImpOpBase + 1, 668, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #701 = CFDBRA |
6464 | | { 700, 3, 1, 4, 365, 1, 1, SystemZImpOpBase + 1, 665, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #700 = CFDBR |
6465 | | { 699, 2, 0, 4, 332, 3, 4, SystemZImpOpBase + 28, 663, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #699 = CFC |
6466 | | { 698, 2, 0, 4, 522, 0, 1, SystemZImpOpBase + 0, 661, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #698 = CEXTR |
6467 | | { 697, 2, 0, 2, 464, 0, 1, SystemZImpOpBase + 0, 647, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #697 = CER |
6468 | | { 696, 4, 1, 4, 887, 1, 0, SystemZImpOpBase + 12, 657, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #696 = CELGBR |
6469 | | { 695, 4, 1, 4, 887, 1, 0, SystemZImpOpBase + 12, 651, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #695 = CELFBR |
6470 | | { 694, 2, 1, 4, 422, 0, 0, SystemZImpOpBase + 0, 655, 0, 0x0ULL }, // Inst #694 = CEGR |
6471 | | { 693, 4, 1, 4, 361, 1, 0, SystemZImpOpBase + 12, 657, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #693 = CEGBRA |
6472 | | { 692, 2, 1, 4, 361, 1, 0, SystemZImpOpBase + 12, 655, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #692 = CEGBR |
6473 | | { 691, 2, 1, 4, 422, 0, 0, SystemZImpOpBase + 0, 649, 0, 0x0ULL }, // Inst #691 = CEFR |
6474 | | { 690, 4, 1, 4, 361, 1, 0, SystemZImpOpBase + 12, 651, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #690 = CEFBRA |
6475 | | { 689, 2, 1, 4, 361, 1, 0, SystemZImpOpBase + 12, 649, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #689 = CEFBR |
6476 | | { 688, 2, 0, 4, 521, 0, 1, SystemZImpOpBase + 0, 619, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #688 = CEDTR |
6477 | | { 687, 2, 0, 4, 402, 1, 1, SystemZImpOpBase + 1, 647, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x3c00ULL }, // Inst #687 = CEBR |
6478 | | { 686, 4, 0, 6, 401, 1, 1, SystemZImpOpBase + 1, 643, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3c88ULL }, // Inst #686 = CEB |
6479 | | { 685, 4, 0, 4, 463, 0, 1, SystemZImpOpBase + 0, 643, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #685 = CE |
6480 | | { 684, 5, 1, 6, 488, 0, 0, SystemZImpOpBase + 0, 633, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #684 = CDZT |
6481 | | { 683, 2, 1, 4, 484, 0, 0, SystemZImpOpBase + 0, 627, 0, 0x0ULL }, // Inst #683 = CDUTR |
6482 | | { 682, 2, 0, 4, 519, 1, 1, SystemZImpOpBase + 1, 619, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #682 = CDTR |
6483 | | { 681, 5, 1, 6, 275, 0, 1, SystemZImpOpBase + 0, 638, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #681 = CDSY |
6484 | | { 680, 2, 1, 4, 484, 0, 0, SystemZImpOpBase + 0, 627, 0, 0x0ULL }, // Inst #680 = CDSTR |
6485 | | { 679, 5, 1, 6, 276, 0, 1, SystemZImpOpBase + 0, 638, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #679 = CDSG |
6486 | | { 678, 5, 1, 4, 275, 0, 1, SystemZImpOpBase + 0, 638, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #678 = CDS |
6487 | | { 677, 2, 0, 2, 464, 0, 1, SystemZImpOpBase + 0, 619, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #677 = CDR |
6488 | | { 676, 5, 1, 6, 492, 0, 0, SystemZImpOpBase + 0, 633, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #676 = CDPT |
6489 | | { 675, 4, 1, 4, 477, 1, 0, SystemZImpOpBase + 12, 629, 0, 0x0ULL }, // Inst #675 = CDLGTR |
6490 | | { 674, 4, 1, 4, 363, 1, 0, SystemZImpOpBase + 12, 629, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #674 = CDLGBR |
6491 | | { 673, 4, 1, 4, 476, 1, 0, SystemZImpOpBase + 12, 623, 0, 0x0ULL }, // Inst #673 = CDLFTR |
6492 | | { 672, 4, 1, 4, 363, 1, 0, SystemZImpOpBase + 12, 623, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #672 = CDLFBR |
6493 | | { 671, 4, 1, 4, 473, 1, 0, SystemZImpOpBase + 12, 629, 0, 0x0ULL }, // Inst #671 = CDGTRA |
6494 | | { 670, 2, 1, 4, 473, 1, 0, SystemZImpOpBase + 12, 627, 0, 0x0ULL }, // Inst #670 = CDGTR |
6495 | | { 669, 2, 1, 4, 422, 0, 0, SystemZImpOpBase + 0, 627, 0, 0x0ULL }, // Inst #669 = CDGR |
6496 | | { 668, 4, 1, 4, 361, 1, 0, SystemZImpOpBase + 12, 629, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #668 = CDGBRA |
6497 | | { 667, 2, 1, 4, 361, 1, 0, SystemZImpOpBase + 12, 627, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #667 = CDGBR |
6498 | | { 666, 4, 1, 4, 472, 1, 0, SystemZImpOpBase + 12, 623, 0, 0x0ULL }, // Inst #666 = CDFTR |
6499 | | { 665, 2, 1, 4, 422, 0, 0, SystemZImpOpBase + 0, 621, 0, 0x0ULL }, // Inst #665 = CDFR |
6500 | | { 664, 4, 1, 4, 361, 1, 0, SystemZImpOpBase + 12, 623, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #664 = CDFBRA |
6501 | | { 663, 2, 1, 4, 361, 1, 0, SystemZImpOpBase + 12, 621, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #663 = CDFBR |
6502 | | { 662, 2, 0, 4, 402, 1, 1, SystemZImpOpBase + 1, 619, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x3c00ULL }, // Inst #662 = CDBR |
6503 | | { 661, 4, 0, 6, 401, 1, 1, SystemZImpOpBase + 1, 615, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3d08ULL }, // Inst #661 = CDB |
6504 | | { 660, 4, 0, 4, 463, 0, 1, SystemZImpOpBase + 0, 615, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #660 = CD |
6505 | | { 659, 4, 0, 4, 218, 0, 1, SystemZImpOpBase + 0, 611, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3888ULL }, // Inst #659 = C |
6506 | | { 658, 5, 1, 6, 10, 0, 0, SystemZImpOpBase + 0, 606, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4ULL }, // Inst #658 = BXLEG |
6507 | | { 657, 5, 1, 4, 10, 0, 0, SystemZImpOpBase + 0, 601, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #657 = BXLE |
6508 | | { 656, 5, 1, 6, 10, 0, 0, SystemZImpOpBase + 0, 606, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4ULL }, // Inst #656 = BXHG |
6509 | | { 655, 5, 1, 4, 10, 0, 0, SystemZImpOpBase + 0, 601, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #655 = BXH |
6510 | | { 654, 2, 0, 2, 320, 0, 0, SystemZImpOpBase + 0, 553, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #654 = BSM |
6511 | | { 653, 2, 1, 4, 819, 0, 0, SystemZImpOpBase + 0, 551, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #653 = BSG |
6512 | | { 652, 2, 1, 4, 819, 0, 0, SystemZImpOpBase + 0, 551, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #652 = BSA |
6513 | | { 651, 4, 1, 6, 10, 0, 1, SystemZImpOpBase + 0, 597, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #651 = BRXLG |
6514 | | { 650, 4, 1, 4, 10, 0, 1, SystemZImpOpBase + 0, 593, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #650 = BRXLE |
6515 | | { 649, 4, 1, 6, 10, 0, 1, SystemZImpOpBase + 0, 597, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #649 = BRXHG |
6516 | | { 648, 4, 1, 4, 10, 0, 1, SystemZImpOpBase + 0, 593, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #648 = BRXH |
6517 | | { 647, 3, 1, 6, 8, 0, 0, SystemZImpOpBase + 0, 590, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #647 = BRCTH |
6518 | | { 646, 3, 1, 4, 7, 0, 1, SystemZImpOpBase + 0, 587, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #646 = BRCTG |
6519 | | { 645, 3, 1, 4, 7, 0, 1, SystemZImpOpBase + 0, 584, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #645 = BRCT |
6520 | | { 644, 2, 0, 6, 2, 1, 0, SystemZImpOpBase + 0, 582, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #644 = BRCLAsm |
6521 | | { 643, 3, 0, 6, 2, 1, 0, SystemZImpOpBase + 0, 251, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x40000ULL }, // Inst #643 = BRCL |
6522 | | { 642, 2, 0, 4, 2, 1, 0, SystemZImpOpBase + 0, 582, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #642 = BRCAsm |
6523 | | { 641, 3, 0, 4, 2, 1, 0, SystemZImpOpBase + 0, 251, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x40000ULL }, // Inst #641 = BRC |
6524 | | { 640, 1, 0, 2, 5, 1, 0, SystemZImpOpBase + 0, 246, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #640 = BRAsmZ |
6525 | | { 639, 1, 0, 2, 5, 1, 0, SystemZImpOpBase + 0, 246, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #639 = BRAsmP |
6526 | | { 638, 1, 0, 2, 5, 1, 0, SystemZImpOpBase + 0, 246, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #638 = BRAsmO |
6527 | | { 637, 1, 0, 2, 5, 1, 0, SystemZImpOpBase + 0, 246, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #637 = BRAsmNZ |
6528 | | { 636, 1, 0, 2, 5, 1, 0, SystemZImpOpBase + 0, 246, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #636 = BRAsmNP |
6529 | | { 635, 1, 0, 2, 5, 1, 0, SystemZImpOpBase + 0, 246, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #635 = BRAsmNO |
6530 | | { 634, 1, 0, 2, 5, 1, 0, SystemZImpOpBase + 0, 246, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #634 = BRAsmNM |
6531 | | { 633, 1, 0, 2, 5, 1, 0, SystemZImpOpBase + 0, 246, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #633 = BRAsmNLH |
6532 | | { 632, 1, 0, 2, 5, 1, 0, SystemZImpOpBase + 0, 246, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #632 = BRAsmNLE |
6533 | | { 631, 1, 0, 2, 5, 1, 0, SystemZImpOpBase + 0, 246, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #631 = BRAsmNL |
6534 | | { 630, 1, 0, 2, 5, 1, 0, SystemZImpOpBase + 0, 246, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #630 = BRAsmNHE |
6535 | | { 629, 1, 0, 2, 5, 1, 0, SystemZImpOpBase + 0, 246, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #629 = BRAsmNH |
6536 | | { 628, 1, 0, 2, 5, 1, 0, SystemZImpOpBase + 0, 246, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #628 = BRAsmNE |
6537 | | { 627, 1, 0, 2, 5, 1, 0, SystemZImpOpBase + 0, 246, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #627 = BRAsmM |
6538 | | { 626, 1, 0, 2, 5, 1, 0, SystemZImpOpBase + 0, 246, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #626 = BRAsmLH |
6539 | | { 625, 1, 0, 2, 5, 1, 0, SystemZImpOpBase + 0, 246, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #625 = BRAsmLE |
6540 | | { 624, 1, 0, 2, 5, 1, 0, SystemZImpOpBase + 0, 246, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #624 = BRAsmL |
6541 | | { 623, 1, 0, 2, 5, 1, 0, SystemZImpOpBase + 0, 246, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #623 = BRAsmHE |
6542 | | { 622, 1, 0, 2, 5, 1, 0, SystemZImpOpBase + 0, 246, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #622 = BRAsmH |
6543 | | { 621, 1, 0, 2, 5, 1, 0, SystemZImpOpBase + 0, 246, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #621 = BRAsmE |
6544 | | { 620, 3, 0, 6, 19, 0, 1, SystemZImpOpBase + 0, 579, 0|(1ULL<<MCID::Call), 0x0ULL }, // Inst #620 = BRASL |
6545 | | { 619, 3, 0, 4, 18, 0, 1, SystemZImpOpBase + 0, 579, 0|(1ULL<<MCID::Call), 0x0ULL }, // Inst #619 = BRAS |
6546 | | { 618, 1, 0, 2, 5, 0, 0, SystemZImpOpBase + 0, 246, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #618 = BR |
6547 | | { 617, 3, 0, 6, 265, 0, 0, SystemZImpOpBase + 0, 576, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #617 = BPRP |
6548 | | { 616, 4, 0, 6, 264, 0, 0, SystemZImpOpBase + 0, 572, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #616 = BPP |
6549 | | { 615, 4, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #615 = BICAsm |
6550 | | { 614, 5, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 555, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0x4000cULL }, // Inst #614 = BIC |
6551 | | { 613, 3, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 548, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #613 = BIAsmZ |
6552 | | { 612, 3, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 548, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #612 = BIAsmP |
6553 | | { 611, 3, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 548, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #611 = BIAsmO |
6554 | | { 610, 3, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 548, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #610 = BIAsmNZ |
6555 | | { 609, 3, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 548, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #609 = BIAsmNP |
6556 | | { 608, 3, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 548, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #608 = BIAsmNO |
6557 | | { 607, 3, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 548, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #607 = BIAsmNM |
6558 | | { 606, 3, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 548, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #606 = BIAsmNLH |
6559 | | { 605, 3, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 548, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #605 = BIAsmNLE |
6560 | | { 604, 3, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 548, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #604 = BIAsmNL |
6561 | | { 603, 3, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 548, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #603 = BIAsmNHE |
6562 | | { 602, 3, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 548, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #602 = BIAsmNH |
6563 | | { 601, 3, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 548, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #601 = BIAsmNE |
6564 | | { 600, 3, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 548, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #600 = BIAsmM |
6565 | | { 599, 3, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 548, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #599 = BIAsmLH |
6566 | | { 598, 3, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 548, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #598 = BIAsmLE |
6567 | | { 597, 3, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 548, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #597 = BIAsmL |
6568 | | { 596, 3, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 548, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #596 = BIAsmHE |
6569 | | { 595, 3, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 548, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #595 = BIAsmH |
6570 | | { 594, 3, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 548, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #594 = BIAsmE |
6571 | | { 593, 3, 0, 6, 6, 0, 0, SystemZImpOpBase + 0, 548, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #593 = BI |
6572 | | { 592, 3, 1, 2, 9, 0, 0, SystemZImpOpBase + 0, 569, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #592 = BCTR |
6573 | | { 591, 3, 1, 4, 9, 0, 0, SystemZImpOpBase + 0, 514, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #591 = BCTGR |
6574 | | { 590, 5, 1, 6, 9, 0, 0, SystemZImpOpBase + 0, 506, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #590 = BCTG |
6575 | | { 589, 5, 1, 4, 9, 0, 0, SystemZImpOpBase + 0, 475, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #589 = BCT |
6576 | | { 588, 2, 0, 2, 4, 1, 0, SystemZImpOpBase + 0, 567, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #588 = BCRAsm |
6577 | | { 587, 3, 0, 2, 4, 1, 0, SystemZImpOpBase + 0, 564, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x40000ULL }, // Inst #587 = BCR |
6578 | | { 586, 4, 0, 4, 4, 1, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #586 = BCAsm |
6579 | | { 585, 5, 0, 4, 4, 1, 0, SystemZImpOpBase + 0, 555, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x40008ULL }, // Inst #585 = BC |
6580 | | { 584, 3, 0, 4, 5, 1, 0, SystemZImpOpBase + 0, 548, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #584 = BAsmZ |
6581 | | { 583, 3, 0, 4, 5, 1, 0, SystemZImpOpBase + 0, 548, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #583 = BAsmP |
6582 | | { 582, 3, 0, 4, 5, 1, 0, SystemZImpOpBase + 0, 548, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #582 = BAsmO |
6583 | | { 581, 3, 0, 4, 5, 1, 0, SystemZImpOpBase + 0, 548, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #581 = BAsmNZ |
6584 | | { 580, 3, 0, 4, 5, 1, 0, SystemZImpOpBase + 0, 548, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #580 = BAsmNP |
6585 | | { 579, 3, 0, 4, 5, 1, 0, SystemZImpOpBase + 0, 548, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #579 = BAsmNO |
6586 | | { 578, 3, 0, 4, 5, 1, 0, SystemZImpOpBase + 0, 548, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #578 = BAsmNM |
6587 | | { 577, 3, 0, 4, 5, 1, 0, SystemZImpOpBase + 0, 548, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #577 = BAsmNLH |
6588 | | { 576, 3, 0, 4, 5, 1, 0, SystemZImpOpBase + 0, 548, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #576 = BAsmNLE |
6589 | | { 575, 3, 0, 4, 5, 1, 0, SystemZImpOpBase + 0, 548, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #575 = BAsmNL |
6590 | | { 574, 3, 0, 4, 5, 1, 0, SystemZImpOpBase + 0, 548, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #574 = BAsmNHE |
6591 | | { 573, 3, 0, 4, 5, 1, 0, SystemZImpOpBase + 0, 548, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #573 = BAsmNH |
6592 | | { 572, 3, 0, 4, 5, 1, 0, SystemZImpOpBase + 0, 548, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #572 = BAsmNE |
6593 | | { 571, 3, 0, 4, 5, 1, 0, SystemZImpOpBase + 0, 548, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #571 = BAsmM |
6594 | | { 570, 3, 0, 4, 5, 1, 0, SystemZImpOpBase + 0, 548, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #570 = BAsmLH |
6595 | | { 569, 3, 0, 4, 5, 1, 0, SystemZImpOpBase + 0, 548, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #569 = BAsmLE |
6596 | | { 568, 3, 0, 4, 5, 1, 0, SystemZImpOpBase + 0, 548, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #568 = BAsmL |
6597 | | { 567, 3, 0, 4, 5, 1, 0, SystemZImpOpBase + 0, 548, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #567 = BAsmHE |
6598 | | { 566, 3, 0, 4, 5, 1, 0, SystemZImpOpBase + 0, 548, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #566 = BAsmH |
6599 | | { 565, 3, 0, 4, 5, 1, 0, SystemZImpOpBase + 0, 548, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #565 = BAsmE |
6600 | | { 564, 2, 0, 2, 321, 0, 1, SystemZImpOpBase + 0, 553, 0|(1ULL<<MCID::Call), 0x0ULL }, // Inst #564 = BASSM |
6601 | | { 563, 2, 0, 2, 20, 0, 1, SystemZImpOpBase + 0, 553, 0|(1ULL<<MCID::Call), 0x0ULL }, // Inst #563 = BASR |
6602 | | { 562, 4, 0, 4, 20, 0, 1, SystemZImpOpBase + 0, 149, 0|(1ULL<<MCID::Call), 0x8ULL }, // Inst #562 = BAS |
6603 | | { 561, 2, 0, 2, 317, 1, 1, SystemZImpOpBase + 26, 553, 0|(1ULL<<MCID::Call), 0x0ULL }, // Inst #561 = BALR |
6604 | | { 560, 4, 0, 4, 317, 1, 1, SystemZImpOpBase + 26, 149, 0|(1ULL<<MCID::Call), 0x8ULL }, // Inst #560 = BAL |
6605 | | { 559, 2, 0, 4, 821, 0, 0, SystemZImpOpBase + 0, 551, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #559 = BAKR |
6606 | | { 558, 3, 0, 4, 5, 0, 0, SystemZImpOpBase + 0, 548, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #558 = B |
6607 | | { 557, 5, 1, 6, 103, 0, 1, SystemZImpOpBase + 0, 475, 0|(1ULL<<MCID::MayLoad), 0x203c8cULL }, // Inst #557 = AY |
6608 | | { 556, 4, 1, 4, 504, 1, 1, SystemZImpOpBase + 1, 544, 0, 0x0ULL }, // Inst #556 = AXTRA |
6609 | | { 555, 3, 1, 4, 504, 1, 1, SystemZImpOpBase + 1, 541, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #555 = AXTR |
6610 | | { 554, 3, 1, 2, 439, 0, 1, SystemZImpOpBase + 0, 538, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #554 = AXR |
6611 | | { 553, 3, 1, 4, 382, 1, 1, SystemZImpOpBase + 1, 538, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x3fc00ULL }, // Inst #553 = AXBR |
6612 | | { 552, 3, 1, 2, 438, 0, 1, SystemZImpOpBase + 0, 485, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #552 = AWR |
6613 | | { 551, 5, 1, 4, 437, 0, 1, SystemZImpOpBase + 0, 480, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #551 = AW |
6614 | | { 550, 3, 1, 2, 438, 0, 1, SystemZImpOpBase + 0, 500, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #550 = AUR |
6615 | | { 549, 5, 1, 4, 437, 0, 1, SystemZImpOpBase + 0, 495, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #549 = AU |
6616 | | { 548, 3, 0, 6, 884, 0, 1, SystemZImpOpBase + 0, 455, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x203c04ULL }, // Inst #548 = ASI |
6617 | | { 547, 3, 1, 4, 120, 0, 1, SystemZImpOpBase + 0, 529, 0|(1ULL<<MCID::Commutable), 0x203c00ULL }, // Inst #547 = ARK |
6618 | | { 546, 3, 1, 2, 120, 0, 1, SystemZImpOpBase + 0, 526, 0|(1ULL<<MCID::Commutable), 0x203c00ULL }, // Inst #546 = AR |
6619 | | { 545, 6, 0, 6, 304, 0, 1, SystemZImpOpBase + 0, 532, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #545 = AP |
6620 | | { 544, 5, 1, 6, 113, 0, 1, SystemZImpOpBase + 0, 475, 0|(1ULL<<MCID::MayLoad), 0x103c8cULL }, // Inst #544 = ALY |
6621 | | { 543, 3, 1, 6, 123, 0, 0, SystemZImpOpBase + 0, 523, 0, 0x0ULL }, // Inst #543 = ALSIHN |
6622 | | { 542, 3, 1, 6, 123, 0, 1, SystemZImpOpBase + 0, 523, 0, 0x103c00ULL }, // Inst #542 = ALSIH |
6623 | | { 541, 3, 0, 6, 884, 0, 1, SystemZImpOpBase + 0, 455, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x103c04ULL }, // Inst #541 = ALSI |
6624 | | { 540, 3, 1, 4, 119, 0, 1, SystemZImpOpBase + 0, 529, 0|(1ULL<<MCID::Commutable), 0x103c00ULL }, // Inst #540 = ALRK |
6625 | | { 539, 3, 1, 2, 119, 0, 1, SystemZImpOpBase + 0, 526, 0|(1ULL<<MCID::Commutable), 0x103c00ULL }, // Inst #539 = ALR |
6626 | | { 538, 3, 1, 6, 114, 0, 1, SystemZImpOpBase + 0, 239, 0, 0x103c00ULL }, // Inst #538 = ALHSIK |
6627 | | { 537, 3, 1, 4, 122, 0, 1, SystemZImpOpBase + 0, 520, 0, 0x103c00ULL }, // Inst #537 = ALHHLR |
6628 | | { 536, 3, 1, 4, 121, 0, 1, SystemZImpOpBase + 0, 517, 0, 0x103c00ULL }, // Inst #536 = ALHHHR |
6629 | | { 535, 3, 0, 6, 124, 0, 1, SystemZImpOpBase + 0, 455, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x103c04ULL }, // Inst #535 = ALGSI |
6630 | | { 534, 3, 1, 4, 118, 0, 1, SystemZImpOpBase + 0, 370, 0|(1ULL<<MCID::Commutable), 0x103c00ULL }, // Inst #534 = ALGRK |
6631 | | { 533, 3, 1, 4, 118, 0, 1, SystemZImpOpBase + 0, 514, 0|(1ULL<<MCID::Commutable), 0x103c00ULL }, // Inst #533 = ALGR |
6632 | | { 532, 3, 1, 6, 116, 0, 1, SystemZImpOpBase + 0, 211, 0, 0x103c00ULL }, // Inst #532 = ALGHSIK |
6633 | | { 531, 3, 1, 4, 117, 0, 1, SystemZImpOpBase + 0, 511, 0, 0x103c00ULL }, // Inst #531 = ALGFR |
6634 | | { 530, 3, 1, 6, 117, 0, 1, SystemZImpOpBase + 0, 291, 0, 0x103c00ULL }, // Inst #530 = ALGFI |
6635 | | { 529, 5, 1, 6, 885, 0, 1, SystemZImpOpBase + 0, 506, 0|(1ULL<<MCID::MayLoad), 0x103c8cULL }, // Inst #529 = ALGF |
6636 | | { 528, 5, 1, 6, 115, 0, 1, SystemZImpOpBase + 0, 506, 0|(1ULL<<MCID::MayLoad), 0x103d0cULL }, // Inst #528 = ALG |
6637 | | { 527, 3, 1, 6, 114, 0, 1, SystemZImpOpBase + 0, 503, 0, 0x103c00ULL }, // Inst #527 = ALFI |
6638 | | { 526, 3, 1, 4, 126, 1, 1, SystemZImpOpBase + 26, 526, 0, 0x103c00ULL }, // Inst #526 = ALCR |
6639 | | { 525, 3, 1, 4, 126, 1, 1, SystemZImpOpBase + 26, 514, 0, 0x103c00ULL }, // Inst #525 = ALCGR |
6640 | | { 524, 5, 1, 6, 125, 1, 1, SystemZImpOpBase + 26, 506, 0|(1ULL<<MCID::MayLoad), 0x103d0cULL }, // Inst #524 = ALCG |
6641 | | { 523, 5, 1, 6, 125, 1, 1, SystemZImpOpBase + 26, 475, 0|(1ULL<<MCID::MayLoad), 0x103c8cULL }, // Inst #523 = ALC |
6642 | | { 522, 5, 1, 4, 113, 0, 1, SystemZImpOpBase + 0, 475, 0|(1ULL<<MCID::MayLoad), 0x103c88ULL }, // Inst #522 = AL |
6643 | | { 521, 3, 1, 6, 105, 0, 1, SystemZImpOpBase + 0, 523, 0, 0x203c00ULL }, // Inst #521 = AIH |
6644 | | { 520, 5, 1, 6, 104, 0, 1, SystemZImpOpBase + 0, 475, 0|(1ULL<<MCID::MayLoad), 0x203c4cULL }, // Inst #520 = AHY |
6645 | | { 519, 3, 1, 6, 111, 0, 1, SystemZImpOpBase + 0, 239, 0, 0x203c00ULL }, // Inst #519 = AHIK |
6646 | | { 518, 3, 1, 4, 111, 0, 1, SystemZImpOpBase + 0, 503, 0, 0x203c00ULL }, // Inst #518 = AHI |
6647 | | { 517, 3, 1, 4, 122, 0, 1, SystemZImpOpBase + 0, 520, 0, 0x203c00ULL }, // Inst #517 = AHHLR |
6648 | | { 516, 3, 1, 4, 121, 0, 1, SystemZImpOpBase + 0, 517, 0, 0x203c00ULL }, // Inst #516 = AHHHR |
6649 | | { 515, 5, 1, 4, 104, 0, 1, SystemZImpOpBase + 0, 475, 0|(1ULL<<MCID::MayLoad), 0x203c48ULL }, // Inst #515 = AH |
6650 | | { 514, 3, 0, 6, 124, 0, 1, SystemZImpOpBase + 0, 455, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x203c04ULL }, // Inst #514 = AGSI |
6651 | | { 513, 3, 1, 4, 110, 0, 1, SystemZImpOpBase + 0, 370, 0|(1ULL<<MCID::Commutable), 0x203c00ULL }, // Inst #513 = AGRK |
6652 | | { 512, 3, 1, 4, 110, 0, 1, SystemZImpOpBase + 0, 514, 0|(1ULL<<MCID::Commutable), 0x203c00ULL }, // Inst #512 = AGR |
6653 | | { 511, 3, 1, 6, 109, 0, 1, SystemZImpOpBase + 0, 211, 0, 0x203c00ULL }, // Inst #511 = AGHIK |
6654 | | { 510, 3, 1, 4, 109, 0, 1, SystemZImpOpBase + 0, 291, 0, 0x203c00ULL }, // Inst #510 = AGHI |
6655 | | { 509, 5, 1, 6, 127, 0, 1, SystemZImpOpBase + 0, 506, 0|(1ULL<<MCID::MayLoad), 0x203c4cULL }, // Inst #509 = AGH |
6656 | | { 508, 3, 1, 4, 128, 0, 1, SystemZImpOpBase + 0, 511, 0, 0x203c00ULL }, // Inst #508 = AGFR |
6657 | | { 507, 3, 1, 6, 108, 0, 1, SystemZImpOpBase + 0, 291, 0, 0x203c00ULL }, // Inst #507 = AGFI |
6658 | | { 506, 5, 1, 6, 867, 0, 1, SystemZImpOpBase + 0, 506, 0|(1ULL<<MCID::MayLoad), 0x203c8cULL }, // Inst #506 = AGF |
6659 | | { 505, 5, 1, 6, 107, 0, 1, SystemZImpOpBase + 0, 506, 0|(1ULL<<MCID::MayLoad), 0x203d0cULL }, // Inst #505 = AG |
6660 | | { 504, 3, 1, 6, 106, 0, 1, SystemZImpOpBase + 0, 503, 0, 0x203c00ULL }, // Inst #504 = AFI |
6661 | | { 503, 3, 1, 2, 438, 0, 1, SystemZImpOpBase + 0, 500, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #503 = AER |
6662 | | { 502, 3, 1, 4, 381, 1, 1, SystemZImpOpBase + 1, 500, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x3fc00ULL }, // Inst #502 = AEBR |
6663 | | { 501, 5, 1, 6, 380, 1, 1, SystemZImpOpBase + 1, 495, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3fc88ULL }, // Inst #501 = AEB |
6664 | | { 500, 5, 1, 4, 437, 0, 1, SystemZImpOpBase + 0, 495, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #500 = AE |
6665 | | { 499, 4, 1, 4, 503, 1, 1, SystemZImpOpBase + 1, 491, 0, 0x0ULL }, // Inst #499 = ADTRA |
6666 | | { 498, 3, 1, 4, 503, 1, 1, SystemZImpOpBase + 1, 488, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #498 = ADTR |
6667 | | { 497, 3, 1, 2, 438, 0, 1, SystemZImpOpBase + 0, 485, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #497 = ADR |
6668 | | { 496, 3, 1, 4, 381, 1, 1, SystemZImpOpBase + 1, 485, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x3fc00ULL }, // Inst #496 = ADBR |
6669 | | { 495, 5, 1, 6, 380, 1, 1, SystemZImpOpBase + 1, 480, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3fd08ULL }, // Inst #495 = ADB |
6670 | | { 494, 5, 1, 4, 437, 0, 1, SystemZImpOpBase + 0, 480, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #494 = AD |
6671 | | { 493, 5, 1, 4, 103, 0, 1, SystemZImpOpBase + 0, 475, 0|(1ULL<<MCID::MayLoad), 0x203c88ULL }, // Inst #493 = A |
6672 | | { 492, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 158, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #492 = ZEXT128 |
6673 | | { 491, 5, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 171, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x23088ULL }, // Inst #491 = X_MemFoldPseudo |
6674 | | { 490, 0, 0, 0, 0, 2, 2, SystemZImpOpBase + 22, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #490 = XPLINK_STACKALLOC |
6675 | | { 489, 3, 1, 6, 173, 0, 1, SystemZImpOpBase + 0, 291, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #489 = XILF64 |
6676 | | { 488, 3, 1, 6, 172, 0, 1, SystemZImpOpBase + 0, 291, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #488 = XIHF64 |
6677 | | { 487, 3, 1, 0, 170, 0, 1, SystemZImpOpBase + 0, 160, 0|(1ULL<<MCID::Pseudo), 0x23000ULL }, // Inst #487 = XIFMux |
6678 | | { 486, 5, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 163, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x2310cULL }, // Inst #486 = XG_MemFoldPseudo |
6679 | | { 485, 5, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 226, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #485 = XCReg |
6680 | | { 484, 5, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 221, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #484 = XCImm |
6681 | | { 483, 4, 0, 6, 544, 0, 0, SystemZImpOpBase + 0, 464, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #483 = VST64 |
6682 | | { 482, 4, 0, 6, 544, 0, 0, SystemZImpOpBase + 0, 460, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #482 = VST32 |
6683 | | { 481, 3, 1, 6, 528, 0, 0, SystemZImpOpBase + 0, 472, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #481 = VLVGP32 |
6684 | | { 480, 2, 1, 6, 525, 0, 0, SystemZImpOpBase + 0, 470, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #480 = VLR64 |
6685 | | { 479, 2, 1, 6, 525, 0, 0, SystemZImpOpBase + 0, 468, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #479 = VLR32 |
6686 | | { 478, 4, 1, 6, 537, 0, 0, SystemZImpOpBase + 0, 464, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #478 = VL64 |
6687 | | { 477, 4, 1, 6, 537, 0, 0, SystemZImpOpBase + 0, 460, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #477 = VL32 |
6688 | | { 476, 2, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 403, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #476 = UCmp128Hi |
6689 | | { 475, 0, 0, 4, 13, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #475 = Trap |
6690 | | { 474, 2, 0, 0, 257, 0, 1, SystemZImpOpBase + 0, 198, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #474 = TMLMux |
6691 | | { 473, 2, 0, 4, 261, 0, 1, SystemZImpOpBase + 0, 458, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #473 = TMLL64 |
6692 | | { 472, 2, 0, 4, 260, 0, 1, SystemZImpOpBase + 0, 458, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #472 = TMLH64 |
6693 | | { 471, 2, 0, 0, 257, 0, 1, SystemZImpOpBase + 0, 198, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #471 = TMHMux |
6694 | | { 470, 2, 0, 4, 259, 0, 1, SystemZImpOpBase + 0, 458, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #470 = TMHL64 |
6695 | | { 469, 2, 0, 4, 258, 0, 1, SystemZImpOpBase + 0, 458, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #469 = TMHH64 |
6696 | | { 468, 1, 0, 6, 21, 0, 2, SystemZImpOpBase + 20, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #468 = TLS_LDCALL |
6697 | | { 467, 1, 0, 6, 21, 0, 2, SystemZImpOpBase + 20, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #467 = TLS_GDCALL |
6698 | | { 466, 3, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 455, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #466 = TBEGIN_nofloat |
6699 | | { 465, 0, 0, 2, 267, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #465 = Serialize |
6700 | | { 464, 5, 1, 0, 0, 1, 0, SystemZImpOpBase + 0, 450, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #464 = SelectVR64 |
6701 | | { 463, 5, 1, 0, 0, 1, 0, SystemZImpOpBase + 0, 445, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #463 = SelectVR32 |
6702 | | { 462, 5, 1, 0, 0, 1, 0, SystemZImpOpBase + 0, 415, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #462 = SelectVR128 |
6703 | | { 461, 5, 1, 0, 0, 1, 0, SystemZImpOpBase + 0, 440, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #461 = SelectF64 |
6704 | | { 460, 5, 1, 0, 0, 1, 0, SystemZImpOpBase + 0, 435, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #460 = SelectF32 |
6705 | | { 459, 5, 1, 0, 0, 1, 0, SystemZImpOpBase + 0, 430, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #459 = SelectF128 |
6706 | | { 458, 5, 1, 0, 0, 1, 0, SystemZImpOpBase + 0, 425, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #458 = Select64 |
6707 | | { 457, 5, 1, 0, 0, 1, 0, SystemZImpOpBase + 0, 420, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #457 = Select32 |
6708 | | { 456, 5, 1, 0, 0, 1, 0, SystemZImpOpBase + 0, 415, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #456 = Select128 |
6709 | | { 455, 5, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 171, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x223c88ULL }, // Inst #455 = S_MemFoldPseudo |
6710 | | { 454, 4, 0, 0, 354, 0, 0, SystemZImpOpBase + 0, 335, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x1eULL }, // Inst #454 = STX |
6711 | | { 453, 5, 0, 0, 54, 1, 0, SystemZImpOpBase + 0, 410, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x80080ULL }, // Inst #453 = STOCMux |
6712 | | { 452, 4, 0, 0, 48, 0, 0, SystemZImpOpBase + 0, 231, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x8eULL }, // Inst #452 = STMux |
6713 | | { 451, 4, 0, 0, 77, 0, 0, SystemZImpOpBase + 0, 231, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x2cULL }, // Inst #451 = STHMux |
6714 | | { 450, 4, 0, 0, 76, 0, 0, SystemZImpOpBase + 0, 231, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x2cULL }, // Inst #450 = STCMux |
6715 | | { 449, 4, 0, 0, 47, 0, 0, SystemZImpOpBase + 0, 294, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x1eULL }, // Inst #449 = ST128 |
6716 | | { 448, 4, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 242, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #448 = SRSTLoop |
6717 | | { 447, 5, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 171, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x101c88ULL }, // Inst #447 = SL_MemFoldPseudo |
6718 | | { 446, 5, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 163, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x101d0cULL }, // Inst #446 = SLG_MemFoldPseudo |
6719 | | { 445, 5, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 163, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x223d0cULL }, // Inst #445 = SG_MemFoldPseudo |
6720 | | { 444, 5, 1, 0, 55, 1, 0, SystemZImpOpBase + 0, 405, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x80000ULL }, // Inst #444 = SELRMux |
6721 | | { 443, 5, 1, 0, 0, 1, 1, SystemZImpOpBase + 1, 153, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3fc88ULL }, // Inst #443 = SEB_MemFoldPseudo |
6722 | | { 442, 5, 1, 0, 0, 1, 1, SystemZImpOpBase + 1, 144, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3fd08ULL }, // Inst #442 = SDB_MemFoldPseudo |
6723 | | { 441, 2, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 403, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #441 = SCmp128Hi |
6724 | | { 440, 0, 0, 4, 22, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #440 = Return_XPLINK |
6725 | | { 439, 0, 0, 2, 22, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #439 = Return |
6726 | | { 438, 6, 1, 0, 216, 0, 0, SystemZImpOpBase + 0, 397, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #438 = RISBMux |
6727 | | { 437, 6, 1, 6, 215, 0, 0, SystemZImpOpBase + 0, 391, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #437 = RISBLL |
6728 | | { 436, 6, 1, 6, 215, 0, 0, SystemZImpOpBase + 0, 385, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #436 = RISBLH |
6729 | | { 435, 6, 1, 6, 214, 0, 0, SystemZImpOpBase + 0, 379, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #435 = RISBHL |
6730 | | { 434, 6, 1, 6, 214, 0, 0, SystemZImpOpBase + 0, 373, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #434 = RISBHH |
6731 | | { 433, 1, 0, 0, 0, 1, 3, SystemZImpOpBase + 16, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #433 = PROBED_STACKALLOC |
6732 | | { 432, 3, 1, 0, 0, 1, 2, SystemZImpOpBase + 13, 370, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #432 = PROBED_ALLOCA |
6733 | | { 431, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 367, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #431 = PAIR128 |
6734 | | { 430, 5, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 171, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x23088ULL }, // Inst #430 = O_MemFoldPseudo |
6735 | | { 429, 3, 1, 0, 159, 0, 1, SystemZImpOpBase + 0, 160, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #429 = OILMux |
6736 | | { 428, 3, 1, 4, 165, 0, 1, SystemZImpOpBase + 0, 291, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #428 = OILL64 |
6737 | | { 427, 3, 1, 4, 164, 0, 1, SystemZImpOpBase + 0, 291, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #427 = OILH64 |
6738 | | { 426, 3, 1, 6, 163, 0, 1, SystemZImpOpBase + 0, 291, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #426 = OILF64 |
6739 | | { 425, 3, 1, 0, 159, 0, 1, SystemZImpOpBase + 0, 160, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #425 = OIHMux |
6740 | | { 424, 3, 1, 4, 162, 0, 1, SystemZImpOpBase + 0, 291, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #424 = OIHL64 |
6741 | | { 423, 3, 1, 4, 161, 0, 1, SystemZImpOpBase + 0, 291, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #423 = OIHH64 |
6742 | | { 422, 3, 1, 6, 160, 0, 1, SystemZImpOpBase + 0, 291, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #422 = OIHF64 |
6743 | | { 421, 3, 1, 0, 159, 0, 1, SystemZImpOpBase + 0, 160, 0|(1ULL<<MCID::Pseudo), 0x23000ULL }, // Inst #421 = OIFMux |
6744 | | { 420, 5, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 163, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x2310cULL }, // Inst #420 = OG_MemFoldPseudo |
6745 | | { 419, 5, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 226, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #419 = OCReg |
6746 | | { 418, 5, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 221, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #418 = OCImm |
6747 | | { 417, 5, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 171, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x23088ULL }, // Inst #417 = N_MemFoldPseudo |
6748 | | { 416, 3, 1, 0, 146, 0, 1, SystemZImpOpBase + 0, 160, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #416 = NILMux |
6749 | | { 415, 3, 1, 4, 153, 0, 1, SystemZImpOpBase + 0, 291, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #415 = NILL64 |
6750 | | { 414, 3, 1, 4, 152, 0, 1, SystemZImpOpBase + 0, 291, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #414 = NILH64 |
6751 | | { 413, 3, 1, 6, 151, 0, 1, SystemZImpOpBase + 0, 291, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #413 = NILF64 |
6752 | | { 412, 3, 1, 0, 146, 0, 1, SystemZImpOpBase + 0, 160, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #412 = NIHMux |
6753 | | { 411, 3, 1, 4, 150, 0, 1, SystemZImpOpBase + 0, 291, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #411 = NIHL64 |
6754 | | { 410, 3, 1, 4, 149, 0, 1, SystemZImpOpBase + 0, 291, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #410 = NIHH64 |
6755 | | { 409, 3, 1, 6, 148, 0, 1, SystemZImpOpBase + 0, 291, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #409 = NIHF64 |
6756 | | { 408, 3, 1, 0, 146, 0, 1, SystemZImpOpBase + 0, 160, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x23000ULL }, // Inst #408 = NIFMux |
6757 | | { 407, 5, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 163, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x2310cULL }, // Inst #407 = NG_MemFoldPseudo |
6758 | | { 406, 5, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 226, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #406 = NCReg |
6759 | | { 405, 5, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 221, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #405 = NCImm |
6760 | | { 404, 4, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 363, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #404 = MemsetRegReg |
6761 | | { 403, 4, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 359, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #403 = MemsetRegImm |
6762 | | { 402, 4, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 355, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #402 = MemsetImmReg |
6763 | | { 401, 4, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 351, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #401 = MemsetImmImm |
6764 | | { 400, 4, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 242, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #400 = MVSTLoop |
6765 | | { 399, 5, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 226, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #399 = MVCReg |
6766 | | { 398, 5, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 221, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #398 = MVCImm |
6767 | | { 397, 5, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 163, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x10cULL }, // Inst #397 = MSGC_MemFoldPseudo |
6768 | | { 396, 6, 1, 0, 0, 1, 0, SystemZImpOpBase + 12, 345, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x88ULL }, // Inst #396 = MSEB_MemFoldPseudo |
6769 | | { 395, 6, 1, 0, 0, 1, 0, SystemZImpOpBase + 12, 339, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x108ULL }, // Inst #395 = MSDB_MemFoldPseudo |
6770 | | { 394, 5, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 171, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x8cULL }, // Inst #394 = MSC_MemFoldPseudo |
6771 | | { 393, 5, 1, 0, 0, 1, 0, SystemZImpOpBase + 12, 153, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x88ULL }, // Inst #393 = MEEB_MemFoldPseudo |
6772 | | { 392, 5, 1, 0, 0, 1, 0, SystemZImpOpBase + 12, 144, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x108ULL }, // Inst #392 = MDB_MemFoldPseudo |
6773 | | { 391, 6, 1, 0, 0, 1, 0, SystemZImpOpBase + 12, 345, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x88ULL }, // Inst #391 = MAEB_MemFoldPseudo |
6774 | | { 390, 6, 1, 0, 0, 1, 0, SystemZImpOpBase + 12, 339, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x108ULL }, // Inst #390 = MADB_MemFoldPseudo |
6775 | | { 389, 4, 1, 0, 352, 0, 0, SystemZImpOpBase + 0, 335, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x1dULL }, // Inst #389 = LX |
6776 | | { 388, 1, 0, 0, 0, 1, 1, SystemZImpOpBase + 1, 334, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #388 = LTXBRCompare_Pseudo |
6777 | | { 387, 1, 0, 0, 0, 1, 1, SystemZImpOpBase + 1, 333, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #387 = LTEBRCompare_Pseudo |
6778 | | { 386, 1, 0, 0, 0, 1, 1, SystemZImpOpBase + 1, 332, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #386 = LTDBRCompare_Pseudo |
6779 | | { 385, 5, 1, 0, 50, 1, 0, SystemZImpOpBase + 0, 327, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x80000ULL }, // Inst #385 = LOCRMux |
6780 | | { 384, 6, 1, 0, 0, 1, 0, SystemZImpOpBase + 0, 321, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #384 = LOCMux_MemFoldPseudo |
6781 | | { 383, 6, 1, 0, 53, 1, 0, SystemZImpOpBase + 0, 315, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80080ULL }, // Inst #383 = LOCMux |
6782 | | { 382, 5, 1, 0, 52, 1, 0, SystemZImpOpBase + 0, 310, 0|(1ULL<<MCID::Pseudo), 0x80000ULL }, // Inst #382 = LOCHIMux |
6783 | | { 381, 6, 1, 0, 0, 1, 0, SystemZImpOpBase + 0, 304, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x100ULL }, // Inst #381 = LOCG_MemFoldPseudo |
6784 | | { 380, 4, 1, 0, 33, 0, 0, SystemZImpOpBase + 0, 231, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x8dULL }, // Inst #380 = LMux |
6785 | | { 379, 2, 1, 0, 67, 0, 0, SystemZImpOpBase + 0, 302, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #379 = LLHRMux |
6786 | | { 378, 4, 1, 0, 70, 0, 0, SystemZImpOpBase + 0, 231, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x4cULL }, // Inst #378 = LLHMux |
6787 | | { 377, 2, 1, 0, 66, 0, 0, SystemZImpOpBase + 0, 302, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #377 = LLCRMux |
6788 | | { 376, 4, 1, 0, 69, 0, 0, SystemZImpOpBase + 0, 231, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x2cULL }, // Inst #376 = LLCMux |
6789 | | { 375, 4, 1, 0, 63, 0, 0, SystemZImpOpBase + 0, 231, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x4cULL }, // Inst #375 = LHMux |
6790 | | { 374, 2, 1, 0, 40, 0, 0, SystemZImpOpBase + 0, 198, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #374 = LHIMux |
6791 | | { 373, 2, 1, 6, 731, 0, 0, SystemZImpOpBase + 0, 300, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #373 = LFER |
6792 | | { 372, 2, 1, 6, 730, 0, 0, SystemZImpOpBase + 0, 298, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #372 = LEFR |
6793 | | { 371, 4, 1, 0, 61, 0, 0, SystemZImpOpBase + 0, 231, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x2cULL }, // Inst #371 = LBMux |
6794 | | { 370, 4, 1, 0, 36, 0, 0, SystemZImpOpBase + 0, 294, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x1dULL }, // Inst #370 = L128 |
6795 | | { 369, 3, 1, 0, 96, 0, 0, SystemZImpOpBase + 0, 160, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #369 = IILMux |
6796 | | { 368, 3, 1, 4, 102, 0, 0, SystemZImpOpBase + 0, 291, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #368 = IILL64 |
6797 | | { 367, 3, 1, 4, 101, 0, 0, SystemZImpOpBase + 0, 291, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #367 = IILH64 |
6798 | | { 366, 3, 1, 6, 100, 0, 0, SystemZImpOpBase + 0, 291, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #366 = IILF64 |
6799 | | { 365, 3, 1, 0, 96, 0, 0, SystemZImpOpBase + 0, 160, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #365 = IIHMux |
6800 | | { 364, 3, 1, 4, 99, 0, 0, SystemZImpOpBase + 0, 291, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #364 = IIHL64 |
6801 | | { 363, 3, 1, 4, 98, 0, 0, SystemZImpOpBase + 0, 291, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #363 = IIHH64 |
6802 | | { 362, 3, 1, 6, 97, 0, 0, SystemZImpOpBase + 0, 291, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #362 = IIHF64 |
6803 | | { 361, 2, 1, 0, 96, 0, 0, SystemZImpOpBase + 0, 198, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #361 = IIFMux |
6804 | | { 360, 1, 1, 6, 87, 0, 0, SystemZImpOpBase + 0, 290, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #360 = GOT |
6805 | | { 359, 6, 0, 6, 0, 0, 0, SystemZImpOpBase + 0, 284, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #359 = EXRL_Pseudo |
6806 | | { 358, 5, 1, 0, 0, 1, 0, SystemZImpOpBase + 12, 153, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x88ULL }, // Inst #358 = DEB_MemFoldPseudo |
6807 | | { 357, 5, 1, 0, 0, 1, 0, SystemZImpOpBase + 12, 144, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x108ULL }, // Inst #357 = DDB_MemFoldPseudo |
6808 | | { 356, 2, 0, 4, 13, 1, 0, SystemZImpOpBase + 0, 21, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #356 = CondTrap |
6809 | | { 355, 6, 0, 0, 0, 1, 0, SystemZImpOpBase + 0, 278, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #355 = CondStoreF64Inv |
6810 | | { 354, 6, 0, 0, 0, 1, 0, SystemZImpOpBase + 0, 278, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #354 = CondStoreF64 |
6811 | | { 353, 6, 0, 0, 0, 1, 0, SystemZImpOpBase + 0, 272, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #353 = CondStoreF32Inv |
6812 | | { 352, 6, 0, 0, 0, 1, 0, SystemZImpOpBase + 0, 272, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #352 = CondStoreF32 |
6813 | | { 351, 6, 0, 0, 0, 1, 0, SystemZImpOpBase + 0, 260, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #351 = CondStore8MuxInv |
6814 | | { 350, 6, 0, 0, 0, 1, 0, SystemZImpOpBase + 0, 260, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #350 = CondStore8Mux |
6815 | | { 349, 6, 0, 0, 0, 1, 0, SystemZImpOpBase + 0, 254, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #349 = CondStore8Inv |
6816 | | { 348, 6, 0, 0, 0, 1, 0, SystemZImpOpBase + 0, 254, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #348 = CondStore8 |
6817 | | { 347, 6, 0, 0, 0, 1, 0, SystemZImpOpBase + 0, 266, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #347 = CondStore64Inv |
6818 | | { 346, 6, 0, 0, 0, 1, 0, SystemZImpOpBase + 0, 266, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #346 = CondStore64 |
6819 | | { 345, 6, 0, 0, 0, 1, 0, SystemZImpOpBase + 0, 260, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #345 = CondStore32MuxInv |
6820 | | { 344, 6, 0, 0, 0, 1, 0, SystemZImpOpBase + 0, 260, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #344 = CondStore32Mux |
6821 | | { 343, 6, 0, 0, 0, 1, 0, SystemZImpOpBase + 0, 254, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #343 = CondStore32Inv |
6822 | | { 342, 6, 0, 0, 0, 1, 0, SystemZImpOpBase + 0, 254, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #342 = CondStore32 |
6823 | | { 341, 6, 0, 0, 0, 1, 0, SystemZImpOpBase + 0, 260, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #341 = CondStore16MuxInv |
6824 | | { 340, 6, 0, 0, 0, 1, 0, SystemZImpOpBase + 0, 260, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #340 = CondStore16Mux |
6825 | | { 339, 6, 0, 0, 0, 1, 0, SystemZImpOpBase + 0, 254, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #339 = CondStore16Inv |
6826 | | { 338, 6, 0, 0, 0, 1, 0, SystemZImpOpBase + 0, 254, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #338 = CondStore16 |
6827 | | { 337, 2, 0, 4, 23, 1, 0, SystemZImpOpBase + 0, 21, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x40000ULL }, // Inst #337 = CondReturn_XPLINK |
6828 | | { 336, 2, 0, 2, 23, 1, 0, SystemZImpOpBase + 0, 21, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x40000ULL }, // Inst #336 = CondReturn |
6829 | | { 335, 1, 0, 6, 3, 0, 0, SystemZImpOpBase + 0, 250, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #335 = CallJG |
6830 | | { 334, 3, 0, 6, 2, 0, 0, SystemZImpOpBase + 0, 251, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x40000ULL }, // Inst #334 = CallBRCL |
6831 | | { 333, 1, 0, 8, 19, 1, 2, SystemZImpOpBase + 9, 250, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #333 = CallBRASL_XPLINK64 |
6832 | | { 332, 1, 0, 6, 19, 1, 2, SystemZImpOpBase + 3, 250, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #332 = CallBRASL |
6833 | | { 331, 1, 0, 2, 5, 0, 0, SystemZImpOpBase + 0, 246, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #331 = CallBR |
6834 | | { 330, 3, 0, 2, 4, 0, 0, SystemZImpOpBase + 0, 247, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x40000ULL }, // Inst #330 = CallBCR |
6835 | | { 329, 1, 0, 4, 20, 1, 2, SystemZImpOpBase + 9, 246, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #329 = CallBASR_XPLINK64 |
6836 | | { 328, 1, 0, 4, 20, 1, 2, SystemZImpOpBase + 6, 246, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call), 0x0ULL }, // Inst #328 = CallBASR_STACKEXT |
6837 | | { 327, 1, 0, 2, 20, 1, 2, SystemZImpOpBase + 3, 246, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #327 = CallBASR |
6838 | | { 326, 3, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 239, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #326 = CRBReturn |
6839 | | { 325, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 235, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #325 = CRBCall |
6840 | | { 324, 4, 0, 0, 218, 0, 1, SystemZImpOpBase + 0, 231, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x388cULL }, // Inst #324 = CMux |
6841 | | { 323, 4, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 242, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #323 = CLSTLoop |
6842 | | { 322, 3, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 239, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #322 = CLRBReturn |
6843 | | { 321, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 235, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #321 = CLRBCall |
6844 | | { 320, 4, 0, 0, 227, 0, 1, SystemZImpOpBase + 0, 231, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x10388cULL }, // Inst #320 = CLMux |
6845 | | { 319, 3, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 218, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #319 = CLIBReturn |
6846 | | { 318, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 214, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #318 = CLIBCall |
6847 | | { 317, 3, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 211, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #317 = CLGRBReturn |
6848 | | { 316, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 207, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #316 = CLGRBCall |
6849 | | { 315, 3, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 204, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #315 = CLGIBReturn |
6850 | | { 314, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 200, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #314 = CLGIBCall |
6851 | | { 313, 2, 0, 0, 229, 0, 1, SystemZImpOpBase + 0, 198, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x103800ULL }, // Inst #313 = CLFIMux |
6852 | | { 312, 5, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 226, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #312 = CLCReg |
6853 | | { 311, 5, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 221, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #311 = CLCImm |
6854 | | { 310, 3, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 218, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #310 = CIBReturn |
6855 | | { 309, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 214, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #309 = CIBCall |
6856 | | { 308, 2, 0, 0, 220, 0, 1, SystemZImpOpBase + 0, 198, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x3800ULL }, // Inst #308 = CHIMux |
6857 | | { 307, 3, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 211, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #307 = CGRBReturn |
6858 | | { 306, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 207, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #306 = CGRBCall |
6859 | | { 305, 3, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 204, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #305 = CGIBReturn |
6860 | | { 304, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 200, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #304 = CGIBCall |
6861 | | { 303, 2, 0, 0, 220, 0, 1, SystemZImpOpBase + 0, 198, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x3800ULL }, // Inst #303 = CFIMux |
6862 | | { 302, 5, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 171, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x203c88ULL }, // Inst #302 = A_MemFoldPseudo |
6863 | | { 301, 7, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 191, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #301 = ATOMIC_SWAPW |
6864 | | { 300, 7, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 191, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #300 = ATOMIC_LOADW_XR |
6865 | | { 299, 7, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 184, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #299 = ATOMIC_LOADW_XILF |
6866 | | { 298, 7, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 191, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #298 = ATOMIC_LOADW_UMIN |
6867 | | { 297, 7, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 191, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #297 = ATOMIC_LOADW_UMAX |
6868 | | { 296, 7, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 191, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #296 = ATOMIC_LOADW_SR |
6869 | | { 295, 7, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 191, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #295 = ATOMIC_LOADW_OR |
6870 | | { 294, 7, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 184, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #294 = ATOMIC_LOADW_OILH |
6871 | | { 293, 7, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 191, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #293 = ATOMIC_LOADW_NRi |
6872 | | { 292, 7, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 191, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #292 = ATOMIC_LOADW_NR |
6873 | | { 291, 7, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 184, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #291 = ATOMIC_LOADW_NILHi |
6874 | | { 290, 7, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 184, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #290 = ATOMIC_LOADW_NILH |
6875 | | { 289, 7, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 191, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #289 = ATOMIC_LOADW_MIN |
6876 | | { 288, 7, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 191, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #288 = ATOMIC_LOADW_MAX |
6877 | | { 287, 7, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 191, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #287 = ATOMIC_LOADW_AR |
6878 | | { 286, 7, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 184, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #286 = ATOMIC_LOADW_AFI |
6879 | | { 285, 8, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 176, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #285 = ATOMIC_CMP_SWAPW |
6880 | | { 284, 5, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 171, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x103c88ULL }, // Inst #284 = AL_MemFoldPseudo |
6881 | | { 283, 5, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 163, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x103d0cULL }, // Inst #283 = ALG_MemFoldPseudo |
6882 | | { 282, 3, 1, 0, 112, 0, 1, SystemZImpOpBase + 0, 168, 0|(1ULL<<MCID::Pseudo), 0x203c00ULL }, // Inst #282 = AHIMuxK |
6883 | | { 281, 3, 1, 0, 112, 0, 1, SystemZImpOpBase + 0, 160, 0|(1ULL<<MCID::Pseudo), 0x203c00ULL }, // Inst #281 = AHIMux |
6884 | | { 280, 5, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 163, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x203d0cULL }, // Inst #280 = AG_MemFoldPseudo |
6885 | | { 279, 3, 1, 0, 106, 0, 1, SystemZImpOpBase + 0, 160, 0|(1ULL<<MCID::Pseudo), 0x203c00ULL }, // Inst #279 = AFIMux |
6886 | | { 278, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 158, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #278 = AEXT128 |
6887 | | { 277, 5, 1, 0, 0, 1, 1, SystemZImpOpBase + 1, 153, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3fc88ULL }, // Inst #277 = AEB_MemFoldPseudo |
6888 | | { 276, 4, 1, 0, 1, 0, 0, SystemZImpOpBase + 0, 149, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #276 = ADJDYNALLOC |
6889 | | { 275, 2, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 21, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #275 = ADJCALLSTACKUP |
6890 | | { 274, 2, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 21, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #274 = ADJCALLSTACKDOWN |
6891 | | { 273, 5, 1, 0, 0, 1, 1, SystemZImpOpBase + 1, 144, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3fd08ULL }, // Inst #273 = ADB_MemFoldPseudo |
6892 | | { 272, 4, 1, 12, 0, 0, 1, SystemZImpOpBase + 0, 140, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #272 = ADA_ENTRY_VALUE |
6893 | | { 271, 4, 1, 12, 0, 0, 1, SystemZImpOpBase + 0, 140, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #271 = ADA_ENTRY |
6894 | | { 270, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 136, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #270 = G_UBFX |
6895 | | { 269, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 136, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #269 = G_SBFX |
6896 | | { 268, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #268 = G_VECREDUCE_UMIN |
6897 | | { 267, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #267 = G_VECREDUCE_UMAX |
6898 | | { 266, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #266 = G_VECREDUCE_SMIN |
6899 | | { 265, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #265 = G_VECREDUCE_SMAX |
6900 | | { 264, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #264 = G_VECREDUCE_XOR |
6901 | | { 263, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #263 = G_VECREDUCE_OR |
6902 | | { 262, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #262 = G_VECREDUCE_AND |
6903 | | { 261, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #261 = G_VECREDUCE_MUL |
6904 | | { 260, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #260 = G_VECREDUCE_ADD |
6905 | | { 259, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #259 = G_VECREDUCE_FMINIMUM |
6906 | | { 258, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #258 = G_VECREDUCE_FMAXIMUM |
6907 | | { 257, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #257 = G_VECREDUCE_FMIN |
6908 | | { 256, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #256 = G_VECREDUCE_FMAX |
6909 | | { 255, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #255 = G_VECREDUCE_FMUL |
6910 | | { 254, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #254 = G_VECREDUCE_FADD |
6911 | | { 253, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 123, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #253 = G_VECREDUCE_SEQ_FMUL |
6912 | | { 252, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 123, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #252 = G_VECREDUCE_SEQ_FADD |
6913 | | { 251, 3, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 53, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #251 = G_BZERO |
6914 | | { 250, 4, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 132, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #250 = G_MEMSET |
6915 | | { 249, 4, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 132, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #249 = G_MEMMOVE |
6916 | | { 248, 3, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 123, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #248 = G_MEMCPY_INLINE |
6917 | | { 247, 4, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 132, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #247 = G_MEMCPY |
6918 | | { 246, 2, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 130, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #246 = G_WRITE_REGISTER |
6919 | | { 245, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #245 = G_READ_REGISTER |
6920 | | { 244, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 96, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #244 = G_STRICT_FLDEXP |
6921 | | { 243, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #243 = G_STRICT_FSQRT |
6922 | | { 242, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 46, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #242 = G_STRICT_FMA |
6923 | | { 241, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #241 = G_STRICT_FREM |
6924 | | { 240, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #240 = G_STRICT_FDIV |
6925 | | { 239, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #239 = G_STRICT_FMUL |
6926 | | { 238, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #238 = G_STRICT_FSUB |
6927 | | { 237, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #237 = G_STRICT_FADD |
6928 | | { 236, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #236 = G_STACKRESTORE |
6929 | | { 235, 1, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #235 = G_STACKSAVE |
6930 | | { 234, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 64, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #234 = G_DYN_STACKALLOC |
6931 | | { 233, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #233 = G_JUMP_TABLE |
6932 | | { 232, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #232 = G_BLOCK_ADDR |
6933 | | { 231, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #231 = G_ADDRSPACE_CAST |
6934 | | { 230, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #230 = G_FNEARBYINT |
6935 | | { 229, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #229 = G_FRINT |
6936 | | { 228, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #228 = G_FFLOOR |
6937 | | { 227, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #227 = G_FSQRT |
6938 | | { 226, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #226 = G_FSIN |
6939 | | { 225, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #225 = G_FCOS |
6940 | | { 224, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #224 = G_FCEIL |
6941 | | { 223, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #223 = G_BITREVERSE |
6942 | | { 222, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #222 = G_BSWAP |
6943 | | { 221, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #221 = G_CTPOP |
6944 | | { 220, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #220 = G_CTLZ_ZERO_UNDEF |
6945 | | { 219, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #219 = G_CTLZ |
6946 | | { 218, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #218 = G_CTTZ_ZERO_UNDEF |
6947 | | { 217, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #217 = G_CTTZ |
6948 | | { 216, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 126, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #216 = G_SHUFFLE_VECTOR |
6949 | | { 215, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 123, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #215 = G_EXTRACT_VECTOR_ELT |
6950 | | { 214, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 119, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #214 = G_INSERT_VECTOR_ELT |
6951 | | { 213, 3, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 116, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #213 = G_BRJT |
6952 | | { 212, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #212 = G_BR |
6953 | | { 211, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #211 = G_LLROUND |
6954 | | { 210, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #210 = G_LROUND |
6955 | | { 209, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #209 = G_ABS |
6956 | | { 208, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #208 = G_UMAX |
6957 | | { 207, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #207 = G_UMIN |
6958 | | { 206, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #206 = G_SMAX |
6959 | | { 205, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #205 = G_SMIN |
6960 | | { 204, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 96, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #204 = G_PTRMASK |
6961 | | { 203, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 96, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #203 = G_PTR_ADD |
6962 | | { 202, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #202 = G_RESET_FPMODE |
6963 | | { 201, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #201 = G_SET_FPMODE |
6964 | | { 200, 1, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #200 = G_GET_FPMODE |
6965 | | { 199, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #199 = G_RESET_FPENV |
6966 | | { 198, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #198 = G_SET_FPENV |
6967 | | { 197, 1, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #197 = G_GET_FPENV |
6968 | | { 196, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #196 = G_FMAXIMUM |
6969 | | { 195, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #195 = G_FMINIMUM |
6970 | | { 194, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #194 = G_FMAXNUM_IEEE |
6971 | | { 193, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #193 = G_FMINNUM_IEEE |
6972 | | { 192, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #192 = G_FMAXNUM |
6973 | | { 191, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #191 = G_FMINNUM |
6974 | | { 190, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #190 = G_FCANONICALIZE |
6975 | | { 189, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 93, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #189 = G_IS_FPCLASS |
6976 | | { 188, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 96, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #188 = G_FCOPYSIGN |
6977 | | { 187, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #187 = G_FABS |
6978 | | { 186, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #186 = G_UITOFP |
6979 | | { 185, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #185 = G_SITOFP |
6980 | | { 184, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #184 = G_FPTOUI |
6981 | | { 183, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #183 = G_FPTOSI |
6982 | | { 182, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #182 = G_FPTRUNC |
6983 | | { 181, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #181 = G_FPEXT |
6984 | | { 180, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #180 = G_FNEG |
6985 | | { 179, 3, 2, 0, 0, 0, 0, SystemZImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #179 = G_FFREXP |
6986 | | { 178, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 96, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #178 = G_FLDEXP |
6987 | | { 177, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #177 = G_FLOG10 |
6988 | | { 176, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #176 = G_FLOG2 |
6989 | | { 175, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #175 = G_FLOG |
6990 | | { 174, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #174 = G_FEXP10 |
6991 | | { 173, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #173 = G_FEXP2 |
6992 | | { 172, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #172 = G_FEXP |
6993 | | { 171, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 96, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #171 = G_FPOWI |
6994 | | { 170, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #170 = G_FPOW |
6995 | | { 169, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #169 = G_FREM |
6996 | | { 168, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #168 = G_FDIV |
6997 | | { 167, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 46, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #167 = G_FMAD |
6998 | | { 166, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 46, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #166 = G_FMA |
6999 | | { 165, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #165 = G_FMUL |
7000 | | { 164, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #164 = G_FSUB |
7001 | | { 163, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #163 = G_FADD |
7002 | | { 162, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 112, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #162 = G_UDIVFIXSAT |
7003 | | { 161, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 112, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #161 = G_SDIVFIXSAT |
7004 | | { 160, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 112, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #160 = G_UDIVFIX |
7005 | | { 159, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 112, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #159 = G_SDIVFIX |
7006 | | { 158, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 112, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #158 = G_UMULFIXSAT |
7007 | | { 157, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 112, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #157 = G_SMULFIXSAT |
7008 | | { 156, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 112, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #156 = G_UMULFIX |
7009 | | { 155, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 112, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #155 = G_SMULFIX |
7010 | | { 154, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 96, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #154 = G_SSHLSAT |
7011 | | { 153, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 96, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #153 = G_USHLSAT |
7012 | | { 152, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #152 = G_SSUBSAT |
7013 | | { 151, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #151 = G_USUBSAT |
7014 | | { 150, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #150 = G_SADDSAT |
7015 | | { 149, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #149 = G_UADDSAT |
7016 | | { 148, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #148 = G_SMULH |
7017 | | { 147, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #147 = G_UMULH |
7018 | | { 146, 4, 2, 0, 0, 0, 0, SystemZImpOpBase + 0, 82, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #146 = G_SMULO |
7019 | | { 145, 4, 2, 0, 0, 0, 0, SystemZImpOpBase + 0, 82, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #145 = G_UMULO |
7020 | | { 144, 5, 2, 0, 0, 0, 0, SystemZImpOpBase + 0, 107, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #144 = G_SSUBE |
7021 | | { 143, 4, 2, 0, 0, 0, 0, SystemZImpOpBase + 0, 82, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #143 = G_SSUBO |
7022 | | { 142, 5, 2, 0, 0, 0, 0, SystemZImpOpBase + 0, 107, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #142 = G_SADDE |
7023 | | { 141, 4, 2, 0, 0, 0, 0, SystemZImpOpBase + 0, 82, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #141 = G_SADDO |
7024 | | { 140, 5, 2, 0, 0, 0, 0, SystemZImpOpBase + 0, 107, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #140 = G_USUBE |
7025 | | { 139, 4, 2, 0, 0, 0, 0, SystemZImpOpBase + 0, 82, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #139 = G_USUBO |
7026 | | { 138, 5, 2, 0, 0, 0, 0, SystemZImpOpBase + 0, 107, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #138 = G_UADDE |
7027 | | { 137, 4, 2, 0, 0, 0, 0, SystemZImpOpBase + 0, 82, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #137 = G_UADDO |
7028 | | { 136, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 82, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #136 = G_SELECT |
7029 | | { 135, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 103, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #135 = G_FCMP |
7030 | | { 134, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 103, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #134 = G_ICMP |
7031 | | { 133, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 96, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #133 = G_ROTL |
7032 | | { 132, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 96, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #132 = G_ROTR |
7033 | | { 131, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 99, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #131 = G_FSHR |
7034 | | { 130, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 99, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #130 = G_FSHL |
7035 | | { 129, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 96, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #129 = G_ASHR |
7036 | | { 128, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 96, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #128 = G_LSHR |
7037 | | { 127, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 96, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #127 = G_SHL |
7038 | | { 126, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #126 = G_ZEXT |
7039 | | { 125, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 40, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #125 = G_SEXT_INREG |
7040 | | { 124, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #124 = G_SEXT |
7041 | | { 123, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 93, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #123 = G_VAARG |
7042 | | { 122, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #122 = G_VASTART |
7043 | | { 121, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #121 = G_FCONSTANT |
7044 | | { 120, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #120 = G_CONSTANT |
7045 | | { 119, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #119 = G_TRUNC |
7046 | | { 118, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #118 = G_ANYEXT |
7047 | | { 117, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #117 = G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS |
7048 | | { 116, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #116 = G_INTRINSIC_CONVERGENT |
7049 | | { 115, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #115 = G_INTRINSIC_W_SIDE_EFFECTS |
7050 | | { 114, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #114 = G_INTRINSIC |
7051 | | { 113, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #113 = G_INVOKE_REGION_START |
7052 | | { 112, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #112 = G_BRINDIRECT |
7053 | | { 111, 2, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #111 = G_BRCOND |
7054 | | { 110, 4, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 89, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #110 = G_PREFETCH |
7055 | | { 109, 2, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 21, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #109 = G_FENCE |
7056 | | { 108, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #108 = G_ATOMICRMW_UDEC_WRAP |
7057 | | { 107, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #107 = G_ATOMICRMW_UINC_WRAP |
7058 | | { 106, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #106 = G_ATOMICRMW_FMIN |
7059 | | { 105, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #105 = G_ATOMICRMW_FMAX |
7060 | | { 104, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #104 = G_ATOMICRMW_FSUB |
7061 | | { 103, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #103 = G_ATOMICRMW_FADD |
7062 | | { 102, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #102 = G_ATOMICRMW_UMIN |
7063 | | { 101, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #101 = G_ATOMICRMW_UMAX |
7064 | | { 100, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #100 = G_ATOMICRMW_MIN |
7065 | | { 99, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #99 = G_ATOMICRMW_MAX |
7066 | | { 98, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #98 = G_ATOMICRMW_XOR |
7067 | | { 97, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #97 = G_ATOMICRMW_OR |
7068 | | { 96, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #96 = G_ATOMICRMW_NAND |
7069 | | { 95, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #95 = G_ATOMICRMW_AND |
7070 | | { 94, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #94 = G_ATOMICRMW_SUB |
7071 | | { 93, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #93 = G_ATOMICRMW_ADD |
7072 | | { 92, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #92 = G_ATOMICRMW_XCHG |
7073 | | { 91, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 82, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #91 = G_ATOMIC_CMPXCHG |
7074 | | { 90, 5, 2, 0, 0, 0, 0, SystemZImpOpBase + 0, 77, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #90 = G_ATOMIC_CMPXCHG_WITH_SUCCESS |
7075 | | { 89, 5, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 72, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #89 = G_INDEXED_STORE |
7076 | | { 88, 2, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #88 = G_STORE |
7077 | | { 87, 5, 2, 0, 0, 0, 0, SystemZImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #87 = G_INDEXED_ZEXTLOAD |
7078 | | { 86, 5, 2, 0, 0, 0, 0, SystemZImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #86 = G_INDEXED_SEXTLOAD |
7079 | | { 85, 5, 2, 0, 0, 0, 0, SystemZImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #85 = G_INDEXED_LOAD |
7080 | | { 84, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #84 = G_ZEXTLOAD |
7081 | | { 83, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #83 = G_SEXTLOAD |
7082 | | { 82, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #82 = G_LOAD |
7083 | | { 81, 1, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #81 = G_READCYCLECOUNTER |
7084 | | { 80, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #80 = G_INTRINSIC_ROUNDEVEN |
7085 | | { 79, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #79 = G_INTRINSIC_LRINT |
7086 | | { 78, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #78 = G_INTRINSIC_ROUND |
7087 | | { 77, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #77 = G_INTRINSIC_TRUNC |
7088 | | { 76, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 64, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #76 = G_INTRINSIC_FPTRUNC_ROUND |
7089 | | { 75, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #75 = G_CONSTANT_FOLD_BARRIER |
7090 | | { 74, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #74 = G_FREEZE |
7091 | | { 73, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #73 = G_BITCAST |
7092 | | { 72, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #72 = G_INTTOPTR |
7093 | | { 71, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #71 = G_PTRTOINT |
7094 | | { 70, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #70 = G_CONCAT_VECTORS |
7095 | | { 69, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #69 = G_BUILD_VECTOR_TRUNC |
7096 | | { 68, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #68 = G_BUILD_VECTOR |
7097 | | { 67, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #67 = G_MERGE_VALUES |
7098 | | { 66, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 58, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #66 = G_INSERT |
7099 | | { 65, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #65 = G_UNMERGE_VALUES |
7100 | | { 64, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 53, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #64 = G_EXTRACT |
7101 | | { 63, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #63 = G_CONSTANT_POOL |
7102 | | { 62, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #62 = G_GLOBAL_VALUE |
7103 | | { 61, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #61 = G_FRAME_INDEX |
7104 | | { 60, 1, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #60 = G_PHI |
7105 | | { 59, 1, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #59 = G_IMPLICIT_DEF |
7106 | | { 58, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #58 = G_XOR |
7107 | | { 57, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #57 = G_OR |
7108 | | { 56, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #56 = G_AND |
7109 | | { 55, 4, 2, 0, 0, 0, 0, SystemZImpOpBase + 0, 46, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #55 = G_UDIVREM |
7110 | | { 54, 4, 2, 0, 0, 0, 0, SystemZImpOpBase + 0, 46, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #54 = G_SDIVREM |
7111 | | { 53, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #53 = G_UREM |
7112 | | { 52, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #52 = G_SREM |
7113 | | { 51, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #51 = G_UDIV |
7114 | | { 50, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #50 = G_SDIV |
7115 | | { 49, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #49 = G_MUL |
7116 | | { 48, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #48 = G_SUB |
7117 | | { 47, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #47 = G_ADD |
7118 | | { 46, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 40, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #46 = G_ASSERT_ALIGN |
7119 | | { 45, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 40, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #45 = G_ASSERT_ZEXT |
7120 | | { 44, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 40, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #44 = G_ASSERT_SEXT |
7121 | | { 43, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // Inst #43 = JUMP_TABLE_DEBUG_INFO |
7122 | | { 42, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #42 = MEMBARRIER |
7123 | | { 41, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #41 = ICALL_BRANCH_FUNNEL |
7124 | | { 40, 3, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 37, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #40 = PATCHABLE_TYPED_EVENT_CALL |
7125 | | { 39, 2, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 35, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #39 = PATCHABLE_EVENT_CALL |
7126 | | { 38, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #38 = PATCHABLE_TAIL_CALL |
7127 | | { 37, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #37 = PATCHABLE_FUNCTION_EXIT |
7128 | | { 36, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #36 = PATCHABLE_RET |
7129 | | { 35, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #35 = PATCHABLE_FUNCTION_ENTER |
7130 | | { 34, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #34 = PATCHABLE_OP |
7131 | | { 33, 1, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #33 = FAULTING_OP |
7132 | | { 32, 2, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 33, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #32 = LOCAL_ESCAPE |
7133 | | { 31, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #31 = STATEPOINT |
7134 | | { 30, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 30, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #30 = PREALLOCATED_ARG |
7135 | | { 29, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #29 = PREALLOCATED_SETUP |
7136 | | { 28, 1, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 29, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x0ULL }, // Inst #28 = LOAD_STACK_GUARD |
7137 | | { 27, 6, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 23, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #27 = PATCHPOINT |
7138 | | { 26, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #26 = FENTRY_CALL |
7139 | | { 25, 2, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 21, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #25 = STACKMAP |
7140 | | { 24, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 19, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // Inst #24 = ARITH_FENCE |
7141 | | { 23, 4, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 15, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #23 = PSEUDO_PROBE |
7142 | | { 22, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // Inst #22 = LIFETIME_END |
7143 | | { 21, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // Inst #21 = LIFETIME_START |
7144 | | { 20, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #20 = BUNDLE |
7145 | | { 19, 2, 1, 0, 29, 0, 0, SystemZImpOpBase + 0, 13, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #19 = COPY |
7146 | | { 18, 2, 1, 0, 32, 0, 0, SystemZImpOpBase + 0, 13, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #18 = REG_SEQUENCE |
7147 | | { 17, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // Inst #17 = DBG_LABEL |
7148 | | { 16, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #16 = DBG_PHI |
7149 | | { 15, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #15 = DBG_INSTR_REF |
7150 | | { 14, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #14 = DBG_VALUE_LIST |
7151 | | { 13, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #13 = DBG_VALUE |
7152 | | { 12, 3, 1, 0, 29, 0, 0, SystemZImpOpBase + 0, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #12 = COPY_TO_REGCLASS |
7153 | | { 11, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 9, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #11 = SUBREG_TO_REG |
7154 | | { 10, 1, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #10 = IMPLICIT_DEF |
7155 | | { 9, 4, 1, 0, 31, 0, 0, SystemZImpOpBase + 0, 5, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #9 = INSERT_SUBREG |
7156 | | { 8, 3, 1, 0, 30, 0, 0, SystemZImpOpBase + 0, 2, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #8 = EXTRACT_SUBREG |
7157 | | { 7, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #7 = KILL |
7158 | | { 6, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // Inst #6 = ANNOTATION_LABEL |
7159 | | { 5, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // Inst #5 = GC_LABEL |
7160 | | { 4, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // Inst #4 = EH_LABEL |
7161 | | { 3, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // Inst #3 = CFI_INSTRUCTION |
7162 | | { 2, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2 = INLINEASM_BR |
7163 | | { 1, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #1 = INLINEASM |
7164 | | { 0, 1, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #0 = PHI |
7165 | | }, { |
7166 | | /* 0 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
7167 | | /* 1 */ |
7168 | | /* 1 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7169 | | /* 2 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7170 | | /* 5 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7171 | | /* 9 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7172 | | /* 13 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
7173 | | /* 15 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7174 | | /* 19 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, MCOI_TIED_TO(0) }, |
7175 | | /* 21 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7176 | | /* 23 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7177 | | /* 29 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, |
7178 | | /* 30 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7179 | | /* 33 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7180 | | /* 35 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
7181 | | /* 37 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
7182 | | /* 40 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 }, |
7183 | | /* 43 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
7184 | | /* 46 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
7185 | | /* 50 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
7186 | | /* 51 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
7187 | | /* 53 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 }, |
7188 | | /* 56 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
7189 | | /* 58 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 }, |
7190 | | /* 62 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
7191 | | /* 64 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7192 | | /* 67 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
7193 | | /* 72 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
7194 | | /* 77 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
7195 | | /* 82 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
7196 | | /* 86 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
7197 | | /* 89 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7198 | | /* 93 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
7199 | | /* 96 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
7200 | | /* 99 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
7201 | | /* 103 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
7202 | | /* 107 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
7203 | | /* 112 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 }, |
7204 | | /* 116 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
7205 | | /* 119 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, |
7206 | | /* 123 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, |
7207 | | /* 126 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
7208 | | /* 130 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
7209 | | /* 132 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 }, |
7210 | | /* 136 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
7211 | | /* 140 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7212 | | /* 144 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
7213 | | /* 149 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
7214 | | /* 153 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
7215 | | /* 158 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7216 | | /* 160 */ { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7217 | | /* 163 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
7218 | | /* 168 */ { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7219 | | /* 171 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
7220 | | /* 176 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7221 | | /* 184 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7222 | | /* 191 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7223 | | /* 198 */ { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7224 | | /* 200 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7225 | | /* 204 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7226 | | /* 207 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7227 | | /* 211 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7228 | | /* 214 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7229 | | /* 218 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7230 | | /* 221 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7231 | | /* 226 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7232 | | /* 231 */ { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
7233 | | /* 235 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7234 | | /* 239 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7235 | | /* 242 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7236 | | /* 246 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7237 | | /* 247 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7238 | | /* 250 */ { -1, 0, MCOI::OPERAND_PCREL, 0 }, |
7239 | | /* 251 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, |
7240 | | /* 254 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7241 | | /* 260 */ { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7242 | | /* 266 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7243 | | /* 272 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7244 | | /* 278 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7245 | | /* 284 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7246 | | /* 290 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7247 | | /* 291 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7248 | | /* 294 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
7249 | | /* 298 */ { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7250 | | /* 300 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7251 | | /* 302 */ { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7252 | | /* 304 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7253 | | /* 310 */ { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7254 | | /* 315 */ { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7255 | | /* 321 */ { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7256 | | /* 327 */ { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7257 | | /* 332 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7258 | | /* 333 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7259 | | /* 334 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7260 | | /* 335 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
7261 | | /* 339 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
7262 | | /* 345 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
7263 | | /* 351 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7264 | | /* 355 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7265 | | /* 359 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7266 | | /* 363 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7267 | | /* 367 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7268 | | /* 370 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7269 | | /* 373 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7270 | | /* 379 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7271 | | /* 385 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7272 | | /* 391 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7273 | | /* 397 */ { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7274 | | /* 403 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7275 | | /* 405 */ { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7276 | | /* 410 */ { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7277 | | /* 415 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7278 | | /* 420 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7279 | | /* 425 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7280 | | /* 430 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7281 | | /* 435 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7282 | | /* 440 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7283 | | /* 445 */ { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7284 | | /* 450 */ { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7285 | | /* 455 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7286 | | /* 458 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7287 | | /* 460 */ { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
7288 | | /* 464 */ { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
7289 | | /* 468 */ { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7290 | | /* 470 */ { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7291 | | /* 472 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7292 | | /* 475 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
7293 | | /* 480 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
7294 | | /* 485 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7295 | | /* 488 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7296 | | /* 491 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7297 | | /* 495 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
7298 | | /* 500 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7299 | | /* 503 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7300 | | /* 506 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
7301 | | /* 511 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7302 | | /* 514 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7303 | | /* 517 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7304 | | /* 520 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7305 | | /* 523 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7306 | | /* 526 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7307 | | /* 529 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7308 | | /* 532 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7309 | | /* 538 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7310 | | /* 541 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7311 | | /* 544 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7312 | | /* 548 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
7313 | | /* 551 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7314 | | /* 553 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7315 | | /* 555 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
7316 | | /* 560 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
7317 | | /* 564 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7318 | | /* 567 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7319 | | /* 569 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7320 | | /* 572 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7321 | | /* 576 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, |
7322 | | /* 579 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, |
7323 | | /* 582 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, |
7324 | | /* 584 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, |
7325 | | /* 587 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, |
7326 | | /* 590 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, |
7327 | | /* 593 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, |
7328 | | /* 597 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, |
7329 | | /* 601 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7330 | | /* 606 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7331 | | /* 611 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
7332 | | /* 615 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
7333 | | /* 619 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7334 | | /* 621 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7335 | | /* 623 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7336 | | /* 627 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7337 | | /* 629 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7338 | | /* 633 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7339 | | /* 638 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7340 | | /* 643 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
7341 | | /* 647 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7342 | | /* 649 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7343 | | /* 651 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7344 | | /* 655 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7345 | | /* 657 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7346 | | /* 661 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7347 | | /* 663 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7348 | | /* 665 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7349 | | /* 668 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7350 | | /* 672 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7351 | | /* 675 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7352 | | /* 679 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7353 | | /* 681 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7354 | | /* 684 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7355 | | /* 688 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7356 | | /* 691 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7357 | | /* 695 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7358 | | /* 698 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7359 | | /* 702 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7360 | | /* 704 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, |
7361 | | /* 706 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7362 | | /* 711 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7363 | | /* 715 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, |
7364 | | /* 719 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, |
7365 | | /* 722 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7366 | | /* 727 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7367 | | /* 731 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, |
7368 | | /* 735 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, |
7369 | | /* 738 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7370 | | /* 741 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7371 | | /* 745 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
7372 | | /* 749 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7373 | | /* 751 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7374 | | /* 753 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, |
7375 | | /* 755 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7376 | | /* 760 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7377 | | /* 764 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7378 | | /* 766 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, |
7379 | | /* 770 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, |
7380 | | /* 773 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, |
7381 | | /* 777 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7382 | | /* 782 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, |
7383 | | /* 786 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7384 | | /* 792 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7385 | | /* 796 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7386 | | /* 799 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7387 | | /* 803 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7388 | | /* 805 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7389 | | /* 810 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7390 | | /* 814 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, |
7391 | | /* 818 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, |
7392 | | /* 821 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, |
7393 | | /* 825 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7394 | | /* 829 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7395 | | /* 832 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7396 | | /* 835 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7397 | | /* 838 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7398 | | /* 841 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7399 | | /* 846 */ { SystemZ::AR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7400 | | /* 848 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7401 | | /* 852 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7402 | | /* 855 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7403 | | /* 858 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7404 | | /* 861 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7405 | | /* 866 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7406 | | /* 869 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7407 | | /* 874 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7408 | | /* 876 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7409 | | /* 878 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7410 | | /* 880 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7411 | | /* 884 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7412 | | /* 886 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7413 | | /* 890 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7414 | | /* 892 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
7415 | | /* 897 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7416 | | /* 902 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7417 | | /* 907 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7418 | | /* 912 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7419 | | /* 915 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7420 | | /* 917 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7421 | | /* 921 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7422 | | /* 923 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7423 | | /* 924 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, |
7424 | | /* 926 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7425 | | /* 928 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
7426 | | /* 932 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, |
7427 | | /* 934 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7428 | | /* 937 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7429 | | /* 941 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7430 | | /* 944 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7431 | | /* 948 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7432 | | /* 951 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7433 | | /* 955 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7434 | | /* 960 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7435 | | /* 965 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7436 | | /* 969 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7437 | | /* 973 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7438 | | /* 976 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7439 | | /* 979 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, |
7440 | | /* 983 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, |
7441 | | /* 986 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7442 | | /* 992 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7443 | | /* 995 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7444 | | /* 1000 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7445 | | /* 1006 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7446 | | /* 1011 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
7447 | | /* 1016 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
7448 | | /* 1022 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7449 | | /* 1025 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7450 | | /* 1029 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7451 | | /* 1036 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7452 | | /* 1041 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7453 | | /* 1047 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7454 | | /* 1053 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7455 | | /* 1060 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7456 | | /* 1066 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7457 | | /* 1072 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7458 | | /* 1078 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7459 | | /* 1083 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, |
7460 | | /* 1086 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(2) }, |
7461 | | /* 1092 */ { SystemZ::AR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7462 | | /* 1096 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7463 | | /* 1100 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7464 | | /* 1105 */ { SystemZ::CR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::CR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7465 | | /* 1109 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7466 | | /* 1111 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7467 | | /* 1114 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7468 | | /* 1116 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7469 | | /* 1118 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7470 | | /* 1122 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7471 | | /* 1124 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7472 | | /* 1130 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7473 | | /* 1134 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7474 | | /* 1140 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7475 | | /* 1145 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7476 | | /* 1149 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7477 | | /* 1155 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7478 | | /* 1160 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7479 | | /* 1164 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7480 | | /* 1169 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7481 | | /* 1173 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7482 | | /* 1176 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7483 | | /* 1182 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7484 | | /* 1187 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7485 | | /* 1191 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7486 | | /* 1196 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7487 | | /* 1200 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7488 | | /* 1205 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7489 | | /* 1209 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7490 | | /* 1214 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7491 | | /* 1218 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7492 | | /* 1223 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7493 | | /* 1227 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7494 | | /* 1232 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7495 | | /* 1236 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7496 | | /* 1241 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7497 | | /* 1246 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7498 | | /* 1248 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7499 | | /* 1251 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7500 | | /* 1253 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
7501 | | /* 1259 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7502 | | /* 1263 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
7503 | | /* 1269 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7504 | | /* 1273 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
7505 | | /* 1279 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7506 | | /* 1283 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7507 | | /* 1286 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7508 | | /* 1287 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7509 | | /* 1293 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
7510 | | /* 1298 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7511 | | /* 1301 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
7512 | | /* 1306 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7513 | | /* 1309 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, |
7514 | | /* 1312 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7515 | | /* 1317 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7516 | | /* 1323 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, |
7517 | | /* 1325 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7518 | | /* 1330 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7519 | | /* 1336 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7520 | | /* 1342 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7521 | | /* 1348 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7522 | | /* 1352 */ { SystemZ::AR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7523 | | /* 1354 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7524 | | /* 1359 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7525 | | /* 1363 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7526 | | /* 1367 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7527 | | /* 1371 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7528 | | /* 1375 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
7529 | | /* 1380 */ { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7530 | | /* 1382 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7531 | | /* 1388 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7532 | | /* 1391 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7533 | | /* 1396 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7534 | | /* 1401 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7535 | | /* 1405 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7536 | | /* 1408 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7537 | | /* 1413 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7538 | | /* 1416 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7539 | | /* 1419 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, |
7540 | | /* 1423 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7541 | | /* 1428 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7542 | | /* 1432 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, |
7543 | | /* 1435 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7544 | | /* 1439 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7545 | | /* 1442 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7546 | | /* 1447 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7547 | | /* 1451 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7548 | | /* 1456 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7549 | | /* 1460 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7550 | | /* 1463 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7551 | | /* 1466 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7552 | | /* 1469 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7553 | | /* 1473 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7554 | | /* 1477 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7555 | | /* 1481 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7556 | | /* 1485 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7557 | | /* 1491 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7558 | | /* 1496 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7559 | | /* 1501 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7560 | | /* 1505 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7561 | | /* 1511 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7562 | | /* 1517 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7563 | | /* 1519 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7564 | | /* 1525 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7565 | | /* 1529 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7566 | | /* 1532 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
7567 | | /* 1536 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7568 | | /* 1541 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7569 | | /* 1547 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7570 | | /* 1551 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7571 | | /* 1556 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7572 | | /* 1560 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7573 | | /* 1564 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7574 | | /* 1568 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7575 | | /* 1573 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7576 | | /* 1577 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7577 | | /* 1583 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7578 | | /* 1588 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, |
7579 | | /* 1593 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7580 | | /* 1596 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7581 | | /* 1597 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7582 | | /* 1602 */ { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7583 | | /* 1606 */ { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7584 | | /* 1610 */ { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7585 | | /* 1613 */ { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7586 | | /* 1616 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7587 | | /* 1618 */ { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7588 | | /* 1620 */ { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7589 | | /* 1624 */ { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7590 | | /* 1628 */ { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7591 | | /* 1632 */ { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
7592 | | /* 1636 */ { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7593 | | /* 1640 */ { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7594 | | /* 1644 */ { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7595 | | /* 1647 */ { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
7596 | | }, { |
7597 | | /* 0 */ |
7598 | | /* 0 */ SystemZ::CC, |
7599 | | /* 1 */ SystemZ::FPC, SystemZ::CC, |
7600 | | /* 3 */ SystemZ::FPC, SystemZ::R14D, SystemZ::CC, |
7601 | | /* 6 */ SystemZ::FPC, SystemZ::R3D, SystemZ::CC, |
7602 | | /* 9 */ SystemZ::FPC, SystemZ::R7D, SystemZ::CC, |
7603 | | /* 12 */ SystemZ::FPC, |
7604 | | /* 13 */ SystemZ::R15D, SystemZ::R15D, SystemZ::CC, |
7605 | | /* 16 */ SystemZ::R15D, SystemZ::R1D, SystemZ::R15D, SystemZ::CC, |
7606 | | /* 20 */ SystemZ::R14D, SystemZ::CC, |
7607 | | /* 22 */ SystemZ::R3D, SystemZ::R4D, SystemZ::R3D, SystemZ::CC, |
7608 | | /* 26 */ SystemZ::CC, SystemZ::CC, |
7609 | | /* 28 */ SystemZ::R1D, SystemZ::R2D, SystemZ::R3D, SystemZ::CC, SystemZ::R1D, SystemZ::R2D, SystemZ::R3D, |
7610 | | /* 35 */ SystemZ::R0L, SystemZ::CC, |
7611 | | /* 37 */ SystemZ::R0L, SystemZ::R1D, SystemZ::CC, SystemZ::R1D, |
7612 | | /* 41 */ SystemZ::R1L, SystemZ::CC, |
7613 | | /* 43 */ SystemZ::R0L, SystemZ::R1D, SystemZ::CC, |
7614 | | /* 46 */ SystemZ::R0L, SystemZ::R1L, SystemZ::CC, |
7615 | | /* 49 */ SystemZ::R0D, SystemZ::R1D, |
7616 | | /* 51 */ SystemZ::R2L, SystemZ::R2L, |
7617 | | /* 53 */ SystemZ::R0L, SystemZ::R1L, |
7618 | | /* 55 */ SystemZ::R0L, |
7619 | | /* 56 */ SystemZ::R0D, SystemZ::R1D, SystemZ::R0D, SystemZ::CC, |
7620 | | /* 60 */ SystemZ::R0L, SystemZ::R1D, |
7621 | | /* 62 */ SystemZ::FPC, SystemZ::R0L, SystemZ::F4Q, SystemZ::CC, SystemZ::R1L, SystemZ::F0Q, |
7622 | | /* 68 */ SystemZ::R0D, SystemZ::R0D, SystemZ::CC, |
7623 | | /* 71 */ SystemZ::R1L, |
7624 | | /* 72 */ SystemZ::R1L, SystemZ::R2D, |
7625 | | /* 74 */ SystemZ::R0D, SystemZ::R1D, SystemZ::R2D, SystemZ::R3D, SystemZ::CC, |
7626 | | /* 79 */ SystemZ::FPC, SystemZ::FPC, |
7627 | | /* 81 */ SystemZ::R0L, SystemZ::R1L, SystemZ::R0L, SystemZ::CC, |
7628 | | /* 85 */ SystemZ::CC, SystemZ::R0L, SystemZ::R1D, |
7629 | | /* 88 */ SystemZ::R1D, SystemZ::CC, |
7630 | | /* 90 */ SystemZ::R0D, SystemZ::R1D, SystemZ::R2D, SystemZ::R3D, SystemZ::R4D, SystemZ::R5D, SystemZ::CC, SystemZ::R0D, SystemZ::R1D, SystemZ::R2D, SystemZ::R3D, SystemZ::R5D, |
7631 | | } |
7632 | | }; |
7633 | | |
7634 | | |
7635 | | #ifdef __GNUC__ |
7636 | | #pragma GCC diagnostic push |
7637 | | #pragma GCC diagnostic ignored "-Woverlength-strings" |
7638 | | #endif |
7639 | | extern const char SystemZInstrNameData[] = { |
7640 | | /* 0 */ "G_FLOG10\0" |
7641 | | /* 9 */ "G_FEXP10\0" |
7642 | | /* 18 */ "CU21\0" |
7643 | | /* 23 */ "SAM31\0" |
7644 | | /* 29 */ "CU41\0" |
7645 | | /* 34 */ "CU12\0" |
7646 | | /* 39 */ "IC32\0" |
7647 | | /* 44 */ "LDE32\0" |
7648 | | /* 50 */ "CondStoreF32\0" |
7649 | | /* 63 */ "SelectF32\0" |
7650 | | /* 73 */ "RISBG32\0" |
7651 | | /* 81 */ "VL32\0" |
7652 | | /* 86 */ "VLVGP32\0" |
7653 | | /* 94 */ "LDR32\0" |
7654 | | /* 100 */ "VLR32\0" |
7655 | | /* 106 */ "SelectVR32\0" |
7656 | | /* 117 */ "VST32\0" |
7657 | | /* 123 */ "LCDFR_32\0" |
7658 | | /* 132 */ "LNDFR_32\0" |
7659 | | /* 141 */ "LPDFR_32\0" |
7660 | | /* 150 */ "CondStore32\0" |
7661 | | /* 162 */ "Select32\0" |
7662 | | /* 171 */ "CU42\0" |
7663 | | /* 176 */ "G_FLOG2\0" |
7664 | | /* 184 */ "TRAP2\0" |
7665 | | /* 190 */ "G_FEXP2\0" |
7666 | | /* 198 */ "CU14\0" |
7667 | | /* 203 */ "SAM24\0" |
7668 | | /* 209 */ "CU24\0" |
7669 | | /* 214 */ "IIHF64\0" |
7670 | | /* 221 */ "NIHF64\0" |
7671 | | /* 228 */ "OIHF64\0" |
7672 | | /* 235 */ "XIHF64\0" |
7673 | | /* 242 */ "IILF64\0" |
7674 | | /* 249 */ "NILF64\0" |
7675 | | /* 256 */ "OILF64\0" |
7676 | | /* 263 */ "XILF64\0" |
7677 | | /* 270 */ "CondStoreF64\0" |
7678 | | /* 283 */ "SelectF64\0" |
7679 | | /* 293 */ "IIHH64\0" |
7680 | | /* 300 */ "NIHH64\0" |
7681 | | /* 307 */ "OIHH64\0" |
7682 | | /* 314 */ "TMHH64\0" |
7683 | | /* 321 */ "IILH64\0" |
7684 | | /* 328 */ "NILH64\0" |
7685 | | /* 335 */ "OILH64\0" |
7686 | | /* 342 */ "TMLH64\0" |
7687 | | /* 349 */ "CallBRASL_XPLINK64\0" |
7688 | | /* 368 */ "CallBASR_XPLINK64\0" |
7689 | | /* 386 */ "IIHL64\0" |
7690 | | /* 393 */ "NIHL64\0" |
7691 | | /* 400 */ "OIHL64\0" |
7692 | | /* 407 */ "TMHL64\0" |
7693 | | /* 414 */ "IILL64\0" |
7694 | | /* 421 */ "NILL64\0" |
7695 | | /* 428 */ "OILL64\0" |
7696 | | /* 435 */ "TMLL64\0" |
7697 | | /* 442 */ "VL64\0" |
7698 | | /* 447 */ "SAM64\0" |
7699 | | /* 453 */ "VLR64\0" |
7700 | | /* 459 */ "SelectVR64\0" |
7701 | | /* 470 */ "VST64\0" |
7702 | | /* 476 */ "CondStore64\0" |
7703 | | /* 488 */ "Select64\0" |
7704 | | /* 497 */ "TRAP4\0" |
7705 | | /* 503 */ "CondStore16\0" |
7706 | | /* 515 */ "SelectF128\0" |
7707 | | /* 526 */ "L128\0" |
7708 | | /* 531 */ "PAIR128\0" |
7709 | | /* 539 */ "SelectVR128\0" |
7710 | | /* 551 */ "ST128\0" |
7711 | | /* 557 */ "AEXT128\0" |
7712 | | /* 565 */ "ZEXT128\0" |
7713 | | /* 573 */ "Select128\0" |
7714 | | /* 583 */ "CondStore8\0" |
7715 | | /* 594 */ "LAA\0" |
7716 | | /* 598 */ "PROBED_ALLOCA\0" |
7717 | | /* 612 */ "SLDA\0" |
7718 | | /* 617 */ "SRDA\0" |
7719 | | /* 622 */ "ESEA\0" |
7720 | | /* 627 */ "LPTEA\0" |
7721 | | /* 633 */ "VFA\0" |
7722 | | /* 637 */ "SIGA\0" |
7723 | | /* 642 */ "ECPGA\0" |
7724 | | /* 648 */ "UNPKA\0" |
7725 | | /* 654 */ "SPKA\0" |
7726 | | /* 659 */ "SLA\0" |
7727 | | /* 663 */ "VGFMA\0" |
7728 | | /* 669 */ "VFMA\0" |
7729 | | /* 674 */ "G_FMA\0" |
7730 | | /* 680 */ "G_STRICT_FMA\0" |
7731 | | /* 693 */ "KMA\0" |
7732 | | /* 697 */ "VFNMA\0" |
7733 | | /* 703 */ "NNPA\0" |
7734 | | /* 708 */ "PPA\0" |
7735 | | /* 712 */ "LEDBRA\0" |
7736 | | /* 719 */ "CFDBRA\0" |
7737 | | /* 726 */ "CGDBRA\0" |
7738 | | /* 733 */ "FIDBRA\0" |
7739 | | /* 740 */ "CFEBRA\0" |
7740 | | /* 747 */ "CGEBRA\0" |
7741 | | /* 754 */ "FIEBRA\0" |
7742 | | /* 761 */ "CDFBRA\0" |
7743 | | /* 768 */ "CEFBRA\0" |
7744 | | /* 775 */ "CXFBRA\0" |
7745 | | /* 782 */ "CDGBRA\0" |
7746 | | /* 789 */ "CEGBRA\0" |
7747 | | /* 796 */ "CXGBRA\0" |
7748 | | /* 803 */ "LDXBRA\0" |
7749 | | /* 810 */ "LEXBRA\0" |
7750 | | /* 817 */ "CFXBRA\0" |
7751 | | /* 824 */ "CGXBRA\0" |
7752 | | /* 831 */ "FIXBRA\0" |
7753 | | /* 838 */ "LRA\0" |
7754 | | /* 842 */ "VESRA\0" |
7755 | | /* 848 */ "VSRA\0" |
7756 | | /* 853 */ "ADTRA\0" |
7757 | | /* 859 */ "DDTRA\0" |
7758 | | /* 865 */ "CGDTRA\0" |
7759 | | /* 872 */ "MDTRA\0" |
7760 | | /* 878 */ "SDTRA\0" |
7761 | | /* 884 */ "CDGTRA\0" |
7762 | | /* 891 */ "CXGTRA\0" |
7763 | | /* 898 */ "AXTRA\0" |
7764 | | /* 904 */ "DXTRA\0" |
7765 | | /* 910 */ "CGXTRA\0" |
7766 | | /* 917 */ "MXTRA\0" |
7767 | | /* 923 */ "SXTRA\0" |
7768 | | /* 929 */ "LURA\0" |
7769 | | /* 934 */ "STURA\0" |
7770 | | /* 940 */ "BSA\0" |
7771 | | /* 944 */ "KDSA\0" |
7772 | | /* 949 */ "ESTA\0" |
7773 | | /* 954 */ "MSTA\0" |
7774 | | /* 959 */ "VA\0" |
7775 | | /* 962 */ "CPYA\0" |
7776 | | /* 967 */ "VGFMAB\0" |
7777 | | /* 974 */ "VESRAB\0" |
7778 | | /* 981 */ "VSRAB\0" |
7779 | | /* 987 */ "VAB\0" |
7780 | | /* 991 */ "LCBB\0" |
7781 | | /* 996 */ "VLBB\0" |
7782 | | /* 1001 */ "VACCB\0" |
7783 | | /* 1007 */ "VECB\0" |
7784 | | /* 1012 */ "VLCB\0" |
7785 | | /* 1017 */ "VSTRCB\0" |
7786 | | /* 1024 */ "VFADB\0" |
7787 | | /* 1030 */ "WFADB\0" |
7788 | | /* 1036 */ "VFMADB\0" |
7789 | | /* 1043 */ "WFMADB\0" |
7790 | | /* 1050 */ "VFNMADB\0" |
7791 | | /* 1058 */ "WFNMADB\0" |
7792 | | /* 1066 */ "WFCDB\0" |
7793 | | /* 1072 */ "VFLCDB\0" |
7794 | | /* 1079 */ "WFLCDB\0" |
7795 | | /* 1086 */ "TCDB\0" |
7796 | | /* 1091 */ "VFDDB\0" |
7797 | | /* 1097 */ "WFDDB\0" |
7798 | | /* 1103 */ "VFCEDB\0" |
7799 | | /* 1110 */ "WFCEDB\0" |
7800 | | /* 1117 */ "VFCHEDB\0" |
7801 | | /* 1125 */ "WFCHEDB\0" |
7802 | | /* 1133 */ "VFKHEDB\0" |
7803 | | /* 1141 */ "WFKHEDB\0" |
7804 | | /* 1149 */ "VFKEDB\0" |
7805 | | /* 1156 */ "WFKEDB\0" |
7806 | | /* 1163 */ "VLEDB\0" |
7807 | | /* 1169 */ "WLEDB\0" |
7808 | | /* 1175 */ "VCGDB\0" |
7809 | | /* 1181 */ "WCGDB\0" |
7810 | | /* 1187 */ "VCLGDB\0" |
7811 | | /* 1194 */ "WCLGDB\0" |
7812 | | /* 1201 */ "VFCHDB\0" |
7813 | | /* 1208 */ "WFCHDB\0" |
7814 | | /* 1215 */ "VFKHDB\0" |
7815 | | /* 1222 */ "WFKHDB\0" |
7816 | | /* 1229 */ "VFTCIDB\0" |
7817 | | /* 1237 */ "WFTCIDB\0" |
7818 | | /* 1245 */ "VFIDB\0" |
7819 | | /* 1251 */ "WFIDB\0" |
7820 | | /* 1257 */ "WFKDB\0" |
7821 | | /* 1263 */ "VSLDB\0" |
7822 | | /* 1269 */ "VFMDB\0" |
7823 | | /* 1275 */ "WFMDB\0" |
7824 | | /* 1281 */ "VFMINDB\0" |
7825 | | /* 1289 */ "WFMINDB\0" |
7826 | | /* 1297 */ "VFLNDB\0" |
7827 | | /* 1304 */ "WFLNDB\0" |
7828 | | /* 1311 */ "VFPSODB\0" |
7829 | | /* 1319 */ "WFPSODB\0" |
7830 | | /* 1327 */ "VFLPDB\0" |
7831 | | /* 1334 */ "WFLPDB\0" |
7832 | | /* 1341 */ "VFSQDB\0" |
7833 | | /* 1348 */ "WFSQDB\0" |
7834 | | /* 1355 */ "VFSDB\0" |
7835 | | /* 1361 */ "WFSDB\0" |
7836 | | /* 1367 */ "VFMSDB\0" |
7837 | | /* 1374 */ "WFMSDB\0" |
7838 | | /* 1381 */ "VFNMSDB\0" |
7839 | | /* 1389 */ "WFNMSDB\0" |
7840 | | /* 1397 */ "VFMAXDB\0" |
7841 | | /* 1405 */ "WFMAXDB\0" |
7842 | | /* 1413 */ "LXDB\0" |
7843 | | /* 1418 */ "MXDB\0" |
7844 | | /* 1423 */ "VFAEB\0" |
7845 | | /* 1429 */ "VMAEB\0" |
7846 | | /* 1435 */ "TCEB\0" |
7847 | | /* 1440 */ "VLDEB\0" |
7848 | | /* 1446 */ "WLDEB\0" |
7849 | | /* 1452 */ "MDEB\0" |
7850 | | /* 1457 */ "VFEEB\0" |
7851 | | /* 1463 */ "MEEB\0" |
7852 | | /* 1468 */ "VCFEB\0" |
7853 | | /* 1474 */ "WCFEB\0" |
7854 | | /* 1480 */ "VCLFEB\0" |
7855 | | /* 1487 */ "WCLFEB\0" |
7856 | | /* 1494 */ "KEB\0" |
7857 | | /* 1498 */ "VMALEB\0" |
7858 | | /* 1505 */ "VMLEB\0" |
7859 | | /* 1511 */ "VLEB\0" |
7860 | | /* 1516 */ "VMEB\0" |
7861 | | /* 1521 */ "VFENEB\0" |
7862 | | /* 1528 */ "SQEB\0" |
7863 | | /* 1533 */ "MSEB\0" |
7864 | | /* 1538 */ "VSTEB\0" |
7865 | | /* 1544 */ "LXEB\0" |
7866 | | /* 1549 */ "VCEFB\0" |
7867 | | /* 1555 */ "WCEFB\0" |
7868 | | /* 1561 */ "VCELFB\0" |
7869 | | /* 1568 */ "WCELFB\0" |
7870 | | /* 1575 */ "VCDGB\0" |
7871 | | /* 1581 */ "WCDGB\0" |
7872 | | /* 1587 */ "VSEGB\0" |
7873 | | /* 1593 */ "VCDLGB\0" |
7874 | | /* 1600 */ "WCDLGB\0" |
7875 | | /* 1607 */ "VAVGB\0" |
7876 | | /* 1613 */ "VLVGB\0" |
7877 | | /* 1619 */ "VMAHB\0" |
7878 | | /* 1625 */ "VCHB\0" |
7879 | | /* 1630 */ "VMALHB\0" |
7880 | | /* 1637 */ "VMLHB\0" |
7881 | | /* 1643 */ "VUPLHB\0" |
7882 | | /* 1650 */ "VMHB\0" |
7883 | | /* 1655 */ "VUPHB\0" |
7884 | | /* 1661 */ "VMRHB\0" |
7885 | | /* 1667 */ "VSCBIB\0" |
7886 | | /* 1674 */ "CIB\0" |
7887 | | /* 1678 */ "VLEIB\0" |
7888 | | /* 1684 */ "CGIB\0" |
7889 | | /* 1689 */ "CLGIB\0" |
7890 | | /* 1695 */ "CLIB\0" |
7891 | | /* 1700 */ "VREPIB\0" |
7892 | | /* 1707 */ "VMALB\0" |
7893 | | /* 1713 */ "PALB\0" |
7894 | | /* 1718 */ "VECLB\0" |
7895 | | /* 1724 */ "VAVGLB\0" |
7896 | | /* 1731 */ "VCHLB\0" |
7897 | | /* 1737 */ "VUPLLB\0" |
7898 | | /* 1744 */ "VERLLB\0" |
7899 | | /* 1751 */ "VMLB\0" |
7900 | | /* 1756 */ "VMNLB\0" |
7901 | | /* 1762 */ "VUPLB\0" |
7902 | | /* 1768 */ "VMRLB\0" |
7903 | | /* 1774 */ "VESRLB\0" |
7904 | | /* 1781 */ "VSRLB\0" |
7905 | | /* 1787 */ "VESLB\0" |
7906 | | /* 1793 */ "VSLB\0" |
7907 | | /* 1798 */ "PTLB\0" |
7908 | | /* 1803 */ "VMXLB\0" |
7909 | | /* 1809 */ "VGFMB\0" |
7910 | | /* 1815 */ "VGMB\0" |
7911 | | /* 1820 */ "VERIMB\0" |
7912 | | /* 1827 */ "SRNMB\0" |
7913 | | /* 1833 */ "VSUMB\0" |
7914 | | /* 1839 */ "VMNB\0" |
7915 | | /* 1844 */ "VMAOB\0" |
7916 | | /* 1850 */ "VMALOB\0" |
7917 | | /* 1857 */ "VMLOB\0" |
7918 | | /* 1863 */ "VMOB\0" |
7919 | | /* 1868 */ "VLREPB\0" |
7920 | | /* 1875 */ "VREPB\0" |
7921 | | /* 1881 */ "VLPB\0" |
7922 | | /* 1886 */ "VCEQB\0" |
7923 | | /* 1892 */ "CRB\0" |
7924 | | /* 1896 */ "CGRB\0" |
7925 | | /* 1901 */ "CLGRB\0" |
7926 | | /* 1907 */ "CLRB\0" |
7927 | | /* 1912 */ "VISTRB\0" |
7928 | | /* 1919 */ "VFASB\0" |
7929 | | /* 1925 */ "WFASB\0" |
7930 | | /* 1931 */ "VFMASB\0" |
7931 | | /* 1938 */ "WFMASB\0" |
7932 | | /* 1945 */ "VFNMASB\0" |
7933 | | /* 1953 */ "WFNMASB\0" |
7934 | | /* 1961 */ "WFCSB\0" |
7935 | | /* 1967 */ "VFLCSB\0" |
7936 | | /* 1974 */ "WFLCSB\0" |
7937 | | /* 1981 */ "VFDSB\0" |
7938 | | /* 1987 */ "WFDSB\0" |
7939 | | /* 1993 */ "VFCESB\0" |
7940 | | /* 2000 */ "WFCESB\0" |
7941 | | /* 2007 */ "VFCHESB\0" |
7942 | | /* 2015 */ "WFCHESB\0" |
7943 | | /* 2023 */ "VFKHESB\0" |
7944 | | /* 2031 */ "WFKHESB\0" |
7945 | | /* 2039 */ "VFKESB\0" |
7946 | | /* 2046 */ "WFKESB\0" |
7947 | | /* 2053 */ "VFCHSB\0" |
7948 | | /* 2060 */ "WFCHSB\0" |
7949 | | /* 2067 */ "VFKHSB\0" |
7950 | | /* 2074 */ "WFKHSB\0" |
7951 | | /* 2081 */ "VFTCISB\0" |
7952 | | /* 2089 */ "WFTCISB\0" |
7953 | | /* 2097 */ "VFISB\0" |
7954 | | /* 2103 */ "WFISB\0" |
7955 | | /* 2109 */ "WFKSB\0" |
7956 | | /* 2115 */ "VFMSB\0" |
7957 | | /* 2121 */ "WFMSB\0" |
7958 | | /* 2127 */ "VFMINSB\0" |
7959 | | /* 2135 */ "WFMINSB\0" |
7960 | | /* 2143 */ "VFLNSB\0" |
7961 | | /* 2150 */ "WFLNSB\0" |
7962 | | /* 2157 */ "VFPSOSB\0" |
7963 | | /* 2165 */ "WFPSOSB\0" |
7964 | | /* 2173 */ "VFLPSB\0" |
7965 | | /* 2180 */ "WFLPSB\0" |
7966 | | /* 2187 */ "VFSQSB\0" |
7967 | | /* 2194 */ "WFSQSB\0" |
7968 | | /* 2201 */ "VSTRSB\0" |
7969 | | /* 2208 */ "VFSSB\0" |
7970 | | /* 2214 */ "WFSSB\0" |
7971 | | /* 2220 */ "VFMSSB\0" |
7972 | | /* 2227 */ "WFMSSB\0" |
7973 | | /* 2234 */ "VFNMSSB\0" |
7974 | | /* 2242 */ "WFNMSSB\0" |
7975 | | /* 2250 */ "VSB\0" |
7976 | | /* 2254 */ "VFMAXSB\0" |
7977 | | /* 2262 */ "WFMAXSB\0" |
7978 | | /* 2270 */ "VPOPCTB\0" |
7979 | | /* 2278 */ "G_FSUB\0" |
7980 | | /* 2285 */ "G_STRICT_FSUB\0" |
7981 | | /* 2299 */ "G_ATOMICRMW_FSUB\0" |
7982 | | /* 2316 */ "G_SUB\0" |
7983 | | /* 2322 */ "G_ATOMICRMW_SUB\0" |
7984 | | /* 2338 */ "VESRAVB\0" |
7985 | | /* 2346 */ "VCVB\0" |
7986 | | /* 2351 */ "VLGVB\0" |
7987 | | /* 2357 */ "VERLLVB\0" |
7988 | | /* 2365 */ "VESRLVB\0" |
7989 | | /* 2373 */ "VESLVB\0" |
7990 | | /* 2380 */ "WFAXB\0" |
7991 | | /* 2386 */ "WFMAXB\0" |
7992 | | /* 2393 */ "WFNMAXB\0" |
7993 | | /* 2401 */ "WFCXB\0" |
7994 | | /* 2407 */ "WFLCXB\0" |
7995 | | /* 2414 */ "TCXB\0" |
7996 | | /* 2419 */ "WFDXB\0" |
7997 | | /* 2425 */ "WFCEXB\0" |
7998 | | /* 2432 */ "WFCHEXB\0" |
7999 | | /* 2440 */ "WFKHEXB\0" |
8000 | | /* 2448 */ "WFKEXB\0" |
8001 | | /* 2455 */ "WFCHXB\0" |
8002 | | /* 2462 */ "WFKHXB\0" |
8003 | | /* 2469 */ "WFTCIXB\0" |
8004 | | /* 2477 */ "WFIXB\0" |
8005 | | /* 2483 */ "WFKXB\0" |
8006 | | /* 2489 */ "WFMXB\0" |
8007 | | /* 2495 */ "VMXB\0" |
8008 | | /* 2500 */ "WFMINXB\0" |
8009 | | /* 2508 */ "WFLNXB\0" |
8010 | | /* 2515 */ "WFPSOXB\0" |
8011 | | /* 2523 */ "WFLPXB\0" |
8012 | | /* 2530 */ "WFSQXB\0" |
8013 | | /* 2537 */ "WFSXB\0" |
8014 | | /* 2543 */ "WFMSXB\0" |
8015 | | /* 2550 */ "WFNMSXB\0" |
8016 | | /* 2558 */ "WFMAXXB\0" |
8017 | | /* 2566 */ "VSTRCZB\0" |
8018 | | /* 2574 */ "VFAEZB\0" |
8019 | | /* 2581 */ "VFEEZB\0" |
8020 | | /* 2588 */ "VLLEZB\0" |
8021 | | /* 2595 */ "VFENEZB\0" |
8022 | | /* 2603 */ "VCLZB\0" |
8023 | | /* 2609 */ "VSTRSZB\0" |
8024 | | /* 2617 */ "VCTZB\0" |
8025 | | /* 2623 */ "IAC\0" |
8026 | | /* 2627 */ "KMAC\0" |
8027 | | /* 2632 */ "SAC\0" |
8028 | | /* 2636 */ "VAC\0" |
8029 | | /* 2640 */ "BC\0" |
8030 | | /* 2643 */ "VACC\0" |
8031 | | /* 2648 */ "VACCC\0" |
8032 | | /* 2654 */ "PCC\0" |
8033 | | /* 2658 */ "DFLTCC\0" |
8034 | | /* 2665 */ "VEC\0" |
8035 | | /* 2669 */ "CFC\0" |
8036 | | /* 2673 */ "WFC\0" |
8037 | | /* 2677 */ "LLGC\0" |
8038 | | /* 2682 */ "MSGC\0" |
8039 | | /* 2687 */ "BIC\0" |
8040 | | /* 2691 */ "G_INTRINSIC\0" |
8041 | | /* 2703 */ "SCKC\0" |
8042 | | /* 2708 */ "STCKC\0" |
8043 | | /* 2714 */ "MSGRKC\0" |
8044 | | /* 2721 */ "MSRKC\0" |
8045 | | /* 2727 */ "ALC\0" |
8046 | | /* 2731 */ "CLC\0" |
8047 | | /* 2735 */ "LLC\0" |
8048 | | /* 2739 */ "VLC\0" |
8049 | | /* 2743 */ "KMC\0" |
8050 | | /* 2747 */ "TBEGINC\0" |
8051 | | /* 2755 */ "G_FPTRUNC\0" |
8052 | | /* 2765 */ "G_INTRINSIC_TRUNC\0" |
8053 | | /* 2783 */ "G_TRUNC\0" |
8054 | | /* 2791 */ "G_BUILD_VECTOR_TRUNC\0" |
8055 | | /* 2812 */ "VNC\0" |
8056 | | /* 2816 */ "PROBED_STACKALLOC\0" |
8057 | | /* 2834 */ "XPLINK_STACKALLOC\0" |
8058 | | /* 2852 */ "G_DYN_STACKALLOC\0" |
8059 | | /* 2869 */ "ADJDYNALLOC\0" |
8060 | | /* 2881 */ "STOC\0" |
8061 | | /* 2886 */ "VOC\0" |
8062 | | /* 2890 */ "EFPC\0" |
8063 | | /* 2895 */ "LFPC\0" |
8064 | | /* 2900 */ "SFPC\0" |
8065 | | /* 2905 */ "STFPC\0" |
8066 | | /* 2911 */ "BRC\0" |
8067 | | /* 2915 */ "VSTRC\0" |
8068 | | /* 2921 */ "LGSC\0" |
8069 | | /* 2926 */ "STGSC\0" |
8070 | | /* 2932 */ "MSC\0" |
8071 | | /* 2936 */ "CMPSC\0" |
8072 | | /* 2942 */ "STC\0" |
8073 | | /* 2946 */ "MVC\0" |
8074 | | /* 2950 */ "SVC\0" |
8075 | | /* 2954 */ "XC\0" |
8076 | | /* 2957 */ "G_FMAD\0" |
8077 | | /* 2964 */ "G_INDEXED_SEXTLOAD\0" |
8078 | | /* 2983 */ "G_SEXTLOAD\0" |
8079 | | /* 2994 */ "G_INDEXED_ZEXTLOAD\0" |
8080 | | /* 3013 */ "G_ZEXTLOAD\0" |
8081 | | /* 3024 */ "G_INDEXED_LOAD\0" |
8082 | | /* 3039 */ "G_LOAD\0" |
8083 | | /* 3046 */ "CD\0" |
8084 | | /* 3049 */ "G_VECREDUCE_FADD\0" |
8085 | | /* 3066 */ "G_FADD\0" |
8086 | | /* 3073 */ "G_VECREDUCE_SEQ_FADD\0" |
8087 | | /* 3094 */ "G_STRICT_FADD\0" |
8088 | | /* 3108 */ "G_ATOMICRMW_FADD\0" |
8089 | | /* 3125 */ "G_VECREDUCE_ADD\0" |
8090 | | /* 3141 */ "G_ADD\0" |
8091 | | /* 3147 */ "G_PTR_ADD\0" |
8092 | | /* 3157 */ "G_ATOMICRMW_ADD\0" |
8093 | | /* 3173 */ "VLED\0" |
8094 | | /* 3178 */ "PFD\0" |
8095 | | /* 3182 */ "VFD\0" |
8096 | | /* 3186 */ "VCGD\0" |
8097 | | /* 3191 */ "VCLGD\0" |
8098 | | /* 3197 */ "WFLLD\0" |
8099 | | /* 3203 */ "VSLD\0" |
8100 | | /* 3208 */ "KIMD\0" |
8101 | | /* 3213 */ "KLMD\0" |
8102 | | /* 3218 */ "G_ATOMICRMW_NAND\0" |
8103 | | /* 3235 */ "G_VECREDUCE_AND\0" |
8104 | | /* 3251 */ "G_AND\0" |
8105 | | /* 3257 */ "G_ATOMICRMW_AND\0" |
8106 | | /* 3273 */ "TEND\0" |
8107 | | /* 3278 */ "LIFETIME_END\0" |
8108 | | /* 3291 */ "G_BRCOND\0" |
8109 | | /* 3300 */ "ETND\0" |
8110 | | /* 3305 */ "G_LLROUND\0" |
8111 | | /* 3315 */ "G_LROUND\0" |
8112 | | /* 3324 */ "G_INTRINSIC_ROUND\0" |
8113 | | /* 3342 */ "G_INTRINSIC_FPTRUNC_ROUND\0" |
8114 | | /* 3368 */ "LPD\0" |
8115 | | /* 3372 */ "SQD\0" |
8116 | | /* 3376 */ "LOAD_STACK_GUARD\0" |
8117 | | /* 3393 */ "VFLRD\0" |
8118 | | /* 3399 */ "WFLRD\0" |
8119 | | /* 3405 */ "VSRD\0" |
8120 | | /* 3410 */ "MSD\0" |
8121 | | /* 3414 */ "STD\0" |
8122 | | /* 3418 */ "VCVD\0" |
8123 | | /* 3423 */ "LXD\0" |
8124 | | /* 3427 */ "MXD\0" |
8125 | | /* 3431 */ "VFAE\0" |
8126 | | /* 3436 */ "LAE\0" |
8127 | | /* 3440 */ "VMAE\0" |
8128 | | /* 3445 */ "PSEUDO_PROBE\0" |
8129 | | /* 3458 */ "RRBE\0" |
8130 | | /* 3463 */ "G_SSUBE\0" |
8131 | | /* 3471 */ "G_USUBE\0" |
8132 | | /* 3479 */ "TRACE\0" |
8133 | | /* 3485 */ "VFCE\0" |
8134 | | /* 3490 */ "G_FENCE\0" |
8135 | | /* 3498 */ "ARITH_FENCE\0" |
8136 | | /* 3510 */ "REG_SEQUENCE\0" |
8137 | | /* 3523 */ "G_SADDE\0" |
8138 | | /* 3531 */ "G_UADDE\0" |
8139 | | /* 3539 */ "VLDE\0" |
8140 | | /* 3544 */ "MDE\0" |
8141 | | /* 3548 */ "G_GET_FPMODE\0" |
8142 | | /* 3561 */ "G_RESET_FPMODE\0" |
8143 | | /* 3576 */ "G_SET_FPMODE\0" |
8144 | | /* 3589 */ "G_FMINNUM_IEEE\0" |
8145 | | /* 3604 */ "G_FMAXNUM_IEEE\0" |
8146 | | /* 3619 */ "VFEE\0" |
8147 | | /* 3624 */ "MEE\0" |
8148 | | /* 3628 */ "VFCHE\0" |
8149 | | /* 3634 */ "CIBAsmNHE\0" |
8150 | | /* 3644 */ "CGIBAsmNHE\0" |
8151 | | /* 3655 */ "CLGIBAsmNHE\0" |
8152 | | /* 3667 */ "CLIBAsmNHE\0" |
8153 | | /* 3678 */ "CRBAsmNHE\0" |
8154 | | /* 3688 */ "CGRBAsmNHE\0" |
8155 | | /* 3699 */ "CLGRBAsmNHE\0" |
8156 | | /* 3711 */ "CLRBAsmNHE\0" |
8157 | | /* 3722 */ "LOCAsmNHE\0" |
8158 | | /* 3732 */ "STOCAsmNHE\0" |
8159 | | /* 3743 */ "LOCGAsmNHE\0" |
8160 | | /* 3754 */ "STOCGAsmNHE\0" |
8161 | | /* 3766 */ "JGAsmNHE\0" |
8162 | | /* 3775 */ "LOCFHAsmNHE\0" |
8163 | | /* 3787 */ "STOCFHAsmNHE\0" |
8164 | | /* 3800 */ "BIAsmNHE\0" |
8165 | | /* 3809 */ "LOCHIAsmNHE\0" |
8166 | | /* 3821 */ "LOCGHIAsmNHE\0" |
8167 | | /* 3834 */ "LOCHHIAsmNHE\0" |
8168 | | /* 3847 */ "CIJAsmNHE\0" |
8169 | | /* 3857 */ "CGIJAsmNHE\0" |
8170 | | /* 3868 */ "CLGIJAsmNHE\0" |
8171 | | /* 3880 */ "CLIJAsmNHE\0" |
8172 | | /* 3891 */ "CRJAsmNHE\0" |
8173 | | /* 3901 */ "CGRJAsmNHE\0" |
8174 | | /* 3912 */ "CLGRJAsmNHE\0" |
8175 | | /* 3924 */ "CLRJAsmNHE\0" |
8176 | | /* 3935 */ "BRAsmNHE\0" |
8177 | | /* 3944 */ "LOCRAsmNHE\0" |
8178 | | /* 3955 */ "LOCGRAsmNHE\0" |
8179 | | /* 3967 */ "SELGRAsmNHE\0" |
8180 | | /* 3979 */ "LOCFHRAsmNHE\0" |
8181 | | /* 3992 */ "SELFHRAsmNHE\0" |
8182 | | /* 4005 */ "SELRAsmNHE\0" |
8183 | | /* 4016 */ "CLGTAsmNHE\0" |
8184 | | /* 4027 */ "CITAsmNHE\0" |
8185 | | /* 4037 */ "CLFITAsmNHE\0" |
8186 | | /* 4049 */ "CGITAsmNHE\0" |
8187 | | /* 4060 */ "CLGITAsmNHE\0" |
8188 | | /* 4072 */ "CLTAsmNHE\0" |
8189 | | /* 4082 */ "CRTAsmNHE\0" |
8190 | | /* 4092 */ "CGRTAsmNHE\0" |
8191 | | /* 4103 */ "CLGRTAsmNHE\0" |
8192 | | /* 4115 */ "CLRTAsmNHE\0" |
8193 | | /* 4126 */ "CIBAsmHE\0" |
8194 | | /* 4135 */ "CGIBAsmHE\0" |
8195 | | /* 4145 */ "CLGIBAsmHE\0" |
8196 | | /* 4156 */ "CLIBAsmHE\0" |
8197 | | /* 4166 */ "CRBAsmHE\0" |
8198 | | /* 4175 */ "CGRBAsmHE\0" |
8199 | | /* 4185 */ "CLGRBAsmHE\0" |
8200 | | /* 4196 */ "CLRBAsmHE\0" |
8201 | | /* 4206 */ "LOCAsmHE\0" |
8202 | | /* 4215 */ "STOCAsmHE\0" |
8203 | | /* 4225 */ "LOCGAsmHE\0" |
8204 | | /* 4235 */ "STOCGAsmHE\0" |
8205 | | /* 4246 */ "JGAsmHE\0" |
8206 | | /* 4254 */ "LOCFHAsmHE\0" |
8207 | | /* 4265 */ "STOCFHAsmHE\0" |
8208 | | /* 4277 */ "BIAsmHE\0" |
8209 | | /* 4285 */ "LOCHIAsmHE\0" |
8210 | | /* 4296 */ "LOCGHIAsmHE\0" |
8211 | | /* 4308 */ "LOCHHIAsmHE\0" |
8212 | | /* 4320 */ "CIJAsmHE\0" |
8213 | | /* 4329 */ "CGIJAsmHE\0" |
8214 | | /* 4339 */ "CLGIJAsmHE\0" |
8215 | | /* 4350 */ "CLIJAsmHE\0" |
8216 | | /* 4360 */ "CRJAsmHE\0" |
8217 | | /* 4369 */ "CGRJAsmHE\0" |
8218 | | /* 4379 */ "CLGRJAsmHE\0" |
8219 | | /* 4390 */ "CLRJAsmHE\0" |
8220 | | /* 4400 */ "BRAsmHE\0" |
8221 | | /* 4408 */ "LOCRAsmHE\0" |
8222 | | /* 4418 */ "LOCGRAsmHE\0" |
8223 | | /* 4429 */ "SELGRAsmHE\0" |
8224 | | /* 4440 */ "LOCFHRAsmHE\0" |
8225 | | /* 4452 */ "SELFHRAsmHE\0" |
8226 | | /* 4464 */ "SELRAsmHE\0" |
8227 | | /* 4474 */ "CLGTAsmHE\0" |
8228 | | /* 4484 */ "CITAsmHE\0" |
8229 | | /* 4493 */ "CLFITAsmHE\0" |
8230 | | /* 4504 */ "CGITAsmHE\0" |
8231 | | /* 4514 */ "CLGITAsmHE\0" |
8232 | | /* 4525 */ "CLTAsmHE\0" |
8233 | | /* 4534 */ "CRTAsmHE\0" |
8234 | | /* 4543 */ "CGRTAsmHE\0" |
8235 | | /* 4553 */ "CLGRTAsmHE\0" |
8236 | | /* 4564 */ "CLRTAsmHE\0" |
8237 | | /* 4574 */ "InsnRIE\0" |
8238 | | /* 4582 */ "SIE\0" |
8239 | | /* 4586 */ "STCKE\0" |
8240 | | /* 4592 */ "ISKE\0" |
8241 | | /* 4597 */ "SSKE\0" |
8242 | | /* 4602 */ "VMALE\0" |
8243 | | /* 4608 */ "G_JUMP_TABLE\0" |
8244 | | /* 4621 */ "CLCLE\0" |
8245 | | /* 4627 */ "MVCLE\0" |
8246 | | /* 4633 */ "BUNDLE\0" |
8247 | | /* 4640 */ "STFLE\0" |
8248 | | /* 4646 */ "VMLE\0" |
8249 | | /* 4651 */ "CIBAsmNLE\0" |
8250 | | /* 4661 */ "CGIBAsmNLE\0" |
8251 | | /* 4672 */ "CLGIBAsmNLE\0" |
8252 | | /* 4684 */ "CLIBAsmNLE\0" |
8253 | | /* 4695 */ "CRBAsmNLE\0" |
8254 | | /* 4705 */ "CGRBAsmNLE\0" |
8255 | | /* 4716 */ "CLGRBAsmNLE\0" |
8256 | | /* 4728 */ "CLRBAsmNLE\0" |
8257 | | /* 4739 */ "LOCAsmNLE\0" |
8258 | | /* 4749 */ "STOCAsmNLE\0" |
8259 | | /* 4760 */ "LOCGAsmNLE\0" |
8260 | | /* 4771 */ "STOCGAsmNLE\0" |
8261 | | /* 4783 */ "JGAsmNLE\0" |
8262 | | /* 4792 */ "LOCFHAsmNLE\0" |
8263 | | /* 4804 */ "STOCFHAsmNLE\0" |
8264 | | /* 4817 */ "BIAsmNLE\0" |
8265 | | /* 4826 */ "LOCHIAsmNLE\0" |
8266 | | /* 4838 */ "LOCGHIAsmNLE\0" |
8267 | | /* 4851 */ "LOCHHIAsmNLE\0" |
8268 | | /* 4864 */ "CIJAsmNLE\0" |
8269 | | /* 4874 */ "CGIJAsmNLE\0" |
8270 | | /* 4885 */ "CLGIJAsmNLE\0" |
8271 | | /* 4897 */ "CLIJAsmNLE\0" |
8272 | | /* 4908 */ "CRJAsmNLE\0" |
8273 | | /* 4918 */ "CGRJAsmNLE\0" |
8274 | | /* 4929 */ "CLGRJAsmNLE\0" |
8275 | | /* 4941 */ "CLRJAsmNLE\0" |
8276 | | /* 4952 */ "BRAsmNLE\0" |
8277 | | /* 4961 */ "LOCRAsmNLE\0" |
8278 | | /* 4972 */ "LOCGRAsmNLE\0" |
8279 | | /* 4984 */ "SELGRAsmNLE\0" |
8280 | | /* 4996 */ "LOCFHRAsmNLE\0" |
8281 | | /* 5009 */ "SELFHRAsmNLE\0" |
8282 | | /* 5022 */ "SELRAsmNLE\0" |
8283 | | /* 5033 */ "CLGTAsmNLE\0" |
8284 | | /* 5044 */ "CITAsmNLE\0" |
8285 | | /* 5054 */ "CLFITAsmNLE\0" |
8286 | | /* 5066 */ "CGITAsmNLE\0" |
8287 | | /* 5077 */ "CLGITAsmNLE\0" |
8288 | | /* 5089 */ "CLTAsmNLE\0" |
8289 | | /* 5099 */ "CRTAsmNLE\0" |
8290 | | /* 5109 */ "CGRTAsmNLE\0" |
8291 | | /* 5120 */ "CLGRTAsmNLE\0" |
8292 | | /* 5132 */ "CLRTAsmNLE\0" |
8293 | | /* 5143 */ "BXLE\0" |
8294 | | /* 5148 */ "BRXLE\0" |
8295 | | /* 5154 */ "CIBAsmLE\0" |
8296 | | /* 5163 */ "CGIBAsmLE\0" |
8297 | | /* 5173 */ "CLGIBAsmLE\0" |
8298 | | /* 5184 */ "CLIBAsmLE\0" |
8299 | | /* 5194 */ "CRBAsmLE\0" |
8300 | | /* 5203 */ "CGRBAsmLE\0" |
8301 | | /* 5213 */ "CLGRBAsmLE\0" |
8302 | | /* 5224 */ "CLRBAsmLE\0" |
8303 | | /* 5234 */ "LOCAsmLE\0" |
8304 | | /* 5243 */ "STOCAsmLE\0" |
8305 | | /* 5253 */ "LOCGAsmLE\0" |
8306 | | /* 5263 */ "STOCGAsmLE\0" |
8307 | | /* 5274 */ "JGAsmLE\0" |
8308 | | /* 5282 */ "LOCFHAsmLE\0" |
8309 | | /* 5293 */ "STOCFHAsmLE\0" |
8310 | | /* 5305 */ "BIAsmLE\0" |
8311 | | /* 5313 */ "LOCHIAsmLE\0" |
8312 | | /* 5324 */ "LOCGHIAsmLE\0" |
8313 | | /* 5336 */ "LOCHHIAsmLE\0" |
8314 | | /* 5348 */ "CIJAsmLE\0" |
8315 | | /* 5357 */ "CGIJAsmLE\0" |
8316 | | /* 5367 */ "CLGIJAsmLE\0" |
8317 | | /* 5378 */ "CLIJAsmLE\0" |
8318 | | /* 5388 */ "CRJAsmLE\0" |
8319 | | /* 5397 */ "CGRJAsmLE\0" |
8320 | | /* 5407 */ "CLGRJAsmLE\0" |
8321 | | /* 5418 */ "CLRJAsmLE\0" |
8322 | | /* 5428 */ "BRAsmLE\0" |
8323 | | /* 5436 */ "LOCRAsmLE\0" |
8324 | | /* 5446 */ "LOCGRAsmLE\0" |
8325 | | /* 5457 */ "SELGRAsmLE\0" |
8326 | | /* 5468 */ "LOCFHRAsmLE\0" |
8327 | | /* 5480 */ "SELFHRAsmLE\0" |
8328 | | /* 5492 */ "SELRAsmLE\0" |
8329 | | /* 5502 */ "CLGTAsmLE\0" |
8330 | | /* 5512 */ "CITAsmLE\0" |
8331 | | /* 5521 */ "CLFITAsmLE\0" |
8332 | | /* 5532 */ "CGITAsmLE\0" |
8333 | | /* 5542 */ "CLGITAsmLE\0" |
8334 | | /* 5553 */ "CLTAsmLE\0" |
8335 | | /* 5562 */ "CRTAsmLE\0" |
8336 | | /* 5571 */ "CGRTAsmLE\0" |
8337 | | /* 5581 */ "CLGRTAsmLE\0" |
8338 | | /* 5592 */ "CLRTAsmLE\0" |
8339 | | /* 5602 */ "VME\0" |
8340 | | /* 5606 */ "VFENE\0" |
8341 | | /* 5612 */ "G_MEMCPY_INLINE\0" |
8342 | | /* 5628 */ "VONE\0" |
8343 | | /* 5633 */ "CIBAsmNE\0" |
8344 | | /* 5642 */ "CGIBAsmNE\0" |
8345 | | /* 5652 */ "CLGIBAsmNE\0" |
8346 | | /* 5663 */ "CLIBAsmNE\0" |
8347 | | /* 5673 */ "CRBAsmNE\0" |
8348 | | /* 5682 */ "CGRBAsmNE\0" |
8349 | | /* 5692 */ "CLGRBAsmNE\0" |
8350 | | /* 5703 */ "CLRBAsmNE\0" |
8351 | | /* 5713 */ "LOCAsmNE\0" |
8352 | | /* 5722 */ "STOCAsmNE\0" |
8353 | | /* 5732 */ "LOCGAsmNE\0" |
8354 | | /* 5742 */ "STOCGAsmNE\0" |
8355 | | /* 5753 */ "JGAsmNE\0" |
8356 | | /* 5761 */ "LOCFHAsmNE\0" |
8357 | | /* 5772 */ "STOCFHAsmNE\0" |
8358 | | /* 5784 */ "BIAsmNE\0" |
8359 | | /* 5792 */ "LOCHIAsmNE\0" |
8360 | | /* 5803 */ "LOCGHIAsmNE\0" |
8361 | | /* 5815 */ "LOCHHIAsmNE\0" |
8362 | | /* 5827 */ "CIJAsmNE\0" |
8363 | | /* 5836 */ "CGIJAsmNE\0" |
8364 | | /* 5846 */ "CLGIJAsmNE\0" |
8365 | | /* 5857 */ "CLIJAsmNE\0" |
8366 | | /* 5867 */ "CRJAsmNE\0" |
8367 | | /* 5876 */ "CGRJAsmNE\0" |
8368 | | /* 5886 */ "CLGRJAsmNE\0" |
8369 | | /* 5897 */ "CLRJAsmNE\0" |
8370 | | /* 5907 */ "BRAsmNE\0" |
8371 | | /* 5915 */ "LOCRAsmNE\0" |
8372 | | /* 5925 */ "LOCGRAsmNE\0" |
8373 | | /* 5936 */ "SELGRAsmNE\0" |
8374 | | /* 5947 */ "LOCFHRAsmNE\0" |
8375 | | /* 5959 */ "SELFHRAsmNE\0" |
8376 | | /* 5971 */ "SELRAsmNE\0" |
8377 | | /* 5981 */ "CLGTAsmNE\0" |
8378 | | /* 5991 */ "CITAsmNE\0" |
8379 | | /* 6000 */ "CLFITAsmNE\0" |
8380 | | /* 6011 */ "CGITAsmNE\0" |
8381 | | /* 6021 */ "CLGITAsmNE\0" |
8382 | | /* 6032 */ "CLTAsmNE\0" |
8383 | | /* 6041 */ "CRTAsmNE\0" |
8384 | | /* 6050 */ "CGRTAsmNE\0" |
8385 | | /* 6060 */ "CLGRTAsmNE\0" |
8386 | | /* 6071 */ "CLRTAsmNE\0" |
8387 | | /* 6081 */ "LOCAL_ESCAPE\0" |
8388 | | /* 6094 */ "SQE\0" |
8389 | | /* 6098 */ "G_STACKRESTORE\0" |
8390 | | /* 6113 */ "G_INDEXED_STORE\0" |
8391 | | /* 6129 */ "G_STORE\0" |
8392 | | /* 6137 */ "InsnRRE\0" |
8393 | | /* 6145 */ "TRTRE\0" |
8394 | | /* 6151 */ "MSE\0" |
8395 | | /* 6155 */ "G_BITREVERSE\0" |
8396 | | /* 6168 */ "InsnRSE\0" |
8397 | | /* 6176 */ "InsnSSE\0" |
8398 | | /* 6184 */ "CUSE\0" |
8399 | | /* 6189 */ "IDTE\0" |
8400 | | /* 6194 */ "CRDTE\0" |
8401 | | /* 6200 */ "IPTE\0" |
8402 | | /* 6205 */ "TRTE\0" |
8403 | | /* 6210 */ "STE\0" |
8404 | | /* 6214 */ "DBG_VALUE\0" |
8405 | | /* 6224 */ "G_GLOBAL_VALUE\0" |
8406 | | /* 6239 */ "ADA_ENTRY_VALUE\0" |
8407 | | /* 6255 */ "G_STACKSAVE\0" |
8408 | | /* 6267 */ "G_MEMMOVE\0" |
8409 | | /* 6277 */ "LPSWE\0" |
8410 | | /* 6283 */ "LXE\0" |
8411 | | /* 6287 */ "InsnRXE\0" |
8412 | | /* 6295 */ "G_FREEZE\0" |
8413 | | /* 6304 */ "G_FCANONICALIZE\0" |
8414 | | /* 6320 */ "VLLEBRZE\0" |
8415 | | /* 6329 */ "CIBAsmE\0" |
8416 | | /* 6337 */ "CGIBAsmE\0" |
8417 | | /* 6346 */ "CLGIBAsmE\0" |
8418 | | /* 6356 */ "CLIBAsmE\0" |
8419 | | /* 6365 */ "CRBAsmE\0" |
8420 | | /* 6373 */ "CGRBAsmE\0" |
8421 | | /* 6382 */ "CLGRBAsmE\0" |
8422 | | /* 6392 */ "CLRBAsmE\0" |
8423 | | /* 6401 */ "LOCAsmE\0" |
8424 | | /* 6409 */ "STOCAsmE\0" |
8425 | | /* 6418 */ "LOCGAsmE\0" |
8426 | | /* 6427 */ "STOCGAsmE\0" |
8427 | | /* 6437 */ "JGAsmE\0" |
8428 | | /* 6444 */ "LOCFHAsmE\0" |
8429 | | /* 6454 */ "STOCFHAsmE\0" |
8430 | | /* 6465 */ "BIAsmE\0" |
8431 | | /* 6472 */ "LOCHIAsmE\0" |
8432 | | /* 6482 */ "LOCGHIAsmE\0" |
8433 | | /* 6493 */ "LOCHHIAsmE\0" |
8434 | | /* 6504 */ "CIJAsmE\0" |
8435 | | /* 6512 */ "CGIJAsmE\0" |
8436 | | /* 6521 */ "CLGIJAsmE\0" |
8437 | | /* 6531 */ "CLIJAsmE\0" |
8438 | | /* 6540 */ "CRJAsmE\0" |
8439 | | /* 6548 */ "CGRJAsmE\0" |
8440 | | /* 6557 */ "CLGRJAsmE\0" |
8441 | | /* 6567 */ "CLRJAsmE\0" |
8442 | | /* 6576 */ "BRAsmE\0" |
8443 | | /* 6583 */ "LOCRAsmE\0" |
8444 | | /* 6592 */ "LOCGRAsmE\0" |
8445 | | /* 6602 */ "SELGRAsmE\0" |
8446 | | /* 6612 */ "LOCFHRAsmE\0" |
8447 | | /* 6623 */ "SELFHRAsmE\0" |
8448 | | /* 6634 */ "SELRAsmE\0" |
8449 | | /* 6643 */ "CLGTAsmE\0" |
8450 | | /* 6652 */ "CITAsmE\0" |
8451 | | /* 6660 */ "CLFITAsmE\0" |
8452 | | /* 6670 */ "CGITAsmE\0" |
8453 | | /* 6679 */ "CLGITAsmE\0" |
8454 | | /* 6689 */ "CLTAsmE\0" |
8455 | | /* 6697 */ "CRTAsmE\0" |
8456 | | /* 6705 */ "CGRTAsmE\0" |
8457 | | /* 6714 */ "CLGRTAsmE\0" |
8458 | | /* 6724 */ "CLRTAsmE\0" |
8459 | | /* 6733 */ "InsnE\0" |
8460 | | /* 6739 */ "VGFMAF\0" |
8461 | | /* 6746 */ "VESRAF\0" |
8462 | | /* 6753 */ "VAF\0" |
8463 | | /* 6757 */ "SACF\0" |
8464 | | /* 6762 */ "VACCF\0" |
8465 | | /* 6768 */ "VECF\0" |
8466 | | /* 6773 */ "VLCF\0" |
8467 | | /* 6778 */ "VSTRCF\0" |
8468 | | /* 6785 */ "VFAEF\0" |
8469 | | /* 6791 */ "VMAEF\0" |
8470 | | /* 6797 */ "VSCEF\0" |
8471 | | /* 6803 */ "G_CTLZ_ZERO_UNDEF\0" |
8472 | | /* 6821 */ "G_CTTZ_ZERO_UNDEF\0" |
8473 | | /* 6839 */ "G_IMPLICIT_DEF\0" |
8474 | | /* 6854 */ "VFEEF\0" |
8475 | | /* 6860 */ "VGEF\0" |
8476 | | /* 6865 */ "VMALEF\0" |
8477 | | /* 6872 */ "VMLEF\0" |
8478 | | /* 6878 */ "VLEF\0" |
8479 | | /* 6883 */ "VMEF\0" |
8480 | | /* 6888 */ "VFENEF\0" |
8481 | | /* 6895 */ "DBG_INSTR_REF\0" |
8482 | | /* 6909 */ "VSTEF\0" |
8483 | | /* 6915 */ "PTFF\0" |
8484 | | /* 6920 */ "AGF\0" |
8485 | | /* 6924 */ "CGF\0" |
8486 | | /* 6928 */ "VSEGF\0" |
8487 | | /* 6934 */ "ALGF\0" |
8488 | | /* 6939 */ "CLGF\0" |
8489 | | /* 6944 */ "LLGF\0" |
8490 | | /* 6949 */ "SLGF\0" |
8491 | | /* 6954 */ "VSUMGF\0" |
8492 | | /* 6961 */ "LLZRGF\0" |
8493 | | /* 6968 */ "DSGF\0" |
8494 | | /* 6973 */ "MSGF\0" |
8495 | | /* 6978 */ "LTGF\0" |
8496 | | /* 6983 */ "VAVGF\0" |
8497 | | /* 6989 */ "VLVGF\0" |
8498 | | /* 6995 */ "VMAHF\0" |
8499 | | /* 7001 */ "VCHF\0" |
8500 | | /* 7006 */ "IIHF\0" |
8501 | | /* 7011 */ "LLIHF\0" |
8502 | | /* 7017 */ "NIHF\0" |
8503 | | /* 7022 */ "OIHF\0" |
8504 | | /* 7027 */ "XIHF\0" |
8505 | | /* 7032 */ "VMALHF\0" |
8506 | | /* 7039 */ "CLHF\0" |
8507 | | /* 7044 */ "VMLHF\0" |
8508 | | /* 7050 */ "VUPLHF\0" |
8509 | | /* 7057 */ "VMHF\0" |
8510 | | /* 7062 */ "VUPHF\0" |
8511 | | /* 7068 */ "VMRHF\0" |
8512 | | /* 7074 */ "VSCBIF\0" |
8513 | | /* 7081 */ "VLEIF\0" |
8514 | | /* 7087 */ "VREPIF\0" |
8515 | | /* 7094 */ "STCKF\0" |
8516 | | /* 7100 */ "VPKF\0" |
8517 | | /* 7105 */ "VMALF\0" |
8518 | | /* 7111 */ "VECLF\0" |
8519 | | /* 7117 */ "VAVGLF\0" |
8520 | | /* 7124 */ "VCHLF\0" |
8521 | | /* 7130 */ "IILF\0" |
8522 | | /* 7135 */ "LLILF\0" |
8523 | | /* 7141 */ "NILF\0" |
8524 | | /* 7146 */ "OILF\0" |
8525 | | /* 7151 */ "ATOMIC_LOADW_XILF\0" |
8526 | | /* 7169 */ "VUPLLF\0" |
8527 | | /* 7176 */ "VERLLF\0" |
8528 | | /* 7183 */ "VMLF\0" |
8529 | | /* 7188 */ "VMNLF\0" |
8530 | | /* 7194 */ "VUPLF\0" |
8531 | | /* 7200 */ "VMRLF\0" |
8532 | | /* 7206 */ "VESRLF\0" |
8533 | | /* 7213 */ "VESLF\0" |
8534 | | /* 7219 */ "VMXLF\0" |
8535 | | /* 7225 */ "VLLEZLF\0" |
8536 | | /* 7233 */ "VGFMF\0" |
8537 | | /* 7239 */ "PFMF\0" |
8538 | | /* 7244 */ "VGMF\0" |
8539 | | /* 7249 */ "VERIMF\0" |
8540 | | /* 7256 */ "KMF\0" |
8541 | | /* 7260 */ "VCNF\0" |
8542 | | /* 7265 */ "VMNF\0" |
8543 | | /* 7270 */ "VCRNF\0" |
8544 | | /* 7276 */ "VMAOF\0" |
8545 | | /* 7282 */ "VMALOF\0" |
8546 | | /* 7289 */ "VMLOF\0" |
8547 | | /* 7295 */ "VMOF\0" |
8548 | | /* 7300 */ "VLREPF\0" |
8549 | | /* 7307 */ "VLBRREPF\0" |
8550 | | /* 7316 */ "VREPF\0" |
8551 | | /* 7322 */ "SCKPF\0" |
8552 | | /* 7328 */ "VLPF\0" |
8553 | | /* 7333 */ "VCEQF\0" |
8554 | | /* 7339 */ "VSUMQF\0" |
8555 | | /* 7346 */ "VLEBRF\0" |
8556 | | /* 7353 */ "VSTEBRF\0" |
8557 | | /* 7361 */ "VLBRF\0" |
8558 | | /* 7367 */ "VSTBRF\0" |
8559 | | /* 7374 */ "VLERF\0" |
8560 | | /* 7380 */ "VSTERF\0" |
8561 | | /* 7387 */ "InsnRRF\0" |
8562 | | /* 7395 */ "VISTRF\0" |
8563 | | /* 7402 */ "LZRF\0" |
8564 | | /* 7407 */ "VPKSF\0" |
8565 | | /* 7413 */ "VPKLSF\0" |
8566 | | /* 7420 */ "VSTRSF\0" |
8567 | | /* 7427 */ "InsnSSF\0" |
8568 | | /* 7435 */ "VSF\0" |
8569 | | /* 7439 */ "VPOPCTF\0" |
8570 | | /* 7447 */ "PTF\0" |
8571 | | /* 7451 */ "CUUTF\0" |
8572 | | /* 7457 */ "VESRAVF\0" |
8573 | | /* 7465 */ "VLGVF\0" |
8574 | | /* 7471 */ "VERLLVF\0" |
8575 | | /* 7479 */ "VESRLVF\0" |
8576 | | /* 7487 */ "VESLVF\0" |
8577 | | /* 7494 */ "VMXF\0" |
8578 | | /* 7499 */ "InsnRXF\0" |
8579 | | /* 7507 */ "VSTRCZF\0" |
8580 | | /* 7515 */ "VFAEZF\0" |
8581 | | /* 7522 */ "VFEEZF\0" |
8582 | | /* 7529 */ "VLLEZF\0" |
8583 | | /* 7536 */ "VFENEZF\0" |
8584 | | /* 7544 */ "VCLZF\0" |
8585 | | /* 7550 */ "VLLEBRZF\0" |
8586 | | /* 7559 */ "VSTRSZF\0" |
8587 | | /* 7567 */ "VCTZF\0" |
8588 | | /* 7573 */ "LAAG\0" |
8589 | | /* 7578 */ "ECAG\0" |
8590 | | /* 7583 */ "DIAG\0" |
8591 | | /* 7588 */ "SLAG\0" |
8592 | | /* 7593 */ "VGFMAG\0" |
8593 | | /* 7600 */ "LRAG\0" |
8594 | | /* 7605 */ "VESRAG\0" |
8595 | | /* 7612 */ "STRAG\0" |
8596 | | /* 7618 */ "LURAG\0" |
8597 | | /* 7624 */ "VAG\0" |
8598 | | /* 7628 */ "SLBG\0" |
8599 | | /* 7633 */ "RISBG\0" |
8600 | | /* 7639 */ "RNSBG\0" |
8601 | | /* 7645 */ "ROSBG\0" |
8602 | | /* 7651 */ "RXSBG\0" |
8603 | | /* 7657 */ "VCVBG\0" |
8604 | | /* 7663 */ "TRACG\0" |
8605 | | /* 7669 */ "VACCG\0" |
8606 | | /* 7675 */ "VECG\0" |
8607 | | /* 7680 */ "ALCG\0" |
8608 | | /* 7685 */ "VLCG\0" |
8609 | | /* 7690 */ "LOCG\0" |
8610 | | /* 7695 */ "STOCG\0" |
8611 | | /* 7701 */ "VCDG\0" |
8612 | | /* 7706 */ "LPDG\0" |
8613 | | /* 7711 */ "VCVDG\0" |
8614 | | /* 7717 */ "VSCEG\0" |
8615 | | /* 7723 */ "VGEG\0" |
8616 | | /* 7728 */ "VLEG\0" |
8617 | | /* 7733 */ "BXLEG\0" |
8618 | | /* 7739 */ "G_FNEG\0" |
8619 | | /* 7746 */ "EXTRACT_SUBREG\0" |
8620 | | /* 7761 */ "INSERT_SUBREG\0" |
8621 | | /* 7775 */ "EREG\0" |
8622 | | /* 7780 */ "G_SEXT_INREG\0" |
8623 | | /* 7793 */ "SUBREG_TO_REG\0" |
8624 | | /* 7807 */ "VSEG\0" |
8625 | | /* 7812 */ "VSTEG\0" |
8626 | | /* 7818 */ "EREGG\0" |
8627 | | /* 7824 */ "LGG\0" |
8628 | | /* 7828 */ "VAVGG\0" |
8629 | | /* 7834 */ "VLVGG\0" |
8630 | | /* 7840 */ "RISBHG\0" |
8631 | | /* 7847 */ "VCHG\0" |
8632 | | /* 7852 */ "G_ATOMIC_CMPXCHG\0" |
8633 | | /* 7869 */ "G_ATOMICRMW_XCHG\0" |
8634 | | /* 7886 */ "VMRHG\0" |
8635 | | /* 7892 */ "BXHG\0" |
8636 | | /* 7897 */ "BRXHG\0" |
8637 | | /* 7903 */ "VSCBIG\0" |
8638 | | /* 7910 */ "VLEIG\0" |
8639 | | /* 7916 */ "VREPIG\0" |
8640 | | /* 7923 */ "CallJG\0" |
8641 | | /* 7930 */ "VPKG\0" |
8642 | | /* 7935 */ "LAALG\0" |
8643 | | /* 7941 */ "RISBLG\0" |
8644 | | /* 7948 */ "VECLG\0" |
8645 | | /* 7954 */ "VCDLG\0" |
8646 | | /* 7960 */ "VAVGLG\0" |
8647 | | /* 7967 */ "VCHLG\0" |
8648 | | /* 7973 */ "VERLLG\0" |
8649 | | /* 7980 */ "SLLG\0" |
8650 | | /* 7985 */ "MLG\0" |
8651 | | /* 7989 */ "VMNLG\0" |
8652 | | /* 7995 */ "VMRLG\0" |
8653 | | /* 8001 */ "VESRLG\0" |
8654 | | /* 8008 */ "VESLG\0" |
8655 | | /* 8014 */ "VMSLG\0" |
8656 | | /* 8020 */ "LCTLG\0" |
8657 | | /* 8026 */ "VMXLG\0" |
8658 | | /* 8032 */ "BRXLG\0" |
8659 | | /* 8038 */ "VGFMG\0" |
8660 | | /* 8044 */ "VGMG\0" |
8661 | | /* 8049 */ "VERIMG\0" |
8662 | | /* 8056 */ "LMG\0" |
8663 | | /* 8060 */ "STMG\0" |
8664 | | /* 8065 */ "VSUMG\0" |
8665 | | /* 8071 */ "LANG\0" |
8666 | | /* 8076 */ "VMNG\0" |
8667 | | /* 8081 */ "LAOG\0" |
8668 | | /* 8086 */ "G_FLOG\0" |
8669 | | /* 8093 */ "VLREPG\0" |
8670 | | /* 8100 */ "VLBRREPG\0" |
8671 | | /* 8109 */ "VREPG\0" |
8672 | | /* 8115 */ "VLPG\0" |
8673 | | /* 8120 */ "CSPG\0" |
8674 | | /* 8125 */ "MVPG\0" |
8675 | | /* 8130 */ "VCEQG\0" |
8676 | | /* 8136 */ "VSUMQG\0" |
8677 | | /* 8143 */ "G_VAARG\0" |
8678 | | /* 8151 */ "PREALLOCATED_ARG\0" |
8679 | | /* 8168 */ "VLEBRG\0" |
8680 | | /* 8175 */ "VSTEBRG\0" |
8681 | | /* 8183 */ "VLBRG\0" |
8682 | | /* 8189 */ "VSTBRG\0" |
8683 | | /* 8196 */ "VLERG\0" |
8684 | | /* 8202 */ "VSTERG\0" |
8685 | | /* 8209 */ "STURG\0" |
8686 | | /* 8215 */ "LZRG\0" |
8687 | | /* 8220 */ "BSG\0" |
8688 | | /* 8224 */ "CSG\0" |
8689 | | /* 8228 */ "CDSG\0" |
8690 | | /* 8233 */ "LLGFSG\0" |
8691 | | /* 8240 */ "VPKSG\0" |
8692 | | /* 8246 */ "VPKLSG\0" |
8693 | | /* 8253 */ "MSG\0" |
8694 | | /* 8257 */ "VSG\0" |
8695 | | /* 8261 */ "BCTG\0" |
8696 | | /* 8266 */ "ECTG\0" |
8697 | | /* 8271 */ "VPOPCTG\0" |
8698 | | /* 8279 */ "BRCTG\0" |
8699 | | /* 8285 */ "STCTG\0" |
8700 | | /* 8291 */ "LTG\0" |
8701 | | /* 8295 */ "NTSTG\0" |
8702 | | /* 8301 */ "VESRAVG\0" |
8703 | | /* 8309 */ "VAVG\0" |
8704 | | /* 8314 */ "VLGVG\0" |
8705 | | /* 8320 */ "VERLLVG\0" |
8706 | | /* 8328 */ "VESRLVG\0" |
8707 | | /* 8336 */ "VESLVG\0" |
8708 | | /* 8343 */ "VLVG\0" |
8709 | | /* 8348 */ "LRVG\0" |
8710 | | /* 8353 */ "STRVG\0" |
8711 | | /* 8359 */ "LAXG\0" |
8712 | | /* 8364 */ "VMXG\0" |
8713 | | /* 8369 */ "VLLEZG\0" |
8714 | | /* 8376 */ "VCLZG\0" |
8715 | | /* 8382 */ "VLLEBRZG\0" |
8716 | | /* 8391 */ "VCTZG\0" |
8717 | | /* 8397 */ "VGFMAH\0" |
8718 | | /* 8404 */ "VMAH\0" |
8719 | | /* 8409 */ "VESRAH\0" |
8720 | | /* 8416 */ "VAH\0" |
8721 | | /* 8420 */ "LBH\0" |
8722 | | /* 8424 */ "VACCH\0" |
8723 | | /* 8430 */ "VECH\0" |
8724 | | /* 8435 */ "VFCH\0" |
8725 | | /* 8440 */ "LLCH\0" |
8726 | | /* 8445 */ "VLCH\0" |
8727 | | /* 8450 */ "VSTRCH\0" |
8728 | | /* 8457 */ "CSCH\0" |
8729 | | /* 8462 */ "HSCH\0" |
8730 | | /* 8467 */ "MSCH\0" |
8731 | | /* 8472 */ "RSCH\0" |
8732 | | /* 8477 */ "SSCH\0" |
8733 | | /* 8482 */ "STSCH\0" |
8734 | | /* 8488 */ "XSCH\0" |
8735 | | /* 8493 */ "G_PREFETCH\0" |
8736 | | /* 8504 */ "STCH\0" |
8737 | | /* 8509 */ "VCH\0" |
8738 | | /* 8513 */ "VFAEH\0" |
8739 | | /* 8519 */ "VMAEH\0" |
8740 | | /* 8525 */ "VFEEH\0" |
8741 | | /* 8531 */ "VMALEH\0" |
8742 | | /* 8538 */ "VMLEH\0" |
8743 | | /* 8544 */ "VLEH\0" |
8744 | | /* 8549 */ "VMEH\0" |
8745 | | /* 8554 */ "VFENEH\0" |
8746 | | /* 8561 */ "VSTEH\0" |
8747 | | /* 8567 */ "LOCFH\0" |
8748 | | /* 8573 */ "STOCFH\0" |
8749 | | /* 8580 */ "LFH\0" |
8750 | | /* 8584 */ "STFH\0" |
8751 | | /* 8589 */ "AGH\0" |
8752 | | /* 8593 */ "CGH\0" |
8753 | | /* 8597 */ "VSEGH\0" |
8754 | | /* 8603 */ "LLGH\0" |
8755 | | /* 8608 */ "VSUMGH\0" |
8756 | | /* 8615 */ "SGH\0" |
8757 | | /* 8619 */ "VAVGH\0" |
8758 | | /* 8625 */ "VLVGH\0" |
8759 | | /* 8631 */ "VMAHH\0" |
8760 | | /* 8637 */ "RISBHH\0" |
8761 | | /* 8644 */ "VCHH\0" |
8762 | | /* 8649 */ "IIHH\0" |
8763 | | /* 8654 */ "LLIHH\0" |
8764 | | /* 8660 */ "NIHH\0" |
8765 | | /* 8665 */ "OIHH\0" |
8766 | | /* 8670 */ "VMALHH\0" |
8767 | | /* 8677 */ "LLHH\0" |
8768 | | /* 8682 */ "VMLHH\0" |
8769 | | /* 8688 */ "VUPLHH\0" |
8770 | | /* 8695 */ "TMHH\0" |
8771 | | /* 8700 */ "VMHH\0" |
8772 | | /* 8705 */ "VUPHH\0" |
8773 | | /* 8711 */ "VMRHH\0" |
8774 | | /* 8717 */ "STHH\0" |
8775 | | /* 8722 */ "AIH\0" |
8776 | | /* 8726 */ "VSCBIH\0" |
8777 | | /* 8733 */ "CIH\0" |
8778 | | /* 8737 */ "VLEIH\0" |
8779 | | /* 8743 */ "CLIH\0" |
8780 | | /* 8748 */ "VREPIH\0" |
8781 | | /* 8755 */ "ALSIH\0" |
8782 | | /* 8761 */ "VPKH\0" |
8783 | | /* 8766 */ "VMALH\0" |
8784 | | /* 8772 */ "RISBLH\0" |
8785 | | /* 8779 */ "VECLH\0" |
8786 | | /* 8785 */ "VAVGLH\0" |
8787 | | /* 8792 */ "VCHLH\0" |
8788 | | /* 8798 */ "IILH\0" |
8789 | | /* 8803 */ "LLILH\0" |
8790 | | /* 8809 */ "ATOMIC_LOADW_NILH\0" |
8791 | | /* 8827 */ "ATOMIC_LOADW_OILH\0" |
8792 | | /* 8845 */ "VUPLLH\0" |
8793 | | /* 8852 */ "VERLLH\0" |
8794 | | /* 8859 */ "TMLH\0" |
8795 | | /* 8864 */ "VMLH\0" |
8796 | | /* 8869 */ "VMNLH\0" |
8797 | | /* 8875 */ "CIBAsmNLH\0" |
8798 | | /* 8885 */ "CGIBAsmNLH\0" |
8799 | | /* 8896 */ "CLGIBAsmNLH\0" |
8800 | | /* 8908 */ "CLIBAsmNLH\0" |
8801 | | /* 8919 */ "CRBAsmNLH\0" |
8802 | | /* 8929 */ "CGRBAsmNLH\0" |
8803 | | /* 8940 */ "CLGRBAsmNLH\0" |
8804 | | /* 8952 */ "CLRBAsmNLH\0" |
8805 | | /* 8963 */ "LOCAsmNLH\0" |
8806 | | /* 8973 */ "STOCAsmNLH\0" |
8807 | | /* 8984 */ "LOCGAsmNLH\0" |
8808 | | /* 8995 */ "STOCGAsmNLH\0" |
8809 | | /* 9007 */ "JGAsmNLH\0" |
8810 | | /* 9016 */ "LOCFHAsmNLH\0" |
8811 | | /* 9028 */ "STOCFHAsmNLH\0" |
8812 | | /* 9041 */ "BIAsmNLH\0" |
8813 | | /* 9050 */ "LOCHIAsmNLH\0" |
8814 | | /* 9062 */ "LOCGHIAsmNLH\0" |
8815 | | /* 9075 */ "LOCHHIAsmNLH\0" |
8816 | | /* 9088 */ "CIJAsmNLH\0" |
8817 | | /* 9098 */ "CGIJAsmNLH\0" |
8818 | | /* 9109 */ "CLGIJAsmNLH\0" |
8819 | | /* 9121 */ "CLIJAsmNLH\0" |
8820 | | /* 9132 */ "CRJAsmNLH\0" |
8821 | | /* 9142 */ "CGRJAsmNLH\0" |
8822 | | /* 9153 */ "CLGRJAsmNLH\0" |
8823 | | /* 9165 */ "CLRJAsmNLH\0" |
8824 | | /* 9176 */ "BRAsmNLH\0" |
8825 | | /* 9185 */ "LOCRAsmNLH\0" |
8826 | | /* 9196 */ "LOCGRAsmNLH\0" |
8827 | | /* 9208 */ "SELGRAsmNLH\0" |
8828 | | /* 9220 */ "LOCFHRAsmNLH\0" |
8829 | | /* 9233 */ "SELFHRAsmNLH\0" |
8830 | | /* 9246 */ "SELRAsmNLH\0" |
8831 | | /* 9257 */ "CLGTAsmNLH\0" |
8832 | | /* 9268 */ "CITAsmNLH\0" |
8833 | | /* 9278 */ "CLFITAsmNLH\0" |
8834 | | /* 9290 */ "CGITAsmNLH\0" |
8835 | | /* 9301 */ "CLGITAsmNLH\0" |
8836 | | /* 9313 */ "CLTAsmNLH\0" |
8837 | | /* 9323 */ "CRTAsmNLH\0" |
8838 | | /* 9333 */ "CGRTAsmNLH\0" |
8839 | | /* 9344 */ "CLGRTAsmNLH\0" |
8840 | | /* 9356 */ "CLRTAsmNLH\0" |
8841 | | /* 9367 */ "VUPLH\0" |
8842 | | /* 9373 */ "VMRLH\0" |
8843 | | /* 9379 */ "VESRLH\0" |
8844 | | /* 9386 */ "VESLH\0" |
8845 | | /* 9392 */ "G_SMULH\0" |
8846 | | /* 9400 */ "G_UMULH\0" |
8847 | | /* 9408 */ "VMXLH\0" |
8848 | | /* 9414 */ "CIBAsmLH\0" |
8849 | | /* 9423 */ "CGIBAsmLH\0" |
8850 | | /* 9433 */ "CLGIBAsmLH\0" |
8851 | | /* 9444 */ "CLIBAsmLH\0" |
8852 | | /* 9454 */ "CRBAsmLH\0" |
8853 | | /* 9463 */ "CGRBAsmLH\0" |
8854 | | /* 9473 */ "CLGRBAsmLH\0" |
8855 | | /* 9484 */ "CLRBAsmLH\0" |
8856 | | /* 9494 */ "LOCAsmLH\0" |
8857 | | /* 9503 */ "STOCAsmLH\0" |
8858 | | /* 9513 */ "LOCGAsmLH\0" |
8859 | | /* 9523 */ "STOCGAsmLH\0" |
8860 | | /* 9534 */ "JGAsmLH\0" |
8861 | | /* 9542 */ "LOCFHAsmLH\0" |
8862 | | /* 9553 */ "STOCFHAsmLH\0" |
8863 | | /* 9565 */ "BIAsmLH\0" |
8864 | | /* 9573 */ "LOCHIAsmLH\0" |
8865 | | /* 9584 */ "LOCGHIAsmLH\0" |
8866 | | /* 9596 */ "LOCHHIAsmLH\0" |
8867 | | /* 9608 */ "CIJAsmLH\0" |
8868 | | /* 9617 */ "CGIJAsmLH\0" |
8869 | | /* 9627 */ "CLGIJAsmLH\0" |
8870 | | /* 9638 */ "CLIJAsmLH\0" |
8871 | | /* 9648 */ "CRJAsmLH\0" |
8872 | | /* 9657 */ "CGRJAsmLH\0" |
8873 | | /* 9667 */ "CLGRJAsmLH\0" |
8874 | | /* 9678 */ "CLRJAsmLH\0" |
8875 | | /* 9688 */ "BRAsmLH\0" |
8876 | | /* 9696 */ "LOCRAsmLH\0" |
8877 | | /* 9706 */ "LOCGRAsmLH\0" |
8878 | | /* 9717 */ "SELGRAsmLH\0" |
8879 | | /* 9728 */ "LOCFHRAsmLH\0" |
8880 | | /* 9740 */ "SELFHRAsmLH\0" |
8881 | | /* 9752 */ "SELRAsmLH\0" |
8882 | | /* 9762 */ "CLGTAsmLH\0" |
8883 | | /* 9772 */ "CITAsmLH\0" |
8884 | | /* 9781 */ "CLFITAsmLH\0" |
8885 | | /* 9792 */ "CGITAsmLH\0" |
8886 | | /* 9802 */ "CLGITAsmLH\0" |
8887 | | /* 9813 */ "CLTAsmLH\0" |
8888 | | /* 9822 */ "CRTAsmLH\0" |
8889 | | /* 9831 */ "CGRTAsmLH\0" |
8890 | | /* 9841 */ "CLGRTAsmLH\0" |
8891 | | /* 9852 */ "CLRTAsmLH\0" |
8892 | | /* 9862 */ "ICMH\0" |
8893 | | /* 9867 */ "STCMH\0" |
8894 | | /* 9873 */ "VGFMH\0" |
8895 | | /* 9879 */ "VGMH\0" |
8896 | | /* 9884 */ "VERIMH\0" |
8897 | | /* 9891 */ "CLMH\0" |
8898 | | /* 9896 */ "STMH\0" |
8899 | | /* 9901 */ "VSUMH\0" |
8900 | | /* 9907 */ "VMH\0" |
8901 | | /* 9911 */ "VCLFNH\0" |
8902 | | /* 9918 */ "VMNH\0" |
8903 | | /* 9923 */ "CIBAsmNH\0" |
8904 | | /* 9932 */ "CGIBAsmNH\0" |
8905 | | /* 9942 */ "CLGIBAsmNH\0" |
8906 | | /* 9953 */ "CLIBAsmNH\0" |
8907 | | /* 9963 */ "CRBAsmNH\0" |
8908 | | /* 9972 */ "CGRBAsmNH\0" |
8909 | | /* 9982 */ "CLGRBAsmNH\0" |
8910 | | /* 9993 */ "CLRBAsmNH\0" |
8911 | | /* 10003 */ "LOCAsmNH\0" |
8912 | | /* 10012 */ "STOCAsmNH\0" |
8913 | | /* 10022 */ "LOCGAsmNH\0" |
8914 | | /* 10032 */ "STOCGAsmNH\0" |
8915 | | /* 10043 */ "JGAsmNH\0" |
8916 | | /* 10051 */ "LOCFHAsmNH\0" |
8917 | | /* 10062 */ "STOCFHAsmNH\0" |
8918 | | /* 10074 */ "BIAsmNH\0" |
8919 | | /* 10082 */ "LOCHIAsmNH\0" |
8920 | | /* 10093 */ "LOCGHIAsmNH\0" |
8921 | | /* 10105 */ "LOCHHIAsmNH\0" |
8922 | | /* 10117 */ "CIJAsmNH\0" |
8923 | | /* 10126 */ "CGIJAsmNH\0" |
8924 | | /* 10136 */ "CLGIJAsmNH\0" |
8925 | | /* 10147 */ "CLIJAsmNH\0" |
8926 | | /* 10157 */ "CRJAsmNH\0" |
8927 | | /* 10166 */ "CGRJAsmNH\0" |
8928 | | /* 10176 */ "CLGRJAsmNH\0" |
8929 | | /* 10187 */ "CLRJAsmNH\0" |
8930 | | /* 10197 */ "BRAsmNH\0" |
8931 | | /* 10205 */ "LOCRAsmNH\0" |
8932 | | /* 10215 */ "LOCGRAsmNH\0" |
8933 | | /* 10226 */ "SELGRAsmNH\0" |
8934 | | /* 10237 */ "LOCFHRAsmNH\0" |
8935 | | /* 10249 */ "SELFHRAsmNH\0" |
8936 | | /* 10261 */ "SELRAsmNH\0" |
8937 | | /* 10271 */ "CLGTAsmNH\0" |
8938 | | /* 10281 */ "CITAsmNH\0" |
8939 | | /* 10290 */ "CLFITAsmNH\0" |
8940 | | /* 10301 */ "CGITAsmNH\0" |
8941 | | /* 10311 */ "CLGITAsmNH\0" |
8942 | | /* 10322 */ "CLTAsmNH\0" |
8943 | | /* 10331 */ "CRTAsmNH\0" |
8944 | | /* 10340 */ "CGRTAsmNH\0" |
8945 | | /* 10350 */ "CLGRTAsmNH\0" |
8946 | | /* 10361 */ "CLRTAsmNH\0" |
8947 | | /* 10371 */ "VMAOH\0" |
8948 | | /* 10377 */ "VMALOH\0" |
8949 | | /* 10384 */ "VMLOH\0" |
8950 | | /* 10390 */ "VMOH\0" |
8951 | | /* 10395 */ "VLREPH\0" |
8952 | | /* 10402 */ "VLBRREPH\0" |
8953 | | /* 10411 */ "VREPH\0" |
8954 | | /* 10417 */ "VLPH\0" |
8955 | | /* 10422 */ "VCSPH\0" |
8956 | | /* 10428 */ "VUPH\0" |
8957 | | /* 10433 */ "VCEQH\0" |
8958 | | /* 10439 */ "VLEBRH\0" |
8959 | | /* 10446 */ "VSTEBRH\0" |
8960 | | /* 10454 */ "VLBRH\0" |
8961 | | /* 10460 */ "VSTBRH\0" |
8962 | | /* 10467 */ "VLERH\0" |
8963 | | /* 10473 */ "VSTERH\0" |
8964 | | /* 10480 */ "VMRH\0" |
8965 | | /* 10485 */ "VISTRH\0" |
8966 | | /* 10492 */ "VPKSH\0" |
8967 | | /* 10498 */ "VPKLSH\0" |
8968 | | /* 10505 */ "VSTRSH\0" |
8969 | | /* 10512 */ "VSH\0" |
8970 | | /* 10516 */ "VPOPCTH\0" |
8971 | | /* 10524 */ "BRCTH\0" |
8972 | | /* 10530 */ "STH\0" |
8973 | | /* 10534 */ "VESRAVH\0" |
8974 | | /* 10542 */ "VLGVH\0" |
8975 | | /* 10548 */ "VERLLVH\0" |
8976 | | /* 10556 */ "VESRLVH\0" |
8977 | | /* 10564 */ "VESLVH\0" |
8978 | | /* 10571 */ "LRVH\0" |
8979 | | /* 10576 */ "STRVH\0" |
8980 | | /* 10582 */ "BXH\0" |
8981 | | /* 10586 */ "VMXH\0" |
8982 | | /* 10591 */ "BRXH\0" |
8983 | | /* 10596 */ "MAYH\0" |
8984 | | /* 10601 */ "MYH\0" |
8985 | | /* 10605 */ "VSTRCZH\0" |
8986 | | /* 10613 */ "VFAEZH\0" |
8987 | | /* 10620 */ "VFEEZH\0" |
8988 | | /* 10627 */ "VLLEZH\0" |
8989 | | /* 10634 */ "VFENEZH\0" |
8990 | | /* 10642 */ "VUPKZH\0" |
8991 | | /* 10649 */ "VCLZH\0" |
8992 | | /* 10655 */ "VLLEBRZH\0" |
8993 | | /* 10664 */ "VSTRSZH\0" |
8994 | | /* 10672 */ "VCTZH\0" |
8995 | | /* 10678 */ "CIBAsmH\0" |
8996 | | /* 10686 */ "CGIBAsmH\0" |
8997 | | /* 10695 */ "CLGIBAsmH\0" |
8998 | | /* 10705 */ "CLIBAsmH\0" |
8999 | | /* 10714 */ "CRBAsmH\0" |
9000 | | /* 10722 */ "CGRBAsmH\0" |
9001 | | /* 10731 */ "CLGRBAsmH\0" |
9002 | | /* 10741 */ "CLRBAsmH\0" |
9003 | | /* 10750 */ "LOCAsmH\0" |
9004 | | /* 10758 */ "STOCAsmH\0" |
9005 | | /* 10767 */ "LOCGAsmH\0" |
9006 | | /* 10776 */ "STOCGAsmH\0" |
9007 | | /* 10786 */ "JGAsmH\0" |
9008 | | /* 10793 */ "LOCFHAsmH\0" |
9009 | | /* 10803 */ "STOCFHAsmH\0" |
9010 | | /* 10814 */ "BIAsmH\0" |
9011 | | /* 10821 */ "LOCHIAsmH\0" |
9012 | | /* 10831 */ "LOCGHIAsmH\0" |
9013 | | /* 10842 */ "LOCHHIAsmH\0" |
9014 | | /* 10853 */ "CIJAsmH\0" |
9015 | | /* 10861 */ "CGIJAsmH\0" |
9016 | | /* 10870 */ "CLGIJAsmH\0" |
9017 | | /* 10880 */ "CLIJAsmH\0" |
9018 | | /* 10889 */ "CRJAsmH\0" |
9019 | | /* 10897 */ "CGRJAsmH\0" |
9020 | | /* 10906 */ "CLGRJAsmH\0" |
9021 | | /* 10916 */ "CLRJAsmH\0" |
9022 | | /* 10925 */ "BRAsmH\0" |
9023 | | /* 10932 */ "LOCRAsmH\0" |
9024 | | /* 10941 */ "LOCGRAsmH\0" |
9025 | | /* 10951 */ "SELGRAsmH\0" |
9026 | | /* 10961 */ "LOCFHRAsmH\0" |
9027 | | /* 10972 */ "SELFHRAsmH\0" |
9028 | | /* 10983 */ "SELRAsmH\0" |
9029 | | /* 10992 */ "CLGTAsmH\0" |
9030 | | /* 11001 */ "CITAsmH\0" |
9031 | | /* 11009 */ "CLFITAsmH\0" |
9032 | | /* 11019 */ "CGITAsmH\0" |
9033 | | /* 11028 */ "CLGITAsmH\0" |
9034 | | /* 11038 */ "CLTAsmH\0" |
9035 | | /* 11046 */ "CRTAsmH\0" |
9036 | | /* 11054 */ "CGRTAsmH\0" |
9037 | | /* 11063 */ "CLGRTAsmH\0" |
9038 | | /* 11073 */ "CLRTAsmH\0" |
9039 | | /* 11082 */ "NIAI\0" |
9040 | | /* 11087 */ "VSBCBI\0" |
9041 | | /* 11094 */ "VSCBI\0" |
9042 | | /* 11100 */ "VSBI\0" |
9043 | | /* 11105 */ "QPACI\0" |
9044 | | /* 11111 */ "VFTCI\0" |
9045 | | /* 11117 */ "VPDI\0" |
9046 | | /* 11122 */ "ATOMIC_LOADW_AFI\0" |
9047 | | /* 11139 */ "CFI\0" |
9048 | | /* 11143 */ "AGFI\0" |
9049 | | /* 11148 */ "CGFI\0" |
9050 | | /* 11153 */ "ALGFI\0" |
9051 | | /* 11159 */ "CLGFI\0" |
9052 | | /* 11165 */ "SLGFI\0" |
9053 | | /* 11171 */ "MSGFI\0" |
9054 | | /* 11177 */ "ALFI\0" |
9055 | | /* 11182 */ "CLFI\0" |
9056 | | /* 11187 */ "SLFI\0" |
9057 | | /* 11192 */ "MSFI\0" |
9058 | | /* 11197 */ "VFI\0" |
9059 | | /* 11201 */ "AHI\0" |
9060 | | /* 11205 */ "LOCHI\0" |
9061 | | /* 11211 */ "AGHI\0" |
9062 | | /* 11216 */ "LOCGHI\0" |
9063 | | /* 11223 */ "LGHI\0" |
9064 | | /* 11228 */ "MGHI\0" |
9065 | | /* 11233 */ "MVGHI\0" |
9066 | | /* 11239 */ "LOCHHI\0" |
9067 | | /* 11246 */ "MVHHI\0" |
9068 | | /* 11252 */ "LHI\0" |
9069 | | /* 11256 */ "MHI\0" |
9070 | | /* 11260 */ "DBG_PHI\0" |
9071 | | /* 11268 */ "MVHI\0" |
9072 | | /* 11273 */ "CLI\0" |
9073 | | /* 11277 */ "NI\0" |
9074 | | /* 11280 */ "OI\0" |
9075 | | /* 11283 */ "VREPI\0" |
9076 | | /* 11289 */ "TPI\0" |
9077 | | /* 11293 */ "QCTRI\0" |
9078 | | /* 11299 */ "InsnVRI\0" |
9079 | | /* 11307 */ "InsnRI\0" |
9080 | | /* 11314 */ "ASI\0" |
9081 | | /* 11318 */ "AGSI\0" |
9082 | | /* 11323 */ "ALGSI\0" |
9083 | | /* 11329 */ "CHSI\0" |
9084 | | /* 11334 */ "CLFHSI\0" |
9085 | | /* 11341 */ "CGHSI\0" |
9086 | | /* 11347 */ "CLGHSI\0" |
9087 | | /* 11354 */ "CHHSI\0" |
9088 | | /* 11360 */ "CLHHSI\0" |
9089 | | /* 11367 */ "ALSI\0" |
9090 | | /* 11372 */ "G_FPTOSI\0" |
9091 | | /* 11381 */ "QSI\0" |
9092 | | /* 11385 */ "InsnRSI\0" |
9093 | | /* 11393 */ "STSI\0" |
9094 | | /* 11398 */ "InsnVSI\0" |
9095 | | /* 11406 */ "InsnSI\0" |
9096 | | /* 11413 */ "PTI\0" |
9097 | | /* 11417 */ "G_FPTOUI\0" |
9098 | | /* 11426 */ "MVI\0" |
9099 | | /* 11430 */ "G_FPOWI\0" |
9100 | | /* 11438 */ "XI\0" |
9101 | | /* 11441 */ "CIJ\0" |
9102 | | /* 11445 */ "CGIJ\0" |
9103 | | /* 11450 */ "CLGIJ\0" |
9104 | | /* 11456 */ "CLIJ\0" |
9105 | | /* 11461 */ "CRJ\0" |
9106 | | /* 11465 */ "CGRJ\0" |
9107 | | /* 11470 */ "CLGRJ\0" |
9108 | | /* 11476 */ "CLRJ\0" |
9109 | | /* 11481 */ "SLAK\0" |
9110 | | /* 11486 */ "SRAK\0" |
9111 | | /* 11491 */ "PACK\0" |
9112 | | /* 11496 */ "SCK\0" |
9113 | | /* 11500 */ "STCK\0" |
9114 | | /* 11505 */ "MVCK\0" |
9115 | | /* 11510 */ "MVCDK\0" |
9116 | | /* 11516 */ "WFK\0" |
9117 | | /* 11520 */ "AHIK\0" |
9118 | | /* 11525 */ "AGHIK\0" |
9119 | | /* 11531 */ "ALGHSIK\0" |
9120 | | /* 11539 */ "ALHSIK\0" |
9121 | | /* 11546 */ "SLLK\0" |
9122 | | /* 11551 */ "SRLK\0" |
9123 | | /* 11556 */ "EDMK\0" |
9124 | | /* 11561 */ "CondReturn_XPLINK\0" |
9125 | | /* 11579 */ "IPK\0" |
9126 | | /* 11583 */ "UNPK\0" |
9127 | | /* 11588 */ "VPK\0" |
9128 | | /* 11592 */ "ARK\0" |
9129 | | /* 11596 */ "NCRK\0" |
9130 | | /* 11601 */ "OCRK\0" |
9131 | | /* 11606 */ "AGRK\0" |
9132 | | /* 11611 */ "NCGRK\0" |
9133 | | /* 11617 */ "OCGRK\0" |
9134 | | /* 11623 */ "ALGRK\0" |
9135 | | /* 11629 */ "SLGRK\0" |
9136 | | /* 11635 */ "MGRK\0" |
9137 | | /* 11640 */ "NNGRK\0" |
9138 | | /* 11646 */ "NOGRK\0" |
9139 | | /* 11652 */ "SGRK\0" |
9140 | | /* 11657 */ "NXGRK\0" |
9141 | | /* 11663 */ "ALRK\0" |
9142 | | /* 11668 */ "SLRK\0" |
9143 | | /* 11673 */ "NNRK\0" |
9144 | | /* 11678 */ "NORK\0" |
9145 | | /* 11683 */ "SRK\0" |
9146 | | /* 11687 */ "NXRK\0" |
9147 | | /* 11692 */ "G_PTRMASK\0" |
9148 | | /* 11702 */ "MVCSK\0" |
9149 | | /* 11708 */ "IVSK\0" |
9150 | | /* 11713 */ "AHIMuxK\0" |
9151 | | /* 11721 */ "LAAL\0" |
9152 | | /* 11726 */ "BAL\0" |
9153 | | /* 11730 */ "VMAL\0" |
9154 | | /* 11735 */ "SAL\0" |
9155 | | /* 11739 */ "VECL\0" |
9156 | | /* 11744 */ "CLCL\0" |
9157 | | /* 11749 */ "CallBRCL\0" |
9158 | | /* 11758 */ "MVCL\0" |
9159 | | /* 11763 */ "SLDL\0" |
9160 | | /* 11768 */ "SRDL\0" |
9161 | | /* 11773 */ "GC_LABEL\0" |
9162 | | /* 11782 */ "DBG_LABEL\0" |
9163 | | /* 11792 */ "EH_LABEL\0" |
9164 | | /* 11801 */ "ANNOTATION_LABEL\0" |
9165 | | /* 11818 */ "ICALL_BRANCH_FUNNEL\0" |
9166 | | /* 11838 */ "VSEL\0" |
9167 | | /* 11843 */ "STFL\0" |
9168 | | /* 11848 */ "VAVGL\0" |
9169 | | /* 11854 */ "RISBHL\0" |
9170 | | /* 11861 */ "VCHL\0" |
9171 | | /* 11866 */ "IIHL\0" |
9172 | | /* 11871 */ "LLIHL\0" |
9173 | | /* 11877 */ "NIHL\0" |
9174 | | /* 11882 */ "OIHL\0" |
9175 | | /* 11887 */ "TMHL\0" |
9176 | | /* 11892 */ "G_FSHL\0" |
9177 | | /* 11899 */ "G_SHL\0" |
9178 | | /* 11905 */ "G_FCEIL\0" |
9179 | | /* 11913 */ "InsnRIL\0" |
9180 | | /* 11921 */ "InsnSIL\0" |
9181 | | /* 11929 */ "TLS_GDCALL\0" |
9182 | | /* 11940 */ "TLS_LDCALL\0" |
9183 | | /* 11951 */ "PATCHABLE_TAIL_CALL\0" |
9184 | | /* 11971 */ "PATCHABLE_TYPED_EVENT_CALL\0" |
9185 | | /* 11998 */ "PATCHABLE_EVENT_CALL\0" |
9186 | | /* 12019 */ "FENTRY_CALL\0" |
9187 | | /* 12031 */ "RISBLL\0" |
9188 | | /* 12038 */ "VFLL\0" |
9189 | | /* 12043 */ "IILL\0" |
9190 | | /* 12048 */ "KILL\0" |
9191 | | /* 12053 */ "LLILL\0" |
9192 | | /* 12059 */ "NILL\0" |
9193 | | /* 12064 */ "OILL\0" |
9194 | | /* 12069 */ "TMLL\0" |
9195 | | /* 12074 */ "VUPLL\0" |
9196 | | /* 12080 */ "VERLL\0" |
9197 | | /* 12086 */ "SLL\0" |
9198 | | /* 12090 */ "VLL\0" |
9199 | | /* 12094 */ "VML\0" |
9200 | | /* 12098 */ "VCLFNL\0" |
9201 | | /* 12105 */ "VMNL\0" |
9202 | | /* 12110 */ "CIBAsmNL\0" |
9203 | | /* 12119 */ "CGIBAsmNL\0" |
9204 | | /* 12129 */ "CLGIBAsmNL\0" |
9205 | | /* 12140 */ "CLIBAsmNL\0" |
9206 | | /* 12150 */ "CRBAsmNL\0" |
9207 | | /* 12159 */ "CGRBAsmNL\0" |
9208 | | /* 12169 */ "CLGRBAsmNL\0" |
9209 | | /* 12180 */ "CLRBAsmNL\0" |
9210 | | /* 12190 */ "LOCAsmNL\0" |
9211 | | /* 12199 */ "STOCAsmNL\0" |
9212 | | /* 12209 */ "LOCGAsmNL\0" |
9213 | | /* 12219 */ "STOCGAsmNL\0" |
9214 | | /* 12230 */ "JGAsmNL\0" |
9215 | | /* 12238 */ "LOCFHAsmNL\0" |
9216 | | /* 12249 */ "STOCFHAsmNL\0" |
9217 | | /* 12261 */ "BIAsmNL\0" |
9218 | | /* 12269 */ "LOCHIAsmNL\0" |
9219 | | /* 12280 */ "LOCGHIAsmNL\0" |
9220 | | /* 12292 */ "LOCHHIAsmNL\0" |
9221 | | /* 12304 */ "CIJAsmNL\0" |
9222 | | /* 12313 */ "CGIJAsmNL\0" |
9223 | | /* 12323 */ "CLGIJAsmNL\0" |
9224 | | /* 12334 */ "CLIJAsmNL\0" |
9225 | | /* 12344 */ "CRJAsmNL\0" |
9226 | | /* 12353 */ "CGRJAsmNL\0" |
9227 | | /* 12363 */ "CLGRJAsmNL\0" |
9228 | | /* 12374 */ "CLRJAsmNL\0" |
9229 | | /* 12384 */ "BRAsmNL\0" |
9230 | | /* 12392 */ "LOCRAsmNL\0" |
9231 | | /* 12402 */ "LOCGRAsmNL\0" |
9232 | | /* 12413 */ "SELGRAsmNL\0" |
9233 | | /* 12424 */ "LOCFHRAsmNL\0" |
9234 | | /* 12436 */ "SELFHRAsmNL\0" |
9235 | | /* 12448 */ "SELRAsmNL\0" |
9236 | | /* 12458 */ "CLGTAsmNL\0" |
9237 | | /* 12468 */ "CITAsmNL\0" |
9238 | | /* 12477 */ "CLFITAsmNL\0" |
9239 | | /* 12488 */ "CGITAsmNL\0" |
9240 | | /* 12498 */ "CLGITAsmNL\0" |
9241 | | /* 12509 */ "CLTAsmNL\0" |
9242 | | /* 12518 */ "CRTAsmNL\0" |
9243 | | /* 12527 */ "CGRTAsmNL\0" |
9244 | | /* 12537 */ "CLGRTAsmNL\0" |
9245 | | /* 12548 */ "CLRTAsmNL\0" |
9246 | | /* 12558 */ "G_CONSTANT_POOL\0" |
9247 | | /* 12574 */ "VCFPL\0" |
9248 | | /* 12580 */ "VUPL\0" |
9249 | | /* 12585 */ "LARL\0" |
9250 | | /* 12590 */ "MVCRL\0" |
9251 | | /* 12596 */ "PFDRL\0" |
9252 | | /* 12602 */ "CGFRL\0" |
9253 | | /* 12608 */ "CLGFRL\0" |
9254 | | /* 12615 */ "LLGFRL\0" |
9255 | | /* 12622 */ "CGRL\0" |
9256 | | /* 12627 */ "CLGRL\0" |
9257 | | /* 12633 */ "STGRL\0" |
9258 | | /* 12639 */ "CHRL\0" |
9259 | | /* 12644 */ "CGHRL\0" |
9260 | | /* 12650 */ "CLGHRL\0" |
9261 | | /* 12657 */ "LLGHRL\0" |
9262 | | /* 12664 */ "CLHRL\0" |
9263 | | /* 12670 */ "LLHRL\0" |
9264 | | /* 12676 */ "STHRL\0" |
9265 | | /* 12682 */ "CLRL\0" |
9266 | | /* 12687 */ "VLRL\0" |
9267 | | /* 12692 */ "VMRL\0" |
9268 | | /* 12697 */ "VESRL\0" |
9269 | | /* 12703 */ "VSRL\0" |
9270 | | /* 12708 */ "VSTRL\0" |
9271 | | /* 12714 */ "EXRL\0" |
9272 | | /* 12719 */ "CallBRASL\0" |
9273 | | /* 12729 */ "VESL\0" |
9274 | | /* 12734 */ "VMSL\0" |
9275 | | /* 12739 */ "VSL\0" |
9276 | | /* 12743 */ "LCCTL\0" |
9277 | | /* 12749 */ "LCTL\0" |
9278 | | /* 12754 */ "LPCTL\0" |
9279 | | /* 12760 */ "LSCTL\0" |
9280 | | /* 12766 */ "STCTL\0" |
9281 | | /* 12772 */ "G_ROTL\0" |
9282 | | /* 12779 */ "SORTL\0" |
9283 | | /* 12785 */ "VSTL\0" |
9284 | | /* 12790 */ "G_VECREDUCE_FMUL\0" |
9285 | | /* 12807 */ "G_FMUL\0" |
9286 | | /* 12814 */ "G_VECREDUCE_SEQ_FMUL\0" |
9287 | | /* 12835 */ "G_STRICT_FMUL\0" |
9288 | | /* 12849 */ "G_VECREDUCE_MUL\0" |
9289 | | /* 12865 */ "G_MUL\0" |
9290 | | /* 12871 */ "VL\0" |
9291 | | /* 12874 */ "VMXL\0" |
9292 | | /* 12879 */ "MAYL\0" |
9293 | | /* 12884 */ "MYL\0" |
9294 | | /* 12888 */ "VUPKZL\0" |
9295 | | /* 12895 */ "CIBAsmL\0" |
9296 | | /* 12903 */ "CGIBAsmL\0" |
9297 | | /* 12912 */ "CLGIBAsmL\0" |
9298 | | /* 12922 */ "CLIBAsmL\0" |
9299 | | /* 12931 */ "CRBAsmL\0" |
9300 | | /* 12939 */ "CGRBAsmL\0" |
9301 | | /* 12948 */ "CLGRBAsmL\0" |
9302 | | /* 12958 */ "CLRBAsmL\0" |
9303 | | /* 12967 */ "LOCAsmL\0" |
9304 | | /* 12975 */ "STOCAsmL\0" |
9305 | | /* 12984 */ "LOCGAsmL\0" |
9306 | | /* 12993 */ "STOCGAsmL\0" |
9307 | | /* 13003 */ "JGAsmL\0" |
9308 | | /* 13010 */ "LOCFHAsmL\0" |
9309 | | /* 13020 */ "STOCFHAsmL\0" |
9310 | | /* 13031 */ "BIAsmL\0" |
9311 | | /* 13038 */ "LOCHIAsmL\0" |
9312 | | /* 13048 */ "LOCGHIAsmL\0" |
9313 | | /* 13059 */ "LOCHHIAsmL\0" |
9314 | | /* 13070 */ "CIJAsmL\0" |
9315 | | /* 13078 */ "CGIJAsmL\0" |
9316 | | /* 13087 */ "CLGIJAsmL\0" |
9317 | | /* 13097 */ "CLIJAsmL\0" |
9318 | | /* 13106 */ "CRJAsmL\0" |
9319 | | /* 13114 */ "CGRJAsmL\0" |
9320 | | /* 13123 */ "CLGRJAsmL\0" |
9321 | | /* 13133 */ "CLRJAsmL\0" |
9322 | | /* 13142 */ "BRAsmL\0" |
9323 | | /* 13149 */ "LOCRAsmL\0" |
9324 | | /* 13158 */ "LOCGRAsmL\0" |
9325 | | /* 13168 */ "SELGRAsmL\0" |
9326 | | /* 13178 */ "LOCFHRAsmL\0" |
9327 | | /* 13189 */ "SELFHRAsmL\0" |
9328 | | /* 13200 */ "SELRAsmL\0" |
9329 | | /* 13209 */ "CLGTAsmL\0" |
9330 | | /* 13218 */ "CITAsmL\0" |
9331 | | /* 13226 */ "CLFITAsmL\0" |
9332 | | /* 13236 */ "CGITAsmL\0" |
9333 | | /* 13245 */ "CLGITAsmL\0" |
9334 | | /* 13255 */ "CLTAsmL\0" |
9335 | | /* 13263 */ "CRTAsmL\0" |
9336 | | /* 13271 */ "CGRTAsmL\0" |
9337 | | /* 13280 */ "CLGRTAsmL\0" |
9338 | | /* 13290 */ "CLRTAsmL\0" |
9339 | | /* 13299 */ "LAM\0" |
9340 | | /* 13303 */ "STAM\0" |
9341 | | /* 13308 */ "VGBM\0" |
9342 | | /* 13313 */ "IRBM\0" |
9343 | | /* 13318 */ "RRBM\0" |
9344 | | /* 13323 */ "ICM\0" |
9345 | | /* 13327 */ "STCM\0" |
9346 | | /* 13332 */ "G_FREM\0" |
9347 | | /* 13339 */ "G_STRICT_FREM\0" |
9348 | | /* 13353 */ "G_SREM\0" |
9349 | | /* 13360 */ "G_UREM\0" |
9350 | | /* 13367 */ "G_SDIVREM\0" |
9351 | | /* 13377 */ "G_UDIVREM\0" |
9352 | | /* 13387 */ "VGFM\0" |
9353 | | /* 13392 */ "VFM\0" |
9354 | | /* 13396 */ "VGM\0" |
9355 | | /* 13400 */ "SCHM\0" |
9356 | | /* 13405 */ "VERIM\0" |
9357 | | /* 13411 */ "KM\0" |
9358 | | /* 13414 */ "CLM\0" |
9359 | | /* 13418 */ "VLM\0" |
9360 | | /* 13422 */ "SRNM\0" |
9361 | | /* 13427 */ "BAsmNM\0" |
9362 | | /* 13434 */ "LOCAsmNM\0" |
9363 | | /* 13443 */ "STOCAsmNM\0" |
9364 | | /* 13453 */ "LOCGAsmNM\0" |
9365 | | /* 13463 */ "STOCGAsmNM\0" |
9366 | | /* 13474 */ "JGAsmNM\0" |
9367 | | /* 13482 */ "LOCFHAsmNM\0" |
9368 | | /* 13493 */ "STOCFHAsmNM\0" |
9369 | | /* 13505 */ "BIAsmNM\0" |
9370 | | /* 13513 */ "LOCHIAsmNM\0" |
9371 | | /* 13524 */ "LOCGHIAsmNM\0" |
9372 | | /* 13536 */ "LOCHHIAsmNM\0" |
9373 | | /* 13548 */ "JAsmNM\0" |
9374 | | /* 13555 */ "BRAsmNM\0" |
9375 | | /* 13563 */ "LOCRAsmNM\0" |
9376 | | /* 13573 */ "LOCGRAsmNM\0" |
9377 | | /* 13584 */ "SELGRAsmNM\0" |
9378 | | /* 13595 */ "LOCFHRAsmNM\0" |
9379 | | /* 13607 */ "SELFHRAsmNM\0" |
9380 | | /* 13619 */ "SELRAsmNM\0" |
9381 | | /* 13629 */ "IPM\0" |
9382 | | /* 13633 */ "SPM\0" |
9383 | | /* 13637 */ "VBPERM\0" |
9384 | | /* 13644 */ "VPERM\0" |
9385 | | /* 13650 */ "INLINEASM\0" |
9386 | | /* 13660 */ "BSM\0" |
9387 | | /* 13664 */ "VCKSM\0" |
9388 | | /* 13670 */ "STNSM\0" |
9389 | | /* 13676 */ "STOSM\0" |
9390 | | /* 13682 */ "BASSM\0" |
9391 | | /* 13688 */ "VSTM\0" |
9392 | | /* 13693 */ "VTM\0" |
9393 | | /* 13697 */ "G_VECREDUCE_FMINIMUM\0" |
9394 | | /* 13718 */ "G_FMINIMUM\0" |
9395 | | /* 13729 */ "G_VECREDUCE_FMAXIMUM\0" |
9396 | | /* 13750 */ "G_FMAXIMUM\0" |
9397 | | /* 13761 */ "G_FMINNUM\0" |
9398 | | /* 13771 */ "G_FMAXNUM\0" |
9399 | | /* 13781 */ "VSUM\0" |
9400 | | /* 13786 */ "BAsmM\0" |
9401 | | /* 13792 */ "LOCAsmM\0" |
9402 | | /* 13800 */ "STOCAsmM\0" |
9403 | | /* 13809 */ "LOCGAsmM\0" |
9404 | | /* 13818 */ "STOCGAsmM\0" |
9405 | | /* 13828 */ "JGAsmM\0" |
9406 | | /* 13835 */ "LOCFHAsmM\0" |
9407 | | /* 13845 */ "STOCFHAsmM\0" |
9408 | | /* 13856 */ "BIAsmM\0" |
9409 | | /* 13863 */ "LOCHIAsmM\0" |
9410 | | /* 13873 */ "LOCGHIAsmM\0" |
9411 | | /* 13884 */ "LOCHHIAsmM\0" |
9412 | | /* 13895 */ "JAsmM\0" |
9413 | | /* 13901 */ "BRAsmM\0" |
9414 | | /* 13908 */ "LOCRAsmM\0" |
9415 | | /* 13917 */ "LOCGRAsmM\0" |
9416 | | /* 13927 */ "SELGRAsmM\0" |
9417 | | /* 13937 */ "LOCFHRAsmM\0" |
9418 | | /* 13948 */ "SELFHRAsmM\0" |
9419 | | /* 13959 */ "SELRAsmM\0" |
9420 | | /* 13968 */ "LAN\0" |
9421 | | /* 13972 */ "G_INTRINSIC_ROUNDEVEN\0" |
9422 | | /* 13994 */ "VCFN\0" |
9423 | | /* 13999 */ "RISBGN\0" |
9424 | | /* 14006 */ "G_ASSERT_ALIGN\0" |
9425 | | /* 14021 */ "G_FCOPYSIGN\0" |
9426 | | /* 14033 */ "ALSIHN\0" |
9427 | | /* 14040 */ "MVCIN\0" |
9428 | | /* 14046 */ "TBEGIN\0" |
9429 | | /* 14053 */ "PGIN\0" |
9430 | | /* 14058 */ "VFMIN\0" |
9431 | | /* 14064 */ "G_VECREDUCE_FMIN\0" |
9432 | | /* 14081 */ "G_ATOMICRMW_FMIN\0" |
9433 | | /* 14098 */ "G_VECREDUCE_SMIN\0" |
9434 | | /* 14115 */ "G_SMIN\0" |
9435 | | /* 14122 */ "G_VECREDUCE_UMIN\0" |
9436 | | /* 14139 */ "G_UMIN\0" |
9437 | | /* 14146 */ "ATOMIC_LOADW_UMIN\0" |
9438 | | /* 14164 */ "G_ATOMICRMW_UMIN\0" |
9439 | | /* 14181 */ "ATOMIC_LOADW_MIN\0" |
9440 | | /* 14198 */ "G_ATOMICRMW_MIN\0" |
9441 | | /* 14214 */ "G_FSIN\0" |
9442 | | /* 14221 */ "VMN\0" |
9443 | | /* 14225 */ "VNN\0" |
9444 | | /* 14229 */ "CFI_INSTRUCTION\0" |
9445 | | /* 14245 */ "MVN\0" |
9446 | | /* 14249 */ "ADJCALLSTACKDOWN\0" |
9447 | | /* 14266 */ "LAO\0" |
9448 | | /* 14270 */ "VMAO\0" |
9449 | | /* 14275 */ "G_SSUBO\0" |
9450 | | /* 14283 */ "G_USUBO\0" |
9451 | | /* 14291 */ "G_SADDO\0" |
9452 | | /* 14299 */ "G_UADDO\0" |
9453 | | /* 14307 */ "JUMP_TABLE_DEBUG_INFO\0" |
9454 | | /* 14329 */ "VMALO\0" |
9455 | | /* 14335 */ "VMLO\0" |
9456 | | /* 14340 */ "PLO\0" |
9457 | | /* 14344 */ "G_SMULO\0" |
9458 | | /* 14352 */ "G_UMULO\0" |
9459 | | /* 14360 */ "PCKMO\0" |
9460 | | /* 14366 */ "VMO\0" |
9461 | | /* 14370 */ "PPNO\0" |
9462 | | /* 14375 */ "PRNO\0" |
9463 | | /* 14380 */ "VNO\0" |
9464 | | /* 14384 */ "BAsmNO\0" |
9465 | | /* 14391 */ "LOCAsmNO\0" |
9466 | | /* 14400 */ "STOCAsmNO\0" |
9467 | | /* 14410 */ "LOCGAsmNO\0" |
9468 | | /* 14420 */ "STOCGAsmNO\0" |
9469 | | /* 14431 */ "JGAsmNO\0" |
9470 | | /* 14439 */ "LOCFHAsmNO\0" |
9471 | | /* 14450 */ "STOCFHAsmNO\0" |
9472 | | /* 14462 */ "BIAsmNO\0" |
9473 | | /* 14470 */ "LOCHIAsmNO\0" |
9474 | | /* 14481 */ "LOCGHIAsmNO\0" |
9475 | | /* 14493 */ "LOCHHIAsmNO\0" |
9476 | | /* 14505 */ "JAsmNO\0" |
9477 | | /* 14512 */ "BRAsmNO\0" |
9478 | | /* 14520 */ "LOCRAsmNO\0" |
9479 | | /* 14530 */ "LOCGRAsmNO\0" |
9480 | | /* 14541 */ "SELGRAsmNO\0" |
9481 | | /* 14552 */ "LOCFHRAsmNO\0" |
9482 | | /* 14564 */ "SELFHRAsmNO\0" |
9483 | | /* 14576 */ "SELRAsmNO\0" |
9484 | | /* 14586 */ "TROO\0" |
9485 | | /* 14591 */ "PFPO\0" |
9486 | | /* 14596 */ "G_BZERO\0" |
9487 | | /* 14604 */ "VZERO\0" |
9488 | | /* 14610 */ "VFPSO\0" |
9489 | | /* 14616 */ "TRTO\0" |
9490 | | /* 14621 */ "MVO\0" |
9491 | | /* 14625 */ "BAsmO\0" |
9492 | | /* 14631 */ "LOCAsmO\0" |
9493 | | /* 14639 */ "STOCAsmO\0" |
9494 | | /* 14648 */ "LOCGAsmO\0" |
9495 | | /* 14657 */ "STOCGAsmO\0" |
9496 | | /* 14667 */ "JGAsmO\0" |
9497 | | /* 14674 */ "LOCFHAsmO\0" |
9498 | | /* 14684 */ "STOCFHAsmO\0" |
9499 | | /* 14695 */ "BIAsmO\0" |
9500 | | /* 14702 */ "LOCHIAsmO\0" |
9501 | | /* 14712 */ "LOCGHIAsmO\0" |
9502 | | /* 14723 */ "LOCHHIAsmO\0" |
9503 | | /* 14734 */ "JAsmO\0" |
9504 | | /* 14740 */ "BRAsmO\0" |
9505 | | /* 14747 */ "LOCRAsmO\0" |
9506 | | /* 14756 */ "LOCGRAsmO\0" |
9507 | | /* 14766 */ "SELGRAsmO\0" |
9508 | | /* 14776 */ "LOCFHRAsmO\0" |
9509 | | /* 14787 */ "SELFHRAsmO\0" |
9510 | | /* 14798 */ "SELRAsmO\0" |
9511 | | /* 14807 */ "STACKMAP\0" |
9512 | | /* 14816 */ "G_ATOMICRMW_UDEC_WRAP\0" |
9513 | | /* 14838 */ "G_ATOMICRMW_UINC_WRAP\0" |
9514 | | /* 14860 */ "STAP\0" |
9515 | | /* 14865 */ "VAP\0" |
9516 | | /* 14869 */ "G_BSWAP\0" |
9517 | | /* 14877 */ "ZAP\0" |
9518 | | /* 14881 */ "MVCP\0" |
9519 | | /* 14886 */ "VSCHDP\0" |
9520 | | /* 14893 */ "STIDP\0" |
9521 | | /* 14899 */ "RDP\0" |
9522 | | /* 14903 */ "VSDP\0" |
9523 | | /* 14908 */ "VDP\0" |
9524 | | /* 14912 */ "VCLZDP\0" |
9525 | | /* 14919 */ "VLREP\0" |
9526 | | /* 14925 */ "VLBRREP\0" |
9527 | | /* 14933 */ "VREP\0" |
9528 | | /* 14938 */ "VCLFP\0" |
9529 | | /* 14944 */ "G_SITOFP\0" |
9530 | | /* 14953 */ "G_UITOFP\0" |
9531 | | /* 14962 */ "VCSFP\0" |
9532 | | /* 14968 */ "SIGP\0" |
9533 | | /* 14973 */ "VLVGP\0" |
9534 | | /* 14979 */ "RCHP\0" |
9535 | | /* 14984 */ "VSCHP\0" |
9536 | | /* 14990 */ "VSCSHP\0" |
9537 | | /* 14997 */ "VLIP\0" |
9538 | | /* 15002 */ "VLP\0" |
9539 | | /* 15006 */ "G_FCMP\0" |
9540 | | /* 15013 */ "G_ICMP\0" |
9541 | | /* 15020 */ "VMP\0" |
9542 | | /* 15024 */ "BAsmNP\0" |
9543 | | /* 15031 */ "LOCAsmNP\0" |
9544 | | /* 15040 */ "STOCAsmNP\0" |
9545 | | /* 15050 */ "LOCGAsmNP\0" |
9546 | | /* 15060 */ "STOCGAsmNP\0" |
9547 | | /* 15071 */ "JGAsmNP\0" |
9548 | | /* 15079 */ "LOCFHAsmNP\0" |
9549 | | /* 15090 */ "STOCFHAsmNP\0" |
9550 | | /* 15102 */ "BIAsmNP\0" |
9551 | | /* 15110 */ "LOCHIAsmNP\0" |
9552 | | /* 15121 */ "LOCGHIAsmNP\0" |
9553 | | /* 15133 */ "LOCHHIAsmNP\0" |
9554 | | /* 15145 */ "JAsmNP\0" |
9555 | | /* 15152 */ "BRAsmNP\0" |
9556 | | /* 15160 */ "LOCRAsmNP\0" |
9557 | | /* 15170 */ "LOCGRAsmNP\0" |
9558 | | /* 15181 */ "SELGRAsmNP\0" |
9559 | | /* 15192 */ "LOCFHRAsmNP\0" |
9560 | | /* 15204 */ "SELFHRAsmNP\0" |
9561 | | /* 15216 */ "SELRAsmNP\0" |
9562 | | /* 15226 */ "G_CTPOP\0" |
9563 | | /* 15234 */ "VPSOP\0" |
9564 | | /* 15240 */ "PATCHABLE_OP\0" |
9565 | | /* 15253 */ "FAULTING_OP\0" |
9566 | | /* 15265 */ "BPP\0" |
9567 | | /* 15269 */ "LPP\0" |
9568 | | /* 15273 */ "BPRP\0" |
9569 | | /* 15278 */ "VSRP\0" |
9570 | | /* 15283 */ "VRP\0" |
9571 | | /* 15287 */ "LASP\0" |
9572 | | /* 15292 */ "CSP\0" |
9573 | | /* 15296 */ "VSCHSP\0" |
9574 | | /* 15303 */ "VMSP\0" |
9575 | | /* 15308 */ "VSP\0" |
9576 | | /* 15312 */ "VTP\0" |
9577 | | /* 15316 */ "ADJCALLSTACKUP\0" |
9578 | | /* 15331 */ "PREALLOCATED_SETUP\0" |
9579 | | /* 15350 */ "G_FLDEXP\0" |
9580 | | /* 15359 */ "G_STRICT_FLDEXP\0" |
9581 | | /* 15375 */ "G_FEXP\0" |
9582 | | /* 15382 */ "G_FFREXP\0" |
9583 | | /* 15391 */ "VSCHXP\0" |
9584 | | /* 15398 */ "BAsmP\0" |
9585 | | /* 15404 */ "LOCAsmP\0" |
9586 | | /* 15412 */ "STOCAsmP\0" |
9587 | | /* 15421 */ "LOCGAsmP\0" |
9588 | | /* 15430 */ "STOCGAsmP\0" |
9589 | | /* 15440 */ "JGAsmP\0" |
9590 | | /* 15447 */ "LOCFHAsmP\0" |
9591 | | /* 15457 */ "STOCFHAsmP\0" |
9592 | | /* 15468 */ "BIAsmP\0" |
9593 | | /* 15475 */ "LOCHIAsmP\0" |
9594 | | /* 15485 */ "LOCGHIAsmP\0" |
9595 | | /* 15496 */ "LOCHHIAsmP\0" |
9596 | | /* 15507 */ "JAsmP\0" |
9597 | | /* 15513 */ "BRAsmP\0" |
9598 | | /* 15520 */ "LOCRAsmP\0" |
9599 | | /* 15529 */ "LOCGRAsmP\0" |
9600 | | /* 15539 */ "SELGRAsmP\0" |
9601 | | /* 15549 */ "LOCFHRAsmP\0" |
9602 | | /* 15560 */ "SELFHRAsmP\0" |
9603 | | /* 15571 */ "SELRAsmP\0" |
9604 | | /* 15580 */ "VAQ\0" |
9605 | | /* 15584 */ "VACQ\0" |
9606 | | /* 15589 */ "VACCQ\0" |
9607 | | /* 15595 */ "VACCCQ\0" |
9608 | | /* 15602 */ "VCEQ\0" |
9609 | | /* 15607 */ "VSBCBIQ\0" |
9610 | | /* 15615 */ "VSCBIQ\0" |
9611 | | /* 15622 */ "VSBIQ\0" |
9612 | | /* 15628 */ "VSUMQ\0" |
9613 | | /* 15634 */ "LPQ\0" |
9614 | | /* 15638 */ "STPQ\0" |
9615 | | /* 15643 */ "VLBRQ\0" |
9616 | | /* 15649 */ "VSTBRQ\0" |
9617 | | /* 15656 */ "VFSQ\0" |
9618 | | /* 15661 */ "VSQ\0" |
9619 | | /* 15665 */ "LBEAR\0" |
9620 | | /* 15671 */ "STBEAR\0" |
9621 | | /* 15678 */ "EPAR\0" |
9622 | | /* 15683 */ "ESAR\0" |
9623 | | /* 15688 */ "SSAR\0" |
9624 | | /* 15693 */ "TAR\0" |
9625 | | /* 15697 */ "ATOMIC_LOADW_AR\0" |
9626 | | /* 15713 */ "MADBR\0" |
9627 | | /* 15719 */ "LCDBR\0" |
9628 | | /* 15725 */ "DDBR\0" |
9629 | | /* 15730 */ "LEDBR\0" |
9630 | | /* 15736 */ "CFDBR\0" |
9631 | | /* 15742 */ "CLFDBR\0" |
9632 | | /* 15749 */ "CGDBR\0" |
9633 | | /* 15755 */ "CLGDBR\0" |
9634 | | /* 15762 */ "DIDBR\0" |
9635 | | /* 15768 */ "FIDBR\0" |
9636 | | /* 15774 */ "KDBR\0" |
9637 | | /* 15779 */ "MDBR\0" |
9638 | | /* 15784 */ "LNDBR\0" |
9639 | | /* 15790 */ "LPDBR\0" |
9640 | | /* 15796 */ "SQDBR\0" |
9641 | | /* 15802 */ "MSDBR\0" |
9642 | | /* 15808 */ "LTDBR\0" |
9643 | | /* 15814 */ "LXDBR\0" |
9644 | | /* 15820 */ "MXDBR\0" |
9645 | | /* 15826 */ "MAEBR\0" |
9646 | | /* 15832 */ "LCEBR\0" |
9647 | | /* 15838 */ "LDEBR\0" |
9648 | | /* 15844 */ "MDEBR\0" |
9649 | | /* 15850 */ "MEEBR\0" |
9650 | | /* 15856 */ "CFEBR\0" |
9651 | | /* 15862 */ "CLFEBR\0" |
9652 | | /* 15869 */ "CGEBR\0" |
9653 | | /* 15875 */ "CLGEBR\0" |
9654 | | /* 15882 */ "DIEBR\0" |
9655 | | /* 15888 */ "FIEBR\0" |
9656 | | /* 15894 */ "KEBR\0" |
9657 | | /* 15899 */ "LNEBR\0" |
9658 | | /* 15905 */ "LPEBR\0" |
9659 | | /* 15911 */ "SQEBR\0" |
9660 | | /* 15917 */ "MSEBR\0" |
9661 | | /* 15923 */ "LTEBR\0" |
9662 | | /* 15929 */ "LXEBR\0" |
9663 | | /* 15935 */ "CDFBR\0" |
9664 | | /* 15941 */ "CEFBR\0" |
9665 | | /* 15947 */ "CDLFBR\0" |
9666 | | /* 15954 */ "CELFBR\0" |
9667 | | /* 15961 */ "CXLFBR\0" |
9668 | | /* 15968 */ "CXFBR\0" |
9669 | | /* 15974 */ "CDGBR\0" |
9670 | | /* 15980 */ "CEGBR\0" |
9671 | | /* 15986 */ "CDLGBR\0" |
9672 | | /* 15993 */ "CELGBR\0" |
9673 | | /* 16000 */ "CXLGBR\0" |
9674 | | /* 16007 */ "CXGBR\0" |
9675 | | /* 16013 */ "SLBR\0" |
9676 | | /* 16018 */ "VLBR\0" |
9677 | | /* 16023 */ "VSTBR\0" |
9678 | | /* 16029 */ "AXBR\0" |
9679 | | /* 16034 */ "LCXBR\0" |
9680 | | /* 16040 */ "LDXBR\0" |
9681 | | /* 16046 */ "LEXBR\0" |
9682 | | /* 16052 */ "CFXBR\0" |
9683 | | /* 16058 */ "CLFXBR\0" |
9684 | | /* 16065 */ "CGXBR\0" |
9685 | | /* 16071 */ "CLGXBR\0" |
9686 | | /* 16078 */ "FIXBR\0" |
9687 | | /* 16084 */ "KXBR\0" |
9688 | | /* 16089 */ "MXBR\0" |
9689 | | /* 16094 */ "LNXBR\0" |
9690 | | /* 16100 */ "LPXBR\0" |
9691 | | /* 16106 */ "SQXBR\0" |
9692 | | /* 16112 */ "SXBR\0" |
9693 | | /* 16117 */ "LTXBR\0" |
9694 | | /* 16123 */ "G_BR\0" |
9695 | | /* 16128 */ "INLINEASM_BR\0" |
9696 | | /* 16141 */ "CallBR\0" |
9697 | | /* 16148 */ "CallBCR\0" |
9698 | | /* 16156 */ "LLGCR\0" |
9699 | | /* 16162 */ "ALCR\0" |
9700 | | /* 16167 */ "LLCR\0" |
9701 | | /* 16172 */ "LOCR\0" |
9702 | | /* 16177 */ "MADR\0" |
9703 | | /* 16182 */ "TBDR\0" |
9704 | | /* 16187 */ "LCDR\0" |
9705 | | /* 16192 */ "G_BLOCK_ADDR\0" |
9706 | | /* 16205 */ "TBEDR\0" |
9707 | | /* 16211 */ "LEDR\0" |
9708 | | /* 16216 */ "CFDR\0" |
9709 | | /* 16221 */ "CGDR\0" |
9710 | | /* 16226 */ "LGDR\0" |
9711 | | /* 16231 */ "THDR\0" |
9712 | | /* 16236 */ "FIDR\0" |
9713 | | /* 16241 */ "LDR\0" |
9714 | | /* 16245 */ "MDR\0" |
9715 | | /* 16249 */ "LNDR\0" |
9716 | | /* 16254 */ "LPDR\0" |
9717 | | /* 16259 */ "SQDR\0" |
9718 | | /* 16264 */ "LRDR\0" |
9719 | | /* 16269 */ "MSDR\0" |
9720 | | /* 16274 */ "LTDR\0" |
9721 | | /* 16279 */ "LXDR\0" |
9722 | | /* 16284 */ "MXDR\0" |
9723 | | /* 16289 */ "LZDR\0" |
9724 | | /* 16294 */ "MAER\0" |
9725 | | /* 16299 */ "LCER\0" |
9726 | | /* 16304 */ "THDER\0" |
9727 | | /* 16310 */ "LDER\0" |
9728 | | /* 16315 */ "MDER\0" |
9729 | | /* 16320 */ "MEER\0" |
9730 | | /* 16325 */ "CFER\0" |
9731 | | /* 16330 */ "LFER\0" |
9732 | | /* 16335 */ "CGER\0" |
9733 | | /* 16340 */ "HER\0" |
9734 | | /* 16344 */ "FIER\0" |
9735 | | /* 16349 */ "MEMBARRIER\0" |
9736 | | /* 16360 */ "G_CONSTANT_FOLD_BARRIER\0" |
9737 | | /* 16384 */ "VLER\0" |
9738 | | /* 16389 */ "MER\0" |
9739 | | /* 16393 */ "LNER\0" |
9740 | | /* 16398 */ "LPER\0" |
9741 | | /* 16403 */ "SQER\0" |
9742 | | /* 16408 */ "LRER\0" |
9743 | | /* 16413 */ "MSER\0" |
9744 | | /* 16418 */ "LTER\0" |
9745 | | /* 16423 */ "PATCHABLE_FUNCTION_ENTER\0" |
9746 | | /* 16448 */ "G_READCYCLECOUNTER\0" |
9747 | | /* 16467 */ "G_READ_REGISTER\0" |
9748 | | /* 16483 */ "G_WRITE_REGISTER\0" |
9749 | | /* 16500 */ "VSTER\0" |
9750 | | /* 16506 */ "LXER\0" |
9751 | | /* 16511 */ "LZER\0" |
9752 | | /* 16516 */ "LCDFR\0" |
9753 | | /* 16522 */ "LNDFR\0" |
9754 | | /* 16528 */ "LPDFR\0" |
9755 | | /* 16534 */ "CEFR\0" |
9756 | | /* 16539 */ "LEFR\0" |
9757 | | /* 16544 */ "AGFR\0" |
9758 | | /* 16549 */ "LCGFR\0" |
9759 | | /* 16555 */ "ALGFR\0" |
9760 | | /* 16561 */ "CLGFR\0" |
9761 | | /* 16567 */ "LLGFR\0" |
9762 | | /* 16573 */ "SLGFR\0" |
9763 | | /* 16579 */ "LNGFR\0" |
9764 | | /* 16585 */ "LPGFR\0" |
9765 | | /* 16591 */ "DSGFR\0" |
9766 | | /* 16597 */ "MSGFR\0" |
9767 | | /* 16603 */ "LTGFR\0" |
9768 | | /* 16609 */ "CXFR\0" |
9769 | | /* 16614 */ "AGR\0" |
9770 | | /* 16618 */ "SLBGR\0" |
9771 | | /* 16624 */ "ALCGR\0" |
9772 | | /* 16630 */ "LOCGR\0" |
9773 | | /* 16636 */ "CDGR\0" |
9774 | | /* 16641 */ "LDGR\0" |
9775 | | /* 16646 */ "CEGR\0" |
9776 | | /* 16651 */ "ALGR\0" |
9777 | | /* 16656 */ "CLGR\0" |
9778 | | /* 16661 */ "DLGR\0" |
9779 | | /* 16666 */ "SELGR\0" |
9780 | | /* 16672 */ "MLGR\0" |
9781 | | /* 16677 */ "SLGR\0" |
9782 | | /* 16682 */ "LNGR\0" |
9783 | | /* 16687 */ "FLOGR\0" |
9784 | | /* 16693 */ "LPGR\0" |
9785 | | /* 16698 */ "DSGR\0" |
9786 | | /* 16703 */ "MSGR\0" |
9787 | | /* 16708 */ "BCTGR\0" |
9788 | | /* 16714 */ "LTGR\0" |
9789 | | /* 16719 */ "LRVGR\0" |
9790 | | /* 16725 */ "CXGR\0" |
9791 | | /* 16730 */ "LOCFHR\0" |
9792 | | /* 16737 */ "SELFHR\0" |
9793 | | /* 16744 */ "LLGHR\0" |
9794 | | /* 16750 */ "CHHR\0" |
9795 | | /* 16755 */ "AHHHR\0" |
9796 | | /* 16761 */ "ALHHHR\0" |
9797 | | /* 16768 */ "SLHHHR\0" |
9798 | | /* 16775 */ "SHHHR\0" |
9799 | | /* 16781 */ "CLHHR\0" |
9800 | | /* 16787 */ "LLHR\0" |
9801 | | /* 16792 */ "G_ASHR\0" |
9802 | | /* 16799 */ "G_FSHR\0" |
9803 | | /* 16806 */ "G_LSHR\0" |
9804 | | /* 16813 */ "MAYHR\0" |
9805 | | /* 16819 */ "MYHR\0" |
9806 | | /* 16824 */ "EPAIR\0" |
9807 | | /* 16830 */ "ESAIR\0" |
9808 | | /* 16836 */ "SSAIR\0" |
9809 | | /* 16842 */ "BAKR\0" |
9810 | | /* 16847 */ "BALR\0" |
9811 | | /* 16852 */ "CLR\0" |
9812 | | /* 16856 */ "DLR\0" |
9813 | | /* 16860 */ "SELR\0" |
9814 | | /* 16865 */ "VFLR\0" |
9815 | | /* 16870 */ "CHLR\0" |
9816 | | /* 16875 */ "AHHLR\0" |
9817 | | /* 16881 */ "ALHHLR\0" |
9818 | | /* 16888 */ "SLHHLR\0" |
9819 | | /* 16895 */ "SHHLR\0" |
9820 | | /* 16901 */ "CLHLR\0" |
9821 | | /* 16907 */ "MLR\0" |
9822 | | /* 16911 */ "VLRLR\0" |
9823 | | /* 16917 */ "VSTRLR\0" |
9824 | | /* 16924 */ "SLR\0" |
9825 | | /* 16928 */ "VLR\0" |
9826 | | /* 16932 */ "MAYLR\0" |
9827 | | /* 16938 */ "MYLR\0" |
9828 | | /* 16943 */ "MR\0" |
9829 | | /* 16946 */ "LNR\0" |
9830 | | /* 16950 */ "ATOMIC_LOADW_NR\0" |
9831 | | /* 16966 */ "G_FFLOOR\0" |
9832 | | /* 16975 */ "G_BUILD_VECTOR\0" |
9833 | | /* 16990 */ "G_SHUFFLE_VECTOR\0" |
9834 | | /* 17007 */ "G_VECREDUCE_XOR\0" |
9835 | | /* 17023 */ "G_XOR\0" |
9836 | | /* 17029 */ "G_ATOMICRMW_XOR\0" |
9837 | | /* 17045 */ "G_VECREDUCE_OR\0" |
9838 | | /* 17060 */ "G_OR\0" |
9839 | | /* 17065 */ "ATOMIC_LOADW_OR\0" |
9840 | | /* 17081 */ "G_ATOMICRMW_OR\0" |
9841 | | /* 17096 */ "LPR\0" |
9842 | | /* 17100 */ "VSRPR\0" |
9843 | | /* 17106 */ "InsnVRR\0" |
9844 | | /* 17114 */ "InsnRR\0" |
9845 | | /* 17121 */ "CallBASR\0" |
9846 | | /* 17130 */ "SFASR\0" |
9847 | | /* 17136 */ "MSR\0" |
9848 | | /* 17140 */ "ATOMIC_LOADW_SR\0" |
9849 | | /* 17156 */ "BCTR\0" |
9850 | | /* 17161 */ "ECCTR\0" |
9851 | | /* 17167 */ "SCCTR\0" |
9852 | | /* 17173 */ "KMCTR\0" |
9853 | | /* 17179 */ "EPCTR\0" |
9854 | | /* 17185 */ "SPCTR\0" |
9855 | | /* 17191 */ "QADTR\0" |
9856 | | /* 17197 */ "CDTR\0" |
9857 | | /* 17202 */ "DDTR\0" |
9858 | | /* 17207 */ "CEDTR\0" |
9859 | | /* 17213 */ "EEDTR\0" |
9860 | | /* 17219 */ "IEDTR\0" |
9861 | | /* 17225 */ "LEDTR\0" |
9862 | | /* 17231 */ "CFDTR\0" |
9863 | | /* 17237 */ "CLFDTR\0" |
9864 | | /* 17244 */ "CGDTR\0" |
9865 | | /* 17250 */ "CLGDTR\0" |
9866 | | /* 17257 */ "FIDTR\0" |
9867 | | /* 17263 */ "KDTR\0" |
9868 | | /* 17268 */ "MDTR\0" |
9869 | | /* 17273 */ "RRDTR\0" |
9870 | | /* 17279 */ "CSDTR\0" |
9871 | | /* 17285 */ "ESDTR\0" |
9872 | | /* 17291 */ "LTDTR\0" |
9873 | | /* 17297 */ "CUDTR\0" |
9874 | | /* 17303 */ "LXDTR\0" |
9875 | | /* 17309 */ "LDETR\0" |
9876 | | /* 17315 */ "CDFTR\0" |
9877 | | /* 17321 */ "CDLFTR\0" |
9878 | | /* 17328 */ "CXLFTR\0" |
9879 | | /* 17335 */ "CXFTR\0" |
9880 | | /* 17341 */ "CDGTR\0" |
9881 | | /* 17347 */ "CDLGTR\0" |
9882 | | /* 17354 */ "LLGTR\0" |
9883 | | /* 17360 */ "CXLGTR\0" |
9884 | | /* 17367 */ "CXGTR\0" |
9885 | | /* 17373 */ "LTR\0" |
9886 | | /* 17377 */ "G_ROTR\0" |
9887 | | /* 17384 */ "G_INTTOPTR\0" |
9888 | | /* 17395 */ "TRTR\0" |
9889 | | /* 17400 */ "CDSTR\0" |
9890 | | /* 17406 */ "VISTR\0" |
9891 | | /* 17412 */ "CXSTR\0" |
9892 | | /* 17418 */ "CDUTR\0" |
9893 | | /* 17424 */ "CXUTR\0" |
9894 | | /* 17430 */ "QAXTR\0" |
9895 | | /* 17436 */ "CXTR\0" |
9896 | | /* 17441 */ "LDXTR\0" |
9897 | | /* 17447 */ "CEXTR\0" |
9898 | | /* 17453 */ "EEXTR\0" |
9899 | | /* 17459 */ "IEXTR\0" |
9900 | | /* 17465 */ "CFXTR\0" |
9901 | | /* 17471 */ "CLFXTR\0" |
9902 | | /* 17478 */ "CGXTR\0" |
9903 | | /* 17484 */ "CLGXTR\0" |
9904 | | /* 17491 */ "FIXTR\0" |
9905 | | /* 17497 */ "KXTR\0" |
9906 | | /* 17502 */ "MXTR\0" |
9907 | | /* 17507 */ "RRXTR\0" |
9908 | | /* 17513 */ "CSXTR\0" |
9909 | | /* 17519 */ "ESXTR\0" |
9910 | | /* 17525 */ "LTXTR\0" |
9911 | | /* 17531 */ "CUXTR\0" |
9912 | | /* 17537 */ "AUR\0" |
9913 | | /* 17541 */ "SUR\0" |
9914 | | /* 17545 */ "LRVR\0" |
9915 | | /* 17550 */ "AWR\0" |
9916 | | /* 17554 */ "SWR\0" |
9917 | | /* 17558 */ "AXR\0" |
9918 | | /* 17562 */ "LCXR\0" |
9919 | | /* 17567 */ "LDXR\0" |
9920 | | /* 17572 */ "LEXR\0" |
9921 | | /* 17577 */ "CFXR\0" |
9922 | | /* 17582 */ "CGXR\0" |
9923 | | /* 17587 */ "FIXR\0" |
9924 | | /* 17592 */ "LXR\0" |
9925 | | /* 17596 */ "MXR\0" |
9926 | | /* 17600 */ "LNXR\0" |
9927 | | /* 17605 */ "LPXR\0" |
9928 | | /* 17610 */ "SQXR\0" |
9929 | | /* 17615 */ "SXR\0" |
9930 | | /* 17619 */ "LTXR\0" |
9931 | | /* 17624 */ "LZXR\0" |
9932 | | /* 17629 */ "ATOMIC_LOADW_XR\0" |
9933 | | /* 17645 */ "MAYR\0" |
9934 | | /* 17650 */ "MYR\0" |
9935 | | /* 17654 */ "VPKZR\0" |
9936 | | /* 17660 */ "BAS\0" |
9937 | | /* 17664 */ "LFAS\0" |
9938 | | /* 17669 */ "BRAS\0" |
9939 | | /* 17674 */ "G_FABS\0" |
9940 | | /* 17681 */ "G_ABS\0" |
9941 | | /* 17687 */ "VSTRCBS\0" |
9942 | | /* 17695 */ "VFCEDBS\0" |
9943 | | /* 17703 */ "WFCEDBS\0" |
9944 | | /* 17711 */ "VFCHEDBS\0" |
9945 | | /* 17720 */ "WFCHEDBS\0" |
9946 | | /* 17729 */ "VFKHEDBS\0" |
9947 | | /* 17738 */ "WFKHEDBS\0" |
9948 | | /* 17747 */ "VFKEDBS\0" |
9949 | | /* 17755 */ "WFKEDBS\0" |
9950 | | /* 17763 */ "VFCHDBS\0" |
9951 | | /* 17771 */ "WFCHDBS\0" |
9952 | | /* 17779 */ "VFKHDBS\0" |
9953 | | /* 17787 */ "WFKHDBS\0" |
9954 | | /* 17795 */ "VFAEBS\0" |
9955 | | /* 17802 */ "VFEEBS\0" |
9956 | | /* 17809 */ "VFENEBS\0" |
9957 | | /* 17817 */ "VCHBS\0" |
9958 | | /* 17823 */ "VCHLBS\0" |
9959 | | /* 17830 */ "VCEQBS\0" |
9960 | | /* 17837 */ "VISTRBS\0" |
9961 | | /* 17845 */ "VFCESBS\0" |
9962 | | /* 17853 */ "WFCESBS\0" |
9963 | | /* 17861 */ "VFCHESBS\0" |
9964 | | /* 17870 */ "WFCHESBS\0" |
9965 | | /* 17879 */ "VFKHESBS\0" |
9966 | | /* 17888 */ "WFKHESBS\0" |
9967 | | /* 17897 */ "VFKESBS\0" |
9968 | | /* 17905 */ "WFKESBS\0" |
9969 | | /* 17913 */ "VFCHSBS\0" |
9970 | | /* 17921 */ "WFCHSBS\0" |
9971 | | /* 17929 */ "VFKHSBS\0" |
9972 | | /* 17937 */ "WFKHSBS\0" |
9973 | | /* 17945 */ "WFCEXBS\0" |
9974 | | /* 17953 */ "WFCHEXBS\0" |
9975 | | /* 17962 */ "WFKHEXBS\0" |
9976 | | /* 17971 */ "WFKEXBS\0" |
9977 | | /* 17979 */ "WFCHXBS\0" |
9978 | | /* 17987 */ "WFKHXBS\0" |
9979 | | /* 17995 */ "VSTRCZBS\0" |
9980 | | /* 18004 */ "VFAEZBS\0" |
9981 | | /* 18012 */ "VFEEZBS\0" |
9982 | | /* 18020 */ "VFENEZBS\0" |
9983 | | /* 18029 */ "MVCS\0" |
9984 | | /* 18034 */ "CDS\0" |
9985 | | /* 18038 */ "G_UNMERGE_VALUES\0" |
9986 | | /* 18055 */ "G_MERGE_VALUES\0" |
9987 | | /* 18070 */ "VSTRCFS\0" |
9988 | | /* 18078 */ "VFAEFS\0" |
9989 | | /* 18085 */ "VFEEFS\0" |
9990 | | /* 18092 */ "VFENEFS\0" |
9991 | | /* 18100 */ "VCHFS\0" |
9992 | | /* 18106 */ "VCHLFS\0" |
9993 | | /* 18113 */ "VCEQFS\0" |
9994 | | /* 18120 */ "VISTRFS\0" |
9995 | | /* 18128 */ "VPKSFS\0" |
9996 | | /* 18135 */ "VPKLSFS\0" |
9997 | | /* 18143 */ "VFS\0" |
9998 | | /* 18147 */ "VSTRCZFS\0" |
9999 | | /* 18156 */ "VFAEZFS\0" |
10000 | | /* 18164 */ "VFEEZFS\0" |
10001 | | /* 18172 */ "VFENEZFS\0" |
10002 | | /* 18181 */ "VCHGS\0" |
10003 | | /* 18187 */ "VCHLGS\0" |
10004 | | /* 18194 */ "VCEQGS\0" |
10005 | | /* 18201 */ "VPKSGS\0" |
10006 | | /* 18208 */ "VPKLSGS\0" |
10007 | | /* 18216 */ "VSTRCHS\0" |
10008 | | /* 18224 */ "VFAEHS\0" |
10009 | | /* 18231 */ "VFEEHS\0" |
10010 | | /* 18238 */ "VFENEHS\0" |
10011 | | /* 18246 */ "VCHHS\0" |
10012 | | /* 18252 */ "VCHLHS\0" |
10013 | | /* 18259 */ "VCEQHS\0" |
10014 | | /* 18266 */ "VISTRHS\0" |
10015 | | /* 18274 */ "VPKSHS\0" |
10016 | | /* 18281 */ "VPKLSHS\0" |
10017 | | /* 18289 */ "VSTRCZHS\0" |
10018 | | /* 18298 */ "VFAEZHS\0" |
10019 | | /* 18306 */ "VFEEZHS\0" |
10020 | | /* 18314 */ "VFENEZHS\0" |
10021 | | /* 18323 */ "InsnRIS\0" |
10022 | | /* 18331 */ "VPKS\0" |
10023 | | /* 18336 */ "VPKLS\0" |
10024 | | /* 18342 */ "VFLLS\0" |
10025 | | /* 18348 */ "WFLLS\0" |
10026 | | /* 18354 */ "VFMS\0" |
10027 | | /* 18359 */ "VFNMS\0" |
10028 | | /* 18365 */ "G_FCOS\0" |
10029 | | /* 18372 */ "MVCOS\0" |
10030 | | /* 18378 */ "STCPS\0" |
10031 | | /* 18384 */ "VCFPS\0" |
10032 | | /* 18390 */ "G_CONCAT_VECTORS\0" |
10033 | | /* 18407 */ "InsnRRS\0" |
10034 | | /* 18415 */ "VSTRS\0" |
10035 | | /* 18421 */ "InsnVRS\0" |
10036 | | /* 18429 */ "InsnRS\0" |
10037 | | /* 18436 */ "COPY_TO_REGCLASS\0" |
10038 | | /* 18453 */ "G_IS_FPCLASS\0" |
10039 | | /* 18466 */ "G_ATOMIC_CMPXCHG_WITH_SUCCESS\0" |
10040 | | /* 18496 */ "InsnSS\0" |
10041 | | /* 18503 */ "G_INTRINSIC_W_SIDE_EFFECTS\0" |
10042 | | /* 18530 */ "G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS\0" |
10043 | | /* 18568 */ "VS\0" |
10044 | | /* 18571 */ "InsnS\0" |
10045 | | /* 18577 */ "LLGFAT\0" |
10046 | | /* 18584 */ "LGAT\0" |
10047 | | /* 18589 */ "LFHAT\0" |
10048 | | /* 18595 */ "LAT\0" |
10049 | | /* 18599 */ "G_SSUBSAT\0" |
10050 | | /* 18609 */ "G_USUBSAT\0" |
10051 | | /* 18619 */ "G_SADDSAT\0" |
10052 | | /* 18629 */ "G_UADDSAT\0" |
10053 | | /* 18639 */ "G_SSHLSAT\0" |
10054 | | /* 18649 */ "G_USHLSAT\0" |
10055 | | /* 18659 */ "G_SMULFIXSAT\0" |
10056 | | /* 18672 */ "G_UMULFIXSAT\0" |
10057 | | /* 18685 */ "G_SDIVFIXSAT\0" |
10058 | | /* 18698 */ "G_UDIVFIXSAT\0" |
10059 | | /* 18711 */ "LLGTAT\0" |
10060 | | /* 18718 */ "G_EXTRACT\0" |
10061 | | /* 18728 */ "BCT\0" |
10062 | | /* 18732 */ "G_SELECT\0" |
10063 | | /* 18741 */ "G_BRINDIRECT\0" |
10064 | | /* 18754 */ "VPOPCT\0" |
10065 | | /* 18761 */ "BRCT\0" |
10066 | | /* 18766 */ "TDCDT\0" |
10067 | | /* 18772 */ "TDGDT\0" |
10068 | | /* 18778 */ "SLDT\0" |
10069 | | /* 18783 */ "CPDT\0" |
10070 | | /* 18788 */ "SRDT\0" |
10071 | | /* 18793 */ "CZDT\0" |
10072 | | /* 18798 */ "TDCET\0" |
10073 | | /* 18804 */ "TDGET\0" |
10074 | | /* 18810 */ "PATCHABLE_RET\0" |
10075 | | /* 18824 */ "G_MEMSET\0" |
10076 | | /* 18833 */ "CLGT\0" |
10077 | | /* 18838 */ "LLGT\0" |
10078 | | /* 18843 */ "CIT\0" |
10079 | | /* 18847 */ "CLFIT\0" |
10080 | | /* 18853 */ "CGIT\0" |
10081 | | /* 18858 */ "CLGIT\0" |
10082 | | /* 18864 */ "PATCHABLE_FUNCTION_EXIT\0" |
10083 | | /* 18888 */ "G_BRJT\0" |
10084 | | /* 18895 */ "CLT\0" |
10085 | | /* 18899 */ "G_EXTRACT_VECTOR_ELT\0" |
10086 | | /* 18920 */ "G_INSERT_VECTOR_ELT\0" |
10087 | | /* 18940 */ "SRNMT\0" |
10088 | | /* 18946 */ "G_FCONSTANT\0" |
10089 | | /* 18958 */ "G_CONSTANT\0" |
10090 | | /* 18969 */ "POPCNT\0" |
10091 | | /* 18976 */ "G_INTRINSIC_CONVERGENT\0" |
10092 | | /* 18999 */ "STATEPOINT\0" |
10093 | | /* 19010 */ "PATCHPOINT\0" |
10094 | | /* 19021 */ "G_PTRTOINT\0" |
10095 | | /* 19032 */ "G_FRINT\0" |
10096 | | /* 19040 */ "G_INTRINSIC_LRINT\0" |
10097 | | /* 19058 */ "G_FNEARBYINT\0" |
10098 | | /* 19071 */ "GOT\0" |
10099 | | /* 19075 */ "TPROT\0" |
10100 | | /* 19081 */ "TROT\0" |
10101 | | /* 19086 */ "CDPT\0" |
10102 | | /* 19091 */ "SPT\0" |
10103 | | /* 19095 */ "STPT\0" |
10104 | | /* 19100 */ "UPT\0" |
10105 | | /* 19104 */ "CXPT\0" |
10106 | | /* 19109 */ "G_VASTART\0" |
10107 | | /* 19119 */ "LIFETIME_START\0" |
10108 | | /* 19134 */ "G_INVOKE_REGION_START\0" |
10109 | | /* 19156 */ "CRT\0" |
10110 | | /* 19160 */ "G_INSERT\0" |
10111 | | /* 19169 */ "CGRT\0" |
10112 | | /* 19174 */ "CLGRT\0" |
10113 | | /* 19180 */ "CLRT\0" |
10114 | | /* 19185 */ "TABORT\0" |
10115 | | /* 19192 */ "G_FSQRT\0" |
10116 | | /* 19200 */ "G_STRICT_FSQRT\0" |
10117 | | /* 19215 */ "TRT\0" |
10118 | | /* 19219 */ "G_BITCAST\0" |
10119 | | /* 19229 */ "G_ADDRSPACE_CAST\0" |
10120 | | /* 19246 */ "DBG_VALUE_LIST\0" |
10121 | | /* 19261 */ "CLST\0" |
10122 | | /* 19266 */ "SRST\0" |
10123 | | /* 19271 */ "CSST\0" |
10124 | | /* 19276 */ "MVST\0" |
10125 | | /* 19281 */ "TRTT\0" |
10126 | | /* 19286 */ "PGOUT\0" |
10127 | | /* 19292 */ "TDCXT\0" |
10128 | | /* 19298 */ "CallBASR_STACKEXT\0" |
10129 | | /* 19316 */ "G_FPEXT\0" |
10130 | | /* 19324 */ "G_SEXT\0" |
10131 | | /* 19331 */ "G_ASSERT_SEXT\0" |
10132 | | /* 19345 */ "G_ANYEXT\0" |
10133 | | /* 19354 */ "G_ZEXT\0" |
10134 | | /* 19361 */ "G_ASSERT_ZEXT\0" |
10135 | | /* 19375 */ "TDGXT\0" |
10136 | | /* 19381 */ "SLXT\0" |
10137 | | /* 19386 */ "CPXT\0" |
10138 | | /* 19391 */ "SRXT\0" |
10139 | | /* 19396 */ "CZXT\0" |
10140 | | /* 19401 */ "CDZT\0" |
10141 | | /* 19406 */ "CXZT\0" |
10142 | | /* 19411 */ "AU\0" |
10143 | | /* 19414 */ "CUTFU\0" |
10144 | | /* 19420 */ "UNPKU\0" |
10145 | | /* 19426 */ "CLCLU\0" |
10146 | | /* 19432 */ "MVCLU\0" |
10147 | | /* 19438 */ "InsnRILU\0" |
10148 | | /* 19447 */ "SU\0" |
10149 | | /* 19450 */ "SRSTU\0" |
10150 | | /* 19456 */ "VESRAV\0" |
10151 | | /* 19463 */ "VLGV\0" |
10152 | | /* 19468 */ "G_FDIV\0" |
10153 | | /* 19475 */ "G_STRICT_FDIV\0" |
10154 | | /* 19489 */ "G_SDIV\0" |
10155 | | /* 19496 */ "G_UDIV\0" |
10156 | | /* 19503 */ "VERLLV\0" |
10157 | | /* 19510 */ "VESRLV\0" |
10158 | | /* 19517 */ "VESLV\0" |
10159 | | /* 19523 */ "G_GET_FPENV\0" |
10160 | | /* 19535 */ "G_RESET_FPENV\0" |
10161 | | /* 19549 */ "G_SET_FPENV\0" |
10162 | | /* 19561 */ "LRV\0" |
10163 | | /* 19565 */ "STRV\0" |
10164 | | /* 19570 */ "InsnVRV\0" |
10165 | | /* 19578 */ "AW\0" |
10166 | | /* 19581 */ "VMALHW\0" |
10167 | | /* 19588 */ "VMLHW\0" |
10168 | | /* 19594 */ "VUPLHW\0" |
10169 | | /* 19601 */ "G_FPOW\0" |
10170 | | /* 19608 */ "ATOMIC_SWAPW\0" |
10171 | | /* 19621 */ "ATOMIC_CMP_SWAPW\0" |
10172 | | /* 19638 */ "STCRW\0" |
10173 | | /* 19644 */ "EPSW\0" |
10174 | | /* 19649 */ "LPSW\0" |
10175 | | /* 19654 */ "LAX\0" |
10176 | | /* 19658 */ "VFMAX\0" |
10177 | | /* 19664 */ "G_VECREDUCE_FMAX\0" |
10178 | | /* 19681 */ "G_ATOMICRMW_FMAX\0" |
10179 | | /* 19698 */ "G_VECREDUCE_SMAX\0" |
10180 | | /* 19715 */ "G_SMAX\0" |
10181 | | /* 19722 */ "G_VECREDUCE_UMAX\0" |
10182 | | /* 19739 */ "G_UMAX\0" |
10183 | | /* 19746 */ "ATOMIC_LOADW_UMAX\0" |
10184 | | /* 19764 */ "G_ATOMICRMW_UMAX\0" |
10185 | | /* 19781 */ "ATOMIC_LOADW_MAX\0" |
10186 | | /* 19798 */ "G_ATOMICRMW_MAX\0" |
10187 | | /* 19814 */ "G_FRAME_INDEX\0" |
10188 | | /* 19828 */ "G_SBFX\0" |
10189 | | /* 19835 */ "G_UBFX\0" |
10190 | | /* 19842 */ "G_SMULFIX\0" |
10191 | | /* 19852 */ "G_UMULFIX\0" |
10192 | | /* 19862 */ "G_SDIVFIX\0" |
10193 | | /* 19872 */ "G_UDIVFIX\0" |
10194 | | /* 19882 */ "LX\0" |
10195 | | /* 19885 */ "VMX\0" |
10196 | | /* 19889 */ "VNX\0" |
10197 | | /* 19893 */ "SPX\0" |
10198 | | /* 19897 */ "STPX\0" |
10199 | | /* 19902 */ "WFLRX\0" |
10200 | | /* 19908 */ "InsnVRX\0" |
10201 | | /* 19916 */ "InsnRX\0" |
10202 | | /* 19923 */ "STX\0" |
10203 | | /* 19927 */ "VX\0" |
10204 | | /* 19930 */ "IC32Y\0" |
10205 | | /* 19936 */ "LAY\0" |
10206 | | /* 19940 */ "MAY\0" |
10207 | | /* 19944 */ "LRAY\0" |
10208 | | /* 19949 */ "CVBY\0" |
10209 | | /* 19954 */ "ICY\0" |
10210 | | /* 19958 */ "STCY\0" |
10211 | | /* 19963 */ "LDY\0" |
10212 | | /* 19967 */ "STDY\0" |
10213 | | /* 19972 */ "CVDY\0" |
10214 | | /* 19977 */ "LAEY\0" |
10215 | | /* 19982 */ "LEY\0" |
10216 | | /* 19986 */ "STEY\0" |
10217 | | /* 19991 */ "LPSWEY\0" |
10218 | | /* 19998 */ "MFY\0" |
10219 | | /* 20002 */ "AHY\0" |
10220 | | /* 20006 */ "CHY\0" |
10221 | | /* 20010 */ "LHY\0" |
10222 | | /* 20014 */ "MHY\0" |
10223 | | /* 20018 */ "SHY\0" |
10224 | | /* 20022 */ "STHY\0" |
10225 | | /* 20027 */ "CLIY\0" |
10226 | | /* 20032 */ "NIY\0" |
10227 | | /* 20036 */ "OIY\0" |
10228 | | /* 20040 */ "InsnSIY\0" |
10229 | | /* 20048 */ "MVIY\0" |
10230 | | /* 20053 */ "XIY\0" |
10231 | | /* 20057 */ "ALY\0" |
10232 | | /* 20061 */ "CLY\0" |
10233 | | /* 20065 */ "SLY\0" |
10234 | | /* 20069 */ "LAMY\0" |
10235 | | /* 20074 */ "STAMY\0" |
10236 | | /* 20080 */ "ICMY\0" |
10237 | | /* 20085 */ "STCMY\0" |
10238 | | /* 20091 */ "CLMY\0" |
10239 | | /* 20096 */ "STMY\0" |
10240 | | /* 20101 */ "NY\0" |
10241 | | /* 20104 */ "OY\0" |
10242 | | /* 20107 */ "G_MEMCPY\0" |
10243 | | /* 20116 */ "COPY\0" |
10244 | | /* 20121 */ "ADA_ENTRY\0" |
10245 | | /* 20131 */ "CSY\0" |
10246 | | /* 20135 */ "CDSY\0" |
10247 | | /* 20140 */ "MSY\0" |
10248 | | /* 20144 */ "InsnRSY\0" |
10249 | | /* 20152 */ "STY\0" |
10250 | | /* 20156 */ "InsnRXY\0" |
10251 | | /* 20164 */ "VLLEZ\0" |
10252 | | /* 20170 */ "VUPKZ\0" |
10253 | | /* 20176 */ "VPKZ\0" |
10254 | | /* 20181 */ "VCLZ\0" |
10255 | | /* 20186 */ "G_CTLZ\0" |
10256 | | /* 20193 */ "BAsmNZ\0" |
10257 | | /* 20200 */ "LOCAsmNZ\0" |
10258 | | /* 20209 */ "STOCAsmNZ\0" |
10259 | | /* 20219 */ "LOCGAsmNZ\0" |
10260 | | /* 20229 */ "STOCGAsmNZ\0" |
10261 | | /* 20240 */ "JGAsmNZ\0" |
10262 | | /* 20248 */ "LOCFHAsmNZ\0" |
10263 | | /* 20259 */ "STOCFHAsmNZ\0" |
10264 | | /* 20271 */ "BIAsmNZ\0" |
10265 | | /* 20279 */ "LOCHIAsmNZ\0" |
10266 | | /* 20290 */ "LOCGHIAsmNZ\0" |
10267 | | /* 20302 */ "LOCHHIAsmNZ\0" |
10268 | | /* 20314 */ "JAsmNZ\0" |
10269 | | /* 20321 */ "BRAsmNZ\0" |
10270 | | /* 20329 */ "LOCRAsmNZ\0" |
10271 | | /* 20339 */ "LOCGRAsmNZ\0" |
10272 | | /* 20350 */ "SELGRAsmNZ\0" |
10273 | | /* 20361 */ "LOCFHRAsmNZ\0" |
10274 | | /* 20373 */ "SELFHRAsmNZ\0" |
10275 | | /* 20385 */ "SELRAsmNZ\0" |
10276 | | /* 20395 */ "VLLEBRZ\0" |
10277 | | /* 20403 */ "VCTZ\0" |
10278 | | /* 20408 */ "G_CTTZ\0" |
10279 | | /* 20415 */ "MVZ\0" |
10280 | | /* 20419 */ "BAsmZ\0" |
10281 | | /* 20425 */ "LOCAsmZ\0" |
10282 | | /* 20433 */ "STOCAsmZ\0" |
10283 | | /* 20442 */ "LOCGAsmZ\0" |
10284 | | /* 20451 */ "STOCGAsmZ\0" |
10285 | | /* 20461 */ "JGAsmZ\0" |
10286 | | /* 20468 */ "LOCFHAsmZ\0" |
10287 | | /* 20478 */ "STOCFHAsmZ\0" |
10288 | | /* 20489 */ "BIAsmZ\0" |
10289 | | /* 20496 */ "LOCHIAsmZ\0" |
10290 | | /* 20506 */ "LOCGHIAsmZ\0" |
10291 | | /* 20517 */ "LOCHHIAsmZ\0" |
10292 | | /* 20528 */ "JAsmZ\0" |
10293 | | /* 20534 */ "BRAsmZ\0" |
10294 | | /* 20541 */ "LOCRAsmZ\0" |
10295 | | /* 20550 */ "LOCGRAsmZ\0" |
10296 | | /* 20560 */ "SELGRAsmZ\0" |
10297 | | /* 20570 */ "LOCFHRAsmZ\0" |
10298 | | /* 20581 */ "SELFHRAsmZ\0" |
10299 | | /* 20592 */ "SELRAsmZ\0" |
10300 | | /* 20601 */ "CPSDRdd\0" |
10301 | | /* 20609 */ "CPSDRsd\0" |
10302 | | /* 20617 */ "NOP_bare\0" |
10303 | | /* 20626 */ "Serialize\0" |
10304 | | /* 20636 */ "CLCReg\0" |
10305 | | /* 20643 */ "NCReg\0" |
10306 | | /* 20649 */ "OCReg\0" |
10307 | | /* 20655 */ "MVCReg\0" |
10308 | | /* 20662 */ "XCReg\0" |
10309 | | /* 20668 */ "MemsetRegReg\0" |
10310 | | /* 20681 */ "MemsetImmReg\0" |
10311 | | /* 20694 */ "SCmp128Hi\0" |
10312 | | /* 20704 */ "UCmp128Hi\0" |
10313 | | /* 20714 */ "ATOMIC_LOADW_NILHi\0" |
10314 | | /* 20733 */ "ATOMIC_LOADW_NRi\0" |
10315 | | /* 20750 */ "CIBCall\0" |
10316 | | /* 20758 */ "CGIBCall\0" |
10317 | | /* 20767 */ "CLGIBCall\0" |
10318 | | /* 20777 */ "CLIBCall\0" |
10319 | | /* 20786 */ "CRBCall\0" |
10320 | | /* 20794 */ "CGRBCall\0" |
10321 | | /* 20803 */ "CLGRBCall\0" |
10322 | | /* 20813 */ "CLRBCall\0" |
10323 | | /* 20822 */ "CLCImm\0" |
10324 | | /* 20829 */ "NCImm\0" |
10325 | | /* 20835 */ "OCImm\0" |
10326 | | /* 20841 */ "MVCImm\0" |
10327 | | /* 20848 */ "XCImm\0" |
10328 | | /* 20854 */ "MemsetRegImm\0" |
10329 | | /* 20867 */ "MemsetImmImm\0" |
10330 | | /* 20880 */ "CIBAsm\0" |
10331 | | /* 20887 */ "CGIBAsm\0" |
10332 | | /* 20895 */ "CLGIBAsm\0" |
10333 | | /* 20904 */ "CLIBAsm\0" |
10334 | | /* 20912 */ "CRBAsm\0" |
10335 | | /* 20919 */ "CGRBAsm\0" |
10336 | | /* 20927 */ "CLGRBAsm\0" |
10337 | | /* 20936 */ "CLRBAsm\0" |
10338 | | /* 20944 */ "BCAsm\0" |
10339 | | /* 20950 */ "BICAsm\0" |
10340 | | /* 20957 */ "LOCAsm\0" |
10341 | | /* 20964 */ "STOCAsm\0" |
10342 | | /* 20972 */ "BRCAsm\0" |
10343 | | /* 20979 */ "LOCGAsm\0" |
10344 | | /* 20987 */ "STOCGAsm\0" |
10345 | | /* 20996 */ "LOCFHAsm\0" |
10346 | | /* 21005 */ "STOCFHAsm\0" |
10347 | | /* 21015 */ "LOCHIAsm\0" |
10348 | | /* 21024 */ "LOCGHIAsm\0" |
10349 | | /* 21034 */ "LOCHHIAsm\0" |
10350 | | /* 21044 */ "CIJAsm\0" |
10351 | | /* 21051 */ "CGIJAsm\0" |
10352 | | /* 21059 */ "CLGIJAsm\0" |
10353 | | /* 21068 */ "CLIJAsm\0" |
10354 | | /* 21076 */ "CRJAsm\0" |
10355 | | /* 21083 */ "CGRJAsm\0" |
10356 | | /* 21091 */ "CLGRJAsm\0" |
10357 | | /* 21100 */ "CLRJAsm\0" |
10358 | | /* 21108 */ "BRCLAsm\0" |
10359 | | /* 21116 */ "BCRAsm\0" |
10360 | | /* 21123 */ "LOCRAsm\0" |
10361 | | /* 21131 */ "LOCGRAsm\0" |
10362 | | /* 21140 */ "SELGRAsm\0" |
10363 | | /* 21149 */ "LOCFHRAsm\0" |
10364 | | /* 21159 */ "SELFHRAsm\0" |
10365 | | /* 21169 */ "SELRAsm\0" |
10366 | | /* 21177 */ "CLGTAsm\0" |
10367 | | /* 21185 */ "CITAsm\0" |
10368 | | /* 21192 */ "CLFITAsm\0" |
10369 | | /* 21201 */ "CGITAsm\0" |
10370 | | /* 21209 */ "CLGITAsm\0" |
10371 | | /* 21218 */ "CLTAsm\0" |
10372 | | /* 21225 */ "CRTAsm\0" |
10373 | | /* 21232 */ "CGRTAsm\0" |
10374 | | /* 21240 */ "CLGRTAsm\0" |
10375 | | /* 21249 */ "CLRTAsm\0" |
10376 | | /* 21257 */ "VLAlign\0" |
10377 | | /* 21265 */ "VLMAlign\0" |
10378 | | /* 21274 */ "VSTMAlign\0" |
10379 | | /* 21284 */ "VSTAlign\0" |
10380 | | /* 21293 */ "CIBReturn\0" |
10381 | | /* 21303 */ "CGIBReturn\0" |
10382 | | /* 21314 */ "CLGIBReturn\0" |
10383 | | /* 21326 */ "CLIBReturn\0" |
10384 | | /* 21337 */ "CRBReturn\0" |
10385 | | /* 21347 */ "CGRBReturn\0" |
10386 | | /* 21358 */ "CLGRBReturn\0" |
10387 | | /* 21370 */ "CLRBReturn\0" |
10388 | | /* 21381 */ "CondReturn\0" |
10389 | | /* 21392 */ "EXRL_Pseudo\0" |
10390 | | /* 21404 */ "LTDBRCompare_Pseudo\0" |
10391 | | /* 21424 */ "LTEBRCompare_Pseudo\0" |
10392 | | /* 21444 */ "LTXBRCompare_Pseudo\0" |
10393 | | /* 21464 */ "A_MemFoldPseudo\0" |
10394 | | /* 21480 */ "MADB_MemFoldPseudo\0" |
10395 | | /* 21499 */ "DDB_MemFoldPseudo\0" |
10396 | | /* 21517 */ "MDB_MemFoldPseudo\0" |
10397 | | /* 21535 */ "MSDB_MemFoldPseudo\0" |
10398 | | /* 21554 */ "MAEB_MemFoldPseudo\0" |
10399 | | /* 21573 */ "DEB_MemFoldPseudo\0" |
10400 | | /* 21591 */ "MEEB_MemFoldPseudo\0" |
10401 | | /* 21610 */ "MSEB_MemFoldPseudo\0" |
10402 | | /* 21629 */ "MSGC_MemFoldPseudo\0" |
10403 | | /* 21648 */ "MSC_MemFoldPseudo\0" |
10404 | | /* 21666 */ "AG_MemFoldPseudo\0" |
10405 | | /* 21683 */ "LOCG_MemFoldPseudo\0" |
10406 | | /* 21702 */ "ALG_MemFoldPseudo\0" |
10407 | | /* 21720 */ "SLG_MemFoldPseudo\0" |
10408 | | /* 21738 */ "NG_MemFoldPseudo\0" |
10409 | | /* 21755 */ "OG_MemFoldPseudo\0" |
10410 | | /* 21772 */ "SG_MemFoldPseudo\0" |
10411 | | /* 21789 */ "XG_MemFoldPseudo\0" |
10412 | | /* 21806 */ "AL_MemFoldPseudo\0" |
10413 | | /* 21823 */ "SL_MemFoldPseudo\0" |
10414 | | /* 21840 */ "N_MemFoldPseudo\0" |
10415 | | /* 21856 */ "O_MemFoldPseudo\0" |
10416 | | /* 21872 */ "S_MemFoldPseudo\0" |
10417 | | /* 21888 */ "X_MemFoldPseudo\0" |
10418 | | /* 21904 */ "LOCMux_MemFoldPseudo\0" |
10419 | | /* 21925 */ "CondTrap\0" |
10420 | | /* 21934 */ "CLSTLoop\0" |
10421 | | /* 21943 */ "SRSTLoop\0" |
10422 | | /* 21952 */ "MVSTLoop\0" |
10423 | | /* 21961 */ "CPSDRds\0" |
10424 | | /* 21969 */ "CPSDRss\0" |
10425 | | /* 21977 */ "TBEGIN_nofloat\0" |
10426 | | /* 21992 */ "CU21Opt\0" |
10427 | | /* 22000 */ "CU12Opt\0" |
10428 | | /* 22008 */ "CU14Opt\0" |
10429 | | /* 22016 */ "CU24Opt\0" |
10430 | | /* 22024 */ "VCVBOpt\0" |
10431 | | /* 22032 */ "SSKEOpt\0" |
10432 | | /* 22040 */ "TRTREOpt\0" |
10433 | | /* 22049 */ "IDTEOpt\0" |
10434 | | /* 22057 */ "CRDTEOpt\0" |
10435 | | /* 22066 */ "IPTEOpt\0" |
10436 | | /* 22074 */ "TRTEOpt\0" |
10437 | | /* 22082 */ "CUUTFOpt\0" |
10438 | | /* 22091 */ "VCVBGOpt\0" |
10439 | | /* 22100 */ "TROOOpt\0" |
10440 | | /* 22108 */ "TRTOOpt\0" |
10441 | | /* 22116 */ "RDPOpt\0" |
10442 | | /* 22123 */ "POPCNTOpt\0" |
10443 | | /* 22133 */ "TROTOpt\0" |
10444 | | /* 22141 */ "TRTTOpt\0" |
10445 | | /* 22149 */ "CUTFUOpt\0" |
10446 | | /* 22158 */ "IPTEOptOpt\0" |
10447 | | /* 22169 */ "CondStoreF32Inv\0" |
10448 | | /* 22185 */ "CondStore32Inv\0" |
10449 | | /* 22200 */ "CondStoreF64Inv\0" |
10450 | | /* 22216 */ "CondStore64Inv\0" |
10451 | | /* 22231 */ "CondStore16Inv\0" |
10452 | | /* 22246 */ "CondStore8Inv\0" |
10453 | | /* 22260 */ "CondStore32MuxInv\0" |
10454 | | /* 22278 */ "CondStore16MuxInv\0" |
10455 | | /* 22296 */ "CondStore8MuxInv\0" |
10456 | | /* 22313 */ "CondStore32Mux\0" |
10457 | | /* 22328 */ "CondStore16Mux\0" |
10458 | | /* 22343 */ "CondStore8Mux\0" |
10459 | | /* 22357 */ "LBMux\0" |
10460 | | /* 22363 */ "RISBMux\0" |
10461 | | /* 22371 */ "LLCMux\0" |
10462 | | /* 22378 */ "LOCMux\0" |
10463 | | /* 22385 */ "STOCMux\0" |
10464 | | /* 22393 */ "STCMux\0" |
10465 | | /* 22400 */ "IIFMux\0" |
10466 | | /* 22407 */ "NIFMux\0" |
10467 | | /* 22414 */ "OIFMux\0" |
10468 | | /* 22421 */ "XIFMux\0" |
10469 | | /* 22428 */ "IIHMux\0" |
10470 | | /* 22435 */ "NIHMux\0" |
10471 | | /* 22442 */ "OIHMux\0" |
10472 | | /* 22449 */ "LLHMux\0" |
10473 | | /* 22456 */ "TMHMux\0" |
10474 | | /* 22463 */ "STHMux\0" |
10475 | | /* 22470 */ "AFIMux\0" |
10476 | | /* 22477 */ "CFIMux\0" |
10477 | | /* 22484 */ "CLFIMux\0" |
10478 | | /* 22492 */ "AHIMux\0" |
10479 | | /* 22499 */ "LOCHIMux\0" |
10480 | | /* 22508 */ "LHIMux\0" |
10481 | | /* 22515 */ "CLMux\0" |
10482 | | /* 22521 */ "IILMux\0" |
10483 | | /* 22528 */ "NILMux\0" |
10484 | | /* 22535 */ "OILMux\0" |
10485 | | /* 22542 */ "TMLMux\0" |
10486 | | /* 22549 */ "LLCRMux\0" |
10487 | | /* 22557 */ "LOCRMux\0" |
10488 | | /* 22565 */ "LLHRMux\0" |
10489 | | /* 22573 */ "SELRMux\0" |
10490 | | /* 22581 */ "STMux\0" |
10491 | | }; |
10492 | | #ifdef __GNUC__ |
10493 | | #pragma GCC diagnostic pop |
10494 | | #endif |
10495 | | |
10496 | | extern const unsigned SystemZInstrNameIndices[] = { |
10497 | | 11264U, 13650U, 16128U, 14229U, 11792U, 11773U, 11801U, 12048U, |
10498 | | 7746U, 7761U, 6841U, 7793U, 18436U, 6214U, 19246U, 6895U, |
10499 | | 11260U, 11782U, 3510U, 20116U, 4633U, 19119U, 3278U, 3445U, |
10500 | | 3498U, 14807U, 12019U, 19010U, 3376U, 15331U, 8151U, 18999U, |
10501 | | 6081U, 15253U, 15240U, 16423U, 18810U, 18864U, 11951U, 11998U, |
10502 | | 11971U, 11818U, 16349U, 14307U, 19331U, 19361U, 14006U, 3141U, |
10503 | | 2316U, 12865U, 19489U, 19496U, 13353U, 13360U, 13367U, 13377U, |
10504 | | 3251U, 17060U, 17023U, 6839U, 11262U, 19814U, 6224U, 12558U, |
10505 | | 18718U, 18038U, 19160U, 18055U, 16975U, 2791U, 18390U, 19021U, |
10506 | | 17384U, 19219U, 6295U, 16360U, 3342U, 2765U, 3324U, 19040U, |
10507 | | 13972U, 16448U, 3039U, 2983U, 3013U, 3024U, 2964U, 2994U, |
10508 | | 6129U, 6113U, 18466U, 7852U, 7869U, 3157U, 2322U, 3257U, |
10509 | | 3218U, 17081U, 17029U, 19798U, 14198U, 19764U, 14164U, 3108U, |
10510 | | 2299U, 19681U, 14081U, 14838U, 14816U, 3490U, 8493U, 3291U, |
10511 | | 18741U, 19134U, 2691U, 18503U, 18976U, 18530U, 19345U, 2783U, |
10512 | | 18958U, 18946U, 19109U, 8143U, 19324U, 7780U, 19354U, 11899U, |
10513 | | 16806U, 16792U, 11892U, 16799U, 17377U, 12772U, 15013U, 15006U, |
10514 | | 18732U, 14299U, 3531U, 14283U, 3471U, 14291U, 3523U, 14275U, |
10515 | | 3463U, 14352U, 14344U, 9400U, 9392U, 18629U, 18619U, 18609U, |
10516 | | 18599U, 18649U, 18639U, 19842U, 19852U, 18659U, 18672U, 19862U, |
10517 | | 19872U, 18685U, 18698U, 3066U, 2278U, 12807U, 674U, 2957U, |
10518 | | 19468U, 13332U, 19601U, 11430U, 15375U, 190U, 9U, 8086U, |
10519 | | 176U, 0U, 15350U, 15382U, 7739U, 19316U, 2755U, 11372U, |
10520 | | 11417U, 14944U, 14953U, 17674U, 14021U, 18453U, 6304U, 13761U, |
10521 | | 13771U, 3589U, 3604U, 13718U, 13750U, 19523U, 19549U, 19535U, |
10522 | | 3548U, 3576U, 3561U, 3147U, 11692U, 14115U, 19715U, 14139U, |
10523 | | 19739U, 17681U, 3315U, 3305U, 16123U, 18888U, 18920U, 18899U, |
10524 | | 16990U, 20408U, 6821U, 20186U, 6803U, 15226U, 14869U, 6155U, |
10525 | | 11905U, 18365U, 14214U, 19192U, 16966U, 19032U, 19058U, 19229U, |
10526 | | 16192U, 4608U, 2852U, 6255U, 6098U, 3094U, 2285U, 12835U, |
10527 | | 19475U, 13339U, 680U, 19200U, 15359U, 16467U, 16483U, 20107U, |
10528 | | 5612U, 6267U, 18824U, 14596U, 3073U, 12814U, 3049U, 12790U, |
10529 | | 19664U, 14064U, 13729U, 13697U, 3125U, 12849U, 3235U, 17045U, |
10530 | | 17007U, 19698U, 14098U, 19722U, 14122U, 19828U, 19835U, 20121U, |
10531 | | 6239U, 21481U, 14249U, 15316U, 2869U, 21555U, 557U, 22470U, |
10532 | | 21666U, 22492U, 11713U, 21702U, 21806U, 19621U, 11122U, 15697U, |
10533 | | 19781U, 14181U, 8809U, 20714U, 16950U, 20733U, 8827U, 17065U, |
10534 | | 17140U, 19746U, 14146U, 7151U, 17629U, 19608U, 21464U, 22477U, |
10535 | | 20758U, 21303U, 20794U, 21347U, 22501U, 20750U, 21293U, 20822U, |
10536 | | 20636U, 22484U, 20767U, 21314U, 20803U, 21358U, 20777U, 21326U, |
10537 | | 22515U, 20813U, 21370U, 21934U, 22373U, 20786U, 21337U, 17121U, |
10538 | | 19298U, 368U, 16148U, 16141U, 12719U, 349U, 11749U, 7923U, |
10539 | | 21381U, 11561U, 503U, 22231U, 22328U, 22278U, 150U, 22185U, |
10540 | | 22313U, 22260U, 476U, 22216U, 583U, 22246U, 22343U, 22296U, |
10541 | | 50U, 22169U, 270U, 22200U, 21925U, 21499U, 21573U, 21392U, |
10542 | | 19071U, 22400U, 214U, 293U, 386U, 22428U, 242U, 321U, |
10543 | | 414U, 22521U, 526U, 22357U, 16539U, 16330U, 22508U, 22450U, |
10544 | | 22371U, 22549U, 22449U, 22565U, 22516U, 21683U, 22499U, 22378U, |
10545 | | 21904U, 22557U, 21404U, 21424U, 21444U, 19882U, 21480U, 21554U, |
10546 | | 21517U, 21591U, 21648U, 21535U, 21610U, 21629U, 20841U, 20655U, |
10547 | | 21952U, 20867U, 20681U, 20854U, 20668U, 20829U, 20643U, 21738U, |
10548 | | 22407U, 221U, 300U, 393U, 22435U, 249U, 328U, 421U, |
10549 | | 22528U, 21840U, 20835U, 20649U, 21755U, 22414U, 228U, 307U, |
10550 | | 400U, 22442U, 256U, 335U, 428U, 22535U, 21856U, 531U, |
10551 | | 598U, 2816U, 8637U, 11854U, 8772U, 12031U, 22363U, 21296U, |
10552 | | 11565U, 20694U, 21536U, 21611U, 22573U, 21772U, 21720U, 21823U, |
10553 | | 21943U, 551U, 22393U, 22463U, 22581U, 22385U, 19923U, 21872U, |
10554 | | 573U, 162U, 488U, 515U, 63U, 283U, 539U, 106U, |
10555 | | 459U, 20626U, 21977U, 11929U, 11940U, 314U, 407U, 22456U, |
10556 | | 342U, 435U, 22542U, 21929U, 20704U, 81U, 442U, 100U, |
10557 | | 453U, 86U, 117U, 470U, 20848U, 20662U, 21789U, 22421U, |
10558 | | 235U, 263U, 2834U, 21888U, 565U, 596U, 2961U, 1026U, |
10559 | | 15714U, 16178U, 17192U, 853U, 3433U, 1425U, 15827U, 16295U, |
10560 | | 11135U, 7575U, 6920U, 11143U, 16544U, 8589U, 11211U, 11525U, |
10561 | | 16614U, 11606U, 11318U, 8401U, 16755U, 16875U, 11201U, 11520U, |
10562 | | 20002U, 8722U, 11723U, 2727U, 7680U, 16624U, 16162U, 11177U, |
10563 | | 7937U, 6934U, 11153U, 16555U, 11531U, 16651U, 11623U, 11323U, |
10564 | | 16761U, 16881U, 11539U, 16848U, 11663U, 11367U, 8755U, 14033U, |
10565 | | 20057U, 14813U, 15668U, 11592U, 11314U, 19411U, 17537U, 19578U, |
10566 | | 17550U, 16029U, 17558U, 17431U, 898U, 19937U, 972U, 16842U, |
10567 | | 11726U, 16847U, 17660U, 17125U, 13682U, 6331U, 10680U, 4128U, |
10568 | | 12897U, 5156U, 9416U, 13786U, 5635U, 9925U, 3636U, 12112U, |
10569 | | 4653U, 8877U, 13427U, 14384U, 15024U, 20193U, 14625U, 15398U, |
10570 | | 20419U, 2640U, 20944U, 16152U, 21116U, 18728U, 8261U, 16708U, |
10571 | | 17156U, 11091U, 6465U, 10814U, 4277U, 13031U, 5305U, 9565U, |
10572 | | 13856U, 5784U, 10074U, 3800U, 12261U, 4817U, 9041U, 13505U, |
10573 | | 14462U, 15102U, 20271U, 14695U, 15468U, 20489U, 2687U, 20950U, |
10574 | | 15265U, 15273U, 15716U, 17669U, 12723U, 6576U, 10925U, 4400U, |
10575 | | 13142U, 5428U, 9688U, 13901U, 5907U, 10197U, 3935U, 12384U, |
10576 | | 4952U, 9176U, 13555U, 14512U, 15152U, 20321U, 14740U, 15513U, |
10577 | | 20534U, 2911U, 20972U, 11753U, 21108U, 18761U, 8279U, 10524U, |
10578 | | 10591U, 7897U, 5148U, 8032U, 940U, 8220U, 13660U, 10582U, |
10579 | | 7892U, 5143U, 7733U, 2625U, 3046U, 1068U, 15720U, 15935U, |
10580 | | 761U, 16517U, 17315U, 15974U, 782U, 16636U, 17341U, 884U, |
10581 | | 15947U, 17321U, 15986U, 17347U, 19086U, 16188U, 18034U, 8228U, |
10582 | | 17400U, 20135U, 17197U, 17418U, 19401U, 3482U, 1436U, 15833U, |
10583 | | 17207U, 15941U, 768U, 16534U, 15980U, 789U, 16646U, 15954U, |
10584 | | 15993U, 16300U, 17447U, 2669U, 15736U, 719U, 16216U, 17231U, |
10585 | | 15856U, 740U, 16325U, 11139U, 16052U, 817U, 17577U, 17465U, |
10586 | | 7666U, 15749U, 726U, 16221U, 17244U, 865U, 15869U, 747U, |
10587 | | 16335U, 6924U, 11148U, 16550U, 12602U, 8593U, 11218U, 12644U, |
10588 | | 11341U, 1684U, 20887U, 6337U, 10686U, 4135U, 12903U, 5163U, |
10589 | | 9423U, 5642U, 9932U, 3644U, 12119U, 4661U, 8885U, 11445U, |
10590 | | 21051U, 6512U, 10861U, 4329U, 13078U, 5357U, 9617U, 5836U, |
10591 | | 10126U, 3857U, 12313U, 4874U, 9098U, 18853U, 21201U, 6670U, |
10592 | | 11019U, 4504U, 13236U, 5532U, 9792U, 6011U, 10301U, 4049U, |
10593 | | 12488U, 5066U, 9290U, 16626U, 1896U, 20919U, 6373U, 10722U, |
10594 | | 4175U, 12939U, 5203U, 9463U, 5682U, 9972U, 3688U, 12159U, |
10595 | | 4705U, 8929U, 11465U, 21083U, 6548U, 10897U, 4369U, 13114U, |
10596 | | 5397U, 9657U, 5876U, 10166U, 3901U, 12353U, 4918U, 9142U, |
10597 | | 12622U, 19169U, 21232U, 6705U, 11054U, 4543U, 13271U, 5571U, |
10598 | | 9831U, 6050U, 10340U, 4092U, 12527U, 5109U, 9333U, 16065U, |
10599 | | 824U, 17582U, 17478U, 910U, 8427U, 7002U, 16750U, 11354U, |
10600 | | 11207U, 16870U, 12639U, 11329U, 20006U, 1674U, 20880U, 6329U, |
10601 | | 10678U, 4126U, 12895U, 5154U, 9414U, 5633U, 9923U, 3634U, |
10602 | | 12110U, 4651U, 8875U, 8733U, 11441U, 21044U, 6504U, 10853U, |
10603 | | 4320U, 13070U, 5348U, 9608U, 5827U, 10117U, 3847U, 12304U, |
10604 | | 4864U, 9088U, 18843U, 21185U, 6652U, 11001U, 4484U, 13218U, |
10605 | | 5512U, 9772U, 5991U, 10281U, 4027U, 12468U, 5044U, 9268U, |
10606 | | 13665U, 11741U, 2731U, 11744U, 4621U, 19426U, 15742U, 17237U, |
10607 | | 15862U, 11334U, 11182U, 18847U, 21192U, 6660U, 11009U, 4493U, |
10608 | | 13226U, 5521U, 9781U, 6000U, 10290U, 4037U, 12477U, 5054U, |
10609 | | 9278U, 16058U, 17471U, 7950U, 15755U, 17250U, 15875U, 6939U, |
10610 | | 11159U, 16561U, 12608U, 12650U, 11347U, 1689U, 20895U, 6346U, |
10611 | | 10695U, 4145U, 12912U, 5173U, 9433U, 5652U, 9942U, 3655U, |
10612 | | 12129U, 4672U, 8896U, 11450U, 21059U, 6521U, 10870U, 4339U, |
10613 | | 13087U, 5367U, 9627U, 5846U, 10136U, 3868U, 12323U, 4885U, |
10614 | | 9109U, 18858U, 21209U, 6679U, 11028U, 4514U, 13245U, 5542U, |
10615 | | 9802U, 6021U, 10311U, 4060U, 12498U, 5077U, 9301U, 16656U, |
10616 | | 1901U, 20927U, 6382U, 10731U, 4185U, 12948U, 5213U, 9473U, |
10617 | | 5692U, 9982U, 3699U, 12169U, 4716U, 8940U, 11470U, 21091U, |
10618 | | 6557U, 10906U, 4379U, 13123U, 5407U, 9667U, 5886U, 10176U, |
10619 | | 3912U, 12363U, 4929U, 9153U, 12627U, 19174U, 21240U, 6714U, |
10620 | | 11063U, 4553U, 13280U, 5581U, 9841U, 6060U, 10350U, 4103U, |
10621 | | 12537U, 5120U, 9344U, 18833U, 21177U, 6643U, 10992U, 4474U, |
10622 | | 13209U, 5502U, 9762U, 5981U, 10271U, 4016U, 12458U, 5033U, |
10623 | | 9257U, 16071U, 17484U, 7039U, 16781U, 11360U, 16901U, 12664U, |
10624 | | 11273U, 1695U, 20904U, 6356U, 10705U, 4156U, 12922U, 5184U, |
10625 | | 9444U, 5663U, 9953U, 3667U, 12140U, 4684U, 8908U, 8743U, |
10626 | | 11456U, 21068U, 6531U, 10880U, 4350U, 13097U, 5378U, 9638U, |
10627 | | 5857U, 10147U, 3880U, 12334U, 4897U, 9121U, 20027U, 13414U, |
10628 | | 9891U, 20091U, 16852U, 1907U, 20936U, 6392U, 10741U, 4196U, |
10629 | | 12958U, 5224U, 9484U, 5703U, 9993U, 3711U, 12180U, 4728U, |
10630 | | 8952U, 11476U, 21100U, 6567U, 10916U, 4390U, 13133U, 5418U, |
10631 | | 9678U, 5897U, 10187U, 3924U, 12374U, 4941U, 9165U, 12682U, |
10632 | | 19180U, 21249U, 6724U, 11073U, 4564U, 13290U, 5592U, 9852U, |
10633 | | 6071U, 10361U, 4115U, 12548U, 5132U, 9356U, 19261U, 18895U, |
10634 | | 21218U, 6689U, 11038U, 4525U, 13255U, 5553U, 9813U, 6032U, |
10635 | | 10322U, 4072U, 12509U, 5089U, 9313U, 20061U, 2936U, 14883U, |
10636 | | 18783U, 20601U, 21961U, 20609U, 21969U, 19386U, 962U, 16153U, |
10637 | | 1892U, 20912U, 6365U, 10714U, 4166U, 12931U, 5194U, 9454U, |
10638 | | 5673U, 9963U, 3678U, 12150U, 4695U, 8919U, 6194U, 22057U, |
10639 | | 11461U, 21076U, 6540U, 10889U, 4360U, 13106U, 5388U, 9648U, |
10640 | | 5867U, 10157U, 3891U, 12344U, 4908U, 9132U, 12592U, 19156U, |
10641 | | 21225U, 6697U, 11046U, 4534U, 13263U, 5562U, 9822U, 6041U, |
10642 | | 10331U, 4082U, 12518U, 5099U, 9323U, 18031U, 8457U, 17279U, |
10643 | | 8224U, 15292U, 8120U, 19271U, 17513U, 20131U, 34U, 22000U, |
10644 | | 198U, 22008U, 18U, 21992U, 209U, 22016U, 29U, 171U, |
10645 | | 17297U, 6184U, 19414U, 22149U, 7451U, 22082U, 17531U, 2347U, |
10646 | | 7658U, 19949U, 3419U, 7712U, 19972U, 16035U, 15968U, 775U, |
10647 | | 16609U, 17335U, 16007U, 796U, 16725U, 17367U, 891U, 15961U, |
10648 | | 17328U, 16000U, 17360U, 19104U, 17563U, 17412U, 17436U, 17424U, |
10649 | | 19406U, 19955U, 18793U, 19396U, 2962U, 3063U, 1093U, 15725U, |
10650 | | 16201U, 17202U, 859U, 3528U, 1442U, 15839U, 16306U, 2658U, |
10651 | | 7583U, 15762U, 15882U, 11765U, 7956U, 16661U, 16856U, 14890U, |
10652 | | 16179U, 8229U, 6968U, 16591U, 16698U, 16041U, 17568U, 17442U, |
10653 | | 904U, 15667U, 7578U, 17161U, 642U, 8266U, 3175U, 11556U, |
10654 | | 17213U, 17453U, 2890U, 16824U, 15678U, 17179U, 19644U, 7775U, |
10655 | | 7818U, 16830U, 15683U, 17285U, 622U, 949U, 17519U, 3300U, |
10656 | | 19825U, 12714U, 15768U, 733U, 16236U, 17257U, 15888U, 754U, |
10657 | | 16344U, 16078U, 831U, 17587U, 17491U, 16687U, 16232U, 16340U, |
10658 | | 8462U, 2623U, 2688U, 39U, 19930U, 13323U, 9862U, 20080U, |
10659 | | 19954U, 6189U, 22049U, 17219U, 17459U, 7006U, 8649U, 11866U, |
10660 | | 7130U, 8798U, 12043U, 11579U, 13629U, 6200U, 22066U, 22158U, |
10661 | | 13313U, 4592U, 11708U, 6733U, 11307U, 4574U, 11913U, 19438U, |
10662 | | 18323U, 17114U, 6137U, 7387U, 18407U, 18429U, 6168U, 11385U, |
10663 | | 20144U, 19916U, 6287U, 7499U, 20156U, 18571U, 11406U, 11921U, |
10664 | | 20040U, 18496U, 6176U, 7427U, 11299U, 17106U, 18421U, 19570U, |
10665 | | 19908U, 11398U, 11443U, 6506U, 10855U, 4322U, 13072U, 5350U, |
10666 | | 9610U, 13895U, 5829U, 10119U, 3849U, 12306U, 4866U, 9090U, |
10667 | | 13548U, 14505U, 15145U, 20314U, 14734U, 15507U, 20528U, 7927U, |
10668 | | 6437U, 10786U, 4246U, 13003U, 5274U, 9534U, 13828U, 5753U, |
10669 | | 10043U, 3766U, 12230U, 4783U, 9007U, 13474U, 14431U, 15071U, |
10670 | | 20240U, 14667U, 15440U, 20461U, 1259U, 15774U, 944U, 17263U, |
10671 | | 1494U, 15894U, 3208U, 3213U, 13411U, 693U, 2627U, 2743U, |
10672 | | 17173U, 7256U, 14362U, 16084U, 17497U, 11724U, 660U, 594U, |
10673 | | 7573U, 11721U, 7935U, 3436U, 19977U, 13299U, 20069U, 13968U, |
10674 | | 8071U, 14266U, 8081U, 12585U, 15287U, 18595U, 19654U, 8359U, |
10675 | | 19936U, 1710U, 15665U, 8420U, 16014U, 991U, 12743U, 15719U, |
10676 | | 16516U, 123U, 16187U, 15832U, 16299U, 16549U, 16625U, 16163U, |
10677 | | 12749U, 8020U, 16034U, 17562U, 3200U, 3540U, 44U, 1441U, |
10678 | | 15838U, 16310U, 17309U, 16641U, 16241U, 94U, 16040U, 803U, |
10679 | | 17567U, 17441U, 19963U, 4605U, 15730U, 712U, 16211U, 17225U, |
10680 | | 16385U, 16046U, 810U, 17572U, 19982U, 17664U, 8580U, 18589U, |
10681 | | 2895U, 7938U, 18584U, 1596U, 15988U, 16226U, 6935U, 11154U, |
10682 | | 16556U, 12609U, 7824U, 8604U, 11223U, 16745U, 12651U, 16652U, |
10683 | | 12628U, 2921U, 8769U, 8673U, 11252U, 16788U, 12665U, 20010U, |
10684 | | 2735U, 8440U, 16167U, 2677U, 16156U, 6944U, 18577U, 16567U, |
10685 | | 12615U, 8233U, 8603U, 16744U, 12657U, 18838U, 18711U, 17354U, |
10686 | | 8848U, 8677U, 16787U, 12670U, 7011U, 8654U, 11871U, 7135U, |
10687 | | 8803U, 12053U, 6961U, 13415U, 3214U, 8056U, 9892U, 20092U, |
10688 | | 15784U, 16522U, 132U, 16249U, 15899U, 16393U, 16579U, 16682U, |
10689 | | 16946U, 16094U, 17600U, 2830U, 20957U, 6401U, 10750U, 4206U, |
10690 | | 12967U, 5234U, 9494U, 13792U, 5713U, 10003U, 3722U, 12190U, |
10691 | | 4739U, 8963U, 13434U, 14391U, 15031U, 20200U, 14631U, 15404U, |
10692 | | 20425U, 8567U, 20996U, 6444U, 10793U, 4254U, 13010U, 5282U, |
10693 | | 9542U, 13835U, 5761U, 10051U, 3775U, 12238U, 4792U, 9016U, |
10694 | | 13482U, 14439U, 15079U, 20248U, 14674U, 15447U, 20468U, 16730U, |
10695 | | 21149U, 6612U, 10961U, 4440U, 13178U, 5468U, 9728U, 13937U, |
10696 | | 5947U, 10237U, 3979U, 12424U, 4996U, 9220U, 13595U, 14552U, |
10697 | | 15192U, 20361U, 14776U, 15549U, 20570U, 7690U, 20979U, 6418U, |
10698 | | 10767U, 4225U, 12984U, 5253U, 9513U, 13809U, 5732U, 10022U, |
10699 | | 3743U, 12209U, 4760U, 8984U, 13453U, 14410U, 15050U, 20219U, |
10700 | | 14648U, 15421U, 20442U, 11216U, 21024U, 6482U, 10831U, 4296U, |
10701 | | 13048U, 5324U, 9584U, 13873U, 5803U, 10093U, 3821U, 12280U, |
10702 | | 4838U, 9062U, 13524U, 14481U, 15121U, 20290U, 14712U, 15485U, |
10703 | | 20506U, 16630U, 21131U, 6592U, 10941U, 4418U, 13158U, 5446U, |
10704 | | 9706U, 13917U, 5925U, 10215U, 3955U, 12402U, 4972U, 9196U, |
10705 | | 13573U, 14530U, 15170U, 20339U, 14756U, 15529U, 20550U, 11239U, |
10706 | | 21034U, 6493U, 10842U, 4308U, 13059U, 5336U, 9596U, 13884U, |
10707 | | 5815U, 10105U, 3834U, 12292U, 4851U, 9075U, 13536U, 14493U, |
10708 | | 15133U, 20302U, 14723U, 15496U, 20517U, 11205U, 21015U, 6472U, |
10709 | | 10821U, 4285U, 13038U, 5313U, 9573U, 13863U, 5792U, 10082U, |
10710 | | 3809U, 12269U, 4826U, 9050U, 13513U, 14470U, 15110U, 20279U, |
10711 | | 14702U, 15475U, 20496U, 16172U, 21123U, 6583U, 10932U, 4408U, |
10712 | | 13149U, 5436U, 9696U, 13908U, 5915U, 10205U, 3944U, 12392U, |
10713 | | 4961U, 9185U, 13563U, 14520U, 15160U, 20329U, 14747U, 15520U, |
10714 | | 20541U, 12754U, 3368U, 15790U, 16528U, 141U, 7706U, 16254U, |
10715 | | 15905U, 16398U, 16585U, 16693U, 15269U, 15634U, 17096U, 19649U, |
10716 | | 6277U, 19991U, 627U, 16100U, 17605U, 16849U, 838U, 7600U, |
10717 | | 19944U, 16264U, 16408U, 12683U, 19561U, 8348U, 16719U, 10571U, |
10718 | | 17545U, 12760U, 18896U, 15808U, 16274U, 17291U, 15923U, 16418U, |
10719 | | 8291U, 6978U, 16603U, 16714U, 17373U, 16117U, 17619U, 17525U, |
10720 | | 929U, 7618U, 3423U, 1413U, 15814U, 16279U, 17303U, 6283U, |
10721 | | 1544U, 15929U, 16506U, 17592U, 20058U, 16289U, 16511U, 7402U, |
10722 | | 8215U, 17624U, 13301U, 2960U, 1038U, 15713U, 16177U, 3441U, |
10723 | | 1430U, 15826U, 16294U, 19940U, 10596U, 16813U, 12879U, 16932U, |
10724 | | 17645U, 2744U, 3210U, 1271U, 15779U, 3544U, 1452U, 15844U, |
10725 | | 16315U, 16245U, 17268U, 872U, 5603U, 3624U, 1463U, 15850U, |
10726 | | 16320U, 16389U, 19998U, 8041U, 8611U, 11228U, 11635U, 9864U, |
10727 | | 11256U, 20014U, 12095U, 7985U, 16672U, 16907U, 15010U, 16943U, |
10728 | | 18356U, 2932U, 8467U, 3410U, 1369U, 15802U, 16269U, 6151U, |
10729 | | 1533U, 15917U, 16413U, 11192U, 8253U, 2682U, 6973U, 11171U, |
10730 | | 16597U, 16703U, 2714U, 17136U, 2721U, 954U, 20140U, 2946U, |
10731 | | 11510U, 14040U, 11505U, 11758U, 4627U, 19432U, 18372U, 14881U, |
10732 | | 12590U, 18029U, 11702U, 11233U, 11246U, 11268U, 11426U, 20048U, |
10733 | | 14245U, 14621U, 8125U, 19276U, 20415U, 16089U, 3427U, 1418U, |
10734 | | 15820U, 16284U, 17596U, 17502U, 917U, 20071U, 10601U, 16819U, |
10735 | | 12884U, 16938U, 17650U, 13970U, 2752U, 11611U, 11596U, 8073U, |
10736 | | 16683U, 11641U, 11277U, 11082U, 7017U, 8660U, 11877U, 7141U, |
10737 | | 8822U, 12059U, 20032U, 11640U, 703U, 11673U, 11646U, 20617U, |
10738 | | 11678U, 16947U, 11674U, 8295U, 11657U, 11687U, 20101U, 14268U, |
10739 | | 2831U, 11617U, 11601U, 8083U, 16689U, 11647U, 11280U, 7022U, |
10740 | | 8665U, 11882U, 7146U, 8840U, 12064U, 20036U, 16972U, 11679U, |
10741 | | 20104U, 11491U, 1713U, 2892U, 2654U, 14360U, 3178U, 12596U, |
10742 | | 7239U, 14591U, 14053U, 19286U, 650U, 19422U, 14340U, 18969U, |
10743 | | 22123U, 708U, 14370U, 17097U, 14375U, 19088U, 7447U, 6915U, |
10744 | | 11413U, 1798U, 17191U, 17430U, 11293U, 11105U, 11381U, 14979U, |
10745 | | 14899U, 22116U, 7633U, 73U, 13999U, 7840U, 7941U, 12082U, |
10746 | | 7975U, 7639U, 7645U, 15275U, 3458U, 13318U, 17273U, 17507U, |
10747 | | 8472U, 7651U, 17662U, 2632U, 6757U, 11735U, 203U, 23U, |
10748 | | 447U, 15684U, 17167U, 13400U, 11496U, 2703U, 7322U, 3411U, |
10749 | | 1357U, 15803U, 16270U, 17280U, 878U, 6152U, 1534U, 15918U, |
10750 | | 16737U, 21159U, 6623U, 10972U, 4452U, 13189U, 5480U, 9740U, |
10751 | | 13948U, 5959U, 10249U, 3992U, 12436U, 5009U, 9233U, 13607U, |
10752 | | 14564U, 15204U, 20373U, 14787U, 15560U, 20581U, 16666U, 21140U, |
10753 | | 6602U, 10951U, 4429U, 13168U, 5457U, 9717U, 13927U, 5936U, |
10754 | | 10226U, 3967U, 12413U, 4984U, 9208U, 13584U, 14541U, 15181U, |
10755 | | 20350U, 14766U, 15539U, 20560U, 16860U, 21169U, 6634U, 10983U, |
10756 | | 4464U, 13200U, 5492U, 9752U, 13959U, 5971U, 10261U, 4005U, |
10757 | | 12448U, 5022U, 9246U, 13619U, 14576U, 15216U, 20385U, 14798U, |
10758 | | 15571U, 20592U, 16414U, 17130U, 2900U, 8221U, 6969U, 16592U, |
10759 | | 8615U, 16699U, 11652U, 10495U, 16775U, 16895U, 20018U, 4582U, |
10760 | | 637U, 14968U, 12726U, 659U, 7588U, 11481U, 1789U, 7628U, |
10761 | | 16618U, 16013U, 612U, 11763U, 18778U, 11187U, 8010U, 6949U, |
10762 | | 11165U, 16573U, 16677U, 11629U, 16768U, 16888U, 12086U, 7980U, |
10763 | | 11546U, 16924U, 11668U, 19381U, 20065U, 12779U, 15289U, 17185U, |
10764 | | 654U, 13633U, 19091U, 19893U, 3372U, 1343U, 15796U, 16259U, |
10765 | | 6094U, 1528U, 15911U, 16403U, 16106U, 17610U, 17127U, 844U, |
10766 | | 7607U, 11486U, 617U, 11768U, 18788U, 11683U, 12699U, 8003U, |
10767 | | 11551U, 13422U, 1827U, 18940U, 15279U, 19266U, 19450U, 19391U, |
10768 | | 16836U, 15688U, 8477U, 4597U, 22032U, 13684U, 19226U, 13303U, |
10769 | | 20074U, 14860U, 15671U, 2942U, 8504U, 11500U, 2708U, 4586U, |
10770 | | 7094U, 13327U, 9867U, 20085U, 18378U, 19638U, 8285U, 12766U, |
10771 | | 19958U, 3414U, 19967U, 6210U, 19986U, 8584U, 11843U, 4640U, |
10772 | | 2905U, 8297U, 12633U, 2926U, 10530U, 8717U, 12676U, 20022U, |
10773 | | 14893U, 13689U, 8060U, 9896U, 20096U, 13670U, 2881U, 20964U, |
10774 | | 6409U, 10758U, 4215U, 12975U, 5243U, 9503U, 13800U, 5722U, |
10775 | | 10012U, 3732U, 12199U, 4749U, 8973U, 13443U, 14400U, 15040U, |
10776 | | 20209U, 14639U, 15412U, 20433U, 8573U, 21005U, 6454U, 10803U, |
10777 | | 4265U, 13020U, 5293U, 9553U, 13845U, 5772U, 10062U, 3787U, |
10778 | | 12249U, 4804U, 9028U, 13493U, 14450U, 15090U, 20259U, 14684U, |
10779 | | 15457U, 20478U, 7695U, 20987U, 6427U, 10776U, 4235U, 12993U, |
10780 | | 5263U, 9523U, 13818U, 5742U, 10032U, 3754U, 12219U, 4771U, |
10781 | | 8995U, 13463U, 14420U, 15060U, 20229U, 14657U, 15430U, 20451U, |
10782 | | 13676U, 15638U, 19095U, 19897U, 7612U, 12709U, 19565U, 8353U, |
10783 | | 10576U, 8482U, 11393U, 934U, 8209U, 20152U, 19447U, 17541U, |
10784 | | 2950U, 19646U, 17554U, 16112U, 17615U, 17514U, 923U, 20132U, |
10785 | | 19185U, 13304U, 15693U, 2275U, 16182U, 16205U, 14046U, 2747U, |
10786 | | 1086U, 1435U, 2414U, 18766U, 18798U, 19292U, 18772U, 18804U, |
10787 | | 19375U, 3273U, 16304U, 16231U, 13690U, 8695U, 11887U, 8859U, |
10788 | | 12069U, 20097U, 15313U, 11289U, 19075U, 17158U, 3479U, 7663U, |
10789 | | 184U, 497U, 6147U, 14586U, 22100U, 19081U, 22133U, 19215U, |
10790 | | 6205U, 22074U, 14616U, 22108U, 17395U, 6145U, 22040U, 19281U, |
10791 | | 22141U, 18527U, 8483U, 11583U, 648U, 19420U, 19100U, 959U, |
10792 | | 987U, 2636U, 2643U, 1001U, 2648U, 15595U, 6762U, 7669U, |
10793 | | 8424U, 15589U, 15584U, 6753U, 7624U, 8416U, 14865U, 15580U, |
10794 | | 8309U, 1607U, 6983U, 7828U, 8619U, 11848U, 1724U, 7117U, |
10795 | | 7960U, 8785U, 13637U, 7701U, 1575U, 7954U, 1593U, 1549U, |
10796 | | 1561U, 15602U, 1886U, 17830U, 7333U, 18113U, 8130U, 18194U, |
10797 | | 10433U, 18259U, 1468U, 13994U, 12574U, 18384U, 3186U, 1175U, |
10798 | | 8509U, 1625U, 17817U, 7001U, 18100U, 7847U, 18181U, 8644U, |
10799 | | 18246U, 11861U, 1731U, 17823U, 7124U, 18106U, 7967U, 18187U, |
10800 | | 8792U, 18252U, 13664U, 1480U, 9911U, 12098U, 14938U, 3191U, |
10801 | | 1187U, 20181U, 2603U, 14912U, 7544U, 8376U, 10649U, 7260U, |
10802 | | 14882U, 7270U, 14962U, 10422U, 20403U, 2617U, 7567U, 8391U, |
10803 | | 10672U, 2346U, 7657U, 22091U, 22024U, 3418U, 7711U, 14908U, |
10804 | | 2665U, 1007U, 6768U, 7675U, 8430U, 11739U, 1718U, 7111U, |
10805 | | 7948U, 8779U, 13405U, 1820U, 7249U, 8049U, 9884U, 12080U, |
10806 | | 1744U, 7176U, 7973U, 8852U, 19503U, 2357U, 7471U, 8320U, |
10807 | | 10548U, 12729U, 1787U, 7213U, 8008U, 9386U, 19517U, 2373U, |
10808 | | 7487U, 8336U, 10564U, 842U, 974U, 6746U, 7605U, 8409U, |
10809 | | 19456U, 2338U, 7457U, 8301U, 10534U, 12697U, 1774U, 7206U, |
10810 | | 8001U, 9379U, 19510U, 2365U, 7479U, 8328U, 10556U, 633U, |
10811 | | 1024U, 3431U, 1423U, 17795U, 6785U, 18078U, 8513U, 18224U, |
10812 | | 2574U, 18004U, 7515U, 18156U, 10613U, 18298U, 1919U, 3485U, |
10813 | | 1103U, 17695U, 1993U, 17845U, 8435U, 1201U, 17763U, 3628U, |
10814 | | 1117U, 17711U, 2007U, 17861U, 2053U, 17913U, 3182U, 1091U, |
10815 | | 1981U, 3619U, 1457U, 17802U, 6854U, 18085U, 8525U, 18231U, |
10816 | | 2581U, 18012U, 7522U, 18164U, 10620U, 18306U, 5606U, 1521U, |
10817 | | 17809U, 6888U, 18092U, 8554U, 18238U, 2595U, 18020U, 7536U, |
10818 | | 18172U, 10634U, 18314U, 11197U, 1245U, 2097U, 1149U, 17747U, |
10819 | | 2039U, 17897U, 1215U, 17779U, 1133U, 17729U, 2023U, 17879U, |
10820 | | 2067U, 17929U, 1072U, 1967U, 12038U, 18342U, 1297U, 2143U, |
10821 | | 1327U, 2173U, 16865U, 3393U, 13392U, 669U, 1036U, 1931U, |
10822 | | 19658U, 1397U, 2254U, 1269U, 14058U, 1281U, 2127U, 18354U, |
10823 | | 2115U, 1367U, 2220U, 697U, 1050U, 1945U, 18359U, 1381U, |
10824 | | 2234U, 14610U, 1311U, 2157U, 18143U, 1355U, 15656U, 1341U, |
10825 | | 2187U, 2208U, 11111U, 1229U, 2081U, 13308U, 6860U, 7723U, |
10826 | | 13387U, 663U, 967U, 6739U, 7593U, 8397U, 1809U, 7233U, |
10827 | | 8038U, 9873U, 13396U, 1815U, 7244U, 8044U, 9879U, 17406U, |
10828 | | 1912U, 17837U, 7395U, 18120U, 10485U, 18266U, 12871U, 21257U, |
10829 | | 996U, 16018U, 7361U, 8183U, 10454U, 15643U, 14925U, 7307U, |
10830 | | 8100U, 10402U, 2739U, 1012U, 6773U, 7685U, 8445U, 3539U, |
10831 | | 1440U, 1511U, 7346U, 8168U, 10439U, 3173U, 1163U, 6878U, |
10832 | | 7728U, 8544U, 1678U, 7081U, 7910U, 8737U, 16384U, 7374U, |
10833 | | 8196U, 10467U, 19463U, 2351U, 7465U, 8314U, 10542U, 14997U, |
10834 | | 12090U, 20395U, 6320U, 7550U, 8382U, 10655U, 20164U, 2588U, |
10835 | | 7529U, 8369U, 10627U, 7225U, 13418U, 21265U, 15002U, 1881U, |
10836 | | 7328U, 8115U, 10417U, 16928U, 14919U, 1868U, 7300U, 8093U, |
10837 | | 10395U, 12687U, 16911U, 8343U, 1613U, 6989U, 7834U, 8625U, |
10838 | | 14973U, 3440U, 1429U, 6791U, 8519U, 8404U, 1619U, 6995U, |
10839 | | 8631U, 11730U, 1707U, 4602U, 1498U, 6865U, 8531U, 7105U, |
10840 | | 8766U, 1630U, 7032U, 8670U, 19581U, 14329U, 1850U, 7282U, |
10841 | | 10377U, 14270U, 1844U, 7276U, 10371U, 5602U, 1516U, 6883U, |
10842 | | 8549U, 9907U, 1650U, 7057U, 8700U, 12094U, 1751U, 4646U, |
10843 | | 1505U, 6872U, 8538U, 7183U, 8864U, 1637U, 7044U, 8682U, |
10844 | | 19588U, 14335U, 1857U, 7289U, 10384U, 14221U, 1839U, 7265U, |
10845 | | 8076U, 9918U, 12105U, 1756U, 7188U, 7989U, 8869U, 14366U, |
10846 | | 1863U, 7295U, 10390U, 15020U, 10480U, 1661U, 7068U, 7886U, |
10847 | | 8711U, 12692U, 1768U, 7200U, 7995U, 9373U, 12734U, 8014U, |
10848 | | 15303U, 19885U, 2495U, 7494U, 8364U, 10586U, 12874U, 1803U, |
10849 | | 7219U, 8026U, 9408U, 14246U, 2812U, 14225U, 14380U, 19889U, |
10850 | | 14622U, 2886U, 5628U, 11117U, 13644U, 11588U, 7100U, 7930U, |
10851 | | 8761U, 18336U, 7413U, 18135U, 8246U, 18208U, 10498U, 18281U, |
10852 | | 18331U, 7407U, 18128U, 8240U, 18201U, 10492U, 18274U, 20176U, |
10853 | | 17654U, 18754U, 2270U, 7439U, 8271U, 10516U, 15234U, 14933U, |
10854 | | 1875U, 7316U, 8109U, 10411U, 11283U, 1700U, 7087U, 7916U, |
10855 | | 8748U, 15283U, 18568U, 2250U, 11087U, 15607U, 11100U, 15622U, |
10856 | | 11094U, 1667U, 7074U, 7903U, 8726U, 15615U, 6797U, 7717U, |
10857 | | 14886U, 14984U, 15296U, 15391U, 14990U, 14903U, 7807U, 1587U, |
10858 | | 6928U, 8597U, 11838U, 7435U, 8257U, 10512U, 12739U, 1793U, |
10859 | | 3203U, 1263U, 15308U, 15661U, 848U, 981U, 3405U, 12703U, |
10860 | | 1781U, 15278U, 17100U, 19277U, 21284U, 16023U, 7367U, 8189U, |
10861 | | 10460U, 15649U, 1538U, 7353U, 8175U, 10446U, 6909U, 7812U, |
10862 | | 8561U, 16500U, 7380U, 8202U, 10473U, 12785U, 13688U, 21274U, |
10863 | | 2915U, 1017U, 17687U, 6778U, 18070U, 8450U, 18216U, 2566U, |
10864 | | 17995U, 7507U, 18147U, 10605U, 18289U, 12708U, 16917U, 18415U, |
10865 | | 2201U, 7420U, 10505U, 2609U, 7559U, 10664U, 13781U, 1833U, |
10866 | | 8065U, 6954U, 8608U, 9901U, 15628U, 7339U, 8136U, 13693U, |
10867 | | 15312U, 10428U, 1655U, 7062U, 8705U, 20170U, 10642U, 12888U, |
10868 | | 12580U, 1762U, 7194U, 9367U, 1643U, 7050U, 8688U, 19594U, |
10869 | | 12074U, 1737U, 7169U, 8845U, 19927U, 14604U, 1581U, 1600U, |
10870 | | 1555U, 1568U, 1474U, 1181U, 1487U, 1194U, 1030U, 1925U, |
10871 | | 2380U, 2673U, 1066U, 1110U, 17703U, 2000U, 17853U, 2425U, |
10872 | | 17945U, 1208U, 17771U, 1125U, 17720U, 2015U, 17870U, 2432U, |
10873 | | 17953U, 2060U, 17921U, 2455U, 17979U, 1961U, 2401U, 1097U, |
10874 | | 1987U, 2419U, 1251U, 2103U, 2477U, 11516U, 1257U, 1156U, |
10875 | | 17755U, 2046U, 17905U, 2448U, 17971U, 1222U, 17787U, 1141U, |
10876 | | 17738U, 2031U, 17888U, 2440U, 17962U, 2074U, 17937U, 2462U, |
10877 | | 17987U, 2109U, 2483U, 1079U, 1974U, 2407U, 3197U, 18348U, |
10878 | | 1304U, 2150U, 2508U, 1334U, 2180U, 2523U, 3399U, 19902U, |
10879 | | 1043U, 1938U, 2386U, 1405U, 2262U, 2558U, 1275U, 1289U, |
10880 | | 2135U, 2500U, 2121U, 1374U, 2227U, 2543U, 2489U, 1058U, |
10881 | | 1953U, 2393U, 1389U, 2242U, 2550U, 1319U, 2165U, 2515U, |
10882 | | 1361U, 1348U, 2194U, 2530U, 2214U, 2537U, 1237U, 2089U, |
10883 | | 2469U, 1446U, 1169U, 19656U, 2954U, 8361U, 16726U, 11658U, |
10884 | | 11438U, 7027U, 7164U, 20053U, 17559U, 11688U, 8488U, 20161U, |
10885 | | 14877U, |
10886 | | }; |
10887 | | |
10888 | 0 | static inline void InitSystemZMCInstrInfo(MCInstrInfo *II) { |
10889 | 0 | II->InitMCInstrInfo(SystemZDescs.Insts, SystemZInstrNameIndices, SystemZInstrNameData, nullptr, nullptr, 3105); |
10890 | 0 | } |
10891 | | |
10892 | | } // end namespace llvm |
10893 | | #endif // GET_INSTRINFO_MC_DESC |
10894 | | |
10895 | | #ifdef GET_INSTRINFO_HEADER |
10896 | | #undef GET_INSTRINFO_HEADER |
10897 | | namespace llvm { |
10898 | | struct SystemZGenInstrInfo : public TargetInstrInfo { |
10899 | | explicit SystemZGenInstrInfo(unsigned CFSetupOpcode = ~0u, unsigned CFDestroyOpcode = ~0u, unsigned CatchRetOpcode = ~0u, unsigned ReturnOpcode = ~0u); |
10900 | | ~SystemZGenInstrInfo() override = default; |
10901 | | |
10902 | | }; |
10903 | | } // end namespace llvm |
10904 | | #endif // GET_INSTRINFO_HEADER |
10905 | | |
10906 | | #ifdef GET_INSTRINFO_HELPER_DECLS |
10907 | | #undef GET_INSTRINFO_HELPER_DECLS |
10908 | | |
10909 | | |
10910 | | #endif // GET_INSTRINFO_HELPER_DECLS |
10911 | | |
10912 | | #ifdef GET_INSTRINFO_HELPERS |
10913 | | #undef GET_INSTRINFO_HELPERS |
10914 | | |
10915 | | #endif // GET_INSTRINFO_HELPERS |
10916 | | |
10917 | | #ifdef GET_INSTRINFO_CTOR_DTOR |
10918 | | #undef GET_INSTRINFO_CTOR_DTOR |
10919 | | namespace llvm { |
10920 | | extern const SystemZInstrTable SystemZDescs; |
10921 | | extern const unsigned SystemZInstrNameIndices[]; |
10922 | | extern const char SystemZInstrNameData[]; |
10923 | | SystemZGenInstrInfo::SystemZGenInstrInfo(unsigned CFSetupOpcode, unsigned CFDestroyOpcode, unsigned CatchRetOpcode, unsigned ReturnOpcode) |
10924 | 0 | : TargetInstrInfo(CFSetupOpcode, CFDestroyOpcode, CatchRetOpcode, ReturnOpcode) { |
10925 | 0 | InitMCInstrInfo(SystemZDescs.Insts, SystemZInstrNameIndices, SystemZInstrNameData, nullptr, nullptr, 3105); |
10926 | 0 | } |
10927 | | } // end namespace llvm |
10928 | | #endif // GET_INSTRINFO_CTOR_DTOR |
10929 | | |
10930 | | #ifdef GET_INSTRINFO_OPERAND_ENUM |
10931 | | #undef GET_INSTRINFO_OPERAND_ENUM |
10932 | | namespace llvm { |
10933 | | namespace SystemZ { |
10934 | | namespace OpName { |
10935 | | enum { |
10936 | | OPERAND_LAST |
10937 | | }; |
10938 | | } // end namespace OpName |
10939 | | } // end namespace SystemZ |
10940 | | } // end namespace llvm |
10941 | | #endif //GET_INSTRINFO_OPERAND_ENUM |
10942 | | |
10943 | | #ifdef GET_INSTRINFO_NAMED_OPS |
10944 | | #undef GET_INSTRINFO_NAMED_OPS |
10945 | | namespace llvm { |
10946 | | namespace SystemZ { |
10947 | | LLVM_READONLY |
10948 | | int16_t getNamedOperandIdx(uint16_t Opcode, uint16_t NamedIdx) { |
10949 | | return -1; |
10950 | | } |
10951 | | } // end namespace SystemZ |
10952 | | } // end namespace llvm |
10953 | | #endif //GET_INSTRINFO_NAMED_OPS |
10954 | | |
10955 | | #ifdef GET_INSTRINFO_OPERAND_TYPES_ENUM |
10956 | | #undef GET_INSTRINFO_OPERAND_TYPES_ENUM |
10957 | | namespace llvm { |
10958 | | namespace SystemZ { |
10959 | | namespace OpTypes { |
10960 | | enum OperandType { |
10961 | | adasym = 0, |
10962 | | bdaddr12only = 1, |
10963 | | bdaddr12pair = 2, |
10964 | | bdaddr20only = 3, |
10965 | | bdaddr20pair = 4, |
10966 | | bdladdr12onlylen4 = 5, |
10967 | | bdladdr12onlylen8 = 6, |
10968 | | bdraddr12only = 7, |
10969 | | bdvaddr12only = 8, |
10970 | | bdxaddr12only = 9, |
10971 | | bdxaddr12pair = 10, |
10972 | | bdxaddr20only = 11, |
10973 | | bdxaddr20only128 = 12, |
10974 | | bdxaddr20pair = 13, |
10975 | | brtarget12bpp = 14, |
10976 | | brtarget16 = 15, |
10977 | | brtarget16bpp = 16, |
10978 | | brtarget16tls = 17, |
10979 | | brtarget24bpp = 18, |
10980 | | brtarget32 = 19, |
10981 | | brtarget32tls = 20, |
10982 | | cond4 = 21, |
10983 | | disp12imm32 = 22, |
10984 | | disp12imm64 = 23, |
10985 | | disp20imm32 = 24, |
10986 | | disp20imm64 = 25, |
10987 | | dynalloc12only = 26, |
10988 | | f32imm = 27, |
10989 | | f64imm = 28, |
10990 | | i1imm = 29, |
10991 | | i8imm = 30, |
10992 | | i16imm = 31, |
10993 | | i32imm = 32, |
10994 | | i64imm = 33, |
10995 | | imm32lh16 = 34, |
10996 | | imm32lh16_timm = 35, |
10997 | | imm32lh16c = 36, |
10998 | | imm32lh16c_timm = 37, |
10999 | | imm32ll16 = 38, |
11000 | | imm32ll16_timm = 39, |
11001 | | imm32ll16c = 40, |
11002 | | imm32ll16c_timm = 41, |
11003 | | imm32sx8 = 42, |
11004 | | imm32sx8_timm = 43, |
11005 | | imm32sx16 = 44, |
11006 | | imm32sx16_timm = 45, |
11007 | | imm32sx16n = 46, |
11008 | | imm32sx16n_timm = 47, |
11009 | | imm32sx16trunc = 48, |
11010 | | imm32sx16trunc_timm = 49, |
11011 | | imm32zx1 = 50, |
11012 | | imm32zx1_timm = 51, |
11013 | | imm32zx2 = 52, |
11014 | | imm32zx2_timm = 53, |
11015 | | imm32zx3 = 54, |
11016 | | imm32zx3_timm = 55, |
11017 | | imm32zx4 = 56, |
11018 | | imm32zx4_timm = 57, |
11019 | | imm32zx4even = 58, |
11020 | | imm32zx4even_timm = 59, |
11021 | | imm32zx8 = 60, |
11022 | | imm32zx8_timm = 61, |
11023 | | imm32zx8trunc = 62, |
11024 | | imm32zx8trunc_timm = 63, |
11025 | | imm32zx12 = 64, |
11026 | | imm32zx12_timm = 65, |
11027 | | imm32zx16 = 66, |
11028 | | imm32zx16_timm = 67, |
11029 | | imm32zx16trunc = 68, |
11030 | | imm32zx16trunc_timm = 69, |
11031 | | imm64 = 70, |
11032 | | imm64hf32 = 71, |
11033 | | imm64hf32_timm = 72, |
11034 | | imm64hf32c = 73, |
11035 | | imm64hf32c_timm = 74, |
11036 | | imm64hh16 = 75, |
11037 | | imm64hh16_timm = 76, |
11038 | | imm64hh16c = 77, |
11039 | | imm64hh16c_timm = 78, |
11040 | | imm64hl16 = 79, |
11041 | | imm64hl16_timm = 80, |
11042 | | imm64hl16c = 81, |
11043 | | imm64hl16c_timm = 82, |
11044 | | imm64lf32 = 83, |
11045 | | imm64lf32_timm = 84, |
11046 | | imm64lf32c = 85, |
11047 | | imm64lf32c_timm = 86, |
11048 | | imm64lf32n = 87, |
11049 | | imm64lf32n_timm = 88, |
11050 | | imm64lh16 = 89, |
11051 | | imm64lh16_timm = 90, |
11052 | | imm64lh16c = 91, |
11053 | | imm64lh16c_timm = 92, |
11054 | | imm64lh16n = 93, |
11055 | | imm64lh16n_timm = 94, |
11056 | | imm64ll16 = 95, |
11057 | | imm64ll16_timm = 96, |
11058 | | imm64ll16c = 97, |
11059 | | imm64ll16c_timm = 98, |
11060 | | imm64sx8 = 99, |
11061 | | imm64sx8_timm = 100, |
11062 | | imm64sx16 = 101, |
11063 | | imm64sx16_timm = 102, |
11064 | | imm64sx16n = 103, |
11065 | | imm64sx16n_timm = 104, |
11066 | | imm64sx32 = 105, |
11067 | | imm64sx32_timm = 106, |
11068 | | imm64sx32n = 107, |
11069 | | imm64sx32n_timm = 108, |
11070 | | imm64zx8 = 109, |
11071 | | imm64zx8_timm = 110, |
11072 | | imm64zx16 = 111, |
11073 | | imm64zx16_timm = 112, |
11074 | | imm64zx32 = 113, |
11075 | | imm64zx32_timm = 114, |
11076 | | imm64zx32n = 115, |
11077 | | imm64zx32n_timm = 116, |
11078 | | imm64zx48 = 117, |
11079 | | imm64zx48_timm = 118, |
11080 | | laaddr12pair = 119, |
11081 | | laaddr20pair = 120, |
11082 | | len4imm64 = 121, |
11083 | | len8imm64 = 122, |
11084 | | mviaddr12pair = 123, |
11085 | | mviaddr20pair = 124, |
11086 | | pcrel32 = 125, |
11087 | | ptype0 = 126, |
11088 | | ptype1 = 127, |
11089 | | ptype2 = 128, |
11090 | | ptype3 = 129, |
11091 | | ptype4 = 130, |
11092 | | ptype5 = 131, |
11093 | | shift12only = 132, |
11094 | | shift20only = 133, |
11095 | | simm32 = 134, |
11096 | | simm32_timm = 135, |
11097 | | simm32n = 136, |
11098 | | simm32n_timm = 137, |
11099 | | tlssym = 138, |
11100 | | type0 = 139, |
11101 | | type1 = 140, |
11102 | | type2 = 141, |
11103 | | type3 = 142, |
11104 | | type4 = 143, |
11105 | | type5 = 144, |
11106 | | uimm32 = 145, |
11107 | | uimm32_timm = 146, |
11108 | | untyped_imm_0 = 147, |
11109 | | ADDR32 = 148, |
11110 | | ADDR64 = 149, |
11111 | | ADDR128 = 150, |
11112 | | AR32 = 151, |
11113 | | AnyReg = 152, |
11114 | | CR64 = 153, |
11115 | | FP32 = 154, |
11116 | | FP64 = 155, |
11117 | | FP128 = 156, |
11118 | | GR32 = 157, |
11119 | | GR64 = 158, |
11120 | | GR128 = 159, |
11121 | | GRH32 = 160, |
11122 | | GRX32 = 161, |
11123 | | VF128 = 162, |
11124 | | VR32 = 163, |
11125 | | VR64 = 164, |
11126 | | VR128 = 165, |
11127 | | ADDR32Bit = 166, |
11128 | | ADDR64Bit = 167, |
11129 | | ADDR128Bit = 168, |
11130 | | AR32Bit = 169, |
11131 | | AnyRegBit = 170, |
11132 | | CCR = 171, |
11133 | | CR64Bit = 172, |
11134 | | FP32Bit = 173, |
11135 | | FP64Bit = 174, |
11136 | | FP128Bit = 175, |
11137 | | FPCRegs = 176, |
11138 | | GR32Bit = 177, |
11139 | | GR64Bit = 178, |
11140 | | GR128Bit = 179, |
11141 | | GRH32Bit = 180, |
11142 | | GRX32Bit = 181, |
11143 | | VF128Bit = 182, |
11144 | | VR32Bit = 183, |
11145 | | VR64Bit = 184, |
11146 | | VR128Bit = 185, |
11147 | | OPERAND_TYPE_LIST_END |
11148 | | }; |
11149 | | } // end namespace OpTypes |
11150 | | } // end namespace SystemZ |
11151 | | } // end namespace llvm |
11152 | | #endif // GET_INSTRINFO_OPERAND_TYPES_ENUM |
11153 | | |
11154 | | #ifdef GET_INSTRINFO_OPERAND_TYPE |
11155 | | #undef GET_INSTRINFO_OPERAND_TYPE |
11156 | | namespace llvm { |
11157 | | namespace SystemZ { |
11158 | | LLVM_READONLY |
11159 | | static int getOperandType(uint16_t Opcode, uint16_t OpIdx) { |
11160 | | static const uint16_t Offsets[] = { |
11161 | | /* PHI */ |
11162 | | 0, |
11163 | | /* INLINEASM */ |
11164 | | 1, |
11165 | | /* INLINEASM_BR */ |
11166 | | 1, |
11167 | | /* CFI_INSTRUCTION */ |
11168 | | 1, |
11169 | | /* EH_LABEL */ |
11170 | | 2, |
11171 | | /* GC_LABEL */ |
11172 | | 3, |
11173 | | /* ANNOTATION_LABEL */ |
11174 | | 4, |
11175 | | /* KILL */ |
11176 | | 5, |
11177 | | /* EXTRACT_SUBREG */ |
11178 | | 5, |
11179 | | /* INSERT_SUBREG */ |
11180 | | 8, |
11181 | | /* IMPLICIT_DEF */ |
11182 | | 12, |
11183 | | /* SUBREG_TO_REG */ |
11184 | | 13, |
11185 | | /* COPY_TO_REGCLASS */ |
11186 | | 17, |
11187 | | /* DBG_VALUE */ |
11188 | | 20, |
11189 | | /* DBG_VALUE_LIST */ |
11190 | | 20, |
11191 | | /* DBG_INSTR_REF */ |
11192 | | 20, |
11193 | | /* DBG_PHI */ |
11194 | | 20, |
11195 | | /* DBG_LABEL */ |
11196 | | 20, |
11197 | | /* REG_SEQUENCE */ |
11198 | | 21, |
11199 | | /* COPY */ |
11200 | | 23, |
11201 | | /* BUNDLE */ |
11202 | | 25, |
11203 | | /* LIFETIME_START */ |
11204 | | 25, |
11205 | | /* LIFETIME_END */ |
11206 | | 26, |
11207 | | /* PSEUDO_PROBE */ |
11208 | | 27, |
11209 | | /* ARITH_FENCE */ |
11210 | | 31, |
11211 | | /* STACKMAP */ |
11212 | | 33, |
11213 | | /* FENTRY_CALL */ |
11214 | | 35, |
11215 | | /* PATCHPOINT */ |
11216 | | 35, |
11217 | | /* LOAD_STACK_GUARD */ |
11218 | | 41, |
11219 | | /* PREALLOCATED_SETUP */ |
11220 | | 42, |
11221 | | /* PREALLOCATED_ARG */ |
11222 | | 43, |
11223 | | /* STATEPOINT */ |
11224 | | 46, |
11225 | | /* LOCAL_ESCAPE */ |
11226 | | 46, |
11227 | | /* FAULTING_OP */ |
11228 | | 48, |
11229 | | /* PATCHABLE_OP */ |
11230 | | 49, |
11231 | | /* PATCHABLE_FUNCTION_ENTER */ |
11232 | | 49, |
11233 | | /* PATCHABLE_RET */ |
11234 | | 49, |
11235 | | /* PATCHABLE_FUNCTION_EXIT */ |
11236 | | 49, |
11237 | | /* PATCHABLE_TAIL_CALL */ |
11238 | | 49, |
11239 | | /* PATCHABLE_EVENT_CALL */ |
11240 | | 49, |
11241 | | /* PATCHABLE_TYPED_EVENT_CALL */ |
11242 | | 51, |
11243 | | /* ICALL_BRANCH_FUNNEL */ |
11244 | | 54, |
11245 | | /* MEMBARRIER */ |
11246 | | 54, |
11247 | | /* JUMP_TABLE_DEBUG_INFO */ |
11248 | | 54, |
11249 | | /* G_ASSERT_SEXT */ |
11250 | | 55, |
11251 | | /* G_ASSERT_ZEXT */ |
11252 | | 58, |
11253 | | /* G_ASSERT_ALIGN */ |
11254 | | 61, |
11255 | | /* G_ADD */ |
11256 | | 64, |
11257 | | /* G_SUB */ |
11258 | | 67, |
11259 | | /* G_MUL */ |
11260 | | 70, |
11261 | | /* G_SDIV */ |
11262 | | 73, |
11263 | | /* G_UDIV */ |
11264 | | 76, |
11265 | | /* G_SREM */ |
11266 | | 79, |
11267 | | /* G_UREM */ |
11268 | | 82, |
11269 | | /* G_SDIVREM */ |
11270 | | 85, |
11271 | | /* G_UDIVREM */ |
11272 | | 89, |
11273 | | /* G_AND */ |
11274 | | 93, |
11275 | | /* G_OR */ |
11276 | | 96, |
11277 | | /* G_XOR */ |
11278 | | 99, |
11279 | | /* G_IMPLICIT_DEF */ |
11280 | | 102, |
11281 | | /* G_PHI */ |
11282 | | 103, |
11283 | | /* G_FRAME_INDEX */ |
11284 | | 104, |
11285 | | /* G_GLOBAL_VALUE */ |
11286 | | 106, |
11287 | | /* G_CONSTANT_POOL */ |
11288 | | 108, |
11289 | | /* G_EXTRACT */ |
11290 | | 110, |
11291 | | /* G_UNMERGE_VALUES */ |
11292 | | 113, |
11293 | | /* G_INSERT */ |
11294 | | 115, |
11295 | | /* G_MERGE_VALUES */ |
11296 | | 119, |
11297 | | /* G_BUILD_VECTOR */ |
11298 | | 121, |
11299 | | /* G_BUILD_VECTOR_TRUNC */ |
11300 | | 123, |
11301 | | /* G_CONCAT_VECTORS */ |
11302 | | 125, |
11303 | | /* G_PTRTOINT */ |
11304 | | 127, |
11305 | | /* G_INTTOPTR */ |
11306 | | 129, |
11307 | | /* G_BITCAST */ |
11308 | | 131, |
11309 | | /* G_FREEZE */ |
11310 | | 133, |
11311 | | /* G_CONSTANT_FOLD_BARRIER */ |
11312 | | 135, |
11313 | | /* G_INTRINSIC_FPTRUNC_ROUND */ |
11314 | | 137, |
11315 | | /* G_INTRINSIC_TRUNC */ |
11316 | | 140, |
11317 | | /* G_INTRINSIC_ROUND */ |
11318 | | 142, |
11319 | | /* G_INTRINSIC_LRINT */ |
11320 | | 144, |
11321 | | /* G_INTRINSIC_ROUNDEVEN */ |
11322 | | 146, |
11323 | | /* G_READCYCLECOUNTER */ |
11324 | | 148, |
11325 | | /* G_LOAD */ |
11326 | | 149, |
11327 | | /* G_SEXTLOAD */ |
11328 | | 151, |
11329 | | /* G_ZEXTLOAD */ |
11330 | | 153, |
11331 | | /* G_INDEXED_LOAD */ |
11332 | | 155, |
11333 | | /* G_INDEXED_SEXTLOAD */ |
11334 | | 160, |
11335 | | /* G_INDEXED_ZEXTLOAD */ |
11336 | | 165, |
11337 | | /* G_STORE */ |
11338 | | 170, |
11339 | | /* G_INDEXED_STORE */ |
11340 | | 172, |
11341 | | /* G_ATOMIC_CMPXCHG_WITH_SUCCESS */ |
11342 | | 177, |
11343 | | /* G_ATOMIC_CMPXCHG */ |
11344 | | 182, |
11345 | | /* G_ATOMICRMW_XCHG */ |
11346 | | 186, |
11347 | | /* G_ATOMICRMW_ADD */ |
11348 | | 189, |
11349 | | /* G_ATOMICRMW_SUB */ |
11350 | | 192, |
11351 | | /* G_ATOMICRMW_AND */ |
11352 | | 195, |
11353 | | /* G_ATOMICRMW_NAND */ |
11354 | | 198, |
11355 | | /* G_ATOMICRMW_OR */ |
11356 | | 201, |
11357 | | /* G_ATOMICRMW_XOR */ |
11358 | | 204, |
11359 | | /* G_ATOMICRMW_MAX */ |
11360 | | 207, |
11361 | | /* G_ATOMICRMW_MIN */ |
11362 | | 210, |
11363 | | /* G_ATOMICRMW_UMAX */ |
11364 | | 213, |
11365 | | /* G_ATOMICRMW_UMIN */ |
11366 | | 216, |
11367 | | /* G_ATOMICRMW_FADD */ |
11368 | | 219, |
11369 | | /* G_ATOMICRMW_FSUB */ |
11370 | | 222, |
11371 | | /* G_ATOMICRMW_FMAX */ |
11372 | | 225, |
11373 | | /* G_ATOMICRMW_FMIN */ |
11374 | | 228, |
11375 | | /* G_ATOMICRMW_UINC_WRAP */ |
11376 | | 231, |
11377 | | /* G_ATOMICRMW_UDEC_WRAP */ |
11378 | | 234, |
11379 | | /* G_FENCE */ |
11380 | | 237, |
11381 | | /* G_PREFETCH */ |
11382 | | 239, |
11383 | | /* G_BRCOND */ |
11384 | | 243, |
11385 | | /* G_BRINDIRECT */ |
11386 | | 245, |
11387 | | /* G_INVOKE_REGION_START */ |
11388 | | 246, |
11389 | | /* G_INTRINSIC */ |
11390 | | 246, |
11391 | | /* G_INTRINSIC_W_SIDE_EFFECTS */ |
11392 | | 247, |
11393 | | /* G_INTRINSIC_CONVERGENT */ |
11394 | | 248, |
11395 | | /* G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS */ |
11396 | | 249, |
11397 | | /* G_ANYEXT */ |
11398 | | 250, |
11399 | | /* G_TRUNC */ |
11400 | | 252, |
11401 | | /* G_CONSTANT */ |
11402 | | 254, |
11403 | | /* G_FCONSTANT */ |
11404 | | 256, |
11405 | | /* G_VASTART */ |
11406 | | 258, |
11407 | | /* G_VAARG */ |
11408 | | 259, |
11409 | | /* G_SEXT */ |
11410 | | 262, |
11411 | | /* G_SEXT_INREG */ |
11412 | | 264, |
11413 | | /* G_ZEXT */ |
11414 | | 267, |
11415 | | /* G_SHL */ |
11416 | | 269, |
11417 | | /* G_LSHR */ |
11418 | | 272, |
11419 | | /* G_ASHR */ |
11420 | | 275, |
11421 | | /* G_FSHL */ |
11422 | | 278, |
11423 | | /* G_FSHR */ |
11424 | | 282, |
11425 | | /* G_ROTR */ |
11426 | | 286, |
11427 | | /* G_ROTL */ |
11428 | | 289, |
11429 | | /* G_ICMP */ |
11430 | | 292, |
11431 | | /* G_FCMP */ |
11432 | | 296, |
11433 | | /* G_SELECT */ |
11434 | | 300, |
11435 | | /* G_UADDO */ |
11436 | | 304, |
11437 | | /* G_UADDE */ |
11438 | | 308, |
11439 | | /* G_USUBO */ |
11440 | | 313, |
11441 | | /* G_USUBE */ |
11442 | | 317, |
11443 | | /* G_SADDO */ |
11444 | | 322, |
11445 | | /* G_SADDE */ |
11446 | | 326, |
11447 | | /* G_SSUBO */ |
11448 | | 331, |
11449 | | /* G_SSUBE */ |
11450 | | 335, |
11451 | | /* G_UMULO */ |
11452 | | 340, |
11453 | | /* G_SMULO */ |
11454 | | 344, |
11455 | | /* G_UMULH */ |
11456 | | 348, |
11457 | | /* G_SMULH */ |
11458 | | 351, |
11459 | | /* G_UADDSAT */ |
11460 | | 354, |
11461 | | /* G_SADDSAT */ |
11462 | | 357, |
11463 | | /* G_USUBSAT */ |
11464 | | 360, |
11465 | | /* G_SSUBSAT */ |
11466 | | 363, |
11467 | | /* G_USHLSAT */ |
11468 | | 366, |
11469 | | /* G_SSHLSAT */ |
11470 | | 369, |
11471 | | /* G_SMULFIX */ |
11472 | | 372, |
11473 | | /* G_UMULFIX */ |
11474 | | 376, |
11475 | | /* G_SMULFIXSAT */ |
11476 | | 380, |
11477 | | /* G_UMULFIXSAT */ |
11478 | | 384, |
11479 | | /* G_SDIVFIX */ |
11480 | | 388, |
11481 | | /* G_UDIVFIX */ |
11482 | | 392, |
11483 | | /* G_SDIVFIXSAT */ |
11484 | | 396, |
11485 | | /* G_UDIVFIXSAT */ |
11486 | | 400, |
11487 | | /* G_FADD */ |
11488 | | 404, |
11489 | | /* G_FSUB */ |
11490 | | 407, |
11491 | | /* G_FMUL */ |
11492 | | 410, |
11493 | | /* G_FMA */ |
11494 | | 413, |
11495 | | /* G_FMAD */ |
11496 | | 417, |
11497 | | /* G_FDIV */ |
11498 | | 421, |
11499 | | /* G_FREM */ |
11500 | | 424, |
11501 | | /* G_FPOW */ |
11502 | | 427, |
11503 | | /* G_FPOWI */ |
11504 | | 430, |
11505 | | /* G_FEXP */ |
11506 | | 433, |
11507 | | /* G_FEXP2 */ |
11508 | | 435, |
11509 | | /* G_FEXP10 */ |
11510 | | 437, |
11511 | | /* G_FLOG */ |
11512 | | 439, |
11513 | | /* G_FLOG2 */ |
11514 | | 441, |
11515 | | /* G_FLOG10 */ |
11516 | | 443, |
11517 | | /* G_FLDEXP */ |
11518 | | 445, |
11519 | | /* G_FFREXP */ |
11520 | | 448, |
11521 | | /* G_FNEG */ |
11522 | | 451, |
11523 | | /* G_FPEXT */ |
11524 | | 453, |
11525 | | /* G_FPTRUNC */ |
11526 | | 455, |
11527 | | /* G_FPTOSI */ |
11528 | | 457, |
11529 | | /* G_FPTOUI */ |
11530 | | 459, |
11531 | | /* G_SITOFP */ |
11532 | | 461, |
11533 | | /* G_UITOFP */ |
11534 | | 463, |
11535 | | /* G_FABS */ |
11536 | | 465, |
11537 | | /* G_FCOPYSIGN */ |
11538 | | 467, |
11539 | | /* G_IS_FPCLASS */ |
11540 | | 470, |
11541 | | /* G_FCANONICALIZE */ |
11542 | | 473, |
11543 | | /* G_FMINNUM */ |
11544 | | 475, |
11545 | | /* G_FMAXNUM */ |
11546 | | 478, |
11547 | | /* G_FMINNUM_IEEE */ |
11548 | | 481, |
11549 | | /* G_FMAXNUM_IEEE */ |
11550 | | 484, |
11551 | | /* G_FMINIMUM */ |
11552 | | 487, |
11553 | | /* G_FMAXIMUM */ |
11554 | | 490, |
11555 | | /* G_GET_FPENV */ |
11556 | | 493, |
11557 | | /* G_SET_FPENV */ |
11558 | | 494, |
11559 | | /* G_RESET_FPENV */ |
11560 | | 495, |
11561 | | /* G_GET_FPMODE */ |
11562 | | 495, |
11563 | | /* G_SET_FPMODE */ |
11564 | | 496, |
11565 | | /* G_RESET_FPMODE */ |
11566 | | 497, |
11567 | | /* G_PTR_ADD */ |
11568 | | 497, |
11569 | | /* G_PTRMASK */ |
11570 | | 500, |
11571 | | /* G_SMIN */ |
11572 | | 503, |
11573 | | /* G_SMAX */ |
11574 | | 506, |
11575 | | /* G_UMIN */ |
11576 | | 509, |
11577 | | /* G_UMAX */ |
11578 | | 512, |
11579 | | /* G_ABS */ |
11580 | | 515, |
11581 | | /* G_LROUND */ |
11582 | | 517, |
11583 | | /* G_LLROUND */ |
11584 | | 519, |
11585 | | /* G_BR */ |
11586 | | 521, |
11587 | | /* G_BRJT */ |
11588 | | 522, |
11589 | | /* G_INSERT_VECTOR_ELT */ |
11590 | | 525, |
11591 | | /* G_EXTRACT_VECTOR_ELT */ |
11592 | | 529, |
11593 | | /* G_SHUFFLE_VECTOR */ |
11594 | | 532, |
11595 | | /* G_CTTZ */ |
11596 | | 536, |
11597 | | /* G_CTTZ_ZERO_UNDEF */ |
11598 | | 538, |
11599 | | /* G_CTLZ */ |
11600 | | 540, |
11601 | | /* G_CTLZ_ZERO_UNDEF */ |
11602 | | 542, |
11603 | | /* G_CTPOP */ |
11604 | | 544, |
11605 | | /* G_BSWAP */ |
11606 | | 546, |
11607 | | /* G_BITREVERSE */ |
11608 | | 548, |
11609 | | /* G_FCEIL */ |
11610 | | 550, |
11611 | | /* G_FCOS */ |
11612 | | 552, |
11613 | | /* G_FSIN */ |
11614 | | 554, |
11615 | | /* G_FSQRT */ |
11616 | | 556, |
11617 | | /* G_FFLOOR */ |
11618 | | 558, |
11619 | | /* G_FRINT */ |
11620 | | 560, |
11621 | | /* G_FNEARBYINT */ |
11622 | | 562, |
11623 | | /* G_ADDRSPACE_CAST */ |
11624 | | 564, |
11625 | | /* G_BLOCK_ADDR */ |
11626 | | 566, |
11627 | | /* G_JUMP_TABLE */ |
11628 | | 568, |
11629 | | /* G_DYN_STACKALLOC */ |
11630 | | 570, |
11631 | | /* G_STACKSAVE */ |
11632 | | 573, |
11633 | | /* G_STACKRESTORE */ |
11634 | | 574, |
11635 | | /* G_STRICT_FADD */ |
11636 | | 575, |
11637 | | /* G_STRICT_FSUB */ |
11638 | | 578, |
11639 | | /* G_STRICT_FMUL */ |
11640 | | 581, |
11641 | | /* G_STRICT_FDIV */ |
11642 | | 584, |
11643 | | /* G_STRICT_FREM */ |
11644 | | 587, |
11645 | | /* G_STRICT_FMA */ |
11646 | | 590, |
11647 | | /* G_STRICT_FSQRT */ |
11648 | | 594, |
11649 | | /* G_STRICT_FLDEXP */ |
11650 | | 596, |
11651 | | /* G_READ_REGISTER */ |
11652 | | 599, |
11653 | | /* G_WRITE_REGISTER */ |
11654 | | 601, |
11655 | | /* G_MEMCPY */ |
11656 | | 603, |
11657 | | /* G_MEMCPY_INLINE */ |
11658 | | 607, |
11659 | | /* G_MEMMOVE */ |
11660 | | 610, |
11661 | | /* G_MEMSET */ |
11662 | | 614, |
11663 | | /* G_BZERO */ |
11664 | | 618, |
11665 | | /* G_VECREDUCE_SEQ_FADD */ |
11666 | | 621, |
11667 | | /* G_VECREDUCE_SEQ_FMUL */ |
11668 | | 624, |
11669 | | /* G_VECREDUCE_FADD */ |
11670 | | 627, |
11671 | | /* G_VECREDUCE_FMUL */ |
11672 | | 629, |
11673 | | /* G_VECREDUCE_FMAX */ |
11674 | | 631, |
11675 | | /* G_VECREDUCE_FMIN */ |
11676 | | 633, |
11677 | | /* G_VECREDUCE_FMAXIMUM */ |
11678 | | 635, |
11679 | | /* G_VECREDUCE_FMINIMUM */ |
11680 | | 637, |
11681 | | /* G_VECREDUCE_ADD */ |
11682 | | 639, |
11683 | | /* G_VECREDUCE_MUL */ |
11684 | | 641, |
11685 | | /* G_VECREDUCE_AND */ |
11686 | | 643, |
11687 | | /* G_VECREDUCE_OR */ |
11688 | | 645, |
11689 | | /* G_VECREDUCE_XOR */ |
11690 | | 647, |
11691 | | /* G_VECREDUCE_SMAX */ |
11692 | | 649, |
11693 | | /* G_VECREDUCE_SMIN */ |
11694 | | 651, |
11695 | | /* G_VECREDUCE_UMAX */ |
11696 | | 653, |
11697 | | /* G_VECREDUCE_UMIN */ |
11698 | | 655, |
11699 | | /* G_SBFX */ |
11700 | | 657, |
11701 | | /* G_UBFX */ |
11702 | | 661, |
11703 | | /* ADA_ENTRY */ |
11704 | | 665, |
11705 | | /* ADA_ENTRY_VALUE */ |
11706 | | 669, |
11707 | | /* ADB_MemFoldPseudo */ |
11708 | | 673, |
11709 | | /* ADJCALLSTACKDOWN */ |
11710 | | 678, |
11711 | | /* ADJCALLSTACKUP */ |
11712 | | 680, |
11713 | | /* ADJDYNALLOC */ |
11714 | | 682, |
11715 | | /* AEB_MemFoldPseudo */ |
11716 | | 686, |
11717 | | /* AEXT128 */ |
11718 | | 691, |
11719 | | /* AFIMux */ |
11720 | | 693, |
11721 | | /* AG_MemFoldPseudo */ |
11722 | | 696, |
11723 | | /* AHIMux */ |
11724 | | 701, |
11725 | | /* AHIMuxK */ |
11726 | | 704, |
11727 | | /* ALG_MemFoldPseudo */ |
11728 | | 707, |
11729 | | /* AL_MemFoldPseudo */ |
11730 | | 712, |
11731 | | /* ATOMIC_CMP_SWAPW */ |
11732 | | 717, |
11733 | | /* ATOMIC_LOADW_AFI */ |
11734 | | 725, |
11735 | | /* ATOMIC_LOADW_AR */ |
11736 | | 732, |
11737 | | /* ATOMIC_LOADW_MAX */ |
11738 | | 739, |
11739 | | /* ATOMIC_LOADW_MIN */ |
11740 | | 746, |
11741 | | /* ATOMIC_LOADW_NILH */ |
11742 | | 753, |
11743 | | /* ATOMIC_LOADW_NILHi */ |
11744 | | 760, |
11745 | | /* ATOMIC_LOADW_NR */ |
11746 | | 767, |
11747 | | /* ATOMIC_LOADW_NRi */ |
11748 | | 774, |
11749 | | /* ATOMIC_LOADW_OILH */ |
11750 | | 781, |
11751 | | /* ATOMIC_LOADW_OR */ |
11752 | | 788, |
11753 | | /* ATOMIC_LOADW_SR */ |
11754 | | 795, |
11755 | | /* ATOMIC_LOADW_UMAX */ |
11756 | | 802, |
11757 | | /* ATOMIC_LOADW_UMIN */ |
11758 | | 809, |
11759 | | /* ATOMIC_LOADW_XILF */ |
11760 | | 816, |
11761 | | /* ATOMIC_LOADW_XR */ |
11762 | | 823, |
11763 | | /* ATOMIC_SWAPW */ |
11764 | | 830, |
11765 | | /* A_MemFoldPseudo */ |
11766 | | 837, |
11767 | | /* CFIMux */ |
11768 | | 842, |
11769 | | /* CGIBCall */ |
11770 | | 844, |
11771 | | /* CGIBReturn */ |
11772 | | 848, |
11773 | | /* CGRBCall */ |
11774 | | 851, |
11775 | | /* CGRBReturn */ |
11776 | | 855, |
11777 | | /* CHIMux */ |
11778 | | 858, |
11779 | | /* CIBCall */ |
11780 | | 860, |
11781 | | /* CIBReturn */ |
11782 | | 864, |
11783 | | /* CLCImm */ |
11784 | | 867, |
11785 | | /* CLCReg */ |
11786 | | 872, |
11787 | | /* CLFIMux */ |
11788 | | 877, |
11789 | | /* CLGIBCall */ |
11790 | | 879, |
11791 | | /* CLGIBReturn */ |
11792 | | 883, |
11793 | | /* CLGRBCall */ |
11794 | | 886, |
11795 | | /* CLGRBReturn */ |
11796 | | 890, |
11797 | | /* CLIBCall */ |
11798 | | 893, |
11799 | | /* CLIBReturn */ |
11800 | | 897, |
11801 | | /* CLMux */ |
11802 | | 900, |
11803 | | /* CLRBCall */ |
11804 | | 904, |
11805 | | /* CLRBReturn */ |
11806 | | 908, |
11807 | | /* CLSTLoop */ |
11808 | | 911, |
11809 | | /* CMux */ |
11810 | | 915, |
11811 | | /* CRBCall */ |
11812 | | 919, |
11813 | | /* CRBReturn */ |
11814 | | 923, |
11815 | | /* CallBASR */ |
11816 | | 926, |
11817 | | /* CallBASR_STACKEXT */ |
11818 | | 927, |
11819 | | /* CallBASR_XPLINK64 */ |
11820 | | 928, |
11821 | | /* CallBCR */ |
11822 | | 929, |
11823 | | /* CallBR */ |
11824 | | 932, |
11825 | | /* CallBRASL */ |
11826 | | 933, |
11827 | | /* CallBRASL_XPLINK64 */ |
11828 | | 934, |
11829 | | /* CallBRCL */ |
11830 | | 935, |
11831 | | /* CallJG */ |
11832 | | 938, |
11833 | | /* CondReturn */ |
11834 | | 939, |
11835 | | /* CondReturn_XPLINK */ |
11836 | | 941, |
11837 | | /* CondStore16 */ |
11838 | | 943, |
11839 | | /* CondStore16Inv */ |
11840 | | 949, |
11841 | | /* CondStore16Mux */ |
11842 | | 955, |
11843 | | /* CondStore16MuxInv */ |
11844 | | 961, |
11845 | | /* CondStore32 */ |
11846 | | 967, |
11847 | | /* CondStore32Inv */ |
11848 | | 973, |
11849 | | /* CondStore32Mux */ |
11850 | | 979, |
11851 | | /* CondStore32MuxInv */ |
11852 | | 985, |
11853 | | /* CondStore64 */ |
11854 | | 991, |
11855 | | /* CondStore64Inv */ |
11856 | | 997, |
11857 | | /* CondStore8 */ |
11858 | | 1003, |
11859 | | /* CondStore8Inv */ |
11860 | | 1009, |
11861 | | /* CondStore8Mux */ |
11862 | | 1015, |
11863 | | /* CondStore8MuxInv */ |
11864 | | 1021, |
11865 | | /* CondStoreF32 */ |
11866 | | 1027, |
11867 | | /* CondStoreF32Inv */ |
11868 | | 1033, |
11869 | | /* CondStoreF64 */ |
11870 | | 1039, |
11871 | | /* CondStoreF64Inv */ |
11872 | | 1045, |
11873 | | /* CondTrap */ |
11874 | | 1051, |
11875 | | /* DDB_MemFoldPseudo */ |
11876 | | 1053, |
11877 | | /* DEB_MemFoldPseudo */ |
11878 | | 1058, |
11879 | | /* EXRL_Pseudo */ |
11880 | | 1063, |
11881 | | /* GOT */ |
11882 | | 1069, |
11883 | | /* IIFMux */ |
11884 | | 1070, |
11885 | | /* IIHF64 */ |
11886 | | 1072, |
11887 | | /* IIHH64 */ |
11888 | | 1075, |
11889 | | /* IIHL64 */ |
11890 | | 1078, |
11891 | | /* IIHMux */ |
11892 | | 1081, |
11893 | | /* IILF64 */ |
11894 | | 1084, |
11895 | | /* IILH64 */ |
11896 | | 1087, |
11897 | | /* IILL64 */ |
11898 | | 1090, |
11899 | | /* IILMux */ |
11900 | | 1093, |
11901 | | /* L128 */ |
11902 | | 1096, |
11903 | | /* LBMux */ |
11904 | | 1100, |
11905 | | /* LEFR */ |
11906 | | 1104, |
11907 | | /* LFER */ |
11908 | | 1106, |
11909 | | /* LHIMux */ |
11910 | | 1108, |
11911 | | /* LHMux */ |
11912 | | 1110, |
11913 | | /* LLCMux */ |
11914 | | 1114, |
11915 | | /* LLCRMux */ |
11916 | | 1118, |
11917 | | /* LLHMux */ |
11918 | | 1120, |
11919 | | /* LLHRMux */ |
11920 | | 1124, |
11921 | | /* LMux */ |
11922 | | 1126, |
11923 | | /* LOCG_MemFoldPseudo */ |
11924 | | 1130, |
11925 | | /* LOCHIMux */ |
11926 | | 1136, |
11927 | | /* LOCMux */ |
11928 | | 1141, |
11929 | | /* LOCMux_MemFoldPseudo */ |
11930 | | 1147, |
11931 | | /* LOCRMux */ |
11932 | | 1153, |
11933 | | /* LTDBRCompare_Pseudo */ |
11934 | | 1158, |
11935 | | /* LTEBRCompare_Pseudo */ |
11936 | | 1159, |
11937 | | /* LTXBRCompare_Pseudo */ |
11938 | | 1160, |
11939 | | /* LX */ |
11940 | | 1161, |
11941 | | /* MADB_MemFoldPseudo */ |
11942 | | 1165, |
11943 | | /* MAEB_MemFoldPseudo */ |
11944 | | 1171, |
11945 | | /* MDB_MemFoldPseudo */ |
11946 | | 1177, |
11947 | | /* MEEB_MemFoldPseudo */ |
11948 | | 1182, |
11949 | | /* MSC_MemFoldPseudo */ |
11950 | | 1187, |
11951 | | /* MSDB_MemFoldPseudo */ |
11952 | | 1192, |
11953 | | /* MSEB_MemFoldPseudo */ |
11954 | | 1198, |
11955 | | /* MSGC_MemFoldPseudo */ |
11956 | | 1204, |
11957 | | /* MVCImm */ |
11958 | | 1209, |
11959 | | /* MVCReg */ |
11960 | | 1214, |
11961 | | /* MVSTLoop */ |
11962 | | 1219, |
11963 | | /* MemsetImmImm */ |
11964 | | 1223, |
11965 | | /* MemsetImmReg */ |
11966 | | 1227, |
11967 | | /* MemsetRegImm */ |
11968 | | 1231, |
11969 | | /* MemsetRegReg */ |
11970 | | 1235, |
11971 | | /* NCImm */ |
11972 | | 1239, |
11973 | | /* NCReg */ |
11974 | | 1244, |
11975 | | /* NG_MemFoldPseudo */ |
11976 | | 1249, |
11977 | | /* NIFMux */ |
11978 | | 1254, |
11979 | | /* NIHF64 */ |
11980 | | 1257, |
11981 | | /* NIHH64 */ |
11982 | | 1260, |
11983 | | /* NIHL64 */ |
11984 | | 1263, |
11985 | | /* NIHMux */ |
11986 | | 1266, |
11987 | | /* NILF64 */ |
11988 | | 1269, |
11989 | | /* NILH64 */ |
11990 | | 1272, |
11991 | | /* NILL64 */ |
11992 | | 1275, |
11993 | | /* NILMux */ |
11994 | | 1278, |
11995 | | /* N_MemFoldPseudo */ |
11996 | | 1281, |
11997 | | /* OCImm */ |
11998 | | 1286, |
11999 | | /* OCReg */ |
12000 | | 1291, |
12001 | | /* OG_MemFoldPseudo */ |
12002 | | 1296, |
12003 | | /* OIFMux */ |
12004 | | 1301, |
12005 | | /* OIHF64 */ |
12006 | | 1304, |
12007 | | /* OIHH64 */ |
12008 | | 1307, |
12009 | | /* OIHL64 */ |
12010 | | 1310, |
12011 | | /* OIHMux */ |
12012 | | 1313, |
12013 | | /* OILF64 */ |
12014 | | 1316, |
12015 | | /* OILH64 */ |
12016 | | 1319, |
12017 | | /* OILL64 */ |
12018 | | 1322, |
12019 | | /* OILMux */ |
12020 | | 1325, |
12021 | | /* O_MemFoldPseudo */ |
12022 | | 1328, |
12023 | | /* PAIR128 */ |
12024 | | 1333, |
12025 | | /* PROBED_ALLOCA */ |
12026 | | 1336, |
12027 | | /* PROBED_STACKALLOC */ |
12028 | | 1339, |
12029 | | /* RISBHH */ |
12030 | | 1340, |
12031 | | /* RISBHL */ |
12032 | | 1346, |
12033 | | /* RISBLH */ |
12034 | | 1352, |
12035 | | /* RISBLL */ |
12036 | | 1358, |
12037 | | /* RISBMux */ |
12038 | | 1364, |
12039 | | /* Return */ |
12040 | | 1370, |
12041 | | /* Return_XPLINK */ |
12042 | | 1370, |
12043 | | /* SCmp128Hi */ |
12044 | | 1370, |
12045 | | /* SDB_MemFoldPseudo */ |
12046 | | 1372, |
12047 | | /* SEB_MemFoldPseudo */ |
12048 | | 1377, |
12049 | | /* SELRMux */ |
12050 | | 1382, |
12051 | | /* SG_MemFoldPseudo */ |
12052 | | 1387, |
12053 | | /* SLG_MemFoldPseudo */ |
12054 | | 1392, |
12055 | | /* SL_MemFoldPseudo */ |
12056 | | 1397, |
12057 | | /* SRSTLoop */ |
12058 | | 1402, |
12059 | | /* ST128 */ |
12060 | | 1406, |
12061 | | /* STCMux */ |
12062 | | 1410, |
12063 | | /* STHMux */ |
12064 | | 1414, |
12065 | | /* STMux */ |
12066 | | 1418, |
12067 | | /* STOCMux */ |
12068 | | 1422, |
12069 | | /* STX */ |
12070 | | 1427, |
12071 | | /* S_MemFoldPseudo */ |
12072 | | 1431, |
12073 | | /* Select128 */ |
12074 | | 1436, |
12075 | | /* Select32 */ |
12076 | | 1441, |
12077 | | /* Select64 */ |
12078 | | 1446, |
12079 | | /* SelectF128 */ |
12080 | | 1451, |
12081 | | /* SelectF32 */ |
12082 | | 1456, |
12083 | | /* SelectF64 */ |
12084 | | 1461, |
12085 | | /* SelectVR128 */ |
12086 | | 1466, |
12087 | | /* SelectVR32 */ |
12088 | | 1471, |
12089 | | /* SelectVR64 */ |
12090 | | 1476, |
12091 | | /* Serialize */ |
12092 | | 1481, |
12093 | | /* TBEGIN_nofloat */ |
12094 | | 1481, |
12095 | | /* TLS_GDCALL */ |
12096 | | 1484, |
12097 | | /* TLS_LDCALL */ |
12098 | | 1485, |
12099 | | /* TMHH64 */ |
12100 | | 1486, |
12101 | | /* TMHL64 */ |
12102 | | 1488, |
12103 | | /* TMHMux */ |
12104 | | 1490, |
12105 | | /* TMLH64 */ |
12106 | | 1492, |
12107 | | /* TMLL64 */ |
12108 | | 1494, |
12109 | | /* TMLMux */ |
12110 | | 1496, |
12111 | | /* Trap */ |
12112 | | 1498, |
12113 | | /* UCmp128Hi */ |
12114 | | 1498, |
12115 | | /* VL32 */ |
12116 | | 1500, |
12117 | | /* VL64 */ |
12118 | | 1504, |
12119 | | /* VLR32 */ |
12120 | | 1508, |
12121 | | /* VLR64 */ |
12122 | | 1510, |
12123 | | /* VLVGP32 */ |
12124 | | 1512, |
12125 | | /* VST32 */ |
12126 | | 1515, |
12127 | | /* VST64 */ |
12128 | | 1519, |
12129 | | /* XCImm */ |
12130 | | 1523, |
12131 | | /* XCReg */ |
12132 | | 1528, |
12133 | | /* XG_MemFoldPseudo */ |
12134 | | 1533, |
12135 | | /* XIFMux */ |
12136 | | 1538, |
12137 | | /* XIHF64 */ |
12138 | | 1541, |
12139 | | /* XILF64 */ |
12140 | | 1544, |
12141 | | /* XPLINK_STACKALLOC */ |
12142 | | 1547, |
12143 | | /* X_MemFoldPseudo */ |
12144 | | 1547, |
12145 | | /* ZEXT128 */ |
12146 | | 1552, |
12147 | | /* A */ |
12148 | | 1554, |
12149 | | /* AD */ |
12150 | | 1559, |
12151 | | /* ADB */ |
12152 | | 1564, |
12153 | | /* ADBR */ |
12154 | | 1569, |
12155 | | /* ADR */ |
12156 | | 1572, |
12157 | | /* ADTR */ |
12158 | | 1575, |
12159 | | /* ADTRA */ |
12160 | | 1578, |
12161 | | /* AE */ |
12162 | | 1582, |
12163 | | /* AEB */ |
12164 | | 1587, |
12165 | | /* AEBR */ |
12166 | | 1592, |
12167 | | /* AER */ |
12168 | | 1595, |
12169 | | /* AFI */ |
12170 | | 1598, |
12171 | | /* AG */ |
12172 | | 1601, |
12173 | | /* AGF */ |
12174 | | 1606, |
12175 | | /* AGFI */ |
12176 | | 1611, |
12177 | | /* AGFR */ |
12178 | | 1614, |
12179 | | /* AGH */ |
12180 | | 1617, |
12181 | | /* AGHI */ |
12182 | | 1622, |
12183 | | /* AGHIK */ |
12184 | | 1625, |
12185 | | /* AGR */ |
12186 | | 1628, |
12187 | | /* AGRK */ |
12188 | | 1631, |
12189 | | /* AGSI */ |
12190 | | 1634, |
12191 | | /* AH */ |
12192 | | 1637, |
12193 | | /* AHHHR */ |
12194 | | 1642, |
12195 | | /* AHHLR */ |
12196 | | 1645, |
12197 | | /* AHI */ |
12198 | | 1648, |
12199 | | /* AHIK */ |
12200 | | 1651, |
12201 | | /* AHY */ |
12202 | | 1654, |
12203 | | /* AIH */ |
12204 | | 1659, |
12205 | | /* AL */ |
12206 | | 1662, |
12207 | | /* ALC */ |
12208 | | 1667, |
12209 | | /* ALCG */ |
12210 | | 1672, |
12211 | | /* ALCGR */ |
12212 | | 1677, |
12213 | | /* ALCR */ |
12214 | | 1680, |
12215 | | /* ALFI */ |
12216 | | 1683, |
12217 | | /* ALG */ |
12218 | | 1686, |
12219 | | /* ALGF */ |
12220 | | 1691, |
12221 | | /* ALGFI */ |
12222 | | 1696, |
12223 | | /* ALGFR */ |
12224 | | 1699, |
12225 | | /* ALGHSIK */ |
12226 | | 1702, |
12227 | | /* ALGR */ |
12228 | | 1705, |
12229 | | /* ALGRK */ |
12230 | | 1708, |
12231 | | /* ALGSI */ |
12232 | | 1711, |
12233 | | /* ALHHHR */ |
12234 | | 1714, |
12235 | | /* ALHHLR */ |
12236 | | 1717, |
12237 | | /* ALHSIK */ |
12238 | | 1720, |
12239 | | /* ALR */ |
12240 | | 1723, |
12241 | | /* ALRK */ |
12242 | | 1726, |
12243 | | /* ALSI */ |
12244 | | 1729, |
12245 | | /* ALSIH */ |
12246 | | 1732, |
12247 | | /* ALSIHN */ |
12248 | | 1735, |
12249 | | /* ALY */ |
12250 | | 1738, |
12251 | | /* AP */ |
12252 | | 1743, |
12253 | | /* AR */ |
12254 | | 1749, |
12255 | | /* ARK */ |
12256 | | 1752, |
12257 | | /* ASI */ |
12258 | | 1755, |
12259 | | /* AU */ |
12260 | | 1758, |
12261 | | /* AUR */ |
12262 | | 1763, |
12263 | | /* AW */ |
12264 | | 1766, |
12265 | | /* AWR */ |
12266 | | 1771, |
12267 | | /* AXBR */ |
12268 | | 1774, |
12269 | | /* AXR */ |
12270 | | 1777, |
12271 | | /* AXTR */ |
12272 | | 1780, |
12273 | | /* AXTRA */ |
12274 | | 1783, |
12275 | | /* AY */ |
12276 | | 1787, |
12277 | | /* B */ |
12278 | | 1792, |
12279 | | /* BAKR */ |
12280 | | 1795, |
12281 | | /* BAL */ |
12282 | | 1797, |
12283 | | /* BALR */ |
12284 | | 1801, |
12285 | | /* BAS */ |
12286 | | 1803, |
12287 | | /* BASR */ |
12288 | | 1807, |
12289 | | /* BASSM */ |
12290 | | 1809, |
12291 | | /* BAsmE */ |
12292 | | 1811, |
12293 | | /* BAsmH */ |
12294 | | 1814, |
12295 | | /* BAsmHE */ |
12296 | | 1817, |
12297 | | /* BAsmL */ |
12298 | | 1820, |
12299 | | /* BAsmLE */ |
12300 | | 1823, |
12301 | | /* BAsmLH */ |
12302 | | 1826, |
12303 | | /* BAsmM */ |
12304 | | 1829, |
12305 | | /* BAsmNE */ |
12306 | | 1832, |
12307 | | /* BAsmNH */ |
12308 | | 1835, |
12309 | | /* BAsmNHE */ |
12310 | | 1838, |
12311 | | /* BAsmNL */ |
12312 | | 1841, |
12313 | | /* BAsmNLE */ |
12314 | | 1844, |
12315 | | /* BAsmNLH */ |
12316 | | 1847, |
12317 | | /* BAsmNM */ |
12318 | | 1850, |
12319 | | /* BAsmNO */ |
12320 | | 1853, |
12321 | | /* BAsmNP */ |
12322 | | 1856, |
12323 | | /* BAsmNZ */ |
12324 | | 1859, |
12325 | | /* BAsmO */ |
12326 | | 1862, |
12327 | | /* BAsmP */ |
12328 | | 1865, |
12329 | | /* BAsmZ */ |
12330 | | 1868, |
12331 | | /* BC */ |
12332 | | 1871, |
12333 | | /* BCAsm */ |
12334 | | 1876, |
12335 | | /* BCR */ |
12336 | | 1880, |
12337 | | /* BCRAsm */ |
12338 | | 1883, |
12339 | | /* BCT */ |
12340 | | 1885, |
12341 | | /* BCTG */ |
12342 | | 1890, |
12343 | | /* BCTGR */ |
12344 | | 1895, |
12345 | | /* BCTR */ |
12346 | | 1898, |
12347 | | /* BI */ |
12348 | | 1901, |
12349 | | /* BIAsmE */ |
12350 | | 1904, |
12351 | | /* BIAsmH */ |
12352 | | 1907, |
12353 | | /* BIAsmHE */ |
12354 | | 1910, |
12355 | | /* BIAsmL */ |
12356 | | 1913, |
12357 | | /* BIAsmLE */ |
12358 | | 1916, |
12359 | | /* BIAsmLH */ |
12360 | | 1919, |
12361 | | /* BIAsmM */ |
12362 | | 1922, |
12363 | | /* BIAsmNE */ |
12364 | | 1925, |
12365 | | /* BIAsmNH */ |
12366 | | 1928, |
12367 | | /* BIAsmNHE */ |
12368 | | 1931, |
12369 | | /* BIAsmNL */ |
12370 | | 1934, |
12371 | | /* BIAsmNLE */ |
12372 | | 1937, |
12373 | | /* BIAsmNLH */ |
12374 | | 1940, |
12375 | | /* BIAsmNM */ |
12376 | | 1943, |
12377 | | /* BIAsmNO */ |
12378 | | 1946, |
12379 | | /* BIAsmNP */ |
12380 | | 1949, |
12381 | | /* BIAsmNZ */ |
12382 | | 1952, |
12383 | | /* BIAsmO */ |
12384 | | 1955, |
12385 | | /* BIAsmP */ |
12386 | | 1958, |
12387 | | /* BIAsmZ */ |
12388 | | 1961, |
12389 | | /* BIC */ |
12390 | | 1964, |
12391 | | /* BICAsm */ |
12392 | | 1969, |
12393 | | /* BPP */ |
12394 | | 1973, |
12395 | | /* BPRP */ |
12396 | | 1977, |
12397 | | /* BR */ |
12398 | | 1980, |
12399 | | /* BRAS */ |
12400 | | 1981, |
12401 | | /* BRASL */ |
12402 | | 1984, |
12403 | | /* BRAsmE */ |
12404 | | 1987, |
12405 | | /* BRAsmH */ |
12406 | | 1988, |
12407 | | /* BRAsmHE */ |
12408 | | 1989, |
12409 | | /* BRAsmL */ |
12410 | | 1990, |
12411 | | /* BRAsmLE */ |
12412 | | 1991, |
12413 | | /* BRAsmLH */ |
12414 | | 1992, |
12415 | | /* BRAsmM */ |
12416 | | 1993, |
12417 | | /* BRAsmNE */ |
12418 | | 1994, |
12419 | | /* BRAsmNH */ |
12420 | | 1995, |
12421 | | /* BRAsmNHE */ |
12422 | | 1996, |
12423 | | /* BRAsmNL */ |
12424 | | 1997, |
12425 | | /* BRAsmNLE */ |
12426 | | 1998, |
12427 | | /* BRAsmNLH */ |
12428 | | 1999, |
12429 | | /* BRAsmNM */ |
12430 | | 2000, |
12431 | | /* BRAsmNO */ |
12432 | | 2001, |
12433 | | /* BRAsmNP */ |
12434 | | 2002, |
12435 | | /* BRAsmNZ */ |
12436 | | 2003, |
12437 | | /* BRAsmO */ |
12438 | | 2004, |
12439 | | /* BRAsmP */ |
12440 | | 2005, |
12441 | | /* BRAsmZ */ |
12442 | | 2006, |
12443 | | /* BRC */ |
12444 | | 2007, |
12445 | | /* BRCAsm */ |
12446 | | 2010, |
12447 | | /* BRCL */ |
12448 | | 2012, |
12449 | | /* BRCLAsm */ |
12450 | | 2015, |
12451 | | /* BRCT */ |
12452 | | 2017, |
12453 | | /* BRCTG */ |
12454 | | 2020, |
12455 | | /* BRCTH */ |
12456 | | 2023, |
12457 | | /* BRXH */ |
12458 | | 2026, |
12459 | | /* BRXHG */ |
12460 | | 2030, |
12461 | | /* BRXLE */ |
12462 | | 2034, |
12463 | | /* BRXLG */ |
12464 | | 2038, |
12465 | | /* BSA */ |
12466 | | 2042, |
12467 | | /* BSG */ |
12468 | | 2044, |
12469 | | /* BSM */ |
12470 | | 2046, |
12471 | | /* BXH */ |
12472 | | 2048, |
12473 | | /* BXHG */ |
12474 | | 2053, |
12475 | | /* BXLE */ |
12476 | | 2058, |
12477 | | /* BXLEG */ |
12478 | | 2063, |
12479 | | /* C */ |
12480 | | 2068, |
12481 | | /* CD */ |
12482 | | 2072, |
12483 | | /* CDB */ |
12484 | | 2076, |
12485 | | /* CDBR */ |
12486 | | 2080, |
12487 | | /* CDFBR */ |
12488 | | 2082, |
12489 | | /* CDFBRA */ |
12490 | | 2084, |
12491 | | /* CDFR */ |
12492 | | 2088, |
12493 | | /* CDFTR */ |
12494 | | 2090, |
12495 | | /* CDGBR */ |
12496 | | 2094, |
12497 | | /* CDGBRA */ |
12498 | | 2096, |
12499 | | /* CDGR */ |
12500 | | 2100, |
12501 | | /* CDGTR */ |
12502 | | 2102, |
12503 | | /* CDGTRA */ |
12504 | | 2104, |
12505 | | /* CDLFBR */ |
12506 | | 2108, |
12507 | | /* CDLFTR */ |
12508 | | 2112, |
12509 | | /* CDLGBR */ |
12510 | | 2116, |
12511 | | /* CDLGTR */ |
12512 | | 2120, |
12513 | | /* CDPT */ |
12514 | | 2124, |
12515 | | /* CDR */ |
12516 | | 2129, |
12517 | | /* CDS */ |
12518 | | 2131, |
12519 | | /* CDSG */ |
12520 | | 2136, |
12521 | | /* CDSTR */ |
12522 | | 2141, |
12523 | | /* CDSY */ |
12524 | | 2143, |
12525 | | /* CDTR */ |
12526 | | 2148, |
12527 | | /* CDUTR */ |
12528 | | 2150, |
12529 | | /* CDZT */ |
12530 | | 2152, |
12531 | | /* CE */ |
12532 | | 2157, |
12533 | | /* CEB */ |
12534 | | 2161, |
12535 | | /* CEBR */ |
12536 | | 2165, |
12537 | | /* CEDTR */ |
12538 | | 2167, |
12539 | | /* CEFBR */ |
12540 | | 2169, |
12541 | | /* CEFBRA */ |
12542 | | 2171, |
12543 | | /* CEFR */ |
12544 | | 2175, |
12545 | | /* CEGBR */ |
12546 | | 2177, |
12547 | | /* CEGBRA */ |
12548 | | 2179, |
12549 | | /* CEGR */ |
12550 | | 2183, |
12551 | | /* CELFBR */ |
12552 | | 2185, |
12553 | | /* CELGBR */ |
12554 | | 2189, |
12555 | | /* CER */ |
12556 | | 2193, |
12557 | | /* CEXTR */ |
12558 | | 2195, |
12559 | | /* CFC */ |
12560 | | 2197, |
12561 | | /* CFDBR */ |
12562 | | 2199, |
12563 | | /* CFDBRA */ |
12564 | | 2202, |
12565 | | /* CFDR */ |
12566 | | 2206, |
12567 | | /* CFDTR */ |
12568 | | 2209, |
12569 | | /* CFEBR */ |
12570 | | 2213, |
12571 | | /* CFEBRA */ |
12572 | | 2216, |
12573 | | /* CFER */ |
12574 | | 2220, |
12575 | | /* CFI */ |
12576 | | 2223, |
12577 | | /* CFXBR */ |
12578 | | 2225, |
12579 | | /* CFXBRA */ |
12580 | | 2228, |
12581 | | /* CFXR */ |
12582 | | 2232, |
12583 | | /* CFXTR */ |
12584 | | 2235, |
12585 | | /* CG */ |
12586 | | 2239, |
12587 | | /* CGDBR */ |
12588 | | 2243, |
12589 | | /* CGDBRA */ |
12590 | | 2246, |
12591 | | /* CGDR */ |
12592 | | 2250, |
12593 | | /* CGDTR */ |
12594 | | 2253, |
12595 | | /* CGDTRA */ |
12596 | | 2256, |
12597 | | /* CGEBR */ |
12598 | | 2260, |
12599 | | /* CGEBRA */ |
12600 | | 2263, |
12601 | | /* CGER */ |
12602 | | 2267, |
12603 | | /* CGF */ |
12604 | | 2270, |
12605 | | /* CGFI */ |
12606 | | 2274, |
12607 | | /* CGFR */ |
12608 | | 2276, |
12609 | | /* CGFRL */ |
12610 | | 2278, |
12611 | | /* CGH */ |
12612 | | 2280, |
12613 | | /* CGHI */ |
12614 | | 2284, |
12615 | | /* CGHRL */ |
12616 | | 2286, |
12617 | | /* CGHSI */ |
12618 | | 2288, |
12619 | | /* CGIB */ |
12620 | | 2291, |
12621 | | /* CGIBAsm */ |
12622 | | 2296, |
12623 | | /* CGIBAsmE */ |
12624 | | 2301, |
12625 | | /* CGIBAsmH */ |
12626 | | 2305, |
12627 | | /* CGIBAsmHE */ |
12628 | | 2309, |
12629 | | /* CGIBAsmL */ |
12630 | | 2313, |
12631 | | /* CGIBAsmLE */ |
12632 | | 2317, |
12633 | | /* CGIBAsmLH */ |
12634 | | 2321, |
12635 | | /* CGIBAsmNE */ |
12636 | | 2325, |
12637 | | /* CGIBAsmNH */ |
12638 | | 2329, |
12639 | | /* CGIBAsmNHE */ |
12640 | | 2333, |
12641 | | /* CGIBAsmNL */ |
12642 | | 2337, |
12643 | | /* CGIBAsmNLE */ |
12644 | | 2341, |
12645 | | /* CGIBAsmNLH */ |
12646 | | 2345, |
12647 | | /* CGIJ */ |
12648 | | 2349, |
12649 | | /* CGIJAsm */ |
12650 | | 2353, |
12651 | | /* CGIJAsmE */ |
12652 | | 2357, |
12653 | | /* CGIJAsmH */ |
12654 | | 2360, |
12655 | | /* CGIJAsmHE */ |
12656 | | 2363, |
12657 | | /* CGIJAsmL */ |
12658 | | 2366, |
12659 | | /* CGIJAsmLE */ |
12660 | | 2369, |
12661 | | /* CGIJAsmLH */ |
12662 | | 2372, |
12663 | | /* CGIJAsmNE */ |
12664 | | 2375, |
12665 | | /* CGIJAsmNH */ |
12666 | | 2378, |
12667 | | /* CGIJAsmNHE */ |
12668 | | 2381, |
12669 | | /* CGIJAsmNL */ |
12670 | | 2384, |
12671 | | /* CGIJAsmNLE */ |
12672 | | 2387, |
12673 | | /* CGIJAsmNLH */ |
12674 | | 2390, |
12675 | | /* CGIT */ |
12676 | | 2393, |
12677 | | /* CGITAsm */ |
12678 | | 2396, |
12679 | | /* CGITAsmE */ |
12680 | | 2399, |
12681 | | /* CGITAsmH */ |
12682 | | 2401, |
12683 | | /* CGITAsmHE */ |
12684 | | 2403, |
12685 | | /* CGITAsmL */ |
12686 | | 2405, |
12687 | | /* CGITAsmLE */ |
12688 | | 2407, |
12689 | | /* CGITAsmLH */ |
12690 | | 2409, |
12691 | | /* CGITAsmNE */ |
12692 | | 2411, |
12693 | | /* CGITAsmNH */ |
12694 | | 2413, |
12695 | | /* CGITAsmNHE */ |
12696 | | 2415, |
12697 | | /* CGITAsmNL */ |
12698 | | 2417, |
12699 | | /* CGITAsmNLE */ |
12700 | | 2419, |
12701 | | /* CGITAsmNLH */ |
12702 | | 2421, |
12703 | | /* CGR */ |
12704 | | 2423, |
12705 | | /* CGRB */ |
12706 | | 2425, |
12707 | | /* CGRBAsm */ |
12708 | | 2430, |
12709 | | /* CGRBAsmE */ |
12710 | | 2435, |
12711 | | /* CGRBAsmH */ |
12712 | | 2439, |
12713 | | /* CGRBAsmHE */ |
12714 | | 2443, |
12715 | | /* CGRBAsmL */ |
12716 | | 2447, |
12717 | | /* CGRBAsmLE */ |
12718 | | 2451, |
12719 | | /* CGRBAsmLH */ |
12720 | | 2455, |
12721 | | /* CGRBAsmNE */ |
12722 | | 2459, |
12723 | | /* CGRBAsmNH */ |
12724 | | 2463, |
12725 | | /* CGRBAsmNHE */ |
12726 | | 2467, |
12727 | | /* CGRBAsmNL */ |
12728 | | 2471, |
12729 | | /* CGRBAsmNLE */ |
12730 | | 2475, |
12731 | | /* CGRBAsmNLH */ |
12732 | | 2479, |
12733 | | /* CGRJ */ |
12734 | | 2483, |
12735 | | /* CGRJAsm */ |
12736 | | 2487, |
12737 | | /* CGRJAsmE */ |
12738 | | 2491, |
12739 | | /* CGRJAsmH */ |
12740 | | 2494, |
12741 | | /* CGRJAsmHE */ |
12742 | | 2497, |
12743 | | /* CGRJAsmL */ |
12744 | | 2500, |
12745 | | /* CGRJAsmLE */ |
12746 | | 2503, |
12747 | | /* CGRJAsmLH */ |
12748 | | 2506, |
12749 | | /* CGRJAsmNE */ |
12750 | | 2509, |
12751 | | /* CGRJAsmNH */ |
12752 | | 2512, |
12753 | | /* CGRJAsmNHE */ |
12754 | | 2515, |
12755 | | /* CGRJAsmNL */ |
12756 | | 2518, |
12757 | | /* CGRJAsmNLE */ |
12758 | | 2521, |
12759 | | /* CGRJAsmNLH */ |
12760 | | 2524, |
12761 | | /* CGRL */ |
12762 | | 2527, |
12763 | | /* CGRT */ |
12764 | | 2529, |
12765 | | /* CGRTAsm */ |
12766 | | 2532, |
12767 | | /* CGRTAsmE */ |
12768 | | 2535, |
12769 | | /* CGRTAsmH */ |
12770 | | 2537, |
12771 | | /* CGRTAsmHE */ |
12772 | | 2539, |
12773 | | /* CGRTAsmL */ |
12774 | | 2541, |
12775 | | /* CGRTAsmLE */ |
12776 | | 2543, |
12777 | | /* CGRTAsmLH */ |
12778 | | 2545, |
12779 | | /* CGRTAsmNE */ |
12780 | | 2547, |
12781 | | /* CGRTAsmNH */ |
12782 | | 2549, |
12783 | | /* CGRTAsmNHE */ |
12784 | | 2551, |
12785 | | /* CGRTAsmNL */ |
12786 | | 2553, |
12787 | | /* CGRTAsmNLE */ |
12788 | | 2555, |
12789 | | /* CGRTAsmNLH */ |
12790 | | 2557, |
12791 | | /* CGXBR */ |
12792 | | 2559, |
12793 | | /* CGXBRA */ |
12794 | | 2562, |
12795 | | /* CGXR */ |
12796 | | 2566, |
12797 | | /* CGXTR */ |
12798 | | 2569, |
12799 | | /* CGXTRA */ |
12800 | | 2572, |
12801 | | /* CH */ |
12802 | | 2576, |
12803 | | /* CHF */ |
12804 | | 2580, |
12805 | | /* CHHR */ |
12806 | | 2584, |
12807 | | /* CHHSI */ |
12808 | | 2586, |
12809 | | /* CHI */ |
12810 | | 2589, |
12811 | | /* CHLR */ |
12812 | | 2591, |
12813 | | /* CHRL */ |
12814 | | 2593, |
12815 | | /* CHSI */ |
12816 | | 2595, |
12817 | | /* CHY */ |
12818 | | 2598, |
12819 | | /* CIB */ |
12820 | | 2602, |
12821 | | /* CIBAsm */ |
12822 | | 2607, |
12823 | | /* CIBAsmE */ |
12824 | | 2612, |
12825 | | /* CIBAsmH */ |
12826 | | 2616, |
12827 | | /* CIBAsmHE */ |
12828 | | 2620, |
12829 | | /* CIBAsmL */ |
12830 | | 2624, |
12831 | | /* CIBAsmLE */ |
12832 | | 2628, |
12833 | | /* CIBAsmLH */ |
12834 | | 2632, |
12835 | | /* CIBAsmNE */ |
12836 | | 2636, |
12837 | | /* CIBAsmNH */ |
12838 | | 2640, |
12839 | | /* CIBAsmNHE */ |
12840 | | 2644, |
12841 | | /* CIBAsmNL */ |
12842 | | 2648, |
12843 | | /* CIBAsmNLE */ |
12844 | | 2652, |
12845 | | /* CIBAsmNLH */ |
12846 | | 2656, |
12847 | | /* CIH */ |
12848 | | 2660, |
12849 | | /* CIJ */ |
12850 | | 2662, |
12851 | | /* CIJAsm */ |
12852 | | 2666, |
12853 | | /* CIJAsmE */ |
12854 | | 2670, |
12855 | | /* CIJAsmH */ |
12856 | | 2673, |
12857 | | /* CIJAsmHE */ |
12858 | | 2676, |
12859 | | /* CIJAsmL */ |
12860 | | 2679, |
12861 | | /* CIJAsmLE */ |
12862 | | 2682, |
12863 | | /* CIJAsmLH */ |
12864 | | 2685, |
12865 | | /* CIJAsmNE */ |
12866 | | 2688, |
12867 | | /* CIJAsmNH */ |
12868 | | 2691, |
12869 | | /* CIJAsmNHE */ |
12870 | | 2694, |
12871 | | /* CIJAsmNL */ |
12872 | | 2697, |
12873 | | /* CIJAsmNLE */ |
12874 | | 2700, |
12875 | | /* CIJAsmNLH */ |
12876 | | 2703, |
12877 | | /* CIT */ |
12878 | | 2706, |
12879 | | /* CITAsm */ |
12880 | | 2709, |
12881 | | /* CITAsmE */ |
12882 | | 2712, |
12883 | | /* CITAsmH */ |
12884 | | 2714, |
12885 | | /* CITAsmHE */ |
12886 | | 2716, |
12887 | | /* CITAsmL */ |
12888 | | 2718, |
12889 | | /* CITAsmLE */ |
12890 | | 2720, |
12891 | | /* CITAsmLH */ |
12892 | | 2722, |
12893 | | /* CITAsmNE */ |
12894 | | 2724, |
12895 | | /* CITAsmNH */ |
12896 | | 2726, |
12897 | | /* CITAsmNHE */ |
12898 | | 2728, |
12899 | | /* CITAsmNL */ |
12900 | | 2730, |
12901 | | /* CITAsmNLE */ |
12902 | | 2732, |
12903 | | /* CITAsmNLH */ |
12904 | | 2734, |
12905 | | /* CKSM */ |
12906 | | 2736, |
12907 | | /* CL */ |
12908 | | 2740, |
12909 | | /* CLC */ |
12910 | | 2744, |
12911 | | /* CLCL */ |
12912 | | 2749, |
12913 | | /* CLCLE */ |
12914 | | 2753, |
12915 | | /* CLCLU */ |
12916 | | 2759, |
12917 | | /* CLFDBR */ |
12918 | | 2765, |
12919 | | /* CLFDTR */ |
12920 | | 2769, |
12921 | | /* CLFEBR */ |
12922 | | 2773, |
12923 | | /* CLFHSI */ |
12924 | | 2777, |
12925 | | /* CLFI */ |
12926 | | 2780, |
12927 | | /* CLFIT */ |
12928 | | 2782, |
12929 | | /* CLFITAsm */ |
12930 | | 2785, |
12931 | | /* CLFITAsmE */ |
12932 | | 2788, |
12933 | | /* CLFITAsmH */ |
12934 | | 2790, |
12935 | | /* CLFITAsmHE */ |
12936 | | 2792, |
12937 | | /* CLFITAsmL */ |
12938 | | 2794, |
12939 | | /* CLFITAsmLE */ |
12940 | | 2796, |
12941 | | /* CLFITAsmLH */ |
12942 | | 2798, |
12943 | | /* CLFITAsmNE */ |
12944 | | 2800, |
12945 | | /* CLFITAsmNH */ |
12946 | | 2802, |
12947 | | /* CLFITAsmNHE */ |
12948 | | 2804, |
12949 | | /* CLFITAsmNL */ |
12950 | | 2806, |
12951 | | /* CLFITAsmNLE */ |
12952 | | 2808, |
12953 | | /* CLFITAsmNLH */ |
12954 | | 2810, |
12955 | | /* CLFXBR */ |
12956 | | 2812, |
12957 | | /* CLFXTR */ |
12958 | | 2816, |
12959 | | /* CLG */ |
12960 | | 2820, |
12961 | | /* CLGDBR */ |
12962 | | 2824, |
12963 | | /* CLGDTR */ |
12964 | | 2828, |
12965 | | /* CLGEBR */ |
12966 | | 2832, |
12967 | | /* CLGF */ |
12968 | | 2836, |
12969 | | /* CLGFI */ |
12970 | | 2840, |
12971 | | /* CLGFR */ |
12972 | | 2842, |
12973 | | /* CLGFRL */ |
12974 | | 2844, |
12975 | | /* CLGHRL */ |
12976 | | 2846, |
12977 | | /* CLGHSI */ |
12978 | | 2848, |
12979 | | /* CLGIB */ |
12980 | | 2851, |
12981 | | /* CLGIBAsm */ |
12982 | | 2856, |
12983 | | /* CLGIBAsmE */ |
12984 | | 2861, |
12985 | | /* CLGIBAsmH */ |
12986 | | 2865, |
12987 | | /* CLGIBAsmHE */ |
12988 | | 2869, |
12989 | | /* CLGIBAsmL */ |
12990 | | 2873, |
12991 | | /* CLGIBAsmLE */ |
12992 | | 2877, |
12993 | | /* CLGIBAsmLH */ |
12994 | | 2881, |
12995 | | /* CLGIBAsmNE */ |
12996 | | 2885, |
12997 | | /* CLGIBAsmNH */ |
12998 | | 2889, |
12999 | | /* CLGIBAsmNHE */ |
13000 | | 2893, |
13001 | | /* CLGIBAsmNL */ |
13002 | | 2897, |
13003 | | /* CLGIBAsmNLE */ |
13004 | | 2901, |
13005 | | /* CLGIBAsmNLH */ |
13006 | | 2905, |
13007 | | /* CLGIJ */ |
13008 | | 2909, |
13009 | | /* CLGIJAsm */ |
13010 | | 2913, |
13011 | | /* CLGIJAsmE */ |
13012 | | 2917, |
13013 | | /* CLGIJAsmH */ |
13014 | | 2920, |
13015 | | /* CLGIJAsmHE */ |
13016 | | 2923, |
13017 | | /* CLGIJAsmL */ |
13018 | | 2926, |
13019 | | /* CLGIJAsmLE */ |
13020 | | 2929, |
13021 | | /* CLGIJAsmLH */ |
13022 | | 2932, |
13023 | | /* CLGIJAsmNE */ |
13024 | | 2935, |
13025 | | /* CLGIJAsmNH */ |
13026 | | 2938, |
13027 | | /* CLGIJAsmNHE */ |
13028 | | 2941, |
13029 | | /* CLGIJAsmNL */ |
13030 | | 2944, |
13031 | | /* CLGIJAsmNLE */ |
13032 | | 2947, |
13033 | | /* CLGIJAsmNLH */ |
13034 | | 2950, |
13035 | | /* CLGIT */ |
13036 | | 2953, |
13037 | | /* CLGITAsm */ |
13038 | | 2956, |
13039 | | /* CLGITAsmE */ |
13040 | | 2959, |
13041 | | /* CLGITAsmH */ |
13042 | | 2961, |
13043 | | /* CLGITAsmHE */ |
13044 | | 2963, |
13045 | | /* CLGITAsmL */ |
13046 | | 2965, |
13047 | | /* CLGITAsmLE */ |
13048 | | 2967, |
13049 | | /* CLGITAsmLH */ |
13050 | | 2969, |
13051 | | /* CLGITAsmNE */ |
13052 | | 2971, |
13053 | | /* CLGITAsmNH */ |
13054 | | 2973, |
13055 | | /* CLGITAsmNHE */ |
13056 | | 2975, |
13057 | | /* CLGITAsmNL */ |
13058 | | 2977, |
13059 | | /* CLGITAsmNLE */ |
13060 | | 2979, |
13061 | | /* CLGITAsmNLH */ |
13062 | | 2981, |
13063 | | /* CLGR */ |
13064 | | 2983, |
13065 | | /* CLGRB */ |
13066 | | 2985, |
13067 | | /* CLGRBAsm */ |
13068 | | 2990, |
13069 | | /* CLGRBAsmE */ |
13070 | | 2995, |
13071 | | /* CLGRBAsmH */ |
13072 | | 2999, |
13073 | | /* CLGRBAsmHE */ |
13074 | | 3003, |
13075 | | /* CLGRBAsmL */ |
13076 | | 3007, |
13077 | | /* CLGRBAsmLE */ |
13078 | | 3011, |
13079 | | /* CLGRBAsmLH */ |
13080 | | 3015, |
13081 | | /* CLGRBAsmNE */ |
13082 | | 3019, |
13083 | | /* CLGRBAsmNH */ |
13084 | | 3023, |
13085 | | /* CLGRBAsmNHE */ |
13086 | | 3027, |
13087 | | /* CLGRBAsmNL */ |
13088 | | 3031, |
13089 | | /* CLGRBAsmNLE */ |
13090 | | 3035, |
13091 | | /* CLGRBAsmNLH */ |
13092 | | 3039, |
13093 | | /* CLGRJ */ |
13094 | | 3043, |
13095 | | /* CLGRJAsm */ |
13096 | | 3047, |
13097 | | /* CLGRJAsmE */ |
13098 | | 3051, |
13099 | | /* CLGRJAsmH */ |
13100 | | 3054, |
13101 | | /* CLGRJAsmHE */ |
13102 | | 3057, |
13103 | | /* CLGRJAsmL */ |
13104 | | 3060, |
13105 | | /* CLGRJAsmLE */ |
13106 | | 3063, |
13107 | | /* CLGRJAsmLH */ |
13108 | | 3066, |
13109 | | /* CLGRJAsmNE */ |
13110 | | 3069, |
13111 | | /* CLGRJAsmNH */ |
13112 | | 3072, |
13113 | | /* CLGRJAsmNHE */ |
13114 | | 3075, |
13115 | | /* CLGRJAsmNL */ |
13116 | | 3078, |
13117 | | /* CLGRJAsmNLE */ |
13118 | | 3081, |
13119 | | /* CLGRJAsmNLH */ |
13120 | | 3084, |
13121 | | /* CLGRL */ |
13122 | | 3087, |
13123 | | /* CLGRT */ |
13124 | | 3089, |
13125 | | /* CLGRTAsm */ |
13126 | | 3092, |
13127 | | /* CLGRTAsmE */ |
13128 | | 3095, |
13129 | | /* CLGRTAsmH */ |
13130 | | 3097, |
13131 | | /* CLGRTAsmHE */ |
13132 | | 3099, |
13133 | | /* CLGRTAsmL */ |
13134 | | 3101, |
13135 | | /* CLGRTAsmLE */ |
13136 | | 3103, |
13137 | | /* CLGRTAsmLH */ |
13138 | | 3105, |
13139 | | /* CLGRTAsmNE */ |
13140 | | 3107, |
13141 | | /* CLGRTAsmNH */ |
13142 | | 3109, |
13143 | | /* CLGRTAsmNHE */ |
13144 | | 3111, |
13145 | | /* CLGRTAsmNL */ |
13146 | | 3113, |
13147 | | /* CLGRTAsmNLE */ |
13148 | | 3115, |
13149 | | /* CLGRTAsmNLH */ |
13150 | | 3117, |
13151 | | /* CLGT */ |
13152 | | 3119, |
13153 | | /* CLGTAsm */ |
13154 | | 3123, |
13155 | | /* CLGTAsmE */ |
13156 | | 3127, |
13157 | | /* CLGTAsmH */ |
13158 | | 3130, |
13159 | | /* CLGTAsmHE */ |
13160 | | 3133, |
13161 | | /* CLGTAsmL */ |
13162 | | 3136, |
13163 | | /* CLGTAsmLE */ |
13164 | | 3139, |
13165 | | /* CLGTAsmLH */ |
13166 | | 3142, |
13167 | | /* CLGTAsmNE */ |
13168 | | 3145, |
13169 | | /* CLGTAsmNH */ |
13170 | | 3148, |
13171 | | /* CLGTAsmNHE */ |
13172 | | 3151, |
13173 | | /* CLGTAsmNL */ |
13174 | | 3154, |
13175 | | /* CLGTAsmNLE */ |
13176 | | 3157, |
13177 | | /* CLGTAsmNLH */ |
13178 | | 3160, |
13179 | | /* CLGXBR */ |
13180 | | 3163, |
13181 | | /* CLGXTR */ |
13182 | | 3167, |
13183 | | /* CLHF */ |
13184 | | 3171, |
13185 | | /* CLHHR */ |
13186 | | 3175, |
13187 | | /* CLHHSI */ |
13188 | | 3177, |
13189 | | /* CLHLR */ |
13190 | | 3180, |
13191 | | /* CLHRL */ |
13192 | | 3182, |
13193 | | /* CLI */ |
13194 | | 3184, |
13195 | | /* CLIB */ |
13196 | | 3187, |
13197 | | /* CLIBAsm */ |
13198 | | 3192, |
13199 | | /* CLIBAsmE */ |
13200 | | 3197, |
13201 | | /* CLIBAsmH */ |
13202 | | 3201, |
13203 | | /* CLIBAsmHE */ |
13204 | | 3205, |
13205 | | /* CLIBAsmL */ |
13206 | | 3209, |
13207 | | /* CLIBAsmLE */ |
13208 | | 3213, |
13209 | | /* CLIBAsmLH */ |
13210 | | 3217, |
13211 | | /* CLIBAsmNE */ |
13212 | | 3221, |
13213 | | /* CLIBAsmNH */ |
13214 | | 3225, |
13215 | | /* CLIBAsmNHE */ |
13216 | | 3229, |
13217 | | /* CLIBAsmNL */ |
13218 | | 3233, |
13219 | | /* CLIBAsmNLE */ |
13220 | | 3237, |
13221 | | /* CLIBAsmNLH */ |
13222 | | 3241, |
13223 | | /* CLIH */ |
13224 | | 3245, |
13225 | | /* CLIJ */ |
13226 | | 3247, |
13227 | | /* CLIJAsm */ |
13228 | | 3251, |
13229 | | /* CLIJAsmE */ |
13230 | | 3255, |
13231 | | /* CLIJAsmH */ |
13232 | | 3258, |
13233 | | /* CLIJAsmHE */ |
13234 | | 3261, |
13235 | | /* CLIJAsmL */ |
13236 | | 3264, |
13237 | | /* CLIJAsmLE */ |
13238 | | 3267, |
13239 | | /* CLIJAsmLH */ |
13240 | | 3270, |
13241 | | /* CLIJAsmNE */ |
13242 | | 3273, |
13243 | | /* CLIJAsmNH */ |
13244 | | 3276, |
13245 | | /* CLIJAsmNHE */ |
13246 | | 3279, |
13247 | | /* CLIJAsmNL */ |
13248 | | 3282, |
13249 | | /* CLIJAsmNLE */ |
13250 | | 3285, |
13251 | | /* CLIJAsmNLH */ |
13252 | | 3288, |
13253 | | /* CLIY */ |
13254 | | 3291, |
13255 | | /* CLM */ |
13256 | | 3294, |
13257 | | /* CLMH */ |
13258 | | 3298, |
13259 | | /* CLMY */ |
13260 | | 3302, |
13261 | | /* CLR */ |
13262 | | 3306, |
13263 | | /* CLRB */ |
13264 | | 3308, |
13265 | | /* CLRBAsm */ |
13266 | | 3313, |
13267 | | /* CLRBAsmE */ |
13268 | | 3318, |
13269 | | /* CLRBAsmH */ |
13270 | | 3322, |
13271 | | /* CLRBAsmHE */ |
13272 | | 3326, |
13273 | | /* CLRBAsmL */ |
13274 | | 3330, |
13275 | | /* CLRBAsmLE */ |
13276 | | 3334, |
13277 | | /* CLRBAsmLH */ |
13278 | | 3338, |
13279 | | /* CLRBAsmNE */ |
13280 | | 3342, |
13281 | | /* CLRBAsmNH */ |
13282 | | 3346, |
13283 | | /* CLRBAsmNHE */ |
13284 | | 3350, |
13285 | | /* CLRBAsmNL */ |
13286 | | 3354, |
13287 | | /* CLRBAsmNLE */ |
13288 | | 3358, |
13289 | | /* CLRBAsmNLH */ |
13290 | | 3362, |
13291 | | /* CLRJ */ |
13292 | | 3366, |
13293 | | /* CLRJAsm */ |
13294 | | 3370, |
13295 | | /* CLRJAsmE */ |
13296 | | 3374, |
13297 | | /* CLRJAsmH */ |
13298 | | 3377, |
13299 | | /* CLRJAsmHE */ |
13300 | | 3380, |
13301 | | /* CLRJAsmL */ |
13302 | | 3383, |
13303 | | /* CLRJAsmLE */ |
13304 | | 3386, |
13305 | | /* CLRJAsmLH */ |
13306 | | 3389, |
13307 | | /* CLRJAsmNE */ |
13308 | | 3392, |
13309 | | /* CLRJAsmNH */ |
13310 | | 3395, |
13311 | | /* CLRJAsmNHE */ |
13312 | | 3398, |
13313 | | /* CLRJAsmNL */ |
13314 | | 3401, |
13315 | | /* CLRJAsmNLE */ |
13316 | | 3404, |
13317 | | /* CLRJAsmNLH */ |
13318 | | 3407, |
13319 | | /* CLRL */ |
13320 | | 3410, |
13321 | | /* CLRT */ |
13322 | | 3412, |
13323 | | /* CLRTAsm */ |
13324 | | 3415, |
13325 | | /* CLRTAsmE */ |
13326 | | 3418, |
13327 | | /* CLRTAsmH */ |
13328 | | 3420, |
13329 | | /* CLRTAsmHE */ |
13330 | | 3422, |
13331 | | /* CLRTAsmL */ |
13332 | | 3424, |
13333 | | /* CLRTAsmLE */ |
13334 | | 3426, |
13335 | | /* CLRTAsmLH */ |
13336 | | 3428, |
13337 | | /* CLRTAsmNE */ |
13338 | | 3430, |
13339 | | /* CLRTAsmNH */ |
13340 | | 3432, |
13341 | | /* CLRTAsmNHE */ |
13342 | | 3434, |
13343 | | /* CLRTAsmNL */ |
13344 | | 3436, |
13345 | | /* CLRTAsmNLE */ |
13346 | | 3438, |
13347 | | /* CLRTAsmNLH */ |
13348 | | 3440, |
13349 | | /* CLST */ |
13350 | | 3442, |
13351 | | /* CLT */ |
13352 | | 3446, |
13353 | | /* CLTAsm */ |
13354 | | 3450, |
13355 | | /* CLTAsmE */ |
13356 | | 3454, |
13357 | | /* CLTAsmH */ |
13358 | | 3457, |
13359 | | /* CLTAsmHE */ |
13360 | | 3460, |
13361 | | /* CLTAsmL */ |
13362 | | 3463, |
13363 | | /* CLTAsmLE */ |
13364 | | 3466, |
13365 | | /* CLTAsmLH */ |
13366 | | 3469, |
13367 | | /* CLTAsmNE */ |
13368 | | 3472, |
13369 | | /* CLTAsmNH */ |
13370 | | 3475, |
13371 | | /* CLTAsmNHE */ |
13372 | | 3478, |
13373 | | /* CLTAsmNL */ |
13374 | | 3481, |
13375 | | /* CLTAsmNLE */ |
13376 | | 3484, |
13377 | | /* CLTAsmNLH */ |
13378 | | 3487, |
13379 | | /* CLY */ |
13380 | | 3490, |
13381 | | /* CMPSC */ |
13382 | | 3494, |
13383 | | /* CP */ |
13384 | | 3498, |
13385 | | /* CPDT */ |
13386 | | 3504, |
13387 | | /* CPSDRdd */ |
13388 | | 3509, |
13389 | | /* CPSDRds */ |
13390 | | 3512, |
13391 | | /* CPSDRsd */ |
13392 | | 3515, |
13393 | | /* CPSDRss */ |
13394 | | 3518, |
13395 | | /* CPXT */ |
13396 | | 3521, |
13397 | | /* CPYA */ |
13398 | | 3526, |
13399 | | /* CR */ |
13400 | | 3528, |
13401 | | /* CRB */ |
13402 | | 3530, |
13403 | | /* CRBAsm */ |
13404 | | 3535, |
13405 | | /* CRBAsmE */ |
13406 | | 3540, |
13407 | | /* CRBAsmH */ |
13408 | | 3544, |
13409 | | /* CRBAsmHE */ |
13410 | | 3548, |
13411 | | /* CRBAsmL */ |
13412 | | 3552, |
13413 | | /* CRBAsmLE */ |
13414 | | 3556, |
13415 | | /* CRBAsmLH */ |
13416 | | 3560, |
13417 | | /* CRBAsmNE */ |
13418 | | 3564, |
13419 | | /* CRBAsmNH */ |
13420 | | 3568, |
13421 | | /* CRBAsmNHE */ |
13422 | | 3572, |
13423 | | /* CRBAsmNL */ |
13424 | | 3576, |
13425 | | /* CRBAsmNLE */ |
13426 | | 3580, |
13427 | | /* CRBAsmNLH */ |
13428 | | 3584, |
13429 | | /* CRDTE */ |
13430 | | 3588, |
13431 | | /* CRDTEOpt */ |
13432 | | 3592, |
13433 | | /* CRJ */ |
13434 | | 3595, |
13435 | | /* CRJAsm */ |
13436 | | 3599, |
13437 | | /* CRJAsmE */ |
13438 | | 3603, |
13439 | | /* CRJAsmH */ |
13440 | | 3606, |
13441 | | /* CRJAsmHE */ |
13442 | | 3609, |
13443 | | /* CRJAsmL */ |
13444 | | 3612, |
13445 | | /* CRJAsmLE */ |
13446 | | 3615, |
13447 | | /* CRJAsmLH */ |
13448 | | 3618, |
13449 | | /* CRJAsmNE */ |
13450 | | 3621, |
13451 | | /* CRJAsmNH */ |
13452 | | 3624, |
13453 | | /* CRJAsmNHE */ |
13454 | | 3627, |
13455 | | /* CRJAsmNL */ |
13456 | | 3630, |
13457 | | /* CRJAsmNLE */ |
13458 | | 3633, |
13459 | | /* CRJAsmNLH */ |
13460 | | 3636, |
13461 | | /* CRL */ |
13462 | | 3639, |
13463 | | /* CRT */ |
13464 | | 3641, |
13465 | | /* CRTAsm */ |
13466 | | 3644, |
13467 | | /* CRTAsmE */ |
13468 | | 3647, |
13469 | | /* CRTAsmH */ |
13470 | | 3649, |
13471 | | /* CRTAsmHE */ |
13472 | | 3651, |
13473 | | /* CRTAsmL */ |
13474 | | 3653, |
13475 | | /* CRTAsmLE */ |
13476 | | 3655, |
13477 | | /* CRTAsmLH */ |
13478 | | 3657, |
13479 | | /* CRTAsmNE */ |
13480 | | 3659, |
13481 | | /* CRTAsmNH */ |
13482 | | 3661, |
13483 | | /* CRTAsmNHE */ |
13484 | | 3663, |
13485 | | /* CRTAsmNL */ |
13486 | | 3665, |
13487 | | /* CRTAsmNLE */ |
13488 | | 3667, |
13489 | | /* CRTAsmNLH */ |
13490 | | 3669, |
13491 | | /* CS */ |
13492 | | 3671, |
13493 | | /* CSCH */ |
13494 | | 3676, |
13495 | | /* CSDTR */ |
13496 | | 3676, |
13497 | | /* CSG */ |
13498 | | 3679, |
13499 | | /* CSP */ |
13500 | | 3684, |
13501 | | /* CSPG */ |
13502 | | 3687, |
13503 | | /* CSST */ |
13504 | | 3690, |
13505 | | /* CSXTR */ |
13506 | | 3695, |
13507 | | /* CSY */ |
13508 | | 3698, |
13509 | | /* CU12 */ |
13510 | | 3703, |
13511 | | /* CU12Opt */ |
13512 | | 3708, |
13513 | | /* CU14 */ |
13514 | | 3712, |
13515 | | /* CU14Opt */ |
13516 | | 3717, |
13517 | | /* CU21 */ |
13518 | | 3721, |
13519 | | /* CU21Opt */ |
13520 | | 3726, |
13521 | | /* CU24 */ |
13522 | | 3730, |
13523 | | /* CU24Opt */ |
13524 | | 3735, |
13525 | | /* CU41 */ |
13526 | | 3739, |
13527 | | /* CU42 */ |
13528 | | 3743, |
13529 | | /* CUDTR */ |
13530 | | 3747, |
13531 | | /* CUSE */ |
13532 | | 3749, |
13533 | | /* CUTFU */ |
13534 | | 3753, |
13535 | | /* CUTFUOpt */ |
13536 | | 3758, |
13537 | | /* CUUTF */ |
13538 | | 3762, |
13539 | | /* CUUTFOpt */ |
13540 | | 3767, |
13541 | | /* CUXTR */ |
13542 | | 3771, |
13543 | | /* CVB */ |
13544 | | 3773, |
13545 | | /* CVBG */ |
13546 | | 3778, |
13547 | | /* CVBY */ |
13548 | | 3783, |
13549 | | /* CVD */ |
13550 | | 3788, |
13551 | | /* CVDG */ |
13552 | | 3792, |
13553 | | /* CVDY */ |
13554 | | 3796, |
13555 | | /* CXBR */ |
13556 | | 3800, |
13557 | | /* CXFBR */ |
13558 | | 3802, |
13559 | | /* CXFBRA */ |
13560 | | 3804, |
13561 | | /* CXFR */ |
13562 | | 3808, |
13563 | | /* CXFTR */ |
13564 | | 3810, |
13565 | | /* CXGBR */ |
13566 | | 3814, |
13567 | | /* CXGBRA */ |
13568 | | 3816, |
13569 | | /* CXGR */ |
13570 | | 3820, |
13571 | | /* CXGTR */ |
13572 | | 3822, |
13573 | | /* CXGTRA */ |
13574 | | 3824, |
13575 | | /* CXLFBR */ |
13576 | | 3828, |
13577 | | /* CXLFTR */ |
13578 | | 3832, |
13579 | | /* CXLGBR */ |
13580 | | 3836, |
13581 | | /* CXLGTR */ |
13582 | | 3840, |
13583 | | /* CXPT */ |
13584 | | 3844, |
13585 | | /* CXR */ |
13586 | | 3849, |
13587 | | /* CXSTR */ |
13588 | | 3851, |
13589 | | /* CXTR */ |
13590 | | 3853, |
13591 | | /* CXUTR */ |
13592 | | 3855, |
13593 | | /* CXZT */ |
13594 | | 3857, |
13595 | | /* CY */ |
13596 | | 3862, |
13597 | | /* CZDT */ |
13598 | | 3866, |
13599 | | /* CZXT */ |
13600 | | 3871, |
13601 | | /* D */ |
13602 | | 3876, |
13603 | | /* DD */ |
13604 | | 3881, |
13605 | | /* DDB */ |
13606 | | 3886, |
13607 | | /* DDBR */ |
13608 | | 3891, |
13609 | | /* DDR */ |
13610 | | 3894, |
13611 | | /* DDTR */ |
13612 | | 3897, |
13613 | | /* DDTRA */ |
13614 | | 3900, |
13615 | | /* DE */ |
13616 | | 3904, |
13617 | | /* DEB */ |
13618 | | 3909, |
13619 | | /* DEBR */ |
13620 | | 3914, |
13621 | | /* DER */ |
13622 | | 3917, |
13623 | | /* DFLTCC */ |
13624 | | 3920, |
13625 | | /* DIAG */ |
13626 | | 3925, |
13627 | | /* DIDBR */ |
13628 | | 3929, |
13629 | | /* DIEBR */ |
13630 | | 3934, |
13631 | | /* DL */ |
13632 | | 3939, |
13633 | | /* DLG */ |
13634 | | 3944, |
13635 | | /* DLGR */ |
13636 | | 3949, |
13637 | | /* DLR */ |
13638 | | 3952, |
13639 | | /* DP */ |
13640 | | 3955, |
13641 | | /* DR */ |
13642 | | 3961, |
13643 | | /* DSG */ |
13644 | | 3964, |
13645 | | /* DSGF */ |
13646 | | 3969, |
13647 | | /* DSGFR */ |
13648 | | 3974, |
13649 | | /* DSGR */ |
13650 | | 3977, |
13651 | | /* DXBR */ |
13652 | | 3980, |
13653 | | /* DXR */ |
13654 | | 3983, |
13655 | | /* DXTR */ |
13656 | | 3986, |
13657 | | /* DXTRA */ |
13658 | | 3989, |
13659 | | /* EAR */ |
13660 | | 3993, |
13661 | | /* ECAG */ |
13662 | | 3995, |
13663 | | /* ECCTR */ |
13664 | | 3999, |
13665 | | /* ECPGA */ |
13666 | | 4001, |
13667 | | /* ECTG */ |
13668 | | 4003, |
13669 | | /* ED */ |
13670 | | 4008, |
13671 | | /* EDMK */ |
13672 | | 4013, |
13673 | | /* EEDTR */ |
13674 | | 4018, |
13675 | | /* EEXTR */ |
13676 | | 4020, |
13677 | | /* EFPC */ |
13678 | | 4022, |
13679 | | /* EPAIR */ |
13680 | | 4023, |
13681 | | /* EPAR */ |
13682 | | 4024, |
13683 | | /* EPCTR */ |
13684 | | 4025, |
13685 | | /* EPSW */ |
13686 | | 4027, |
13687 | | /* EREG */ |
13688 | | 4029, |
13689 | | /* EREGG */ |
13690 | | 4031, |
13691 | | /* ESAIR */ |
13692 | | 4033, |
13693 | | /* ESAR */ |
13694 | | 4034, |
13695 | | /* ESDTR */ |
13696 | | 4035, |
13697 | | /* ESEA */ |
13698 | | 4037, |
13699 | | /* ESTA */ |
13700 | | 4039, |
13701 | | /* ESXTR */ |
13702 | | 4041, |
13703 | | /* ETND */ |
13704 | | 4043, |
13705 | | /* EX */ |
13706 | | 4044, |
13707 | | /* EXRL */ |
13708 | | 4048, |
13709 | | /* FIDBR */ |
13710 | | 4050, |
13711 | | /* FIDBRA */ |
13712 | | 4053, |
13713 | | /* FIDR */ |
13714 | | 4057, |
13715 | | /* FIDTR */ |
13716 | | 4059, |
13717 | | /* FIEBR */ |
13718 | | 4063, |
13719 | | /* FIEBRA */ |
13720 | | 4066, |
13721 | | /* FIER */ |
13722 | | 4070, |
13723 | | /* FIXBR */ |
13724 | | 4072, |
13725 | | /* FIXBRA */ |
13726 | | 4075, |
13727 | | /* FIXR */ |
13728 | | 4079, |
13729 | | /* FIXTR */ |
13730 | | 4081, |
13731 | | /* FLOGR */ |
13732 | | 4085, |
13733 | | /* HDR */ |
13734 | | 4087, |
13735 | | /* HER */ |
13736 | | 4089, |
13737 | | /* HSCH */ |
13738 | | 4091, |
13739 | | /* IAC */ |
13740 | | 4091, |
13741 | | /* IC */ |
13742 | | 4092, |
13743 | | /* IC32 */ |
13744 | | 4097, |
13745 | | /* IC32Y */ |
13746 | | 4102, |
13747 | | /* ICM */ |
13748 | | 4107, |
13749 | | /* ICMH */ |
13750 | | 4112, |
13751 | | /* ICMY */ |
13752 | | 4117, |
13753 | | /* ICY */ |
13754 | | 4122, |
13755 | | /* IDTE */ |
13756 | | 4127, |
13757 | | /* IDTEOpt */ |
13758 | | 4131, |
13759 | | /* IEDTR */ |
13760 | | 4134, |
13761 | | /* IEXTR */ |
13762 | | 4137, |
13763 | | /* IIHF */ |
13764 | | 4140, |
13765 | | /* IIHH */ |
13766 | | 4142, |
13767 | | /* IIHL */ |
13768 | | 4145, |
13769 | | /* IILF */ |
13770 | | 4148, |
13771 | | /* IILH */ |
13772 | | 4150, |
13773 | | /* IILL */ |
13774 | | 4153, |
13775 | | /* IPK */ |
13776 | | 4156, |
13777 | | /* IPM */ |
13778 | | 4156, |
13779 | | /* IPTE */ |
13780 | | 4157, |
13781 | | /* IPTEOpt */ |
13782 | | 4161, |
13783 | | /* IPTEOptOpt */ |
13784 | | 4164, |
13785 | | /* IRBM */ |
13786 | | 4166, |
13787 | | /* ISKE */ |
13788 | | 4168, |
13789 | | /* IVSK */ |
13790 | | 4171, |
13791 | | /* InsnE */ |
13792 | | 4174, |
13793 | | /* InsnRI */ |
13794 | | 4175, |
13795 | | /* InsnRIE */ |
13796 | | 4178, |
13797 | | /* InsnRIL */ |
13798 | | 4182, |
13799 | | /* InsnRILU */ |
13800 | | 4185, |
13801 | | /* InsnRIS */ |
13802 | | 4188, |
13803 | | /* InsnRR */ |
13804 | | 4194, |
13805 | | /* InsnRRE */ |
13806 | | 4197, |
13807 | | /* InsnRRF */ |
13808 | | 4200, |
13809 | | /* InsnRRS */ |
13810 | | 4205, |
13811 | | /* InsnRS */ |
13812 | | 4211, |
13813 | | /* InsnRSE */ |
13814 | | 4216, |
13815 | | /* InsnRSI */ |
13816 | | 4221, |
13817 | | /* InsnRSY */ |
13818 | | 4225, |
13819 | | /* InsnRX */ |
13820 | | 4230, |
13821 | | /* InsnRXE */ |
13822 | | 4235, |
13823 | | /* InsnRXF */ |
13824 | | 4240, |
13825 | | /* InsnRXY */ |
13826 | | 4246, |
13827 | | /* InsnS */ |
13828 | | 4251, |
13829 | | /* InsnSI */ |
13830 | | 4254, |
13831 | | /* InsnSIL */ |
13832 | | 4258, |
13833 | | /* InsnSIY */ |
13834 | | 4262, |
13835 | | /* InsnSS */ |
13836 | | 4266, |
13837 | | /* InsnSSE */ |
13838 | | 4273, |
13839 | | /* InsnSSF */ |
13840 | | 4278, |
13841 | | /* InsnVRI */ |
13842 | | 4284, |
13843 | | /* InsnVRR */ |
13844 | | 4290, |
13845 | | /* InsnVRS */ |
13846 | | 4297, |
13847 | | /* InsnVRV */ |
13848 | | 4303, |
13849 | | /* InsnVRX */ |
13850 | | 4309, |
13851 | | /* InsnVSI */ |
13852 | | 4315, |
13853 | | /* J */ |
13854 | | 4320, |
13855 | | /* JAsmE */ |
13856 | | 4321, |
13857 | | /* JAsmH */ |
13858 | | 4322, |
13859 | | /* JAsmHE */ |
13860 | | 4323, |
13861 | | /* JAsmL */ |
13862 | | 4324, |
13863 | | /* JAsmLE */ |
13864 | | 4325, |
13865 | | /* JAsmLH */ |
13866 | | 4326, |
13867 | | /* JAsmM */ |
13868 | | 4327, |
13869 | | /* JAsmNE */ |
13870 | | 4328, |
13871 | | /* JAsmNH */ |
13872 | | 4329, |
13873 | | /* JAsmNHE */ |
13874 | | 4330, |
13875 | | /* JAsmNL */ |
13876 | | 4331, |
13877 | | /* JAsmNLE */ |
13878 | | 4332, |
13879 | | /* JAsmNLH */ |
13880 | | 4333, |
13881 | | /* JAsmNM */ |
13882 | | 4334, |
13883 | | /* JAsmNO */ |
13884 | | 4335, |
13885 | | /* JAsmNP */ |
13886 | | 4336, |
13887 | | /* JAsmNZ */ |
13888 | | 4337, |
13889 | | /* JAsmO */ |
13890 | | 4338, |
13891 | | /* JAsmP */ |
13892 | | 4339, |
13893 | | /* JAsmZ */ |
13894 | | 4340, |
13895 | | /* JG */ |
13896 | | 4341, |
13897 | | /* JGAsmE */ |
13898 | | 4342, |
13899 | | /* JGAsmH */ |
13900 | | 4343, |
13901 | | /* JGAsmHE */ |
13902 | | 4344, |
13903 | | /* JGAsmL */ |
13904 | | 4345, |
13905 | | /* JGAsmLE */ |
13906 | | 4346, |
13907 | | /* JGAsmLH */ |
13908 | | 4347, |
13909 | | /* JGAsmM */ |
13910 | | 4348, |
13911 | | /* JGAsmNE */ |
13912 | | 4349, |
13913 | | /* JGAsmNH */ |
13914 | | 4350, |
13915 | | /* JGAsmNHE */ |
13916 | | 4351, |
13917 | | /* JGAsmNL */ |
13918 | | 4352, |
13919 | | /* JGAsmNLE */ |
13920 | | 4353, |
13921 | | /* JGAsmNLH */ |
13922 | | 4354, |
13923 | | /* JGAsmNM */ |
13924 | | 4355, |
13925 | | /* JGAsmNO */ |
13926 | | 4356, |
13927 | | /* JGAsmNP */ |
13928 | | 4357, |
13929 | | /* JGAsmNZ */ |
13930 | | 4358, |
13931 | | /* JGAsmO */ |
13932 | | 4359, |
13933 | | /* JGAsmP */ |
13934 | | 4360, |
13935 | | /* JGAsmZ */ |
13936 | | 4361, |
13937 | | /* KDB */ |
13938 | | 4362, |
13939 | | /* KDBR */ |
13940 | | 4366, |
13941 | | /* KDSA */ |
13942 | | 4368, |
13943 | | /* KDTR */ |
13944 | | 4371, |
13945 | | /* KEB */ |
13946 | | 4373, |
13947 | | /* KEBR */ |
13948 | | 4377, |
13949 | | /* KIMD */ |
13950 | | 4379, |
13951 | | /* KLMD */ |
13952 | | 4382, |
13953 | | /* KM */ |
13954 | | 4385, |
13955 | | /* KMA */ |
13956 | | 4389, |
13957 | | /* KMAC */ |
13958 | | 4395, |
13959 | | /* KMC */ |
13960 | | 4398, |
13961 | | /* KMCTR */ |
13962 | | 4402, |
13963 | | /* KMF */ |
13964 | | 4408, |
13965 | | /* KMO */ |
13966 | | 4412, |
13967 | | /* KXBR */ |
13968 | | 4416, |
13969 | | /* KXTR */ |
13970 | | 4418, |
13971 | | /* L */ |
13972 | | 4420, |
13973 | | /* LA */ |
13974 | | 4424, |
13975 | | /* LAA */ |
13976 | | 4428, |
13977 | | /* LAAG */ |
13978 | | 4432, |
13979 | | /* LAAL */ |
13980 | | 4436, |
13981 | | /* LAALG */ |
13982 | | 4440, |
13983 | | /* LAE */ |
13984 | | 4444, |
13985 | | /* LAEY */ |
13986 | | 4448, |
13987 | | /* LAM */ |
13988 | | 4452, |
13989 | | /* LAMY */ |
13990 | | 4456, |
13991 | | /* LAN */ |
13992 | | 4460, |
13993 | | /* LANG */ |
13994 | | 4464, |
13995 | | /* LAO */ |
13996 | | 4468, |
13997 | | /* LAOG */ |
13998 | | 4472, |
13999 | | /* LARL */ |
14000 | | 4476, |
14001 | | /* LASP */ |
14002 | | 4478, |
14003 | | /* LAT */ |
14004 | | 4482, |
14005 | | /* LAX */ |
14006 | | 4486, |
14007 | | /* LAXG */ |
14008 | | 4490, |
14009 | | /* LAY */ |
14010 | | 4494, |
14011 | | /* LB */ |
14012 | | 4498, |
14013 | | /* LBEAR */ |
14014 | | 4502, |
14015 | | /* LBH */ |
14016 | | 4504, |
14017 | | /* LBR */ |
14018 | | 4508, |
14019 | | /* LCBB */ |
14020 | | 4510, |
14021 | | /* LCCTL */ |
14022 | | 4515, |
14023 | | /* LCDBR */ |
14024 | | 4517, |
14025 | | /* LCDFR */ |
14026 | | 4519, |
14027 | | /* LCDFR_32 */ |
14028 | | 4521, |
14029 | | /* LCDR */ |
14030 | | 4523, |
14031 | | /* LCEBR */ |
14032 | | 4525, |
14033 | | /* LCER */ |
14034 | | 4527, |
14035 | | /* LCGFR */ |
14036 | | 4529, |
14037 | | /* LCGR */ |
14038 | | 4531, |
14039 | | /* LCR */ |
14040 | | 4533, |
14041 | | /* LCTL */ |
14042 | | 4535, |
14043 | | /* LCTLG */ |
14044 | | 4539, |
14045 | | /* LCXBR */ |
14046 | | 4543, |
14047 | | /* LCXR */ |
14048 | | 4545, |
14049 | | /* LD */ |
14050 | | 4547, |
14051 | | /* LDE */ |
14052 | | 4551, |
14053 | | /* LDE32 */ |
14054 | | 4555, |
14055 | | /* LDEB */ |
14056 | | 4559, |
14057 | | /* LDEBR */ |
14058 | | 4563, |
14059 | | /* LDER */ |
14060 | | 4565, |
14061 | | /* LDETR */ |
14062 | | 4567, |
14063 | | /* LDGR */ |
14064 | | 4570, |
14065 | | /* LDR */ |
14066 | | 4572, |
14067 | | /* LDR32 */ |
14068 | | 4574, |
14069 | | /* LDXBR */ |
14070 | | 4576, |
14071 | | /* LDXBRA */ |
14072 | | 4578, |
14073 | | /* LDXR */ |
14074 | | 4582, |
14075 | | /* LDXTR */ |
14076 | | 4584, |
14077 | | /* LDY */ |
14078 | | 4588, |
14079 | | /* LE */ |
14080 | | 4592, |
14081 | | /* LEDBR */ |
14082 | | 4596, |
14083 | | /* LEDBRA */ |
14084 | | 4598, |
14085 | | /* LEDR */ |
14086 | | 4602, |
14087 | | /* LEDTR */ |
14088 | | 4604, |
14089 | | /* LER */ |
14090 | | 4608, |
14091 | | /* LEXBR */ |
14092 | | 4610, |
14093 | | /* LEXBRA */ |
14094 | | 4612, |
14095 | | /* LEXR */ |
14096 | | 4616, |
14097 | | /* LEY */ |
14098 | | 4618, |
14099 | | /* LFAS */ |
14100 | | 4622, |
14101 | | /* LFH */ |
14102 | | 4624, |
14103 | | /* LFHAT */ |
14104 | | 4628, |
14105 | | /* LFPC */ |
14106 | | 4632, |
14107 | | /* LG */ |
14108 | | 4634, |
14109 | | /* LGAT */ |
14110 | | 4638, |
14111 | | /* LGB */ |
14112 | | 4642, |
14113 | | /* LGBR */ |
14114 | | 4646, |
14115 | | /* LGDR */ |
14116 | | 4648, |
14117 | | /* LGF */ |
14118 | | 4650, |
14119 | | /* LGFI */ |
14120 | | 4654, |
14121 | | /* LGFR */ |
14122 | | 4656, |
14123 | | /* LGFRL */ |
14124 | | 4658, |
14125 | | /* LGG */ |
14126 | | 4660, |
14127 | | /* LGH */ |
14128 | | 4664, |
14129 | | /* LGHI */ |
14130 | | 4668, |
14131 | | /* LGHR */ |
14132 | | 4670, |
14133 | | /* LGHRL */ |
14134 | | 4672, |
14135 | | /* LGR */ |
14136 | | 4674, |
14137 | | /* LGRL */ |
14138 | | 4676, |
14139 | | /* LGSC */ |
14140 | | 4678, |
14141 | | /* LH */ |
14142 | | 4682, |
14143 | | /* LHH */ |
14144 | | 4686, |
14145 | | /* LHI */ |
14146 | | 4690, |
14147 | | /* LHR */ |
14148 | | 4692, |
14149 | | /* LHRL */ |
14150 | | 4694, |
14151 | | /* LHY */ |
14152 | | 4696, |
14153 | | /* LLC */ |
14154 | | 4700, |
14155 | | /* LLCH */ |
14156 | | 4704, |
14157 | | /* LLCR */ |
14158 | | 4708, |
14159 | | /* LLGC */ |
14160 | | 4710, |
14161 | | /* LLGCR */ |
14162 | | 4714, |
14163 | | /* LLGF */ |
14164 | | 4716, |
14165 | | /* LLGFAT */ |
14166 | | 4720, |
14167 | | /* LLGFR */ |
14168 | | 4724, |
14169 | | /* LLGFRL */ |
14170 | | 4726, |
14171 | | /* LLGFSG */ |
14172 | | 4728, |
14173 | | /* LLGH */ |
14174 | | 4732, |
14175 | | /* LLGHR */ |
14176 | | 4736, |
14177 | | /* LLGHRL */ |
14178 | | 4738, |
14179 | | /* LLGT */ |
14180 | | 4740, |
14181 | | /* LLGTAT */ |
14182 | | 4744, |
14183 | | /* LLGTR */ |
14184 | | 4748, |
14185 | | /* LLH */ |
14186 | | 4750, |
14187 | | /* LLHH */ |
14188 | | 4754, |
14189 | | /* LLHR */ |
14190 | | 4758, |
14191 | | /* LLHRL */ |
14192 | | 4760, |
14193 | | /* LLIHF */ |
14194 | | 4762, |
14195 | | /* LLIHH */ |
14196 | | 4764, |
14197 | | /* LLIHL */ |
14198 | | 4766, |
14199 | | /* LLILF */ |
14200 | | 4768, |
14201 | | /* LLILH */ |
14202 | | 4770, |
14203 | | /* LLILL */ |
14204 | | 4772, |
14205 | | /* LLZRGF */ |
14206 | | 4774, |
14207 | | /* LM */ |
14208 | | 4778, |
14209 | | /* LMD */ |
14210 | | 4782, |
14211 | | /* LMG */ |
14212 | | 4788, |
14213 | | /* LMH */ |
14214 | | 4792, |
14215 | | /* LMY */ |
14216 | | 4796, |
14217 | | /* LNDBR */ |
14218 | | 4800, |
14219 | | /* LNDFR */ |
14220 | | 4802, |
14221 | | /* LNDFR_32 */ |
14222 | | 4804, |
14223 | | /* LNDR */ |
14224 | | 4806, |
14225 | | /* LNEBR */ |
14226 | | 4808, |
14227 | | /* LNER */ |
14228 | | 4810, |
14229 | | /* LNGFR */ |
14230 | | 4812, |
14231 | | /* LNGR */ |
14232 | | 4814, |
14233 | | /* LNR */ |
14234 | | 4816, |
14235 | | /* LNXBR */ |
14236 | | 4818, |
14237 | | /* LNXR */ |
14238 | | 4820, |
14239 | | /* LOC */ |
14240 | | 4822, |
14241 | | /* LOCAsm */ |
14242 | | 4828, |
14243 | | /* LOCAsmE */ |
14244 | | 4833, |
14245 | | /* LOCAsmH */ |
14246 | | 4837, |
14247 | | /* LOCAsmHE */ |
14248 | | 4841, |
14249 | | /* LOCAsmL */ |
14250 | | 4845, |
14251 | | /* LOCAsmLE */ |
14252 | | 4849, |
14253 | | /* LOCAsmLH */ |
14254 | | 4853, |
14255 | | /* LOCAsmM */ |
14256 | | 4857, |
14257 | | /* LOCAsmNE */ |
14258 | | 4861, |
14259 | | /* LOCAsmNH */ |
14260 | | 4865, |
14261 | | /* LOCAsmNHE */ |
14262 | | 4869, |
14263 | | /* LOCAsmNL */ |
14264 | | 4873, |
14265 | | /* LOCAsmNLE */ |
14266 | | 4877, |
14267 | | /* LOCAsmNLH */ |
14268 | | 4881, |
14269 | | /* LOCAsmNM */ |
14270 | | 4885, |
14271 | | /* LOCAsmNO */ |
14272 | | 4889, |
14273 | | /* LOCAsmNP */ |
14274 | | 4893, |
14275 | | /* LOCAsmNZ */ |
14276 | | 4897, |
14277 | | /* LOCAsmO */ |
14278 | | 4901, |
14279 | | /* LOCAsmP */ |
14280 | | 4905, |
14281 | | /* LOCAsmZ */ |
14282 | | 4909, |
14283 | | /* LOCFH */ |
14284 | | 4913, |
14285 | | /* LOCFHAsm */ |
14286 | | 4919, |
14287 | | /* LOCFHAsmE */ |
14288 | | 4924, |
14289 | | /* LOCFHAsmH */ |
14290 | | 4928, |
14291 | | /* LOCFHAsmHE */ |
14292 | | 4932, |
14293 | | /* LOCFHAsmL */ |
14294 | | 4936, |
14295 | | /* LOCFHAsmLE */ |
14296 | | 4940, |
14297 | | /* LOCFHAsmLH */ |
14298 | | 4944, |
14299 | | /* LOCFHAsmM */ |
14300 | | 4948, |
14301 | | /* LOCFHAsmNE */ |
14302 | | 4952, |
14303 | | /* LOCFHAsmNH */ |
14304 | | 4956, |
14305 | | /* LOCFHAsmNHE */ |
14306 | | 4960, |
14307 | | /* LOCFHAsmNL */ |
14308 | | 4964, |
14309 | | /* LOCFHAsmNLE */ |
14310 | | 4968, |
14311 | | /* LOCFHAsmNLH */ |
14312 | | 4972, |
14313 | | /* LOCFHAsmNM */ |
14314 | | 4976, |
14315 | | /* LOCFHAsmNO */ |
14316 | | 4980, |
14317 | | /* LOCFHAsmNP */ |
14318 | | 4984, |
14319 | | /* LOCFHAsmNZ */ |
14320 | | 4988, |
14321 | | /* LOCFHAsmO */ |
14322 | | 4992, |
14323 | | /* LOCFHAsmP */ |
14324 | | 4996, |
14325 | | /* LOCFHAsmZ */ |
14326 | | 5000, |
14327 | | /* LOCFHR */ |
14328 | | 5004, |
14329 | | /* LOCFHRAsm */ |
14330 | | 5009, |
14331 | | /* LOCFHRAsmE */ |
14332 | | 5013, |
14333 | | /* LOCFHRAsmH */ |
14334 | | 5016, |
14335 | | /* LOCFHRAsmHE */ |
14336 | | 5019, |
14337 | | /* LOCFHRAsmL */ |
14338 | | 5022, |
14339 | | /* LOCFHRAsmLE */ |
14340 | | 5025, |
14341 | | /* LOCFHRAsmLH */ |
14342 | | 5028, |
14343 | | /* LOCFHRAsmM */ |
14344 | | 5031, |
14345 | | /* LOCFHRAsmNE */ |
14346 | | 5034, |
14347 | | /* LOCFHRAsmNH */ |
14348 | | 5037, |
14349 | | /* LOCFHRAsmNHE */ |
14350 | | 5040, |
14351 | | /* LOCFHRAsmNL */ |
14352 | | 5043, |
14353 | | /* LOCFHRAsmNLE */ |
14354 | | 5046, |
14355 | | /* LOCFHRAsmNLH */ |
14356 | | 5049, |
14357 | | /* LOCFHRAsmNM */ |
14358 | | 5052, |
14359 | | /* LOCFHRAsmNO */ |
14360 | | 5055, |
14361 | | /* LOCFHRAsmNP */ |
14362 | | 5058, |
14363 | | /* LOCFHRAsmNZ */ |
14364 | | 5061, |
14365 | | /* LOCFHRAsmO */ |
14366 | | 5064, |
14367 | | /* LOCFHRAsmP */ |
14368 | | 5067, |
14369 | | /* LOCFHRAsmZ */ |
14370 | | 5070, |
14371 | | /* LOCG */ |
14372 | | 5073, |
14373 | | /* LOCGAsm */ |
14374 | | 5079, |
14375 | | /* LOCGAsmE */ |
14376 | | 5084, |
14377 | | /* LOCGAsmH */ |
14378 | | 5088, |
14379 | | /* LOCGAsmHE */ |
14380 | | 5092, |
14381 | | /* LOCGAsmL */ |
14382 | | 5096, |
14383 | | /* LOCGAsmLE */ |
14384 | | 5100, |
14385 | | /* LOCGAsmLH */ |
14386 | | 5104, |
14387 | | /* LOCGAsmM */ |
14388 | | 5108, |
14389 | | /* LOCGAsmNE */ |
14390 | | 5112, |
14391 | | /* LOCGAsmNH */ |
14392 | | 5116, |
14393 | | /* LOCGAsmNHE */ |
14394 | | 5120, |
14395 | | /* LOCGAsmNL */ |
14396 | | 5124, |
14397 | | /* LOCGAsmNLE */ |
14398 | | 5128, |
14399 | | /* LOCGAsmNLH */ |
14400 | | 5132, |
14401 | | /* LOCGAsmNM */ |
14402 | | 5136, |
14403 | | /* LOCGAsmNO */ |
14404 | | 5140, |
14405 | | /* LOCGAsmNP */ |
14406 | | 5144, |
14407 | | /* LOCGAsmNZ */ |
14408 | | 5148, |
14409 | | /* LOCGAsmO */ |
14410 | | 5152, |
14411 | | /* LOCGAsmP */ |
14412 | | 5156, |
14413 | | /* LOCGAsmZ */ |
14414 | | 5160, |
14415 | | /* LOCGHI */ |
14416 | | 5164, |
14417 | | /* LOCGHIAsm */ |
14418 | | 5169, |
14419 | | /* LOCGHIAsmE */ |
14420 | | 5173, |
14421 | | /* LOCGHIAsmH */ |
14422 | | 5176, |
14423 | | /* LOCGHIAsmHE */ |
14424 | | 5179, |
14425 | | /* LOCGHIAsmL */ |
14426 | | 5182, |
14427 | | /* LOCGHIAsmLE */ |
14428 | | 5185, |
14429 | | /* LOCGHIAsmLH */ |
14430 | | 5188, |
14431 | | /* LOCGHIAsmM */ |
14432 | | 5191, |
14433 | | /* LOCGHIAsmNE */ |
14434 | | 5194, |
14435 | | /* LOCGHIAsmNH */ |
14436 | | 5197, |
14437 | | /* LOCGHIAsmNHE */ |
14438 | | 5200, |
14439 | | /* LOCGHIAsmNL */ |
14440 | | 5203, |
14441 | | /* LOCGHIAsmNLE */ |
14442 | | 5206, |
14443 | | /* LOCGHIAsmNLH */ |
14444 | | 5209, |
14445 | | /* LOCGHIAsmNM */ |
14446 | | 5212, |
14447 | | /* LOCGHIAsmNO */ |
14448 | | 5215, |
14449 | | /* LOCGHIAsmNP */ |
14450 | | 5218, |
14451 | | /* LOCGHIAsmNZ */ |
14452 | | 5221, |
14453 | | /* LOCGHIAsmO */ |
14454 | | 5224, |
14455 | | /* LOCGHIAsmP */ |
14456 | | 5227, |
14457 | | /* LOCGHIAsmZ */ |
14458 | | 5230, |
14459 | | /* LOCGR */ |
14460 | | 5233, |
14461 | | /* LOCGRAsm */ |
14462 | | 5238, |
14463 | | /* LOCGRAsmE */ |
14464 | | 5242, |
14465 | | /* LOCGRAsmH */ |
14466 | | 5245, |
14467 | | /* LOCGRAsmHE */ |
14468 | | 5248, |
14469 | | /* LOCGRAsmL */ |
14470 | | 5251, |
14471 | | /* LOCGRAsmLE */ |
14472 | | 5254, |
14473 | | /* LOCGRAsmLH */ |
14474 | | 5257, |
14475 | | /* LOCGRAsmM */ |
14476 | | 5260, |
14477 | | /* LOCGRAsmNE */ |
14478 | | 5263, |
14479 | | /* LOCGRAsmNH */ |
14480 | | 5266, |
14481 | | /* LOCGRAsmNHE */ |
14482 | | 5269, |
14483 | | /* LOCGRAsmNL */ |
14484 | | 5272, |
14485 | | /* LOCGRAsmNLE */ |
14486 | | 5275, |
14487 | | /* LOCGRAsmNLH */ |
14488 | | 5278, |
14489 | | /* LOCGRAsmNM */ |
14490 | | 5281, |
14491 | | /* LOCGRAsmNO */ |
14492 | | 5284, |
14493 | | /* LOCGRAsmNP */ |
14494 | | 5287, |
14495 | | /* LOCGRAsmNZ */ |
14496 | | 5290, |
14497 | | /* LOCGRAsmO */ |
14498 | | 5293, |
14499 | | /* LOCGRAsmP */ |
14500 | | 5296, |
14501 | | /* LOCGRAsmZ */ |
14502 | | 5299, |
14503 | | /* LOCHHI */ |
14504 | | 5302, |
14505 | | /* LOCHHIAsm */ |
14506 | | 5307, |
14507 | | /* LOCHHIAsmE */ |
14508 | | 5311, |
14509 | | /* LOCHHIAsmH */ |
14510 | | 5314, |
14511 | | /* LOCHHIAsmHE */ |
14512 | | 5317, |
14513 | | /* LOCHHIAsmL */ |
14514 | | 5320, |
14515 | | /* LOCHHIAsmLE */ |
14516 | | 5323, |
14517 | | /* LOCHHIAsmLH */ |
14518 | | 5326, |
14519 | | /* LOCHHIAsmM */ |
14520 | | 5329, |
14521 | | /* LOCHHIAsmNE */ |
14522 | | 5332, |
14523 | | /* LOCHHIAsmNH */ |
14524 | | 5335, |
14525 | | /* LOCHHIAsmNHE */ |
14526 | | 5338, |
14527 | | /* LOCHHIAsmNL */ |
14528 | | 5341, |
14529 | | /* LOCHHIAsmNLE */ |
14530 | | 5344, |
14531 | | /* LOCHHIAsmNLH */ |
14532 | | 5347, |
14533 | | /* LOCHHIAsmNM */ |
14534 | | 5350, |
14535 | | /* LOCHHIAsmNO */ |
14536 | | 5353, |
14537 | | /* LOCHHIAsmNP */ |
14538 | | 5356, |
14539 | | /* LOCHHIAsmNZ */ |
14540 | | 5359, |
14541 | | /* LOCHHIAsmO */ |
14542 | | 5362, |
14543 | | /* LOCHHIAsmP */ |
14544 | | 5365, |
14545 | | /* LOCHHIAsmZ */ |
14546 | | 5368, |
14547 | | /* LOCHI */ |
14548 | | 5371, |
14549 | | /* LOCHIAsm */ |
14550 | | 5376, |
14551 | | /* LOCHIAsmE */ |
14552 | | 5380, |
14553 | | /* LOCHIAsmH */ |
14554 | | 5383, |
14555 | | /* LOCHIAsmHE */ |
14556 | | 5386, |
14557 | | /* LOCHIAsmL */ |
14558 | | 5389, |
14559 | | /* LOCHIAsmLE */ |
14560 | | 5392, |
14561 | | /* LOCHIAsmLH */ |
14562 | | 5395, |
14563 | | /* LOCHIAsmM */ |
14564 | | 5398, |
14565 | | /* LOCHIAsmNE */ |
14566 | | 5401, |
14567 | | /* LOCHIAsmNH */ |
14568 | | 5404, |
14569 | | /* LOCHIAsmNHE */ |
14570 | | 5407, |
14571 | | /* LOCHIAsmNL */ |
14572 | | 5410, |
14573 | | /* LOCHIAsmNLE */ |
14574 | | 5413, |
14575 | | /* LOCHIAsmNLH */ |
14576 | | 5416, |
14577 | | /* LOCHIAsmNM */ |
14578 | | 5419, |
14579 | | /* LOCHIAsmNO */ |
14580 | | 5422, |
14581 | | /* LOCHIAsmNP */ |
14582 | | 5425, |
14583 | | /* LOCHIAsmNZ */ |
14584 | | 5428, |
14585 | | /* LOCHIAsmO */ |
14586 | | 5431, |
14587 | | /* LOCHIAsmP */ |
14588 | | 5434, |
14589 | | /* LOCHIAsmZ */ |
14590 | | 5437, |
14591 | | /* LOCR */ |
14592 | | 5440, |
14593 | | /* LOCRAsm */ |
14594 | | 5445, |
14595 | | /* LOCRAsmE */ |
14596 | | 5449, |
14597 | | /* LOCRAsmH */ |
14598 | | 5452, |
14599 | | /* LOCRAsmHE */ |
14600 | | 5455, |
14601 | | /* LOCRAsmL */ |
14602 | | 5458, |
14603 | | /* LOCRAsmLE */ |
14604 | | 5461, |
14605 | | /* LOCRAsmLH */ |
14606 | | 5464, |
14607 | | /* LOCRAsmM */ |
14608 | | 5467, |
14609 | | /* LOCRAsmNE */ |
14610 | | 5470, |
14611 | | /* LOCRAsmNH */ |
14612 | | 5473, |
14613 | | /* LOCRAsmNHE */ |
14614 | | 5476, |
14615 | | /* LOCRAsmNL */ |
14616 | | 5479, |
14617 | | /* LOCRAsmNLE */ |
14618 | | 5482, |
14619 | | /* LOCRAsmNLH */ |
14620 | | 5485, |
14621 | | /* LOCRAsmNM */ |
14622 | | 5488, |
14623 | | /* LOCRAsmNO */ |
14624 | | 5491, |
14625 | | /* LOCRAsmNP */ |
14626 | | 5494, |
14627 | | /* LOCRAsmNZ */ |
14628 | | 5497, |
14629 | | /* LOCRAsmO */ |
14630 | | 5500, |
14631 | | /* LOCRAsmP */ |
14632 | | 5503, |
14633 | | /* LOCRAsmZ */ |
14634 | | 5506, |
14635 | | /* LPCTL */ |
14636 | | 5509, |
14637 | | /* LPD */ |
14638 | | 5511, |
14639 | | /* LPDBR */ |
14640 | | 5516, |
14641 | | /* LPDFR */ |
14642 | | 5518, |
14643 | | /* LPDFR_32 */ |
14644 | | 5520, |
14645 | | /* LPDG */ |
14646 | | 5522, |
14647 | | /* LPDR */ |
14648 | | 5527, |
14649 | | /* LPEBR */ |
14650 | | 5529, |
14651 | | /* LPER */ |
14652 | | 5531, |
14653 | | /* LPGFR */ |
14654 | | 5533, |
14655 | | /* LPGR */ |
14656 | | 5535, |
14657 | | /* LPP */ |
14658 | | 5537, |
14659 | | /* LPQ */ |
14660 | | 5539, |
14661 | | /* LPR */ |
14662 | | 5543, |
14663 | | /* LPSW */ |
14664 | | 5545, |
14665 | | /* LPSWE */ |
14666 | | 5547, |
14667 | | /* LPSWEY */ |
14668 | | 5549, |
14669 | | /* LPTEA */ |
14670 | | 5551, |
14671 | | /* LPXBR */ |
14672 | | 5556, |
14673 | | /* LPXR */ |
14674 | | 5558, |
14675 | | /* LR */ |
14676 | | 5560, |
14677 | | /* LRA */ |
14678 | | 5562, |
14679 | | /* LRAG */ |
14680 | | 5566, |
14681 | | /* LRAY */ |
14682 | | 5570, |
14683 | | /* LRDR */ |
14684 | | 5574, |
14685 | | /* LRER */ |
14686 | | 5576, |
14687 | | /* LRL */ |
14688 | | 5578, |
14689 | | /* LRV */ |
14690 | | 5580, |
14691 | | /* LRVG */ |
14692 | | 5584, |
14693 | | /* LRVGR */ |
14694 | | 5588, |
14695 | | /* LRVH */ |
14696 | | 5590, |
14697 | | /* LRVR */ |
14698 | | 5594, |
14699 | | /* LSCTL */ |
14700 | | 5596, |
14701 | | /* LT */ |
14702 | | 5598, |
14703 | | /* LTDBR */ |
14704 | | 5602, |
14705 | | /* LTDR */ |
14706 | | 5604, |
14707 | | /* LTDTR */ |
14708 | | 5606, |
14709 | | /* LTEBR */ |
14710 | | 5608, |
14711 | | /* LTER */ |
14712 | | 5610, |
14713 | | /* LTG */ |
14714 | | 5612, |
14715 | | /* LTGF */ |
14716 | | 5616, |
14717 | | /* LTGFR */ |
14718 | | 5620, |
14719 | | /* LTGR */ |
14720 | | 5622, |
14721 | | /* LTR */ |
14722 | | 5624, |
14723 | | /* LTXBR */ |
14724 | | 5626, |
14725 | | /* LTXR */ |
14726 | | 5628, |
14727 | | /* LTXTR */ |
14728 | | 5630, |
14729 | | /* LURA */ |
14730 | | 5632, |
14731 | | /* LURAG */ |
14732 | | 5634, |
14733 | | /* LXD */ |
14734 | | 5636, |
14735 | | /* LXDB */ |
14736 | | 5640, |
14737 | | /* LXDBR */ |
14738 | | 5644, |
14739 | | /* LXDR */ |
14740 | | 5646, |
14741 | | /* LXDTR */ |
14742 | | 5648, |
14743 | | /* LXE */ |
14744 | | 5651, |
14745 | | /* LXEB */ |
14746 | | 5655, |
14747 | | /* LXEBR */ |
14748 | | 5659, |
14749 | | /* LXER */ |
14750 | | 5661, |
14751 | | /* LXR */ |
14752 | | 5663, |
14753 | | /* LY */ |
14754 | | 5665, |
14755 | | /* LZDR */ |
14756 | | 5669, |
14757 | | /* LZER */ |
14758 | | 5670, |
14759 | | /* LZRF */ |
14760 | | 5671, |
14761 | | /* LZRG */ |
14762 | | 5675, |
14763 | | /* LZXR */ |
14764 | | 5679, |
14765 | | /* M */ |
14766 | | 5680, |
14767 | | /* MAD */ |
14768 | | 5685, |
14769 | | /* MADB */ |
14770 | | 5691, |
14771 | | /* MADBR */ |
14772 | | 5697, |
14773 | | /* MADR */ |
14774 | | 5701, |
14775 | | /* MAE */ |
14776 | | 5705, |
14777 | | /* MAEB */ |
14778 | | 5711, |
14779 | | /* MAEBR */ |
14780 | | 5717, |
14781 | | /* MAER */ |
14782 | | 5721, |
14783 | | /* MAY */ |
14784 | | 5725, |
14785 | | /* MAYH */ |
14786 | | 5731, |
14787 | | /* MAYHR */ |
14788 | | 5737, |
14789 | | /* MAYL */ |
14790 | | 5741, |
14791 | | /* MAYLR */ |
14792 | | 5747, |
14793 | | /* MAYR */ |
14794 | | 5751, |
14795 | | /* MC */ |
14796 | | 5755, |
14797 | | /* MD */ |
14798 | | 5758, |
14799 | | /* MDB */ |
14800 | | 5763, |
14801 | | /* MDBR */ |
14802 | | 5768, |
14803 | | /* MDE */ |
14804 | | 5771, |
14805 | | /* MDEB */ |
14806 | | 5776, |
14807 | | /* MDEBR */ |
14808 | | 5781, |
14809 | | /* MDER */ |
14810 | | 5784, |
14811 | | /* MDR */ |
14812 | | 5787, |
14813 | | /* MDTR */ |
14814 | | 5790, |
14815 | | /* MDTRA */ |
14816 | | 5793, |
14817 | | /* ME */ |
14818 | | 5797, |
14819 | | /* MEE */ |
14820 | | 5802, |
14821 | | /* MEEB */ |
14822 | | 5807, |
14823 | | /* MEEBR */ |
14824 | | 5812, |
14825 | | /* MEER */ |
14826 | | 5815, |
14827 | | /* MER */ |
14828 | | 5818, |
14829 | | /* MFY */ |
14830 | | 5821, |
14831 | | /* MG */ |
14832 | | 5826, |
14833 | | /* MGH */ |
14834 | | 5831, |
14835 | | /* MGHI */ |
14836 | | 5836, |
14837 | | /* MGRK */ |
14838 | | 5839, |
14839 | | /* MH */ |
14840 | | 5842, |
14841 | | /* MHI */ |
14842 | | 5847, |
14843 | | /* MHY */ |
14844 | | 5850, |
14845 | | /* ML */ |
14846 | | 5855, |
14847 | | /* MLG */ |
14848 | | 5860, |
14849 | | /* MLGR */ |
14850 | | 5865, |
14851 | | /* MLR */ |
14852 | | 5868, |
14853 | | /* MP */ |
14854 | | 5871, |
14855 | | /* MR */ |
14856 | | 5877, |
14857 | | /* MS */ |
14858 | | 5880, |
14859 | | /* MSC */ |
14860 | | 5885, |
14861 | | /* MSCH */ |
14862 | | 5890, |
14863 | | /* MSD */ |
14864 | | 5892, |
14865 | | /* MSDB */ |
14866 | | 5898, |
14867 | | /* MSDBR */ |
14868 | | 5904, |
14869 | | /* MSDR */ |
14870 | | 5908, |
14871 | | /* MSE */ |
14872 | | 5912, |
14873 | | /* MSEB */ |
14874 | | 5918, |
14875 | | /* MSEBR */ |
14876 | | 5924, |
14877 | | /* MSER */ |
14878 | | 5928, |
14879 | | /* MSFI */ |
14880 | | 5932, |
14881 | | /* MSG */ |
14882 | | 5935, |
14883 | | /* MSGC */ |
14884 | | 5940, |
14885 | | /* MSGF */ |
14886 | | 5945, |
14887 | | /* MSGFI */ |
14888 | | 5950, |
14889 | | /* MSGFR */ |
14890 | | 5953, |
14891 | | /* MSGR */ |
14892 | | 5956, |
14893 | | /* MSGRKC */ |
14894 | | 5959, |
14895 | | /* MSR */ |
14896 | | 5962, |
14897 | | /* MSRKC */ |
14898 | | 5965, |
14899 | | /* MSTA */ |
14900 | | 5968, |
14901 | | /* MSY */ |
14902 | | 5969, |
14903 | | /* MVC */ |
14904 | | 5974, |
14905 | | /* MVCDK */ |
14906 | | 5979, |
14907 | | /* MVCIN */ |
14908 | | 5983, |
14909 | | /* MVCK */ |
14910 | | 5988, |
14911 | | /* MVCL */ |
14912 | | 5994, |
14913 | | /* MVCLE */ |
14914 | | 5998, |
14915 | | /* MVCLU */ |
14916 | | 6004, |
14917 | | /* MVCOS */ |
14918 | | 6010, |
14919 | | /* MVCP */ |
14920 | | 6015, |
14921 | | /* MVCRL */ |
14922 | | 6021, |
14923 | | /* MVCS */ |
14924 | | 6025, |
14925 | | /* MVCSK */ |
14926 | | 6031, |
14927 | | /* MVGHI */ |
14928 | | 6035, |
14929 | | /* MVHHI */ |
14930 | | 6038, |
14931 | | /* MVHI */ |
14932 | | 6041, |
14933 | | /* MVI */ |
14934 | | 6044, |
14935 | | /* MVIY */ |
14936 | | 6047, |
14937 | | /* MVN */ |
14938 | | 6050, |
14939 | | /* MVO */ |
14940 | | 6055, |
14941 | | /* MVPG */ |
14942 | | 6061, |
14943 | | /* MVST */ |
14944 | | 6063, |
14945 | | /* MVZ */ |
14946 | | 6067, |
14947 | | /* MXBR */ |
14948 | | 6072, |
14949 | | /* MXD */ |
14950 | | 6075, |
14951 | | /* MXDB */ |
14952 | | 6080, |
14953 | | /* MXDBR */ |
14954 | | 6085, |
14955 | | /* MXDR */ |
14956 | | 6088, |
14957 | | /* MXR */ |
14958 | | 6091, |
14959 | | /* MXTR */ |
14960 | | 6094, |
14961 | | /* MXTRA */ |
14962 | | 6097, |
14963 | | /* MY */ |
14964 | | 6101, |
14965 | | /* MYH */ |
14966 | | 6106, |
14967 | | /* MYHR */ |
14968 | | 6111, |
14969 | | /* MYL */ |
14970 | | 6114, |
14971 | | /* MYLR */ |
14972 | | 6119, |
14973 | | /* MYR */ |
14974 | | 6122, |
14975 | | /* N */ |
14976 | | 6125, |
14977 | | /* NC */ |
14978 | | 6130, |
14979 | | /* NCGRK */ |
14980 | | 6135, |
14981 | | /* NCRK */ |
14982 | | 6138, |
14983 | | /* NG */ |
14984 | | 6141, |
14985 | | /* NGR */ |
14986 | | 6146, |
14987 | | /* NGRK */ |
14988 | | 6149, |
14989 | | /* NI */ |
14990 | | 6152, |
14991 | | /* NIAI */ |
14992 | | 6155, |
14993 | | /* NIHF */ |
14994 | | 6157, |
14995 | | /* NIHH */ |
14996 | | 6160, |
14997 | | /* NIHL */ |
14998 | | 6163, |
14999 | | /* NILF */ |
15000 | | 6166, |
15001 | | /* NILH */ |
15002 | | 6169, |
15003 | | /* NILL */ |
15004 | | 6172, |
15005 | | /* NIY */ |
15006 | | 6175, |
15007 | | /* NNGRK */ |
15008 | | 6178, |
15009 | | /* NNPA */ |
15010 | | 6181, |
15011 | | /* NNRK */ |
15012 | | 6181, |
15013 | | /* NOGRK */ |
15014 | | 6184, |
15015 | | /* NOP_bare */ |
15016 | | 6187, |
15017 | | /* NORK */ |
15018 | | 6187, |
15019 | | /* NR */ |
15020 | | 6190, |
15021 | | /* NRK */ |
15022 | | 6193, |
15023 | | /* NTSTG */ |
15024 | | 6196, |
15025 | | /* NXGRK */ |
15026 | | 6200, |
15027 | | /* NXRK */ |
15028 | | 6203, |
15029 | | /* NY */ |
15030 | | 6206, |
15031 | | /* O */ |
15032 | | 6211, |
15033 | | /* OC */ |
15034 | | 6216, |
15035 | | /* OCGRK */ |
15036 | | 6221, |
15037 | | /* OCRK */ |
15038 | | 6224, |
15039 | | /* OG */ |
15040 | | 6227, |
15041 | | /* OGR */ |
15042 | | 6232, |
15043 | | /* OGRK */ |
15044 | | 6235, |
15045 | | /* OI */ |
15046 | | 6238, |
15047 | | /* OIHF */ |
15048 | | 6241, |
15049 | | /* OIHH */ |
15050 | | 6244, |
15051 | | /* OIHL */ |
15052 | | 6247, |
15053 | | /* OILF */ |
15054 | | 6250, |
15055 | | /* OILH */ |
15056 | | 6253, |
15057 | | /* OILL */ |
15058 | | 6256, |
15059 | | /* OIY */ |
15060 | | 6259, |
15061 | | /* OR */ |
15062 | | 6262, |
15063 | | /* ORK */ |
15064 | | 6265, |
15065 | | /* OY */ |
15066 | | 6268, |
15067 | | /* PACK */ |
15068 | | 6273, |
15069 | | /* PALB */ |
15070 | | 6279, |
15071 | | /* PC */ |
15072 | | 6279, |
15073 | | /* PCC */ |
15074 | | 6281, |
15075 | | /* PCKMO */ |
15076 | | 6281, |
15077 | | /* PFD */ |
15078 | | 6281, |
15079 | | /* PFDRL */ |
15080 | | 6285, |
15081 | | /* PFMF */ |
15082 | | 6287, |
15083 | | /* PFPO */ |
15084 | | 6290, |
15085 | | /* PGIN */ |
15086 | | 6290, |
15087 | | /* PGOUT */ |
15088 | | 6292, |
15089 | | /* PKA */ |
15090 | | 6294, |
15091 | | /* PKU */ |
15092 | | 6299, |
15093 | | /* PLO */ |
15094 | | 6304, |
15095 | | /* POPCNT */ |
15096 | | 6310, |
15097 | | /* POPCNTOpt */ |
15098 | | 6312, |
15099 | | /* PPA */ |
15100 | | 6315, |
15101 | | /* PPNO */ |
15102 | | 6318, |
15103 | | /* PR */ |
15104 | | 6322, |
15105 | | /* PRNO */ |
15106 | | 6322, |
15107 | | /* PT */ |
15108 | | 6326, |
15109 | | /* PTF */ |
15110 | | 6328, |
15111 | | /* PTFF */ |
15112 | | 6330, |
15113 | | /* PTI */ |
15114 | | 6330, |
15115 | | /* PTLB */ |
15116 | | 6332, |
15117 | | /* QADTR */ |
15118 | | 6332, |
15119 | | /* QAXTR */ |
15120 | | 6337, |
15121 | | /* QCTRI */ |
15122 | | 6342, |
15123 | | /* QPACI */ |
15124 | | 6344, |
15125 | | /* QSI */ |
15126 | | 6346, |
15127 | | /* RCHP */ |
15128 | | 6348, |
15129 | | /* RDP */ |
15130 | | 6348, |
15131 | | /* RDPOpt */ |
15132 | | 6352, |
15133 | | /* RISBG */ |
15134 | | 6355, |
15135 | | /* RISBG32 */ |
15136 | | 6361, |
15137 | | /* RISBGN */ |
15138 | | 6367, |
15139 | | /* RISBHG */ |
15140 | | 6373, |
15141 | | /* RISBLG */ |
15142 | | 6379, |
15143 | | /* RLL */ |
15144 | | 6385, |
15145 | | /* RLLG */ |
15146 | | 6389, |
15147 | | /* RNSBG */ |
15148 | | 6393, |
15149 | | /* ROSBG */ |
15150 | | 6399, |
15151 | | /* RP */ |
15152 | | 6405, |
15153 | | /* RRBE */ |
15154 | | 6407, |
15155 | | /* RRBM */ |
15156 | | 6409, |
15157 | | /* RRDTR */ |
15158 | | 6411, |
15159 | | /* RRXTR */ |
15160 | | 6416, |
15161 | | /* RSCH */ |
15162 | | 6421, |
15163 | | /* RXSBG */ |
15164 | | 6421, |
15165 | | /* S */ |
15166 | | 6427, |
15167 | | /* SAC */ |
15168 | | 6432, |
15169 | | /* SACF */ |
15170 | | 6434, |
15171 | | /* SAL */ |
15172 | | 6436, |
15173 | | /* SAM24 */ |
15174 | | 6436, |
15175 | | /* SAM31 */ |
15176 | | 6436, |
15177 | | /* SAM64 */ |
15178 | | 6436, |
15179 | | /* SAR */ |
15180 | | 6436, |
15181 | | /* SCCTR */ |
15182 | | 6438, |
15183 | | /* SCHM */ |
15184 | | 6440, |
15185 | | /* SCK */ |
15186 | | 6440, |
15187 | | /* SCKC */ |
15188 | | 6442, |
15189 | | /* SCKPF */ |
15190 | | 6444, |
15191 | | /* SD */ |
15192 | | 6444, |
15193 | | /* SDB */ |
15194 | | 6449, |
15195 | | /* SDBR */ |
15196 | | 6454, |
15197 | | /* SDR */ |
15198 | | 6457, |
15199 | | /* SDTR */ |
15200 | | 6460, |
15201 | | /* SDTRA */ |
15202 | | 6463, |
15203 | | /* SE */ |
15204 | | 6467, |
15205 | | /* SEB */ |
15206 | | 6472, |
15207 | | /* SEBR */ |
15208 | | 6477, |
15209 | | /* SELFHR */ |
15210 | | 6480, |
15211 | | /* SELFHRAsm */ |
15212 | | 6485, |
15213 | | /* SELFHRAsmE */ |
15214 | | 6489, |
15215 | | /* SELFHRAsmH */ |
15216 | | 6492, |
15217 | | /* SELFHRAsmHE */ |
15218 | | 6495, |
15219 | | /* SELFHRAsmL */ |
15220 | | 6498, |
15221 | | /* SELFHRAsmLE */ |
15222 | | 6501, |
15223 | | /* SELFHRAsmLH */ |
15224 | | 6504, |
15225 | | /* SELFHRAsmM */ |
15226 | | 6507, |
15227 | | /* SELFHRAsmNE */ |
15228 | | 6510, |
15229 | | /* SELFHRAsmNH */ |
15230 | | 6513, |
15231 | | /* SELFHRAsmNHE */ |
15232 | | 6516, |
15233 | | /* SELFHRAsmNL */ |
15234 | | 6519, |
15235 | | /* SELFHRAsmNLE */ |
15236 | | 6522, |
15237 | | /* SELFHRAsmNLH */ |
15238 | | 6525, |
15239 | | /* SELFHRAsmNM */ |
15240 | | 6528, |
15241 | | /* SELFHRAsmNO */ |
15242 | | 6531, |
15243 | | /* SELFHRAsmNP */ |
15244 | | 6534, |
15245 | | /* SELFHRAsmNZ */ |
15246 | | 6537, |
15247 | | /* SELFHRAsmO */ |
15248 | | 6540, |
15249 | | /* SELFHRAsmP */ |
15250 | | 6543, |
15251 | | /* SELFHRAsmZ */ |
15252 | | 6546, |
15253 | | /* SELGR */ |
15254 | | 6549, |
15255 | | /* SELGRAsm */ |
15256 | | 6554, |
15257 | | /* SELGRAsmE */ |
15258 | | 6558, |
15259 | | /* SELGRAsmH */ |
15260 | | 6561, |
15261 | | /* SELGRAsmHE */ |
15262 | | 6564, |
15263 | | /* SELGRAsmL */ |
15264 | | 6567, |
15265 | | /* SELGRAsmLE */ |
15266 | | 6570, |
15267 | | /* SELGRAsmLH */ |
15268 | | 6573, |
15269 | | /* SELGRAsmM */ |
15270 | | 6576, |
15271 | | /* SELGRAsmNE */ |
15272 | | 6579, |
15273 | | /* SELGRAsmNH */ |
15274 | | 6582, |
15275 | | /* SELGRAsmNHE */ |
15276 | | 6585, |
15277 | | /* SELGRAsmNL */ |
15278 | | 6588, |
15279 | | /* SELGRAsmNLE */ |
15280 | | 6591, |
15281 | | /* SELGRAsmNLH */ |
15282 | | 6594, |
15283 | | /* SELGRAsmNM */ |
15284 | | 6597, |
15285 | | /* SELGRAsmNO */ |
15286 | | 6600, |
15287 | | /* SELGRAsmNP */ |
15288 | | 6603, |
15289 | | /* SELGRAsmNZ */ |
15290 | | 6606, |
15291 | | /* SELGRAsmO */ |
15292 | | 6609, |
15293 | | /* SELGRAsmP */ |
15294 | | 6612, |
15295 | | /* SELGRAsmZ */ |
15296 | | 6615, |
15297 | | /* SELR */ |
15298 | | 6618, |
15299 | | /* SELRAsm */ |
15300 | | 6623, |
15301 | | /* SELRAsmE */ |
15302 | | 6627, |
15303 | | /* SELRAsmH */ |
15304 | | 6630, |
15305 | | /* SELRAsmHE */ |
15306 | | 6633, |
15307 | | /* SELRAsmL */ |
15308 | | 6636, |
15309 | | /* SELRAsmLE */ |
15310 | | 6639, |
15311 | | /* SELRAsmLH */ |
15312 | | 6642, |
15313 | | /* SELRAsmM */ |
15314 | | 6645, |
15315 | | /* SELRAsmNE */ |
15316 | | 6648, |
15317 | | /* SELRAsmNH */ |
15318 | | 6651, |
15319 | | /* SELRAsmNHE */ |
15320 | | 6654, |
15321 | | /* SELRAsmNL */ |
15322 | | 6657, |
15323 | | /* SELRAsmNLE */ |
15324 | | 6660, |
15325 | | /* SELRAsmNLH */ |
15326 | | 6663, |
15327 | | /* SELRAsmNM */ |
15328 | | 6666, |
15329 | | /* SELRAsmNO */ |
15330 | | 6669, |
15331 | | /* SELRAsmNP */ |
15332 | | 6672, |
15333 | | /* SELRAsmNZ */ |
15334 | | 6675, |
15335 | | /* SELRAsmO */ |
15336 | | 6678, |
15337 | | /* SELRAsmP */ |
15338 | | 6681, |
15339 | | /* SELRAsmZ */ |
15340 | | 6684, |
15341 | | /* SER */ |
15342 | | 6687, |
15343 | | /* SFASR */ |
15344 | | 6690, |
15345 | | /* SFPC */ |
15346 | | 6691, |
15347 | | /* SG */ |
15348 | | 6692, |
15349 | | /* SGF */ |
15350 | | 6697, |
15351 | | /* SGFR */ |
15352 | | 6702, |
15353 | | /* SGH */ |
15354 | | 6705, |
15355 | | /* SGR */ |
15356 | | 6710, |
15357 | | /* SGRK */ |
15358 | | 6713, |
15359 | | /* SH */ |
15360 | | 6716, |
15361 | | /* SHHHR */ |
15362 | | 6721, |
15363 | | /* SHHLR */ |
15364 | | 6724, |
15365 | | /* SHY */ |
15366 | | 6727, |
15367 | | /* SIE */ |
15368 | | 6732, |
15369 | | /* SIGA */ |
15370 | | 6734, |
15371 | | /* SIGP */ |
15372 | | 6736, |
15373 | | /* SL */ |
15374 | | 6740, |
15375 | | /* SLA */ |
15376 | | 6745, |
15377 | | /* SLAG */ |
15378 | | 6749, |
15379 | | /* SLAK */ |
15380 | | 6753, |
15381 | | /* SLB */ |
15382 | | 6757, |
15383 | | /* SLBG */ |
15384 | | 6762, |
15385 | | /* SLBGR */ |
15386 | | 6767, |
15387 | | /* SLBR */ |
15388 | | 6770, |
15389 | | /* SLDA */ |
15390 | | 6773, |
15391 | | /* SLDL */ |
15392 | | 6777, |
15393 | | /* SLDT */ |
15394 | | 6781, |
15395 | | /* SLFI */ |
15396 | | 6786, |
15397 | | /* SLG */ |
15398 | | 6789, |
15399 | | /* SLGF */ |
15400 | | 6794, |
15401 | | /* SLGFI */ |
15402 | | 6799, |
15403 | | /* SLGFR */ |
15404 | | 6802, |
15405 | | /* SLGR */ |
15406 | | 6805, |
15407 | | /* SLGRK */ |
15408 | | 6808, |
15409 | | /* SLHHHR */ |
15410 | | 6811, |
15411 | | /* SLHHLR */ |
15412 | | 6814, |
15413 | | /* SLL */ |
15414 | | 6817, |
15415 | | /* SLLG */ |
15416 | | 6821, |
15417 | | /* SLLK */ |
15418 | | 6825, |
15419 | | /* SLR */ |
15420 | | 6829, |
15421 | | /* SLRK */ |
15422 | | 6832, |
15423 | | /* SLXT */ |
15424 | | 6835, |
15425 | | /* SLY */ |
15426 | | 6840, |
15427 | | /* SORTL */ |
15428 | | 6845, |
15429 | | /* SP */ |
15430 | | 6849, |
15431 | | /* SPCTR */ |
15432 | | 6855, |
15433 | | /* SPKA */ |
15434 | | 6857, |
15435 | | /* SPM */ |
15436 | | 6859, |
15437 | | /* SPT */ |
15438 | | 6860, |
15439 | | /* SPX */ |
15440 | | 6862, |
15441 | | /* SQD */ |
15442 | | 6864, |
15443 | | /* SQDB */ |
15444 | | 6868, |
15445 | | /* SQDBR */ |
15446 | | 6872, |
15447 | | /* SQDR */ |
15448 | | 6874, |
15449 | | /* SQE */ |
15450 | | 6876, |
15451 | | /* SQEB */ |
15452 | | 6880, |
15453 | | /* SQEBR */ |
15454 | | 6884, |
15455 | | /* SQER */ |
15456 | | 6886, |
15457 | | /* SQXBR */ |
15458 | | 6888, |
15459 | | /* SQXR */ |
15460 | | 6890, |
15461 | | /* SR */ |
15462 | | 6892, |
15463 | | /* SRA */ |
15464 | | 6895, |
15465 | | /* SRAG */ |
15466 | | 6899, |
15467 | | /* SRAK */ |
15468 | | 6903, |
15469 | | /* SRDA */ |
15470 | | 6907, |
15471 | | /* SRDL */ |
15472 | | 6911, |
15473 | | /* SRDT */ |
15474 | | 6915, |
15475 | | /* SRK */ |
15476 | | 6920, |
15477 | | /* SRL */ |
15478 | | 6923, |
15479 | | /* SRLG */ |
15480 | | 6927, |
15481 | | /* SRLK */ |
15482 | | 6931, |
15483 | | /* SRNM */ |
15484 | | 6935, |
15485 | | /* SRNMB */ |
15486 | | 6937, |
15487 | | /* SRNMT */ |
15488 | | 6939, |
15489 | | /* SRP */ |
15490 | | 6941, |
15491 | | /* SRST */ |
15492 | | 6947, |
15493 | | /* SRSTU */ |
15494 | | 6951, |
15495 | | /* SRXT */ |
15496 | | 6955, |
15497 | | /* SSAIR */ |
15498 | | 6960, |
15499 | | /* SSAR */ |
15500 | | 6961, |
15501 | | /* SSCH */ |
15502 | | 6962, |
15503 | | /* SSKE */ |
15504 | | 6964, |
15505 | | /* SSKEOpt */ |
15506 | | 6967, |
15507 | | /* SSM */ |
15508 | | 6969, |
15509 | | /* ST */ |
15510 | | 6971, |
15511 | | /* STAM */ |
15512 | | 6975, |
15513 | | /* STAMY */ |
15514 | | 6979, |
15515 | | /* STAP */ |
15516 | | 6983, |
15517 | | /* STBEAR */ |
15518 | | 6985, |
15519 | | /* STC */ |
15520 | | 6987, |
15521 | | /* STCH */ |
15522 | | 6991, |
15523 | | /* STCK */ |
15524 | | 6995, |
15525 | | /* STCKC */ |
15526 | | 6997, |
15527 | | /* STCKE */ |
15528 | | 6999, |
15529 | | /* STCKF */ |
15530 | | 7001, |
15531 | | /* STCM */ |
15532 | | 7003, |
15533 | | /* STCMH */ |
15534 | | 7007, |
15535 | | /* STCMY */ |
15536 | | 7011, |
15537 | | /* STCPS */ |
15538 | | 7015, |
15539 | | /* STCRW */ |
15540 | | 7017, |
15541 | | /* STCTG */ |
15542 | | 7019, |
15543 | | /* STCTL */ |
15544 | | 7023, |
15545 | | /* STCY */ |
15546 | | 7027, |
15547 | | /* STD */ |
15548 | | 7031, |
15549 | | /* STDY */ |
15550 | | 7035, |
15551 | | /* STE */ |
15552 | | 7039, |
15553 | | /* STEY */ |
15554 | | 7043, |
15555 | | /* STFH */ |
15556 | | 7047, |
15557 | | /* STFL */ |
15558 | | 7051, |
15559 | | /* STFLE */ |
15560 | | 7053, |
15561 | | /* STFPC */ |
15562 | | 7055, |
15563 | | /* STG */ |
15564 | | 7057, |
15565 | | /* STGRL */ |
15566 | | 7061, |
15567 | | /* STGSC */ |
15568 | | 7063, |
15569 | | /* STH */ |
15570 | | 7067, |
15571 | | /* STHH */ |
15572 | | 7071, |
15573 | | /* STHRL */ |
15574 | | 7075, |
15575 | | /* STHY */ |
15576 | | 7077, |
15577 | | /* STIDP */ |
15578 | | 7081, |
15579 | | /* STM */ |
15580 | | 7083, |
15581 | | /* STMG */ |
15582 | | 7087, |
15583 | | /* STMH */ |
15584 | | 7091, |
15585 | | /* STMY */ |
15586 | | 7095, |
15587 | | /* STNSM */ |
15588 | | 7099, |
15589 | | /* STOC */ |
15590 | | 7102, |
15591 | | /* STOCAsm */ |
15592 | | 7107, |
15593 | | /* STOCAsmE */ |
15594 | | 7111, |
15595 | | /* STOCAsmH */ |
15596 | | 7114, |
15597 | | /* STOCAsmHE */ |
15598 | | 7117, |
15599 | | /* STOCAsmL */ |
15600 | | 7120, |
15601 | | /* STOCAsmLE */ |
15602 | | 7123, |
15603 | | /* STOCAsmLH */ |
15604 | | 7126, |
15605 | | /* STOCAsmM */ |
15606 | | 7129, |
15607 | | /* STOCAsmNE */ |
15608 | | 7132, |
15609 | | /* STOCAsmNH */ |
15610 | | 7135, |
15611 | | /* STOCAsmNHE */ |
15612 | | 7138, |
15613 | | /* STOCAsmNL */ |
15614 | | 7141, |
15615 | | /* STOCAsmNLE */ |
15616 | | 7144, |
15617 | | /* STOCAsmNLH */ |
15618 | | 7147, |
15619 | | /* STOCAsmNM */ |
15620 | | 7150, |
15621 | | /* STOCAsmNO */ |
15622 | | 7153, |
15623 | | /* STOCAsmNP */ |
15624 | | 7156, |
15625 | | /* STOCAsmNZ */ |
15626 | | 7159, |
15627 | | /* STOCAsmO */ |
15628 | | 7162, |
15629 | | /* STOCAsmP */ |
15630 | | 7165, |
15631 | | /* STOCAsmZ */ |
15632 | | 7168, |
15633 | | /* STOCFH */ |
15634 | | 7171, |
15635 | | /* STOCFHAsm */ |
15636 | | 7176, |
15637 | | /* STOCFHAsmE */ |
15638 | | 7180, |
15639 | | /* STOCFHAsmH */ |
15640 | | 7183, |
15641 | | /* STOCFHAsmHE */ |
15642 | | 7186, |
15643 | | /* STOCFHAsmL */ |
15644 | | 7189, |
15645 | | /* STOCFHAsmLE */ |
15646 | | 7192, |
15647 | | /* STOCFHAsmLH */ |
15648 | | 7195, |
15649 | | /* STOCFHAsmM */ |
15650 | | 7198, |
15651 | | /* STOCFHAsmNE */ |
15652 | | 7201, |
15653 | | /* STOCFHAsmNH */ |
15654 | | 7204, |
15655 | | /* STOCFHAsmNHE */ |
15656 | | 7207, |
15657 | | /* STOCFHAsmNL */ |
15658 | | 7210, |
15659 | | /* STOCFHAsmNLE */ |
15660 | | 7213, |
15661 | | /* STOCFHAsmNLH */ |
15662 | | 7216, |
15663 | | /* STOCFHAsmNM */ |
15664 | | 7219, |
15665 | | /* STOCFHAsmNO */ |
15666 | | 7222, |
15667 | | /* STOCFHAsmNP */ |
15668 | | 7225, |
15669 | | /* STOCFHAsmNZ */ |
15670 | | 7228, |
15671 | | /* STOCFHAsmO */ |
15672 | | 7231, |
15673 | | /* STOCFHAsmP */ |
15674 | | 7234, |
15675 | | /* STOCFHAsmZ */ |
15676 | | 7237, |
15677 | | /* STOCG */ |
15678 | | 7240, |
15679 | | /* STOCGAsm */ |
15680 | | 7245, |
15681 | | /* STOCGAsmE */ |
15682 | | 7249, |
15683 | | /* STOCGAsmH */ |
15684 | | 7252, |
15685 | | /* STOCGAsmHE */ |
15686 | | 7255, |
15687 | | /* STOCGAsmL */ |
15688 | | 7258, |
15689 | | /* STOCGAsmLE */ |
15690 | | 7261, |
15691 | | /* STOCGAsmLH */ |
15692 | | 7264, |
15693 | | /* STOCGAsmM */ |
15694 | | 7267, |
15695 | | /* STOCGAsmNE */ |
15696 | | 7270, |
15697 | | /* STOCGAsmNH */ |
15698 | | 7273, |
15699 | | /* STOCGAsmNHE */ |
15700 | | 7276, |
15701 | | /* STOCGAsmNL */ |
15702 | | 7279, |
15703 | | /* STOCGAsmNLE */ |
15704 | | 7282, |
15705 | | /* STOCGAsmNLH */ |
15706 | | 7285, |
15707 | | /* STOCGAsmNM */ |
15708 | | 7288, |
15709 | | /* STOCGAsmNO */ |
15710 | | 7291, |
15711 | | /* STOCGAsmNP */ |
15712 | | 7294, |
15713 | | /* STOCGAsmNZ */ |
15714 | | 7297, |
15715 | | /* STOCGAsmO */ |
15716 | | 7300, |
15717 | | /* STOCGAsmP */ |
15718 | | 7303, |
15719 | | /* STOCGAsmZ */ |
15720 | | 7306, |
15721 | | /* STOSM */ |
15722 | | 7309, |
15723 | | /* STPQ */ |
15724 | | 7312, |
15725 | | /* STPT */ |
15726 | | 7316, |
15727 | | /* STPX */ |
15728 | | 7318, |
15729 | | /* STRAG */ |
15730 | | 7320, |
15731 | | /* STRL */ |
15732 | | 7324, |
15733 | | /* STRV */ |
15734 | | 7326, |
15735 | | /* STRVG */ |
15736 | | 7330, |
15737 | | /* STRVH */ |
15738 | | 7334, |
15739 | | /* STSCH */ |
15740 | | 7338, |
15741 | | /* STSI */ |
15742 | | 7340, |
15743 | | /* STURA */ |
15744 | | 7342, |
15745 | | /* STURG */ |
15746 | | 7344, |
15747 | | /* STY */ |
15748 | | 7346, |
15749 | | /* SU */ |
15750 | | 7350, |
15751 | | /* SUR */ |
15752 | | 7355, |
15753 | | /* SVC */ |
15754 | | 7358, |
15755 | | /* SW */ |
15756 | | 7359, |
15757 | | /* SWR */ |
15758 | | 7364, |
15759 | | /* SXBR */ |
15760 | | 7367, |
15761 | | /* SXR */ |
15762 | | 7370, |
15763 | | /* SXTR */ |
15764 | | 7373, |
15765 | | /* SXTRA */ |
15766 | | 7376, |
15767 | | /* SY */ |
15768 | | 7380, |
15769 | | /* TABORT */ |
15770 | | 7385, |
15771 | | /* TAM */ |
15772 | | 7387, |
15773 | | /* TAR */ |
15774 | | 7387, |
15775 | | /* TB */ |
15776 | | 7389, |
15777 | | /* TBDR */ |
15778 | | 7391, |
15779 | | /* TBEDR */ |
15780 | | 7394, |
15781 | | /* TBEGIN */ |
15782 | | 7397, |
15783 | | /* TBEGINC */ |
15784 | | 7400, |
15785 | | /* TCDB */ |
15786 | | 7403, |
15787 | | /* TCEB */ |
15788 | | 7407, |
15789 | | /* TCXB */ |
15790 | | 7411, |
15791 | | /* TDCDT */ |
15792 | | 7415, |
15793 | | /* TDCET */ |
15794 | | 7419, |
15795 | | /* TDCXT */ |
15796 | | 7423, |
15797 | | /* TDGDT */ |
15798 | | 7427, |
15799 | | /* TDGET */ |
15800 | | 7431, |
15801 | | /* TDGXT */ |
15802 | | 7435, |
15803 | | /* TEND */ |
15804 | | 7439, |
15805 | | /* THDER */ |
15806 | | 7439, |
15807 | | /* THDR */ |
15808 | | 7441, |
15809 | | /* TM */ |
15810 | | 7443, |
15811 | | /* TMHH */ |
15812 | | 7446, |
15813 | | /* TMHL */ |
15814 | | 7448, |
15815 | | /* TMLH */ |
15816 | | 7450, |
15817 | | /* TMLL */ |
15818 | | 7452, |
15819 | | /* TMY */ |
15820 | | 7454, |
15821 | | /* TP */ |
15822 | | 7457, |
15823 | | /* TPI */ |
15824 | | 7460, |
15825 | | /* TPROT */ |
15826 | | 7462, |
15827 | | /* TR */ |
15828 | | 7466, |
15829 | | /* TRACE */ |
15830 | | 7471, |
15831 | | /* TRACG */ |
15832 | | 7475, |
15833 | | /* TRAP2 */ |
15834 | | 7479, |
15835 | | /* TRAP4 */ |
15836 | | 7479, |
15837 | | /* TRE */ |
15838 | | 7481, |
15839 | | /* TROO */ |
15840 | | 7485, |
15841 | | /* TROOOpt */ |
15842 | | 7490, |
15843 | | /* TROT */ |
15844 | | 7494, |
15845 | | /* TROTOpt */ |
15846 | | 7499, |
15847 | | /* TRT */ |
15848 | | 7503, |
15849 | | /* TRTE */ |
15850 | | 7508, |
15851 | | /* TRTEOpt */ |
15852 | | 7512, |
15853 | | /* TRTO */ |
15854 | | 7515, |
15855 | | /* TRTOOpt */ |
15856 | | 7520, |
15857 | | /* TRTR */ |
15858 | | 7524, |
15859 | | /* TRTRE */ |
15860 | | 7529, |
15861 | | /* TRTREOpt */ |
15862 | | 7533, |
15863 | | /* TRTT */ |
15864 | | 7536, |
15865 | | /* TRTTOpt */ |
15866 | | 7541, |
15867 | | /* TS */ |
15868 | | 7545, |
15869 | | /* TSCH */ |
15870 | | 7547, |
15871 | | /* UNPK */ |
15872 | | 7549, |
15873 | | /* UNPKA */ |
15874 | | 7555, |
15875 | | /* UNPKU */ |
15876 | | 7560, |
15877 | | /* UPT */ |
15878 | | 7565, |
15879 | | /* VA */ |
15880 | | 7565, |
15881 | | /* VAB */ |
15882 | | 7569, |
15883 | | /* VAC */ |
15884 | | 7572, |
15885 | | /* VACC */ |
15886 | | 7577, |
15887 | | /* VACCB */ |
15888 | | 7581, |
15889 | | /* VACCC */ |
15890 | | 7584, |
15891 | | /* VACCCQ */ |
15892 | | 7589, |
15893 | | /* VACCF */ |
15894 | | 7593, |
15895 | | /* VACCG */ |
15896 | | 7596, |
15897 | | /* VACCH */ |
15898 | | 7599, |
15899 | | /* VACCQ */ |
15900 | | 7602, |
15901 | | /* VACQ */ |
15902 | | 7605, |
15903 | | /* VAF */ |
15904 | | 7609, |
15905 | | /* VAG */ |
15906 | | 7612, |
15907 | | /* VAH */ |
15908 | | 7615, |
15909 | | /* VAP */ |
15910 | | 7618, |
15911 | | /* VAQ */ |
15912 | | 7623, |
15913 | | /* VAVG */ |
15914 | | 7626, |
15915 | | /* VAVGB */ |
15916 | | 7630, |
15917 | | /* VAVGF */ |
15918 | | 7633, |
15919 | | /* VAVGG */ |
15920 | | 7636, |
15921 | | /* VAVGH */ |
15922 | | 7639, |
15923 | | /* VAVGL */ |
15924 | | 7642, |
15925 | | /* VAVGLB */ |
15926 | | 7646, |
15927 | | /* VAVGLF */ |
15928 | | 7649, |
15929 | | /* VAVGLG */ |
15930 | | 7652, |
15931 | | /* VAVGLH */ |
15932 | | 7655, |
15933 | | /* VBPERM */ |
15934 | | 7658, |
15935 | | /* VCDG */ |
15936 | | 7661, |
15937 | | /* VCDGB */ |
15938 | | 7666, |
15939 | | /* VCDLG */ |
15940 | | 7670, |
15941 | | /* VCDLGB */ |
15942 | | 7675, |
15943 | | /* VCEFB */ |
15944 | | 7679, |
15945 | | /* VCELFB */ |
15946 | | 7683, |
15947 | | /* VCEQ */ |
15948 | | 7687, |
15949 | | /* VCEQB */ |
15950 | | 7692, |
15951 | | /* VCEQBS */ |
15952 | | 7695, |
15953 | | /* VCEQF */ |
15954 | | 7698, |
15955 | | /* VCEQFS */ |
15956 | | 7701, |
15957 | | /* VCEQG */ |
15958 | | 7704, |
15959 | | /* VCEQGS */ |
15960 | | 7707, |
15961 | | /* VCEQH */ |
15962 | | 7710, |
15963 | | /* VCEQHS */ |
15964 | | 7713, |
15965 | | /* VCFEB */ |
15966 | | 7716, |
15967 | | /* VCFN */ |
15968 | | 7720, |
15969 | | /* VCFPL */ |
15970 | | 7724, |
15971 | | /* VCFPS */ |
15972 | | 7729, |
15973 | | /* VCGD */ |
15974 | | 7734, |
15975 | | /* VCGDB */ |
15976 | | 7739, |
15977 | | /* VCH */ |
15978 | | 7743, |
15979 | | /* VCHB */ |
15980 | | 7748, |
15981 | | /* VCHBS */ |
15982 | | 7751, |
15983 | | /* VCHF */ |
15984 | | 7754, |
15985 | | /* VCHFS */ |
15986 | | 7757, |
15987 | | /* VCHG */ |
15988 | | 7760, |
15989 | | /* VCHGS */ |
15990 | | 7763, |
15991 | | /* VCHH */ |
15992 | | 7766, |
15993 | | /* VCHHS */ |
15994 | | 7769, |
15995 | | /* VCHL */ |
15996 | | 7772, |
15997 | | /* VCHLB */ |
15998 | | 7777, |
15999 | | /* VCHLBS */ |
16000 | | 7780, |
16001 | | /* VCHLF */ |
16002 | | 7783, |
16003 | | /* VCHLFS */ |
16004 | | 7786, |
16005 | | /* VCHLG */ |
16006 | | 7789, |
16007 | | /* VCHLGS */ |
16008 | | 7792, |
16009 | | /* VCHLH */ |
16010 | | 7795, |
16011 | | /* VCHLHS */ |
16012 | | 7798, |
16013 | | /* VCKSM */ |
16014 | | 7801, |
16015 | | /* VCLFEB */ |
16016 | | 7804, |
16017 | | /* VCLFNH */ |
16018 | | 7808, |
16019 | | /* VCLFNL */ |
16020 | | 7812, |
16021 | | /* VCLFP */ |
16022 | | 7816, |
16023 | | /* VCLGD */ |
16024 | | 7821, |
16025 | | /* VCLGDB */ |
16026 | | 7826, |
16027 | | /* VCLZ */ |
16028 | | 7830, |
16029 | | /* VCLZB */ |
16030 | | 7833, |
16031 | | /* VCLZDP */ |
16032 | | 7835, |
16033 | | /* VCLZF */ |
16034 | | 7838, |
16035 | | /* VCLZG */ |
16036 | | 7840, |
16037 | | /* VCLZH */ |
16038 | | 7842, |
16039 | | /* VCNF */ |
16040 | | 7844, |
16041 | | /* VCP */ |
16042 | | 7848, |
16043 | | /* VCRNF */ |
16044 | | 7851, |
16045 | | /* VCSFP */ |
16046 | | 7856, |
16047 | | /* VCSPH */ |
16048 | | 7861, |
16049 | | /* VCTZ */ |
16050 | | 7865, |
16051 | | /* VCTZB */ |
16052 | | 7868, |
16053 | | /* VCTZF */ |
16054 | | 7870, |
16055 | | /* VCTZG */ |
16056 | | 7872, |
16057 | | /* VCTZH */ |
16058 | | 7874, |
16059 | | /* VCVB */ |
16060 | | 7876, |
16061 | | /* VCVBG */ |
16062 | | 7879, |
16063 | | /* VCVBGOpt */ |
16064 | | 7882, |
16065 | | /* VCVBOpt */ |
16066 | | 7886, |
16067 | | /* VCVD */ |
16068 | | 7890, |
16069 | | /* VCVDG */ |
16070 | | 7894, |
16071 | | /* VDP */ |
16072 | | 7898, |
16073 | | /* VEC */ |
16074 | | 7903, |
16075 | | /* VECB */ |
16076 | | 7906, |
16077 | | /* VECF */ |
16078 | | 7908, |
16079 | | /* VECG */ |
16080 | | 7910, |
16081 | | /* VECH */ |
16082 | | 7912, |
16083 | | /* VECL */ |
16084 | | 7914, |
16085 | | /* VECLB */ |
16086 | | 7917, |
16087 | | /* VECLF */ |
16088 | | 7919, |
16089 | | /* VECLG */ |
16090 | | 7921, |
16091 | | /* VECLH */ |
16092 | | 7923, |
16093 | | /* VERIM */ |
16094 | | 7925, |
16095 | | /* VERIMB */ |
16096 | | 7931, |
16097 | | /* VERIMF */ |
16098 | | 7936, |
16099 | | /* VERIMG */ |
16100 | | 7941, |
16101 | | /* VERIMH */ |
16102 | | 7946, |
16103 | | /* VERLL */ |
16104 | | 7951, |
16105 | | /* VERLLB */ |
16106 | | 7956, |
16107 | | /* VERLLF */ |
16108 | | 7960, |
16109 | | /* VERLLG */ |
16110 | | 7964, |
16111 | | /* VERLLH */ |
16112 | | 7968, |
16113 | | /* VERLLV */ |
16114 | | 7972, |
16115 | | /* VERLLVB */ |
16116 | | 7976, |
16117 | | /* VERLLVF */ |
16118 | | 7979, |
16119 | | /* VERLLVG */ |
16120 | | 7982, |
16121 | | /* VERLLVH */ |
16122 | | 7985, |
16123 | | /* VESL */ |
16124 | | 7988, |
16125 | | /* VESLB */ |
16126 | | 7993, |
16127 | | /* VESLF */ |
16128 | | 7997, |
16129 | | /* VESLG */ |
16130 | | 8001, |
16131 | | /* VESLH */ |
16132 | | 8005, |
16133 | | /* VESLV */ |
16134 | | 8009, |
16135 | | /* VESLVB */ |
16136 | | 8013, |
16137 | | /* VESLVF */ |
16138 | | 8016, |
16139 | | /* VESLVG */ |
16140 | | 8019, |
16141 | | /* VESLVH */ |
16142 | | 8022, |
16143 | | /* VESRA */ |
16144 | | 8025, |
16145 | | /* VESRAB */ |
16146 | | 8030, |
16147 | | /* VESRAF */ |
16148 | | 8034, |
16149 | | /* VESRAG */ |
16150 | | 8038, |
16151 | | /* VESRAH */ |
16152 | | 8042, |
16153 | | /* VESRAV */ |
16154 | | 8046, |
16155 | | /* VESRAVB */ |
16156 | | 8050, |
16157 | | /* VESRAVF */ |
16158 | | 8053, |
16159 | | /* VESRAVG */ |
16160 | | 8056, |
16161 | | /* VESRAVH */ |
16162 | | 8059, |
16163 | | /* VESRL */ |
16164 | | 8062, |
16165 | | /* VESRLB */ |
16166 | | 8067, |
16167 | | /* VESRLF */ |
16168 | | 8071, |
16169 | | /* VESRLG */ |
16170 | | 8075, |
16171 | | /* VESRLH */ |
16172 | | 8079, |
16173 | | /* VESRLV */ |
16174 | | 8083, |
16175 | | /* VESRLVB */ |
16176 | | 8087, |
16177 | | /* VESRLVF */ |
16178 | | 8090, |
16179 | | /* VESRLVG */ |
16180 | | 8093, |
16181 | | /* VESRLVH */ |
16182 | | 8096, |
16183 | | /* VFA */ |
16184 | | 8099, |
16185 | | /* VFADB */ |
16186 | | 8104, |
16187 | | /* VFAE */ |
16188 | | 8107, |
16189 | | /* VFAEB */ |
16190 | | 8112, |
16191 | | /* VFAEBS */ |
16192 | | 8116, |
16193 | | /* VFAEF */ |
16194 | | 8120, |
16195 | | /* VFAEFS */ |
16196 | | 8124, |
16197 | | /* VFAEH */ |
16198 | | 8128, |
16199 | | /* VFAEHS */ |
16200 | | 8132, |
16201 | | /* VFAEZB */ |
16202 | | 8136, |
16203 | | /* VFAEZBS */ |
16204 | | 8140, |
16205 | | /* VFAEZF */ |
16206 | | 8144, |
16207 | | /* VFAEZFS */ |
16208 | | 8148, |
16209 | | /* VFAEZH */ |
16210 | | 8152, |
16211 | | /* VFAEZHS */ |
16212 | | 8156, |
16213 | | /* VFASB */ |
16214 | | 8160, |
16215 | | /* VFCE */ |
16216 | | 8163, |
16217 | | /* VFCEDB */ |
16218 | | 8169, |
16219 | | /* VFCEDBS */ |
16220 | | 8172, |
16221 | | /* VFCESB */ |
16222 | | 8175, |
16223 | | /* VFCESBS */ |
16224 | | 8178, |
16225 | | /* VFCH */ |
16226 | | 8181, |
16227 | | /* VFCHDB */ |
16228 | | 8187, |
16229 | | /* VFCHDBS */ |
16230 | | 8190, |
16231 | | /* VFCHE */ |
16232 | | 8193, |
16233 | | /* VFCHEDB */ |
16234 | | 8199, |
16235 | | /* VFCHEDBS */ |
16236 | | 8202, |
16237 | | /* VFCHESB */ |
16238 | | 8205, |
16239 | | /* VFCHESBS */ |
16240 | | 8208, |
16241 | | /* VFCHSB */ |
16242 | | 8211, |
16243 | | /* VFCHSBS */ |
16244 | | 8214, |
16245 | | /* VFD */ |
16246 | | 8217, |
16247 | | /* VFDDB */ |
16248 | | 8222, |
16249 | | /* VFDSB */ |
16250 | | 8225, |
16251 | | /* VFEE */ |
16252 | | 8228, |
16253 | | /* VFEEB */ |
16254 | | 8233, |
16255 | | /* VFEEBS */ |
16256 | | 8237, |
16257 | | /* VFEEF */ |
16258 | | 8240, |
16259 | | /* VFEEFS */ |
16260 | | 8244, |
16261 | | /* VFEEH */ |
16262 | | 8247, |
16263 | | /* VFEEHS */ |
16264 | | 8251, |
16265 | | /* VFEEZB */ |
16266 | | 8254, |
16267 | | /* VFEEZBS */ |
16268 | | 8257, |
16269 | | /* VFEEZF */ |
16270 | | 8260, |
16271 | | /* VFEEZFS */ |
16272 | | 8263, |
16273 | | /* VFEEZH */ |
16274 | | 8266, |
16275 | | /* VFEEZHS */ |
16276 | | 8269, |
16277 | | /* VFENE */ |
16278 | | 8272, |
16279 | | /* VFENEB */ |
16280 | | 8277, |
16281 | | /* VFENEBS */ |
16282 | | 8281, |
16283 | | /* VFENEF */ |
16284 | | 8284, |
16285 | | /* VFENEFS */ |
16286 | | 8288, |
16287 | | /* VFENEH */ |
16288 | | 8291, |
16289 | | /* VFENEHS */ |
16290 | | 8295, |
16291 | | /* VFENEZB */ |
16292 | | 8298, |
16293 | | /* VFENEZBS */ |
16294 | | 8301, |
16295 | | /* VFENEZF */ |
16296 | | 8304, |
16297 | | /* VFENEZFS */ |
16298 | | 8307, |
16299 | | /* VFENEZH */ |
16300 | | 8310, |
16301 | | /* VFENEZHS */ |
16302 | | 8313, |
16303 | | /* VFI */ |
16304 | | 8316, |
16305 | | /* VFIDB */ |
16306 | | 8321, |
16307 | | /* VFISB */ |
16308 | | 8325, |
16309 | | /* VFKEDB */ |
16310 | | 8329, |
16311 | | /* VFKEDBS */ |
16312 | | 8332, |
16313 | | /* VFKESB */ |
16314 | | 8335, |
16315 | | /* VFKESBS */ |
16316 | | 8338, |
16317 | | /* VFKHDB */ |
16318 | | 8341, |
16319 | | /* VFKHDBS */ |
16320 | | 8344, |
16321 | | /* VFKHEDB */ |
16322 | | 8347, |
16323 | | /* VFKHEDBS */ |
16324 | | 8350, |
16325 | | /* VFKHESB */ |
16326 | | 8353, |
16327 | | /* VFKHESBS */ |
16328 | | 8356, |
16329 | | /* VFKHSB */ |
16330 | | 8359, |
16331 | | /* VFKHSBS */ |
16332 | | 8362, |
16333 | | /* VFLCDB */ |
16334 | | 8365, |
16335 | | /* VFLCSB */ |
16336 | | 8367, |
16337 | | /* VFLL */ |
16338 | | 8369, |
16339 | | /* VFLLS */ |
16340 | | 8373, |
16341 | | /* VFLNDB */ |
16342 | | 8375, |
16343 | | /* VFLNSB */ |
16344 | | 8377, |
16345 | | /* VFLPDB */ |
16346 | | 8379, |
16347 | | /* VFLPSB */ |
16348 | | 8381, |
16349 | | /* VFLR */ |
16350 | | 8383, |
16351 | | /* VFLRD */ |
16352 | | 8388, |
16353 | | /* VFM */ |
16354 | | 8392, |
16355 | | /* VFMA */ |
16356 | | 8397, |
16357 | | /* VFMADB */ |
16358 | | 8403, |
16359 | | /* VFMASB */ |
16360 | | 8407, |
16361 | | /* VFMAX */ |
16362 | | 8411, |
16363 | | /* VFMAXDB */ |
16364 | | 8417, |
16365 | | /* VFMAXSB */ |
16366 | | 8421, |
16367 | | /* VFMDB */ |
16368 | | 8425, |
16369 | | /* VFMIN */ |
16370 | | 8428, |
16371 | | /* VFMINDB */ |
16372 | | 8434, |
16373 | | /* VFMINSB */ |
16374 | | 8438, |
16375 | | /* VFMS */ |
16376 | | 8442, |
16377 | | /* VFMSB */ |
16378 | | 8448, |
16379 | | /* VFMSDB */ |
16380 | | 8451, |
16381 | | /* VFMSSB */ |
16382 | | 8455, |
16383 | | /* VFNMA */ |
16384 | | 8459, |
16385 | | /* VFNMADB */ |
16386 | | 8465, |
16387 | | /* VFNMASB */ |
16388 | | 8469, |
16389 | | /* VFNMS */ |
16390 | | 8473, |
16391 | | /* VFNMSDB */ |
16392 | | 8479, |
16393 | | /* VFNMSSB */ |
16394 | | 8483, |
16395 | | /* VFPSO */ |
16396 | | 8487, |
16397 | | /* VFPSODB */ |
16398 | | 8492, |
16399 | | /* VFPSOSB */ |
16400 | | 8495, |
16401 | | /* VFS */ |
16402 | | 8498, |
16403 | | /* VFSDB */ |
16404 | | 8503, |
16405 | | /* VFSQ */ |
16406 | | 8506, |
16407 | | /* VFSQDB */ |
16408 | | 8510, |
16409 | | /* VFSQSB */ |
16410 | | 8512, |
16411 | | /* VFSSB */ |
16412 | | 8514, |
16413 | | /* VFTCI */ |
16414 | | 8517, |
16415 | | /* VFTCIDB */ |
16416 | | 8522, |
16417 | | /* VFTCISB */ |
16418 | | 8525, |
16419 | | /* VGBM */ |
16420 | | 8528, |
16421 | | /* VGEF */ |
16422 | | 8530, |
16423 | | /* VGEG */ |
16424 | | 8536, |
16425 | | /* VGFM */ |
16426 | | 8542, |
16427 | | /* VGFMA */ |
16428 | | 8546, |
16429 | | /* VGFMAB */ |
16430 | | 8551, |
16431 | | /* VGFMAF */ |
16432 | | 8555, |
16433 | | /* VGFMAG */ |
16434 | | 8559, |
16435 | | /* VGFMAH */ |
16436 | | 8563, |
16437 | | /* VGFMB */ |
16438 | | 8567, |
16439 | | /* VGFMF */ |
16440 | | 8570, |
16441 | | /* VGFMG */ |
16442 | | 8573, |
16443 | | /* VGFMH */ |
16444 | | 8576, |
16445 | | /* VGM */ |
16446 | | 8579, |
16447 | | /* VGMB */ |
16448 | | 8583, |
16449 | | /* VGMF */ |
16450 | | 8586, |
16451 | | /* VGMG */ |
16452 | | 8589, |
16453 | | /* VGMH */ |
16454 | | 8592, |
16455 | | /* VISTR */ |
16456 | | 8595, |
16457 | | /* VISTRB */ |
16458 | | 8599, |
16459 | | /* VISTRBS */ |
16460 | | 8602, |
16461 | | /* VISTRF */ |
16462 | | 8604, |
16463 | | /* VISTRFS */ |
16464 | | 8607, |
16465 | | /* VISTRH */ |
16466 | | 8609, |
16467 | | /* VISTRHS */ |
16468 | | 8612, |
16469 | | /* VL */ |
16470 | | 8614, |
16471 | | /* VLAlign */ |
16472 | | 8618, |
16473 | | /* VLBB */ |
16474 | | 8623, |
16475 | | /* VLBR */ |
16476 | | 8628, |
16477 | | /* VLBRF */ |
16478 | | 8633, |
16479 | | /* VLBRG */ |
16480 | | 8637, |
16481 | | /* VLBRH */ |
16482 | | 8641, |
16483 | | /* VLBRQ */ |
16484 | | 8645, |
16485 | | /* VLBRREP */ |
16486 | | 8649, |
16487 | | /* VLBRREPF */ |
16488 | | 8654, |
16489 | | /* VLBRREPG */ |
16490 | | 8658, |
16491 | | /* VLBRREPH */ |
16492 | | 8662, |
16493 | | /* VLC */ |
16494 | | 8666, |
16495 | | /* VLCB */ |
16496 | | 8669, |
16497 | | /* VLCF */ |
16498 | | 8671, |
16499 | | /* VLCG */ |
16500 | | 8673, |
16501 | | /* VLCH */ |
16502 | | 8675, |
16503 | | /* VLDE */ |
16504 | | 8677, |
16505 | | /* VLDEB */ |
16506 | | 8681, |
16507 | | /* VLEB */ |
16508 | | 8683, |
16509 | | /* VLEBRF */ |
16510 | | 8689, |
16511 | | /* VLEBRG */ |
16512 | | 8695, |
16513 | | /* VLEBRH */ |
16514 | | 8701, |
16515 | | /* VLED */ |
16516 | | 8707, |
16517 | | /* VLEDB */ |
16518 | | 8712, |
16519 | | /* VLEF */ |
16520 | | 8716, |
16521 | | /* VLEG */ |
16522 | | 8722, |
16523 | | /* VLEH */ |
16524 | | 8728, |
16525 | | /* VLEIB */ |
16526 | | 8734, |
16527 | | /* VLEIF */ |
16528 | | 8738, |
16529 | | /* VLEIG */ |
16530 | | 8742, |
16531 | | /* VLEIH */ |
16532 | | 8746, |
16533 | | /* VLER */ |
16534 | | 8750, |
16535 | | /* VLERF */ |
16536 | | 8755, |
16537 | | /* VLERG */ |
16538 | | 8759, |
16539 | | /* VLERH */ |
16540 | | 8763, |
16541 | | /* VLGV */ |
16542 | | 8767, |
16543 | | /* VLGVB */ |
16544 | | 8772, |
16545 | | /* VLGVF */ |
16546 | | 8776, |
16547 | | /* VLGVG */ |
16548 | | 8780, |
16549 | | /* VLGVH */ |
16550 | | 8784, |
16551 | | /* VLIP */ |
16552 | | 8788, |
16553 | | /* VLL */ |
16554 | | 8791, |
16555 | | /* VLLEBRZ */ |
16556 | | 8795, |
16557 | | /* VLLEBRZE */ |
16558 | | 8800, |
16559 | | /* VLLEBRZF */ |
16560 | | 8804, |
16561 | | /* VLLEBRZG */ |
16562 | | 8808, |
16563 | | /* VLLEBRZH */ |
16564 | | 8812, |
16565 | | /* VLLEZ */ |
16566 | | 8816, |
16567 | | /* VLLEZB */ |
16568 | | 8821, |
16569 | | /* VLLEZF */ |
16570 | | 8825, |
16571 | | /* VLLEZG */ |
16572 | | 8829, |
16573 | | /* VLLEZH */ |
16574 | | 8833, |
16575 | | /* VLLEZLF */ |
16576 | | 8837, |
16577 | | /* VLM */ |
16578 | | 8841, |
16579 | | /* VLMAlign */ |
16580 | | 8845, |
16581 | | /* VLP */ |
16582 | | 8850, |
16583 | | /* VLPB */ |
16584 | | 8853, |
16585 | | /* VLPF */ |
16586 | | 8855, |
16587 | | /* VLPG */ |
16588 | | 8857, |
16589 | | /* VLPH */ |
16590 | | 8859, |
16591 | | /* VLR */ |
16592 | | 8861, |
16593 | | /* VLREP */ |
16594 | | 8863, |
16595 | | /* VLREPB */ |
16596 | | 8868, |
16597 | | /* VLREPF */ |
16598 | | 8872, |
16599 | | /* VLREPG */ |
16600 | | 8876, |
16601 | | /* VLREPH */ |
16602 | | 8880, |
16603 | | /* VLRL */ |
16604 | | 8884, |
16605 | | /* VLRLR */ |
16606 | | 8888, |
16607 | | /* VLVG */ |
16608 | | 8892, |
16609 | | /* VLVGB */ |
16610 | | 8898, |
16611 | | /* VLVGF */ |
16612 | | 8903, |
16613 | | /* VLVGG */ |
16614 | | 8908, |
16615 | | /* VLVGH */ |
16616 | | 8913, |
16617 | | /* VLVGP */ |
16618 | | 8918, |
16619 | | /* VMAE */ |
16620 | | 8921, |
16621 | | /* VMAEB */ |
16622 | | 8926, |
16623 | | /* VMAEF */ |
16624 | | 8930, |
16625 | | /* VMAEH */ |
16626 | | 8934, |
16627 | | /* VMAH */ |
16628 | | 8938, |
16629 | | /* VMAHB */ |
16630 | | 8943, |
16631 | | /* VMAHF */ |
16632 | | 8947, |
16633 | | /* VMAHH */ |
16634 | | 8951, |
16635 | | /* VMAL */ |
16636 | | 8955, |
16637 | | /* VMALB */ |
16638 | | 8960, |
16639 | | /* VMALE */ |
16640 | | 8964, |
16641 | | /* VMALEB */ |
16642 | | 8969, |
16643 | | /* VMALEF */ |
16644 | | 8973, |
16645 | | /* VMALEH */ |
16646 | | 8977, |
16647 | | /* VMALF */ |
16648 | | 8981, |
16649 | | /* VMALH */ |
16650 | | 8985, |
16651 | | /* VMALHB */ |
16652 | | 8990, |
16653 | | /* VMALHF */ |
16654 | | 8994, |
16655 | | /* VMALHH */ |
16656 | | 8998, |
16657 | | /* VMALHW */ |
16658 | | 9002, |
16659 | | /* VMALO */ |
16660 | | 9006, |
16661 | | /* VMALOB */ |
16662 | | 9011, |
16663 | | /* VMALOF */ |
16664 | | 9015, |
16665 | | /* VMALOH */ |
16666 | | 9019, |
16667 | | /* VMAO */ |
16668 | | 9023, |
16669 | | /* VMAOB */ |
16670 | | 9028, |
16671 | | /* VMAOF */ |
16672 | | 9032, |
16673 | | /* VMAOH */ |
16674 | | 9036, |
16675 | | /* VME */ |
16676 | | 9040, |
16677 | | /* VMEB */ |
16678 | | 9044, |
16679 | | /* VMEF */ |
16680 | | 9047, |
16681 | | /* VMEH */ |
16682 | | 9050, |
16683 | | /* VMH */ |
16684 | | 9053, |
16685 | | /* VMHB */ |
16686 | | 9057, |
16687 | | /* VMHF */ |
16688 | | 9060, |
16689 | | /* VMHH */ |
16690 | | 9063, |
16691 | | /* VML */ |
16692 | | 9066, |
16693 | | /* VMLB */ |
16694 | | 9070, |
16695 | | /* VMLE */ |
16696 | | 9073, |
16697 | | /* VMLEB */ |
16698 | | 9077, |
16699 | | /* VMLEF */ |
16700 | | 9080, |
16701 | | /* VMLEH */ |
16702 | | 9083, |
16703 | | /* VMLF */ |
16704 | | 9086, |
16705 | | /* VMLH */ |
16706 | | 9089, |
16707 | | /* VMLHB */ |
16708 | | 9093, |
16709 | | /* VMLHF */ |
16710 | | 9096, |
16711 | | /* VMLHH */ |
16712 | | 9099, |
16713 | | /* VMLHW */ |
16714 | | 9102, |
16715 | | /* VMLO */ |
16716 | | 9105, |
16717 | | /* VMLOB */ |
16718 | | 9109, |
16719 | | /* VMLOF */ |
16720 | | 9112, |
16721 | | /* VMLOH */ |
16722 | | 9115, |
16723 | | /* VMN */ |
16724 | | 9118, |
16725 | | /* VMNB */ |
16726 | | 9122, |
16727 | | /* VMNF */ |
16728 | | 9125, |
16729 | | /* VMNG */ |
16730 | | 9128, |
16731 | | /* VMNH */ |
16732 | | 9131, |
16733 | | /* VMNL */ |
16734 | | 9134, |
16735 | | /* VMNLB */ |
16736 | | 9138, |
16737 | | /* VMNLF */ |
16738 | | 9141, |
16739 | | /* VMNLG */ |
16740 | | 9144, |
16741 | | /* VMNLH */ |
16742 | | 9147, |
16743 | | /* VMO */ |
16744 | | 9150, |
16745 | | /* VMOB */ |
16746 | | 9154, |
16747 | | /* VMOF */ |
16748 | | 9157, |
16749 | | /* VMOH */ |
16750 | | 9160, |
16751 | | /* VMP */ |
16752 | | 9163, |
16753 | | /* VMRH */ |
16754 | | 9168, |
16755 | | /* VMRHB */ |
16756 | | 9172, |
16757 | | /* VMRHF */ |
16758 | | 9175, |
16759 | | /* VMRHG */ |
16760 | | 9178, |
16761 | | /* VMRHH */ |
16762 | | 9181, |
16763 | | /* VMRL */ |
16764 | | 9184, |
16765 | | /* VMRLB */ |
16766 | | 9188, |
16767 | | /* VMRLF */ |
16768 | | 9191, |
16769 | | /* VMRLG */ |
16770 | | 9194, |
16771 | | /* VMRLH */ |
16772 | | 9197, |
16773 | | /* VMSL */ |
16774 | | 9200, |
16775 | | /* VMSLG */ |
16776 | | 9206, |
16777 | | /* VMSP */ |
16778 | | 9211, |
16779 | | /* VMX */ |
16780 | | 9216, |
16781 | | /* VMXB */ |
16782 | | 9220, |
16783 | | /* VMXF */ |
16784 | | 9223, |
16785 | | /* VMXG */ |
16786 | | 9226, |
16787 | | /* VMXH */ |
16788 | | 9229, |
16789 | | /* VMXL */ |
16790 | | 9232, |
16791 | | /* VMXLB */ |
16792 | | 9236, |
16793 | | /* VMXLF */ |
16794 | | 9239, |
16795 | | /* VMXLG */ |
16796 | | 9242, |
16797 | | /* VMXLH */ |
16798 | | 9245, |
16799 | | /* VN */ |
16800 | | 9248, |
16801 | | /* VNC */ |
16802 | | 9251, |
16803 | | /* VNN */ |
16804 | | 9254, |
16805 | | /* VNO */ |
16806 | | 9257, |
16807 | | /* VNX */ |
16808 | | 9260, |
16809 | | /* VO */ |
16810 | | 9263, |
16811 | | /* VOC */ |
16812 | | 9266, |
16813 | | /* VONE */ |
16814 | | 9269, |
16815 | | /* VPDI */ |
16816 | | 9270, |
16817 | | /* VPERM */ |
16818 | | 9274, |
16819 | | /* VPK */ |
16820 | | 9278, |
16821 | | /* VPKF */ |
16822 | | 9282, |
16823 | | /* VPKG */ |
16824 | | 9285, |
16825 | | /* VPKH */ |
16826 | | 9288, |
16827 | | /* VPKLS */ |
16828 | | 9291, |
16829 | | /* VPKLSF */ |
16830 | | 9296, |
16831 | | /* VPKLSFS */ |
16832 | | 9299, |
16833 | | /* VPKLSG */ |
16834 | | 9302, |
16835 | | /* VPKLSGS */ |
16836 | | 9305, |
16837 | | /* VPKLSH */ |
16838 | | 9308, |
16839 | | /* VPKLSHS */ |
16840 | | 9311, |
16841 | | /* VPKS */ |
16842 | | 9314, |
16843 | | /* VPKSF */ |
16844 | | 9319, |
16845 | | /* VPKSFS */ |
16846 | | 9322, |
16847 | | /* VPKSG */ |
16848 | | 9325, |
16849 | | /* VPKSGS */ |
16850 | | 9328, |
16851 | | /* VPKSH */ |
16852 | | 9331, |
16853 | | /* VPKSHS */ |
16854 | | 9334, |
16855 | | /* VPKZ */ |
16856 | | 9337, |
16857 | | /* VPKZR */ |
16858 | | 9341, |
16859 | | /* VPOPCT */ |
16860 | | 9346, |
16861 | | /* VPOPCTB */ |
16862 | | 9349, |
16863 | | /* VPOPCTF */ |
16864 | | 9351, |
16865 | | /* VPOPCTG */ |
16866 | | 9353, |
16867 | | /* VPOPCTH */ |
16868 | | 9355, |
16869 | | /* VPSOP */ |
16870 | | 9357, |
16871 | | /* VREP */ |
16872 | | 9362, |
16873 | | /* VREPB */ |
16874 | | 9366, |
16875 | | /* VREPF */ |
16876 | | 9369, |
16877 | | /* VREPG */ |
16878 | | 9372, |
16879 | | /* VREPH */ |
16880 | | 9375, |
16881 | | /* VREPI */ |
16882 | | 9378, |
16883 | | /* VREPIB */ |
16884 | | 9381, |
16885 | | /* VREPIF */ |
16886 | | 9383, |
16887 | | /* VREPIG */ |
16888 | | 9385, |
16889 | | /* VREPIH */ |
16890 | | 9387, |
16891 | | /* VRP */ |
16892 | | 9389, |
16893 | | /* VS */ |
16894 | | 9394, |
16895 | | /* VSB */ |
16896 | | 9398, |
16897 | | /* VSBCBI */ |
16898 | | 9401, |
16899 | | /* VSBCBIQ */ |
16900 | | 9406, |
16901 | | /* VSBI */ |
16902 | | 9410, |
16903 | | /* VSBIQ */ |
16904 | | 9415, |
16905 | | /* VSCBI */ |
16906 | | 9419, |
16907 | | /* VSCBIB */ |
16908 | | 9423, |
16909 | | /* VSCBIF */ |
16910 | | 9426, |
16911 | | /* VSCBIG */ |
16912 | | 9429, |
16913 | | /* VSCBIH */ |
16914 | | 9432, |
16915 | | /* VSCBIQ */ |
16916 | | 9435, |
16917 | | /* VSCEF */ |
16918 | | 9438, |
16919 | | /* VSCEG */ |
16920 | | 9443, |
16921 | | /* VSCHDP */ |
16922 | | 9448, |
16923 | | /* VSCHP */ |
16924 | | 9452, |
16925 | | /* VSCHSP */ |
16926 | | 9457, |
16927 | | /* VSCHXP */ |
16928 | | 9461, |
16929 | | /* VSCSHP */ |
16930 | | 9465, |
16931 | | /* VSDP */ |
16932 | | 9468, |
16933 | | /* VSEG */ |
16934 | | 9473, |
16935 | | /* VSEGB */ |
16936 | | 9476, |
16937 | | /* VSEGF */ |
16938 | | 9478, |
16939 | | /* VSEGH */ |
16940 | | 9480, |
16941 | | /* VSEL */ |
16942 | | 9482, |
16943 | | /* VSF */ |
16944 | | 9486, |
16945 | | /* VSG */ |
16946 | | 9489, |
16947 | | /* VSH */ |
16948 | | 9492, |
16949 | | /* VSL */ |
16950 | | 9495, |
16951 | | /* VSLB */ |
16952 | | 9498, |
16953 | | /* VSLD */ |
16954 | | 9501, |
16955 | | /* VSLDB */ |
16956 | | 9505, |
16957 | | /* VSP */ |
16958 | | 9509, |
16959 | | /* VSQ */ |
16960 | | 9514, |
16961 | | /* VSRA */ |
16962 | | 9517, |
16963 | | /* VSRAB */ |
16964 | | 9520, |
16965 | | /* VSRD */ |
16966 | | 9523, |
16967 | | /* VSRL */ |
16968 | | 9527, |
16969 | | /* VSRLB */ |
16970 | | 9530, |
16971 | | /* VSRP */ |
16972 | | 9533, |
16973 | | /* VSRPR */ |
16974 | | 9538, |
16975 | | /* VST */ |
16976 | | 9543, |
16977 | | /* VSTAlign */ |
16978 | | 9547, |
16979 | | /* VSTBR */ |
16980 | | 9552, |
16981 | | /* VSTBRF */ |
16982 | | 9557, |
16983 | | /* VSTBRG */ |
16984 | | 9561, |
16985 | | /* VSTBRH */ |
16986 | | 9565, |
16987 | | /* VSTBRQ */ |
16988 | | 9569, |
16989 | | /* VSTEB */ |
16990 | | 9573, |
16991 | | /* VSTEBRF */ |
16992 | | 9578, |
16993 | | /* VSTEBRG */ |
16994 | | 9583, |
16995 | | /* VSTEBRH */ |
16996 | | 9588, |
16997 | | /* VSTEF */ |
16998 | | 9593, |
16999 | | /* VSTEG */ |
17000 | | 9598, |
17001 | | /* VSTEH */ |
17002 | | 9603, |
17003 | | /* VSTER */ |
17004 | | 9608, |
17005 | | /* VSTERF */ |
17006 | | 9613, |
17007 | | /* VSTERG */ |
17008 | | 9617, |
17009 | | /* VSTERH */ |
17010 | | 9621, |
17011 | | /* VSTL */ |
17012 | | 9625, |
17013 | | /* VSTM */ |
17014 | | 9629, |
17015 | | /* VSTMAlign */ |
17016 | | 9633, |
17017 | | /* VSTRC */ |
17018 | | 9638, |
17019 | | /* VSTRCB */ |
17020 | | 9644, |
17021 | | /* VSTRCBS */ |
17022 | | 9649, |
17023 | | /* VSTRCF */ |
17024 | | 9654, |
17025 | | /* VSTRCFS */ |
17026 | | 9659, |
17027 | | /* VSTRCH */ |
17028 | | 9664, |
17029 | | /* VSTRCHS */ |
17030 | | 9669, |
17031 | | /* VSTRCZB */ |
17032 | | 9674, |
17033 | | /* VSTRCZBS */ |
17034 | | 9679, |
17035 | | /* VSTRCZF */ |
17036 | | 9684, |
17037 | | /* VSTRCZFS */ |
17038 | | 9689, |
17039 | | /* VSTRCZH */ |
17040 | | 9694, |
17041 | | /* VSTRCZHS */ |
17042 | | 9699, |
17043 | | /* VSTRL */ |
17044 | | 9704, |
17045 | | /* VSTRLR */ |
17046 | | 9708, |
17047 | | /* VSTRS */ |
17048 | | 9712, |
17049 | | /* VSTRSB */ |
17050 | | 9718, |
17051 | | /* VSTRSF */ |
17052 | | 9723, |
17053 | | /* VSTRSH */ |
17054 | | 9728, |
17055 | | /* VSTRSZB */ |
17056 | | 9733, |
17057 | | /* VSTRSZF */ |
17058 | | 9737, |
17059 | | /* VSTRSZH */ |
17060 | | 9741, |
17061 | | /* VSUM */ |
17062 | | 9745, |
17063 | | /* VSUMB */ |
17064 | | 9749, |
17065 | | /* VSUMG */ |
17066 | | 9752, |
17067 | | /* VSUMGF */ |
17068 | | 9756, |
17069 | | /* VSUMGH */ |
17070 | | 9759, |
17071 | | /* VSUMH */ |
17072 | | 9762, |
17073 | | /* VSUMQ */ |
17074 | | 9765, |
17075 | | /* VSUMQF */ |
17076 | | 9769, |
17077 | | /* VSUMQG */ |
17078 | | 9772, |
17079 | | /* VTM */ |
17080 | | 9775, |
17081 | | /* VTP */ |
17082 | | 9777, |
17083 | | /* VUPH */ |
17084 | | 9778, |
17085 | | /* VUPHB */ |
17086 | | 9781, |
17087 | | /* VUPHF */ |
17088 | | 9783, |
17089 | | /* VUPHH */ |
17090 | | 9785, |
17091 | | /* VUPKZ */ |
17092 | | 9787, |
17093 | | /* VUPKZH */ |
17094 | | 9791, |
17095 | | /* VUPKZL */ |
17096 | | 9794, |
17097 | | /* VUPL */ |
17098 | | 9797, |
17099 | | /* VUPLB */ |
17100 | | 9800, |
17101 | | /* VUPLF */ |
17102 | | 9802, |
17103 | | /* VUPLH */ |
17104 | | 9804, |
17105 | | /* VUPLHB */ |
17106 | | 9807, |
17107 | | /* VUPLHF */ |
17108 | | 9809, |
17109 | | /* VUPLHH */ |
17110 | | 9811, |
17111 | | /* VUPLHW */ |
17112 | | 9813, |
17113 | | /* VUPLL */ |
17114 | | 9815, |
17115 | | /* VUPLLB */ |
17116 | | 9818, |
17117 | | /* VUPLLF */ |
17118 | | 9820, |
17119 | | /* VUPLLH */ |
17120 | | 9822, |
17121 | | /* VX */ |
17122 | | 9824, |
17123 | | /* VZERO */ |
17124 | | 9827, |
17125 | | /* WCDGB */ |
17126 | | 9828, |
17127 | | /* WCDLGB */ |
17128 | | 9832, |
17129 | | /* WCEFB */ |
17130 | | 9836, |
17131 | | /* WCELFB */ |
17132 | | 9840, |
17133 | | /* WCFEB */ |
17134 | | 9844, |
17135 | | /* WCGDB */ |
17136 | | 9848, |
17137 | | /* WCLFEB */ |
17138 | | 9852, |
17139 | | /* WCLGDB */ |
17140 | | 9856, |
17141 | | /* WFADB */ |
17142 | | 9860, |
17143 | | /* WFASB */ |
17144 | | 9863, |
17145 | | /* WFAXB */ |
17146 | | 9866, |
17147 | | /* WFC */ |
17148 | | 9869, |
17149 | | /* WFCDB */ |
17150 | | 9873, |
17151 | | /* WFCEDB */ |
17152 | | 9875, |
17153 | | /* WFCEDBS */ |
17154 | | 9878, |
17155 | | /* WFCESB */ |
17156 | | 9881, |
17157 | | /* WFCESBS */ |
17158 | | 9884, |
17159 | | /* WFCEXB */ |
17160 | | 9887, |
17161 | | /* WFCEXBS */ |
17162 | | 9890, |
17163 | | /* WFCHDB */ |
17164 | | 9893, |
17165 | | /* WFCHDBS */ |
17166 | | 9896, |
17167 | | /* WFCHEDB */ |
17168 | | 9899, |
17169 | | /* WFCHEDBS */ |
17170 | | 9902, |
17171 | | /* WFCHESB */ |
17172 | | 9905, |
17173 | | /* WFCHESBS */ |
17174 | | 9908, |
17175 | | /* WFCHEXB */ |
17176 | | 9911, |
17177 | | /* WFCHEXBS */ |
17178 | | 9914, |
17179 | | /* WFCHSB */ |
17180 | | 9917, |
17181 | | /* WFCHSBS */ |
17182 | | 9920, |
17183 | | /* WFCHXB */ |
17184 | | 9923, |
17185 | | /* WFCHXBS */ |
17186 | | 9926, |
17187 | | /* WFCSB */ |
17188 | | 9929, |
17189 | | /* WFCXB */ |
17190 | | 9931, |
17191 | | /* WFDDB */ |
17192 | | 9933, |
17193 | | /* WFDSB */ |
17194 | | 9936, |
17195 | | /* WFDXB */ |
17196 | | 9939, |
17197 | | /* WFIDB */ |
17198 | | 9942, |
17199 | | /* WFISB */ |
17200 | | 9946, |
17201 | | /* WFIXB */ |
17202 | | 9950, |
17203 | | /* WFK */ |
17204 | | 9954, |
17205 | | /* WFKDB */ |
17206 | | 9958, |
17207 | | /* WFKEDB */ |
17208 | | 9960, |
17209 | | /* WFKEDBS */ |
17210 | | 9963, |
17211 | | /* WFKESB */ |
17212 | | 9966, |
17213 | | /* WFKESBS */ |
17214 | | 9969, |
17215 | | /* WFKEXB */ |
17216 | | 9972, |
17217 | | /* WFKEXBS */ |
17218 | | 9975, |
17219 | | /* WFKHDB */ |
17220 | | 9978, |
17221 | | /* WFKHDBS */ |
17222 | | 9981, |
17223 | | /* WFKHEDB */ |
17224 | | 9984, |
17225 | | /* WFKHEDBS */ |
17226 | | 9987, |
17227 | | /* WFKHESB */ |
17228 | | 9990, |
17229 | | /* WFKHESBS */ |
17230 | | 9993, |
17231 | | /* WFKHEXB */ |
17232 | | 9996, |
17233 | | /* WFKHEXBS */ |
17234 | | 9999, |
17235 | | /* WFKHSB */ |
17236 | | 10002, |
17237 | | /* WFKHSBS */ |
17238 | | 10005, |
17239 | | /* WFKHXB */ |
17240 | | 10008, |
17241 | | /* WFKHXBS */ |
17242 | | 10011, |
17243 | | /* WFKSB */ |
17244 | | 10014, |
17245 | | /* WFKXB */ |
17246 | | 10016, |
17247 | | /* WFLCDB */ |
17248 | | 10018, |
17249 | | /* WFLCSB */ |
17250 | | 10020, |
17251 | | /* WFLCXB */ |
17252 | | 10022, |
17253 | | /* WFLLD */ |
17254 | | 10024, |
17255 | | /* WFLLS */ |
17256 | | 10026, |
17257 | | /* WFLNDB */ |
17258 | | 10028, |
17259 | | /* WFLNSB */ |
17260 | | 10030, |
17261 | | /* WFLNXB */ |
17262 | | 10032, |
17263 | | /* WFLPDB */ |
17264 | | 10034, |
17265 | | /* WFLPSB */ |
17266 | | 10036, |
17267 | | /* WFLPXB */ |
17268 | | 10038, |
17269 | | /* WFLRD */ |
17270 | | 10040, |
17271 | | /* WFLRX */ |
17272 | | 10044, |
17273 | | /* WFMADB */ |
17274 | | 10048, |
17275 | | /* WFMASB */ |
17276 | | 10052, |
17277 | | /* WFMAXB */ |
17278 | | 10056, |
17279 | | /* WFMAXDB */ |
17280 | | 10060, |
17281 | | /* WFMAXSB */ |
17282 | | 10064, |
17283 | | /* WFMAXXB */ |
17284 | | 10068, |
17285 | | /* WFMDB */ |
17286 | | 10072, |
17287 | | /* WFMINDB */ |
17288 | | 10075, |
17289 | | /* WFMINSB */ |
17290 | | 10079, |
17291 | | /* WFMINXB */ |
17292 | | 10083, |
17293 | | /* WFMSB */ |
17294 | | 10087, |
17295 | | /* WFMSDB */ |
17296 | | 10090, |
17297 | | /* WFMSSB */ |
17298 | | 10094, |
17299 | | /* WFMSXB */ |
17300 | | 10098, |
17301 | | /* WFMXB */ |
17302 | | 10102, |
17303 | | /* WFNMADB */ |
17304 | | 10105, |
17305 | | /* WFNMASB */ |
17306 | | 10109, |
17307 | | /* WFNMAXB */ |
17308 | | 10113, |
17309 | | /* WFNMSDB */ |
17310 | | 10117, |
17311 | | /* WFNMSSB */ |
17312 | | 10121, |
17313 | | /* WFNMSXB */ |
17314 | | 10125, |
17315 | | /* WFPSODB */ |
17316 | | 10129, |
17317 | | /* WFPSOSB */ |
17318 | | 10132, |
17319 | | /* WFPSOXB */ |
17320 | | 10135, |
17321 | | /* WFSDB */ |
17322 | | 10138, |
17323 | | /* WFSQDB */ |
17324 | | 10141, |
17325 | | /* WFSQSB */ |
17326 | | 10143, |
17327 | | /* WFSQXB */ |
17328 | | 10145, |
17329 | | /* WFSSB */ |
17330 | | 10147, |
17331 | | /* WFSXB */ |
17332 | | 10150, |
17333 | | /* WFTCIDB */ |
17334 | | 10153, |
17335 | | /* WFTCISB */ |
17336 | | 10156, |
17337 | | /* WFTCIXB */ |
17338 | | 10159, |
17339 | | /* WLDEB */ |
17340 | | 10162, |
17341 | | /* WLEDB */ |
17342 | | 10164, |
17343 | | /* X */ |
17344 | | 10168, |
17345 | | /* XC */ |
17346 | | 10173, |
17347 | | /* XG */ |
17348 | | 10178, |
17349 | | /* XGR */ |
17350 | | 10183, |
17351 | | /* XGRK */ |
17352 | | 10186, |
17353 | | /* XI */ |
17354 | | 10189, |
17355 | | /* XIHF */ |
17356 | | 10192, |
17357 | | /* XILF */ |
17358 | | 10195, |
17359 | | /* XIY */ |
17360 | | 10198, |
17361 | | /* XR */ |
17362 | | 10201, |
17363 | | /* XRK */ |
17364 | | 10204, |
17365 | | /* XSCH */ |
17366 | | 10207, |
17367 | | /* XY */ |
17368 | | 10207, |
17369 | | /* ZAP */ |
17370 | | 10212, |
17371 | | }; |
17372 | | |
17373 | | using namespace OpTypes; |
17374 | | static const int16_t OpcodeOperandTypes[] = { |
17375 | | |
17376 | | /* PHI */ |
17377 | | -1, |
17378 | | /* INLINEASM */ |
17379 | | /* INLINEASM_BR */ |
17380 | | /* CFI_INSTRUCTION */ |
17381 | | i32imm, |
17382 | | /* EH_LABEL */ |
17383 | | i32imm, |
17384 | | /* GC_LABEL */ |
17385 | | i32imm, |
17386 | | /* ANNOTATION_LABEL */ |
17387 | | i32imm, |
17388 | | /* KILL */ |
17389 | | /* EXTRACT_SUBREG */ |
17390 | | -1, -1, i32imm, |
17391 | | /* INSERT_SUBREG */ |
17392 | | -1, -1, -1, i32imm, |
17393 | | /* IMPLICIT_DEF */ |
17394 | | -1, |
17395 | | /* SUBREG_TO_REG */ |
17396 | | -1, -1, -1, i32imm, |
17397 | | /* COPY_TO_REGCLASS */ |
17398 | | -1, -1, i32imm, |
17399 | | /* DBG_VALUE */ |
17400 | | /* DBG_VALUE_LIST */ |
17401 | | /* DBG_INSTR_REF */ |
17402 | | /* DBG_PHI */ |
17403 | | /* DBG_LABEL */ |
17404 | | -1, |
17405 | | /* REG_SEQUENCE */ |
17406 | | -1, -1, |
17407 | | /* COPY */ |
17408 | | -1, -1, |
17409 | | /* BUNDLE */ |
17410 | | /* LIFETIME_START */ |
17411 | | i32imm, |
17412 | | /* LIFETIME_END */ |
17413 | | i32imm, |
17414 | | /* PSEUDO_PROBE */ |
17415 | | i64imm, i64imm, i8imm, i32imm, |
17416 | | /* ARITH_FENCE */ |
17417 | | -1, -1, |
17418 | | /* STACKMAP */ |
17419 | | i64imm, i32imm, |
17420 | | /* FENTRY_CALL */ |
17421 | | /* PATCHPOINT */ |
17422 | | -1, i64imm, i32imm, -1, i32imm, i32imm, |
17423 | | /* LOAD_STACK_GUARD */ |
17424 | | -1, |
17425 | | /* PREALLOCATED_SETUP */ |
17426 | | i32imm, |
17427 | | /* PREALLOCATED_ARG */ |
17428 | | -1, i32imm, i32imm, |
17429 | | /* STATEPOINT */ |
17430 | | /* LOCAL_ESCAPE */ |
17431 | | -1, i32imm, |
17432 | | /* FAULTING_OP */ |
17433 | | -1, |
17434 | | /* PATCHABLE_OP */ |
17435 | | /* PATCHABLE_FUNCTION_ENTER */ |
17436 | | /* PATCHABLE_RET */ |
17437 | | /* PATCHABLE_FUNCTION_EXIT */ |
17438 | | /* PATCHABLE_TAIL_CALL */ |
17439 | | /* PATCHABLE_EVENT_CALL */ |
17440 | | -1, -1, |
17441 | | /* PATCHABLE_TYPED_EVENT_CALL */ |
17442 | | -1, -1, -1, |
17443 | | /* ICALL_BRANCH_FUNNEL */ |
17444 | | /* MEMBARRIER */ |
17445 | | /* JUMP_TABLE_DEBUG_INFO */ |
17446 | | i64imm, |
17447 | | /* G_ASSERT_SEXT */ |
17448 | | type0, type0, untyped_imm_0, |
17449 | | /* G_ASSERT_ZEXT */ |
17450 | | type0, type0, untyped_imm_0, |
17451 | | /* G_ASSERT_ALIGN */ |
17452 | | type0, type0, untyped_imm_0, |
17453 | | /* G_ADD */ |
17454 | | type0, type0, type0, |
17455 | | /* G_SUB */ |
17456 | | type0, type0, type0, |
17457 | | /* G_MUL */ |
17458 | | type0, type0, type0, |
17459 | | /* G_SDIV */ |
17460 | | type0, type0, type0, |
17461 | | /* G_UDIV */ |
17462 | | type0, type0, type0, |
17463 | | /* G_SREM */ |
17464 | | type0, type0, type0, |
17465 | | /* G_UREM */ |
17466 | | type0, type0, type0, |
17467 | | /* G_SDIVREM */ |
17468 | | type0, type0, type0, type0, |
17469 | | /* G_UDIVREM */ |
17470 | | type0, type0, type0, type0, |
17471 | | /* G_AND */ |
17472 | | type0, type0, type0, |
17473 | | /* G_OR */ |
17474 | | type0, type0, type0, |
17475 | | /* G_XOR */ |
17476 | | type0, type0, type0, |
17477 | | /* G_IMPLICIT_DEF */ |
17478 | | type0, |
17479 | | /* G_PHI */ |
17480 | | type0, |
17481 | | /* G_FRAME_INDEX */ |
17482 | | type0, -1, |
17483 | | /* G_GLOBAL_VALUE */ |
17484 | | type0, -1, |
17485 | | /* G_CONSTANT_POOL */ |
17486 | | type0, -1, |
17487 | | /* G_EXTRACT */ |
17488 | | type0, type1, untyped_imm_0, |
17489 | | /* G_UNMERGE_VALUES */ |
17490 | | type0, type1, |
17491 | | /* G_INSERT */ |
17492 | | type0, type0, type1, untyped_imm_0, |
17493 | | /* G_MERGE_VALUES */ |
17494 | | type0, type1, |
17495 | | /* G_BUILD_VECTOR */ |
17496 | | type0, type1, |
17497 | | /* G_BUILD_VECTOR_TRUNC */ |
17498 | | type0, type1, |
17499 | | /* G_CONCAT_VECTORS */ |
17500 | | type0, type1, |
17501 | | /* G_PTRTOINT */ |
17502 | | type0, type1, |
17503 | | /* G_INTTOPTR */ |
17504 | | type0, type1, |
17505 | | /* G_BITCAST */ |
17506 | | type0, type1, |
17507 | | /* G_FREEZE */ |
17508 | | type0, type0, |
17509 | | /* G_CONSTANT_FOLD_BARRIER */ |
17510 | | type0, type0, |
17511 | | /* G_INTRINSIC_FPTRUNC_ROUND */ |
17512 | | type0, type1, i32imm, |
17513 | | /* G_INTRINSIC_TRUNC */ |
17514 | | type0, type0, |
17515 | | /* G_INTRINSIC_ROUND */ |
17516 | | type0, type0, |
17517 | | /* G_INTRINSIC_LRINT */ |
17518 | | type0, type1, |
17519 | | /* G_INTRINSIC_ROUNDEVEN */ |
17520 | | type0, type0, |
17521 | | /* G_READCYCLECOUNTER */ |
17522 | | type0, |
17523 | | /* G_LOAD */ |
17524 | | type0, ptype1, |
17525 | | /* G_SEXTLOAD */ |
17526 | | type0, ptype1, |
17527 | | /* G_ZEXTLOAD */ |
17528 | | type0, ptype1, |
17529 | | /* G_INDEXED_LOAD */ |
17530 | | type0, ptype1, ptype1, type2, -1, |
17531 | | /* G_INDEXED_SEXTLOAD */ |
17532 | | type0, ptype1, ptype1, type2, -1, |
17533 | | /* G_INDEXED_ZEXTLOAD */ |
17534 | | type0, ptype1, ptype1, type2, -1, |
17535 | | /* G_STORE */ |
17536 | | type0, ptype1, |
17537 | | /* G_INDEXED_STORE */ |
17538 | | ptype0, type1, ptype0, ptype2, -1, |
17539 | | /* G_ATOMIC_CMPXCHG_WITH_SUCCESS */ |
17540 | | type0, type1, type2, type0, type0, |
17541 | | /* G_ATOMIC_CMPXCHG */ |
17542 | | type0, ptype1, type0, type0, |
17543 | | /* G_ATOMICRMW_XCHG */ |
17544 | | type0, ptype1, type0, |
17545 | | /* G_ATOMICRMW_ADD */ |
17546 | | type0, ptype1, type0, |
17547 | | /* G_ATOMICRMW_SUB */ |
17548 | | type0, ptype1, type0, |
17549 | | /* G_ATOMICRMW_AND */ |
17550 | | type0, ptype1, type0, |
17551 | | /* G_ATOMICRMW_NAND */ |
17552 | | type0, ptype1, type0, |
17553 | | /* G_ATOMICRMW_OR */ |
17554 | | type0, ptype1, type0, |
17555 | | /* G_ATOMICRMW_XOR */ |
17556 | | type0, ptype1, type0, |
17557 | | /* G_ATOMICRMW_MAX */ |
17558 | | type0, ptype1, type0, |
17559 | | /* G_ATOMICRMW_MIN */ |
17560 | | type0, ptype1, type0, |
17561 | | /* G_ATOMICRMW_UMAX */ |
17562 | | type0, ptype1, type0, |
17563 | | /* G_ATOMICRMW_UMIN */ |
17564 | | type0, ptype1, type0, |
17565 | | /* G_ATOMICRMW_FADD */ |
17566 | | type0, ptype1, type0, |
17567 | | /* G_ATOMICRMW_FSUB */ |
17568 | | type0, ptype1, type0, |
17569 | | /* G_ATOMICRMW_FMAX */ |
17570 | | type0, ptype1, type0, |
17571 | | /* G_ATOMICRMW_FMIN */ |
17572 | | type0, ptype1, type0, |
17573 | | /* G_ATOMICRMW_UINC_WRAP */ |
17574 | | type0, ptype1, type0, |
17575 | | /* G_ATOMICRMW_UDEC_WRAP */ |
17576 | | type0, ptype1, type0, |
17577 | | /* G_FENCE */ |
17578 | | i32imm, i32imm, |
17579 | | /* G_PREFETCH */ |
17580 | | ptype0, i32imm, i32imm, i32imm, |
17581 | | /* G_BRCOND */ |
17582 | | type0, -1, |
17583 | | /* G_BRINDIRECT */ |
17584 | | type0, |
17585 | | /* G_INVOKE_REGION_START */ |
17586 | | /* G_INTRINSIC */ |
17587 | | -1, |
17588 | | /* G_INTRINSIC_W_SIDE_EFFECTS */ |
17589 | | -1, |
17590 | | /* G_INTRINSIC_CONVERGENT */ |
17591 | | -1, |
17592 | | /* G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS */ |
17593 | | -1, |
17594 | | /* G_ANYEXT */ |
17595 | | type0, type1, |
17596 | | /* G_TRUNC */ |
17597 | | type0, type1, |
17598 | | /* G_CONSTANT */ |
17599 | | type0, -1, |
17600 | | /* G_FCONSTANT */ |
17601 | | type0, -1, |
17602 | | /* G_VASTART */ |
17603 | | type0, |
17604 | | /* G_VAARG */ |
17605 | | type0, type1, -1, |
17606 | | /* G_SEXT */ |
17607 | | type0, type1, |
17608 | | /* G_SEXT_INREG */ |
17609 | | type0, type0, untyped_imm_0, |
17610 | | /* G_ZEXT */ |
17611 | | type0, type1, |
17612 | | /* G_SHL */ |
17613 | | type0, type0, type1, |
17614 | | /* G_LSHR */ |
17615 | | type0, type0, type1, |
17616 | | /* G_ASHR */ |
17617 | | type0, type0, type1, |
17618 | | /* G_FSHL */ |
17619 | | type0, type0, type0, type1, |
17620 | | /* G_FSHR */ |
17621 | | type0, type0, type0, type1, |
17622 | | /* G_ROTR */ |
17623 | | type0, type0, type1, |
17624 | | /* G_ROTL */ |
17625 | | type0, type0, type1, |
17626 | | /* G_ICMP */ |
17627 | | type0, -1, type1, type1, |
17628 | | /* G_FCMP */ |
17629 | | type0, -1, type1, type1, |
17630 | | /* G_SELECT */ |
17631 | | type0, type1, type0, type0, |
17632 | | /* G_UADDO */ |
17633 | | type0, type1, type0, type0, |
17634 | | /* G_UADDE */ |
17635 | | type0, type1, type0, type0, type1, |
17636 | | /* G_USUBO */ |
17637 | | type0, type1, type0, type0, |
17638 | | /* G_USUBE */ |
17639 | | type0, type1, type0, type0, type1, |
17640 | | /* G_SADDO */ |
17641 | | type0, type1, type0, type0, |
17642 | | /* G_SADDE */ |
17643 | | type0, type1, type0, type0, type1, |
17644 | | /* G_SSUBO */ |
17645 | | type0, type1, type0, type0, |
17646 | | /* G_SSUBE */ |
17647 | | type0, type1, type0, type0, type1, |
17648 | | /* G_UMULO */ |
17649 | | type0, type1, type0, type0, |
17650 | | /* G_SMULO */ |
17651 | | type0, type1, type0, type0, |
17652 | | /* G_UMULH */ |
17653 | | type0, type0, type0, |
17654 | | /* G_SMULH */ |
17655 | | type0, type0, type0, |
17656 | | /* G_UADDSAT */ |
17657 | | type0, type0, type0, |
17658 | | /* G_SADDSAT */ |
17659 | | type0, type0, type0, |
17660 | | /* G_USUBSAT */ |
17661 | | type0, type0, type0, |
17662 | | /* G_SSUBSAT */ |
17663 | | type0, type0, type0, |
17664 | | /* G_USHLSAT */ |
17665 | | type0, type0, type1, |
17666 | | /* G_SSHLSAT */ |
17667 | | type0, type0, type1, |
17668 | | /* G_SMULFIX */ |
17669 | | type0, type0, type0, untyped_imm_0, |
17670 | | /* G_UMULFIX */ |
17671 | | type0, type0, type0, untyped_imm_0, |
17672 | | /* G_SMULFIXSAT */ |
17673 | | type0, type0, type0, untyped_imm_0, |
17674 | | /* G_UMULFIXSAT */ |
17675 | | type0, type0, type0, untyped_imm_0, |
17676 | | /* G_SDIVFIX */ |
17677 | | type0, type0, type0, untyped_imm_0, |
17678 | | /* G_UDIVFIX */ |
17679 | | type0, type0, type0, untyped_imm_0, |
17680 | | /* G_SDIVFIXSAT */ |
17681 | | type0, type0, type0, untyped_imm_0, |
17682 | | /* G_UDIVFIXSAT */ |
17683 | | type0, type0, type0, untyped_imm_0, |
17684 | | /* G_FADD */ |
17685 | | type0, type0, type0, |
17686 | | /* G_FSUB */ |
17687 | | type0, type0, type0, |
17688 | | /* G_FMUL */ |
17689 | | type0, type0, type0, |
17690 | | /* G_FMA */ |
17691 | | type0, type0, type0, type0, |
17692 | | /* G_FMAD */ |
17693 | | type0, type0, type0, type0, |
17694 | | /* G_FDIV */ |
17695 | | type0, type0, type0, |
17696 | | /* G_FREM */ |
17697 | | type0, type0, type0, |
17698 | | /* G_FPOW */ |
17699 | | type0, type0, type0, |
17700 | | /* G_FPOWI */ |
17701 | | type0, type0, type1, |
17702 | | /* G_FEXP */ |
17703 | | type0, type0, |
17704 | | /* G_FEXP2 */ |
17705 | | type0, type0, |
17706 | | /* G_FEXP10 */ |
17707 | | type0, type0, |
17708 | | /* G_FLOG */ |
17709 | | type0, type0, |
17710 | | /* G_FLOG2 */ |
17711 | | type0, type0, |
17712 | | /* G_FLOG10 */ |
17713 | | type0, type0, |
17714 | | /* G_FLDEXP */ |
17715 | | type0, type0, type1, |
17716 | | /* G_FFREXP */ |
17717 | | type0, type1, type0, |
17718 | | /* G_FNEG */ |
17719 | | type0, type0, |
17720 | | /* G_FPEXT */ |
17721 | | type0, type1, |
17722 | | /* G_FPTRUNC */ |
17723 | | type0, type1, |
17724 | | /* G_FPTOSI */ |
17725 | | type0, type1, |
17726 | | /* G_FPTOUI */ |
17727 | | type0, type1, |
17728 | | /* G_SITOFP */ |
17729 | | type0, type1, |
17730 | | /* G_UITOFP */ |
17731 | | type0, type1, |
17732 | | /* G_FABS */ |
17733 | | type0, type0, |
17734 | | /* G_FCOPYSIGN */ |
17735 | | type0, type0, type1, |
17736 | | /* G_IS_FPCLASS */ |
17737 | | type0, type1, -1, |
17738 | | /* G_FCANONICALIZE */ |
17739 | | type0, type0, |
17740 | | /* G_FMINNUM */ |
17741 | | type0, type0, type0, |
17742 | | /* G_FMAXNUM */ |
17743 | | type0, type0, type0, |
17744 | | /* G_FMINNUM_IEEE */ |
17745 | | type0, type0, type0, |
17746 | | /* G_FMAXNUM_IEEE */ |
17747 | | type0, type0, type0, |
17748 | | /* G_FMINIMUM */ |
17749 | | type0, type0, type0, |
17750 | | /* G_FMAXIMUM */ |
17751 | | type0, type0, type0, |
17752 | | /* G_GET_FPENV */ |
17753 | | type0, |
17754 | | /* G_SET_FPENV */ |
17755 | | type0, |
17756 | | /* G_RESET_FPENV */ |
17757 | | /* G_GET_FPMODE */ |
17758 | | type0, |
17759 | | /* G_SET_FPMODE */ |
17760 | | type0, |
17761 | | /* G_RESET_FPMODE */ |
17762 | | /* G_PTR_ADD */ |
17763 | | ptype0, ptype0, type1, |
17764 | | /* G_PTRMASK */ |
17765 | | ptype0, ptype0, type1, |
17766 | | /* G_SMIN */ |
17767 | | type0, type0, type0, |
17768 | | /* G_SMAX */ |
17769 | | type0, type0, type0, |
17770 | | /* G_UMIN */ |
17771 | | type0, type0, type0, |
17772 | | /* G_UMAX */ |
17773 | | type0, type0, type0, |
17774 | | /* G_ABS */ |
17775 | | type0, type0, |
17776 | | /* G_LROUND */ |
17777 | | type0, type1, |
17778 | | /* G_LLROUND */ |
17779 | | type0, type1, |
17780 | | /* G_BR */ |
17781 | | -1, |
17782 | | /* G_BRJT */ |
17783 | | ptype0, -1, type1, |
17784 | | /* G_INSERT_VECTOR_ELT */ |
17785 | | type0, type0, type1, type2, |
17786 | | /* G_EXTRACT_VECTOR_ELT */ |
17787 | | type0, type1, type2, |
17788 | | /* G_SHUFFLE_VECTOR */ |
17789 | | type0, type1, type1, -1, |
17790 | | /* G_CTTZ */ |
17791 | | type0, type1, |
17792 | | /* G_CTTZ_ZERO_UNDEF */ |
17793 | | type0, type1, |
17794 | | /* G_CTLZ */ |
17795 | | type0, type1, |
17796 | | /* G_CTLZ_ZERO_UNDEF */ |
17797 | | type0, type1, |
17798 | | /* G_CTPOP */ |
17799 | | type0, type1, |
17800 | | /* G_BSWAP */ |
17801 | | type0, type0, |
17802 | | /* G_BITREVERSE */ |
17803 | | type0, type0, |
17804 | | /* G_FCEIL */ |
17805 | | type0, type0, |
17806 | | /* G_FCOS */ |
17807 | | type0, type0, |
17808 | | /* G_FSIN */ |
17809 | | type0, type0, |
17810 | | /* G_FSQRT */ |
17811 | | type0, type0, |
17812 | | /* G_FFLOOR */ |
17813 | | type0, type0, |
17814 | | /* G_FRINT */ |
17815 | | type0, type0, |
17816 | | /* G_FNEARBYINT */ |
17817 | | type0, type0, |
17818 | | /* G_ADDRSPACE_CAST */ |
17819 | | type0, type1, |
17820 | | /* G_BLOCK_ADDR */ |
17821 | | type0, -1, |
17822 | | /* G_JUMP_TABLE */ |
17823 | | type0, -1, |
17824 | | /* G_DYN_STACKALLOC */ |
17825 | | ptype0, type1, i32imm, |
17826 | | /* G_STACKSAVE */ |
17827 | | ptype0, |
17828 | | /* G_STACKRESTORE */ |
17829 | | ptype0, |
17830 | | /* G_STRICT_FADD */ |
17831 | | type0, type0, type0, |
17832 | | /* G_STRICT_FSUB */ |
17833 | | type0, type0, type0, |
17834 | | /* G_STRICT_FMUL */ |
17835 | | type0, type0, type0, |
17836 | | /* G_STRICT_FDIV */ |
17837 | | type0, type0, type0, |
17838 | | /* G_STRICT_FREM */ |
17839 | | type0, type0, type0, |
17840 | | /* G_STRICT_FMA */ |
17841 | | type0, type0, type0, type0, |
17842 | | /* G_STRICT_FSQRT */ |
17843 | | type0, type0, |
17844 | | /* G_STRICT_FLDEXP */ |
17845 | | type0, type0, type1, |
17846 | | /* G_READ_REGISTER */ |
17847 | | type0, -1, |
17848 | | /* G_WRITE_REGISTER */ |
17849 | | -1, type0, |
17850 | | /* G_MEMCPY */ |
17851 | | ptype0, ptype1, type2, untyped_imm_0, |
17852 | | /* G_MEMCPY_INLINE */ |
17853 | | ptype0, ptype1, type2, |
17854 | | /* G_MEMMOVE */ |
17855 | | ptype0, ptype1, type2, untyped_imm_0, |
17856 | | /* G_MEMSET */ |
17857 | | ptype0, type1, type2, untyped_imm_0, |
17858 | | /* G_BZERO */ |
17859 | | ptype0, type1, untyped_imm_0, |
17860 | | /* G_VECREDUCE_SEQ_FADD */ |
17861 | | type0, type1, type2, |
17862 | | /* G_VECREDUCE_SEQ_FMUL */ |
17863 | | type0, type1, type2, |
17864 | | /* G_VECREDUCE_FADD */ |
17865 | | type0, type1, |
17866 | | /* G_VECREDUCE_FMUL */ |
17867 | | type0, type1, |
17868 | | /* G_VECREDUCE_FMAX */ |
17869 | | type0, type1, |
17870 | | /* G_VECREDUCE_FMIN */ |
17871 | | type0, type1, |
17872 | | /* G_VECREDUCE_FMAXIMUM */ |
17873 | | type0, type1, |
17874 | | /* G_VECREDUCE_FMINIMUM */ |
17875 | | type0, type1, |
17876 | | /* G_VECREDUCE_ADD */ |
17877 | | type0, type1, |
17878 | | /* G_VECREDUCE_MUL */ |
17879 | | type0, type1, |
17880 | | /* G_VECREDUCE_AND */ |
17881 | | type0, type1, |
17882 | | /* G_VECREDUCE_OR */ |
17883 | | type0, type1, |
17884 | | /* G_VECREDUCE_XOR */ |
17885 | | type0, type1, |
17886 | | /* G_VECREDUCE_SMAX */ |
17887 | | type0, type1, |
17888 | | /* G_VECREDUCE_SMIN */ |
17889 | | type0, type1, |
17890 | | /* G_VECREDUCE_UMAX */ |
17891 | | type0, type1, |
17892 | | /* G_VECREDUCE_UMIN */ |
17893 | | type0, type1, |
17894 | | /* G_SBFX */ |
17895 | | type0, type0, type1, type1, |
17896 | | /* G_UBFX */ |
17897 | | type0, type0, type1, type1, |
17898 | | /* ADA_ENTRY */ |
17899 | | GR64, adasym, ADDR64, imm64, |
17900 | | /* ADA_ENTRY_VALUE */ |
17901 | | GR64, adasym, ADDR64, imm64, |
17902 | | /* ADB_MemFoldPseudo */ |
17903 | | FP64, FP64, ADDR64, disp12imm64, ADDR64, |
17904 | | /* ADJCALLSTACKDOWN */ |
17905 | | i64imm, i64imm, |
17906 | | /* ADJCALLSTACKUP */ |
17907 | | i64imm, i64imm, |
17908 | | /* ADJDYNALLOC */ |
17909 | | GR64, ADDR64, disp12imm64, ADDR64, |
17910 | | /* AEB_MemFoldPseudo */ |
17911 | | FP32, FP32, ADDR64, disp12imm64, ADDR64, |
17912 | | /* AEXT128 */ |
17913 | | GR128, GR64, |
17914 | | /* AFIMux */ |
17915 | | GRX32, GRX32, simm32, |
17916 | | /* AG_MemFoldPseudo */ |
17917 | | GR64, GR64, ADDR64, disp20imm64, ADDR64, |
17918 | | /* AHIMux */ |
17919 | | GRX32, GRX32, imm32sx16, |
17920 | | /* AHIMuxK */ |
17921 | | GRX32, GRX32, imm32sx16, |
17922 | | /* ALG_MemFoldPseudo */ |
17923 | | GR64, GR64, ADDR64, disp20imm64, ADDR64, |
17924 | | /* AL_MemFoldPseudo */ |
17925 | | GR32, GR32, ADDR64, disp12imm64, ADDR64, |
17926 | | /* ATOMIC_CMP_SWAPW */ |
17927 | | GR32, ADDR64, disp20imm64, GR32, GR32, ADDR32, ADDR32, uimm32, |
17928 | | /* ATOMIC_LOADW_AFI */ |
17929 | | GR32, ADDR64, disp20imm64, simm32, ADDR32, ADDR32, uimm32, |
17930 | | /* ATOMIC_LOADW_AR */ |
17931 | | GR32, ADDR64, disp20imm64, GR32, ADDR32, ADDR32, uimm32, |
17932 | | /* ATOMIC_LOADW_MAX */ |
17933 | | GR32, ADDR64, disp20imm64, GR32, ADDR32, ADDR32, uimm32, |
17934 | | /* ATOMIC_LOADW_MIN */ |
17935 | | GR32, ADDR64, disp20imm64, GR32, ADDR32, ADDR32, uimm32, |
17936 | | /* ATOMIC_LOADW_NILH */ |
17937 | | GR32, ADDR64, disp20imm64, imm32lh16c, ADDR32, ADDR32, uimm32, |
17938 | | /* ATOMIC_LOADW_NILHi */ |
17939 | | GR32, ADDR64, disp20imm64, imm32lh16c, ADDR32, ADDR32, uimm32, |
17940 | | /* ATOMIC_LOADW_NR */ |
17941 | | GR32, ADDR64, disp20imm64, GR32, ADDR32, ADDR32, uimm32, |
17942 | | /* ATOMIC_LOADW_NRi */ |
17943 | | GR32, ADDR64, disp20imm64, GR32, ADDR32, ADDR32, uimm32, |
17944 | | /* ATOMIC_LOADW_OILH */ |
17945 | | GR32, ADDR64, disp20imm64, imm32lh16, ADDR32, ADDR32, uimm32, |
17946 | | /* ATOMIC_LOADW_OR */ |
17947 | | GR32, ADDR64, disp20imm64, GR32, ADDR32, ADDR32, uimm32, |
17948 | | /* ATOMIC_LOADW_SR */ |
17949 | | GR32, ADDR64, disp20imm64, GR32, ADDR32, ADDR32, uimm32, |
17950 | | /* ATOMIC_LOADW_UMAX */ |
17951 | | GR32, ADDR64, disp20imm64, GR32, ADDR32, ADDR32, uimm32, |
17952 | | /* ATOMIC_LOADW_UMIN */ |
17953 | | GR32, ADDR64, disp20imm64, GR32, ADDR32, ADDR32, uimm32, |
17954 | | /* ATOMIC_LOADW_XILF */ |
17955 | | GR32, ADDR64, disp20imm64, uimm32, ADDR32, ADDR32, uimm32, |
17956 | | /* ATOMIC_LOADW_XR */ |
17957 | | GR32, ADDR64, disp20imm64, GR32, ADDR32, ADDR32, uimm32, |
17958 | | /* ATOMIC_SWAPW */ |
17959 | | GR32, ADDR64, disp20imm64, GR32, ADDR32, ADDR32, uimm32, |
17960 | | /* A_MemFoldPseudo */ |
17961 | | GR32, GR32, ADDR64, disp12imm64, ADDR64, |
17962 | | /* CFIMux */ |
17963 | | GRX32, simm32, |
17964 | | /* CGIBCall */ |
17965 | | GR64, imm64sx8, cond4, ADDR64, |
17966 | | /* CGIBReturn */ |
17967 | | GR64, imm64sx8, cond4, |
17968 | | /* CGRBCall */ |
17969 | | GR64, GR64, cond4, ADDR64, |
17970 | | /* CGRBReturn */ |
17971 | | GR64, GR64, cond4, |
17972 | | /* CHIMux */ |
17973 | | GRX32, imm32sx16, |
17974 | | /* CIBCall */ |
17975 | | GR32, imm32sx8, cond4, ADDR64, |
17976 | | /* CIBReturn */ |
17977 | | GR32, imm32sx8, cond4, |
17978 | | /* CLCImm */ |
17979 | | ADDR64, disp12imm64, ADDR64, disp12imm64, imm64, |
17980 | | /* CLCReg */ |
17981 | | ADDR64, disp12imm64, ADDR64, disp12imm64, ADDR64, |
17982 | | /* CLFIMux */ |
17983 | | GRX32, uimm32, |
17984 | | /* CLGIBCall */ |
17985 | | GR64, imm64zx8, cond4, ADDR64, |
17986 | | /* CLGIBReturn */ |
17987 | | GR64, imm64zx8, cond4, |
17988 | | /* CLGRBCall */ |
17989 | | GR64, GR64, cond4, ADDR64, |
17990 | | /* CLGRBReturn */ |
17991 | | GR64, GR64, cond4, |
17992 | | /* CLIBCall */ |
17993 | | GR32, imm32zx8, cond4, ADDR64, |
17994 | | /* CLIBReturn */ |
17995 | | GR32, imm32zx8, cond4, |
17996 | | /* CLMux */ |
17997 | | GRX32, ADDR64, disp20imm64, ADDR64, |
17998 | | /* CLRBCall */ |
17999 | | GR32, GR32, cond4, ADDR64, |
18000 | | /* CLRBReturn */ |
18001 | | GR32, GR32, cond4, |
18002 | | /* CLSTLoop */ |
18003 | | GR64, GR64, GR64, GR32, |
18004 | | /* CMux */ |
18005 | | GRX32, ADDR64, disp20imm64, ADDR64, |
18006 | | /* CRBCall */ |
18007 | | GR32, GR32, cond4, ADDR64, |
18008 | | /* CRBReturn */ |
18009 | | GR32, GR32, cond4, |
18010 | | /* CallBASR */ |
18011 | | ADDR64, |
18012 | | /* CallBASR_STACKEXT */ |
18013 | | ADDR64, |
18014 | | /* CallBASR_XPLINK64 */ |
18015 | | ADDR64, |
18016 | | /* CallBCR */ |
18017 | | cond4, cond4, ADDR64, |
18018 | | /* CallBR */ |
18019 | | ADDR64, |
18020 | | /* CallBRASL */ |
18021 | | pcrel32, |
18022 | | /* CallBRASL_XPLINK64 */ |
18023 | | pcrel32, |
18024 | | /* CallBRCL */ |
18025 | | cond4, cond4, pcrel32, |
18026 | | /* CallJG */ |
18027 | | pcrel32, |
18028 | | /* CondReturn */ |
18029 | | cond4, cond4, |
18030 | | /* CondReturn_XPLINK */ |
18031 | | cond4, cond4, |
18032 | | /* CondStore16 */ |
18033 | | GR32, ADDR64, disp20imm64, ADDR64, imm32zx4, imm32zx4, |
18034 | | /* CondStore16Inv */ |
18035 | | GR32, ADDR64, disp20imm64, ADDR64, imm32zx4, imm32zx4, |
18036 | | /* CondStore16Mux */ |
18037 | | GRX32, ADDR64, disp20imm64, ADDR64, imm32zx4, imm32zx4, |
18038 | | /* CondStore16MuxInv */ |
18039 | | GRX32, ADDR64, disp20imm64, ADDR64, imm32zx4, imm32zx4, |
18040 | | /* CondStore32 */ |
18041 | | GR32, ADDR64, disp20imm64, ADDR64, imm32zx4, imm32zx4, |
18042 | | /* CondStore32Inv */ |
18043 | | GR32, ADDR64, disp20imm64, ADDR64, imm32zx4, imm32zx4, |
18044 | | /* CondStore32Mux */ |
18045 | | GRX32, ADDR64, disp20imm64, ADDR64, imm32zx4, imm32zx4, |
18046 | | /* CondStore32MuxInv */ |
18047 | | GRX32, ADDR64, disp20imm64, ADDR64, imm32zx4, imm32zx4, |
18048 | | /* CondStore64 */ |
18049 | | GR64, ADDR64, disp20imm64, ADDR64, imm32zx4, imm32zx4, |
18050 | | /* CondStore64Inv */ |
18051 | | GR64, ADDR64, disp20imm64, ADDR64, imm32zx4, imm32zx4, |
18052 | | /* CondStore8 */ |
18053 | | GR32, ADDR64, disp20imm64, ADDR64, imm32zx4, imm32zx4, |
18054 | | /* CondStore8Inv */ |
18055 | | GR32, ADDR64, disp20imm64, ADDR64, imm32zx4, imm32zx4, |
18056 | | /* CondStore8Mux */ |
18057 | | GRX32, ADDR64, disp20imm64, ADDR64, imm32zx4, imm32zx4, |
18058 | | /* CondStore8MuxInv */ |
18059 | | GRX32, ADDR64, disp20imm64, ADDR64, imm32zx4, imm32zx4, |
18060 | | /* CondStoreF32 */ |
18061 | | FP32, ADDR64, disp20imm64, ADDR64, imm32zx4, imm32zx4, |
18062 | | /* CondStoreF32Inv */ |
18063 | | FP32, ADDR64, disp20imm64, ADDR64, imm32zx4, imm32zx4, |
18064 | | /* CondStoreF64 */ |
18065 | | FP64, ADDR64, disp20imm64, ADDR64, imm32zx4, imm32zx4, |
18066 | | /* CondStoreF64Inv */ |
18067 | | FP64, ADDR64, disp20imm64, ADDR64, imm32zx4, imm32zx4, |
18068 | | /* CondTrap */ |
18069 | | cond4, cond4, |
18070 | | /* DDB_MemFoldPseudo */ |
18071 | | FP64, FP64, ADDR64, disp12imm64, ADDR64, |
18072 | | /* DEB_MemFoldPseudo */ |
18073 | | FP32, FP32, ADDR64, disp12imm64, ADDR64, |
18074 | | /* EXRL_Pseudo */ |
18075 | | i64imm, ADDR64, ADDR64, disp12imm64, ADDR64, disp12imm64, |
18076 | | /* GOT */ |
18077 | | GR64, |
18078 | | /* IIFMux */ |
18079 | | GRX32, uimm32, |
18080 | | /* IIHF64 */ |
18081 | | GR64, GR64, imm64hf32, |
18082 | | /* IIHH64 */ |
18083 | | GR64, GR64, imm64hh16, |
18084 | | /* IIHL64 */ |
18085 | | GR64, GR64, imm64hl16, |
18086 | | /* IIHMux */ |
18087 | | GRX32, GRX32, imm32lh16, |
18088 | | /* IILF64 */ |
18089 | | GR64, GR64, imm64lf32, |
18090 | | /* IILH64 */ |
18091 | | GR64, GR64, imm64lh16, |
18092 | | /* IILL64 */ |
18093 | | GR64, GR64, imm64ll16, |
18094 | | /* IILMux */ |
18095 | | GRX32, GRX32, imm32ll16, |
18096 | | /* L128 */ |
18097 | | GR128, ADDR64, disp20imm64, ADDR64, |
18098 | | /* LBMux */ |
18099 | | GRX32, ADDR64, disp20imm64, ADDR64, |
18100 | | /* LEFR */ |
18101 | | VR32, GR32, |
18102 | | /* LFER */ |
18103 | | GR64, VR32, |
18104 | | /* LHIMux */ |
18105 | | GRX32, imm32sx16, |
18106 | | /* LHMux */ |
18107 | | GRX32, ADDR64, disp20imm64, ADDR64, |
18108 | | /* LLCMux */ |
18109 | | GRX32, ADDR64, disp20imm64, ADDR64, |
18110 | | /* LLCRMux */ |
18111 | | GRX32, GRX32, |
18112 | | /* LLHMux */ |
18113 | | GRX32, ADDR64, disp20imm64, ADDR64, |
18114 | | /* LLHRMux */ |
18115 | | GRX32, GRX32, |
18116 | | /* LMux */ |
18117 | | GRX32, ADDR64, disp20imm64, ADDR64, |
18118 | | /* LOCG_MemFoldPseudo */ |
18119 | | GR64, GR64, ADDR64, disp20imm64, cond4, cond4, |
18120 | | /* LOCHIMux */ |
18121 | | GRX32, GRX32, imm32sx16, cond4, cond4, |
18122 | | /* LOCMux */ |
18123 | | GRX32, GRX32, ADDR64, disp20imm64, cond4, cond4, |
18124 | | /* LOCMux_MemFoldPseudo */ |
18125 | | GRX32, GRX32, ADDR64, disp20imm64, cond4, cond4, |
18126 | | /* LOCRMux */ |
18127 | | GRX32, GRX32, GRX32, cond4, cond4, |
18128 | | /* LTDBRCompare_Pseudo */ |
18129 | | FP64, |
18130 | | /* LTEBRCompare_Pseudo */ |
18131 | | FP32, |
18132 | | /* LTXBRCompare_Pseudo */ |
18133 | | FP128, |
18134 | | /* LX */ |
18135 | | FP128, ADDR64, disp20imm64, ADDR64, |
18136 | | /* MADB_MemFoldPseudo */ |
18137 | | FP64, FP64, FP64, ADDR64, disp12imm64, ADDR64, |
18138 | | /* MAEB_MemFoldPseudo */ |
18139 | | FP32, FP32, FP32, ADDR64, disp12imm64, ADDR64, |
18140 | | /* MDB_MemFoldPseudo */ |
18141 | | FP64, FP64, ADDR64, disp12imm64, ADDR64, |
18142 | | /* MEEB_MemFoldPseudo */ |
18143 | | FP32, FP32, ADDR64, disp12imm64, ADDR64, |
18144 | | /* MSC_MemFoldPseudo */ |
18145 | | GR32, GR32, ADDR64, disp20imm64, ADDR64, |
18146 | | /* MSDB_MemFoldPseudo */ |
18147 | | FP64, FP64, FP64, ADDR64, disp12imm64, ADDR64, |
18148 | | /* MSEB_MemFoldPseudo */ |
18149 | | FP32, FP32, FP32, ADDR64, disp12imm64, ADDR64, |
18150 | | /* MSGC_MemFoldPseudo */ |
18151 | | GR64, GR64, ADDR64, disp20imm64, ADDR64, |
18152 | | /* MVCImm */ |
18153 | | ADDR64, disp12imm64, ADDR64, disp12imm64, imm64, |
18154 | | /* MVCReg */ |
18155 | | ADDR64, disp12imm64, ADDR64, disp12imm64, ADDR64, |
18156 | | /* MVSTLoop */ |
18157 | | GR64, GR64, GR64, GR32, |
18158 | | /* MemsetImmImm */ |
18159 | | ADDR64, disp12imm64, imm64, imm32zx8trunc, |
18160 | | /* MemsetImmReg */ |
18161 | | ADDR64, disp12imm64, imm64, GR32, |
18162 | | /* MemsetRegImm */ |
18163 | | ADDR64, disp12imm64, ADDR64, imm32zx8trunc, |
18164 | | /* MemsetRegReg */ |
18165 | | ADDR64, disp12imm64, ADDR64, GR32, |
18166 | | /* NCImm */ |
18167 | | ADDR64, disp12imm64, ADDR64, disp12imm64, imm64, |
18168 | | /* NCReg */ |
18169 | | ADDR64, disp12imm64, ADDR64, disp12imm64, ADDR64, |
18170 | | /* NG_MemFoldPseudo */ |
18171 | | GR64, GR64, ADDR64, disp20imm64, ADDR64, |
18172 | | /* NIFMux */ |
18173 | | GRX32, GRX32, uimm32, |
18174 | | /* NIHF64 */ |
18175 | | GR64, GR64, imm64hf32c, |
18176 | | /* NIHH64 */ |
18177 | | GR64, GR64, imm64hh16c, |
18178 | | /* NIHL64 */ |
18179 | | GR64, GR64, imm64hl16c, |
18180 | | /* NIHMux */ |
18181 | | GRX32, GRX32, imm32lh16c, |
18182 | | /* NILF64 */ |
18183 | | GR64, GR64, imm64lf32c, |
18184 | | /* NILH64 */ |
18185 | | GR64, GR64, imm64lh16c, |
18186 | | /* NILL64 */ |
18187 | | GR64, GR64, imm64ll16c, |
18188 | | /* NILMux */ |
18189 | | GRX32, GRX32, imm32ll16c, |
18190 | | /* N_MemFoldPseudo */ |
18191 | | GR32, GR32, ADDR64, disp12imm64, ADDR64, |
18192 | | /* OCImm */ |
18193 | | ADDR64, disp12imm64, ADDR64, disp12imm64, imm64, |
18194 | | /* OCReg */ |
18195 | | ADDR64, disp12imm64, ADDR64, disp12imm64, ADDR64, |
18196 | | /* OG_MemFoldPseudo */ |
18197 | | GR64, GR64, ADDR64, disp20imm64, ADDR64, |
18198 | | /* OIFMux */ |
18199 | | GRX32, GRX32, uimm32, |
18200 | | /* OIHF64 */ |
18201 | | GR64, GR64, imm64hf32, |
18202 | | /* OIHH64 */ |
18203 | | GR64, GR64, imm64hh16, |
18204 | | /* OIHL64 */ |
18205 | | GR64, GR64, imm64hl16, |
18206 | | /* OIHMux */ |
18207 | | GRX32, GRX32, imm32lh16, |
18208 | | /* OILF64 */ |
18209 | | GR64, GR64, imm64lf32, |
18210 | | /* OILH64 */ |
18211 | | GR64, GR64, imm64lh16, |
18212 | | /* OILL64 */ |
18213 | | GR64, GR64, imm64ll16, |
18214 | | /* OILMux */ |
18215 | | GRX32, GRX32, imm32ll16, |
18216 | | /* O_MemFoldPseudo */ |
18217 | | GR32, GR32, ADDR64, disp12imm64, ADDR64, |
18218 | | /* PAIR128 */ |
18219 | | GR128, GR64, GR64, |
18220 | | /* PROBED_ALLOCA */ |
18221 | | GR64, GR64, GR64, |
18222 | | /* PROBED_STACKALLOC */ |
18223 | | i64imm, |
18224 | | /* RISBHH */ |
18225 | | GRH32, GRH32, GRH32, imm32zx8, imm32zx8, imm32zx8, |
18226 | | /* RISBHL */ |
18227 | | GRH32, GRH32, GR32, imm32zx8, imm32zx8, imm32zx8, |
18228 | | /* RISBLH */ |
18229 | | GR32, GR32, GRH32, imm32zx8, imm32zx8, imm32zx8, |
18230 | | /* RISBLL */ |
18231 | | GR32, GR32, GR32, imm32zx8, imm32zx8, imm32zx8, |
18232 | | /* RISBMux */ |
18233 | | GRX32, GRX32, GRX32, imm32zx8, imm32zx8, imm32zx8, |
18234 | | /* Return */ |
18235 | | /* Return_XPLINK */ |
18236 | | /* SCmp128Hi */ |
18237 | | VR128, VR128, |
18238 | | /* SDB_MemFoldPseudo */ |
18239 | | FP64, FP64, ADDR64, disp12imm64, ADDR64, |
18240 | | /* SEB_MemFoldPseudo */ |
18241 | | FP32, FP32, ADDR64, disp12imm64, ADDR64, |
18242 | | /* SELRMux */ |
18243 | | GRX32, GRX32, GRX32, cond4, cond4, |
18244 | | /* SG_MemFoldPseudo */ |
18245 | | GR64, GR64, ADDR64, disp20imm64, ADDR64, |
18246 | | /* SLG_MemFoldPseudo */ |
18247 | | GR64, GR64, ADDR64, disp20imm64, ADDR64, |
18248 | | /* SL_MemFoldPseudo */ |
18249 | | GR32, GR32, ADDR64, disp12imm64, ADDR64, |
18250 | | /* SRSTLoop */ |
18251 | | GR64, GR64, GR64, GR32, |
18252 | | /* ST128 */ |
18253 | | GR128, ADDR64, disp20imm64, ADDR64, |
18254 | | /* STCMux */ |
18255 | | GRX32, ADDR64, disp20imm64, ADDR64, |
18256 | | /* STHMux */ |
18257 | | GRX32, ADDR64, disp20imm64, ADDR64, |
18258 | | /* STMux */ |
18259 | | GRX32, ADDR64, disp20imm64, ADDR64, |
18260 | | /* STOCMux */ |
18261 | | GRX32, ADDR64, disp20imm64, cond4, cond4, |
18262 | | /* STX */ |
18263 | | FP128, ADDR64, disp20imm64, ADDR64, |
18264 | | /* S_MemFoldPseudo */ |
18265 | | GR32, GR32, ADDR64, disp12imm64, ADDR64, |
18266 | | /* Select128 */ |
18267 | | VR128, VR128, VR128, imm32zx4, imm32zx4, |
18268 | | /* Select32 */ |
18269 | | GR32, GR32, GR32, imm32zx4, imm32zx4, |
18270 | | /* Select64 */ |
18271 | | GR64, GR64, GR64, imm32zx4, imm32zx4, |
18272 | | /* SelectF128 */ |
18273 | | FP128, FP128, FP128, imm32zx4, imm32zx4, |
18274 | | /* SelectF32 */ |
18275 | | FP32, FP32, FP32, imm32zx4, imm32zx4, |
18276 | | /* SelectF64 */ |
18277 | | FP64, FP64, FP64, imm32zx4, imm32zx4, |
18278 | | /* SelectVR128 */ |
18279 | | VR128, VR128, VR128, imm32zx4, imm32zx4, |
18280 | | /* SelectVR32 */ |
18281 | | VR32, VR32, VR32, imm32zx4, imm32zx4, |
18282 | | /* SelectVR64 */ |
18283 | | VR64, VR64, VR64, imm32zx4, imm32zx4, |
18284 | | /* Serialize */ |
18285 | | /* TBEGIN_nofloat */ |
18286 | | ADDR64, disp12imm64, imm32zx16, |
18287 | | /* TLS_GDCALL */ |
18288 | | tlssym, |
18289 | | /* TLS_LDCALL */ |
18290 | | tlssym, |
18291 | | /* TMHH64 */ |
18292 | | GR64, imm64hh16, |
18293 | | /* TMHL64 */ |
18294 | | GR64, imm64hl16, |
18295 | | /* TMHMux */ |
18296 | | GRX32, imm32lh16, |
18297 | | /* TMLH64 */ |
18298 | | GR64, imm64lh16, |
18299 | | /* TMLL64 */ |
18300 | | GR64, imm64ll16, |
18301 | | /* TMLMux */ |
18302 | | GRX32, imm32ll16, |
18303 | | /* Trap */ |
18304 | | /* UCmp128Hi */ |
18305 | | VR128, VR128, |
18306 | | /* VL32 */ |
18307 | | VR32, ADDR64, disp12imm64, ADDR64, |
18308 | | /* VL64 */ |
18309 | | VR64, ADDR64, disp12imm64, ADDR64, |
18310 | | /* VLR32 */ |
18311 | | VR32, VR32, |
18312 | | /* VLR64 */ |
18313 | | VR64, VR64, |
18314 | | /* VLVGP32 */ |
18315 | | VR128, GR32, GR32, |
18316 | | /* VST32 */ |
18317 | | VR32, ADDR64, disp12imm64, ADDR64, |
18318 | | /* VST64 */ |
18319 | | VR64, ADDR64, disp12imm64, ADDR64, |
18320 | | /* XCImm */ |
18321 | | ADDR64, disp12imm64, ADDR64, disp12imm64, imm64, |
18322 | | /* XCReg */ |
18323 | | ADDR64, disp12imm64, ADDR64, disp12imm64, ADDR64, |
18324 | | /* XG_MemFoldPseudo */ |
18325 | | GR64, GR64, ADDR64, disp20imm64, ADDR64, |
18326 | | /* XIFMux */ |
18327 | | GRX32, GRX32, uimm32, |
18328 | | /* XIHF64 */ |
18329 | | GR64, GR64, imm64hf32, |
18330 | | /* XILF64 */ |
18331 | | GR64, GR64, imm64lf32, |
18332 | | /* XPLINK_STACKALLOC */ |
18333 | | /* X_MemFoldPseudo */ |
18334 | | GR32, GR32, ADDR64, disp12imm64, ADDR64, |
18335 | | /* ZEXT128 */ |
18336 | | GR128, GR64, |
18337 | | /* A */ |
18338 | | GR32, GR32, ADDR64, disp12imm64, ADDR64, |
18339 | | /* AD */ |
18340 | | FP64, FP64, ADDR64, disp12imm64, ADDR64, |
18341 | | /* ADB */ |
18342 | | FP64, FP64, ADDR64, disp12imm64, ADDR64, |
18343 | | /* ADBR */ |
18344 | | FP64, FP64, FP64, |
18345 | | /* ADR */ |
18346 | | FP64, FP64, FP64, |
18347 | | /* ADTR */ |
18348 | | FP64, FP64, FP64, |
18349 | | /* ADTRA */ |
18350 | | FP64, FP64, FP64, imm32zx4, |
18351 | | /* AE */ |
18352 | | FP32, FP32, ADDR64, disp12imm64, ADDR64, |
18353 | | /* AEB */ |
18354 | | FP32, FP32, ADDR64, disp12imm64, ADDR64, |
18355 | | /* AEBR */ |
18356 | | FP32, FP32, FP32, |
18357 | | /* AER */ |
18358 | | FP32, FP32, FP32, |
18359 | | /* AFI */ |
18360 | | GR32, GR32, simm32, |
18361 | | /* AG */ |
18362 | | GR64, GR64, ADDR64, disp20imm64, ADDR64, |
18363 | | /* AGF */ |
18364 | | GR64, GR64, ADDR64, disp20imm64, ADDR64, |
18365 | | /* AGFI */ |
18366 | | GR64, GR64, imm64sx32, |
18367 | | /* AGFR */ |
18368 | | GR64, GR64, GR32, |
18369 | | /* AGH */ |
18370 | | GR64, GR64, ADDR64, disp20imm64, ADDR64, |
18371 | | /* AGHI */ |
18372 | | GR64, GR64, imm64sx16, |
18373 | | /* AGHIK */ |
18374 | | GR64, GR64, imm64sx16, |
18375 | | /* AGR */ |
18376 | | GR64, GR64, GR64, |
18377 | | /* AGRK */ |
18378 | | GR64, GR64, GR64, |
18379 | | /* AGSI */ |
18380 | | ADDR64, disp20imm64, imm64sx8, |
18381 | | /* AH */ |
18382 | | GR32, GR32, ADDR64, disp12imm64, ADDR64, |
18383 | | /* AHHHR */ |
18384 | | GRH32, GRH32, GRH32, |
18385 | | /* AHHLR */ |
18386 | | GRH32, GRH32, GR32, |
18387 | | /* AHI */ |
18388 | | GR32, GR32, imm32sx16, |
18389 | | /* AHIK */ |
18390 | | GR32, GR32, imm32sx16, |
18391 | | /* AHY */ |
18392 | | GR32, GR32, ADDR64, disp20imm64, ADDR64, |
18393 | | /* AIH */ |
18394 | | GRH32, GRH32, simm32, |
18395 | | /* AL */ |
18396 | | GR32, GR32, ADDR64, disp12imm64, ADDR64, |
18397 | | /* ALC */ |
18398 | | GR32, GR32, ADDR64, disp20imm64, ADDR64, |
18399 | | /* ALCG */ |
18400 | | GR64, GR64, ADDR64, disp20imm64, ADDR64, |
18401 | | /* ALCGR */ |
18402 | | GR64, GR64, GR64, |
18403 | | /* ALCR */ |
18404 | | GR32, GR32, GR32, |
18405 | | /* ALFI */ |
18406 | | GR32, GR32, uimm32, |
18407 | | /* ALG */ |
18408 | | GR64, GR64, ADDR64, disp20imm64, ADDR64, |
18409 | | /* ALGF */ |
18410 | | GR64, GR64, ADDR64, disp20imm64, ADDR64, |
18411 | | /* ALGFI */ |
18412 | | GR64, GR64, imm64zx32, |
18413 | | /* ALGFR */ |
18414 | | GR64, GR64, GR32, |
18415 | | /* ALGHSIK */ |
18416 | | GR64, GR64, imm64sx16, |
18417 | | /* ALGR */ |
18418 | | GR64, GR64, GR64, |
18419 | | /* ALGRK */ |
18420 | | GR64, GR64, GR64, |
18421 | | /* ALGSI */ |
18422 | | ADDR64, disp20imm64, imm64sx8, |
18423 | | /* ALHHHR */ |
18424 | | GRH32, GRH32, GRH32, |
18425 | | /* ALHHLR */ |
18426 | | GRH32, GRH32, GR32, |
18427 | | /* ALHSIK */ |
18428 | | GR32, GR32, imm32sx16, |
18429 | | /* ALR */ |
18430 | | GR32, GR32, GR32, |
18431 | | /* ALRK */ |
18432 | | GR32, GR32, GR32, |
18433 | | /* ALSI */ |
18434 | | ADDR64, disp20imm64, imm32sx8, |
18435 | | /* ALSIH */ |
18436 | | GRH32, GRH32, simm32, |
18437 | | /* ALSIHN */ |
18438 | | GRH32, GRH32, simm32, |
18439 | | /* ALY */ |
18440 | | GR32, GR32, ADDR64, disp20imm64, ADDR64, |
18441 | | /* AP */ |
18442 | | ADDR64, disp12imm64, len4imm64, ADDR64, disp12imm64, len4imm64, |
18443 | | /* AR */ |
18444 | | GR32, GR32, GR32, |
18445 | | /* ARK */ |
18446 | | GR32, GR32, GR32, |
18447 | | /* ASI */ |
18448 | | ADDR64, disp20imm64, imm32sx8, |
18449 | | /* AU */ |
18450 | | FP32, FP32, ADDR64, disp12imm64, ADDR64, |
18451 | | /* AUR */ |
18452 | | FP32, FP32, FP32, |
18453 | | /* AW */ |
18454 | | FP64, FP64, ADDR64, disp12imm64, ADDR64, |
18455 | | /* AWR */ |
18456 | | FP64, FP64, FP64, |
18457 | | /* AXBR */ |
18458 | | FP128, FP128, FP128, |
18459 | | /* AXR */ |
18460 | | FP128, FP128, FP128, |
18461 | | /* AXTR */ |
18462 | | FP128, FP128, FP128, |
18463 | | /* AXTRA */ |
18464 | | FP128, FP128, FP128, imm32zx4, |
18465 | | /* AY */ |
18466 | | GR32, GR32, ADDR64, disp20imm64, ADDR64, |
18467 | | /* B */ |
18468 | | ADDR64, disp12imm64, ADDR64, |
18469 | | /* BAKR */ |
18470 | | GR64, GR64, |
18471 | | /* BAL */ |
18472 | | GR64, ADDR64, disp12imm64, ADDR64, |
18473 | | /* BALR */ |
18474 | | GR64, ADDR64, |
18475 | | /* BAS */ |
18476 | | GR64, ADDR64, disp12imm64, ADDR64, |
18477 | | /* BASR */ |
18478 | | GR64, ADDR64, |
18479 | | /* BASSM */ |
18480 | | GR64, ADDR64, |
18481 | | /* BAsmE */ |
18482 | | ADDR64, disp12imm64, ADDR64, |
18483 | | /* BAsmH */ |
18484 | | ADDR64, disp12imm64, ADDR64, |
18485 | | /* BAsmHE */ |
18486 | | ADDR64, disp12imm64, ADDR64, |
18487 | | /* BAsmL */ |
18488 | | ADDR64, disp12imm64, ADDR64, |
18489 | | /* BAsmLE */ |
18490 | | ADDR64, disp12imm64, ADDR64, |
18491 | | /* BAsmLH */ |
18492 | | ADDR64, disp12imm64, ADDR64, |
18493 | | /* BAsmM */ |
18494 | | ADDR64, disp12imm64, ADDR64, |
18495 | | /* BAsmNE */ |
18496 | | ADDR64, disp12imm64, ADDR64, |
18497 | | /* BAsmNH */ |
18498 | | ADDR64, disp12imm64, ADDR64, |
18499 | | /* BAsmNHE */ |
18500 | | ADDR64, disp12imm64, ADDR64, |
18501 | | /* BAsmNL */ |
18502 | | ADDR64, disp12imm64, ADDR64, |
18503 | | /* BAsmNLE */ |
18504 | | ADDR64, disp12imm64, ADDR64, |
18505 | | /* BAsmNLH */ |
18506 | | ADDR64, disp12imm64, ADDR64, |
18507 | | /* BAsmNM */ |
18508 | | ADDR64, disp12imm64, ADDR64, |
18509 | | /* BAsmNO */ |
18510 | | ADDR64, disp12imm64, ADDR64, |
18511 | | /* BAsmNP */ |
18512 | | ADDR64, disp12imm64, ADDR64, |
18513 | | /* BAsmNZ */ |
18514 | | ADDR64, disp12imm64, ADDR64, |
18515 | | /* BAsmO */ |
18516 | | ADDR64, disp12imm64, ADDR64, |
18517 | | /* BAsmP */ |
18518 | | ADDR64, disp12imm64, ADDR64, |
18519 | | /* BAsmZ */ |
18520 | | ADDR64, disp12imm64, ADDR64, |
18521 | | /* BC */ |
18522 | | cond4, cond4, ADDR64, disp12imm64, ADDR64, |
18523 | | /* BCAsm */ |
18524 | | imm32zx4, ADDR64, disp12imm64, ADDR64, |
18525 | | /* BCR */ |
18526 | | cond4, cond4, GR64, |
18527 | | /* BCRAsm */ |
18528 | | imm32zx4, GR64, |
18529 | | /* BCT */ |
18530 | | GR32, GR32, ADDR64, disp12imm64, ADDR64, |
18531 | | /* BCTG */ |
18532 | | GR64, GR64, ADDR64, disp20imm64, ADDR64, |
18533 | | /* BCTGR */ |
18534 | | GR64, GR64, GR64, |
18535 | | /* BCTR */ |
18536 | | GR32, GR32, GR64, |
18537 | | /* BI */ |
18538 | | ADDR64, disp20imm64, ADDR64, |
18539 | | /* BIAsmE */ |
18540 | | ADDR64, disp20imm64, ADDR64, |
18541 | | /* BIAsmH */ |
18542 | | ADDR64, disp20imm64, ADDR64, |
18543 | | /* BIAsmHE */ |
18544 | | ADDR64, disp20imm64, ADDR64, |
18545 | | /* BIAsmL */ |
18546 | | ADDR64, disp20imm64, ADDR64, |
18547 | | /* BIAsmLE */ |
18548 | | ADDR64, disp20imm64, ADDR64, |
18549 | | /* BIAsmLH */ |
18550 | | ADDR64, disp20imm64, ADDR64, |
18551 | | /* BIAsmM */ |
18552 | | ADDR64, disp20imm64, ADDR64, |
18553 | | /* BIAsmNE */ |
18554 | | ADDR64, disp20imm64, ADDR64, |
18555 | | /* BIAsmNH */ |
18556 | | ADDR64, disp20imm64, ADDR64, |
18557 | | /* BIAsmNHE */ |
18558 | | ADDR64, disp20imm64, ADDR64, |
18559 | | /* BIAsmNL */ |
18560 | | ADDR64, disp20imm64, ADDR64, |
18561 | | /* BIAsmNLE */ |
18562 | | ADDR64, disp20imm64, ADDR64, |
18563 | | /* BIAsmNLH */ |
18564 | | ADDR64, disp20imm64, ADDR64, |
18565 | | /* BIAsmNM */ |
18566 | | ADDR64, disp20imm64, ADDR64, |
18567 | | /* BIAsmNO */ |
18568 | | ADDR64, disp20imm64, ADDR64, |
18569 | | /* BIAsmNP */ |
18570 | | ADDR64, disp20imm64, ADDR64, |
18571 | | /* BIAsmNZ */ |
18572 | | ADDR64, disp20imm64, ADDR64, |
18573 | | /* BIAsmO */ |
18574 | | ADDR64, disp20imm64, ADDR64, |
18575 | | /* BIAsmP */ |
18576 | | ADDR64, disp20imm64, ADDR64, |
18577 | | /* BIAsmZ */ |
18578 | | ADDR64, disp20imm64, ADDR64, |
18579 | | /* BIC */ |
18580 | | cond4, cond4, ADDR64, disp20imm64, ADDR64, |
18581 | | /* BICAsm */ |
18582 | | imm32zx4, ADDR64, disp20imm64, ADDR64, |
18583 | | /* BPP */ |
18584 | | imm32zx4, brtarget16bpp, ADDR64, disp12imm64, |
18585 | | /* BPRP */ |
18586 | | imm32zx4, brtarget12bpp, brtarget24bpp, |
18587 | | /* BR */ |
18588 | | ADDR64, |
18589 | | /* BRAS */ |
18590 | | GR64, brtarget16, tlssym, |
18591 | | /* BRASL */ |
18592 | | GR64, brtarget32, tlssym, |
18593 | | /* BRAsmE */ |
18594 | | ADDR64, |
18595 | | /* BRAsmH */ |
18596 | | ADDR64, |
18597 | | /* BRAsmHE */ |
18598 | | ADDR64, |
18599 | | /* BRAsmL */ |
18600 | | ADDR64, |
18601 | | /* BRAsmLE */ |
18602 | | ADDR64, |
18603 | | /* BRAsmLH */ |
18604 | | ADDR64, |
18605 | | /* BRAsmM */ |
18606 | | ADDR64, |
18607 | | /* BRAsmNE */ |
18608 | | ADDR64, |
18609 | | /* BRAsmNH */ |
18610 | | ADDR64, |
18611 | | /* BRAsmNHE */ |
18612 | | ADDR64, |
18613 | | /* BRAsmNL */ |
18614 | | ADDR64, |
18615 | | /* BRAsmNLE */ |
18616 | | ADDR64, |
18617 | | /* BRAsmNLH */ |
18618 | | ADDR64, |
18619 | | /* BRAsmNM */ |
18620 | | ADDR64, |
18621 | | /* BRAsmNO */ |
18622 | | ADDR64, |
18623 | | /* BRAsmNP */ |
18624 | | ADDR64, |
18625 | | /* BRAsmNZ */ |
18626 | | ADDR64, |
18627 | | /* BRAsmO */ |
18628 | | ADDR64, |
18629 | | /* BRAsmP */ |
18630 | | ADDR64, |
18631 | | /* BRAsmZ */ |
18632 | | ADDR64, |
18633 | | /* BRC */ |
18634 | | cond4, cond4, brtarget16, |
18635 | | /* BRCAsm */ |
18636 | | imm32zx4, brtarget16, |
18637 | | /* BRCL */ |
18638 | | cond4, cond4, brtarget32, |
18639 | | /* BRCLAsm */ |
18640 | | imm32zx4, brtarget32, |
18641 | | /* BRCT */ |
18642 | | GR32, GR32, brtarget16, |
18643 | | /* BRCTG */ |
18644 | | GR64, GR64, brtarget16, |
18645 | | /* BRCTH */ |
18646 | | GRH32, GRH32, brtarget32, |
18647 | | /* BRXH */ |
18648 | | GR32, GR32, GR32, brtarget16, |
18649 | | /* BRXHG */ |
18650 | | GR64, GR64, GR64, brtarget16, |
18651 | | /* BRXLE */ |
18652 | | GR32, GR32, GR32, brtarget16, |
18653 | | /* BRXLG */ |
18654 | | GR64, GR64, GR64, brtarget16, |
18655 | | /* BSA */ |
18656 | | GR64, GR64, |
18657 | | /* BSG */ |
18658 | | GR64, GR64, |
18659 | | /* BSM */ |
18660 | | GR64, ADDR64, |
18661 | | /* BXH */ |
18662 | | GR32, GR32, GR32, ADDR64, disp12imm64, |
18663 | | /* BXHG */ |
18664 | | GR64, GR64, GR64, ADDR64, disp20imm64, |
18665 | | /* BXLE */ |
18666 | | GR32, GR32, GR32, ADDR64, disp12imm64, |
18667 | | /* BXLEG */ |
18668 | | GR64, GR64, GR64, ADDR64, disp20imm64, |
18669 | | /* C */ |
18670 | | GR32, ADDR64, disp12imm64, ADDR64, |
18671 | | /* CD */ |
18672 | | FP64, ADDR64, disp12imm64, ADDR64, |
18673 | | /* CDB */ |
18674 | | FP64, ADDR64, disp12imm64, ADDR64, |
18675 | | /* CDBR */ |
18676 | | FP64, FP64, |
18677 | | /* CDFBR */ |
18678 | | FP64, GR32, |
18679 | | /* CDFBRA */ |
18680 | | FP64, imm32zx4, GR32, imm32zx4, |
18681 | | /* CDFR */ |
18682 | | FP64, GR32, |
18683 | | /* CDFTR */ |
18684 | | FP64, imm32zx4, GR32, imm32zx4, |
18685 | | /* CDGBR */ |
18686 | | FP64, GR64, |
18687 | | /* CDGBRA */ |
18688 | | FP64, imm32zx4, GR64, imm32zx4, |
18689 | | /* CDGR */ |
18690 | | FP64, GR64, |
18691 | | /* CDGTR */ |
18692 | | FP64, GR64, |
18693 | | /* CDGTRA */ |
18694 | | FP64, imm32zx4, GR64, imm32zx4, |
18695 | | /* CDLFBR */ |
18696 | | FP64, imm32zx4, GR32, imm32zx4, |
18697 | | /* CDLFTR */ |
18698 | | FP64, imm32zx4, GR32, imm32zx4, |
18699 | | /* CDLGBR */ |
18700 | | FP64, imm32zx4, GR64, imm32zx4, |
18701 | | /* CDLGTR */ |
18702 | | FP64, imm32zx4, GR64, imm32zx4, |
18703 | | /* CDPT */ |
18704 | | FP64, ADDR64, disp12imm64, len8imm64, imm32zx4, |
18705 | | /* CDR */ |
18706 | | FP64, FP64, |
18707 | | /* CDS */ |
18708 | | GR128, GR128, GR128, ADDR64, disp12imm64, |
18709 | | /* CDSG */ |
18710 | | GR128, GR128, GR128, ADDR64, disp20imm64, |
18711 | | /* CDSTR */ |
18712 | | FP64, GR64, |
18713 | | /* CDSY */ |
18714 | | GR128, GR128, GR128, ADDR64, disp20imm64, |
18715 | | /* CDTR */ |
18716 | | FP64, FP64, |
18717 | | /* CDUTR */ |
18718 | | FP64, GR64, |
18719 | | /* CDZT */ |
18720 | | FP64, ADDR64, disp12imm64, len8imm64, imm32zx4, |
18721 | | /* CE */ |
18722 | | FP32, ADDR64, disp12imm64, ADDR64, |
18723 | | /* CEB */ |
18724 | | FP32, ADDR64, disp12imm64, ADDR64, |
18725 | | /* CEBR */ |
18726 | | FP32, FP32, |
18727 | | /* CEDTR */ |
18728 | | FP64, FP64, |
18729 | | /* CEFBR */ |
18730 | | FP32, GR32, |
18731 | | /* CEFBRA */ |
18732 | | FP32, imm32zx4, GR32, imm32zx4, |
18733 | | /* CEFR */ |
18734 | | FP32, GR32, |
18735 | | /* CEGBR */ |
18736 | | FP32, GR64, |
18737 | | /* CEGBRA */ |
18738 | | FP32, imm32zx4, GR64, imm32zx4, |
18739 | | /* CEGR */ |
18740 | | FP32, GR64, |
18741 | | /* CELFBR */ |
18742 | | FP32, imm32zx4, GR32, imm32zx4, |
18743 | | /* CELGBR */ |
18744 | | FP32, imm32zx4, GR64, imm32zx4, |
18745 | | /* CER */ |
18746 | | FP32, FP32, |
18747 | | /* CEXTR */ |
18748 | | FP128, FP128, |
18749 | | /* CFC */ |
18750 | | ADDR64, disp12imm64, |
18751 | | /* CFDBR */ |
18752 | | GR32, imm32zx4, FP64, |
18753 | | /* CFDBRA */ |
18754 | | GR32, imm32zx4, FP64, imm32zx4, |
18755 | | /* CFDR */ |
18756 | | GR32, imm32zx4, FP64, |
18757 | | /* CFDTR */ |
18758 | | GR32, imm32zx4, FP64, imm32zx4, |
18759 | | /* CFEBR */ |
18760 | | GR32, imm32zx4, FP32, |
18761 | | /* CFEBRA */ |
18762 | | GR32, imm32zx4, FP32, imm32zx4, |
18763 | | /* CFER */ |
18764 | | GR32, imm32zx4, FP32, |
18765 | | /* CFI */ |
18766 | | GR32, simm32, |
18767 | | /* CFXBR */ |
18768 | | GR32, imm32zx4, FP128, |
18769 | | /* CFXBRA */ |
18770 | | GR32, imm32zx4, FP128, imm32zx4, |
18771 | | /* CFXR */ |
18772 | | GR32, imm32zx4, FP128, |
18773 | | /* CFXTR */ |
18774 | | GR32, imm32zx4, FP128, imm32zx4, |
18775 | | /* CG */ |
18776 | | GR64, ADDR64, disp20imm64, ADDR64, |
18777 | | /* CGDBR */ |
18778 | | GR64, imm32zx4, FP64, |
18779 | | /* CGDBRA */ |
18780 | | GR64, imm32zx4, FP64, imm32zx4, |
18781 | | /* CGDR */ |
18782 | | GR64, imm32zx4, FP64, |
18783 | | /* CGDTR */ |
18784 | | GR64, imm32zx4, FP64, |
18785 | | /* CGDTRA */ |
18786 | | GR64, imm32zx4, FP64, imm32zx4, |
18787 | | /* CGEBR */ |
18788 | | GR64, imm32zx4, FP32, |
18789 | | /* CGEBRA */ |
18790 | | GR64, imm32zx4, FP32, imm32zx4, |
18791 | | /* CGER */ |
18792 | | GR64, imm32zx4, FP32, |
18793 | | /* CGF */ |
18794 | | GR64, ADDR64, disp20imm64, ADDR64, |
18795 | | /* CGFI */ |
18796 | | GR64, imm64sx32, |
18797 | | /* CGFR */ |
18798 | | GR64, GR32, |
18799 | | /* CGFRL */ |
18800 | | GR64, pcrel32, |
18801 | | /* CGH */ |
18802 | | GR64, ADDR64, disp20imm64, ADDR64, |
18803 | | /* CGHI */ |
18804 | | GR64, imm64sx16, |
18805 | | /* CGHRL */ |
18806 | | GR64, pcrel32, |
18807 | | /* CGHSI */ |
18808 | | ADDR64, disp12imm64, imm64sx16, |
18809 | | /* CGIB */ |
18810 | | GR64, imm64sx8, cond4, ADDR64, disp12imm64, |
18811 | | /* CGIBAsm */ |
18812 | | GR64, imm64sx8, imm32zx4, ADDR64, disp12imm64, |
18813 | | /* CGIBAsmE */ |
18814 | | GR64, imm64sx8, ADDR64, disp12imm64, |
18815 | | /* CGIBAsmH */ |
18816 | | GR64, imm64sx8, ADDR64, disp12imm64, |
18817 | | /* CGIBAsmHE */ |
18818 | | GR64, imm64sx8, ADDR64, disp12imm64, |
18819 | | /* CGIBAsmL */ |
18820 | | GR64, imm64sx8, ADDR64, disp12imm64, |
18821 | | /* CGIBAsmLE */ |
18822 | | GR64, imm64sx8, ADDR64, disp12imm64, |
18823 | | /* CGIBAsmLH */ |
18824 | | GR64, imm64sx8, ADDR64, disp12imm64, |
18825 | | /* CGIBAsmNE */ |
18826 | | GR64, imm64sx8, ADDR64, disp12imm64, |
18827 | | /* CGIBAsmNH */ |
18828 | | GR64, imm64sx8, ADDR64, disp12imm64, |
18829 | | /* CGIBAsmNHE */ |
18830 | | GR64, imm64sx8, ADDR64, disp12imm64, |
18831 | | /* CGIBAsmNL */ |
18832 | | GR64, imm64sx8, ADDR64, disp12imm64, |
18833 | | /* CGIBAsmNLE */ |
18834 | | GR64, imm64sx8, ADDR64, disp12imm64, |
18835 | | /* CGIBAsmNLH */ |
18836 | | GR64, imm64sx8, ADDR64, disp12imm64, |
18837 | | /* CGIJ */ |
18838 | | GR64, imm64sx8, cond4, brtarget16, |
18839 | | /* CGIJAsm */ |
18840 | | GR64, imm64sx8, imm32zx4, brtarget16, |
18841 | | /* CGIJAsmE */ |
18842 | | GR64, imm64sx8, brtarget16, |
18843 | | /* CGIJAsmH */ |
18844 | | GR64, imm64sx8, brtarget16, |
18845 | | /* CGIJAsmHE */ |
18846 | | GR64, imm64sx8, brtarget16, |
18847 | | /* CGIJAsmL */ |
18848 | | GR64, imm64sx8, brtarget16, |
18849 | | /* CGIJAsmLE */ |
18850 | | GR64, imm64sx8, brtarget16, |
18851 | | /* CGIJAsmLH */ |
18852 | | GR64, imm64sx8, brtarget16, |
18853 | | /* CGIJAsmNE */ |
18854 | | GR64, imm64sx8, brtarget16, |
18855 | | /* CGIJAsmNH */ |
18856 | | GR64, imm64sx8, brtarget16, |
18857 | | /* CGIJAsmNHE */ |
18858 | | GR64, imm64sx8, brtarget16, |
18859 | | /* CGIJAsmNL */ |
18860 | | GR64, imm64sx8, brtarget16, |
18861 | | /* CGIJAsmNLE */ |
18862 | | GR64, imm64sx8, brtarget16, |
18863 | | /* CGIJAsmNLH */ |
18864 | | GR64, imm64sx8, brtarget16, |
18865 | | /* CGIT */ |
18866 | | GR64, imm64sx16, cond4, |
18867 | | /* CGITAsm */ |
18868 | | GR64, imm64sx16, imm32zx4, |
18869 | | /* CGITAsmE */ |
18870 | | GR64, imm64sx16, |
18871 | | /* CGITAsmH */ |
18872 | | GR64, imm64sx16, |
18873 | | /* CGITAsmHE */ |
18874 | | GR64, imm64sx16, |
18875 | | /* CGITAsmL */ |
18876 | | GR64, imm64sx16, |
18877 | | /* CGITAsmLE */ |
18878 | | GR64, imm64sx16, |
18879 | | /* CGITAsmLH */ |
18880 | | GR64, imm64sx16, |
18881 | | /* CGITAsmNE */ |
18882 | | GR64, imm64sx16, |
18883 | | /* CGITAsmNH */ |
18884 | | GR64, imm64sx16, |
18885 | | /* CGITAsmNHE */ |
18886 | | GR64, imm64sx16, |
18887 | | /* CGITAsmNL */ |
18888 | | GR64, imm64sx16, |
18889 | | /* CGITAsmNLE */ |
18890 | | GR64, imm64sx16, |
18891 | | /* CGITAsmNLH */ |
18892 | | GR64, imm64sx16, |
18893 | | /* CGR */ |
18894 | | GR64, GR64, |
18895 | | /* CGRB */ |
18896 | | GR64, GR64, cond4, ADDR64, disp12imm64, |
18897 | | /* CGRBAsm */ |
18898 | | GR64, GR64, imm32zx4, ADDR64, disp12imm64, |
18899 | | /* CGRBAsmE */ |
18900 | | GR64, GR64, ADDR64, disp12imm64, |
18901 | | /* CGRBAsmH */ |
18902 | | GR64, GR64, ADDR64, disp12imm64, |
18903 | | /* CGRBAsmHE */ |
18904 | | GR64, GR64, ADDR64, disp12imm64, |
18905 | | /* CGRBAsmL */ |
18906 | | GR64, GR64, ADDR64, disp12imm64, |
18907 | | /* CGRBAsmLE */ |
18908 | | GR64, GR64, ADDR64, disp12imm64, |
18909 | | /* CGRBAsmLH */ |
18910 | | GR64, GR64, ADDR64, disp12imm64, |
18911 | | /* CGRBAsmNE */ |
18912 | | GR64, GR64, ADDR64, disp12imm64, |
18913 | | /* CGRBAsmNH */ |
18914 | | GR64, GR64, ADDR64, disp12imm64, |
18915 | | /* CGRBAsmNHE */ |
18916 | | GR64, GR64, ADDR64, disp12imm64, |
18917 | | /* CGRBAsmNL */ |
18918 | | GR64, GR64, ADDR64, disp12imm64, |
18919 | | /* CGRBAsmNLE */ |
18920 | | GR64, GR64, ADDR64, disp12imm64, |
18921 | | /* CGRBAsmNLH */ |
18922 | | GR64, GR64, ADDR64, disp12imm64, |
18923 | | /* CGRJ */ |
18924 | | GR64, GR64, cond4, brtarget16, |
18925 | | /* CGRJAsm */ |
18926 | | GR64, GR64, imm32zx4, brtarget16, |
18927 | | /* CGRJAsmE */ |
18928 | | GR64, GR64, brtarget16, |
18929 | | /* CGRJAsmH */ |
18930 | | GR64, GR64, brtarget16, |
18931 | | /* CGRJAsmHE */ |
18932 | | GR64, GR64, brtarget16, |
18933 | | /* CGRJAsmL */ |
18934 | | GR64, GR64, brtarget16, |
18935 | | /* CGRJAsmLE */ |
18936 | | GR64, GR64, brtarget16, |
18937 | | /* CGRJAsmLH */ |
18938 | | GR64, GR64, brtarget16, |
18939 | | /* CGRJAsmNE */ |
18940 | | GR64, GR64, brtarget16, |
18941 | | /* CGRJAsmNH */ |
18942 | | GR64, GR64, brtarget16, |
18943 | | /* CGRJAsmNHE */ |
18944 | | GR64, GR64, brtarget16, |
18945 | | /* CGRJAsmNL */ |
18946 | | GR64, GR64, brtarget16, |
18947 | | /* CGRJAsmNLE */ |
18948 | | GR64, GR64, brtarget16, |
18949 | | /* CGRJAsmNLH */ |
18950 | | GR64, GR64, brtarget16, |
18951 | | /* CGRL */ |
18952 | | GR64, pcrel32, |
18953 | | /* CGRT */ |
18954 | | GR64, GR64, cond4, |
18955 | | /* CGRTAsm */ |
18956 | | GR64, GR64, imm32zx4, |
18957 | | /* CGRTAsmE */ |
18958 | | GR64, GR64, |
18959 | | /* CGRTAsmH */ |
18960 | | GR64, GR64, |
18961 | | /* CGRTAsmHE */ |
18962 | | GR64, GR64, |
18963 | | /* CGRTAsmL */ |
18964 | | GR64, GR64, |
18965 | | /* CGRTAsmLE */ |
18966 | | GR64, GR64, |
18967 | | /* CGRTAsmLH */ |
18968 | | GR64, GR64, |
18969 | | /* CGRTAsmNE */ |
18970 | | GR64, GR64, |
18971 | | /* CGRTAsmNH */ |
18972 | | GR64, GR64, |
18973 | | /* CGRTAsmNHE */ |
18974 | | GR64, GR64, |
18975 | | /* CGRTAsmNL */ |
18976 | | GR64, GR64, |
18977 | | /* CGRTAsmNLE */ |
18978 | | GR64, GR64, |
18979 | | /* CGRTAsmNLH */ |
18980 | | GR64, GR64, |
18981 | | /* CGXBR */ |
18982 | | GR64, imm32zx4, FP128, |
18983 | | /* CGXBRA */ |
18984 | | GR64, imm32zx4, FP128, imm32zx4, |
18985 | | /* CGXR */ |
18986 | | GR64, imm32zx4, FP128, |
18987 | | /* CGXTR */ |
18988 | | GR64, imm32zx4, FP128, |
18989 | | /* CGXTRA */ |
18990 | | GR64, imm32zx4, FP128, imm32zx4, |
18991 | | /* CH */ |
18992 | | GR32, ADDR64, disp12imm64, ADDR64, |
18993 | | /* CHF */ |
18994 | | GRH32, ADDR64, disp20imm64, ADDR64, |
18995 | | /* CHHR */ |
18996 | | GRH32, GRH32, |
18997 | | /* CHHSI */ |
18998 | | ADDR64, disp12imm64, imm32sx16, |
18999 | | /* CHI */ |
19000 | | GR32, imm32sx16, |
19001 | | /* CHLR */ |
19002 | | GRH32, GR32, |
19003 | | /* CHRL */ |
19004 | | GR32, pcrel32, |
19005 | | /* CHSI */ |
19006 | | ADDR64, disp12imm64, imm32sx16, |
19007 | | /* CHY */ |
19008 | | GR32, ADDR64, disp20imm64, ADDR64, |
19009 | | /* CIB */ |
19010 | | GR32, imm32sx8, cond4, ADDR64, disp12imm64, |
19011 | | /* CIBAsm */ |
19012 | | GR32, imm32sx8, imm32zx4, ADDR64, disp12imm64, |
19013 | | /* CIBAsmE */ |
19014 | | GR32, imm32sx8, ADDR64, disp12imm64, |
19015 | | /* CIBAsmH */ |
19016 | | GR32, imm32sx8, ADDR64, disp12imm64, |
19017 | | /* CIBAsmHE */ |
19018 | | GR32, imm32sx8, ADDR64, disp12imm64, |
19019 | | /* CIBAsmL */ |
19020 | | GR32, imm32sx8, ADDR64, disp12imm64, |
19021 | | /* CIBAsmLE */ |
19022 | | GR32, imm32sx8, ADDR64, disp12imm64, |
19023 | | /* CIBAsmLH */ |
19024 | | GR32, imm32sx8, ADDR64, disp12imm64, |
19025 | | /* CIBAsmNE */ |
19026 | | GR32, imm32sx8, ADDR64, disp12imm64, |
19027 | | /* CIBAsmNH */ |
19028 | | GR32, imm32sx8, ADDR64, disp12imm64, |
19029 | | /* CIBAsmNHE */ |
19030 | | GR32, imm32sx8, ADDR64, disp12imm64, |
19031 | | /* CIBAsmNL */ |
19032 | | GR32, imm32sx8, ADDR64, disp12imm64, |
19033 | | /* CIBAsmNLE */ |
19034 | | GR32, imm32sx8, ADDR64, disp12imm64, |
19035 | | /* CIBAsmNLH */ |
19036 | | GR32, imm32sx8, ADDR64, disp12imm64, |
19037 | | /* CIH */ |
19038 | | GRH32, simm32, |
19039 | | /* CIJ */ |
19040 | | GR32, imm32sx8, cond4, brtarget16, |
19041 | | /* CIJAsm */ |
19042 | | GR32, imm32sx8, imm32zx4, brtarget16, |
19043 | | /* CIJAsmE */ |
19044 | | GR32, imm32sx8, brtarget16, |
19045 | | /* CIJAsmH */ |
19046 | | GR32, imm32sx8, brtarget16, |
19047 | | /* CIJAsmHE */ |
19048 | | GR32, imm32sx8, brtarget16, |
19049 | | /* CIJAsmL */ |
19050 | | GR32, imm32sx8, brtarget16, |
19051 | | /* CIJAsmLE */ |
19052 | | GR32, imm32sx8, brtarget16, |
19053 | | /* CIJAsmLH */ |
19054 | | GR32, imm32sx8, brtarget16, |
19055 | | /* CIJAsmNE */ |
19056 | | GR32, imm32sx8, brtarget16, |
19057 | | /* CIJAsmNH */ |
19058 | | GR32, imm32sx8, brtarget16, |
19059 | | /* CIJAsmNHE */ |
19060 | | GR32, imm32sx8, brtarget16, |
19061 | | /* CIJAsmNL */ |
19062 | | GR32, imm32sx8, brtarget16, |
19063 | | /* CIJAsmNLE */ |
19064 | | GR32, imm32sx8, brtarget16, |
19065 | | /* CIJAsmNLH */ |
19066 | | GR32, imm32sx8, brtarget16, |
19067 | | /* CIT */ |
19068 | | GR32, imm32sx16, cond4, |
19069 | | /* CITAsm */ |
19070 | | GR32, imm32sx16, imm32zx4, |
19071 | | /* CITAsmE */ |
19072 | | GR32, imm32sx16, |
19073 | | /* CITAsmH */ |
19074 | | GR32, imm32sx16, |
19075 | | /* CITAsmHE */ |
19076 | | GR32, imm32sx16, |
19077 | | /* CITAsmL */ |
19078 | | GR32, imm32sx16, |
19079 | | /* CITAsmLE */ |
19080 | | GR32, imm32sx16, |
19081 | | /* CITAsmLH */ |
19082 | | GR32, imm32sx16, |
19083 | | /* CITAsmNE */ |
19084 | | GR32, imm32sx16, |
19085 | | /* CITAsmNH */ |
19086 | | GR32, imm32sx16, |
19087 | | /* CITAsmNHE */ |
19088 | | GR32, imm32sx16, |
19089 | | /* CITAsmNL */ |
19090 | | GR32, imm32sx16, |
19091 | | /* CITAsmNLE */ |
19092 | | GR32, imm32sx16, |
19093 | | /* CITAsmNLH */ |
19094 | | GR32, imm32sx16, |
19095 | | /* CKSM */ |
19096 | | GR64, GR128, GR64, GR128, |
19097 | | /* CL */ |
19098 | | GR32, ADDR64, disp12imm64, ADDR64, |
19099 | | /* CLC */ |
19100 | | ADDR64, disp12imm64, len8imm64, ADDR64, disp12imm64, |
19101 | | /* CLCL */ |
19102 | | GR128, GR128, GR128, GR128, |
19103 | | /* CLCLE */ |
19104 | | GR128, GR128, GR128, GR128, ADDR32, disp12imm32, |
19105 | | /* CLCLU */ |
19106 | | GR128, GR128, GR128, GR128, ADDR32, disp20imm32, |
19107 | | /* CLFDBR */ |
19108 | | GR32, imm32zx4, FP64, imm32zx4, |
19109 | | /* CLFDTR */ |
19110 | | GR32, imm32zx4, FP64, imm32zx4, |
19111 | | /* CLFEBR */ |
19112 | | GR32, imm32zx4, FP32, imm32zx4, |
19113 | | /* CLFHSI */ |
19114 | | ADDR64, disp12imm64, imm32zx16, |
19115 | | /* CLFI */ |
19116 | | GR32, uimm32, |
19117 | | /* CLFIT */ |
19118 | | GR32, imm32zx16, cond4, |
19119 | | /* CLFITAsm */ |
19120 | | GR32, imm32zx16, imm32zx4, |
19121 | | /* CLFITAsmE */ |
19122 | | GR32, imm32zx16, |
19123 | | /* CLFITAsmH */ |
19124 | | GR32, imm32zx16, |
19125 | | /* CLFITAsmHE */ |
19126 | | GR32, imm32zx16, |
19127 | | /* CLFITAsmL */ |
19128 | | GR32, imm32zx16, |
19129 | | /* CLFITAsmLE */ |
19130 | | GR32, imm32zx16, |
19131 | | /* CLFITAsmLH */ |
19132 | | GR32, imm32zx16, |
19133 | | /* CLFITAsmNE */ |
19134 | | GR32, imm32zx16, |
19135 | | /* CLFITAsmNH */ |
19136 | | GR32, imm32zx16, |
19137 | | /* CLFITAsmNHE */ |
19138 | | GR32, imm32zx16, |
19139 | | /* CLFITAsmNL */ |
19140 | | GR32, imm32zx16, |
19141 | | /* CLFITAsmNLE */ |
19142 | | GR32, imm32zx16, |
19143 | | /* CLFITAsmNLH */ |
19144 | | GR32, imm32zx16, |
19145 | | /* CLFXBR */ |
19146 | | GR32, imm32zx4, FP128, imm32zx4, |
19147 | | /* CLFXTR */ |
19148 | | GR32, imm32zx4, FP128, imm32zx4, |
19149 | | /* CLG */ |
19150 | | GR64, ADDR64, disp20imm64, ADDR64, |
19151 | | /* CLGDBR */ |
19152 | | GR64, imm32zx4, FP64, imm32zx4, |
19153 | | /* CLGDTR */ |
19154 | | GR64, imm32zx4, FP64, imm32zx4, |
19155 | | /* CLGEBR */ |
19156 | | GR64, imm32zx4, FP32, imm32zx4, |
19157 | | /* CLGF */ |
19158 | | GR64, ADDR64, disp20imm64, ADDR64, |
19159 | | /* CLGFI */ |
19160 | | GR64, imm64zx32, |
19161 | | /* CLGFR */ |
19162 | | GR64, GR32, |
19163 | | /* CLGFRL */ |
19164 | | GR64, pcrel32, |
19165 | | /* CLGHRL */ |
19166 | | GR64, pcrel32, |
19167 | | /* CLGHSI */ |
19168 | | ADDR64, disp12imm64, imm64zx16, |
19169 | | /* CLGIB */ |
19170 | | GR64, imm64zx8, cond4, ADDR64, disp12imm64, |
19171 | | /* CLGIBAsm */ |
19172 | | GR64, imm64zx8, imm32zx4, ADDR64, disp12imm64, |
19173 | | /* CLGIBAsmE */ |
19174 | | GR64, imm64zx8, ADDR64, disp12imm64, |
19175 | | /* CLGIBAsmH */ |
19176 | | GR64, imm64zx8, ADDR64, disp12imm64, |
19177 | | /* CLGIBAsmHE */ |
19178 | | GR64, imm64zx8, ADDR64, disp12imm64, |
19179 | | /* CLGIBAsmL */ |
19180 | | GR64, imm64zx8, ADDR64, disp12imm64, |
19181 | | /* CLGIBAsmLE */ |
19182 | | GR64, imm64zx8, ADDR64, disp12imm64, |
19183 | | /* CLGIBAsmLH */ |
19184 | | GR64, imm64zx8, ADDR64, disp12imm64, |
19185 | | /* CLGIBAsmNE */ |
19186 | | GR64, imm64zx8, ADDR64, disp12imm64, |
19187 | | /* CLGIBAsmNH */ |
19188 | | GR64, imm64zx8, ADDR64, disp12imm64, |
19189 | | /* CLGIBAsmNHE */ |
19190 | | GR64, imm64zx8, ADDR64, disp12imm64, |
19191 | | /* CLGIBAsmNL */ |
19192 | | GR64, imm64zx8, ADDR64, disp12imm64, |
19193 | | /* CLGIBAsmNLE */ |
19194 | | GR64, imm64zx8, ADDR64, disp12imm64, |
19195 | | /* CLGIBAsmNLH */ |
19196 | | GR64, imm64zx8, ADDR64, disp12imm64, |
19197 | | /* CLGIJ */ |
19198 | | GR64, imm64zx8, cond4, brtarget16, |
19199 | | /* CLGIJAsm */ |
19200 | | GR64, imm64zx8, imm32zx4, brtarget16, |
19201 | | /* CLGIJAsmE */ |
19202 | | GR64, imm64zx8, brtarget16, |
19203 | | /* CLGIJAsmH */ |
19204 | | GR64, imm64zx8, brtarget16, |
19205 | | /* CLGIJAsmHE */ |
19206 | | GR64, imm64zx8, brtarget16, |
19207 | | /* CLGIJAsmL */ |
19208 | | GR64, imm64zx8, brtarget16, |
19209 | | /* CLGIJAsmLE */ |
19210 | | GR64, imm64zx8, brtarget16, |
19211 | | /* CLGIJAsmLH */ |
19212 | | GR64, imm64zx8, brtarget16, |
19213 | | /* CLGIJAsmNE */ |
19214 | | GR64, imm64zx8, brtarget16, |
19215 | | /* CLGIJAsmNH */ |
19216 | | GR64, imm64zx8, brtarget16, |
19217 | | /* CLGIJAsmNHE */ |
19218 | | GR64, imm64zx8, brtarget16, |
19219 | | /* CLGIJAsmNL */ |
19220 | | GR64, imm64zx8, brtarget16, |
19221 | | /* CLGIJAsmNLE */ |
19222 | | GR64, imm64zx8, brtarget16, |
19223 | | /* CLGIJAsmNLH */ |
19224 | | GR64, imm64zx8, brtarget16, |
19225 | | /* CLGIT */ |
19226 | | GR64, imm64zx16, cond4, |
19227 | | /* CLGITAsm */ |
19228 | | GR64, imm64zx16, imm32zx4, |
19229 | | /* CLGITAsmE */ |
19230 | | GR64, imm64zx16, |
19231 | | /* CLGITAsmH */ |
19232 | | GR64, imm64zx16, |
19233 | | /* CLGITAsmHE */ |
19234 | | GR64, imm64zx16, |
19235 | | /* CLGITAsmL */ |
19236 | | GR64, imm64zx16, |
19237 | | /* CLGITAsmLE */ |
19238 | | GR64, imm64zx16, |
19239 | | /* CLGITAsmLH */ |
19240 | | GR64, imm64zx16, |
19241 | | /* CLGITAsmNE */ |
19242 | | GR64, imm64zx16, |
19243 | | /* CLGITAsmNH */ |
19244 | | GR64, imm64zx16, |
19245 | | /* CLGITAsmNHE */ |
19246 | | GR64, imm64zx16, |
19247 | | /* CLGITAsmNL */ |
19248 | | GR64, imm64zx16, |
19249 | | /* CLGITAsmNLE */ |
19250 | | GR64, imm64zx16, |
19251 | | /* CLGITAsmNLH */ |
19252 | | GR64, imm64zx16, |
19253 | | /* CLGR */ |
19254 | | GR64, GR64, |
19255 | | /* CLGRB */ |
19256 | | GR64, GR64, cond4, ADDR64, disp12imm64, |
19257 | | /* CLGRBAsm */ |
19258 | | GR64, GR64, imm32zx4, ADDR64, disp12imm64, |
19259 | | /* CLGRBAsmE */ |
19260 | | GR64, GR64, ADDR64, disp12imm64, |
19261 | | /* CLGRBAsmH */ |
19262 | | GR64, GR64, ADDR64, disp12imm64, |
19263 | | /* CLGRBAsmHE */ |
19264 | | GR64, GR64, ADDR64, disp12imm64, |
19265 | | /* CLGRBAsmL */ |
19266 | | GR64, GR64, ADDR64, disp12imm64, |
19267 | | /* CLGRBAsmLE */ |
19268 | | GR64, GR64, ADDR64, disp12imm64, |
19269 | | /* CLGRBAsmLH */ |
19270 | | GR64, GR64, ADDR64, disp12imm64, |
19271 | | /* CLGRBAsmNE */ |
19272 | | GR64, GR64, ADDR64, disp12imm64, |
19273 | | /* CLGRBAsmNH */ |
19274 | | GR64, GR64, ADDR64, disp12imm64, |
19275 | | /* CLGRBAsmNHE */ |
19276 | | GR64, GR64, ADDR64, disp12imm64, |
19277 | | /* CLGRBAsmNL */ |
19278 | | GR64, GR64, ADDR64, disp12imm64, |
19279 | | /* CLGRBAsmNLE */ |
19280 | | GR64, GR64, ADDR64, disp12imm64, |
19281 | | /* CLGRBAsmNLH */ |
19282 | | GR64, GR64, ADDR64, disp12imm64, |
19283 | | /* CLGRJ */ |
19284 | | GR64, GR64, cond4, brtarget16, |
19285 | | /* CLGRJAsm */ |
19286 | | GR64, GR64, imm32zx4, brtarget16, |
19287 | | /* CLGRJAsmE */ |
19288 | | GR64, GR64, brtarget16, |
19289 | | /* CLGRJAsmH */ |
19290 | | GR64, GR64, brtarget16, |
19291 | | /* CLGRJAsmHE */ |
19292 | | GR64, GR64, brtarget16, |
19293 | | /* CLGRJAsmL */ |
19294 | | GR64, GR64, brtarget16, |
19295 | | /* CLGRJAsmLE */ |
19296 | | GR64, GR64, brtarget16, |
19297 | | /* CLGRJAsmLH */ |
19298 | | GR64, GR64, brtarget16, |
19299 | | /* CLGRJAsmNE */ |
19300 | | GR64, GR64, brtarget16, |
19301 | | /* CLGRJAsmNH */ |
19302 | | GR64, GR64, brtarget16, |
19303 | | /* CLGRJAsmNHE */ |
19304 | | GR64, GR64, brtarget16, |
19305 | | /* CLGRJAsmNL */ |
19306 | | GR64, GR64, brtarget16, |
19307 | | /* CLGRJAsmNLE */ |
19308 | | GR64, GR64, brtarget16, |
19309 | | /* CLGRJAsmNLH */ |
19310 | | GR64, GR64, brtarget16, |
19311 | | /* CLGRL */ |
19312 | | GR64, pcrel32, |
19313 | | /* CLGRT */ |
19314 | | GR64, GR64, cond4, |
19315 | | /* CLGRTAsm */ |
19316 | | GR64, GR64, imm32zx4, |
19317 | | /* CLGRTAsmE */ |
19318 | | GR64, GR64, |
19319 | | /* CLGRTAsmH */ |
19320 | | GR64, GR64, |
19321 | | /* CLGRTAsmHE */ |
19322 | | GR64, GR64, |
19323 | | /* CLGRTAsmL */ |
19324 | | GR64, GR64, |
19325 | | /* CLGRTAsmLE */ |
19326 | | GR64, GR64, |
19327 | | /* CLGRTAsmLH */ |
19328 | | GR64, GR64, |
19329 | | /* CLGRTAsmNE */ |
19330 | | GR64, GR64, |
19331 | | /* CLGRTAsmNH */ |
19332 | | GR64, GR64, |
19333 | | /* CLGRTAsmNHE */ |
19334 | | GR64, GR64, |
19335 | | /* CLGRTAsmNL */ |
19336 | | GR64, GR64, |
19337 | | /* CLGRTAsmNLE */ |
19338 | | GR64, GR64, |
19339 | | /* CLGRTAsmNLH */ |
19340 | | GR64, GR64, |
19341 | | /* CLGT */ |
19342 | | GR64, ADDR64, disp20imm64, cond4, |
19343 | | /* CLGTAsm */ |
19344 | | GR64, ADDR64, disp20imm64, imm32zx4, |
19345 | | /* CLGTAsmE */ |
19346 | | GR64, ADDR64, disp20imm64, |
19347 | | /* CLGTAsmH */ |
19348 | | GR64, ADDR64, disp20imm64, |
19349 | | /* CLGTAsmHE */ |
19350 | | GR64, ADDR64, disp20imm64, |
19351 | | /* CLGTAsmL */ |
19352 | | GR64, ADDR64, disp20imm64, |
19353 | | /* CLGTAsmLE */ |
19354 | | GR64, ADDR64, disp20imm64, |
19355 | | /* CLGTAsmLH */ |
19356 | | GR64, ADDR64, disp20imm64, |
19357 | | /* CLGTAsmNE */ |
19358 | | GR64, ADDR64, disp20imm64, |
19359 | | /* CLGTAsmNH */ |
19360 | | GR64, ADDR64, disp20imm64, |
19361 | | /* CLGTAsmNHE */ |
19362 | | GR64, ADDR64, disp20imm64, |
19363 | | /* CLGTAsmNL */ |
19364 | | GR64, ADDR64, disp20imm64, |
19365 | | /* CLGTAsmNLE */ |
19366 | | GR64, ADDR64, disp20imm64, |
19367 | | /* CLGTAsmNLH */ |
19368 | | GR64, ADDR64, disp20imm64, |
19369 | | /* CLGXBR */ |
19370 | | GR64, imm32zx4, FP128, imm32zx4, |
19371 | | /* CLGXTR */ |
19372 | | GR64, imm32zx4, FP128, imm32zx4, |
19373 | | /* CLHF */ |
19374 | | GRH32, ADDR64, disp20imm64, ADDR64, |
19375 | | /* CLHHR */ |
19376 | | GRH32, GRH32, |
19377 | | /* CLHHSI */ |
19378 | | ADDR64, disp12imm64, imm32zx16, |
19379 | | /* CLHLR */ |
19380 | | GRH32, GR32, |
19381 | | /* CLHRL */ |
19382 | | GR32, pcrel32, |
19383 | | /* CLI */ |
19384 | | ADDR64, disp12imm64, imm32zx8, |
19385 | | /* CLIB */ |
19386 | | GR32, imm32zx8, cond4, ADDR64, disp12imm64, |
19387 | | /* CLIBAsm */ |
19388 | | GR32, imm32zx8, imm32zx4, ADDR64, disp12imm64, |
19389 | | /* CLIBAsmE */ |
19390 | | GR32, imm32zx8, ADDR64, disp12imm64, |
19391 | | /* CLIBAsmH */ |
19392 | | GR32, imm32zx8, ADDR64, disp12imm64, |
19393 | | /* CLIBAsmHE */ |
19394 | | GR32, imm32zx8, ADDR64, disp12imm64, |
19395 | | /* CLIBAsmL */ |
19396 | | GR32, imm32zx8, ADDR64, disp12imm64, |
19397 | | /* CLIBAsmLE */ |
19398 | | GR32, imm32zx8, ADDR64, disp12imm64, |
19399 | | /* CLIBAsmLH */ |
19400 | | GR32, imm32zx8, ADDR64, disp12imm64, |
19401 | | /* CLIBAsmNE */ |
19402 | | GR32, imm32zx8, ADDR64, disp12imm64, |
19403 | | /* CLIBAsmNH */ |
19404 | | GR32, imm32zx8, ADDR64, disp12imm64, |
19405 | | /* CLIBAsmNHE */ |
19406 | | GR32, imm32zx8, ADDR64, disp12imm64, |
19407 | | /* CLIBAsmNL */ |
19408 | | GR32, imm32zx8, ADDR64, disp12imm64, |
19409 | | /* CLIBAsmNLE */ |
19410 | | GR32, imm32zx8, ADDR64, disp12imm64, |
19411 | | /* CLIBAsmNLH */ |
19412 | | GR32, imm32zx8, ADDR64, disp12imm64, |
19413 | | /* CLIH */ |
19414 | | GRH32, uimm32, |
19415 | | /* CLIJ */ |
19416 | | GR32, imm32zx8, cond4, brtarget16, |
19417 | | /* CLIJAsm */ |
19418 | | GR32, imm32zx8, imm32zx4, brtarget16, |
19419 | | /* CLIJAsmE */ |
19420 | | GR32, imm32zx8, brtarget16, |
19421 | | /* CLIJAsmH */ |
19422 | | GR32, imm32zx8, brtarget16, |
19423 | | /* CLIJAsmHE */ |
19424 | | GR32, imm32zx8, brtarget16, |
19425 | | /* CLIJAsmL */ |
19426 | | GR32, imm32zx8, brtarget16, |
19427 | | /* CLIJAsmLE */ |
19428 | | GR32, imm32zx8, brtarget16, |
19429 | | /* CLIJAsmLH */ |
19430 | | GR32, imm32zx8, brtarget16, |
19431 | | /* CLIJAsmNE */ |
19432 | | GR32, imm32zx8, brtarget16, |
19433 | | /* CLIJAsmNH */ |
19434 | | GR32, imm32zx8, brtarget16, |
19435 | | /* CLIJAsmNHE */ |
19436 | | GR32, imm32zx8, brtarget16, |
19437 | | /* CLIJAsmNL */ |
19438 | | GR32, imm32zx8, brtarget16, |
19439 | | /* CLIJAsmNLE */ |
19440 | | GR32, imm32zx8, brtarget16, |
19441 | | /* CLIJAsmNLH */ |
19442 | | GR32, imm32zx8, brtarget16, |
19443 | | /* CLIY */ |
19444 | | ADDR64, disp20imm64, imm32zx8, |
19445 | | /* CLM */ |
19446 | | GR32, imm32zx4, ADDR64, disp12imm64, |
19447 | | /* CLMH */ |
19448 | | GRH32, imm32zx4, ADDR64, disp20imm64, |
19449 | | /* CLMY */ |
19450 | | GR32, imm32zx4, ADDR64, disp20imm64, |
19451 | | /* CLR */ |
19452 | | GR32, GR32, |
19453 | | /* CLRB */ |
19454 | | GR32, GR32, cond4, ADDR64, disp12imm64, |
19455 | | /* CLRBAsm */ |
19456 | | GR32, GR32, imm32zx4, ADDR64, disp12imm64, |
19457 | | /* CLRBAsmE */ |
19458 | | GR32, GR32, ADDR64, disp12imm64, |
19459 | | /* CLRBAsmH */ |
19460 | | GR32, GR32, ADDR64, disp12imm64, |
19461 | | /* CLRBAsmHE */ |
19462 | | GR32, GR32, ADDR64, disp12imm64, |
19463 | | /* CLRBAsmL */ |
19464 | | GR32, GR32, ADDR64, disp12imm64, |
19465 | | /* CLRBAsmLE */ |
19466 | | GR32, GR32, ADDR64, disp12imm64, |
19467 | | /* CLRBAsmLH */ |
19468 | | GR32, GR32, ADDR64, disp12imm64, |
19469 | | /* CLRBAsmNE */ |
19470 | | GR32, GR32, ADDR64, disp12imm64, |
19471 | | /* CLRBAsmNH */ |
19472 | | GR32, GR32, ADDR64, disp12imm64, |
19473 | | /* CLRBAsmNHE */ |
19474 | | GR32, GR32, ADDR64, disp12imm64, |
19475 | | /* CLRBAsmNL */ |
19476 | | GR32, GR32, ADDR64, disp12imm64, |
19477 | | /* CLRBAsmNLE */ |
19478 | | GR32, GR32, ADDR64, disp12imm64, |
19479 | | /* CLRBAsmNLH */ |
19480 | | GR32, GR32, ADDR64, disp12imm64, |
19481 | | /* CLRJ */ |
19482 | | GR32, GR32, cond4, brtarget16, |
19483 | | /* CLRJAsm */ |
19484 | | GR32, GR32, imm32zx4, brtarget16, |
19485 | | /* CLRJAsmE */ |
19486 | | GR32, GR32, brtarget16, |
19487 | | /* CLRJAsmH */ |
19488 | | GR32, GR32, brtarget16, |
19489 | | /* CLRJAsmHE */ |
19490 | | GR32, GR32, brtarget16, |
19491 | | /* CLRJAsmL */ |
19492 | | GR32, GR32, brtarget16, |
19493 | | /* CLRJAsmLE */ |
19494 | | GR32, GR32, brtarget16, |
19495 | | /* CLRJAsmLH */ |
19496 | | GR32, GR32, brtarget16, |
19497 | | /* CLRJAsmNE */ |
19498 | | GR32, GR32, brtarget16, |
19499 | | /* CLRJAsmNH */ |
19500 | | GR32, GR32, brtarget16, |
19501 | | /* CLRJAsmNHE */ |
19502 | | GR32, GR32, brtarget16, |
19503 | | /* CLRJAsmNL */ |
19504 | | GR32, GR32, brtarget16, |
19505 | | /* CLRJAsmNLE */ |
19506 | | GR32, GR32, brtarget16, |
19507 | | /* CLRJAsmNLH */ |
19508 | | GR32, GR32, brtarget16, |
19509 | | /* CLRL */ |
19510 | | GR32, pcrel32, |
19511 | | /* CLRT */ |
19512 | | GR32, GR32, cond4, |
19513 | | /* CLRTAsm */ |
19514 | | GR32, GR32, imm32zx4, |
19515 | | /* CLRTAsmE */ |
19516 | | GR32, GR32, |
19517 | | /* CLRTAsmH */ |
19518 | | GR32, GR32, |
19519 | | /* CLRTAsmHE */ |
19520 | | GR32, GR32, |
19521 | | /* CLRTAsmL */ |
19522 | | GR32, GR32, |
19523 | | /* CLRTAsmLE */ |
19524 | | GR32, GR32, |
19525 | | /* CLRTAsmLH */ |
19526 | | GR32, GR32, |
19527 | | /* CLRTAsmNE */ |
19528 | | GR32, GR32, |
19529 | | /* CLRTAsmNH */ |
19530 | | GR32, GR32, |
19531 | | /* CLRTAsmNHE */ |
19532 | | GR32, GR32, |
19533 | | /* CLRTAsmNL */ |
19534 | | GR32, GR32, |
19535 | | /* CLRTAsmNLE */ |
19536 | | GR32, GR32, |
19537 | | /* CLRTAsmNLH */ |
19538 | | GR32, GR32, |
19539 | | /* CLST */ |
19540 | | GR64, GR64, GR64, GR64, |
19541 | | /* CLT */ |
19542 | | GR32, ADDR64, disp20imm64, cond4, |
19543 | | /* CLTAsm */ |
19544 | | GR32, ADDR64, disp20imm64, imm32zx4, |
19545 | | /* CLTAsmE */ |
19546 | | GR32, ADDR64, disp20imm64, |
19547 | | /* CLTAsmH */ |
19548 | | GR32, ADDR64, disp20imm64, |
19549 | | /* CLTAsmHE */ |
19550 | | GR32, ADDR64, disp20imm64, |
19551 | | /* CLTAsmL */ |
19552 | | GR32, ADDR64, disp20imm64, |
19553 | | /* CLTAsmLE */ |
19554 | | GR32, ADDR64, disp20imm64, |
19555 | | /* CLTAsmLH */ |
19556 | | GR32, ADDR64, disp20imm64, |
19557 | | /* CLTAsmNE */ |
19558 | | GR32, ADDR64, disp20imm64, |
19559 | | /* CLTAsmNH */ |
19560 | | GR32, ADDR64, disp20imm64, |
19561 | | /* CLTAsmNHE */ |
19562 | | GR32, ADDR64, disp20imm64, |
19563 | | /* CLTAsmNL */ |
19564 | | GR32, ADDR64, disp20imm64, |
19565 | | /* CLTAsmNLE */ |
19566 | | GR32, ADDR64, disp20imm64, |
19567 | | /* CLTAsmNLH */ |
19568 | | GR32, ADDR64, disp20imm64, |
19569 | | /* CLY */ |
19570 | | GR32, ADDR64, disp20imm64, ADDR64, |
19571 | | /* CMPSC */ |
19572 | | GR128, GR128, GR128, GR128, |
19573 | | /* CP */ |
19574 | | ADDR64, disp12imm64, len4imm64, ADDR64, disp12imm64, len4imm64, |
19575 | | /* CPDT */ |
19576 | | FP64, ADDR64, disp12imm64, len8imm64, imm32zx4, |
19577 | | /* CPSDRdd */ |
19578 | | FP64, FP64, FP64, |
19579 | | /* CPSDRds */ |
19580 | | FP64, FP64, FP32, |
19581 | | /* CPSDRsd */ |
19582 | | FP32, FP32, FP64, |
19583 | | /* CPSDRss */ |
19584 | | FP32, FP32, FP32, |
19585 | | /* CPXT */ |
19586 | | FP128, ADDR64, disp12imm64, len8imm64, imm32zx4, |
19587 | | /* CPYA */ |
19588 | | AR32, AR32, |
19589 | | /* CR */ |
19590 | | GR32, GR32, |
19591 | | /* CRB */ |
19592 | | GR32, GR32, cond4, ADDR64, disp12imm64, |
19593 | | /* CRBAsm */ |
19594 | | GR32, GR32, imm32zx4, ADDR64, disp12imm64, |
19595 | | /* CRBAsmE */ |
19596 | | GR32, GR32, ADDR64, disp12imm64, |
19597 | | /* CRBAsmH */ |
19598 | | GR32, GR32, ADDR64, disp12imm64, |
19599 | | /* CRBAsmHE */ |
19600 | | GR32, GR32, ADDR64, disp12imm64, |
19601 | | /* CRBAsmL */ |
19602 | | GR32, GR32, ADDR64, disp12imm64, |
19603 | | /* CRBAsmLE */ |
19604 | | GR32, GR32, ADDR64, disp12imm64, |
19605 | | /* CRBAsmLH */ |
19606 | | GR32, GR32, ADDR64, disp12imm64, |
19607 | | /* CRBAsmNE */ |
19608 | | GR32, GR32, ADDR64, disp12imm64, |
19609 | | /* CRBAsmNH */ |
19610 | | GR32, GR32, ADDR64, disp12imm64, |
19611 | | /* CRBAsmNHE */ |
19612 | | GR32, GR32, ADDR64, disp12imm64, |
19613 | | /* CRBAsmNL */ |
19614 | | GR32, GR32, ADDR64, disp12imm64, |
19615 | | /* CRBAsmNLE */ |
19616 | | GR32, GR32, ADDR64, disp12imm64, |
19617 | | /* CRBAsmNLH */ |
19618 | | GR32, GR32, ADDR64, disp12imm64, |
19619 | | /* CRDTE */ |
19620 | | GR128, GR128, GR64, imm32zx4, |
19621 | | /* CRDTEOpt */ |
19622 | | GR128, GR128, GR64, |
19623 | | /* CRJ */ |
19624 | | GR32, GR32, cond4, brtarget16, |
19625 | | /* CRJAsm */ |
19626 | | GR32, GR32, imm32zx4, brtarget16, |
19627 | | /* CRJAsmE */ |
19628 | | GR32, GR32, brtarget16, |
19629 | | /* CRJAsmH */ |
19630 | | GR32, GR32, brtarget16, |
19631 | | /* CRJAsmHE */ |
19632 | | GR32, GR32, brtarget16, |
19633 | | /* CRJAsmL */ |
19634 | | GR32, GR32, brtarget16, |
19635 | | /* CRJAsmLE */ |
19636 | | GR32, GR32, brtarget16, |
19637 | | /* CRJAsmLH */ |
19638 | | GR32, GR32, brtarget16, |
19639 | | /* CRJAsmNE */ |
19640 | | GR32, GR32, brtarget16, |
19641 | | /* CRJAsmNH */ |
19642 | | GR32, GR32, brtarget16, |
19643 | | /* CRJAsmNHE */ |
19644 | | GR32, GR32, brtarget16, |
19645 | | /* CRJAsmNL */ |
19646 | | GR32, GR32, brtarget16, |
19647 | | /* CRJAsmNLE */ |
19648 | | GR32, GR32, brtarget16, |
19649 | | /* CRJAsmNLH */ |
19650 | | GR32, GR32, brtarget16, |
19651 | | /* CRL */ |
19652 | | GR32, pcrel32, |
19653 | | /* CRT */ |
19654 | | GR32, GR32, cond4, |
19655 | | /* CRTAsm */ |
19656 | | GR32, GR32, imm32zx4, |
19657 | | /* CRTAsmE */ |
19658 | | GR32, GR32, |
19659 | | /* CRTAsmH */ |
19660 | | GR32, GR32, |
19661 | | /* CRTAsmHE */ |
19662 | | GR32, GR32, |
19663 | | /* CRTAsmL */ |
19664 | | GR32, GR32, |
19665 | | /* CRTAsmLE */ |
19666 | | GR32, GR32, |
19667 | | /* CRTAsmLH */ |
19668 | | GR32, GR32, |
19669 | | /* CRTAsmNE */ |
19670 | | GR32, GR32, |
19671 | | /* CRTAsmNH */ |
19672 | | GR32, GR32, |
19673 | | /* CRTAsmNHE */ |
19674 | | GR32, GR32, |
19675 | | /* CRTAsmNL */ |
19676 | | GR32, GR32, |
19677 | | /* CRTAsmNLE */ |
19678 | | GR32, GR32, |
19679 | | /* CRTAsmNLH */ |
19680 | | GR32, GR32, |
19681 | | /* CS */ |
19682 | | GR32, GR32, GR32, ADDR64, disp12imm64, |
19683 | | /* CSCH */ |
19684 | | /* CSDTR */ |
19685 | | GR64, FP64, imm32zx4, |
19686 | | /* CSG */ |
19687 | | GR64, GR64, GR64, ADDR64, disp20imm64, |
19688 | | /* CSP */ |
19689 | | GR128, GR128, GR64, |
19690 | | /* CSPG */ |
19691 | | GR128, GR128, GR64, |
19692 | | /* CSST */ |
19693 | | ADDR64, disp12imm64, ADDR64, disp12imm64, GR64, |
19694 | | /* CSXTR */ |
19695 | | GR128, FP128, imm32zx4, |
19696 | | /* CSY */ |
19697 | | GR32, GR32, GR32, ADDR64, disp20imm64, |
19698 | | /* CU12 */ |
19699 | | GR128, GR128, GR128, GR128, imm32zx4, |
19700 | | /* CU12Opt */ |
19701 | | GR128, GR128, GR128, GR128, |
19702 | | /* CU14 */ |
19703 | | GR128, GR128, GR128, GR128, imm32zx4, |
19704 | | /* CU14Opt */ |
19705 | | GR128, GR128, GR128, GR128, |
19706 | | /* CU21 */ |
19707 | | GR128, GR128, GR128, GR128, imm32zx4, |
19708 | | /* CU21Opt */ |
19709 | | GR128, GR128, GR128, GR128, |
19710 | | /* CU24 */ |
19711 | | GR128, GR128, GR128, GR128, imm32zx4, |
19712 | | /* CU24Opt */ |
19713 | | GR128, GR128, GR128, GR128, |
19714 | | /* CU41 */ |
19715 | | GR128, GR128, GR128, GR128, |
19716 | | /* CU42 */ |
19717 | | GR128, GR128, GR128, GR128, |
19718 | | /* CUDTR */ |
19719 | | GR64, FP64, |
19720 | | /* CUSE */ |
19721 | | GR128, GR128, GR128, GR128, |
19722 | | /* CUTFU */ |
19723 | | GR128, GR128, GR128, GR128, imm32zx4, |
19724 | | /* CUTFUOpt */ |
19725 | | GR128, GR128, GR128, GR128, |
19726 | | /* CUUTF */ |
19727 | | GR128, GR128, GR128, GR128, imm32zx4, |
19728 | | /* CUUTFOpt */ |
19729 | | GR128, GR128, GR128, GR128, |
19730 | | /* CUXTR */ |
19731 | | GR128, FP128, |
19732 | | /* CVB */ |
19733 | | GR32, GR32, ADDR64, disp12imm64, ADDR64, |
19734 | | /* CVBG */ |
19735 | | GR64, GR64, ADDR64, disp20imm64, ADDR64, |
19736 | | /* CVBY */ |
19737 | | GR32, GR32, ADDR64, disp20imm64, ADDR64, |
19738 | | /* CVD */ |
19739 | | GR32, ADDR64, disp12imm64, ADDR64, |
19740 | | /* CVDG */ |
19741 | | GR64, ADDR64, disp20imm64, ADDR64, |
19742 | | /* CVDY */ |
19743 | | GR32, ADDR64, disp20imm64, ADDR64, |
19744 | | /* CXBR */ |
19745 | | FP128, FP128, |
19746 | | /* CXFBR */ |
19747 | | FP128, GR32, |
19748 | | /* CXFBRA */ |
19749 | | FP128, imm32zx4, GR32, imm32zx4, |
19750 | | /* CXFR */ |
19751 | | FP128, GR32, |
19752 | | /* CXFTR */ |
19753 | | FP128, imm32zx4, GR32, imm32zx4, |
19754 | | /* CXGBR */ |
19755 | | FP128, GR64, |
19756 | | /* CXGBRA */ |
19757 | | FP128, imm32zx4, GR64, imm32zx4, |
19758 | | /* CXGR */ |
19759 | | FP128, GR64, |
19760 | | /* CXGTR */ |
19761 | | FP128, GR64, |
19762 | | /* CXGTRA */ |
19763 | | FP128, imm32zx4, GR64, imm32zx4, |
19764 | | /* CXLFBR */ |
19765 | | FP128, imm32zx4, GR32, imm32zx4, |
19766 | | /* CXLFTR */ |
19767 | | FP128, imm32zx4, GR32, imm32zx4, |
19768 | | /* CXLGBR */ |
19769 | | FP128, imm32zx4, GR64, imm32zx4, |
19770 | | /* CXLGTR */ |
19771 | | FP128, imm32zx4, GR64, imm32zx4, |
19772 | | /* CXPT */ |
19773 | | FP128, ADDR64, disp12imm64, len8imm64, imm32zx4, |
19774 | | /* CXR */ |
19775 | | FP128, FP128, |
19776 | | /* CXSTR */ |
19777 | | FP128, GR128, |
19778 | | /* CXTR */ |
19779 | | FP128, FP128, |
19780 | | /* CXUTR */ |
19781 | | FP128, GR128, |
19782 | | /* CXZT */ |
19783 | | FP128, ADDR64, disp12imm64, len8imm64, imm32zx4, |
19784 | | /* CY */ |
19785 | | GR32, ADDR64, disp20imm64, ADDR64, |
19786 | | /* CZDT */ |
19787 | | FP64, ADDR64, disp12imm64, len8imm64, imm32zx4, |
19788 | | /* CZXT */ |
19789 | | FP128, ADDR64, disp12imm64, len8imm64, imm32zx4, |
19790 | | /* D */ |
19791 | | GR128, GR128, ADDR64, disp12imm64, ADDR64, |
19792 | | /* DD */ |
19793 | | FP64, FP64, ADDR64, disp12imm64, ADDR64, |
19794 | | /* DDB */ |
19795 | | FP64, FP64, ADDR64, disp12imm64, ADDR64, |
19796 | | /* DDBR */ |
19797 | | FP64, FP64, FP64, |
19798 | | /* DDR */ |
19799 | | FP64, FP64, FP64, |
19800 | | /* DDTR */ |
19801 | | FP64, FP64, FP64, |
19802 | | /* DDTRA */ |
19803 | | FP64, FP64, FP64, imm32zx4, |
19804 | | /* DE */ |
19805 | | FP32, FP32, ADDR64, disp12imm64, ADDR64, |
19806 | | /* DEB */ |
19807 | | FP32, FP32, ADDR64, disp12imm64, ADDR64, |
19808 | | /* DEBR */ |
19809 | | FP32, FP32, FP32, |
19810 | | /* DER */ |
19811 | | FP32, FP32, FP32, |
19812 | | /* DFLTCC */ |
19813 | | GR128, GR128, GR128, GR128, GR64, |
19814 | | /* DIAG */ |
19815 | | GR32, GR32, ADDR64, disp12imm64, |
19816 | | /* DIDBR */ |
19817 | | FP64, FP64, FP64, FP64, imm32zx4, |
19818 | | /* DIEBR */ |
19819 | | FP32, FP32, FP32, FP32, imm32zx4, |
19820 | | /* DL */ |
19821 | | GR128, GR128, ADDR64, disp20imm64, ADDR64, |
19822 | | /* DLG */ |
19823 | | GR128, GR128, ADDR64, disp20imm64, ADDR64, |
19824 | | /* DLGR */ |
19825 | | GR128, GR128, GR64, |
19826 | | /* DLR */ |
19827 | | GR128, GR128, GR32, |
19828 | | /* DP */ |
19829 | | ADDR64, disp12imm64, len4imm64, ADDR64, disp12imm64, len4imm64, |
19830 | | /* DR */ |
19831 | | GR128, GR128, GR32, |
19832 | | /* DSG */ |
19833 | | GR128, GR128, ADDR64, disp20imm64, ADDR64, |
19834 | | /* DSGF */ |
19835 | | GR128, GR128, ADDR64, disp20imm64, ADDR64, |
19836 | | /* DSGFR */ |
19837 | | GR128, GR128, GR32, |
19838 | | /* DSGR */ |
19839 | | GR128, GR128, GR64, |
19840 | | /* DXBR */ |
19841 | | FP128, FP128, FP128, |
19842 | | /* DXR */ |
19843 | | FP128, FP128, FP128, |
19844 | | /* DXTR */ |
19845 | | FP128, FP128, FP128, |
19846 | | /* DXTRA */ |
19847 | | FP128, FP128, FP128, imm32zx4, |
19848 | | /* EAR */ |
19849 | | GR32, AR32, |
19850 | | /* ECAG */ |
19851 | | GR64, GR64, ADDR32, disp20imm32, |
19852 | | /* ECCTR */ |
19853 | | GR64, GR64, |
19854 | | /* ECPGA */ |
19855 | | GR32, GR64, |
19856 | | /* ECTG */ |
19857 | | ADDR64, disp12imm64, ADDR64, disp12imm64, GR64, |
19858 | | /* ED */ |
19859 | | ADDR64, disp12imm64, len8imm64, ADDR64, disp12imm64, |
19860 | | /* EDMK */ |
19861 | | ADDR64, disp12imm64, len8imm64, ADDR64, disp12imm64, |
19862 | | /* EEDTR */ |
19863 | | FP64, FP64, |
19864 | | /* EEXTR */ |
19865 | | FP128, FP128, |
19866 | | /* EFPC */ |
19867 | | GR32, |
19868 | | /* EPAIR */ |
19869 | | GR64, |
19870 | | /* EPAR */ |
19871 | | GR32, |
19872 | | /* EPCTR */ |
19873 | | GR64, GR64, |
19874 | | /* EPSW */ |
19875 | | GR32, GR32, |
19876 | | /* EREG */ |
19877 | | GR32, GR32, |
19878 | | /* EREGG */ |
19879 | | GR64, GR64, |
19880 | | /* ESAIR */ |
19881 | | GR64, |
19882 | | /* ESAR */ |
19883 | | GR32, |
19884 | | /* ESDTR */ |
19885 | | FP64, FP64, |
19886 | | /* ESEA */ |
19887 | | GR32, GR32, |
19888 | | /* ESTA */ |
19889 | | GR128, GR32, |
19890 | | /* ESXTR */ |
19891 | | FP128, FP128, |
19892 | | /* ETND */ |
19893 | | GR32, |
19894 | | /* EX */ |
19895 | | ADDR64, ADDR64, disp12imm64, ADDR64, |
19896 | | /* EXRL */ |
19897 | | ADDR64, pcrel32, |
19898 | | /* FIDBR */ |
19899 | | FP64, imm32zx4, FP64, |
19900 | | /* FIDBRA */ |
19901 | | FP64, imm32zx4, FP64, imm32zx4, |
19902 | | /* FIDR */ |
19903 | | FP64, FP64, |
19904 | | /* FIDTR */ |
19905 | | FP64, imm32zx4, FP64, imm32zx4, |
19906 | | /* FIEBR */ |
19907 | | FP32, imm32zx4, FP32, |
19908 | | /* FIEBRA */ |
19909 | | FP32, imm32zx4, FP32, imm32zx4, |
19910 | | /* FIER */ |
19911 | | FP32, FP32, |
19912 | | /* FIXBR */ |
19913 | | FP128, imm32zx4, FP128, |
19914 | | /* FIXBRA */ |
19915 | | FP128, imm32zx4, FP128, imm32zx4, |
19916 | | /* FIXR */ |
19917 | | FP128, FP128, |
19918 | | /* FIXTR */ |
19919 | | FP128, imm32zx4, FP128, imm32zx4, |
19920 | | /* FLOGR */ |
19921 | | GR128, GR64, |
19922 | | /* HDR */ |
19923 | | FP64, FP64, |
19924 | | /* HER */ |
19925 | | FP32, FP32, |
19926 | | /* HSCH */ |
19927 | | /* IAC */ |
19928 | | GR32, |
19929 | | /* IC */ |
19930 | | GR64, GR64, ADDR64, disp12imm64, ADDR64, |
19931 | | /* IC32 */ |
19932 | | GR32, GR32, ADDR64, disp12imm64, ADDR64, |
19933 | | /* IC32Y */ |
19934 | | GR32, GR32, ADDR64, disp20imm64, ADDR64, |
19935 | | /* ICM */ |
19936 | | GR32, GR32, imm32zx4, ADDR64, disp12imm64, |
19937 | | /* ICMH */ |
19938 | | GRH32, GRH32, imm32zx4, ADDR64, disp20imm64, |
19939 | | /* ICMY */ |
19940 | | GR32, GR32, imm32zx4, ADDR64, disp20imm64, |
19941 | | /* ICY */ |
19942 | | GR64, GR64, ADDR64, disp20imm64, ADDR64, |
19943 | | /* IDTE */ |
19944 | | GR64, GR64, GR64, imm32zx4, |
19945 | | /* IDTEOpt */ |
19946 | | GR64, GR64, GR64, |
19947 | | /* IEDTR */ |
19948 | | FP64, FP64, FP64, |
19949 | | /* IEXTR */ |
19950 | | FP128, FP128, FP128, |
19951 | | /* IIHF */ |
19952 | | GRH32, uimm32, |
19953 | | /* IIHH */ |
19954 | | GRH32, GRH32, imm32lh16, |
19955 | | /* IIHL */ |
19956 | | GRH32, GRH32, imm32ll16, |
19957 | | /* IILF */ |
19958 | | GR32, uimm32, |
19959 | | /* IILH */ |
19960 | | GR32, GR32, imm32lh16, |
19961 | | /* IILL */ |
19962 | | GR32, GR32, imm32ll16, |
19963 | | /* IPK */ |
19964 | | /* IPM */ |
19965 | | GR32, |
19966 | | /* IPTE */ |
19967 | | GR64, GR32, GR32, imm32zx4, |
19968 | | /* IPTEOpt */ |
19969 | | GR64, GR32, GR32, |
19970 | | /* IPTEOptOpt */ |
19971 | | GR64, GR32, |
19972 | | /* IRBM */ |
19973 | | GR64, GR64, |
19974 | | /* ISKE */ |
19975 | | GR32, GR32, GR64, |
19976 | | /* IVSK */ |
19977 | | GR32, GR32, GR64, |
19978 | | /* InsnE */ |
19979 | | imm64zx16, |
19980 | | /* InsnRI */ |
19981 | | imm64zx32, AnyReg, imm32sx16, |
19982 | | /* InsnRIE */ |
19983 | | imm64zx48, AnyReg, AnyReg, brtarget16, |
19984 | | /* InsnRIL */ |
19985 | | imm64zx48, AnyReg, brtarget32, |
19986 | | /* InsnRILU */ |
19987 | | imm64zx48, AnyReg, uimm32, |
19988 | | /* InsnRIS */ |
19989 | | imm64zx48, AnyReg, imm32sx8, imm32zx4, ADDR64, disp12imm64, |
19990 | | /* InsnRR */ |
19991 | | imm64zx16, AnyReg, AnyReg, |
19992 | | /* InsnRRE */ |
19993 | | imm64zx32, AnyReg, AnyReg, |
19994 | | /* InsnRRF */ |
19995 | | imm64zx32, AnyReg, AnyReg, AnyReg, imm32zx4, |
19996 | | /* InsnRRS */ |
19997 | | imm64zx48, AnyReg, AnyReg, imm32zx4, ADDR64, disp12imm64, |
19998 | | /* InsnRS */ |
19999 | | imm64zx32, AnyReg, AnyReg, ADDR64, disp12imm64, |
20000 | | /* InsnRSE */ |
20001 | | imm64zx48, AnyReg, AnyReg, ADDR64, disp12imm64, |
20002 | | /* InsnRSI */ |
20003 | | imm64zx48, AnyReg, AnyReg, brtarget16, |
20004 | | /* InsnRSY */ |
20005 | | imm64zx48, AnyReg, AnyReg, ADDR64, disp20imm64, |
20006 | | /* InsnRX */ |
20007 | | imm64zx32, AnyReg, ADDR64, disp12imm64, ADDR64, |
20008 | | /* InsnRXE */ |
20009 | | imm64zx48, AnyReg, ADDR64, disp12imm64, ADDR64, |
20010 | | /* InsnRXF */ |
20011 | | imm64zx48, AnyReg, AnyReg, ADDR64, disp12imm64, ADDR64, |
20012 | | /* InsnRXY */ |
20013 | | imm64zx48, AnyReg, ADDR64, disp20imm64, ADDR64, |
20014 | | /* InsnS */ |
20015 | | imm64zx32, ADDR64, disp12imm64, |
20016 | | /* InsnSI */ |
20017 | | imm64zx32, ADDR64, disp12imm64, imm32sx8, |
20018 | | /* InsnSIL */ |
20019 | | imm64zx48, ADDR64, disp12imm64, imm32zx16, |
20020 | | /* InsnSIY */ |
20021 | | imm64zx48, ADDR64, disp20imm64, imm32zx8, |
20022 | | /* InsnSS */ |
20023 | | imm64zx48, ADDR64, disp12imm64, GR64, ADDR64, disp12imm64, AnyReg, |
20024 | | /* InsnSSE */ |
20025 | | imm64zx48, ADDR64, disp12imm64, ADDR64, disp12imm64, |
20026 | | /* InsnSSF */ |
20027 | | imm64zx48, ADDR64, disp12imm64, ADDR64, disp12imm64, AnyReg, |
20028 | | /* InsnVRI */ |
20029 | | imm64zx48, VR128, VR128, imm32zx12, imm32zx4, imm32zx4, |
20030 | | /* InsnVRR */ |
20031 | | imm64zx48, VR128, VR128, VR128, imm32zx4, imm32zx4, imm32zx4, |
20032 | | /* InsnVRS */ |
20033 | | imm64zx48, AnyReg, VR128, ADDR64, disp12imm64, imm32zx4, |
20034 | | /* InsnVRV */ |
20035 | | imm64zx48, VR128, ADDR64, disp12imm64, VR128, imm32zx4, |
20036 | | /* InsnVRX */ |
20037 | | imm64zx48, VR128, ADDR64, disp12imm64, ADDR64, imm32zx4, |
20038 | | /* InsnVSI */ |
20039 | | imm64zx48, VR128, ADDR64, disp12imm64, imm32zx8, |
20040 | | /* J */ |
20041 | | brtarget16, |
20042 | | /* JAsmE */ |
20043 | | brtarget16, |
20044 | | /* JAsmH */ |
20045 | | brtarget16, |
20046 | | /* JAsmHE */ |
20047 | | brtarget16, |
20048 | | /* JAsmL */ |
20049 | | brtarget16, |
20050 | | /* JAsmLE */ |
20051 | | brtarget16, |
20052 | | /* JAsmLH */ |
20053 | | brtarget16, |
20054 | | /* JAsmM */ |
20055 | | brtarget16, |
20056 | | /* JAsmNE */ |
20057 | | brtarget16, |
20058 | | /* JAsmNH */ |
20059 | | brtarget16, |
20060 | | /* JAsmNHE */ |
20061 | | brtarget16, |
20062 | | /* JAsmNL */ |
20063 | | brtarget16, |
20064 | | /* JAsmNLE */ |
20065 | | brtarget16, |
20066 | | /* JAsmNLH */ |
20067 | | brtarget16, |
20068 | | /* JAsmNM */ |
20069 | | brtarget16, |
20070 | | /* JAsmNO */ |
20071 | | brtarget16, |
20072 | | /* JAsmNP */ |
20073 | | brtarget16, |
20074 | | /* JAsmNZ */ |
20075 | | brtarget16, |
20076 | | /* JAsmO */ |
20077 | | brtarget16, |
20078 | | /* JAsmP */ |
20079 | | brtarget16, |
20080 | | /* JAsmZ */ |
20081 | | brtarget16, |
20082 | | /* JG */ |
20083 | | brtarget32, |
20084 | | /* JGAsmE */ |
20085 | | brtarget32, |
20086 | | /* JGAsmH */ |
20087 | | brtarget32, |
20088 | | /* JGAsmHE */ |
20089 | | brtarget32, |
20090 | | /* JGAsmL */ |
20091 | | brtarget32, |
20092 | | /* JGAsmLE */ |
20093 | | brtarget32, |
20094 | | /* JGAsmLH */ |
20095 | | brtarget32, |
20096 | | /* JGAsmM */ |
20097 | | brtarget32, |
20098 | | /* JGAsmNE */ |
20099 | | brtarget32, |
20100 | | /* JGAsmNH */ |
20101 | | brtarget32, |
20102 | | /* JGAsmNHE */ |
20103 | | brtarget32, |
20104 | | /* JGAsmNL */ |
20105 | | brtarget32, |
20106 | | /* JGAsmNLE */ |
20107 | | brtarget32, |
20108 | | /* JGAsmNLH */ |
20109 | | brtarget32, |
20110 | | /* JGAsmNM */ |
20111 | | brtarget32, |
20112 | | /* JGAsmNO */ |
20113 | | brtarget32, |
20114 | | /* JGAsmNP */ |
20115 | | brtarget32, |
20116 | | /* JGAsmNZ */ |
20117 | | brtarget32, |
20118 | | /* JGAsmO */ |
20119 | | brtarget32, |
20120 | | /* JGAsmP */ |
20121 | | brtarget32, |
20122 | | /* JGAsmZ */ |
20123 | | brtarget32, |
20124 | | /* KDB */ |
20125 | | FP64, ADDR64, disp12imm64, ADDR64, |
20126 | | /* KDBR */ |
20127 | | FP64, FP64, |
20128 | | /* KDSA */ |
20129 | | GR128, GR64, GR128, |
20130 | | /* KDTR */ |
20131 | | FP64, FP64, |
20132 | | /* KEB */ |
20133 | | FP32, ADDR64, disp12imm64, ADDR64, |
20134 | | /* KEBR */ |
20135 | | FP32, FP32, |
20136 | | /* KIMD */ |
20137 | | GR128, GR64, GR128, |
20138 | | /* KLMD */ |
20139 | | GR128, GR64, GR128, |
20140 | | /* KM */ |
20141 | | GR128, GR128, GR128, GR128, |
20142 | | /* KMA */ |
20143 | | GR128, GR128, GR128, GR128, GR128, GR128, |
20144 | | /* KMAC */ |
20145 | | GR128, GR64, GR128, |
20146 | | /* KMC */ |
20147 | | GR128, GR128, GR128, GR128, |
20148 | | /* KMCTR */ |
20149 | | GR128, GR128, GR128, GR128, GR128, GR128, |
20150 | | /* KMF */ |
20151 | | GR128, GR128, GR128, GR128, |
20152 | | /* KMO */ |
20153 | | GR128, GR128, GR128, GR128, |
20154 | | /* KXBR */ |
20155 | | FP128, FP128, |
20156 | | /* KXTR */ |
20157 | | FP128, FP128, |
20158 | | /* L */ |
20159 | | GR32, ADDR64, disp12imm64, ADDR64, |
20160 | | /* LA */ |
20161 | | GR64, ADDR64, disp12imm64, ADDR64, |
20162 | | /* LAA */ |
20163 | | GR32, GR32, ADDR64, disp20imm64, |
20164 | | /* LAAG */ |
20165 | | GR64, GR64, ADDR64, disp20imm64, |
20166 | | /* LAAL */ |
20167 | | GR32, GR32, ADDR64, disp20imm64, |
20168 | | /* LAALG */ |
20169 | | GR64, GR64, ADDR64, disp20imm64, |
20170 | | /* LAE */ |
20171 | | GR64, ADDR64, disp12imm64, ADDR64, |
20172 | | /* LAEY */ |
20173 | | GR64, ADDR64, disp20imm64, ADDR64, |
20174 | | /* LAM */ |
20175 | | AR32, AR32, ADDR64, disp12imm64, |
20176 | | /* LAMY */ |
20177 | | AR32, AR32, ADDR64, disp20imm64, |
20178 | | /* LAN */ |
20179 | | GR32, GR32, ADDR64, disp20imm64, |
20180 | | /* LANG */ |
20181 | | GR64, GR64, ADDR64, disp20imm64, |
20182 | | /* LAO */ |
20183 | | GR32, GR32, ADDR64, disp20imm64, |
20184 | | /* LAOG */ |
20185 | | GR64, GR64, ADDR64, disp20imm64, |
20186 | | /* LARL */ |
20187 | | GR64, pcrel32, |
20188 | | /* LASP */ |
20189 | | ADDR64, disp12imm64, ADDR64, disp12imm64, |
20190 | | /* LAT */ |
20191 | | GR32, ADDR64, disp20imm64, ADDR64, |
20192 | | /* LAX */ |
20193 | | GR32, GR32, ADDR64, disp20imm64, |
20194 | | /* LAXG */ |
20195 | | GR64, GR64, ADDR64, disp20imm64, |
20196 | | /* LAY */ |
20197 | | GR64, ADDR64, disp20imm64, ADDR64, |
20198 | | /* LB */ |
20199 | | GR32, ADDR64, disp20imm64, ADDR64, |
20200 | | /* LBEAR */ |
20201 | | ADDR64, disp12imm64, |
20202 | | /* LBH */ |
20203 | | GRH32, ADDR64, disp20imm64, ADDR64, |
20204 | | /* LBR */ |
20205 | | GR32, GR32, |
20206 | | /* LCBB */ |
20207 | | GR32, ADDR64, disp12imm64, ADDR64, imm32zx4, |
20208 | | /* LCCTL */ |
20209 | | ADDR64, disp12imm64, |
20210 | | /* LCDBR */ |
20211 | | FP64, FP64, |
20212 | | /* LCDFR */ |
20213 | | FP64, FP64, |
20214 | | /* LCDFR_32 */ |
20215 | | FP32, FP32, |
20216 | | /* LCDR */ |
20217 | | FP64, FP64, |
20218 | | /* LCEBR */ |
20219 | | FP32, FP32, |
20220 | | /* LCER */ |
20221 | | FP32, FP32, |
20222 | | /* LCGFR */ |
20223 | | GR64, GR32, |
20224 | | /* LCGR */ |
20225 | | GR64, GR64, |
20226 | | /* LCR */ |
20227 | | GR32, GR32, |
20228 | | /* LCTL */ |
20229 | | CR64, CR64, ADDR64, disp12imm64, |
20230 | | /* LCTLG */ |
20231 | | CR64, CR64, ADDR64, disp20imm64, |
20232 | | /* LCXBR */ |
20233 | | FP128, FP128, |
20234 | | /* LCXR */ |
20235 | | FP128, FP128, |
20236 | | /* LD */ |
20237 | | FP64, ADDR64, disp12imm64, ADDR64, |
20238 | | /* LDE */ |
20239 | | FP64, ADDR64, disp12imm64, ADDR64, |
20240 | | /* LDE32 */ |
20241 | | FP32, ADDR64, disp12imm64, ADDR64, |
20242 | | /* LDEB */ |
20243 | | FP64, ADDR64, disp12imm64, ADDR64, |
20244 | | /* LDEBR */ |
20245 | | FP64, FP32, |
20246 | | /* LDER */ |
20247 | | FP64, FP32, |
20248 | | /* LDETR */ |
20249 | | FP64, FP32, imm32zx4, |
20250 | | /* LDGR */ |
20251 | | FP64, GR64, |
20252 | | /* LDR */ |
20253 | | FP64, FP64, |
20254 | | /* LDR32 */ |
20255 | | FP32, FP32, |
20256 | | /* LDXBR */ |
20257 | | FP128, FP128, |
20258 | | /* LDXBRA */ |
20259 | | FP128, imm32zx4, FP128, imm32zx4, |
20260 | | /* LDXR */ |
20261 | | FP64, FP128, |
20262 | | /* LDXTR */ |
20263 | | FP128, imm32zx4, FP128, imm32zx4, |
20264 | | /* LDY */ |
20265 | | FP64, ADDR64, disp20imm64, ADDR64, |
20266 | | /* LE */ |
20267 | | FP32, ADDR64, disp12imm64, ADDR64, |
20268 | | /* LEDBR */ |
20269 | | FP32, FP64, |
20270 | | /* LEDBRA */ |
20271 | | FP32, imm32zx4, FP64, imm32zx4, |
20272 | | /* LEDR */ |
20273 | | FP32, FP64, |
20274 | | /* LEDTR */ |
20275 | | FP32, imm32zx4, FP64, imm32zx4, |
20276 | | /* LER */ |
20277 | | FP32, FP32, |
20278 | | /* LEXBR */ |
20279 | | FP128, FP128, |
20280 | | /* LEXBRA */ |
20281 | | FP128, imm32zx4, FP128, imm32zx4, |
20282 | | /* LEXR */ |
20283 | | FP32, FP128, |
20284 | | /* LEY */ |
20285 | | FP32, ADDR64, disp20imm64, ADDR64, |
20286 | | /* LFAS */ |
20287 | | ADDR64, disp12imm64, |
20288 | | /* LFH */ |
20289 | | GRH32, ADDR64, disp20imm64, ADDR64, |
20290 | | /* LFHAT */ |
20291 | | GRH32, ADDR64, disp20imm64, ADDR64, |
20292 | | /* LFPC */ |
20293 | | ADDR64, disp12imm64, |
20294 | | /* LG */ |
20295 | | GR64, ADDR64, disp20imm64, ADDR64, |
20296 | | /* LGAT */ |
20297 | | GR64, ADDR64, disp20imm64, ADDR64, |
20298 | | /* LGB */ |
20299 | | GR64, ADDR64, disp20imm64, ADDR64, |
20300 | | /* LGBR */ |
20301 | | GR64, GR64, |
20302 | | /* LGDR */ |
20303 | | GR64, FP64, |
20304 | | /* LGF */ |
20305 | | GR64, ADDR64, disp20imm64, ADDR64, |
20306 | | /* LGFI */ |
20307 | | GR64, imm64sx32, |
20308 | | /* LGFR */ |
20309 | | GR64, GR32, |
20310 | | /* LGFRL */ |
20311 | | GR64, pcrel32, |
20312 | | /* LGG */ |
20313 | | GR64, ADDR64, disp20imm64, ADDR64, |
20314 | | /* LGH */ |
20315 | | GR64, ADDR64, disp20imm64, ADDR64, |
20316 | | /* LGHI */ |
20317 | | GR64, imm64sx16, |
20318 | | /* LGHR */ |
20319 | | GR64, GR64, |
20320 | | /* LGHRL */ |
20321 | | GR64, pcrel32, |
20322 | | /* LGR */ |
20323 | | GR64, GR64, |
20324 | | /* LGRL */ |
20325 | | GR64, pcrel32, |
20326 | | /* LGSC */ |
20327 | | GR64, ADDR64, disp20imm64, ADDR64, |
20328 | | /* LH */ |
20329 | | GR32, ADDR64, disp12imm64, ADDR64, |
20330 | | /* LHH */ |
20331 | | GRH32, ADDR64, disp20imm64, ADDR64, |
20332 | | /* LHI */ |
20333 | | GR32, imm32sx16, |
20334 | | /* LHR */ |
20335 | | GR32, GR32, |
20336 | | /* LHRL */ |
20337 | | GR32, pcrel32, |
20338 | | /* LHY */ |
20339 | | GR32, ADDR64, disp20imm64, ADDR64, |
20340 | | /* LLC */ |
20341 | | GR32, ADDR64, disp20imm64, ADDR64, |
20342 | | /* LLCH */ |
20343 | | GRH32, ADDR64, disp20imm64, ADDR64, |
20344 | | /* LLCR */ |
20345 | | GR32, GR32, |
20346 | | /* LLGC */ |
20347 | | GR64, ADDR64, disp20imm64, ADDR64, |
20348 | | /* LLGCR */ |
20349 | | GR64, GR64, |
20350 | | /* LLGF */ |
20351 | | GR64, ADDR64, disp20imm64, ADDR64, |
20352 | | /* LLGFAT */ |
20353 | | GR64, ADDR64, disp20imm64, ADDR64, |
20354 | | /* LLGFR */ |
20355 | | GR64, GR32, |
20356 | | /* LLGFRL */ |
20357 | | GR64, pcrel32, |
20358 | | /* LLGFSG */ |
20359 | | GR64, ADDR64, disp20imm64, ADDR64, |
20360 | | /* LLGH */ |
20361 | | GR64, ADDR64, disp20imm64, ADDR64, |
20362 | | /* LLGHR */ |
20363 | | GR64, GR64, |
20364 | | /* LLGHRL */ |
20365 | | GR64, pcrel32, |
20366 | | /* LLGT */ |
20367 | | GR64, ADDR64, disp20imm64, ADDR64, |
20368 | | /* LLGTAT */ |
20369 | | GR64, ADDR64, disp20imm64, ADDR64, |
20370 | | /* LLGTR */ |
20371 | | GR64, GR64, |
20372 | | /* LLH */ |
20373 | | GR32, ADDR64, disp20imm64, ADDR64, |
20374 | | /* LLHH */ |
20375 | | GRH32, ADDR64, disp20imm64, ADDR64, |
20376 | | /* LLHR */ |
20377 | | GR32, GR32, |
20378 | | /* LLHRL */ |
20379 | | GR32, pcrel32, |
20380 | | /* LLIHF */ |
20381 | | GR64, imm64hf32, |
20382 | | /* LLIHH */ |
20383 | | GR64, imm64hh16, |
20384 | | /* LLIHL */ |
20385 | | GR64, imm64hl16, |
20386 | | /* LLILF */ |
20387 | | GR64, imm64lf32, |
20388 | | /* LLILH */ |
20389 | | GR64, imm64lh16, |
20390 | | /* LLILL */ |
20391 | | GR64, imm64ll16, |
20392 | | /* LLZRGF */ |
20393 | | GR64, ADDR64, disp20imm64, ADDR64, |
20394 | | /* LM */ |
20395 | | GR32, GR32, ADDR64, disp12imm64, |
20396 | | /* LMD */ |
20397 | | GR64, GR64, ADDR64, disp12imm64, ADDR64, disp12imm64, |
20398 | | /* LMG */ |
20399 | | GR64, GR64, ADDR64, disp20imm64, |
20400 | | /* LMH */ |
20401 | | GRH32, GRH32, ADDR64, disp20imm64, |
20402 | | /* LMY */ |
20403 | | GR32, GR32, ADDR64, disp20imm64, |
20404 | | /* LNDBR */ |
20405 | | FP64, FP64, |
20406 | | /* LNDFR */ |
20407 | | FP64, FP64, |
20408 | | /* LNDFR_32 */ |
20409 | | FP32, FP32, |
20410 | | /* LNDR */ |
20411 | | FP64, FP64, |
20412 | | /* LNEBR */ |
20413 | | FP32, FP32, |
20414 | | /* LNER */ |
20415 | | FP32, FP32, |
20416 | | /* LNGFR */ |
20417 | | GR64, GR32, |
20418 | | /* LNGR */ |
20419 | | GR64, GR64, |
20420 | | /* LNR */ |
20421 | | GR32, GR32, |
20422 | | /* LNXBR */ |
20423 | | FP128, FP128, |
20424 | | /* LNXR */ |
20425 | | FP128, FP128, |
20426 | | /* LOC */ |
20427 | | GR32, GR32, ADDR64, disp20imm64, cond4, cond4, |
20428 | | /* LOCAsm */ |
20429 | | GR32, GR32, ADDR64, disp20imm64, imm32zx4, |
20430 | | /* LOCAsmE */ |
20431 | | GR32, GR32, ADDR64, disp20imm64, |
20432 | | /* LOCAsmH */ |
20433 | | GR32, GR32, ADDR64, disp20imm64, |
20434 | | /* LOCAsmHE */ |
20435 | | GR32, GR32, ADDR64, disp20imm64, |
20436 | | /* LOCAsmL */ |
20437 | | GR32, GR32, ADDR64, disp20imm64, |
20438 | | /* LOCAsmLE */ |
20439 | | GR32, GR32, ADDR64, disp20imm64, |
20440 | | /* LOCAsmLH */ |
20441 | | GR32, GR32, ADDR64, disp20imm64, |
20442 | | /* LOCAsmM */ |
20443 | | GR32, GR32, ADDR64, disp20imm64, |
20444 | | /* LOCAsmNE */ |
20445 | | GR32, GR32, ADDR64, disp20imm64, |
20446 | | /* LOCAsmNH */ |
20447 | | GR32, GR32, ADDR64, disp20imm64, |
20448 | | /* LOCAsmNHE */ |
20449 | | GR32, GR32, ADDR64, disp20imm64, |
20450 | | /* LOCAsmNL */ |
20451 | | GR32, GR32, ADDR64, disp20imm64, |
20452 | | /* LOCAsmNLE */ |
20453 | | GR32, GR32, ADDR64, disp20imm64, |
20454 | | /* LOCAsmNLH */ |
20455 | | GR32, GR32, ADDR64, disp20imm64, |
20456 | | /* LOCAsmNM */ |
20457 | | GR32, GR32, ADDR64, disp20imm64, |
20458 | | /* LOCAsmNO */ |
20459 | | GR32, GR32, ADDR64, disp20imm64, |
20460 | | /* LOCAsmNP */ |
20461 | | GR32, GR32, ADDR64, disp20imm64, |
20462 | | /* LOCAsmNZ */ |
20463 | | GR32, GR32, ADDR64, disp20imm64, |
20464 | | /* LOCAsmO */ |
20465 | | GR32, GR32, ADDR64, disp20imm64, |
20466 | | /* LOCAsmP */ |
20467 | | GR32, GR32, ADDR64, disp20imm64, |
20468 | | /* LOCAsmZ */ |
20469 | | GR32, GR32, ADDR64, disp20imm64, |
20470 | | /* LOCFH */ |
20471 | | GRH32, GRH32, ADDR64, disp20imm64, cond4, cond4, |
20472 | | /* LOCFHAsm */ |
20473 | | GRH32, GRH32, ADDR64, disp20imm64, imm32zx4, |
20474 | | /* LOCFHAsmE */ |
20475 | | GRH32, GRH32, ADDR64, disp20imm64, |
20476 | | /* LOCFHAsmH */ |
20477 | | GRH32, GRH32, ADDR64, disp20imm64, |
20478 | | /* LOCFHAsmHE */ |
20479 | | GRH32, GRH32, ADDR64, disp20imm64, |
20480 | | /* LOCFHAsmL */ |
20481 | | GRH32, GRH32, ADDR64, disp20imm64, |
20482 | | /* LOCFHAsmLE */ |
20483 | | GRH32, GRH32, ADDR64, disp20imm64, |
20484 | | /* LOCFHAsmLH */ |
20485 | | GRH32, GRH32, ADDR64, disp20imm64, |
20486 | | /* LOCFHAsmM */ |
20487 | | GRH32, GRH32, ADDR64, disp20imm64, |
20488 | | /* LOCFHAsmNE */ |
20489 | | GRH32, GRH32, ADDR64, disp20imm64, |
20490 | | /* LOCFHAsmNH */ |
20491 | | GRH32, GRH32, ADDR64, disp20imm64, |
20492 | | /* LOCFHAsmNHE */ |
20493 | | GRH32, GRH32, ADDR64, disp20imm64, |
20494 | | /* LOCFHAsmNL */ |
20495 | | GRH32, GRH32, ADDR64, disp20imm64, |
20496 | | /* LOCFHAsmNLE */ |
20497 | | GRH32, GRH32, ADDR64, disp20imm64, |
20498 | | /* LOCFHAsmNLH */ |
20499 | | GRH32, GRH32, ADDR64, disp20imm64, |
20500 | | /* LOCFHAsmNM */ |
20501 | | GRH32, GRH32, ADDR64, disp20imm64, |
20502 | | /* LOCFHAsmNO */ |
20503 | | GRH32, GRH32, ADDR64, disp20imm64, |
20504 | | /* LOCFHAsmNP */ |
20505 | | GRH32, GRH32, ADDR64, disp20imm64, |
20506 | | /* LOCFHAsmNZ */ |
20507 | | GRH32, GRH32, ADDR64, disp20imm64, |
20508 | | /* LOCFHAsmO */ |
20509 | | GRH32, GRH32, ADDR64, disp20imm64, |
20510 | | /* LOCFHAsmP */ |
20511 | | GRH32, GRH32, ADDR64, disp20imm64, |
20512 | | /* LOCFHAsmZ */ |
20513 | | GRH32, GRH32, ADDR64, disp20imm64, |
20514 | | /* LOCFHR */ |
20515 | | GRH32, GRH32, GRH32, cond4, cond4, |
20516 | | /* LOCFHRAsm */ |
20517 | | GRH32, GRH32, GRH32, imm32zx4, |
20518 | | /* LOCFHRAsmE */ |
20519 | | GRH32, GRH32, GRH32, |
20520 | | /* LOCFHRAsmH */ |
20521 | | GRH32, GRH32, GRH32, |
20522 | | /* LOCFHRAsmHE */ |
20523 | | GRH32, GRH32, GRH32, |
20524 | | /* LOCFHRAsmL */ |
20525 | | GRH32, GRH32, GRH32, |
20526 | | /* LOCFHRAsmLE */ |
20527 | | GRH32, GRH32, GRH32, |
20528 | | /* LOCFHRAsmLH */ |
20529 | | GRH32, GRH32, GRH32, |
20530 | | /* LOCFHRAsmM */ |
20531 | | GRH32, GRH32, GRH32, |
20532 | | /* LOCFHRAsmNE */ |
20533 | | GRH32, GRH32, GRH32, |
20534 | | /* LOCFHRAsmNH */ |
20535 | | GRH32, GRH32, GRH32, |
20536 | | /* LOCFHRAsmNHE */ |
20537 | | GRH32, GRH32, GRH32, |
20538 | | /* LOCFHRAsmNL */ |
20539 | | GRH32, GRH32, GRH32, |
20540 | | /* LOCFHRAsmNLE */ |
20541 | | GRH32, GRH32, GRH32, |
20542 | | /* LOCFHRAsmNLH */ |
20543 | | GRH32, GRH32, GRH32, |
20544 | | /* LOCFHRAsmNM */ |
20545 | | GRH32, GRH32, GRH32, |
20546 | | /* LOCFHRAsmNO */ |
20547 | | GRH32, GRH32, GRH32, |
20548 | | /* LOCFHRAsmNP */ |
20549 | | GRH32, GRH32, GRH32, |
20550 | | /* LOCFHRAsmNZ */ |
20551 | | GRH32, GRH32, GRH32, |
20552 | | /* LOCFHRAsmO */ |
20553 | | GRH32, GRH32, GRH32, |
20554 | | /* LOCFHRAsmP */ |
20555 | | GRH32, GRH32, GRH32, |
20556 | | /* LOCFHRAsmZ */ |
20557 | | GRH32, GRH32, GRH32, |
20558 | | /* LOCG */ |
20559 | | GR64, GR64, ADDR64, disp20imm64, cond4, cond4, |
20560 | | /* LOCGAsm */ |
20561 | | GR64, GR64, ADDR64, disp20imm64, imm32zx4, |
20562 | | /* LOCGAsmE */ |
20563 | | GR64, GR64, ADDR64, disp20imm64, |
20564 | | /* LOCGAsmH */ |
20565 | | GR64, GR64, ADDR64, disp20imm64, |
20566 | | /* LOCGAsmHE */ |
20567 | | GR64, GR64, ADDR64, disp20imm64, |
20568 | | /* LOCGAsmL */ |
20569 | | GR64, GR64, ADDR64, disp20imm64, |
20570 | | /* LOCGAsmLE */ |
20571 | | GR64, GR64, ADDR64, disp20imm64, |
20572 | | /* LOCGAsmLH */ |
20573 | | GR64, GR64, ADDR64, disp20imm64, |
20574 | | /* LOCGAsmM */ |
20575 | | GR64, GR64, ADDR64, disp20imm64, |
20576 | | /* LOCGAsmNE */ |
20577 | | GR64, GR64, ADDR64, disp20imm64, |
20578 | | /* LOCGAsmNH */ |
20579 | | GR64, GR64, ADDR64, disp20imm64, |
20580 | | /* LOCGAsmNHE */ |
20581 | | GR64, GR64, ADDR64, disp20imm64, |
20582 | | /* LOCGAsmNL */ |
20583 | | GR64, GR64, ADDR64, disp20imm64, |
20584 | | /* LOCGAsmNLE */ |
20585 | | GR64, GR64, ADDR64, disp20imm64, |
20586 | | /* LOCGAsmNLH */ |
20587 | | GR64, GR64, ADDR64, disp20imm64, |
20588 | | /* LOCGAsmNM */ |
20589 | | GR64, GR64, ADDR64, disp20imm64, |
20590 | | /* LOCGAsmNO */ |
20591 | | GR64, GR64, ADDR64, disp20imm64, |
20592 | | /* LOCGAsmNP */ |
20593 | | GR64, GR64, ADDR64, disp20imm64, |
20594 | | /* LOCGAsmNZ */ |
20595 | | GR64, GR64, ADDR64, disp20imm64, |
20596 | | /* LOCGAsmO */ |
20597 | | GR64, GR64, ADDR64, disp20imm64, |
20598 | | /* LOCGAsmP */ |
20599 | | GR64, GR64, ADDR64, disp20imm64, |
20600 | | /* LOCGAsmZ */ |
20601 | | GR64, GR64, ADDR64, disp20imm64, |
20602 | | /* LOCGHI */ |
20603 | | GR64, GR64, imm64sx16, cond4, cond4, |
20604 | | /* LOCGHIAsm */ |
20605 | | GR64, GR64, imm64sx16, imm32zx4, |
20606 | | /* LOCGHIAsmE */ |
20607 | | GR64, GR64, imm64sx16, |
20608 | | /* LOCGHIAsmH */ |
20609 | | GR64, GR64, imm64sx16, |
20610 | | /* LOCGHIAsmHE */ |
20611 | | GR64, GR64, imm64sx16, |
20612 | | /* LOCGHIAsmL */ |
20613 | | GR64, GR64, imm64sx16, |
20614 | | /* LOCGHIAsmLE */ |
20615 | | GR64, GR64, imm64sx16, |
20616 | | /* LOCGHIAsmLH */ |
20617 | | GR64, GR64, imm64sx16, |
20618 | | /* LOCGHIAsmM */ |
20619 | | GR64, GR64, imm64sx16, |
20620 | | /* LOCGHIAsmNE */ |
20621 | | GR64, GR64, imm64sx16, |
20622 | | /* LOCGHIAsmNH */ |
20623 | | GR64, GR64, imm64sx16, |
20624 | | /* LOCGHIAsmNHE */ |
20625 | | GR64, GR64, imm64sx16, |
20626 | | /* LOCGHIAsmNL */ |
20627 | | GR64, GR64, imm64sx16, |
20628 | | /* LOCGHIAsmNLE */ |
20629 | | GR64, GR64, imm64sx16, |
20630 | | /* LOCGHIAsmNLH */ |
20631 | | GR64, GR64, imm64sx16, |
20632 | | /* LOCGHIAsmNM */ |
20633 | | GR64, GR64, imm64sx16, |
20634 | | /* LOCGHIAsmNO */ |
20635 | | GR64, GR64, imm64sx16, |
20636 | | /* LOCGHIAsmNP */ |
20637 | | GR64, GR64, imm64sx16, |
20638 | | /* LOCGHIAsmNZ */ |
20639 | | GR64, GR64, imm64sx16, |
20640 | | /* LOCGHIAsmO */ |
20641 | | GR64, GR64, imm64sx16, |
20642 | | /* LOCGHIAsmP */ |
20643 | | GR64, GR64, imm64sx16, |
20644 | | /* LOCGHIAsmZ */ |
20645 | | GR64, GR64, imm64sx16, |
20646 | | /* LOCGR */ |
20647 | | GR64, GR64, GR64, cond4, cond4, |
20648 | | /* LOCGRAsm */ |
20649 | | GR64, GR64, GR64, imm32zx4, |
20650 | | /* LOCGRAsmE */ |
20651 | | GR64, GR64, GR64, |
20652 | | /* LOCGRAsmH */ |
20653 | | GR64, GR64, GR64, |
20654 | | /* LOCGRAsmHE */ |
20655 | | GR64, GR64, GR64, |
20656 | | /* LOCGRAsmL */ |
20657 | | GR64, GR64, GR64, |
20658 | | /* LOCGRAsmLE */ |
20659 | | GR64, GR64, GR64, |
20660 | | /* LOCGRAsmLH */ |
20661 | | GR64, GR64, GR64, |
20662 | | /* LOCGRAsmM */ |
20663 | | GR64, GR64, GR64, |
20664 | | /* LOCGRAsmNE */ |
20665 | | GR64, GR64, GR64, |
20666 | | /* LOCGRAsmNH */ |
20667 | | GR64, GR64, GR64, |
20668 | | /* LOCGRAsmNHE */ |
20669 | | GR64, GR64, GR64, |
20670 | | /* LOCGRAsmNL */ |
20671 | | GR64, GR64, GR64, |
20672 | | /* LOCGRAsmNLE */ |
20673 | | GR64, GR64, GR64, |
20674 | | /* LOCGRAsmNLH */ |
20675 | | GR64, GR64, GR64, |
20676 | | /* LOCGRAsmNM */ |
20677 | | GR64, GR64, GR64, |
20678 | | /* LOCGRAsmNO */ |
20679 | | GR64, GR64, GR64, |
20680 | | /* LOCGRAsmNP */ |
20681 | | GR64, GR64, GR64, |
20682 | | /* LOCGRAsmNZ */ |
20683 | | GR64, GR64, GR64, |
20684 | | /* LOCGRAsmO */ |
20685 | | GR64, GR64, GR64, |
20686 | | /* LOCGRAsmP */ |
20687 | | GR64, GR64, GR64, |
20688 | | /* LOCGRAsmZ */ |
20689 | | GR64, GR64, GR64, |
20690 | | /* LOCHHI */ |
20691 | | GRH32, GRH32, imm32sx16, cond4, cond4, |
20692 | | /* LOCHHIAsm */ |
20693 | | GRH32, GRH32, imm32sx16, imm32zx4, |
20694 | | /* LOCHHIAsmE */ |
20695 | | GRH32, GRH32, imm32sx16, |
20696 | | /* LOCHHIAsmH */ |
20697 | | GRH32, GRH32, imm32sx16, |
20698 | | /* LOCHHIAsmHE */ |
20699 | | GRH32, GRH32, imm32sx16, |
20700 | | /* LOCHHIAsmL */ |
20701 | | GRH32, GRH32, imm32sx16, |
20702 | | /* LOCHHIAsmLE */ |
20703 | | GRH32, GRH32, imm32sx16, |
20704 | | /* LOCHHIAsmLH */ |
20705 | | GRH32, GRH32, imm32sx16, |
20706 | | /* LOCHHIAsmM */ |
20707 | | GRH32, GRH32, imm32sx16, |
20708 | | /* LOCHHIAsmNE */ |
20709 | | GRH32, GRH32, imm32sx16, |
20710 | | /* LOCHHIAsmNH */ |
20711 | | GRH32, GRH32, imm32sx16, |
20712 | | /* LOCHHIAsmNHE */ |
20713 | | GRH32, GRH32, imm32sx16, |
20714 | | /* LOCHHIAsmNL */ |
20715 | | GRH32, GRH32, imm32sx16, |
20716 | | /* LOCHHIAsmNLE */ |
20717 | | GRH32, GRH32, imm32sx16, |
20718 | | /* LOCHHIAsmNLH */ |
20719 | | GRH32, GRH32, imm32sx16, |
20720 | | /* LOCHHIAsmNM */ |
20721 | | GRH32, GRH32, imm32sx16, |
20722 | | /* LOCHHIAsmNO */ |
20723 | | GRH32, GRH32, imm32sx16, |
20724 | | /* LOCHHIAsmNP */ |
20725 | | GRH32, GRH32, imm32sx16, |
20726 | | /* LOCHHIAsmNZ */ |
20727 | | GRH32, GRH32, imm32sx16, |
20728 | | /* LOCHHIAsmO */ |
20729 | | GRH32, GRH32, imm32sx16, |
20730 | | /* LOCHHIAsmP */ |
20731 | | GRH32, GRH32, imm32sx16, |
20732 | | /* LOCHHIAsmZ */ |
20733 | | GRH32, GRH32, imm32sx16, |
20734 | | /* LOCHI */ |
20735 | | GR32, GR32, imm32sx16, cond4, cond4, |
20736 | | /* LOCHIAsm */ |
20737 | | GR32, GR32, imm32sx16, imm32zx4, |
20738 | | /* LOCHIAsmE */ |
20739 | | GR32, GR32, imm32sx16, |
20740 | | /* LOCHIAsmH */ |
20741 | | GR32, GR32, imm32sx16, |
20742 | | /* LOCHIAsmHE */ |
20743 | | GR32, GR32, imm32sx16, |
20744 | | /* LOCHIAsmL */ |
20745 | | GR32, GR32, imm32sx16, |
20746 | | /* LOCHIAsmLE */ |
20747 | | GR32, GR32, imm32sx16, |
20748 | | /* LOCHIAsmLH */ |
20749 | | GR32, GR32, imm32sx16, |
20750 | | /* LOCHIAsmM */ |
20751 | | GR32, GR32, imm32sx16, |
20752 | | /* LOCHIAsmNE */ |
20753 | | GR32, GR32, imm32sx16, |
20754 | | /* LOCHIAsmNH */ |
20755 | | GR32, GR32, imm32sx16, |
20756 | | /* LOCHIAsmNHE */ |
20757 | | GR32, GR32, imm32sx16, |
20758 | | /* LOCHIAsmNL */ |
20759 | | GR32, GR32, imm32sx16, |
20760 | | /* LOCHIAsmNLE */ |
20761 | | GR32, GR32, imm32sx16, |
20762 | | /* LOCHIAsmNLH */ |
20763 | | GR32, GR32, imm32sx16, |
20764 | | /* LOCHIAsmNM */ |
20765 | | GR32, GR32, imm32sx16, |
20766 | | /* LOCHIAsmNO */ |
20767 | | GR32, GR32, imm32sx16, |
20768 | | /* LOCHIAsmNP */ |
20769 | | GR32, GR32, imm32sx16, |
20770 | | /* LOCHIAsmNZ */ |
20771 | | GR32, GR32, imm32sx16, |
20772 | | /* LOCHIAsmO */ |
20773 | | GR32, GR32, imm32sx16, |
20774 | | /* LOCHIAsmP */ |
20775 | | GR32, GR32, imm32sx16, |
20776 | | /* LOCHIAsmZ */ |
20777 | | GR32, GR32, imm32sx16, |
20778 | | /* LOCR */ |
20779 | | GR32, GR32, GR32, cond4, cond4, |
20780 | | /* LOCRAsm */ |
20781 | | GR32, GR32, GR32, imm32zx4, |
20782 | | /* LOCRAsmE */ |
20783 | | GR32, GR32, GR32, |
20784 | | /* LOCRAsmH */ |
20785 | | GR32, GR32, GR32, |
20786 | | /* LOCRAsmHE */ |
20787 | | GR32, GR32, GR32, |
20788 | | /* LOCRAsmL */ |
20789 | | GR32, GR32, GR32, |
20790 | | /* LOCRAsmLE */ |
20791 | | GR32, GR32, GR32, |
20792 | | /* LOCRAsmLH */ |
20793 | | GR32, GR32, GR32, |
20794 | | /* LOCRAsmM */ |
20795 | | GR32, GR32, GR32, |
20796 | | /* LOCRAsmNE */ |
20797 | | GR32, GR32, GR32, |
20798 | | /* LOCRAsmNH */ |
20799 | | GR32, GR32, GR32, |
20800 | | /* LOCRAsmNHE */ |
20801 | | GR32, GR32, GR32, |
20802 | | /* LOCRAsmNL */ |
20803 | | GR32, GR32, GR32, |
20804 | | /* LOCRAsmNLE */ |
20805 | | GR32, GR32, GR32, |
20806 | | /* LOCRAsmNLH */ |
20807 | | GR32, GR32, GR32, |
20808 | | /* LOCRAsmNM */ |
20809 | | GR32, GR32, GR32, |
20810 | | /* LOCRAsmNO */ |
20811 | | GR32, GR32, GR32, |
20812 | | /* LOCRAsmNP */ |
20813 | | GR32, GR32, GR32, |
20814 | | /* LOCRAsmNZ */ |
20815 | | GR32, GR32, GR32, |
20816 | | /* LOCRAsmO */ |
20817 | | GR32, GR32, GR32, |
20818 | | /* LOCRAsmP */ |
20819 | | GR32, GR32, GR32, |
20820 | | /* LOCRAsmZ */ |
20821 | | GR32, GR32, GR32, |
20822 | | /* LPCTL */ |
20823 | | ADDR64, disp12imm64, |
20824 | | /* LPD */ |
20825 | | GR128, ADDR64, disp12imm64, ADDR64, disp12imm64, |
20826 | | /* LPDBR */ |
20827 | | FP64, FP64, |
20828 | | /* LPDFR */ |
20829 | | FP64, FP64, |
20830 | | /* LPDFR_32 */ |
20831 | | FP32, FP32, |
20832 | | /* LPDG */ |
20833 | | GR128, ADDR64, disp12imm64, ADDR64, disp12imm64, |
20834 | | /* LPDR */ |
20835 | | FP64, FP64, |
20836 | | /* LPEBR */ |
20837 | | FP32, FP32, |
20838 | | /* LPER */ |
20839 | | FP32, FP32, |
20840 | | /* LPGFR */ |
20841 | | GR64, GR32, |
20842 | | /* LPGR */ |
20843 | | GR64, GR64, |
20844 | | /* LPP */ |
20845 | | ADDR64, disp12imm64, |
20846 | | /* LPQ */ |
20847 | | GR128, ADDR64, disp20imm64, ADDR64, |
20848 | | /* LPR */ |
20849 | | GR32, GR32, |
20850 | | /* LPSW */ |
20851 | | ADDR64, disp12imm64, |
20852 | | /* LPSWE */ |
20853 | | ADDR64, disp12imm64, |
20854 | | /* LPSWEY */ |
20855 | | ADDR64, disp20imm64, |
20856 | | /* LPTEA */ |
20857 | | GR64, GR64, GR64, GR64, imm32zx4, |
20858 | | /* LPXBR */ |
20859 | | FP128, FP128, |
20860 | | /* LPXR */ |
20861 | | FP128, FP128, |
20862 | | /* LR */ |
20863 | | GR32, GR32, |
20864 | | /* LRA */ |
20865 | | GR64, ADDR64, disp12imm64, ADDR64, |
20866 | | /* LRAG */ |
20867 | | GR64, ADDR64, disp20imm64, ADDR64, |
20868 | | /* LRAY */ |
20869 | | GR64, ADDR64, disp20imm64, ADDR64, |
20870 | | /* LRDR */ |
20871 | | FP64, FP128, |
20872 | | /* LRER */ |
20873 | | FP32, FP64, |
20874 | | /* LRL */ |
20875 | | GR32, pcrel32, |
20876 | | /* LRV */ |
20877 | | GR32, ADDR64, disp20imm64, ADDR64, |
20878 | | /* LRVG */ |
20879 | | GR64, ADDR64, disp20imm64, ADDR64, |
20880 | | /* LRVGR */ |
20881 | | GR64, GR64, |
20882 | | /* LRVH */ |
20883 | | GR32, ADDR64, disp20imm64, ADDR64, |
20884 | | /* LRVR */ |
20885 | | GR32, GR32, |
20886 | | /* LSCTL */ |
20887 | | ADDR64, disp12imm64, |
20888 | | /* LT */ |
20889 | | GR32, ADDR64, disp20imm64, ADDR64, |
20890 | | /* LTDBR */ |
20891 | | FP64, FP64, |
20892 | | /* LTDR */ |
20893 | | FP64, FP64, |
20894 | | /* LTDTR */ |
20895 | | FP64, FP64, |
20896 | | /* LTEBR */ |
20897 | | FP32, FP32, |
20898 | | /* LTER */ |
20899 | | FP32, FP32, |
20900 | | /* LTG */ |
20901 | | GR64, ADDR64, disp20imm64, ADDR64, |
20902 | | /* LTGF */ |
20903 | | GR64, ADDR64, disp20imm64, ADDR64, |
20904 | | /* LTGFR */ |
20905 | | GR64, GR32, |
20906 | | /* LTGR */ |
20907 | | GR64, GR64, |
20908 | | /* LTR */ |
20909 | | GR32, GR32, |
20910 | | /* LTXBR */ |
20911 | | FP128, FP128, |
20912 | | /* LTXR */ |
20913 | | FP128, FP128, |
20914 | | /* LTXTR */ |
20915 | | FP128, FP128, |
20916 | | /* LURA */ |
20917 | | GR32, GR64, |
20918 | | /* LURAG */ |
20919 | | GR64, GR64, |
20920 | | /* LXD */ |
20921 | | FP128, ADDR64, disp12imm64, ADDR64, |
20922 | | /* LXDB */ |
20923 | | FP128, ADDR64, disp12imm64, ADDR64, |
20924 | | /* LXDBR */ |
20925 | | FP128, FP64, |
20926 | | /* LXDR */ |
20927 | | FP128, FP64, |
20928 | | /* LXDTR */ |
20929 | | FP128, FP64, imm32zx4, |
20930 | | /* LXE */ |
20931 | | FP128, ADDR64, disp12imm64, ADDR64, |
20932 | | /* LXEB */ |
20933 | | FP128, ADDR64, disp12imm64, ADDR64, |
20934 | | /* LXEBR */ |
20935 | | FP128, FP32, |
20936 | | /* LXER */ |
20937 | | FP128, FP32, |
20938 | | /* LXR */ |
20939 | | FP128, FP128, |
20940 | | /* LY */ |
20941 | | GR32, ADDR64, disp20imm64, ADDR64, |
20942 | | /* LZDR */ |
20943 | | FP64, |
20944 | | /* LZER */ |
20945 | | FP32, |
20946 | | /* LZRF */ |
20947 | | GR32, ADDR64, disp20imm64, ADDR64, |
20948 | | /* LZRG */ |
20949 | | GR64, ADDR64, disp20imm64, ADDR64, |
20950 | | /* LZXR */ |
20951 | | FP128, |
20952 | | /* M */ |
20953 | | GR128, GR128, ADDR64, disp12imm64, ADDR64, |
20954 | | /* MAD */ |
20955 | | FP64, FP64, FP64, ADDR64, disp12imm64, ADDR64, |
20956 | | /* MADB */ |
20957 | | FP64, FP64, FP64, ADDR64, disp12imm64, ADDR64, |
20958 | | /* MADBR */ |
20959 | | FP64, FP64, FP64, FP64, |
20960 | | /* MADR */ |
20961 | | FP64, FP64, FP64, FP64, |
20962 | | /* MAE */ |
20963 | | FP32, FP32, FP32, ADDR64, disp12imm64, ADDR64, |
20964 | | /* MAEB */ |
20965 | | FP32, FP32, FP32, ADDR64, disp12imm64, ADDR64, |
20966 | | /* MAEBR */ |
20967 | | FP32, FP32, FP32, FP32, |
20968 | | /* MAER */ |
20969 | | FP32, FP32, FP32, FP32, |
20970 | | /* MAY */ |
20971 | | FP128, FP64, FP64, ADDR64, disp12imm64, ADDR64, |
20972 | | /* MAYH */ |
20973 | | FP64, FP64, FP64, ADDR64, disp12imm64, ADDR64, |
20974 | | /* MAYHR */ |
20975 | | FP64, FP64, FP64, FP64, |
20976 | | /* MAYL */ |
20977 | | FP64, FP64, FP64, ADDR64, disp12imm64, ADDR64, |
20978 | | /* MAYLR */ |
20979 | | FP64, FP64, FP64, FP64, |
20980 | | /* MAYR */ |
20981 | | FP128, FP64, FP64, FP64, |
20982 | | /* MC */ |
20983 | | ADDR64, disp12imm64, imm32zx8, |
20984 | | /* MD */ |
20985 | | FP64, FP64, ADDR64, disp12imm64, ADDR64, |
20986 | | /* MDB */ |
20987 | | FP64, FP64, ADDR64, disp12imm64, ADDR64, |
20988 | | /* MDBR */ |
20989 | | FP64, FP64, FP64, |
20990 | | /* MDE */ |
20991 | | FP64, FP64, ADDR64, disp12imm64, ADDR64, |
20992 | | /* MDEB */ |
20993 | | FP64, FP64, ADDR64, disp12imm64, ADDR64, |
20994 | | /* MDEBR */ |
20995 | | FP64, FP64, FP32, |
20996 | | /* MDER */ |
20997 | | FP64, FP64, FP32, |
20998 | | /* MDR */ |
20999 | | FP64, FP64, FP64, |
21000 | | /* MDTR */ |
21001 | | FP64, FP64, FP64, |
21002 | | /* MDTRA */ |
21003 | | FP64, FP64, FP64, imm32zx4, |
21004 | | /* ME */ |
21005 | | FP64, FP64, ADDR64, disp12imm64, ADDR64, |
21006 | | /* MEE */ |
21007 | | FP32, FP32, ADDR64, disp12imm64, ADDR64, |
21008 | | /* MEEB */ |
21009 | | FP32, FP32, ADDR64, disp12imm64, ADDR64, |
21010 | | /* MEEBR */ |
21011 | | FP32, FP32, FP32, |
21012 | | /* MEER */ |
21013 | | FP32, FP32, FP32, |
21014 | | /* MER */ |
21015 | | FP64, FP64, FP32, |
21016 | | /* MFY */ |
21017 | | GR128, GR128, ADDR64, disp20imm64, ADDR64, |
21018 | | /* MG */ |
21019 | | GR128, GR128, ADDR64, disp20imm64, ADDR64, |
21020 | | /* MGH */ |
21021 | | GR64, GR64, ADDR64, disp20imm64, ADDR64, |
21022 | | /* MGHI */ |
21023 | | GR64, GR64, imm64sx16, |
21024 | | /* MGRK */ |
21025 | | GR128, GR64, GR64, |
21026 | | /* MH */ |
21027 | | GR32, GR32, ADDR64, disp12imm64, ADDR64, |
21028 | | /* MHI */ |
21029 | | GR32, GR32, imm32sx16, |
21030 | | /* MHY */ |
21031 | | GR32, GR32, ADDR64, disp20imm64, ADDR64, |
21032 | | /* ML */ |
21033 | | GR128, GR128, ADDR64, disp20imm64, ADDR64, |
21034 | | /* MLG */ |
21035 | | GR128, GR128, ADDR64, disp20imm64, ADDR64, |
21036 | | /* MLGR */ |
21037 | | GR128, GR128, GR64, |
21038 | | /* MLR */ |
21039 | | GR128, GR128, GR32, |
21040 | | /* MP */ |
21041 | | ADDR64, disp12imm64, len4imm64, ADDR64, disp12imm64, len4imm64, |
21042 | | /* MR */ |
21043 | | GR128, GR128, GR32, |
21044 | | /* MS */ |
21045 | | GR32, GR32, ADDR64, disp12imm64, ADDR64, |
21046 | | /* MSC */ |
21047 | | GR32, GR32, ADDR64, disp20imm64, ADDR64, |
21048 | | /* MSCH */ |
21049 | | ADDR64, disp12imm64, |
21050 | | /* MSD */ |
21051 | | FP64, FP64, FP64, ADDR64, disp12imm64, ADDR64, |
21052 | | /* MSDB */ |
21053 | | FP64, FP64, FP64, ADDR64, disp12imm64, ADDR64, |
21054 | | /* MSDBR */ |
21055 | | FP64, FP64, FP64, FP64, |
21056 | | /* MSDR */ |
21057 | | FP64, FP64, FP64, FP64, |
21058 | | /* MSE */ |
21059 | | FP32, FP32, FP32, ADDR64, disp12imm64, ADDR64, |
21060 | | /* MSEB */ |
21061 | | FP32, FP32, FP32, ADDR64, disp12imm64, ADDR64, |
21062 | | /* MSEBR */ |
21063 | | FP32, FP32, FP32, FP32, |
21064 | | /* MSER */ |
21065 | | FP32, FP32, FP32, FP32, |
21066 | | /* MSFI */ |
21067 | | GR32, GR32, simm32, |
21068 | | /* MSG */ |
21069 | | GR64, GR64, ADDR64, disp20imm64, ADDR64, |
21070 | | /* MSGC */ |
21071 | | GR64, GR64, ADDR64, disp20imm64, ADDR64, |
21072 | | /* MSGF */ |
21073 | | GR64, GR64, ADDR64, disp20imm64, ADDR64, |
21074 | | /* MSGFI */ |
21075 | | GR64, GR64, imm64sx32, |
21076 | | /* MSGFR */ |
21077 | | GR64, GR64, GR32, |
21078 | | /* MSGR */ |
21079 | | GR64, GR64, GR64, |
21080 | | /* MSGRKC */ |
21081 | | GR64, GR64, GR64, |
21082 | | /* MSR */ |
21083 | | GR32, GR32, GR32, |
21084 | | /* MSRKC */ |
21085 | | GR32, GR32, GR32, |
21086 | | /* MSTA */ |
21087 | | GR128, |
21088 | | /* MSY */ |
21089 | | GR32, GR32, ADDR64, disp20imm64, ADDR64, |
21090 | | /* MVC */ |
21091 | | ADDR64, disp12imm64, len8imm64, ADDR64, disp12imm64, |
21092 | | /* MVCDK */ |
21093 | | ADDR64, disp12imm64, ADDR64, disp12imm64, |
21094 | | /* MVCIN */ |
21095 | | ADDR64, disp12imm64, len8imm64, ADDR64, disp12imm64, |
21096 | | /* MVCK */ |
21097 | | ADDR64, disp12imm64, GR64, ADDR64, disp12imm64, GR64, |
21098 | | /* MVCL */ |
21099 | | GR128, GR128, GR128, GR128, |
21100 | | /* MVCLE */ |
21101 | | GR128, GR128, GR128, GR128, ADDR32, disp12imm32, |
21102 | | /* MVCLU */ |
21103 | | GR128, GR128, GR128, GR128, ADDR32, disp20imm32, |
21104 | | /* MVCOS */ |
21105 | | ADDR64, disp12imm64, ADDR64, disp12imm64, GR64, |
21106 | | /* MVCP */ |
21107 | | ADDR64, disp12imm64, GR64, ADDR64, disp12imm64, GR64, |
21108 | | /* MVCRL */ |
21109 | | ADDR64, disp12imm64, ADDR64, disp12imm64, |
21110 | | /* MVCS */ |
21111 | | ADDR64, disp12imm64, GR64, ADDR64, disp12imm64, GR64, |
21112 | | /* MVCSK */ |
21113 | | ADDR64, disp12imm64, ADDR64, disp12imm64, |
21114 | | /* MVGHI */ |
21115 | | ADDR64, disp12imm64, imm64sx16, |
21116 | | /* MVHHI */ |
21117 | | ADDR64, disp12imm64, imm32sx16trunc, |
21118 | | /* MVHI */ |
21119 | | ADDR64, disp12imm64, imm32sx16, |
21120 | | /* MVI */ |
21121 | | ADDR64, disp12imm64, imm32zx8trunc, |
21122 | | /* MVIY */ |
21123 | | ADDR64, disp20imm64, imm32zx8trunc, |
21124 | | /* MVN */ |
21125 | | ADDR64, disp12imm64, len8imm64, ADDR64, disp12imm64, |
21126 | | /* MVO */ |
21127 | | ADDR64, disp12imm64, len4imm64, ADDR64, disp12imm64, len4imm64, |
21128 | | /* MVPG */ |
21129 | | GR64, GR64, |
21130 | | /* MVST */ |
21131 | | GR64, GR64, GR64, GR64, |
21132 | | /* MVZ */ |
21133 | | ADDR64, disp12imm64, len8imm64, ADDR64, disp12imm64, |
21134 | | /* MXBR */ |
21135 | | FP128, FP128, FP128, |
21136 | | /* MXD */ |
21137 | | FP128, FP128, ADDR64, disp12imm64, ADDR64, |
21138 | | /* MXDB */ |
21139 | | FP128, FP128, ADDR64, disp12imm64, ADDR64, |
21140 | | /* MXDBR */ |
21141 | | FP128, FP128, FP64, |
21142 | | /* MXDR */ |
21143 | | FP128, FP128, FP64, |
21144 | | /* MXR */ |
21145 | | FP128, FP128, FP128, |
21146 | | /* MXTR */ |
21147 | | FP128, FP128, FP128, |
21148 | | /* MXTRA */ |
21149 | | FP128, FP128, FP128, imm32zx4, |
21150 | | /* MY */ |
21151 | | FP128, FP64, ADDR64, disp12imm64, ADDR64, |
21152 | | /* MYH */ |
21153 | | FP64, FP64, ADDR64, disp12imm64, ADDR64, |
21154 | | /* MYHR */ |
21155 | | FP64, FP64, FP64, |
21156 | | /* MYL */ |
21157 | | FP64, FP64, ADDR64, disp12imm64, ADDR64, |
21158 | | /* MYLR */ |
21159 | | FP64, FP64, FP64, |
21160 | | /* MYR */ |
21161 | | FP128, FP64, FP64, |
21162 | | /* N */ |
21163 | | GR32, GR32, ADDR64, disp12imm64, ADDR64, |
21164 | | /* NC */ |
21165 | | ADDR64, disp12imm64, len8imm64, ADDR64, disp12imm64, |
21166 | | /* NCGRK */ |
21167 | | GR64, GR64, GR64, |
21168 | | /* NCRK */ |
21169 | | GR32, GR32, GR32, |
21170 | | /* NG */ |
21171 | | GR64, GR64, ADDR64, disp20imm64, ADDR64, |
21172 | | /* NGR */ |
21173 | | GR64, GR64, GR64, |
21174 | | /* NGRK */ |
21175 | | GR64, GR64, GR64, |
21176 | | /* NI */ |
21177 | | ADDR64, disp12imm64, imm32zx8, |
21178 | | /* NIAI */ |
21179 | | imm32zx4, imm32zx4, |
21180 | | /* NIHF */ |
21181 | | GRH32, GRH32, uimm32, |
21182 | | /* NIHH */ |
21183 | | GRH32, GRH32, imm32lh16c, |
21184 | | /* NIHL */ |
21185 | | GRH32, GRH32, imm32ll16c, |
21186 | | /* NILF */ |
21187 | | GR32, GR32, uimm32, |
21188 | | /* NILH */ |
21189 | | GR32, GR32, imm32lh16c, |
21190 | | /* NILL */ |
21191 | | GR32, GR32, imm32ll16c, |
21192 | | /* NIY */ |
21193 | | ADDR64, disp20imm64, imm32zx8, |
21194 | | /* NNGRK */ |
21195 | | GR64, GR64, GR64, |
21196 | | /* NNPA */ |
21197 | | /* NNRK */ |
21198 | | GR32, GR32, GR32, |
21199 | | /* NOGRK */ |
21200 | | GR64, GR64, GR64, |
21201 | | /* NOP_bare */ |
21202 | | /* NORK */ |
21203 | | GR32, GR32, GR32, |
21204 | | /* NR */ |
21205 | | GR32, GR32, GR32, |
21206 | | /* NRK */ |
21207 | | GR32, GR32, GR32, |
21208 | | /* NTSTG */ |
21209 | | GR64, ADDR64, disp20imm64, ADDR64, |
21210 | | /* NXGRK */ |
21211 | | GR64, GR64, GR64, |
21212 | | /* NXRK */ |
21213 | | GR32, GR32, GR32, |
21214 | | /* NY */ |
21215 | | GR32, GR32, ADDR64, disp20imm64, ADDR64, |
21216 | | /* O */ |
21217 | | GR32, GR32, ADDR64, disp12imm64, ADDR64, |
21218 | | /* OC */ |
21219 | | ADDR64, disp12imm64, len8imm64, ADDR64, disp12imm64, |
21220 | | /* OCGRK */ |
21221 | | GR64, GR64, GR64, |
21222 | | /* OCRK */ |
21223 | | GR32, GR32, GR32, |
21224 | | /* OG */ |
21225 | | GR64, GR64, ADDR64, disp20imm64, ADDR64, |
21226 | | /* OGR */ |
21227 | | GR64, GR64, GR64, |
21228 | | /* OGRK */ |
21229 | | GR64, GR64, GR64, |
21230 | | /* OI */ |
21231 | | ADDR64, disp12imm64, imm32zx8, |
21232 | | /* OIHF */ |
21233 | | GRH32, GRH32, uimm32, |
21234 | | /* OIHH */ |
21235 | | GRH32, GRH32, imm32lh16, |
21236 | | /* OIHL */ |
21237 | | GRH32, GRH32, imm32ll16, |
21238 | | /* OILF */ |
21239 | | GR32, GR32, uimm32, |
21240 | | /* OILH */ |
21241 | | GR32, GR32, imm32lh16, |
21242 | | /* OILL */ |
21243 | | GR32, GR32, imm32ll16, |
21244 | | /* OIY */ |
21245 | | ADDR64, disp20imm64, imm32zx8, |
21246 | | /* OR */ |
21247 | | GR32, GR32, GR32, |
21248 | | /* ORK */ |
21249 | | GR32, GR32, GR32, |
21250 | | /* OY */ |
21251 | | GR32, GR32, ADDR64, disp20imm64, ADDR64, |
21252 | | /* PACK */ |
21253 | | ADDR64, disp12imm64, len4imm64, ADDR64, disp12imm64, len4imm64, |
21254 | | /* PALB */ |
21255 | | /* PC */ |
21256 | | ADDR64, disp12imm64, |
21257 | | /* PCC */ |
21258 | | /* PCKMO */ |
21259 | | /* PFD */ |
21260 | | imm32zx4, ADDR64, disp20imm64, ADDR64, |
21261 | | /* PFDRL */ |
21262 | | imm32zx4_timm, pcrel32, |
21263 | | /* PFMF */ |
21264 | | GR64, GR32, GR64, |
21265 | | /* PFPO */ |
21266 | | /* PGIN */ |
21267 | | GR64, GR64, |
21268 | | /* PGOUT */ |
21269 | | GR64, GR64, |
21270 | | /* PKA */ |
21271 | | ADDR64, disp12imm64, ADDR64, disp12imm64, len8imm64, |
21272 | | /* PKU */ |
21273 | | ADDR64, disp12imm64, ADDR64, disp12imm64, len8imm64, |
21274 | | /* PLO */ |
21275 | | GR64, ADDR64, disp12imm64, GR64, ADDR64, disp12imm64, |
21276 | | /* POPCNT */ |
21277 | | GR64, GR64, |
21278 | | /* POPCNTOpt */ |
21279 | | GR64, GR64, imm32zx4, |
21280 | | /* PPA */ |
21281 | | GR64, GR64, imm32zx4, |
21282 | | /* PPNO */ |
21283 | | GR128, GR128, GR128, GR128, |
21284 | | /* PR */ |
21285 | | /* PRNO */ |
21286 | | GR128, GR128, GR128, GR128, |
21287 | | /* PT */ |
21288 | | GR32, GR64, |
21289 | | /* PTF */ |
21290 | | GR64, GR64, |
21291 | | /* PTFF */ |
21292 | | /* PTI */ |
21293 | | GR64, GR64, |
21294 | | /* PTLB */ |
21295 | | /* QADTR */ |
21296 | | FP64, FP64, FP64, FP64, imm32zx4, |
21297 | | /* QAXTR */ |
21298 | | FP128, FP128, FP128, FP128, imm32zx4, |
21299 | | /* QCTRI */ |
21300 | | ADDR64, disp12imm64, |
21301 | | /* QPACI */ |
21302 | | ADDR64, disp12imm64, |
21303 | | /* QSI */ |
21304 | | ADDR64, disp12imm64, |
21305 | | /* RCHP */ |
21306 | | /* RDP */ |
21307 | | GR64, GR64, GR64, imm32zx4, |
21308 | | /* RDPOpt */ |
21309 | | GR64, GR64, GR64, |
21310 | | /* RISBG */ |
21311 | | GR64, GR64, GR64, imm32zx8, imm32zx8, imm32zx8, |
21312 | | /* RISBG32 */ |
21313 | | GR32, GR32, GR32, imm32zx8, imm32zx8, imm32zx8, |
21314 | | /* RISBGN */ |
21315 | | GR64, GR64, GR64, imm32zx8, imm32zx8, imm32zx8, |
21316 | | /* RISBHG */ |
21317 | | GRH32, GRH32, GR64, imm32zx8, imm32zx8, imm32zx8, |
21318 | | /* RISBLG */ |
21319 | | GR32, GR32, GR64, imm32zx8, imm32zx8, imm32zx8, |
21320 | | /* RLL */ |
21321 | | GR32, GR32, ADDR32, disp20imm32, |
21322 | | /* RLLG */ |
21323 | | GR64, GR64, ADDR32, disp20imm32, |
21324 | | /* RNSBG */ |
21325 | | GR64, GR64, GR64, imm32zx8, imm32zx8, imm32zx8, |
21326 | | /* ROSBG */ |
21327 | | GR64, GR64, GR64, imm32zx8, imm32zx8, imm32zx8, |
21328 | | /* RP */ |
21329 | | ADDR64, disp12imm64, |
21330 | | /* RRBE */ |
21331 | | GR32, GR64, |
21332 | | /* RRBM */ |
21333 | | GR64, GR64, |
21334 | | /* RRDTR */ |
21335 | | FP64, FP64, FP64, FP64, imm32zx4, |
21336 | | /* RRXTR */ |
21337 | | FP128, FP128, FP128, FP128, imm32zx4, |
21338 | | /* RSCH */ |
21339 | | /* RXSBG */ |
21340 | | GR64, GR64, GR64, imm32zx8, imm32zx8, imm32zx8, |
21341 | | /* S */ |
21342 | | GR32, GR32, ADDR64, disp12imm64, ADDR64, |
21343 | | /* SAC */ |
21344 | | ADDR64, disp12imm64, |
21345 | | /* SACF */ |
21346 | | ADDR64, disp12imm64, |
21347 | | /* SAL */ |
21348 | | /* SAM24 */ |
21349 | | /* SAM31 */ |
21350 | | /* SAM64 */ |
21351 | | /* SAR */ |
21352 | | AR32, GR32, |
21353 | | /* SCCTR */ |
21354 | | GR64, GR64, |
21355 | | /* SCHM */ |
21356 | | /* SCK */ |
21357 | | ADDR64, disp12imm64, |
21358 | | /* SCKC */ |
21359 | | ADDR64, disp12imm64, |
21360 | | /* SCKPF */ |
21361 | | /* SD */ |
21362 | | FP64, FP64, ADDR64, disp12imm64, ADDR64, |
21363 | | /* SDB */ |
21364 | | FP64, FP64, ADDR64, disp12imm64, ADDR64, |
21365 | | /* SDBR */ |
21366 | | FP64, FP64, FP64, |
21367 | | /* SDR */ |
21368 | | FP64, FP64, FP64, |
21369 | | /* SDTR */ |
21370 | | FP64, FP64, FP64, |
21371 | | /* SDTRA */ |
21372 | | FP64, FP64, FP64, imm32zx4, |
21373 | | /* SE */ |
21374 | | FP32, FP32, ADDR64, disp12imm64, ADDR64, |
21375 | | /* SEB */ |
21376 | | FP32, FP32, ADDR64, disp12imm64, ADDR64, |
21377 | | /* SEBR */ |
21378 | | FP32, FP32, FP32, |
21379 | | /* SELFHR */ |
21380 | | GRH32, GRH32, GRH32, cond4, cond4, |
21381 | | /* SELFHRAsm */ |
21382 | | GRH32, GRH32, GRH32, imm32zx4, |
21383 | | /* SELFHRAsmE */ |
21384 | | GRH32, GRH32, GRH32, |
21385 | | /* SELFHRAsmH */ |
21386 | | GRH32, GRH32, GRH32, |
21387 | | /* SELFHRAsmHE */ |
21388 | | GRH32, GRH32, GRH32, |
21389 | | /* SELFHRAsmL */ |
21390 | | GRH32, GRH32, GRH32, |
21391 | | /* SELFHRAsmLE */ |
21392 | | GRH32, GRH32, GRH32, |
21393 | | /* SELFHRAsmLH */ |
21394 | | GRH32, GRH32, GRH32, |
21395 | | /* SELFHRAsmM */ |
21396 | | GRH32, GRH32, GRH32, |
21397 | | /* SELFHRAsmNE */ |
21398 | | GRH32, GRH32, GRH32, |
21399 | | /* SELFHRAsmNH */ |
21400 | | GRH32, GRH32, GRH32, |
21401 | | /* SELFHRAsmNHE */ |
21402 | | GRH32, GRH32, GRH32, |
21403 | | /* SELFHRAsmNL */ |
21404 | | GRH32, GRH32, GRH32, |
21405 | | /* SELFHRAsmNLE */ |
21406 | | GRH32, GRH32, GRH32, |
21407 | | /* SELFHRAsmNLH */ |
21408 | | GRH32, GRH32, GRH32, |
21409 | | /* SELFHRAsmNM */ |
21410 | | GRH32, GRH32, GRH32, |
21411 | | /* SELFHRAsmNO */ |
21412 | | GRH32, GRH32, GRH32, |
21413 | | /* SELFHRAsmNP */ |
21414 | | GRH32, GRH32, GRH32, |
21415 | | /* SELFHRAsmNZ */ |
21416 | | GRH32, GRH32, GRH32, |
21417 | | /* SELFHRAsmO */ |
21418 | | GRH32, GRH32, GRH32, |
21419 | | /* SELFHRAsmP */ |
21420 | | GRH32, GRH32, GRH32, |
21421 | | /* SELFHRAsmZ */ |
21422 | | GRH32, GRH32, GRH32, |
21423 | | /* SELGR */ |
21424 | | GR64, GR64, GR64, cond4, cond4, |
21425 | | /* SELGRAsm */ |
21426 | | GR64, GR64, GR64, imm32zx4, |
21427 | | /* SELGRAsmE */ |
21428 | | GR64, GR64, GR64, |
21429 | | /* SELGRAsmH */ |
21430 | | GR64, GR64, GR64, |
21431 | | /* SELGRAsmHE */ |
21432 | | GR64, GR64, GR64, |
21433 | | /* SELGRAsmL */ |
21434 | | GR64, GR64, GR64, |
21435 | | /* SELGRAsmLE */ |
21436 | | GR64, GR64, GR64, |
21437 | | /* SELGRAsmLH */ |
21438 | | GR64, GR64, GR64, |
21439 | | /* SELGRAsmM */ |
21440 | | GR64, GR64, GR64, |
21441 | | /* SELGRAsmNE */ |
21442 | | GR64, GR64, GR64, |
21443 | | /* SELGRAsmNH */ |
21444 | | GR64, GR64, GR64, |
21445 | | /* SELGRAsmNHE */ |
21446 | | GR64, GR64, GR64, |
21447 | | /* SELGRAsmNL */ |
21448 | | GR64, GR64, GR64, |
21449 | | /* SELGRAsmNLE */ |
21450 | | GR64, GR64, GR64, |
21451 | | /* SELGRAsmNLH */ |
21452 | | GR64, GR64, GR64, |
21453 | | /* SELGRAsmNM */ |
21454 | | GR64, GR64, GR64, |
21455 | | /* SELGRAsmNO */ |
21456 | | GR64, GR64, GR64, |
21457 | | /* SELGRAsmNP */ |
21458 | | GR64, GR64, GR64, |
21459 | | /* SELGRAsmNZ */ |
21460 | | GR64, GR64, GR64, |
21461 | | /* SELGRAsmO */ |
21462 | | GR64, GR64, GR64, |
21463 | | /* SELGRAsmP */ |
21464 | | GR64, GR64, GR64, |
21465 | | /* SELGRAsmZ */ |
21466 | | GR64, GR64, GR64, |
21467 | | /* SELR */ |
21468 | | GR32, GR32, GR32, cond4, cond4, |
21469 | | /* SELRAsm */ |
21470 | | GR32, GR32, GR32, imm32zx4, |
21471 | | /* SELRAsmE */ |
21472 | | GR32, GR32, GR32, |
21473 | | /* SELRAsmH */ |
21474 | | GR32, GR32, GR32, |
21475 | | /* SELRAsmHE */ |
21476 | | GR32, GR32, GR32, |
21477 | | /* SELRAsmL */ |
21478 | | GR32, GR32, GR32, |
21479 | | /* SELRAsmLE */ |
21480 | | GR32, GR32, GR32, |
21481 | | /* SELRAsmLH */ |
21482 | | GR32, GR32, GR32, |
21483 | | /* SELRAsmM */ |
21484 | | GR32, GR32, GR32, |
21485 | | /* SELRAsmNE */ |
21486 | | GR32, GR32, GR32, |
21487 | | /* SELRAsmNH */ |
21488 | | GR32, GR32, GR32, |
21489 | | /* SELRAsmNHE */ |
21490 | | GR32, GR32, GR32, |
21491 | | /* SELRAsmNL */ |
21492 | | GR32, GR32, GR32, |
21493 | | /* SELRAsmNLE */ |
21494 | | GR32, GR32, GR32, |
21495 | | /* SELRAsmNLH */ |
21496 | | GR32, GR32, GR32, |
21497 | | /* SELRAsmNM */ |
21498 | | GR32, GR32, GR32, |
21499 | | /* SELRAsmNO */ |
21500 | | GR32, GR32, GR32, |
21501 | | /* SELRAsmNP */ |
21502 | | GR32, GR32, GR32, |
21503 | | /* SELRAsmNZ */ |
21504 | | GR32, GR32, GR32, |
21505 | | /* SELRAsmO */ |
21506 | | GR32, GR32, GR32, |
21507 | | /* SELRAsmP */ |
21508 | | GR32, GR32, GR32, |
21509 | | /* SELRAsmZ */ |
21510 | | GR32, GR32, GR32, |
21511 | | /* SER */ |
21512 | | FP32, FP32, FP32, |
21513 | | /* SFASR */ |
21514 | | GR32, |
21515 | | /* SFPC */ |
21516 | | GR32, |
21517 | | /* SG */ |
21518 | | GR64, GR64, ADDR64, disp20imm64, ADDR64, |
21519 | | /* SGF */ |
21520 | | GR64, GR64, ADDR64, disp20imm64, ADDR64, |
21521 | | /* SGFR */ |
21522 | | GR64, GR64, GR32, |
21523 | | /* SGH */ |
21524 | | GR64, GR64, ADDR64, disp20imm64, ADDR64, |
21525 | | /* SGR */ |
21526 | | GR64, GR64, GR64, |
21527 | | /* SGRK */ |
21528 | | GR64, GR64, GR64, |
21529 | | /* SH */ |
21530 | | GR32, GR32, ADDR64, disp12imm64, ADDR64, |
21531 | | /* SHHHR */ |
21532 | | GRH32, GRH32, GRH32, |
21533 | | /* SHHLR */ |
21534 | | GRH32, GRH32, GR32, |
21535 | | /* SHY */ |
21536 | | GR32, GR32, ADDR64, disp20imm64, ADDR64, |
21537 | | /* SIE */ |
21538 | | ADDR64, disp12imm64, |
21539 | | /* SIGA */ |
21540 | | ADDR64, disp12imm64, |
21541 | | /* SIGP */ |
21542 | | GR64, GR64, ADDR64, disp12imm64, |
21543 | | /* SL */ |
21544 | | GR32, GR32, ADDR64, disp12imm64, ADDR64, |
21545 | | /* SLA */ |
21546 | | GR32, GR32, ADDR32, disp12imm32, |
21547 | | /* SLAG */ |
21548 | | GR64, GR64, ADDR32, disp20imm32, |
21549 | | /* SLAK */ |
21550 | | GR32, GR32, ADDR32, disp20imm32, |
21551 | | /* SLB */ |
21552 | | GR32, GR32, ADDR64, disp20imm64, ADDR64, |
21553 | | /* SLBG */ |
21554 | | GR64, GR64, ADDR64, disp20imm64, ADDR64, |
21555 | | /* SLBGR */ |
21556 | | GR64, GR64, GR64, |
21557 | | /* SLBR */ |
21558 | | GR32, GR32, GR32, |
21559 | | /* SLDA */ |
21560 | | GR128, GR128, ADDR32, disp12imm32, |
21561 | | /* SLDL */ |
21562 | | GR128, GR128, ADDR32, disp12imm32, |
21563 | | /* SLDT */ |
21564 | | FP64, FP64, ADDR64, disp12imm64, ADDR64, |
21565 | | /* SLFI */ |
21566 | | GR32, GR32, uimm32, |
21567 | | /* SLG */ |
21568 | | GR64, GR64, ADDR64, disp20imm64, ADDR64, |
21569 | | /* SLGF */ |
21570 | | GR64, GR64, ADDR64, disp20imm64, ADDR64, |
21571 | | /* SLGFI */ |
21572 | | GR64, GR64, imm64zx32, |
21573 | | /* SLGFR */ |
21574 | | GR64, GR64, GR32, |
21575 | | /* SLGR */ |
21576 | | GR64, GR64, GR64, |
21577 | | /* SLGRK */ |
21578 | | GR64, GR64, GR64, |
21579 | | /* SLHHHR */ |
21580 | | GRH32, GRH32, GRH32, |
21581 | | /* SLHHLR */ |
21582 | | GRH32, GRH32, GR32, |
21583 | | /* SLL */ |
21584 | | GR32, GR32, ADDR32, disp12imm32, |
21585 | | /* SLLG */ |
21586 | | GR64, GR64, ADDR32, disp20imm32, |
21587 | | /* SLLK */ |
21588 | | GR32, GR32, ADDR32, disp20imm32, |
21589 | | /* SLR */ |
21590 | | GR32, GR32, GR32, |
21591 | | /* SLRK */ |
21592 | | GR32, GR32, GR32, |
21593 | | /* SLXT */ |
21594 | | FP128, FP128, ADDR64, disp12imm64, ADDR64, |
21595 | | /* SLY */ |
21596 | | GR32, GR32, ADDR64, disp20imm64, ADDR64, |
21597 | | /* SORTL */ |
21598 | | GR128, GR128, GR128, GR128, |
21599 | | /* SP */ |
21600 | | ADDR64, disp12imm64, len4imm64, ADDR64, disp12imm64, len4imm64, |
21601 | | /* SPCTR */ |
21602 | | GR64, GR64, |
21603 | | /* SPKA */ |
21604 | | ADDR64, disp12imm64, |
21605 | | /* SPM */ |
21606 | | GR32, |
21607 | | /* SPT */ |
21608 | | ADDR64, disp12imm64, |
21609 | | /* SPX */ |
21610 | | ADDR64, disp12imm64, |
21611 | | /* SQD */ |
21612 | | FP64, ADDR64, disp12imm64, ADDR64, |
21613 | | /* SQDB */ |
21614 | | FP64, ADDR64, disp12imm64, ADDR64, |
21615 | | /* SQDBR */ |
21616 | | FP64, FP64, |
21617 | | /* SQDR */ |
21618 | | FP64, FP64, |
21619 | | /* SQE */ |
21620 | | FP32, ADDR64, disp12imm64, ADDR64, |
21621 | | /* SQEB */ |
21622 | | FP32, ADDR64, disp12imm64, ADDR64, |
21623 | | /* SQEBR */ |
21624 | | FP32, FP32, |
21625 | | /* SQER */ |
21626 | | FP32, FP32, |
21627 | | /* SQXBR */ |
21628 | | FP128, FP128, |
21629 | | /* SQXR */ |
21630 | | FP128, FP128, |
21631 | | /* SR */ |
21632 | | GR32, GR32, GR32, |
21633 | | /* SRA */ |
21634 | | GR32, GR32, ADDR32, disp12imm32, |
21635 | | /* SRAG */ |
21636 | | GR64, GR64, ADDR32, disp20imm32, |
21637 | | /* SRAK */ |
21638 | | GR32, GR32, ADDR32, disp20imm32, |
21639 | | /* SRDA */ |
21640 | | GR128, GR128, ADDR32, disp12imm32, |
21641 | | /* SRDL */ |
21642 | | GR128, GR128, ADDR32, disp12imm32, |
21643 | | /* SRDT */ |
21644 | | FP64, FP64, ADDR64, disp12imm64, ADDR64, |
21645 | | /* SRK */ |
21646 | | GR32, GR32, GR32, |
21647 | | /* SRL */ |
21648 | | GR32, GR32, ADDR32, disp12imm32, |
21649 | | /* SRLG */ |
21650 | | GR64, GR64, ADDR32, disp20imm32, |
21651 | | /* SRLK */ |
21652 | | GR32, GR32, ADDR32, disp20imm32, |
21653 | | /* SRNM */ |
21654 | | ADDR32, disp12imm32, |
21655 | | /* SRNMB */ |
21656 | | ADDR32, disp12imm32, |
21657 | | /* SRNMT */ |
21658 | | ADDR32, disp12imm32, |
21659 | | /* SRP */ |
21660 | | ADDR64, disp12imm64, len4imm64, ADDR32, disp12imm32, imm32zx4, |
21661 | | /* SRST */ |
21662 | | GR64, GR64, GR64, GR64, |
21663 | | /* SRSTU */ |
21664 | | GR64, GR64, GR64, GR64, |
21665 | | /* SRXT */ |
21666 | | FP128, FP128, ADDR64, disp12imm64, ADDR64, |
21667 | | /* SSAIR */ |
21668 | | GR64, |
21669 | | /* SSAR */ |
21670 | | GR32, |
21671 | | /* SSCH */ |
21672 | | ADDR64, disp12imm64, |
21673 | | /* SSKE */ |
21674 | | GR32, GR64, imm32zx4, |
21675 | | /* SSKEOpt */ |
21676 | | GR32, GR64, |
21677 | | /* SSM */ |
21678 | | ADDR64, disp12imm64, |
21679 | | /* ST */ |
21680 | | GR32, ADDR64, disp12imm64, ADDR64, |
21681 | | /* STAM */ |
21682 | | AR32, AR32, ADDR64, disp12imm64, |
21683 | | /* STAMY */ |
21684 | | AR32, AR32, ADDR64, disp20imm64, |
21685 | | /* STAP */ |
21686 | | ADDR64, disp12imm64, |
21687 | | /* STBEAR */ |
21688 | | ADDR64, disp12imm64, |
21689 | | /* STC */ |
21690 | | GR32, ADDR64, disp12imm64, ADDR64, |
21691 | | /* STCH */ |
21692 | | GRH32, ADDR64, disp20imm64, ADDR64, |
21693 | | /* STCK */ |
21694 | | ADDR64, disp12imm64, |
21695 | | /* STCKC */ |
21696 | | ADDR64, disp12imm64, |
21697 | | /* STCKE */ |
21698 | | ADDR64, disp12imm64, |
21699 | | /* STCKF */ |
21700 | | ADDR64, disp12imm64, |
21701 | | /* STCM */ |
21702 | | GR32, imm32zx4, ADDR64, disp12imm64, |
21703 | | /* STCMH */ |
21704 | | GRH32, imm32zx4, ADDR64, disp20imm64, |
21705 | | /* STCMY */ |
21706 | | GR32, imm32zx4, ADDR64, disp20imm64, |
21707 | | /* STCPS */ |
21708 | | ADDR64, disp12imm64, |
21709 | | /* STCRW */ |
21710 | | ADDR64, disp12imm64, |
21711 | | /* STCTG */ |
21712 | | CR64, CR64, ADDR64, disp20imm64, |
21713 | | /* STCTL */ |
21714 | | CR64, CR64, ADDR64, disp12imm64, |
21715 | | /* STCY */ |
21716 | | GR32, ADDR64, disp20imm64, ADDR64, |
21717 | | /* STD */ |
21718 | | FP64, ADDR64, disp12imm64, ADDR64, |
21719 | | /* STDY */ |
21720 | | FP64, ADDR64, disp20imm64, ADDR64, |
21721 | | /* STE */ |
21722 | | FP32, ADDR64, disp12imm64, ADDR64, |
21723 | | /* STEY */ |
21724 | | FP32, ADDR64, disp20imm64, ADDR64, |
21725 | | /* STFH */ |
21726 | | GRH32, ADDR64, disp20imm64, ADDR64, |
21727 | | /* STFL */ |
21728 | | ADDR64, disp12imm64, |
21729 | | /* STFLE */ |
21730 | | ADDR64, disp12imm64, |
21731 | | /* STFPC */ |
21732 | | ADDR64, disp12imm64, |
21733 | | /* STG */ |
21734 | | GR64, ADDR64, disp20imm64, ADDR64, |
21735 | | /* STGRL */ |
21736 | | GR64, pcrel32, |
21737 | | /* STGSC */ |
21738 | | GR64, ADDR64, disp20imm64, ADDR64, |
21739 | | /* STH */ |
21740 | | GR32, ADDR64, disp12imm64, ADDR64, |
21741 | | /* STHH */ |
21742 | | GRH32, ADDR64, disp20imm64, ADDR64, |
21743 | | /* STHRL */ |
21744 | | GR32, pcrel32, |
21745 | | /* STHY */ |
21746 | | GR32, ADDR64, disp20imm64, ADDR64, |
21747 | | /* STIDP */ |
21748 | | ADDR64, disp12imm64, |
21749 | | /* STM */ |
21750 | | GR32, GR32, ADDR64, disp12imm64, |
21751 | | /* STMG */ |
21752 | | GR64, GR64, ADDR64, disp20imm64, |
21753 | | /* STMH */ |
21754 | | GRH32, GRH32, ADDR64, disp20imm64, |
21755 | | /* STMY */ |
21756 | | GR32, GR32, ADDR64, disp20imm64, |
21757 | | /* STNSM */ |
21758 | | ADDR64, disp12imm64, imm32zx8, |
21759 | | /* STOC */ |
21760 | | GR32, ADDR64, disp20imm64, cond4, cond4, |
21761 | | /* STOCAsm */ |
21762 | | GR32, ADDR64, disp20imm64, imm32zx4, |
21763 | | /* STOCAsmE */ |
21764 | | GR32, ADDR64, disp20imm64, |
21765 | | /* STOCAsmH */ |
21766 | | GR32, ADDR64, disp20imm64, |
21767 | | /* STOCAsmHE */ |
21768 | | GR32, ADDR64, disp20imm64, |
21769 | | /* STOCAsmL */ |
21770 | | GR32, ADDR64, disp20imm64, |
21771 | | /* STOCAsmLE */ |
21772 | | GR32, ADDR64, disp20imm64, |
21773 | | /* STOCAsmLH */ |
21774 | | GR32, ADDR64, disp20imm64, |
21775 | | /* STOCAsmM */ |
21776 | | GR32, ADDR64, disp20imm64, |
21777 | | /* STOCAsmNE */ |
21778 | | GR32, ADDR64, disp20imm64, |
21779 | | /* STOCAsmNH */ |
21780 | | GR32, ADDR64, disp20imm64, |
21781 | | /* STOCAsmNHE */ |
21782 | | GR32, ADDR64, disp20imm64, |
21783 | | /* STOCAsmNL */ |
21784 | | GR32, ADDR64, disp20imm64, |
21785 | | /* STOCAsmNLE */ |
21786 | | GR32, ADDR64, disp20imm64, |
21787 | | /* STOCAsmNLH */ |
21788 | | GR32, ADDR64, disp20imm64, |
21789 | | /* STOCAsmNM */ |
21790 | | GR32, ADDR64, disp20imm64, |
21791 | | /* STOCAsmNO */ |
21792 | | GR32, ADDR64, disp20imm64, |
21793 | | /* STOCAsmNP */ |
21794 | | GR32, ADDR64, disp20imm64, |
21795 | | /* STOCAsmNZ */ |
21796 | | GR32, ADDR64, disp20imm64, |
21797 | | /* STOCAsmO */ |
21798 | | GR32, ADDR64, disp20imm64, |
21799 | | /* STOCAsmP */ |
21800 | | GR32, ADDR64, disp20imm64, |
21801 | | /* STOCAsmZ */ |
21802 | | GR32, ADDR64, disp20imm64, |
21803 | | /* STOCFH */ |
21804 | | GRH32, ADDR64, disp20imm64, cond4, cond4, |
21805 | | /* STOCFHAsm */ |
21806 | | GRH32, ADDR64, disp20imm64, imm32zx4, |
21807 | | /* STOCFHAsmE */ |
21808 | | GRH32, ADDR64, disp20imm64, |
21809 | | /* STOCFHAsmH */ |
21810 | | GRH32, ADDR64, disp20imm64, |
21811 | | /* STOCFHAsmHE */ |
21812 | | GRH32, ADDR64, disp20imm64, |
21813 | | /* STOCFHAsmL */ |
21814 | | GRH32, ADDR64, disp20imm64, |
21815 | | /* STOCFHAsmLE */ |
21816 | | GRH32, ADDR64, disp20imm64, |
21817 | | /* STOCFHAsmLH */ |
21818 | | GRH32, ADDR64, disp20imm64, |
21819 | | /* STOCFHAsmM */ |
21820 | | GRH32, ADDR64, disp20imm64, |
21821 | | /* STOCFHAsmNE */ |
21822 | | GRH32, ADDR64, disp20imm64, |
21823 | | /* STOCFHAsmNH */ |
21824 | | GRH32, ADDR64, disp20imm64, |
21825 | | /* STOCFHAsmNHE */ |
21826 | | GRH32, ADDR64, disp20imm64, |
21827 | | /* STOCFHAsmNL */ |
21828 | | GRH32, ADDR64, disp20imm64, |
21829 | | /* STOCFHAsmNLE */ |
21830 | | GRH32, ADDR64, disp20imm64, |
21831 | | /* STOCFHAsmNLH */ |
21832 | | GRH32, ADDR64, disp20imm64, |
21833 | | /* STOCFHAsmNM */ |
21834 | | GRH32, ADDR64, disp20imm64, |
21835 | | /* STOCFHAsmNO */ |
21836 | | GRH32, ADDR64, disp20imm64, |
21837 | | /* STOCFHAsmNP */ |
21838 | | GRH32, ADDR64, disp20imm64, |
21839 | | /* STOCFHAsmNZ */ |
21840 | | GRH32, ADDR64, disp20imm64, |
21841 | | /* STOCFHAsmO */ |
21842 | | GRH32, ADDR64, disp20imm64, |
21843 | | /* STOCFHAsmP */ |
21844 | | GRH32, ADDR64, disp20imm64, |
21845 | | /* STOCFHAsmZ */ |
21846 | | GRH32, ADDR64, disp20imm64, |
21847 | | /* STOCG */ |
21848 | | GR64, ADDR64, disp20imm64, cond4, cond4, |
21849 | | /* STOCGAsm */ |
21850 | | GR64, ADDR64, disp20imm64, imm32zx4, |
21851 | | /* STOCGAsmE */ |
21852 | | GR64, ADDR64, disp20imm64, |
21853 | | /* STOCGAsmH */ |
21854 | | GR64, ADDR64, disp20imm64, |
21855 | | /* STOCGAsmHE */ |
21856 | | GR64, ADDR64, disp20imm64, |
21857 | | /* STOCGAsmL */ |
21858 | | GR64, ADDR64, disp20imm64, |
21859 | | /* STOCGAsmLE */ |
21860 | | GR64, ADDR64, disp20imm64, |
21861 | | /* STOCGAsmLH */ |
21862 | | GR64, ADDR64, disp20imm64, |
21863 | | /* STOCGAsmM */ |
21864 | | GR64, ADDR64, disp20imm64, |
21865 | | /* STOCGAsmNE */ |
21866 | | GR64, ADDR64, disp20imm64, |
21867 | | /* STOCGAsmNH */ |
21868 | | GR64, ADDR64, disp20imm64, |
21869 | | /* STOCGAsmNHE */ |
21870 | | GR64, ADDR64, disp20imm64, |
21871 | | /* STOCGAsmNL */ |
21872 | | GR64, ADDR64, disp20imm64, |
21873 | | /* STOCGAsmNLE */ |
21874 | | GR64, ADDR64, disp20imm64, |
21875 | | /* STOCGAsmNLH */ |
21876 | | GR64, ADDR64, disp20imm64, |
21877 | | /* STOCGAsmNM */ |
21878 | | GR64, ADDR64, disp20imm64, |
21879 | | /* STOCGAsmNO */ |
21880 | | GR64, ADDR64, disp20imm64, |
21881 | | /* STOCGAsmNP */ |
21882 | | GR64, ADDR64, disp20imm64, |
21883 | | /* STOCGAsmNZ */ |
21884 | | GR64, ADDR64, disp20imm64, |
21885 | | /* STOCGAsmO */ |
21886 | | GR64, ADDR64, disp20imm64, |
21887 | | /* STOCGAsmP */ |
21888 | | GR64, ADDR64, disp20imm64, |
21889 | | /* STOCGAsmZ */ |
21890 | | GR64, ADDR64, disp20imm64, |
21891 | | /* STOSM */ |
21892 | | ADDR64, disp12imm64, imm32zx8, |
21893 | | /* STPQ */ |
21894 | | GR128, ADDR64, disp20imm64, ADDR64, |
21895 | | /* STPT */ |
21896 | | ADDR64, disp12imm64, |
21897 | | /* STPX */ |
21898 | | ADDR64, disp12imm64, |
21899 | | /* STRAG */ |
21900 | | ADDR64, disp12imm64, ADDR64, disp12imm64, |
21901 | | /* STRL */ |
21902 | | GR32, pcrel32, |
21903 | | /* STRV */ |
21904 | | GR32, ADDR64, disp20imm64, ADDR64, |
21905 | | /* STRVG */ |
21906 | | GR64, ADDR64, disp20imm64, ADDR64, |
21907 | | /* STRVH */ |
21908 | | GR32, ADDR64, disp20imm64, ADDR64, |
21909 | | /* STSCH */ |
21910 | | ADDR64, disp12imm64, |
21911 | | /* STSI */ |
21912 | | ADDR64, disp12imm64, |
21913 | | /* STURA */ |
21914 | | GR32, GR64, |
21915 | | /* STURG */ |
21916 | | GR64, GR64, |
21917 | | /* STY */ |
21918 | | GR32, ADDR64, disp20imm64, ADDR64, |
21919 | | /* SU */ |
21920 | | FP32, FP32, ADDR64, disp12imm64, ADDR64, |
21921 | | /* SUR */ |
21922 | | FP32, FP32, FP32, |
21923 | | /* SVC */ |
21924 | | imm32zx8, |
21925 | | /* SW */ |
21926 | | FP64, FP64, ADDR64, disp12imm64, ADDR64, |
21927 | | /* SWR */ |
21928 | | FP64, FP64, FP64, |
21929 | | /* SXBR */ |
21930 | | FP128, FP128, FP128, |
21931 | | /* SXR */ |
21932 | | FP128, FP128, FP128, |
21933 | | /* SXTR */ |
21934 | | FP128, FP128, FP128, |
21935 | | /* SXTRA */ |
21936 | | FP128, FP128, FP128, imm32zx4, |
21937 | | /* SY */ |
21938 | | GR32, GR32, ADDR64, disp20imm64, ADDR64, |
21939 | | /* TABORT */ |
21940 | | ADDR64, disp12imm64, |
21941 | | /* TAM */ |
21942 | | /* TAR */ |
21943 | | AR32, GR32, |
21944 | | /* TB */ |
21945 | | GR64, GR64, |
21946 | | /* TBDR */ |
21947 | | FP64, imm32zx4, FP64, |
21948 | | /* TBEDR */ |
21949 | | FP32, imm32zx4, FP64, |
21950 | | /* TBEGIN */ |
21951 | | ADDR64, disp12imm64, imm32zx16, |
21952 | | /* TBEGINC */ |
21953 | | ADDR64, disp12imm64, imm32zx16, |
21954 | | /* TCDB */ |
21955 | | FP64, ADDR64, disp12imm64, ADDR64, |
21956 | | /* TCEB */ |
21957 | | FP32, ADDR64, disp12imm64, ADDR64, |
21958 | | /* TCXB */ |
21959 | | FP128, ADDR64, disp12imm64, ADDR64, |
21960 | | /* TDCDT */ |
21961 | | FP64, ADDR64, disp12imm64, ADDR64, |
21962 | | /* TDCET */ |
21963 | | FP32, ADDR64, disp12imm64, ADDR64, |
21964 | | /* TDCXT */ |
21965 | | FP128, ADDR64, disp12imm64, ADDR64, |
21966 | | /* TDGDT */ |
21967 | | FP64, ADDR64, disp12imm64, ADDR64, |
21968 | | /* TDGET */ |
21969 | | FP32, ADDR64, disp12imm64, ADDR64, |
21970 | | /* TDGXT */ |
21971 | | FP128, ADDR64, disp12imm64, ADDR64, |
21972 | | /* TEND */ |
21973 | | /* THDER */ |
21974 | | FP64, FP32, |
21975 | | /* THDR */ |
21976 | | FP64, FP64, |
21977 | | /* TM */ |
21978 | | ADDR64, disp12imm64, imm32zx8, |
21979 | | /* TMHH */ |
21980 | | GRH32, imm32lh16, |
21981 | | /* TMHL */ |
21982 | | GRH32, imm32ll16, |
21983 | | /* TMLH */ |
21984 | | GR32, imm32lh16, |
21985 | | /* TMLL */ |
21986 | | GR32, imm32ll16, |
21987 | | /* TMY */ |
21988 | | ADDR64, disp20imm64, imm32zx8, |
21989 | | /* TP */ |
21990 | | ADDR64, disp12imm64, len4imm64, |
21991 | | /* TPI */ |
21992 | | ADDR64, disp12imm64, |
21993 | | /* TPROT */ |
21994 | | ADDR64, disp12imm64, ADDR64, disp12imm64, |
21995 | | /* TR */ |
21996 | | ADDR64, disp12imm64, len8imm64, ADDR64, disp12imm64, |
21997 | | /* TRACE */ |
21998 | | GR32, GR32, ADDR64, disp12imm64, |
21999 | | /* TRACG */ |
22000 | | GR64, GR64, ADDR64, disp20imm64, |
22001 | | /* TRAP2 */ |
22002 | | /* TRAP4 */ |
22003 | | ADDR64, disp12imm64, |
22004 | | /* TRE */ |
22005 | | GR128, GR64, GR128, GR64, |
22006 | | /* TROO */ |
22007 | | GR128, GR64, GR128, GR64, imm32zx4, |
22008 | | /* TROOOpt */ |
22009 | | GR128, GR64, GR128, GR64, |
22010 | | /* TROT */ |
22011 | | GR128, GR64, GR128, GR64, imm32zx4, |
22012 | | /* TROTOpt */ |
22013 | | GR128, GR64, GR128, GR64, |
22014 | | /* TRT */ |
22015 | | ADDR64, disp12imm64, len8imm64, ADDR64, disp12imm64, |
22016 | | /* TRTE */ |
22017 | | GR64, GR128, GR128, imm32zx4, |
22018 | | /* TRTEOpt */ |
22019 | | GR64, GR128, GR128, |
22020 | | /* TRTO */ |
22021 | | GR128, GR64, GR128, GR64, imm32zx4, |
22022 | | /* TRTOOpt */ |
22023 | | GR128, GR64, GR128, GR64, |
22024 | | /* TRTR */ |
22025 | | ADDR64, disp12imm64, len8imm64, ADDR64, disp12imm64, |
22026 | | /* TRTRE */ |
22027 | | GR64, GR128, GR128, imm32zx4, |
22028 | | /* TRTREOpt */ |
22029 | | GR64, GR128, GR128, |
22030 | | /* TRTT */ |
22031 | | GR128, GR64, GR128, GR64, imm32zx4, |
22032 | | /* TRTTOpt */ |
22033 | | GR128, GR64, GR128, GR64, |
22034 | | /* TS */ |
22035 | | ADDR64, disp12imm64, |
22036 | | /* TSCH */ |
22037 | | ADDR64, disp12imm64, |
22038 | | /* UNPK */ |
22039 | | ADDR64, disp12imm64, len4imm64, ADDR64, disp12imm64, len4imm64, |
22040 | | /* UNPKA */ |
22041 | | ADDR64, disp12imm64, len8imm64, ADDR64, disp12imm64, |
22042 | | /* UNPKU */ |
22043 | | ADDR64, disp12imm64, len8imm64, ADDR64, disp12imm64, |
22044 | | /* UPT */ |
22045 | | /* VA */ |
22046 | | VR128, VR128, VR128, imm32zx4, |
22047 | | /* VAB */ |
22048 | | VR128, VR128, VR128, |
22049 | | /* VAC */ |
22050 | | VR128, VR128, VR128, VR128, imm32zx4, |
22051 | | /* VACC */ |
22052 | | VR128, VR128, VR128, imm32zx4, |
22053 | | /* VACCB */ |
22054 | | VR128, VR128, VR128, |
22055 | | /* VACCC */ |
22056 | | VR128, VR128, VR128, VR128, imm32zx4, |
22057 | | /* VACCCQ */ |
22058 | | VR128, VR128, VR128, VR128, |
22059 | | /* VACCF */ |
22060 | | VR128, VR128, VR128, |
22061 | | /* VACCG */ |
22062 | | VR128, VR128, VR128, |
22063 | | /* VACCH */ |
22064 | | VR128, VR128, VR128, |
22065 | | /* VACCQ */ |
22066 | | VR128, VR128, VR128, |
22067 | | /* VACQ */ |
22068 | | VR128, VR128, VR128, VR128, |
22069 | | /* VAF */ |
22070 | | VR128, VR128, VR128, |
22071 | | /* VAG */ |
22072 | | VR128, VR128, VR128, |
22073 | | /* VAH */ |
22074 | | VR128, VR128, VR128, |
22075 | | /* VAP */ |
22076 | | VR128, VR128, VR128, imm32zx8, imm32zx4, |
22077 | | /* VAQ */ |
22078 | | VR128, VR128, VR128, |
22079 | | /* VAVG */ |
22080 | | VR128, VR128, VR128, imm32zx4, |
22081 | | /* VAVGB */ |
22082 | | VR128, VR128, VR128, |
22083 | | /* VAVGF */ |
22084 | | VR128, VR128, VR128, |
22085 | | /* VAVGG */ |
22086 | | VR128, VR128, VR128, |
22087 | | /* VAVGH */ |
22088 | | VR128, VR128, VR128, |
22089 | | /* VAVGL */ |
22090 | | VR128, VR128, VR128, imm32zx4, |
22091 | | /* VAVGLB */ |
22092 | | VR128, VR128, VR128, |
22093 | | /* VAVGLF */ |
22094 | | VR128, VR128, VR128, |
22095 | | /* VAVGLG */ |
22096 | | VR128, VR128, VR128, |
22097 | | /* VAVGLH */ |
22098 | | VR128, VR128, VR128, |
22099 | | /* VBPERM */ |
22100 | | VR128, VR128, VR128, |
22101 | | /* VCDG */ |
22102 | | VR128, VR128, imm32zx4, imm32zx4, imm32zx4, |
22103 | | /* VCDGB */ |
22104 | | VR128, VR128, imm32zx4, imm32zx4, |
22105 | | /* VCDLG */ |
22106 | | VR128, VR128, imm32zx4, imm32zx4, imm32zx4, |
22107 | | /* VCDLGB */ |
22108 | | VR128, VR128, imm32zx4, imm32zx4, |
22109 | | /* VCEFB */ |
22110 | | VR128, VR128, imm32zx4, imm32zx4, |
22111 | | /* VCELFB */ |
22112 | | VR128, VR128, imm32zx4, imm32zx4, |
22113 | | /* VCEQ */ |
22114 | | VR128, VR128, VR128, imm32zx4, imm32zx4, |
22115 | | /* VCEQB */ |
22116 | | VR128, VR128, VR128, |
22117 | | /* VCEQBS */ |
22118 | | VR128, VR128, VR128, |
22119 | | /* VCEQF */ |
22120 | | VR128, VR128, VR128, |
22121 | | /* VCEQFS */ |
22122 | | VR128, VR128, VR128, |
22123 | | /* VCEQG */ |
22124 | | VR128, VR128, VR128, |
22125 | | /* VCEQGS */ |
22126 | | VR128, VR128, VR128, |
22127 | | /* VCEQH */ |
22128 | | VR128, VR128, VR128, |
22129 | | /* VCEQHS */ |
22130 | | VR128, VR128, VR128, |
22131 | | /* VCFEB */ |
22132 | | VR128, VR128, imm32zx4, imm32zx4, |
22133 | | /* VCFN */ |
22134 | | VR128, VR128, imm32zx4, imm32zx4, |
22135 | | /* VCFPL */ |
22136 | | VR128, VR128, imm32zx4, imm32zx4, imm32zx4, |
22137 | | /* VCFPS */ |
22138 | | VR128, VR128, imm32zx4, imm32zx4, imm32zx4, |
22139 | | /* VCGD */ |
22140 | | VR128, VR128, imm32zx4, imm32zx4, imm32zx4, |
22141 | | /* VCGDB */ |
22142 | | VR128, VR128, imm32zx4, imm32zx4, |
22143 | | /* VCH */ |
22144 | | VR128, VR128, VR128, imm32zx4, imm32zx4, |
22145 | | /* VCHB */ |
22146 | | VR128, VR128, VR128, |
22147 | | /* VCHBS */ |
22148 | | VR128, VR128, VR128, |
22149 | | /* VCHF */ |
22150 | | VR128, VR128, VR128, |
22151 | | /* VCHFS */ |
22152 | | VR128, VR128, VR128, |
22153 | | /* VCHG */ |
22154 | | VR128, VR128, VR128, |
22155 | | /* VCHGS */ |
22156 | | VR128, VR128, VR128, |
22157 | | /* VCHH */ |
22158 | | VR128, VR128, VR128, |
22159 | | /* VCHHS */ |
22160 | | VR128, VR128, VR128, |
22161 | | /* VCHL */ |
22162 | | VR128, VR128, VR128, imm32zx4, imm32zx4, |
22163 | | /* VCHLB */ |
22164 | | VR128, VR128, VR128, |
22165 | | /* VCHLBS */ |
22166 | | VR128, VR128, VR128, |
22167 | | /* VCHLF */ |
22168 | | VR128, VR128, VR128, |
22169 | | /* VCHLFS */ |
22170 | | VR128, VR128, VR128, |
22171 | | /* VCHLG */ |
22172 | | VR128, VR128, VR128, |
22173 | | /* VCHLGS */ |
22174 | | VR128, VR128, VR128, |
22175 | | /* VCHLH */ |
22176 | | VR128, VR128, VR128, |
22177 | | /* VCHLHS */ |
22178 | | VR128, VR128, VR128, |
22179 | | /* VCKSM */ |
22180 | | VR128, VR128, VR128, |
22181 | | /* VCLFEB */ |
22182 | | VR128, VR128, imm32zx4, imm32zx4, |
22183 | | /* VCLFNH */ |
22184 | | VR128, VR128, imm32zx4, imm32zx4, |
22185 | | /* VCLFNL */ |
22186 | | VR128, VR128, imm32zx4, imm32zx4, |
22187 | | /* VCLFP */ |
22188 | | VR128, VR128, imm32zx4, imm32zx4, imm32zx4, |
22189 | | /* VCLGD */ |
22190 | | VR128, VR128, imm32zx4, imm32zx4, imm32zx4, |
22191 | | /* VCLGDB */ |
22192 | | VR128, VR128, imm32zx4, imm32zx4, |
22193 | | /* VCLZ */ |
22194 | | VR128, VR128, imm32zx4, |
22195 | | /* VCLZB */ |
22196 | | VR128, VR128, |
22197 | | /* VCLZDP */ |
22198 | | VR128, VR128, imm32zx4, |
22199 | | /* VCLZF */ |
22200 | | VR128, VR128, |
22201 | | /* VCLZG */ |
22202 | | VR128, VR128, |
22203 | | /* VCLZH */ |
22204 | | VR128, VR128, |
22205 | | /* VCNF */ |
22206 | | VR128, VR128, imm32zx4, imm32zx4, |
22207 | | /* VCP */ |
22208 | | VR128, VR128, imm32zx4, |
22209 | | /* VCRNF */ |
22210 | | VR128, VR128, VR128, imm32zx4, imm32zx4, |
22211 | | /* VCSFP */ |
22212 | | VR128, VR128, imm32zx4, imm32zx4, imm32zx4, |
22213 | | /* VCSPH */ |
22214 | | VR128, VR128, VR128, imm32zx4, |
22215 | | /* VCTZ */ |
22216 | | VR128, VR128, imm32zx4, |
22217 | | /* VCTZB */ |
22218 | | VR128, VR128, |
22219 | | /* VCTZF */ |
22220 | | VR128, VR128, |
22221 | | /* VCTZG */ |
22222 | | VR128, VR128, |
22223 | | /* VCTZH */ |
22224 | | VR128, VR128, |
22225 | | /* VCVB */ |
22226 | | GR32, VR128, imm32zx4, |
22227 | | /* VCVBG */ |
22228 | | GR64, VR128, imm32zx4, |
22229 | | /* VCVBGOpt */ |
22230 | | GR64, VR128, imm32zx4, imm32zx4, |
22231 | | /* VCVBOpt */ |
22232 | | GR32, VR128, imm32zx4, imm32zx4, |
22233 | | /* VCVD */ |
22234 | | VR128, GR32, imm32zx8, imm32zx4, |
22235 | | /* VCVDG */ |
22236 | | VR128, GR64, imm32zx8, imm32zx4, |
22237 | | /* VDP */ |
22238 | | VR128, VR128, VR128, imm32zx8, imm32zx4, |
22239 | | /* VEC */ |
22240 | | VR128, VR128, imm32zx4, |
22241 | | /* VECB */ |
22242 | | VR128, VR128, |
22243 | | /* VECF */ |
22244 | | VR128, VR128, |
22245 | | /* VECG */ |
22246 | | VR128, VR128, |
22247 | | /* VECH */ |
22248 | | VR128, VR128, |
22249 | | /* VECL */ |
22250 | | VR128, VR128, imm32zx4, |
22251 | | /* VECLB */ |
22252 | | VR128, VR128, |
22253 | | /* VECLF */ |
22254 | | VR128, VR128, |
22255 | | /* VECLG */ |
22256 | | VR128, VR128, |
22257 | | /* VECLH */ |
22258 | | VR128, VR128, |
22259 | | /* VERIM */ |
22260 | | VR128, VR128, VR128, VR128, imm32zx8, imm32zx4, |
22261 | | /* VERIMB */ |
22262 | | VR128, VR128, VR128, VR128, imm32zx8, |
22263 | | /* VERIMF */ |
22264 | | VR128, VR128, VR128, VR128, imm32zx8, |
22265 | | /* VERIMG */ |
22266 | | VR128, VR128, VR128, VR128, imm32zx8, |
22267 | | /* VERIMH */ |
22268 | | VR128, VR128, VR128, VR128, imm32zx8, |
22269 | | /* VERLL */ |
22270 | | VR128, VR128, ADDR32, disp12imm32, imm32zx4, |
22271 | | /* VERLLB */ |
22272 | | VR128, VR128, ADDR32, disp12imm32, |
22273 | | /* VERLLF */ |
22274 | | VR128, VR128, ADDR32, disp12imm32, |
22275 | | /* VERLLG */ |
22276 | | VR128, VR128, ADDR32, disp12imm32, |
22277 | | /* VERLLH */ |
22278 | | VR128, VR128, ADDR32, disp12imm32, |
22279 | | /* VERLLV */ |
22280 | | VR128, VR128, VR128, imm32zx4, |
22281 | | /* VERLLVB */ |
22282 | | VR128, VR128, VR128, |
22283 | | /* VERLLVF */ |
22284 | | VR128, VR128, VR128, |
22285 | | /* VERLLVG */ |
22286 | | VR128, VR128, VR128, |
22287 | | /* VERLLVH */ |
22288 | | VR128, VR128, VR128, |
22289 | | /* VESL */ |
22290 | | VR128, VR128, ADDR32, disp12imm32, imm32zx4, |
22291 | | /* VESLB */ |
22292 | | VR128, VR128, ADDR32, disp12imm32, |
22293 | | /* VESLF */ |
22294 | | VR128, VR128, ADDR32, disp12imm32, |
22295 | | /* VESLG */ |
22296 | | VR128, VR128, ADDR32, disp12imm32, |
22297 | | /* VESLH */ |
22298 | | VR128, VR128, ADDR32, disp12imm32, |
22299 | | /* VESLV */ |
22300 | | VR128, VR128, VR128, imm32zx4, |
22301 | | /* VESLVB */ |
22302 | | VR128, VR128, VR128, |
22303 | | /* VESLVF */ |
22304 | | VR128, VR128, VR128, |
22305 | | /* VESLVG */ |
22306 | | VR128, VR128, VR128, |
22307 | | /* VESLVH */ |
22308 | | VR128, VR128, VR128, |
22309 | | /* VESRA */ |
22310 | | VR128, VR128, ADDR32, disp12imm32, imm32zx4, |
22311 | | /* VESRAB */ |
22312 | | VR128, VR128, ADDR32, disp12imm32, |
22313 | | /* VESRAF */ |
22314 | | VR128, VR128, ADDR32, disp12imm32, |
22315 | | /* VESRAG */ |
22316 | | VR128, VR128, ADDR32, disp12imm32, |
22317 | | /* VESRAH */ |
22318 | | VR128, VR128, ADDR32, disp12imm32, |
22319 | | /* VESRAV */ |
22320 | | VR128, VR128, VR128, imm32zx4, |
22321 | | /* VESRAVB */ |
22322 | | VR128, VR128, VR128, |
22323 | | /* VESRAVF */ |
22324 | | VR128, VR128, VR128, |
22325 | | /* VESRAVG */ |
22326 | | VR128, VR128, VR128, |
22327 | | /* VESRAVH */ |
22328 | | VR128, VR128, VR128, |
22329 | | /* VESRL */ |
22330 | | VR128, VR128, ADDR32, disp12imm32, imm32zx4, |
22331 | | /* VESRLB */ |
22332 | | VR128, VR128, ADDR32, disp12imm32, |
22333 | | /* VESRLF */ |
22334 | | VR128, VR128, ADDR32, disp12imm32, |
22335 | | /* VESRLG */ |
22336 | | VR128, VR128, ADDR32, disp12imm32, |
22337 | | /* VESRLH */ |
22338 | | VR128, VR128, ADDR32, disp12imm32, |
22339 | | /* VESRLV */ |
22340 | | VR128, VR128, VR128, imm32zx4, |
22341 | | /* VESRLVB */ |
22342 | | VR128, VR128, VR128, |
22343 | | /* VESRLVF */ |
22344 | | VR128, VR128, VR128, |
22345 | | /* VESRLVG */ |
22346 | | VR128, VR128, VR128, |
22347 | | /* VESRLVH */ |
22348 | | VR128, VR128, VR128, |
22349 | | /* VFA */ |
22350 | | VR128, VR128, VR128, imm32zx4, imm32zx4, |
22351 | | /* VFADB */ |
22352 | | VR128, VR128, VR128, |
22353 | | /* VFAE */ |
22354 | | VR128, VR128, VR128, imm32zx4, imm32zx4, |
22355 | | /* VFAEB */ |
22356 | | VR128, VR128, VR128, imm32zx4even_timm, |
22357 | | /* VFAEBS */ |
22358 | | VR128, VR128, VR128, imm32zx4even_timm, |
22359 | | /* VFAEF */ |
22360 | | VR128, VR128, VR128, imm32zx4even_timm, |
22361 | | /* VFAEFS */ |
22362 | | VR128, VR128, VR128, imm32zx4even_timm, |
22363 | | /* VFAEH */ |
22364 | | VR128, VR128, VR128, imm32zx4even_timm, |
22365 | | /* VFAEHS */ |
22366 | | VR128, VR128, VR128, imm32zx4even_timm, |
22367 | | /* VFAEZB */ |
22368 | | VR128, VR128, VR128, imm32zx4even_timm, |
22369 | | /* VFAEZBS */ |
22370 | | VR128, VR128, VR128, imm32zx4even_timm, |
22371 | | /* VFAEZF */ |
22372 | | VR128, VR128, VR128, imm32zx4even_timm, |
22373 | | /* VFAEZFS */ |
22374 | | VR128, VR128, VR128, imm32zx4even_timm, |
22375 | | /* VFAEZH */ |
22376 | | VR128, VR128, VR128, imm32zx4even_timm, |
22377 | | /* VFAEZHS */ |
22378 | | VR128, VR128, VR128, imm32zx4even_timm, |
22379 | | /* VFASB */ |
22380 | | VR128, VR128, VR128, |
22381 | | /* VFCE */ |
22382 | | VR128, VR128, VR128, imm32zx4, imm32zx4, imm32zx4, |
22383 | | /* VFCEDB */ |
22384 | | VR128, VR128, VR128, |
22385 | | /* VFCEDBS */ |
22386 | | VR128, VR128, VR128, |
22387 | | /* VFCESB */ |
22388 | | VR128, VR128, VR128, |
22389 | | /* VFCESBS */ |
22390 | | VR128, VR128, VR128, |
22391 | | /* VFCH */ |
22392 | | VR128, VR128, VR128, imm32zx4, imm32zx4, imm32zx4, |
22393 | | /* VFCHDB */ |
22394 | | VR128, VR128, VR128, |
22395 | | /* VFCHDBS */ |
22396 | | VR128, VR128, VR128, |
22397 | | /* VFCHE */ |
22398 | | VR128, VR128, VR128, imm32zx4, imm32zx4, imm32zx4, |
22399 | | /* VFCHEDB */ |
22400 | | VR128, VR128, VR128, |
22401 | | /* VFCHEDBS */ |
22402 | | VR128, VR128, VR128, |
22403 | | /* VFCHESB */ |
22404 | | VR128, VR128, VR128, |
22405 | | /* VFCHESBS */ |
22406 | | VR128, VR128, VR128, |
22407 | | /* VFCHSB */ |
22408 | | VR128, VR128, VR128, |
22409 | | /* VFCHSBS */ |
22410 | | VR128, VR128, VR128, |
22411 | | /* VFD */ |
22412 | | VR128, VR128, VR128, imm32zx4, imm32zx4, |
22413 | | /* VFDDB */ |
22414 | | VR128, VR128, VR128, |
22415 | | /* VFDSB */ |
22416 | | VR128, VR128, VR128, |
22417 | | /* VFEE */ |
22418 | | VR128, VR128, VR128, imm32zx4, imm32zx4, |
22419 | | /* VFEEB */ |
22420 | | VR128, VR128, VR128, imm32zx4, |
22421 | | /* VFEEBS */ |
22422 | | VR128, VR128, VR128, |
22423 | | /* VFEEF */ |
22424 | | VR128, VR128, VR128, imm32zx4, |
22425 | | /* VFEEFS */ |
22426 | | VR128, VR128, VR128, |
22427 | | /* VFEEH */ |
22428 | | VR128, VR128, VR128, imm32zx4, |
22429 | | /* VFEEHS */ |
22430 | | VR128, VR128, VR128, |
22431 | | /* VFEEZB */ |
22432 | | VR128, VR128, VR128, |
22433 | | /* VFEEZBS */ |
22434 | | VR128, VR128, VR128, |
22435 | | /* VFEEZF */ |
22436 | | VR128, VR128, VR128, |
22437 | | /* VFEEZFS */ |
22438 | | VR128, VR128, VR128, |
22439 | | /* VFEEZH */ |
22440 | | VR128, VR128, VR128, |
22441 | | /* VFEEZHS */ |
22442 | | VR128, VR128, VR128, |
22443 | | /* VFENE */ |
22444 | | VR128, VR128, VR128, imm32zx4, imm32zx4, |
22445 | | /* VFENEB */ |
22446 | | VR128, VR128, VR128, imm32zx4, |
22447 | | /* VFENEBS */ |
22448 | | VR128, VR128, VR128, |
22449 | | /* VFENEF */ |
22450 | | VR128, VR128, VR128, imm32zx4, |
22451 | | /* VFENEFS */ |
22452 | | VR128, VR128, VR128, |
22453 | | /* VFENEH */ |
22454 | | VR128, VR128, VR128, imm32zx4, |
22455 | | /* VFENEHS */ |
22456 | | VR128, VR128, VR128, |
22457 | | /* VFENEZB */ |
22458 | | VR128, VR128, VR128, |
22459 | | /* VFENEZBS */ |
22460 | | VR128, VR128, VR128, |
22461 | | /* VFENEZF */ |
22462 | | VR128, VR128, VR128, |
22463 | | /* VFENEZFS */ |
22464 | | VR128, VR128, VR128, |
22465 | | /* VFENEZH */ |
22466 | | VR128, VR128, VR128, |
22467 | | /* VFENEZHS */ |
22468 | | VR128, VR128, VR128, |
22469 | | /* VFI */ |
22470 | | VR128, VR128, imm32zx4, imm32zx4, imm32zx4, |
22471 | | /* VFIDB */ |
22472 | | VR128, VR128, imm32zx4, imm32zx4, |
22473 | | /* VFISB */ |
22474 | | VR128, VR128, imm32zx4, imm32zx4, |
22475 | | /* VFKEDB */ |
22476 | | VR128, VR128, VR128, |
22477 | | /* VFKEDBS */ |
22478 | | VR128, VR128, VR128, |
22479 | | /* VFKESB */ |
22480 | | VR128, VR128, VR128, |
22481 | | /* VFKESBS */ |
22482 | | VR128, VR128, VR128, |
22483 | | /* VFKHDB */ |
22484 | | VR128, VR128, VR128, |
22485 | | /* VFKHDBS */ |
22486 | | VR128, VR128, VR128, |
22487 | | /* VFKHEDB */ |
22488 | | VR128, VR128, VR128, |
22489 | | /* VFKHEDBS */ |
22490 | | VR128, VR128, VR128, |
22491 | | /* VFKHESB */ |
22492 | | VR128, VR128, VR128, |
22493 | | /* VFKHESBS */ |
22494 | | VR128, VR128, VR128, |
22495 | | /* VFKHSB */ |
22496 | | VR128, VR128, VR128, |
22497 | | /* VFKHSBS */ |
22498 | | VR128, VR128, VR128, |
22499 | | /* VFLCDB */ |
22500 | | VR128, VR128, |
22501 | | /* VFLCSB */ |
22502 | | VR128, VR128, |
22503 | | /* VFLL */ |
22504 | | VR128, VR128, imm32zx4, imm32zx4, |
22505 | | /* VFLLS */ |
22506 | | VR128, VR128, |
22507 | | /* VFLNDB */ |
22508 | | VR128, VR128, |
22509 | | /* VFLNSB */ |
22510 | | VR128, VR128, |
22511 | | /* VFLPDB */ |
22512 | | VR128, VR128, |
22513 | | /* VFLPSB */ |
22514 | | VR128, VR128, |
22515 | | /* VFLR */ |
22516 | | VR128, VR128, imm32zx4, imm32zx4, imm32zx4, |
22517 | | /* VFLRD */ |
22518 | | VR128, VR128, imm32zx4, imm32zx4, |
22519 | | /* VFM */ |
22520 | | VR128, VR128, VR128, imm32zx4, imm32zx4, |
22521 | | /* VFMA */ |
22522 | | VR128, VR128, VR128, VR128, imm32zx4, imm32zx4, |
22523 | | /* VFMADB */ |
22524 | | VR128, VR128, VR128, VR128, |
22525 | | /* VFMASB */ |
22526 | | VR128, VR128, VR128, VR128, |
22527 | | /* VFMAX */ |
22528 | | VR128, VR128, VR128, imm32zx4, imm32zx4, imm32zx4, |
22529 | | /* VFMAXDB */ |
22530 | | VR128, VR128, VR128, imm32zx4, |
22531 | | /* VFMAXSB */ |
22532 | | VR128, VR128, VR128, imm32zx4, |
22533 | | /* VFMDB */ |
22534 | | VR128, VR128, VR128, |
22535 | | /* VFMIN */ |
22536 | | VR128, VR128, VR128, imm32zx4, imm32zx4, imm32zx4, |
22537 | | /* VFMINDB */ |
22538 | | VR128, VR128, VR128, imm32zx4, |
22539 | | /* VFMINSB */ |
22540 | | VR128, VR128, VR128, imm32zx4, |
22541 | | /* VFMS */ |
22542 | | VR128, VR128, VR128, VR128, imm32zx4, imm32zx4, |
22543 | | /* VFMSB */ |
22544 | | VR128, VR128, VR128, |
22545 | | /* VFMSDB */ |
22546 | | VR128, VR128, VR128, VR128, |
22547 | | /* VFMSSB */ |
22548 | | VR128, VR128, VR128, VR128, |
22549 | | /* VFNMA */ |
22550 | | VR128, VR128, VR128, VR128, imm32zx4, imm32zx4, |
22551 | | /* VFNMADB */ |
22552 | | VR128, VR128, VR128, VR128, |
22553 | | /* VFNMASB */ |
22554 | | VR128, VR128, VR128, VR128, |
22555 | | /* VFNMS */ |
22556 | | VR128, VR128, VR128, VR128, imm32zx4, imm32zx4, |
22557 | | /* VFNMSDB */ |
22558 | | VR128, VR128, VR128, VR128, |
22559 | | /* VFNMSSB */ |
22560 | | VR128, VR128, VR128, VR128, |
22561 | | /* VFPSO */ |
22562 | | VR128, VR128, imm32zx4, imm32zx4, imm32zx4, |
22563 | | /* VFPSODB */ |
22564 | | VR128, VR128, imm32zx4, |
22565 | | /* VFPSOSB */ |
22566 | | VR128, VR128, imm32zx4, |
22567 | | /* VFS */ |
22568 | | VR128, VR128, VR128, imm32zx4, imm32zx4, |
22569 | | /* VFSDB */ |
22570 | | VR128, VR128, VR128, |
22571 | | /* VFSQ */ |
22572 | | VR128, VR128, imm32zx4, imm32zx4, |
22573 | | /* VFSQDB */ |
22574 | | VR128, VR128, |
22575 | | /* VFSQSB */ |
22576 | | VR128, VR128, |
22577 | | /* VFSSB */ |
22578 | | VR128, VR128, VR128, |
22579 | | /* VFTCI */ |
22580 | | VR128, VR128, imm32zx12, imm32zx4, imm32zx4, |
22581 | | /* VFTCIDB */ |
22582 | | VR128, VR128, imm32zx12, |
22583 | | /* VFTCISB */ |
22584 | | VR128, VR128, imm32zx12, |
22585 | | /* VGBM */ |
22586 | | VR128, imm32zx16_timm, |
22587 | | /* VGEF */ |
22588 | | VR128, VR128, ADDR64, disp12imm64, VR128, imm32zx2, |
22589 | | /* VGEG */ |
22590 | | VR128, VR128, ADDR64, disp12imm64, VR128, imm32zx1, |
22591 | | /* VGFM */ |
22592 | | VR128, VR128, VR128, imm32zx4, |
22593 | | /* VGFMA */ |
22594 | | VR128, VR128, VR128, VR128, imm32zx4, |
22595 | | /* VGFMAB */ |
22596 | | VR128, VR128, VR128, VR128, |
22597 | | /* VGFMAF */ |
22598 | | VR128, VR128, VR128, VR128, |
22599 | | /* VGFMAG */ |
22600 | | VR128, VR128, VR128, VR128, |
22601 | | /* VGFMAH */ |
22602 | | VR128, VR128, VR128, VR128, |
22603 | | /* VGFMB */ |
22604 | | VR128, VR128, VR128, |
22605 | | /* VGFMF */ |
22606 | | VR128, VR128, VR128, |
22607 | | /* VGFMG */ |
22608 | | VR128, VR128, VR128, |
22609 | | /* VGFMH */ |
22610 | | VR128, VR128, VR128, |
22611 | | /* VGM */ |
22612 | | VR128, imm32zx8, imm32zx8, imm32zx4, |
22613 | | /* VGMB */ |
22614 | | VR128, imm32zx8, imm32zx8, |
22615 | | /* VGMF */ |
22616 | | VR128, imm32zx8, imm32zx8, |
22617 | | /* VGMG */ |
22618 | | VR128, imm32zx8, imm32zx8, |
22619 | | /* VGMH */ |
22620 | | VR128, imm32zx8, imm32zx8, |
22621 | | /* VISTR */ |
22622 | | VR128, VR128, imm32zx4, imm32zx4, |
22623 | | /* VISTRB */ |
22624 | | VR128, VR128, imm32zx4, |
22625 | | /* VISTRBS */ |
22626 | | VR128, VR128, |
22627 | | /* VISTRF */ |
22628 | | VR128, VR128, imm32zx4, |
22629 | | /* VISTRFS */ |
22630 | | VR128, VR128, |
22631 | | /* VISTRH */ |
22632 | | VR128, VR128, imm32zx4, |
22633 | | /* VISTRHS */ |
22634 | | VR128, VR128, |
22635 | | /* VL */ |
22636 | | VR128, ADDR64, disp12imm64, ADDR64, |
22637 | | /* VLAlign */ |
22638 | | VR128, ADDR64, disp12imm64, ADDR64, imm32zx4, |
22639 | | /* VLBB */ |
22640 | | VR128, ADDR64, disp12imm64, ADDR64, imm32zx4, |
22641 | | /* VLBR */ |
22642 | | VR128, ADDR64, disp12imm64, ADDR64, imm32zx4, |
22643 | | /* VLBRF */ |
22644 | | VR128, ADDR64, disp12imm64, ADDR64, |
22645 | | /* VLBRG */ |
22646 | | VR128, ADDR64, disp12imm64, ADDR64, |
22647 | | /* VLBRH */ |
22648 | | VR128, ADDR64, disp12imm64, ADDR64, |
22649 | | /* VLBRQ */ |
22650 | | VR128, ADDR64, disp12imm64, ADDR64, |
22651 | | /* VLBRREP */ |
22652 | | VR128, ADDR64, disp12imm64, ADDR64, imm32zx4, |
22653 | | /* VLBRREPF */ |
22654 | | VR128, ADDR64, disp12imm64, ADDR64, |
22655 | | /* VLBRREPG */ |
22656 | | VR128, ADDR64, disp12imm64, ADDR64, |
22657 | | /* VLBRREPH */ |
22658 | | VR128, ADDR64, disp12imm64, ADDR64, |
22659 | | /* VLC */ |
22660 | | VR128, VR128, imm32zx4, |
22661 | | /* VLCB */ |
22662 | | VR128, VR128, |
22663 | | /* VLCF */ |
22664 | | VR128, VR128, |
22665 | | /* VLCG */ |
22666 | | VR128, VR128, |
22667 | | /* VLCH */ |
22668 | | VR128, VR128, |
22669 | | /* VLDE */ |
22670 | | VR128, VR128, imm32zx4, imm32zx4, |
22671 | | /* VLDEB */ |
22672 | | VR128, VR128, |
22673 | | /* VLEB */ |
22674 | | VR128, VR128, ADDR64, disp12imm64, ADDR64, imm32zx4, |
22675 | | /* VLEBRF */ |
22676 | | VR128, VR128, ADDR64, disp12imm64, ADDR64, imm32zx2, |
22677 | | /* VLEBRG */ |
22678 | | VR128, VR128, ADDR64, disp12imm64, ADDR64, imm32zx1, |
22679 | | /* VLEBRH */ |
22680 | | VR128, VR128, ADDR64, disp12imm64, ADDR64, imm32zx3, |
22681 | | /* VLED */ |
22682 | | VR128, VR128, imm32zx4, imm32zx4, imm32zx4, |
22683 | | /* VLEDB */ |
22684 | | VR128, VR128, imm32zx4, imm32zx4, |
22685 | | /* VLEF */ |
22686 | | VR128, VR128, ADDR64, disp12imm64, ADDR64, imm32zx2, |
22687 | | /* VLEG */ |
22688 | | VR128, VR128, ADDR64, disp12imm64, ADDR64, imm32zx1, |
22689 | | /* VLEH */ |
22690 | | VR128, VR128, ADDR64, disp12imm64, ADDR64, imm32zx3, |
22691 | | /* VLEIB */ |
22692 | | VR128, VR128, imm32sx16trunc, imm32zx4, |
22693 | | /* VLEIF */ |
22694 | | VR128, VR128, imm32sx16, imm32zx2, |
22695 | | /* VLEIG */ |
22696 | | VR128, VR128, imm64sx16, imm32zx1, |
22697 | | /* VLEIH */ |
22698 | | VR128, VR128, imm32sx16trunc, imm32zx3, |
22699 | | /* VLER */ |
22700 | | VR128, ADDR64, disp12imm64, ADDR64, imm32zx4, |
22701 | | /* VLERF */ |
22702 | | VR128, ADDR64, disp12imm64, ADDR64, |
22703 | | /* VLERG */ |
22704 | | VR128, ADDR64, disp12imm64, ADDR64, |
22705 | | /* VLERH */ |
22706 | | VR128, ADDR64, disp12imm64, ADDR64, |
22707 | | /* VLGV */ |
22708 | | GR64, VR128, ADDR32, disp12imm32, imm32zx4, |
22709 | | /* VLGVB */ |
22710 | | GR64, VR128, ADDR32, disp12imm32, |
22711 | | /* VLGVF */ |
22712 | | GR64, VR128, ADDR32, disp12imm32, |
22713 | | /* VLGVG */ |
22714 | | GR64, VR128, ADDR32, disp12imm32, |
22715 | | /* VLGVH */ |
22716 | | GR64, VR128, ADDR32, disp12imm32, |
22717 | | /* VLIP */ |
22718 | | VR128, imm32zx16, imm32zx4, |
22719 | | /* VLL */ |
22720 | | VR128, GR32, ADDR64, disp12imm64, |
22721 | | /* VLLEBRZ */ |
22722 | | VR128, ADDR64, disp12imm64, ADDR64, imm32zx4, |
22723 | | /* VLLEBRZE */ |
22724 | | VR128, ADDR64, disp12imm64, ADDR64, |
22725 | | /* VLLEBRZF */ |
22726 | | VR128, ADDR64, disp12imm64, ADDR64, |
22727 | | /* VLLEBRZG */ |
22728 | | VR128, ADDR64, disp12imm64, ADDR64, |
22729 | | /* VLLEBRZH */ |
22730 | | VR128, ADDR64, disp12imm64, ADDR64, |
22731 | | /* VLLEZ */ |
22732 | | VR128, ADDR64, disp12imm64, ADDR64, imm32zx4, |
22733 | | /* VLLEZB */ |
22734 | | VR128, ADDR64, disp12imm64, ADDR64, |
22735 | | /* VLLEZF */ |
22736 | | VR128, ADDR64, disp12imm64, ADDR64, |
22737 | | /* VLLEZG */ |
22738 | | VR128, ADDR64, disp12imm64, ADDR64, |
22739 | | /* VLLEZH */ |
22740 | | VR128, ADDR64, disp12imm64, ADDR64, |
22741 | | /* VLLEZLF */ |
22742 | | VR128, ADDR64, disp12imm64, ADDR64, |
22743 | | /* VLM */ |
22744 | | VR128, VR128, ADDR64, disp12imm64, |
22745 | | /* VLMAlign */ |
22746 | | VR128, VR128, ADDR64, disp12imm64, imm32zx4, |
22747 | | /* VLP */ |
22748 | | VR128, VR128, imm32zx4, |
22749 | | /* VLPB */ |
22750 | | VR128, VR128, |
22751 | | /* VLPF */ |
22752 | | VR128, VR128, |
22753 | | /* VLPG */ |
22754 | | VR128, VR128, |
22755 | | /* VLPH */ |
22756 | | VR128, VR128, |
22757 | | /* VLR */ |
22758 | | VR128, VR128, |
22759 | | /* VLREP */ |
22760 | | VR128, ADDR64, disp12imm64, ADDR64, imm32zx4, |
22761 | | /* VLREPB */ |
22762 | | VR128, ADDR64, disp12imm64, ADDR64, |
22763 | | /* VLREPF */ |
22764 | | VR128, ADDR64, disp12imm64, ADDR64, |
22765 | | /* VLREPG */ |
22766 | | VR128, ADDR64, disp12imm64, ADDR64, |
22767 | | /* VLREPH */ |
22768 | | VR128, ADDR64, disp12imm64, ADDR64, |
22769 | | /* VLRL */ |
22770 | | VR128, ADDR64, disp12imm64, imm32zx8, |
22771 | | /* VLRLR */ |
22772 | | VR128, GR32, ADDR64, disp12imm64, |
22773 | | /* VLVG */ |
22774 | | VR128, VR128, GR64, ADDR32, disp12imm32, imm32zx4, |
22775 | | /* VLVGB */ |
22776 | | VR128, VR128, GR32, ADDR32, disp12imm32, |
22777 | | /* VLVGF */ |
22778 | | VR128, VR128, GR32, ADDR32, disp12imm32, |
22779 | | /* VLVGG */ |
22780 | | VR128, VR128, GR64, ADDR32, disp12imm32, |
22781 | | /* VLVGH */ |
22782 | | VR128, VR128, GR32, ADDR32, disp12imm32, |
22783 | | /* VLVGP */ |
22784 | | VR128, GR64, GR64, |
22785 | | /* VMAE */ |
22786 | | VR128, VR128, VR128, VR128, imm32zx4, |
22787 | | /* VMAEB */ |
22788 | | VR128, VR128, VR128, VR128, |
22789 | | /* VMAEF */ |
22790 | | VR128, VR128, VR128, VR128, |
22791 | | /* VMAEH */ |
22792 | | VR128, VR128, VR128, VR128, |
22793 | | /* VMAH */ |
22794 | | VR128, VR128, VR128, VR128, imm32zx4, |
22795 | | /* VMAHB */ |
22796 | | VR128, VR128, VR128, VR128, |
22797 | | /* VMAHF */ |
22798 | | VR128, VR128, VR128, VR128, |
22799 | | /* VMAHH */ |
22800 | | VR128, VR128, VR128, VR128, |
22801 | | /* VMAL */ |
22802 | | VR128, VR128, VR128, VR128, imm32zx4, |
22803 | | /* VMALB */ |
22804 | | VR128, VR128, VR128, VR128, |
22805 | | /* VMALE */ |
22806 | | VR128, VR128, VR128, VR128, imm32zx4, |
22807 | | /* VMALEB */ |
22808 | | VR128, VR128, VR128, VR128, |
22809 | | /* VMALEF */ |
22810 | | VR128, VR128, VR128, VR128, |
22811 | | /* VMALEH */ |
22812 | | VR128, VR128, VR128, VR128, |
22813 | | /* VMALF */ |
22814 | | VR128, VR128, VR128, VR128, |
22815 | | /* VMALH */ |
22816 | | VR128, VR128, VR128, VR128, imm32zx4, |
22817 | | /* VMALHB */ |
22818 | | VR128, VR128, VR128, VR128, |
22819 | | /* VMALHF */ |
22820 | | VR128, VR128, VR128, VR128, |
22821 | | /* VMALHH */ |
22822 | | VR128, VR128, VR128, VR128, |
22823 | | /* VMALHW */ |
22824 | | VR128, VR128, VR128, VR128, |
22825 | | /* VMALO */ |
22826 | | VR128, VR128, VR128, VR128, imm32zx4, |
22827 | | /* VMALOB */ |
22828 | | VR128, VR128, VR128, VR128, |
22829 | | /* VMALOF */ |
22830 | | VR128, VR128, VR128, VR128, |
22831 | | /* VMALOH */ |
22832 | | VR128, VR128, VR128, VR128, |
22833 | | /* VMAO */ |
22834 | | VR128, VR128, VR128, VR128, imm32zx4, |
22835 | | /* VMAOB */ |
22836 | | VR128, VR128, VR128, VR128, |
22837 | | /* VMAOF */ |
22838 | | VR128, VR128, VR128, VR128, |
22839 | | /* VMAOH */ |
22840 | | VR128, VR128, VR128, VR128, |
22841 | | /* VME */ |
22842 | | VR128, VR128, VR128, imm32zx4, |
22843 | | /* VMEB */ |
22844 | | VR128, VR128, VR128, |
22845 | | /* VMEF */ |
22846 | | VR128, VR128, VR128, |
22847 | | /* VMEH */ |
22848 | | VR128, VR128, VR128, |
22849 | | /* VMH */ |
22850 | | VR128, VR128, VR128, imm32zx4, |
22851 | | /* VMHB */ |
22852 | | VR128, VR128, VR128, |
22853 | | /* VMHF */ |
22854 | | VR128, VR128, VR128, |
22855 | | /* VMHH */ |
22856 | | VR128, VR128, VR128, |
22857 | | /* VML */ |
22858 | | VR128, VR128, VR128, imm32zx4, |
22859 | | /* VMLB */ |
22860 | | VR128, VR128, VR128, |
22861 | | /* VMLE */ |
22862 | | VR128, VR128, VR128, imm32zx4, |
22863 | | /* VMLEB */ |
22864 | | VR128, VR128, VR128, |
22865 | | /* VMLEF */ |
22866 | | VR128, VR128, VR128, |
22867 | | /* VMLEH */ |
22868 | | VR128, VR128, VR128, |
22869 | | /* VMLF */ |
22870 | | VR128, VR128, VR128, |
22871 | | /* VMLH */ |
22872 | | VR128, VR128, VR128, imm32zx4, |
22873 | | /* VMLHB */ |
22874 | | VR128, VR128, VR128, |
22875 | | /* VMLHF */ |
22876 | | VR128, VR128, VR128, |
22877 | | /* VMLHH */ |
22878 | | VR128, VR128, VR128, |
22879 | | /* VMLHW */ |
22880 | | VR128, VR128, VR128, |
22881 | | /* VMLO */ |
22882 | | VR128, VR128, VR128, imm32zx4, |
22883 | | /* VMLOB */ |
22884 | | VR128, VR128, VR128, |
22885 | | /* VMLOF */ |
22886 | | VR128, VR128, VR128, |
22887 | | /* VMLOH */ |
22888 | | VR128, VR128, VR128, |
22889 | | /* VMN */ |
22890 | | VR128, VR128, VR128, imm32zx4, |
22891 | | /* VMNB */ |
22892 | | VR128, VR128, VR128, |
22893 | | /* VMNF */ |
22894 | | VR128, VR128, VR128, |
22895 | | /* VMNG */ |
22896 | | VR128, VR128, VR128, |
22897 | | /* VMNH */ |
22898 | | VR128, VR128, VR128, |
22899 | | /* VMNL */ |
22900 | | VR128, VR128, VR128, imm32zx4, |
22901 | | /* VMNLB */ |
22902 | | VR128, VR128, VR128, |
22903 | | /* VMNLF */ |
22904 | | VR128, VR128, VR128, |
22905 | | /* VMNLG */ |
22906 | | VR128, VR128, VR128, |
22907 | | /* VMNLH */ |
22908 | | VR128, VR128, VR128, |
22909 | | /* VMO */ |
22910 | | VR128, VR128, VR128, imm32zx4, |
22911 | | /* VMOB */ |
22912 | | VR128, VR128, VR128, |
22913 | | /* VMOF */ |
22914 | | VR128, VR128, VR128, |
22915 | | /* VMOH */ |
22916 | | VR128, VR128, VR128, |
22917 | | /* VMP */ |
22918 | | VR128, VR128, VR128, imm32zx8, imm32zx4, |
22919 | | /* VMRH */ |
22920 | | VR128, VR128, VR128, imm32zx4, |
22921 | | /* VMRHB */ |
22922 | | VR128, VR128, VR128, |
22923 | | /* VMRHF */ |
22924 | | VR128, VR128, VR128, |
22925 | | /* VMRHG */ |
22926 | | VR128, VR128, VR128, |
22927 | | /* VMRHH */ |
22928 | | VR128, VR128, VR128, |
22929 | | /* VMRL */ |
22930 | | VR128, VR128, VR128, imm32zx4, |
22931 | | /* VMRLB */ |
22932 | | VR128, VR128, VR128, |
22933 | | /* VMRLF */ |
22934 | | VR128, VR128, VR128, |
22935 | | /* VMRLG */ |
22936 | | VR128, VR128, VR128, |
22937 | | /* VMRLH */ |
22938 | | VR128, VR128, VR128, |
22939 | | /* VMSL */ |
22940 | | VR128, VR128, VR128, VR128, imm32zx4, imm32zx4, |
22941 | | /* VMSLG */ |
22942 | | VR128, VR128, VR128, VR128, imm32zx4_timm, |
22943 | | /* VMSP */ |
22944 | | VR128, VR128, VR128, imm32zx8, imm32zx4, |
22945 | | /* VMX */ |
22946 | | VR128, VR128, VR128, imm32zx4, |
22947 | | /* VMXB */ |
22948 | | VR128, VR128, VR128, |
22949 | | /* VMXF */ |
22950 | | VR128, VR128, VR128, |
22951 | | /* VMXG */ |
22952 | | VR128, VR128, VR128, |
22953 | | /* VMXH */ |
22954 | | VR128, VR128, VR128, |
22955 | | /* VMXL */ |
22956 | | VR128, VR128, VR128, imm32zx4, |
22957 | | /* VMXLB */ |
22958 | | VR128, VR128, VR128, |
22959 | | /* VMXLF */ |
22960 | | VR128, VR128, VR128, |
22961 | | /* VMXLG */ |
22962 | | VR128, VR128, VR128, |
22963 | | /* VMXLH */ |
22964 | | VR128, VR128, VR128, |
22965 | | /* VN */ |
22966 | | VR128, VR128, VR128, |
22967 | | /* VNC */ |
22968 | | VR128, VR128, VR128, |
22969 | | /* VNN */ |
22970 | | VR128, VR128, VR128, |
22971 | | /* VNO */ |
22972 | | VR128, VR128, VR128, |
22973 | | /* VNX */ |
22974 | | VR128, VR128, VR128, |
22975 | | /* VO */ |
22976 | | VR128, VR128, VR128, |
22977 | | /* VOC */ |
22978 | | VR128, VR128, VR128, |
22979 | | /* VONE */ |
22980 | | VR128, |
22981 | | /* VPDI */ |
22982 | | VR128, VR128, VR128, imm32zx4, |
22983 | | /* VPERM */ |
22984 | | VR128, VR128, VR128, VR128, |
22985 | | /* VPK */ |
22986 | | VR128, VR128, VR128, imm32zx4, |
22987 | | /* VPKF */ |
22988 | | VR128, VR128, VR128, |
22989 | | /* VPKG */ |
22990 | | VR128, VR128, VR128, |
22991 | | /* VPKH */ |
22992 | | VR128, VR128, VR128, |
22993 | | /* VPKLS */ |
22994 | | VR128, VR128, VR128, imm32zx4, imm32zx4, |
22995 | | /* VPKLSF */ |
22996 | | VR128, VR128, VR128, |
22997 | | /* VPKLSFS */ |
22998 | | VR128, VR128, VR128, |
22999 | | /* VPKLSG */ |
23000 | | VR128, VR128, VR128, |
23001 | | /* VPKLSGS */ |
23002 | | VR128, VR128, VR128, |
23003 | | /* VPKLSH */ |
23004 | | VR128, VR128, VR128, |
23005 | | /* VPKLSHS */ |
23006 | | VR128, VR128, VR128, |
23007 | | /* VPKS */ |
23008 | | VR128, VR128, VR128, imm32zx4, imm32zx4, |
23009 | | /* VPKSF */ |
23010 | | VR128, VR128, VR128, |
23011 | | /* VPKSFS */ |
23012 | | VR128, VR128, VR128, |
23013 | | /* VPKSG */ |
23014 | | VR128, VR128, VR128, |
23015 | | /* VPKSGS */ |
23016 | | VR128, VR128, VR128, |
23017 | | /* VPKSH */ |
23018 | | VR128, VR128, VR128, |
23019 | | /* VPKSHS */ |
23020 | | VR128, VR128, VR128, |
23021 | | /* VPKZ */ |
23022 | | VR128, ADDR64, disp12imm64, imm32zx8, |
23023 | | /* VPKZR */ |
23024 | | VR128, VR128, VR128, imm32zx8, imm32zx4, |
23025 | | /* VPOPCT */ |
23026 | | VR128, VR128, imm32zx4, |
23027 | | /* VPOPCTB */ |
23028 | | VR128, VR128, |
23029 | | /* VPOPCTF */ |
23030 | | VR128, VR128, |
23031 | | /* VPOPCTG */ |
23032 | | VR128, VR128, |
23033 | | /* VPOPCTH */ |
23034 | | VR128, VR128, |
23035 | | /* VPSOP */ |
23036 | | VR128, VR128, imm32zx8, imm32zx8, imm32zx4, |
23037 | | /* VREP */ |
23038 | | VR128, VR128, imm32zx16, imm32zx4, |
23039 | | /* VREPB */ |
23040 | | VR128, VR128, imm32zx16, |
23041 | | /* VREPF */ |
23042 | | VR128, VR128, imm32zx16, |
23043 | | /* VREPG */ |
23044 | | VR128, VR128, imm32zx16, |
23045 | | /* VREPH */ |
23046 | | VR128, VR128, imm32zx16, |
23047 | | /* VREPI */ |
23048 | | VR128, imm32sx16, imm32zx4, |
23049 | | /* VREPIB */ |
23050 | | VR128, imm32sx16_timm, |
23051 | | /* VREPIF */ |
23052 | | VR128, imm32sx16_timm, |
23053 | | /* VREPIG */ |
23054 | | VR128, imm32sx16_timm, |
23055 | | /* VREPIH */ |
23056 | | VR128, imm32sx16_timm, |
23057 | | /* VRP */ |
23058 | | VR128, VR128, VR128, imm32zx8, imm32zx4, |
23059 | | /* VS */ |
23060 | | VR128, VR128, VR128, imm32zx4, |
23061 | | /* VSB */ |
23062 | | VR128, VR128, VR128, |
23063 | | /* VSBCBI */ |
23064 | | VR128, VR128, VR128, VR128, imm32zx4, |
23065 | | /* VSBCBIQ */ |
23066 | | VR128, VR128, VR128, VR128, |
23067 | | /* VSBI */ |
23068 | | VR128, VR128, VR128, VR128, imm32zx4, |
23069 | | /* VSBIQ */ |
23070 | | VR128, VR128, VR128, VR128, |
23071 | | /* VSCBI */ |
23072 | | VR128, VR128, VR128, imm32zx4, |
23073 | | /* VSCBIB */ |
23074 | | VR128, VR128, VR128, |
23075 | | /* VSCBIF */ |
23076 | | VR128, VR128, VR128, |
23077 | | /* VSCBIG */ |
23078 | | VR128, VR128, VR128, |
23079 | | /* VSCBIH */ |
23080 | | VR128, VR128, VR128, |
23081 | | /* VSCBIQ */ |
23082 | | VR128, VR128, VR128, |
23083 | | /* VSCEF */ |
23084 | | VR128, ADDR64, disp12imm64, VR128, imm32zx2, |
23085 | | /* VSCEG */ |
23086 | | VR128, ADDR64, disp12imm64, VR128, imm32zx1, |
23087 | | /* VSCHDP */ |
23088 | | VR128, VR128, VR128, imm32zx4, |
23089 | | /* VSCHP */ |
23090 | | VR128, VR128, VR128, imm32zx4, imm32zx4, |
23091 | | /* VSCHSP */ |
23092 | | VR128, VR128, VR128, imm32zx4, |
23093 | | /* VSCHXP */ |
23094 | | VR128, VR128, VR128, imm32zx4, |
23095 | | /* VSCSHP */ |
23096 | | VR128, VR128, VR128, |
23097 | | /* VSDP */ |
23098 | | VR128, VR128, VR128, imm32zx8, imm32zx4, |
23099 | | /* VSEG */ |
23100 | | VR128, VR128, imm32zx4, |
23101 | | /* VSEGB */ |
23102 | | VR128, VR128, |
23103 | | /* VSEGF */ |
23104 | | VR128, VR128, |
23105 | | /* VSEGH */ |
23106 | | VR128, VR128, |
23107 | | /* VSEL */ |
23108 | | VR128, VR128, VR128, VR128, |
23109 | | /* VSF */ |
23110 | | VR128, VR128, VR128, |
23111 | | /* VSG */ |
23112 | | VR128, VR128, VR128, |
23113 | | /* VSH */ |
23114 | | VR128, VR128, VR128, |
23115 | | /* VSL */ |
23116 | | VR128, VR128, VR128, |
23117 | | /* VSLB */ |
23118 | | VR128, VR128, VR128, |
23119 | | /* VSLD */ |
23120 | | VR128, VR128, VR128, imm32zx8, |
23121 | | /* VSLDB */ |
23122 | | VR128, VR128, VR128, imm32zx8, |
23123 | | /* VSP */ |
23124 | | VR128, VR128, VR128, imm32zx8, imm32zx4, |
23125 | | /* VSQ */ |
23126 | | VR128, VR128, VR128, |
23127 | | /* VSRA */ |
23128 | | VR128, VR128, VR128, |
23129 | | /* VSRAB */ |
23130 | | VR128, VR128, VR128, |
23131 | | /* VSRD */ |
23132 | | VR128, VR128, VR128, imm32zx8, |
23133 | | /* VSRL */ |
23134 | | VR128, VR128, VR128, |
23135 | | /* VSRLB */ |
23136 | | VR128, VR128, VR128, |
23137 | | /* VSRP */ |
23138 | | VR128, VR128, imm32zx8, imm32zx8, imm32zx4, |
23139 | | /* VSRPR */ |
23140 | | VR128, VR128, VR128, imm32zx8, imm32zx4, |
23141 | | /* VST */ |
23142 | | VR128, ADDR64, disp12imm64, ADDR64, |
23143 | | /* VSTAlign */ |
23144 | | VR128, ADDR64, disp12imm64, ADDR64, imm32zx4, |
23145 | | /* VSTBR */ |
23146 | | VR128, ADDR64, disp12imm64, ADDR64, imm32zx4, |
23147 | | /* VSTBRF */ |
23148 | | VR128, ADDR64, disp12imm64, ADDR64, |
23149 | | /* VSTBRG */ |
23150 | | VR128, ADDR64, disp12imm64, ADDR64, |
23151 | | /* VSTBRH */ |
23152 | | VR128, ADDR64, disp12imm64, ADDR64, |
23153 | | /* VSTBRQ */ |
23154 | | VR128, ADDR64, disp12imm64, ADDR64, |
23155 | | /* VSTEB */ |
23156 | | VR128, ADDR64, disp12imm64, ADDR64, imm32zx4, |
23157 | | /* VSTEBRF */ |
23158 | | VR128, ADDR64, disp12imm64, ADDR64, imm32zx2, |
23159 | | /* VSTEBRG */ |
23160 | | VR128, ADDR64, disp12imm64, ADDR64, imm32zx1, |
23161 | | /* VSTEBRH */ |
23162 | | VR128, ADDR64, disp12imm64, ADDR64, imm32zx3, |
23163 | | /* VSTEF */ |
23164 | | VR128, ADDR64, disp12imm64, ADDR64, imm32zx2, |
23165 | | /* VSTEG */ |
23166 | | VR128, ADDR64, disp12imm64, ADDR64, imm32zx1, |
23167 | | /* VSTEH */ |
23168 | | VR128, ADDR64, disp12imm64, ADDR64, imm32zx3, |
23169 | | /* VSTER */ |
23170 | | VR128, ADDR64, disp12imm64, ADDR64, imm32zx4, |
23171 | | /* VSTERF */ |
23172 | | VR128, ADDR64, disp12imm64, ADDR64, |
23173 | | /* VSTERG */ |
23174 | | VR128, ADDR64, disp12imm64, ADDR64, |
23175 | | /* VSTERH */ |
23176 | | VR128, ADDR64, disp12imm64, ADDR64, |
23177 | | /* VSTL */ |
23178 | | VR128, GR32, ADDR64, disp12imm64, |
23179 | | /* VSTM */ |
23180 | | VR128, VR128, ADDR64, disp12imm64, |
23181 | | /* VSTMAlign */ |
23182 | | VR128, VR128, ADDR64, disp12imm64, imm32zx4, |
23183 | | /* VSTRC */ |
23184 | | VR128, VR128, VR128, VR128, imm32zx4, imm32zx4, |
23185 | | /* VSTRCB */ |
23186 | | VR128, VR128, VR128, VR128, imm32zx4even_timm, |
23187 | | /* VSTRCBS */ |
23188 | | VR128, VR128, VR128, VR128, imm32zx4even_timm, |
23189 | | /* VSTRCF */ |
23190 | | VR128, VR128, VR128, VR128, imm32zx4even_timm, |
23191 | | /* VSTRCFS */ |
23192 | | VR128, VR128, VR128, VR128, imm32zx4even_timm, |
23193 | | /* VSTRCH */ |
23194 | | VR128, VR128, VR128, VR128, imm32zx4even_timm, |
23195 | | /* VSTRCHS */ |
23196 | | VR128, VR128, VR128, VR128, imm32zx4even_timm, |
23197 | | /* VSTRCZB */ |
23198 | | VR128, VR128, VR128, VR128, imm32zx4even_timm, |
23199 | | /* VSTRCZBS */ |
23200 | | VR128, VR128, VR128, VR128, imm32zx4even_timm, |
23201 | | /* VSTRCZF */ |
23202 | | VR128, VR128, VR128, VR128, imm32zx4even_timm, |
23203 | | /* VSTRCZFS */ |
23204 | | VR128, VR128, VR128, VR128, imm32zx4even_timm, |
23205 | | /* VSTRCZH */ |
23206 | | VR128, VR128, VR128, VR128, imm32zx4even_timm, |
23207 | | /* VSTRCZHS */ |
23208 | | VR128, VR128, VR128, VR128, imm32zx4even_timm, |
23209 | | /* VSTRL */ |
23210 | | VR128, ADDR64, disp12imm64, imm32zx8, |
23211 | | /* VSTRLR */ |
23212 | | VR128, GR32, ADDR64, disp12imm64, |
23213 | | /* VSTRS */ |
23214 | | VR128, VR128, VR128, VR128, imm32zx4, imm32zx4, |
23215 | | /* VSTRSB */ |
23216 | | VR128, VR128, VR128, VR128, imm32zx4, |
23217 | | /* VSTRSF */ |
23218 | | VR128, VR128, VR128, VR128, imm32zx4, |
23219 | | /* VSTRSH */ |
23220 | | VR128, VR128, VR128, VR128, imm32zx4, |
23221 | | /* VSTRSZB */ |
23222 | | VR128, VR128, VR128, VR128, |
23223 | | /* VSTRSZF */ |
23224 | | VR128, VR128, VR128, VR128, |
23225 | | /* VSTRSZH */ |
23226 | | VR128, VR128, VR128, VR128, |
23227 | | /* VSUM */ |
23228 | | VR128, VR128, VR128, imm32zx4, |
23229 | | /* VSUMB */ |
23230 | | VR128, VR128, VR128, |
23231 | | /* VSUMG */ |
23232 | | VR128, VR128, VR128, imm32zx4, |
23233 | | /* VSUMGF */ |
23234 | | VR128, VR128, VR128, |
23235 | | /* VSUMGH */ |
23236 | | VR128, VR128, VR128, |
23237 | | /* VSUMH */ |
23238 | | VR128, VR128, VR128, |
23239 | | /* VSUMQ */ |
23240 | | VR128, VR128, VR128, imm32zx4, |
23241 | | /* VSUMQF */ |
23242 | | VR128, VR128, VR128, |
23243 | | /* VSUMQG */ |
23244 | | VR128, VR128, VR128, |
23245 | | /* VTM */ |
23246 | | VR128, VR128, |
23247 | | /* VTP */ |
23248 | | VR128, |
23249 | | /* VUPH */ |
23250 | | VR128, VR128, imm32zx4, |
23251 | | /* VUPHB */ |
23252 | | VR128, VR128, |
23253 | | /* VUPHF */ |
23254 | | VR128, VR128, |
23255 | | /* VUPHH */ |
23256 | | VR128, VR128, |
23257 | | /* VUPKZ */ |
23258 | | VR128, ADDR64, disp12imm64, imm32zx8, |
23259 | | /* VUPKZH */ |
23260 | | VR128, VR128, imm32zx4, |
23261 | | /* VUPKZL */ |
23262 | | VR128, VR128, imm32zx4, |
23263 | | /* VUPL */ |
23264 | | VR128, VR128, imm32zx4, |
23265 | | /* VUPLB */ |
23266 | | VR128, VR128, |
23267 | | /* VUPLF */ |
23268 | | VR128, VR128, |
23269 | | /* VUPLH */ |
23270 | | VR128, VR128, imm32zx4, |
23271 | | /* VUPLHB */ |
23272 | | VR128, VR128, |
23273 | | /* VUPLHF */ |
23274 | | VR128, VR128, |
23275 | | /* VUPLHH */ |
23276 | | VR128, VR128, |
23277 | | /* VUPLHW */ |
23278 | | VR128, VR128, |
23279 | | /* VUPLL */ |
23280 | | VR128, VR128, imm32zx4, |
23281 | | /* VUPLLB */ |
23282 | | VR128, VR128, |
23283 | | /* VUPLLF */ |
23284 | | VR128, VR128, |
23285 | | /* VUPLLH */ |
23286 | | VR128, VR128, |
23287 | | /* VX */ |
23288 | | VR128, VR128, VR128, |
23289 | | /* VZERO */ |
23290 | | VR128, |
23291 | | /* WCDGB */ |
23292 | | VR64, VR64, imm32zx4, imm32zx4, |
23293 | | /* WCDLGB */ |
23294 | | VR64, VR64, imm32zx4, imm32zx4, |
23295 | | /* WCEFB */ |
23296 | | VR32, VR32, imm32zx4, imm32zx4, |
23297 | | /* WCELFB */ |
23298 | | VR32, VR32, imm32zx4, imm32zx4, |
23299 | | /* WCFEB */ |
23300 | | VR32, VR32, imm32zx4, imm32zx4, |
23301 | | /* WCGDB */ |
23302 | | VR64, VR64, imm32zx4, imm32zx4, |
23303 | | /* WCLFEB */ |
23304 | | VR32, VR32, imm32zx4, imm32zx4, |
23305 | | /* WCLGDB */ |
23306 | | VR64, VR64, imm32zx4, imm32zx4, |
23307 | | /* WFADB */ |
23308 | | VR64, VR64, VR64, |
23309 | | /* WFASB */ |
23310 | | VR32, VR32, VR32, |
23311 | | /* WFAXB */ |
23312 | | VR128, VR128, VR128, |
23313 | | /* WFC */ |
23314 | | VR64, VR64, imm32zx4, imm32zx4, |
23315 | | /* WFCDB */ |
23316 | | VR64, VR64, |
23317 | | /* WFCEDB */ |
23318 | | VR64, VR64, VR64, |
23319 | | /* WFCEDBS */ |
23320 | | VR64, VR64, VR64, |
23321 | | /* WFCESB */ |
23322 | | VR32, VR32, VR32, |
23323 | | /* WFCESBS */ |
23324 | | VR32, VR32, VR32, |
23325 | | /* WFCEXB */ |
23326 | | VR128, VR128, VR128, |
23327 | | /* WFCEXBS */ |
23328 | | VR128, VR128, VR128, |
23329 | | /* WFCHDB */ |
23330 | | VR64, VR64, VR64, |
23331 | | /* WFCHDBS */ |
23332 | | VR64, VR64, VR64, |
23333 | | /* WFCHEDB */ |
23334 | | VR64, VR64, VR64, |
23335 | | /* WFCHEDBS */ |
23336 | | VR64, VR64, VR64, |
23337 | | /* WFCHESB */ |
23338 | | VR32, VR32, VR32, |
23339 | | /* WFCHESBS */ |
23340 | | VR32, VR32, VR32, |
23341 | | /* WFCHEXB */ |
23342 | | VR128, VR128, VR128, |
23343 | | /* WFCHEXBS */ |
23344 | | VR128, VR128, VR128, |
23345 | | /* WFCHSB */ |
23346 | | VR32, VR32, VR32, |
23347 | | /* WFCHSBS */ |
23348 | | VR32, VR32, VR32, |
23349 | | /* WFCHXB */ |
23350 | | VR128, VR128, VR128, |
23351 | | /* WFCHXBS */ |
23352 | | VR128, VR128, VR128, |
23353 | | /* WFCSB */ |
23354 | | VR32, VR32, |
23355 | | /* WFCXB */ |
23356 | | VR128, VR128, |
23357 | | /* WFDDB */ |
23358 | | VR64, VR64, VR64, |
23359 | | /* WFDSB */ |
23360 | | VR32, VR32, VR32, |
23361 | | /* WFDXB */ |
23362 | | VR128, VR128, VR128, |
23363 | | /* WFIDB */ |
23364 | | VR64, VR64, imm32zx4, imm32zx4, |
23365 | | /* WFISB */ |
23366 | | VR32, VR32, imm32zx4, imm32zx4, |
23367 | | /* WFIXB */ |
23368 | | VR128, VR128, imm32zx4, imm32zx4, |
23369 | | /* WFK */ |
23370 | | VR64, VR64, imm32zx4, imm32zx4, |
23371 | | /* WFKDB */ |
23372 | | VR64, VR64, |
23373 | | /* WFKEDB */ |
23374 | | VR64, VR64, VR64, |
23375 | | /* WFKEDBS */ |
23376 | | VR64, VR64, VR64, |
23377 | | /* WFKESB */ |
23378 | | VR32, VR32, VR32, |
23379 | | /* WFKESBS */ |
23380 | | VR32, VR32, VR32, |
23381 | | /* WFKEXB */ |
23382 | | VR128, VR128, VR128, |
23383 | | /* WFKEXBS */ |
23384 | | VR128, VR128, VR128, |
23385 | | /* WFKHDB */ |
23386 | | VR64, VR64, VR64, |
23387 | | /* WFKHDBS */ |
23388 | | VR64, VR64, VR64, |
23389 | | /* WFKHEDB */ |
23390 | | VR64, VR64, VR64, |
23391 | | /* WFKHEDBS */ |
23392 | | VR64, VR64, VR64, |
23393 | | /* WFKHESB */ |
23394 | | VR32, VR32, VR32, |
23395 | | /* WFKHESBS */ |
23396 | | VR32, VR32, VR32, |
23397 | | /* WFKHEXB */ |
23398 | | VR128, VR128, VR128, |
23399 | | /* WFKHEXBS */ |
23400 | | VR128, VR128, VR128, |
23401 | | /* WFKHSB */ |
23402 | | VR32, VR32, VR32, |
23403 | | /* WFKHSBS */ |
23404 | | VR32, VR32, VR32, |
23405 | | /* WFKHXB */ |
23406 | | VR128, VR128, VR128, |
23407 | | /* WFKHXBS */ |
23408 | | VR128, VR128, VR128, |
23409 | | /* WFKSB */ |
23410 | | VR32, VR32, |
23411 | | /* WFKXB */ |
23412 | | VR128, VR128, |
23413 | | /* WFLCDB */ |
23414 | | VR64, VR64, |
23415 | | /* WFLCSB */ |
23416 | | VR32, VR32, |
23417 | | /* WFLCXB */ |
23418 | | VR128, VR128, |
23419 | | /* WFLLD */ |
23420 | | VR128, VR64, |
23421 | | /* WFLLS */ |
23422 | | VR64, VR32, |
23423 | | /* WFLNDB */ |
23424 | | VR64, VR64, |
23425 | | /* WFLNSB */ |
23426 | | VR32, VR32, |
23427 | | /* WFLNXB */ |
23428 | | VR128, VR128, |
23429 | | /* WFLPDB */ |
23430 | | VR64, VR64, |
23431 | | /* WFLPSB */ |
23432 | | VR32, VR32, |
23433 | | /* WFLPXB */ |
23434 | | VR128, VR128, |
23435 | | /* WFLRD */ |
23436 | | VR32, VR64, imm32zx4, imm32zx4, |
23437 | | /* WFLRX */ |
23438 | | VR64, VR128, imm32zx4, imm32zx4, |
23439 | | /* WFMADB */ |
23440 | | VR64, VR64, VR64, VR64, |
23441 | | /* WFMASB */ |
23442 | | VR32, VR32, VR32, VR32, |
23443 | | /* WFMAXB */ |
23444 | | VR128, VR128, VR128, VR128, |
23445 | | /* WFMAXDB */ |
23446 | | VR64, VR64, VR64, imm32zx4, |
23447 | | /* WFMAXSB */ |
23448 | | VR32, VR32, VR32, imm32zx4, |
23449 | | /* WFMAXXB */ |
23450 | | VR128, VR128, VR128, imm32zx4, |
23451 | | /* WFMDB */ |
23452 | | VR64, VR64, VR64, |
23453 | | /* WFMINDB */ |
23454 | | VR64, VR64, VR64, imm32zx4, |
23455 | | /* WFMINSB */ |
23456 | | VR32, VR32, VR32, imm32zx4, |
23457 | | /* WFMINXB */ |
23458 | | VR128, VR128, VR128, imm32zx4, |
23459 | | /* WFMSB */ |
23460 | | VR32, VR32, VR32, |
23461 | | /* WFMSDB */ |
23462 | | VR64, VR64, VR64, VR64, |
23463 | | /* WFMSSB */ |
23464 | | VR32, VR32, VR32, VR32, |
23465 | | /* WFMSXB */ |
23466 | | VR128, VR128, VR128, VR128, |
23467 | | /* WFMXB */ |
23468 | | VR128, VR128, VR128, |
23469 | | /* WFNMADB */ |
23470 | | VR64, VR64, VR64, VR64, |
23471 | | /* WFNMASB */ |
23472 | | VR32, VR32, VR32, VR32, |
23473 | | /* WFNMAXB */ |
23474 | | VR128, VR128, VR128, VR128, |
23475 | | /* WFNMSDB */ |
23476 | | VR64, VR64, VR64, VR64, |
23477 | | /* WFNMSSB */ |
23478 | | VR32, VR32, VR32, VR32, |
23479 | | /* WFNMSXB */ |
23480 | | VR128, VR128, VR128, VR128, |
23481 | | /* WFPSODB */ |
23482 | | VR64, VR64, imm32zx4, |
23483 | | /* WFPSOSB */ |
23484 | | VR32, VR32, imm32zx4, |
23485 | | /* WFPSOXB */ |
23486 | | VR128, VR128, imm32zx4, |
23487 | | /* WFSDB */ |
23488 | | VR64, VR64, VR64, |
23489 | | /* WFSQDB */ |
23490 | | VR64, VR64, |
23491 | | /* WFSQSB */ |
23492 | | VR32, VR32, |
23493 | | /* WFSQXB */ |
23494 | | VR128, VR128, |
23495 | | /* WFSSB */ |
23496 | | VR32, VR32, VR32, |
23497 | | /* WFSXB */ |
23498 | | VR128, VR128, VR128, |
23499 | | /* WFTCIDB */ |
23500 | | VR64, VR64, imm32zx12, |
23501 | | /* WFTCISB */ |
23502 | | VR32, VR32, imm32zx12, |
23503 | | /* WFTCIXB */ |
23504 | | VR128, VR128, imm32zx12, |
23505 | | /* WLDEB */ |
23506 | | VR64, VR32, |
23507 | | /* WLEDB */ |
23508 | | VR32, VR64, imm32zx4, imm32zx4, |
23509 | | /* X */ |
23510 | | GR32, GR32, ADDR64, disp12imm64, ADDR64, |
23511 | | /* XC */ |
23512 | | ADDR64, disp12imm64, len8imm64, ADDR64, disp12imm64, |
23513 | | /* XG */ |
23514 | | GR64, GR64, ADDR64, disp20imm64, ADDR64, |
23515 | | /* XGR */ |
23516 | | GR64, GR64, GR64, |
23517 | | /* XGRK */ |
23518 | | GR64, GR64, GR64, |
23519 | | /* XI */ |
23520 | | ADDR64, disp12imm64, imm32zx8, |
23521 | | /* XIHF */ |
23522 | | GRH32, GRH32, uimm32, |
23523 | | /* XILF */ |
23524 | | GR32, GR32, uimm32, |
23525 | | /* XIY */ |
23526 | | ADDR64, disp20imm64, imm32zx8, |
23527 | | /* XR */ |
23528 | | GR32, GR32, GR32, |
23529 | | /* XRK */ |
23530 | | GR32, GR32, GR32, |
23531 | | /* XSCH */ |
23532 | | /* XY */ |
23533 | | GR32, GR32, ADDR64, disp20imm64, ADDR64, |
23534 | | /* ZAP */ |
23535 | | ADDR64, disp12imm64, len4imm64, ADDR64, disp12imm64, len4imm64, |
23536 | | }; |
23537 | | return OpcodeOperandTypes[Offsets[Opcode] + OpIdx]; |
23538 | | } |
23539 | | } // end namespace SystemZ |
23540 | | } // end namespace llvm |
23541 | | #endif // GET_INSTRINFO_OPERAND_TYPE |
23542 | | |
23543 | | #ifdef GET_INSTRINFO_MEM_OPERAND_SIZE |
23544 | | #undef GET_INSTRINFO_MEM_OPERAND_SIZE |
23545 | | namespace llvm { |
23546 | | namespace SystemZ { |
23547 | | LLVM_READONLY |
23548 | | static int getMemOperandSize(int OpType) { |
23549 | | switch (OpType) { |
23550 | | default: return 0; |
23551 | | } |
23552 | | } |
23553 | | } // end namespace SystemZ |
23554 | | } // end namespace llvm |
23555 | | #endif // GET_INSTRINFO_MEM_OPERAND_SIZE |
23556 | | |
23557 | | #ifdef GET_INSTRINFO_LOGICAL_OPERAND_SIZE_MAP |
23558 | | #undef GET_INSTRINFO_LOGICAL_OPERAND_SIZE_MAP |
23559 | | namespace llvm { |
23560 | | namespace SystemZ { |
23561 | | LLVM_READONLY static unsigned |
23562 | | getLogicalOperandSize(uint16_t Opcode, uint16_t LogicalOpIdx) { |
23563 | | return LogicalOpIdx; |
23564 | | } |
23565 | | LLVM_READONLY static inline unsigned |
23566 | | getLogicalOperandIdx(uint16_t Opcode, uint16_t LogicalOpIdx) { |
23567 | | auto S = 0U; |
23568 | | for (auto i = 0U; i < LogicalOpIdx; ++i) |
23569 | | S += getLogicalOperandSize(Opcode, i); |
23570 | | return S; |
23571 | | } |
23572 | | } // end namespace SystemZ |
23573 | | } // end namespace llvm |
23574 | | #endif // GET_INSTRINFO_LOGICAL_OPERAND_SIZE_MAP |
23575 | | |
23576 | | #ifdef GET_INSTRINFO_LOGICAL_OPERAND_TYPE_MAP |
23577 | | #undef GET_INSTRINFO_LOGICAL_OPERAND_TYPE_MAP |
23578 | | namespace llvm { |
23579 | | namespace SystemZ { |
23580 | | LLVM_READONLY static int |
23581 | | getLogicalOperandType(uint16_t Opcode, uint16_t LogicalOpIdx) { |
23582 | | return -1; |
23583 | | } |
23584 | | } // end namespace SystemZ |
23585 | | } // end namespace llvm |
23586 | | #endif // GET_INSTRINFO_LOGICAL_OPERAND_TYPE_MAP |
23587 | | |
23588 | | #ifdef GET_INSTRINFO_MC_HELPER_DECLS |
23589 | | #undef GET_INSTRINFO_MC_HELPER_DECLS |
23590 | | |
23591 | | namespace llvm { |
23592 | | class MCInst; |
23593 | | class FeatureBitset; |
23594 | | |
23595 | | namespace SystemZ_MC { |
23596 | | |
23597 | | void verifyInstructionPredicates(unsigned Opcode, const FeatureBitset &Features); |
23598 | | |
23599 | | } // end namespace SystemZ_MC |
23600 | | } // end namespace llvm |
23601 | | |
23602 | | #endif // GET_INSTRINFO_MC_HELPER_DECLS |
23603 | | |
23604 | | #ifdef GET_INSTRINFO_MC_HELPERS |
23605 | | #undef GET_INSTRINFO_MC_HELPERS |
23606 | | |
23607 | | namespace llvm { |
23608 | | namespace SystemZ_MC { |
23609 | | |
23610 | | } // end namespace SystemZ_MC |
23611 | | } // end namespace llvm |
23612 | | |
23613 | | #endif // GET_GENISTRINFO_MC_HELPERS |
23614 | | |
23615 | | #if (defined(ENABLE_INSTR_PREDICATE_VERIFIER) && !defined(NDEBUG)) ||\ |
23616 | | defined(GET_AVAILABLE_OPCODE_CHECKER) |
23617 | | #define GET_COMPUTE_FEATURES |
23618 | | #endif |
23619 | | #ifdef GET_COMPUTE_FEATURES |
23620 | | #undef GET_COMPUTE_FEATURES |
23621 | | namespace llvm { |
23622 | | namespace SystemZ_MC { |
23623 | | |
23624 | | // Bits for subtarget features that participate in instruction matching. |
23625 | | enum SubtargetFeatureBits : uint8_t { |
23626 | | Feature_FeatureSoftFloatBit = 34, |
23627 | | Feature_FeatureBackChainBit = 1, |
23628 | | Feature_FeatureDistinctOpsBit = 5, |
23629 | | Feature_FeatureFastSerializationBit = 10, |
23630 | | Feature_FeatureFPExtensionBit = 9, |
23631 | | Feature_FeatureHighWordBit = 12, |
23632 | | Feature_FeatureInterlockedAccess1Bit = 14, |
23633 | | Feature_FeatureLoadStoreOnCondBit = 17, |
23634 | | Feature_FeaturePopulationCountBit = 29, |
23635 | | Feature_FeatureMessageSecurityAssist3Bit = 19, |
23636 | | Feature_FeatureMessageSecurityAssist4Bit = 20, |
23637 | | Feature_FeatureResetReferenceBitsMultipleBit = 33, |
23638 | | Feature_FeatureExecutionHintBit = 8, |
23639 | | Feature_FeatureLoadAndTrapBit = 15, |
23640 | | Feature_FeatureMiscellaneousExtensionsBit = 25, |
23641 | | Feature_FeatureProcessorAssistBit = 31, |
23642 | | Feature_FeatureTransactionalExecutionBit = 35, |
23643 | | Feature_FeatureDFPZonedConversionBit = 3, |
23644 | | Feature_FeatureEnhancedDAT2Bit = 6, |
23645 | | Feature_FeatureLoadAndZeroRightmostByteBit = 16, |
23646 | | Feature_FeatureLoadStoreOnCond2Bit = 18, |
23647 | | Feature_FeatureMessageSecurityAssist5Bit = 21, |
23648 | | Feature_FeatureDFPPackedConversionBit = 2, |
23649 | | Feature_FeatureVectorBit = 36, |
23650 | | Feature_FeatureMiscellaneousExtensions2Bit = 26, |
23651 | | Feature_FeatureGuardedStorageBit = 11, |
23652 | | Feature_FeatureMessageSecurityAssist7Bit = 22, |
23653 | | Feature_FeatureMessageSecurityAssist8Bit = 23, |
23654 | | Feature_FeatureVectorEnhancements1Bit = 37, |
23655 | | Feature_FeatureVectorPackedDecimalBit = 39, |
23656 | | Feature_FeatureInsertReferenceBitsMultipleBit = 13, |
23657 | | Feature_FeatureMiscellaneousExtensions3Bit = 27, |
23658 | | Feature_FeatureMessageSecurityAssist9Bit = 24, |
23659 | | Feature_FeatureVectorEnhancements2Bit = 38, |
23660 | | Feature_FeatureVectorPackedDecimalEnhancementBit = 40, |
23661 | | Feature_FeatureEnhancedSortBit = 7, |
23662 | | Feature_FeatureDeflateConversionBit = 4, |
23663 | | Feature_FeatureVectorPackedDecimalEnhancement2Bit = 41, |
23664 | | Feature_FeatureNNPAssistBit = 28, |
23665 | | Feature_FeatureBEAREnhancementBit = 0, |
23666 | | Feature_FeatureResetDATProtectionBit = 32, |
23667 | | Feature_FeatureProcessorActivityInstrumentationBit = 30, |
23668 | | }; |
23669 | | |
23670 | 0 | inline FeatureBitset computeAvailableFeatures(const FeatureBitset &FB) { |
23671 | 0 | FeatureBitset Features; |
23672 | 0 | if (FB[SystemZ::FeatureSoftFloat]) |
23673 | 0 | Features.set(Feature_FeatureSoftFloatBit); |
23674 | 0 | if (FB[SystemZ::FeatureBackChain]) |
23675 | 0 | Features.set(Feature_FeatureBackChainBit); |
23676 | 0 | if (FB[SystemZ::FeatureDistinctOps]) |
23677 | 0 | Features.set(Feature_FeatureDistinctOpsBit); |
23678 | 0 | if (FB[SystemZ::FeatureFastSerialization]) |
23679 | 0 | Features.set(Feature_FeatureFastSerializationBit); |
23680 | 0 | if (FB[SystemZ::FeatureFPExtension]) |
23681 | 0 | Features.set(Feature_FeatureFPExtensionBit); |
23682 | 0 | if (FB[SystemZ::FeatureHighWord]) |
23683 | 0 | Features.set(Feature_FeatureHighWordBit); |
23684 | 0 | if (FB[SystemZ::FeatureInterlockedAccess1]) |
23685 | 0 | Features.set(Feature_FeatureInterlockedAccess1Bit); |
23686 | 0 | if (FB[SystemZ::FeatureLoadStoreOnCond]) |
23687 | 0 | Features.set(Feature_FeatureLoadStoreOnCondBit); |
23688 | 0 | if (FB[SystemZ::FeaturePopulationCount]) |
23689 | 0 | Features.set(Feature_FeaturePopulationCountBit); |
23690 | 0 | if (FB[SystemZ::FeatureMessageSecurityAssist3]) |
23691 | 0 | Features.set(Feature_FeatureMessageSecurityAssist3Bit); |
23692 | 0 | if (FB[SystemZ::FeatureMessageSecurityAssist4]) |
23693 | 0 | Features.set(Feature_FeatureMessageSecurityAssist4Bit); |
23694 | 0 | if (FB[SystemZ::FeatureResetReferenceBitsMultiple]) |
23695 | 0 | Features.set(Feature_FeatureResetReferenceBitsMultipleBit); |
23696 | 0 | if (FB[SystemZ::FeatureExecutionHint]) |
23697 | 0 | Features.set(Feature_FeatureExecutionHintBit); |
23698 | 0 | if (FB[SystemZ::FeatureLoadAndTrap]) |
23699 | 0 | Features.set(Feature_FeatureLoadAndTrapBit); |
23700 | 0 | if (FB[SystemZ::FeatureMiscellaneousExtensions]) |
23701 | 0 | Features.set(Feature_FeatureMiscellaneousExtensionsBit); |
23702 | 0 | if (FB[SystemZ::FeatureProcessorAssist]) |
23703 | 0 | Features.set(Feature_FeatureProcessorAssistBit); |
23704 | 0 | if (FB[SystemZ::FeatureTransactionalExecution]) |
23705 | 0 | Features.set(Feature_FeatureTransactionalExecutionBit); |
23706 | 0 | if (FB[SystemZ::FeatureDFPZonedConversion]) |
23707 | 0 | Features.set(Feature_FeatureDFPZonedConversionBit); |
23708 | 0 | if (FB[SystemZ::FeatureEnhancedDAT2]) |
23709 | 0 | Features.set(Feature_FeatureEnhancedDAT2Bit); |
23710 | 0 | if (FB[SystemZ::FeatureLoadAndZeroRightmostByte]) |
23711 | 0 | Features.set(Feature_FeatureLoadAndZeroRightmostByteBit); |
23712 | 0 | if (FB[SystemZ::FeatureLoadStoreOnCond2]) |
23713 | 0 | Features.set(Feature_FeatureLoadStoreOnCond2Bit); |
23714 | 0 | if (FB[SystemZ::FeatureMessageSecurityAssist5]) |
23715 | 0 | Features.set(Feature_FeatureMessageSecurityAssist5Bit); |
23716 | 0 | if (FB[SystemZ::FeatureDFPPackedConversion]) |
23717 | 0 | Features.set(Feature_FeatureDFPPackedConversionBit); |
23718 | 0 | if (FB[SystemZ::FeatureVector]) |
23719 | 0 | Features.set(Feature_FeatureVectorBit); |
23720 | 0 | if (FB[SystemZ::FeatureMiscellaneousExtensions2]) |
23721 | 0 | Features.set(Feature_FeatureMiscellaneousExtensions2Bit); |
23722 | 0 | if (FB[SystemZ::FeatureGuardedStorage]) |
23723 | 0 | Features.set(Feature_FeatureGuardedStorageBit); |
23724 | 0 | if (FB[SystemZ::FeatureMessageSecurityAssist7]) |
23725 | 0 | Features.set(Feature_FeatureMessageSecurityAssist7Bit); |
23726 | 0 | if (FB[SystemZ::FeatureMessageSecurityAssist8]) |
23727 | 0 | Features.set(Feature_FeatureMessageSecurityAssist8Bit); |
23728 | 0 | if (FB[SystemZ::FeatureVectorEnhancements1]) |
23729 | 0 | Features.set(Feature_FeatureVectorEnhancements1Bit); |
23730 | 0 | if (FB[SystemZ::FeatureVectorPackedDecimal]) |
23731 | 0 | Features.set(Feature_FeatureVectorPackedDecimalBit); |
23732 | 0 | if (FB[SystemZ::FeatureInsertReferenceBitsMultiple]) |
23733 | 0 | Features.set(Feature_FeatureInsertReferenceBitsMultipleBit); |
23734 | 0 | if (FB[SystemZ::FeatureMiscellaneousExtensions3]) |
23735 | 0 | Features.set(Feature_FeatureMiscellaneousExtensions3Bit); |
23736 | 0 | if (FB[SystemZ::FeatureMessageSecurityAssist9]) |
23737 | 0 | Features.set(Feature_FeatureMessageSecurityAssist9Bit); |
23738 | 0 | if (FB[SystemZ::FeatureVectorEnhancements2]) |
23739 | 0 | Features.set(Feature_FeatureVectorEnhancements2Bit); |
23740 | 0 | if (FB[SystemZ::FeatureVectorPackedDecimalEnhancement]) |
23741 | 0 | Features.set(Feature_FeatureVectorPackedDecimalEnhancementBit); |
23742 | 0 | if (FB[SystemZ::FeatureEnhancedSort]) |
23743 | 0 | Features.set(Feature_FeatureEnhancedSortBit); |
23744 | 0 | if (FB[SystemZ::FeatureDeflateConversion]) |
23745 | 0 | Features.set(Feature_FeatureDeflateConversionBit); |
23746 | 0 | if (FB[SystemZ::FeatureVectorPackedDecimalEnhancement2]) |
23747 | 0 | Features.set(Feature_FeatureVectorPackedDecimalEnhancement2Bit); |
23748 | 0 | if (FB[SystemZ::FeatureNNPAssist]) |
23749 | 0 | Features.set(Feature_FeatureNNPAssistBit); |
23750 | 0 | if (FB[SystemZ::FeatureBEAREnhancement]) |
23751 | 0 | Features.set(Feature_FeatureBEAREnhancementBit); |
23752 | 0 | if (FB[SystemZ::FeatureResetDATProtection]) |
23753 | 0 | Features.set(Feature_FeatureResetDATProtectionBit); |
23754 | 0 | if (FB[SystemZ::FeatureProcessorActivityInstrumentation]) |
23755 | 0 | Features.set(Feature_FeatureProcessorActivityInstrumentationBit); |
23756 | 0 | return Features; |
23757 | 0 | } |
23758 | | |
23759 | 0 | inline FeatureBitset computeRequiredFeatures(unsigned Opcode) { |
23760 | 0 | enum : uint8_t { |
23761 | 0 | CEFBS_None, |
23762 | 0 | CEFBS_FeatureBEAREnhancement, |
23763 | 0 | CEFBS_FeatureDFPPackedConversion, |
23764 | 0 | CEFBS_FeatureDFPZonedConversion, |
23765 | 0 | CEFBS_FeatureDeflateConversion, |
23766 | 0 | CEFBS_FeatureDistinctOps, |
23767 | 0 | CEFBS_FeatureEnhancedDAT2, |
23768 | 0 | CEFBS_FeatureEnhancedSort, |
23769 | 0 | CEFBS_FeatureExecutionHint, |
23770 | 0 | CEFBS_FeatureFPExtension, |
23771 | 0 | CEFBS_FeatureGuardedStorage, |
23772 | 0 | CEFBS_FeatureHighWord, |
23773 | 0 | CEFBS_FeatureInsertReferenceBitsMultiple, |
23774 | 0 | CEFBS_FeatureInterlockedAccess1, |
23775 | 0 | CEFBS_FeatureLoadAndTrap, |
23776 | 0 | CEFBS_FeatureLoadAndZeroRightmostByte, |
23777 | 0 | CEFBS_FeatureLoadStoreOnCond, |
23778 | 0 | CEFBS_FeatureLoadStoreOnCond2, |
23779 | 0 | CEFBS_FeatureMessageSecurityAssist3, |
23780 | 0 | CEFBS_FeatureMessageSecurityAssist4, |
23781 | 0 | CEFBS_FeatureMessageSecurityAssist5, |
23782 | 0 | CEFBS_FeatureMessageSecurityAssist7, |
23783 | 0 | CEFBS_FeatureMessageSecurityAssist8, |
23784 | 0 | CEFBS_FeatureMessageSecurityAssist9, |
23785 | 0 | CEFBS_FeatureMiscellaneousExtensions, |
23786 | 0 | CEFBS_FeatureMiscellaneousExtensions2, |
23787 | 0 | CEFBS_FeatureMiscellaneousExtensions3, |
23788 | 0 | CEFBS_FeatureNNPAssist, |
23789 | 0 | CEFBS_FeaturePopulationCount, |
23790 | 0 | CEFBS_FeatureProcessorActivityInstrumentation, |
23791 | 0 | CEFBS_FeatureProcessorAssist, |
23792 | 0 | CEFBS_FeatureResetDATProtection, |
23793 | 0 | CEFBS_FeatureResetReferenceBitsMultiple, |
23794 | 0 | CEFBS_FeatureTransactionalExecution, |
23795 | 0 | CEFBS_FeatureVector, |
23796 | 0 | CEFBS_FeatureVectorEnhancements1, |
23797 | 0 | CEFBS_FeatureVectorEnhancements2, |
23798 | 0 | CEFBS_FeatureVectorPackedDecimal, |
23799 | 0 | CEFBS_FeatureVectorPackedDecimalEnhancement, |
23800 | 0 | CEFBS_FeatureVectorPackedDecimalEnhancement2, |
23801 | 0 | CEFBS_FeatureHighWord_FeatureDistinctOps, |
23802 | 0 | CEFBS_FeatureVector_FeatureNNPAssist, |
23803 | 0 | }; |
23804 | |
|
23805 | 0 | static constexpr FeatureBitset FeatureBitsets[] = { |
23806 | 0 | {}, // CEFBS_None |
23807 | 0 | {Feature_FeatureBEAREnhancementBit, }, |
23808 | 0 | {Feature_FeatureDFPPackedConversionBit, }, |
23809 | 0 | {Feature_FeatureDFPZonedConversionBit, }, |
23810 | 0 | {Feature_FeatureDeflateConversionBit, }, |
23811 | 0 | {Feature_FeatureDistinctOpsBit, }, |
23812 | 0 | {Feature_FeatureEnhancedDAT2Bit, }, |
23813 | 0 | {Feature_FeatureEnhancedSortBit, }, |
23814 | 0 | {Feature_FeatureExecutionHintBit, }, |
23815 | 0 | {Feature_FeatureFPExtensionBit, }, |
23816 | 0 | {Feature_FeatureGuardedStorageBit, }, |
23817 | 0 | {Feature_FeatureHighWordBit, }, |
23818 | 0 | {Feature_FeatureInsertReferenceBitsMultipleBit, }, |
23819 | 0 | {Feature_FeatureInterlockedAccess1Bit, }, |
23820 | 0 | {Feature_FeatureLoadAndTrapBit, }, |
23821 | 0 | {Feature_FeatureLoadAndZeroRightmostByteBit, }, |
23822 | 0 | {Feature_FeatureLoadStoreOnCondBit, }, |
23823 | 0 | {Feature_FeatureLoadStoreOnCond2Bit, }, |
23824 | 0 | {Feature_FeatureMessageSecurityAssist3Bit, }, |
23825 | 0 | {Feature_FeatureMessageSecurityAssist4Bit, }, |
23826 | 0 | {Feature_FeatureMessageSecurityAssist5Bit, }, |
23827 | 0 | {Feature_FeatureMessageSecurityAssist7Bit, }, |
23828 | 0 | {Feature_FeatureMessageSecurityAssist8Bit, }, |
23829 | 0 | {Feature_FeatureMessageSecurityAssist9Bit, }, |
23830 | 0 | {Feature_FeatureMiscellaneousExtensionsBit, }, |
23831 | 0 | {Feature_FeatureMiscellaneousExtensions2Bit, }, |
23832 | 0 | {Feature_FeatureMiscellaneousExtensions3Bit, }, |
23833 | 0 | {Feature_FeatureNNPAssistBit, }, |
23834 | 0 | {Feature_FeaturePopulationCountBit, }, |
23835 | 0 | {Feature_FeatureProcessorActivityInstrumentationBit, }, |
23836 | 0 | {Feature_FeatureProcessorAssistBit, }, |
23837 | 0 | {Feature_FeatureResetDATProtectionBit, }, |
23838 | 0 | {Feature_FeatureResetReferenceBitsMultipleBit, }, |
23839 | 0 | {Feature_FeatureTransactionalExecutionBit, }, |
23840 | 0 | {Feature_FeatureVectorBit, }, |
23841 | 0 | {Feature_FeatureVectorEnhancements1Bit, }, |
23842 | 0 | {Feature_FeatureVectorEnhancements2Bit, }, |
23843 | 0 | {Feature_FeatureVectorPackedDecimalBit, }, |
23844 | 0 | {Feature_FeatureVectorPackedDecimalEnhancementBit, }, |
23845 | 0 | {Feature_FeatureVectorPackedDecimalEnhancement2Bit, }, |
23846 | 0 | {Feature_FeatureHighWordBit, Feature_FeatureDistinctOpsBit, }, |
23847 | 0 | {Feature_FeatureVectorBit, Feature_FeatureNNPAssistBit, }, |
23848 | 0 | }; |
23849 | 0 | static constexpr uint8_t RequiredFeaturesRefs[] = { |
23850 | 0 | CEFBS_None, // PHI = 0 |
23851 | 0 | CEFBS_None, // INLINEASM = 1 |
23852 | 0 | CEFBS_None, // INLINEASM_BR = 2 |
23853 | 0 | CEFBS_None, // CFI_INSTRUCTION = 3 |
23854 | 0 | CEFBS_None, // EH_LABEL = 4 |
23855 | 0 | CEFBS_None, // GC_LABEL = 5 |
23856 | 0 | CEFBS_None, // ANNOTATION_LABEL = 6 |
23857 | 0 | CEFBS_None, // KILL = 7 |
23858 | 0 | CEFBS_None, // EXTRACT_SUBREG = 8 |
23859 | 0 | CEFBS_None, // INSERT_SUBREG = 9 |
23860 | 0 | CEFBS_None, // IMPLICIT_DEF = 10 |
23861 | 0 | CEFBS_None, // SUBREG_TO_REG = 11 |
23862 | 0 | CEFBS_None, // COPY_TO_REGCLASS = 12 |
23863 | 0 | CEFBS_None, // DBG_VALUE = 13 |
23864 | 0 | CEFBS_None, // DBG_VALUE_LIST = 14 |
23865 | 0 | CEFBS_None, // DBG_INSTR_REF = 15 |
23866 | 0 | CEFBS_None, // DBG_PHI = 16 |
23867 | 0 | CEFBS_None, // DBG_LABEL = 17 |
23868 | 0 | CEFBS_None, // REG_SEQUENCE = 18 |
23869 | 0 | CEFBS_None, // COPY = 19 |
23870 | 0 | CEFBS_None, // BUNDLE = 20 |
23871 | 0 | CEFBS_None, // LIFETIME_START = 21 |
23872 | 0 | CEFBS_None, // LIFETIME_END = 22 |
23873 | 0 | CEFBS_None, // PSEUDO_PROBE = 23 |
23874 | 0 | CEFBS_None, // ARITH_FENCE = 24 |
23875 | 0 | CEFBS_None, // STACKMAP = 25 |
23876 | 0 | CEFBS_None, // FENTRY_CALL = 26 |
23877 | 0 | CEFBS_None, // PATCHPOINT = 27 |
23878 | 0 | CEFBS_None, // LOAD_STACK_GUARD = 28 |
23879 | 0 | CEFBS_None, // PREALLOCATED_SETUP = 29 |
23880 | 0 | CEFBS_None, // PREALLOCATED_ARG = 30 |
23881 | 0 | CEFBS_None, // STATEPOINT = 31 |
23882 | 0 | CEFBS_None, // LOCAL_ESCAPE = 32 |
23883 | 0 | CEFBS_None, // FAULTING_OP = 33 |
23884 | 0 | CEFBS_None, // PATCHABLE_OP = 34 |
23885 | 0 | CEFBS_None, // PATCHABLE_FUNCTION_ENTER = 35 |
23886 | 0 | CEFBS_None, // PATCHABLE_RET = 36 |
23887 | 0 | CEFBS_None, // PATCHABLE_FUNCTION_EXIT = 37 |
23888 | 0 | CEFBS_None, // PATCHABLE_TAIL_CALL = 38 |
23889 | 0 | CEFBS_None, // PATCHABLE_EVENT_CALL = 39 |
23890 | 0 | CEFBS_None, // PATCHABLE_TYPED_EVENT_CALL = 40 |
23891 | 0 | CEFBS_None, // ICALL_BRANCH_FUNNEL = 41 |
23892 | 0 | CEFBS_None, // MEMBARRIER = 42 |
23893 | 0 | CEFBS_None, // JUMP_TABLE_DEBUG_INFO = 43 |
23894 | 0 | CEFBS_None, // G_ASSERT_SEXT = 44 |
23895 | 0 | CEFBS_None, // G_ASSERT_ZEXT = 45 |
23896 | 0 | CEFBS_None, // G_ASSERT_ALIGN = 46 |
23897 | 0 | CEFBS_None, // G_ADD = 47 |
23898 | 0 | CEFBS_None, // G_SUB = 48 |
23899 | 0 | CEFBS_None, // G_MUL = 49 |
23900 | 0 | CEFBS_None, // G_SDIV = 50 |
23901 | 0 | CEFBS_None, // G_UDIV = 51 |
23902 | 0 | CEFBS_None, // G_SREM = 52 |
23903 | 0 | CEFBS_None, // G_UREM = 53 |
23904 | 0 | CEFBS_None, // G_SDIVREM = 54 |
23905 | 0 | CEFBS_None, // G_UDIVREM = 55 |
23906 | 0 | CEFBS_None, // G_AND = 56 |
23907 | 0 | CEFBS_None, // G_OR = 57 |
23908 | 0 | CEFBS_None, // G_XOR = 58 |
23909 | 0 | CEFBS_None, // G_IMPLICIT_DEF = 59 |
23910 | 0 | CEFBS_None, // G_PHI = 60 |
23911 | 0 | CEFBS_None, // G_FRAME_INDEX = 61 |
23912 | 0 | CEFBS_None, // G_GLOBAL_VALUE = 62 |
23913 | 0 | CEFBS_None, // G_CONSTANT_POOL = 63 |
23914 | 0 | CEFBS_None, // G_EXTRACT = 64 |
23915 | 0 | CEFBS_None, // G_UNMERGE_VALUES = 65 |
23916 | 0 | CEFBS_None, // G_INSERT = 66 |
23917 | 0 | CEFBS_None, // G_MERGE_VALUES = 67 |
23918 | 0 | CEFBS_None, // G_BUILD_VECTOR = 68 |
23919 | 0 | CEFBS_None, // G_BUILD_VECTOR_TRUNC = 69 |
23920 | 0 | CEFBS_None, // G_CONCAT_VECTORS = 70 |
23921 | 0 | CEFBS_None, // G_PTRTOINT = 71 |
23922 | 0 | CEFBS_None, // G_INTTOPTR = 72 |
23923 | 0 | CEFBS_None, // G_BITCAST = 73 |
23924 | 0 | CEFBS_None, // G_FREEZE = 74 |
23925 | 0 | CEFBS_None, // G_CONSTANT_FOLD_BARRIER = 75 |
23926 | 0 | CEFBS_None, // G_INTRINSIC_FPTRUNC_ROUND = 76 |
23927 | 0 | CEFBS_None, // G_INTRINSIC_TRUNC = 77 |
23928 | 0 | CEFBS_None, // G_INTRINSIC_ROUND = 78 |
23929 | 0 | CEFBS_None, // G_INTRINSIC_LRINT = 79 |
23930 | 0 | CEFBS_None, // G_INTRINSIC_ROUNDEVEN = 80 |
23931 | 0 | CEFBS_None, // G_READCYCLECOUNTER = 81 |
23932 | 0 | CEFBS_None, // G_LOAD = 82 |
23933 | 0 | CEFBS_None, // G_SEXTLOAD = 83 |
23934 | 0 | CEFBS_None, // G_ZEXTLOAD = 84 |
23935 | 0 | CEFBS_None, // G_INDEXED_LOAD = 85 |
23936 | 0 | CEFBS_None, // G_INDEXED_SEXTLOAD = 86 |
23937 | 0 | CEFBS_None, // G_INDEXED_ZEXTLOAD = 87 |
23938 | 0 | CEFBS_None, // G_STORE = 88 |
23939 | 0 | CEFBS_None, // G_INDEXED_STORE = 89 |
23940 | 0 | CEFBS_None, // G_ATOMIC_CMPXCHG_WITH_SUCCESS = 90 |
23941 | 0 | CEFBS_None, // G_ATOMIC_CMPXCHG = 91 |
23942 | 0 | CEFBS_None, // G_ATOMICRMW_XCHG = 92 |
23943 | 0 | CEFBS_None, // G_ATOMICRMW_ADD = 93 |
23944 | 0 | CEFBS_None, // G_ATOMICRMW_SUB = 94 |
23945 | 0 | CEFBS_None, // G_ATOMICRMW_AND = 95 |
23946 | 0 | CEFBS_None, // G_ATOMICRMW_NAND = 96 |
23947 | 0 | CEFBS_None, // G_ATOMICRMW_OR = 97 |
23948 | 0 | CEFBS_None, // G_ATOMICRMW_XOR = 98 |
23949 | 0 | CEFBS_None, // G_ATOMICRMW_MAX = 99 |
23950 | 0 | CEFBS_None, // G_ATOMICRMW_MIN = 100 |
23951 | 0 | CEFBS_None, // G_ATOMICRMW_UMAX = 101 |
23952 | 0 | CEFBS_None, // G_ATOMICRMW_UMIN = 102 |
23953 | 0 | CEFBS_None, // G_ATOMICRMW_FADD = 103 |
23954 | 0 | CEFBS_None, // G_ATOMICRMW_FSUB = 104 |
23955 | 0 | CEFBS_None, // G_ATOMICRMW_FMAX = 105 |
23956 | 0 | CEFBS_None, // G_ATOMICRMW_FMIN = 106 |
23957 | 0 | CEFBS_None, // G_ATOMICRMW_UINC_WRAP = 107 |
23958 | 0 | CEFBS_None, // G_ATOMICRMW_UDEC_WRAP = 108 |
23959 | 0 | CEFBS_None, // G_FENCE = 109 |
23960 | 0 | CEFBS_None, // G_PREFETCH = 110 |
23961 | 0 | CEFBS_None, // G_BRCOND = 111 |
23962 | 0 | CEFBS_None, // G_BRINDIRECT = 112 |
23963 | 0 | CEFBS_None, // G_INVOKE_REGION_START = 113 |
23964 | 0 | CEFBS_None, // G_INTRINSIC = 114 |
23965 | 0 | CEFBS_None, // G_INTRINSIC_W_SIDE_EFFECTS = 115 |
23966 | 0 | CEFBS_None, // G_INTRINSIC_CONVERGENT = 116 |
23967 | 0 | CEFBS_None, // G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS = 117 |
23968 | 0 | CEFBS_None, // G_ANYEXT = 118 |
23969 | 0 | CEFBS_None, // G_TRUNC = 119 |
23970 | 0 | CEFBS_None, // G_CONSTANT = 120 |
23971 | 0 | CEFBS_None, // G_FCONSTANT = 121 |
23972 | 0 | CEFBS_None, // G_VASTART = 122 |
23973 | 0 | CEFBS_None, // G_VAARG = 123 |
23974 | 0 | CEFBS_None, // G_SEXT = 124 |
23975 | 0 | CEFBS_None, // G_SEXT_INREG = 125 |
23976 | 0 | CEFBS_None, // G_ZEXT = 126 |
23977 | 0 | CEFBS_None, // G_SHL = 127 |
23978 | 0 | CEFBS_None, // G_LSHR = 128 |
23979 | 0 | CEFBS_None, // G_ASHR = 129 |
23980 | 0 | CEFBS_None, // G_FSHL = 130 |
23981 | 0 | CEFBS_None, // G_FSHR = 131 |
23982 | 0 | CEFBS_None, // G_ROTR = 132 |
23983 | 0 | CEFBS_None, // G_ROTL = 133 |
23984 | 0 | CEFBS_None, // G_ICMP = 134 |
23985 | 0 | CEFBS_None, // G_FCMP = 135 |
23986 | 0 | CEFBS_None, // G_SELECT = 136 |
23987 | 0 | CEFBS_None, // G_UADDO = 137 |
23988 | 0 | CEFBS_None, // G_UADDE = 138 |
23989 | 0 | CEFBS_None, // G_USUBO = 139 |
23990 | 0 | CEFBS_None, // G_USUBE = 140 |
23991 | 0 | CEFBS_None, // G_SADDO = 141 |
23992 | 0 | CEFBS_None, // G_SADDE = 142 |
23993 | 0 | CEFBS_None, // G_SSUBO = 143 |
23994 | 0 | CEFBS_None, // G_SSUBE = 144 |
23995 | 0 | CEFBS_None, // G_UMULO = 145 |
23996 | 0 | CEFBS_None, // G_SMULO = 146 |
23997 | 0 | CEFBS_None, // G_UMULH = 147 |
23998 | 0 | CEFBS_None, // G_SMULH = 148 |
23999 | 0 | CEFBS_None, // G_UADDSAT = 149 |
24000 | 0 | CEFBS_None, // G_SADDSAT = 150 |
24001 | 0 | CEFBS_None, // G_USUBSAT = 151 |
24002 | 0 | CEFBS_None, // G_SSUBSAT = 152 |
24003 | 0 | CEFBS_None, // G_USHLSAT = 153 |
24004 | 0 | CEFBS_None, // G_SSHLSAT = 154 |
24005 | 0 | CEFBS_None, // G_SMULFIX = 155 |
24006 | 0 | CEFBS_None, // G_UMULFIX = 156 |
24007 | 0 | CEFBS_None, // G_SMULFIXSAT = 157 |
24008 | 0 | CEFBS_None, // G_UMULFIXSAT = 158 |
24009 | 0 | CEFBS_None, // G_SDIVFIX = 159 |
24010 | 0 | CEFBS_None, // G_UDIVFIX = 160 |
24011 | 0 | CEFBS_None, // G_SDIVFIXSAT = 161 |
24012 | 0 | CEFBS_None, // G_UDIVFIXSAT = 162 |
24013 | 0 | CEFBS_None, // G_FADD = 163 |
24014 | 0 | CEFBS_None, // G_FSUB = 164 |
24015 | 0 | CEFBS_None, // G_FMUL = 165 |
24016 | 0 | CEFBS_None, // G_FMA = 166 |
24017 | 0 | CEFBS_None, // G_FMAD = 167 |
24018 | 0 | CEFBS_None, // G_FDIV = 168 |
24019 | 0 | CEFBS_None, // G_FREM = 169 |
24020 | 0 | CEFBS_None, // G_FPOW = 170 |
24021 | 0 | CEFBS_None, // G_FPOWI = 171 |
24022 | 0 | CEFBS_None, // G_FEXP = 172 |
24023 | 0 | CEFBS_None, // G_FEXP2 = 173 |
24024 | 0 | CEFBS_None, // G_FEXP10 = 174 |
24025 | 0 | CEFBS_None, // G_FLOG = 175 |
24026 | 0 | CEFBS_None, // G_FLOG2 = 176 |
24027 | 0 | CEFBS_None, // G_FLOG10 = 177 |
24028 | 0 | CEFBS_None, // G_FLDEXP = 178 |
24029 | 0 | CEFBS_None, // G_FFREXP = 179 |
24030 | 0 | CEFBS_None, // G_FNEG = 180 |
24031 | 0 | CEFBS_None, // G_FPEXT = 181 |
24032 | 0 | CEFBS_None, // G_FPTRUNC = 182 |
24033 | 0 | CEFBS_None, // G_FPTOSI = 183 |
24034 | 0 | CEFBS_None, // G_FPTOUI = 184 |
24035 | 0 | CEFBS_None, // G_SITOFP = 185 |
24036 | 0 | CEFBS_None, // G_UITOFP = 186 |
24037 | 0 | CEFBS_None, // G_FABS = 187 |
24038 | 0 | CEFBS_None, // G_FCOPYSIGN = 188 |
24039 | 0 | CEFBS_None, // G_IS_FPCLASS = 189 |
24040 | 0 | CEFBS_None, // G_FCANONICALIZE = 190 |
24041 | 0 | CEFBS_None, // G_FMINNUM = 191 |
24042 | 0 | CEFBS_None, // G_FMAXNUM = 192 |
24043 | 0 | CEFBS_None, // G_FMINNUM_IEEE = 193 |
24044 | 0 | CEFBS_None, // G_FMAXNUM_IEEE = 194 |
24045 | 0 | CEFBS_None, // G_FMINIMUM = 195 |
24046 | 0 | CEFBS_None, // G_FMAXIMUM = 196 |
24047 | 0 | CEFBS_None, // G_GET_FPENV = 197 |
24048 | 0 | CEFBS_None, // G_SET_FPENV = 198 |
24049 | 0 | CEFBS_None, // G_RESET_FPENV = 199 |
24050 | 0 | CEFBS_None, // G_GET_FPMODE = 200 |
24051 | 0 | CEFBS_None, // G_SET_FPMODE = 201 |
24052 | 0 | CEFBS_None, // G_RESET_FPMODE = 202 |
24053 | 0 | CEFBS_None, // G_PTR_ADD = 203 |
24054 | 0 | CEFBS_None, // G_PTRMASK = 204 |
24055 | 0 | CEFBS_None, // G_SMIN = 205 |
24056 | 0 | CEFBS_None, // G_SMAX = 206 |
24057 | 0 | CEFBS_None, // G_UMIN = 207 |
24058 | 0 | CEFBS_None, // G_UMAX = 208 |
24059 | 0 | CEFBS_None, // G_ABS = 209 |
24060 | 0 | CEFBS_None, // G_LROUND = 210 |
24061 | 0 | CEFBS_None, // G_LLROUND = 211 |
24062 | 0 | CEFBS_None, // G_BR = 212 |
24063 | 0 | CEFBS_None, // G_BRJT = 213 |
24064 | 0 | CEFBS_None, // G_INSERT_VECTOR_ELT = 214 |
24065 | 0 | CEFBS_None, // G_EXTRACT_VECTOR_ELT = 215 |
24066 | 0 | CEFBS_None, // G_SHUFFLE_VECTOR = 216 |
24067 | 0 | CEFBS_None, // G_CTTZ = 217 |
24068 | 0 | CEFBS_None, // G_CTTZ_ZERO_UNDEF = 218 |
24069 | 0 | CEFBS_None, // G_CTLZ = 219 |
24070 | 0 | CEFBS_None, // G_CTLZ_ZERO_UNDEF = 220 |
24071 | 0 | CEFBS_None, // G_CTPOP = 221 |
24072 | 0 | CEFBS_None, // G_BSWAP = 222 |
24073 | 0 | CEFBS_None, // G_BITREVERSE = 223 |
24074 | 0 | CEFBS_None, // G_FCEIL = 224 |
24075 | 0 | CEFBS_None, // G_FCOS = 225 |
24076 | 0 | CEFBS_None, // G_FSIN = 226 |
24077 | 0 | CEFBS_None, // G_FSQRT = 227 |
24078 | 0 | CEFBS_None, // G_FFLOOR = 228 |
24079 | 0 | CEFBS_None, // G_FRINT = 229 |
24080 | 0 | CEFBS_None, // G_FNEARBYINT = 230 |
24081 | 0 | CEFBS_None, // G_ADDRSPACE_CAST = 231 |
24082 | 0 | CEFBS_None, // G_BLOCK_ADDR = 232 |
24083 | 0 | CEFBS_None, // G_JUMP_TABLE = 233 |
24084 | 0 | CEFBS_None, // G_DYN_STACKALLOC = 234 |
24085 | 0 | CEFBS_None, // G_STACKSAVE = 235 |
24086 | 0 | CEFBS_None, // G_STACKRESTORE = 236 |
24087 | 0 | CEFBS_None, // G_STRICT_FADD = 237 |
24088 | 0 | CEFBS_None, // G_STRICT_FSUB = 238 |
24089 | 0 | CEFBS_None, // G_STRICT_FMUL = 239 |
24090 | 0 | CEFBS_None, // G_STRICT_FDIV = 240 |
24091 | 0 | CEFBS_None, // G_STRICT_FREM = 241 |
24092 | 0 | CEFBS_None, // G_STRICT_FMA = 242 |
24093 | 0 | CEFBS_None, // G_STRICT_FSQRT = 243 |
24094 | 0 | CEFBS_None, // G_STRICT_FLDEXP = 244 |
24095 | 0 | CEFBS_None, // G_READ_REGISTER = 245 |
24096 | 0 | CEFBS_None, // G_WRITE_REGISTER = 246 |
24097 | 0 | CEFBS_None, // G_MEMCPY = 247 |
24098 | 0 | CEFBS_None, // G_MEMCPY_INLINE = 248 |
24099 | 0 | CEFBS_None, // G_MEMMOVE = 249 |
24100 | 0 | CEFBS_None, // G_MEMSET = 250 |
24101 | 0 | CEFBS_None, // G_BZERO = 251 |
24102 | 0 | CEFBS_None, // G_VECREDUCE_SEQ_FADD = 252 |
24103 | 0 | CEFBS_None, // G_VECREDUCE_SEQ_FMUL = 253 |
24104 | 0 | CEFBS_None, // G_VECREDUCE_FADD = 254 |
24105 | 0 | CEFBS_None, // G_VECREDUCE_FMUL = 255 |
24106 | 0 | CEFBS_None, // G_VECREDUCE_FMAX = 256 |
24107 | 0 | CEFBS_None, // G_VECREDUCE_FMIN = 257 |
24108 | 0 | CEFBS_None, // G_VECREDUCE_FMAXIMUM = 258 |
24109 | 0 | CEFBS_None, // G_VECREDUCE_FMINIMUM = 259 |
24110 | 0 | CEFBS_None, // G_VECREDUCE_ADD = 260 |
24111 | 0 | CEFBS_None, // G_VECREDUCE_MUL = 261 |
24112 | 0 | CEFBS_None, // G_VECREDUCE_AND = 262 |
24113 | 0 | CEFBS_None, // G_VECREDUCE_OR = 263 |
24114 | 0 | CEFBS_None, // G_VECREDUCE_XOR = 264 |
24115 | 0 | CEFBS_None, // G_VECREDUCE_SMAX = 265 |
24116 | 0 | CEFBS_None, // G_VECREDUCE_SMIN = 266 |
24117 | 0 | CEFBS_None, // G_VECREDUCE_UMAX = 267 |
24118 | 0 | CEFBS_None, // G_VECREDUCE_UMIN = 268 |
24119 | 0 | CEFBS_None, // G_SBFX = 269 |
24120 | 0 | CEFBS_None, // G_UBFX = 270 |
24121 | 0 | CEFBS_None, // ADA_ENTRY = 271 |
24122 | 0 | CEFBS_None, // ADA_ENTRY_VALUE = 272 |
24123 | 0 | CEFBS_None, // ADB_MemFoldPseudo = 273 |
24124 | 0 | CEFBS_None, // ADJCALLSTACKDOWN = 274 |
24125 | 0 | CEFBS_None, // ADJCALLSTACKUP = 275 |
24126 | 0 | CEFBS_None, // ADJDYNALLOC = 276 |
24127 | 0 | CEFBS_None, // AEB_MemFoldPseudo = 277 |
24128 | 0 | CEFBS_None, // AEXT128 = 278 |
24129 | 0 | CEFBS_FeatureHighWord, // AFIMux = 279 |
24130 | 0 | CEFBS_None, // AG_MemFoldPseudo = 280 |
24131 | 0 | CEFBS_FeatureHighWord, // AHIMux = 281 |
24132 | 0 | CEFBS_FeatureHighWord_FeatureDistinctOps, // AHIMuxK = 282 |
24133 | 0 | CEFBS_None, // ALG_MemFoldPseudo = 283 |
24134 | 0 | CEFBS_None, // AL_MemFoldPseudo = 284 |
24135 | 0 | CEFBS_None, // ATOMIC_CMP_SWAPW = 285 |
24136 | 0 | CEFBS_None, // ATOMIC_LOADW_AFI = 286 |
24137 | 0 | CEFBS_None, // ATOMIC_LOADW_AR = 287 |
24138 | 0 | CEFBS_None, // ATOMIC_LOADW_MAX = 288 |
24139 | 0 | CEFBS_None, // ATOMIC_LOADW_MIN = 289 |
24140 | 0 | CEFBS_None, // ATOMIC_LOADW_NILH = 290 |
24141 | 0 | CEFBS_None, // ATOMIC_LOADW_NILHi = 291 |
24142 | 0 | CEFBS_None, // ATOMIC_LOADW_NR = 292 |
24143 | 0 | CEFBS_None, // ATOMIC_LOADW_NRi = 293 |
24144 | 0 | CEFBS_None, // ATOMIC_LOADW_OILH = 294 |
24145 | 0 | CEFBS_None, // ATOMIC_LOADW_OR = 295 |
24146 | 0 | CEFBS_None, // ATOMIC_LOADW_SR = 296 |
24147 | 0 | CEFBS_None, // ATOMIC_LOADW_UMAX = 297 |
24148 | 0 | CEFBS_None, // ATOMIC_LOADW_UMIN = 298 |
24149 | 0 | CEFBS_None, // ATOMIC_LOADW_XILF = 299 |
24150 | 0 | CEFBS_None, // ATOMIC_LOADW_XR = 300 |
24151 | 0 | CEFBS_None, // ATOMIC_SWAPW = 301 |
24152 | 0 | CEFBS_None, // A_MemFoldPseudo = 302 |
24153 | 0 | CEFBS_FeatureHighWord, // CFIMux = 303 |
24154 | 0 | CEFBS_None, // CGIBCall = 304 |
24155 | 0 | CEFBS_None, // CGIBReturn = 305 |
24156 | 0 | CEFBS_None, // CGRBCall = 306 |
24157 | 0 | CEFBS_None, // CGRBReturn = 307 |
24158 | 0 | CEFBS_FeatureHighWord, // CHIMux = 308 |
24159 | 0 | CEFBS_None, // CIBCall = 309 |
24160 | 0 | CEFBS_None, // CIBReturn = 310 |
24161 | 0 | CEFBS_None, // CLCImm = 311 |
24162 | 0 | CEFBS_None, // CLCReg = 312 |
24163 | 0 | CEFBS_FeatureHighWord, // CLFIMux = 313 |
24164 | 0 | CEFBS_None, // CLGIBCall = 314 |
24165 | 0 | CEFBS_None, // CLGIBReturn = 315 |
24166 | 0 | CEFBS_None, // CLGRBCall = 316 |
24167 | 0 | CEFBS_None, // CLGRBReturn = 317 |
24168 | 0 | CEFBS_None, // CLIBCall = 318 |
24169 | 0 | CEFBS_None, // CLIBReturn = 319 |
24170 | 0 | CEFBS_FeatureHighWord, // CLMux = 320 |
24171 | 0 | CEFBS_None, // CLRBCall = 321 |
24172 | 0 | CEFBS_None, // CLRBReturn = 322 |
24173 | 0 | CEFBS_None, // CLSTLoop = 323 |
24174 | 0 | CEFBS_FeatureHighWord, // CMux = 324 |
24175 | 0 | CEFBS_None, // CRBCall = 325 |
24176 | 0 | CEFBS_None, // CRBReturn = 326 |
24177 | 0 | CEFBS_None, // CallBASR = 327 |
24178 | 0 | CEFBS_None, // CallBASR_STACKEXT = 328 |
24179 | 0 | CEFBS_None, // CallBASR_XPLINK64 = 329 |
24180 | 0 | CEFBS_None, // CallBCR = 330 |
24181 | 0 | CEFBS_None, // CallBR = 331 |
24182 | 0 | CEFBS_None, // CallBRASL = 332 |
24183 | 0 | CEFBS_None, // CallBRASL_XPLINK64 = 333 |
24184 | 0 | CEFBS_None, // CallBRCL = 334 |
24185 | 0 | CEFBS_None, // CallJG = 335 |
24186 | 0 | CEFBS_None, // CondReturn = 336 |
24187 | 0 | CEFBS_None, // CondReturn_XPLINK = 337 |
24188 | 0 | CEFBS_None, // CondStore16 = 338 |
24189 | 0 | CEFBS_None, // CondStore16Inv = 339 |
24190 | 0 | CEFBS_FeatureHighWord, // CondStore16Mux = 340 |
24191 | 0 | CEFBS_FeatureHighWord, // CondStore16MuxInv = 341 |
24192 | 0 | CEFBS_None, // CondStore32 = 342 |
24193 | 0 | CEFBS_None, // CondStore32Inv = 343 |
24194 | 0 | CEFBS_FeatureLoadStoreOnCond2, // CondStore32Mux = 344 |
24195 | 0 | CEFBS_FeatureLoadStoreOnCond2, // CondStore32MuxInv = 345 |
24196 | 0 | CEFBS_None, // CondStore64 = 346 |
24197 | 0 | CEFBS_None, // CondStore64Inv = 347 |
24198 | 0 | CEFBS_None, // CondStore8 = 348 |
24199 | 0 | CEFBS_None, // CondStore8Inv = 349 |
24200 | 0 | CEFBS_FeatureHighWord, // CondStore8Mux = 350 |
24201 | 0 | CEFBS_FeatureHighWord, // CondStore8MuxInv = 351 |
24202 | 0 | CEFBS_None, // CondStoreF32 = 352 |
24203 | 0 | CEFBS_None, // CondStoreF32Inv = 353 |
24204 | 0 | CEFBS_None, // CondStoreF64 = 354 |
24205 | 0 | CEFBS_None, // CondStoreF64Inv = 355 |
24206 | 0 | CEFBS_None, // CondTrap = 356 |
24207 | 0 | CEFBS_None, // DDB_MemFoldPseudo = 357 |
24208 | 0 | CEFBS_None, // DEB_MemFoldPseudo = 358 |
24209 | 0 | CEFBS_None, // EXRL_Pseudo = 359 |
24210 | 0 | CEFBS_None, // GOT = 360 |
24211 | 0 | CEFBS_FeatureHighWord, // IIFMux = 361 |
24212 | 0 | CEFBS_None, // IIHF64 = 362 |
24213 | 0 | CEFBS_None, // IIHH64 = 363 |
24214 | 0 | CEFBS_None, // IIHL64 = 364 |
24215 | 0 | CEFBS_FeatureHighWord, // IIHMux = 365 |
24216 | 0 | CEFBS_None, // IILF64 = 366 |
24217 | 0 | CEFBS_None, // IILH64 = 367 |
24218 | 0 | CEFBS_None, // IILL64 = 368 |
24219 | 0 | CEFBS_FeatureHighWord, // IILMux = 369 |
24220 | 0 | CEFBS_None, // L128 = 370 |
24221 | 0 | CEFBS_FeatureHighWord, // LBMux = 371 |
24222 | 0 | CEFBS_FeatureVector, // LEFR = 372 |
24223 | 0 | CEFBS_FeatureVector, // LFER = 373 |
24224 | 0 | CEFBS_FeatureHighWord, // LHIMux = 374 |
24225 | 0 | CEFBS_FeatureHighWord, // LHMux = 375 |
24226 | 0 | CEFBS_FeatureHighWord, // LLCMux = 376 |
24227 | 0 | CEFBS_FeatureHighWord, // LLCRMux = 377 |
24228 | 0 | CEFBS_FeatureHighWord, // LLHMux = 378 |
24229 | 0 | CEFBS_FeatureHighWord, // LLHRMux = 379 |
24230 | 0 | CEFBS_FeatureHighWord, // LMux = 380 |
24231 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCG_MemFoldPseudo = 381 |
24232 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHIMux = 382 |
24233 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCMux = 383 |
24234 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCMux_MemFoldPseudo = 384 |
24235 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCRMux = 385 |
24236 | 0 | CEFBS_None, // LTDBRCompare_Pseudo = 386 |
24237 | 0 | CEFBS_None, // LTEBRCompare_Pseudo = 387 |
24238 | 0 | CEFBS_None, // LTXBRCompare_Pseudo = 388 |
24239 | 0 | CEFBS_None, // LX = 389 |
24240 | 0 | CEFBS_None, // MADB_MemFoldPseudo = 390 |
24241 | 0 | CEFBS_None, // MAEB_MemFoldPseudo = 391 |
24242 | 0 | CEFBS_None, // MDB_MemFoldPseudo = 392 |
24243 | 0 | CEFBS_None, // MEEB_MemFoldPseudo = 393 |
24244 | 0 | CEFBS_FeatureMiscellaneousExtensions2, // MSC_MemFoldPseudo = 394 |
24245 | 0 | CEFBS_None, // MSDB_MemFoldPseudo = 395 |
24246 | 0 | CEFBS_None, // MSEB_MemFoldPseudo = 396 |
24247 | 0 | CEFBS_FeatureMiscellaneousExtensions2, // MSGC_MemFoldPseudo = 397 |
24248 | 0 | CEFBS_None, // MVCImm = 398 |
24249 | 0 | CEFBS_None, // MVCReg = 399 |
24250 | 0 | CEFBS_None, // MVSTLoop = 400 |
24251 | 0 | CEFBS_None, // MemsetImmImm = 401 |
24252 | 0 | CEFBS_None, // MemsetImmReg = 402 |
24253 | 0 | CEFBS_None, // MemsetRegImm = 403 |
24254 | 0 | CEFBS_None, // MemsetRegReg = 404 |
24255 | 0 | CEFBS_None, // NCImm = 405 |
24256 | 0 | CEFBS_None, // NCReg = 406 |
24257 | 0 | CEFBS_None, // NG_MemFoldPseudo = 407 |
24258 | 0 | CEFBS_FeatureHighWord, // NIFMux = 408 |
24259 | 0 | CEFBS_None, // NIHF64 = 409 |
24260 | 0 | CEFBS_None, // NIHH64 = 410 |
24261 | 0 | CEFBS_None, // NIHL64 = 411 |
24262 | 0 | CEFBS_FeatureHighWord, // NIHMux = 412 |
24263 | 0 | CEFBS_None, // NILF64 = 413 |
24264 | 0 | CEFBS_None, // NILH64 = 414 |
24265 | 0 | CEFBS_None, // NILL64 = 415 |
24266 | 0 | CEFBS_FeatureHighWord, // NILMux = 416 |
24267 | 0 | CEFBS_None, // N_MemFoldPseudo = 417 |
24268 | 0 | CEFBS_None, // OCImm = 418 |
24269 | 0 | CEFBS_None, // OCReg = 419 |
24270 | 0 | CEFBS_None, // OG_MemFoldPseudo = 420 |
24271 | 0 | CEFBS_FeatureHighWord, // OIFMux = 421 |
24272 | 0 | CEFBS_None, // OIHF64 = 422 |
24273 | 0 | CEFBS_None, // OIHH64 = 423 |
24274 | 0 | CEFBS_None, // OIHL64 = 424 |
24275 | 0 | CEFBS_FeatureHighWord, // OIHMux = 425 |
24276 | 0 | CEFBS_None, // OILF64 = 426 |
24277 | 0 | CEFBS_None, // OILH64 = 427 |
24278 | 0 | CEFBS_None, // OILL64 = 428 |
24279 | 0 | CEFBS_FeatureHighWord, // OILMux = 429 |
24280 | 0 | CEFBS_None, // O_MemFoldPseudo = 430 |
24281 | 0 | CEFBS_None, // PAIR128 = 431 |
24282 | 0 | CEFBS_None, // PROBED_ALLOCA = 432 |
24283 | 0 | CEFBS_None, // PROBED_STACKALLOC = 433 |
24284 | 0 | CEFBS_FeatureHighWord, // RISBHH = 434 |
24285 | 0 | CEFBS_FeatureHighWord, // RISBHL = 435 |
24286 | 0 | CEFBS_FeatureHighWord, // RISBLH = 436 |
24287 | 0 | CEFBS_FeatureHighWord, // RISBLL = 437 |
24288 | 0 | CEFBS_FeatureHighWord, // RISBMux = 438 |
24289 | 0 | CEFBS_None, // Return = 439 |
24290 | 0 | CEFBS_None, // Return_XPLINK = 440 |
24291 | 0 | CEFBS_FeatureVector, // SCmp128Hi = 441 |
24292 | 0 | CEFBS_None, // SDB_MemFoldPseudo = 442 |
24293 | 0 | CEFBS_None, // SEB_MemFoldPseudo = 443 |
24294 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELRMux = 444 |
24295 | 0 | CEFBS_None, // SG_MemFoldPseudo = 445 |
24296 | 0 | CEFBS_None, // SLG_MemFoldPseudo = 446 |
24297 | 0 | CEFBS_None, // SL_MemFoldPseudo = 447 |
24298 | 0 | CEFBS_None, // SRSTLoop = 448 |
24299 | 0 | CEFBS_None, // ST128 = 449 |
24300 | 0 | CEFBS_FeatureHighWord, // STCMux = 450 |
24301 | 0 | CEFBS_FeatureHighWord, // STHMux = 451 |
24302 | 0 | CEFBS_FeatureHighWord, // STMux = 452 |
24303 | 0 | CEFBS_FeatureLoadStoreOnCond2, // STOCMux = 453 |
24304 | 0 | CEFBS_None, // STX = 454 |
24305 | 0 | CEFBS_None, // S_MemFoldPseudo = 455 |
24306 | 0 | CEFBS_FeatureVector, // Select128 = 456 |
24307 | 0 | CEFBS_None, // Select32 = 457 |
24308 | 0 | CEFBS_None, // Select64 = 458 |
24309 | 0 | CEFBS_None, // SelectF128 = 459 |
24310 | 0 | CEFBS_None, // SelectF32 = 460 |
24311 | 0 | CEFBS_None, // SelectF64 = 461 |
24312 | 0 | CEFBS_FeatureVectorEnhancements1, // SelectVR128 = 462 |
24313 | 0 | CEFBS_FeatureVector, // SelectVR32 = 463 |
24314 | 0 | CEFBS_FeatureVector, // SelectVR64 = 464 |
24315 | 0 | CEFBS_None, // Serialize = 465 |
24316 | 0 | CEFBS_FeatureTransactionalExecution, // TBEGIN_nofloat = 466 |
24317 | 0 | CEFBS_None, // TLS_GDCALL = 467 |
24318 | 0 | CEFBS_None, // TLS_LDCALL = 468 |
24319 | 0 | CEFBS_None, // TMHH64 = 469 |
24320 | 0 | CEFBS_None, // TMHL64 = 470 |
24321 | 0 | CEFBS_FeatureHighWord, // TMHMux = 471 |
24322 | 0 | CEFBS_None, // TMLH64 = 472 |
24323 | 0 | CEFBS_None, // TMLL64 = 473 |
24324 | 0 | CEFBS_FeatureHighWord, // TMLMux = 474 |
24325 | 0 | CEFBS_None, // Trap = 475 |
24326 | 0 | CEFBS_FeatureVector, // UCmp128Hi = 476 |
24327 | 0 | CEFBS_FeatureVector, // VL32 = 477 |
24328 | 0 | CEFBS_FeatureVector, // VL64 = 478 |
24329 | 0 | CEFBS_FeatureVector, // VLR32 = 479 |
24330 | 0 | CEFBS_FeatureVector, // VLR64 = 480 |
24331 | 0 | CEFBS_FeatureVector, // VLVGP32 = 481 |
24332 | 0 | CEFBS_FeatureVector, // VST32 = 482 |
24333 | 0 | CEFBS_FeatureVector, // VST64 = 483 |
24334 | 0 | CEFBS_None, // XCImm = 484 |
24335 | 0 | CEFBS_None, // XCReg = 485 |
24336 | 0 | CEFBS_None, // XG_MemFoldPseudo = 486 |
24337 | 0 | CEFBS_FeatureHighWord, // XIFMux = 487 |
24338 | 0 | CEFBS_None, // XIHF64 = 488 |
24339 | 0 | CEFBS_None, // XILF64 = 489 |
24340 | 0 | CEFBS_None, // XPLINK_STACKALLOC = 490 |
24341 | 0 | CEFBS_None, // X_MemFoldPseudo = 491 |
24342 | 0 | CEFBS_None, // ZEXT128 = 492 |
24343 | 0 | CEFBS_None, // A = 493 |
24344 | 0 | CEFBS_None, // AD = 494 |
24345 | 0 | CEFBS_None, // ADB = 495 |
24346 | 0 | CEFBS_None, // ADBR = 496 |
24347 | 0 | CEFBS_None, // ADR = 497 |
24348 | 0 | CEFBS_None, // ADTR = 498 |
24349 | 0 | CEFBS_FeatureFPExtension, // ADTRA = 499 |
24350 | 0 | CEFBS_None, // AE = 500 |
24351 | 0 | CEFBS_None, // AEB = 501 |
24352 | 0 | CEFBS_None, // AEBR = 502 |
24353 | 0 | CEFBS_None, // AER = 503 |
24354 | 0 | CEFBS_None, // AFI = 504 |
24355 | 0 | CEFBS_None, // AG = 505 |
24356 | 0 | CEFBS_None, // AGF = 506 |
24357 | 0 | CEFBS_None, // AGFI = 507 |
24358 | 0 | CEFBS_None, // AGFR = 508 |
24359 | 0 | CEFBS_FeatureMiscellaneousExtensions2, // AGH = 509 |
24360 | 0 | CEFBS_None, // AGHI = 510 |
24361 | 0 | CEFBS_FeatureDistinctOps, // AGHIK = 511 |
24362 | 0 | CEFBS_None, // AGR = 512 |
24363 | 0 | CEFBS_FeatureDistinctOps, // AGRK = 513 |
24364 | 0 | CEFBS_None, // AGSI = 514 |
24365 | 0 | CEFBS_None, // AH = 515 |
24366 | 0 | CEFBS_FeatureHighWord, // AHHHR = 516 |
24367 | 0 | CEFBS_FeatureHighWord, // AHHLR = 517 |
24368 | 0 | CEFBS_None, // AHI = 518 |
24369 | 0 | CEFBS_FeatureDistinctOps, // AHIK = 519 |
24370 | 0 | CEFBS_None, // AHY = 520 |
24371 | 0 | CEFBS_FeatureHighWord, // AIH = 521 |
24372 | 0 | CEFBS_None, // AL = 522 |
24373 | 0 | CEFBS_None, // ALC = 523 |
24374 | 0 | CEFBS_None, // ALCG = 524 |
24375 | 0 | CEFBS_None, // ALCGR = 525 |
24376 | 0 | CEFBS_None, // ALCR = 526 |
24377 | 0 | CEFBS_None, // ALFI = 527 |
24378 | 0 | CEFBS_None, // ALG = 528 |
24379 | 0 | CEFBS_None, // ALGF = 529 |
24380 | 0 | CEFBS_None, // ALGFI = 530 |
24381 | 0 | CEFBS_None, // ALGFR = 531 |
24382 | 0 | CEFBS_FeatureDistinctOps, // ALGHSIK = 532 |
24383 | 0 | CEFBS_None, // ALGR = 533 |
24384 | 0 | CEFBS_FeatureDistinctOps, // ALGRK = 534 |
24385 | 0 | CEFBS_None, // ALGSI = 535 |
24386 | 0 | CEFBS_FeatureHighWord, // ALHHHR = 536 |
24387 | 0 | CEFBS_FeatureHighWord, // ALHHLR = 537 |
24388 | 0 | CEFBS_FeatureDistinctOps, // ALHSIK = 538 |
24389 | 0 | CEFBS_None, // ALR = 539 |
24390 | 0 | CEFBS_FeatureDistinctOps, // ALRK = 540 |
24391 | 0 | CEFBS_None, // ALSI = 541 |
24392 | 0 | CEFBS_FeatureHighWord, // ALSIH = 542 |
24393 | 0 | CEFBS_FeatureHighWord, // ALSIHN = 543 |
24394 | 0 | CEFBS_None, // ALY = 544 |
24395 | 0 | CEFBS_None, // AP = 545 |
24396 | 0 | CEFBS_None, // AR = 546 |
24397 | 0 | CEFBS_FeatureDistinctOps, // ARK = 547 |
24398 | 0 | CEFBS_None, // ASI = 548 |
24399 | 0 | CEFBS_None, // AU = 549 |
24400 | 0 | CEFBS_None, // AUR = 550 |
24401 | 0 | CEFBS_None, // AW = 551 |
24402 | 0 | CEFBS_None, // AWR = 552 |
24403 | 0 | CEFBS_None, // AXBR = 553 |
24404 | 0 | CEFBS_None, // AXR = 554 |
24405 | 0 | CEFBS_None, // AXTR = 555 |
24406 | 0 | CEFBS_FeatureFPExtension, // AXTRA = 556 |
24407 | 0 | CEFBS_None, // AY = 557 |
24408 | 0 | CEFBS_None, // B = 558 |
24409 | 0 | CEFBS_None, // BAKR = 559 |
24410 | 0 | CEFBS_None, // BAL = 560 |
24411 | 0 | CEFBS_None, // BALR = 561 |
24412 | 0 | CEFBS_None, // BAS = 562 |
24413 | 0 | CEFBS_None, // BASR = 563 |
24414 | 0 | CEFBS_None, // BASSM = 564 |
24415 | 0 | CEFBS_None, // BAsmE = 565 |
24416 | 0 | CEFBS_None, // BAsmH = 566 |
24417 | 0 | CEFBS_None, // BAsmHE = 567 |
24418 | 0 | CEFBS_None, // BAsmL = 568 |
24419 | 0 | CEFBS_None, // BAsmLE = 569 |
24420 | 0 | CEFBS_None, // BAsmLH = 570 |
24421 | 0 | CEFBS_None, // BAsmM = 571 |
24422 | 0 | CEFBS_None, // BAsmNE = 572 |
24423 | 0 | CEFBS_None, // BAsmNH = 573 |
24424 | 0 | CEFBS_None, // BAsmNHE = 574 |
24425 | 0 | CEFBS_None, // BAsmNL = 575 |
24426 | 0 | CEFBS_None, // BAsmNLE = 576 |
24427 | 0 | CEFBS_None, // BAsmNLH = 577 |
24428 | 0 | CEFBS_None, // BAsmNM = 578 |
24429 | 0 | CEFBS_None, // BAsmNO = 579 |
24430 | 0 | CEFBS_None, // BAsmNP = 580 |
24431 | 0 | CEFBS_None, // BAsmNZ = 581 |
24432 | 0 | CEFBS_None, // BAsmO = 582 |
24433 | 0 | CEFBS_None, // BAsmP = 583 |
24434 | 0 | CEFBS_None, // BAsmZ = 584 |
24435 | 0 | CEFBS_None, // BC = 585 |
24436 | 0 | CEFBS_None, // BCAsm = 586 |
24437 | 0 | CEFBS_None, // BCR = 587 |
24438 | 0 | CEFBS_None, // BCRAsm = 588 |
24439 | 0 | CEFBS_None, // BCT = 589 |
24440 | 0 | CEFBS_None, // BCTG = 590 |
24441 | 0 | CEFBS_None, // BCTGR = 591 |
24442 | 0 | CEFBS_None, // BCTR = 592 |
24443 | 0 | CEFBS_FeatureMiscellaneousExtensions2, // BI = 593 |
24444 | 0 | CEFBS_FeatureMiscellaneousExtensions2, // BIAsmE = 594 |
24445 | 0 | CEFBS_FeatureMiscellaneousExtensions2, // BIAsmH = 595 |
24446 | 0 | CEFBS_FeatureMiscellaneousExtensions2, // BIAsmHE = 596 |
24447 | 0 | CEFBS_FeatureMiscellaneousExtensions2, // BIAsmL = 597 |
24448 | 0 | CEFBS_FeatureMiscellaneousExtensions2, // BIAsmLE = 598 |
24449 | 0 | CEFBS_FeatureMiscellaneousExtensions2, // BIAsmLH = 599 |
24450 | 0 | CEFBS_FeatureMiscellaneousExtensions2, // BIAsmM = 600 |
24451 | 0 | CEFBS_FeatureMiscellaneousExtensions2, // BIAsmNE = 601 |
24452 | 0 | CEFBS_FeatureMiscellaneousExtensions2, // BIAsmNH = 602 |
24453 | 0 | CEFBS_FeatureMiscellaneousExtensions2, // BIAsmNHE = 603 |
24454 | 0 | CEFBS_FeatureMiscellaneousExtensions2, // BIAsmNL = 604 |
24455 | 0 | CEFBS_FeatureMiscellaneousExtensions2, // BIAsmNLE = 605 |
24456 | 0 | CEFBS_FeatureMiscellaneousExtensions2, // BIAsmNLH = 606 |
24457 | 0 | CEFBS_FeatureMiscellaneousExtensions2, // BIAsmNM = 607 |
24458 | 0 | CEFBS_FeatureMiscellaneousExtensions2, // BIAsmNO = 608 |
24459 | 0 | CEFBS_FeatureMiscellaneousExtensions2, // BIAsmNP = 609 |
24460 | 0 | CEFBS_FeatureMiscellaneousExtensions2, // BIAsmNZ = 610 |
24461 | 0 | CEFBS_FeatureMiscellaneousExtensions2, // BIAsmO = 611 |
24462 | 0 | CEFBS_FeatureMiscellaneousExtensions2, // BIAsmP = 612 |
24463 | 0 | CEFBS_FeatureMiscellaneousExtensions2, // BIAsmZ = 613 |
24464 | 0 | CEFBS_FeatureMiscellaneousExtensions2, // BIC = 614 |
24465 | 0 | CEFBS_FeatureMiscellaneousExtensions2, // BICAsm = 615 |
24466 | 0 | CEFBS_FeatureExecutionHint, // BPP = 616 |
24467 | 0 | CEFBS_FeatureExecutionHint, // BPRP = 617 |
24468 | 0 | CEFBS_None, // BR = 618 |
24469 | 0 | CEFBS_None, // BRAS = 619 |
24470 | 0 | CEFBS_None, // BRASL = 620 |
24471 | 0 | CEFBS_None, // BRAsmE = 621 |
24472 | 0 | CEFBS_None, // BRAsmH = 622 |
24473 | 0 | CEFBS_None, // BRAsmHE = 623 |
24474 | 0 | CEFBS_None, // BRAsmL = 624 |
24475 | 0 | CEFBS_None, // BRAsmLE = 625 |
24476 | 0 | CEFBS_None, // BRAsmLH = 626 |
24477 | 0 | CEFBS_None, // BRAsmM = 627 |
24478 | 0 | CEFBS_None, // BRAsmNE = 628 |
24479 | 0 | CEFBS_None, // BRAsmNH = 629 |
24480 | 0 | CEFBS_None, // BRAsmNHE = 630 |
24481 | 0 | CEFBS_None, // BRAsmNL = 631 |
24482 | 0 | CEFBS_None, // BRAsmNLE = 632 |
24483 | 0 | CEFBS_None, // BRAsmNLH = 633 |
24484 | 0 | CEFBS_None, // BRAsmNM = 634 |
24485 | 0 | CEFBS_None, // BRAsmNO = 635 |
24486 | 0 | CEFBS_None, // BRAsmNP = 636 |
24487 | 0 | CEFBS_None, // BRAsmNZ = 637 |
24488 | 0 | CEFBS_None, // BRAsmO = 638 |
24489 | 0 | CEFBS_None, // BRAsmP = 639 |
24490 | 0 | CEFBS_None, // BRAsmZ = 640 |
24491 | 0 | CEFBS_None, // BRC = 641 |
24492 | 0 | CEFBS_None, // BRCAsm = 642 |
24493 | 0 | CEFBS_None, // BRCL = 643 |
24494 | 0 | CEFBS_None, // BRCLAsm = 644 |
24495 | 0 | CEFBS_None, // BRCT = 645 |
24496 | 0 | CEFBS_None, // BRCTG = 646 |
24497 | 0 | CEFBS_FeatureHighWord, // BRCTH = 647 |
24498 | 0 | CEFBS_None, // BRXH = 648 |
24499 | 0 | CEFBS_None, // BRXHG = 649 |
24500 | 0 | CEFBS_None, // BRXLE = 650 |
24501 | 0 | CEFBS_None, // BRXLG = 651 |
24502 | 0 | CEFBS_None, // BSA = 652 |
24503 | 0 | CEFBS_None, // BSG = 653 |
24504 | 0 | CEFBS_None, // BSM = 654 |
24505 | 0 | CEFBS_None, // BXH = 655 |
24506 | 0 | CEFBS_None, // BXHG = 656 |
24507 | 0 | CEFBS_None, // BXLE = 657 |
24508 | 0 | CEFBS_None, // BXLEG = 658 |
24509 | 0 | CEFBS_None, // C = 659 |
24510 | 0 | CEFBS_None, // CD = 660 |
24511 | 0 | CEFBS_None, // CDB = 661 |
24512 | 0 | CEFBS_None, // CDBR = 662 |
24513 | 0 | CEFBS_None, // CDFBR = 663 |
24514 | 0 | CEFBS_FeatureFPExtension, // CDFBRA = 664 |
24515 | 0 | CEFBS_None, // CDFR = 665 |
24516 | 0 | CEFBS_FeatureFPExtension, // CDFTR = 666 |
24517 | 0 | CEFBS_None, // CDGBR = 667 |
24518 | 0 | CEFBS_FeatureFPExtension, // CDGBRA = 668 |
24519 | 0 | CEFBS_None, // CDGR = 669 |
24520 | 0 | CEFBS_None, // CDGTR = 670 |
24521 | 0 | CEFBS_FeatureFPExtension, // CDGTRA = 671 |
24522 | 0 | CEFBS_FeatureFPExtension, // CDLFBR = 672 |
24523 | 0 | CEFBS_FeatureFPExtension, // CDLFTR = 673 |
24524 | 0 | CEFBS_FeatureFPExtension, // CDLGBR = 674 |
24525 | 0 | CEFBS_FeatureFPExtension, // CDLGTR = 675 |
24526 | 0 | CEFBS_FeatureDFPPackedConversion, // CDPT = 676 |
24527 | 0 | CEFBS_None, // CDR = 677 |
24528 | 0 | CEFBS_None, // CDS = 678 |
24529 | 0 | CEFBS_None, // CDSG = 679 |
24530 | 0 | CEFBS_None, // CDSTR = 680 |
24531 | 0 | CEFBS_None, // CDSY = 681 |
24532 | 0 | CEFBS_None, // CDTR = 682 |
24533 | 0 | CEFBS_None, // CDUTR = 683 |
24534 | 0 | CEFBS_FeatureDFPZonedConversion, // CDZT = 684 |
24535 | 0 | CEFBS_None, // CE = 685 |
24536 | 0 | CEFBS_None, // CEB = 686 |
24537 | 0 | CEFBS_None, // CEBR = 687 |
24538 | 0 | CEFBS_None, // CEDTR = 688 |
24539 | 0 | CEFBS_None, // CEFBR = 689 |
24540 | 0 | CEFBS_FeatureFPExtension, // CEFBRA = 690 |
24541 | 0 | CEFBS_None, // CEFR = 691 |
24542 | 0 | CEFBS_None, // CEGBR = 692 |
24543 | 0 | CEFBS_FeatureFPExtension, // CEGBRA = 693 |
24544 | 0 | CEFBS_None, // CEGR = 694 |
24545 | 0 | CEFBS_FeatureFPExtension, // CELFBR = 695 |
24546 | 0 | CEFBS_FeatureFPExtension, // CELGBR = 696 |
24547 | 0 | CEFBS_None, // CER = 697 |
24548 | 0 | CEFBS_None, // CEXTR = 698 |
24549 | 0 | CEFBS_None, // CFC = 699 |
24550 | 0 | CEFBS_None, // CFDBR = 700 |
24551 | 0 | CEFBS_FeatureFPExtension, // CFDBRA = 701 |
24552 | 0 | CEFBS_None, // CFDR = 702 |
24553 | 0 | CEFBS_FeatureFPExtension, // CFDTR = 703 |
24554 | 0 | CEFBS_None, // CFEBR = 704 |
24555 | 0 | CEFBS_FeatureFPExtension, // CFEBRA = 705 |
24556 | 0 | CEFBS_None, // CFER = 706 |
24557 | 0 | CEFBS_None, // CFI = 707 |
24558 | 0 | CEFBS_None, // CFXBR = 708 |
24559 | 0 | CEFBS_FeatureFPExtension, // CFXBRA = 709 |
24560 | 0 | CEFBS_None, // CFXR = 710 |
24561 | 0 | CEFBS_FeatureFPExtension, // CFXTR = 711 |
24562 | 0 | CEFBS_None, // CG = 712 |
24563 | 0 | CEFBS_None, // CGDBR = 713 |
24564 | 0 | CEFBS_FeatureFPExtension, // CGDBRA = 714 |
24565 | 0 | CEFBS_None, // CGDR = 715 |
24566 | 0 | CEFBS_None, // CGDTR = 716 |
24567 | 0 | CEFBS_FeatureFPExtension, // CGDTRA = 717 |
24568 | 0 | CEFBS_None, // CGEBR = 718 |
24569 | 0 | CEFBS_FeatureFPExtension, // CGEBRA = 719 |
24570 | 0 | CEFBS_None, // CGER = 720 |
24571 | 0 | CEFBS_None, // CGF = 721 |
24572 | 0 | CEFBS_None, // CGFI = 722 |
24573 | 0 | CEFBS_None, // CGFR = 723 |
24574 | 0 | CEFBS_None, // CGFRL = 724 |
24575 | 0 | CEFBS_None, // CGH = 725 |
24576 | 0 | CEFBS_None, // CGHI = 726 |
24577 | 0 | CEFBS_None, // CGHRL = 727 |
24578 | 0 | CEFBS_None, // CGHSI = 728 |
24579 | 0 | CEFBS_None, // CGIB = 729 |
24580 | 0 | CEFBS_None, // CGIBAsm = 730 |
24581 | 0 | CEFBS_None, // CGIBAsmE = 731 |
24582 | 0 | CEFBS_None, // CGIBAsmH = 732 |
24583 | 0 | CEFBS_None, // CGIBAsmHE = 733 |
24584 | 0 | CEFBS_None, // CGIBAsmL = 734 |
24585 | 0 | CEFBS_None, // CGIBAsmLE = 735 |
24586 | 0 | CEFBS_None, // CGIBAsmLH = 736 |
24587 | 0 | CEFBS_None, // CGIBAsmNE = 737 |
24588 | 0 | CEFBS_None, // CGIBAsmNH = 738 |
24589 | 0 | CEFBS_None, // CGIBAsmNHE = 739 |
24590 | 0 | CEFBS_None, // CGIBAsmNL = 740 |
24591 | 0 | CEFBS_None, // CGIBAsmNLE = 741 |
24592 | 0 | CEFBS_None, // CGIBAsmNLH = 742 |
24593 | 0 | CEFBS_None, // CGIJ = 743 |
24594 | 0 | CEFBS_None, // CGIJAsm = 744 |
24595 | 0 | CEFBS_None, // CGIJAsmE = 745 |
24596 | 0 | CEFBS_None, // CGIJAsmH = 746 |
24597 | 0 | CEFBS_None, // CGIJAsmHE = 747 |
24598 | 0 | CEFBS_None, // CGIJAsmL = 748 |
24599 | 0 | CEFBS_None, // CGIJAsmLE = 749 |
24600 | 0 | CEFBS_None, // CGIJAsmLH = 750 |
24601 | 0 | CEFBS_None, // CGIJAsmNE = 751 |
24602 | 0 | CEFBS_None, // CGIJAsmNH = 752 |
24603 | 0 | CEFBS_None, // CGIJAsmNHE = 753 |
24604 | 0 | CEFBS_None, // CGIJAsmNL = 754 |
24605 | 0 | CEFBS_None, // CGIJAsmNLE = 755 |
24606 | 0 | CEFBS_None, // CGIJAsmNLH = 756 |
24607 | 0 | CEFBS_None, // CGIT = 757 |
24608 | 0 | CEFBS_None, // CGITAsm = 758 |
24609 | 0 | CEFBS_None, // CGITAsmE = 759 |
24610 | 0 | CEFBS_None, // CGITAsmH = 760 |
24611 | 0 | CEFBS_None, // CGITAsmHE = 761 |
24612 | 0 | CEFBS_None, // CGITAsmL = 762 |
24613 | 0 | CEFBS_None, // CGITAsmLE = 763 |
24614 | 0 | CEFBS_None, // CGITAsmLH = 764 |
24615 | 0 | CEFBS_None, // CGITAsmNE = 765 |
24616 | 0 | CEFBS_None, // CGITAsmNH = 766 |
24617 | 0 | CEFBS_None, // CGITAsmNHE = 767 |
24618 | 0 | CEFBS_None, // CGITAsmNL = 768 |
24619 | 0 | CEFBS_None, // CGITAsmNLE = 769 |
24620 | 0 | CEFBS_None, // CGITAsmNLH = 770 |
24621 | 0 | CEFBS_None, // CGR = 771 |
24622 | 0 | CEFBS_None, // CGRB = 772 |
24623 | 0 | CEFBS_None, // CGRBAsm = 773 |
24624 | 0 | CEFBS_None, // CGRBAsmE = 774 |
24625 | 0 | CEFBS_None, // CGRBAsmH = 775 |
24626 | 0 | CEFBS_None, // CGRBAsmHE = 776 |
24627 | 0 | CEFBS_None, // CGRBAsmL = 777 |
24628 | 0 | CEFBS_None, // CGRBAsmLE = 778 |
24629 | 0 | CEFBS_None, // CGRBAsmLH = 779 |
24630 | 0 | CEFBS_None, // CGRBAsmNE = 780 |
24631 | 0 | CEFBS_None, // CGRBAsmNH = 781 |
24632 | 0 | CEFBS_None, // CGRBAsmNHE = 782 |
24633 | 0 | CEFBS_None, // CGRBAsmNL = 783 |
24634 | 0 | CEFBS_None, // CGRBAsmNLE = 784 |
24635 | 0 | CEFBS_None, // CGRBAsmNLH = 785 |
24636 | 0 | CEFBS_None, // CGRJ = 786 |
24637 | 0 | CEFBS_None, // CGRJAsm = 787 |
24638 | 0 | CEFBS_None, // CGRJAsmE = 788 |
24639 | 0 | CEFBS_None, // CGRJAsmH = 789 |
24640 | 0 | CEFBS_None, // CGRJAsmHE = 790 |
24641 | 0 | CEFBS_None, // CGRJAsmL = 791 |
24642 | 0 | CEFBS_None, // CGRJAsmLE = 792 |
24643 | 0 | CEFBS_None, // CGRJAsmLH = 793 |
24644 | 0 | CEFBS_None, // CGRJAsmNE = 794 |
24645 | 0 | CEFBS_None, // CGRJAsmNH = 795 |
24646 | 0 | CEFBS_None, // CGRJAsmNHE = 796 |
24647 | 0 | CEFBS_None, // CGRJAsmNL = 797 |
24648 | 0 | CEFBS_None, // CGRJAsmNLE = 798 |
24649 | 0 | CEFBS_None, // CGRJAsmNLH = 799 |
24650 | 0 | CEFBS_None, // CGRL = 800 |
24651 | 0 | CEFBS_None, // CGRT = 801 |
24652 | 0 | CEFBS_None, // CGRTAsm = 802 |
24653 | 0 | CEFBS_None, // CGRTAsmE = 803 |
24654 | 0 | CEFBS_None, // CGRTAsmH = 804 |
24655 | 0 | CEFBS_None, // CGRTAsmHE = 805 |
24656 | 0 | CEFBS_None, // CGRTAsmL = 806 |
24657 | 0 | CEFBS_None, // CGRTAsmLE = 807 |
24658 | 0 | CEFBS_None, // CGRTAsmLH = 808 |
24659 | 0 | CEFBS_None, // CGRTAsmNE = 809 |
24660 | 0 | CEFBS_None, // CGRTAsmNH = 810 |
24661 | 0 | CEFBS_None, // CGRTAsmNHE = 811 |
24662 | 0 | CEFBS_None, // CGRTAsmNL = 812 |
24663 | 0 | CEFBS_None, // CGRTAsmNLE = 813 |
24664 | 0 | CEFBS_None, // CGRTAsmNLH = 814 |
24665 | 0 | CEFBS_None, // CGXBR = 815 |
24666 | 0 | CEFBS_FeatureFPExtension, // CGXBRA = 816 |
24667 | 0 | CEFBS_None, // CGXR = 817 |
24668 | 0 | CEFBS_None, // CGXTR = 818 |
24669 | 0 | CEFBS_FeatureFPExtension, // CGXTRA = 819 |
24670 | 0 | CEFBS_None, // CH = 820 |
24671 | 0 | CEFBS_FeatureHighWord, // CHF = 821 |
24672 | 0 | CEFBS_FeatureHighWord, // CHHR = 822 |
24673 | 0 | CEFBS_None, // CHHSI = 823 |
24674 | 0 | CEFBS_None, // CHI = 824 |
24675 | 0 | CEFBS_FeatureHighWord, // CHLR = 825 |
24676 | 0 | CEFBS_None, // CHRL = 826 |
24677 | 0 | CEFBS_None, // CHSI = 827 |
24678 | 0 | CEFBS_None, // CHY = 828 |
24679 | 0 | CEFBS_None, // CIB = 829 |
24680 | 0 | CEFBS_None, // CIBAsm = 830 |
24681 | 0 | CEFBS_None, // CIBAsmE = 831 |
24682 | 0 | CEFBS_None, // CIBAsmH = 832 |
24683 | 0 | CEFBS_None, // CIBAsmHE = 833 |
24684 | 0 | CEFBS_None, // CIBAsmL = 834 |
24685 | 0 | CEFBS_None, // CIBAsmLE = 835 |
24686 | 0 | CEFBS_None, // CIBAsmLH = 836 |
24687 | 0 | CEFBS_None, // CIBAsmNE = 837 |
24688 | 0 | CEFBS_None, // CIBAsmNH = 838 |
24689 | 0 | CEFBS_None, // CIBAsmNHE = 839 |
24690 | 0 | CEFBS_None, // CIBAsmNL = 840 |
24691 | 0 | CEFBS_None, // CIBAsmNLE = 841 |
24692 | 0 | CEFBS_None, // CIBAsmNLH = 842 |
24693 | 0 | CEFBS_FeatureHighWord, // CIH = 843 |
24694 | 0 | CEFBS_None, // CIJ = 844 |
24695 | 0 | CEFBS_None, // CIJAsm = 845 |
24696 | 0 | CEFBS_None, // CIJAsmE = 846 |
24697 | 0 | CEFBS_None, // CIJAsmH = 847 |
24698 | 0 | CEFBS_None, // CIJAsmHE = 848 |
24699 | 0 | CEFBS_None, // CIJAsmL = 849 |
24700 | 0 | CEFBS_None, // CIJAsmLE = 850 |
24701 | 0 | CEFBS_None, // CIJAsmLH = 851 |
24702 | 0 | CEFBS_None, // CIJAsmNE = 852 |
24703 | 0 | CEFBS_None, // CIJAsmNH = 853 |
24704 | 0 | CEFBS_None, // CIJAsmNHE = 854 |
24705 | 0 | CEFBS_None, // CIJAsmNL = 855 |
24706 | 0 | CEFBS_None, // CIJAsmNLE = 856 |
24707 | 0 | CEFBS_None, // CIJAsmNLH = 857 |
24708 | 0 | CEFBS_None, // CIT = 858 |
24709 | 0 | CEFBS_None, // CITAsm = 859 |
24710 | 0 | CEFBS_None, // CITAsmE = 860 |
24711 | 0 | CEFBS_None, // CITAsmH = 861 |
24712 | 0 | CEFBS_None, // CITAsmHE = 862 |
24713 | 0 | CEFBS_None, // CITAsmL = 863 |
24714 | 0 | CEFBS_None, // CITAsmLE = 864 |
24715 | 0 | CEFBS_None, // CITAsmLH = 865 |
24716 | 0 | CEFBS_None, // CITAsmNE = 866 |
24717 | 0 | CEFBS_None, // CITAsmNH = 867 |
24718 | 0 | CEFBS_None, // CITAsmNHE = 868 |
24719 | 0 | CEFBS_None, // CITAsmNL = 869 |
24720 | 0 | CEFBS_None, // CITAsmNLE = 870 |
24721 | 0 | CEFBS_None, // CITAsmNLH = 871 |
24722 | 0 | CEFBS_None, // CKSM = 872 |
24723 | 0 | CEFBS_None, // CL = 873 |
24724 | 0 | CEFBS_None, // CLC = 874 |
24725 | 0 | CEFBS_None, // CLCL = 875 |
24726 | 0 | CEFBS_None, // CLCLE = 876 |
24727 | 0 | CEFBS_None, // CLCLU = 877 |
24728 | 0 | CEFBS_FeatureFPExtension, // CLFDBR = 878 |
24729 | 0 | CEFBS_FeatureFPExtension, // CLFDTR = 879 |
24730 | 0 | CEFBS_FeatureFPExtension, // CLFEBR = 880 |
24731 | 0 | CEFBS_None, // CLFHSI = 881 |
24732 | 0 | CEFBS_None, // CLFI = 882 |
24733 | 0 | CEFBS_None, // CLFIT = 883 |
24734 | 0 | CEFBS_None, // CLFITAsm = 884 |
24735 | 0 | CEFBS_None, // CLFITAsmE = 885 |
24736 | 0 | CEFBS_None, // CLFITAsmH = 886 |
24737 | 0 | CEFBS_None, // CLFITAsmHE = 887 |
24738 | 0 | CEFBS_None, // CLFITAsmL = 888 |
24739 | 0 | CEFBS_None, // CLFITAsmLE = 889 |
24740 | 0 | CEFBS_None, // CLFITAsmLH = 890 |
24741 | 0 | CEFBS_None, // CLFITAsmNE = 891 |
24742 | 0 | CEFBS_None, // CLFITAsmNH = 892 |
24743 | 0 | CEFBS_None, // CLFITAsmNHE = 893 |
24744 | 0 | CEFBS_None, // CLFITAsmNL = 894 |
24745 | 0 | CEFBS_None, // CLFITAsmNLE = 895 |
24746 | 0 | CEFBS_None, // CLFITAsmNLH = 896 |
24747 | 0 | CEFBS_FeatureFPExtension, // CLFXBR = 897 |
24748 | 0 | CEFBS_FeatureFPExtension, // CLFXTR = 898 |
24749 | 0 | CEFBS_None, // CLG = 899 |
24750 | 0 | CEFBS_FeatureFPExtension, // CLGDBR = 900 |
24751 | 0 | CEFBS_FeatureFPExtension, // CLGDTR = 901 |
24752 | 0 | CEFBS_FeatureFPExtension, // CLGEBR = 902 |
24753 | 0 | CEFBS_None, // CLGF = 903 |
24754 | 0 | CEFBS_None, // CLGFI = 904 |
24755 | 0 | CEFBS_None, // CLGFR = 905 |
24756 | 0 | CEFBS_None, // CLGFRL = 906 |
24757 | 0 | CEFBS_None, // CLGHRL = 907 |
24758 | 0 | CEFBS_None, // CLGHSI = 908 |
24759 | 0 | CEFBS_None, // CLGIB = 909 |
24760 | 0 | CEFBS_None, // CLGIBAsm = 910 |
24761 | 0 | CEFBS_None, // CLGIBAsmE = 911 |
24762 | 0 | CEFBS_None, // CLGIBAsmH = 912 |
24763 | 0 | CEFBS_None, // CLGIBAsmHE = 913 |
24764 | 0 | CEFBS_None, // CLGIBAsmL = 914 |
24765 | 0 | CEFBS_None, // CLGIBAsmLE = 915 |
24766 | 0 | CEFBS_None, // CLGIBAsmLH = 916 |
24767 | 0 | CEFBS_None, // CLGIBAsmNE = 917 |
24768 | 0 | CEFBS_None, // CLGIBAsmNH = 918 |
24769 | 0 | CEFBS_None, // CLGIBAsmNHE = 919 |
24770 | 0 | CEFBS_None, // CLGIBAsmNL = 920 |
24771 | 0 | CEFBS_None, // CLGIBAsmNLE = 921 |
24772 | 0 | CEFBS_None, // CLGIBAsmNLH = 922 |
24773 | 0 | CEFBS_None, // CLGIJ = 923 |
24774 | 0 | CEFBS_None, // CLGIJAsm = 924 |
24775 | 0 | CEFBS_None, // CLGIJAsmE = 925 |
24776 | 0 | CEFBS_None, // CLGIJAsmH = 926 |
24777 | 0 | CEFBS_None, // CLGIJAsmHE = 927 |
24778 | 0 | CEFBS_None, // CLGIJAsmL = 928 |
24779 | 0 | CEFBS_None, // CLGIJAsmLE = 929 |
24780 | 0 | CEFBS_None, // CLGIJAsmLH = 930 |
24781 | 0 | CEFBS_None, // CLGIJAsmNE = 931 |
24782 | 0 | CEFBS_None, // CLGIJAsmNH = 932 |
24783 | 0 | CEFBS_None, // CLGIJAsmNHE = 933 |
24784 | 0 | CEFBS_None, // CLGIJAsmNL = 934 |
24785 | 0 | CEFBS_None, // CLGIJAsmNLE = 935 |
24786 | 0 | CEFBS_None, // CLGIJAsmNLH = 936 |
24787 | 0 | CEFBS_None, // CLGIT = 937 |
24788 | 0 | CEFBS_None, // CLGITAsm = 938 |
24789 | 0 | CEFBS_None, // CLGITAsmE = 939 |
24790 | 0 | CEFBS_None, // CLGITAsmH = 940 |
24791 | 0 | CEFBS_None, // CLGITAsmHE = 941 |
24792 | 0 | CEFBS_None, // CLGITAsmL = 942 |
24793 | 0 | CEFBS_None, // CLGITAsmLE = 943 |
24794 | 0 | CEFBS_None, // CLGITAsmLH = 944 |
24795 | 0 | CEFBS_None, // CLGITAsmNE = 945 |
24796 | 0 | CEFBS_None, // CLGITAsmNH = 946 |
24797 | 0 | CEFBS_None, // CLGITAsmNHE = 947 |
24798 | 0 | CEFBS_None, // CLGITAsmNL = 948 |
24799 | 0 | CEFBS_None, // CLGITAsmNLE = 949 |
24800 | 0 | CEFBS_None, // CLGITAsmNLH = 950 |
24801 | 0 | CEFBS_None, // CLGR = 951 |
24802 | 0 | CEFBS_None, // CLGRB = 952 |
24803 | 0 | CEFBS_None, // CLGRBAsm = 953 |
24804 | 0 | CEFBS_None, // CLGRBAsmE = 954 |
24805 | 0 | CEFBS_None, // CLGRBAsmH = 955 |
24806 | 0 | CEFBS_None, // CLGRBAsmHE = 956 |
24807 | 0 | CEFBS_None, // CLGRBAsmL = 957 |
24808 | 0 | CEFBS_None, // CLGRBAsmLE = 958 |
24809 | 0 | CEFBS_None, // CLGRBAsmLH = 959 |
24810 | 0 | CEFBS_None, // CLGRBAsmNE = 960 |
24811 | 0 | CEFBS_None, // CLGRBAsmNH = 961 |
24812 | 0 | CEFBS_None, // CLGRBAsmNHE = 962 |
24813 | 0 | CEFBS_None, // CLGRBAsmNL = 963 |
24814 | 0 | CEFBS_None, // CLGRBAsmNLE = 964 |
24815 | 0 | CEFBS_None, // CLGRBAsmNLH = 965 |
24816 | 0 | CEFBS_None, // CLGRJ = 966 |
24817 | 0 | CEFBS_None, // CLGRJAsm = 967 |
24818 | 0 | CEFBS_None, // CLGRJAsmE = 968 |
24819 | 0 | CEFBS_None, // CLGRJAsmH = 969 |
24820 | 0 | CEFBS_None, // CLGRJAsmHE = 970 |
24821 | 0 | CEFBS_None, // CLGRJAsmL = 971 |
24822 | 0 | CEFBS_None, // CLGRJAsmLE = 972 |
24823 | 0 | CEFBS_None, // CLGRJAsmLH = 973 |
24824 | 0 | CEFBS_None, // CLGRJAsmNE = 974 |
24825 | 0 | CEFBS_None, // CLGRJAsmNH = 975 |
24826 | 0 | CEFBS_None, // CLGRJAsmNHE = 976 |
24827 | 0 | CEFBS_None, // CLGRJAsmNL = 977 |
24828 | 0 | CEFBS_None, // CLGRJAsmNLE = 978 |
24829 | 0 | CEFBS_None, // CLGRJAsmNLH = 979 |
24830 | 0 | CEFBS_None, // CLGRL = 980 |
24831 | 0 | CEFBS_None, // CLGRT = 981 |
24832 | 0 | CEFBS_None, // CLGRTAsm = 982 |
24833 | 0 | CEFBS_None, // CLGRTAsmE = 983 |
24834 | 0 | CEFBS_None, // CLGRTAsmH = 984 |
24835 | 0 | CEFBS_None, // CLGRTAsmHE = 985 |
24836 | 0 | CEFBS_None, // CLGRTAsmL = 986 |
24837 | 0 | CEFBS_None, // CLGRTAsmLE = 987 |
24838 | 0 | CEFBS_None, // CLGRTAsmLH = 988 |
24839 | 0 | CEFBS_None, // CLGRTAsmNE = 989 |
24840 | 0 | CEFBS_None, // CLGRTAsmNH = 990 |
24841 | 0 | CEFBS_None, // CLGRTAsmNHE = 991 |
24842 | 0 | CEFBS_None, // CLGRTAsmNL = 992 |
24843 | 0 | CEFBS_None, // CLGRTAsmNLE = 993 |
24844 | 0 | CEFBS_None, // CLGRTAsmNLH = 994 |
24845 | 0 | CEFBS_FeatureMiscellaneousExtensions, // CLGT = 995 |
24846 | 0 | CEFBS_FeatureMiscellaneousExtensions, // CLGTAsm = 996 |
24847 | 0 | CEFBS_FeatureMiscellaneousExtensions, // CLGTAsmE = 997 |
24848 | 0 | CEFBS_FeatureMiscellaneousExtensions, // CLGTAsmH = 998 |
24849 | 0 | CEFBS_FeatureMiscellaneousExtensions, // CLGTAsmHE = 999 |
24850 | 0 | CEFBS_FeatureMiscellaneousExtensions, // CLGTAsmL = 1000 |
24851 | 0 | CEFBS_FeatureMiscellaneousExtensions, // CLGTAsmLE = 1001 |
24852 | 0 | CEFBS_FeatureMiscellaneousExtensions, // CLGTAsmLH = 1002 |
24853 | 0 | CEFBS_FeatureMiscellaneousExtensions, // CLGTAsmNE = 1003 |
24854 | 0 | CEFBS_FeatureMiscellaneousExtensions, // CLGTAsmNH = 1004 |
24855 | 0 | CEFBS_FeatureMiscellaneousExtensions, // CLGTAsmNHE = 1005 |
24856 | 0 | CEFBS_FeatureMiscellaneousExtensions, // CLGTAsmNL = 1006 |
24857 | 0 | CEFBS_FeatureMiscellaneousExtensions, // CLGTAsmNLE = 1007 |
24858 | 0 | CEFBS_FeatureMiscellaneousExtensions, // CLGTAsmNLH = 1008 |
24859 | 0 | CEFBS_FeatureFPExtension, // CLGXBR = 1009 |
24860 | 0 | CEFBS_FeatureFPExtension, // CLGXTR = 1010 |
24861 | 0 | CEFBS_FeatureHighWord, // CLHF = 1011 |
24862 | 0 | CEFBS_FeatureHighWord, // CLHHR = 1012 |
24863 | 0 | CEFBS_None, // CLHHSI = 1013 |
24864 | 0 | CEFBS_FeatureHighWord, // CLHLR = 1014 |
24865 | 0 | CEFBS_None, // CLHRL = 1015 |
24866 | 0 | CEFBS_None, // CLI = 1016 |
24867 | 0 | CEFBS_None, // CLIB = 1017 |
24868 | 0 | CEFBS_None, // CLIBAsm = 1018 |
24869 | 0 | CEFBS_None, // CLIBAsmE = 1019 |
24870 | 0 | CEFBS_None, // CLIBAsmH = 1020 |
24871 | 0 | CEFBS_None, // CLIBAsmHE = 1021 |
24872 | 0 | CEFBS_None, // CLIBAsmL = 1022 |
24873 | 0 | CEFBS_None, // CLIBAsmLE = 1023 |
24874 | 0 | CEFBS_None, // CLIBAsmLH = 1024 |
24875 | 0 | CEFBS_None, // CLIBAsmNE = 1025 |
24876 | 0 | CEFBS_None, // CLIBAsmNH = 1026 |
24877 | 0 | CEFBS_None, // CLIBAsmNHE = 1027 |
24878 | 0 | CEFBS_None, // CLIBAsmNL = 1028 |
24879 | 0 | CEFBS_None, // CLIBAsmNLE = 1029 |
24880 | 0 | CEFBS_None, // CLIBAsmNLH = 1030 |
24881 | 0 | CEFBS_FeatureHighWord, // CLIH = 1031 |
24882 | 0 | CEFBS_None, // CLIJ = 1032 |
24883 | 0 | CEFBS_None, // CLIJAsm = 1033 |
24884 | 0 | CEFBS_None, // CLIJAsmE = 1034 |
24885 | 0 | CEFBS_None, // CLIJAsmH = 1035 |
24886 | 0 | CEFBS_None, // CLIJAsmHE = 1036 |
24887 | 0 | CEFBS_None, // CLIJAsmL = 1037 |
24888 | 0 | CEFBS_None, // CLIJAsmLE = 1038 |
24889 | 0 | CEFBS_None, // CLIJAsmLH = 1039 |
24890 | 0 | CEFBS_None, // CLIJAsmNE = 1040 |
24891 | 0 | CEFBS_None, // CLIJAsmNH = 1041 |
24892 | 0 | CEFBS_None, // CLIJAsmNHE = 1042 |
24893 | 0 | CEFBS_None, // CLIJAsmNL = 1043 |
24894 | 0 | CEFBS_None, // CLIJAsmNLE = 1044 |
24895 | 0 | CEFBS_None, // CLIJAsmNLH = 1045 |
24896 | 0 | CEFBS_None, // CLIY = 1046 |
24897 | 0 | CEFBS_None, // CLM = 1047 |
24898 | 0 | CEFBS_None, // CLMH = 1048 |
24899 | 0 | CEFBS_None, // CLMY = 1049 |
24900 | 0 | CEFBS_None, // CLR = 1050 |
24901 | 0 | CEFBS_None, // CLRB = 1051 |
24902 | 0 | CEFBS_None, // CLRBAsm = 1052 |
24903 | 0 | CEFBS_None, // CLRBAsmE = 1053 |
24904 | 0 | CEFBS_None, // CLRBAsmH = 1054 |
24905 | 0 | CEFBS_None, // CLRBAsmHE = 1055 |
24906 | 0 | CEFBS_None, // CLRBAsmL = 1056 |
24907 | 0 | CEFBS_None, // CLRBAsmLE = 1057 |
24908 | 0 | CEFBS_None, // CLRBAsmLH = 1058 |
24909 | 0 | CEFBS_None, // CLRBAsmNE = 1059 |
24910 | 0 | CEFBS_None, // CLRBAsmNH = 1060 |
24911 | 0 | CEFBS_None, // CLRBAsmNHE = 1061 |
24912 | 0 | CEFBS_None, // CLRBAsmNL = 1062 |
24913 | 0 | CEFBS_None, // CLRBAsmNLE = 1063 |
24914 | 0 | CEFBS_None, // CLRBAsmNLH = 1064 |
24915 | 0 | CEFBS_None, // CLRJ = 1065 |
24916 | 0 | CEFBS_None, // CLRJAsm = 1066 |
24917 | 0 | CEFBS_None, // CLRJAsmE = 1067 |
24918 | 0 | CEFBS_None, // CLRJAsmH = 1068 |
24919 | 0 | CEFBS_None, // CLRJAsmHE = 1069 |
24920 | 0 | CEFBS_None, // CLRJAsmL = 1070 |
24921 | 0 | CEFBS_None, // CLRJAsmLE = 1071 |
24922 | 0 | CEFBS_None, // CLRJAsmLH = 1072 |
24923 | 0 | CEFBS_None, // CLRJAsmNE = 1073 |
24924 | 0 | CEFBS_None, // CLRJAsmNH = 1074 |
24925 | 0 | CEFBS_None, // CLRJAsmNHE = 1075 |
24926 | 0 | CEFBS_None, // CLRJAsmNL = 1076 |
24927 | 0 | CEFBS_None, // CLRJAsmNLE = 1077 |
24928 | 0 | CEFBS_None, // CLRJAsmNLH = 1078 |
24929 | 0 | CEFBS_None, // CLRL = 1079 |
24930 | 0 | CEFBS_None, // CLRT = 1080 |
24931 | 0 | CEFBS_None, // CLRTAsm = 1081 |
24932 | 0 | CEFBS_None, // CLRTAsmE = 1082 |
24933 | 0 | CEFBS_None, // CLRTAsmH = 1083 |
24934 | 0 | CEFBS_None, // CLRTAsmHE = 1084 |
24935 | 0 | CEFBS_None, // CLRTAsmL = 1085 |
24936 | 0 | CEFBS_None, // CLRTAsmLE = 1086 |
24937 | 0 | CEFBS_None, // CLRTAsmLH = 1087 |
24938 | 0 | CEFBS_None, // CLRTAsmNE = 1088 |
24939 | 0 | CEFBS_None, // CLRTAsmNH = 1089 |
24940 | 0 | CEFBS_None, // CLRTAsmNHE = 1090 |
24941 | 0 | CEFBS_None, // CLRTAsmNL = 1091 |
24942 | 0 | CEFBS_None, // CLRTAsmNLE = 1092 |
24943 | 0 | CEFBS_None, // CLRTAsmNLH = 1093 |
24944 | 0 | CEFBS_None, // CLST = 1094 |
24945 | 0 | CEFBS_FeatureMiscellaneousExtensions, // CLT = 1095 |
24946 | 0 | CEFBS_FeatureMiscellaneousExtensions, // CLTAsm = 1096 |
24947 | 0 | CEFBS_FeatureMiscellaneousExtensions, // CLTAsmE = 1097 |
24948 | 0 | CEFBS_FeatureMiscellaneousExtensions, // CLTAsmH = 1098 |
24949 | 0 | CEFBS_FeatureMiscellaneousExtensions, // CLTAsmHE = 1099 |
24950 | 0 | CEFBS_FeatureMiscellaneousExtensions, // CLTAsmL = 1100 |
24951 | 0 | CEFBS_FeatureMiscellaneousExtensions, // CLTAsmLE = 1101 |
24952 | 0 | CEFBS_FeatureMiscellaneousExtensions, // CLTAsmLH = 1102 |
24953 | 0 | CEFBS_FeatureMiscellaneousExtensions, // CLTAsmNE = 1103 |
24954 | 0 | CEFBS_FeatureMiscellaneousExtensions, // CLTAsmNH = 1104 |
24955 | 0 | CEFBS_FeatureMiscellaneousExtensions, // CLTAsmNHE = 1105 |
24956 | 0 | CEFBS_FeatureMiscellaneousExtensions, // CLTAsmNL = 1106 |
24957 | 0 | CEFBS_FeatureMiscellaneousExtensions, // CLTAsmNLE = 1107 |
24958 | 0 | CEFBS_FeatureMiscellaneousExtensions, // CLTAsmNLH = 1108 |
24959 | 0 | CEFBS_None, // CLY = 1109 |
24960 | 0 | CEFBS_None, // CMPSC = 1110 |
24961 | 0 | CEFBS_None, // CP = 1111 |
24962 | 0 | CEFBS_FeatureDFPPackedConversion, // CPDT = 1112 |
24963 | 0 | CEFBS_None, // CPSDRdd = 1113 |
24964 | 0 | CEFBS_None, // CPSDRds = 1114 |
24965 | 0 | CEFBS_None, // CPSDRsd = 1115 |
24966 | 0 | CEFBS_None, // CPSDRss = 1116 |
24967 | 0 | CEFBS_FeatureDFPPackedConversion, // CPXT = 1117 |
24968 | 0 | CEFBS_None, // CPYA = 1118 |
24969 | 0 | CEFBS_None, // CR = 1119 |
24970 | 0 | CEFBS_None, // CRB = 1120 |
24971 | 0 | CEFBS_None, // CRBAsm = 1121 |
24972 | 0 | CEFBS_None, // CRBAsmE = 1122 |
24973 | 0 | CEFBS_None, // CRBAsmH = 1123 |
24974 | 0 | CEFBS_None, // CRBAsmHE = 1124 |
24975 | 0 | CEFBS_None, // CRBAsmL = 1125 |
24976 | 0 | CEFBS_None, // CRBAsmLE = 1126 |
24977 | 0 | CEFBS_None, // CRBAsmLH = 1127 |
24978 | 0 | CEFBS_None, // CRBAsmNE = 1128 |
24979 | 0 | CEFBS_None, // CRBAsmNH = 1129 |
24980 | 0 | CEFBS_None, // CRBAsmNHE = 1130 |
24981 | 0 | CEFBS_None, // CRBAsmNL = 1131 |
24982 | 0 | CEFBS_None, // CRBAsmNLE = 1132 |
24983 | 0 | CEFBS_None, // CRBAsmNLH = 1133 |
24984 | 0 | CEFBS_FeatureEnhancedDAT2, // CRDTE = 1134 |
24985 | 0 | CEFBS_FeatureEnhancedDAT2, // CRDTEOpt = 1135 |
24986 | 0 | CEFBS_None, // CRJ = 1136 |
24987 | 0 | CEFBS_None, // CRJAsm = 1137 |
24988 | 0 | CEFBS_None, // CRJAsmE = 1138 |
24989 | 0 | CEFBS_None, // CRJAsmH = 1139 |
24990 | 0 | CEFBS_None, // CRJAsmHE = 1140 |
24991 | 0 | CEFBS_None, // CRJAsmL = 1141 |
24992 | 0 | CEFBS_None, // CRJAsmLE = 1142 |
24993 | 0 | CEFBS_None, // CRJAsmLH = 1143 |
24994 | 0 | CEFBS_None, // CRJAsmNE = 1144 |
24995 | 0 | CEFBS_None, // CRJAsmNH = 1145 |
24996 | 0 | CEFBS_None, // CRJAsmNHE = 1146 |
24997 | 0 | CEFBS_None, // CRJAsmNL = 1147 |
24998 | 0 | CEFBS_None, // CRJAsmNLE = 1148 |
24999 | 0 | CEFBS_None, // CRJAsmNLH = 1149 |
25000 | 0 | CEFBS_None, // CRL = 1150 |
25001 | 0 | CEFBS_None, // CRT = 1151 |
25002 | 0 | CEFBS_None, // CRTAsm = 1152 |
25003 | 0 | CEFBS_None, // CRTAsmE = 1153 |
25004 | 0 | CEFBS_None, // CRTAsmH = 1154 |
25005 | 0 | CEFBS_None, // CRTAsmHE = 1155 |
25006 | 0 | CEFBS_None, // CRTAsmL = 1156 |
25007 | 0 | CEFBS_None, // CRTAsmLE = 1157 |
25008 | 0 | CEFBS_None, // CRTAsmLH = 1158 |
25009 | 0 | CEFBS_None, // CRTAsmNE = 1159 |
25010 | 0 | CEFBS_None, // CRTAsmNH = 1160 |
25011 | 0 | CEFBS_None, // CRTAsmNHE = 1161 |
25012 | 0 | CEFBS_None, // CRTAsmNL = 1162 |
25013 | 0 | CEFBS_None, // CRTAsmNLE = 1163 |
25014 | 0 | CEFBS_None, // CRTAsmNLH = 1164 |
25015 | 0 | CEFBS_None, // CS = 1165 |
25016 | 0 | CEFBS_None, // CSCH = 1166 |
25017 | 0 | CEFBS_None, // CSDTR = 1167 |
25018 | 0 | CEFBS_None, // CSG = 1168 |
25019 | 0 | CEFBS_None, // CSP = 1169 |
25020 | 0 | CEFBS_None, // CSPG = 1170 |
25021 | 0 | CEFBS_None, // CSST = 1171 |
25022 | 0 | CEFBS_None, // CSXTR = 1172 |
25023 | 0 | CEFBS_None, // CSY = 1173 |
25024 | 0 | CEFBS_None, // CU12 = 1174 |
25025 | 0 | CEFBS_None, // CU12Opt = 1175 |
25026 | 0 | CEFBS_None, // CU14 = 1176 |
25027 | 0 | CEFBS_None, // CU14Opt = 1177 |
25028 | 0 | CEFBS_None, // CU21 = 1178 |
25029 | 0 | CEFBS_None, // CU21Opt = 1179 |
25030 | 0 | CEFBS_None, // CU24 = 1180 |
25031 | 0 | CEFBS_None, // CU24Opt = 1181 |
25032 | 0 | CEFBS_None, // CU41 = 1182 |
25033 | 0 | CEFBS_None, // CU42 = 1183 |
25034 | 0 | CEFBS_None, // CUDTR = 1184 |
25035 | 0 | CEFBS_None, // CUSE = 1185 |
25036 | 0 | CEFBS_None, // CUTFU = 1186 |
25037 | 0 | CEFBS_None, // CUTFUOpt = 1187 |
25038 | 0 | CEFBS_None, // CUUTF = 1188 |
25039 | 0 | CEFBS_None, // CUUTFOpt = 1189 |
25040 | 0 | CEFBS_None, // CUXTR = 1190 |
25041 | 0 | CEFBS_None, // CVB = 1191 |
25042 | 0 | CEFBS_None, // CVBG = 1192 |
25043 | 0 | CEFBS_None, // CVBY = 1193 |
25044 | 0 | CEFBS_None, // CVD = 1194 |
25045 | 0 | CEFBS_None, // CVDG = 1195 |
25046 | 0 | CEFBS_None, // CVDY = 1196 |
25047 | 0 | CEFBS_None, // CXBR = 1197 |
25048 | 0 | CEFBS_None, // CXFBR = 1198 |
25049 | 0 | CEFBS_FeatureFPExtension, // CXFBRA = 1199 |
25050 | 0 | CEFBS_None, // CXFR = 1200 |
25051 | 0 | CEFBS_FeatureFPExtension, // CXFTR = 1201 |
25052 | 0 | CEFBS_None, // CXGBR = 1202 |
25053 | 0 | CEFBS_FeatureFPExtension, // CXGBRA = 1203 |
25054 | 0 | CEFBS_None, // CXGR = 1204 |
25055 | 0 | CEFBS_None, // CXGTR = 1205 |
25056 | 0 | CEFBS_FeatureFPExtension, // CXGTRA = 1206 |
25057 | 0 | CEFBS_FeatureFPExtension, // CXLFBR = 1207 |
25058 | 0 | CEFBS_FeatureFPExtension, // CXLFTR = 1208 |
25059 | 0 | CEFBS_FeatureFPExtension, // CXLGBR = 1209 |
25060 | 0 | CEFBS_FeatureFPExtension, // CXLGTR = 1210 |
25061 | 0 | CEFBS_FeatureDFPPackedConversion, // CXPT = 1211 |
25062 | 0 | CEFBS_None, // CXR = 1212 |
25063 | 0 | CEFBS_None, // CXSTR = 1213 |
25064 | 0 | CEFBS_None, // CXTR = 1214 |
25065 | 0 | CEFBS_None, // CXUTR = 1215 |
25066 | 0 | CEFBS_FeatureDFPZonedConversion, // CXZT = 1216 |
25067 | 0 | CEFBS_None, // CY = 1217 |
25068 | 0 | CEFBS_FeatureDFPZonedConversion, // CZDT = 1218 |
25069 | 0 | CEFBS_FeatureDFPZonedConversion, // CZXT = 1219 |
25070 | 0 | CEFBS_None, // D = 1220 |
25071 | 0 | CEFBS_None, // DD = 1221 |
25072 | 0 | CEFBS_None, // DDB = 1222 |
25073 | 0 | CEFBS_None, // DDBR = 1223 |
25074 | 0 | CEFBS_None, // DDR = 1224 |
25075 | 0 | CEFBS_None, // DDTR = 1225 |
25076 | 0 | CEFBS_FeatureFPExtension, // DDTRA = 1226 |
25077 | 0 | CEFBS_None, // DE = 1227 |
25078 | 0 | CEFBS_None, // DEB = 1228 |
25079 | 0 | CEFBS_None, // DEBR = 1229 |
25080 | 0 | CEFBS_None, // DER = 1230 |
25081 | 0 | CEFBS_FeatureDeflateConversion, // DFLTCC = 1231 |
25082 | 0 | CEFBS_None, // DIAG = 1232 |
25083 | 0 | CEFBS_None, // DIDBR = 1233 |
25084 | 0 | CEFBS_None, // DIEBR = 1234 |
25085 | 0 | CEFBS_None, // DL = 1235 |
25086 | 0 | CEFBS_None, // DLG = 1236 |
25087 | 0 | CEFBS_None, // DLGR = 1237 |
25088 | 0 | CEFBS_None, // DLR = 1238 |
25089 | 0 | CEFBS_None, // DP = 1239 |
25090 | 0 | CEFBS_None, // DR = 1240 |
25091 | 0 | CEFBS_None, // DSG = 1241 |
25092 | 0 | CEFBS_None, // DSGF = 1242 |
25093 | 0 | CEFBS_None, // DSGFR = 1243 |
25094 | 0 | CEFBS_None, // DSGR = 1244 |
25095 | 0 | CEFBS_None, // DXBR = 1245 |
25096 | 0 | CEFBS_None, // DXR = 1246 |
25097 | 0 | CEFBS_None, // DXTR = 1247 |
25098 | 0 | CEFBS_FeatureFPExtension, // DXTRA = 1248 |
25099 | 0 | CEFBS_None, // EAR = 1249 |
25100 | 0 | CEFBS_None, // ECAG = 1250 |
25101 | 0 | CEFBS_None, // ECCTR = 1251 |
25102 | 0 | CEFBS_None, // ECPGA = 1252 |
25103 | 0 | CEFBS_None, // ECTG = 1253 |
25104 | 0 | CEFBS_None, // ED = 1254 |
25105 | 0 | CEFBS_None, // EDMK = 1255 |
25106 | 0 | CEFBS_None, // EEDTR = 1256 |
25107 | 0 | CEFBS_None, // EEXTR = 1257 |
25108 | 0 | CEFBS_None, // EFPC = 1258 |
25109 | 0 | CEFBS_None, // EPAIR = 1259 |
25110 | 0 | CEFBS_None, // EPAR = 1260 |
25111 | 0 | CEFBS_None, // EPCTR = 1261 |
25112 | 0 | CEFBS_None, // EPSW = 1262 |
25113 | 0 | CEFBS_None, // EREG = 1263 |
25114 | 0 | CEFBS_None, // EREGG = 1264 |
25115 | 0 | CEFBS_None, // ESAIR = 1265 |
25116 | 0 | CEFBS_None, // ESAR = 1266 |
25117 | 0 | CEFBS_None, // ESDTR = 1267 |
25118 | 0 | CEFBS_None, // ESEA = 1268 |
25119 | 0 | CEFBS_None, // ESTA = 1269 |
25120 | 0 | CEFBS_None, // ESXTR = 1270 |
25121 | 0 | CEFBS_FeatureTransactionalExecution, // ETND = 1271 |
25122 | 0 | CEFBS_None, // EX = 1272 |
25123 | 0 | CEFBS_None, // EXRL = 1273 |
25124 | 0 | CEFBS_None, // FIDBR = 1274 |
25125 | 0 | CEFBS_FeatureFPExtension, // FIDBRA = 1275 |
25126 | 0 | CEFBS_None, // FIDR = 1276 |
25127 | 0 | CEFBS_None, // FIDTR = 1277 |
25128 | 0 | CEFBS_None, // FIEBR = 1278 |
25129 | 0 | CEFBS_FeatureFPExtension, // FIEBRA = 1279 |
25130 | 0 | CEFBS_None, // FIER = 1280 |
25131 | 0 | CEFBS_None, // FIXBR = 1281 |
25132 | 0 | CEFBS_FeatureFPExtension, // FIXBRA = 1282 |
25133 | 0 | CEFBS_None, // FIXR = 1283 |
25134 | 0 | CEFBS_None, // FIXTR = 1284 |
25135 | 0 | CEFBS_None, // FLOGR = 1285 |
25136 | 0 | CEFBS_None, // HDR = 1286 |
25137 | 0 | CEFBS_None, // HER = 1287 |
25138 | 0 | CEFBS_None, // HSCH = 1288 |
25139 | 0 | CEFBS_None, // IAC = 1289 |
25140 | 0 | CEFBS_None, // IC = 1290 |
25141 | 0 | CEFBS_None, // IC32 = 1291 |
25142 | 0 | CEFBS_None, // IC32Y = 1292 |
25143 | 0 | CEFBS_None, // ICM = 1293 |
25144 | 0 | CEFBS_None, // ICMH = 1294 |
25145 | 0 | CEFBS_None, // ICMY = 1295 |
25146 | 0 | CEFBS_None, // ICY = 1296 |
25147 | 0 | CEFBS_None, // IDTE = 1297 |
25148 | 0 | CEFBS_None, // IDTEOpt = 1298 |
25149 | 0 | CEFBS_None, // IEDTR = 1299 |
25150 | 0 | CEFBS_None, // IEXTR = 1300 |
25151 | 0 | CEFBS_None, // IIHF = 1301 |
25152 | 0 | CEFBS_None, // IIHH = 1302 |
25153 | 0 | CEFBS_None, // IIHL = 1303 |
25154 | 0 | CEFBS_None, // IILF = 1304 |
25155 | 0 | CEFBS_None, // IILH = 1305 |
25156 | 0 | CEFBS_None, // IILL = 1306 |
25157 | 0 | CEFBS_None, // IPK = 1307 |
25158 | 0 | CEFBS_None, // IPM = 1308 |
25159 | 0 | CEFBS_None, // IPTE = 1309 |
25160 | 0 | CEFBS_None, // IPTEOpt = 1310 |
25161 | 0 | CEFBS_None, // IPTEOptOpt = 1311 |
25162 | 0 | CEFBS_FeatureInsertReferenceBitsMultiple, // IRBM = 1312 |
25163 | 0 | CEFBS_None, // ISKE = 1313 |
25164 | 0 | CEFBS_None, // IVSK = 1314 |
25165 | 0 | CEFBS_None, // InsnE = 1315 |
25166 | 0 | CEFBS_None, // InsnRI = 1316 |
25167 | 0 | CEFBS_None, // InsnRIE = 1317 |
25168 | 0 | CEFBS_None, // InsnRIL = 1318 |
25169 | 0 | CEFBS_None, // InsnRILU = 1319 |
25170 | 0 | CEFBS_None, // InsnRIS = 1320 |
25171 | 0 | CEFBS_None, // InsnRR = 1321 |
25172 | 0 | CEFBS_None, // InsnRRE = 1322 |
25173 | 0 | CEFBS_None, // InsnRRF = 1323 |
25174 | 0 | CEFBS_None, // InsnRRS = 1324 |
25175 | 0 | CEFBS_None, // InsnRS = 1325 |
25176 | 0 | CEFBS_None, // InsnRSE = 1326 |
25177 | 0 | CEFBS_None, // InsnRSI = 1327 |
25178 | 0 | CEFBS_None, // InsnRSY = 1328 |
25179 | 0 | CEFBS_None, // InsnRX = 1329 |
25180 | 0 | CEFBS_None, // InsnRXE = 1330 |
25181 | 0 | CEFBS_None, // InsnRXF = 1331 |
25182 | 0 | CEFBS_None, // InsnRXY = 1332 |
25183 | 0 | CEFBS_None, // InsnS = 1333 |
25184 | 0 | CEFBS_None, // InsnSI = 1334 |
25185 | 0 | CEFBS_None, // InsnSIL = 1335 |
25186 | 0 | CEFBS_None, // InsnSIY = 1336 |
25187 | 0 | CEFBS_None, // InsnSS = 1337 |
25188 | 0 | CEFBS_None, // InsnSSE = 1338 |
25189 | 0 | CEFBS_None, // InsnSSF = 1339 |
25190 | 0 | CEFBS_None, // InsnVRI = 1340 |
25191 | 0 | CEFBS_None, // InsnVRR = 1341 |
25192 | 0 | CEFBS_None, // InsnVRS = 1342 |
25193 | 0 | CEFBS_None, // InsnVRV = 1343 |
25194 | 0 | CEFBS_None, // InsnVRX = 1344 |
25195 | 0 | CEFBS_None, // InsnVSI = 1345 |
25196 | 0 | CEFBS_None, // J = 1346 |
25197 | 0 | CEFBS_None, // JAsmE = 1347 |
25198 | 0 | CEFBS_None, // JAsmH = 1348 |
25199 | 0 | CEFBS_None, // JAsmHE = 1349 |
25200 | 0 | CEFBS_None, // JAsmL = 1350 |
25201 | 0 | CEFBS_None, // JAsmLE = 1351 |
25202 | 0 | CEFBS_None, // JAsmLH = 1352 |
25203 | 0 | CEFBS_None, // JAsmM = 1353 |
25204 | 0 | CEFBS_None, // JAsmNE = 1354 |
25205 | 0 | CEFBS_None, // JAsmNH = 1355 |
25206 | 0 | CEFBS_None, // JAsmNHE = 1356 |
25207 | 0 | CEFBS_None, // JAsmNL = 1357 |
25208 | 0 | CEFBS_None, // JAsmNLE = 1358 |
25209 | 0 | CEFBS_None, // JAsmNLH = 1359 |
25210 | 0 | CEFBS_None, // JAsmNM = 1360 |
25211 | 0 | CEFBS_None, // JAsmNO = 1361 |
25212 | 0 | CEFBS_None, // JAsmNP = 1362 |
25213 | 0 | CEFBS_None, // JAsmNZ = 1363 |
25214 | 0 | CEFBS_None, // JAsmO = 1364 |
25215 | 0 | CEFBS_None, // JAsmP = 1365 |
25216 | 0 | CEFBS_None, // JAsmZ = 1366 |
25217 | 0 | CEFBS_None, // JG = 1367 |
25218 | 0 | CEFBS_None, // JGAsmE = 1368 |
25219 | 0 | CEFBS_None, // JGAsmH = 1369 |
25220 | 0 | CEFBS_None, // JGAsmHE = 1370 |
25221 | 0 | CEFBS_None, // JGAsmL = 1371 |
25222 | 0 | CEFBS_None, // JGAsmLE = 1372 |
25223 | 0 | CEFBS_None, // JGAsmLH = 1373 |
25224 | 0 | CEFBS_None, // JGAsmM = 1374 |
25225 | 0 | CEFBS_None, // JGAsmNE = 1375 |
25226 | 0 | CEFBS_None, // JGAsmNH = 1376 |
25227 | 0 | CEFBS_None, // JGAsmNHE = 1377 |
25228 | 0 | CEFBS_None, // JGAsmNL = 1378 |
25229 | 0 | CEFBS_None, // JGAsmNLE = 1379 |
25230 | 0 | CEFBS_None, // JGAsmNLH = 1380 |
25231 | 0 | CEFBS_None, // JGAsmNM = 1381 |
25232 | 0 | CEFBS_None, // JGAsmNO = 1382 |
25233 | 0 | CEFBS_None, // JGAsmNP = 1383 |
25234 | 0 | CEFBS_None, // JGAsmNZ = 1384 |
25235 | 0 | CEFBS_None, // JGAsmO = 1385 |
25236 | 0 | CEFBS_None, // JGAsmP = 1386 |
25237 | 0 | CEFBS_None, // JGAsmZ = 1387 |
25238 | 0 | CEFBS_None, // KDB = 1388 |
25239 | 0 | CEFBS_None, // KDBR = 1389 |
25240 | 0 | CEFBS_FeatureMessageSecurityAssist9, // KDSA = 1390 |
25241 | 0 | CEFBS_None, // KDTR = 1391 |
25242 | 0 | CEFBS_None, // KEB = 1392 |
25243 | 0 | CEFBS_None, // KEBR = 1393 |
25244 | 0 | CEFBS_None, // KIMD = 1394 |
25245 | 0 | CEFBS_None, // KLMD = 1395 |
25246 | 0 | CEFBS_None, // KM = 1396 |
25247 | 0 | CEFBS_FeatureMessageSecurityAssist8, // KMA = 1397 |
25248 | 0 | CEFBS_None, // KMAC = 1398 |
25249 | 0 | CEFBS_None, // KMC = 1399 |
25250 | 0 | CEFBS_FeatureMessageSecurityAssist4, // KMCTR = 1400 |
25251 | 0 | CEFBS_FeatureMessageSecurityAssist4, // KMF = 1401 |
25252 | 0 | CEFBS_FeatureMessageSecurityAssist4, // KMO = 1402 |
25253 | 0 | CEFBS_None, // KXBR = 1403 |
25254 | 0 | CEFBS_None, // KXTR = 1404 |
25255 | 0 | CEFBS_None, // L = 1405 |
25256 | 0 | CEFBS_None, // LA = 1406 |
25257 | 0 | CEFBS_FeatureInterlockedAccess1, // LAA = 1407 |
25258 | 0 | CEFBS_FeatureInterlockedAccess1, // LAAG = 1408 |
25259 | 0 | CEFBS_FeatureInterlockedAccess1, // LAAL = 1409 |
25260 | 0 | CEFBS_FeatureInterlockedAccess1, // LAALG = 1410 |
25261 | 0 | CEFBS_None, // LAE = 1411 |
25262 | 0 | CEFBS_None, // LAEY = 1412 |
25263 | 0 | CEFBS_None, // LAM = 1413 |
25264 | 0 | CEFBS_None, // LAMY = 1414 |
25265 | 0 | CEFBS_FeatureInterlockedAccess1, // LAN = 1415 |
25266 | 0 | CEFBS_FeatureInterlockedAccess1, // LANG = 1416 |
25267 | 0 | CEFBS_FeatureInterlockedAccess1, // LAO = 1417 |
25268 | 0 | CEFBS_FeatureInterlockedAccess1, // LAOG = 1418 |
25269 | 0 | CEFBS_None, // LARL = 1419 |
25270 | 0 | CEFBS_None, // LASP = 1420 |
25271 | 0 | CEFBS_FeatureLoadAndTrap, // LAT = 1421 |
25272 | 0 | CEFBS_FeatureInterlockedAccess1, // LAX = 1422 |
25273 | 0 | CEFBS_FeatureInterlockedAccess1, // LAXG = 1423 |
25274 | 0 | CEFBS_None, // LAY = 1424 |
25275 | 0 | CEFBS_None, // LB = 1425 |
25276 | 0 | CEFBS_FeatureBEAREnhancement, // LBEAR = 1426 |
25277 | 0 | CEFBS_FeatureHighWord, // LBH = 1427 |
25278 | 0 | CEFBS_None, // LBR = 1428 |
25279 | 0 | CEFBS_FeatureVector, // LCBB = 1429 |
25280 | 0 | CEFBS_None, // LCCTL = 1430 |
25281 | 0 | CEFBS_None, // LCDBR = 1431 |
25282 | 0 | CEFBS_None, // LCDFR = 1432 |
25283 | 0 | CEFBS_None, // LCDFR_32 = 1433 |
25284 | 0 | CEFBS_None, // LCDR = 1434 |
25285 | 0 | CEFBS_None, // LCEBR = 1435 |
25286 | 0 | CEFBS_None, // LCER = 1436 |
25287 | 0 | CEFBS_None, // LCGFR = 1437 |
25288 | 0 | CEFBS_None, // LCGR = 1438 |
25289 | 0 | CEFBS_None, // LCR = 1439 |
25290 | 0 | CEFBS_None, // LCTL = 1440 |
25291 | 0 | CEFBS_None, // LCTLG = 1441 |
25292 | 0 | CEFBS_None, // LCXBR = 1442 |
25293 | 0 | CEFBS_None, // LCXR = 1443 |
25294 | 0 | CEFBS_None, // LD = 1444 |
25295 | 0 | CEFBS_None, // LDE = 1445 |
25296 | 0 | CEFBS_None, // LDE32 = 1446 |
25297 | 0 | CEFBS_None, // LDEB = 1447 |
25298 | 0 | CEFBS_None, // LDEBR = 1448 |
25299 | 0 | CEFBS_None, // LDER = 1449 |
25300 | 0 | CEFBS_None, // LDETR = 1450 |
25301 | 0 | CEFBS_None, // LDGR = 1451 |
25302 | 0 | CEFBS_None, // LDR = 1452 |
25303 | 0 | CEFBS_None, // LDR32 = 1453 |
25304 | 0 | CEFBS_None, // LDXBR = 1454 |
25305 | 0 | CEFBS_FeatureFPExtension, // LDXBRA = 1455 |
25306 | 0 | CEFBS_None, // LDXR = 1456 |
25307 | 0 | CEFBS_None, // LDXTR = 1457 |
25308 | 0 | CEFBS_None, // LDY = 1458 |
25309 | 0 | CEFBS_None, // LE = 1459 |
25310 | 0 | CEFBS_None, // LEDBR = 1460 |
25311 | 0 | CEFBS_FeatureFPExtension, // LEDBRA = 1461 |
25312 | 0 | CEFBS_None, // LEDR = 1462 |
25313 | 0 | CEFBS_None, // LEDTR = 1463 |
25314 | 0 | CEFBS_None, // LER = 1464 |
25315 | 0 | CEFBS_None, // LEXBR = 1465 |
25316 | 0 | CEFBS_FeatureFPExtension, // LEXBRA = 1466 |
25317 | 0 | CEFBS_None, // LEXR = 1467 |
25318 | 0 | CEFBS_None, // LEY = 1468 |
25319 | 0 | CEFBS_None, // LFAS = 1469 |
25320 | 0 | CEFBS_FeatureHighWord, // LFH = 1470 |
25321 | 0 | CEFBS_FeatureLoadAndTrap, // LFHAT = 1471 |
25322 | 0 | CEFBS_None, // LFPC = 1472 |
25323 | 0 | CEFBS_None, // LG = 1473 |
25324 | 0 | CEFBS_FeatureLoadAndTrap, // LGAT = 1474 |
25325 | 0 | CEFBS_None, // LGB = 1475 |
25326 | 0 | CEFBS_None, // LGBR = 1476 |
25327 | 0 | CEFBS_None, // LGDR = 1477 |
25328 | 0 | CEFBS_None, // LGF = 1478 |
25329 | 0 | CEFBS_None, // LGFI = 1479 |
25330 | 0 | CEFBS_None, // LGFR = 1480 |
25331 | 0 | CEFBS_None, // LGFRL = 1481 |
25332 | 0 | CEFBS_FeatureGuardedStorage, // LGG = 1482 |
25333 | 0 | CEFBS_None, // LGH = 1483 |
25334 | 0 | CEFBS_None, // LGHI = 1484 |
25335 | 0 | CEFBS_None, // LGHR = 1485 |
25336 | 0 | CEFBS_None, // LGHRL = 1486 |
25337 | 0 | CEFBS_None, // LGR = 1487 |
25338 | 0 | CEFBS_None, // LGRL = 1488 |
25339 | 0 | CEFBS_FeatureGuardedStorage, // LGSC = 1489 |
25340 | 0 | CEFBS_None, // LH = 1490 |
25341 | 0 | CEFBS_FeatureHighWord, // LHH = 1491 |
25342 | 0 | CEFBS_None, // LHI = 1492 |
25343 | 0 | CEFBS_None, // LHR = 1493 |
25344 | 0 | CEFBS_None, // LHRL = 1494 |
25345 | 0 | CEFBS_None, // LHY = 1495 |
25346 | 0 | CEFBS_None, // LLC = 1496 |
25347 | 0 | CEFBS_FeatureHighWord, // LLCH = 1497 |
25348 | 0 | CEFBS_None, // LLCR = 1498 |
25349 | 0 | CEFBS_None, // LLGC = 1499 |
25350 | 0 | CEFBS_None, // LLGCR = 1500 |
25351 | 0 | CEFBS_None, // LLGF = 1501 |
25352 | 0 | CEFBS_FeatureLoadAndTrap, // LLGFAT = 1502 |
25353 | 0 | CEFBS_None, // LLGFR = 1503 |
25354 | 0 | CEFBS_None, // LLGFRL = 1504 |
25355 | 0 | CEFBS_FeatureGuardedStorage, // LLGFSG = 1505 |
25356 | 0 | CEFBS_None, // LLGH = 1506 |
25357 | 0 | CEFBS_None, // LLGHR = 1507 |
25358 | 0 | CEFBS_None, // LLGHRL = 1508 |
25359 | 0 | CEFBS_None, // LLGT = 1509 |
25360 | 0 | CEFBS_FeatureLoadAndTrap, // LLGTAT = 1510 |
25361 | 0 | CEFBS_None, // LLGTR = 1511 |
25362 | 0 | CEFBS_None, // LLH = 1512 |
25363 | 0 | CEFBS_FeatureHighWord, // LLHH = 1513 |
25364 | 0 | CEFBS_None, // LLHR = 1514 |
25365 | 0 | CEFBS_None, // LLHRL = 1515 |
25366 | 0 | CEFBS_None, // LLIHF = 1516 |
25367 | 0 | CEFBS_None, // LLIHH = 1517 |
25368 | 0 | CEFBS_None, // LLIHL = 1518 |
25369 | 0 | CEFBS_None, // LLILF = 1519 |
25370 | 0 | CEFBS_None, // LLILH = 1520 |
25371 | 0 | CEFBS_None, // LLILL = 1521 |
25372 | 0 | CEFBS_FeatureLoadAndZeroRightmostByte, // LLZRGF = 1522 |
25373 | 0 | CEFBS_None, // LM = 1523 |
25374 | 0 | CEFBS_None, // LMD = 1524 |
25375 | 0 | CEFBS_None, // LMG = 1525 |
25376 | 0 | CEFBS_None, // LMH = 1526 |
25377 | 0 | CEFBS_None, // LMY = 1527 |
25378 | 0 | CEFBS_None, // LNDBR = 1528 |
25379 | 0 | CEFBS_None, // LNDFR = 1529 |
25380 | 0 | CEFBS_None, // LNDFR_32 = 1530 |
25381 | 0 | CEFBS_None, // LNDR = 1531 |
25382 | 0 | CEFBS_None, // LNEBR = 1532 |
25383 | 0 | CEFBS_None, // LNER = 1533 |
25384 | 0 | CEFBS_None, // LNGFR = 1534 |
25385 | 0 | CEFBS_None, // LNGR = 1535 |
25386 | 0 | CEFBS_None, // LNR = 1536 |
25387 | 0 | CEFBS_None, // LNXBR = 1537 |
25388 | 0 | CEFBS_None, // LNXR = 1538 |
25389 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOC = 1539 |
25390 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCAsm = 1540 |
25391 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCAsmE = 1541 |
25392 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCAsmH = 1542 |
25393 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCAsmHE = 1543 |
25394 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCAsmL = 1544 |
25395 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCAsmLE = 1545 |
25396 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCAsmLH = 1546 |
25397 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCAsmM = 1547 |
25398 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCAsmNE = 1548 |
25399 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCAsmNH = 1549 |
25400 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCAsmNHE = 1550 |
25401 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCAsmNL = 1551 |
25402 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCAsmNLE = 1552 |
25403 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCAsmNLH = 1553 |
25404 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCAsmNM = 1554 |
25405 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCAsmNO = 1555 |
25406 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCAsmNP = 1556 |
25407 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCAsmNZ = 1557 |
25408 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCAsmO = 1558 |
25409 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCAsmP = 1559 |
25410 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCAsmZ = 1560 |
25411 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFH = 1561 |
25412 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsm = 1562 |
25413 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmE = 1563 |
25414 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmH = 1564 |
25415 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmHE = 1565 |
25416 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmL = 1566 |
25417 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmLE = 1567 |
25418 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmLH = 1568 |
25419 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmM = 1569 |
25420 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmNE = 1570 |
25421 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmNH = 1571 |
25422 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmNHE = 1572 |
25423 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmNL = 1573 |
25424 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmNLE = 1574 |
25425 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmNLH = 1575 |
25426 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmNM = 1576 |
25427 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmNO = 1577 |
25428 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmNP = 1578 |
25429 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmNZ = 1579 |
25430 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmO = 1580 |
25431 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmP = 1581 |
25432 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmZ = 1582 |
25433 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHR = 1583 |
25434 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsm = 1584 |
25435 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmE = 1585 |
25436 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmH = 1586 |
25437 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmHE = 1587 |
25438 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmL = 1588 |
25439 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmLE = 1589 |
25440 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmLH = 1590 |
25441 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmM = 1591 |
25442 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmNE = 1592 |
25443 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmNH = 1593 |
25444 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmNHE = 1594 |
25445 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmNL = 1595 |
25446 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmNLE = 1596 |
25447 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmNLH = 1597 |
25448 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmNM = 1598 |
25449 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmNO = 1599 |
25450 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmNP = 1600 |
25451 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmNZ = 1601 |
25452 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmO = 1602 |
25453 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmP = 1603 |
25454 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmZ = 1604 |
25455 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCG = 1605 |
25456 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGAsm = 1606 |
25457 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGAsmE = 1607 |
25458 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGAsmH = 1608 |
25459 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGAsmHE = 1609 |
25460 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGAsmL = 1610 |
25461 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGAsmLE = 1611 |
25462 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGAsmLH = 1612 |
25463 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGAsmM = 1613 |
25464 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGAsmNE = 1614 |
25465 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGAsmNH = 1615 |
25466 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGAsmNHE = 1616 |
25467 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGAsmNL = 1617 |
25468 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGAsmNLE = 1618 |
25469 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGAsmNLH = 1619 |
25470 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGAsmNM = 1620 |
25471 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGAsmNO = 1621 |
25472 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGAsmNP = 1622 |
25473 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGAsmNZ = 1623 |
25474 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGAsmO = 1624 |
25475 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGAsmP = 1625 |
25476 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGAsmZ = 1626 |
25477 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCGHI = 1627 |
25478 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsm = 1628 |
25479 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmE = 1629 |
25480 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmH = 1630 |
25481 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmHE = 1631 |
25482 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmL = 1632 |
25483 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmLE = 1633 |
25484 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmLH = 1634 |
25485 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmM = 1635 |
25486 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmNE = 1636 |
25487 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmNH = 1637 |
25488 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmNHE = 1638 |
25489 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmNL = 1639 |
25490 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmNLE = 1640 |
25491 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmNLH = 1641 |
25492 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmNM = 1642 |
25493 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmNO = 1643 |
25494 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmNP = 1644 |
25495 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmNZ = 1645 |
25496 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmO = 1646 |
25497 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmP = 1647 |
25498 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmZ = 1648 |
25499 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGR = 1649 |
25500 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGRAsm = 1650 |
25501 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmE = 1651 |
25502 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmH = 1652 |
25503 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmHE = 1653 |
25504 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmL = 1654 |
25505 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmLE = 1655 |
25506 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmLH = 1656 |
25507 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmM = 1657 |
25508 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmNE = 1658 |
25509 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmNH = 1659 |
25510 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmNHE = 1660 |
25511 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmNL = 1661 |
25512 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmNLE = 1662 |
25513 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmNLH = 1663 |
25514 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmNM = 1664 |
25515 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmNO = 1665 |
25516 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmNP = 1666 |
25517 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmNZ = 1667 |
25518 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmO = 1668 |
25519 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmP = 1669 |
25520 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmZ = 1670 |
25521 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHHI = 1671 |
25522 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsm = 1672 |
25523 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmE = 1673 |
25524 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmH = 1674 |
25525 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmHE = 1675 |
25526 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmL = 1676 |
25527 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmLE = 1677 |
25528 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmLH = 1678 |
25529 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmM = 1679 |
25530 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmNE = 1680 |
25531 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmNH = 1681 |
25532 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmNHE = 1682 |
25533 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmNL = 1683 |
25534 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmNLE = 1684 |
25535 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmNLH = 1685 |
25536 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmNM = 1686 |
25537 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmNO = 1687 |
25538 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmNP = 1688 |
25539 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmNZ = 1689 |
25540 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmO = 1690 |
25541 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmP = 1691 |
25542 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmZ = 1692 |
25543 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHI = 1693 |
25544 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsm = 1694 |
25545 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmE = 1695 |
25546 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmH = 1696 |
25547 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmHE = 1697 |
25548 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmL = 1698 |
25549 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmLE = 1699 |
25550 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmLH = 1700 |
25551 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmM = 1701 |
25552 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmNE = 1702 |
25553 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmNH = 1703 |
25554 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmNHE = 1704 |
25555 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmNL = 1705 |
25556 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmNLE = 1706 |
25557 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmNLH = 1707 |
25558 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmNM = 1708 |
25559 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmNO = 1709 |
25560 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmNP = 1710 |
25561 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmNZ = 1711 |
25562 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmO = 1712 |
25563 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmP = 1713 |
25564 | 0 | CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmZ = 1714 |
25565 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCR = 1715 |
25566 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCRAsm = 1716 |
25567 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCRAsmE = 1717 |
25568 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCRAsmH = 1718 |
25569 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCRAsmHE = 1719 |
25570 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCRAsmL = 1720 |
25571 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCRAsmLE = 1721 |
25572 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCRAsmLH = 1722 |
25573 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCRAsmM = 1723 |
25574 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCRAsmNE = 1724 |
25575 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCRAsmNH = 1725 |
25576 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCRAsmNHE = 1726 |
25577 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCRAsmNL = 1727 |
25578 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCRAsmNLE = 1728 |
25579 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCRAsmNLH = 1729 |
25580 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCRAsmNM = 1730 |
25581 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCRAsmNO = 1731 |
25582 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCRAsmNP = 1732 |
25583 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCRAsmNZ = 1733 |
25584 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCRAsmO = 1734 |
25585 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCRAsmP = 1735 |
25586 | 0 | CEFBS_FeatureLoadStoreOnCond, // LOCRAsmZ = 1736 |
25587 | 0 | CEFBS_None, // LPCTL = 1737 |
25588 | 0 | CEFBS_FeatureInterlockedAccess1, // LPD = 1738 |
25589 | 0 | CEFBS_None, // LPDBR = 1739 |
25590 | 0 | CEFBS_None, // LPDFR = 1740 |
25591 | 0 | CEFBS_None, // LPDFR_32 = 1741 |
25592 | 0 | CEFBS_FeatureInterlockedAccess1, // LPDG = 1742 |
25593 | 0 | CEFBS_None, // LPDR = 1743 |
25594 | 0 | CEFBS_None, // LPEBR = 1744 |
25595 | 0 | CEFBS_None, // LPER = 1745 |
25596 | 0 | CEFBS_None, // LPGFR = 1746 |
25597 | 0 | CEFBS_None, // LPGR = 1747 |
25598 | 0 | CEFBS_None, // LPP = 1748 |
25599 | 0 | CEFBS_None, // LPQ = 1749 |
25600 | 0 | CEFBS_None, // LPR = 1750 |
25601 | 0 | CEFBS_None, // LPSW = 1751 |
25602 | 0 | CEFBS_None, // LPSWE = 1752 |
25603 | 0 | CEFBS_FeatureBEAREnhancement, // LPSWEY = 1753 |
25604 | 0 | CEFBS_None, // LPTEA = 1754 |
25605 | 0 | CEFBS_None, // LPXBR = 1755 |
25606 | 0 | CEFBS_None, // LPXR = 1756 |
25607 | 0 | CEFBS_None, // LR = 1757 |
25608 | 0 | CEFBS_None, // LRA = 1758 |
25609 | 0 | CEFBS_None, // LRAG = 1759 |
25610 | 0 | CEFBS_None, // LRAY = 1760 |
25611 | 0 | CEFBS_None, // LRDR = 1761 |
25612 | 0 | CEFBS_None, // LRER = 1762 |
25613 | 0 | CEFBS_None, // LRL = 1763 |
25614 | 0 | CEFBS_None, // LRV = 1764 |
25615 | 0 | CEFBS_None, // LRVG = 1765 |
25616 | 0 | CEFBS_None, // LRVGR = 1766 |
25617 | 0 | CEFBS_None, // LRVH = 1767 |
25618 | 0 | CEFBS_None, // LRVR = 1768 |
25619 | 0 | CEFBS_None, // LSCTL = 1769 |
25620 | 0 | CEFBS_None, // LT = 1770 |
25621 | 0 | CEFBS_None, // LTDBR = 1771 |
25622 | 0 | CEFBS_None, // LTDR = 1772 |
25623 | 0 | CEFBS_None, // LTDTR = 1773 |
25624 | 0 | CEFBS_None, // LTEBR = 1774 |
25625 | 0 | CEFBS_None, // LTER = 1775 |
25626 | 0 | CEFBS_None, // LTG = 1776 |
25627 | 0 | CEFBS_None, // LTGF = 1777 |
25628 | 0 | CEFBS_None, // LTGFR = 1778 |
25629 | 0 | CEFBS_None, // LTGR = 1779 |
25630 | 0 | CEFBS_None, // LTR = 1780 |
25631 | 0 | CEFBS_None, // LTXBR = 1781 |
25632 | 0 | CEFBS_None, // LTXR = 1782 |
25633 | 0 | CEFBS_None, // LTXTR = 1783 |
25634 | 0 | CEFBS_None, // LURA = 1784 |
25635 | 0 | CEFBS_None, // LURAG = 1785 |
25636 | 0 | CEFBS_None, // LXD = 1786 |
25637 | 0 | CEFBS_None, // LXDB = 1787 |
25638 | 0 | CEFBS_None, // LXDBR = 1788 |
25639 | 0 | CEFBS_None, // LXDR = 1789 |
25640 | 0 | CEFBS_None, // LXDTR = 1790 |
25641 | 0 | CEFBS_None, // LXE = 1791 |
25642 | 0 | CEFBS_None, // LXEB = 1792 |
25643 | 0 | CEFBS_None, // LXEBR = 1793 |
25644 | 0 | CEFBS_None, // LXER = 1794 |
25645 | 0 | CEFBS_None, // LXR = 1795 |
25646 | 0 | CEFBS_None, // LY = 1796 |
25647 | 0 | CEFBS_None, // LZDR = 1797 |
25648 | 0 | CEFBS_None, // LZER = 1798 |
25649 | 0 | CEFBS_FeatureLoadAndZeroRightmostByte, // LZRF = 1799 |
25650 | 0 | CEFBS_FeatureLoadAndZeroRightmostByte, // LZRG = 1800 |
25651 | 0 | CEFBS_None, // LZXR = 1801 |
25652 | 0 | CEFBS_None, // M = 1802 |
25653 | 0 | CEFBS_None, // MAD = 1803 |
25654 | 0 | CEFBS_None, // MADB = 1804 |
25655 | 0 | CEFBS_None, // MADBR = 1805 |
25656 | 0 | CEFBS_None, // MADR = 1806 |
25657 | 0 | CEFBS_None, // MAE = 1807 |
25658 | 0 | CEFBS_None, // MAEB = 1808 |
25659 | 0 | CEFBS_None, // MAEBR = 1809 |
25660 | 0 | CEFBS_None, // MAER = 1810 |
25661 | 0 | CEFBS_None, // MAY = 1811 |
25662 | 0 | CEFBS_None, // MAYH = 1812 |
25663 | 0 | CEFBS_None, // MAYHR = 1813 |
25664 | 0 | CEFBS_None, // MAYL = 1814 |
25665 | 0 | CEFBS_None, // MAYLR = 1815 |
25666 | 0 | CEFBS_None, // MAYR = 1816 |
25667 | 0 | CEFBS_None, // MC = 1817 |
25668 | 0 | CEFBS_None, // MD = 1818 |
25669 | 0 | CEFBS_None, // MDB = 1819 |
25670 | 0 | CEFBS_None, // MDBR = 1820 |
25671 | 0 | CEFBS_None, // MDE = 1821 |
25672 | 0 | CEFBS_None, // MDEB = 1822 |
25673 | 0 | CEFBS_None, // MDEBR = 1823 |
25674 | 0 | CEFBS_None, // MDER = 1824 |
25675 | 0 | CEFBS_None, // MDR = 1825 |
25676 | 0 | CEFBS_None, // MDTR = 1826 |
25677 | 0 | CEFBS_FeatureFPExtension, // MDTRA = 1827 |
25678 | 0 | CEFBS_None, // ME = 1828 |
25679 | 0 | CEFBS_None, // MEE = 1829 |
25680 | 0 | CEFBS_None, // MEEB = 1830 |
25681 | 0 | CEFBS_None, // MEEBR = 1831 |
25682 | 0 | CEFBS_None, // MEER = 1832 |
25683 | 0 | CEFBS_None, // MER = 1833 |
25684 | 0 | CEFBS_None, // MFY = 1834 |
25685 | 0 | CEFBS_FeatureMiscellaneousExtensions2, // MG = 1835 |
25686 | 0 | CEFBS_FeatureMiscellaneousExtensions2, // MGH = 1836 |
25687 | 0 | CEFBS_None, // MGHI = 1837 |
25688 | 0 | CEFBS_FeatureMiscellaneousExtensions2, // MGRK = 1838 |
25689 | 0 | CEFBS_None, // MH = 1839 |
25690 | 0 | CEFBS_None, // MHI = 1840 |
25691 | 0 | CEFBS_None, // MHY = 1841 |
25692 | 0 | CEFBS_None, // ML = 1842 |
25693 | 0 | CEFBS_None, // MLG = 1843 |
25694 | 0 | CEFBS_None, // MLGR = 1844 |
25695 | 0 | CEFBS_None, // MLR = 1845 |
25696 | 0 | CEFBS_None, // MP = 1846 |
25697 | 0 | CEFBS_None, // MR = 1847 |
25698 | 0 | CEFBS_None, // MS = 1848 |
25699 | 0 | CEFBS_FeatureMiscellaneousExtensions2, // MSC = 1849 |
25700 | 0 | CEFBS_None, // MSCH = 1850 |
25701 | 0 | CEFBS_None, // MSD = 1851 |
25702 | 0 | CEFBS_None, // MSDB = 1852 |
25703 | 0 | CEFBS_None, // MSDBR = 1853 |
25704 | 0 | CEFBS_None, // MSDR = 1854 |
25705 | 0 | CEFBS_None, // MSE = 1855 |
25706 | 0 | CEFBS_None, // MSEB = 1856 |
25707 | 0 | CEFBS_None, // MSEBR = 1857 |
25708 | 0 | CEFBS_None, // MSER = 1858 |
25709 | 0 | CEFBS_None, // MSFI = 1859 |
25710 | 0 | CEFBS_None, // MSG = 1860 |
25711 | 0 | CEFBS_FeatureMiscellaneousExtensions2, // MSGC = 1861 |
25712 | 0 | CEFBS_None, // MSGF = 1862 |
25713 | 0 | CEFBS_None, // MSGFI = 1863 |
25714 | 0 | CEFBS_None, // MSGFR = 1864 |
25715 | 0 | CEFBS_None, // MSGR = 1865 |
25716 | 0 | CEFBS_FeatureMiscellaneousExtensions2, // MSGRKC = 1866 |
25717 | 0 | CEFBS_None, // MSR = 1867 |
25718 | 0 | CEFBS_FeatureMiscellaneousExtensions2, // MSRKC = 1868 |
25719 | 0 | CEFBS_None, // MSTA = 1869 |
25720 | 0 | CEFBS_None, // MSY = 1870 |
25721 | 0 | CEFBS_None, // MVC = 1871 |
25722 | 0 | CEFBS_None, // MVCDK = 1872 |
25723 | 0 | CEFBS_None, // MVCIN = 1873 |
25724 | 0 | CEFBS_None, // MVCK = 1874 |
25725 | 0 | CEFBS_None, // MVCL = 1875 |
25726 | 0 | CEFBS_None, // MVCLE = 1876 |
25727 | 0 | CEFBS_None, // MVCLU = 1877 |
25728 | 0 | CEFBS_None, // MVCOS = 1878 |
25729 | 0 | CEFBS_None, // MVCP = 1879 |
25730 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // MVCRL = 1880 |
25731 | 0 | CEFBS_None, // MVCS = 1881 |
25732 | 0 | CEFBS_None, // MVCSK = 1882 |
25733 | 0 | CEFBS_None, // MVGHI = 1883 |
25734 | 0 | CEFBS_None, // MVHHI = 1884 |
25735 | 0 | CEFBS_None, // MVHI = 1885 |
25736 | 0 | CEFBS_None, // MVI = 1886 |
25737 | 0 | CEFBS_None, // MVIY = 1887 |
25738 | 0 | CEFBS_None, // MVN = 1888 |
25739 | 0 | CEFBS_None, // MVO = 1889 |
25740 | 0 | CEFBS_None, // MVPG = 1890 |
25741 | 0 | CEFBS_None, // MVST = 1891 |
25742 | 0 | CEFBS_None, // MVZ = 1892 |
25743 | 0 | CEFBS_None, // MXBR = 1893 |
25744 | 0 | CEFBS_None, // MXD = 1894 |
25745 | 0 | CEFBS_None, // MXDB = 1895 |
25746 | 0 | CEFBS_None, // MXDBR = 1896 |
25747 | 0 | CEFBS_None, // MXDR = 1897 |
25748 | 0 | CEFBS_None, // MXR = 1898 |
25749 | 0 | CEFBS_None, // MXTR = 1899 |
25750 | 0 | CEFBS_FeatureFPExtension, // MXTRA = 1900 |
25751 | 0 | CEFBS_None, // MY = 1901 |
25752 | 0 | CEFBS_None, // MYH = 1902 |
25753 | 0 | CEFBS_None, // MYHR = 1903 |
25754 | 0 | CEFBS_None, // MYL = 1904 |
25755 | 0 | CEFBS_None, // MYLR = 1905 |
25756 | 0 | CEFBS_None, // MYR = 1906 |
25757 | 0 | CEFBS_None, // N = 1907 |
25758 | 0 | CEFBS_None, // NC = 1908 |
25759 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // NCGRK = 1909 |
25760 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // NCRK = 1910 |
25761 | 0 | CEFBS_None, // NG = 1911 |
25762 | 0 | CEFBS_None, // NGR = 1912 |
25763 | 0 | CEFBS_FeatureDistinctOps, // NGRK = 1913 |
25764 | 0 | CEFBS_None, // NI = 1914 |
25765 | 0 | CEFBS_FeatureExecutionHint, // NIAI = 1915 |
25766 | 0 | CEFBS_None, // NIHF = 1916 |
25767 | 0 | CEFBS_None, // NIHH = 1917 |
25768 | 0 | CEFBS_None, // NIHL = 1918 |
25769 | 0 | CEFBS_None, // NILF = 1919 |
25770 | 0 | CEFBS_None, // NILH = 1920 |
25771 | 0 | CEFBS_None, // NILL = 1921 |
25772 | 0 | CEFBS_None, // NIY = 1922 |
25773 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // NNGRK = 1923 |
25774 | 0 | CEFBS_FeatureNNPAssist, // NNPA = 1924 |
25775 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // NNRK = 1925 |
25776 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // NOGRK = 1926 |
25777 | 0 | CEFBS_None, // NOP_bare = 1927 |
25778 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // NORK = 1928 |
25779 | 0 | CEFBS_None, // NR = 1929 |
25780 | 0 | CEFBS_FeatureDistinctOps, // NRK = 1930 |
25781 | 0 | CEFBS_FeatureTransactionalExecution, // NTSTG = 1931 |
25782 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // NXGRK = 1932 |
25783 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // NXRK = 1933 |
25784 | 0 | CEFBS_None, // NY = 1934 |
25785 | 0 | CEFBS_None, // O = 1935 |
25786 | 0 | CEFBS_None, // OC = 1936 |
25787 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // OCGRK = 1937 |
25788 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // OCRK = 1938 |
25789 | 0 | CEFBS_None, // OG = 1939 |
25790 | 0 | CEFBS_None, // OGR = 1940 |
25791 | 0 | CEFBS_FeatureDistinctOps, // OGRK = 1941 |
25792 | 0 | CEFBS_None, // OI = 1942 |
25793 | 0 | CEFBS_None, // OIHF = 1943 |
25794 | 0 | CEFBS_None, // OIHH = 1944 |
25795 | 0 | CEFBS_None, // OIHL = 1945 |
25796 | 0 | CEFBS_None, // OILF = 1946 |
25797 | 0 | CEFBS_None, // OILH = 1947 |
25798 | 0 | CEFBS_None, // OILL = 1948 |
25799 | 0 | CEFBS_None, // OIY = 1949 |
25800 | 0 | CEFBS_None, // OR = 1950 |
25801 | 0 | CEFBS_FeatureDistinctOps, // ORK = 1951 |
25802 | 0 | CEFBS_None, // OY = 1952 |
25803 | 0 | CEFBS_None, // PACK = 1953 |
25804 | 0 | CEFBS_None, // PALB = 1954 |
25805 | 0 | CEFBS_None, // PC = 1955 |
25806 | 0 | CEFBS_FeatureMessageSecurityAssist4, // PCC = 1956 |
25807 | 0 | CEFBS_FeatureMessageSecurityAssist3, // PCKMO = 1957 |
25808 | 0 | CEFBS_None, // PFD = 1958 |
25809 | 0 | CEFBS_None, // PFDRL = 1959 |
25810 | 0 | CEFBS_None, // PFMF = 1960 |
25811 | 0 | CEFBS_None, // PFPO = 1961 |
25812 | 0 | CEFBS_None, // PGIN = 1962 |
25813 | 0 | CEFBS_None, // PGOUT = 1963 |
25814 | 0 | CEFBS_None, // PKA = 1964 |
25815 | 0 | CEFBS_None, // PKU = 1965 |
25816 | 0 | CEFBS_None, // PLO = 1966 |
25817 | 0 | CEFBS_FeaturePopulationCount, // POPCNT = 1967 |
25818 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // POPCNTOpt = 1968 |
25819 | 0 | CEFBS_FeatureProcessorAssist, // PPA = 1969 |
25820 | 0 | CEFBS_FeatureMessageSecurityAssist5, // PPNO = 1970 |
25821 | 0 | CEFBS_None, // PR = 1971 |
25822 | 0 | CEFBS_FeatureMessageSecurityAssist7, // PRNO = 1972 |
25823 | 0 | CEFBS_None, // PT = 1973 |
25824 | 0 | CEFBS_None, // PTF = 1974 |
25825 | 0 | CEFBS_None, // PTFF = 1975 |
25826 | 0 | CEFBS_None, // PTI = 1976 |
25827 | 0 | CEFBS_None, // PTLB = 1977 |
25828 | 0 | CEFBS_None, // QADTR = 1978 |
25829 | 0 | CEFBS_None, // QAXTR = 1979 |
25830 | 0 | CEFBS_None, // QCTRI = 1980 |
25831 | 0 | CEFBS_FeatureProcessorActivityInstrumentation, // QPACI = 1981 |
25832 | 0 | CEFBS_None, // QSI = 1982 |
25833 | 0 | CEFBS_None, // RCHP = 1983 |
25834 | 0 | CEFBS_FeatureResetDATProtection, // RDP = 1984 |
25835 | 0 | CEFBS_FeatureResetDATProtection, // RDPOpt = 1985 |
25836 | 0 | CEFBS_None, // RISBG = 1986 |
25837 | 0 | CEFBS_None, // RISBG32 = 1987 |
25838 | 0 | CEFBS_FeatureMiscellaneousExtensions, // RISBGN = 1988 |
25839 | 0 | CEFBS_FeatureHighWord, // RISBHG = 1989 |
25840 | 0 | CEFBS_FeatureHighWord, // RISBLG = 1990 |
25841 | 0 | CEFBS_None, // RLL = 1991 |
25842 | 0 | CEFBS_None, // RLLG = 1992 |
25843 | 0 | CEFBS_None, // RNSBG = 1993 |
25844 | 0 | CEFBS_None, // ROSBG = 1994 |
25845 | 0 | CEFBS_None, // RP = 1995 |
25846 | 0 | CEFBS_None, // RRBE = 1996 |
25847 | 0 | CEFBS_FeatureResetReferenceBitsMultiple, // RRBM = 1997 |
25848 | 0 | CEFBS_None, // RRDTR = 1998 |
25849 | 0 | CEFBS_None, // RRXTR = 1999 |
25850 | 0 | CEFBS_None, // RSCH = 2000 |
25851 | 0 | CEFBS_None, // RXSBG = 2001 |
25852 | 0 | CEFBS_None, // S = 2002 |
25853 | 0 | CEFBS_None, // SAC = 2003 |
25854 | 0 | CEFBS_None, // SACF = 2004 |
25855 | 0 | CEFBS_None, // SAL = 2005 |
25856 | 0 | CEFBS_None, // SAM24 = 2006 |
25857 | 0 | CEFBS_None, // SAM31 = 2007 |
25858 | 0 | CEFBS_None, // SAM64 = 2008 |
25859 | 0 | CEFBS_None, // SAR = 2009 |
25860 | 0 | CEFBS_None, // SCCTR = 2010 |
25861 | 0 | CEFBS_None, // SCHM = 2011 |
25862 | 0 | CEFBS_None, // SCK = 2012 |
25863 | 0 | CEFBS_None, // SCKC = 2013 |
25864 | 0 | CEFBS_None, // SCKPF = 2014 |
25865 | 0 | CEFBS_None, // SD = 2015 |
25866 | 0 | CEFBS_None, // SDB = 2016 |
25867 | 0 | CEFBS_None, // SDBR = 2017 |
25868 | 0 | CEFBS_None, // SDR = 2018 |
25869 | 0 | CEFBS_None, // SDTR = 2019 |
25870 | 0 | CEFBS_FeatureFPExtension, // SDTRA = 2020 |
25871 | 0 | CEFBS_None, // SE = 2021 |
25872 | 0 | CEFBS_None, // SEB = 2022 |
25873 | 0 | CEFBS_None, // SEBR = 2023 |
25874 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELFHR = 2024 |
25875 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsm = 2025 |
25876 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmE = 2026 |
25877 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmH = 2027 |
25878 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmHE = 2028 |
25879 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmL = 2029 |
25880 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmLE = 2030 |
25881 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmLH = 2031 |
25882 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmM = 2032 |
25883 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmNE = 2033 |
25884 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmNH = 2034 |
25885 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmNHE = 2035 |
25886 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmNL = 2036 |
25887 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmNLE = 2037 |
25888 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmNLH = 2038 |
25889 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmNM = 2039 |
25890 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmNO = 2040 |
25891 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmNP = 2041 |
25892 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmNZ = 2042 |
25893 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmO = 2043 |
25894 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmP = 2044 |
25895 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmZ = 2045 |
25896 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELGR = 2046 |
25897 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsm = 2047 |
25898 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmE = 2048 |
25899 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmH = 2049 |
25900 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmHE = 2050 |
25901 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmL = 2051 |
25902 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmLE = 2052 |
25903 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmLH = 2053 |
25904 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmM = 2054 |
25905 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmNE = 2055 |
25906 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmNH = 2056 |
25907 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmNHE = 2057 |
25908 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmNL = 2058 |
25909 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmNLE = 2059 |
25910 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmNLH = 2060 |
25911 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmNM = 2061 |
25912 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmNO = 2062 |
25913 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmNP = 2063 |
25914 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmNZ = 2064 |
25915 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmO = 2065 |
25916 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmP = 2066 |
25917 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmZ = 2067 |
25918 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELR = 2068 |
25919 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELRAsm = 2069 |
25920 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmE = 2070 |
25921 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmH = 2071 |
25922 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmHE = 2072 |
25923 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmL = 2073 |
25924 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmLE = 2074 |
25925 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmLH = 2075 |
25926 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmM = 2076 |
25927 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmNE = 2077 |
25928 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmNH = 2078 |
25929 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmNHE = 2079 |
25930 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmNL = 2080 |
25931 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmNLE = 2081 |
25932 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmNLH = 2082 |
25933 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmNM = 2083 |
25934 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmNO = 2084 |
25935 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmNP = 2085 |
25936 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmNZ = 2086 |
25937 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmO = 2087 |
25938 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmP = 2088 |
25939 | 0 | CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmZ = 2089 |
25940 | 0 | CEFBS_None, // SER = 2090 |
25941 | 0 | CEFBS_None, // SFASR = 2091 |
25942 | 0 | CEFBS_None, // SFPC = 2092 |
25943 | 0 | CEFBS_None, // SG = 2093 |
25944 | 0 | CEFBS_None, // SGF = 2094 |
25945 | 0 | CEFBS_None, // SGFR = 2095 |
25946 | 0 | CEFBS_FeatureMiscellaneousExtensions2, // SGH = 2096 |
25947 | 0 | CEFBS_None, // SGR = 2097 |
25948 | 0 | CEFBS_FeatureDistinctOps, // SGRK = 2098 |
25949 | 0 | CEFBS_None, // SH = 2099 |
25950 | 0 | CEFBS_FeatureHighWord, // SHHHR = 2100 |
25951 | 0 | CEFBS_FeatureHighWord, // SHHLR = 2101 |
25952 | 0 | CEFBS_None, // SHY = 2102 |
25953 | 0 | CEFBS_None, // SIE = 2103 |
25954 | 0 | CEFBS_None, // SIGA = 2104 |
25955 | 0 | CEFBS_None, // SIGP = 2105 |
25956 | 0 | CEFBS_None, // SL = 2106 |
25957 | 0 | CEFBS_None, // SLA = 2107 |
25958 | 0 | CEFBS_None, // SLAG = 2108 |
25959 | 0 | CEFBS_FeatureDistinctOps, // SLAK = 2109 |
25960 | 0 | CEFBS_None, // SLB = 2110 |
25961 | 0 | CEFBS_None, // SLBG = 2111 |
25962 | 0 | CEFBS_None, // SLBGR = 2112 |
25963 | 0 | CEFBS_None, // SLBR = 2113 |
25964 | 0 | CEFBS_None, // SLDA = 2114 |
25965 | 0 | CEFBS_None, // SLDL = 2115 |
25966 | 0 | CEFBS_None, // SLDT = 2116 |
25967 | 0 | CEFBS_None, // SLFI = 2117 |
25968 | 0 | CEFBS_None, // SLG = 2118 |
25969 | 0 | CEFBS_None, // SLGF = 2119 |
25970 | 0 | CEFBS_None, // SLGFI = 2120 |
25971 | 0 | CEFBS_None, // SLGFR = 2121 |
25972 | 0 | CEFBS_None, // SLGR = 2122 |
25973 | 0 | CEFBS_FeatureDistinctOps, // SLGRK = 2123 |
25974 | 0 | CEFBS_FeatureHighWord, // SLHHHR = 2124 |
25975 | 0 | CEFBS_FeatureHighWord, // SLHHLR = 2125 |
25976 | 0 | CEFBS_None, // SLL = 2126 |
25977 | 0 | CEFBS_None, // SLLG = 2127 |
25978 | 0 | CEFBS_FeatureDistinctOps, // SLLK = 2128 |
25979 | 0 | CEFBS_None, // SLR = 2129 |
25980 | 0 | CEFBS_FeatureDistinctOps, // SLRK = 2130 |
25981 | 0 | CEFBS_None, // SLXT = 2131 |
25982 | 0 | CEFBS_None, // SLY = 2132 |
25983 | 0 | CEFBS_FeatureEnhancedSort, // SORTL = 2133 |
25984 | 0 | CEFBS_None, // SP = 2134 |
25985 | 0 | CEFBS_None, // SPCTR = 2135 |
25986 | 0 | CEFBS_None, // SPKA = 2136 |
25987 | 0 | CEFBS_None, // SPM = 2137 |
25988 | 0 | CEFBS_None, // SPT = 2138 |
25989 | 0 | CEFBS_None, // SPX = 2139 |
25990 | 0 | CEFBS_None, // SQD = 2140 |
25991 | 0 | CEFBS_None, // SQDB = 2141 |
25992 | 0 | CEFBS_None, // SQDBR = 2142 |
25993 | 0 | CEFBS_None, // SQDR = 2143 |
25994 | 0 | CEFBS_None, // SQE = 2144 |
25995 | 0 | CEFBS_None, // SQEB = 2145 |
25996 | 0 | CEFBS_None, // SQEBR = 2146 |
25997 | 0 | CEFBS_None, // SQER = 2147 |
25998 | 0 | CEFBS_None, // SQXBR = 2148 |
25999 | 0 | CEFBS_None, // SQXR = 2149 |
26000 | 0 | CEFBS_None, // SR = 2150 |
26001 | 0 | CEFBS_None, // SRA = 2151 |
26002 | 0 | CEFBS_None, // SRAG = 2152 |
26003 | 0 | CEFBS_FeatureDistinctOps, // SRAK = 2153 |
26004 | 0 | CEFBS_None, // SRDA = 2154 |
26005 | 0 | CEFBS_None, // SRDL = 2155 |
26006 | 0 | CEFBS_None, // SRDT = 2156 |
26007 | 0 | CEFBS_FeatureDistinctOps, // SRK = 2157 |
26008 | 0 | CEFBS_None, // SRL = 2158 |
26009 | 0 | CEFBS_None, // SRLG = 2159 |
26010 | 0 | CEFBS_FeatureDistinctOps, // SRLK = 2160 |
26011 | 0 | CEFBS_None, // SRNM = 2161 |
26012 | 0 | CEFBS_FeatureFPExtension, // SRNMB = 2162 |
26013 | 0 | CEFBS_None, // SRNMT = 2163 |
26014 | 0 | CEFBS_None, // SRP = 2164 |
26015 | 0 | CEFBS_None, // SRST = 2165 |
26016 | 0 | CEFBS_None, // SRSTU = 2166 |
26017 | 0 | CEFBS_None, // SRXT = 2167 |
26018 | 0 | CEFBS_None, // SSAIR = 2168 |
26019 | 0 | CEFBS_None, // SSAR = 2169 |
26020 | 0 | CEFBS_None, // SSCH = 2170 |
26021 | 0 | CEFBS_None, // SSKE = 2171 |
26022 | 0 | CEFBS_None, // SSKEOpt = 2172 |
26023 | 0 | CEFBS_None, // SSM = 2173 |
26024 | 0 | CEFBS_None, // ST = 2174 |
26025 | 0 | CEFBS_None, // STAM = 2175 |
26026 | 0 | CEFBS_None, // STAMY = 2176 |
26027 | 0 | CEFBS_None, // STAP = 2177 |
26028 | 0 | CEFBS_FeatureBEAREnhancement, // STBEAR = 2178 |
26029 | 0 | CEFBS_None, // STC = 2179 |
26030 | 0 | CEFBS_FeatureHighWord, // STCH = 2180 |
26031 | 0 | CEFBS_None, // STCK = 2181 |
26032 | 0 | CEFBS_None, // STCKC = 2182 |
26033 | 0 | CEFBS_None, // STCKE = 2183 |
26034 | 0 | CEFBS_None, // STCKF = 2184 |
26035 | 0 | CEFBS_None, // STCM = 2185 |
26036 | 0 | CEFBS_None, // STCMH = 2186 |
26037 | 0 | CEFBS_None, // STCMY = 2187 |
26038 | 0 | CEFBS_None, // STCPS = 2188 |
26039 | 0 | CEFBS_None, // STCRW = 2189 |
26040 | 0 | CEFBS_None, // STCTG = 2190 |
26041 | 0 | CEFBS_None, // STCTL = 2191 |
26042 | 0 | CEFBS_None, // STCY = 2192 |
26043 | 0 | CEFBS_None, // STD = 2193 |
26044 | 0 | CEFBS_None, // STDY = 2194 |
26045 | 0 | CEFBS_None, // STE = 2195 |
26046 | 0 | CEFBS_None, // STEY = 2196 |
26047 | 0 | CEFBS_FeatureHighWord, // STFH = 2197 |
26048 | 0 | CEFBS_None, // STFL = 2198 |
26049 | 0 | CEFBS_None, // STFLE = 2199 |
26050 | 0 | CEFBS_None, // STFPC = 2200 |
26051 | 0 | CEFBS_None, // STG = 2201 |
26052 | 0 | CEFBS_None, // STGRL = 2202 |
26053 | 0 | CEFBS_FeatureGuardedStorage, // STGSC = 2203 |
26054 | 0 | CEFBS_None, // STH = 2204 |
26055 | 0 | CEFBS_FeatureHighWord, // STHH = 2205 |
26056 | 0 | CEFBS_None, // STHRL = 2206 |
26057 | 0 | CEFBS_None, // STHY = 2207 |
26058 | 0 | CEFBS_None, // STIDP = 2208 |
26059 | 0 | CEFBS_None, // STM = 2209 |
26060 | 0 | CEFBS_None, // STMG = 2210 |
26061 | 0 | CEFBS_None, // STMH = 2211 |
26062 | 0 | CEFBS_None, // STMY = 2212 |
26063 | 0 | CEFBS_None, // STNSM = 2213 |
26064 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOC = 2214 |
26065 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCAsm = 2215 |
26066 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCAsmE = 2216 |
26067 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCAsmH = 2217 |
26068 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCAsmHE = 2218 |
26069 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCAsmL = 2219 |
26070 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCAsmLE = 2220 |
26071 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCAsmLH = 2221 |
26072 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCAsmM = 2222 |
26073 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCAsmNE = 2223 |
26074 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCAsmNH = 2224 |
26075 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCAsmNHE = 2225 |
26076 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCAsmNL = 2226 |
26077 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCAsmNLE = 2227 |
26078 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCAsmNLH = 2228 |
26079 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCAsmNM = 2229 |
26080 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCAsmNO = 2230 |
26081 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCAsmNP = 2231 |
26082 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCAsmNZ = 2232 |
26083 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCAsmO = 2233 |
26084 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCAsmP = 2234 |
26085 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCAsmZ = 2235 |
26086 | 0 | CEFBS_FeatureLoadStoreOnCond2, // STOCFH = 2236 |
26087 | 0 | CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsm = 2237 |
26088 | 0 | CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmE = 2238 |
26089 | 0 | CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmH = 2239 |
26090 | 0 | CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmHE = 2240 |
26091 | 0 | CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmL = 2241 |
26092 | 0 | CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmLE = 2242 |
26093 | 0 | CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmLH = 2243 |
26094 | 0 | CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmM = 2244 |
26095 | 0 | CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmNE = 2245 |
26096 | 0 | CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmNH = 2246 |
26097 | 0 | CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmNHE = 2247 |
26098 | 0 | CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmNL = 2248 |
26099 | 0 | CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmNLE = 2249 |
26100 | 0 | CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmNLH = 2250 |
26101 | 0 | CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmNM = 2251 |
26102 | 0 | CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmNO = 2252 |
26103 | 0 | CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmNP = 2253 |
26104 | 0 | CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmNZ = 2254 |
26105 | 0 | CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmO = 2255 |
26106 | 0 | CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmP = 2256 |
26107 | 0 | CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmZ = 2257 |
26108 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCG = 2258 |
26109 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCGAsm = 2259 |
26110 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCGAsmE = 2260 |
26111 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCGAsmH = 2261 |
26112 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCGAsmHE = 2262 |
26113 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCGAsmL = 2263 |
26114 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCGAsmLE = 2264 |
26115 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCGAsmLH = 2265 |
26116 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCGAsmM = 2266 |
26117 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCGAsmNE = 2267 |
26118 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCGAsmNH = 2268 |
26119 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCGAsmNHE = 2269 |
26120 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCGAsmNL = 2270 |
26121 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCGAsmNLE = 2271 |
26122 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCGAsmNLH = 2272 |
26123 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCGAsmNM = 2273 |
26124 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCGAsmNO = 2274 |
26125 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCGAsmNP = 2275 |
26126 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCGAsmNZ = 2276 |
26127 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCGAsmO = 2277 |
26128 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCGAsmP = 2278 |
26129 | 0 | CEFBS_FeatureLoadStoreOnCond, // STOCGAsmZ = 2279 |
26130 | 0 | CEFBS_None, // STOSM = 2280 |
26131 | 0 | CEFBS_None, // STPQ = 2281 |
26132 | 0 | CEFBS_None, // STPT = 2282 |
26133 | 0 | CEFBS_None, // STPX = 2283 |
26134 | 0 | CEFBS_None, // STRAG = 2284 |
26135 | 0 | CEFBS_None, // STRL = 2285 |
26136 | 0 | CEFBS_None, // STRV = 2286 |
26137 | 0 | CEFBS_None, // STRVG = 2287 |
26138 | 0 | CEFBS_None, // STRVH = 2288 |
26139 | 0 | CEFBS_None, // STSCH = 2289 |
26140 | 0 | CEFBS_None, // STSI = 2290 |
26141 | 0 | CEFBS_None, // STURA = 2291 |
26142 | 0 | CEFBS_None, // STURG = 2292 |
26143 | 0 | CEFBS_None, // STY = 2293 |
26144 | 0 | CEFBS_None, // SU = 2294 |
26145 | 0 | CEFBS_None, // SUR = 2295 |
26146 | 0 | CEFBS_None, // SVC = 2296 |
26147 | 0 | CEFBS_None, // SW = 2297 |
26148 | 0 | CEFBS_None, // SWR = 2298 |
26149 | 0 | CEFBS_None, // SXBR = 2299 |
26150 | 0 | CEFBS_None, // SXR = 2300 |
26151 | 0 | CEFBS_None, // SXTR = 2301 |
26152 | 0 | CEFBS_FeatureFPExtension, // SXTRA = 2302 |
26153 | 0 | CEFBS_None, // SY = 2303 |
26154 | 0 | CEFBS_FeatureTransactionalExecution, // TABORT = 2304 |
26155 | 0 | CEFBS_None, // TAM = 2305 |
26156 | 0 | CEFBS_None, // TAR = 2306 |
26157 | 0 | CEFBS_None, // TB = 2307 |
26158 | 0 | CEFBS_None, // TBDR = 2308 |
26159 | 0 | CEFBS_None, // TBEDR = 2309 |
26160 | 0 | CEFBS_FeatureTransactionalExecution, // TBEGIN = 2310 |
26161 | 0 | CEFBS_FeatureTransactionalExecution, // TBEGINC = 2311 |
26162 | 0 | CEFBS_None, // TCDB = 2312 |
26163 | 0 | CEFBS_None, // TCEB = 2313 |
26164 | 0 | CEFBS_None, // TCXB = 2314 |
26165 | 0 | CEFBS_None, // TDCDT = 2315 |
26166 | 0 | CEFBS_None, // TDCET = 2316 |
26167 | 0 | CEFBS_None, // TDCXT = 2317 |
26168 | 0 | CEFBS_None, // TDGDT = 2318 |
26169 | 0 | CEFBS_None, // TDGET = 2319 |
26170 | 0 | CEFBS_None, // TDGXT = 2320 |
26171 | 0 | CEFBS_FeatureTransactionalExecution, // TEND = 2321 |
26172 | 0 | CEFBS_None, // THDER = 2322 |
26173 | 0 | CEFBS_None, // THDR = 2323 |
26174 | 0 | CEFBS_None, // TM = 2324 |
26175 | 0 | CEFBS_None, // TMHH = 2325 |
26176 | 0 | CEFBS_None, // TMHL = 2326 |
26177 | 0 | CEFBS_None, // TMLH = 2327 |
26178 | 0 | CEFBS_None, // TMLL = 2328 |
26179 | 0 | CEFBS_None, // TMY = 2329 |
26180 | 0 | CEFBS_None, // TP = 2330 |
26181 | 0 | CEFBS_None, // TPI = 2331 |
26182 | 0 | CEFBS_None, // TPROT = 2332 |
26183 | 0 | CEFBS_None, // TR = 2333 |
26184 | 0 | CEFBS_None, // TRACE = 2334 |
26185 | 0 | CEFBS_None, // TRACG = 2335 |
26186 | 0 | CEFBS_None, // TRAP2 = 2336 |
26187 | 0 | CEFBS_None, // TRAP4 = 2337 |
26188 | 0 | CEFBS_None, // TRE = 2338 |
26189 | 0 | CEFBS_None, // TROO = 2339 |
26190 | 0 | CEFBS_None, // TROOOpt = 2340 |
26191 | 0 | CEFBS_None, // TROT = 2341 |
26192 | 0 | CEFBS_None, // TROTOpt = 2342 |
26193 | 0 | CEFBS_None, // TRT = 2343 |
26194 | 0 | CEFBS_None, // TRTE = 2344 |
26195 | 0 | CEFBS_None, // TRTEOpt = 2345 |
26196 | 0 | CEFBS_None, // TRTO = 2346 |
26197 | 0 | CEFBS_None, // TRTOOpt = 2347 |
26198 | 0 | CEFBS_None, // TRTR = 2348 |
26199 | 0 | CEFBS_None, // TRTRE = 2349 |
26200 | 0 | CEFBS_None, // TRTREOpt = 2350 |
26201 | 0 | CEFBS_None, // TRTT = 2351 |
26202 | 0 | CEFBS_None, // TRTTOpt = 2352 |
26203 | 0 | CEFBS_None, // TS = 2353 |
26204 | 0 | CEFBS_None, // TSCH = 2354 |
26205 | 0 | CEFBS_None, // UNPK = 2355 |
26206 | 0 | CEFBS_None, // UNPKA = 2356 |
26207 | 0 | CEFBS_None, // UNPKU = 2357 |
26208 | 0 | CEFBS_None, // UPT = 2358 |
26209 | 0 | CEFBS_FeatureVector, // VA = 2359 |
26210 | 0 | CEFBS_FeatureVector, // VAB = 2360 |
26211 | 0 | CEFBS_FeatureVector, // VAC = 2361 |
26212 | 0 | CEFBS_FeatureVector, // VACC = 2362 |
26213 | 0 | CEFBS_FeatureVector, // VACCB = 2363 |
26214 | 0 | CEFBS_FeatureVector, // VACCC = 2364 |
26215 | 0 | CEFBS_FeatureVector, // VACCCQ = 2365 |
26216 | 0 | CEFBS_FeatureVector, // VACCF = 2366 |
26217 | 0 | CEFBS_FeatureVector, // VACCG = 2367 |
26218 | 0 | CEFBS_FeatureVector, // VACCH = 2368 |
26219 | 0 | CEFBS_FeatureVector, // VACCQ = 2369 |
26220 | 0 | CEFBS_FeatureVector, // VACQ = 2370 |
26221 | 0 | CEFBS_FeatureVector, // VAF = 2371 |
26222 | 0 | CEFBS_FeatureVector, // VAG = 2372 |
26223 | 0 | CEFBS_FeatureVector, // VAH = 2373 |
26224 | 0 | CEFBS_FeatureVectorPackedDecimal, // VAP = 2374 |
26225 | 0 | CEFBS_FeatureVector, // VAQ = 2375 |
26226 | 0 | CEFBS_FeatureVector, // VAVG = 2376 |
26227 | 0 | CEFBS_FeatureVector, // VAVGB = 2377 |
26228 | 0 | CEFBS_FeatureVector, // VAVGF = 2378 |
26229 | 0 | CEFBS_FeatureVector, // VAVGG = 2379 |
26230 | 0 | CEFBS_FeatureVector, // VAVGH = 2380 |
26231 | 0 | CEFBS_FeatureVector, // VAVGL = 2381 |
26232 | 0 | CEFBS_FeatureVector, // VAVGLB = 2382 |
26233 | 0 | CEFBS_FeatureVector, // VAVGLF = 2383 |
26234 | 0 | CEFBS_FeatureVector, // VAVGLG = 2384 |
26235 | 0 | CEFBS_FeatureVector, // VAVGLH = 2385 |
26236 | 0 | CEFBS_FeatureVectorEnhancements1, // VBPERM = 2386 |
26237 | 0 | CEFBS_FeatureVector, // VCDG = 2387 |
26238 | 0 | CEFBS_FeatureVector, // VCDGB = 2388 |
26239 | 0 | CEFBS_FeatureVector, // VCDLG = 2389 |
26240 | 0 | CEFBS_FeatureVector, // VCDLGB = 2390 |
26241 | 0 | CEFBS_FeatureVectorEnhancements2, // VCEFB = 2391 |
26242 | 0 | CEFBS_FeatureVectorEnhancements2, // VCELFB = 2392 |
26243 | 0 | CEFBS_FeatureVector, // VCEQ = 2393 |
26244 | 0 | CEFBS_FeatureVector, // VCEQB = 2394 |
26245 | 0 | CEFBS_FeatureVector, // VCEQBS = 2395 |
26246 | 0 | CEFBS_FeatureVector, // VCEQF = 2396 |
26247 | 0 | CEFBS_FeatureVector, // VCEQFS = 2397 |
26248 | 0 | CEFBS_FeatureVector, // VCEQG = 2398 |
26249 | 0 | CEFBS_FeatureVector, // VCEQGS = 2399 |
26250 | 0 | CEFBS_FeatureVector, // VCEQH = 2400 |
26251 | 0 | CEFBS_FeatureVector, // VCEQHS = 2401 |
26252 | 0 | CEFBS_FeatureVectorEnhancements2, // VCFEB = 2402 |
26253 | 0 | CEFBS_FeatureVector_FeatureNNPAssist, // VCFN = 2403 |
26254 | 0 | CEFBS_FeatureVectorEnhancements2, // VCFPL = 2404 |
26255 | 0 | CEFBS_FeatureVectorEnhancements2, // VCFPS = 2405 |
26256 | 0 | CEFBS_FeatureVector, // VCGD = 2406 |
26257 | 0 | CEFBS_FeatureVector, // VCGDB = 2407 |
26258 | 0 | CEFBS_FeatureVector, // VCH = 2408 |
26259 | 0 | CEFBS_FeatureVector, // VCHB = 2409 |
26260 | 0 | CEFBS_FeatureVector, // VCHBS = 2410 |
26261 | 0 | CEFBS_FeatureVector, // VCHF = 2411 |
26262 | 0 | CEFBS_FeatureVector, // VCHFS = 2412 |
26263 | 0 | CEFBS_FeatureVector, // VCHG = 2413 |
26264 | 0 | CEFBS_FeatureVector, // VCHGS = 2414 |
26265 | 0 | CEFBS_FeatureVector, // VCHH = 2415 |
26266 | 0 | CEFBS_FeatureVector, // VCHHS = 2416 |
26267 | 0 | CEFBS_FeatureVector, // VCHL = 2417 |
26268 | 0 | CEFBS_FeatureVector, // VCHLB = 2418 |
26269 | 0 | CEFBS_FeatureVector, // VCHLBS = 2419 |
26270 | 0 | CEFBS_FeatureVector, // VCHLF = 2420 |
26271 | 0 | CEFBS_FeatureVector, // VCHLFS = 2421 |
26272 | 0 | CEFBS_FeatureVector, // VCHLG = 2422 |
26273 | 0 | CEFBS_FeatureVector, // VCHLGS = 2423 |
26274 | 0 | CEFBS_FeatureVector, // VCHLH = 2424 |
26275 | 0 | CEFBS_FeatureVector, // VCHLHS = 2425 |
26276 | 0 | CEFBS_FeatureVector, // VCKSM = 2426 |
26277 | 0 | CEFBS_FeatureVectorEnhancements2, // VCLFEB = 2427 |
26278 | 0 | CEFBS_FeatureVector_FeatureNNPAssist, // VCLFNH = 2428 |
26279 | 0 | CEFBS_FeatureVector_FeatureNNPAssist, // VCLFNL = 2429 |
26280 | 0 | CEFBS_FeatureVectorEnhancements2, // VCLFP = 2430 |
26281 | 0 | CEFBS_FeatureVector, // VCLGD = 2431 |
26282 | 0 | CEFBS_FeatureVector, // VCLGDB = 2432 |
26283 | 0 | CEFBS_FeatureVector, // VCLZ = 2433 |
26284 | 0 | CEFBS_FeatureVector, // VCLZB = 2434 |
26285 | 0 | CEFBS_FeatureVectorPackedDecimalEnhancement2, // VCLZDP = 2435 |
26286 | 0 | CEFBS_FeatureVector, // VCLZF = 2436 |
26287 | 0 | CEFBS_FeatureVector, // VCLZG = 2437 |
26288 | 0 | CEFBS_FeatureVector, // VCLZH = 2438 |
26289 | 0 | CEFBS_FeatureVector_FeatureNNPAssist, // VCNF = 2439 |
26290 | 0 | CEFBS_FeatureVectorPackedDecimal, // VCP = 2440 |
26291 | 0 | CEFBS_FeatureVector_FeatureNNPAssist, // VCRNF = 2441 |
26292 | 0 | CEFBS_FeatureVectorEnhancements2, // VCSFP = 2442 |
26293 | 0 | CEFBS_FeatureVectorPackedDecimalEnhancement2, // VCSPH = 2443 |
26294 | 0 | CEFBS_FeatureVector, // VCTZ = 2444 |
26295 | 0 | CEFBS_FeatureVector, // VCTZB = 2445 |
26296 | 0 | CEFBS_FeatureVector, // VCTZF = 2446 |
26297 | 0 | CEFBS_FeatureVector, // VCTZG = 2447 |
26298 | 0 | CEFBS_FeatureVector, // VCTZH = 2448 |
26299 | 0 | CEFBS_FeatureVectorPackedDecimal, // VCVB = 2449 |
26300 | 0 | CEFBS_FeatureVectorPackedDecimal, // VCVBG = 2450 |
26301 | 0 | CEFBS_FeatureVectorPackedDecimalEnhancement, // VCVBGOpt = 2451 |
26302 | 0 | CEFBS_FeatureVectorPackedDecimalEnhancement, // VCVBOpt = 2452 |
26303 | 0 | CEFBS_FeatureVectorPackedDecimal, // VCVD = 2453 |
26304 | 0 | CEFBS_FeatureVectorPackedDecimal, // VCVDG = 2454 |
26305 | 0 | CEFBS_FeatureVectorPackedDecimal, // VDP = 2455 |
26306 | 0 | CEFBS_FeatureVector, // VEC = 2456 |
26307 | 0 | CEFBS_FeatureVector, // VECB = 2457 |
26308 | 0 | CEFBS_FeatureVector, // VECF = 2458 |
26309 | 0 | CEFBS_FeatureVector, // VECG = 2459 |
26310 | 0 | CEFBS_FeatureVector, // VECH = 2460 |
26311 | 0 | CEFBS_FeatureVector, // VECL = 2461 |
26312 | 0 | CEFBS_FeatureVector, // VECLB = 2462 |
26313 | 0 | CEFBS_FeatureVector, // VECLF = 2463 |
26314 | 0 | CEFBS_FeatureVector, // VECLG = 2464 |
26315 | 0 | CEFBS_FeatureVector, // VECLH = 2465 |
26316 | 0 | CEFBS_FeatureVector, // VERIM = 2466 |
26317 | 0 | CEFBS_FeatureVector, // VERIMB = 2467 |
26318 | 0 | CEFBS_FeatureVector, // VERIMF = 2468 |
26319 | 0 | CEFBS_FeatureVector, // VERIMG = 2469 |
26320 | 0 | CEFBS_FeatureVector, // VERIMH = 2470 |
26321 | 0 | CEFBS_FeatureVector, // VERLL = 2471 |
26322 | 0 | CEFBS_FeatureVector, // VERLLB = 2472 |
26323 | 0 | CEFBS_FeatureVector, // VERLLF = 2473 |
26324 | 0 | CEFBS_FeatureVector, // VERLLG = 2474 |
26325 | 0 | CEFBS_FeatureVector, // VERLLH = 2475 |
26326 | 0 | CEFBS_FeatureVector, // VERLLV = 2476 |
26327 | 0 | CEFBS_FeatureVector, // VERLLVB = 2477 |
26328 | 0 | CEFBS_FeatureVector, // VERLLVF = 2478 |
26329 | 0 | CEFBS_FeatureVector, // VERLLVG = 2479 |
26330 | 0 | CEFBS_FeatureVector, // VERLLVH = 2480 |
26331 | 0 | CEFBS_FeatureVector, // VESL = 2481 |
26332 | 0 | CEFBS_FeatureVector, // VESLB = 2482 |
26333 | 0 | CEFBS_FeatureVector, // VESLF = 2483 |
26334 | 0 | CEFBS_FeatureVector, // VESLG = 2484 |
26335 | 0 | CEFBS_FeatureVector, // VESLH = 2485 |
26336 | 0 | CEFBS_FeatureVector, // VESLV = 2486 |
26337 | 0 | CEFBS_FeatureVector, // VESLVB = 2487 |
26338 | 0 | CEFBS_FeatureVector, // VESLVF = 2488 |
26339 | 0 | CEFBS_FeatureVector, // VESLVG = 2489 |
26340 | 0 | CEFBS_FeatureVector, // VESLVH = 2490 |
26341 | 0 | CEFBS_FeatureVector, // VESRA = 2491 |
26342 | 0 | CEFBS_FeatureVector, // VESRAB = 2492 |
26343 | 0 | CEFBS_FeatureVector, // VESRAF = 2493 |
26344 | 0 | CEFBS_FeatureVector, // VESRAG = 2494 |
26345 | 0 | CEFBS_FeatureVector, // VESRAH = 2495 |
26346 | 0 | CEFBS_FeatureVector, // VESRAV = 2496 |
26347 | 0 | CEFBS_FeatureVector, // VESRAVB = 2497 |
26348 | 0 | CEFBS_FeatureVector, // VESRAVF = 2498 |
26349 | 0 | CEFBS_FeatureVector, // VESRAVG = 2499 |
26350 | 0 | CEFBS_FeatureVector, // VESRAVH = 2500 |
26351 | 0 | CEFBS_FeatureVector, // VESRL = 2501 |
26352 | 0 | CEFBS_FeatureVector, // VESRLB = 2502 |
26353 | 0 | CEFBS_FeatureVector, // VESRLF = 2503 |
26354 | 0 | CEFBS_FeatureVector, // VESRLG = 2504 |
26355 | 0 | CEFBS_FeatureVector, // VESRLH = 2505 |
26356 | 0 | CEFBS_FeatureVector, // VESRLV = 2506 |
26357 | 0 | CEFBS_FeatureVector, // VESRLVB = 2507 |
26358 | 0 | CEFBS_FeatureVector, // VESRLVF = 2508 |
26359 | 0 | CEFBS_FeatureVector, // VESRLVG = 2509 |
26360 | 0 | CEFBS_FeatureVector, // VESRLVH = 2510 |
26361 | 0 | CEFBS_FeatureVector, // VFA = 2511 |
26362 | 0 | CEFBS_FeatureVector, // VFADB = 2512 |
26363 | 0 | CEFBS_FeatureVector, // VFAE = 2513 |
26364 | 0 | CEFBS_FeatureVector, // VFAEB = 2514 |
26365 | 0 | CEFBS_FeatureVector, // VFAEBS = 2515 |
26366 | 0 | CEFBS_FeatureVector, // VFAEF = 2516 |
26367 | 0 | CEFBS_FeatureVector, // VFAEFS = 2517 |
26368 | 0 | CEFBS_FeatureVector, // VFAEH = 2518 |
26369 | 0 | CEFBS_FeatureVector, // VFAEHS = 2519 |
26370 | 0 | CEFBS_FeatureVector, // VFAEZB = 2520 |
26371 | 0 | CEFBS_FeatureVector, // VFAEZBS = 2521 |
26372 | 0 | CEFBS_FeatureVector, // VFAEZF = 2522 |
26373 | 0 | CEFBS_FeatureVector, // VFAEZFS = 2523 |
26374 | 0 | CEFBS_FeatureVector, // VFAEZH = 2524 |
26375 | 0 | CEFBS_FeatureVector, // VFAEZHS = 2525 |
26376 | 0 | CEFBS_FeatureVectorEnhancements1, // VFASB = 2526 |
26377 | 0 | CEFBS_FeatureVector, // VFCE = 2527 |
26378 | 0 | CEFBS_FeatureVector, // VFCEDB = 2528 |
26379 | 0 | CEFBS_FeatureVector, // VFCEDBS = 2529 |
26380 | 0 | CEFBS_FeatureVectorEnhancements1, // VFCESB = 2530 |
26381 | 0 | CEFBS_FeatureVectorEnhancements1, // VFCESBS = 2531 |
26382 | 0 | CEFBS_FeatureVector, // VFCH = 2532 |
26383 | 0 | CEFBS_FeatureVector, // VFCHDB = 2533 |
26384 | 0 | CEFBS_FeatureVector, // VFCHDBS = 2534 |
26385 | 0 | CEFBS_FeatureVector, // VFCHE = 2535 |
26386 | 0 | CEFBS_FeatureVector, // VFCHEDB = 2536 |
26387 | 0 | CEFBS_FeatureVector, // VFCHEDBS = 2537 |
26388 | 0 | CEFBS_FeatureVectorEnhancements1, // VFCHESB = 2538 |
26389 | 0 | CEFBS_FeatureVectorEnhancements1, // VFCHESBS = 2539 |
26390 | 0 | CEFBS_FeatureVectorEnhancements1, // VFCHSB = 2540 |
26391 | 0 | CEFBS_FeatureVectorEnhancements1, // VFCHSBS = 2541 |
26392 | 0 | CEFBS_FeatureVector, // VFD = 2542 |
26393 | 0 | CEFBS_FeatureVector, // VFDDB = 2543 |
26394 | 0 | CEFBS_FeatureVectorEnhancements1, // VFDSB = 2544 |
26395 | 0 | CEFBS_FeatureVector, // VFEE = 2545 |
26396 | 0 | CEFBS_FeatureVector, // VFEEB = 2546 |
26397 | 0 | CEFBS_FeatureVector, // VFEEBS = 2547 |
26398 | 0 | CEFBS_FeatureVector, // VFEEF = 2548 |
26399 | 0 | CEFBS_FeatureVector, // VFEEFS = 2549 |
26400 | 0 | CEFBS_FeatureVector, // VFEEH = 2550 |
26401 | 0 | CEFBS_FeatureVector, // VFEEHS = 2551 |
26402 | 0 | CEFBS_FeatureVector, // VFEEZB = 2552 |
26403 | 0 | CEFBS_FeatureVector, // VFEEZBS = 2553 |
26404 | 0 | CEFBS_FeatureVector, // VFEEZF = 2554 |
26405 | 0 | CEFBS_FeatureVector, // VFEEZFS = 2555 |
26406 | 0 | CEFBS_FeatureVector, // VFEEZH = 2556 |
26407 | 0 | CEFBS_FeatureVector, // VFEEZHS = 2557 |
26408 | 0 | CEFBS_FeatureVector, // VFENE = 2558 |
26409 | 0 | CEFBS_FeatureVector, // VFENEB = 2559 |
26410 | 0 | CEFBS_FeatureVector, // VFENEBS = 2560 |
26411 | 0 | CEFBS_FeatureVector, // VFENEF = 2561 |
26412 | 0 | CEFBS_FeatureVector, // VFENEFS = 2562 |
26413 | 0 | CEFBS_FeatureVector, // VFENEH = 2563 |
26414 | 0 | CEFBS_FeatureVector, // VFENEHS = 2564 |
26415 | 0 | CEFBS_FeatureVector, // VFENEZB = 2565 |
26416 | 0 | CEFBS_FeatureVector, // VFENEZBS = 2566 |
26417 | 0 | CEFBS_FeatureVector, // VFENEZF = 2567 |
26418 | 0 | CEFBS_FeatureVector, // VFENEZFS = 2568 |
26419 | 0 | CEFBS_FeatureVector, // VFENEZH = 2569 |
26420 | 0 | CEFBS_FeatureVector, // VFENEZHS = 2570 |
26421 | 0 | CEFBS_FeatureVector, // VFI = 2571 |
26422 | 0 | CEFBS_FeatureVector, // VFIDB = 2572 |
26423 | 0 | CEFBS_FeatureVectorEnhancements1, // VFISB = 2573 |
26424 | 0 | CEFBS_FeatureVectorEnhancements1, // VFKEDB = 2574 |
26425 | 0 | CEFBS_FeatureVectorEnhancements1, // VFKEDBS = 2575 |
26426 | 0 | CEFBS_FeatureVectorEnhancements1, // VFKESB = 2576 |
26427 | 0 | CEFBS_FeatureVectorEnhancements1, // VFKESBS = 2577 |
26428 | 0 | CEFBS_FeatureVectorEnhancements1, // VFKHDB = 2578 |
26429 | 0 | CEFBS_FeatureVectorEnhancements1, // VFKHDBS = 2579 |
26430 | 0 | CEFBS_FeatureVectorEnhancements1, // VFKHEDB = 2580 |
26431 | 0 | CEFBS_FeatureVectorEnhancements1, // VFKHEDBS = 2581 |
26432 | 0 | CEFBS_FeatureVectorEnhancements1, // VFKHESB = 2582 |
26433 | 0 | CEFBS_FeatureVectorEnhancements1, // VFKHESBS = 2583 |
26434 | 0 | CEFBS_FeatureVectorEnhancements1, // VFKHSB = 2584 |
26435 | 0 | CEFBS_FeatureVectorEnhancements1, // VFKHSBS = 2585 |
26436 | 0 | CEFBS_FeatureVector, // VFLCDB = 2586 |
26437 | 0 | CEFBS_FeatureVectorEnhancements1, // VFLCSB = 2587 |
26438 | 0 | CEFBS_FeatureVectorEnhancements1, // VFLL = 2588 |
26439 | 0 | CEFBS_FeatureVectorEnhancements1, // VFLLS = 2589 |
26440 | 0 | CEFBS_FeatureVector, // VFLNDB = 2590 |
26441 | 0 | CEFBS_FeatureVectorEnhancements1, // VFLNSB = 2591 |
26442 | 0 | CEFBS_FeatureVector, // VFLPDB = 2592 |
26443 | 0 | CEFBS_FeatureVectorEnhancements1, // VFLPSB = 2593 |
26444 | 0 | CEFBS_FeatureVectorEnhancements1, // VFLR = 2594 |
26445 | 0 | CEFBS_FeatureVectorEnhancements1, // VFLRD = 2595 |
26446 | 0 | CEFBS_FeatureVector, // VFM = 2596 |
26447 | 0 | CEFBS_FeatureVector, // VFMA = 2597 |
26448 | 0 | CEFBS_FeatureVector, // VFMADB = 2598 |
26449 | 0 | CEFBS_FeatureVectorEnhancements1, // VFMASB = 2599 |
26450 | 0 | CEFBS_FeatureVectorEnhancements1, // VFMAX = 2600 |
26451 | 0 | CEFBS_FeatureVectorEnhancements1, // VFMAXDB = 2601 |
26452 | 0 | CEFBS_FeatureVectorEnhancements1, // VFMAXSB = 2602 |
26453 | 0 | CEFBS_FeatureVector, // VFMDB = 2603 |
26454 | 0 | CEFBS_FeatureVectorEnhancements1, // VFMIN = 2604 |
26455 | 0 | CEFBS_FeatureVectorEnhancements1, // VFMINDB = 2605 |
26456 | 0 | CEFBS_FeatureVectorEnhancements1, // VFMINSB = 2606 |
26457 | 0 | CEFBS_FeatureVector, // VFMS = 2607 |
26458 | 0 | CEFBS_FeatureVectorEnhancements1, // VFMSB = 2608 |
26459 | 0 | CEFBS_FeatureVector, // VFMSDB = 2609 |
26460 | 0 | CEFBS_FeatureVectorEnhancements1, // VFMSSB = 2610 |
26461 | 0 | CEFBS_FeatureVectorEnhancements1, // VFNMA = 2611 |
26462 | 0 | CEFBS_FeatureVectorEnhancements1, // VFNMADB = 2612 |
26463 | 0 | CEFBS_FeatureVectorEnhancements1, // VFNMASB = 2613 |
26464 | 0 | CEFBS_FeatureVectorEnhancements1, // VFNMS = 2614 |
26465 | 0 | CEFBS_FeatureVectorEnhancements1, // VFNMSDB = 2615 |
26466 | 0 | CEFBS_FeatureVectorEnhancements1, // VFNMSSB = 2616 |
26467 | 0 | CEFBS_FeatureVector, // VFPSO = 2617 |
26468 | 0 | CEFBS_FeatureVector, // VFPSODB = 2618 |
26469 | 0 | CEFBS_FeatureVectorEnhancements1, // VFPSOSB = 2619 |
26470 | 0 | CEFBS_FeatureVector, // VFS = 2620 |
26471 | 0 | CEFBS_FeatureVector, // VFSDB = 2621 |
26472 | 0 | CEFBS_FeatureVector, // VFSQ = 2622 |
26473 | 0 | CEFBS_FeatureVector, // VFSQDB = 2623 |
26474 | 0 | CEFBS_FeatureVectorEnhancements1, // VFSQSB = 2624 |
26475 | 0 | CEFBS_FeatureVectorEnhancements1, // VFSSB = 2625 |
26476 | 0 | CEFBS_FeatureVector, // VFTCI = 2626 |
26477 | 0 | CEFBS_FeatureVector, // VFTCIDB = 2627 |
26478 | 0 | CEFBS_FeatureVectorEnhancements1, // VFTCISB = 2628 |
26479 | 0 | CEFBS_FeatureVector, // VGBM = 2629 |
26480 | 0 | CEFBS_FeatureVector, // VGEF = 2630 |
26481 | 0 | CEFBS_FeatureVector, // VGEG = 2631 |
26482 | 0 | CEFBS_FeatureVector, // VGFM = 2632 |
26483 | 0 | CEFBS_FeatureVector, // VGFMA = 2633 |
26484 | 0 | CEFBS_FeatureVector, // VGFMAB = 2634 |
26485 | 0 | CEFBS_FeatureVector, // VGFMAF = 2635 |
26486 | 0 | CEFBS_FeatureVector, // VGFMAG = 2636 |
26487 | 0 | CEFBS_FeatureVector, // VGFMAH = 2637 |
26488 | 0 | CEFBS_FeatureVector, // VGFMB = 2638 |
26489 | 0 | CEFBS_FeatureVector, // VGFMF = 2639 |
26490 | 0 | CEFBS_FeatureVector, // VGFMG = 2640 |
26491 | 0 | CEFBS_FeatureVector, // VGFMH = 2641 |
26492 | 0 | CEFBS_FeatureVector, // VGM = 2642 |
26493 | 0 | CEFBS_FeatureVector, // VGMB = 2643 |
26494 | 0 | CEFBS_FeatureVector, // VGMF = 2644 |
26495 | 0 | CEFBS_FeatureVector, // VGMG = 2645 |
26496 | 0 | CEFBS_FeatureVector, // VGMH = 2646 |
26497 | 0 | CEFBS_FeatureVector, // VISTR = 2647 |
26498 | 0 | CEFBS_FeatureVector, // VISTRB = 2648 |
26499 | 0 | CEFBS_FeatureVector, // VISTRBS = 2649 |
26500 | 0 | CEFBS_FeatureVector, // VISTRF = 2650 |
26501 | 0 | CEFBS_FeatureVector, // VISTRFS = 2651 |
26502 | 0 | CEFBS_FeatureVector, // VISTRH = 2652 |
26503 | 0 | CEFBS_FeatureVector, // VISTRHS = 2653 |
26504 | 0 | CEFBS_FeatureVector, // VL = 2654 |
26505 | 0 | CEFBS_FeatureVector, // VLAlign = 2655 |
26506 | 0 | CEFBS_FeatureVector, // VLBB = 2656 |
26507 | 0 | CEFBS_FeatureVectorEnhancements2, // VLBR = 2657 |
26508 | 0 | CEFBS_FeatureVectorEnhancements2, // VLBRF = 2658 |
26509 | 0 | CEFBS_FeatureVectorEnhancements2, // VLBRG = 2659 |
26510 | 0 | CEFBS_FeatureVectorEnhancements2, // VLBRH = 2660 |
26511 | 0 | CEFBS_FeatureVectorEnhancements2, // VLBRQ = 2661 |
26512 | 0 | CEFBS_FeatureVectorEnhancements2, // VLBRREP = 2662 |
26513 | 0 | CEFBS_FeatureVectorEnhancements2, // VLBRREPF = 2663 |
26514 | 0 | CEFBS_FeatureVectorEnhancements2, // VLBRREPG = 2664 |
26515 | 0 | CEFBS_FeatureVectorEnhancements2, // VLBRREPH = 2665 |
26516 | 0 | CEFBS_FeatureVector, // VLC = 2666 |
26517 | 0 | CEFBS_FeatureVector, // VLCB = 2667 |
26518 | 0 | CEFBS_FeatureVector, // VLCF = 2668 |
26519 | 0 | CEFBS_FeatureVector, // VLCG = 2669 |
26520 | 0 | CEFBS_FeatureVector, // VLCH = 2670 |
26521 | 0 | CEFBS_FeatureVector, // VLDE = 2671 |
26522 | 0 | CEFBS_FeatureVector, // VLDEB = 2672 |
26523 | 0 | CEFBS_FeatureVector, // VLEB = 2673 |
26524 | 0 | CEFBS_FeatureVectorEnhancements2, // VLEBRF = 2674 |
26525 | 0 | CEFBS_FeatureVectorEnhancements2, // VLEBRG = 2675 |
26526 | 0 | CEFBS_FeatureVectorEnhancements2, // VLEBRH = 2676 |
26527 | 0 | CEFBS_FeatureVector, // VLED = 2677 |
26528 | 0 | CEFBS_FeatureVector, // VLEDB = 2678 |
26529 | 0 | CEFBS_FeatureVector, // VLEF = 2679 |
26530 | 0 | CEFBS_FeatureVector, // VLEG = 2680 |
26531 | 0 | CEFBS_FeatureVector, // VLEH = 2681 |
26532 | 0 | CEFBS_FeatureVector, // VLEIB = 2682 |
26533 | 0 | CEFBS_FeatureVector, // VLEIF = 2683 |
26534 | 0 | CEFBS_FeatureVector, // VLEIG = 2684 |
26535 | 0 | CEFBS_FeatureVector, // VLEIH = 2685 |
26536 | 0 | CEFBS_FeatureVectorEnhancements2, // VLER = 2686 |
26537 | 0 | CEFBS_FeatureVectorEnhancements2, // VLERF = 2687 |
26538 | 0 | CEFBS_FeatureVectorEnhancements2, // VLERG = 2688 |
26539 | 0 | CEFBS_FeatureVectorEnhancements2, // VLERH = 2689 |
26540 | 0 | CEFBS_FeatureVector, // VLGV = 2690 |
26541 | 0 | CEFBS_FeatureVector, // VLGVB = 2691 |
26542 | 0 | CEFBS_FeatureVector, // VLGVF = 2692 |
26543 | 0 | CEFBS_FeatureVector, // VLGVG = 2693 |
26544 | 0 | CEFBS_FeatureVector, // VLGVH = 2694 |
26545 | 0 | CEFBS_FeatureVectorPackedDecimal, // VLIP = 2695 |
26546 | 0 | CEFBS_FeatureVector, // VLL = 2696 |
26547 | 0 | CEFBS_FeatureVectorEnhancements2, // VLLEBRZ = 2697 |
26548 | 0 | CEFBS_FeatureVectorEnhancements2, // VLLEBRZE = 2698 |
26549 | 0 | CEFBS_FeatureVectorEnhancements2, // VLLEBRZF = 2699 |
26550 | 0 | CEFBS_FeatureVectorEnhancements2, // VLLEBRZG = 2700 |
26551 | 0 | CEFBS_FeatureVectorEnhancements2, // VLLEBRZH = 2701 |
26552 | 0 | CEFBS_FeatureVector, // VLLEZ = 2702 |
26553 | 0 | CEFBS_FeatureVector, // VLLEZB = 2703 |
26554 | 0 | CEFBS_FeatureVector, // VLLEZF = 2704 |
26555 | 0 | CEFBS_FeatureVector, // VLLEZG = 2705 |
26556 | 0 | CEFBS_FeatureVector, // VLLEZH = 2706 |
26557 | 0 | CEFBS_FeatureVectorEnhancements1, // VLLEZLF = 2707 |
26558 | 0 | CEFBS_FeatureVector, // VLM = 2708 |
26559 | 0 | CEFBS_FeatureVector, // VLMAlign = 2709 |
26560 | 0 | CEFBS_FeatureVector, // VLP = 2710 |
26561 | 0 | CEFBS_FeatureVector, // VLPB = 2711 |
26562 | 0 | CEFBS_FeatureVector, // VLPF = 2712 |
26563 | 0 | CEFBS_FeatureVector, // VLPG = 2713 |
26564 | 0 | CEFBS_FeatureVector, // VLPH = 2714 |
26565 | 0 | CEFBS_FeatureVector, // VLR = 2715 |
26566 | 0 | CEFBS_FeatureVector, // VLREP = 2716 |
26567 | 0 | CEFBS_FeatureVector, // VLREPB = 2717 |
26568 | 0 | CEFBS_FeatureVector, // VLREPF = 2718 |
26569 | 0 | CEFBS_FeatureVector, // VLREPG = 2719 |
26570 | 0 | CEFBS_FeatureVector, // VLREPH = 2720 |
26571 | 0 | CEFBS_FeatureVectorPackedDecimal, // VLRL = 2721 |
26572 | 0 | CEFBS_FeatureVectorPackedDecimal, // VLRLR = 2722 |
26573 | 0 | CEFBS_FeatureVector, // VLVG = 2723 |
26574 | 0 | CEFBS_FeatureVector, // VLVGB = 2724 |
26575 | 0 | CEFBS_FeatureVector, // VLVGF = 2725 |
26576 | 0 | CEFBS_FeatureVector, // VLVGG = 2726 |
26577 | 0 | CEFBS_FeatureVector, // VLVGH = 2727 |
26578 | 0 | CEFBS_FeatureVector, // VLVGP = 2728 |
26579 | 0 | CEFBS_FeatureVector, // VMAE = 2729 |
26580 | 0 | CEFBS_FeatureVector, // VMAEB = 2730 |
26581 | 0 | CEFBS_FeatureVector, // VMAEF = 2731 |
26582 | 0 | CEFBS_FeatureVector, // VMAEH = 2732 |
26583 | 0 | CEFBS_FeatureVector, // VMAH = 2733 |
26584 | 0 | CEFBS_FeatureVector, // VMAHB = 2734 |
26585 | 0 | CEFBS_FeatureVector, // VMAHF = 2735 |
26586 | 0 | CEFBS_FeatureVector, // VMAHH = 2736 |
26587 | 0 | CEFBS_FeatureVector, // VMAL = 2737 |
26588 | 0 | CEFBS_FeatureVector, // VMALB = 2738 |
26589 | 0 | CEFBS_FeatureVector, // VMALE = 2739 |
26590 | 0 | CEFBS_FeatureVector, // VMALEB = 2740 |
26591 | 0 | CEFBS_FeatureVector, // VMALEF = 2741 |
26592 | 0 | CEFBS_FeatureVector, // VMALEH = 2742 |
26593 | 0 | CEFBS_FeatureVector, // VMALF = 2743 |
26594 | 0 | CEFBS_FeatureVector, // VMALH = 2744 |
26595 | 0 | CEFBS_FeatureVector, // VMALHB = 2745 |
26596 | 0 | CEFBS_FeatureVector, // VMALHF = 2746 |
26597 | 0 | CEFBS_FeatureVector, // VMALHH = 2747 |
26598 | 0 | CEFBS_FeatureVector, // VMALHW = 2748 |
26599 | 0 | CEFBS_FeatureVector, // VMALO = 2749 |
26600 | 0 | CEFBS_FeatureVector, // VMALOB = 2750 |
26601 | 0 | CEFBS_FeatureVector, // VMALOF = 2751 |
26602 | 0 | CEFBS_FeatureVector, // VMALOH = 2752 |
26603 | 0 | CEFBS_FeatureVector, // VMAO = 2753 |
26604 | 0 | CEFBS_FeatureVector, // VMAOB = 2754 |
26605 | 0 | CEFBS_FeatureVector, // VMAOF = 2755 |
26606 | 0 | CEFBS_FeatureVector, // VMAOH = 2756 |
26607 | 0 | CEFBS_FeatureVector, // VME = 2757 |
26608 | 0 | CEFBS_FeatureVector, // VMEB = 2758 |
26609 | 0 | CEFBS_FeatureVector, // VMEF = 2759 |
26610 | 0 | CEFBS_FeatureVector, // VMEH = 2760 |
26611 | 0 | CEFBS_FeatureVector, // VMH = 2761 |
26612 | 0 | CEFBS_FeatureVector, // VMHB = 2762 |
26613 | 0 | CEFBS_FeatureVector, // VMHF = 2763 |
26614 | 0 | CEFBS_FeatureVector, // VMHH = 2764 |
26615 | 0 | CEFBS_FeatureVector, // VML = 2765 |
26616 | 0 | CEFBS_FeatureVector, // VMLB = 2766 |
26617 | 0 | CEFBS_FeatureVector, // VMLE = 2767 |
26618 | 0 | CEFBS_FeatureVector, // VMLEB = 2768 |
26619 | 0 | CEFBS_FeatureVector, // VMLEF = 2769 |
26620 | 0 | CEFBS_FeatureVector, // VMLEH = 2770 |
26621 | 0 | CEFBS_FeatureVector, // VMLF = 2771 |
26622 | 0 | CEFBS_FeatureVector, // VMLH = 2772 |
26623 | 0 | CEFBS_FeatureVector, // VMLHB = 2773 |
26624 | 0 | CEFBS_FeatureVector, // VMLHF = 2774 |
26625 | 0 | CEFBS_FeatureVector, // VMLHH = 2775 |
26626 | 0 | CEFBS_FeatureVector, // VMLHW = 2776 |
26627 | 0 | CEFBS_FeatureVector, // VMLO = 2777 |
26628 | 0 | CEFBS_FeatureVector, // VMLOB = 2778 |
26629 | 0 | CEFBS_FeatureVector, // VMLOF = 2779 |
26630 | 0 | CEFBS_FeatureVector, // VMLOH = 2780 |
26631 | 0 | CEFBS_FeatureVector, // VMN = 2781 |
26632 | 0 | CEFBS_FeatureVector, // VMNB = 2782 |
26633 | 0 | CEFBS_FeatureVector, // VMNF = 2783 |
26634 | 0 | CEFBS_FeatureVector, // VMNG = 2784 |
26635 | 0 | CEFBS_FeatureVector, // VMNH = 2785 |
26636 | 0 | CEFBS_FeatureVector, // VMNL = 2786 |
26637 | 0 | CEFBS_FeatureVector, // VMNLB = 2787 |
26638 | 0 | CEFBS_FeatureVector, // VMNLF = 2788 |
26639 | 0 | CEFBS_FeatureVector, // VMNLG = 2789 |
26640 | 0 | CEFBS_FeatureVector, // VMNLH = 2790 |
26641 | 0 | CEFBS_FeatureVector, // VMO = 2791 |
26642 | 0 | CEFBS_FeatureVector, // VMOB = 2792 |
26643 | 0 | CEFBS_FeatureVector, // VMOF = 2793 |
26644 | 0 | CEFBS_FeatureVector, // VMOH = 2794 |
26645 | 0 | CEFBS_FeatureVectorPackedDecimal, // VMP = 2795 |
26646 | 0 | CEFBS_FeatureVector, // VMRH = 2796 |
26647 | 0 | CEFBS_FeatureVector, // VMRHB = 2797 |
26648 | 0 | CEFBS_FeatureVector, // VMRHF = 2798 |
26649 | 0 | CEFBS_FeatureVector, // VMRHG = 2799 |
26650 | 0 | CEFBS_FeatureVector, // VMRHH = 2800 |
26651 | 0 | CEFBS_FeatureVector, // VMRL = 2801 |
26652 | 0 | CEFBS_FeatureVector, // VMRLB = 2802 |
26653 | 0 | CEFBS_FeatureVector, // VMRLF = 2803 |
26654 | 0 | CEFBS_FeatureVector, // VMRLG = 2804 |
26655 | 0 | CEFBS_FeatureVector, // VMRLH = 2805 |
26656 | 0 | CEFBS_FeatureVectorEnhancements1, // VMSL = 2806 |
26657 | 0 | CEFBS_FeatureVectorEnhancements1, // VMSLG = 2807 |
26658 | 0 | CEFBS_FeatureVectorPackedDecimal, // VMSP = 2808 |
26659 | 0 | CEFBS_FeatureVector, // VMX = 2809 |
26660 | 0 | CEFBS_FeatureVector, // VMXB = 2810 |
26661 | 0 | CEFBS_FeatureVector, // VMXF = 2811 |
26662 | 0 | CEFBS_FeatureVector, // VMXG = 2812 |
26663 | 0 | CEFBS_FeatureVector, // VMXH = 2813 |
26664 | 0 | CEFBS_FeatureVector, // VMXL = 2814 |
26665 | 0 | CEFBS_FeatureVector, // VMXLB = 2815 |
26666 | 0 | CEFBS_FeatureVector, // VMXLF = 2816 |
26667 | 0 | CEFBS_FeatureVector, // VMXLG = 2817 |
26668 | 0 | CEFBS_FeatureVector, // VMXLH = 2818 |
26669 | 0 | CEFBS_FeatureVector, // VN = 2819 |
26670 | 0 | CEFBS_FeatureVector, // VNC = 2820 |
26671 | 0 | CEFBS_FeatureVectorEnhancements1, // VNN = 2821 |
26672 | 0 | CEFBS_FeatureVector, // VNO = 2822 |
26673 | 0 | CEFBS_FeatureVectorEnhancements1, // VNX = 2823 |
26674 | 0 | CEFBS_FeatureVector, // VO = 2824 |
26675 | 0 | CEFBS_FeatureVectorEnhancements1, // VOC = 2825 |
26676 | 0 | CEFBS_FeatureVector, // VONE = 2826 |
26677 | 0 | CEFBS_FeatureVector, // VPDI = 2827 |
26678 | 0 | CEFBS_FeatureVector, // VPERM = 2828 |
26679 | 0 | CEFBS_FeatureVector, // VPK = 2829 |
26680 | 0 | CEFBS_FeatureVector, // VPKF = 2830 |
26681 | 0 | CEFBS_FeatureVector, // VPKG = 2831 |
26682 | 0 | CEFBS_FeatureVector, // VPKH = 2832 |
26683 | 0 | CEFBS_FeatureVector, // VPKLS = 2833 |
26684 | 0 | CEFBS_FeatureVector, // VPKLSF = 2834 |
26685 | 0 | CEFBS_FeatureVector, // VPKLSFS = 2835 |
26686 | 0 | CEFBS_FeatureVector, // VPKLSG = 2836 |
26687 | 0 | CEFBS_FeatureVector, // VPKLSGS = 2837 |
26688 | 0 | CEFBS_FeatureVector, // VPKLSH = 2838 |
26689 | 0 | CEFBS_FeatureVector, // VPKLSHS = 2839 |
26690 | 0 | CEFBS_FeatureVector, // VPKS = 2840 |
26691 | 0 | CEFBS_FeatureVector, // VPKSF = 2841 |
26692 | 0 | CEFBS_FeatureVector, // VPKSFS = 2842 |
26693 | 0 | CEFBS_FeatureVector, // VPKSG = 2843 |
26694 | 0 | CEFBS_FeatureVector, // VPKSGS = 2844 |
26695 | 0 | CEFBS_FeatureVector, // VPKSH = 2845 |
26696 | 0 | CEFBS_FeatureVector, // VPKSHS = 2846 |
26697 | 0 | CEFBS_FeatureVectorPackedDecimal, // VPKZ = 2847 |
26698 | 0 | CEFBS_FeatureVectorPackedDecimalEnhancement2, // VPKZR = 2848 |
26699 | 0 | CEFBS_FeatureVector, // VPOPCT = 2849 |
26700 | 0 | CEFBS_FeatureVectorEnhancements1, // VPOPCTB = 2850 |
26701 | 0 | CEFBS_FeatureVectorEnhancements1, // VPOPCTF = 2851 |
26702 | 0 | CEFBS_FeatureVectorEnhancements1, // VPOPCTG = 2852 |
26703 | 0 | CEFBS_FeatureVectorEnhancements1, // VPOPCTH = 2853 |
26704 | 0 | CEFBS_FeatureVectorPackedDecimal, // VPSOP = 2854 |
26705 | 0 | CEFBS_FeatureVector, // VREP = 2855 |
26706 | 0 | CEFBS_FeatureVector, // VREPB = 2856 |
26707 | 0 | CEFBS_FeatureVector, // VREPF = 2857 |
26708 | 0 | CEFBS_FeatureVector, // VREPG = 2858 |
26709 | 0 | CEFBS_FeatureVector, // VREPH = 2859 |
26710 | 0 | CEFBS_FeatureVector, // VREPI = 2860 |
26711 | 0 | CEFBS_FeatureVector, // VREPIB = 2861 |
26712 | 0 | CEFBS_FeatureVector, // VREPIF = 2862 |
26713 | 0 | CEFBS_FeatureVector, // VREPIG = 2863 |
26714 | 0 | CEFBS_FeatureVector, // VREPIH = 2864 |
26715 | 0 | CEFBS_FeatureVectorPackedDecimal, // VRP = 2865 |
26716 | 0 | CEFBS_FeatureVector, // VS = 2866 |
26717 | 0 | CEFBS_FeatureVector, // VSB = 2867 |
26718 | 0 | CEFBS_FeatureVector, // VSBCBI = 2868 |
26719 | 0 | CEFBS_FeatureVector, // VSBCBIQ = 2869 |
26720 | 0 | CEFBS_FeatureVector, // VSBI = 2870 |
26721 | 0 | CEFBS_FeatureVector, // VSBIQ = 2871 |
26722 | 0 | CEFBS_FeatureVector, // VSCBI = 2872 |
26723 | 0 | CEFBS_FeatureVector, // VSCBIB = 2873 |
26724 | 0 | CEFBS_FeatureVector, // VSCBIF = 2874 |
26725 | 0 | CEFBS_FeatureVector, // VSCBIG = 2875 |
26726 | 0 | CEFBS_FeatureVector, // VSCBIH = 2876 |
26727 | 0 | CEFBS_FeatureVector, // VSCBIQ = 2877 |
26728 | 0 | CEFBS_FeatureVector, // VSCEF = 2878 |
26729 | 0 | CEFBS_FeatureVector, // VSCEG = 2879 |
26730 | 0 | CEFBS_FeatureVectorPackedDecimalEnhancement2, // VSCHDP = 2880 |
26731 | 0 | CEFBS_FeatureVectorPackedDecimalEnhancement2, // VSCHP = 2881 |
26732 | 0 | CEFBS_FeatureVectorPackedDecimalEnhancement2, // VSCHSP = 2882 |
26733 | 0 | CEFBS_FeatureVectorPackedDecimalEnhancement2, // VSCHXP = 2883 |
26734 | 0 | CEFBS_FeatureVectorPackedDecimalEnhancement2, // VSCSHP = 2884 |
26735 | 0 | CEFBS_FeatureVectorPackedDecimal, // VSDP = 2885 |
26736 | 0 | CEFBS_FeatureVector, // VSEG = 2886 |
26737 | 0 | CEFBS_FeatureVector, // VSEGB = 2887 |
26738 | 0 | CEFBS_FeatureVector, // VSEGF = 2888 |
26739 | 0 | CEFBS_FeatureVector, // VSEGH = 2889 |
26740 | 0 | CEFBS_FeatureVector, // VSEL = 2890 |
26741 | 0 | CEFBS_FeatureVector, // VSF = 2891 |
26742 | 0 | CEFBS_FeatureVector, // VSG = 2892 |
26743 | 0 | CEFBS_FeatureVector, // VSH = 2893 |
26744 | 0 | CEFBS_FeatureVector, // VSL = 2894 |
26745 | 0 | CEFBS_FeatureVector, // VSLB = 2895 |
26746 | 0 | CEFBS_FeatureVectorEnhancements2, // VSLD = 2896 |
26747 | 0 | CEFBS_FeatureVector, // VSLDB = 2897 |
26748 | 0 | CEFBS_FeatureVectorPackedDecimal, // VSP = 2898 |
26749 | 0 | CEFBS_FeatureVector, // VSQ = 2899 |
26750 | 0 | CEFBS_FeatureVector, // VSRA = 2900 |
26751 | 0 | CEFBS_FeatureVector, // VSRAB = 2901 |
26752 | 0 | CEFBS_FeatureVectorEnhancements2, // VSRD = 2902 |
26753 | 0 | CEFBS_FeatureVector, // VSRL = 2903 |
26754 | 0 | CEFBS_FeatureVector, // VSRLB = 2904 |
26755 | 0 | CEFBS_FeatureVectorPackedDecimal, // VSRP = 2905 |
26756 | 0 | CEFBS_FeatureVectorPackedDecimalEnhancement2, // VSRPR = 2906 |
26757 | 0 | CEFBS_FeatureVector, // VST = 2907 |
26758 | 0 | CEFBS_FeatureVector, // VSTAlign = 2908 |
26759 | 0 | CEFBS_FeatureVectorEnhancements2, // VSTBR = 2909 |
26760 | 0 | CEFBS_FeatureVectorEnhancements2, // VSTBRF = 2910 |
26761 | 0 | CEFBS_FeatureVectorEnhancements2, // VSTBRG = 2911 |
26762 | 0 | CEFBS_FeatureVectorEnhancements2, // VSTBRH = 2912 |
26763 | 0 | CEFBS_FeatureVectorEnhancements2, // VSTBRQ = 2913 |
26764 | 0 | CEFBS_FeatureVector, // VSTEB = 2914 |
26765 | 0 | CEFBS_FeatureVectorEnhancements2, // VSTEBRF = 2915 |
26766 | 0 | CEFBS_FeatureVectorEnhancements2, // VSTEBRG = 2916 |
26767 | 0 | CEFBS_FeatureVectorEnhancements2, // VSTEBRH = 2917 |
26768 | 0 | CEFBS_FeatureVector, // VSTEF = 2918 |
26769 | 0 | CEFBS_FeatureVector, // VSTEG = 2919 |
26770 | 0 | CEFBS_FeatureVector, // VSTEH = 2920 |
26771 | 0 | CEFBS_FeatureVectorEnhancements2, // VSTER = 2921 |
26772 | 0 | CEFBS_FeatureVectorEnhancements2, // VSTERF = 2922 |
26773 | 0 | CEFBS_FeatureVectorEnhancements2, // VSTERG = 2923 |
26774 | 0 | CEFBS_FeatureVectorEnhancements2, // VSTERH = 2924 |
26775 | 0 | CEFBS_FeatureVector, // VSTL = 2925 |
26776 | 0 | CEFBS_FeatureVector, // VSTM = 2926 |
26777 | 0 | CEFBS_FeatureVector, // VSTMAlign = 2927 |
26778 | 0 | CEFBS_FeatureVector, // VSTRC = 2928 |
26779 | 0 | CEFBS_FeatureVector, // VSTRCB = 2929 |
26780 | 0 | CEFBS_FeatureVector, // VSTRCBS = 2930 |
26781 | 0 | CEFBS_FeatureVector, // VSTRCF = 2931 |
26782 | 0 | CEFBS_FeatureVector, // VSTRCFS = 2932 |
26783 | 0 | CEFBS_FeatureVector, // VSTRCH = 2933 |
26784 | 0 | CEFBS_FeatureVector, // VSTRCHS = 2934 |
26785 | 0 | CEFBS_FeatureVector, // VSTRCZB = 2935 |
26786 | 0 | CEFBS_FeatureVector, // VSTRCZBS = 2936 |
26787 | 0 | CEFBS_FeatureVector, // VSTRCZF = 2937 |
26788 | 0 | CEFBS_FeatureVector, // VSTRCZFS = 2938 |
26789 | 0 | CEFBS_FeatureVector, // VSTRCZH = 2939 |
26790 | 0 | CEFBS_FeatureVector, // VSTRCZHS = 2940 |
26791 | 0 | CEFBS_FeatureVectorPackedDecimal, // VSTRL = 2941 |
26792 | 0 | CEFBS_FeatureVectorPackedDecimal, // VSTRLR = 2942 |
26793 | 0 | CEFBS_FeatureVectorEnhancements2, // VSTRS = 2943 |
26794 | 0 | CEFBS_FeatureVectorEnhancements2, // VSTRSB = 2944 |
26795 | 0 | CEFBS_FeatureVectorEnhancements2, // VSTRSF = 2945 |
26796 | 0 | CEFBS_FeatureVectorEnhancements2, // VSTRSH = 2946 |
26797 | 0 | CEFBS_FeatureVectorEnhancements2, // VSTRSZB = 2947 |
26798 | 0 | CEFBS_FeatureVectorEnhancements2, // VSTRSZF = 2948 |
26799 | 0 | CEFBS_FeatureVectorEnhancements2, // VSTRSZH = 2949 |
26800 | 0 | CEFBS_FeatureVector, // VSUM = 2950 |
26801 | 0 | CEFBS_FeatureVector, // VSUMB = 2951 |
26802 | 0 | CEFBS_FeatureVector, // VSUMG = 2952 |
26803 | 0 | CEFBS_FeatureVector, // VSUMGF = 2953 |
26804 | 0 | CEFBS_FeatureVector, // VSUMGH = 2954 |
26805 | 0 | CEFBS_FeatureVector, // VSUMH = 2955 |
26806 | 0 | CEFBS_FeatureVector, // VSUMQ = 2956 |
26807 | 0 | CEFBS_FeatureVector, // VSUMQF = 2957 |
26808 | 0 | CEFBS_FeatureVector, // VSUMQG = 2958 |
26809 | 0 | CEFBS_FeatureVector, // VTM = 2959 |
26810 | 0 | CEFBS_FeatureVectorPackedDecimal, // VTP = 2960 |
26811 | 0 | CEFBS_FeatureVector, // VUPH = 2961 |
26812 | 0 | CEFBS_FeatureVector, // VUPHB = 2962 |
26813 | 0 | CEFBS_FeatureVector, // VUPHF = 2963 |
26814 | 0 | CEFBS_FeatureVector, // VUPHH = 2964 |
26815 | 0 | CEFBS_FeatureVectorPackedDecimal, // VUPKZ = 2965 |
26816 | 0 | CEFBS_FeatureVectorPackedDecimalEnhancement2, // VUPKZH = 2966 |
26817 | 0 | CEFBS_FeatureVectorPackedDecimalEnhancement2, // VUPKZL = 2967 |
26818 | 0 | CEFBS_FeatureVector, // VUPL = 2968 |
26819 | 0 | CEFBS_FeatureVector, // VUPLB = 2969 |
26820 | 0 | CEFBS_FeatureVector, // VUPLF = 2970 |
26821 | 0 | CEFBS_FeatureVector, // VUPLH = 2971 |
26822 | 0 | CEFBS_FeatureVector, // VUPLHB = 2972 |
26823 | 0 | CEFBS_FeatureVector, // VUPLHF = 2973 |
26824 | 0 | CEFBS_FeatureVector, // VUPLHH = 2974 |
26825 | 0 | CEFBS_FeatureVector, // VUPLHW = 2975 |
26826 | 0 | CEFBS_FeatureVector, // VUPLL = 2976 |
26827 | 0 | CEFBS_FeatureVector, // VUPLLB = 2977 |
26828 | 0 | CEFBS_FeatureVector, // VUPLLF = 2978 |
26829 | 0 | CEFBS_FeatureVector, // VUPLLH = 2979 |
26830 | 0 | CEFBS_FeatureVector, // VX = 2980 |
26831 | 0 | CEFBS_FeatureVector, // VZERO = 2981 |
26832 | 0 | CEFBS_FeatureVector, // WCDGB = 2982 |
26833 | 0 | CEFBS_FeatureVector, // WCDLGB = 2983 |
26834 | 0 | CEFBS_FeatureVectorEnhancements2, // WCEFB = 2984 |
26835 | 0 | CEFBS_FeatureVectorEnhancements2, // WCELFB = 2985 |
26836 | 0 | CEFBS_FeatureVectorEnhancements2, // WCFEB = 2986 |
26837 | 0 | CEFBS_FeatureVector, // WCGDB = 2987 |
26838 | 0 | CEFBS_FeatureVectorEnhancements2, // WCLFEB = 2988 |
26839 | 0 | CEFBS_FeatureVector, // WCLGDB = 2989 |
26840 | 0 | CEFBS_FeatureVector, // WFADB = 2990 |
26841 | 0 | CEFBS_FeatureVectorEnhancements1, // WFASB = 2991 |
26842 | 0 | CEFBS_FeatureVectorEnhancements1, // WFAXB = 2992 |
26843 | 0 | CEFBS_FeatureVector, // WFC = 2993 |
26844 | 0 | CEFBS_FeatureVector, // WFCDB = 2994 |
26845 | 0 | CEFBS_FeatureVector, // WFCEDB = 2995 |
26846 | 0 | CEFBS_FeatureVector, // WFCEDBS = 2996 |
26847 | 0 | CEFBS_FeatureVectorEnhancements1, // WFCESB = 2997 |
26848 | 0 | CEFBS_FeatureVectorEnhancements1, // WFCESBS = 2998 |
26849 | 0 | CEFBS_FeatureVectorEnhancements1, // WFCEXB = 2999 |
26850 | 0 | CEFBS_FeatureVectorEnhancements1, // WFCEXBS = 3000 |
26851 | 0 | CEFBS_FeatureVector, // WFCHDB = 3001 |
26852 | 0 | CEFBS_FeatureVector, // WFCHDBS = 3002 |
26853 | 0 | CEFBS_FeatureVector, // WFCHEDB = 3003 |
26854 | 0 | CEFBS_FeatureVector, // WFCHEDBS = 3004 |
26855 | 0 | CEFBS_FeatureVectorEnhancements1, // WFCHESB = 3005 |
26856 | 0 | CEFBS_FeatureVectorEnhancements1, // WFCHESBS = 3006 |
26857 | 0 | CEFBS_FeatureVectorEnhancements1, // WFCHEXB = 3007 |
26858 | 0 | CEFBS_FeatureVectorEnhancements1, // WFCHEXBS = 3008 |
26859 | 0 | CEFBS_FeatureVectorEnhancements1, // WFCHSB = 3009 |
26860 | 0 | CEFBS_FeatureVectorEnhancements1, // WFCHSBS = 3010 |
26861 | 0 | CEFBS_FeatureVectorEnhancements1, // WFCHXB = 3011 |
26862 | 0 | CEFBS_FeatureVectorEnhancements1, // WFCHXBS = 3012 |
26863 | 0 | CEFBS_FeatureVectorEnhancements1, // WFCSB = 3013 |
26864 | 0 | CEFBS_FeatureVectorEnhancements1, // WFCXB = 3014 |
26865 | 0 | CEFBS_FeatureVector, // WFDDB = 3015 |
26866 | 0 | CEFBS_FeatureVectorEnhancements1, // WFDSB = 3016 |
26867 | 0 | CEFBS_FeatureVectorEnhancements1, // WFDXB = 3017 |
26868 | 0 | CEFBS_FeatureVector, // WFIDB = 3018 |
26869 | 0 | CEFBS_FeatureVectorEnhancements1, // WFISB = 3019 |
26870 | 0 | CEFBS_FeatureVectorEnhancements1, // WFIXB = 3020 |
26871 | 0 | CEFBS_FeatureVector, // WFK = 3021 |
26872 | 0 | CEFBS_FeatureVector, // WFKDB = 3022 |
26873 | 0 | CEFBS_FeatureVectorEnhancements1, // WFKEDB = 3023 |
26874 | 0 | CEFBS_FeatureVectorEnhancements1, // WFKEDBS = 3024 |
26875 | 0 | CEFBS_FeatureVectorEnhancements1, // WFKESB = 3025 |
26876 | 0 | CEFBS_FeatureVectorEnhancements1, // WFKESBS = 3026 |
26877 | 0 | CEFBS_FeatureVectorEnhancements1, // WFKEXB = 3027 |
26878 | 0 | CEFBS_FeatureVectorEnhancements1, // WFKEXBS = 3028 |
26879 | 0 | CEFBS_FeatureVectorEnhancements1, // WFKHDB = 3029 |
26880 | 0 | CEFBS_FeatureVectorEnhancements1, // WFKHDBS = 3030 |
26881 | 0 | CEFBS_FeatureVectorEnhancements1, // WFKHEDB = 3031 |
26882 | 0 | CEFBS_FeatureVectorEnhancements1, // WFKHEDBS = 3032 |
26883 | 0 | CEFBS_FeatureVectorEnhancements1, // WFKHESB = 3033 |
26884 | 0 | CEFBS_FeatureVectorEnhancements1, // WFKHESBS = 3034 |
26885 | 0 | CEFBS_FeatureVectorEnhancements1, // WFKHEXB = 3035 |
26886 | 0 | CEFBS_FeatureVectorEnhancements1, // WFKHEXBS = 3036 |
26887 | 0 | CEFBS_FeatureVectorEnhancements1, // WFKHSB = 3037 |
26888 | 0 | CEFBS_FeatureVectorEnhancements1, // WFKHSBS = 3038 |
26889 | 0 | CEFBS_FeatureVectorEnhancements1, // WFKHXB = 3039 |
26890 | 0 | CEFBS_FeatureVectorEnhancements1, // WFKHXBS = 3040 |
26891 | 0 | CEFBS_FeatureVectorEnhancements1, // WFKSB = 3041 |
26892 | 0 | CEFBS_FeatureVectorEnhancements1, // WFKXB = 3042 |
26893 | 0 | CEFBS_FeatureVector, // WFLCDB = 3043 |
26894 | 0 | CEFBS_FeatureVectorEnhancements1, // WFLCSB = 3044 |
26895 | 0 | CEFBS_FeatureVectorEnhancements1, // WFLCXB = 3045 |
26896 | 0 | CEFBS_FeatureVectorEnhancements1, // WFLLD = 3046 |
26897 | 0 | CEFBS_FeatureVectorEnhancements1, // WFLLS = 3047 |
26898 | 0 | CEFBS_FeatureVector, // WFLNDB = 3048 |
26899 | 0 | CEFBS_FeatureVectorEnhancements1, // WFLNSB = 3049 |
26900 | 0 | CEFBS_FeatureVectorEnhancements1, // WFLNXB = 3050 |
26901 | 0 | CEFBS_FeatureVector, // WFLPDB = 3051 |
26902 | 0 | CEFBS_FeatureVectorEnhancements1, // WFLPSB = 3052 |
26903 | 0 | CEFBS_FeatureVectorEnhancements1, // WFLPXB = 3053 |
26904 | 0 | CEFBS_FeatureVectorEnhancements1, // WFLRD = 3054 |
26905 | 0 | CEFBS_FeatureVectorEnhancements1, // WFLRX = 3055 |
26906 | 0 | CEFBS_FeatureVector, // WFMADB = 3056 |
26907 | 0 | CEFBS_FeatureVectorEnhancements1, // WFMASB = 3057 |
26908 | 0 | CEFBS_FeatureVectorEnhancements1, // WFMAXB = 3058 |
26909 | 0 | CEFBS_FeatureVectorEnhancements1, // WFMAXDB = 3059 |
26910 | 0 | CEFBS_FeatureVectorEnhancements1, // WFMAXSB = 3060 |
26911 | 0 | CEFBS_FeatureVectorEnhancements1, // WFMAXXB = 3061 |
26912 | 0 | CEFBS_FeatureVector, // WFMDB = 3062 |
26913 | 0 | CEFBS_FeatureVectorEnhancements1, // WFMINDB = 3063 |
26914 | 0 | CEFBS_FeatureVectorEnhancements1, // WFMINSB = 3064 |
26915 | 0 | CEFBS_FeatureVectorEnhancements1, // WFMINXB = 3065 |
26916 | 0 | CEFBS_FeatureVectorEnhancements1, // WFMSB = 3066 |
26917 | 0 | CEFBS_FeatureVector, // WFMSDB = 3067 |
26918 | 0 | CEFBS_FeatureVectorEnhancements1, // WFMSSB = 3068 |
26919 | 0 | CEFBS_FeatureVectorEnhancements1, // WFMSXB = 3069 |
26920 | 0 | CEFBS_FeatureVectorEnhancements1, // WFMXB = 3070 |
26921 | 0 | CEFBS_FeatureVectorEnhancements1, // WFNMADB = 3071 |
26922 | 0 | CEFBS_FeatureVectorEnhancements1, // WFNMASB = 3072 |
26923 | 0 | CEFBS_FeatureVectorEnhancements1, // WFNMAXB = 3073 |
26924 | 0 | CEFBS_FeatureVectorEnhancements1, // WFNMSDB = 3074 |
26925 | 0 | CEFBS_FeatureVectorEnhancements1, // WFNMSSB = 3075 |
26926 | 0 | CEFBS_FeatureVectorEnhancements1, // WFNMSXB = 3076 |
26927 | 0 | CEFBS_FeatureVector, // WFPSODB = 3077 |
26928 | 0 | CEFBS_FeatureVectorEnhancements1, // WFPSOSB = 3078 |
26929 | 0 | CEFBS_FeatureVectorEnhancements1, // WFPSOXB = 3079 |
26930 | 0 | CEFBS_FeatureVector, // WFSDB = 3080 |
26931 | 0 | CEFBS_FeatureVector, // WFSQDB = 3081 |
26932 | 0 | CEFBS_FeatureVectorEnhancements1, // WFSQSB = 3082 |
26933 | 0 | CEFBS_FeatureVectorEnhancements1, // WFSQXB = 3083 |
26934 | 0 | CEFBS_FeatureVectorEnhancements1, // WFSSB = 3084 |
26935 | 0 | CEFBS_FeatureVectorEnhancements1, // WFSXB = 3085 |
26936 | 0 | CEFBS_FeatureVector, // WFTCIDB = 3086 |
26937 | 0 | CEFBS_FeatureVectorEnhancements1, // WFTCISB = 3087 |
26938 | 0 | CEFBS_FeatureVectorEnhancements1, // WFTCIXB = 3088 |
26939 | 0 | CEFBS_FeatureVector, // WLDEB = 3089 |
26940 | 0 | CEFBS_FeatureVector, // WLEDB = 3090 |
26941 | 0 | CEFBS_None, // X = 3091 |
26942 | 0 | CEFBS_None, // XC = 3092 |
26943 | 0 | CEFBS_None, // XG = 3093 |
26944 | 0 | CEFBS_None, // XGR = 3094 |
26945 | 0 | CEFBS_FeatureDistinctOps, // XGRK = 3095 |
26946 | 0 | CEFBS_None, // XI = 3096 |
26947 | 0 | CEFBS_None, // XIHF = 3097 |
26948 | 0 | CEFBS_None, // XILF = 3098 |
26949 | 0 | CEFBS_None, // XIY = 3099 |
26950 | 0 | CEFBS_None, // XR = 3100 |
26951 | 0 | CEFBS_FeatureDistinctOps, // XRK = 3101 |
26952 | 0 | CEFBS_None, // XSCH = 3102 |
26953 | 0 | CEFBS_None, // XY = 3103 |
26954 | 0 | CEFBS_None, // ZAP = 3104 |
26955 | 0 | }; |
26956 | |
|
26957 | 0 | assert(Opcode < 3105); |
26958 | 0 | return FeatureBitsets[RequiredFeaturesRefs[Opcode]]; |
26959 | 0 | } |
26960 | | |
26961 | | } // end namespace SystemZ_MC |
26962 | | } // end namespace llvm |
26963 | | #endif // GET_COMPUTE_FEATURES |
26964 | | |
26965 | | #ifdef GET_AVAILABLE_OPCODE_CHECKER |
26966 | | #undef GET_AVAILABLE_OPCODE_CHECKER |
26967 | | namespace llvm { |
26968 | | namespace SystemZ_MC { |
26969 | | bool isOpcodeAvailable(unsigned Opcode, const FeatureBitset &Features) { |
26970 | | FeatureBitset AvailableFeatures = computeAvailableFeatures(Features); |
26971 | | FeatureBitset RequiredFeatures = computeRequiredFeatures(Opcode); |
26972 | | FeatureBitset MissingFeatures = |
26973 | | (AvailableFeatures & RequiredFeatures) ^ |
26974 | | RequiredFeatures; |
26975 | | return !MissingFeatures.any(); |
26976 | | } |
26977 | | } // end namespace SystemZ_MC |
26978 | | } // end namespace llvm |
26979 | | #endif // GET_AVAILABLE_OPCODE_CHECKER |
26980 | | |
26981 | | #ifdef ENABLE_INSTR_PREDICATE_VERIFIER |
26982 | | #undef ENABLE_INSTR_PREDICATE_VERIFIER |
26983 | | #include <sstream> |
26984 | | |
26985 | | namespace llvm { |
26986 | | namespace SystemZ_MC { |
26987 | | |
26988 | | #ifndef NDEBUG |
26989 | | static const char *SubtargetFeatureNames[] = { |
26990 | | "Feature_FeatureBEAREnhancement", |
26991 | | "Feature_FeatureBackChain", |
26992 | | "Feature_FeatureDFPPackedConversion", |
26993 | | "Feature_FeatureDFPZonedConversion", |
26994 | | "Feature_FeatureDeflateConversion", |
26995 | | "Feature_FeatureDistinctOps", |
26996 | | "Feature_FeatureEnhancedDAT2", |
26997 | | "Feature_FeatureEnhancedSort", |
26998 | | "Feature_FeatureExecutionHint", |
26999 | | "Feature_FeatureFPExtension", |
27000 | | "Feature_FeatureFastSerialization", |
27001 | | "Feature_FeatureGuardedStorage", |
27002 | | "Feature_FeatureHighWord", |
27003 | | "Feature_FeatureInsertReferenceBitsMultiple", |
27004 | | "Feature_FeatureInterlockedAccess1", |
27005 | | "Feature_FeatureLoadAndTrap", |
27006 | | "Feature_FeatureLoadAndZeroRightmostByte", |
27007 | | "Feature_FeatureLoadStoreOnCond", |
27008 | | "Feature_FeatureLoadStoreOnCond2", |
27009 | | "Feature_FeatureMessageSecurityAssist3", |
27010 | | "Feature_FeatureMessageSecurityAssist4", |
27011 | | "Feature_FeatureMessageSecurityAssist5", |
27012 | | "Feature_FeatureMessageSecurityAssist7", |
27013 | | "Feature_FeatureMessageSecurityAssist8", |
27014 | | "Feature_FeatureMessageSecurityAssist9", |
27015 | | "Feature_FeatureMiscellaneousExtensions", |
27016 | | "Feature_FeatureMiscellaneousExtensions2", |
27017 | | "Feature_FeatureMiscellaneousExtensions3", |
27018 | | "Feature_FeatureNNPAssist", |
27019 | | "Feature_FeaturePopulationCount", |
27020 | | "Feature_FeatureProcessorActivityInstrumentation", |
27021 | | "Feature_FeatureProcessorAssist", |
27022 | | "Feature_FeatureResetDATProtection", |
27023 | | "Feature_FeatureResetReferenceBitsMultiple", |
27024 | | "Feature_FeatureSoftFloat", |
27025 | | "Feature_FeatureTransactionalExecution", |
27026 | | "Feature_FeatureVector", |
27027 | | "Feature_FeatureVectorEnhancements1", |
27028 | | "Feature_FeatureVectorEnhancements2", |
27029 | | "Feature_FeatureVectorPackedDecimal", |
27030 | | "Feature_FeatureVectorPackedDecimalEnhancement", |
27031 | | "Feature_FeatureVectorPackedDecimalEnhancement2", |
27032 | | nullptr |
27033 | | }; |
27034 | | |
27035 | | #endif // NDEBUG |
27036 | | |
27037 | | void verifyInstructionPredicates( |
27038 | 0 | unsigned Opcode, const FeatureBitset &Features) { |
27039 | 0 | #ifndef NDEBUG |
27040 | 0 | FeatureBitset AvailableFeatures = computeAvailableFeatures(Features); |
27041 | 0 | FeatureBitset RequiredFeatures = computeRequiredFeatures(Opcode); |
27042 | 0 | FeatureBitset MissingFeatures = |
27043 | 0 | (AvailableFeatures & RequiredFeatures) ^ |
27044 | 0 | RequiredFeatures; |
27045 | 0 | if (MissingFeatures.any()) { |
27046 | 0 | std::ostringstream Msg; |
27047 | 0 | Msg << "Attempting to emit " << &SystemZInstrNameData[SystemZInstrNameIndices[Opcode]] |
27048 | 0 | << " instruction but the "; |
27049 | 0 | for (unsigned i = 0, e = MissingFeatures.size(); i != e; ++i) |
27050 | 0 | if (MissingFeatures.test(i)) |
27051 | 0 | Msg << SubtargetFeatureNames[i] << " "; |
27052 | 0 | Msg << "predicate(s) are not met"; |
27053 | 0 | report_fatal_error(Msg.str().c_str()); |
27054 | 0 | } |
27055 | 0 | #endif // NDEBUG |
27056 | 0 | } |
27057 | | } // end namespace SystemZ_MC |
27058 | | } // end namespace llvm |
27059 | | #endif // ENABLE_INSTR_PREDICATE_VERIFIER |
27060 | | |
27061 | | #ifdef GET_INSTRMAP_INFO |
27062 | | #undef GET_INSTRMAP_INFO |
27063 | | namespace llvm { |
27064 | | |
27065 | | namespace SystemZ { |
27066 | | |
27067 | | enum DispSize { |
27068 | | DispSize_12, |
27069 | | DispSize_20 |
27070 | | }; |
27071 | | |
27072 | | enum MemType { |
27073 | | MemType_target |
27074 | | }; |
27075 | | |
27076 | | enum NumOpsValue { |
27077 | | NumOpsValue_2 |
27078 | | }; |
27079 | | |
27080 | | enum OpType { |
27081 | | OpType_mem |
27082 | | }; |
27083 | | |
27084 | | // getDisp12Opcode |
27085 | | LLVM_READONLY |
27086 | 0 | int getDisp12Opcode(uint16_t Opcode) { |
27087 | 0 | static const uint16_t getDisp12OpcodeTable[][2] = { |
27088 | 0 | { SystemZ::AHY, SystemZ::AH }, |
27089 | 0 | { SystemZ::ALY, SystemZ::AL }, |
27090 | 0 | { SystemZ::AY, SystemZ::A }, |
27091 | 0 | { SystemZ::CDSY, SystemZ::CDS }, |
27092 | 0 | { SystemZ::CHY, SystemZ::CH }, |
27093 | 0 | { SystemZ::CLIY, SystemZ::CLI }, |
27094 | 0 | { SystemZ::CLMY, SystemZ::CLM }, |
27095 | 0 | { SystemZ::CLY, SystemZ::CL }, |
27096 | 0 | { SystemZ::CSY, SystemZ::CS }, |
27097 | 0 | { SystemZ::CVBY, SystemZ::CVB }, |
27098 | 0 | { SystemZ::CVDY, SystemZ::CVD }, |
27099 | 0 | { SystemZ::CY, SystemZ::C }, |
27100 | 0 | { SystemZ::IC32Y, SystemZ::IC32 }, |
27101 | 0 | { SystemZ::ICMY, SystemZ::ICM }, |
27102 | 0 | { SystemZ::ICY, SystemZ::IC }, |
27103 | 0 | { SystemZ::LAEY, SystemZ::LAE }, |
27104 | 0 | { SystemZ::LAMY, SystemZ::LAM }, |
27105 | 0 | { SystemZ::LAY, SystemZ::LA }, |
27106 | 0 | { SystemZ::LDY, SystemZ::LD }, |
27107 | 0 | { SystemZ::LEY, SystemZ::LE }, |
27108 | 0 | { SystemZ::LHY, SystemZ::LH }, |
27109 | 0 | { SystemZ::LMY, SystemZ::LM }, |
27110 | 0 | { SystemZ::LRAY, SystemZ::LRA }, |
27111 | 0 | { SystemZ::LY, SystemZ::L }, |
27112 | 0 | { SystemZ::MHY, SystemZ::MH }, |
27113 | 0 | { SystemZ::MSY, SystemZ::MS }, |
27114 | 0 | { SystemZ::MVIY, SystemZ::MVI }, |
27115 | 0 | { SystemZ::NIY, SystemZ::NI }, |
27116 | 0 | { SystemZ::NY, SystemZ::N }, |
27117 | 0 | { SystemZ::OIY, SystemZ::OI }, |
27118 | 0 | { SystemZ::OY, SystemZ::O }, |
27119 | 0 | { SystemZ::SHY, SystemZ::SH }, |
27120 | 0 | { SystemZ::SLY, SystemZ::SL }, |
27121 | 0 | { SystemZ::STAMY, SystemZ::STAM }, |
27122 | 0 | { SystemZ::STCMY, SystemZ::STCM }, |
27123 | 0 | { SystemZ::STCY, SystemZ::STC }, |
27124 | 0 | { SystemZ::STDY, SystemZ::STD }, |
27125 | 0 | { SystemZ::STEY, SystemZ::STE }, |
27126 | 0 | { SystemZ::STHY, SystemZ::STH }, |
27127 | 0 | { SystemZ::STMY, SystemZ::STM }, |
27128 | 0 | { SystemZ::STY, SystemZ::ST }, |
27129 | 0 | { SystemZ::SY, SystemZ::S }, |
27130 | 0 | { SystemZ::TMY, SystemZ::TM }, |
27131 | 0 | { SystemZ::XIY, SystemZ::XI }, |
27132 | 0 | { SystemZ::XY, SystemZ::X }, |
27133 | 0 | }; // End of getDisp12OpcodeTable |
27134 | |
|
27135 | 0 | unsigned mid; |
27136 | 0 | unsigned start = 0; |
27137 | 0 | unsigned end = 45; |
27138 | 0 | while (start < end) { |
27139 | 0 | mid = start + (end - start) / 2; |
27140 | 0 | if (Opcode == getDisp12OpcodeTable[mid][0]) { |
27141 | 0 | break; |
27142 | 0 | } |
27143 | 0 | if (Opcode < getDisp12OpcodeTable[mid][0]) |
27144 | 0 | end = mid; |
27145 | 0 | else |
27146 | 0 | start = mid + 1; |
27147 | 0 | } |
27148 | 0 | if (start == end) |
27149 | 0 | return -1; // Instruction doesn't exist in this table. |
27150 | | |
27151 | 0 | return getDisp12OpcodeTable[mid][1]; |
27152 | 0 | } |
27153 | | |
27154 | | // getDisp20Opcode |
27155 | | LLVM_READONLY |
27156 | 0 | int getDisp20Opcode(uint16_t Opcode) { |
27157 | 0 | static const uint16_t getDisp20OpcodeTable[][2] = { |
27158 | 0 | { SystemZ::A, SystemZ::AY }, |
27159 | 0 | { SystemZ::AH, SystemZ::AHY }, |
27160 | 0 | { SystemZ::AL, SystemZ::ALY }, |
27161 | 0 | { SystemZ::C, SystemZ::CY }, |
27162 | 0 | { SystemZ::CDS, SystemZ::CDSY }, |
27163 | 0 | { SystemZ::CH, SystemZ::CHY }, |
27164 | 0 | { SystemZ::CL, SystemZ::CLY }, |
27165 | 0 | { SystemZ::CLI, SystemZ::CLIY }, |
27166 | 0 | { SystemZ::CLM, SystemZ::CLMY }, |
27167 | 0 | { SystemZ::CS, SystemZ::CSY }, |
27168 | 0 | { SystemZ::CVB, SystemZ::CVBY }, |
27169 | 0 | { SystemZ::CVD, SystemZ::CVDY }, |
27170 | 0 | { SystemZ::IC, SystemZ::ICY }, |
27171 | 0 | { SystemZ::IC32, SystemZ::IC32Y }, |
27172 | 0 | { SystemZ::ICM, SystemZ::ICMY }, |
27173 | 0 | { SystemZ::L, SystemZ::LY }, |
27174 | 0 | { SystemZ::LA, SystemZ::LAY }, |
27175 | 0 | { SystemZ::LAE, SystemZ::LAEY }, |
27176 | 0 | { SystemZ::LAM, SystemZ::LAMY }, |
27177 | 0 | { SystemZ::LD, SystemZ::LDY }, |
27178 | 0 | { SystemZ::LE, SystemZ::LEY }, |
27179 | 0 | { SystemZ::LH, SystemZ::LHY }, |
27180 | 0 | { SystemZ::LM, SystemZ::LMY }, |
27181 | 0 | { SystemZ::LRA, SystemZ::LRAY }, |
27182 | 0 | { SystemZ::MH, SystemZ::MHY }, |
27183 | 0 | { SystemZ::MS, SystemZ::MSY }, |
27184 | 0 | { SystemZ::MVI, SystemZ::MVIY }, |
27185 | 0 | { SystemZ::N, SystemZ::NY }, |
27186 | 0 | { SystemZ::NI, SystemZ::NIY }, |
27187 | 0 | { SystemZ::O, SystemZ::OY }, |
27188 | 0 | { SystemZ::OI, SystemZ::OIY }, |
27189 | 0 | { SystemZ::S, SystemZ::SY }, |
27190 | 0 | { SystemZ::SH, SystemZ::SHY }, |
27191 | 0 | { SystemZ::SL, SystemZ::SLY }, |
27192 | 0 | { SystemZ::ST, SystemZ::STY }, |
27193 | 0 | { SystemZ::STAM, SystemZ::STAMY }, |
27194 | 0 | { SystemZ::STC, SystemZ::STCY }, |
27195 | 0 | { SystemZ::STCM, SystemZ::STCMY }, |
27196 | 0 | { SystemZ::STD, SystemZ::STDY }, |
27197 | 0 | { SystemZ::STE, SystemZ::STEY }, |
27198 | 0 | { SystemZ::STH, SystemZ::STHY }, |
27199 | 0 | { SystemZ::STM, SystemZ::STMY }, |
27200 | 0 | { SystemZ::TM, SystemZ::TMY }, |
27201 | 0 | { SystemZ::X, SystemZ::XY }, |
27202 | 0 | { SystemZ::XI, SystemZ::XIY }, |
27203 | 0 | }; // End of getDisp20OpcodeTable |
27204 | |
|
27205 | 0 | unsigned mid; |
27206 | 0 | unsigned start = 0; |
27207 | 0 | unsigned end = 45; |
27208 | 0 | while (start < end) { |
27209 | 0 | mid = start + (end - start) / 2; |
27210 | 0 | if (Opcode == getDisp20OpcodeTable[mid][0]) { |
27211 | 0 | break; |
27212 | 0 | } |
27213 | 0 | if (Opcode < getDisp20OpcodeTable[mid][0]) |
27214 | 0 | end = mid; |
27215 | 0 | else |
27216 | 0 | start = mid + 1; |
27217 | 0 | } |
27218 | 0 | if (start == end) |
27219 | 0 | return -1; // Instruction doesn't exist in this table. |
27220 | | |
27221 | 0 | return getDisp20OpcodeTable[mid][1]; |
27222 | 0 | } |
27223 | | |
27224 | | // getMemOpcode |
27225 | | LLVM_READONLY |
27226 | 0 | int getMemOpcode(uint16_t Opcode) { |
27227 | 0 | static const uint16_t getMemOpcodeTable[][2] = { |
27228 | 0 | { SystemZ::LLCRMux, SystemZ::LLCMux }, |
27229 | 0 | { SystemZ::LLHRMux, SystemZ::LLHMux }, |
27230 | 0 | { SystemZ::LOCRMux, SystemZ::LOCMux }, |
27231 | 0 | { SystemZ::SELRMux, SystemZ::LOCMux_MemFoldPseudo }, |
27232 | 0 | { SystemZ::ADBR, SystemZ::ADB }, |
27233 | 0 | { SystemZ::ADR, SystemZ::AD }, |
27234 | 0 | { SystemZ::AEBR, SystemZ::AEB }, |
27235 | 0 | { SystemZ::AER, SystemZ::AE }, |
27236 | 0 | { SystemZ::AGFR, SystemZ::AGF }, |
27237 | 0 | { SystemZ::AGR, SystemZ::AG }, |
27238 | 0 | { SystemZ::AGRK, SystemZ::AG_MemFoldPseudo }, |
27239 | 0 | { SystemZ::ALCGR, SystemZ::ALCG }, |
27240 | 0 | { SystemZ::ALCR, SystemZ::ALC }, |
27241 | 0 | { SystemZ::ALGFR, SystemZ::ALGF }, |
27242 | 0 | { SystemZ::ALGR, SystemZ::ALG }, |
27243 | 0 | { SystemZ::ALGRK, SystemZ::ALG_MemFoldPseudo }, |
27244 | 0 | { SystemZ::ALR, SystemZ::AL }, |
27245 | 0 | { SystemZ::ALRK, SystemZ::AL_MemFoldPseudo }, |
27246 | 0 | { SystemZ::AR, SystemZ::A }, |
27247 | 0 | { SystemZ::ARK, SystemZ::A_MemFoldPseudo }, |
27248 | 0 | { SystemZ::AUR, SystemZ::AU }, |
27249 | 0 | { SystemZ::AWR, SystemZ::AW }, |
27250 | 0 | { SystemZ::CDBR, SystemZ::CDB }, |
27251 | 0 | { SystemZ::CDR, SystemZ::CD }, |
27252 | 0 | { SystemZ::CEBR, SystemZ::CEB }, |
27253 | 0 | { SystemZ::CER, SystemZ::CE }, |
27254 | 0 | { SystemZ::CGFR, SystemZ::CGF }, |
27255 | 0 | { SystemZ::CGR, SystemZ::CG }, |
27256 | 0 | { SystemZ::CLGFR, SystemZ::CLGF }, |
27257 | 0 | { SystemZ::CLGR, SystemZ::CLG }, |
27258 | 0 | { SystemZ::CLR, SystemZ::CL }, |
27259 | 0 | { SystemZ::CR, SystemZ::C }, |
27260 | 0 | { SystemZ::DDBR, SystemZ::DDB }, |
27261 | 0 | { SystemZ::DDR, SystemZ::DD }, |
27262 | 0 | { SystemZ::DEBR, SystemZ::DEB }, |
27263 | 0 | { SystemZ::DER, SystemZ::DE }, |
27264 | 0 | { SystemZ::DLGR, SystemZ::DLG }, |
27265 | 0 | { SystemZ::DLR, SystemZ::DL }, |
27266 | 0 | { SystemZ::DR, SystemZ::D }, |
27267 | 0 | { SystemZ::DSGFR, SystemZ::DSGF }, |
27268 | 0 | { SystemZ::DSGR, SystemZ::DSG }, |
27269 | 0 | { SystemZ::KDBR, SystemZ::KDB }, |
27270 | 0 | { SystemZ::KEBR, SystemZ::KEB }, |
27271 | 0 | { SystemZ::LBR, SystemZ::LB }, |
27272 | 0 | { SystemZ::LDEBR, SystemZ::LDEB }, |
27273 | 0 | { SystemZ::LDER, SystemZ::LDE }, |
27274 | 0 | { SystemZ::LDR, SystemZ::LD }, |
27275 | 0 | { SystemZ::LER, SystemZ::LE }, |
27276 | 0 | { SystemZ::LGBR, SystemZ::LGB }, |
27277 | 0 | { SystemZ::LGFR, SystemZ::LGF }, |
27278 | 0 | { SystemZ::LGHR, SystemZ::LGH }, |
27279 | 0 | { SystemZ::LGR, SystemZ::LG }, |
27280 | 0 | { SystemZ::LHR, SystemZ::LH }, |
27281 | 0 | { SystemZ::LLCR, SystemZ::LLC }, |
27282 | 0 | { SystemZ::LLGCR, SystemZ::LLGC }, |
27283 | 0 | { SystemZ::LLGFR, SystemZ::LLGF }, |
27284 | 0 | { SystemZ::LLGHR, SystemZ::LLGH }, |
27285 | 0 | { SystemZ::LLGTR, SystemZ::LLGT }, |
27286 | 0 | { SystemZ::LLHR, SystemZ::LLH }, |
27287 | 0 | { SystemZ::LOCFHR, SystemZ::LOCFH }, |
27288 | 0 | { SystemZ::LOCGR, SystemZ::LOCG }, |
27289 | 0 | { SystemZ::LOCR, SystemZ::LOC }, |
27290 | 0 | { SystemZ::LR, SystemZ::L }, |
27291 | 0 | { SystemZ::LRVGR, SystemZ::LRVG }, |
27292 | 0 | { SystemZ::LRVR, SystemZ::LRV }, |
27293 | 0 | { SystemZ::LTGFR, SystemZ::LTGF }, |
27294 | 0 | { SystemZ::LTGR, SystemZ::LTG }, |
27295 | 0 | { SystemZ::LTR, SystemZ::LT }, |
27296 | 0 | { SystemZ::LXDBR, SystemZ::LXDB }, |
27297 | 0 | { SystemZ::LXDR, SystemZ::LXD }, |
27298 | 0 | { SystemZ::LXEBR, SystemZ::LXEB }, |
27299 | 0 | { SystemZ::LXER, SystemZ::LXE }, |
27300 | 0 | { SystemZ::MADBR, SystemZ::MADB }, |
27301 | 0 | { SystemZ::MADR, SystemZ::MAD }, |
27302 | 0 | { SystemZ::MAEBR, SystemZ::MAEB }, |
27303 | 0 | { SystemZ::MAER, SystemZ::MAE }, |
27304 | 0 | { SystemZ::MAYHR, SystemZ::MAYH }, |
27305 | 0 | { SystemZ::MAYLR, SystemZ::MAYL }, |
27306 | 0 | { SystemZ::MAYR, SystemZ::MAY }, |
27307 | 0 | { SystemZ::MDBR, SystemZ::MDB }, |
27308 | 0 | { SystemZ::MDEBR, SystemZ::MDEB }, |
27309 | 0 | { SystemZ::MDER, SystemZ::MDE }, |
27310 | 0 | { SystemZ::MDR, SystemZ::MD }, |
27311 | 0 | { SystemZ::MEEBR, SystemZ::MEEB }, |
27312 | 0 | { SystemZ::MEER, SystemZ::MEE }, |
27313 | 0 | { SystemZ::MER, SystemZ::ME }, |
27314 | 0 | { SystemZ::MLGR, SystemZ::MLG }, |
27315 | 0 | { SystemZ::MLR, SystemZ::ML }, |
27316 | 0 | { SystemZ::MR, SystemZ::M }, |
27317 | 0 | { SystemZ::MSDBR, SystemZ::MSDB }, |
27318 | 0 | { SystemZ::MSDR, SystemZ::MSD }, |
27319 | 0 | { SystemZ::MSEBR, SystemZ::MSEB }, |
27320 | 0 | { SystemZ::MSER, SystemZ::MSE }, |
27321 | 0 | { SystemZ::MSGFR, SystemZ::MSGF }, |
27322 | 0 | { SystemZ::MSGR, SystemZ::MSG }, |
27323 | 0 | { SystemZ::MSGRKC, SystemZ::MSGC_MemFoldPseudo }, |
27324 | 0 | { SystemZ::MSR, SystemZ::MS }, |
27325 | 0 | { SystemZ::MSRKC, SystemZ::MSC_MemFoldPseudo }, |
27326 | 0 | { SystemZ::MXDBR, SystemZ::MXDB }, |
27327 | 0 | { SystemZ::MXDR, SystemZ::MXD }, |
27328 | 0 | { SystemZ::MYHR, SystemZ::MYH }, |
27329 | 0 | { SystemZ::MYLR, SystemZ::MYL }, |
27330 | 0 | { SystemZ::MYR, SystemZ::MY }, |
27331 | 0 | { SystemZ::NGR, SystemZ::NG }, |
27332 | 0 | { SystemZ::NGRK, SystemZ::NG_MemFoldPseudo }, |
27333 | 0 | { SystemZ::NR, SystemZ::N }, |
27334 | 0 | { SystemZ::NRK, SystemZ::N_MemFoldPseudo }, |
27335 | 0 | { SystemZ::OGR, SystemZ::OG }, |
27336 | 0 | { SystemZ::OGRK, SystemZ::OG_MemFoldPseudo }, |
27337 | 0 | { SystemZ::OR, SystemZ::O }, |
27338 | 0 | { SystemZ::ORK, SystemZ::O_MemFoldPseudo }, |
27339 | 0 | { SystemZ::SDBR, SystemZ::SDB }, |
27340 | 0 | { SystemZ::SDR, SystemZ::SD }, |
27341 | 0 | { SystemZ::SEBR, SystemZ::SEB }, |
27342 | 0 | { SystemZ::SELGR, SystemZ::LOCG_MemFoldPseudo }, |
27343 | 0 | { SystemZ::SER, SystemZ::SE }, |
27344 | 0 | { SystemZ::SGFR, SystemZ::SGF }, |
27345 | 0 | { SystemZ::SGR, SystemZ::SG }, |
27346 | 0 | { SystemZ::SGRK, SystemZ::SG_MemFoldPseudo }, |
27347 | 0 | { SystemZ::SLBGR, SystemZ::SLBG }, |
27348 | 0 | { SystemZ::SLBR, SystemZ::SLB }, |
27349 | 0 | { SystemZ::SLGFR, SystemZ::SLGF }, |
27350 | 0 | { SystemZ::SLGR, SystemZ::SLG }, |
27351 | 0 | { SystemZ::SLGRK, SystemZ::SLG_MemFoldPseudo }, |
27352 | 0 | { SystemZ::SLR, SystemZ::SL }, |
27353 | 0 | { SystemZ::SLRK, SystemZ::SL_MemFoldPseudo }, |
27354 | 0 | { SystemZ::SQDBR, SystemZ::SQDB }, |
27355 | 0 | { SystemZ::SQDR, SystemZ::SQD }, |
27356 | 0 | { SystemZ::SQEBR, SystemZ::SQEB }, |
27357 | 0 | { SystemZ::SQER, SystemZ::SQE }, |
27358 | 0 | { SystemZ::SR, SystemZ::S }, |
27359 | 0 | { SystemZ::SRK, SystemZ::S_MemFoldPseudo }, |
27360 | 0 | { SystemZ::SUR, SystemZ::SU }, |
27361 | 0 | { SystemZ::SWR, SystemZ::SW }, |
27362 | 0 | { SystemZ::WFADB, SystemZ::ADB_MemFoldPseudo }, |
27363 | 0 | { SystemZ::WFASB, SystemZ::AEB_MemFoldPseudo }, |
27364 | 0 | { SystemZ::WFCDB, SystemZ::CDB }, |
27365 | 0 | { SystemZ::WFCSB, SystemZ::CEB }, |
27366 | 0 | { SystemZ::WFDDB, SystemZ::DDB_MemFoldPseudo }, |
27367 | 0 | { SystemZ::WFDSB, SystemZ::DEB_MemFoldPseudo }, |
27368 | 0 | { SystemZ::WFKDB, SystemZ::KDB }, |
27369 | 0 | { SystemZ::WFKSB, SystemZ::KEB }, |
27370 | 0 | { SystemZ::WFMADB, SystemZ::MADB_MemFoldPseudo }, |
27371 | 0 | { SystemZ::WFMASB, SystemZ::MAEB_MemFoldPseudo }, |
27372 | 0 | { SystemZ::WFMDB, SystemZ::MDB_MemFoldPseudo }, |
27373 | 0 | { SystemZ::WFMSB, SystemZ::MEEB_MemFoldPseudo }, |
27374 | 0 | { SystemZ::WFMSDB, SystemZ::MSDB_MemFoldPseudo }, |
27375 | 0 | { SystemZ::WFMSSB, SystemZ::MSEB_MemFoldPseudo }, |
27376 | 0 | { SystemZ::WFSDB, SystemZ::SDB_MemFoldPseudo }, |
27377 | 0 | { SystemZ::WFSQDB, SystemZ::SQDB }, |
27378 | 0 | { SystemZ::WFSQSB, SystemZ::SQEB }, |
27379 | 0 | { SystemZ::WFSSB, SystemZ::SEB_MemFoldPseudo }, |
27380 | 0 | { SystemZ::WLDEB, SystemZ::LDEB }, |
27381 | 0 | { SystemZ::XGR, SystemZ::XG }, |
27382 | 0 | { SystemZ::XGRK, SystemZ::XG_MemFoldPseudo }, |
27383 | 0 | { SystemZ::XR, SystemZ::X }, |
27384 | 0 | { SystemZ::XRK, SystemZ::X_MemFoldPseudo }, |
27385 | 0 | }; // End of getMemOpcodeTable |
27386 | |
|
27387 | 0 | unsigned mid; |
27388 | 0 | unsigned start = 0; |
27389 | 0 | unsigned end = 157; |
27390 | 0 | while (start < end) { |
27391 | 0 | mid = start + (end - start) / 2; |
27392 | 0 | if (Opcode == getMemOpcodeTable[mid][0]) { |
27393 | 0 | break; |
27394 | 0 | } |
27395 | 0 | if (Opcode < getMemOpcodeTable[mid][0]) |
27396 | 0 | end = mid; |
27397 | 0 | else |
27398 | 0 | start = mid + 1; |
27399 | 0 | } |
27400 | 0 | if (start == end) |
27401 | 0 | return -1; // Instruction doesn't exist in this table. |
27402 | | |
27403 | 0 | return getMemOpcodeTable[mid][1]; |
27404 | 0 | } |
27405 | | |
27406 | | // getTargetMemOpcode |
27407 | | LLVM_READONLY |
27408 | 0 | int getTargetMemOpcode(uint16_t Opcode) { |
27409 | 0 | static const uint16_t getTargetMemOpcodeTable[][2] = { |
27410 | 0 | { SystemZ::ADB_MemFoldPseudo, SystemZ::ADB }, |
27411 | 0 | { SystemZ::AEB_MemFoldPseudo, SystemZ::AEB }, |
27412 | 0 | { SystemZ::AG_MemFoldPseudo, SystemZ::AG }, |
27413 | 0 | { SystemZ::ALG_MemFoldPseudo, SystemZ::ALG }, |
27414 | 0 | { SystemZ::AL_MemFoldPseudo, SystemZ::AL }, |
27415 | 0 | { SystemZ::A_MemFoldPseudo, SystemZ::A }, |
27416 | 0 | { SystemZ::DDB_MemFoldPseudo, SystemZ::DDB }, |
27417 | 0 | { SystemZ::DEB_MemFoldPseudo, SystemZ::DEB }, |
27418 | 0 | { SystemZ::LOCG_MemFoldPseudo, SystemZ::LOCG }, |
27419 | 0 | { SystemZ::LOCMux_MemFoldPseudo, SystemZ::LOCMux }, |
27420 | 0 | { SystemZ::MADB_MemFoldPseudo, SystemZ::MADB }, |
27421 | 0 | { SystemZ::MAEB_MemFoldPseudo, SystemZ::MAEB }, |
27422 | 0 | { SystemZ::MDB_MemFoldPseudo, SystemZ::MDB }, |
27423 | 0 | { SystemZ::MEEB_MemFoldPseudo, SystemZ::MEEB }, |
27424 | 0 | { SystemZ::MSC_MemFoldPseudo, SystemZ::MSC }, |
27425 | 0 | { SystemZ::MSDB_MemFoldPseudo, SystemZ::MSDB }, |
27426 | 0 | { SystemZ::MSEB_MemFoldPseudo, SystemZ::MSEB }, |
27427 | 0 | { SystemZ::MSGC_MemFoldPseudo, SystemZ::MSGC }, |
27428 | 0 | { SystemZ::NG_MemFoldPseudo, SystemZ::NG }, |
27429 | 0 | { SystemZ::N_MemFoldPseudo, SystemZ::N }, |
27430 | 0 | { SystemZ::OG_MemFoldPseudo, SystemZ::OG }, |
27431 | 0 | { SystemZ::O_MemFoldPseudo, SystemZ::O }, |
27432 | 0 | { SystemZ::SDB_MemFoldPseudo, SystemZ::SDB }, |
27433 | 0 | { SystemZ::SEB_MemFoldPseudo, SystemZ::SEB }, |
27434 | 0 | { SystemZ::SG_MemFoldPseudo, SystemZ::SG }, |
27435 | 0 | { SystemZ::SLG_MemFoldPseudo, SystemZ::SLG }, |
27436 | 0 | { SystemZ::SL_MemFoldPseudo, SystemZ::SL }, |
27437 | 0 | { SystemZ::S_MemFoldPseudo, SystemZ::S }, |
27438 | 0 | { SystemZ::XG_MemFoldPseudo, SystemZ::XG }, |
27439 | 0 | { SystemZ::X_MemFoldPseudo, SystemZ::X }, |
27440 | 0 | }; // End of getTargetMemOpcodeTable |
27441 | |
|
27442 | 0 | unsigned mid; |
27443 | 0 | unsigned start = 0; |
27444 | 0 | unsigned end = 30; |
27445 | 0 | while (start < end) { |
27446 | 0 | mid = start + (end - start) / 2; |
27447 | 0 | if (Opcode == getTargetMemOpcodeTable[mid][0]) { |
27448 | 0 | break; |
27449 | 0 | } |
27450 | 0 | if (Opcode < getTargetMemOpcodeTable[mid][0]) |
27451 | 0 | end = mid; |
27452 | 0 | else |
27453 | 0 | start = mid + 1; |
27454 | 0 | } |
27455 | 0 | if (start == end) |
27456 | 0 | return -1; // Instruction doesn't exist in this table. |
27457 | | |
27458 | 0 | return getTargetMemOpcodeTable[mid][1]; |
27459 | 0 | } |
27460 | | |
27461 | | // getTwoOperandOpcode |
27462 | | LLVM_READONLY |
27463 | 0 | int getTwoOperandOpcode(uint16_t Opcode) { |
27464 | 0 | static const uint16_t getTwoOperandOpcodeTable[][2] = { |
27465 | 0 | { SystemZ::AHIMuxK, SystemZ::AHIMux }, |
27466 | 0 | { SystemZ::SELRMux, SystemZ::LOCRMux }, |
27467 | 0 | { SystemZ::AGHIK, SystemZ::AGHI }, |
27468 | 0 | { SystemZ::AGRK, SystemZ::AGR }, |
27469 | 0 | { SystemZ::AHIK, SystemZ::AHI }, |
27470 | 0 | { SystemZ::ALGRK, SystemZ::ALGR }, |
27471 | 0 | { SystemZ::ALRK, SystemZ::ALR }, |
27472 | 0 | { SystemZ::ARK, SystemZ::AR }, |
27473 | 0 | { SystemZ::NGRK, SystemZ::NGR }, |
27474 | 0 | { SystemZ::NRK, SystemZ::NR }, |
27475 | 0 | { SystemZ::OGRK, SystemZ::OGR }, |
27476 | 0 | { SystemZ::ORK, SystemZ::OR }, |
27477 | 0 | { SystemZ::SELFHR, SystemZ::LOCFHR }, |
27478 | 0 | { SystemZ::SELGR, SystemZ::LOCGR }, |
27479 | 0 | { SystemZ::SELR, SystemZ::LOCR }, |
27480 | 0 | { SystemZ::SGRK, SystemZ::SGR }, |
27481 | 0 | { SystemZ::SLAK, SystemZ::SLA }, |
27482 | 0 | { SystemZ::SLGRK, SystemZ::SLGR }, |
27483 | 0 | { SystemZ::SLLK, SystemZ::SLL }, |
27484 | 0 | { SystemZ::SLRK, SystemZ::SLR }, |
27485 | 0 | { SystemZ::SRAK, SystemZ::SRA }, |
27486 | 0 | { SystemZ::SRK, SystemZ::SR }, |
27487 | 0 | { SystemZ::SRLK, SystemZ::SRL }, |
27488 | 0 | { SystemZ::XGRK, SystemZ::XGR }, |
27489 | 0 | { SystemZ::XRK, SystemZ::XR }, |
27490 | 0 | }; // End of getTwoOperandOpcodeTable |
27491 | |
|
27492 | 0 | unsigned mid; |
27493 | 0 | unsigned start = 0; |
27494 | 0 | unsigned end = 25; |
27495 | 0 | while (start < end) { |
27496 | 0 | mid = start + (end - start) / 2; |
27497 | 0 | if (Opcode == getTwoOperandOpcodeTable[mid][0]) { |
27498 | 0 | break; |
27499 | 0 | } |
27500 | 0 | if (Opcode < getTwoOperandOpcodeTable[mid][0]) |
27501 | 0 | end = mid; |
27502 | 0 | else |
27503 | 0 | start = mid + 1; |
27504 | 0 | } |
27505 | 0 | if (start == end) |
27506 | 0 | return -1; // Instruction doesn't exist in this table. |
27507 | | |
27508 | 0 | return getTwoOperandOpcodeTable[mid][1]; |
27509 | 0 | } |
27510 | | |
27511 | | } // end namespace SystemZ |
27512 | | } // end namespace llvm |
27513 | | #endif // GET_INSTRMAP_INFO |
27514 | | |