/src/build/lib/Target/WebAssembly/WebAssemblyGenAsmWriter.inc
Line | Count | Source (jump to first uncovered line) |
1 | | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
2 | | |* *| |
3 | | |* Assembly Writer Source Fragment *| |
4 | | |* *| |
5 | | |* Automatically generated file, do not edit! *| |
6 | | |* From: WebAssembly.td *| |
7 | | |* *| |
8 | | \*===----------------------------------------------------------------------===*/ |
9 | | |
10 | | /// getMnemonic - This method is automatically generated by tablegen |
11 | | /// from the instruction set description. |
12 | 0 | std::pair<const char *, uint64_t> WebAssemblyInstPrinter::getMnemonic(const MCInst *MI) { |
13 | |
|
14 | 0 | #ifdef __GNUC__ |
15 | 0 | #pragma GCC diagnostic push |
16 | 0 | #pragma GCC diagnostic ignored "-Woverlength-strings" |
17 | 0 | #endif |
18 | 0 | static const char AsmStrs[] = { |
19 | 0 | /* 0 */ "br \t\0" |
20 | 0 | /* 10 */ "try \t\0" |
21 | 0 | /* 20 */ "if \t\0" |
22 | 0 | /* 28 */ "return_call \t\0" |
23 | 0 | /* 45 */ "loop \t\0" |
24 | 0 | /* 55 */ "br_if \t\0" |
25 | 0 | /* 65 */ "catch \t\0" |
26 | 0 | /* 75 */ "block \t\0" |
27 | 0 | /* 85 */ "throw \t\0" |
28 | 0 | /* 95 */ "f32.ge \t\0" |
29 | 0 | /* 105 */ "f64.ge \t\0" |
30 | 0 | /* 115 */ "f32.le \t\0" |
31 | 0 | /* 125 */ "f64.le \t\0" |
32 | 0 | /* 135 */ "f32.ne \t\0" |
33 | 0 | /* 145 */ "i32.ne \t\0" |
34 | 0 | /* 155 */ "f64.ne \t\0" |
35 | 0 | /* 165 */ "i64.ne \t\0" |
36 | 0 | /* 175 */ "f32.eq \t\0" |
37 | 0 | /* 185 */ "i32.eq \t\0" |
38 | 0 | /* 195 */ "f64.eq \t\0" |
39 | 0 | /* 205 */ "i64.eq \t\0" |
40 | 0 | /* 215 */ "i32.or \t\0" |
41 | 0 | /* 225 */ "i64.or \t\0" |
42 | 0 | /* 235 */ "f32.gt \t\0" |
43 | 0 | /* 245 */ "f64.gt \t\0" |
44 | 0 | /* 255 */ "f32.lt \t\0" |
45 | 0 | /* 265 */ "f64.lt \t\0" |
46 | 0 | /* 275 */ "memory.atomic.wait32 \t\0" |
47 | 0 | /* 298 */ "memory.atomic.wait64 \t\0" |
48 | 0 | /* 321 */ "f32.sub \t\0" |
49 | 0 | /* 331 */ "i32.sub \t\0" |
50 | 0 | /* 341 */ "f64.sub \t\0" |
51 | 0 | /* 351 */ "i64.sub \t\0" |
52 | 0 | /* 361 */ "f32.add \t\0" |
53 | 0 | /* 371 */ "i32.add \t\0" |
54 | 0 | /* 381 */ "f64.add \t\0" |
55 | 0 | /* 391 */ "i64.add \t\0" |
56 | 0 | /* 401 */ "i32.and \t\0" |
57 | 0 | /* 411 */ "i64.and \t\0" |
58 | 0 | /* 421 */ "br_table \t\0" |
59 | 0 | /* 432 */ "f32.neg \t\0" |
60 | 0 | /* 442 */ "f64.neg \t\0" |
61 | 0 | /* 452 */ "i32.shl \t\0" |
62 | 0 | /* 462 */ "i64.shl \t\0" |
63 | 0 | /* 472 */ "f32.mul \t\0" |
64 | 0 | /* 482 */ "i32.mul \t\0" |
65 | 0 | /* 492 */ "f64.mul \t\0" |
66 | 0 | /* 502 */ "i64.mul \t\0" |
67 | 0 | /* 512 */ "f32.min \t\0" |
68 | 0 | /* 522 */ "f64.min \t\0" |
69 | 0 | /* 532 */ "i32.xor \t\0" |
70 | 0 | /* 542 */ "i64.xor \t\0" |
71 | 0 | /* 552 */ "f32.abs \t\0" |
72 | 0 | /* 562 */ "f64.abs \t\0" |
73 | 0 | /* 572 */ "f32.div \t\0" |
74 | 0 | /* 582 */ "f64.div \t\0" |
75 | 0 | /* 592 */ "rethrow \t\0" |
76 | 0 | /* 602 */ "f32.max \t\0" |
77 | 0 | /* 612 */ "f64.max \t\0" |
78 | 0 | /* 622 */ "memory.atomic.notify \t\0" |
79 | 0 | /* 645 */ "i32.clz \t\0" |
80 | 0 | /* 655 */ "i64.clz \t\0" |
81 | 0 | /* 665 */ "i32.eqz \t\0" |
82 | 0 | /* 675 */ "i64.eqz \t\0" |
83 | 0 | /* 685 */ "i32.ctz \t\0" |
84 | 0 | /* 695 */ "i64.ctz \t\0" |
85 | 0 | /* 705 */ "i64.store32\t\0" |
86 | 0 | /* 718 */ "i64.atomic.store32\t\0" |
87 | 0 | /* 738 */ "f32x4.relaxed_dot_bf16x8_add_f32\t\0" |
88 | 0 | /* 772 */ "f64.promote_f32\t\0" |
89 | 0 | /* 789 */ "i32.reinterpret_f32\t\0" |
90 | 0 | /* 810 */ "f32.reinterpret_i32\t\0" |
91 | 0 | /* 831 */ "f32.demote_f64\t\0" |
92 | 0 | /* 847 */ "i64.reinterpret_f64\t\0" |
93 | 0 | /* 868 */ "i32.wrap_i64\t\0" |
94 | 0 | /* 882 */ "f64.reinterpret_i64\t\0" |
95 | 0 | /* 903 */ "f64x2.promote_low_f32x4\t\0" |
96 | 0 | /* 928 */ "i32.store16\t\0" |
97 | 0 | /* 941 */ "i64.store16\t\0" |
98 | 0 | /* 954 */ "i32.atomic.store16\t\0" |
99 | 0 | /* 974 */ "i64.atomic.store16\t\0" |
100 | 0 | /* 994 */ "i32.store8\t\0" |
101 | 0 | /* 1006 */ "i64.store8\t\0" |
102 | 0 | /* 1018 */ "i32.atomic.store8\t\0" |
103 | 0 | /* 1037 */ "i64.atomic.store8\t\0" |
104 | 0 | /* 1056 */ "f64x2.sub\t\0" |
105 | 0 | /* 1067 */ "i64x2.sub\t\0" |
106 | 0 | /* 1078 */ "f32x4.sub\t\0" |
107 | 0 | /* 1089 */ "i32x4.sub\t\0" |
108 | 0 | /* 1100 */ "i8x16.sub\t\0" |
109 | 0 | /* 1111 */ "i16x8.sub\t\0" |
110 | 0 | /* 1122 */ "i32.atomic.rmw.sub\t\0" |
111 | 0 | /* 1142 */ "i64.atomic.rmw.sub\t\0" |
112 | 0 | /* 1162 */ "f32.trunc\t\0" |
113 | 0 | /* 1173 */ "f64x2.trunc\t\0" |
114 | 0 | /* 1186 */ "f64.trunc\t\0" |
115 | 0 | /* 1197 */ "f32x4.trunc\t\0" |
116 | 0 | /* 1210 */ "f32.load\t\0" |
117 | 0 | /* 1220 */ "i32.load\t\0" |
118 | 0 | /* 1230 */ "f64.load\t\0" |
119 | 0 | /* 1240 */ "i64.load\t\0" |
120 | 0 | /* 1250 */ "v128.load\t\0" |
121 | 0 | /* 1261 */ "i32.atomic.load\t\0" |
122 | 0 | /* 1278 */ "i64.atomic.load\t\0" |
123 | 0 | /* 1295 */ "f64x2.add\t\0" |
124 | 0 | /* 1306 */ "i64x2.add\t\0" |
125 | 0 | /* 1317 */ "f32x4.add\t\0" |
126 | 0 | /* 1328 */ "i32x4.add\t\0" |
127 | 0 | /* 1339 */ "i8x16.add\t\0" |
128 | 0 | /* 1350 */ "i16x8.add\t\0" |
129 | 0 | /* 1361 */ "i32.atomic.rmw.add\t\0" |
130 | 0 | /* 1381 */ "i64.atomic.rmw.add\t\0" |
131 | 0 | /* 1401 */ "f64x2.relaxed_madd\t\0" |
132 | 0 | /* 1421 */ "f32x4.relaxed_madd\t\0" |
133 | 0 | /* 1441 */ "f64x2.relaxed_nmadd\t\0" |
134 | 0 | /* 1462 */ "f32x4.relaxed_nmadd\t\0" |
135 | 0 | /* 1483 */ "v128.and\t\0" |
136 | 0 | /* 1493 */ "i32.atomic.rmw.and\t\0" |
137 | 0 | /* 1513 */ "i64.atomic.rmw.and\t\0" |
138 | 0 | /* 1533 */ "local.tee\t\0" |
139 | 0 | /* 1544 */ "f64x2.ge\t\0" |
140 | 0 | /* 1554 */ "f32x4.ge\t\0" |
141 | 0 | /* 1564 */ "f64x2.le\t\0" |
142 | 0 | /* 1574 */ "f32x4.le\t\0" |
143 | 0 | /* 1584 */ "i8x16.shuffle\t\0" |
144 | 0 | /* 1599 */ "i8x16.swizzle\t\0" |
145 | 0 | /* 1614 */ "i8x16.relaxed_swizzle\t\0" |
146 | 0 | /* 1637 */ "f64x2.ne\t\0" |
147 | 0 | /* 1647 */ "i64x2.ne\t\0" |
148 | 0 | /* 1657 */ "f32x4.ne\t\0" |
149 | 0 | /* 1667 */ "i32x4.ne\t\0" |
150 | 0 | /* 1677 */ "i8x16.ne\t\0" |
151 | 0 | /* 1687 */ "i16x8.ne\t\0" |
152 | 0 | /* 1697 */ "v128.load32_lane\t\0" |
153 | 0 | /* 1715 */ "v128.store32_lane\t\0" |
154 | 0 | /* 1734 */ "v128.load64_lane\t\0" |
155 | 0 | /* 1752 */ "v128.store64_lane\t\0" |
156 | 0 | /* 1771 */ "v128.load16_lane\t\0" |
157 | 0 | /* 1789 */ "v128.store16_lane\t\0" |
158 | 0 | /* 1808 */ "v128.load8_lane\t\0" |
159 | 0 | /* 1825 */ "v128.store8_lane\t\0" |
160 | 0 | /* 1843 */ "f64x2.replace_lane\t\0" |
161 | 0 | /* 1863 */ "i64x2.replace_lane\t\0" |
162 | 0 | /* 1883 */ "f32x4.replace_lane\t\0" |
163 | 0 | /* 1903 */ "i32x4.replace_lane\t\0" |
164 | 0 | /* 1923 */ "i8x16.replace_lane\t\0" |
165 | 0 | /* 1943 */ "i16x8.replace_lane\t\0" |
166 | 0 | /* 1963 */ "f64x2.extract_lane\t\0" |
167 | 0 | /* 1983 */ "i64x2.extract_lane\t\0" |
168 | 0 | /* 2003 */ "f32x4.extract_lane\t\0" |
169 | 0 | /* 2023 */ "i32x4.extract_lane\t\0" |
170 | 0 | /* 2043 */ "f32.store\t\0" |
171 | 0 | /* 2054 */ "i32.store\t\0" |
172 | 0 | /* 2065 */ "f64.store\t\0" |
173 | 0 | /* 2076 */ "i64.store\t\0" |
174 | 0 | /* 2087 */ "v128.store\t\0" |
175 | 0 | /* 2099 */ "i32.atomic.store\t\0" |
176 | 0 | /* 2117 */ "i64.atomic.store\t\0" |
177 | 0 | /* 2135 */ "i64x2.all_true\t\0" |
178 | 0 | /* 2151 */ "i32x4.all_true\t\0" |
179 | 0 | /* 2167 */ "i8x16.all_true\t\0" |
180 | 0 | /* 2183 */ "i16x8.all_true\t\0" |
181 | 0 | /* 2199 */ "v128.any_true\t\0" |
182 | 0 | /* 2214 */ "table.size\t\0" |
183 | 0 | /* 2226 */ "memory.size\t\0" |
184 | 0 | /* 2239 */ "f64x2.neg\t\0" |
185 | 0 | /* 2250 */ "i64x2.neg\t\0" |
186 | 0 | /* 2261 */ "f32x4.neg\t\0" |
187 | 0 | /* 2272 */ "i32x4.neg\t\0" |
188 | 0 | /* 2283 */ "i8x16.neg\t\0" |
189 | 0 | /* 2294 */ "i16x8.neg\t\0" |
190 | 0 | /* 2305 */ "i32.atomic.rmw.xchg\t\0" |
191 | 0 | /* 2326 */ "i64.atomic.rmw.xchg\t\0" |
192 | 0 | /* 2347 */ "i32.atomic.rmw.cmpxchg\t\0" |
193 | 0 | /* 2371 */ "i64.atomic.rmw.cmpxchg\t\0" |
194 | 0 | /* 2395 */ "i64x2.bitmask\t\0" |
195 | 0 | /* 2410 */ "i32x4.bitmask\t\0" |
196 | 0 | /* 2425 */ "i8x16.bitmask\t\0" |
197 | 0 | /* 2440 */ "i16x8.bitmask\t\0" |
198 | 0 | /* 2455 */ "i64x2.shl\t\0" |
199 | 0 | /* 2466 */ "i32x4.shl\t\0" |
200 | 0 | /* 2477 */ "i8x16.shl\t\0" |
201 | 0 | /* 2488 */ "i16x8.shl\t\0" |
202 | 0 | /* 2499 */ "f32.ceil\t\0" |
203 | 0 | /* 2509 */ "f64x2.ceil\t\0" |
204 | 0 | /* 2521 */ "f64.ceil\t\0" |
205 | 0 | /* 2531 */ "f32x4.ceil\t\0" |
206 | 0 | /* 2543 */ "return_call\t\0" |
207 | 0 | /* 2556 */ "table.fill\t\0" |
208 | 0 | /* 2568 */ "memory.fill\t\0" |
209 | 0 | /* 2581 */ "ref.is_null\t\0" |
210 | 0 | /* 2594 */ "i32.rotl\t\0" |
211 | 0 | /* 2604 */ "i64.rotl\t\0" |
212 | 0 | /* 2614 */ "f64x2.mul\t\0" |
213 | 0 | /* 2625 */ "i64x2.mul\t\0" |
214 | 0 | /* 2636 */ "f32x4.mul\t\0" |
215 | 0 | /* 2647 */ "i32x4.mul\t\0" |
216 | 0 | /* 2658 */ "i16x8.mul\t\0" |
217 | 0 | /* 2669 */ "f32.copysign\t\0" |
218 | 0 | /* 2683 */ "f64.copysign\t\0" |
219 | 0 | /* 2697 */ "f64x2.min\t\0" |
220 | 0 | /* 2708 */ "f32x4.min\t\0" |
221 | 0 | /* 2719 */ "f64x2.relaxed_min\t\0" |
222 | 0 | /* 2738 */ "f32x4.relaxed_min\t\0" |
223 | 0 | /* 2757 */ "f64x2.pmin\t\0" |
224 | 0 | /* 2769 */ "f32x4.pmin\t\0" |
225 | 0 | /* 2781 */ "v128.load32_zero\t\0" |
226 | 0 | /* 2799 */ "f32x4.demote_f64x2_zero\t\0" |
227 | 0 | /* 2824 */ "v128.load64_zero\t\0" |
228 | 0 | /* 2842 */ "i32x4.relaxed_trunc_f64x2_s_zero\t\0" |
229 | 0 | /* 2876 */ "i32x4.trunc_sat_f64x2_s_zero\t\0" |
230 | 0 | /* 2906 */ "i32x4.relaxed_trunc_f64x2_u_zero\t\0" |
231 | 0 | /* 2940 */ "i32x4.trunc_sat_f64x2_u_zero\t\0" |
232 | 0 | /* 2970 */ "data.drop\t\0" |
233 | 0 | /* 2981 */ "f64x2.eq\t\0" |
234 | 0 | /* 2991 */ "i64x2.eq\t\0" |
235 | 0 | /* 3001 */ "f32x4.eq\t\0" |
236 | 0 | /* 3011 */ "i32x4.eq\t\0" |
237 | 0 | /* 3021 */ "i8x16.eq\t\0" |
238 | 0 | /* 3031 */ "i16x8.eq\t\0" |
239 | 0 | /* 3041 */ "v128.or\t\0" |
240 | 0 | /* 3050 */ "i32.atomic.rmw.or\t\0" |
241 | 0 | /* 3069 */ "i64.atomic.rmw.or\t\0" |
242 | 0 | /* 3088 */ "f32.floor\t\0" |
243 | 0 | /* 3099 */ "f64x2.floor\t\0" |
244 | 0 | /* 3112 */ "f64.floor\t\0" |
245 | 0 | /* 3123 */ "f32x4.floor\t\0" |
246 | 0 | /* 3136 */ "v128.xor\t\0" |
247 | 0 | /* 3146 */ "i32.atomic.rmw.xor\t\0" |
248 | 0 | /* 3166 */ "i64.atomic.rmw.xor\t\0" |
249 | 0 | /* 3186 */ "i32.rotr\t\0" |
250 | 0 | /* 3196 */ "i64.rotr\t\0" |
251 | 0 | /* 3206 */ "i64.load32_s\t\0" |
252 | 0 | /* 3220 */ "i64.extend32_s\t\0" |
253 | 0 | /* 3236 */ "i32.trunc_f32_s\t\0" |
254 | 0 | /* 3253 */ "i64.trunc_f32_s\t\0" |
255 | 0 | /* 3270 */ "i32.trunc_sat_f32_s\t\0" |
256 | 0 | /* 3291 */ "i64.trunc_sat_f32_s\t\0" |
257 | 0 | /* 3312 */ "i64.extend_i32_s\t\0" |
258 | 0 | /* 3330 */ "f32.convert_i32_s\t\0" |
259 | 0 | /* 3349 */ "f64.convert_i32_s\t\0" |
260 | 0 | /* 3368 */ "i64x2.load32x2_s\t\0" |
261 | 0 | /* 3386 */ "i32.trunc_f64_s\t\0" |
262 | 0 | /* 3403 */ "i64.trunc_f64_s\t\0" |
263 | 0 | /* 3420 */ "i32.trunc_sat_f64_s\t\0" |
264 | 0 | /* 3441 */ "i64.trunc_sat_f64_s\t\0" |
265 | 0 | /* 3462 */ "f32.convert_i64_s\t\0" |
266 | 0 | /* 3481 */ "f64.convert_i64_s\t\0" |
267 | 0 | /* 3500 */ "i32x4.relaxed_trunc_f32x4_s\t\0" |
268 | 0 | /* 3529 */ "i32x4.trunc_sat_f32x4_s\t\0" |
269 | 0 | /* 3554 */ "i64x2.extend_high_i32x4_s\t\0" |
270 | 0 | /* 3581 */ "i64x2.extmul_high_i32x4_s\t\0" |
271 | 0 | /* 3608 */ "f32x4.convert_i32x4_s\t\0" |
272 | 0 | /* 3631 */ "i64x2.extend_low_i32x4_s\t\0" |
273 | 0 | /* 3657 */ "i64x2.extmul_low_i32x4_s\t\0" |
274 | 0 | /* 3683 */ "f64x2.convert_low_i32x4_s\t\0" |
275 | 0 | /* 3710 */ "i16x8.narrow_i32x4_s\t\0" |
276 | 0 | /* 3732 */ "i32x4.load16x4_s\t\0" |
277 | 0 | /* 3750 */ "i32.load16_s\t\0" |
278 | 0 | /* 3764 */ "i64.load16_s\t\0" |
279 | 0 | /* 3778 */ "i32.extend16_s\t\0" |
280 | 0 | /* 3794 */ "i64.extend16_s\t\0" |
281 | 0 | /* 3810 */ "i16x8.relaxed_dot_i8x16_i7x16_s\t\0" |
282 | 0 | /* 3843 */ "i16x8.extadd_pairwise_i8x16_s\t\0" |
283 | 0 | /* 3874 */ "i16x8.extend_high_i8x16_s\t\0" |
284 | 0 | /* 3901 */ "i16x8.extmul_high_i8x16_s\t\0" |
285 | 0 | /* 3928 */ "i16x8.extend_low_i8x16_s\t\0" |
286 | 0 | /* 3954 */ "i16x8.extmul_low_i8x16_s\t\0" |
287 | 0 | /* 3980 */ "i32.load8_s\t\0" |
288 | 0 | /* 3993 */ "i64.load8_s\t\0" |
289 | 0 | /* 4006 */ "i32.extend8_s\t\0" |
290 | 0 | /* 4021 */ "i64.extend8_s\t\0" |
291 | 0 | /* 4036 */ "i32x4.extadd_pairwise_i16x8_s\t\0" |
292 | 0 | /* 4067 */ "i32x4.extend_high_i16x8_s\t\0" |
293 | 0 | /* 4094 */ "i32x4.extmul_high_i16x8_s\t\0" |
294 | 0 | /* 4121 */ "i32x4.dot_i16x8_s\t\0" |
295 | 0 | /* 4140 */ "i32x4.extend_low_i16x8_s\t\0" |
296 | 0 | /* 4166 */ "i32x4.extmul_low_i16x8_s\t\0" |
297 | 0 | /* 4192 */ "i8x16.narrow_i16x8_s\t\0" |
298 | 0 | /* 4214 */ "i16x8.load8x8_s\t\0" |
299 | 0 | /* 4231 */ "i32x4.relaxed_dot_i8x16_i7x16_add_s\t\0" |
300 | 0 | /* 4268 */ "i32.ge_s\t\0" |
301 | 0 | /* 4278 */ "i64x2.ge_s\t\0" |
302 | 0 | /* 4290 */ "i64.ge_s\t\0" |
303 | 0 | /* 4300 */ "i32x4.ge_s\t\0" |
304 | 0 | /* 4312 */ "i8x16.ge_s\t\0" |
305 | 0 | /* 4324 */ "i16x8.ge_s\t\0" |
306 | 0 | /* 4336 */ "i32.le_s\t\0" |
307 | 0 | /* 4346 */ "i64x2.le_s\t\0" |
308 | 0 | /* 4358 */ "i64.le_s\t\0" |
309 | 0 | /* 4368 */ "i32x4.le_s\t\0" |
310 | 0 | /* 4380 */ "i8x16.le_s\t\0" |
311 | 0 | /* 4392 */ "i16x8.le_s\t\0" |
312 | 0 | /* 4404 */ "i8x16.extract_lane_s\t\0" |
313 | 0 | /* 4426 */ "i16x8.extract_lane_s\t\0" |
314 | 0 | /* 4448 */ "i32.rem_s\t\0" |
315 | 0 | /* 4459 */ "i64.rem_s\t\0" |
316 | 0 | /* 4470 */ "i32x4.min_s\t\0" |
317 | 0 | /* 4483 */ "i8x16.min_s\t\0" |
318 | 0 | /* 4496 */ "i16x8.min_s\t\0" |
319 | 0 | /* 4509 */ "i32.shr_s\t\0" |
320 | 0 | /* 4520 */ "i64x2.shr_s\t\0" |
321 | 0 | /* 4533 */ "i64.shr_s\t\0" |
322 | 0 | /* 4544 */ "i32x4.shr_s\t\0" |
323 | 0 | /* 4557 */ "i8x16.shr_s\t\0" |
324 | 0 | /* 4570 */ "i16x8.shr_s\t\0" |
325 | 0 | /* 4583 */ "i16x8.relaxed_q15mulr_s\t\0" |
326 | 0 | /* 4608 */ "i8x16.sub_sat_s\t\0" |
327 | 0 | /* 4625 */ "i16x8.sub_sat_s\t\0" |
328 | 0 | /* 4642 */ "i8x16.add_sat_s\t\0" |
329 | 0 | /* 4659 */ "i16x8.add_sat_s\t\0" |
330 | 0 | /* 4676 */ "i16x8.q15mulr_sat_s\t\0" |
331 | 0 | /* 4697 */ "i32.gt_s\t\0" |
332 | 0 | /* 4707 */ "i64x2.gt_s\t\0" |
333 | 0 | /* 4719 */ "i64.gt_s\t\0" |
334 | 0 | /* 4729 */ "i32x4.gt_s\t\0" |
335 | 0 | /* 4741 */ "i8x16.gt_s\t\0" |
336 | 0 | /* 4753 */ "i16x8.gt_s\t\0" |
337 | 0 | /* 4765 */ "i32.lt_s\t\0" |
338 | 0 | /* 4775 */ "i64x2.lt_s\t\0" |
339 | 0 | /* 4787 */ "i64.lt_s\t\0" |
340 | 0 | /* 4797 */ "i32x4.lt_s\t\0" |
341 | 0 | /* 4809 */ "i8x16.lt_s\t\0" |
342 | 0 | /* 4821 */ "i16x8.lt_s\t\0" |
343 | 0 | /* 4833 */ "i32.div_s\t\0" |
344 | 0 | /* 4844 */ "i64.div_s\t\0" |
345 | 0 | /* 4855 */ "i32x4.max_s\t\0" |
346 | 0 | /* 4868 */ "i8x16.max_s\t\0" |
347 | 0 | /* 4881 */ "i16x8.max_s\t\0" |
348 | 0 | /* 4894 */ "f64x2.abs\t\0" |
349 | 0 | /* 4905 */ "i64x2.abs\t\0" |
350 | 0 | /* 4916 */ "f32x4.abs\t\0" |
351 | 0 | /* 4927 */ "i32x4.abs\t\0" |
352 | 0 | /* 4938 */ "i8x16.abs\t\0" |
353 | 0 | /* 4949 */ "i16x8.abs\t\0" |
354 | 0 | /* 4960 */ "call_params\t\0" |
355 | 0 | /* 4973 */ "f64x2.splat\t\0" |
356 | 0 | /* 4986 */ "i64x2.splat\t\0" |
357 | 0 | /* 4999 */ "f32x4.splat\t\0" |
358 | 0 | /* 5012 */ "i32x4.splat\t\0" |
359 | 0 | /* 5025 */ "i8x16.splat\t\0" |
360 | 0 | /* 5038 */ "i16x8.splat\t\0" |
361 | 0 | /* 5051 */ "v128.load32_splat\t\0" |
362 | 0 | /* 5070 */ "v128.load64_splat\t\0" |
363 | 0 | /* 5089 */ "v128.load16_splat\t\0" |
364 | 0 | /* 5108 */ "v128.load8_splat\t\0" |
365 | 0 | /* 5126 */ "f32.select\t\0" |
366 | 0 | /* 5138 */ "i32.select\t\0" |
367 | 0 | /* 5150 */ "f64.select\t\0" |
368 | 0 | /* 5162 */ "i64.select\t\0" |
369 | 0 | /* 5174 */ "v128.select\t\0" |
370 | 0 | /* 5187 */ "funcref.select\t\0" |
371 | 0 | /* 5203 */ "externref.select\t\0" |
372 | 0 | /* 5221 */ "i64x2.relaxed_laneselect\t\0" |
373 | 0 | /* 5247 */ "i32x4.relaxed_laneselect\t\0" |
374 | 0 | /* 5273 */ "i8x16.relaxed_laneselect\t\0" |
375 | 0 | /* 5299 */ "i16x8.relaxed_laneselect\t\0" |
376 | 0 | /* 5325 */ "v128.bitselect\t\0" |
377 | 0 | /* 5341 */ "return_call_indirect\t\0" |
378 | 0 | /* 5363 */ "table.get\t\0" |
379 | 0 | /* 5374 */ "global.get\t\0" |
380 | 0 | /* 5386 */ "local.get\t\0" |
381 | 0 | /* 5397 */ "table.set\t\0" |
382 | 0 | /* 5408 */ "global.set\t\0" |
383 | 0 | /* 5420 */ "local.set\t\0" |
384 | 0 | /* 5431 */ "f64x2.gt\t\0" |
385 | 0 | /* 5441 */ "f32x4.gt\t\0" |
386 | 0 | /* 5451 */ "memory.init\t\0" |
387 | 0 | /* 5464 */ "f64x2.lt\t\0" |
388 | 0 | /* 5474 */ "f32x4.lt\t\0" |
389 | 0 | /* 5484 */ "i32.popcnt\t\0" |
390 | 0 | /* 5496 */ "i64.popcnt\t\0" |
391 | 0 | /* 5508 */ "i8x16.popcnt\t\0" |
392 | 0 | /* 5522 */ "v128.not\t\0" |
393 | 0 | /* 5532 */ "v128.andnot\t\0" |
394 | 0 | /* 5545 */ "f32.sqrt\t\0" |
395 | 0 | /* 5555 */ "f64x2.sqrt\t\0" |
396 | 0 | /* 5567 */ "f64.sqrt\t\0" |
397 | 0 | /* 5577 */ "f32x4.sqrt\t\0" |
398 | 0 | /* 5589 */ "f32.nearest\t\0" |
399 | 0 | /* 5602 */ "f64x2.nearest\t\0" |
400 | 0 | /* 5617 */ "f64.nearest\t\0" |
401 | 0 | /* 5630 */ "f32x4.nearest\t\0" |
402 | 0 | /* 5645 */ "f32.const\t\0" |
403 | 0 | /* 5656 */ "i32.const\t\0" |
404 | 0 | /* 5667 */ "f64.const\t\0" |
405 | 0 | /* 5678 */ "i64.const\t\0" |
406 | 0 | /* 5689 */ "v128.const\t\0" |
407 | 0 | /* 5701 */ "i64.load32_u\t\0" |
408 | 0 | /* 5715 */ "i64.atomic.load32_u\t\0" |
409 | 0 | /* 5736 */ "i32.trunc_f32_u\t\0" |
410 | 0 | /* 5753 */ "i64.trunc_f32_u\t\0" |
411 | 0 | /* 5770 */ "i32.trunc_sat_f32_u\t\0" |
412 | 0 | /* 5791 */ "i64.trunc_sat_f32_u\t\0" |
413 | 0 | /* 5812 */ "i64.extend_i32_u\t\0" |
414 | 0 | /* 5830 */ "f32.convert_i32_u\t\0" |
415 | 0 | /* 5849 */ "f64.convert_i32_u\t\0" |
416 | 0 | /* 5868 */ "i64x2.load32x2_u\t\0" |
417 | 0 | /* 5886 */ "i32.trunc_f64_u\t\0" |
418 | 0 | /* 5903 */ "i64.trunc_f64_u\t\0" |
419 | 0 | /* 5920 */ "i32.trunc_sat_f64_u\t\0" |
420 | 0 | /* 5941 */ "i64.trunc_sat_f64_u\t\0" |
421 | 0 | /* 5962 */ "f32.convert_i64_u\t\0" |
422 | 0 | /* 5981 */ "f64.convert_i64_u\t\0" |
423 | 0 | /* 6000 */ "i32x4.relaxed_trunc_f32x4_u\t\0" |
424 | 0 | /* 6029 */ "i32x4.trunc_sat_f32x4_u\t\0" |
425 | 0 | /* 6054 */ "i64x2.extend_high_i32x4_u\t\0" |
426 | 0 | /* 6081 */ "i64x2.extmul_high_i32x4_u\t\0" |
427 | 0 | /* 6108 */ "f32x4.convert_i32x4_u\t\0" |
428 | 0 | /* 6131 */ "i64x2.extend_low_i32x4_u\t\0" |
429 | 0 | /* 6157 */ "i64x2.extmul_low_i32x4_u\t\0" |
430 | 0 | /* 6183 */ "f64x2.convert_low_i32x4_u\t\0" |
431 | 0 | /* 6210 */ "i16x8.narrow_i32x4_u\t\0" |
432 | 0 | /* 6232 */ "i32x4.load16x4_u\t\0" |
433 | 0 | /* 6250 */ "i32.load16_u\t\0" |
434 | 0 | /* 6264 */ "i64.load16_u\t\0" |
435 | 0 | /* 6278 */ "i32.atomic.load16_u\t\0" |
436 | 0 | /* 6299 */ "i64.atomic.load16_u\t\0" |
437 | 0 | /* 6320 */ "i16x8.extadd_pairwise_i8x16_u\t\0" |
438 | 0 | /* 6351 */ "i16x8.extend_high_i8x16_u\t\0" |
439 | 0 | /* 6378 */ "i16x8.extmul_high_i8x16_u\t\0" |
440 | 0 | /* 6405 */ "i16x8.extend_low_i8x16_u\t\0" |
441 | 0 | /* 6431 */ "i16x8.extmul_low_i8x16_u\t\0" |
442 | 0 | /* 6457 */ "i32.load8_u\t\0" |
443 | 0 | /* 6470 */ "i64.load8_u\t\0" |
444 | 0 | /* 6483 */ "i32.atomic.load8_u\t\0" |
445 | 0 | /* 6503 */ "i64.atomic.load8_u\t\0" |
446 | 0 | /* 6523 */ "i32x4.extadd_pairwise_i16x8_u\t\0" |
447 | 0 | /* 6554 */ "i32x4.extend_high_i16x8_u\t\0" |
448 | 0 | /* 6581 */ "i32x4.extmul_high_i16x8_u\t\0" |
449 | 0 | /* 6608 */ "i32x4.extend_low_i16x8_u\t\0" |
450 | 0 | /* 6634 */ "i32x4.extmul_low_i16x8_u\t\0" |
451 | 0 | /* 6660 */ "i8x16.narrow_i16x8_u\t\0" |
452 | 0 | /* 6682 */ "i16x8.load8x8_u\t\0" |
453 | 0 | /* 6699 */ "i64.atomic.rmw32.sub_u\t\0" |
454 | 0 | /* 6723 */ "i32.atomic.rmw16.sub_u\t\0" |
455 | 0 | /* 6747 */ "i64.atomic.rmw16.sub_u\t\0" |
456 | 0 | /* 6771 */ "i32.atomic.rmw8.sub_u\t\0" |
457 | 0 | /* 6794 */ "i64.atomic.rmw8.sub_u\t\0" |
458 | 0 | /* 6817 */ "i64.atomic.rmw32.add_u\t\0" |
459 | 0 | /* 6841 */ "i32.atomic.rmw16.add_u\t\0" |
460 | 0 | /* 6865 */ "i64.atomic.rmw16.add_u\t\0" |
461 | 0 | /* 6889 */ "i32.atomic.rmw8.add_u\t\0" |
462 | 0 | /* 6912 */ "i64.atomic.rmw8.add_u\t\0" |
463 | 0 | /* 6935 */ "i64.atomic.rmw32.and_u\t\0" |
464 | 0 | /* 6959 */ "i32.atomic.rmw16.and_u\t\0" |
465 | 0 | /* 6983 */ "i64.atomic.rmw16.and_u\t\0" |
466 | 0 | /* 7007 */ "i32.atomic.rmw8.and_u\t\0" |
467 | 0 | /* 7030 */ "i64.atomic.rmw8.and_u\t\0" |
468 | 0 | /* 7053 */ "i32.ge_u\t\0" |
469 | 0 | /* 7063 */ "i64.ge_u\t\0" |
470 | 0 | /* 7073 */ "i32x4.ge_u\t\0" |
471 | 0 | /* 7085 */ "i8x16.ge_u\t\0" |
472 | 0 | /* 7097 */ "i16x8.ge_u\t\0" |
473 | 0 | /* 7109 */ "i32.le_u\t\0" |
474 | 0 | /* 7119 */ "i64.le_u\t\0" |
475 | 0 | /* 7129 */ "i32x4.le_u\t\0" |
476 | 0 | /* 7141 */ "i8x16.le_u\t\0" |
477 | 0 | /* 7153 */ "i16x8.le_u\t\0" |
478 | 0 | /* 7165 */ "i8x16.extract_lane_u\t\0" |
479 | 0 | /* 7187 */ "i16x8.extract_lane_u\t\0" |
480 | 0 | /* 7209 */ "i64.atomic.rmw32.xchg_u\t\0" |
481 | 0 | /* 7234 */ "i32.atomic.rmw16.xchg_u\t\0" |
482 | 0 | /* 7259 */ "i64.atomic.rmw16.xchg_u\t\0" |
483 | 0 | /* 7284 */ "i32.atomic.rmw8.xchg_u\t\0" |
484 | 0 | /* 7308 */ "i64.atomic.rmw8.xchg_u\t\0" |
485 | 0 | /* 7332 */ "i64.atomic.rmw32.cmpxchg_u\t\0" |
486 | 0 | /* 7360 */ "i32.atomic.rmw16.cmpxchg_u\t\0" |
487 | 0 | /* 7388 */ "i64.atomic.rmw16.cmpxchg_u\t\0" |
488 | 0 | /* 7416 */ "i32.atomic.rmw8.cmpxchg_u\t\0" |
489 | 0 | /* 7443 */ "i64.atomic.rmw8.cmpxchg_u\t\0" |
490 | 0 | /* 7470 */ "i32.rem_u\t\0" |
491 | 0 | /* 7481 */ "i64.rem_u\t\0" |
492 | 0 | /* 7492 */ "i32x4.min_u\t\0" |
493 | 0 | /* 7505 */ "i8x16.min_u\t\0" |
494 | 0 | /* 7518 */ "i16x8.min_u\t\0" |
495 | 0 | /* 7531 */ "i8x16.avgr_u\t\0" |
496 | 0 | /* 7545 */ "i16x8.avgr_u\t\0" |
497 | 0 | /* 7559 */ "i32.shr_u\t\0" |
498 | 0 | /* 7570 */ "i64x2.shr_u\t\0" |
499 | 0 | /* 7583 */ "i64.shr_u\t\0" |
500 | 0 | /* 7594 */ "i32x4.shr_u\t\0" |
501 | 0 | /* 7607 */ "i8x16.shr_u\t\0" |
502 | 0 | /* 7620 */ "i16x8.shr_u\t\0" |
503 | 0 | /* 7633 */ "i64.atomic.rmw32.or_u\t\0" |
504 | 0 | /* 7656 */ "i32.atomic.rmw16.or_u\t\0" |
505 | 0 | /* 7679 */ "i64.atomic.rmw16.or_u\t\0" |
506 | 0 | /* 7702 */ "i32.atomic.rmw8.or_u\t\0" |
507 | 0 | /* 7724 */ "i64.atomic.rmw8.or_u\t\0" |
508 | 0 | /* 7746 */ "i64.atomic.rmw32.xor_u\t\0" |
509 | 0 | /* 7770 */ "i32.atomic.rmw16.xor_u\t\0" |
510 | 0 | /* 7794 */ "i64.atomic.rmw16.xor_u\t\0" |
511 | 0 | /* 7818 */ "i32.atomic.rmw8.xor_u\t\0" |
512 | 0 | /* 7841 */ "i64.atomic.rmw8.xor_u\t\0" |
513 | 0 | /* 7864 */ "i8x16.sub_sat_u\t\0" |
514 | 0 | /* 7881 */ "i16x8.sub_sat_u\t\0" |
515 | 0 | /* 7898 */ "i8x16.add_sat_u\t\0" |
516 | 0 | /* 7915 */ "i16x8.add_sat_u\t\0" |
517 | 0 | /* 7932 */ "i32.gt_u\t\0" |
518 | 0 | /* 7942 */ "i64.gt_u\t\0" |
519 | 0 | /* 7952 */ "i32x4.gt_u\t\0" |
520 | 0 | /* 7964 */ "i8x16.gt_u\t\0" |
521 | 0 | /* 7976 */ "i16x8.gt_u\t\0" |
522 | 0 | /* 7988 */ "i32.lt_u\t\0" |
523 | 0 | /* 7998 */ "i64.lt_u\t\0" |
524 | 0 | /* 8008 */ "i32x4.lt_u\t\0" |
525 | 0 | /* 8020 */ "i8x16.lt_u\t\0" |
526 | 0 | /* 8032 */ "i16x8.lt_u\t\0" |
527 | 0 | /* 8044 */ "i32.div_u\t\0" |
528 | 0 | /* 8055 */ "i64.div_u\t\0" |
529 | 0 | /* 8066 */ "i32x4.max_u\t\0" |
530 | 0 | /* 8079 */ "i8x16.max_u\t\0" |
531 | 0 | /* 8092 */ "i16x8.max_u\t\0" |
532 | 0 | /* 8105 */ "f64x2.div\t\0" |
533 | 0 | /* 8116 */ "f32x4.div\t\0" |
534 | 0 | /* 8127 */ "table.grow\t\0" |
535 | 0 | /* 8139 */ "memory.grow\t\0" |
536 | 0 | /* 8152 */ "f64x2.max\t\0" |
537 | 0 | /* 8163 */ "f32x4.max\t\0" |
538 | 0 | /* 8174 */ "f64x2.relaxed_max\t\0" |
539 | 0 | /* 8193 */ "f32x4.relaxed_max\t\0" |
540 | 0 | /* 8212 */ "f64x2.pmax\t\0" |
541 | 0 | /* 8224 */ "f32x4.pmax\t\0" |
542 | 0 | /* 8236 */ "table.copy\t\0" |
543 | 0 | /* 8248 */ "local.copy\t\0" |
544 | 0 | /* 8260 */ "memory.copy\t\0" |
545 | 0 | /* 8273 */ "delegate \t \0" |
546 | 0 | /* 8285 */ "f32.ge \0" |
547 | 0 | /* 8294 */ "f64.ge \0" |
548 | 0 | /* 8303 */ "f32.le \0" |
549 | 0 | /* 8312 */ "f64.le \0" |
550 | 0 | /* 8321 */ "f32.ne \0" |
551 | 0 | /* 8330 */ "i32.ne \0" |
552 | 0 | /* 8339 */ "f64.ne \0" |
553 | 0 | /* 8348 */ "i64.ne \0" |
554 | 0 | /* 8357 */ "f32.eq \0" |
555 | 0 | /* 8366 */ "i32.eq \0" |
556 | 0 | /* 8375 */ "f64.eq \0" |
557 | 0 | /* 8384 */ "i64.eq \0" |
558 | 0 | /* 8393 */ "i32.or \0" |
559 | 0 | /* 8402 */ "i64.or \0" |
560 | 0 | /* 8411 */ "f32.gt \0" |
561 | 0 | /* 8420 */ "f64.gt \0" |
562 | 0 | /* 8429 */ "f32.lt \0" |
563 | 0 | /* 8438 */ "f64.lt \0" |
564 | 0 | /* 8447 */ "f32.sub \0" |
565 | 0 | /* 8456 */ "i32.sub \0" |
566 | 0 | /* 8465 */ "f64.sub \0" |
567 | 0 | /* 8474 */ "i64.sub \0" |
568 | 0 | /* 8483 */ "f32.add \0" |
569 | 0 | /* 8492 */ "i32.add \0" |
570 | 0 | /* 8501 */ "f64.add \0" |
571 | 0 | /* 8510 */ "i64.add \0" |
572 | 0 | /* 8519 */ "i32.and \0" |
573 | 0 | /* 8528 */ "i64.and \0" |
574 | 0 | /* 8537 */ "f32.neg \0" |
575 | 0 | /* 8546 */ "f64.neg \0" |
576 | 0 | /* 8555 */ "i32.shl \0" |
577 | 0 | /* 8564 */ "i64.shl \0" |
578 | 0 | /* 8573 */ "f32.mul \0" |
579 | 0 | /* 8582 */ "i32.mul \0" |
580 | 0 | /* 8591 */ "f64.mul \0" |
581 | 0 | /* 8600 */ "i64.mul \0" |
582 | 0 | /* 8609 */ "f32.min \0" |
583 | 0 | /* 8618 */ "f64.min \0" |
584 | 0 | /* 8627 */ "i32.xor \0" |
585 | 0 | /* 8636 */ "i64.xor \0" |
586 | 0 | /* 8645 */ "f32.abs \0" |
587 | 0 | /* 8654 */ "f64.abs \0" |
588 | 0 | /* 8663 */ "f32.div \0" |
589 | 0 | /* 8672 */ "f64.div \0" |
590 | 0 | /* 8681 */ "f32.max \0" |
591 | 0 | /* 8690 */ "f64.max \0" |
592 | 0 | /* 8699 */ "i32.clz \0" |
593 | 0 | /* 8708 */ "i64.clz \0" |
594 | 0 | /* 8717 */ "i32.ctz \0" |
595 | 0 | /* 8726 */ "i64.ctz \0" |
596 | 0 | /* 8735 */ "# XRay Function Patchable RET.\0" |
597 | 0 | /* 8766 */ "# XRay Typed Event Log.\0" |
598 | 0 | /* 8790 */ "# XRay Custom Event Log.\0" |
599 | 0 | /* 8815 */ "# XRay Function Enter.\0" |
600 | 0 | /* 8838 */ "# XRay Tail Call Exit.\0" |
601 | 0 | /* 8861 */ "# XRay Function Exit.\0" |
602 | 0 | /* 8883 */ "f32x4.relaxed_dot_bf16x8_add_f32\0" |
603 | 0 | /* 8916 */ "f64.promote_f32\0" |
604 | 0 | /* 8932 */ "i32.reinterpret_f32\0" |
605 | 0 | /* 8952 */ "f32.reinterpret_i32\0" |
606 | 0 | /* 8972 */ "f32.demote_f64\0" |
607 | 0 | /* 8987 */ "i64.reinterpret_f64\0" |
608 | 0 | /* 9007 */ "i32.wrap_i64\0" |
609 | 0 | /* 9020 */ "f64.reinterpret_i64\0" |
610 | 0 | /* 9040 */ "f64x2.promote_low_f32x4\0" |
611 | 0 | /* 9064 */ "LIFETIME_END\0" |
612 | 0 | /* 9077 */ "PSEUDO_PROBE\0" |
613 | 0 | /* 9090 */ "BUNDLE\0" |
614 | 0 | /* 9097 */ "DBG_VALUE\0" |
615 | 0 | /* 9107 */ "DBG_INSTR_REF\0" |
616 | 0 | /* 9121 */ "DBG_PHI\0" |
617 | 0 | /* 9129 */ "DBG_LABEL\0" |
618 | 0 | /* 9139 */ "LIFETIME_START\0" |
619 | 0 | /* 9154 */ "DBG_VALUE_LIST\0" |
620 | 0 | /* 9169 */ "f64x2.sub\0" |
621 | 0 | /* 9179 */ "i64x2.sub\0" |
622 | 0 | /* 9189 */ "f32x4.sub\0" |
623 | 0 | /* 9199 */ "i32x4.sub\0" |
624 | 0 | /* 9209 */ "i8x16.sub\0" |
625 | 0 | /* 9219 */ "i16x8.sub\0" |
626 | 0 | /* 9229 */ "ref.null_func\0" |
627 | 0 | /* 9243 */ "f32.trunc\0" |
628 | 0 | /* 9253 */ "f64x2.trunc\0" |
629 | 0 | /* 9265 */ "f64.trunc\0" |
630 | 0 | /* 9275 */ "f32x4.trunc\0" |
631 | 0 | /* 9287 */ "f64x2.add\0" |
632 | 0 | /* 9297 */ "i64x2.add\0" |
633 | 0 | /* 9307 */ "f32x4.add\0" |
634 | 0 | /* 9317 */ "i32x4.add\0" |
635 | 0 | /* 9327 */ "i8x16.add\0" |
636 | 0 | /* 9337 */ "i16x8.add\0" |
637 | 0 | /* 9347 */ "f64x2.relaxed_madd\0" |
638 | 0 | /* 9366 */ "f32x4.relaxed_madd\0" |
639 | 0 | /* 9385 */ "f64x2.relaxed_nmadd\0" |
640 | 0 | /* 9405 */ "f32x4.relaxed_nmadd\0" |
641 | 0 | /* 9425 */ "v128.and\0" |
642 | 0 | /* 9434 */ "end\0" |
643 | 0 | /* 9438 */ "atomic.fence\0" |
644 | 0 | /* 9451 */ "compiler_fence\0" |
645 | 0 | /* 9466 */ "local.tee\0" |
646 | 0 | /* 9476 */ "f64x2.ge\0" |
647 | 0 | /* 9485 */ "f32x4.ge\0" |
648 | 0 | /* 9494 */ "f64x2.le\0" |
649 | 0 | /* 9503 */ "f32x4.le\0" |
650 | 0 | /* 9512 */ "unreachable\0" |
651 | 0 | /* 9524 */ "i8x16.swizzle\0" |
652 | 0 | /* 9538 */ "i8x16.relaxed_swizzle\0" |
653 | 0 | /* 9560 */ "f64x2.ne\0" |
654 | 0 | /* 9569 */ "i64x2.ne\0" |
655 | 0 | /* 9578 */ "f32x4.ne\0" |
656 | 0 | /* 9587 */ "i32x4.ne\0" |
657 | 0 | /* 9596 */ "i8x16.ne\0" |
658 | 0 | /* 9605 */ "i16x8.ne\0" |
659 | 0 | /* 9614 */ "else\0" |
660 | 0 | /* 9619 */ "i64x2.all_true\0" |
661 | 0 | /* 9634 */ "i32x4.all_true\0" |
662 | 0 | /* 9649 */ "i8x16.all_true\0" |
663 | 0 | /* 9664 */ "i16x8.all_true\0" |
664 | 0 | /* 9679 */ "v128.any_true\0" |
665 | 0 | /* 9693 */ "end_if\0" |
666 | 0 | /* 9700 */ "f64x2.neg\0" |
667 | 0 | /* 9710 */ "i64x2.neg\0" |
668 | 0 | /* 9720 */ "f32x4.neg\0" |
669 | 0 | /* 9730 */ "i32x4.neg\0" |
670 | 0 | /* 9740 */ "i8x16.neg\0" |
671 | 0 | /* 9750 */ "i16x8.neg\0" |
672 | 0 | /* 9760 */ "catch\0" |
673 | 0 | /* 9766 */ "end_block\0" |
674 | 0 | /* 9776 */ "i64x2.bitmask\0" |
675 | 0 | /* 9790 */ "i32x4.bitmask\0" |
676 | 0 | /* 9804 */ "i8x16.bitmask\0" |
677 | 0 | /* 9818 */ "i16x8.bitmask\0" |
678 | 0 | /* 9832 */ "i64x2.shl\0" |
679 | 0 | /* 9842 */ "i32x4.shl\0" |
680 | 0 | /* 9852 */ "i8x16.shl\0" |
681 | 0 | /* 9862 */ "i16x8.shl\0" |
682 | 0 | /* 9872 */ "f32.ceil\0" |
683 | 0 | /* 9881 */ "f64x2.ceil\0" |
684 | 0 | /* 9892 */ "f64.ceil\0" |
685 | 0 | /* 9901 */ "f32x4.ceil\0" |
686 | 0 | /* 9912 */ "catch_all\0" |
687 | 0 | /* 9922 */ "# FEntry call\0" |
688 | 0 | /* 9936 */ "ref.is_null\0" |
689 | 0 | /* 9948 */ "i32.rotl\0" |
690 | 0 | /* 9957 */ "i64.rotl\0" |
691 | 0 | /* 9966 */ "f64x2.mul\0" |
692 | 0 | /* 9976 */ "i64x2.mul\0" |
693 | 0 | /* 9986 */ "f32x4.mul\0" |
694 | 0 | /* 9996 */ "i32x4.mul\0" |
695 | 0 | /* 10006 */ "i16x8.mul\0" |
696 | 0 | /* 10016 */ "f32.copysign\0" |
697 | 0 | /* 10029 */ "f64.copysign\0" |
698 | 0 | /* 10042 */ "f64x2.min\0" |
699 | 0 | /* 10052 */ "f32x4.min\0" |
700 | 0 | /* 10062 */ "f64x2.relaxed_min\0" |
701 | 0 | /* 10080 */ "f32x4.relaxed_min\0" |
702 | 0 | /* 10098 */ "f64x2.pmin\0" |
703 | 0 | /* 10109 */ "f32x4.pmin\0" |
704 | 0 | /* 10120 */ "end_function\0" |
705 | 0 | /* 10133 */ "ref.null_extern\0" |
706 | 0 | /* 10149 */ "return\0" |
707 | 0 | /* 10156 */ "f32x4.demote_f64x2_zero\0" |
708 | 0 | /* 10180 */ "i32x4.relaxed_trunc_f64x2_s_zero\0" |
709 | 0 | /* 10213 */ "i32x4.trunc_sat_f64x2_s_zero\0" |
710 | 0 | /* 10242 */ "i32x4.relaxed_trunc_f64x2_u_zero\0" |
711 | 0 | /* 10275 */ "i32x4.trunc_sat_f64x2_u_zero\0" |
712 | 0 | /* 10304 */ "nop\0" |
713 | 0 | /* 10308 */ "end_loop\0" |
714 | 0 | /* 10317 */ "drop\0" |
715 | 0 | /* 10322 */ "f64x2.eq\0" |
716 | 0 | /* 10331 */ "i64x2.eq\0" |
717 | 0 | /* 10340 */ "f32x4.eq\0" |
718 | 0 | /* 10349 */ "i32x4.eq\0" |
719 | 0 | /* 10358 */ "i8x16.eq\0" |
720 | 0 | /* 10367 */ "i16x8.eq\0" |
721 | 0 | /* 10376 */ "v128.or\0" |
722 | 0 | /* 10384 */ "f32.floor\0" |
723 | 0 | /* 10394 */ "f64x2.floor\0" |
724 | 0 | /* 10406 */ "f64.floor\0" |
725 | 0 | /* 10416 */ "f32x4.floor\0" |
726 | 0 | /* 10428 */ "v128.xor\0" |
727 | 0 | /* 10437 */ "i32.rotr\0" |
728 | 0 | /* 10446 */ "i64.rotr\0" |
729 | 0 | /* 10455 */ "i64.extend32_s\0" |
730 | 0 | /* 10470 */ "i32.trunc_f32_s\0" |
731 | 0 | /* 10486 */ "i64.trunc_f32_s\0" |
732 | 0 | /* 10502 */ "i32.trunc_sat_f32_s\0" |
733 | 0 | /* 10522 */ "i64.trunc_sat_f32_s\0" |
734 | 0 | /* 10542 */ "i64.extend_i32_s\0" |
735 | 0 | /* 10559 */ "f32.convert_i32_s\0" |
736 | 0 | /* 10577 */ "f64.convert_i32_s\0" |
737 | 0 | /* 10595 */ "i32.trunc_f64_s\0" |
738 | 0 | /* 10611 */ "i64.trunc_f64_s\0" |
739 | 0 | /* 10627 */ "i32.trunc_sat_f64_s\0" |
740 | 0 | /* 10647 */ "i64.trunc_sat_f64_s\0" |
741 | 0 | /* 10667 */ "f32.convert_i64_s\0" |
742 | 0 | /* 10685 */ "f64.convert_i64_s\0" |
743 | 0 | /* 10703 */ "i32x4.relaxed_trunc_f32x4_s\0" |
744 | 0 | /* 10731 */ "i32x4.trunc_sat_f32x4_s\0" |
745 | 0 | /* 10755 */ "i64x2.extend_high_i32x4_s\0" |
746 | 0 | /* 10781 */ "i64x2.extmul_high_i32x4_s\0" |
747 | 0 | /* 10807 */ "f32x4.convert_i32x4_s\0" |
748 | 0 | /* 10829 */ "i64x2.extend_low_i32x4_s\0" |
749 | 0 | /* 10854 */ "i64x2.extmul_low_i32x4_s\0" |
750 | 0 | /* 10879 */ "f64x2.convert_low_i32x4_s\0" |
751 | 0 | /* 10905 */ "i16x8.narrow_i32x4_s\0" |
752 | 0 | /* 10926 */ "i32.extend16_s\0" |
753 | 0 | /* 10941 */ "i64.extend16_s\0" |
754 | 0 | /* 10956 */ "i16x8.relaxed_dot_i8x16_i7x16_s\0" |
755 | 0 | /* 10988 */ "i16x8.extadd_pairwise_i8x16_s\0" |
756 | 0 | /* 11018 */ "i16x8.extend_high_i8x16_s\0" |
757 | 0 | /* 11044 */ "i16x8.extmul_high_i8x16_s\0" |
758 | 0 | /* 11070 */ "i16x8.extend_low_i8x16_s\0" |
759 | 0 | /* 11095 */ "i16x8.extmul_low_i8x16_s\0" |
760 | 0 | /* 11120 */ "i32.extend8_s\0" |
761 | 0 | /* 11134 */ "i64.extend8_s\0" |
762 | 0 | /* 11148 */ "i32x4.extadd_pairwise_i16x8_s\0" |
763 | 0 | /* 11178 */ "i32x4.extend_high_i16x8_s\0" |
764 | 0 | /* 11204 */ "i32x4.extmul_high_i16x8_s\0" |
765 | 0 | /* 11230 */ "i32x4.dot_i16x8_s\0" |
766 | 0 | /* 11248 */ "i32x4.extend_low_i16x8_s\0" |
767 | 0 | /* 11273 */ "i32x4.extmul_low_i16x8_s\0" |
768 | 0 | /* 11298 */ "i8x16.narrow_i16x8_s\0" |
769 | 0 | /* 11319 */ "i32x4.relaxed_dot_i8x16_i7x16_add_s\0" |
770 | 0 | /* 11355 */ "i32.ge_s\0" |
771 | 0 | /* 11364 */ "i64x2.ge_s\0" |
772 | 0 | /* 11375 */ "i64.ge_s\0" |
773 | 0 | /* 11384 */ "i32x4.ge_s\0" |
774 | 0 | /* 11395 */ "i8x16.ge_s\0" |
775 | 0 | /* 11406 */ "i16x8.ge_s\0" |
776 | 0 | /* 11417 */ "i32.le_s\0" |
777 | 0 | /* 11426 */ "i64x2.le_s\0" |
778 | 0 | /* 11437 */ "i64.le_s\0" |
779 | 0 | /* 11446 */ "i32x4.le_s\0" |
780 | 0 | /* 11457 */ "i8x16.le_s\0" |
781 | 0 | /* 11468 */ "i16x8.le_s\0" |
782 | 0 | /* 11479 */ "i32.rem_s\0" |
783 | 0 | /* 11489 */ "i64.rem_s\0" |
784 | 0 | /* 11499 */ "i32x4.min_s\0" |
785 | 0 | /* 11511 */ "i8x16.min_s\0" |
786 | 0 | /* 11523 */ "i16x8.min_s\0" |
787 | 0 | /* 11535 */ "i32.shr_s\0" |
788 | 0 | /* 11545 */ "i64x2.shr_s\0" |
789 | 0 | /* 11557 */ "i64.shr_s\0" |
790 | 0 | /* 11567 */ "i32x4.shr_s\0" |
791 | 0 | /* 11579 */ "i8x16.shr_s\0" |
792 | 0 | /* 11591 */ "i16x8.shr_s\0" |
793 | 0 | /* 11603 */ "i16x8.relaxed_q15mulr_s\0" |
794 | 0 | /* 11627 */ "i8x16.sub_sat_s\0" |
795 | 0 | /* 11643 */ "i16x8.sub_sat_s\0" |
796 | 0 | /* 11659 */ "i8x16.add_sat_s\0" |
797 | 0 | /* 11675 */ "i16x8.add_sat_s\0" |
798 | 0 | /* 11691 */ "i16x8.q15mulr_sat_s\0" |
799 | 0 | /* 11711 */ "i32.gt_s\0" |
800 | 0 | /* 11720 */ "i64x2.gt_s\0" |
801 | 0 | /* 11731 */ "i64.gt_s\0" |
802 | 0 | /* 11740 */ "i32x4.gt_s\0" |
803 | 0 | /* 11751 */ "i8x16.gt_s\0" |
804 | 0 | /* 11762 */ "i16x8.gt_s\0" |
805 | 0 | /* 11773 */ "i32.lt_s\0" |
806 | 0 | /* 11782 */ "i64x2.lt_s\0" |
807 | 0 | /* 11793 */ "i64.lt_s\0" |
808 | 0 | /* 11802 */ "i32x4.lt_s\0" |
809 | 0 | /* 11813 */ "i8x16.lt_s\0" |
810 | 0 | /* 11824 */ "i16x8.lt_s\0" |
811 | 0 | /* 11835 */ "i32.div_s\0" |
812 | 0 | /* 11845 */ "i64.div_s\0" |
813 | 0 | /* 11855 */ "i32x4.max_s\0" |
814 | 0 | /* 11867 */ "i8x16.max_s\0" |
815 | 0 | /* 11879 */ "i16x8.max_s\0" |
816 | 0 | /* 11891 */ "f64x2.abs\0" |
817 | 0 | /* 11901 */ "i64x2.abs\0" |
818 | 0 | /* 11911 */ "f32x4.abs\0" |
819 | 0 | /* 11921 */ "i32x4.abs\0" |
820 | 0 | /* 11931 */ "i8x16.abs\0" |
821 | 0 | /* 11941 */ "i16x8.abs\0" |
822 | 0 | /* 11951 */ "return_call_results\0" |
823 | 0 | /* 11971 */ "f64x2.splat\0" |
824 | 0 | /* 11983 */ "i64x2.splat\0" |
825 | 0 | /* 11995 */ "f32x4.splat\0" |
826 | 0 | /* 12007 */ "i32x4.splat\0" |
827 | 0 | /* 12019 */ "i8x16.splat\0" |
828 | 0 | /* 12031 */ "i16x8.splat\0" |
829 | 0 | /* 12043 */ "f32.select\0" |
830 | 0 | /* 12054 */ "i32.select\0" |
831 | 0 | /* 12065 */ "f64.select\0" |
832 | 0 | /* 12076 */ "i64.select\0" |
833 | 0 | /* 12087 */ "v128.select\0" |
834 | 0 | /* 12099 */ "funcref.select\0" |
835 | 0 | /* 12114 */ "externref.select\0" |
836 | 0 | /* 12131 */ "i64x2.relaxed_laneselect\0" |
837 | 0 | /* 12156 */ "i32x4.relaxed_laneselect\0" |
838 | 0 | /* 12181 */ "i8x16.relaxed_laneselect\0" |
839 | 0 | /* 12206 */ "i16x8.relaxed_laneselect\0" |
840 | 0 | /* 12231 */ "v128.bitselect\0" |
841 | 0 | /* 12246 */ "call_indirect\0" |
842 | 0 | /* 12260 */ "catchret\0" |
843 | 0 | /* 12269 */ "cleanupret\0" |
844 | 0 | /* 12280 */ "f64x2.gt\0" |
845 | 0 | /* 12289 */ "f32x4.gt\0" |
846 | 0 | /* 12298 */ "f64x2.lt\0" |
847 | 0 | /* 12307 */ "f32x4.lt\0" |
848 | 0 | /* 12316 */ "i32.popcnt\0" |
849 | 0 | /* 12327 */ "i64.popcnt\0" |
850 | 0 | /* 12338 */ "i8x16.popcnt\0" |
851 | 0 | /* 12351 */ "v128.not\0" |
852 | 0 | /* 12360 */ "v128.andnot\0" |
853 | 0 | /* 12372 */ "f32.sqrt\0" |
854 | 0 | /* 12381 */ "f64x2.sqrt\0" |
855 | 0 | /* 12392 */ "f64.sqrt\0" |
856 | 0 | /* 12401 */ "f32x4.sqrt\0" |
857 | 0 | /* 12412 */ "f32.nearest\0" |
858 | 0 | /* 12424 */ "f64x2.nearest\0" |
859 | 0 | /* 12438 */ "f64.nearest\0" |
860 | 0 | /* 12450 */ "f32x4.nearest\0" |
861 | 0 | /* 12464 */ "i32.trunc_f32_u\0" |
862 | 0 | /* 12480 */ "i64.trunc_f32_u\0" |
863 | 0 | /* 12496 */ "i32.trunc_sat_f32_u\0" |
864 | 0 | /* 12516 */ "i64.trunc_sat_f32_u\0" |
865 | 0 | /* 12536 */ "i64.extend_i32_u\0" |
866 | 0 | /* 12553 */ "f32.convert_i32_u\0" |
867 | 0 | /* 12571 */ "f64.convert_i32_u\0" |
868 | 0 | /* 12589 */ "i32.trunc_f64_u\0" |
869 | 0 | /* 12605 */ "i64.trunc_f64_u\0" |
870 | 0 | /* 12621 */ "i32.trunc_sat_f64_u\0" |
871 | 0 | /* 12641 */ "i64.trunc_sat_f64_u\0" |
872 | 0 | /* 12661 */ "f32.convert_i64_u\0" |
873 | 0 | /* 12679 */ "f64.convert_i64_u\0" |
874 | 0 | /* 12697 */ "i32x4.relaxed_trunc_f32x4_u\0" |
875 | 0 | /* 12725 */ "i32x4.trunc_sat_f32x4_u\0" |
876 | 0 | /* 12749 */ "i64x2.extend_high_i32x4_u\0" |
877 | 0 | /* 12775 */ "i64x2.extmul_high_i32x4_u\0" |
878 | 0 | /* 12801 */ "f32x4.convert_i32x4_u\0" |
879 | 0 | /* 12823 */ "i64x2.extend_low_i32x4_u\0" |
880 | 0 | /* 12848 */ "i64x2.extmul_low_i32x4_u\0" |
881 | 0 | /* 12873 */ "f64x2.convert_low_i32x4_u\0" |
882 | 0 | /* 12899 */ "i16x8.narrow_i32x4_u\0" |
883 | 0 | /* 12920 */ "i16x8.extadd_pairwise_i8x16_u\0" |
884 | 0 | /* 12950 */ "i16x8.extend_high_i8x16_u\0" |
885 | 0 | /* 12976 */ "i16x8.extmul_high_i8x16_u\0" |
886 | 0 | /* 13002 */ "i16x8.extend_low_i8x16_u\0" |
887 | 0 | /* 13027 */ "i16x8.extmul_low_i8x16_u\0" |
888 | 0 | /* 13052 */ "i32x4.extadd_pairwise_i16x8_u\0" |
889 | 0 | /* 13082 */ "i32x4.extend_high_i16x8_u\0" |
890 | 0 | /* 13108 */ "i32x4.extmul_high_i16x8_u\0" |
891 | 0 | /* 13134 */ "i32x4.extend_low_i16x8_u\0" |
892 | 0 | /* 13159 */ "i32x4.extmul_low_i16x8_u\0" |
893 | 0 | /* 13184 */ "i8x16.narrow_i16x8_u\0" |
894 | 0 | /* 13205 */ "i32.ge_u\0" |
895 | 0 | /* 13214 */ "i64.ge_u\0" |
896 | 0 | /* 13223 */ "i32x4.ge_u\0" |
897 | 0 | /* 13234 */ "i8x16.ge_u\0" |
898 | 0 | /* 13245 */ "i16x8.ge_u\0" |
899 | 0 | /* 13256 */ "i32.le_u\0" |
900 | 0 | /* 13265 */ "i64.le_u\0" |
901 | 0 | /* 13274 */ "i32x4.le_u\0" |
902 | 0 | /* 13285 */ "i8x16.le_u\0" |
903 | 0 | /* 13296 */ "i16x8.le_u\0" |
904 | 0 | /* 13307 */ "i32.rem_u\0" |
905 | 0 | /* 13317 */ "i64.rem_u\0" |
906 | 0 | /* 13327 */ "i32x4.min_u\0" |
907 | 0 | /* 13339 */ "i8x16.min_u\0" |
908 | 0 | /* 13351 */ "i16x8.min_u\0" |
909 | 0 | /* 13363 */ "i8x16.avgr_u\0" |
910 | 0 | /* 13376 */ "i16x8.avgr_u\0" |
911 | 0 | /* 13389 */ "i32.shr_u\0" |
912 | 0 | /* 13399 */ "i64x2.shr_u\0" |
913 | 0 | /* 13411 */ "i64.shr_u\0" |
914 | 0 | /* 13421 */ "i32x4.shr_u\0" |
915 | 0 | /* 13433 */ "i8x16.shr_u\0" |
916 | 0 | /* 13445 */ "i16x8.shr_u\0" |
917 | 0 | /* 13457 */ "i8x16.sub_sat_u\0" |
918 | 0 | /* 13473 */ "i16x8.sub_sat_u\0" |
919 | 0 | /* 13489 */ "i8x16.add_sat_u\0" |
920 | 0 | /* 13505 */ "i16x8.add_sat_u\0" |
921 | 0 | /* 13521 */ "i32.gt_u\0" |
922 | 0 | /* 13530 */ "i64.gt_u\0" |
923 | 0 | /* 13539 */ "i32x4.gt_u\0" |
924 | 0 | /* 13550 */ "i8x16.gt_u\0" |
925 | 0 | /* 13561 */ "i16x8.gt_u\0" |
926 | 0 | /* 13572 */ "i32.lt_u\0" |
927 | 0 | /* 13581 */ "i64.lt_u\0" |
928 | 0 | /* 13590 */ "i32x4.lt_u\0" |
929 | 0 | /* 13601 */ "i8x16.lt_u\0" |
930 | 0 | /* 13612 */ "i16x8.lt_u\0" |
931 | 0 | /* 13623 */ "i32.div_u\0" |
932 | 0 | /* 13633 */ "i64.div_u\0" |
933 | 0 | /* 13643 */ "i32x4.max_u\0" |
934 | 0 | /* 13655 */ "i8x16.max_u\0" |
935 | 0 | /* 13667 */ "i16x8.max_u\0" |
936 | 0 | /* 13679 */ "f64x2.div\0" |
937 | 0 | /* 13689 */ "f32x4.div\0" |
938 | 0 | /* 13699 */ "f64x2.max\0" |
939 | 0 | /* 13709 */ "f32x4.max\0" |
940 | 0 | /* 13719 */ "f64x2.relaxed_max\0" |
941 | 0 | /* 13737 */ "f32x4.relaxed_max\0" |
942 | 0 | /* 13755 */ "f64x2.pmax\0" |
943 | 0 | /* 13766 */ "f32x4.pmax\0" |
944 | 0 | /* 13777 */ "local.copy\0" |
945 | 0 | /* 13788 */ "end_try\0" |
946 | 0 | /* 13796 */ "i32.eqz\0" |
947 | 0 | /* 13804 */ "i64.eqz\0" |
948 | 0 | }; |
949 | 0 | #ifdef __GNUC__ |
950 | 0 | #pragma GCC diagnostic pop |
951 | 0 | #endif |
952 | |
|
953 | 0 | static const uint32_t OpInfo0[] = { |
954 | 0 | 0U, // PHI |
955 | 0 | 0U, // INLINEASM |
956 | 0 | 0U, // INLINEASM_BR |
957 | 0 | 0U, // CFI_INSTRUCTION |
958 | 0 | 0U, // EH_LABEL |
959 | 0 | 0U, // GC_LABEL |
960 | 0 | 0U, // ANNOTATION_LABEL |
961 | 0 | 0U, // KILL |
962 | 0 | 0U, // EXTRACT_SUBREG |
963 | 0 | 0U, // INSERT_SUBREG |
964 | 0 | 0U, // IMPLICIT_DEF |
965 | 0 | 0U, // SUBREG_TO_REG |
966 | 0 | 0U, // COPY_TO_REGCLASS |
967 | 0 | 9098U, // DBG_VALUE |
968 | 0 | 9155U, // DBG_VALUE_LIST |
969 | 0 | 9108U, // DBG_INSTR_REF |
970 | 0 | 9122U, // DBG_PHI |
971 | 0 | 9130U, // DBG_LABEL |
972 | 0 | 0U, // REG_SEQUENCE |
973 | 0 | 0U, // COPY |
974 | 0 | 9091U, // BUNDLE |
975 | 0 | 9140U, // LIFETIME_START |
976 | 0 | 9065U, // LIFETIME_END |
977 | 0 | 9078U, // PSEUDO_PROBE |
978 | 0 | 0U, // ARITH_FENCE |
979 | 0 | 0U, // STACKMAP |
980 | 0 | 9923U, // FENTRY_CALL |
981 | 0 | 0U, // PATCHPOINT |
982 | 0 | 0U, // LOAD_STACK_GUARD |
983 | 0 | 0U, // PREALLOCATED_SETUP |
984 | 0 | 0U, // PREALLOCATED_ARG |
985 | 0 | 0U, // STATEPOINT |
986 | 0 | 0U, // LOCAL_ESCAPE |
987 | 0 | 0U, // FAULTING_OP |
988 | 0 | 0U, // PATCHABLE_OP |
989 | 0 | 8816U, // PATCHABLE_FUNCTION_ENTER |
990 | 0 | 8736U, // PATCHABLE_RET |
991 | 0 | 8862U, // PATCHABLE_FUNCTION_EXIT |
992 | 0 | 8839U, // PATCHABLE_TAIL_CALL |
993 | 0 | 8791U, // PATCHABLE_EVENT_CALL |
994 | 0 | 8767U, // PATCHABLE_TYPED_EVENT_CALL |
995 | 0 | 0U, // ICALL_BRANCH_FUNNEL |
996 | 0 | 0U, // MEMBARRIER |
997 | 0 | 0U, // JUMP_TABLE_DEBUG_INFO |
998 | 0 | 0U, // G_ASSERT_SEXT |
999 | 0 | 0U, // G_ASSERT_ZEXT |
1000 | 0 | 0U, // G_ASSERT_ALIGN |
1001 | 0 | 0U, // G_ADD |
1002 | 0 | 0U, // G_SUB |
1003 | 0 | 0U, // G_MUL |
1004 | 0 | 0U, // G_SDIV |
1005 | 0 | 0U, // G_UDIV |
1006 | 0 | 0U, // G_SREM |
1007 | 0 | 0U, // G_UREM |
1008 | 0 | 0U, // G_SDIVREM |
1009 | 0 | 0U, // G_UDIVREM |
1010 | 0 | 0U, // G_AND |
1011 | 0 | 0U, // G_OR |
1012 | 0 | 0U, // G_XOR |
1013 | 0 | 0U, // G_IMPLICIT_DEF |
1014 | 0 | 0U, // G_PHI |
1015 | 0 | 0U, // G_FRAME_INDEX |
1016 | 0 | 0U, // G_GLOBAL_VALUE |
1017 | 0 | 0U, // G_CONSTANT_POOL |
1018 | 0 | 0U, // G_EXTRACT |
1019 | 0 | 0U, // G_UNMERGE_VALUES |
1020 | 0 | 0U, // G_INSERT |
1021 | 0 | 0U, // G_MERGE_VALUES |
1022 | 0 | 0U, // G_BUILD_VECTOR |
1023 | 0 | 0U, // G_BUILD_VECTOR_TRUNC |
1024 | 0 | 0U, // G_CONCAT_VECTORS |
1025 | 0 | 0U, // G_PTRTOINT |
1026 | 0 | 0U, // G_INTTOPTR |
1027 | 0 | 0U, // G_BITCAST |
1028 | 0 | 0U, // G_FREEZE |
1029 | 0 | 0U, // G_CONSTANT_FOLD_BARRIER |
1030 | 0 | 0U, // G_INTRINSIC_FPTRUNC_ROUND |
1031 | 0 | 0U, // G_INTRINSIC_TRUNC |
1032 | 0 | 0U, // G_INTRINSIC_ROUND |
1033 | 0 | 0U, // G_INTRINSIC_LRINT |
1034 | 0 | 0U, // G_INTRINSIC_ROUNDEVEN |
1035 | 0 | 0U, // G_READCYCLECOUNTER |
1036 | 0 | 0U, // G_LOAD |
1037 | 0 | 0U, // G_SEXTLOAD |
1038 | 0 | 0U, // G_ZEXTLOAD |
1039 | 0 | 0U, // G_INDEXED_LOAD |
1040 | 0 | 0U, // G_INDEXED_SEXTLOAD |
1041 | 0 | 0U, // G_INDEXED_ZEXTLOAD |
1042 | 0 | 0U, // G_STORE |
1043 | 0 | 0U, // G_INDEXED_STORE |
1044 | 0 | 0U, // G_ATOMIC_CMPXCHG_WITH_SUCCESS |
1045 | 0 | 0U, // G_ATOMIC_CMPXCHG |
1046 | 0 | 0U, // G_ATOMICRMW_XCHG |
1047 | 0 | 0U, // G_ATOMICRMW_ADD |
1048 | 0 | 0U, // G_ATOMICRMW_SUB |
1049 | 0 | 0U, // G_ATOMICRMW_AND |
1050 | 0 | 0U, // G_ATOMICRMW_NAND |
1051 | 0 | 0U, // G_ATOMICRMW_OR |
1052 | 0 | 0U, // G_ATOMICRMW_XOR |
1053 | 0 | 0U, // G_ATOMICRMW_MAX |
1054 | 0 | 0U, // G_ATOMICRMW_MIN |
1055 | 0 | 0U, // G_ATOMICRMW_UMAX |
1056 | 0 | 0U, // G_ATOMICRMW_UMIN |
1057 | 0 | 0U, // G_ATOMICRMW_FADD |
1058 | 0 | 0U, // G_ATOMICRMW_FSUB |
1059 | 0 | 0U, // G_ATOMICRMW_FMAX |
1060 | 0 | 0U, // G_ATOMICRMW_FMIN |
1061 | 0 | 0U, // G_ATOMICRMW_UINC_WRAP |
1062 | 0 | 0U, // G_ATOMICRMW_UDEC_WRAP |
1063 | 0 | 0U, // G_FENCE |
1064 | 0 | 0U, // G_PREFETCH |
1065 | 0 | 0U, // G_BRCOND |
1066 | 0 | 0U, // G_BRINDIRECT |
1067 | 0 | 0U, // G_INVOKE_REGION_START |
1068 | 0 | 0U, // G_INTRINSIC |
1069 | 0 | 0U, // G_INTRINSIC_W_SIDE_EFFECTS |
1070 | 0 | 0U, // G_INTRINSIC_CONVERGENT |
1071 | 0 | 0U, // G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS |
1072 | 0 | 0U, // G_ANYEXT |
1073 | 0 | 0U, // G_TRUNC |
1074 | 0 | 0U, // G_CONSTANT |
1075 | 0 | 0U, // G_FCONSTANT |
1076 | 0 | 0U, // G_VASTART |
1077 | 0 | 0U, // G_VAARG |
1078 | 0 | 0U, // G_SEXT |
1079 | 0 | 0U, // G_SEXT_INREG |
1080 | 0 | 0U, // G_ZEXT |
1081 | 0 | 0U, // G_SHL |
1082 | 0 | 0U, // G_LSHR |
1083 | 0 | 0U, // G_ASHR |
1084 | 0 | 0U, // G_FSHL |
1085 | 0 | 0U, // G_FSHR |
1086 | 0 | 0U, // G_ROTR |
1087 | 0 | 0U, // G_ROTL |
1088 | 0 | 0U, // G_ICMP |
1089 | 0 | 0U, // G_FCMP |
1090 | 0 | 0U, // G_SELECT |
1091 | 0 | 0U, // G_UADDO |
1092 | 0 | 0U, // G_UADDE |
1093 | 0 | 0U, // G_USUBO |
1094 | 0 | 0U, // G_USUBE |
1095 | 0 | 0U, // G_SADDO |
1096 | 0 | 0U, // G_SADDE |
1097 | 0 | 0U, // G_SSUBO |
1098 | 0 | 0U, // G_SSUBE |
1099 | 0 | 0U, // G_UMULO |
1100 | 0 | 0U, // G_SMULO |
1101 | 0 | 0U, // G_UMULH |
1102 | 0 | 0U, // G_SMULH |
1103 | 0 | 0U, // G_UADDSAT |
1104 | 0 | 0U, // G_SADDSAT |
1105 | 0 | 0U, // G_USUBSAT |
1106 | 0 | 0U, // G_SSUBSAT |
1107 | 0 | 0U, // G_USHLSAT |
1108 | 0 | 0U, // G_SSHLSAT |
1109 | 0 | 0U, // G_SMULFIX |
1110 | 0 | 0U, // G_UMULFIX |
1111 | 0 | 0U, // G_SMULFIXSAT |
1112 | 0 | 0U, // G_UMULFIXSAT |
1113 | 0 | 0U, // G_SDIVFIX |
1114 | 0 | 0U, // G_UDIVFIX |
1115 | 0 | 0U, // G_SDIVFIXSAT |
1116 | 0 | 0U, // G_UDIVFIXSAT |
1117 | 0 | 0U, // G_FADD |
1118 | 0 | 0U, // G_FSUB |
1119 | 0 | 0U, // G_FMUL |
1120 | 0 | 0U, // G_FMA |
1121 | 0 | 0U, // G_FMAD |
1122 | 0 | 0U, // G_FDIV |
1123 | 0 | 0U, // G_FREM |
1124 | 0 | 0U, // G_FPOW |
1125 | 0 | 0U, // G_FPOWI |
1126 | 0 | 0U, // G_FEXP |
1127 | 0 | 0U, // G_FEXP2 |
1128 | 0 | 0U, // G_FEXP10 |
1129 | 0 | 0U, // G_FLOG |
1130 | 0 | 0U, // G_FLOG2 |
1131 | 0 | 0U, // G_FLOG10 |
1132 | 0 | 0U, // G_FLDEXP |
1133 | 0 | 0U, // G_FFREXP |
1134 | 0 | 0U, // G_FNEG |
1135 | 0 | 0U, // G_FPEXT |
1136 | 0 | 0U, // G_FPTRUNC |
1137 | 0 | 0U, // G_FPTOSI |
1138 | 0 | 0U, // G_FPTOUI |
1139 | 0 | 0U, // G_SITOFP |
1140 | 0 | 0U, // G_UITOFP |
1141 | 0 | 0U, // G_FABS |
1142 | 0 | 0U, // G_FCOPYSIGN |
1143 | 0 | 0U, // G_IS_FPCLASS |
1144 | 0 | 0U, // G_FCANONICALIZE |
1145 | 0 | 0U, // G_FMINNUM |
1146 | 0 | 0U, // G_FMAXNUM |
1147 | 0 | 0U, // G_FMINNUM_IEEE |
1148 | 0 | 0U, // G_FMAXNUM_IEEE |
1149 | 0 | 0U, // G_FMINIMUM |
1150 | 0 | 0U, // G_FMAXIMUM |
1151 | 0 | 0U, // G_GET_FPENV |
1152 | 0 | 0U, // G_SET_FPENV |
1153 | 0 | 0U, // G_RESET_FPENV |
1154 | 0 | 0U, // G_GET_FPMODE |
1155 | 0 | 0U, // G_SET_FPMODE |
1156 | 0 | 0U, // G_RESET_FPMODE |
1157 | 0 | 0U, // G_PTR_ADD |
1158 | 0 | 0U, // G_PTRMASK |
1159 | 0 | 0U, // G_SMIN |
1160 | 0 | 0U, // G_SMAX |
1161 | 0 | 0U, // G_UMIN |
1162 | 0 | 0U, // G_UMAX |
1163 | 0 | 0U, // G_ABS |
1164 | 0 | 0U, // G_LROUND |
1165 | 0 | 0U, // G_LLROUND |
1166 | 0 | 0U, // G_BR |
1167 | 0 | 0U, // G_BRJT |
1168 | 0 | 0U, // G_INSERT_VECTOR_ELT |
1169 | 0 | 0U, // G_EXTRACT_VECTOR_ELT |
1170 | 0 | 0U, // G_SHUFFLE_VECTOR |
1171 | 0 | 0U, // G_CTTZ |
1172 | 0 | 0U, // G_CTTZ_ZERO_UNDEF |
1173 | 0 | 0U, // G_CTLZ |
1174 | 0 | 0U, // G_CTLZ_ZERO_UNDEF |
1175 | 0 | 0U, // G_CTPOP |
1176 | 0 | 0U, // G_BSWAP |
1177 | 0 | 0U, // G_BITREVERSE |
1178 | 0 | 0U, // G_FCEIL |
1179 | 0 | 0U, // G_FCOS |
1180 | 0 | 0U, // G_FSIN |
1181 | 0 | 0U, // G_FSQRT |
1182 | 0 | 0U, // G_FFLOOR |
1183 | 0 | 0U, // G_FRINT |
1184 | 0 | 0U, // G_FNEARBYINT |
1185 | 0 | 0U, // G_ADDRSPACE_CAST |
1186 | 0 | 0U, // G_BLOCK_ADDR |
1187 | 0 | 0U, // G_JUMP_TABLE |
1188 | 0 | 0U, // G_DYN_STACKALLOC |
1189 | 0 | 0U, // G_STACKSAVE |
1190 | 0 | 0U, // G_STACKRESTORE |
1191 | 0 | 0U, // G_STRICT_FADD |
1192 | 0 | 0U, // G_STRICT_FSUB |
1193 | 0 | 0U, // G_STRICT_FMUL |
1194 | 0 | 0U, // G_STRICT_FDIV |
1195 | 0 | 0U, // G_STRICT_FREM |
1196 | 0 | 0U, // G_STRICT_FMA |
1197 | 0 | 0U, // G_STRICT_FSQRT |
1198 | 0 | 0U, // G_STRICT_FLDEXP |
1199 | 0 | 0U, // G_READ_REGISTER |
1200 | 0 | 0U, // G_WRITE_REGISTER |
1201 | 0 | 0U, // G_MEMCPY |
1202 | 0 | 0U, // G_MEMCPY_INLINE |
1203 | 0 | 0U, // G_MEMMOVE |
1204 | 0 | 0U, // G_MEMSET |
1205 | 0 | 0U, // G_BZERO |
1206 | 0 | 0U, // G_VECREDUCE_SEQ_FADD |
1207 | 0 | 0U, // G_VECREDUCE_SEQ_FMUL |
1208 | 0 | 0U, // G_VECREDUCE_FADD |
1209 | 0 | 0U, // G_VECREDUCE_FMUL |
1210 | 0 | 0U, // G_VECREDUCE_FMAX |
1211 | 0 | 0U, // G_VECREDUCE_FMIN |
1212 | 0 | 0U, // G_VECREDUCE_FMAXIMUM |
1213 | 0 | 0U, // G_VECREDUCE_FMINIMUM |
1214 | 0 | 0U, // G_VECREDUCE_ADD |
1215 | 0 | 0U, // G_VECREDUCE_MUL |
1216 | 0 | 0U, // G_VECREDUCE_AND |
1217 | 0 | 0U, // G_VECREDUCE_OR |
1218 | 0 | 0U, // G_VECREDUCE_XOR |
1219 | 0 | 0U, // G_VECREDUCE_SMAX |
1220 | 0 | 0U, // G_VECREDUCE_SMIN |
1221 | 0 | 0U, // G_VECREDUCE_UMAX |
1222 | 0 | 0U, // G_VECREDUCE_UMIN |
1223 | 0 | 0U, // G_SBFX |
1224 | 0 | 0U, // G_UBFX |
1225 | 0 | 21345U, // CALL_PARAMS |
1226 | 0 | 21345U, // CALL_PARAMS_S |
1227 | 0 | 11959U, // CALL_RESULTS |
1228 | 0 | 11959U, // CALL_RESULTS_S |
1229 | 0 | 12261U, // CATCHRET |
1230 | 0 | 12261U, // CATCHRET_S |
1231 | 0 | 12270U, // CLEANUPRET |
1232 | 0 | 12270U, // CLEANUPRET_S |
1233 | 0 | 9452U, // COMPILER_FENCE |
1234 | 0 | 9452U, // COMPILER_FENCE_S |
1235 | 0 | 11952U, // RET_CALL_RESULTS |
1236 | 0 | 11952U, // RET_CALL_RESULTS_S |
1237 | 0 | 148009U, // ABS_F32 |
1238 | 0 | 8646U, // ABS_F32_S |
1239 | 0 | 152373U, // ABS_F32x4 |
1240 | 0 | 11912U, // ABS_F32x4_S |
1241 | 0 | 148019U, // ABS_F64 |
1242 | 0 | 8655U, // ABS_F64_S |
1243 | 0 | 152351U, // ABS_F64x2 |
1244 | 0 | 11892U, // ABS_F64x2_S |
1245 | 0 | 152406U, // ABS_I16x8 |
1246 | 0 | 11942U, // ABS_I16x8_S |
1247 | 0 | 152384U, // ABS_I32x4 |
1248 | 0 | 11922U, // ABS_I32x4_S |
1249 | 0 | 152362U, // ABS_I64x2 |
1250 | 0 | 11902U, // ABS_I64x2_S |
1251 | 0 | 152395U, // ABS_I8x16 |
1252 | 0 | 11932U, // ABS_I8x16_S |
1253 | 0 | 4342122U, // ADD_F32 |
1254 | 0 | 8484U, // ADD_F32_S |
1255 | 0 | 4343078U, // ADD_F32x4 |
1256 | 0 | 9308U, // ADD_F32x4_S |
1257 | 0 | 4342142U, // ADD_F64 |
1258 | 0 | 8502U, // ADD_F64_S |
1259 | 0 | 4343056U, // ADD_F64x2 |
1260 | 0 | 9288U, // ADD_F64x2_S |
1261 | 0 | 4343111U, // ADD_I16x8 |
1262 | 0 | 9338U, // ADD_I16x8_S |
1263 | 0 | 4342132U, // ADD_I32 |
1264 | 0 | 8493U, // ADD_I32_S |
1265 | 0 | 4343089U, // ADD_I32x4 |
1266 | 0 | 9318U, // ADD_I32x4_S |
1267 | 0 | 4342152U, // ADD_I64 |
1268 | 0 | 8511U, // ADD_I64_S |
1269 | 0 | 4343067U, // ADD_I64x2 |
1270 | 0 | 9298U, // ADD_I64x2_S |
1271 | 0 | 4343100U, // ADD_I8x16 |
1272 | 0 | 9328U, // ADD_I8x16_S |
1273 | 0 | 4346420U, // ADD_SAT_S_I16x8 |
1274 | 0 | 11676U, // ADD_SAT_S_I16x8_S |
1275 | 0 | 4346403U, // ADD_SAT_S_I8x16 |
1276 | 0 | 11660U, // ADD_SAT_S_I8x16_S |
1277 | 0 | 4349676U, // ADD_SAT_U_I16x8 |
1278 | 0 | 13506U, // ADD_SAT_U_I16x8_S |
1279 | 0 | 4349659U, // ADD_SAT_U_I8x16 |
1280 | 0 | 13490U, // ADD_SAT_U_I8x16_S |
1281 | 0 | 0U, // ADJCALLSTACKDOWN |
1282 | 0 | 0U, // ADJCALLSTACKDOWN_S |
1283 | 0 | 0U, // ADJCALLSTACKUP |
1284 | 0 | 0U, // ADJCALLSTACKUP_S |
1285 | 0 | 149640U, // ALLTRUE_I16x8 |
1286 | 0 | 9665U, // ALLTRUE_I16x8_S |
1287 | 0 | 149608U, // ALLTRUE_I32x4 |
1288 | 0 | 9635U, // ALLTRUE_I32x4_S |
1289 | 0 | 149592U, // ALLTRUE_I64x2 |
1290 | 0 | 9620U, // ALLTRUE_I64x2_S |
1291 | 0 | 149624U, // ALLTRUE_I8x16 |
1292 | 0 | 9650U, // ALLTRUE_I8x16_S |
1293 | 0 | 4343244U, // AND |
1294 | 0 | 4347293U, // ANDNOT |
1295 | 0 | 12361U, // ANDNOT_S |
1296 | 0 | 4342162U, // AND_I32 |
1297 | 0 | 8520U, // AND_I32_S |
1298 | 0 | 4342172U, // AND_I64 |
1299 | 0 | 8529U, // AND_I64_S |
1300 | 0 | 9426U, // AND_S |
1301 | 0 | 149656U, // ANYTRUE |
1302 | 0 | 9680U, // ANYTRUE_S |
1303 | 0 | 0U, // ARGUMENT_externref |
1304 | 0 | 0U, // ARGUMENT_externref_S |
1305 | 0 | 0U, // ARGUMENT_f32 |
1306 | 0 | 0U, // ARGUMENT_f32_S |
1307 | 0 | 0U, // ARGUMENT_f64 |
1308 | 0 | 0U, // ARGUMENT_f64_S |
1309 | 0 | 0U, // ARGUMENT_funcref |
1310 | 0 | 0U, // ARGUMENT_funcref_S |
1311 | 0 | 0U, // ARGUMENT_i32 |
1312 | 0 | 0U, // ARGUMENT_i32_S |
1313 | 0 | 0U, // ARGUMENT_i64 |
1314 | 0 | 0U, // ARGUMENT_i64_S |
1315 | 0 | 0U, // ARGUMENT_v16i8 |
1316 | 0 | 0U, // ARGUMENT_v16i8_S |
1317 | 0 | 0U, // ARGUMENT_v2f64 |
1318 | 0 | 0U, // ARGUMENT_v2f64_S |
1319 | 0 | 0U, // ARGUMENT_v2i64 |
1320 | 0 | 0U, // ARGUMENT_v2i64_S |
1321 | 0 | 0U, // ARGUMENT_v4f32 |
1322 | 0 | 0U, // ARGUMENT_v4f32_S |
1323 | 0 | 0U, // ARGUMENT_v4i32 |
1324 | 0 | 0U, // ARGUMENT_v4i32_S |
1325 | 0 | 0U, // ARGUMENT_v8i16 |
1326 | 0 | 0U, // ARGUMENT_v8i16_S |
1327 | 0 | 9439U, // ATOMIC_FENCE |
1328 | 0 | 9439U, // ATOMIC_FENCE_S |
1329 | 0 | 25843847U, // ATOMIC_LOAD16_U_I32_A32 |
1330 | 0 | 1349767U, // ATOMIC_LOAD16_U_I32_A32_S |
1331 | 0 | 25843847U, // ATOMIC_LOAD16_U_I32_A64 |
1332 | 0 | 1349767U, // ATOMIC_LOAD16_U_I32_A64_S |
1333 | 0 | 25843868U, // ATOMIC_LOAD16_U_I64_A32 |
1334 | 0 | 1349788U, // ATOMIC_LOAD16_U_I64_A32_S |
1335 | 0 | 25843868U, // ATOMIC_LOAD16_U_I64_A64 |
1336 | 0 | 1349788U, // ATOMIC_LOAD16_U_I64_A64_S |
1337 | 0 | 25843284U, // ATOMIC_LOAD32_U_I64_A32 |
1338 | 0 | 1349204U, // ATOMIC_LOAD32_U_I64_A32_S |
1339 | 0 | 25843284U, // ATOMIC_LOAD32_U_I64_A64 |
1340 | 0 | 1349204U, // ATOMIC_LOAD32_U_I64_A64_S |
1341 | 0 | 25844052U, // ATOMIC_LOAD8_U_I32_A32 |
1342 | 0 | 1349972U, // ATOMIC_LOAD8_U_I32_A32_S |
1343 | 0 | 25844052U, // ATOMIC_LOAD8_U_I32_A64 |
1344 | 0 | 1349972U, // ATOMIC_LOAD8_U_I32_A64_S |
1345 | 0 | 25844072U, // ATOMIC_LOAD8_U_I64_A32 |
1346 | 0 | 1349992U, // ATOMIC_LOAD8_U_I64_A32_S |
1347 | 0 | 25844072U, // ATOMIC_LOAD8_U_I64_A64 |
1348 | 0 | 1349992U, // ATOMIC_LOAD8_U_I64_A64_S |
1349 | 0 | 25838830U, // ATOMIC_LOAD_I32_A32 |
1350 | 0 | 1344750U, // ATOMIC_LOAD_I32_A32_S |
1351 | 0 | 25838830U, // ATOMIC_LOAD_I32_A64 |
1352 | 0 | 1344750U, // ATOMIC_LOAD_I32_A64_S |
1353 | 0 | 25838847U, // ATOMIC_LOAD_I64_A32 |
1354 | 0 | 1344767U, // ATOMIC_LOAD_I64_A32_S |
1355 | 0 | 25838847U, // ATOMIC_LOAD_I64_A64 |
1356 | 0 | 1344767U, // ATOMIC_LOAD_I64_A64_S |
1357 | 0 | 92953274U, // ATOMIC_RMW16_U_ADD_I32_A32 |
1358 | 0 | 1350330U, // ATOMIC_RMW16_U_ADD_I32_A32_S |
1359 | 0 | 92953274U, // ATOMIC_RMW16_U_ADD_I32_A64 |
1360 | 0 | 1350330U, // ATOMIC_RMW16_U_ADD_I32_A64_S |
1361 | 0 | 92953298U, // ATOMIC_RMW16_U_ADD_I64_A32 |
1362 | 0 | 1350354U, // ATOMIC_RMW16_U_ADD_I64_A32_S |
1363 | 0 | 92953298U, // ATOMIC_RMW16_U_ADD_I64_A64 |
1364 | 0 | 1350354U, // ATOMIC_RMW16_U_ADD_I64_A64_S |
1365 | 0 | 92953392U, // ATOMIC_RMW16_U_AND_I32_A32 |
1366 | 0 | 1350448U, // ATOMIC_RMW16_U_AND_I32_A32_S |
1367 | 0 | 92953392U, // ATOMIC_RMW16_U_AND_I32_A64 |
1368 | 0 | 1350448U, // ATOMIC_RMW16_U_AND_I32_A64_S |
1369 | 0 | 92953416U, // ATOMIC_RMW16_U_AND_I64_A32 |
1370 | 0 | 1350472U, // ATOMIC_RMW16_U_AND_I64_A32_S |
1371 | 0 | 92953416U, // ATOMIC_RMW16_U_AND_I64_A64 |
1372 | 0 | 1350472U, // ATOMIC_RMW16_U_AND_I64_A64_S |
1373 | 0 | 227171521U, // ATOMIC_RMW16_U_CMPXCHG_I32_A32 |
1374 | 0 | 1350849U, // ATOMIC_RMW16_U_CMPXCHG_I32_A32_S |
1375 | 0 | 227171521U, // ATOMIC_RMW16_U_CMPXCHG_I32_A64 |
1376 | 0 | 1350849U, // ATOMIC_RMW16_U_CMPXCHG_I32_A64_S |
1377 | 0 | 227171549U, // ATOMIC_RMW16_U_CMPXCHG_I64_A32 |
1378 | 0 | 1350877U, // ATOMIC_RMW16_U_CMPXCHG_I64_A32_S |
1379 | 0 | 227171549U, // ATOMIC_RMW16_U_CMPXCHG_I64_A64 |
1380 | 0 | 1350877U, // ATOMIC_RMW16_U_CMPXCHG_I64_A64_S |
1381 | 0 | 92954089U, // ATOMIC_RMW16_U_OR_I32_A32 |
1382 | 0 | 1351145U, // ATOMIC_RMW16_U_OR_I32_A32_S |
1383 | 0 | 92954089U, // ATOMIC_RMW16_U_OR_I32_A64 |
1384 | 0 | 1351145U, // ATOMIC_RMW16_U_OR_I32_A64_S |
1385 | 0 | 92954112U, // ATOMIC_RMW16_U_OR_I64_A32 |
1386 | 0 | 1351168U, // ATOMIC_RMW16_U_OR_I64_A32_S |
1387 | 0 | 92954112U, // ATOMIC_RMW16_U_OR_I64_A64 |
1388 | 0 | 1351168U, // ATOMIC_RMW16_U_OR_I64_A64_S |
1389 | 0 | 92953156U, // ATOMIC_RMW16_U_SUB_I32_A32 |
1390 | 0 | 1350212U, // ATOMIC_RMW16_U_SUB_I32_A32_S |
1391 | 0 | 92953156U, // ATOMIC_RMW16_U_SUB_I32_A64 |
1392 | 0 | 1350212U, // ATOMIC_RMW16_U_SUB_I32_A64_S |
1393 | 0 | 92953180U, // ATOMIC_RMW16_U_SUB_I64_A32 |
1394 | 0 | 1350236U, // ATOMIC_RMW16_U_SUB_I64_A32_S |
1395 | 0 | 92953180U, // ATOMIC_RMW16_U_SUB_I64_A64 |
1396 | 0 | 1350236U, // ATOMIC_RMW16_U_SUB_I64_A64_S |
1397 | 0 | 92953667U, // ATOMIC_RMW16_U_XCHG_I32_A32 |
1398 | 0 | 1350723U, // ATOMIC_RMW16_U_XCHG_I32_A32_S |
1399 | 0 | 92953667U, // ATOMIC_RMW16_U_XCHG_I32_A64 |
1400 | 0 | 1350723U, // ATOMIC_RMW16_U_XCHG_I32_A64_S |
1401 | 0 | 92953692U, // ATOMIC_RMW16_U_XCHG_I64_A32 |
1402 | 0 | 1350748U, // ATOMIC_RMW16_U_XCHG_I64_A32_S |
1403 | 0 | 92953692U, // ATOMIC_RMW16_U_XCHG_I64_A64 |
1404 | 0 | 1350748U, // ATOMIC_RMW16_U_XCHG_I64_A64_S |
1405 | 0 | 92954203U, // ATOMIC_RMW16_U_XOR_I32_A32 |
1406 | 0 | 1351259U, // ATOMIC_RMW16_U_XOR_I32_A32_S |
1407 | 0 | 92954203U, // ATOMIC_RMW16_U_XOR_I32_A64 |
1408 | 0 | 1351259U, // ATOMIC_RMW16_U_XOR_I32_A64_S |
1409 | 0 | 92954227U, // ATOMIC_RMW16_U_XOR_I64_A32 |
1410 | 0 | 1351283U, // ATOMIC_RMW16_U_XOR_I64_A32_S |
1411 | 0 | 92954227U, // ATOMIC_RMW16_U_XOR_I64_A64 |
1412 | 0 | 1351283U, // ATOMIC_RMW16_U_XOR_I64_A64_S |
1413 | 0 | 92953250U, // ATOMIC_RMW32_U_ADD_I64_A32 |
1414 | 0 | 1350306U, // ATOMIC_RMW32_U_ADD_I64_A32_S |
1415 | 0 | 92953250U, // ATOMIC_RMW32_U_ADD_I64_A64 |
1416 | 0 | 1350306U, // ATOMIC_RMW32_U_ADD_I64_A64_S |
1417 | 0 | 92953368U, // ATOMIC_RMW32_U_AND_I64_A32 |
1418 | 0 | 1350424U, // ATOMIC_RMW32_U_AND_I64_A32_S |
1419 | 0 | 92953368U, // ATOMIC_RMW32_U_AND_I64_A64 |
1420 | 0 | 1350424U, // ATOMIC_RMW32_U_AND_I64_A64_S |
1421 | 0 | 227171493U, // ATOMIC_RMW32_U_CMPXCHG_I64_A32 |
1422 | 0 | 1350821U, // ATOMIC_RMW32_U_CMPXCHG_I64_A32_S |
1423 | 0 | 227171493U, // ATOMIC_RMW32_U_CMPXCHG_I64_A64 |
1424 | 0 | 1350821U, // ATOMIC_RMW32_U_CMPXCHG_I64_A64_S |
1425 | 0 | 92954066U, // ATOMIC_RMW32_U_OR_I64_A32 |
1426 | 0 | 1351122U, // ATOMIC_RMW32_U_OR_I64_A32_S |
1427 | 0 | 92954066U, // ATOMIC_RMW32_U_OR_I64_A64 |
1428 | 0 | 1351122U, // ATOMIC_RMW32_U_OR_I64_A64_S |
1429 | 0 | 92953132U, // ATOMIC_RMW32_U_SUB_I64_A32 |
1430 | 0 | 1350188U, // ATOMIC_RMW32_U_SUB_I64_A32_S |
1431 | 0 | 92953132U, // ATOMIC_RMW32_U_SUB_I64_A64 |
1432 | 0 | 1350188U, // ATOMIC_RMW32_U_SUB_I64_A64_S |
1433 | 0 | 92953642U, // ATOMIC_RMW32_U_XCHG_I64_A32 |
1434 | 0 | 1350698U, // ATOMIC_RMW32_U_XCHG_I64_A32_S |
1435 | 0 | 92953642U, // ATOMIC_RMW32_U_XCHG_I64_A64 |
1436 | 0 | 1350698U, // ATOMIC_RMW32_U_XCHG_I64_A64_S |
1437 | 0 | 92954179U, // ATOMIC_RMW32_U_XOR_I64_A32 |
1438 | 0 | 1351235U, // ATOMIC_RMW32_U_XOR_I64_A32_S |
1439 | 0 | 92954179U, // ATOMIC_RMW32_U_XOR_I64_A64 |
1440 | 0 | 1351235U, // ATOMIC_RMW32_U_XOR_I64_A64_S |
1441 | 0 | 92953322U, // ATOMIC_RMW8_U_ADD_I32_A32 |
1442 | 0 | 1350378U, // ATOMIC_RMW8_U_ADD_I32_A32_S |
1443 | 0 | 92953322U, // ATOMIC_RMW8_U_ADD_I32_A64 |
1444 | 0 | 1350378U, // ATOMIC_RMW8_U_ADD_I32_A64_S |
1445 | 0 | 92953345U, // ATOMIC_RMW8_U_ADD_I64_A32 |
1446 | 0 | 1350401U, // ATOMIC_RMW8_U_ADD_I64_A32_S |
1447 | 0 | 92953345U, // ATOMIC_RMW8_U_ADD_I64_A64 |
1448 | 0 | 1350401U, // ATOMIC_RMW8_U_ADD_I64_A64_S |
1449 | 0 | 92953440U, // ATOMIC_RMW8_U_AND_I32_A32 |
1450 | 0 | 1350496U, // ATOMIC_RMW8_U_AND_I32_A32_S |
1451 | 0 | 92953440U, // ATOMIC_RMW8_U_AND_I32_A64 |
1452 | 0 | 1350496U, // ATOMIC_RMW8_U_AND_I32_A64_S |
1453 | 0 | 92953463U, // ATOMIC_RMW8_U_AND_I64_A32 |
1454 | 0 | 1350519U, // ATOMIC_RMW8_U_AND_I64_A32_S |
1455 | 0 | 92953463U, // ATOMIC_RMW8_U_AND_I64_A64 |
1456 | 0 | 1350519U, // ATOMIC_RMW8_U_AND_I64_A64_S |
1457 | 0 | 227171577U, // ATOMIC_RMW8_U_CMPXCHG_I32_A32 |
1458 | 0 | 1350905U, // ATOMIC_RMW8_U_CMPXCHG_I32_A32_S |
1459 | 0 | 227171577U, // ATOMIC_RMW8_U_CMPXCHG_I32_A64 |
1460 | 0 | 1350905U, // ATOMIC_RMW8_U_CMPXCHG_I32_A64_S |
1461 | 0 | 227171604U, // ATOMIC_RMW8_U_CMPXCHG_I64_A32 |
1462 | 0 | 1350932U, // ATOMIC_RMW8_U_CMPXCHG_I64_A32_S |
1463 | 0 | 227171604U, // ATOMIC_RMW8_U_CMPXCHG_I64_A64 |
1464 | 0 | 1350932U, // ATOMIC_RMW8_U_CMPXCHG_I64_A64_S |
1465 | 0 | 92954135U, // ATOMIC_RMW8_U_OR_I32_A32 |
1466 | 0 | 1351191U, // ATOMIC_RMW8_U_OR_I32_A32_S |
1467 | 0 | 92954135U, // ATOMIC_RMW8_U_OR_I32_A64 |
1468 | 0 | 1351191U, // ATOMIC_RMW8_U_OR_I32_A64_S |
1469 | 0 | 92954157U, // ATOMIC_RMW8_U_OR_I64_A32 |
1470 | 0 | 1351213U, // ATOMIC_RMW8_U_OR_I64_A32_S |
1471 | 0 | 92954157U, // ATOMIC_RMW8_U_OR_I64_A64 |
1472 | 0 | 1351213U, // ATOMIC_RMW8_U_OR_I64_A64_S |
1473 | 0 | 92953204U, // ATOMIC_RMW8_U_SUB_I32_A32 |
1474 | 0 | 1350260U, // ATOMIC_RMW8_U_SUB_I32_A32_S |
1475 | 0 | 92953204U, // ATOMIC_RMW8_U_SUB_I32_A64 |
1476 | 0 | 1350260U, // ATOMIC_RMW8_U_SUB_I32_A64_S |
1477 | 0 | 92953227U, // ATOMIC_RMW8_U_SUB_I64_A32 |
1478 | 0 | 1350283U, // ATOMIC_RMW8_U_SUB_I64_A32_S |
1479 | 0 | 92953227U, // ATOMIC_RMW8_U_SUB_I64_A64 |
1480 | 0 | 1350283U, // ATOMIC_RMW8_U_SUB_I64_A64_S |
1481 | 0 | 92953717U, // ATOMIC_RMW8_U_XCHG_I32_A32 |
1482 | 0 | 1350773U, // ATOMIC_RMW8_U_XCHG_I32_A32_S |
1483 | 0 | 92953717U, // ATOMIC_RMW8_U_XCHG_I32_A64 |
1484 | 0 | 1350773U, // ATOMIC_RMW8_U_XCHG_I32_A64_S |
1485 | 0 | 92953741U, // ATOMIC_RMW8_U_XCHG_I64_A32 |
1486 | 0 | 1350797U, // ATOMIC_RMW8_U_XCHG_I64_A32_S |
1487 | 0 | 92953741U, // ATOMIC_RMW8_U_XCHG_I64_A64 |
1488 | 0 | 1350797U, // ATOMIC_RMW8_U_XCHG_I64_A64_S |
1489 | 0 | 92954251U, // ATOMIC_RMW8_U_XOR_I32_A32 |
1490 | 0 | 1351307U, // ATOMIC_RMW8_U_XOR_I32_A32_S |
1491 | 0 | 92954251U, // ATOMIC_RMW8_U_XOR_I32_A64 |
1492 | 0 | 1351307U, // ATOMIC_RMW8_U_XOR_I32_A64_S |
1493 | 0 | 92954274U, // ATOMIC_RMW8_U_XOR_I64_A32 |
1494 | 0 | 1351330U, // ATOMIC_RMW8_U_XOR_I64_A32_S |
1495 | 0 | 92954274U, // ATOMIC_RMW8_U_XOR_I64_A64 |
1496 | 0 | 1351330U, // ATOMIC_RMW8_U_XOR_I64_A64_S |
1497 | 0 | 92947794U, // ATOMIC_RMW_ADD_I32_A32 |
1498 | 0 | 1344850U, // ATOMIC_RMW_ADD_I32_A32_S |
1499 | 0 | 92947794U, // ATOMIC_RMW_ADD_I32_A64 |
1500 | 0 | 1344850U, // ATOMIC_RMW_ADD_I32_A64_S |
1501 | 0 | 92947814U, // ATOMIC_RMW_ADD_I64_A32 |
1502 | 0 | 1344870U, // ATOMIC_RMW_ADD_I64_A32_S |
1503 | 0 | 92947814U, // ATOMIC_RMW_ADD_I64_A64 |
1504 | 0 | 1344870U, // ATOMIC_RMW_ADD_I64_A64_S |
1505 | 0 | 92947926U, // ATOMIC_RMW_AND_I32_A32 |
1506 | 0 | 1344982U, // ATOMIC_RMW_AND_I32_A32_S |
1507 | 0 | 92947926U, // ATOMIC_RMW_AND_I32_A64 |
1508 | 0 | 1344982U, // ATOMIC_RMW_AND_I32_A64_S |
1509 | 0 | 92947946U, // ATOMIC_RMW_AND_I64_A32 |
1510 | 0 | 1345002U, // ATOMIC_RMW_AND_I64_A32_S |
1511 | 0 | 92947946U, // ATOMIC_RMW_AND_I64_A64 |
1512 | 0 | 1345002U, // ATOMIC_RMW_AND_I64_A64_S |
1513 | 0 | 227166508U, // ATOMIC_RMW_CMPXCHG_I32_A32 |
1514 | 0 | 1345836U, // ATOMIC_RMW_CMPXCHG_I32_A32_S |
1515 | 0 | 227166508U, // ATOMIC_RMW_CMPXCHG_I32_A64 |
1516 | 0 | 1345836U, // ATOMIC_RMW_CMPXCHG_I32_A64_S |
1517 | 0 | 227166532U, // ATOMIC_RMW_CMPXCHG_I64_A32 |
1518 | 0 | 1345860U, // ATOMIC_RMW_CMPXCHG_I64_A32_S |
1519 | 0 | 227166532U, // ATOMIC_RMW_CMPXCHG_I64_A64 |
1520 | 0 | 1345860U, // ATOMIC_RMW_CMPXCHG_I64_A64_S |
1521 | 0 | 92949483U, // ATOMIC_RMW_OR_I32_A32 |
1522 | 0 | 1346539U, // ATOMIC_RMW_OR_I32_A32_S |
1523 | 0 | 92949483U, // ATOMIC_RMW_OR_I32_A64 |
1524 | 0 | 1346539U, // ATOMIC_RMW_OR_I32_A64_S |
1525 | 0 | 92949502U, // ATOMIC_RMW_OR_I64_A32 |
1526 | 0 | 1346558U, // ATOMIC_RMW_OR_I64_A32_S |
1527 | 0 | 92949502U, // ATOMIC_RMW_OR_I64_A64 |
1528 | 0 | 1346558U, // ATOMIC_RMW_OR_I64_A64_S |
1529 | 0 | 92947555U, // ATOMIC_RMW_SUB_I32_A32 |
1530 | 0 | 1344611U, // ATOMIC_RMW_SUB_I32_A32_S |
1531 | 0 | 92947555U, // ATOMIC_RMW_SUB_I32_A64 |
1532 | 0 | 1344611U, // ATOMIC_RMW_SUB_I32_A64_S |
1533 | 0 | 92947575U, // ATOMIC_RMW_SUB_I64_A32 |
1534 | 0 | 1344631U, // ATOMIC_RMW_SUB_I64_A32_S |
1535 | 0 | 92947575U, // ATOMIC_RMW_SUB_I64_A64 |
1536 | 0 | 1344631U, // ATOMIC_RMW_SUB_I64_A64_S |
1537 | 0 | 92948738U, // ATOMIC_RMW_XCHG_I32_A32 |
1538 | 0 | 1345794U, // ATOMIC_RMW_XCHG_I32_A32_S |
1539 | 0 | 92948738U, // ATOMIC_RMW_XCHG_I32_A64 |
1540 | 0 | 1345794U, // ATOMIC_RMW_XCHG_I32_A64_S |
1541 | 0 | 92948759U, // ATOMIC_RMW_XCHG_I64_A32 |
1542 | 0 | 1345815U, // ATOMIC_RMW_XCHG_I64_A32_S |
1543 | 0 | 92948759U, // ATOMIC_RMW_XCHG_I64_A64 |
1544 | 0 | 1345815U, // ATOMIC_RMW_XCHG_I64_A64_S |
1545 | 0 | 92949579U, // ATOMIC_RMW_XOR_I32_A32 |
1546 | 0 | 1346635U, // ATOMIC_RMW_XOR_I32_A32_S |
1547 | 0 | 92949579U, // ATOMIC_RMW_XOR_I32_A64 |
1548 | 0 | 1346635U, // ATOMIC_RMW_XOR_I32_A64_S |
1549 | 0 | 92949599U, // ATOMIC_RMW_XOR_I64_A32 |
1550 | 0 | 1346655U, // ATOMIC_RMW_XOR_I64_A32_S |
1551 | 0 | 92949599U, // ATOMIC_RMW_XOR_I64_A64 |
1552 | 0 | 1346655U, // ATOMIC_RMW_XOR_I64_A64_S |
1553 | 0 | 13534139U, // ATOMIC_STORE16_I32_A32 |
1554 | 0 | 1344443U, // ATOMIC_STORE16_I32_A32_S |
1555 | 0 | 13534139U, // ATOMIC_STORE16_I32_A64 |
1556 | 0 | 1344443U, // ATOMIC_STORE16_I32_A64_S |
1557 | 0 | 13534159U, // ATOMIC_STORE16_I64_A32 |
1558 | 0 | 1344463U, // ATOMIC_STORE16_I64_A32_S |
1559 | 0 | 13534159U, // ATOMIC_STORE16_I64_A64 |
1560 | 0 | 1344463U, // ATOMIC_STORE16_I64_A64_S |
1561 | 0 | 13533903U, // ATOMIC_STORE32_I64_A32 |
1562 | 0 | 1344207U, // ATOMIC_STORE32_I64_A32_S |
1563 | 0 | 13533903U, // ATOMIC_STORE32_I64_A64 |
1564 | 0 | 1344207U, // ATOMIC_STORE32_I64_A64_S |
1565 | 0 | 13534203U, // ATOMIC_STORE8_I32_A32 |
1566 | 0 | 1344507U, // ATOMIC_STORE8_I32_A32_S |
1567 | 0 | 13534203U, // ATOMIC_STORE8_I32_A64 |
1568 | 0 | 1344507U, // ATOMIC_STORE8_I32_A64_S |
1569 | 0 | 13534222U, // ATOMIC_STORE8_I64_A32 |
1570 | 0 | 1344526U, // ATOMIC_STORE8_I64_A32_S |
1571 | 0 | 13534222U, // ATOMIC_STORE8_I64_A64 |
1572 | 0 | 1344526U, // ATOMIC_STORE8_I64_A64_S |
1573 | 0 | 13535284U, // ATOMIC_STORE_I32_A32 |
1574 | 0 | 1345588U, // ATOMIC_STORE_I32_A32_S |
1575 | 0 | 13535284U, // ATOMIC_STORE_I32_A64 |
1576 | 0 | 1345588U, // ATOMIC_STORE_I32_A64_S |
1577 | 0 | 13535302U, // ATOMIC_STORE_I64_A32 |
1578 | 0 | 1345606U, // ATOMIC_STORE_I64_A32_S |
1579 | 0 | 13535302U, // ATOMIC_STORE_I64_A64 |
1580 | 0 | 1345606U, // ATOMIC_STORE_I64_A64_S |
1581 | 0 | 4349306U, // AVGR_U_I16x8 |
1582 | 0 | 13377U, // AVGR_U_I16x8_S |
1583 | 0 | 4349292U, // AVGR_U_I8x16 |
1584 | 0 | 13364U, // AVGR_U_I8x16_S |
1585 | 0 | 149897U, // BITMASK_I16x8 |
1586 | 0 | 9819U, // BITMASK_I16x8_S |
1587 | 0 | 149867U, // BITMASK_I32x4 |
1588 | 0 | 9791U, // BITMASK_I32x4_S |
1589 | 0 | 149852U, // BITMASK_I64x2 |
1590 | 0 | 9777U, // BITMASK_I64x2_S |
1591 | 0 | 149882U, // BITMASK_I8x16 |
1592 | 0 | 9805U, // BITMASK_I8x16_S |
1593 | 0 | 37901518U, // BITSELECT |
1594 | 0 | 12232U, // BITSELECT_S |
1595 | 0 | 49228U, // BLOCK |
1596 | 0 | 49228U, // BLOCK_S |
1597 | 0 | 16385U, // BR |
1598 | 0 | 147512U, // BR_IF |
1599 | 0 | 16440U, // BR_IF_S |
1600 | 0 | 16385U, // BR_S |
1601 | 0 | 16806U, // BR_TABLE_I32 |
1602 | 0 | 65958U, // BR_TABLE_I32_S |
1603 | 0 | 16806U, // BR_TABLE_I64 |
1604 | 0 | 65958U, // BR_TABLE_I64_S |
1605 | 0 | 0U, // BR_UNLESS |
1606 | 0 | 0U, // BR_UNLESS_S |
1607 | 0 | 9932U, // CALL |
1608 | 0 | 12247U, // CALL_INDIRECT |
1609 | 0 | 152805U, // CALL_INDIRECT_S |
1610 | 0 | 18935U, // CALL_S |
1611 | 0 | 9761U, // CATCH |
1612 | 0 | 9913U, // CATCH_ALL |
1613 | 0 | 9913U, // CATCH_ALL_S |
1614 | 0 | 16450U, // CATCH_S |
1615 | 0 | 149956U, // CEIL_F32 |
1616 | 0 | 9873U, // CEIL_F32_S |
1617 | 0 | 149988U, // CEIL_F32x4 |
1618 | 0 | 9902U, // CEIL_F32x4_S |
1619 | 0 | 149978U, // CEIL_F64 |
1620 | 0 | 9893U, // CEIL_F64_S |
1621 | 0 | 149966U, // CEIL_F64x2 |
1622 | 0 | 9882U, // CEIL_F64x2_S |
1623 | 0 | 148102U, // CLZ_I32 |
1624 | 0 | 8700U, // CLZ_I32_S |
1625 | 0 | 148112U, // CLZ_I64 |
1626 | 0 | 8709U, // CLZ_I64_S |
1627 | 0 | 153102U, // CONST_F32 |
1628 | 0 | 22030U, // CONST_F32_S |
1629 | 0 | 153124U, // CONST_F64 |
1630 | 0 | 22052U, // CONST_F64_S |
1631 | 0 | 153113U, // CONST_I32 |
1632 | 0 | 22041U, // CONST_I32_S |
1633 | 0 | 153135U, // CONST_I64 |
1634 | 0 | 22063U, // CONST_I64_S |
1635 | 0 | 105010746U, // CONST_V128_F32x4 |
1636 | 0 | 37901882U, // CONST_V128_F32x4_S |
1637 | 0 | 4347450U, // CONST_V128_F64x2 |
1638 | 0 | 153146U, // CONST_V128_F64x2_S |
1639 | 0 | 507663930U, // CONST_V128_I16x8 |
1640 | 0 | 1044534842U, // CONST_V128_I16x8_S |
1641 | 0 | 105010746U, // CONST_V128_I32x4 |
1642 | 0 | 37901882U, // CONST_V128_I32x4_S |
1643 | 0 | 4347450U, // CONST_V128_I64x2 |
1644 | 0 | 153146U, // CONST_V128_I64x2_S |
1645 | 0 | 1581405754U, // CONST_V128_I8x16 |
1646 | 0 | 3728889402U, // CONST_V128_I8x16_S |
1647 | 0 | 4344430U, // COPYSIGN_F32 |
1648 | 0 | 10017U, // COPYSIGN_F32_S |
1649 | 0 | 4344444U, // COPYSIGN_F64 |
1650 | 0 | 10030U, // COPYSIGN_F64_S |
1651 | 0 | 155705U, // COPY_EXTERNREF |
1652 | 0 | 13778U, // COPY_EXTERNREF_S |
1653 | 0 | 155705U, // COPY_F32 |
1654 | 0 | 13778U, // COPY_F32_S |
1655 | 0 | 155705U, // COPY_F64 |
1656 | 0 | 13778U, // COPY_F64_S |
1657 | 0 | 155705U, // COPY_FUNCREF |
1658 | 0 | 13778U, // COPY_FUNCREF_S |
1659 | 0 | 155705U, // COPY_I32 |
1660 | 0 | 13778U, // COPY_I32_S |
1661 | 0 | 155705U, // COPY_I64 |
1662 | 0 | 13778U, // COPY_I64_S |
1663 | 0 | 155705U, // COPY_V128 |
1664 | 0 | 13778U, // COPY_V128_S |
1665 | 0 | 148142U, // CTZ_I32 |
1666 | 0 | 8718U, // CTZ_I32_S |
1667 | 0 | 148152U, // CTZ_I64 |
1668 | 0 | 8727U, // CTZ_I64_S |
1669 | 0 | 9513U, // DEBUG_UNREACHABLE |
1670 | 0 | 9513U, // DEBUG_UNREACHABLE_S |
1671 | 0 | 24658U, // DELEGATE |
1672 | 0 | 24658U, // DELEGATE_S |
1673 | 0 | 4342333U, // DIV_F32 |
1674 | 0 | 8664U, // DIV_F32_S |
1675 | 0 | 4349877U, // DIV_F32x4 |
1676 | 0 | 13690U, // DIV_F32x4_S |
1677 | 0 | 4342343U, // DIV_F64 |
1678 | 0 | 8673U, // DIV_F64_S |
1679 | 0 | 4349866U, // DIV_F64x2 |
1680 | 0 | 13680U, // DIV_F64x2_S |
1681 | 0 | 4346594U, // DIV_S_I32 |
1682 | 0 | 11836U, // DIV_S_I32_S |
1683 | 0 | 4346605U, // DIV_S_I64 |
1684 | 0 | 11846U, // DIV_S_I64_S |
1685 | 0 | 4349805U, // DIV_U_I32 |
1686 | 0 | 13624U, // DIV_U_I32_S |
1687 | 0 | 4349816U, // DIV_U_I64 |
1688 | 0 | 13634U, // DIV_U_I64_S |
1689 | 0 | 4345882U, // DOT |
1690 | 0 | 11231U, // DOT_S |
1691 | 0 | 19360U, // DROP_EXTERNREF |
1692 | 0 | 10318U, // DROP_EXTERNREF_S |
1693 | 0 | 19360U, // DROP_F32 |
1694 | 0 | 10318U, // DROP_F32_S |
1695 | 0 | 19360U, // DROP_F64 |
1696 | 0 | 10318U, // DROP_F64_S |
1697 | 0 | 19360U, // DROP_FUNCREF |
1698 | 0 | 10318U, // DROP_FUNCREF_S |
1699 | 0 | 19360U, // DROP_I32 |
1700 | 0 | 10318U, // DROP_I32_S |
1701 | 0 | 19360U, // DROP_I64 |
1702 | 0 | 10318U, // DROP_I64_S |
1703 | 0 | 19360U, // DROP_V128 |
1704 | 0 | 10318U, // DROP_V128_S |
1705 | 0 | 9615U, // ELSE |
1706 | 0 | 9615U, // ELSE_S |
1707 | 0 | 9435U, // END |
1708 | 0 | 9767U, // END_BLOCK |
1709 | 0 | 9767U, // END_BLOCK_S |
1710 | 0 | 10121U, // END_FUNCTION |
1711 | 0 | 10121U, // END_FUNCTION_S |
1712 | 0 | 9694U, // END_IF |
1713 | 0 | 9694U, // END_IF_S |
1714 | 0 | 10309U, // END_LOOP |
1715 | 0 | 10309U, // END_LOOP_S |
1716 | 0 | 9435U, // END_S |
1717 | 0 | 13789U, // END_TRY |
1718 | 0 | 13789U, // END_TRY_S |
1719 | 0 | 148122U, // EQZ_I32 |
1720 | 0 | 13797U, // EQZ_I32_S |
1721 | 0 | 148132U, // EQZ_I64 |
1722 | 0 | 13805U, // EQZ_I64_S |
1723 | 0 | 4341936U, // EQ_F32 |
1724 | 0 | 8358U, // EQ_F32_S |
1725 | 0 | 4344762U, // EQ_F32x4 |
1726 | 0 | 10341U, // EQ_F32x4_S |
1727 | 0 | 4341956U, // EQ_F64 |
1728 | 0 | 8376U, // EQ_F64_S |
1729 | 0 | 4344742U, // EQ_F64x2 |
1730 | 0 | 10323U, // EQ_F64x2_S |
1731 | 0 | 4344792U, // EQ_I16x8 |
1732 | 0 | 10368U, // EQ_I16x8_S |
1733 | 0 | 4341946U, // EQ_I32 |
1734 | 0 | 8367U, // EQ_I32_S |
1735 | 0 | 4344772U, // EQ_I32x4 |
1736 | 0 | 10350U, // EQ_I32x4_S |
1737 | 0 | 4341966U, // EQ_I64 |
1738 | 0 | 8385U, // EQ_I64_S |
1739 | 0 | 4344752U, // EQ_I64x2 |
1740 | 0 | 10332U, // EQ_I64x2_S |
1741 | 0 | 4344782U, // EQ_I8x16 |
1742 | 0 | 10359U, // EQ_I8x16_S |
1743 | 0 | 4345662U, // EXTMUL_HIGH_S_I16x8 |
1744 | 0 | 11045U, // EXTMUL_HIGH_S_I16x8_S |
1745 | 0 | 4345855U, // EXTMUL_HIGH_S_I32x4 |
1746 | 0 | 11205U, // EXTMUL_HIGH_S_I32x4_S |
1747 | 0 | 4345342U, // EXTMUL_HIGH_S_I64x2 |
1748 | 0 | 10782U, // EXTMUL_HIGH_S_I64x2_S |
1749 | 0 | 4348139U, // EXTMUL_HIGH_U_I16x8 |
1750 | 0 | 12977U, // EXTMUL_HIGH_U_I16x8_S |
1751 | 0 | 4348342U, // EXTMUL_HIGH_U_I32x4 |
1752 | 0 | 13109U, // EXTMUL_HIGH_U_I32x4_S |
1753 | 0 | 4347842U, // EXTMUL_HIGH_U_I64x2 |
1754 | 0 | 12776U, // EXTMUL_HIGH_U_I64x2_S |
1755 | 0 | 4345715U, // EXTMUL_LOW_S_I16x8 |
1756 | 0 | 11096U, // EXTMUL_LOW_S_I16x8_S |
1757 | 0 | 4345927U, // EXTMUL_LOW_S_I32x4 |
1758 | 0 | 11274U, // EXTMUL_LOW_S_I32x4_S |
1759 | 0 | 4345418U, // EXTMUL_LOW_S_I64x2 |
1760 | 0 | 10855U, // EXTMUL_LOW_S_I64x2_S |
1761 | 0 | 4348192U, // EXTMUL_LOW_U_I16x8 |
1762 | 0 | 13028U, // EXTMUL_LOW_U_I16x8_S |
1763 | 0 | 4348395U, // EXTMUL_LOW_U_I32x4 |
1764 | 0 | 13160U, // EXTMUL_LOW_U_I32x4_S |
1765 | 0 | 4347918U, // EXTMUL_LOW_U_I64x2 |
1766 | 0 | 12849U, // EXTMUL_LOW_U_I64x2_S |
1767 | 0 | 4343764U, // EXTRACT_LANE_F32x4 |
1768 | 0 | 18388U, // EXTRACT_LANE_F32x4_S |
1769 | 0 | 4343724U, // EXTRACT_LANE_F64x2 |
1770 | 0 | 18348U, // EXTRACT_LANE_F64x2_S |
1771 | 0 | 4346187U, // EXTRACT_LANE_I16x8_s |
1772 | 0 | 20811U, // EXTRACT_LANE_I16x8_s_S |
1773 | 0 | 4348948U, // EXTRACT_LANE_I16x8_u |
1774 | 0 | 23572U, // EXTRACT_LANE_I16x8_u_S |
1775 | 0 | 4343784U, // EXTRACT_LANE_I32x4 |
1776 | 0 | 18408U, // EXTRACT_LANE_I32x4_S |
1777 | 0 | 4343744U, // EXTRACT_LANE_I64x2 |
1778 | 0 | 18368U, // EXTRACT_LANE_I64x2_S |
1779 | 0 | 4346165U, // EXTRACT_LANE_I8x16_s |
1780 | 0 | 20789U, // EXTRACT_LANE_I8x16_s_S |
1781 | 0 | 4348926U, // EXTRACT_LANE_I8x16_u |
1782 | 0 | 23550U, // EXTRACT_LANE_I8x16_u_S |
1783 | 0 | 150787U, // F32_CONVERT_S_I32 |
1784 | 0 | 10560U, // F32_CONVERT_S_I32_S |
1785 | 0 | 150919U, // F32_CONVERT_S_I64 |
1786 | 0 | 10668U, // F32_CONVERT_S_I64_S |
1787 | 0 | 153287U, // F32_CONVERT_U_I32 |
1788 | 0 | 12554U, // F32_CONVERT_U_I32_S |
1789 | 0 | 153419U, // F32_CONVERT_U_I64 |
1790 | 0 | 12662U, // F32_CONVERT_U_I64_S |
1791 | 0 | 148288U, // F32_DEMOTE_F64 |
1792 | 0 | 8973U, // F32_DEMOTE_F64_S |
1793 | 0 | 148267U, // F32_REINTERPRET_I32 |
1794 | 0 | 8953U, // F32_REINTERPRET_I32_S |
1795 | 0 | 150806U, // F64_CONVERT_S_I32 |
1796 | 0 | 10578U, // F64_CONVERT_S_I32_S |
1797 | 0 | 150938U, // F64_CONVERT_S_I64 |
1798 | 0 | 10686U, // F64_CONVERT_S_I64_S |
1799 | 0 | 153306U, // F64_CONVERT_U_I32 |
1800 | 0 | 12572U, // F64_CONVERT_U_I32_S |
1801 | 0 | 153438U, // F64_CONVERT_U_I64 |
1802 | 0 | 12680U, // F64_CONVERT_U_I64_S |
1803 | 0 | 148229U, // F64_PROMOTE_F32 |
1804 | 0 | 8917U, // F64_PROMOTE_F32_S |
1805 | 0 | 148339U, // F64_REINTERPRET_I64 |
1806 | 0 | 9021U, // F64_REINTERPRET_I64_S |
1807 | 0 | 0U, // FALLTHROUGH_RETURN |
1808 | 0 | 0U, // FALLTHROUGH_RETURN_S |
1809 | 0 | 150545U, // FLOOR_F32 |
1810 | 0 | 10385U, // FLOOR_F32_S |
1811 | 0 | 150580U, // FLOOR_F32x4 |
1812 | 0 | 10417U, // FLOOR_F32x4_S |
1813 | 0 | 150569U, // FLOOR_F64 |
1814 | 0 | 10407U, // FLOOR_F64_S |
1815 | 0 | 150556U, // FLOOR_F64x2 |
1816 | 0 | 10395U, // FLOOR_F64x2_S |
1817 | 0 | 0U, // FP_TO_SINT_I32_F32 |
1818 | 0 | 0U, // FP_TO_SINT_I32_F32_S |
1819 | 0 | 0U, // FP_TO_SINT_I32_F64 |
1820 | 0 | 0U, // FP_TO_SINT_I32_F64_S |
1821 | 0 | 0U, // FP_TO_SINT_I64_F32 |
1822 | 0 | 0U, // FP_TO_SINT_I64_F32_S |
1823 | 0 | 0U, // FP_TO_SINT_I64_F64 |
1824 | 0 | 0U, // FP_TO_SINT_I64_F64_S |
1825 | 0 | 0U, // FP_TO_UINT_I32_F32 |
1826 | 0 | 0U, // FP_TO_UINT_I32_F32_S |
1827 | 0 | 0U, // FP_TO_UINT_I32_F64 |
1828 | 0 | 0U, // FP_TO_UINT_I32_F64_S |
1829 | 0 | 0U, // FP_TO_UINT_I64_F32 |
1830 | 0 | 0U, // FP_TO_UINT_I64_F32_S |
1831 | 0 | 0U, // FP_TO_UINT_I64_F64 |
1832 | 0 | 0U, // FP_TO_UINT_I64_F64_S |
1833 | 0 | 4341856U, // GE_F32 |
1834 | 0 | 8286U, // GE_F32_S |
1835 | 0 | 4343315U, // GE_F32x4 |
1836 | 0 | 9486U, // GE_F32x4_S |
1837 | 0 | 4341866U, // GE_F64 |
1838 | 0 | 8295U, // GE_F64_S |
1839 | 0 | 4343305U, // GE_F64x2 |
1840 | 0 | 9477U, // GE_F64x2_S |
1841 | 0 | 4346085U, // GE_S_I16x8 |
1842 | 0 | 11407U, // GE_S_I16x8_S |
1843 | 0 | 4346029U, // GE_S_I32 |
1844 | 0 | 11356U, // GE_S_I32_S |
1845 | 0 | 4346061U, // GE_S_I32x4 |
1846 | 0 | 11385U, // GE_S_I32x4_S |
1847 | 0 | 4346051U, // GE_S_I64 |
1848 | 0 | 11376U, // GE_S_I64_S |
1849 | 0 | 4346039U, // GE_S_I64x2 |
1850 | 0 | 11365U, // GE_S_I64x2_S |
1851 | 0 | 4346073U, // GE_S_I8x16 |
1852 | 0 | 11396U, // GE_S_I8x16_S |
1853 | 0 | 4348858U, // GE_U_I16x8 |
1854 | 0 | 13246U, // GE_U_I16x8_S |
1855 | 0 | 4348814U, // GE_U_I32 |
1856 | 0 | 13206U, // GE_U_I32_S |
1857 | 0 | 4348834U, // GE_U_I32x4 |
1858 | 0 | 13224U, // GE_U_I32x4_S |
1859 | 0 | 4348824U, // GE_U_I64 |
1860 | 0 | 13215U, // GE_U_I64_S |
1861 | 0 | 4348846U, // GE_U_I8x16 |
1862 | 0 | 13235U, // GE_U_I8x16_S |
1863 | 0 | 152831U, // GLOBAL_GET_EXTERNREF |
1864 | 0 | 21759U, // GLOBAL_GET_EXTERNREF_S |
1865 | 0 | 152831U, // GLOBAL_GET_F32 |
1866 | 0 | 21759U, // GLOBAL_GET_F32_S |
1867 | 0 | 152831U, // GLOBAL_GET_F64 |
1868 | 0 | 21759U, // GLOBAL_GET_F64_S |
1869 | 0 | 152831U, // GLOBAL_GET_FUNCREF |
1870 | 0 | 21759U, // GLOBAL_GET_FUNCREF_S |
1871 | 0 | 152831U, // GLOBAL_GET_I32 |
1872 | 0 | 21759U, // GLOBAL_GET_I32_S |
1873 | 0 | 152831U, // GLOBAL_GET_I64 |
1874 | 0 | 21759U, // GLOBAL_GET_I64_S |
1875 | 0 | 152831U, // GLOBAL_GET_V128 |
1876 | 0 | 21759U, // GLOBAL_GET_V128_S |
1877 | 0 | 152865U, // GLOBAL_SET_EXTERNREF |
1878 | 0 | 21793U, // GLOBAL_SET_EXTERNREF_S |
1879 | 0 | 152865U, // GLOBAL_SET_F32 |
1880 | 0 | 21793U, // GLOBAL_SET_F32_S |
1881 | 0 | 152865U, // GLOBAL_SET_F64 |
1882 | 0 | 21793U, // GLOBAL_SET_F64_S |
1883 | 0 | 152865U, // GLOBAL_SET_FUNCREF |
1884 | 0 | 21793U, // GLOBAL_SET_FUNCREF_S |
1885 | 0 | 152865U, // GLOBAL_SET_I32 |
1886 | 0 | 21793U, // GLOBAL_SET_I32_S |
1887 | 0 | 152865U, // GLOBAL_SET_I64 |
1888 | 0 | 21793U, // GLOBAL_SET_I64_S |
1889 | 0 | 152865U, // GLOBAL_SET_V128 |
1890 | 0 | 21793U, // GLOBAL_SET_V128_S |
1891 | 0 | 4341996U, // GT_F32 |
1892 | 0 | 8412U, // GT_F32_S |
1893 | 0 | 4347202U, // GT_F32x4 |
1894 | 0 | 12290U, // GT_F32x4_S |
1895 | 0 | 4342006U, // GT_F64 |
1896 | 0 | 8421U, // GT_F64_S |
1897 | 0 | 4347192U, // GT_F64x2 |
1898 | 0 | 12281U, // GT_F64x2_S |
1899 | 0 | 4346514U, // GT_S_I16x8 |
1900 | 0 | 11763U, // GT_S_I16x8_S |
1901 | 0 | 4346458U, // GT_S_I32 |
1902 | 0 | 11712U, // GT_S_I32_S |
1903 | 0 | 4346490U, // GT_S_I32x4 |
1904 | 0 | 11741U, // GT_S_I32x4_S |
1905 | 0 | 4346480U, // GT_S_I64 |
1906 | 0 | 11732U, // GT_S_I64_S |
1907 | 0 | 4346468U, // GT_S_I64x2 |
1908 | 0 | 11721U, // GT_S_I64x2_S |
1909 | 0 | 4346502U, // GT_S_I8x16 |
1910 | 0 | 11752U, // GT_S_I8x16_S |
1911 | 0 | 4349737U, // GT_U_I16x8 |
1912 | 0 | 13562U, // GT_U_I16x8_S |
1913 | 0 | 4349693U, // GT_U_I32 |
1914 | 0 | 13522U, // GT_U_I32_S |
1915 | 0 | 4349713U, // GT_U_I32x4 |
1916 | 0 | 13540U, // GT_U_I32x4_S |
1917 | 0 | 4349703U, // GT_U_I64 |
1918 | 0 | 13531U, // GT_U_I64_S |
1919 | 0 | 4349725U, // GT_U_I8x16 |
1920 | 0 | 13551U, // GT_U_I8x16_S |
1921 | 0 | 151235U, // I32_EXTEND16_S_I32 |
1922 | 0 | 10927U, // I32_EXTEND16_S_I32_S |
1923 | 0 | 151463U, // I32_EXTEND8_S_I32 |
1924 | 0 | 11121U, // I32_EXTEND8_S_I32_S |
1925 | 0 | 148246U, // I32_REINTERPRET_F32 |
1926 | 0 | 8933U, // I32_REINTERPRET_F32_S |
1927 | 0 | 150693U, // I32_TRUNC_S_F32 |
1928 | 0 | 10471U, // I32_TRUNC_S_F32_S |
1929 | 0 | 150843U, // I32_TRUNC_S_F64 |
1930 | 0 | 10596U, // I32_TRUNC_S_F64_S |
1931 | 0 | 150727U, // I32_TRUNC_S_SAT_F32 |
1932 | 0 | 10503U, // I32_TRUNC_S_SAT_F32_S |
1933 | 0 | 150877U, // I32_TRUNC_S_SAT_F64 |
1934 | 0 | 10628U, // I32_TRUNC_S_SAT_F64_S |
1935 | 0 | 153193U, // I32_TRUNC_U_F32 |
1936 | 0 | 12465U, // I32_TRUNC_U_F32_S |
1937 | 0 | 153343U, // I32_TRUNC_U_F64 |
1938 | 0 | 12590U, // I32_TRUNC_U_F64_S |
1939 | 0 | 153227U, // I32_TRUNC_U_SAT_F32 |
1940 | 0 | 12497U, // I32_TRUNC_U_SAT_F32_S |
1941 | 0 | 153377U, // I32_TRUNC_U_SAT_F64 |
1942 | 0 | 12622U, // I32_TRUNC_U_SAT_F64_S |
1943 | 0 | 148325U, // I32_WRAP_I64 |
1944 | 0 | 9008U, // I32_WRAP_I64_S |
1945 | 0 | 151251U, // I64_EXTEND16_S_I64 |
1946 | 0 | 10942U, // I64_EXTEND16_S_I64_S |
1947 | 0 | 150677U, // I64_EXTEND32_S_I64 |
1948 | 0 | 10456U, // I64_EXTEND32_S_I64_S |
1949 | 0 | 151478U, // I64_EXTEND8_S_I64 |
1950 | 0 | 11135U, // I64_EXTEND8_S_I64_S |
1951 | 0 | 150769U, // I64_EXTEND_S_I32 |
1952 | 0 | 10543U, // I64_EXTEND_S_I32_S |
1953 | 0 | 153269U, // I64_EXTEND_U_I32 |
1954 | 0 | 12537U, // I64_EXTEND_U_I32_S |
1955 | 0 | 148304U, // I64_REINTERPRET_F64 |
1956 | 0 | 8988U, // I64_REINTERPRET_F64_S |
1957 | 0 | 150710U, // I64_TRUNC_S_F32 |
1958 | 0 | 10487U, // I64_TRUNC_S_F32_S |
1959 | 0 | 150860U, // I64_TRUNC_S_F64 |
1960 | 0 | 10612U, // I64_TRUNC_S_F64_S |
1961 | 0 | 150748U, // I64_TRUNC_S_SAT_F32 |
1962 | 0 | 10523U, // I64_TRUNC_S_SAT_F32_S |
1963 | 0 | 150898U, // I64_TRUNC_S_SAT_F64 |
1964 | 0 | 10648U, // I64_TRUNC_S_SAT_F64_S |
1965 | 0 | 153210U, // I64_TRUNC_U_F32 |
1966 | 0 | 12481U, // I64_TRUNC_U_F32_S |
1967 | 0 | 153360U, // I64_TRUNC_U_F64 |
1968 | 0 | 12606U, // I64_TRUNC_U_F64_S |
1969 | 0 | 153248U, // I64_TRUNC_U_SAT_F32 |
1970 | 0 | 12517U, // I64_TRUNC_U_SAT_F32_S |
1971 | 0 | 153398U, // I64_TRUNC_U_SAT_F64 |
1972 | 0 | 12642U, // I64_TRUNC_U_SAT_F64_S |
1973 | 0 | 180245U, // IF |
1974 | 0 | 49173U, // IF_S |
1975 | 0 | 37901492U, // LANESELECT_I16x8 |
1976 | 0 | 12207U, // LANESELECT_I16x8_S |
1977 | 0 | 37901440U, // LANESELECT_I32x4 |
1978 | 0 | 12157U, // LANESELECT_I32x4_S |
1979 | 0 | 37901414U, // LANESELECT_I64x2 |
1980 | 0 | 12132U, // LANESELECT_I64x2_S |
1981 | 0 | 37901466U, // LANESELECT_I8x16 |
1982 | 0 | 12182U, // LANESELECT_I8x16_S |
1983 | 0 | 4341876U, // LE_F32 |
1984 | 0 | 8304U, // LE_F32_S |
1985 | 0 | 4343335U, // LE_F32x4 |
1986 | 0 | 9504U, // LE_F32x4_S |
1987 | 0 | 4341886U, // LE_F64 |
1988 | 0 | 8313U, // LE_F64_S |
1989 | 0 | 4343325U, // LE_F64x2 |
1990 | 0 | 9495U, // LE_F64x2_S |
1991 | 0 | 4346153U, // LE_S_I16x8 |
1992 | 0 | 11469U, // LE_S_I16x8_S |
1993 | 0 | 4346097U, // LE_S_I32 |
1994 | 0 | 11418U, // LE_S_I32_S |
1995 | 0 | 4346129U, // LE_S_I32x4 |
1996 | 0 | 11447U, // LE_S_I32x4_S |
1997 | 0 | 4346119U, // LE_S_I64 |
1998 | 0 | 11438U, // LE_S_I64_S |
1999 | 0 | 4346107U, // LE_S_I64x2 |
2000 | 0 | 11427U, // LE_S_I64x2_S |
2001 | 0 | 4346141U, // LE_S_I8x16 |
2002 | 0 | 11458U, // LE_S_I8x16_S |
2003 | 0 | 4348914U, // LE_U_I16x8 |
2004 | 0 | 13297U, // LE_U_I16x8_S |
2005 | 0 | 4348870U, // LE_U_I32 |
2006 | 0 | 13257U, // LE_U_I32_S |
2007 | 0 | 4348890U, // LE_U_I32x4 |
2008 | 0 | 13275U, // LE_U_I32x4_S |
2009 | 0 | 4348880U, // LE_U_I64 |
2010 | 0 | 13266U, // LE_U_I64_S |
2011 | 0 | 4348902U, // LE_U_I8x16 |
2012 | 0 | 13286U, // LE_U_I8x16_S |
2013 | 0 | 25842658U, // LOAD16_SPLAT_A32 |
2014 | 0 | 1348578U, // LOAD16_SPLAT_A32_S |
2015 | 0 | 25842658U, // LOAD16_SPLAT_A64 |
2016 | 0 | 1348578U, // LOAD16_SPLAT_A64_S |
2017 | 0 | 25841319U, // LOAD16_S_I32_A32 |
2018 | 0 | 1347239U, // LOAD16_S_I32_A32_S |
2019 | 0 | 25841319U, // LOAD16_S_I32_A64 |
2020 | 0 | 1347239U, // LOAD16_S_I32_A64_S |
2021 | 0 | 25841333U, // LOAD16_S_I64_A32 |
2022 | 0 | 1347253U, // LOAD16_S_I64_A32_S |
2023 | 0 | 25841333U, // LOAD16_S_I64_A64 |
2024 | 0 | 1347253U, // LOAD16_S_I64_A64_S |
2025 | 0 | 25843819U, // LOAD16_U_I32_A32 |
2026 | 0 | 1349739U, // LOAD16_U_I32_A32_S |
2027 | 0 | 25843819U, // LOAD16_U_I32_A64 |
2028 | 0 | 1349739U, // LOAD16_U_I32_A64_S |
2029 | 0 | 25843833U, // LOAD16_U_I64_A32 |
2030 | 0 | 1349753U, // LOAD16_U_I64_A32_S |
2031 | 0 | 25843833U, // LOAD16_U_I64_A64 |
2032 | 0 | 1349753U, // LOAD16_U_I64_A64_S |
2033 | 0 | 25842620U, // LOAD32_SPLAT_A32 |
2034 | 0 | 1348540U, // LOAD32_SPLAT_A32_S |
2035 | 0 | 25842620U, // LOAD32_SPLAT_A64 |
2036 | 0 | 1348540U, // LOAD32_SPLAT_A64_S |
2037 | 0 | 25840775U, // LOAD32_S_I64_A32 |
2038 | 0 | 1346695U, // LOAD32_S_I64_A32_S |
2039 | 0 | 25840775U, // LOAD32_S_I64_A64 |
2040 | 0 | 1346695U, // LOAD32_S_I64_A64_S |
2041 | 0 | 25843270U, // LOAD32_U_I64_A32 |
2042 | 0 | 1349190U, // LOAD32_U_I64_A32_S |
2043 | 0 | 25843270U, // LOAD32_U_I64_A64 |
2044 | 0 | 1349190U, // LOAD32_U_I64_A64_S |
2045 | 0 | 25842639U, // LOAD64_SPLAT_A32 |
2046 | 0 | 1348559U, // LOAD64_SPLAT_A32_S |
2047 | 0 | 25842639U, // LOAD64_SPLAT_A64 |
2048 | 0 | 1348559U, // LOAD64_SPLAT_A64_S |
2049 | 0 | 25842677U, // LOAD8_SPLAT_A32 |
2050 | 0 | 1348597U, // LOAD8_SPLAT_A32_S |
2051 | 0 | 25842677U, // LOAD8_SPLAT_A64 |
2052 | 0 | 1348597U, // LOAD8_SPLAT_A64_S |
2053 | 0 | 25841549U, // LOAD8_S_I32_A32 |
2054 | 0 | 1347469U, // LOAD8_S_I32_A32_S |
2055 | 0 | 25841549U, // LOAD8_S_I32_A64 |
2056 | 0 | 1347469U, // LOAD8_S_I32_A64_S |
2057 | 0 | 25841562U, // LOAD8_S_I64_A32 |
2058 | 0 | 1347482U, // LOAD8_S_I64_A32_S |
2059 | 0 | 25841562U, // LOAD8_S_I64_A64 |
2060 | 0 | 1347482U, // LOAD8_S_I64_A64_S |
2061 | 0 | 25844026U, // LOAD8_U_I32_A32 |
2062 | 0 | 1349946U, // LOAD8_U_I32_A32_S |
2063 | 0 | 25844026U, // LOAD8_U_I32_A64 |
2064 | 0 | 1349946U, // LOAD8_U_I32_A64_S |
2065 | 0 | 25844039U, // LOAD8_U_I64_A32 |
2066 | 0 | 1349959U, // LOAD8_U_I64_A32_S |
2067 | 0 | 25844039U, // LOAD8_U_I64_A64 |
2068 | 0 | 1349959U, // LOAD8_U_I64_A64_S |
2069 | 0 | 25841783U, // LOAD_EXTEND_S_I16x8_A32 |
2070 | 0 | 1347703U, // LOAD_EXTEND_S_I16x8_A32_S |
2071 | 0 | 25841783U, // LOAD_EXTEND_S_I16x8_A64 |
2072 | 0 | 1347703U, // LOAD_EXTEND_S_I16x8_A64_S |
2073 | 0 | 25841301U, // LOAD_EXTEND_S_I32x4_A32 |
2074 | 0 | 1347221U, // LOAD_EXTEND_S_I32x4_A32_S |
2075 | 0 | 25841301U, // LOAD_EXTEND_S_I32x4_A64 |
2076 | 0 | 1347221U, // LOAD_EXTEND_S_I32x4_A64_S |
2077 | 0 | 25840937U, // LOAD_EXTEND_S_I64x2_A32 |
2078 | 0 | 1346857U, // LOAD_EXTEND_S_I64x2_A32_S |
2079 | 0 | 25840937U, // LOAD_EXTEND_S_I64x2_A64 |
2080 | 0 | 1346857U, // LOAD_EXTEND_S_I64x2_A64_S |
2081 | 0 | 25844251U, // LOAD_EXTEND_U_I16x8_A32 |
2082 | 0 | 1350171U, // LOAD_EXTEND_U_I16x8_A32_S |
2083 | 0 | 25844251U, // LOAD_EXTEND_U_I16x8_A64 |
2084 | 0 | 1350171U, // LOAD_EXTEND_U_I16x8_A64_S |
2085 | 0 | 25843801U, // LOAD_EXTEND_U_I32x4_A32 |
2086 | 0 | 1349721U, // LOAD_EXTEND_U_I32x4_A32_S |
2087 | 0 | 25843801U, // LOAD_EXTEND_U_I32x4_A64 |
2088 | 0 | 1349721U, // LOAD_EXTEND_U_I32x4_A64_S |
2089 | 0 | 25843437U, // LOAD_EXTEND_U_I64x2_A32 |
2090 | 0 | 1349357U, // LOAD_EXTEND_U_I64x2_A32_S |
2091 | 0 | 25843437U, // LOAD_EXTEND_U_I64x2_A64 |
2092 | 0 | 1349357U, // LOAD_EXTEND_U_I64x2_A64_S |
2093 | 0 | 25838779U, // LOAD_F32_A32 |
2094 | 0 | 1344699U, // LOAD_F32_A32_S |
2095 | 0 | 25838779U, // LOAD_F32_A64 |
2096 | 0 | 1344699U, // LOAD_F32_A64_S |
2097 | 0 | 25838799U, // LOAD_F64_A32 |
2098 | 0 | 1344719U, // LOAD_F64_A32_S |
2099 | 0 | 25838799U, // LOAD_F64_A64 |
2100 | 0 | 1344719U, // LOAD_F64_A64_S |
2101 | 0 | 25838789U, // LOAD_I32_A32 |
2102 | 0 | 1344709U, // LOAD_I32_A32_S |
2103 | 0 | 25838789U, // LOAD_I32_A64 |
2104 | 0 | 1344709U, // LOAD_I32_A64_S |
2105 | 0 | 25838809U, // LOAD_I64_A32 |
2106 | 0 | 1344729U, // LOAD_I64_A32_S |
2107 | 0 | 25838809U, // LOAD_I64_A64 |
2108 | 0 | 1344729U, // LOAD_I64_A64_S |
2109 | 0 | 59393772U, // LOAD_LANE_I16x8_A32 |
2110 | 0 | 1869548U, // LOAD_LANE_I16x8_A32_S |
2111 | 0 | 59393772U, // LOAD_LANE_I16x8_A64 |
2112 | 0 | 1869548U, // LOAD_LANE_I16x8_A64_S |
2113 | 0 | 59393698U, // LOAD_LANE_I32x4_A32 |
2114 | 0 | 1869474U, // LOAD_LANE_I32x4_A32_S |
2115 | 0 | 59393698U, // LOAD_LANE_I32x4_A64 |
2116 | 0 | 1869474U, // LOAD_LANE_I32x4_A64_S |
2117 | 0 | 59393735U, // LOAD_LANE_I64x2_A32 |
2118 | 0 | 1869511U, // LOAD_LANE_I64x2_A32_S |
2119 | 0 | 59393735U, // LOAD_LANE_I64x2_A64 |
2120 | 0 | 1869511U, // LOAD_LANE_I64x2_A64_S |
2121 | 0 | 59393809U, // LOAD_LANE_I8x16_A32 |
2122 | 0 | 1869585U, // LOAD_LANE_I8x16_A32_S |
2123 | 0 | 59393809U, // LOAD_LANE_I8x16_A64 |
2124 | 0 | 1869585U, // LOAD_LANE_I8x16_A64_S |
2125 | 0 | 25838819U, // LOAD_V128_A32 |
2126 | 0 | 1344739U, // LOAD_V128_A32_S |
2127 | 0 | 25838819U, // LOAD_V128_A64 |
2128 | 0 | 1344739U, // LOAD_V128_A64_S |
2129 | 0 | 25840350U, // LOAD_ZERO_I32x4_A32 |
2130 | 0 | 1346270U, // LOAD_ZERO_I32x4_A32_S |
2131 | 0 | 25840350U, // LOAD_ZERO_I32x4_A64 |
2132 | 0 | 1346270U, // LOAD_ZERO_I32x4_A64_S |
2133 | 0 | 25840393U, // LOAD_ZERO_I64x2_A32 |
2134 | 0 | 1346313U, // LOAD_ZERO_I64x2_A32_S |
2135 | 0 | 25840393U, // LOAD_ZERO_I64x2_A64 |
2136 | 0 | 1346313U, // LOAD_ZERO_I64x2_A64_S |
2137 | 0 | 152843U, // LOCAL_GET_EXTERNREF |
2138 | 0 | 21771U, // LOCAL_GET_EXTERNREF_S |
2139 | 0 | 152843U, // LOCAL_GET_F32 |
2140 | 0 | 21771U, // LOCAL_GET_F32_S |
2141 | 0 | 152843U, // LOCAL_GET_F64 |
2142 | 0 | 21771U, // LOCAL_GET_F64_S |
2143 | 0 | 152843U, // LOCAL_GET_FUNCREF |
2144 | 0 | 21771U, // LOCAL_GET_FUNCREF_S |
2145 | 0 | 152843U, // LOCAL_GET_I32 |
2146 | 0 | 21771U, // LOCAL_GET_I32_S |
2147 | 0 | 152843U, // LOCAL_GET_I64 |
2148 | 0 | 21771U, // LOCAL_GET_I64_S |
2149 | 0 | 152843U, // LOCAL_GET_V128 |
2150 | 0 | 21771U, // LOCAL_GET_V128_S |
2151 | 0 | 152877U, // LOCAL_SET_EXTERNREF |
2152 | 0 | 21805U, // LOCAL_SET_EXTERNREF_S |
2153 | 0 | 152877U, // LOCAL_SET_F32 |
2154 | 0 | 21805U, // LOCAL_SET_F32_S |
2155 | 0 | 152877U, // LOCAL_SET_F64 |
2156 | 0 | 21805U, // LOCAL_SET_F64_S |
2157 | 0 | 152877U, // LOCAL_SET_FUNCREF |
2158 | 0 | 21805U, // LOCAL_SET_FUNCREF_S |
2159 | 0 | 152877U, // LOCAL_SET_I32 |
2160 | 0 | 21805U, // LOCAL_SET_I32_S |
2161 | 0 | 152877U, // LOCAL_SET_I64 |
2162 | 0 | 21805U, // LOCAL_SET_I64_S |
2163 | 0 | 152877U, // LOCAL_SET_V128 |
2164 | 0 | 21805U, // LOCAL_SET_V128_S |
2165 | 0 | 4343294U, // LOCAL_TEE_EXTERNREF |
2166 | 0 | 17918U, // LOCAL_TEE_EXTERNREF_S |
2167 | 0 | 4343294U, // LOCAL_TEE_F32 |
2168 | 0 | 17918U, // LOCAL_TEE_F32_S |
2169 | 0 | 4343294U, // LOCAL_TEE_F64 |
2170 | 0 | 17918U, // LOCAL_TEE_F64_S |
2171 | 0 | 4343294U, // LOCAL_TEE_FUNCREF |
2172 | 0 | 17918U, // LOCAL_TEE_FUNCREF_S |
2173 | 0 | 4343294U, // LOCAL_TEE_I32 |
2174 | 0 | 17918U, // LOCAL_TEE_I32_S |
2175 | 0 | 4343294U, // LOCAL_TEE_I64 |
2176 | 0 | 17918U, // LOCAL_TEE_I64_S |
2177 | 0 | 4343294U, // LOCAL_TEE_V128 |
2178 | 0 | 17918U, // LOCAL_TEE_V128_S |
2179 | 0 | 49198U, // LOOP |
2180 | 0 | 49198U, // LOOP_S |
2181 | 0 | 4342016U, // LT_F32 |
2182 | 0 | 8430U, // LT_F32_S |
2183 | 0 | 4347235U, // LT_F32x4 |
2184 | 0 | 12308U, // LT_F32x4_S |
2185 | 0 | 4342026U, // LT_F64 |
2186 | 0 | 8439U, // LT_F64_S |
2187 | 0 | 4347225U, // LT_F64x2 |
2188 | 0 | 12299U, // LT_F64x2_S |
2189 | 0 | 4346582U, // LT_S_I16x8 |
2190 | 0 | 11825U, // LT_S_I16x8_S |
2191 | 0 | 4346526U, // LT_S_I32 |
2192 | 0 | 11774U, // LT_S_I32_S |
2193 | 0 | 4346558U, // LT_S_I32x4 |
2194 | 0 | 11803U, // LT_S_I32x4_S |
2195 | 0 | 4346548U, // LT_S_I64 |
2196 | 0 | 11794U, // LT_S_I64_S |
2197 | 0 | 4346536U, // LT_S_I64x2 |
2198 | 0 | 11783U, // LT_S_I64x2_S |
2199 | 0 | 4346570U, // LT_S_I8x16 |
2200 | 0 | 11814U, // LT_S_I8x16_S |
2201 | 0 | 4349793U, // LT_U_I16x8 |
2202 | 0 | 13613U, // LT_U_I16x8_S |
2203 | 0 | 4349749U, // LT_U_I32 |
2204 | 0 | 13573U, // LT_U_I32_S |
2205 | 0 | 4349769U, // LT_U_I32x4 |
2206 | 0 | 13591U, // LT_U_I32x4_S |
2207 | 0 | 4349759U, // LT_U_I64 |
2208 | 0 | 13582U, // LT_U_I64_S |
2209 | 0 | 4349781U, // LT_U_I8x16 |
2210 | 0 | 13602U, // LT_U_I8x16_S |
2211 | 0 | 37897614U, // MADD_F32x4 |
2212 | 0 | 9367U, // MADD_F32x4_S |
2213 | 0 | 37897594U, // MADD_F64x2 |
2214 | 0 | 9348U, // MADD_F64x2_S |
2215 | 0 | 4342363U, // MAX_F32 |
2216 | 0 | 8682U, // MAX_F32_S |
2217 | 0 | 4349924U, // MAX_F32x4 |
2218 | 0 | 13710U, // MAX_F32x4_S |
2219 | 0 | 4342373U, // MAX_F64 |
2220 | 0 | 8691U, // MAX_F64_S |
2221 | 0 | 4349913U, // MAX_F64x2 |
2222 | 0 | 13700U, // MAX_F64x2_S |
2223 | 0 | 4346642U, // MAX_S_I16x8 |
2224 | 0 | 11880U, // MAX_S_I16x8_S |
2225 | 0 | 4346616U, // MAX_S_I32x4 |
2226 | 0 | 11856U, // MAX_S_I32x4_S |
2227 | 0 | 4346629U, // MAX_S_I8x16 |
2228 | 0 | 11868U, // MAX_S_I8x16_S |
2229 | 0 | 4349853U, // MAX_U_I16x8 |
2230 | 0 | 13668U, // MAX_U_I16x8_S |
2231 | 0 | 4349827U, // MAX_U_I32x4 |
2232 | 0 | 13644U, // MAX_U_I32x4_S |
2233 | 0 | 4349840U, // MAX_U_I8x16 |
2234 | 0 | 13656U, // MAX_U_I8x16_S |
2235 | 0 | 92947055U, // MEMORY_ATOMIC_NOTIFY_A32 |
2236 | 0 | 1344111U, // MEMORY_ATOMIC_NOTIFY_A32_S |
2237 | 0 | 92947055U, // MEMORY_ATOMIC_NOTIFY_A64 |
2238 | 0 | 1344111U, // MEMORY_ATOMIC_NOTIFY_A64_S |
2239 | 0 | 227164436U, // MEMORY_ATOMIC_WAIT32_A32 |
2240 | 0 | 1343764U, // MEMORY_ATOMIC_WAIT32_A32_S |
2241 | 0 | 227164436U, // MEMORY_ATOMIC_WAIT32_A64 |
2242 | 0 | 1343764U, // MEMORY_ATOMIC_WAIT32_A64_S |
2243 | 0 | 227164459U, // MEMORY_ATOMIC_WAIT64_A32 |
2244 | 0 | 1343787U, // MEMORY_ATOMIC_WAIT64_A32_S |
2245 | 0 | 227164459U, // MEMORY_ATOMIC_WAIT64_A64 |
2246 | 0 | 1343787U, // MEMORY_ATOMIC_WAIT64_A64_S |
2247 | 0 | 4342273U, // MIN_F32 |
2248 | 0 | 8610U, // MIN_F32_S |
2249 | 0 | 4344469U, // MIN_F32x4 |
2250 | 0 | 10053U, // MIN_F32x4_S |
2251 | 0 | 4342283U, // MIN_F64 |
2252 | 0 | 8619U, // MIN_F64_S |
2253 | 0 | 4344458U, // MIN_F64x2 |
2254 | 0 | 10043U, // MIN_F64x2_S |
2255 | 0 | 4346257U, // MIN_S_I16x8 |
2256 | 0 | 11524U, // MIN_S_I16x8_S |
2257 | 0 | 4346231U, // MIN_S_I32x4 |
2258 | 0 | 11500U, // MIN_S_I32x4_S |
2259 | 0 | 4346244U, // MIN_S_I8x16 |
2260 | 0 | 11512U, // MIN_S_I8x16_S |
2261 | 0 | 4349279U, // MIN_U_I16x8 |
2262 | 0 | 13352U, // MIN_U_I16x8_S |
2263 | 0 | 4349253U, // MIN_U_I32x4 |
2264 | 0 | 13328U, // MIN_U_I32x4_S |
2265 | 0 | 4349266U, // MIN_U_I8x16 |
2266 | 0 | 13340U, // MIN_U_I8x16_S |
2267 | 0 | 4342233U, // MUL_F32 |
2268 | 0 | 8574U, // MUL_F32_S |
2269 | 0 | 4344397U, // MUL_F32x4 |
2270 | 0 | 9987U, // MUL_F32x4_S |
2271 | 0 | 4342253U, // MUL_F64 |
2272 | 0 | 8592U, // MUL_F64_S |
2273 | 0 | 4344375U, // MUL_F64x2 |
2274 | 0 | 9967U, // MUL_F64x2_S |
2275 | 0 | 4344419U, // MUL_I16x8 |
2276 | 0 | 10007U, // MUL_I16x8_S |
2277 | 0 | 4342243U, // MUL_I32 |
2278 | 0 | 8583U, // MUL_I32_S |
2279 | 0 | 4344408U, // MUL_I32x4 |
2280 | 0 | 9997U, // MUL_I32x4_S |
2281 | 0 | 4342263U, // MUL_I64 |
2282 | 0 | 8601U, // MUL_I64_S |
2283 | 0 | 4344386U, // MUL_I64x2 |
2284 | 0 | 9977U, // MUL_I64x2_S |
2285 | 0 | 4345471U, // NARROW_S_I16x8 |
2286 | 0 | 10906U, // NARROW_S_I16x8_S |
2287 | 0 | 4345953U, // NARROW_S_I8x16 |
2288 | 0 | 11299U, // NARROW_S_I8x16_S |
2289 | 0 | 4347971U, // NARROW_U_I16x8 |
2290 | 0 | 12900U, // NARROW_U_I16x8_S |
2291 | 0 | 4348421U, // NARROW_U_I8x16 |
2292 | 0 | 13185U, // NARROW_U_I8x16_S |
2293 | 0 | 153046U, // NEAREST_F32 |
2294 | 0 | 12413U, // NEAREST_F32_S |
2295 | 0 | 153087U, // NEAREST_F32x4 |
2296 | 0 | 12451U, // NEAREST_F32x4_S |
2297 | 0 | 153074U, // NEAREST_F64 |
2298 | 0 | 12439U, // NEAREST_F64_S |
2299 | 0 | 153059U, // NEAREST_F64x2 |
2300 | 0 | 12425U, // NEAREST_F64x2_S |
2301 | 0 | 147889U, // NEG_F32 |
2302 | 0 | 8538U, // NEG_F32_S |
2303 | 0 | 149718U, // NEG_F32x4 |
2304 | 0 | 9721U, // NEG_F32x4_S |
2305 | 0 | 147899U, // NEG_F64 |
2306 | 0 | 8547U, // NEG_F64_S |
2307 | 0 | 149696U, // NEG_F64x2 |
2308 | 0 | 9701U, // NEG_F64x2_S |
2309 | 0 | 149751U, // NEG_I16x8 |
2310 | 0 | 9751U, // NEG_I16x8_S |
2311 | 0 | 149729U, // NEG_I32x4 |
2312 | 0 | 9731U, // NEG_I32x4_S |
2313 | 0 | 149707U, // NEG_I64x2 |
2314 | 0 | 9711U, // NEG_I64x2_S |
2315 | 0 | 149740U, // NEG_I8x16 |
2316 | 0 | 9741U, // NEG_I8x16_S |
2317 | 0 | 4341896U, // NE_F32 |
2318 | 0 | 8322U, // NE_F32_S |
2319 | 0 | 4343418U, // NE_F32x4 |
2320 | 0 | 9579U, // NE_F32x4_S |
2321 | 0 | 4341916U, // NE_F64 |
2322 | 0 | 8340U, // NE_F64_S |
2323 | 0 | 4343398U, // NE_F64x2 |
2324 | 0 | 9561U, // NE_F64x2_S |
2325 | 0 | 4343448U, // NE_I16x8 |
2326 | 0 | 9606U, // NE_I16x8_S |
2327 | 0 | 4341906U, // NE_I32 |
2328 | 0 | 8331U, // NE_I32_S |
2329 | 0 | 4343428U, // NE_I32x4 |
2330 | 0 | 9588U, // NE_I32x4_S |
2331 | 0 | 4341926U, // NE_I64 |
2332 | 0 | 8349U, // NE_I64_S |
2333 | 0 | 4343408U, // NE_I64x2 |
2334 | 0 | 9570U, // NE_I64x2_S |
2335 | 0 | 4343438U, // NE_I8x16 |
2336 | 0 | 9597U, // NE_I8x16_S |
2337 | 0 | 37897655U, // NMADD_F32x4 |
2338 | 0 | 9406U, // NMADD_F32x4_S |
2339 | 0 | 37897634U, // NMADD_F64x2 |
2340 | 0 | 9386U, // NMADD_F64x2_S |
2341 | 0 | 10305U, // NOP |
2342 | 0 | 10305U, // NOP_S |
2343 | 0 | 152979U, // NOT |
2344 | 0 | 12352U, // NOT_S |
2345 | 0 | 4344802U, // OR |
2346 | 0 | 4341976U, // OR_I32 |
2347 | 0 | 8394U, // OR_I32_S |
2348 | 0 | 4341986U, // OR_I64 |
2349 | 0 | 8403U, // OR_I64_S |
2350 | 0 | 10377U, // OR_S |
2351 | 0 | 4349985U, // PMAX_F32x4 |
2352 | 0 | 13767U, // PMAX_F32x4_S |
2353 | 0 | 4349973U, // PMAX_F64x2 |
2354 | 0 | 13756U, // PMAX_F64x2_S |
2355 | 0 | 4344530U, // PMIN_F32x4 |
2356 | 0 | 10110U, // PMIN_F32x4_S |
2357 | 0 | 4344518U, // PMIN_F64x2 |
2358 | 0 | 10099U, // PMIN_F64x2_S |
2359 | 0 | 152941U, // POPCNT_I32 |
2360 | 0 | 12317U, // POPCNT_I32_S |
2361 | 0 | 152953U, // POPCNT_I64 |
2362 | 0 | 12328U, // POPCNT_I64_S |
2363 | 0 | 152965U, // POPCNT_I8x16 |
2364 | 0 | 12339U, // POPCNT_I8x16_S |
2365 | 0 | 4346437U, // Q15MULR_SAT_S_I16x8 |
2366 | 0 | 11692U, // Q15MULR_SAT_S_I16x8_S |
2367 | 0 | 35350U, // REF_IS_NULL_EXTERNREF |
2368 | 0 | 9937U, // REF_IS_NULL_EXTERNREF_S |
2369 | 0 | 35350U, // REF_IS_NULL_FUNCREF |
2370 | 0 | 9937U, // REF_IS_NULL_FUNCREF_S |
2371 | 0 | 26518U, // REF_NULL_EXTERNREF |
2372 | 0 | 10134U, // REF_NULL_EXTERNREF_S |
2373 | 0 | 25614U, // REF_NULL_FUNCREF |
2374 | 0 | 9230U, // REF_NULL_FUNCREF_S |
2375 | 0 | 4345571U, // RELAXED_DOT |
2376 | 0 | 37900424U, // RELAXED_DOT_ADD |
2377 | 0 | 11320U, // RELAXED_DOT_ADD_S |
2378 | 0 | 37896931U, // RELAXED_DOT_BFLOAT |
2379 | 0 | 8884U, // RELAXED_DOT_BFLOAT_S |
2380 | 0 | 10957U, // RELAXED_DOT_S |
2381 | 0 | 4346344U, // RELAXED_Q15MULR_S_I16x8 |
2382 | 0 | 11604U, // RELAXED_Q15MULR_S_I16x8_S |
2383 | 0 | 4343375U, // RELAXED_SWIZZLE |
2384 | 0 | 9539U, // RELAXED_SWIZZLE_S |
2385 | 0 | 4346209U, // REM_S_I32 |
2386 | 0 | 11480U, // REM_S_I32_S |
2387 | 0 | 4346220U, // REM_S_I64 |
2388 | 0 | 11490U, // REM_S_I64_S |
2389 | 0 | 4349231U, // REM_U_I32 |
2390 | 0 | 13308U, // REM_U_I32_S |
2391 | 0 | 4349242U, // REM_U_I64 |
2392 | 0 | 13318U, // REM_U_I64_S |
2393 | 0 | 37898076U, // REPLACE_LANE_F32x4 |
2394 | 0 | 18268U, // REPLACE_LANE_F32x4_S |
2395 | 0 | 37898036U, // REPLACE_LANE_F64x2 |
2396 | 0 | 18228U, // REPLACE_LANE_F64x2_S |
2397 | 0 | 37898136U, // REPLACE_LANE_I16x8 |
2398 | 0 | 18328U, // REPLACE_LANE_I16x8_S |
2399 | 0 | 37898096U, // REPLACE_LANE_I32x4 |
2400 | 0 | 18288U, // REPLACE_LANE_I32x4_S |
2401 | 0 | 37898056U, // REPLACE_LANE_I64x2 |
2402 | 0 | 18248U, // REPLACE_LANE_I64x2_S |
2403 | 0 | 37898116U, // REPLACE_LANE_I8x16 |
2404 | 0 | 18308U, // REPLACE_LANE_I8x16_S |
2405 | 0 | 16977U, // RETHROW |
2406 | 0 | 16977U, // RETHROW_S |
2407 | 0 | 10150U, // RETURN |
2408 | 0 | 10150U, // RETURN_S |
2409 | 0 | 16413U, // RET_CALL |
2410 | 0 | 5342U, // RET_CALL_INDIRECT |
2411 | 0 | 152798U, // RET_CALL_INDIRECT_S |
2412 | 0 | 18928U, // RET_CALL_S |
2413 | 0 | 4344355U, // ROTL_I32 |
2414 | 0 | 9949U, // ROTL_I32_S |
2415 | 0 | 4344365U, // ROTL_I64 |
2416 | 0 | 9958U, // ROTL_I64_S |
2417 | 0 | 4344947U, // ROTR_I32 |
2418 | 0 | 10438U, // ROTR_I32_S |
2419 | 0 | 4344957U, // ROTR_I64 |
2420 | 0 | 10447U, // ROTR_I64_S |
2421 | 0 | 37901396U, // SELECT_EXTERNREF |
2422 | 0 | 12115U, // SELECT_EXTERNREF_S |
2423 | 0 | 37901319U, // SELECT_F32 |
2424 | 0 | 12044U, // SELECT_F32_S |
2425 | 0 | 37901343U, // SELECT_F64 |
2426 | 0 | 12066U, // SELECT_F64_S |
2427 | 0 | 37901380U, // SELECT_FUNCREF |
2428 | 0 | 12100U, // SELECT_FUNCREF_S |
2429 | 0 | 37901331U, // SELECT_I32 |
2430 | 0 | 12055U, // SELECT_I32_S |
2431 | 0 | 37901355U, // SELECT_I64 |
2432 | 0 | 12077U, // SELECT_I64_S |
2433 | 0 | 37901367U, // SELECT_V128 |
2434 | 0 | 12088U, // SELECT_V128_S |
2435 | 0 | 4344249U, // SHL_I16x8 |
2436 | 0 | 9863U, // SHL_I16x8_S |
2437 | 0 | 4342213U, // SHL_I32 |
2438 | 0 | 8556U, // SHL_I32_S |
2439 | 0 | 4344227U, // SHL_I32x4 |
2440 | 0 | 9843U, // SHL_I32x4_S |
2441 | 0 | 4342223U, // SHL_I64 |
2442 | 0 | 8565U, // SHL_I64_S |
2443 | 0 | 4344216U, // SHL_I64x2 |
2444 | 0 | 9833U, // SHL_I64x2_S |
2445 | 0 | 4344238U, // SHL_I8x16 |
2446 | 0 | 9853U, // SHL_I8x16_S |
2447 | 0 | 4346331U, // SHR_S_I16x8 |
2448 | 0 | 11592U, // SHR_S_I16x8_S |
2449 | 0 | 4346270U, // SHR_S_I32 |
2450 | 0 | 11536U, // SHR_S_I32_S |
2451 | 0 | 4346305U, // SHR_S_I32x4 |
2452 | 0 | 11568U, // SHR_S_I32x4_S |
2453 | 0 | 4346294U, // SHR_S_I64 |
2454 | 0 | 11558U, // SHR_S_I64_S |
2455 | 0 | 4346281U, // SHR_S_I64x2 |
2456 | 0 | 11546U, // SHR_S_I64x2_S |
2457 | 0 | 4346318U, // SHR_S_I8x16 |
2458 | 0 | 11580U, // SHR_S_I8x16_S |
2459 | 0 | 4349381U, // SHR_U_I16x8 |
2460 | 0 | 13446U, // SHR_U_I16x8_S |
2461 | 0 | 4349320U, // SHR_U_I32 |
2462 | 0 | 13390U, // SHR_U_I32_S |
2463 | 0 | 4349355U, // SHR_U_I32x4 |
2464 | 0 | 13422U, // SHR_U_I32x4_S |
2465 | 0 | 4349344U, // SHR_U_I64 |
2466 | 0 | 13412U, // SHR_U_I64_S |
2467 | 0 | 4349331U, // SHR_U_I64x2 |
2468 | 0 | 13400U, // SHR_U_I64x2_S |
2469 | 0 | 4349368U, // SHR_U_I8x16 |
2470 | 0 | 13434U, // SHR_U_I8x16_S |
2471 | 0 | 1581401649U, // SHUFFLE |
2472 | 0 | 3728885297U, // SHUFFLE_S |
2473 | 0 | 4349954U, // SIMD_RELAXED_FMAX_F32x4 |
2474 | 0 | 13738U, // SIMD_RELAXED_FMAX_F32x4_S |
2475 | 0 | 4349935U, // SIMD_RELAXED_FMAX_F64x2 |
2476 | 0 | 13720U, // SIMD_RELAXED_FMAX_F64x2_S |
2477 | 0 | 4344499U, // SIMD_RELAXED_FMIN_F32x4 |
2478 | 0 | 10081U, // SIMD_RELAXED_FMIN_F32x4_S |
2479 | 0 | 4344480U, // SIMD_RELAXED_FMIN_F64x2 |
2480 | 0 | 10063U, // SIMD_RELAXED_FMIN_F64x2_S |
2481 | 0 | 152456U, // SPLAT_F32x4 |
2482 | 0 | 11996U, // SPLAT_F32x4_S |
2483 | 0 | 152430U, // SPLAT_F64x2 |
2484 | 0 | 11972U, // SPLAT_F64x2_S |
2485 | 0 | 152495U, // SPLAT_I16x8 |
2486 | 0 | 12032U, // SPLAT_I16x8_S |
2487 | 0 | 152469U, // SPLAT_I32x4 |
2488 | 0 | 12008U, // SPLAT_I32x4_S |
2489 | 0 | 152443U, // SPLAT_I64x2 |
2490 | 0 | 11984U, // SPLAT_I64x2_S |
2491 | 0 | 152482U, // SPLAT_I8x16 |
2492 | 0 | 12020U, // SPLAT_I8x16_S |
2493 | 0 | 153002U, // SQRT_F32 |
2494 | 0 | 12373U, // SQRT_F32_S |
2495 | 0 | 153034U, // SQRT_F32x4 |
2496 | 0 | 12402U, // SQRT_F32x4_S |
2497 | 0 | 153024U, // SQRT_F64 |
2498 | 0 | 12393U, // SQRT_F64_S |
2499 | 0 | 153012U, // SQRT_F64x2 |
2500 | 0 | 12382U, // SQRT_F64x2_S |
2501 | 0 | 13534113U, // STORE16_I32_A32 |
2502 | 0 | 1344417U, // STORE16_I32_A32_S |
2503 | 0 | 13534113U, // STORE16_I32_A64 |
2504 | 0 | 1344417U, // STORE16_I32_A64_S |
2505 | 0 | 13534126U, // STORE16_I64_A32 |
2506 | 0 | 1344430U, // STORE16_I64_A32_S |
2507 | 0 | 13534126U, // STORE16_I64_A64 |
2508 | 0 | 1344430U, // STORE16_I64_A64_S |
2509 | 0 | 13533890U, // STORE32_I64_A32 |
2510 | 0 | 1344194U, // STORE32_I64_A32_S |
2511 | 0 | 13533890U, // STORE32_I64_A64 |
2512 | 0 | 1344194U, // STORE32_I64_A64_S |
2513 | 0 | 13534179U, // STORE8_I32_A32 |
2514 | 0 | 1344483U, // STORE8_I32_A32_S |
2515 | 0 | 13534179U, // STORE8_I32_A64 |
2516 | 0 | 1344483U, // STORE8_I32_A64_S |
2517 | 0 | 13534191U, // STORE8_I64_A32 |
2518 | 0 | 1344495U, // STORE8_I64_A32_S |
2519 | 0 | 13534191U, // STORE8_I64_A64 |
2520 | 0 | 1344495U, // STORE8_I64_A64_S |
2521 | 0 | 13535228U, // STORE_F32_A32 |
2522 | 0 | 1345532U, // STORE_F32_A32_S |
2523 | 0 | 13535228U, // STORE_F32_A64 |
2524 | 0 | 1345532U, // STORE_F32_A64_S |
2525 | 0 | 13535250U, // STORE_F64_A32 |
2526 | 0 | 1345554U, // STORE_F64_A32_S |
2527 | 0 | 13535250U, // STORE_F64_A64 |
2528 | 0 | 1345554U, // STORE_F64_A64_S |
2529 | 0 | 13535239U, // STORE_I32_A32 |
2530 | 0 | 1345543U, // STORE_I32_A32_S |
2531 | 0 | 13535239U, // STORE_I32_A64 |
2532 | 0 | 1345543U, // STORE_I32_A64_S |
2533 | 0 | 13535261U, // STORE_I64_A32 |
2534 | 0 | 1345565U, // STORE_I64_A32_S |
2535 | 0 | 13535261U, // STORE_I64_A64 |
2536 | 0 | 1345565U, // STORE_I64_A64_S |
2537 | 0 | 2524926U, // STORE_LANE_I16x8_A32 |
2538 | 0 | 1869566U, // STORE_LANE_I16x8_A32_S |
2539 | 0 | 2524926U, // STORE_LANE_I16x8_A64 |
2540 | 0 | 1869566U, // STORE_LANE_I16x8_A64_S |
2541 | 0 | 2524852U, // STORE_LANE_I32x4_A32 |
2542 | 0 | 1869492U, // STORE_LANE_I32x4_A32_S |
2543 | 0 | 2524852U, // STORE_LANE_I32x4_A64 |
2544 | 0 | 1869492U, // STORE_LANE_I32x4_A64_S |
2545 | 0 | 2524889U, // STORE_LANE_I64x2_A32 |
2546 | 0 | 1869529U, // STORE_LANE_I64x2_A32_S |
2547 | 0 | 2524889U, // STORE_LANE_I64x2_A64 |
2548 | 0 | 1869529U, // STORE_LANE_I64x2_A64_S |
2549 | 0 | 2524962U, // STORE_LANE_I8x16_A32 |
2550 | 0 | 1869602U, // STORE_LANE_I8x16_A32_S |
2551 | 0 | 2524962U, // STORE_LANE_I8x16_A64 |
2552 | 0 | 1869602U, // STORE_LANE_I8x16_A64_S |
2553 | 0 | 13535272U, // STORE_V128_A32 |
2554 | 0 | 1345576U, // STORE_V128_A32_S |
2555 | 0 | 13535272U, // STORE_V128_A64 |
2556 | 0 | 1345576U, // STORE_V128_A64_S |
2557 | 0 | 4342082U, // SUB_F32 |
2558 | 0 | 8448U, // SUB_F32_S |
2559 | 0 | 4342839U, // SUB_F32x4 |
2560 | 0 | 9190U, // SUB_F32x4_S |
2561 | 0 | 4342102U, // SUB_F64 |
2562 | 0 | 8466U, // SUB_F64_S |
2563 | 0 | 4342817U, // SUB_F64x2 |
2564 | 0 | 9170U, // SUB_F64x2_S |
2565 | 0 | 4342872U, // SUB_I16x8 |
2566 | 0 | 9220U, // SUB_I16x8_S |
2567 | 0 | 4342092U, // SUB_I32 |
2568 | 0 | 8457U, // SUB_I32_S |
2569 | 0 | 4342850U, // SUB_I32x4 |
2570 | 0 | 9200U, // SUB_I32x4_S |
2571 | 0 | 4342112U, // SUB_I64 |
2572 | 0 | 8475U, // SUB_I64_S |
2573 | 0 | 4342828U, // SUB_I64x2 |
2574 | 0 | 9180U, // SUB_I64x2_S |
2575 | 0 | 4342861U, // SUB_I8x16 |
2576 | 0 | 9210U, // SUB_I8x16_S |
2577 | 0 | 4346386U, // SUB_SAT_S_I16x8 |
2578 | 0 | 11644U, // SUB_SAT_S_I16x8_S |
2579 | 0 | 4346369U, // SUB_SAT_S_I8x16 |
2580 | 0 | 11628U, // SUB_SAT_S_I8x16_S |
2581 | 0 | 4349642U, // SUB_SAT_U_I16x8 |
2582 | 0 | 13474U, // SUB_SAT_U_I16x8_S |
2583 | 0 | 4349625U, // SUB_SAT_U_I8x16 |
2584 | 0 | 13458U, // SUB_SAT_U_I8x16_S |
2585 | 0 | 4343360U, // SWIZZLE |
2586 | 0 | 9525U, // SWIZZLE_S |
2587 | 0 | 105013293U, // TABLE_COPY |
2588 | 0 | 155693U, // TABLE_COPY_S |
2589 | 0 | 37898749U, // TABLE_FILL_EXTERNREF |
2590 | 0 | 18941U, // TABLE_FILL_EXTERNREF_S |
2591 | 0 | 37898749U, // TABLE_FILL_FUNCREF |
2592 | 0 | 18941U, // TABLE_FILL_FUNCREF_S |
2593 | 0 | 4347124U, // TABLE_GET_EXTERNREF |
2594 | 0 | 21748U, // TABLE_GET_EXTERNREF_S |
2595 | 0 | 4347124U, // TABLE_GET_FUNCREF |
2596 | 0 | 21748U, // TABLE_GET_FUNCREF_S |
2597 | 0 | 37904320U, // TABLE_GROW_EXTERNREF |
2598 | 0 | 24512U, // TABLE_GROW_EXTERNREF_S |
2599 | 0 | 37904320U, // TABLE_GROW_FUNCREF |
2600 | 0 | 24512U, // TABLE_GROW_FUNCREF_S |
2601 | 0 | 4347158U, // TABLE_SET_EXTERNREF |
2602 | 0 | 21782U, // TABLE_SET_EXTERNREF_S |
2603 | 0 | 4347158U, // TABLE_SET_FUNCREF |
2604 | 0 | 21782U, // TABLE_SET_FUNCREF_S |
2605 | 0 | 149671U, // TABLE_SIZE |
2606 | 0 | 18599U, // TABLE_SIZE_S |
2607 | 0 | 4343294U, // TEE_EXTERNREF |
2608 | 0 | 9467U, // TEE_EXTERNREF_S |
2609 | 0 | 4343294U, // TEE_F32 |
2610 | 0 | 9467U, // TEE_F32_S |
2611 | 0 | 4343294U, // TEE_F64 |
2612 | 0 | 9467U, // TEE_F64_S |
2613 | 0 | 4343294U, // TEE_FUNCREF |
2614 | 0 | 9467U, // TEE_FUNCREF_S |
2615 | 0 | 4343294U, // TEE_I32 |
2616 | 0 | 9467U, // TEE_I32_S |
2617 | 0 | 4343294U, // TEE_I64 |
2618 | 0 | 9467U, // TEE_I64_S |
2619 | 0 | 4343294U, // TEE_V128 |
2620 | 0 | 9467U, // TEE_V128_S |
2621 | 0 | 16470U, // THROW |
2622 | 0 | 16470U, // THROW_S |
2623 | 0 | 148619U, // TRUNC_F32 |
2624 | 0 | 9244U, // TRUNC_F32_S |
2625 | 0 | 148654U, // TRUNC_F32x4 |
2626 | 0 | 9276U, // TRUNC_F32x4_S |
2627 | 0 | 148643U, // TRUNC_F64 |
2628 | 0 | 9266U, // TRUNC_F64_S |
2629 | 0 | 148630U, // TRUNC_F64x2 |
2630 | 0 | 9254U, // TRUNC_F64x2_S |
2631 | 0 | 49163U, // TRY |
2632 | 0 | 49163U, // TRY_S |
2633 | 0 | 9513U, // UNREACHABLE |
2634 | 0 | 9513U, // UNREACHABLE_S |
2635 | 0 | 4344897U, // XOR |
2636 | 0 | 4342293U, // XOR_I32 |
2637 | 0 | 8628U, // XOR_I32_S |
2638 | 0 | 4342303U, // XOR_I64 |
2639 | 0 | 8637U, // XOR_I64_S |
2640 | 0 | 10429U, // XOR_S |
2641 | 0 | 4349900U, // anonymous_7277MEMORY_GROW_A32 |
2642 | 0 | 24524U, // anonymous_7277MEMORY_GROW_A32_S |
2643 | 0 | 149683U, // anonymous_7277MEMORY_SIZE_A32 |
2644 | 0 | 18611U, // anonymous_7277MEMORY_SIZE_A32_S |
2645 | 0 | 4349900U, // anonymous_7278MEMORY_GROW_A64 |
2646 | 0 | 24524U, // anonymous_7278MEMORY_GROW_A64_S |
2647 | 0 | 149683U, // anonymous_7278MEMORY_SIZE_A64 |
2648 | 0 | 18611U, // anonymous_7278MEMORY_SIZE_A64_S |
2649 | 0 | 19355U, // anonymous_7959DATA_DROP |
2650 | 0 | 19355U, // anonymous_7959DATA_DROP_S |
2651 | 0 | 105013317U, // anonymous_7959MEMORY_COPY_A32 |
2652 | 0 | 155717U, // anonymous_7959MEMORY_COPY_A32_S |
2653 | 0 | 37898761U, // anonymous_7959MEMORY_FILL_A32 |
2654 | 0 | 18953U, // anonymous_7959MEMORY_FILL_A32_S |
2655 | 0 | 105010508U, // anonymous_7959MEMORY_INIT_A32 |
2656 | 0 | 152908U, // anonymous_7959MEMORY_INIT_A32_S |
2657 | 0 | 19355U, // anonymous_7960DATA_DROP |
2658 | 0 | 19355U, // anonymous_7960DATA_DROP_S |
2659 | 0 | 105013317U, // anonymous_7960MEMORY_COPY_A64 |
2660 | 0 | 155717U, // anonymous_7960MEMORY_COPY_A64_S |
2661 | 0 | 37898761U, // anonymous_7960MEMORY_FILL_A64 |
2662 | 0 | 18953U, // anonymous_7960MEMORY_FILL_A64_S |
2663 | 0 | 105010508U, // anonymous_7960MEMORY_INIT_A64 |
2664 | 0 | 152908U, // anonymous_7960MEMORY_INIT_A64_S |
2665 | 0 | 151140U, // convert_low_s_F64x2 |
2666 | 0 | 10880U, // convert_low_s_F64x2_S |
2667 | 0 | 153640U, // convert_low_u_F64x2 |
2668 | 0 | 12874U, // convert_low_u_F64x2_S |
2669 | 0 | 150256U, // demote_zero_F32x4 |
2670 | 0 | 10157U, // demote_zero_F32x4_S |
2671 | 0 | 151331U, // extend_high_s_I16x8 |
2672 | 0 | 11019U, // extend_high_s_I16x8_S |
2673 | 0 | 151524U, // extend_high_s_I32x4 |
2674 | 0 | 11179U, // extend_high_s_I32x4_S |
2675 | 0 | 151011U, // extend_high_s_I64x2 |
2676 | 0 | 10756U, // extend_high_s_I64x2_S |
2677 | 0 | 153808U, // extend_high_u_I16x8 |
2678 | 0 | 12951U, // extend_high_u_I16x8_S |
2679 | 0 | 154011U, // extend_high_u_I32x4 |
2680 | 0 | 13083U, // extend_high_u_I32x4_S |
2681 | 0 | 153511U, // extend_high_u_I64x2 |
2682 | 0 | 12750U, // extend_high_u_I64x2_S |
2683 | 0 | 151385U, // extend_low_s_I16x8 |
2684 | 0 | 11071U, // extend_low_s_I16x8_S |
2685 | 0 | 151597U, // extend_low_s_I32x4 |
2686 | 0 | 11249U, // extend_low_s_I32x4_S |
2687 | 0 | 151088U, // extend_low_s_I64x2 |
2688 | 0 | 10830U, // extend_low_s_I64x2_S |
2689 | 0 | 153862U, // extend_low_u_I16x8 |
2690 | 0 | 13003U, // extend_low_u_I16x8_S |
2691 | 0 | 154065U, // extend_low_u_I32x4 |
2692 | 0 | 13135U, // extend_low_u_I32x4_S |
2693 | 0 | 153588U, // extend_low_u_I64x2 |
2694 | 0 | 12824U, // extend_low_u_I64x2_S |
2695 | 0 | 150986U, // fp_to_sint_I32x4 |
2696 | 0 | 10732U, // fp_to_sint_I32x4_S |
2697 | 0 | 153486U, // fp_to_uint_I32x4 |
2698 | 0 | 12726U, // fp_to_uint_I32x4_S |
2699 | 0 | 151300U, // int_wasm_extadd_pairwise_signed_I16x8 |
2700 | 0 | 10989U, // int_wasm_extadd_pairwise_signed_I16x8_S |
2701 | 0 | 151493U, // int_wasm_extadd_pairwise_signed_I32x4 |
2702 | 0 | 11149U, // int_wasm_extadd_pairwise_signed_I32x4_S |
2703 | 0 | 153777U, // int_wasm_extadd_pairwise_unsigned_I16x8 |
2704 | 0 | 12921U, // int_wasm_extadd_pairwise_unsigned_I16x8_S |
2705 | 0 | 153980U, // int_wasm_extadd_pairwise_unsigned_I32x4 |
2706 | 0 | 13053U, // int_wasm_extadd_pairwise_unsigned_I32x4_S |
2707 | 0 | 150957U, // int_wasm_relaxed_trunc_signed_I32x4 |
2708 | 0 | 10704U, // int_wasm_relaxed_trunc_signed_I32x4_S |
2709 | 0 | 150299U, // int_wasm_relaxed_trunc_signed_zero_I32x4 |
2710 | 0 | 10181U, // int_wasm_relaxed_trunc_signed_zero_I32x4_S |
2711 | 0 | 153457U, // int_wasm_relaxed_trunc_unsigned_I32x4 |
2712 | 0 | 12698U, // int_wasm_relaxed_trunc_unsigned_I32x4_S |
2713 | 0 | 150363U, // int_wasm_relaxed_trunc_unsigned_zero_I32x4 |
2714 | 0 | 10243U, // int_wasm_relaxed_trunc_unsigned_zero_I32x4_S |
2715 | 0 | 148360U, // promote_low_F64x2 |
2716 | 0 | 9041U, // promote_low_F64x2_S |
2717 | 0 | 151065U, // sint_to_fp_F32x4 |
2718 | 0 | 10808U, // sint_to_fp_F32x4_S |
2719 | 0 | 150333U, // trunc_sat_zero_s_I32x4 |
2720 | 0 | 10214U, // trunc_sat_zero_s_I32x4_S |
2721 | 0 | 150397U, // trunc_sat_zero_u_I32x4 |
2722 | 0 | 10276U, // trunc_sat_zero_u_I32x4_S |
2723 | 0 | 153565U, // uint_to_fp_F32x4 |
2724 | 0 | 12802U, // uint_to_fp_F32x4_S |
2725 | 0 | }; |
2726 | |
|
2727 | 0 | static const uint8_t OpInfo1[] = { |
2728 | 0 | 0U, // PHI |
2729 | 0 | 0U, // INLINEASM |
2730 | 0 | 0U, // INLINEASM_BR |
2731 | 0 | 0U, // CFI_INSTRUCTION |
2732 | 0 | 0U, // EH_LABEL |
2733 | 0 | 0U, // GC_LABEL |
2734 | 0 | 0U, // ANNOTATION_LABEL |
2735 | 0 | 0U, // KILL |
2736 | 0 | 0U, // EXTRACT_SUBREG |
2737 | 0 | 0U, // INSERT_SUBREG |
2738 | 0 | 0U, // IMPLICIT_DEF |
2739 | 0 | 0U, // SUBREG_TO_REG |
2740 | 0 | 0U, // COPY_TO_REGCLASS |
2741 | 0 | 0U, // DBG_VALUE |
2742 | 0 | 0U, // DBG_VALUE_LIST |
2743 | 0 | 0U, // DBG_INSTR_REF |
2744 | 0 | 0U, // DBG_PHI |
2745 | 0 | 0U, // DBG_LABEL |
2746 | 0 | 0U, // REG_SEQUENCE |
2747 | 0 | 0U, // COPY |
2748 | 0 | 0U, // BUNDLE |
2749 | 0 | 0U, // LIFETIME_START |
2750 | 0 | 0U, // LIFETIME_END |
2751 | 0 | 0U, // PSEUDO_PROBE |
2752 | 0 | 0U, // ARITH_FENCE |
2753 | 0 | 0U, // STACKMAP |
2754 | 0 | 0U, // FENTRY_CALL |
2755 | 0 | 0U, // PATCHPOINT |
2756 | 0 | 0U, // LOAD_STACK_GUARD |
2757 | 0 | 0U, // PREALLOCATED_SETUP |
2758 | 0 | 0U, // PREALLOCATED_ARG |
2759 | 0 | 0U, // STATEPOINT |
2760 | 0 | 0U, // LOCAL_ESCAPE |
2761 | 0 | 0U, // FAULTING_OP |
2762 | 0 | 0U, // PATCHABLE_OP |
2763 | 0 | 0U, // PATCHABLE_FUNCTION_ENTER |
2764 | 0 | 0U, // PATCHABLE_RET |
2765 | 0 | 0U, // PATCHABLE_FUNCTION_EXIT |
2766 | 0 | 0U, // PATCHABLE_TAIL_CALL |
2767 | 0 | 0U, // PATCHABLE_EVENT_CALL |
2768 | 0 | 0U, // PATCHABLE_TYPED_EVENT_CALL |
2769 | 0 | 0U, // ICALL_BRANCH_FUNNEL |
2770 | 0 | 0U, // MEMBARRIER |
2771 | 0 | 0U, // JUMP_TABLE_DEBUG_INFO |
2772 | 0 | 0U, // G_ASSERT_SEXT |
2773 | 0 | 0U, // G_ASSERT_ZEXT |
2774 | 0 | 0U, // G_ASSERT_ALIGN |
2775 | 0 | 0U, // G_ADD |
2776 | 0 | 0U, // G_SUB |
2777 | 0 | 0U, // G_MUL |
2778 | 0 | 0U, // G_SDIV |
2779 | 0 | 0U, // G_UDIV |
2780 | 0 | 0U, // G_SREM |
2781 | 0 | 0U, // G_UREM |
2782 | 0 | 0U, // G_SDIVREM |
2783 | 0 | 0U, // G_UDIVREM |
2784 | 0 | 0U, // G_AND |
2785 | 0 | 0U, // G_OR |
2786 | 0 | 0U, // G_XOR |
2787 | 0 | 0U, // G_IMPLICIT_DEF |
2788 | 0 | 0U, // G_PHI |
2789 | 0 | 0U, // G_FRAME_INDEX |
2790 | 0 | 0U, // G_GLOBAL_VALUE |
2791 | 0 | 0U, // G_CONSTANT_POOL |
2792 | 0 | 0U, // G_EXTRACT |
2793 | 0 | 0U, // G_UNMERGE_VALUES |
2794 | 0 | 0U, // G_INSERT |
2795 | 0 | 0U, // G_MERGE_VALUES |
2796 | 0 | 0U, // G_BUILD_VECTOR |
2797 | 0 | 0U, // G_BUILD_VECTOR_TRUNC |
2798 | 0 | 0U, // G_CONCAT_VECTORS |
2799 | 0 | 0U, // G_PTRTOINT |
2800 | 0 | 0U, // G_INTTOPTR |
2801 | 0 | 0U, // G_BITCAST |
2802 | 0 | 0U, // G_FREEZE |
2803 | 0 | 0U, // G_CONSTANT_FOLD_BARRIER |
2804 | 0 | 0U, // G_INTRINSIC_FPTRUNC_ROUND |
2805 | 0 | 0U, // G_INTRINSIC_TRUNC |
2806 | 0 | 0U, // G_INTRINSIC_ROUND |
2807 | 0 | 0U, // G_INTRINSIC_LRINT |
2808 | 0 | 0U, // G_INTRINSIC_ROUNDEVEN |
2809 | 0 | 0U, // G_READCYCLECOUNTER |
2810 | 0 | 0U, // G_LOAD |
2811 | 0 | 0U, // G_SEXTLOAD |
2812 | 0 | 0U, // G_ZEXTLOAD |
2813 | 0 | 0U, // G_INDEXED_LOAD |
2814 | 0 | 0U, // G_INDEXED_SEXTLOAD |
2815 | 0 | 0U, // G_INDEXED_ZEXTLOAD |
2816 | 0 | 0U, // G_STORE |
2817 | 0 | 0U, // G_INDEXED_STORE |
2818 | 0 | 0U, // G_ATOMIC_CMPXCHG_WITH_SUCCESS |
2819 | 0 | 0U, // G_ATOMIC_CMPXCHG |
2820 | 0 | 0U, // G_ATOMICRMW_XCHG |
2821 | 0 | 0U, // G_ATOMICRMW_ADD |
2822 | 0 | 0U, // G_ATOMICRMW_SUB |
2823 | 0 | 0U, // G_ATOMICRMW_AND |
2824 | 0 | 0U, // G_ATOMICRMW_NAND |
2825 | 0 | 0U, // G_ATOMICRMW_OR |
2826 | 0 | 0U, // G_ATOMICRMW_XOR |
2827 | 0 | 0U, // G_ATOMICRMW_MAX |
2828 | 0 | 0U, // G_ATOMICRMW_MIN |
2829 | 0 | 0U, // G_ATOMICRMW_UMAX |
2830 | 0 | 0U, // G_ATOMICRMW_UMIN |
2831 | 0 | 0U, // G_ATOMICRMW_FADD |
2832 | 0 | 0U, // G_ATOMICRMW_FSUB |
2833 | 0 | 0U, // G_ATOMICRMW_FMAX |
2834 | 0 | 0U, // G_ATOMICRMW_FMIN |
2835 | 0 | 0U, // G_ATOMICRMW_UINC_WRAP |
2836 | 0 | 0U, // G_ATOMICRMW_UDEC_WRAP |
2837 | 0 | 0U, // G_FENCE |
2838 | 0 | 0U, // G_PREFETCH |
2839 | 0 | 0U, // G_BRCOND |
2840 | 0 | 0U, // G_BRINDIRECT |
2841 | 0 | 0U, // G_INVOKE_REGION_START |
2842 | 0 | 0U, // G_INTRINSIC |
2843 | 0 | 0U, // G_INTRINSIC_W_SIDE_EFFECTS |
2844 | 0 | 0U, // G_INTRINSIC_CONVERGENT |
2845 | 0 | 0U, // G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS |
2846 | 0 | 0U, // G_ANYEXT |
2847 | 0 | 0U, // G_TRUNC |
2848 | 0 | 0U, // G_CONSTANT |
2849 | 0 | 0U, // G_FCONSTANT |
2850 | 0 | 0U, // G_VASTART |
2851 | 0 | 0U, // G_VAARG |
2852 | 0 | 0U, // G_SEXT |
2853 | 0 | 0U, // G_SEXT_INREG |
2854 | 0 | 0U, // G_ZEXT |
2855 | 0 | 0U, // G_SHL |
2856 | 0 | 0U, // G_LSHR |
2857 | 0 | 0U, // G_ASHR |
2858 | 0 | 0U, // G_FSHL |
2859 | 0 | 0U, // G_FSHR |
2860 | 0 | 0U, // G_ROTR |
2861 | 0 | 0U, // G_ROTL |
2862 | 0 | 0U, // G_ICMP |
2863 | 0 | 0U, // G_FCMP |
2864 | 0 | 0U, // G_SELECT |
2865 | 0 | 0U, // G_UADDO |
2866 | 0 | 0U, // G_UADDE |
2867 | 0 | 0U, // G_USUBO |
2868 | 0 | 0U, // G_USUBE |
2869 | 0 | 0U, // G_SADDO |
2870 | 0 | 0U, // G_SADDE |
2871 | 0 | 0U, // G_SSUBO |
2872 | 0 | 0U, // G_SSUBE |
2873 | 0 | 0U, // G_UMULO |
2874 | 0 | 0U, // G_SMULO |
2875 | 0 | 0U, // G_UMULH |
2876 | 0 | 0U, // G_SMULH |
2877 | 0 | 0U, // G_UADDSAT |
2878 | 0 | 0U, // G_SADDSAT |
2879 | 0 | 0U, // G_USUBSAT |
2880 | 0 | 0U, // G_SSUBSAT |
2881 | 0 | 0U, // G_USHLSAT |
2882 | 0 | 0U, // G_SSHLSAT |
2883 | 0 | 0U, // G_SMULFIX |
2884 | 0 | 0U, // G_UMULFIX |
2885 | 0 | 0U, // G_SMULFIXSAT |
2886 | 0 | 0U, // G_UMULFIXSAT |
2887 | 0 | 0U, // G_SDIVFIX |
2888 | 0 | 0U, // G_UDIVFIX |
2889 | 0 | 0U, // G_SDIVFIXSAT |
2890 | 0 | 0U, // G_UDIVFIXSAT |
2891 | 0 | 0U, // G_FADD |
2892 | 0 | 0U, // G_FSUB |
2893 | 0 | 0U, // G_FMUL |
2894 | 0 | 0U, // G_FMA |
2895 | 0 | 0U, // G_FMAD |
2896 | 0 | 0U, // G_FDIV |
2897 | 0 | 0U, // G_FREM |
2898 | 0 | 0U, // G_FPOW |
2899 | 0 | 0U, // G_FPOWI |
2900 | 0 | 0U, // G_FEXP |
2901 | 0 | 0U, // G_FEXP2 |
2902 | 0 | 0U, // G_FEXP10 |
2903 | 0 | 0U, // G_FLOG |
2904 | 0 | 0U, // G_FLOG2 |
2905 | 0 | 0U, // G_FLOG10 |
2906 | 0 | 0U, // G_FLDEXP |
2907 | 0 | 0U, // G_FFREXP |
2908 | 0 | 0U, // G_FNEG |
2909 | 0 | 0U, // G_FPEXT |
2910 | 0 | 0U, // G_FPTRUNC |
2911 | 0 | 0U, // G_FPTOSI |
2912 | 0 | 0U, // G_FPTOUI |
2913 | 0 | 0U, // G_SITOFP |
2914 | 0 | 0U, // G_UITOFP |
2915 | 0 | 0U, // G_FABS |
2916 | 0 | 0U, // G_FCOPYSIGN |
2917 | 0 | 0U, // G_IS_FPCLASS |
2918 | 0 | 0U, // G_FCANONICALIZE |
2919 | 0 | 0U, // G_FMINNUM |
2920 | 0 | 0U, // G_FMAXNUM |
2921 | 0 | 0U, // G_FMINNUM_IEEE |
2922 | 0 | 0U, // G_FMAXNUM_IEEE |
2923 | 0 | 0U, // G_FMINIMUM |
2924 | 0 | 0U, // G_FMAXIMUM |
2925 | 0 | 0U, // G_GET_FPENV |
2926 | 0 | 0U, // G_SET_FPENV |
2927 | 0 | 0U, // G_RESET_FPENV |
2928 | 0 | 0U, // G_GET_FPMODE |
2929 | 0 | 0U, // G_SET_FPMODE |
2930 | 0 | 0U, // G_RESET_FPMODE |
2931 | 0 | 0U, // G_PTR_ADD |
2932 | 0 | 0U, // G_PTRMASK |
2933 | 0 | 0U, // G_SMIN |
2934 | 0 | 0U, // G_SMAX |
2935 | 0 | 0U, // G_UMIN |
2936 | 0 | 0U, // G_UMAX |
2937 | 0 | 0U, // G_ABS |
2938 | 0 | 0U, // G_LROUND |
2939 | 0 | 0U, // G_LLROUND |
2940 | 0 | 0U, // G_BR |
2941 | 0 | 0U, // G_BRJT |
2942 | 0 | 0U, // G_INSERT_VECTOR_ELT |
2943 | 0 | 0U, // G_EXTRACT_VECTOR_ELT |
2944 | 0 | 0U, // G_SHUFFLE_VECTOR |
2945 | 0 | 0U, // G_CTTZ |
2946 | 0 | 0U, // G_CTTZ_ZERO_UNDEF |
2947 | 0 | 0U, // G_CTLZ |
2948 | 0 | 0U, // G_CTLZ_ZERO_UNDEF |
2949 | 0 | 0U, // G_CTPOP |
2950 | 0 | 0U, // G_BSWAP |
2951 | 0 | 0U, // G_BITREVERSE |
2952 | 0 | 0U, // G_FCEIL |
2953 | 0 | 0U, // G_FCOS |
2954 | 0 | 0U, // G_FSIN |
2955 | 0 | 0U, // G_FSQRT |
2956 | 0 | 0U, // G_FFLOOR |
2957 | 0 | 0U, // G_FRINT |
2958 | 0 | 0U, // G_FNEARBYINT |
2959 | 0 | 0U, // G_ADDRSPACE_CAST |
2960 | 0 | 0U, // G_BLOCK_ADDR |
2961 | 0 | 0U, // G_JUMP_TABLE |
2962 | 0 | 0U, // G_DYN_STACKALLOC |
2963 | 0 | 0U, // G_STACKSAVE |
2964 | 0 | 0U, // G_STACKRESTORE |
2965 | 0 | 0U, // G_STRICT_FADD |
2966 | 0 | 0U, // G_STRICT_FSUB |
2967 | 0 | 0U, // G_STRICT_FMUL |
2968 | 0 | 0U, // G_STRICT_FDIV |
2969 | 0 | 0U, // G_STRICT_FREM |
2970 | 0 | 0U, // G_STRICT_FMA |
2971 | 0 | 0U, // G_STRICT_FSQRT |
2972 | 0 | 0U, // G_STRICT_FLDEXP |
2973 | 0 | 0U, // G_READ_REGISTER |
2974 | 0 | 0U, // G_WRITE_REGISTER |
2975 | 0 | 0U, // G_MEMCPY |
2976 | 0 | 0U, // G_MEMCPY_INLINE |
2977 | 0 | 0U, // G_MEMMOVE |
2978 | 0 | 0U, // G_MEMSET |
2979 | 0 | 0U, // G_BZERO |
2980 | 0 | 0U, // G_VECREDUCE_SEQ_FADD |
2981 | 0 | 0U, // G_VECREDUCE_SEQ_FMUL |
2982 | 0 | 0U, // G_VECREDUCE_FADD |
2983 | 0 | 0U, // G_VECREDUCE_FMUL |
2984 | 0 | 0U, // G_VECREDUCE_FMAX |
2985 | 0 | 0U, // G_VECREDUCE_FMIN |
2986 | 0 | 0U, // G_VECREDUCE_FMAXIMUM |
2987 | 0 | 0U, // G_VECREDUCE_FMINIMUM |
2988 | 0 | 0U, // G_VECREDUCE_ADD |
2989 | 0 | 0U, // G_VECREDUCE_MUL |
2990 | 0 | 0U, // G_VECREDUCE_AND |
2991 | 0 | 0U, // G_VECREDUCE_OR |
2992 | 0 | 0U, // G_VECREDUCE_XOR |
2993 | 0 | 0U, // G_VECREDUCE_SMAX |
2994 | 0 | 0U, // G_VECREDUCE_SMIN |
2995 | 0 | 0U, // G_VECREDUCE_UMAX |
2996 | 0 | 0U, // G_VECREDUCE_UMIN |
2997 | 0 | 0U, // G_SBFX |
2998 | 0 | 0U, // G_UBFX |
2999 | 0 | 0U, // CALL_PARAMS |
3000 | 0 | 0U, // CALL_PARAMS_S |
3001 | 0 | 0U, // CALL_RESULTS |
3002 | 0 | 0U, // CALL_RESULTS_S |
3003 | 0 | 0U, // CATCHRET |
3004 | 0 | 0U, // CATCHRET_S |
3005 | 0 | 0U, // CLEANUPRET |
3006 | 0 | 0U, // CLEANUPRET_S |
3007 | 0 | 0U, // COMPILER_FENCE |
3008 | 0 | 0U, // COMPILER_FENCE_S |
3009 | 0 | 0U, // RET_CALL_RESULTS |
3010 | 0 | 0U, // RET_CALL_RESULTS_S |
3011 | 0 | 0U, // ABS_F32 |
3012 | 0 | 0U, // ABS_F32_S |
3013 | 0 | 0U, // ABS_F32x4 |
3014 | 0 | 0U, // ABS_F32x4_S |
3015 | 0 | 0U, // ABS_F64 |
3016 | 0 | 0U, // ABS_F64_S |
3017 | 0 | 0U, // ABS_F64x2 |
3018 | 0 | 0U, // ABS_F64x2_S |
3019 | 0 | 0U, // ABS_I16x8 |
3020 | 0 | 0U, // ABS_I16x8_S |
3021 | 0 | 0U, // ABS_I32x4 |
3022 | 0 | 0U, // ABS_I32x4_S |
3023 | 0 | 0U, // ABS_I64x2 |
3024 | 0 | 0U, // ABS_I64x2_S |
3025 | 0 | 0U, // ABS_I8x16 |
3026 | 0 | 0U, // ABS_I8x16_S |
3027 | 0 | 0U, // ADD_F32 |
3028 | 0 | 0U, // ADD_F32_S |
3029 | 0 | 0U, // ADD_F32x4 |
3030 | 0 | 0U, // ADD_F32x4_S |
3031 | 0 | 0U, // ADD_F64 |
3032 | 0 | 0U, // ADD_F64_S |
3033 | 0 | 0U, // ADD_F64x2 |
3034 | 0 | 0U, // ADD_F64x2_S |
3035 | 0 | 0U, // ADD_I16x8 |
3036 | 0 | 0U, // ADD_I16x8_S |
3037 | 0 | 0U, // ADD_I32 |
3038 | 0 | 0U, // ADD_I32_S |
3039 | 0 | 0U, // ADD_I32x4 |
3040 | 0 | 0U, // ADD_I32x4_S |
3041 | 0 | 0U, // ADD_I64 |
3042 | 0 | 0U, // ADD_I64_S |
3043 | 0 | 0U, // ADD_I64x2 |
3044 | 0 | 0U, // ADD_I64x2_S |
3045 | 0 | 0U, // ADD_I8x16 |
3046 | 0 | 0U, // ADD_I8x16_S |
3047 | 0 | 0U, // ADD_SAT_S_I16x8 |
3048 | 0 | 0U, // ADD_SAT_S_I16x8_S |
3049 | 0 | 0U, // ADD_SAT_S_I8x16 |
3050 | 0 | 0U, // ADD_SAT_S_I8x16_S |
3051 | 0 | 0U, // ADD_SAT_U_I16x8 |
3052 | 0 | 0U, // ADD_SAT_U_I16x8_S |
3053 | 0 | 0U, // ADD_SAT_U_I8x16 |
3054 | 0 | 0U, // ADD_SAT_U_I8x16_S |
3055 | 0 | 0U, // ADJCALLSTACKDOWN |
3056 | 0 | 0U, // ADJCALLSTACKDOWN_S |
3057 | 0 | 0U, // ADJCALLSTACKUP |
3058 | 0 | 0U, // ADJCALLSTACKUP_S |
3059 | 0 | 0U, // ALLTRUE_I16x8 |
3060 | 0 | 0U, // ALLTRUE_I16x8_S |
3061 | 0 | 0U, // ALLTRUE_I32x4 |
3062 | 0 | 0U, // ALLTRUE_I32x4_S |
3063 | 0 | 0U, // ALLTRUE_I64x2 |
3064 | 0 | 0U, // ALLTRUE_I64x2_S |
3065 | 0 | 0U, // ALLTRUE_I8x16 |
3066 | 0 | 0U, // ALLTRUE_I8x16_S |
3067 | 0 | 0U, // AND |
3068 | 0 | 0U, // ANDNOT |
3069 | 0 | 0U, // ANDNOT_S |
3070 | 0 | 0U, // AND_I32 |
3071 | 0 | 0U, // AND_I32_S |
3072 | 0 | 0U, // AND_I64 |
3073 | 0 | 0U, // AND_I64_S |
3074 | 0 | 0U, // AND_S |
3075 | 0 | 0U, // ANYTRUE |
3076 | 0 | 0U, // ANYTRUE_S |
3077 | 0 | 0U, // ARGUMENT_externref |
3078 | 0 | 0U, // ARGUMENT_externref_S |
3079 | 0 | 0U, // ARGUMENT_f32 |
3080 | 0 | 0U, // ARGUMENT_f32_S |
3081 | 0 | 0U, // ARGUMENT_f64 |
3082 | 0 | 0U, // ARGUMENT_f64_S |
3083 | 0 | 0U, // ARGUMENT_funcref |
3084 | 0 | 0U, // ARGUMENT_funcref_S |
3085 | 0 | 0U, // ARGUMENT_i32 |
3086 | 0 | 0U, // ARGUMENT_i32_S |
3087 | 0 | 0U, // ARGUMENT_i64 |
3088 | 0 | 0U, // ARGUMENT_i64_S |
3089 | 0 | 0U, // ARGUMENT_v16i8 |
3090 | 0 | 0U, // ARGUMENT_v16i8_S |
3091 | 0 | 0U, // ARGUMENT_v2f64 |
3092 | 0 | 0U, // ARGUMENT_v2f64_S |
3093 | 0 | 0U, // ARGUMENT_v2i64 |
3094 | 0 | 0U, // ARGUMENT_v2i64_S |
3095 | 0 | 0U, // ARGUMENT_v4f32 |
3096 | 0 | 0U, // ARGUMENT_v4f32_S |
3097 | 0 | 0U, // ARGUMENT_v4i32 |
3098 | 0 | 0U, // ARGUMENT_v4i32_S |
3099 | 0 | 0U, // ARGUMENT_v8i16 |
3100 | 0 | 0U, // ARGUMENT_v8i16_S |
3101 | 0 | 0U, // ATOMIC_FENCE |
3102 | 0 | 0U, // ATOMIC_FENCE_S |
3103 | 0 | 0U, // ATOMIC_LOAD16_U_I32_A32 |
3104 | 0 | 0U, // ATOMIC_LOAD16_U_I32_A32_S |
3105 | 0 | 0U, // ATOMIC_LOAD16_U_I32_A64 |
3106 | 0 | 0U, // ATOMIC_LOAD16_U_I32_A64_S |
3107 | 0 | 0U, // ATOMIC_LOAD16_U_I64_A32 |
3108 | 0 | 0U, // ATOMIC_LOAD16_U_I64_A32_S |
3109 | 0 | 0U, // ATOMIC_LOAD16_U_I64_A64 |
3110 | 0 | 0U, // ATOMIC_LOAD16_U_I64_A64_S |
3111 | 0 | 0U, // ATOMIC_LOAD32_U_I64_A32 |
3112 | 0 | 0U, // ATOMIC_LOAD32_U_I64_A32_S |
3113 | 0 | 0U, // ATOMIC_LOAD32_U_I64_A64 |
3114 | 0 | 0U, // ATOMIC_LOAD32_U_I64_A64_S |
3115 | 0 | 0U, // ATOMIC_LOAD8_U_I32_A32 |
3116 | 0 | 0U, // ATOMIC_LOAD8_U_I32_A32_S |
3117 | 0 | 0U, // ATOMIC_LOAD8_U_I32_A64 |
3118 | 0 | 0U, // ATOMIC_LOAD8_U_I32_A64_S |
3119 | 0 | 0U, // ATOMIC_LOAD8_U_I64_A32 |
3120 | 0 | 0U, // ATOMIC_LOAD8_U_I64_A32_S |
3121 | 0 | 0U, // ATOMIC_LOAD8_U_I64_A64 |
3122 | 0 | 0U, // ATOMIC_LOAD8_U_I64_A64_S |
3123 | 0 | 0U, // ATOMIC_LOAD_I32_A32 |
3124 | 0 | 0U, // ATOMIC_LOAD_I32_A32_S |
3125 | 0 | 0U, // ATOMIC_LOAD_I32_A64 |
3126 | 0 | 0U, // ATOMIC_LOAD_I32_A64_S |
3127 | 0 | 0U, // ATOMIC_LOAD_I64_A32 |
3128 | 0 | 0U, // ATOMIC_LOAD_I64_A32_S |
3129 | 0 | 0U, // ATOMIC_LOAD_I64_A64 |
3130 | 0 | 0U, // ATOMIC_LOAD_I64_A64_S |
3131 | 0 | 0U, // ATOMIC_RMW16_U_ADD_I32_A32 |
3132 | 0 | 0U, // ATOMIC_RMW16_U_ADD_I32_A32_S |
3133 | 0 | 0U, // ATOMIC_RMW16_U_ADD_I32_A64 |
3134 | 0 | 0U, // ATOMIC_RMW16_U_ADD_I32_A64_S |
3135 | 0 | 0U, // ATOMIC_RMW16_U_ADD_I64_A32 |
3136 | 0 | 0U, // ATOMIC_RMW16_U_ADD_I64_A32_S |
3137 | 0 | 0U, // ATOMIC_RMW16_U_ADD_I64_A64 |
3138 | 0 | 0U, // ATOMIC_RMW16_U_ADD_I64_A64_S |
3139 | 0 | 0U, // ATOMIC_RMW16_U_AND_I32_A32 |
3140 | 0 | 0U, // ATOMIC_RMW16_U_AND_I32_A32_S |
3141 | 0 | 0U, // ATOMIC_RMW16_U_AND_I32_A64 |
3142 | 0 | 0U, // ATOMIC_RMW16_U_AND_I32_A64_S |
3143 | 0 | 0U, // ATOMIC_RMW16_U_AND_I64_A32 |
3144 | 0 | 0U, // ATOMIC_RMW16_U_AND_I64_A32_S |
3145 | 0 | 0U, // ATOMIC_RMW16_U_AND_I64_A64 |
3146 | 0 | 0U, // ATOMIC_RMW16_U_AND_I64_A64_S |
3147 | 0 | 0U, // ATOMIC_RMW16_U_CMPXCHG_I32_A32 |
3148 | 0 | 0U, // ATOMIC_RMW16_U_CMPXCHG_I32_A32_S |
3149 | 0 | 0U, // ATOMIC_RMW16_U_CMPXCHG_I32_A64 |
3150 | 0 | 0U, // ATOMIC_RMW16_U_CMPXCHG_I32_A64_S |
3151 | 0 | 0U, // ATOMIC_RMW16_U_CMPXCHG_I64_A32 |
3152 | 0 | 0U, // ATOMIC_RMW16_U_CMPXCHG_I64_A32_S |
3153 | 0 | 0U, // ATOMIC_RMW16_U_CMPXCHG_I64_A64 |
3154 | 0 | 0U, // ATOMIC_RMW16_U_CMPXCHG_I64_A64_S |
3155 | 0 | 0U, // ATOMIC_RMW16_U_OR_I32_A32 |
3156 | 0 | 0U, // ATOMIC_RMW16_U_OR_I32_A32_S |
3157 | 0 | 0U, // ATOMIC_RMW16_U_OR_I32_A64 |
3158 | 0 | 0U, // ATOMIC_RMW16_U_OR_I32_A64_S |
3159 | 0 | 0U, // ATOMIC_RMW16_U_OR_I64_A32 |
3160 | 0 | 0U, // ATOMIC_RMW16_U_OR_I64_A32_S |
3161 | 0 | 0U, // ATOMIC_RMW16_U_OR_I64_A64 |
3162 | 0 | 0U, // ATOMIC_RMW16_U_OR_I64_A64_S |
3163 | 0 | 0U, // ATOMIC_RMW16_U_SUB_I32_A32 |
3164 | 0 | 0U, // ATOMIC_RMW16_U_SUB_I32_A32_S |
3165 | 0 | 0U, // ATOMIC_RMW16_U_SUB_I32_A64 |
3166 | 0 | 0U, // ATOMIC_RMW16_U_SUB_I32_A64_S |
3167 | 0 | 0U, // ATOMIC_RMW16_U_SUB_I64_A32 |
3168 | 0 | 0U, // ATOMIC_RMW16_U_SUB_I64_A32_S |
3169 | 0 | 0U, // ATOMIC_RMW16_U_SUB_I64_A64 |
3170 | 0 | 0U, // ATOMIC_RMW16_U_SUB_I64_A64_S |
3171 | 0 | 0U, // ATOMIC_RMW16_U_XCHG_I32_A32 |
3172 | 0 | 0U, // ATOMIC_RMW16_U_XCHG_I32_A32_S |
3173 | 0 | 0U, // ATOMIC_RMW16_U_XCHG_I32_A64 |
3174 | 0 | 0U, // ATOMIC_RMW16_U_XCHG_I32_A64_S |
3175 | 0 | 0U, // ATOMIC_RMW16_U_XCHG_I64_A32 |
3176 | 0 | 0U, // ATOMIC_RMW16_U_XCHG_I64_A32_S |
3177 | 0 | 0U, // ATOMIC_RMW16_U_XCHG_I64_A64 |
3178 | 0 | 0U, // ATOMIC_RMW16_U_XCHG_I64_A64_S |
3179 | 0 | 0U, // ATOMIC_RMW16_U_XOR_I32_A32 |
3180 | 0 | 0U, // ATOMIC_RMW16_U_XOR_I32_A32_S |
3181 | 0 | 0U, // ATOMIC_RMW16_U_XOR_I32_A64 |
3182 | 0 | 0U, // ATOMIC_RMW16_U_XOR_I32_A64_S |
3183 | 0 | 0U, // ATOMIC_RMW16_U_XOR_I64_A32 |
3184 | 0 | 0U, // ATOMIC_RMW16_U_XOR_I64_A32_S |
3185 | 0 | 0U, // ATOMIC_RMW16_U_XOR_I64_A64 |
3186 | 0 | 0U, // ATOMIC_RMW16_U_XOR_I64_A64_S |
3187 | 0 | 0U, // ATOMIC_RMW32_U_ADD_I64_A32 |
3188 | 0 | 0U, // ATOMIC_RMW32_U_ADD_I64_A32_S |
3189 | 0 | 0U, // ATOMIC_RMW32_U_ADD_I64_A64 |
3190 | 0 | 0U, // ATOMIC_RMW32_U_ADD_I64_A64_S |
3191 | 0 | 0U, // ATOMIC_RMW32_U_AND_I64_A32 |
3192 | 0 | 0U, // ATOMIC_RMW32_U_AND_I64_A32_S |
3193 | 0 | 0U, // ATOMIC_RMW32_U_AND_I64_A64 |
3194 | 0 | 0U, // ATOMIC_RMW32_U_AND_I64_A64_S |
3195 | 0 | 0U, // ATOMIC_RMW32_U_CMPXCHG_I64_A32 |
3196 | 0 | 0U, // ATOMIC_RMW32_U_CMPXCHG_I64_A32_S |
3197 | 0 | 0U, // ATOMIC_RMW32_U_CMPXCHG_I64_A64 |
3198 | 0 | 0U, // ATOMIC_RMW32_U_CMPXCHG_I64_A64_S |
3199 | 0 | 0U, // ATOMIC_RMW32_U_OR_I64_A32 |
3200 | 0 | 0U, // ATOMIC_RMW32_U_OR_I64_A32_S |
3201 | 0 | 0U, // ATOMIC_RMW32_U_OR_I64_A64 |
3202 | 0 | 0U, // ATOMIC_RMW32_U_OR_I64_A64_S |
3203 | 0 | 0U, // ATOMIC_RMW32_U_SUB_I64_A32 |
3204 | 0 | 0U, // ATOMIC_RMW32_U_SUB_I64_A32_S |
3205 | 0 | 0U, // ATOMIC_RMW32_U_SUB_I64_A64 |
3206 | 0 | 0U, // ATOMIC_RMW32_U_SUB_I64_A64_S |
3207 | 0 | 0U, // ATOMIC_RMW32_U_XCHG_I64_A32 |
3208 | 0 | 0U, // ATOMIC_RMW32_U_XCHG_I64_A32_S |
3209 | 0 | 0U, // ATOMIC_RMW32_U_XCHG_I64_A64 |
3210 | 0 | 0U, // ATOMIC_RMW32_U_XCHG_I64_A64_S |
3211 | 0 | 0U, // ATOMIC_RMW32_U_XOR_I64_A32 |
3212 | 0 | 0U, // ATOMIC_RMW32_U_XOR_I64_A32_S |
3213 | 0 | 0U, // ATOMIC_RMW32_U_XOR_I64_A64 |
3214 | 0 | 0U, // ATOMIC_RMW32_U_XOR_I64_A64_S |
3215 | 0 | 0U, // ATOMIC_RMW8_U_ADD_I32_A32 |
3216 | 0 | 0U, // ATOMIC_RMW8_U_ADD_I32_A32_S |
3217 | 0 | 0U, // ATOMIC_RMW8_U_ADD_I32_A64 |
3218 | 0 | 0U, // ATOMIC_RMW8_U_ADD_I32_A64_S |
3219 | 0 | 0U, // ATOMIC_RMW8_U_ADD_I64_A32 |
3220 | 0 | 0U, // ATOMIC_RMW8_U_ADD_I64_A32_S |
3221 | 0 | 0U, // ATOMIC_RMW8_U_ADD_I64_A64 |
3222 | 0 | 0U, // ATOMIC_RMW8_U_ADD_I64_A64_S |
3223 | 0 | 0U, // ATOMIC_RMW8_U_AND_I32_A32 |
3224 | 0 | 0U, // ATOMIC_RMW8_U_AND_I32_A32_S |
3225 | 0 | 0U, // ATOMIC_RMW8_U_AND_I32_A64 |
3226 | 0 | 0U, // ATOMIC_RMW8_U_AND_I32_A64_S |
3227 | 0 | 0U, // ATOMIC_RMW8_U_AND_I64_A32 |
3228 | 0 | 0U, // ATOMIC_RMW8_U_AND_I64_A32_S |
3229 | 0 | 0U, // ATOMIC_RMW8_U_AND_I64_A64 |
3230 | 0 | 0U, // ATOMIC_RMW8_U_AND_I64_A64_S |
3231 | 0 | 0U, // ATOMIC_RMW8_U_CMPXCHG_I32_A32 |
3232 | 0 | 0U, // ATOMIC_RMW8_U_CMPXCHG_I32_A32_S |
3233 | 0 | 0U, // ATOMIC_RMW8_U_CMPXCHG_I32_A64 |
3234 | 0 | 0U, // ATOMIC_RMW8_U_CMPXCHG_I32_A64_S |
3235 | 0 | 0U, // ATOMIC_RMW8_U_CMPXCHG_I64_A32 |
3236 | 0 | 0U, // ATOMIC_RMW8_U_CMPXCHG_I64_A32_S |
3237 | 0 | 0U, // ATOMIC_RMW8_U_CMPXCHG_I64_A64 |
3238 | 0 | 0U, // ATOMIC_RMW8_U_CMPXCHG_I64_A64_S |
3239 | 0 | 0U, // ATOMIC_RMW8_U_OR_I32_A32 |
3240 | 0 | 0U, // ATOMIC_RMW8_U_OR_I32_A32_S |
3241 | 0 | 0U, // ATOMIC_RMW8_U_OR_I32_A64 |
3242 | 0 | 0U, // ATOMIC_RMW8_U_OR_I32_A64_S |
3243 | 0 | 0U, // ATOMIC_RMW8_U_OR_I64_A32 |
3244 | 0 | 0U, // ATOMIC_RMW8_U_OR_I64_A32_S |
3245 | 0 | 0U, // ATOMIC_RMW8_U_OR_I64_A64 |
3246 | 0 | 0U, // ATOMIC_RMW8_U_OR_I64_A64_S |
3247 | 0 | 0U, // ATOMIC_RMW8_U_SUB_I32_A32 |
3248 | 0 | 0U, // ATOMIC_RMW8_U_SUB_I32_A32_S |
3249 | 0 | 0U, // ATOMIC_RMW8_U_SUB_I32_A64 |
3250 | 0 | 0U, // ATOMIC_RMW8_U_SUB_I32_A64_S |
3251 | 0 | 0U, // ATOMIC_RMW8_U_SUB_I64_A32 |
3252 | 0 | 0U, // ATOMIC_RMW8_U_SUB_I64_A32_S |
3253 | 0 | 0U, // ATOMIC_RMW8_U_SUB_I64_A64 |
3254 | 0 | 0U, // ATOMIC_RMW8_U_SUB_I64_A64_S |
3255 | 0 | 0U, // ATOMIC_RMW8_U_XCHG_I32_A32 |
3256 | 0 | 0U, // ATOMIC_RMW8_U_XCHG_I32_A32_S |
3257 | 0 | 0U, // ATOMIC_RMW8_U_XCHG_I32_A64 |
3258 | 0 | 0U, // ATOMIC_RMW8_U_XCHG_I32_A64_S |
3259 | 0 | 0U, // ATOMIC_RMW8_U_XCHG_I64_A32 |
3260 | 0 | 0U, // ATOMIC_RMW8_U_XCHG_I64_A32_S |
3261 | 0 | 0U, // ATOMIC_RMW8_U_XCHG_I64_A64 |
3262 | 0 | 0U, // ATOMIC_RMW8_U_XCHG_I64_A64_S |
3263 | 0 | 0U, // ATOMIC_RMW8_U_XOR_I32_A32 |
3264 | 0 | 0U, // ATOMIC_RMW8_U_XOR_I32_A32_S |
3265 | 0 | 0U, // ATOMIC_RMW8_U_XOR_I32_A64 |
3266 | 0 | 0U, // ATOMIC_RMW8_U_XOR_I32_A64_S |
3267 | 0 | 0U, // ATOMIC_RMW8_U_XOR_I64_A32 |
3268 | 0 | 0U, // ATOMIC_RMW8_U_XOR_I64_A32_S |
3269 | 0 | 0U, // ATOMIC_RMW8_U_XOR_I64_A64 |
3270 | 0 | 0U, // ATOMIC_RMW8_U_XOR_I64_A64_S |
3271 | 0 | 0U, // ATOMIC_RMW_ADD_I32_A32 |
3272 | 0 | 0U, // ATOMIC_RMW_ADD_I32_A32_S |
3273 | 0 | 0U, // ATOMIC_RMW_ADD_I32_A64 |
3274 | 0 | 0U, // ATOMIC_RMW_ADD_I32_A64_S |
3275 | 0 | 0U, // ATOMIC_RMW_ADD_I64_A32 |
3276 | 0 | 0U, // ATOMIC_RMW_ADD_I64_A32_S |
3277 | 0 | 0U, // ATOMIC_RMW_ADD_I64_A64 |
3278 | 0 | 0U, // ATOMIC_RMW_ADD_I64_A64_S |
3279 | 0 | 0U, // ATOMIC_RMW_AND_I32_A32 |
3280 | 0 | 0U, // ATOMIC_RMW_AND_I32_A32_S |
3281 | 0 | 0U, // ATOMIC_RMW_AND_I32_A64 |
3282 | 0 | 0U, // ATOMIC_RMW_AND_I32_A64_S |
3283 | 0 | 0U, // ATOMIC_RMW_AND_I64_A32 |
3284 | 0 | 0U, // ATOMIC_RMW_AND_I64_A32_S |
3285 | 0 | 0U, // ATOMIC_RMW_AND_I64_A64 |
3286 | 0 | 0U, // ATOMIC_RMW_AND_I64_A64_S |
3287 | 0 | 0U, // ATOMIC_RMW_CMPXCHG_I32_A32 |
3288 | 0 | 0U, // ATOMIC_RMW_CMPXCHG_I32_A32_S |
3289 | 0 | 0U, // ATOMIC_RMW_CMPXCHG_I32_A64 |
3290 | 0 | 0U, // ATOMIC_RMW_CMPXCHG_I32_A64_S |
3291 | 0 | 0U, // ATOMIC_RMW_CMPXCHG_I64_A32 |
3292 | 0 | 0U, // ATOMIC_RMW_CMPXCHG_I64_A32_S |
3293 | 0 | 0U, // ATOMIC_RMW_CMPXCHG_I64_A64 |
3294 | 0 | 0U, // ATOMIC_RMW_CMPXCHG_I64_A64_S |
3295 | 0 | 0U, // ATOMIC_RMW_OR_I32_A32 |
3296 | 0 | 0U, // ATOMIC_RMW_OR_I32_A32_S |
3297 | 0 | 0U, // ATOMIC_RMW_OR_I32_A64 |
3298 | 0 | 0U, // ATOMIC_RMW_OR_I32_A64_S |
3299 | 0 | 0U, // ATOMIC_RMW_OR_I64_A32 |
3300 | 0 | 0U, // ATOMIC_RMW_OR_I64_A32_S |
3301 | 0 | 0U, // ATOMIC_RMW_OR_I64_A64 |
3302 | 0 | 0U, // ATOMIC_RMW_OR_I64_A64_S |
3303 | 0 | 0U, // ATOMIC_RMW_SUB_I32_A32 |
3304 | 0 | 0U, // ATOMIC_RMW_SUB_I32_A32_S |
3305 | 0 | 0U, // ATOMIC_RMW_SUB_I32_A64 |
3306 | 0 | 0U, // ATOMIC_RMW_SUB_I32_A64_S |
3307 | 0 | 0U, // ATOMIC_RMW_SUB_I64_A32 |
3308 | 0 | 0U, // ATOMIC_RMW_SUB_I64_A32_S |
3309 | 0 | 0U, // ATOMIC_RMW_SUB_I64_A64 |
3310 | 0 | 0U, // ATOMIC_RMW_SUB_I64_A64_S |
3311 | 0 | 0U, // ATOMIC_RMW_XCHG_I32_A32 |
3312 | 0 | 0U, // ATOMIC_RMW_XCHG_I32_A32_S |
3313 | 0 | 0U, // ATOMIC_RMW_XCHG_I32_A64 |
3314 | 0 | 0U, // ATOMIC_RMW_XCHG_I32_A64_S |
3315 | 0 | 0U, // ATOMIC_RMW_XCHG_I64_A32 |
3316 | 0 | 0U, // ATOMIC_RMW_XCHG_I64_A32_S |
3317 | 0 | 0U, // ATOMIC_RMW_XCHG_I64_A64 |
3318 | 0 | 0U, // ATOMIC_RMW_XCHG_I64_A64_S |
3319 | 0 | 0U, // ATOMIC_RMW_XOR_I32_A32 |
3320 | 0 | 0U, // ATOMIC_RMW_XOR_I32_A32_S |
3321 | 0 | 0U, // ATOMIC_RMW_XOR_I32_A64 |
3322 | 0 | 0U, // ATOMIC_RMW_XOR_I32_A64_S |
3323 | 0 | 0U, // ATOMIC_RMW_XOR_I64_A32 |
3324 | 0 | 0U, // ATOMIC_RMW_XOR_I64_A32_S |
3325 | 0 | 0U, // ATOMIC_RMW_XOR_I64_A64 |
3326 | 0 | 0U, // ATOMIC_RMW_XOR_I64_A64_S |
3327 | 0 | 0U, // ATOMIC_STORE16_I32_A32 |
3328 | 0 | 0U, // ATOMIC_STORE16_I32_A32_S |
3329 | 0 | 0U, // ATOMIC_STORE16_I32_A64 |
3330 | 0 | 0U, // ATOMIC_STORE16_I32_A64_S |
3331 | 0 | 0U, // ATOMIC_STORE16_I64_A32 |
3332 | 0 | 0U, // ATOMIC_STORE16_I64_A32_S |
3333 | 0 | 0U, // ATOMIC_STORE16_I64_A64 |
3334 | 0 | 0U, // ATOMIC_STORE16_I64_A64_S |
3335 | 0 | 0U, // ATOMIC_STORE32_I64_A32 |
3336 | 0 | 0U, // ATOMIC_STORE32_I64_A32_S |
3337 | 0 | 0U, // ATOMIC_STORE32_I64_A64 |
3338 | 0 | 0U, // ATOMIC_STORE32_I64_A64_S |
3339 | 0 | 0U, // ATOMIC_STORE8_I32_A32 |
3340 | 0 | 0U, // ATOMIC_STORE8_I32_A32_S |
3341 | 0 | 0U, // ATOMIC_STORE8_I32_A64 |
3342 | 0 | 0U, // ATOMIC_STORE8_I32_A64_S |
3343 | 0 | 0U, // ATOMIC_STORE8_I64_A32 |
3344 | 0 | 0U, // ATOMIC_STORE8_I64_A32_S |
3345 | 0 | 0U, // ATOMIC_STORE8_I64_A64 |
3346 | 0 | 0U, // ATOMIC_STORE8_I64_A64_S |
3347 | 0 | 0U, // ATOMIC_STORE_I32_A32 |
3348 | 0 | 0U, // ATOMIC_STORE_I32_A32_S |
3349 | 0 | 0U, // ATOMIC_STORE_I32_A64 |
3350 | 0 | 0U, // ATOMIC_STORE_I32_A64_S |
3351 | 0 | 0U, // ATOMIC_STORE_I64_A32 |
3352 | 0 | 0U, // ATOMIC_STORE_I64_A32_S |
3353 | 0 | 0U, // ATOMIC_STORE_I64_A64 |
3354 | 0 | 0U, // ATOMIC_STORE_I64_A64_S |
3355 | 0 | 0U, // AVGR_U_I16x8 |
3356 | 0 | 0U, // AVGR_U_I16x8_S |
3357 | 0 | 0U, // AVGR_U_I8x16 |
3358 | 0 | 0U, // AVGR_U_I8x16_S |
3359 | 0 | 0U, // BITMASK_I16x8 |
3360 | 0 | 0U, // BITMASK_I16x8_S |
3361 | 0 | 0U, // BITMASK_I32x4 |
3362 | 0 | 0U, // BITMASK_I32x4_S |
3363 | 0 | 0U, // BITMASK_I64x2 |
3364 | 0 | 0U, // BITMASK_I64x2_S |
3365 | 0 | 0U, // BITMASK_I8x16 |
3366 | 0 | 0U, // BITMASK_I8x16_S |
3367 | 0 | 0U, // BITSELECT |
3368 | 0 | 0U, // BITSELECT_S |
3369 | 0 | 0U, // BLOCK |
3370 | 0 | 0U, // BLOCK_S |
3371 | 0 | 0U, // BR |
3372 | 0 | 0U, // BR_IF |
3373 | 0 | 0U, // BR_IF_S |
3374 | 0 | 0U, // BR_S |
3375 | 0 | 0U, // BR_TABLE_I32 |
3376 | 0 | 0U, // BR_TABLE_I32_S |
3377 | 0 | 0U, // BR_TABLE_I64 |
3378 | 0 | 0U, // BR_TABLE_I64_S |
3379 | 0 | 0U, // BR_UNLESS |
3380 | 0 | 0U, // BR_UNLESS_S |
3381 | 0 | 0U, // CALL |
3382 | 0 | 0U, // CALL_INDIRECT |
3383 | 0 | 0U, // CALL_INDIRECT_S |
3384 | 0 | 0U, // CALL_S |
3385 | 0 | 0U, // CATCH |
3386 | 0 | 0U, // CATCH_ALL |
3387 | 0 | 0U, // CATCH_ALL_S |
3388 | 0 | 0U, // CATCH_S |
3389 | 0 | 0U, // CEIL_F32 |
3390 | 0 | 0U, // CEIL_F32_S |
3391 | 0 | 0U, // CEIL_F32x4 |
3392 | 0 | 0U, // CEIL_F32x4_S |
3393 | 0 | 0U, // CEIL_F64 |
3394 | 0 | 0U, // CEIL_F64_S |
3395 | 0 | 0U, // CEIL_F64x2 |
3396 | 0 | 0U, // CEIL_F64x2_S |
3397 | 0 | 0U, // CLZ_I32 |
3398 | 0 | 0U, // CLZ_I32_S |
3399 | 0 | 0U, // CLZ_I64 |
3400 | 0 | 0U, // CLZ_I64_S |
3401 | 0 | 0U, // CONST_F32 |
3402 | 0 | 0U, // CONST_F32_S |
3403 | 0 | 0U, // CONST_F64 |
3404 | 0 | 0U, // CONST_F64_S |
3405 | 0 | 0U, // CONST_I32 |
3406 | 0 | 0U, // CONST_I32_S |
3407 | 0 | 0U, // CONST_I64 |
3408 | 0 | 0U, // CONST_I64_S |
3409 | 0 | 0U, // CONST_V128_F32x4 |
3410 | 0 | 0U, // CONST_V128_F32x4_S |
3411 | 0 | 0U, // CONST_V128_F64x2 |
3412 | 0 | 0U, // CONST_V128_F64x2_S |
3413 | 0 | 0U, // CONST_V128_I16x8 |
3414 | 0 | 0U, // CONST_V128_I16x8_S |
3415 | 0 | 0U, // CONST_V128_I32x4 |
3416 | 0 | 0U, // CONST_V128_I32x4_S |
3417 | 0 | 0U, // CONST_V128_I64x2 |
3418 | 0 | 0U, // CONST_V128_I64x2_S |
3419 | 0 | 0U, // CONST_V128_I8x16 |
3420 | 0 | 0U, // CONST_V128_I8x16_S |
3421 | 0 | 0U, // COPYSIGN_F32 |
3422 | 0 | 0U, // COPYSIGN_F32_S |
3423 | 0 | 0U, // COPYSIGN_F64 |
3424 | 0 | 0U, // COPYSIGN_F64_S |
3425 | 0 | 0U, // COPY_EXTERNREF |
3426 | 0 | 0U, // COPY_EXTERNREF_S |
3427 | 0 | 0U, // COPY_F32 |
3428 | 0 | 0U, // COPY_F32_S |
3429 | 0 | 0U, // COPY_F64 |
3430 | 0 | 0U, // COPY_F64_S |
3431 | 0 | 0U, // COPY_FUNCREF |
3432 | 0 | 0U, // COPY_FUNCREF_S |
3433 | 0 | 0U, // COPY_I32 |
3434 | 0 | 0U, // COPY_I32_S |
3435 | 0 | 0U, // COPY_I64 |
3436 | 0 | 0U, // COPY_I64_S |
3437 | 0 | 0U, // COPY_V128 |
3438 | 0 | 0U, // COPY_V128_S |
3439 | 0 | 0U, // CTZ_I32 |
3440 | 0 | 0U, // CTZ_I32_S |
3441 | 0 | 0U, // CTZ_I64 |
3442 | 0 | 0U, // CTZ_I64_S |
3443 | 0 | 0U, // DEBUG_UNREACHABLE |
3444 | 0 | 0U, // DEBUG_UNREACHABLE_S |
3445 | 0 | 0U, // DELEGATE |
3446 | 0 | 0U, // DELEGATE_S |
3447 | 0 | 0U, // DIV_F32 |
3448 | 0 | 0U, // DIV_F32_S |
3449 | 0 | 0U, // DIV_F32x4 |
3450 | 0 | 0U, // DIV_F32x4_S |
3451 | 0 | 0U, // DIV_F64 |
3452 | 0 | 0U, // DIV_F64_S |
3453 | 0 | 0U, // DIV_F64x2 |
3454 | 0 | 0U, // DIV_F64x2_S |
3455 | 0 | 0U, // DIV_S_I32 |
3456 | 0 | 0U, // DIV_S_I32_S |
3457 | 0 | 0U, // DIV_S_I64 |
3458 | 0 | 0U, // DIV_S_I64_S |
3459 | 0 | 0U, // DIV_U_I32 |
3460 | 0 | 0U, // DIV_U_I32_S |
3461 | 0 | 0U, // DIV_U_I64 |
3462 | 0 | 0U, // DIV_U_I64_S |
3463 | 0 | 0U, // DOT |
3464 | 0 | 0U, // DOT_S |
3465 | 0 | 0U, // DROP_EXTERNREF |
3466 | 0 | 0U, // DROP_EXTERNREF_S |
3467 | 0 | 0U, // DROP_F32 |
3468 | 0 | 0U, // DROP_F32_S |
3469 | 0 | 0U, // DROP_F64 |
3470 | 0 | 0U, // DROP_F64_S |
3471 | 0 | 0U, // DROP_FUNCREF |
3472 | 0 | 0U, // DROP_FUNCREF_S |
3473 | 0 | 0U, // DROP_I32 |
3474 | 0 | 0U, // DROP_I32_S |
3475 | 0 | 0U, // DROP_I64 |
3476 | 0 | 0U, // DROP_I64_S |
3477 | 0 | 0U, // DROP_V128 |
3478 | 0 | 0U, // DROP_V128_S |
3479 | 0 | 0U, // ELSE |
3480 | 0 | 0U, // ELSE_S |
3481 | 0 | 0U, // END |
3482 | 0 | 0U, // END_BLOCK |
3483 | 0 | 0U, // END_BLOCK_S |
3484 | 0 | 0U, // END_FUNCTION |
3485 | 0 | 0U, // END_FUNCTION_S |
3486 | 0 | 0U, // END_IF |
3487 | 0 | 0U, // END_IF_S |
3488 | 0 | 0U, // END_LOOP |
3489 | 0 | 0U, // END_LOOP_S |
3490 | 0 | 0U, // END_S |
3491 | 0 | 0U, // END_TRY |
3492 | 0 | 0U, // END_TRY_S |
3493 | 0 | 0U, // EQZ_I32 |
3494 | 0 | 0U, // EQZ_I32_S |
3495 | 0 | 0U, // EQZ_I64 |
3496 | 0 | 0U, // EQZ_I64_S |
3497 | 0 | 0U, // EQ_F32 |
3498 | 0 | 0U, // EQ_F32_S |
3499 | 0 | 0U, // EQ_F32x4 |
3500 | 0 | 0U, // EQ_F32x4_S |
3501 | 0 | 0U, // EQ_F64 |
3502 | 0 | 0U, // EQ_F64_S |
3503 | 0 | 0U, // EQ_F64x2 |
3504 | 0 | 0U, // EQ_F64x2_S |
3505 | 0 | 0U, // EQ_I16x8 |
3506 | 0 | 0U, // EQ_I16x8_S |
3507 | 0 | 0U, // EQ_I32 |
3508 | 0 | 0U, // EQ_I32_S |
3509 | 0 | 0U, // EQ_I32x4 |
3510 | 0 | 0U, // EQ_I32x4_S |
3511 | 0 | 0U, // EQ_I64 |
3512 | 0 | 0U, // EQ_I64_S |
3513 | 0 | 0U, // EQ_I64x2 |
3514 | 0 | 0U, // EQ_I64x2_S |
3515 | 0 | 0U, // EQ_I8x16 |
3516 | 0 | 0U, // EQ_I8x16_S |
3517 | 0 | 0U, // EXTMUL_HIGH_S_I16x8 |
3518 | 0 | 0U, // EXTMUL_HIGH_S_I16x8_S |
3519 | 0 | 0U, // EXTMUL_HIGH_S_I32x4 |
3520 | 0 | 0U, // EXTMUL_HIGH_S_I32x4_S |
3521 | 0 | 0U, // EXTMUL_HIGH_S_I64x2 |
3522 | 0 | 0U, // EXTMUL_HIGH_S_I64x2_S |
3523 | 0 | 0U, // EXTMUL_HIGH_U_I16x8 |
3524 | 0 | 0U, // EXTMUL_HIGH_U_I16x8_S |
3525 | 0 | 0U, // EXTMUL_HIGH_U_I32x4 |
3526 | 0 | 0U, // EXTMUL_HIGH_U_I32x4_S |
3527 | 0 | 0U, // EXTMUL_HIGH_U_I64x2 |
3528 | 0 | 0U, // EXTMUL_HIGH_U_I64x2_S |
3529 | 0 | 0U, // EXTMUL_LOW_S_I16x8 |
3530 | 0 | 0U, // EXTMUL_LOW_S_I16x8_S |
3531 | 0 | 0U, // EXTMUL_LOW_S_I32x4 |
3532 | 0 | 0U, // EXTMUL_LOW_S_I32x4_S |
3533 | 0 | 0U, // EXTMUL_LOW_S_I64x2 |
3534 | 0 | 0U, // EXTMUL_LOW_S_I64x2_S |
3535 | 0 | 0U, // EXTMUL_LOW_U_I16x8 |
3536 | 0 | 0U, // EXTMUL_LOW_U_I16x8_S |
3537 | 0 | 0U, // EXTMUL_LOW_U_I32x4 |
3538 | 0 | 0U, // EXTMUL_LOW_U_I32x4_S |
3539 | 0 | 0U, // EXTMUL_LOW_U_I64x2 |
3540 | 0 | 0U, // EXTMUL_LOW_U_I64x2_S |
3541 | 0 | 0U, // EXTRACT_LANE_F32x4 |
3542 | 0 | 0U, // EXTRACT_LANE_F32x4_S |
3543 | 0 | 0U, // EXTRACT_LANE_F64x2 |
3544 | 0 | 0U, // EXTRACT_LANE_F64x2_S |
3545 | 0 | 0U, // EXTRACT_LANE_I16x8_s |
3546 | 0 | 0U, // EXTRACT_LANE_I16x8_s_S |
3547 | 0 | 0U, // EXTRACT_LANE_I16x8_u |
3548 | 0 | 0U, // EXTRACT_LANE_I16x8_u_S |
3549 | 0 | 0U, // EXTRACT_LANE_I32x4 |
3550 | 0 | 0U, // EXTRACT_LANE_I32x4_S |
3551 | 0 | 0U, // EXTRACT_LANE_I64x2 |
3552 | 0 | 0U, // EXTRACT_LANE_I64x2_S |
3553 | 0 | 0U, // EXTRACT_LANE_I8x16_s |
3554 | 0 | 0U, // EXTRACT_LANE_I8x16_s_S |
3555 | 0 | 0U, // EXTRACT_LANE_I8x16_u |
3556 | 0 | 0U, // EXTRACT_LANE_I8x16_u_S |
3557 | 0 | 0U, // F32_CONVERT_S_I32 |
3558 | 0 | 0U, // F32_CONVERT_S_I32_S |
3559 | 0 | 0U, // F32_CONVERT_S_I64 |
3560 | 0 | 0U, // F32_CONVERT_S_I64_S |
3561 | 0 | 0U, // F32_CONVERT_U_I32 |
3562 | 0 | 0U, // F32_CONVERT_U_I32_S |
3563 | 0 | 0U, // F32_CONVERT_U_I64 |
3564 | 0 | 0U, // F32_CONVERT_U_I64_S |
3565 | 0 | 0U, // F32_DEMOTE_F64 |
3566 | 0 | 0U, // F32_DEMOTE_F64_S |
3567 | 0 | 0U, // F32_REINTERPRET_I32 |
3568 | 0 | 0U, // F32_REINTERPRET_I32_S |
3569 | 0 | 0U, // F64_CONVERT_S_I32 |
3570 | 0 | 0U, // F64_CONVERT_S_I32_S |
3571 | 0 | 0U, // F64_CONVERT_S_I64 |
3572 | 0 | 0U, // F64_CONVERT_S_I64_S |
3573 | 0 | 0U, // F64_CONVERT_U_I32 |
3574 | 0 | 0U, // F64_CONVERT_U_I32_S |
3575 | 0 | 0U, // F64_CONVERT_U_I64 |
3576 | 0 | 0U, // F64_CONVERT_U_I64_S |
3577 | 0 | 0U, // F64_PROMOTE_F32 |
3578 | 0 | 0U, // F64_PROMOTE_F32_S |
3579 | 0 | 0U, // F64_REINTERPRET_I64 |
3580 | 0 | 0U, // F64_REINTERPRET_I64_S |
3581 | 0 | 0U, // FALLTHROUGH_RETURN |
3582 | 0 | 0U, // FALLTHROUGH_RETURN_S |
3583 | 0 | 0U, // FLOOR_F32 |
3584 | 0 | 0U, // FLOOR_F32_S |
3585 | 0 | 0U, // FLOOR_F32x4 |
3586 | 0 | 0U, // FLOOR_F32x4_S |
3587 | 0 | 0U, // FLOOR_F64 |
3588 | 0 | 0U, // FLOOR_F64_S |
3589 | 0 | 0U, // FLOOR_F64x2 |
3590 | 0 | 0U, // FLOOR_F64x2_S |
3591 | 0 | 0U, // FP_TO_SINT_I32_F32 |
3592 | 0 | 0U, // FP_TO_SINT_I32_F32_S |
3593 | 0 | 0U, // FP_TO_SINT_I32_F64 |
3594 | 0 | 0U, // FP_TO_SINT_I32_F64_S |
3595 | 0 | 0U, // FP_TO_SINT_I64_F32 |
3596 | 0 | 0U, // FP_TO_SINT_I64_F32_S |
3597 | 0 | 0U, // FP_TO_SINT_I64_F64 |
3598 | 0 | 0U, // FP_TO_SINT_I64_F64_S |
3599 | 0 | 0U, // FP_TO_UINT_I32_F32 |
3600 | 0 | 0U, // FP_TO_UINT_I32_F32_S |
3601 | 0 | 0U, // FP_TO_UINT_I32_F64 |
3602 | 0 | 0U, // FP_TO_UINT_I32_F64_S |
3603 | 0 | 0U, // FP_TO_UINT_I64_F32 |
3604 | 0 | 0U, // FP_TO_UINT_I64_F32_S |
3605 | 0 | 0U, // FP_TO_UINT_I64_F64 |
3606 | 0 | 0U, // FP_TO_UINT_I64_F64_S |
3607 | 0 | 0U, // GE_F32 |
3608 | 0 | 0U, // GE_F32_S |
3609 | 0 | 0U, // GE_F32x4 |
3610 | 0 | 0U, // GE_F32x4_S |
3611 | 0 | 0U, // GE_F64 |
3612 | 0 | 0U, // GE_F64_S |
3613 | 0 | 0U, // GE_F64x2 |
3614 | 0 | 0U, // GE_F64x2_S |
3615 | 0 | 0U, // GE_S_I16x8 |
3616 | 0 | 0U, // GE_S_I16x8_S |
3617 | 0 | 0U, // GE_S_I32 |
3618 | 0 | 0U, // GE_S_I32_S |
3619 | 0 | 0U, // GE_S_I32x4 |
3620 | 0 | 0U, // GE_S_I32x4_S |
3621 | 0 | 0U, // GE_S_I64 |
3622 | 0 | 0U, // GE_S_I64_S |
3623 | 0 | 0U, // GE_S_I64x2 |
3624 | 0 | 0U, // GE_S_I64x2_S |
3625 | 0 | 0U, // GE_S_I8x16 |
3626 | 0 | 0U, // GE_S_I8x16_S |
3627 | 0 | 0U, // GE_U_I16x8 |
3628 | 0 | 0U, // GE_U_I16x8_S |
3629 | 0 | 0U, // GE_U_I32 |
3630 | 0 | 0U, // GE_U_I32_S |
3631 | 0 | 0U, // GE_U_I32x4 |
3632 | 0 | 0U, // GE_U_I32x4_S |
3633 | 0 | 0U, // GE_U_I64 |
3634 | 0 | 0U, // GE_U_I64_S |
3635 | 0 | 0U, // GE_U_I8x16 |
3636 | 0 | 0U, // GE_U_I8x16_S |
3637 | 0 | 0U, // GLOBAL_GET_EXTERNREF |
3638 | 0 | 0U, // GLOBAL_GET_EXTERNREF_S |
3639 | 0 | 0U, // GLOBAL_GET_F32 |
3640 | 0 | 0U, // GLOBAL_GET_F32_S |
3641 | 0 | 0U, // GLOBAL_GET_F64 |
3642 | 0 | 0U, // GLOBAL_GET_F64_S |
3643 | 0 | 0U, // GLOBAL_GET_FUNCREF |
3644 | 0 | 0U, // GLOBAL_GET_FUNCREF_S |
3645 | 0 | 0U, // GLOBAL_GET_I32 |
3646 | 0 | 0U, // GLOBAL_GET_I32_S |
3647 | 0 | 0U, // GLOBAL_GET_I64 |
3648 | 0 | 0U, // GLOBAL_GET_I64_S |
3649 | 0 | 0U, // GLOBAL_GET_V128 |
3650 | 0 | 0U, // GLOBAL_GET_V128_S |
3651 | 0 | 0U, // GLOBAL_SET_EXTERNREF |
3652 | 0 | 0U, // GLOBAL_SET_EXTERNREF_S |
3653 | 0 | 0U, // GLOBAL_SET_F32 |
3654 | 0 | 0U, // GLOBAL_SET_F32_S |
3655 | 0 | 0U, // GLOBAL_SET_F64 |
3656 | 0 | 0U, // GLOBAL_SET_F64_S |
3657 | 0 | 0U, // GLOBAL_SET_FUNCREF |
3658 | 0 | 0U, // GLOBAL_SET_FUNCREF_S |
3659 | 0 | 0U, // GLOBAL_SET_I32 |
3660 | 0 | 0U, // GLOBAL_SET_I32_S |
3661 | 0 | 0U, // GLOBAL_SET_I64 |
3662 | 0 | 0U, // GLOBAL_SET_I64_S |
3663 | 0 | 0U, // GLOBAL_SET_V128 |
3664 | 0 | 0U, // GLOBAL_SET_V128_S |
3665 | 0 | 0U, // GT_F32 |
3666 | 0 | 0U, // GT_F32_S |
3667 | 0 | 0U, // GT_F32x4 |
3668 | 0 | 0U, // GT_F32x4_S |
3669 | 0 | 0U, // GT_F64 |
3670 | 0 | 0U, // GT_F64_S |
3671 | 0 | 0U, // GT_F64x2 |
3672 | 0 | 0U, // GT_F64x2_S |
3673 | 0 | 0U, // GT_S_I16x8 |
3674 | 0 | 0U, // GT_S_I16x8_S |
3675 | 0 | 0U, // GT_S_I32 |
3676 | 0 | 0U, // GT_S_I32_S |
3677 | 0 | 0U, // GT_S_I32x4 |
3678 | 0 | 0U, // GT_S_I32x4_S |
3679 | 0 | 0U, // GT_S_I64 |
3680 | 0 | 0U, // GT_S_I64_S |
3681 | 0 | 0U, // GT_S_I64x2 |
3682 | 0 | 0U, // GT_S_I64x2_S |
3683 | 0 | 0U, // GT_S_I8x16 |
3684 | 0 | 0U, // GT_S_I8x16_S |
3685 | 0 | 0U, // GT_U_I16x8 |
3686 | 0 | 0U, // GT_U_I16x8_S |
3687 | 0 | 0U, // GT_U_I32 |
3688 | 0 | 0U, // GT_U_I32_S |
3689 | 0 | 0U, // GT_U_I32x4 |
3690 | 0 | 0U, // GT_U_I32x4_S |
3691 | 0 | 0U, // GT_U_I64 |
3692 | 0 | 0U, // GT_U_I64_S |
3693 | 0 | 0U, // GT_U_I8x16 |
3694 | 0 | 0U, // GT_U_I8x16_S |
3695 | 0 | 0U, // I32_EXTEND16_S_I32 |
3696 | 0 | 0U, // I32_EXTEND16_S_I32_S |
3697 | 0 | 0U, // I32_EXTEND8_S_I32 |
3698 | 0 | 0U, // I32_EXTEND8_S_I32_S |
3699 | 0 | 0U, // I32_REINTERPRET_F32 |
3700 | 0 | 0U, // I32_REINTERPRET_F32_S |
3701 | 0 | 0U, // I32_TRUNC_S_F32 |
3702 | 0 | 0U, // I32_TRUNC_S_F32_S |
3703 | 0 | 0U, // I32_TRUNC_S_F64 |
3704 | 0 | 0U, // I32_TRUNC_S_F64_S |
3705 | 0 | 0U, // I32_TRUNC_S_SAT_F32 |
3706 | 0 | 0U, // I32_TRUNC_S_SAT_F32_S |
3707 | 0 | 0U, // I32_TRUNC_S_SAT_F64 |
3708 | 0 | 0U, // I32_TRUNC_S_SAT_F64_S |
3709 | 0 | 0U, // I32_TRUNC_U_F32 |
3710 | 0 | 0U, // I32_TRUNC_U_F32_S |
3711 | 0 | 0U, // I32_TRUNC_U_F64 |
3712 | 0 | 0U, // I32_TRUNC_U_F64_S |
3713 | 0 | 0U, // I32_TRUNC_U_SAT_F32 |
3714 | 0 | 0U, // I32_TRUNC_U_SAT_F32_S |
3715 | 0 | 0U, // I32_TRUNC_U_SAT_F64 |
3716 | 0 | 0U, // I32_TRUNC_U_SAT_F64_S |
3717 | 0 | 0U, // I32_WRAP_I64 |
3718 | 0 | 0U, // I32_WRAP_I64_S |
3719 | 0 | 0U, // I64_EXTEND16_S_I64 |
3720 | 0 | 0U, // I64_EXTEND16_S_I64_S |
3721 | 0 | 0U, // I64_EXTEND32_S_I64 |
3722 | 0 | 0U, // I64_EXTEND32_S_I64_S |
3723 | 0 | 0U, // I64_EXTEND8_S_I64 |
3724 | 0 | 0U, // I64_EXTEND8_S_I64_S |
3725 | 0 | 0U, // I64_EXTEND_S_I32 |
3726 | 0 | 0U, // I64_EXTEND_S_I32_S |
3727 | 0 | 0U, // I64_EXTEND_U_I32 |
3728 | 0 | 0U, // I64_EXTEND_U_I32_S |
3729 | 0 | 0U, // I64_REINTERPRET_F64 |
3730 | 0 | 0U, // I64_REINTERPRET_F64_S |
3731 | 0 | 0U, // I64_TRUNC_S_F32 |
3732 | 0 | 0U, // I64_TRUNC_S_F32_S |
3733 | 0 | 0U, // I64_TRUNC_S_F64 |
3734 | 0 | 0U, // I64_TRUNC_S_F64_S |
3735 | 0 | 0U, // I64_TRUNC_S_SAT_F32 |
3736 | 0 | 0U, // I64_TRUNC_S_SAT_F32_S |
3737 | 0 | 0U, // I64_TRUNC_S_SAT_F64 |
3738 | 0 | 0U, // I64_TRUNC_S_SAT_F64_S |
3739 | 0 | 0U, // I64_TRUNC_U_F32 |
3740 | 0 | 0U, // I64_TRUNC_U_F32_S |
3741 | 0 | 0U, // I64_TRUNC_U_F64 |
3742 | 0 | 0U, // I64_TRUNC_U_F64_S |
3743 | 0 | 0U, // I64_TRUNC_U_SAT_F32 |
3744 | 0 | 0U, // I64_TRUNC_U_SAT_F32_S |
3745 | 0 | 0U, // I64_TRUNC_U_SAT_F64 |
3746 | 0 | 0U, // I64_TRUNC_U_SAT_F64_S |
3747 | 0 | 0U, // IF |
3748 | 0 | 0U, // IF_S |
3749 | 0 | 0U, // LANESELECT_I16x8 |
3750 | 0 | 0U, // LANESELECT_I16x8_S |
3751 | 0 | 0U, // LANESELECT_I32x4 |
3752 | 0 | 0U, // LANESELECT_I32x4_S |
3753 | 0 | 0U, // LANESELECT_I64x2 |
3754 | 0 | 0U, // LANESELECT_I64x2_S |
3755 | 0 | 0U, // LANESELECT_I8x16 |
3756 | 0 | 0U, // LANESELECT_I8x16_S |
3757 | 0 | 0U, // LE_F32 |
3758 | 0 | 0U, // LE_F32_S |
3759 | 0 | 0U, // LE_F32x4 |
3760 | 0 | 0U, // LE_F32x4_S |
3761 | 0 | 0U, // LE_F64 |
3762 | 0 | 0U, // LE_F64_S |
3763 | 0 | 0U, // LE_F64x2 |
3764 | 0 | 0U, // LE_F64x2_S |
3765 | 0 | 0U, // LE_S_I16x8 |
3766 | 0 | 0U, // LE_S_I16x8_S |
3767 | 0 | 0U, // LE_S_I32 |
3768 | 0 | 0U, // LE_S_I32_S |
3769 | 0 | 0U, // LE_S_I32x4 |
3770 | 0 | 0U, // LE_S_I32x4_S |
3771 | 0 | 0U, // LE_S_I64 |
3772 | 0 | 0U, // LE_S_I64_S |
3773 | 0 | 0U, // LE_S_I64x2 |
3774 | 0 | 0U, // LE_S_I64x2_S |
3775 | 0 | 0U, // LE_S_I8x16 |
3776 | 0 | 0U, // LE_S_I8x16_S |
3777 | 0 | 0U, // LE_U_I16x8 |
3778 | 0 | 0U, // LE_U_I16x8_S |
3779 | 0 | 0U, // LE_U_I32 |
3780 | 0 | 0U, // LE_U_I32_S |
3781 | 0 | 0U, // LE_U_I32x4 |
3782 | 0 | 0U, // LE_U_I32x4_S |
3783 | 0 | 0U, // LE_U_I64 |
3784 | 0 | 0U, // LE_U_I64_S |
3785 | 0 | 0U, // LE_U_I8x16 |
3786 | 0 | 0U, // LE_U_I8x16_S |
3787 | 0 | 0U, // LOAD16_SPLAT_A32 |
3788 | 0 | 0U, // LOAD16_SPLAT_A32_S |
3789 | 0 | 0U, // LOAD16_SPLAT_A64 |
3790 | 0 | 0U, // LOAD16_SPLAT_A64_S |
3791 | 0 | 0U, // LOAD16_S_I32_A32 |
3792 | 0 | 0U, // LOAD16_S_I32_A32_S |
3793 | 0 | 0U, // LOAD16_S_I32_A64 |
3794 | 0 | 0U, // LOAD16_S_I32_A64_S |
3795 | 0 | 0U, // LOAD16_S_I64_A32 |
3796 | 0 | 0U, // LOAD16_S_I64_A32_S |
3797 | 0 | 0U, // LOAD16_S_I64_A64 |
3798 | 0 | 0U, // LOAD16_S_I64_A64_S |
3799 | 0 | 0U, // LOAD16_U_I32_A32 |
3800 | 0 | 0U, // LOAD16_U_I32_A32_S |
3801 | 0 | 0U, // LOAD16_U_I32_A64 |
3802 | 0 | 0U, // LOAD16_U_I32_A64_S |
3803 | 0 | 0U, // LOAD16_U_I64_A32 |
3804 | 0 | 0U, // LOAD16_U_I64_A32_S |
3805 | 0 | 0U, // LOAD16_U_I64_A64 |
3806 | 0 | 0U, // LOAD16_U_I64_A64_S |
3807 | 0 | 0U, // LOAD32_SPLAT_A32 |
3808 | 0 | 0U, // LOAD32_SPLAT_A32_S |
3809 | 0 | 0U, // LOAD32_SPLAT_A64 |
3810 | 0 | 0U, // LOAD32_SPLAT_A64_S |
3811 | 0 | 0U, // LOAD32_S_I64_A32 |
3812 | 0 | 0U, // LOAD32_S_I64_A32_S |
3813 | 0 | 0U, // LOAD32_S_I64_A64 |
3814 | 0 | 0U, // LOAD32_S_I64_A64_S |
3815 | 0 | 0U, // LOAD32_U_I64_A32 |
3816 | 0 | 0U, // LOAD32_U_I64_A32_S |
3817 | 0 | 0U, // LOAD32_U_I64_A64 |
3818 | 0 | 0U, // LOAD32_U_I64_A64_S |
3819 | 0 | 0U, // LOAD64_SPLAT_A32 |
3820 | 0 | 0U, // LOAD64_SPLAT_A32_S |
3821 | 0 | 0U, // LOAD64_SPLAT_A64 |
3822 | 0 | 0U, // LOAD64_SPLAT_A64_S |
3823 | 0 | 0U, // LOAD8_SPLAT_A32 |
3824 | 0 | 0U, // LOAD8_SPLAT_A32_S |
3825 | 0 | 0U, // LOAD8_SPLAT_A64 |
3826 | 0 | 0U, // LOAD8_SPLAT_A64_S |
3827 | 0 | 0U, // LOAD8_S_I32_A32 |
3828 | 0 | 0U, // LOAD8_S_I32_A32_S |
3829 | 0 | 0U, // LOAD8_S_I32_A64 |
3830 | 0 | 0U, // LOAD8_S_I32_A64_S |
3831 | 0 | 0U, // LOAD8_S_I64_A32 |
3832 | 0 | 0U, // LOAD8_S_I64_A32_S |
3833 | 0 | 0U, // LOAD8_S_I64_A64 |
3834 | 0 | 0U, // LOAD8_S_I64_A64_S |
3835 | 0 | 0U, // LOAD8_U_I32_A32 |
3836 | 0 | 0U, // LOAD8_U_I32_A32_S |
3837 | 0 | 0U, // LOAD8_U_I32_A64 |
3838 | 0 | 0U, // LOAD8_U_I32_A64_S |
3839 | 0 | 0U, // LOAD8_U_I64_A32 |
3840 | 0 | 0U, // LOAD8_U_I64_A32_S |
3841 | 0 | 0U, // LOAD8_U_I64_A64 |
3842 | 0 | 0U, // LOAD8_U_I64_A64_S |
3843 | 0 | 0U, // LOAD_EXTEND_S_I16x8_A32 |
3844 | 0 | 0U, // LOAD_EXTEND_S_I16x8_A32_S |
3845 | 0 | 0U, // LOAD_EXTEND_S_I16x8_A64 |
3846 | 0 | 0U, // LOAD_EXTEND_S_I16x8_A64_S |
3847 | 0 | 0U, // LOAD_EXTEND_S_I32x4_A32 |
3848 | 0 | 0U, // LOAD_EXTEND_S_I32x4_A32_S |
3849 | 0 | 0U, // LOAD_EXTEND_S_I32x4_A64 |
3850 | 0 | 0U, // LOAD_EXTEND_S_I32x4_A64_S |
3851 | 0 | 0U, // LOAD_EXTEND_S_I64x2_A32 |
3852 | 0 | 0U, // LOAD_EXTEND_S_I64x2_A32_S |
3853 | 0 | 0U, // LOAD_EXTEND_S_I64x2_A64 |
3854 | 0 | 0U, // LOAD_EXTEND_S_I64x2_A64_S |
3855 | 0 | 0U, // LOAD_EXTEND_U_I16x8_A32 |
3856 | 0 | 0U, // LOAD_EXTEND_U_I16x8_A32_S |
3857 | 0 | 0U, // LOAD_EXTEND_U_I16x8_A64 |
3858 | 0 | 0U, // LOAD_EXTEND_U_I16x8_A64_S |
3859 | 0 | 0U, // LOAD_EXTEND_U_I32x4_A32 |
3860 | 0 | 0U, // LOAD_EXTEND_U_I32x4_A32_S |
3861 | 0 | 0U, // LOAD_EXTEND_U_I32x4_A64 |
3862 | 0 | 0U, // LOAD_EXTEND_U_I32x4_A64_S |
3863 | 0 | 0U, // LOAD_EXTEND_U_I64x2_A32 |
3864 | 0 | 0U, // LOAD_EXTEND_U_I64x2_A32_S |
3865 | 0 | 0U, // LOAD_EXTEND_U_I64x2_A64 |
3866 | 0 | 0U, // LOAD_EXTEND_U_I64x2_A64_S |
3867 | 0 | 0U, // LOAD_F32_A32 |
3868 | 0 | 0U, // LOAD_F32_A32_S |
3869 | 0 | 0U, // LOAD_F32_A64 |
3870 | 0 | 0U, // LOAD_F32_A64_S |
3871 | 0 | 0U, // LOAD_F64_A32 |
3872 | 0 | 0U, // LOAD_F64_A32_S |
3873 | 0 | 0U, // LOAD_F64_A64 |
3874 | 0 | 0U, // LOAD_F64_A64_S |
3875 | 0 | 0U, // LOAD_I32_A32 |
3876 | 0 | 0U, // LOAD_I32_A32_S |
3877 | 0 | 0U, // LOAD_I32_A64 |
3878 | 0 | 0U, // LOAD_I32_A64_S |
3879 | 0 | 0U, // LOAD_I64_A32 |
3880 | 0 | 0U, // LOAD_I64_A32_S |
3881 | 0 | 0U, // LOAD_I64_A64 |
3882 | 0 | 0U, // LOAD_I64_A64_S |
3883 | 0 | 0U, // LOAD_LANE_I16x8_A32 |
3884 | 0 | 0U, // LOAD_LANE_I16x8_A32_S |
3885 | 0 | 0U, // LOAD_LANE_I16x8_A64 |
3886 | 0 | 0U, // LOAD_LANE_I16x8_A64_S |
3887 | 0 | 0U, // LOAD_LANE_I32x4_A32 |
3888 | 0 | 0U, // LOAD_LANE_I32x4_A32_S |
3889 | 0 | 0U, // LOAD_LANE_I32x4_A64 |
3890 | 0 | 0U, // LOAD_LANE_I32x4_A64_S |
3891 | 0 | 0U, // LOAD_LANE_I64x2_A32 |
3892 | 0 | 0U, // LOAD_LANE_I64x2_A32_S |
3893 | 0 | 0U, // LOAD_LANE_I64x2_A64 |
3894 | 0 | 0U, // LOAD_LANE_I64x2_A64_S |
3895 | 0 | 0U, // LOAD_LANE_I8x16_A32 |
3896 | 0 | 0U, // LOAD_LANE_I8x16_A32_S |
3897 | 0 | 0U, // LOAD_LANE_I8x16_A64 |
3898 | 0 | 0U, // LOAD_LANE_I8x16_A64_S |
3899 | 0 | 0U, // LOAD_V128_A32 |
3900 | 0 | 0U, // LOAD_V128_A32_S |
3901 | 0 | 0U, // LOAD_V128_A64 |
3902 | 0 | 0U, // LOAD_V128_A64_S |
3903 | 0 | 0U, // LOAD_ZERO_I32x4_A32 |
3904 | 0 | 0U, // LOAD_ZERO_I32x4_A32_S |
3905 | 0 | 0U, // LOAD_ZERO_I32x4_A64 |
3906 | 0 | 0U, // LOAD_ZERO_I32x4_A64_S |
3907 | 0 | 0U, // LOAD_ZERO_I64x2_A32 |
3908 | 0 | 0U, // LOAD_ZERO_I64x2_A32_S |
3909 | 0 | 0U, // LOAD_ZERO_I64x2_A64 |
3910 | 0 | 0U, // LOAD_ZERO_I64x2_A64_S |
3911 | 0 | 0U, // LOCAL_GET_EXTERNREF |
3912 | 0 | 0U, // LOCAL_GET_EXTERNREF_S |
3913 | 0 | 0U, // LOCAL_GET_F32 |
3914 | 0 | 0U, // LOCAL_GET_F32_S |
3915 | 0 | 0U, // LOCAL_GET_F64 |
3916 | 0 | 0U, // LOCAL_GET_F64_S |
3917 | 0 | 0U, // LOCAL_GET_FUNCREF |
3918 | 0 | 0U, // LOCAL_GET_FUNCREF_S |
3919 | 0 | 0U, // LOCAL_GET_I32 |
3920 | 0 | 0U, // LOCAL_GET_I32_S |
3921 | 0 | 0U, // LOCAL_GET_I64 |
3922 | 0 | 0U, // LOCAL_GET_I64_S |
3923 | 0 | 0U, // LOCAL_GET_V128 |
3924 | 0 | 0U, // LOCAL_GET_V128_S |
3925 | 0 | 0U, // LOCAL_SET_EXTERNREF |
3926 | 0 | 0U, // LOCAL_SET_EXTERNREF_S |
3927 | 0 | 0U, // LOCAL_SET_F32 |
3928 | 0 | 0U, // LOCAL_SET_F32_S |
3929 | 0 | 0U, // LOCAL_SET_F64 |
3930 | 0 | 0U, // LOCAL_SET_F64_S |
3931 | 0 | 0U, // LOCAL_SET_FUNCREF |
3932 | 0 | 0U, // LOCAL_SET_FUNCREF_S |
3933 | 0 | 0U, // LOCAL_SET_I32 |
3934 | 0 | 0U, // LOCAL_SET_I32_S |
3935 | 0 | 0U, // LOCAL_SET_I64 |
3936 | 0 | 0U, // LOCAL_SET_I64_S |
3937 | 0 | 0U, // LOCAL_SET_V128 |
3938 | 0 | 0U, // LOCAL_SET_V128_S |
3939 | 0 | 0U, // LOCAL_TEE_EXTERNREF |
3940 | 0 | 0U, // LOCAL_TEE_EXTERNREF_S |
3941 | 0 | 0U, // LOCAL_TEE_F32 |
3942 | 0 | 0U, // LOCAL_TEE_F32_S |
3943 | 0 | 0U, // LOCAL_TEE_F64 |
3944 | 0 | 0U, // LOCAL_TEE_F64_S |
3945 | 0 | 0U, // LOCAL_TEE_FUNCREF |
3946 | 0 | 0U, // LOCAL_TEE_FUNCREF_S |
3947 | 0 | 0U, // LOCAL_TEE_I32 |
3948 | 0 | 0U, // LOCAL_TEE_I32_S |
3949 | 0 | 0U, // LOCAL_TEE_I64 |
3950 | 0 | 0U, // LOCAL_TEE_I64_S |
3951 | 0 | 0U, // LOCAL_TEE_V128 |
3952 | 0 | 0U, // LOCAL_TEE_V128_S |
3953 | 0 | 0U, // LOOP |
3954 | 0 | 0U, // LOOP_S |
3955 | 0 | 0U, // LT_F32 |
3956 | 0 | 0U, // LT_F32_S |
3957 | 0 | 0U, // LT_F32x4 |
3958 | 0 | 0U, // LT_F32x4_S |
3959 | 0 | 0U, // LT_F64 |
3960 | 0 | 0U, // LT_F64_S |
3961 | 0 | 0U, // LT_F64x2 |
3962 | 0 | 0U, // LT_F64x2_S |
3963 | 0 | 0U, // LT_S_I16x8 |
3964 | 0 | 0U, // LT_S_I16x8_S |
3965 | 0 | 0U, // LT_S_I32 |
3966 | 0 | 0U, // LT_S_I32_S |
3967 | 0 | 0U, // LT_S_I32x4 |
3968 | 0 | 0U, // LT_S_I32x4_S |
3969 | 0 | 0U, // LT_S_I64 |
3970 | 0 | 0U, // LT_S_I64_S |
3971 | 0 | 0U, // LT_S_I64x2 |
3972 | 0 | 0U, // LT_S_I64x2_S |
3973 | 0 | 0U, // LT_S_I8x16 |
3974 | 0 | 0U, // LT_S_I8x16_S |
3975 | 0 | 0U, // LT_U_I16x8 |
3976 | 0 | 0U, // LT_U_I16x8_S |
3977 | 0 | 0U, // LT_U_I32 |
3978 | 0 | 0U, // LT_U_I32_S |
3979 | 0 | 0U, // LT_U_I32x4 |
3980 | 0 | 0U, // LT_U_I32x4_S |
3981 | 0 | 0U, // LT_U_I64 |
3982 | 0 | 0U, // LT_U_I64_S |
3983 | 0 | 0U, // LT_U_I8x16 |
3984 | 0 | 0U, // LT_U_I8x16_S |
3985 | 0 | 0U, // MADD_F32x4 |
3986 | 0 | 0U, // MADD_F32x4_S |
3987 | 0 | 0U, // MADD_F64x2 |
3988 | 0 | 0U, // MADD_F64x2_S |
3989 | 0 | 0U, // MAX_F32 |
3990 | 0 | 0U, // MAX_F32_S |
3991 | 0 | 0U, // MAX_F32x4 |
3992 | 0 | 0U, // MAX_F32x4_S |
3993 | 0 | 0U, // MAX_F64 |
3994 | 0 | 0U, // MAX_F64_S |
3995 | 0 | 0U, // MAX_F64x2 |
3996 | 0 | 0U, // MAX_F64x2_S |
3997 | 0 | 0U, // MAX_S_I16x8 |
3998 | 0 | 0U, // MAX_S_I16x8_S |
3999 | 0 | 0U, // MAX_S_I32x4 |
4000 | 0 | 0U, // MAX_S_I32x4_S |
4001 | 0 | 0U, // MAX_S_I8x16 |
4002 | 0 | 0U, // MAX_S_I8x16_S |
4003 | 0 | 0U, // MAX_U_I16x8 |
4004 | 0 | 0U, // MAX_U_I16x8_S |
4005 | 0 | 0U, // MAX_U_I32x4 |
4006 | 0 | 0U, // MAX_U_I32x4_S |
4007 | 0 | 0U, // MAX_U_I8x16 |
4008 | 0 | 0U, // MAX_U_I8x16_S |
4009 | 0 | 0U, // MEMORY_ATOMIC_NOTIFY_A32 |
4010 | 0 | 0U, // MEMORY_ATOMIC_NOTIFY_A32_S |
4011 | 0 | 0U, // MEMORY_ATOMIC_NOTIFY_A64 |
4012 | 0 | 0U, // MEMORY_ATOMIC_NOTIFY_A64_S |
4013 | 0 | 0U, // MEMORY_ATOMIC_WAIT32_A32 |
4014 | 0 | 0U, // MEMORY_ATOMIC_WAIT32_A32_S |
4015 | 0 | 0U, // MEMORY_ATOMIC_WAIT32_A64 |
4016 | 0 | 0U, // MEMORY_ATOMIC_WAIT32_A64_S |
4017 | 0 | 0U, // MEMORY_ATOMIC_WAIT64_A32 |
4018 | 0 | 0U, // MEMORY_ATOMIC_WAIT64_A32_S |
4019 | 0 | 0U, // MEMORY_ATOMIC_WAIT64_A64 |
4020 | 0 | 0U, // MEMORY_ATOMIC_WAIT64_A64_S |
4021 | 0 | 0U, // MIN_F32 |
4022 | 0 | 0U, // MIN_F32_S |
4023 | 0 | 0U, // MIN_F32x4 |
4024 | 0 | 0U, // MIN_F32x4_S |
4025 | 0 | 0U, // MIN_F64 |
4026 | 0 | 0U, // MIN_F64_S |
4027 | 0 | 0U, // MIN_F64x2 |
4028 | 0 | 0U, // MIN_F64x2_S |
4029 | 0 | 0U, // MIN_S_I16x8 |
4030 | 0 | 0U, // MIN_S_I16x8_S |
4031 | 0 | 0U, // MIN_S_I32x4 |
4032 | 0 | 0U, // MIN_S_I32x4_S |
4033 | 0 | 0U, // MIN_S_I8x16 |
4034 | 0 | 0U, // MIN_S_I8x16_S |
4035 | 0 | 0U, // MIN_U_I16x8 |
4036 | 0 | 0U, // MIN_U_I16x8_S |
4037 | 0 | 0U, // MIN_U_I32x4 |
4038 | 0 | 0U, // MIN_U_I32x4_S |
4039 | 0 | 0U, // MIN_U_I8x16 |
4040 | 0 | 0U, // MIN_U_I8x16_S |
4041 | 0 | 0U, // MUL_F32 |
4042 | 0 | 0U, // MUL_F32_S |
4043 | 0 | 0U, // MUL_F32x4 |
4044 | 0 | 0U, // MUL_F32x4_S |
4045 | 0 | 0U, // MUL_F64 |
4046 | 0 | 0U, // MUL_F64_S |
4047 | 0 | 0U, // MUL_F64x2 |
4048 | 0 | 0U, // MUL_F64x2_S |
4049 | 0 | 0U, // MUL_I16x8 |
4050 | 0 | 0U, // MUL_I16x8_S |
4051 | 0 | 0U, // MUL_I32 |
4052 | 0 | 0U, // MUL_I32_S |
4053 | 0 | 0U, // MUL_I32x4 |
4054 | 0 | 0U, // MUL_I32x4_S |
4055 | 0 | 0U, // MUL_I64 |
4056 | 0 | 0U, // MUL_I64_S |
4057 | 0 | 0U, // MUL_I64x2 |
4058 | 0 | 0U, // MUL_I64x2_S |
4059 | 0 | 0U, // NARROW_S_I16x8 |
4060 | 0 | 0U, // NARROW_S_I16x8_S |
4061 | 0 | 0U, // NARROW_S_I8x16 |
4062 | 0 | 0U, // NARROW_S_I8x16_S |
4063 | 0 | 0U, // NARROW_U_I16x8 |
4064 | 0 | 0U, // NARROW_U_I16x8_S |
4065 | 0 | 0U, // NARROW_U_I8x16 |
4066 | 0 | 0U, // NARROW_U_I8x16_S |
4067 | 0 | 0U, // NEAREST_F32 |
4068 | 0 | 0U, // NEAREST_F32_S |
4069 | 0 | 0U, // NEAREST_F32x4 |
4070 | 0 | 0U, // NEAREST_F32x4_S |
4071 | 0 | 0U, // NEAREST_F64 |
4072 | 0 | 0U, // NEAREST_F64_S |
4073 | 0 | 0U, // NEAREST_F64x2 |
4074 | 0 | 0U, // NEAREST_F64x2_S |
4075 | 0 | 0U, // NEG_F32 |
4076 | 0 | 0U, // NEG_F32_S |
4077 | 0 | 0U, // NEG_F32x4 |
4078 | 0 | 0U, // NEG_F32x4_S |
4079 | 0 | 0U, // NEG_F64 |
4080 | 0 | 0U, // NEG_F64_S |
4081 | 0 | 0U, // NEG_F64x2 |
4082 | 0 | 0U, // NEG_F64x2_S |
4083 | 0 | 0U, // NEG_I16x8 |
4084 | 0 | 0U, // NEG_I16x8_S |
4085 | 0 | 0U, // NEG_I32x4 |
4086 | 0 | 0U, // NEG_I32x4_S |
4087 | 0 | 0U, // NEG_I64x2 |
4088 | 0 | 0U, // NEG_I64x2_S |
4089 | 0 | 0U, // NEG_I8x16 |
4090 | 0 | 0U, // NEG_I8x16_S |
4091 | 0 | 0U, // NE_F32 |
4092 | 0 | 0U, // NE_F32_S |
4093 | 0 | 0U, // NE_F32x4 |
4094 | 0 | 0U, // NE_F32x4_S |
4095 | 0 | 0U, // NE_F64 |
4096 | 0 | 0U, // NE_F64_S |
4097 | 0 | 0U, // NE_F64x2 |
4098 | 0 | 0U, // NE_F64x2_S |
4099 | 0 | 0U, // NE_I16x8 |
4100 | 0 | 0U, // NE_I16x8_S |
4101 | 0 | 0U, // NE_I32 |
4102 | 0 | 0U, // NE_I32_S |
4103 | 0 | 0U, // NE_I32x4 |
4104 | 0 | 0U, // NE_I32x4_S |
4105 | 0 | 0U, // NE_I64 |
4106 | 0 | 0U, // NE_I64_S |
4107 | 0 | 0U, // NE_I64x2 |
4108 | 0 | 0U, // NE_I64x2_S |
4109 | 0 | 0U, // NE_I8x16 |
4110 | 0 | 0U, // NE_I8x16_S |
4111 | 0 | 0U, // NMADD_F32x4 |
4112 | 0 | 0U, // NMADD_F32x4_S |
4113 | 0 | 0U, // NMADD_F64x2 |
4114 | 0 | 0U, // NMADD_F64x2_S |
4115 | 0 | 0U, // NOP |
4116 | 0 | 0U, // NOP_S |
4117 | 0 | 0U, // NOT |
4118 | 0 | 0U, // NOT_S |
4119 | 0 | 0U, // OR |
4120 | 0 | 0U, // OR_I32 |
4121 | 0 | 0U, // OR_I32_S |
4122 | 0 | 0U, // OR_I64 |
4123 | 0 | 0U, // OR_I64_S |
4124 | 0 | 0U, // OR_S |
4125 | 0 | 0U, // PMAX_F32x4 |
4126 | 0 | 0U, // PMAX_F32x4_S |
4127 | 0 | 0U, // PMAX_F64x2 |
4128 | 0 | 0U, // PMAX_F64x2_S |
4129 | 0 | 0U, // PMIN_F32x4 |
4130 | 0 | 0U, // PMIN_F32x4_S |
4131 | 0 | 0U, // PMIN_F64x2 |
4132 | 0 | 0U, // PMIN_F64x2_S |
4133 | 0 | 0U, // POPCNT_I32 |
4134 | 0 | 0U, // POPCNT_I32_S |
4135 | 0 | 0U, // POPCNT_I64 |
4136 | 0 | 0U, // POPCNT_I64_S |
4137 | 0 | 0U, // POPCNT_I8x16 |
4138 | 0 | 0U, // POPCNT_I8x16_S |
4139 | 0 | 0U, // Q15MULR_SAT_S_I16x8 |
4140 | 0 | 0U, // Q15MULR_SAT_S_I16x8_S |
4141 | 0 | 0U, // REF_IS_NULL_EXTERNREF |
4142 | 0 | 0U, // REF_IS_NULL_EXTERNREF_S |
4143 | 0 | 0U, // REF_IS_NULL_FUNCREF |
4144 | 0 | 0U, // REF_IS_NULL_FUNCREF_S |
4145 | 0 | 0U, // REF_NULL_EXTERNREF |
4146 | 0 | 0U, // REF_NULL_EXTERNREF_S |
4147 | 0 | 0U, // REF_NULL_FUNCREF |
4148 | 0 | 0U, // REF_NULL_FUNCREF_S |
4149 | 0 | 0U, // RELAXED_DOT |
4150 | 0 | 0U, // RELAXED_DOT_ADD |
4151 | 0 | 0U, // RELAXED_DOT_ADD_S |
4152 | 0 | 0U, // RELAXED_DOT_BFLOAT |
4153 | 0 | 0U, // RELAXED_DOT_BFLOAT_S |
4154 | 0 | 0U, // RELAXED_DOT_S |
4155 | 0 | 0U, // RELAXED_Q15MULR_S_I16x8 |
4156 | 0 | 0U, // RELAXED_Q15MULR_S_I16x8_S |
4157 | 0 | 0U, // RELAXED_SWIZZLE |
4158 | 0 | 0U, // RELAXED_SWIZZLE_S |
4159 | 0 | 0U, // REM_S_I32 |
4160 | 0 | 0U, // REM_S_I32_S |
4161 | 0 | 0U, // REM_S_I64 |
4162 | 0 | 0U, // REM_S_I64_S |
4163 | 0 | 0U, // REM_U_I32 |
4164 | 0 | 0U, // REM_U_I32_S |
4165 | 0 | 0U, // REM_U_I64 |
4166 | 0 | 0U, // REM_U_I64_S |
4167 | 0 | 0U, // REPLACE_LANE_F32x4 |
4168 | 0 | 0U, // REPLACE_LANE_F32x4_S |
4169 | 0 | 0U, // REPLACE_LANE_F64x2 |
4170 | 0 | 0U, // REPLACE_LANE_F64x2_S |
4171 | 0 | 0U, // REPLACE_LANE_I16x8 |
4172 | 0 | 0U, // REPLACE_LANE_I16x8_S |
4173 | 0 | 0U, // REPLACE_LANE_I32x4 |
4174 | 0 | 0U, // REPLACE_LANE_I32x4_S |
4175 | 0 | 0U, // REPLACE_LANE_I64x2 |
4176 | 0 | 0U, // REPLACE_LANE_I64x2_S |
4177 | 0 | 0U, // REPLACE_LANE_I8x16 |
4178 | 0 | 0U, // REPLACE_LANE_I8x16_S |
4179 | 0 | 0U, // RETHROW |
4180 | 0 | 0U, // RETHROW_S |
4181 | 0 | 0U, // RETURN |
4182 | 0 | 0U, // RETURN_S |
4183 | 0 | 0U, // RET_CALL |
4184 | 0 | 0U, // RET_CALL_INDIRECT |
4185 | 0 | 0U, // RET_CALL_INDIRECT_S |
4186 | 0 | 0U, // RET_CALL_S |
4187 | 0 | 0U, // ROTL_I32 |
4188 | 0 | 0U, // ROTL_I32_S |
4189 | 0 | 0U, // ROTL_I64 |
4190 | 0 | 0U, // ROTL_I64_S |
4191 | 0 | 0U, // ROTR_I32 |
4192 | 0 | 0U, // ROTR_I32_S |
4193 | 0 | 0U, // ROTR_I64 |
4194 | 0 | 0U, // ROTR_I64_S |
4195 | 0 | 0U, // SELECT_EXTERNREF |
4196 | 0 | 0U, // SELECT_EXTERNREF_S |
4197 | 0 | 0U, // SELECT_F32 |
4198 | 0 | 0U, // SELECT_F32_S |
4199 | 0 | 0U, // SELECT_F64 |
4200 | 0 | 0U, // SELECT_F64_S |
4201 | 0 | 0U, // SELECT_FUNCREF |
4202 | 0 | 0U, // SELECT_FUNCREF_S |
4203 | 0 | 0U, // SELECT_I32 |
4204 | 0 | 0U, // SELECT_I32_S |
4205 | 0 | 0U, // SELECT_I64 |
4206 | 0 | 0U, // SELECT_I64_S |
4207 | 0 | 0U, // SELECT_V128 |
4208 | 0 | 0U, // SELECT_V128_S |
4209 | 0 | 0U, // SHL_I16x8 |
4210 | 0 | 0U, // SHL_I16x8_S |
4211 | 0 | 0U, // SHL_I32 |
4212 | 0 | 0U, // SHL_I32_S |
4213 | 0 | 0U, // SHL_I32x4 |
4214 | 0 | 0U, // SHL_I32x4_S |
4215 | 0 | 0U, // SHL_I64 |
4216 | 0 | 0U, // SHL_I64_S |
4217 | 0 | 0U, // SHL_I64x2 |
4218 | 0 | 0U, // SHL_I64x2_S |
4219 | 0 | 0U, // SHL_I8x16 |
4220 | 0 | 0U, // SHL_I8x16_S |
4221 | 0 | 0U, // SHR_S_I16x8 |
4222 | 0 | 0U, // SHR_S_I16x8_S |
4223 | 0 | 0U, // SHR_S_I32 |
4224 | 0 | 0U, // SHR_S_I32_S |
4225 | 0 | 0U, // SHR_S_I32x4 |
4226 | 0 | 0U, // SHR_S_I32x4_S |
4227 | 0 | 0U, // SHR_S_I64 |
4228 | 0 | 0U, // SHR_S_I64_S |
4229 | 0 | 0U, // SHR_S_I64x2 |
4230 | 0 | 0U, // SHR_S_I64x2_S |
4231 | 0 | 0U, // SHR_S_I8x16 |
4232 | 0 | 0U, // SHR_S_I8x16_S |
4233 | 0 | 0U, // SHR_U_I16x8 |
4234 | 0 | 0U, // SHR_U_I16x8_S |
4235 | 0 | 0U, // SHR_U_I32 |
4236 | 0 | 0U, // SHR_U_I32_S |
4237 | 0 | 0U, // SHR_U_I32x4 |
4238 | 0 | 0U, // SHR_U_I32x4_S |
4239 | 0 | 0U, // SHR_U_I64 |
4240 | 0 | 0U, // SHR_U_I64_S |
4241 | 0 | 0U, // SHR_U_I64x2 |
4242 | 0 | 0U, // SHR_U_I64x2_S |
4243 | 0 | 0U, // SHR_U_I8x16 |
4244 | 0 | 0U, // SHR_U_I8x16_S |
4245 | 0 | 1U, // SHUFFLE |
4246 | 0 | 0U, // SHUFFLE_S |
4247 | 0 | 0U, // SIMD_RELAXED_FMAX_F32x4 |
4248 | 0 | 0U, // SIMD_RELAXED_FMAX_F32x4_S |
4249 | 0 | 0U, // SIMD_RELAXED_FMAX_F64x2 |
4250 | 0 | 0U, // SIMD_RELAXED_FMAX_F64x2_S |
4251 | 0 | 0U, // SIMD_RELAXED_FMIN_F32x4 |
4252 | 0 | 0U, // SIMD_RELAXED_FMIN_F32x4_S |
4253 | 0 | 0U, // SIMD_RELAXED_FMIN_F64x2 |
4254 | 0 | 0U, // SIMD_RELAXED_FMIN_F64x2_S |
4255 | 0 | 0U, // SPLAT_F32x4 |
4256 | 0 | 0U, // SPLAT_F32x4_S |
4257 | 0 | 0U, // SPLAT_F64x2 |
4258 | 0 | 0U, // SPLAT_F64x2_S |
4259 | 0 | 0U, // SPLAT_I16x8 |
4260 | 0 | 0U, // SPLAT_I16x8_S |
4261 | 0 | 0U, // SPLAT_I32x4 |
4262 | 0 | 0U, // SPLAT_I32x4_S |
4263 | 0 | 0U, // SPLAT_I64x2 |
4264 | 0 | 0U, // SPLAT_I64x2_S |
4265 | 0 | 0U, // SPLAT_I8x16 |
4266 | 0 | 0U, // SPLAT_I8x16_S |
4267 | 0 | 0U, // SQRT_F32 |
4268 | 0 | 0U, // SQRT_F32_S |
4269 | 0 | 0U, // SQRT_F32x4 |
4270 | 0 | 0U, // SQRT_F32x4_S |
4271 | 0 | 0U, // SQRT_F64 |
4272 | 0 | 0U, // SQRT_F64_S |
4273 | 0 | 0U, // SQRT_F64x2 |
4274 | 0 | 0U, // SQRT_F64x2_S |
4275 | 0 | 0U, // STORE16_I32_A32 |
4276 | 0 | 0U, // STORE16_I32_A32_S |
4277 | 0 | 0U, // STORE16_I32_A64 |
4278 | 0 | 0U, // STORE16_I32_A64_S |
4279 | 0 | 0U, // STORE16_I64_A32 |
4280 | 0 | 0U, // STORE16_I64_A32_S |
4281 | 0 | 0U, // STORE16_I64_A64 |
4282 | 0 | 0U, // STORE16_I64_A64_S |
4283 | 0 | 0U, // STORE32_I64_A32 |
4284 | 0 | 0U, // STORE32_I64_A32_S |
4285 | 0 | 0U, // STORE32_I64_A64 |
4286 | 0 | 0U, // STORE32_I64_A64_S |
4287 | 0 | 0U, // STORE8_I32_A32 |
4288 | 0 | 0U, // STORE8_I32_A32_S |
4289 | 0 | 0U, // STORE8_I32_A64 |
4290 | 0 | 0U, // STORE8_I32_A64_S |
4291 | 0 | 0U, // STORE8_I64_A32 |
4292 | 0 | 0U, // STORE8_I64_A32_S |
4293 | 0 | 0U, // STORE8_I64_A64 |
4294 | 0 | 0U, // STORE8_I64_A64_S |
4295 | 0 | 0U, // STORE_F32_A32 |
4296 | 0 | 0U, // STORE_F32_A32_S |
4297 | 0 | 0U, // STORE_F32_A64 |
4298 | 0 | 0U, // STORE_F32_A64_S |
4299 | 0 | 0U, // STORE_F64_A32 |
4300 | 0 | 0U, // STORE_F64_A32_S |
4301 | 0 | 0U, // STORE_F64_A64 |
4302 | 0 | 0U, // STORE_F64_A64_S |
4303 | 0 | 0U, // STORE_I32_A32 |
4304 | 0 | 0U, // STORE_I32_A32_S |
4305 | 0 | 0U, // STORE_I32_A64 |
4306 | 0 | 0U, // STORE_I32_A64_S |
4307 | 0 | 0U, // STORE_I64_A32 |
4308 | 0 | 0U, // STORE_I64_A32_S |
4309 | 0 | 0U, // STORE_I64_A64 |
4310 | 0 | 0U, // STORE_I64_A64_S |
4311 | 0 | 0U, // STORE_LANE_I16x8_A32 |
4312 | 0 | 0U, // STORE_LANE_I16x8_A32_S |
4313 | 0 | 0U, // STORE_LANE_I16x8_A64 |
4314 | 0 | 0U, // STORE_LANE_I16x8_A64_S |
4315 | 0 | 0U, // STORE_LANE_I32x4_A32 |
4316 | 0 | 0U, // STORE_LANE_I32x4_A32_S |
4317 | 0 | 0U, // STORE_LANE_I32x4_A64 |
4318 | 0 | 0U, // STORE_LANE_I32x4_A64_S |
4319 | 0 | 0U, // STORE_LANE_I64x2_A32 |
4320 | 0 | 0U, // STORE_LANE_I64x2_A32_S |
4321 | 0 | 0U, // STORE_LANE_I64x2_A64 |
4322 | 0 | 0U, // STORE_LANE_I64x2_A64_S |
4323 | 0 | 0U, // STORE_LANE_I8x16_A32 |
4324 | 0 | 0U, // STORE_LANE_I8x16_A32_S |
4325 | 0 | 0U, // STORE_LANE_I8x16_A64 |
4326 | 0 | 0U, // STORE_LANE_I8x16_A64_S |
4327 | 0 | 0U, // STORE_V128_A32 |
4328 | 0 | 0U, // STORE_V128_A32_S |
4329 | 0 | 0U, // STORE_V128_A64 |
4330 | 0 | 0U, // STORE_V128_A64_S |
4331 | 0 | 0U, // SUB_F32 |
4332 | 0 | 0U, // SUB_F32_S |
4333 | 0 | 0U, // SUB_F32x4 |
4334 | 0 | 0U, // SUB_F32x4_S |
4335 | 0 | 0U, // SUB_F64 |
4336 | 0 | 0U, // SUB_F64_S |
4337 | 0 | 0U, // SUB_F64x2 |
4338 | 0 | 0U, // SUB_F64x2_S |
4339 | 0 | 0U, // SUB_I16x8 |
4340 | 0 | 0U, // SUB_I16x8_S |
4341 | 0 | 0U, // SUB_I32 |
4342 | 0 | 0U, // SUB_I32_S |
4343 | 0 | 0U, // SUB_I32x4 |
4344 | 0 | 0U, // SUB_I32x4_S |
4345 | 0 | 0U, // SUB_I64 |
4346 | 0 | 0U, // SUB_I64_S |
4347 | 0 | 0U, // SUB_I64x2 |
4348 | 0 | 0U, // SUB_I64x2_S |
4349 | 0 | 0U, // SUB_I8x16 |
4350 | 0 | 0U, // SUB_I8x16_S |
4351 | 0 | 0U, // SUB_SAT_S_I16x8 |
4352 | 0 | 0U, // SUB_SAT_S_I16x8_S |
4353 | 0 | 0U, // SUB_SAT_S_I8x16 |
4354 | 0 | 0U, // SUB_SAT_S_I8x16_S |
4355 | 0 | 0U, // SUB_SAT_U_I16x8 |
4356 | 0 | 0U, // SUB_SAT_U_I16x8_S |
4357 | 0 | 0U, // SUB_SAT_U_I8x16 |
4358 | 0 | 0U, // SUB_SAT_U_I8x16_S |
4359 | 0 | 0U, // SWIZZLE |
4360 | 0 | 0U, // SWIZZLE_S |
4361 | 0 | 0U, // TABLE_COPY |
4362 | 0 | 0U, // TABLE_COPY_S |
4363 | 0 | 0U, // TABLE_FILL_EXTERNREF |
4364 | 0 | 0U, // TABLE_FILL_EXTERNREF_S |
4365 | 0 | 0U, // TABLE_FILL_FUNCREF |
4366 | 0 | 0U, // TABLE_FILL_FUNCREF_S |
4367 | 0 | 0U, // TABLE_GET_EXTERNREF |
4368 | 0 | 0U, // TABLE_GET_EXTERNREF_S |
4369 | 0 | 0U, // TABLE_GET_FUNCREF |
4370 | 0 | 0U, // TABLE_GET_FUNCREF_S |
4371 | 0 | 0U, // TABLE_GROW_EXTERNREF |
4372 | 0 | 0U, // TABLE_GROW_EXTERNREF_S |
4373 | 0 | 0U, // TABLE_GROW_FUNCREF |
4374 | 0 | 0U, // TABLE_GROW_FUNCREF_S |
4375 | 0 | 0U, // TABLE_SET_EXTERNREF |
4376 | 0 | 0U, // TABLE_SET_EXTERNREF_S |
4377 | 0 | 0U, // TABLE_SET_FUNCREF |
4378 | 0 | 0U, // TABLE_SET_FUNCREF_S |
4379 | 0 | 0U, // TABLE_SIZE |
4380 | 0 | 0U, // TABLE_SIZE_S |
4381 | 0 | 0U, // TEE_EXTERNREF |
4382 | 0 | 0U, // TEE_EXTERNREF_S |
4383 | 0 | 0U, // TEE_F32 |
4384 | 0 | 0U, // TEE_F32_S |
4385 | 0 | 0U, // TEE_F64 |
4386 | 0 | 0U, // TEE_F64_S |
4387 | 0 | 0U, // TEE_FUNCREF |
4388 | 0 | 0U, // TEE_FUNCREF_S |
4389 | 0 | 0U, // TEE_I32 |
4390 | 0 | 0U, // TEE_I32_S |
4391 | 0 | 0U, // TEE_I64 |
4392 | 0 | 0U, // TEE_I64_S |
4393 | 0 | 0U, // TEE_V128 |
4394 | 0 | 0U, // TEE_V128_S |
4395 | 0 | 0U, // THROW |
4396 | 0 | 0U, // THROW_S |
4397 | 0 | 0U, // TRUNC_F32 |
4398 | 0 | 0U, // TRUNC_F32_S |
4399 | 0 | 0U, // TRUNC_F32x4 |
4400 | 0 | 0U, // TRUNC_F32x4_S |
4401 | 0 | 0U, // TRUNC_F64 |
4402 | 0 | 0U, // TRUNC_F64_S |
4403 | 0 | 0U, // TRUNC_F64x2 |
4404 | 0 | 0U, // TRUNC_F64x2_S |
4405 | 0 | 0U, // TRY |
4406 | 0 | 0U, // TRY_S |
4407 | 0 | 0U, // UNREACHABLE |
4408 | 0 | 0U, // UNREACHABLE_S |
4409 | 0 | 0U, // XOR |
4410 | 0 | 0U, // XOR_I32 |
4411 | 0 | 0U, // XOR_I32_S |
4412 | 0 | 0U, // XOR_I64 |
4413 | 0 | 0U, // XOR_I64_S |
4414 | 0 | 0U, // XOR_S |
4415 | 0 | 0U, // anonymous_7277MEMORY_GROW_A32 |
4416 | 0 | 0U, // anonymous_7277MEMORY_GROW_A32_S |
4417 | 0 | 0U, // anonymous_7277MEMORY_SIZE_A32 |
4418 | 0 | 0U, // anonymous_7277MEMORY_SIZE_A32_S |
4419 | 0 | 0U, // anonymous_7278MEMORY_GROW_A64 |
4420 | 0 | 0U, // anonymous_7278MEMORY_GROW_A64_S |
4421 | 0 | 0U, // anonymous_7278MEMORY_SIZE_A64 |
4422 | 0 | 0U, // anonymous_7278MEMORY_SIZE_A64_S |
4423 | 0 | 0U, // anonymous_7959DATA_DROP |
4424 | 0 | 0U, // anonymous_7959DATA_DROP_S |
4425 | 0 | 0U, // anonymous_7959MEMORY_COPY_A32 |
4426 | 0 | 0U, // anonymous_7959MEMORY_COPY_A32_S |
4427 | 0 | 0U, // anonymous_7959MEMORY_FILL_A32 |
4428 | 0 | 0U, // anonymous_7959MEMORY_FILL_A32_S |
4429 | 0 | 0U, // anonymous_7959MEMORY_INIT_A32 |
4430 | 0 | 0U, // anonymous_7959MEMORY_INIT_A32_S |
4431 | 0 | 0U, // anonymous_7960DATA_DROP |
4432 | 0 | 0U, // anonymous_7960DATA_DROP_S |
4433 | 0 | 0U, // anonymous_7960MEMORY_COPY_A64 |
4434 | 0 | 0U, // anonymous_7960MEMORY_COPY_A64_S |
4435 | 0 | 0U, // anonymous_7960MEMORY_FILL_A64 |
4436 | 0 | 0U, // anonymous_7960MEMORY_FILL_A64_S |
4437 | 0 | 0U, // anonymous_7960MEMORY_INIT_A64 |
4438 | 0 | 0U, // anonymous_7960MEMORY_INIT_A64_S |
4439 | 0 | 0U, // convert_low_s_F64x2 |
4440 | 0 | 0U, // convert_low_s_F64x2_S |
4441 | 0 | 0U, // convert_low_u_F64x2 |
4442 | 0 | 0U, // convert_low_u_F64x2_S |
4443 | 0 | 0U, // demote_zero_F32x4 |
4444 | 0 | 0U, // demote_zero_F32x4_S |
4445 | 0 | 0U, // extend_high_s_I16x8 |
4446 | 0 | 0U, // extend_high_s_I16x8_S |
4447 | 0 | 0U, // extend_high_s_I32x4 |
4448 | 0 | 0U, // extend_high_s_I32x4_S |
4449 | 0 | 0U, // extend_high_s_I64x2 |
4450 | 0 | 0U, // extend_high_s_I64x2_S |
4451 | 0 | 0U, // extend_high_u_I16x8 |
4452 | 0 | 0U, // extend_high_u_I16x8_S |
4453 | 0 | 0U, // extend_high_u_I32x4 |
4454 | 0 | 0U, // extend_high_u_I32x4_S |
4455 | 0 | 0U, // extend_high_u_I64x2 |
4456 | 0 | 0U, // extend_high_u_I64x2_S |
4457 | 0 | 0U, // extend_low_s_I16x8 |
4458 | 0 | 0U, // extend_low_s_I16x8_S |
4459 | 0 | 0U, // extend_low_s_I32x4 |
4460 | 0 | 0U, // extend_low_s_I32x4_S |
4461 | 0 | 0U, // extend_low_s_I64x2 |
4462 | 0 | 0U, // extend_low_s_I64x2_S |
4463 | 0 | 0U, // extend_low_u_I16x8 |
4464 | 0 | 0U, // extend_low_u_I16x8_S |
4465 | 0 | 0U, // extend_low_u_I32x4 |
4466 | 0 | 0U, // extend_low_u_I32x4_S |
4467 | 0 | 0U, // extend_low_u_I64x2 |
4468 | 0 | 0U, // extend_low_u_I64x2_S |
4469 | 0 | 0U, // fp_to_sint_I32x4 |
4470 | 0 | 0U, // fp_to_sint_I32x4_S |
4471 | 0 | 0U, // fp_to_uint_I32x4 |
4472 | 0 | 0U, // fp_to_uint_I32x4_S |
4473 | 0 | 0U, // int_wasm_extadd_pairwise_signed_I16x8 |
4474 | 0 | 0U, // int_wasm_extadd_pairwise_signed_I16x8_S |
4475 | 0 | 0U, // int_wasm_extadd_pairwise_signed_I32x4 |
4476 | 0 | 0U, // int_wasm_extadd_pairwise_signed_I32x4_S |
4477 | 0 | 0U, // int_wasm_extadd_pairwise_unsigned_I16x8 |
4478 | 0 | 0U, // int_wasm_extadd_pairwise_unsigned_I16x8_S |
4479 | 0 | 0U, // int_wasm_extadd_pairwise_unsigned_I32x4 |
4480 | 0 | 0U, // int_wasm_extadd_pairwise_unsigned_I32x4_S |
4481 | 0 | 0U, // int_wasm_relaxed_trunc_signed_I32x4 |
4482 | 0 | 0U, // int_wasm_relaxed_trunc_signed_I32x4_S |
4483 | 0 | 0U, // int_wasm_relaxed_trunc_signed_zero_I32x4 |
4484 | 0 | 0U, // int_wasm_relaxed_trunc_signed_zero_I32x4_S |
4485 | 0 | 0U, // int_wasm_relaxed_trunc_unsigned_I32x4 |
4486 | 0 | 0U, // int_wasm_relaxed_trunc_unsigned_I32x4_S |
4487 | 0 | 0U, // int_wasm_relaxed_trunc_unsigned_zero_I32x4 |
4488 | 0 | 0U, // int_wasm_relaxed_trunc_unsigned_zero_I32x4_S |
4489 | 0 | 0U, // promote_low_F64x2 |
4490 | 0 | 0U, // promote_low_F64x2_S |
4491 | 0 | 0U, // sint_to_fp_F32x4 |
4492 | 0 | 0U, // sint_to_fp_F32x4_S |
4493 | 0 | 0U, // trunc_sat_zero_s_I32x4 |
4494 | 0 | 0U, // trunc_sat_zero_s_I32x4_S |
4495 | 0 | 0U, // trunc_sat_zero_u_I32x4 |
4496 | 0 | 0U, // trunc_sat_zero_u_I32x4_S |
4497 | 0 | 0U, // uint_to_fp_F32x4 |
4498 | 0 | 0U, // uint_to_fp_F32x4_S |
4499 | 0 | }; |
4500 | | |
4501 | | // Emit the opcode for the instruction. |
4502 | 0 | uint64_t Bits = 0; |
4503 | 0 | Bits |= (uint64_t)OpInfo0[MI->getOpcode()] << 0; |
4504 | 0 | Bits |= (uint64_t)OpInfo1[MI->getOpcode()] << 32; |
4505 | 0 | if (Bits == 0) |
4506 | 0 | return {nullptr, Bits}; |
4507 | 0 | return {AsmStrs+(Bits & 16383)-1, Bits}; |
4508 | |
|
4509 | 0 | } |
4510 | | /// printInstruction - This method is automatically generated by tablegen |
4511 | | /// from the instruction set description. |
4512 | | LLVM_NO_PROFILE_INSTRUMENT_FUNCTION |
4513 | | void WebAssemblyInstPrinter::printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O) { |
4514 | | O << "\t"; |
4515 | | |
4516 | | auto MnemonicInfo = getMnemonic(MI); |
4517 | | |
4518 | | O << MnemonicInfo.first; |
4519 | | |
4520 | | uint64_t Bits = MnemonicInfo.second; |
4521 | | assert(Bits != 0 && "Cannot print this instruction."); |
4522 | | |
4523 | | // Fragment 0 encoded into 3 bits for 5 unique commands. |
4524 | | switch ((Bits >> 14) & 7) { |
4525 | | default: llvm_unreachable("Invalid command number."); |
4526 | | case 0: |
4527 | | // DBG_VALUE, DBG_VALUE_LIST, DBG_INSTR_REF, DBG_PHI, DBG_LABEL, BUNDLE, ... |
4528 | | return; |
4529 | | break; |
4530 | | case 1: |
4531 | | // CALL_PARAMS, CALL_PARAMS_S, ABS_F32, ABS_F32x4, ABS_F64, ABS_F64x2, AB... |
4532 | | printOperand(MI, 0, O); |
4533 | | break; |
4534 | | case 2: |
4535 | | // ATOMIC_LOAD16_U_I32_A32_S, ATOMIC_LOAD16_U_I32_A64_S, ATOMIC_LOAD16_U_... |
4536 | | printOperand(MI, 1, O); |
4537 | | break; |
4538 | | case 3: |
4539 | | // BLOCK, BLOCK_S, IF, IF_S, LOOP, LOOP_S, TRY, TRY_S |
4540 | | printWebAssemblySignatureOperand(MI, 0, O); |
4541 | | break; |
4542 | | case 4: |
4543 | | // BR_TABLE_I32_S, BR_TABLE_I64_S |
4544 | | printBrList(MI, 0, O); |
4545 | | return; |
4546 | | break; |
4547 | | } |
4548 | | |
4549 | | |
4550 | | // Fragment 1 encoded into 2 bits for 4 unique commands. |
4551 | | switch ((Bits >> 17) & 3) { |
4552 | | default: llvm_unreachable("Invalid command number."); |
4553 | | case 0: |
4554 | | // CALL_PARAMS, CALL_PARAMS_S, BLOCK, BLOCK_S, BR, BR_IF_S, BR_S, BR_TABL... |
4555 | | return; |
4556 | | break; |
4557 | | case 1: |
4558 | | // ABS_F32, ABS_F32x4, ABS_F64, ABS_F64x2, ABS_I16x8, ABS_I32x4, ABS_I64x... |
4559 | | O << ", "; |
4560 | | break; |
4561 | | case 2: |
4562 | | // ATOMIC_LOAD16_U_I32_A32_S, ATOMIC_LOAD16_U_I32_A64_S, ATOMIC_LOAD16_U_... |
4563 | | printWebAssemblyP2AlignOperand(MI, 0, O); |
4564 | | break; |
4565 | | case 3: |
4566 | | // ATOMIC_STORE16_I32_A32, ATOMIC_STORE16_I32_A64, ATOMIC_STORE16_I64_A32... |
4567 | | O << '('; |
4568 | | break; |
4569 | | } |
4570 | | |
4571 | | |
4572 | | // Fragment 2 encoded into 3 bits for 5 unique commands. |
4573 | | switch ((Bits >> 19) & 7) { |
4574 | | default: llvm_unreachable("Invalid command number."); |
4575 | | case 0: |
4576 | | // ABS_F32, ABS_F32x4, ABS_F64, ABS_F64x2, ABS_I16x8, ABS_I32x4, ABS_I64x... |
4577 | | printOperand(MI, 1, O); |
4578 | | break; |
4579 | | case 1: |
4580 | | // ATOMIC_LOAD16_U_I32_A32, ATOMIC_LOAD16_U_I32_A64, ATOMIC_LOAD16_U_I64_... |
4581 | | printOperand(MI, 2, O); |
4582 | | break; |
4583 | | case 2: |
4584 | | // ATOMIC_LOAD16_U_I32_A32_S, ATOMIC_LOAD16_U_I32_A64_S, ATOMIC_LOAD16_U_... |
4585 | | return; |
4586 | | break; |
4587 | | case 3: |
4588 | | // LOAD_LANE_I16x8_A32_S, LOAD_LANE_I16x8_A64_S, LOAD_LANE_I32x4_A32_S, L... |
4589 | | O << ", "; |
4590 | | printOperand(MI, 2, O); |
4591 | | return; |
4592 | | break; |
4593 | | case 4: |
4594 | | // STORE_LANE_I16x8_A32, STORE_LANE_I16x8_A64, STORE_LANE_I32x4_A32, STOR... |
4595 | | printOperand(MI, 3, O); |
4596 | | O << ')'; |
4597 | | printWebAssemblyP2AlignOperand(MI, 0, O); |
4598 | | O << ", "; |
4599 | | printOperand(MI, 4, O); |
4600 | | O << ", "; |
4601 | | printOperand(MI, 2, O); |
4602 | | return; |
4603 | | break; |
4604 | | } |
4605 | | |
4606 | | |
4607 | | // Fragment 3 encoded into 2 bits for 4 unique commands. |
4608 | | switch ((Bits >> 22) & 3) { |
4609 | | default: llvm_unreachable("Invalid command number."); |
4610 | | case 0: |
4611 | | // ABS_F32, ABS_F32x4, ABS_F64, ABS_F64x2, ABS_I16x8, ABS_I32x4, ABS_I64x... |
4612 | | return; |
4613 | | break; |
4614 | | case 1: |
4615 | | // ADD_F32, ADD_F32x4, ADD_F64, ADD_F64x2, ADD_I16x8, ADD_I32, ADD_I32x4,... |
4616 | | O << ", "; |
4617 | | printOperand(MI, 2, O); |
4618 | | break; |
4619 | | case 2: |
4620 | | // ATOMIC_LOAD16_U_I32_A32, ATOMIC_LOAD16_U_I32_A64, ATOMIC_LOAD16_U_I64_... |
4621 | | O << '('; |
4622 | | break; |
4623 | | case 3: |
4624 | | // ATOMIC_STORE16_I32_A32, ATOMIC_STORE16_I32_A64, ATOMIC_STORE16_I64_A32... |
4625 | | O << ')'; |
4626 | | printWebAssemblyP2AlignOperand(MI, 0, O); |
4627 | | O << ", "; |
4628 | | printOperand(MI, 3, O); |
4629 | | return; |
4630 | | break; |
4631 | | } |
4632 | | |
4633 | | |
4634 | | // Fragment 4 encoded into 2 bits for 4 unique commands. |
4635 | | switch ((Bits >> 24) & 3) { |
4636 | | default: llvm_unreachable("Invalid command number."); |
4637 | | case 0: |
4638 | | // ADD_F32, ADD_F32x4, ADD_F64, ADD_F64x2, ADD_I16x8, ADD_I32, ADD_I32x4,... |
4639 | | return; |
4640 | | break; |
4641 | | case 1: |
4642 | | // ATOMIC_LOAD16_U_I32_A32, ATOMIC_LOAD16_U_I32_A64, ATOMIC_LOAD16_U_I64_... |
4643 | | printOperand(MI, 3, O); |
4644 | | O << ')'; |
4645 | | printWebAssemblyP2AlignOperand(MI, 1, O); |
4646 | | break; |
4647 | | case 2: |
4648 | | // BITSELECT, CONST_V128_F32x4, CONST_V128_F32x4_S, CONST_V128_I16x8, CON... |
4649 | | O << ", "; |
4650 | | printOperand(MI, 3, O); |
4651 | | break; |
4652 | | case 3: |
4653 | | // LOAD_LANE_I16x8_A32, LOAD_LANE_I16x8_A64, LOAD_LANE_I32x4_A32, LOAD_LA... |
4654 | | printOperand(MI, 4, O); |
4655 | | O << ')'; |
4656 | | printWebAssemblyP2AlignOperand(MI, 1, O); |
4657 | | O << ", "; |
4658 | | printOperand(MI, 5, O); |
4659 | | O << ", "; |
4660 | | printOperand(MI, 3, O); |
4661 | | return; |
4662 | | break; |
4663 | | } |
4664 | | |
4665 | | |
4666 | | // Fragment 5 encoded into 1 bits for 2 unique commands. |
4667 | | if ((Bits >> 26) & 1) { |
4668 | | // ATOMIC_RMW16_U_ADD_I32_A32, ATOMIC_RMW16_U_ADD_I32_A64, ATOMIC_RMW16_U... |
4669 | | O << ", "; |
4670 | | printOperand(MI, 4, O); |
4671 | | } else { |
4672 | | // ATOMIC_LOAD16_U_I32_A32, ATOMIC_LOAD16_U_I32_A64, ATOMIC_LOAD16_U_I64_... |
4673 | | return; |
4674 | | } |
4675 | | |
4676 | | |
4677 | | // Fragment 6 encoded into 1 bits for 2 unique commands. |
4678 | | if ((Bits >> 27) & 1) { |
4679 | | // ATOMIC_RMW16_U_CMPXCHG_I32_A32, ATOMIC_RMW16_U_CMPXCHG_I32_A64, ATOMIC... |
4680 | | O << ", "; |
4681 | | printOperand(MI, 5, O); |
4682 | | } else { |
4683 | | // ATOMIC_RMW16_U_ADD_I32_A32, ATOMIC_RMW16_U_ADD_I32_A64, ATOMIC_RMW16_U... |
4684 | | return; |
4685 | | } |
4686 | | |
4687 | | |
4688 | | // Fragment 7 encoded into 1 bits for 2 unique commands. |
4689 | | if ((Bits >> 28) & 1) { |
4690 | | // CONST_V128_I16x8, CONST_V128_I16x8_S, CONST_V128_I8x16, CONST_V128_I8x... |
4691 | | O << ", "; |
4692 | | printOperand(MI, 6, O); |
4693 | | O << ", "; |
4694 | | printOperand(MI, 7, O); |
4695 | | } else { |
4696 | | // ATOMIC_RMW16_U_CMPXCHG_I32_A32, ATOMIC_RMW16_U_CMPXCHG_I32_A64, ATOMIC... |
4697 | | return; |
4698 | | } |
4699 | | |
4700 | | |
4701 | | // Fragment 8 encoded into 1 bits for 2 unique commands. |
4702 | | if ((Bits >> 29) & 1) { |
4703 | | // CONST_V128_I16x8_S |
4704 | | return; |
4705 | | } else { |
4706 | | // CONST_V128_I16x8, CONST_V128_I8x16, CONST_V128_I8x16_S, SHUFFLE, SHUFF... |
4707 | | O << ", "; |
4708 | | printOperand(MI, 8, O); |
4709 | | } |
4710 | | |
4711 | | |
4712 | | // Fragment 9 encoded into 1 bits for 2 unique commands. |
4713 | | if ((Bits >> 30) & 1) { |
4714 | | // CONST_V128_I8x16, CONST_V128_I8x16_S, SHUFFLE, SHUFFLE_S |
4715 | | O << ", "; |
4716 | | printOperand(MI, 9, O); |
4717 | | O << ", "; |
4718 | | printOperand(MI, 10, O); |
4719 | | O << ", "; |
4720 | | printOperand(MI, 11, O); |
4721 | | O << ", "; |
4722 | | printOperand(MI, 12, O); |
4723 | | O << ", "; |
4724 | | printOperand(MI, 13, O); |
4725 | | O << ", "; |
4726 | | printOperand(MI, 14, O); |
4727 | | O << ", "; |
4728 | | printOperand(MI, 15, O); |
4729 | | } else { |
4730 | | // CONST_V128_I16x8 |
4731 | | return; |
4732 | | } |
4733 | | |
4734 | | |
4735 | | // Fragment 10 encoded into 1 bits for 2 unique commands. |
4736 | | if ((Bits >> 31) & 1) { |
4737 | | // CONST_V128_I8x16_S, SHUFFLE_S |
4738 | | return; |
4739 | | } else { |
4740 | | // CONST_V128_I8x16, SHUFFLE |
4741 | | O << ", "; |
4742 | | printOperand(MI, 16, O); |
4743 | | } |
4744 | | |
4745 | | |
4746 | | // Fragment 11 encoded into 1 bits for 2 unique commands. |
4747 | | if ((Bits >> 32) & 1) { |
4748 | | // SHUFFLE |
4749 | | O << ", "; |
4750 | | printOperand(MI, 17, O); |
4751 | | O << ", "; |
4752 | | printOperand(MI, 18, O); |
4753 | | return; |
4754 | | } else { |
4755 | | // CONST_V128_I8x16 |
4756 | | return; |
4757 | | } |
4758 | | |
4759 | | } |
4760 | | |
4761 | | |
4762 | | /// getRegisterName - This method is automatically generated by tblgen |
4763 | | /// from the register set description. This returns the assembler name |
4764 | | /// for the specified register. |
4765 | 0 | const char *WebAssemblyInstPrinter::getRegisterName(MCRegister Reg) { |
4766 | 0 | unsigned RegNo = Reg.id(); |
4767 | 0 | assert(RegNo && RegNo < 14 && "Invalid register number!"); |
4768 | | |
4769 | | |
4770 | 0 | #ifdef __GNUC__ |
4771 | 0 | #pragma GCC diagnostic push |
4772 | 0 | #pragma GCC diagnostic ignored "-Woverlength-strings" |
4773 | 0 | #endif |
4774 | 0 | static const char AsmStrs[] = { |
4775 | 0 | /* 0 */ "%f32.0\0" |
4776 | 0 | /* 7 */ "%i32.0\0" |
4777 | 0 | /* 14 */ "%f64.0\0" |
4778 | 0 | /* 21 */ "%i64.0\0" |
4779 | 0 | /* 28 */ "%funcref.0\0" |
4780 | 0 | /* 39 */ "%externref.0\0" |
4781 | 0 | /* 52 */ "%FP32\0" |
4782 | 0 | /* 58 */ "%SP32\0" |
4783 | 0 | /* 64 */ "%FP64\0" |
4784 | 0 | /* 70 */ "%SP64\0" |
4785 | 0 | /* 76 */ "%v128\0" |
4786 | 0 | /* 82 */ "STACK\0" |
4787 | 0 | /* 88 */ "ARGUMENTS\0" |
4788 | 0 | }; |
4789 | 0 | #ifdef __GNUC__ |
4790 | 0 | #pragma GCC diagnostic pop |
4791 | 0 | #endif |
4792 | |
|
4793 | 0 | static const uint8_t RegAsmOffset[] = { |
4794 | 0 | 88, 82, 39, 52, 64, 28, 58, 70, 0, 14, 7, 21, 76, |
4795 | 0 | }; |
4796 | |
|
4797 | 0 | assert (*(AsmStrs+RegAsmOffset[RegNo-1]) && |
4798 | 0 | "Invalid alt name index for register!"); |
4799 | 0 | return AsmStrs+RegAsmOffset[RegNo-1]; |
4800 | 0 | } |
4801 | | |
4802 | | #ifdef PRINT_ALIAS_INSTR |
4803 | | #undef PRINT_ALIAS_INSTR |
4804 | | |
4805 | | bool WebAssemblyInstPrinter::printAliasInstr(const MCInst *MI, uint64_t Address, raw_ostream &OS) { |
4806 | | return false; |
4807 | | } |
4808 | | |
4809 | | #endif // PRINT_ALIAS_INSTR |