Coverage Report

Created: 2024-01-17 10:31

/src/llvm-project/clang/lib/Basic/Targets/Lanai.h
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//===--- Lanai.h - Declare Lanai target feature support ---------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares Lanai TargetInfo objects.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CLANG_LIB_BASIC_TARGETS_LANAI_H
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#define LLVM_CLANG_LIB_BASIC_TARGETS_LANAI_H
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#include "clang/Basic/TargetInfo.h"
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#include "clang/Basic/TargetOptions.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/TargetParser/Triple.h"
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namespace clang {
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namespace targets {
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class LLVM_LIBRARY_VISIBILITY LanaiTargetInfo : public TargetInfo {
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  // Class for Lanai (32-bit).
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  // The CPU profiles supported by the Lanai backend
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  enum CPUKind {
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    CK_NONE,
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    CK_V11,
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  } CPU;
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  static const TargetInfo::GCCRegAlias GCCRegAliases[];
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  static const char *const GCCRegNames[];
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public:
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  LanaiTargetInfo(const llvm::Triple &Triple, const TargetOptions &)
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      : TargetInfo(Triple) {
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    // Description string has to be kept in sync with backend.
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    resetDataLayout("E"        // Big endian
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                    "-m:e"     // ELF name manging
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                    "-p:32:32" // 32 bit pointers, 32 bit aligned
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                    "-i64:64"  // 64 bit integers, 64 bit aligned
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                    "-a:0:32"  // 32 bit alignment of objects of aggregate type
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                    "-n32"     // 32 bit native integer width
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                    "-S64"     // 64 bit natural stack alignment
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    );
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    // Setting RegParmMax equal to what mregparm was set to in the old
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    // toolchain
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    RegParmMax = 4;
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    // Set the default CPU to V11
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    CPU = CK_V11;
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    // Temporary approach to make everything at least word-aligned and allow for
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    // safely casting between pointers with different alignment requirements.
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    // TODO: Remove this when there are no more cast align warnings on the
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    // firmware.
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    MinGlobalAlign = 32;
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  }
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  void getTargetDefines(const LangOptions &Opts,
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                        MacroBuilder &Builder) const override;
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  bool isValidCPUName(StringRef Name) const override;
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  void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
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  bool setCPU(const std::string &Name) override;
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  bool hasFeature(StringRef Feature) const override;
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  ArrayRef<const char *> getGCCRegNames() const override;
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  ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override;
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  BuiltinVaListKind getBuiltinVaListKind() const override {
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    return TargetInfo::VoidPtrBuiltinVaList;
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  }
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  ArrayRef<Builtin::Info> getTargetBuiltins() const override {
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    return std::nullopt;
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  }
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  bool validateAsmConstraint(const char *&Name,
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                             TargetInfo::ConstraintInfo &info) const override {
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    return false;
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  }
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  std::string_view getClobbers() const override { return ""; }
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  bool hasBitIntType() const override { return true; }
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};
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} // namespace targets
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} // namespace clang
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#endif // LLVM_CLANG_LIB_BASIC_TARGETS_LANAI_H