Coverage Report

Created: 2026-01-15 07:13

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/opencv/3rdparty/openexr/IlmImf/ImfSystemSpecific.cpp
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///////////////////////////////////////////////////////////////////////////
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//
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// Copyright (c) 2009-2014 DreamWorks Animation LLC. 
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//
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are
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// met:
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// *       Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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// *       Redistributions in binary form must reproduce the above
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// copyright notice, this list of conditions and the following disclaimer
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// in the documentation and/or other materials provided with the
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// distribution.
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// *       Neither the name of DreamWorks Animation nor the names of
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// its contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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///////////////////////////////////////////////////////////////////////////
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#include "ImfSimd.h"
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#include "ImfSystemSpecific.h"
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#include "ImfNamespace.h"
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#include "OpenEXRConfig.h"
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OPENEXR_IMF_INTERNAL_NAMESPACE_SOURCE_ENTER
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namespace {
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#if defined(IMF_HAVE_SSE2) && defined(__GNUC__) && !defined(__ANDROID__)
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    // Helper functions for gcc + SSE enabled
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    void cpuid(int n, int &eax, int &ebx, int &ecx, int &edx)
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0
    {
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0
        __asm__ __volatile__ (
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0
            "cpuid"
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0
            : /* Output  */ "=a"(eax), "=b"(ebx), "=c"(ecx), "=d"(edx) 
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0
            : /* Input   */ "a"(n)
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0
            : /* Clobber */);
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0
    }
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#else // IMF_HAVE_SSE2 && __GNUC__
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    // Helper functions for generic compiler - all disabled
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    void cpuid(int n, int &eax, int &ebx, int &ecx, int &edx)
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    {
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        eax = ebx = ecx = edx = 0;
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    }
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#endif // IMF_HAVE_SSE2 && __GNUC__
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#ifdef OPENEXR_IMF_HAVE_GCC_INLINE_ASM_AVX
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    void xgetbv(int n, int &eax, int &edx)
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    {
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        __asm__ __volatile__ (
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            "xgetbv"
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            : /* Output  */ "=a"(eax), "=d"(edx) 
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            : /* Input   */ "c"(n)
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            : /* Clobber */);
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    }
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#else //  OPENEXR_IMF_HAVE_GCC_INLINE_ASM_AVX
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    void xgetbv(int n, int &eax, int &edx)
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0
    {
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        eax = edx = 0;
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    }
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#endif //  OPENEXR_IMF_HAVE_GCC_INLINE_ASM_AVX
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} // namespace 
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CpuId::CpuId():
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0
    sse2(false), 
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0
    sse3(false), 
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0
    ssse3(false),
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    sse4_1(false), 
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    sse4_2(false), 
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    avx(false), 
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    f16c(false)
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{
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    bool osxsave = false;
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    int  max     = 0;
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    int  eax, ebx, ecx, edx;
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    cpuid(0, max, ebx, ecx, edx);
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    if (max > 0)
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    {
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        cpuid(1, eax, ebx, ecx, edx);
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        sse2    = ( edx & (1<<26) );
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        sse3    = ( ecx & (1<< 0) );
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        ssse3   = ( ecx & (1<< 9) );
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        sse4_1  = ( ecx & (1<<19) );
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        sse4_2  = ( ecx & (1<<20) );
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        osxsave = ( ecx & (1<<27) );
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        avx     = ( ecx & (1<<28) );
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        f16c    = ( ecx & (1<<29) );
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        if (!osxsave)
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        {
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            avx = f16c = false;
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        }
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        else
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        {
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            xgetbv(0, eax, edx);
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            // eax bit 1 - SSE managed, bit 2 - AVX managed
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            if ((eax & 6) != 6)
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            {
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                avx = f16c = false;
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            }
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        }
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    }
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#if defined(IMF_HAVE_SSE2) && defined(__ANDROID__)
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    sse2 = true;
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    sse3 = true;
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#ifdef __x86_64__
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    ssse3 = true;
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    sse4_1 = true;
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#endif
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#endif
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0
}
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OPENEXR_IMF_INTERNAL_NAMESPACE_SOURCE_EXIT