Coverage Report

Created: 2025-05-07 06:59

/rust/registry/src/index.crates.io-6f17d22bba15001f/sha1-0.10.6/src/compress/x86.rs
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//! SHA-1 `x86`/`x86_64` backend
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#![cfg(any(target_arch = "x86", target_arch = "x86_64"))]
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#[cfg(target_arch = "x86")]
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use core::arch::x86::*;
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#[cfg(target_arch = "x86_64")]
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use core::arch::x86_64::*;
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macro_rules! rounds4 {
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    ($h0:ident, $h1:ident, $wk:expr, $i:expr) => {
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        _mm_sha1rnds4_epu32($h0, _mm_sha1nexte_epu32($h1, $wk), $i)
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    };
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}
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macro_rules! schedule {
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    ($v0:expr, $v1:expr, $v2:expr, $v3:expr) => {
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        _mm_sha1msg2_epu32(_mm_xor_si128(_mm_sha1msg1_epu32($v0, $v1), $v2), $v3)
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    };
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}
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macro_rules! schedule_rounds4 {
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    (
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        $h0:ident, $h1:ident,
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        $w0:expr, $w1:expr, $w2:expr, $w3:expr, $w4:expr,
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        $i:expr
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    ) => {
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        $w4 = schedule!($w0, $w1, $w2, $w3);
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        $h1 = rounds4!($h0, $h1, $w4, $i);
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    };
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}
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#[target_feature(enable = "sha,sse2,ssse3,sse4.1")]
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0
unsafe fn digest_blocks(state: &mut [u32; 5], blocks: &[[u8; 64]]) {
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    #[allow(non_snake_case)]
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    let MASK: __m128i = _mm_set_epi64x(0x0001_0203_0405_0607, 0x0809_0A0B_0C0D_0E0F);
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    let mut state_abcd = _mm_set_epi32(
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        state[0] as i32,
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        state[1] as i32,
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        state[2] as i32,
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        state[3] as i32,
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    );
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    let mut state_e = _mm_set_epi32(state[4] as i32, 0, 0, 0);
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    for block in blocks {
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        // SAFETY: we use only unaligned loads with this pointer
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        #[allow(clippy::cast_ptr_alignment)]
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        let block_ptr = block.as_ptr() as *const __m128i;
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        let mut w0 = _mm_shuffle_epi8(_mm_loadu_si128(block_ptr.offset(0)), MASK);
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        let mut w1 = _mm_shuffle_epi8(_mm_loadu_si128(block_ptr.offset(1)), MASK);
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        let mut w2 = _mm_shuffle_epi8(_mm_loadu_si128(block_ptr.offset(2)), MASK);
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        let mut w3 = _mm_shuffle_epi8(_mm_loadu_si128(block_ptr.offset(3)), MASK);
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        #[allow(clippy::needless_late_init)]
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        let mut w4;
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        let mut h0 = state_abcd;
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        let mut h1 = _mm_add_epi32(state_e, w0);
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        // Rounds 0..20
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        h1 = _mm_sha1rnds4_epu32(h0, h1, 0);
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        h0 = rounds4!(h1, h0, w1, 0);
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        h1 = rounds4!(h0, h1, w2, 0);
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        h0 = rounds4!(h1, h0, w3, 0);
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        schedule_rounds4!(h0, h1, w0, w1, w2, w3, w4, 0);
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        // Rounds 20..40
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        schedule_rounds4!(h1, h0, w1, w2, w3, w4, w0, 1);
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        schedule_rounds4!(h0, h1, w2, w3, w4, w0, w1, 1);
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        schedule_rounds4!(h1, h0, w3, w4, w0, w1, w2, 1);
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        schedule_rounds4!(h0, h1, w4, w0, w1, w2, w3, 1);
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        schedule_rounds4!(h1, h0, w0, w1, w2, w3, w4, 1);
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        // Rounds 40..60
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        schedule_rounds4!(h0, h1, w1, w2, w3, w4, w0, 2);
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        schedule_rounds4!(h1, h0, w2, w3, w4, w0, w1, 2);
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        schedule_rounds4!(h0, h1, w3, w4, w0, w1, w2, 2);
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        schedule_rounds4!(h1, h0, w4, w0, w1, w2, w3, 2);
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        schedule_rounds4!(h0, h1, w0, w1, w2, w3, w4, 2);
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        // Rounds 60..80
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        schedule_rounds4!(h1, h0, w1, w2, w3, w4, w0, 3);
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        schedule_rounds4!(h0, h1, w2, w3, w4, w0, w1, 3);
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        schedule_rounds4!(h1, h0, w3, w4, w0, w1, w2, 3);
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        schedule_rounds4!(h0, h1, w4, w0, w1, w2, w3, 3);
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        schedule_rounds4!(h1, h0, w0, w1, w2, w3, w4, 3);
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        state_abcd = _mm_add_epi32(state_abcd, h0);
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        state_e = _mm_sha1nexte_epu32(h1, state_e);
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    }
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    state[0] = _mm_extract_epi32(state_abcd, 3) as u32;
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    state[1] = _mm_extract_epi32(state_abcd, 2) as u32;
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    state[2] = _mm_extract_epi32(state_abcd, 1) as u32;
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    state[3] = _mm_extract_epi32(state_abcd, 0) as u32;
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    state[4] = _mm_extract_epi32(state_e, 3) as u32;
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}
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cpufeatures::new!(shani_cpuid, "sha", "sse2", "ssse3", "sse4.1");
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pub fn compress(state: &mut [u32; 5], blocks: &[[u8; 64]]) {
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    // TODO: Replace with https://github.com/rust-lang/rfcs/pull/2725
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    // after stabilization
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    if shani_cpuid::get() {
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        unsafe {
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            digest_blocks(state, blocks);
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        }
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    } else {
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        super::soft::compress(state, blocks);
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    }
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}