/rust/registry/src/index.crates.io-6f17d22bba15001f/zeroize-1.8.1/src/x86.rs

Source (jump to first uncovered line)
//! [`Zeroize`] impls for x86 SIMD registers

use crate::{atomic_fence, volatile_write, Zeroize};

#[cfg(target_arch = "x86")]
use core::arch::x86::*;

#[cfg(target_arch = "x86_64")]
use core::arch::x86_64::*;

macro_rules! impl_zeroize_for_simd_register {
    ($($type:ty),* $(,)?) => {
        $(
            impl Zeroize for $type {
                #[inline]
                fn zeroize(&mut self) {
                    volatile_write(self, unsafe { core::mem::zeroed() });
                    atomic_fence();
                }
            }
        )*
    };
}

impl_zeroize_for_simd_register!(__m128, __m128d, __m128i, __m256, __m256d, __m256i);

// NOTE: MSRV 1.72
#[cfg(feature = "simd")]
impl_zeroize_for_simd_register!(__m512, __m512d, __m512i);

Coverage Report

Created: 2024-06-18 06:18

Line	Count	Source (jump to first uncovered line)
1		//! [`Zeroize`] impls for x86 SIMD registers
2
3		use crate::{atomic_fence, volatile_write, Zeroize};
4
5		#[cfg(target_arch = "x86")]
6		use core::arch::x86::*;
7
8		#[cfg(target_arch = "x86_64")]
9		use core::arch::x86_64::*;
10
11		macro_rules! impl_zeroize_for_simd_register {
12		($($type:ty),* $(,)?) => {
13		$(
14		impl Zeroize for $type {
15		#[inline]
16	0	fn zeroize(&mut self) {
17	0	volatile_write(self, unsafe { core::mem::zeroed() });
18	0	atomic_fence();
19	0	} Unexecuted instantiation: <core::core_arch::x86::__m128d as zeroize::Zeroize>::zeroize Unexecuted instantiation: <core::core_arch::x86::__m256d as zeroize::Zeroize>::zeroize Unexecuted instantiation: <core::core_arch::x86::__m128 as zeroize::Zeroize>::zeroize Unexecuted instantiation: <core::core_arch::x86::__m256 as zeroize::Zeroize>::zeroize Unexecuted instantiation: <core::core_arch::x86::__m128i as zeroize::Zeroize>::zeroize Unexecuted instantiation: <core::core_arch::x86::__m256i as zeroize::Zeroize>::zeroize
20		}
21		)*
22		};
23		}
24
25		impl_zeroize_for_simd_register!(__m128, __m128d, __m128i, __m256, __m256d, __m256i);
26
27		// NOTE: MSRV 1.72
28		#[cfg(feature = "simd")]
29		impl_zeroize_for_simd_register!(__m512, __m512d, __m512i);