/*

 * IR - Lightweight JIT Compilation Framework

 * (Public API)

 * This file is part of the IR Project distributed under the MIT-style LICENSE.

 * Authors: Dmitry Stogov <dmitry@php.net>

 */

#ifndef IR_H

#define IR_H

#ifdef __cplusplus

extern "C" {

#endif

#include <inttypes.h>

#include <stdint.h>

#include <stdbool.h>

#include <stdio.h>

#include <stdlib.h>

#define IR_VERSION "0.0.1"

#ifdef _WIN32

/* TODO Handle ARM, too. */

# if defined(_M_X64) || defined(_M_ARM64)

#  define __SIZEOF_SIZE_T__ 8

# elif defined(_M_IX86)

#  define __SIZEOF_SIZE_T__ 4

# endif

/* Only supported is little endian for any arch on Windows,

   so just fake the same for all. */

# ifndef __ORDER_LITTLE_ENDIAN__

#  define __ORDER_LITTLE_ENDIAN__ 1

# endif

# define __BYTE_ORDER__ __ORDER_LITTLE_ENDIAN__

# ifndef __has_builtin

#  define __has_builtin(arg) (0)

# endif

#endif

/* target auto detection */

#if !defined(IR_TARGET_X86) && !defined(IR_TARGET_X64) && !defined(IR_TARGET_AARCH64)

# if defined(__x86_64__) || defined(__x86_64) || defined(_M_X64) || defined(_M_AMD64)

#  define IR_TARGET_X64

# elif defined(i386) || defined(__i386) || defined(__i386__) || defined(_M_IX86)

#  define IR_TARGET_X86

# elif defined(__aarch64__) || defined(_M_ARM64)

#  define IR_TARGET_AARCH64

# elif defined (_WIN64)

#  define IR_TARGET_X64

# elif defined (_WIN32)

#  define IR_TARGET_X86

# endif

#endif

#ifndef IR_TARGET_TRIPLET

# if defined(IR_TARGET_X64)

#  if defined(_WIN32)

#   define IR_TARGET_TRIPLET "x86-windows-msvc"

#  elif defined(__APPLE__)

#   define IR_TARGET_TRIPLET "x86-darwin"

#  elif defined(__linux__)

#   define IR_TARGET_TRIPLET "x86-linux-sysv"

#  elif defined(__FreeBSD__)

#   define IR_TARGET_TRIPLET "x86-freebsd-sysv"

#  elif defined(__NetBSD__)

#   define IR_TARGET_TRIPLET "x86-netbsd-sysv"

#  elif defined(__OpenBSD__)

#   define IR_TARGET_TRIPLET "x86-openbsd-sysv"

#  else

#   define IR_TARGET_TRIPLET "x86-unknown-sysv"

#  endif

# elif defined(IR_TARGET_X86)

#  if defined(_WIN32)

#   define IR_TARGET_TRIPLET "x86_64-windows-msvc"

#  elif defined(__APPLE__)

#   define IR_TARGET_TRIPLET "x86_64-darwin"

#  elif defined(__linux__)

#   define IR_TARGET_TRIPLET "x86_64-linux-sysv"

#  elif defined(__FreeBSD__)

#   define IR_TARGET_TRIPLET "x86_64-freebsd-sysv"

#  elif defined(__NetBSD__)

#   define IR_TARGET_TRIPLET "x86_64-netbsd-sysv"

#  elif defined(__OpenBSD__)

#   define IR_TARGET_TRIPLET "x86_64-openbsd-sysv"

#  else

#   define IR_TARGET_TRIPLET "x86_64-unknown-sysv"

#  endif

# elif defined(IR_TARGET_AARCH64)

#  if defined(_WIN32)

#   define IR_TARGET_TRIPLET "aarch64-windows"

#  elif defined(__APPLE__)

#   define IR_TARGET_TRIPLET "aarch64-darwin"

#  elif defined(__linux__)

#   define IR_TARGET_TRIPLET "aarch64-linux-sysv"

#  elif defined(__FreeBSD__)

#   define IR_TARGET_TRIPLET "aarch64-freebsd-sysv"

#  elif defined(__NetBSD__)

#   define IR_TARGET_TRIPLET "aarch64-netbsd-sysv"

#  elif defined(__OpenBSD__)

#   define IR_TARGET_TRIPLET "aarch64-openbsd-sysv"

#  else

#   define IR_TARGET_TRIPLET "aarch64-unknown-sysv"

#  endif

# else

#  error "Unknown IR_TARGET"

# endif

#endif

#if defined(__SIZEOF_SIZE_T__)

# if __SIZEOF_SIZE_T__ == 8

#  define IR_64 1

# elif __SIZEOF_SIZE_T__ != 4

#  error "Unknown addr size"

# endif

#else

# error "Unknown addr size"

#endif

#if defined(__BYTE_ORDER__)

# if defined(__ORDER_LITTLE_ENDIAN__)

#  if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__

#   define IR_STRUCT_LOHI(lo, hi) struct {lo; hi;}

#  endif

# endif

# if defined(__ORDER_BIG_ENDIAN__)

#  if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__

#   define IR_STRUCT_LOHI(lo, hi) struct {hi; lo;}

#  endif

# endif

#endif

#ifndef IR_STRUCT_LOHI

# error "Unknown byte order"

#endif

#ifdef __has_attribute

# if __has_attribute(always_inline)

#  define IR_ALWAYS_INLINE static inline __attribute__((always_inline))

# endif

# if __has_attribute(noinline)

#  define IR_NEVER_INLINE __attribute__((noinline))

# endif

#else

# define __has_attribute(x) 0

#endif

#ifndef IR_ALWAYS_INLINE

# define IR_ALWAYS_INLINE static inline

#endif

#ifndef IR_NEVER_INLINE

# define IR_NEVER_INLINE

#endif

#ifdef IR_PHP

# include "ir_php.h"

#endif

#ifdef IR_TARGET_X86

# ifndef IR_X86_I64

#  define IR_X86_I64 1

# endif

#else

# define IR_X86_I64 0

#endif

#ifndef IR_SIMD

# define IR_SIMD 1

#endif

/* IR Type flags */

#define IR_TYPE_SIGNED     (1<<0)

#define IR_TYPE_UNSIGNED   (1<<1)

#define IR_TYPE_FP         (1<<2)

#define IR_TYPE_SPECIAL    (1<<3)

#define IR_TYPE_BOOL       (IR_TYPE_SPECIAL|IR_TYPE_UNSIGNED)

#define IR_TYPE_ADDR       (IR_TYPE_SPECIAL|IR_TYPE_UNSIGNED)

#define IR_TYPE_CHAR       (IR_TYPE_SPECIAL|IR_TYPE_SIGNED)

/* List of IR types */

#define IR_TYPES(_) \

  _(BOOL,   bool,      b,    IR_TYPE_BOOL)     \

  _(U8,     uint8_t,   u8,   IR_TYPE_UNSIGNED) \

  _(U16,    uint16_t,  u16,  IR_TYPE_UNSIGNED) \

  _(U32,    uint32_t,  u32,  IR_TYPE_UNSIGNED) \

  _(U64,    uint64_t,  u64,  IR_TYPE_UNSIGNED) \

  _(ADDR,   uintptr_t, addr, IR_TYPE_ADDR)     \

  _(CHAR,   char,      c,    IR_TYPE_CHAR)     \

  _(I8,     int8_t,    i8,   IR_TYPE_SIGNED)   \

  _(I16,    int16_t,   i16,  IR_TYPE_SIGNED)   \

  _(I32,    int32_t,   i32,  IR_TYPE_SIGNED)   \

  _(I64,    int64_t,   i64,  IR_TYPE_SIGNED)   \

  _(DOUBLE, double,    d,    IR_TYPE_FP)       \

  _(FLOAT,  float,     f,    IR_TYPE_FP)       \

#define IR_IS_TYPE_UNSIGNED(t) ((t) < IR_CHAR)

#define IR_IS_TYPE_SIGNED(t)   ((t) >= IR_CHAR && (t) < IR_DOUBLE)

#define IR_IS_TYPE_INT(t)      ((t) < IR_DOUBLE)

#define IR_IS_TYPE_FP(t)       ((t) >= IR_DOUBLE && (t) <= IR_FLOAT)

#define IR_TYPE_ENUM(name, type, field, flags) IR_ ## name,

typedef enum _ir_type {

  IR_VOID,

  IR_TYPES(IR_TYPE_ENUM)

  IR_LAST_TYPE,

  IR_BASE_TYPE_MASK = 0x0f,

  IR_VECTOR_MASK    = 0x70,

  IR_VECTOR_1       = 0x10,

  IR_VECTOR_2       = 0x20,

  IR_VECTOR_4       = 0x30,

  IR_VECTOR_8       = 0x40,

  IR_VECTOR_16      = 0x50,

  IR_VECTOR_32      = 0x60,

  IR_VECTOR_64      = 0x70,

} ir_type;

#define IR_IS_TYPE_SCALAR(t)   (((t) & IR_VECTOR_MASK) == 0)

#define IR_IS_TYPE_VECTOR(t)   (((t) & IR_VECTOR_MASK) != 0)

#define IR_VECTOR_BASE_TYPE(t) ((t) & IR_BASE_TYPE_MASK)

#define IR_VECTOR_LENGTH(t)    (1U << ((((t) & IR_VECTOR_MASK) >> 4) - 1))

#ifdef IR_64

# define IR_SIZE_T          IR_U64

# define IR_SSIZE_T         IR_I64

# define IR_UINTPTR_T       IR_U64

# define IR_INTPTR_T        IR_I64

# define IR_C_UINTPTR       IR_U64

# define IR_C_INTPTR        IR_I64

# define ir_const_size_t    ir_const_u64

# define ir_const_ssize_t   ir_const_i64

# define ir_const_uintptr_t ir_const_u64

# define ir_const_intptr_t  ir_const_i64

#else

# define IR_SIZE_T          IR_U32

# define IR_SSIZE_T         IR_I32

# define IR_UINTPTR_T       IR_U32

# define IR_INTPTR_T        IR_I32

# define IR_C_UINTPTR       IR_U32

# define IR_C_INTPTR        IR_I32

# define ir_const_size_t    ir_const_u32

# define ir_const_ssize_t   ir_const_i32

# define ir_const_uintptr_t ir_const_u32

# define ir_const_intptr_t  ir_const_i32

#endif

/* List of IR opcodes

 * ==================

 *

 * Each instruction is described by a type (opcode, flags, op1_type, op2_type, op3_type)

 *

 * flags

 * -----

 * v     - void

 * d     - data      IR_OP_FLAG_DATA

 * r     - ref       IR_OP_FLAG_DATA alias

 * p     - pinned    IR_OP_FLAG_DATA + IR_OP_FLAG_PINNED

 * c     - control   IR_OP_FLAG_CONTROL

 * S     - control   IR_OP_FLAG_CONTROL + IR_OP_FLAG_BB_START

 * E     - control   IR_OP_FLAG_CONTROL + IR_OP_FLAG_BB_END

 * T     - control   IR_OP_FLAG_CONTROL + IR_OP_FLAG_BB_END + IR_OP_FLAG_TERMINATOR

 * l     - load      IR_OP_FLAG_MEM + IR_OP_FLAG_MEM_LOAD

 * s     - store     IR_OP_FLAG_MEM + IR_OP_FLAG_MEM_STORE

 * x     - call      IR_OP_FLAG_MEM + IR_OP_FLAG_MEM_CALL

 * a     - alloc     IR_OP_FLAG_MEM + IR_OP_FLAG_MEM_ALLOC

 * 0-3   - number of input edges

 * N     - number of arguments is defined in the insn->inputs_count (MERGE, PHI, CALL)

 * X1-X3 - number of extra data ops

 * C     - commutative operation ("d2C" => IR_OP_FLAG_DATA + IR_OP_FLAG_COMMUTATIVE)

 *

 * operand types

 * -------------

 * ___ - unused

 * def - reference to a definition op (data-flow use-def dependency edge)

 * ref - memory reference (data-flow use-def dependency edge)

 * var - variable reference (data-flow use-def dependency edge)

 * arg - argument reference CALL/TAILCALL/CARG->CARG

 * src - reference to a previous control region (IF, IF_TRUE, IF_FALSE, MERGE, LOOP_BEGIN, LOOP_END, RETURN)

 * reg - data-control dependency on region (PHI, VAR, PARAM)

 * grd - optional data-control dependency guard (DIV, MOD)

 * ret - reference to a previous RETURN instruction (RETURN)

 * str - string: variable/argument name (VAR, PARAM, CALL, TAILCALL)

 * num - number: argument number (PARAM)

 * prb - branch probability 1-99 (0 - unspecified): (IF_TRUE, IF_FALSE, CASE_VAL, CASE_DEFAULT)

 * opt - optional number

 * alg - optional alignment

 * pro - function prototype

 * lbl - label used as value (a reference to constant): (BEGIN)

 *

 * The order of IR opcodes is carefully selected for efficient folding.

 * - foldable instruction go first

 * - NOP is never used (code 0 is used as ANY pattern)

 * - CONST is the most often used instruction (encode with 1 bit)

 * - equality inversion:  EQ <-> NE                         => op =^ 1

 * - comparison inversion: [U]LT <-> [U]GT, [U]LE <-> [U]GE  => op =^ 3

 */

#define IR_OPS(_) \

  /* special op (must be the first !!!)                               */ \

  _(NOP,          v,    ___, ___, ___) /* empty instruction           */ \

  \

  /* constants reference                                              */ \

  _(C_BOOL,       r0,   ___, ___, ___) /* constant                    */ \

  _(C_U8,         r0,   ___, ___, ___) /* constant                    */ \

  _(C_U16,        r0,   ___, ___, ___) /* constant                    */ \

  _(C_U32,        r0,   ___, ___, ___) /* constant                    */ \

  _(C_U64,        r0,   ___, ___, ___) /* constant                    */ \

  _(C_ADDR,       r0,   ___, ___, ___) /* constant                    */ \

  _(C_CHAR,       r0,   ___, ___, ___) /* constant                    */ \

  _(C_I8,         r0,   ___, ___, ___) /* constant                    */ \

  _(C_I16,        r0,   ___, ___, ___) /* constant                    */ \

  _(C_I32,        r0,   ___, ___, ___) /* constant                    */ \

  _(C_I64,        r0,   ___, ___, ___) /* constant                    */ \

  _(C_DOUBLE,     r0,   ___, ___, ___) /* constant                    */ \

  _(C_FLOAT,      r0,   ___, ___, ___) /* constant                    */ \

  \

  /* equality ops  */                                                    \

  _(EQ,           d2C,  def, def, ___) /* equal                       */ \

  _(NE,           d2C,  def, def, ___) /* not equal                   */ \

  \

  /* comparison ops (order matters, LT must be a modulo of 4 !!!)     */ \

  _(LT,           d2,   def, def, ___) /* less (signed)               */ \

  _(GE,           d2,   def, def, ___) /* greater or equal (signed)   */ \

  _(LE,           d2,   def, def, ___) /* less or equal (signed)      */ \

  _(GT,           d2,   def, def, ___) /* greater (signed)            */ \

  _(ULT,          d2,   def, def, ___) /* unsigned less               */ \

  _(UGE,          d2,   def, def, ___) /* unsigned greater or equal   */ \

  _(ULE,          d2,   def, def, ___) /* unsigned less or equal      */ \

  _(UGT,          d2,   def, def, ___) /* unsigned greater            */ \

  _(ORDERED,      d2,   def, def, ___) /* both operands are not NAN   */ \

  _(UNORDERED,    d2,   def, def, ___) /* one of operands is NAN      */ \

  \

  /* arithmetic ops                                                   */ \

  _(ADD,          d2C,  def, def, ___) /* addition                    */ \

  _(SUB,          d2,   def, def, ___) /* subtraction (must be ADD+1) */ \

  _(MUL,          d2C,  def, def, ___) /* multiplication              */ \

  _(DIV,          d3,   def, def, grd) /* division                    */ \

  _(MOD,          d3,   def, def, grd) /* modulo                      */ \

  _(NEG,          d1,   def, ___, ___) /* change sign                 */ \

  _(ABS,          d1,   def, ___, ___) /* absolute value              */ \

  /* (LDEXP, MIN, MAX, FPMATH)                                        */ \

  \

  /* type conversion ops                                              */ \

  _(SEXT,         d1,   def, ___, ___) /* sign extension              */ \

  _(ZEXT,         d1,   def, ___, ___) /* zero extension              */ \

  _(TRUNC,        d1,   def, ___, ___) /* truncates to int type       */ \

  _(BITCAST,      d1,   def, ___, ___) /* binary representation       */ \

  _(INT2FP,       d1,   def, ___, ___) /* int to float conversion     */ \

  _(FP2INT,       d1,   def, ___, ___) /* float to int conversion     */ \

  _(FP2FP,        d1,   def, ___, ___) /* float to float conversion   */ \

  _(PROTO,        d1X1, def, pro, ___) /* apply function prototype    */ \

  \

  /* overflow-check                                                   */ \

  _(ADD_OV,       d2C,  def, def, ___) /* addition                    */ \

  _(SUB_OV,       d2,   def, def, ___) /* subtraction                 */ \

  _(MUL_OV,       d2C,  def, def, ___) /* multiplication              */ \

  _(OVERFLOW,     d1,   def, ___, ___) /* overflow check add/sub/mul  */ \

  \

  /* bitwise and shift ops                                            */ \

  _(NOT,          d1,   def, ___, ___) /* bitwise NOT                 */ \

  _(OR,           d2C,  def, def, ___) /* bitwise OR                  */ \

  _(AND,          d2C,  def, def, ___) /* bitwise AND                 */ \

  _(XOR,          d2C,  def, def, ___) /* bitwise XOR                 */ \

  _(SHL,          d2,   def, def, ___) /* logic shift left            */ \

  _(SHR,          d2,   def, def, ___) /* logic shift right           */ \

  _(SAR,          d2,   def, def, ___) /* arithmetic shift right      */ \

  _(ROL,          d2,   def, def, ___) /* rotate left                 */ \

  _(ROR,          d2,   def, def, ___) /* rotate right                */ \

  _(BSWAP,        d1,   def, ___, ___) /* byte swap                   */ \

  _(CTPOP,        d1,   def, ___, ___) /* count population            */ \

  _(CTLZ,         d1,   def, ___, ___) /* count leading zeros         */ \

  _(CTTZ,         d1,   def, ___, ___) /* count trailing zeros        */ \

  \

  /* branch-less conditional ops                                      */ \

  _(MIN,          d2C,  def, def, ___) /* min(op1, op2)               */ \

  _(MAX,          d2C,  def, def, ___) /* max(op1, op2)               */ \

  _(COND,         d3,   def, def, def) /* op1 ? op2 : op3             */ \

  \

  /* SIMD vector ops                                                  */ \

  _(EXTRACT,      d2,   def, def, ___) /* get element of vector       */ \

  _(REPLACE,      d3,   def, def, def) /* set element of vector       */ \

  _(SPLAT,        d1,   def, ___, ___) /* set all elements of vector  */ \

  _(SHUFFLE,      d3,   def, def, def) /* shuffle elements of vectors */ \

  \

  /* data-flow and miscellaneous ops                                  */ \

  _(VADDR,        d1,   var, ___, ___) /* load address of local var   */ \

  _(FRAME_ADDR,   d0,   ___, ___, ___) /* function frame address      */ \

  _(PHI,          pN,   reg, def, def) /* SSA Phi function            */ \

  _(COPY,         d1X1, def, opt, ___) /* COPY (last foldable op)     */ \

  _(PI,           p2,   reg, def, ___) /* e-SSA Pi constraint ???     */ \

  _(ARGVAL,       d1X2, def, num, num) /* pass struct arg by value    */ \

                                       /* (op2 - size, op3 - align)   */ \

  /* (USE, RENAME)                                                    */ \

  \

  /* data ops                                                         */ \

  _(PARAM,        p1X2, reg, str, num) /* incoming parameter proj.    */ \

  _(VAR,          p1X2, reg, str, alg) /* local variable              */ \

  _(FUNC_ADDR,    r0,   ___, ___, ___) /* constant func ref           */ \

  _(FUNC,         r0,   ___, ___, ___) /* constant func ref           */ \

  _(SYM,          r0,   ___, ___, ___) /* constant symbol ref         */ \

  _(LABEL,        r0,   ___, ___, ___) /* label address ref           */ \

  _(STR,          r0,   ___, ___, ___) /* constant str ref            */ \

  _(LONG_CONST,   r0,   ___, ___, ___) /* long constant (vector)      */ \

  \

  /* call ops                                                         */ \

  _(CALL,         xN,   src, def, def) /* CALL(src, func, args...)    */ \

  _(TAILCALL,     xN,   src, def, def) /* CALL+RETURN                 */ \

  \

  /* memory reference and load/store ops                              */ \

  _(ALLOCA,       a2X1, src, def, alg) /* alloca(def)                 */ \

  _(AFREE,        s2,   src, def, ___) /* revert alloca(def)          */ \

  _(BLOCK_BEGIN,  a1,   src, ___, ___) /* stacksave                   */ \

  _(BLOCK_END,    s2,   src, def, ___) /* stackrestore                */ \

  _(VLOAD,        l2,   src, var, ___) /* load value of local var     */ \

  _(VLOAD_v,      l2,   src, var, ___) /* volatile variant of VLOAD   */ \

  _(VSTORE,       s3,   src, var, def) /* store value to local var    */ \

  _(VSTORE_v,     s3,   src, var, def) /* volatile variant of VSTORE  */ \

  _(RLOAD,        l1X2, src, num, opt) /* load value from register    */ \

  _(RSTORE,       s2X1, src, def, num) /* store value into register   */ \

  _(LOAD,         l2,   src, ref, ___) /* load from memory            */ \

  _(LOAD_v,       l2,   src, ref, ___) /* volatile variant of VLOAD   */ \

  _(STORE,        s3,   src, ref, def) /* store to memory             */ \

  _(STORE_v,      s3,   src, ref, def) /* volatile variant of VSTORE  */ \

  _(TLS_ADDR,     l1X2, src, num, num) /* TLS_ADDR(_, module, offset) */ \

                                       /* for static TLS module is -1 */ \

  _(TRAP,         x1,   src, ___, ___) /* DebugBreak                  */ \

  /* memory reference ops (A, H, U, S, TMP, STR, NEW, X, V) ???       */ \

  \

  /* va_args                                                          */ \

  _(VA_START,     x2,   src, def, ___) /* va_start(va_list)           */ \

  _(VA_END,       x2,   src, def, ___) /* va_end(va_list)             */ \

  _(VA_COPY,      x3,   src, def, def) /* va_copy(dst, stc)           */ \

  _(VA_ARG,       x2X1, src, def, opt) /* va_arg(va_list)             */ \

                                       /* op3 - (size<<3)+log2(align) */ \

  \

  /* guards                                                           */ \

  _(GUARD,        c3,   src, def, def) /* IF without second successor */ \

  _(GUARD_NOT  ,  c3,   src, def, def) /* IF without second successor */ \

  \

  /* deoptimization                                                   */ \

  _(SNAPSHOT,     xN,   src, def, def) /* SNAPSHOT(src, args...)      */ \

  \

  /* control-flow nodes                                               */ \

  _(START,        S0X1, ret, ___, ___) /* function start              */ \

  _(ENTRY,        S1X1, src, num, ___) /* entry with a fake src edge  */ \

  _(BEGIN,        S1X1, src, lbl, ___) /* block start, optional &&lbl */ \

  _(IF_TRUE,      S1X1, src, prb, ___) /* IF TRUE proj.               */ \

  _(IF_FALSE,     S1X1, src, prb, ___) /* IF FALSE proj.              */ \

  _(CASE_VAL,     S2X1, src, def, prb) /* switch proj.                */ \

  _(CASE_RANGE,   S3,   src, def, def) /* switch proj.                */ \

  _(CASE_DEFAULT, S1X1, src, prb, ___) /* switch proj.                */ \

  _(MERGE,        SN,   src, src, src) /* control merge               */ \

  _(LOOP_BEGIN,   SN,   src, src, src) /* loop start                  */ \

  _(END,          E1,   src, ___, ___) /* block end                   */ \

  _(LOOP_END,     E1,   src, ___, ___) /* loop end                    */ \

  _(IF,           E2,   src, def, ___) /* conditional control split   */ \

  _(SWITCH,       E2,   src, def, ___) /* multi-way control split     */ \

  _(IGOTO,        E2,   src, def, ___) /* computed goto (internal)    */ \

  _(IJMP,         T2X1, src, def, ret) /* computed goto (terminating) */ \

  _(RETURN,       T2X1, src, def, ret) /* function return             */ \

  _(UNREACHABLE,  T1X2, src, ___, ret) /* unreachable (tailcall, etc) */ \

  \

  /* inline assembler                                                 */ \

  _(ASM,          xN,   src, def, def) /* GCC inline assembler        */ \

                                       /* op2 - asm template string   */ \

                                       /* op3 - asm constraint string */ \

                                       /* opN - asm input argument    */ \

  _(ASM_OUT,      x1,   src, ___, ___) /* ASM data output projection  */ \

  _(ASM_GOTO,     E1,   src, ___, ___) /* ASM goto (bb end after ASM) */ \

  \

  /* deoptimization helper                                            */ \

  _(EXITCALL,     x2,   src, def, ___) /* save CPU regs and call op2  */ \

#define IR_OP_ENUM(name, flags, op1, op2, op3) IR_ ## name,

typedef enum _ir_op {

  IR_OPS(IR_OP_ENUM)

#ifdef IR_PHP

  IR_PHP_OPS(IR_OP_ENUM)

#endif

  IR_LAST_OP

} ir_op;

/* IR Opcode and Type Union */

#define IR_OPT_OP_MASK       0x00ff

#define IR_OPT_TYPE_MASK     0xff00

#define IR_OPT_TYPE_SHIFT    8

#define IR_OPT_INPUTS_SHIFT  16

#define IR_OPT(op, type)     ((uint16_t)(op) | ((uint16_t)(type) << IR_OPT_TYPE_SHIFT))

#define IR_OPTX(op, type, n) ((uint32_t)(op) | ((uint32_t)(type) << IR_OPT_TYPE_SHIFT) | ((uint32_t)(n) << IR_OPT_INPUTS_SHIFT))

#define IR_OPT_TYPE(opt)     (((opt) & IR_OPT_TYPE_MASK) >> IR_OPT_TYPE_SHIFT)

/* "opt" modifiers */

#define IR_COPY_HARD         (1<<0)

#define IR_VA_ARG_SIZE(op3)  (((uint32_t)(op3) >> 3))

#define IR_VA_ARG_ALIGN(op3) (1U << ((uint32_t)(op3) & 0x7))

#define IR_VA_ARG_OP3(s, a)  (((s) << 3) | ir_ntzl(a))

/* IR Reference: index of ir_insn in ir_ctx.ir_base[], positive - instructions, negaive - constants */

typedef int32_t ir_ref;

#define IR_IS_CONST_REF(ref) ((ref) < 0)

/* IR String: string index; positive - index in ir_strtab, negative - resolved through loader.get_str() */

typedef int32_t ir_str;

#define IR_IS_EXT_STR(str)   ((str) < 0)

#define IR_EXT_STR(str)      (-(str))

/* IR Constant Value */

#define IR_UNUSED            0

#define IR_NULL              (-1)

#define IR_FALSE             (-2)

#define IR_TRUE              (-3)

#define IR_LAST_FOLDABLE_OP  IR_COPY

#define IR_CONSTS_LIMIT_MIN (-(IR_TRUE - 1))

#define IR_INSNS_LIMIT_MIN (IR_UNUSED + 1)

/* ADDR_MEMBER is neccessary to workaround MSVC C preprocessor bug */

#ifndef IR_64

# define ADDR_MEMBER            uintptr_t                  addr; \

                void                      *ptr;

#else

# define ADDR_MEMBER

#endif

typedef union _ir_val {

  double                             d;

  uint64_t                           u64;

  int64_t                            i64;

#ifdef IR_64

  uintptr_t                          addr;

  void                              *ptr;

#endif

  IR_STRUCT_LOHI(

    union {

      uint32_t                   u32;

      int32_t                    i32;

      float                      f;

      ADDR_MEMBER

      ir_str                     name;

      ir_str                     str;

      IR_STRUCT_LOHI(

        union {

          uint16_t           u16;

          int16_t            i16;

          IR_STRUCT_LOHI(

            union {

              uint8_t    u8;

              int8_t     i8;

              bool       b;

              char       c;

            },

            uint8_t        u8_hi

          );

        },

        uint16_t               u16_hi

      );

    },

    uint32_t                       u32_hi

  );

} ir_val;

#undef ADDR_MEMBER

/* IR Instruction */

typedef struct _ir_insn {

  IR_STRUCT_LOHI(

    union {

      IR_STRUCT_LOHI(

        union {

          IR_STRUCT_LOHI(

            uint8_t        op,

            uint8_t        type

          );

          uint16_t           opt;

        },

        union {

          uint16_t           inputs_count;       /* number of input control edges for MERGE, PHI, CALL, TAILCALL */

          uint16_t           prev_insn_offset;   /* 16-bit backward offset from current instruction for CSE */

          uint16_t           proto;

          uint16_t           long_const_size;

        }

      );

      uint32_t                   optx;

      ir_ref                     ops[1];

    },

    union {

      ir_ref                     op1;

      ir_ref                     ref;

      ir_ref                     prev_const;

    }

  );

  union {

    IR_STRUCT_LOHI(

      ir_ref                     op2,

      ir_ref                     op3

    );

    ir_val                         val;

  };

} ir_insn;

/* IR Hash Tables API (private) */

typedef struct _ir_hashtab ir_hashtab;

/* IR String Tables API (implementation in ir_strtab.c) */

typedef struct _ir_strtab {

  void       *data;

  uint32_t    mask;

  uint32_t    size;

  uint32_t    count;

  uint32_t    pos;

  char       *buf;

  uint32_t    buf_size;

  uint32_t    buf_top;

} ir_strtab;

#define ir_strtab_count(strtab) (strtab)->count

typedef void (*ir_strtab_apply_t)(const char *str, uint32_t len, ir_str val);

void ir_strtab_init(ir_strtab *strtab, uint32_t count, uint32_t buf_size);

ir_str ir_strtab_lookup(ir_strtab *strtab, const char *str, uint32_t len, ir_str val);

ir_str ir_strtab_find(const ir_strtab *strtab, const char *str, uint32_t len);

ir_str ir_strtab_update(ir_strtab *strtab, const char *str, uint32_t len, ir_str val);

void ir_strtab_set(ir_strtab *strtab, const char *str, uint32_t len, ir_str val);

const char *ir_strtab_str(const ir_strtab *strtab, ir_str idx);

const char *ir_strtab_strl(const ir_strtab *strtab, ir_str idx, size_t *len);

void ir_strtab_apply(const ir_strtab *strtab, ir_strtab_apply_t func);

void ir_strtab_free(ir_strtab *strtab);

/* IR Context Flags */

#define IR_PROTO_MASK          0xff

#define IR_CALL_CONV_MASK      0x0f

#define IR_VARARG_FUNC         (1<<4)

#define IR_CONST_FUNC          (1<<5)

#define IR_PURE_FUNC           (1<<6)

#define IR_CONST               (1<<5)

#define IR_INITIALIZED         (1<<6) /* sym data flag: constant or an initialized variable */

#define IR_CONST_STRING        (1<<7) /* sym data flag: constant string */

#define IR_FUNCTION            (1<<8) /* Generate a function. */

#define IR_STATIC              (1<<9)

#define IR_EXTERN              (1<<10)

#define IR_USE_FRAME_POINTER   (1<<11)

#define IR_NO_STACK_COMBINE    (1<<12)

#define IR_GEN_ENDBR           (1<<13)

#define IR_GEN_CACHE_DEMOTE    (1<<14) /* Demote the generated code from closest CPU caches */

#define IR_SKIP_PROLOGUE       (1<<15) /* Don't generate function prologue. */

#define IR_START_BR_TARGET     (1<<16)

#define IR_ENTRY_BR_TARGET     (1<<17)

#define IR_MERGE_EMPTY_ENTRIES (1<<18)

#define IR_OPT_INLINE          (1<<19)

#define IR_OPT_FOLDING         (1<<20)

#define IR_OPT_CFG             (1<<21) /* merge BBs, by remove END->BEGIN nodes during CFG construction */

#define IR_OPT_MEM2SSA         (1<<22)

#define IR_OPT_CODEGEN         (1<<23)

#define IR_OPT_TAILCALL        (1<<24)

/* debug related */

#ifdef IR_DEBUG

# define IR_DEBUG_SCCP         (1<<26)

# define IR_DEBUG_GCM          (1<<27)

# define IR_DEBUG_GCM_SPLIT    (1<<28)

# define IR_DEBUG_SCHEDULE     (1<<29)

# define IR_DEBUG_RA           (1<<30)

# define IR_DEBUG_BB_SCHEDULE  (1U<<31)

#endif

/* Calling Conventions */

#define IR_CC_DEFAULT          0x00

#define IR_CC_BUILTIN          0x01

#define IR_CC_FASTCALL         0x02

#define IR_CC_PRESERVE_NONE    0x03

#if defined(IR_TARGET_X64)

# define IR_CC_X86_64_SYSV     0x08

# define IR_CC_X86_64_MS       0x09

#elif defined(IR_TARGET_AARCH64)

# define IR_CC_AARCH64_SYSV    0x08

# define IR_CC_AARCH64_DARWIN  0x09

#endif

/* Deprecated constants */

#define IR_BUILTIN_FUNC        IR_CC_BUILTIN

#define IR_FASTCALL_FUNC       IR_CC_FASTCALL

typedef struct _ir_ctx           ir_ctx;

typedef struct _ir_use_list      ir_use_list;

typedef struct _ir_block         ir_block;

typedef struct _ir_arena         ir_arena;

typedef struct _ir_live_interval ir_live_interval;

typedef struct _ir_live_range    ir_live_range;

typedef struct _ir_loader        ir_loader;

typedef int8_t ir_regs[4];

typedef void (*ir_snapshot_create_t)(ir_ctx *ctx, ir_ref addr);

#if defined(IR_TARGET_AARCH64)

typedef const void *(*ir_get_exit_addr_t)(uint32_t exit_num);

typedef const void *(*ir_get_veneer_t)(ir_ctx *ctx, const void *addr);

typedef bool (*ir_set_veneer_t)(ir_ctx *ctx, const void *addr, const void *veneer);

#endif

typedef struct _ir_code_buffer {

  void *start;

  void *end;

  void *pos;

} ir_code_buffer;

typedef struct {

  int   size;

  int   align;

} ir_value_param;

typedef struct _ir_bitqueue ir_bitqueue;

#define IR_CONST_HASH_SIZE 64

struct _ir_ctx {

  ir_insn           *ir_base;                 /* two directional array - instructions grow down, constants grow up */

  ir_ref             insns_count;             /* number of instructions stored in instructions buffer */

  ir_ref             insns_limit;             /* size of allocated instructions buffer (it's extended when overflow) */

  ir_ref             consts_count;            /* number of constants stored in constants buffer */

  ir_ref             consts_limit;            /* size of allocated constants buffer (it's extended when overflow) */

  uintptr_t          const_hash_mask;

  ir_ref            *const_hash;

  uint32_t           flags;                   /* IR context flags (see IR_* defines above) */

  uint32_t           flags2;                  /* IR context private flags (see IR_* defines in ir_private.h) */

  ir_type            ret_type;                /* Function return type */

  uint32_t           mflags;                  /* CPU specific flags (see IR_X86_... macros below) */

  int32_t            status;                  /* non-zero error code (see IR_ERROR_... macros), app may use negative codes */

  ir_ref             fold_cse_limit;          /* CSE finds identical insns backward from "insn_count" to "fold_cse_limit" */

  ir_insn            fold_insn;               /* temporary storage for folding engine */

  ir_bitqueue       *iter_worklist;

  ir_value_param    *value_params;            /* information about "by-val" struct parameters */

  ir_hashtab        *binding;

  ir_use_list       *use_lists;               /* def->use lists for each instruction */

  ir_ref            *use_edges;               /* the actual uses: use = ctx->use_edges[ctx->use_lists[def].refs + n] */

  ir_ref             use_edges_count;         /* number of elements in use_edges[] array */

  uint32_t           cfg_blocks_count;        /* number of elements in cfg_blocks[] array */

  uint32_t           cfg_edges_count;         /* number of elements in cfg_edges[] array */

  ir_block          *cfg_blocks;              /* list of basic blocks (starts from 1) */

  uint32_t          *cfg_edges;               /* the actual basic blocks predecessors and successors edges */

  uint32_t          *cfg_map;                 /* map of instructions to basic block number */

  uint32_t          *cfg_schedule;            /* BB order for code generation */

  uint32_t          *rules;                   /* array of target specific code-generation rules (for each instruction) */

  int32_t           *vregs;                   /* map of insns to virtual regs (positive) or stack slots (negative) */

  int32_t            vregs_count;

  ir_str             func_name;               /* Function name (should be set through ir_string()/ir_stringl()) */

  int32_t            spill_base;              /* base register for special spill area (e.g. PHP VM frame pointer) */

  uint64_t           fixed_regset;            /* fixed registers, excluded for regular register allocation */

  int32_t            fixed_stack_red_zone;    /* reusable stack allocated by caller (default 0) */

  int32_t            fixed_stack_frame_size;  /* fixed stack allocated by generated code for spills and registers save/restore */

  int32_t            fixed_call_stack_size;   /* fixed preallocated stack for parameter passing (default 0) */

  uint64_t           fixed_save_regset;       /* registers that always saved/restored in prologue/epilogue */

  uint32_t           locals_area_size;

  uint32_t           gp_reg_params;

  uint32_t           fp_reg_params;

  int32_t            param_stack_size;

  ir_live_interval **live_intervals;

  ir_arena          *arena;

  ir_live_range     *unused_ranges;

  ir_regs           *regs;

  int8_t            *tmp_regs;                /* additional tmp registers, used for COND(I64, _, _) and SIMD */

  ir_strtab         *fused_regs;

  ir_ref            *prev_ref;

  union {

    void          *data;

    ir_ref         control;                 /* used by IR construction API (see ir_builder.h) */

    ir_ref         bb_start;                /* used by target CPU instruction matcher */

    ir_ref         vars;                    /* list of VARs (used by register allocator) */

  };

  ir_snapshot_create_t   snapshot_create;

  int32_t            stack_frame_size;        /* spill stack frame size (used by register allocator and code generator) */

  int32_t            call_stack_size;         /* stack for parameter passing (used by register allocator and code generator) */

  uint64_t           used_preserved_regs;

#ifdef IR_TARGET_X86

  int32_t            ret_slot;

#endif

  uint32_t           rodata_offset;

  uint32_t           jmp_table_offset;

  uint32_t           entries_count;

  uint32_t          *entries;                /* array of ENTRY blocks */

  void              *osr_entry_loads;

  ir_code_buffer    *code_buffer;

#if defined(IR_TARGET_AARCH64)

  int32_t            deoptimization_exits;

  const void        *deoptimization_exits_base;

  ir_get_exit_addr_t get_exit_addr;

  ir_get_veneer_t    get_veneer;

  ir_set_veneer_t    set_veneer;

#endif

  ir_loader         *loader;

  ir_strtab          strtab;

  ir_ref             prev_insn_chain[IR_LAST_FOLDABLE_OP + 1];

  ir_ref             _const_hash[IR_CONST_HASH_SIZE];

};

/* Basic IR Construction API (implementation in ir.c) */

void ir_init(ir_ctx *ctx, uint32_t flags, ir_ref consts_limit, ir_ref insns_limit);

void ir_free(ir_ctx *ctx);

void ir_truncate(ir_ctx *ctx);

ir_ref ir_const(ir_ctx *ctx, ir_val val, uint8_t type);

ir_ref ir_const_i8(ir_ctx *ctx, int8_t c);

ir_ref ir_const_i16(ir_ctx *ctx, int16_t c);

ir_ref ir_const_i32(ir_ctx *ctx, int32_t c);

ir_ref ir_const_i64(ir_ctx *ctx, int64_t c);

ir_ref ir_const_u8(ir_ctx *ctx, uint8_t c);

ir_ref ir_const_u16(ir_ctx *ctx, uint16_t c);

ir_ref ir_const_u32(ir_ctx *ctx, uint32_t c);

ir_ref ir_const_u64(ir_ctx *ctx, uint64_t c);

ir_ref ir_const_bool(ir_ctx *ctx, bool c);

ir_ref ir_const_char(ir_ctx *ctx, char c);

ir_ref ir_const_float(ir_ctx *ctx, float c);

ir_ref ir_const_double(ir_ctx *ctx, double c);

ir_ref ir_const_addr(ir_ctx *ctx, uintptr_t c);

ir_ref ir_const_func_addr(ir_ctx *ctx, uintptr_t c, ir_str proto);

ir_ref ir_const_func(ir_ctx *ctx, ir_str str, ir_str proto);

ir_ref ir_const_sym(ir_ctx *ctx, ir_str str);

ir_ref ir_const_str(ir_ctx *ctx, ir_str str);

ir_ref ir_const_label(ir_ctx *ctx, ir_str str);

ir_ref ir_unique_const_addr(ir_ctx *ctx, uintptr_t c);

ir_ref ir_long_const(ir_ctx *ctx, ir_type type, size_t size);

void *ir_long_const_ptr(ir_ctx *ctx, ir_ref ref);

ir_ref ir_long_const_commit(ir_ctx *ctx, ir_ref ref);

ir_ref ir_const_vector(ir_ctx *ctx, ir_type type);

void ir_print_const(const ir_ctx *ctx, const ir_insn *insn, FILE *f, bool quoted);

ir_str ir_string(ir_ctx *ctx, const char *s);

ir_str ir_stringl(ir_ctx *ctx, const char *s, size_t len);

const char *ir_get_str(const ir_ctx *ctx, ir_str idx);

const char *ir_get_strl(const ir_ctx *ctx, ir_str idx, size_t *len);

#define IR_MAX_PROTO_PARAMS 255

typedef struct _ir_proto_t {

  uint8_t flags; /* first 8 bits of ir_ctx.flags */

  uint8_t ret_type;

  uint8_t params_count;

  uint8_t param_types[5];

} ir_proto_t;

ir_str ir_proto_0(ir_ctx *ctx, uint8_t flags, ir_type ret_type);

ir_str ir_proto_1(ir_ctx *ctx, uint8_t flags, ir_type ret_type, ir_type t1);

ir_str ir_proto_2(ir_ctx *ctx, uint8_t flags, ir_type ret_type, ir_type t1, ir_type t2);

ir_str ir_proto_3(ir_ctx *ctx, uint8_t flags, ir_type ret_type, ir_type t1, ir_type t2, ir_type t3);

ir_str ir_proto_4(ir_ctx *ctx, uint8_t flags, ir_type ret_type, ir_type t1, ir_type t2, ir_type t3,

                                                                ir_type t4);

ir_str ir_proto_5(ir_ctx *ctx, uint8_t flags, ir_type ret_type, ir_type t1, ir_type t2, ir_type t3,

                                                                ir_type t4, ir_type t5);

ir_str ir_proto(ir_ctx *ctx, uint8_t flags, ir_type ret_type, uint32_t params_counts, uint8_t *param_types);

ir_ref ir_emit(ir_ctx *ctx, uint32_t opt, ir_ref op1, ir_ref op2, ir_ref op3);

ir_ref ir_emit0(ir_ctx *ctx, uint32_t opt);

ir_ref ir_emit1(ir_ctx *ctx, uint32_t opt, ir_ref op1);

ir_ref ir_emit2(ir_ctx *ctx, uint32_t opt, ir_ref op1, ir_ref op2);

ir_ref ir_emit3(ir_ctx *ctx, uint32_t opt, ir_ref op1, ir_ref op2, ir_ref op3);

ir_ref ir_emit_N(ir_ctx *ctx, uint32_t opt, int32_t count);

void   ir_set_op(ir_ctx *ctx, ir_ref ref, int32_t n, ir_ref val);

ir_ref ir_get_op(const ir_ctx *ctx, ir_ref ref, int32_t n);

IR_ALWAYS_INLINE void ir_set_op1(ir_ctx *ctx, ir_ref ref, ir_ref val)

{

  ctx->ir_base[ref].op1 = val;

}

Unexecuted instantiation: ir_cfg.c:ir_set_op1

Unexecuted instantiation: ir_check.c:ir_set_op1

Unexecuted instantiation: ir_dump.c:ir_set_op1

Unexecuted instantiation: ir_emit.c:ir_set_op1

Unexecuted instantiation: ir_gcm.c:ir_set_op1

Unexecuted instantiation: ir_gdb.c:ir_set_op1

Unexecuted instantiation: ir_patch.c:ir_set_op1

Unexecuted instantiation: ir_perf.c:ir_set_op1

Unexecuted instantiation: ir_ra.c:ir_set_op1

Unexecuted instantiation: ir_ra_simple.c:ir_set_op1

Unexecuted instantiation: ir_save.c:ir_set_op1

Unexecuted instantiation: ir_sccp.c:ir_set_op1

Unexecuted instantiation: ir_strtab.c:ir_set_op1

Unexecuted instantiation: ir.c:ir_set_op1

Unexecuted instantiation: zend_jit.c:ir_set_op1

IR_ALWAYS_INLINE void ir_set_op2(ir_ctx *ctx, ir_ref ref, ir_ref val)

{

  ctx->ir_base[ref].op2 = val;

}

Unexecuted instantiation: ir_cfg.c:ir_set_op2

Unexecuted instantiation: ir_check.c:ir_set_op2

Unexecuted instantiation: ir_dump.c:ir_set_op2

Unexecuted instantiation: ir_emit.c:ir_set_op2

Unexecuted instantiation: ir_gcm.c:ir_set_op2

Unexecuted instantiation: ir_gdb.c:ir_set_op2

Unexecuted instantiation: ir_patch.c:ir_set_op2

Unexecuted instantiation: ir_perf.c:ir_set_op2

Unexecuted instantiation: ir_ra.c:ir_set_op2

Unexecuted instantiation: ir_ra_simple.c:ir_set_op2

Unexecuted instantiation: ir_save.c:ir_set_op2

Unexecuted instantiation: ir_sccp.c:ir_set_op2

Unexecuted instantiation: ir_strtab.c:ir_set_op2

Unexecuted instantiation: ir.c:ir_set_op2

Unexecuted instantiation: zend_jit.c:ir_set_op2

IR_ALWAYS_INLINE void ir_set_op3(ir_ctx *ctx, ir_ref ref, ir_ref val)

{

  ctx->ir_base[ref].op3 = val;

}

Unexecuted instantiation: ir_cfg.c:ir_set_op3

Unexecuted instantiation: ir_check.c:ir_set_op3

Unexecuted instantiation: ir_dump.c:ir_set_op3

Unexecuted instantiation: ir_emit.c:ir_set_op3

Unexecuted instantiation: ir_gcm.c:ir_set_op3

Unexecuted instantiation: ir_gdb.c:ir_set_op3

Unexecuted instantiation: ir_patch.c:ir_set_op3

Unexecuted instantiation: ir_perf.c:ir_set_op3

Unexecuted instantiation: ir_ra.c:ir_set_op3

Unexecuted instantiation: ir_ra_simple.c:ir_set_op3

Unexecuted instantiation: ir_save.c:ir_set_op3

Unexecuted instantiation: ir_sccp.c:ir_set_op3

Unexecuted instantiation: ir_strtab.c:ir_set_op3

Unexecuted instantiation: ir.c:ir_set_op3

Unexecuted instantiation: zend_jit.c:ir_set_op3

IR_ALWAYS_INLINE ir_ref ir_insn_op(const ir_insn *insn, int32_t n)

{

  const ir_ref *p = insn->ops + n;

  return *p;

}

ir_cfg.c:ir_insn_op

Line

Count

Source

896

90

{

897

90

  const ir_ref *p = insn->ops + n;

898

90

  return *p;

899

90

}

Unexecuted instantiation: ir_check.c:ir_insn_op

Unexecuted instantiation: ir_dump.c:ir_insn_op

ir_emit.c:ir_insn_op

Line

Count

Source

896

405k

{

897

405k

  const ir_ref *p = insn->ops + n;

898

405k

  return *p;

899

405k

}

ir_gcm.c:ir_insn_op

Line

Count

Source

896

2

{

897

2

  const ir_ref *p = insn->ops + n;

898

2

  return *p;

899

2

}

Unexecuted instantiation: ir_gdb.c:ir_insn_op

Unexecuted instantiation: ir_patch.c:ir_insn_op

Unexecuted instantiation: ir_perf.c:ir_insn_op

ir_ra.c:ir_insn_op

Line

Count

Source

896

101k

{

897

101k

  const ir_ref *p = insn->ops + n;

898

101k

  return *p;

899

101k

}

Unexecuted instantiation: ir_ra_simple.c:ir_insn_op

Unexecuted instantiation: ir_save.c:ir_insn_op

ir_sccp.c:ir_insn_op

Line

Count

Source

896

259

{

897

259

  const ir_ref *p = insn->ops + n;

898

259

  return *p;

899

259

}

Unexecuted instantiation: ir_strtab.c:ir_insn_op

Unexecuted instantiation: ir.c:ir_insn_op

zend_jit.c:ir_insn_op

Line

Count

Source

896

591

{

897

591

  const ir_ref *p = insn->ops + n;

898

591

  return *p;

899

591

}

IR_ALWAYS_INLINE void ir_insn_set_op(ir_insn *insn, int32_t n, ir_ref val)

{

  ir_ref *p = insn->ops + n;

  *p = val;

}

ir_cfg.c:ir_insn_set_op

Line

Count

Source

902

81

{

903

81

  ir_ref *p = insn->ops + n;

904

81

  *p = val;

905

81

}

Unexecuted instantiation: ir_check.c:ir_insn_set_op

Unexecuted instantiation: ir_dump.c:ir_insn_set_op

Unexecuted instantiation: ir_emit.c:ir_insn_set_op

ir_gcm.c:ir_insn_set_op

Line

Count

Source

902

1

{

903

1

  ir_ref *p = insn->ops + n;

904

1

  *p = val;

905

1

}

Unexecuted instantiation: ir_gdb.c:ir_insn_set_op

Unexecuted instantiation: ir_patch.c:ir_insn_set_op

Unexecuted instantiation: ir_perf.c:ir_insn_set_op

Unexecuted instantiation: ir_ra.c:ir_insn_set_op

Unexecuted instantiation: ir_ra_simple.c:ir_insn_set_op

Unexecuted instantiation: ir_save.c:ir_insn_set_op

ir_sccp.c:ir_insn_set_op

Line

Count

Source

902

184

{

903

184

  ir_ref *p = insn->ops + n;

904

184

  *p = val;

905

184

}

Unexecuted instantiation: ir_strtab.c:ir_insn_set_op

ir.c:ir_insn_set_op

Line

Count

Source

902

241k

{

903

241k

  ir_ref *p = insn->ops + n;

904

241k

  *p = val;

905

241k

}

Unexecuted instantiation: zend_jit.c:ir_insn_set_op

IR_ALWAYS_INLINE uint32_t ir_insn_find_op(const ir_insn *insn, ir_ref val)

{

  int i, n = insn->inputs_count;

  for (i = 1; i <= n; i++) {

    if (ir_insn_op(insn, i) == val) {

      return i;

    }

  }

  return 0;

}

Unexecuted instantiation: ir_cfg.c:ir_insn_find_op

Unexecuted instantiation: ir_check.c:ir_insn_find_op

Unexecuted instantiation: ir_dump.c:ir_insn_find_op

Unexecuted instantiation: ir_emit.c:ir_insn_find_op

Unexecuted instantiation: ir_gcm.c:ir_insn_find_op

Unexecuted instantiation: ir_gdb.c:ir_insn_find_op

Unexecuted instantiation: ir_patch.c:ir_insn_find_op

Unexecuted instantiation: ir_perf.c:ir_insn_find_op

Unexecuted instantiation: ir_ra.c:ir_insn_find_op

Unexecuted instantiation: ir_ra_simple.c:ir_insn_find_op

Unexecuted instantiation: ir_save.c:ir_insn_find_op

ir_sccp.c:ir_insn_find_op

Line

Count

Source

908

93

{

909

93

  int i, n = insn->inputs_count;

910

911

151

  for (i = 1; i <= n; i++) {

912

151

    if (ir_insn_op(insn, i) == val) {

913

93

      return i;

914

93

    }

915

151

  }

916

0

  return 0;

917

93

}

Unexecuted instantiation: ir_strtab.c:ir_insn_find_op

Unexecuted instantiation: ir.c:ir_insn_find_op

Unexecuted instantiation: zend_jit.c:ir_insn_find_op

ir_ref ir_fold(ir_ctx *ctx, uint32_t opt, ir_ref op1, ir_ref op2, ir_ref op3);

ir_ref ir_fold0(ir_ctx *ctx, uint32_t opt);

ir_ref ir_fold1(ir_ctx *ctx, uint32_t opt, ir_ref op1);

ir_ref ir_fold2(ir_ctx *ctx, uint32_t opt, ir_ref op1, ir_ref op2);

ir_ref ir_fold3(ir_ctx *ctx, uint32_t opt, ir_ref op1, ir_ref op2, ir_ref op3);

ir_ref ir_param(ir_ctx *ctx, ir_type type, ir_ref region, const char *name, int pos);

ir_ref ir_param_ex(ir_ctx *ctx, ir_type type, ir_ref region, ir_str name, int pos);

ir_ref ir_var(ir_ctx *ctx, ir_type type, ir_ref region, const char *name);

ir_ref ir_var_ex(ir_ctx *ctx, ir_type type, ir_ref region, ir_str name);

/* IR Binding */

ir_ref ir_bind(ir_ctx *ctx, ir_ref var, ir_ref def);

ir_ref ir_binding_find(const ir_ctx *ctx, ir_ref ref);

/* Def -> Use lists */

void ir_build_def_use_lists(ir_ctx *ctx);

/* SSA Construction */

int ir_mem2ssa(ir_ctx *ctx);

/* CFG - Control Flow Graph (implementation in ir_cfg.c) */

int ir_build_cfg(ir_ctx *ctx);

int ir_build_dominators_tree(ir_ctx *ctx);

int ir_find_loops(ir_ctx *ctx);

int ir_schedule_blocks(ir_ctx *ctx);

void ir_reset_cfg(ir_ctx *ctx);

/* SCCP - Sparse Conditional Constant Propagation (implementation in ir_sccp.c) */

int ir_sccp(ir_ctx *ctx);

/* GCM - Global Code Motion and scheduling (implementation in ir_gcm.c) */

int ir_gcm(ir_ctx *ctx);

int ir_schedule(ir_ctx *ctx);

/* Liveness & Register Allocation (implementation in ir_ra.c) */

#define IR_REG_NONE          -1

#define IR_REG_SPILL_LOAD    (1<<6)

#define IR_REG_SPILL_STORE   (1<<6)

#define IR_REG_SPILL_SPECIAL (1<<7)

#define IR_REG_SPILLED(r) \

  ((r) & (IR_REG_SPILL_LOAD|IR_REG_SPILL_STORE|IR_REG_SPILL_SPECIAL))

#define IR_REG_NUM(r) \

  ((int8_t)((r) == IR_REG_NONE ? IR_REG_NONE : ((r) & ~(IR_REG_SPILL_LOAD|IR_REG_SPILL_STORE|IR_REG_SPILL_SPECIAL))))

int ir_assign_virtual_registers(ir_ctx *ctx);

int ir_compute_live_ranges(ir_ctx *ctx);

int ir_coalesce(ir_ctx *ctx);

int ir_compute_dessa_moves(ir_ctx *ctx);

int ir_reg_alloc(ir_ctx *ctx);

int ir_reg_alloc_simple(ir_ctx *ctx);

#define ir_reg_alloc_O0(_ctx) ir_reg_alloc_simple(_ctx)

int ir_regs_number(void);

bool ir_reg_is_int(int32_t reg);

const char *ir_reg_name(int8_t reg, ir_type type);

int32_t ir_get_spill_slot_offset(const ir_ctx *ctx, ir_ref ref);

/* Target CPU instruction selection and code generation (see ir_x86.c) */

int ir_match(ir_ctx *ctx);

void *ir_emit_code(ir_ctx *ctx, size_t *size);

bool ir_needs_thunk(const ir_code_buffer *code_buffer, void *addr);

void *ir_emit_thunk(ir_code_buffer *code_buffer, void *addr, size_t *size_ptr);

void ir_fix_thunk(void *thunk_entry, void *addr);

#if defined(_MSC_VER) && defined(IR_TARGET_X86)

/* MSVC doesn't enforce 16-byte stack alignment */

int ir_call_with_aligned_stack(int (*func)(int, const char**), int argc, const char **argv);

#endif

/* Target address resolution (implementation in ir_emit.c) */

void *ir_resolve_sym_name(const char *name);

/* Target CPU disassembler (implementation in ir_disasm.c) */

int  ir_disasm_init(void);

void ir_disasm_free(void);

void ir_disasm_add_symbol(const char *name, uint64_t addr, uint64_t size);

const char* ir_disasm_find_symbol(uint64_t addr, int64_t *offset);

int  ir_disasm(const char *name,

               const void *start,

               size_t      size,

               bool        asm_addr,

               ir_ctx     *ctx,

               FILE       *f);

/* Linux perf interface (implementation in ir_perf.c) */

int ir_perf_jitdump_open(void);

int ir_perf_jitdump_close(void);

int ir_perf_jitdump_register(const char *name, const void *start, size_t size);

void ir_perf_map_register(const char *name, const void *start, size_t size);