RegulatingTerminalMapper.TerminalAndSign

ElementMissed InstructionsCov.Missed BranchesCov.MissedCxtyMissedLinesMissedMethods
Total15 of 150%0 of 0n/a336633
RegulatingTerminalMapper.TerminalAndSign(Terminal, int)90%n/a114411
getTerminal()30%n/a111111
getSign()30%n/a111111