| tieLineTest0() |  | 0% | | n/a | 1 | 1 | 30 | 30 | 1 | 1 |
| tieLineTest1() | | 0% | | n/a | 1 | 1 | 28 | 28 | 1 | 1 |
| tieLineTest2() | | 0% | | n/a | 1 | 1 | 28 | 28 | 1 | 1 |
| tieLineTest3() | | 0% | | n/a | 1 | 1 | 28 | 28 | 1 | 1 |
| tieLineWithDifferentNominalVoltageAtEndsTest() | | 0% | | n/a | 1 | 1 | 28 | 28 | 1 | 1 |
| tieLineWithNaNVoltagesTest() | | 0% | | n/a | 1 | 1 | 28 | 28 | 1 | 1 |
| createNetworkWithTieLine(NetworkFactory, TwoSides, TwoSides, TieLineTest.CaseSv) | | 0% | | n/a | 1 | 1 | 65 | 65 | 1 | 1 |
| createNetworkWithTieLineWithDifferentNominalVoltageAtEnds(NetworkFactory, TwoSides, TwoSides, TieLineTest.CaseSv) | | 0% | | n/a | 1 | 1 | 63 | 63 | 1 | 1 |
| testDefaultValuesTieLine() | | 0% | | n/a | 1 | 1 | 58 | 58 | 1 | 1 |
| tieLineTestZeroImpedanceDl1AndDl2() | | 0% | | n/a | 1 | 1 | 17 | 17 | 1 | 1 |
| tieLineTestZeroImpedanceDl1() | | 0% | | n/a | 1 | 1 | 16 | 16 | 1 | 1 |
| tieLineTestZeroImpedanceDl2() | | 0% | | n/a | 1 | 1 | 16 | 16 | 1 | 1 |
| compare(SV, TieLineTest.NodeSv, TieLineTest.LineSv, TwoSides, SV) | | 0% | | 0% | 5 | 5 | 14 | 14 | 1 | 1 |
| createCase0() | | 0% | | n/a | 1 | 1 | 6 | 6 | 1 | 1 |
| createCase1() | | 0% | | n/a | 1 | 1 | 6 | 6 | 1 | 1 |
| createCase2() | | 0% | | n/a | 1 | 1 | 6 | 6 | 1 | 1 |
| createCase3() | | 0% | | n/a | 1 | 1 | 6 | 6 | 1 | 1 |
| createCaseDifferentNominalVoltageAtEnds() | | 0% | | n/a | 1 | 1 | 6 | 6 | 1 | 1 |
| createCaseNaNVoltages() | | 0% | | n/a | 1 | 1 | 6 | 6 | 1 | 1 |
| initialHalf1SvBoundary(TieLineTest.CaseSv, TieLineTest.TieLineInitialModel, TwoSides) | | 0% | | 0% | 2 | 2 | 3 | 3 | 1 | 1 |
| initialHalf2SvBoundary(TieLineTest.CaseSv, TieLineTest.TieLineInitialModel, TwoSides) | | 0% | | 0% | 2 | 2 | 3 | 3 | 1 | 1 |
| initialSv1(TieLineTest.CaseSv, TieLineTest.TieLineInitialModel, TwoSides, TwoSides) | | 0% | | n/a | 1 | 1 | 3 | 3 | 1 | 1 |
| initialSv2(TieLineTest.CaseSv, TieLineTest.TieLineInitialModel, TwoSides, TwoSides) | | 0% | | n/a | 1 | 1 | 3 | 3 | 1 | 1 |
| initialModelCase(TwoSides, TwoSides) | | 0% | | n/a | 1 | 1 | 1 | 1 | 1 | 1 |
| initialModelDifferentVlCase(TwoSides, TwoSides) | | 0% | | n/a | 1 | 1 | 1 | 1 | 1 | 1 |
| compare(double, double, double) | | 0% | | 0% | 2 | 2 | 5 | 5 | 1 | 1 |
| createBus(VoltageLevel, String) | | 0% | | n/a | 1 | 1 | 6 | 6 | 1 | 1 |
| getOtherSideP(TieLineTest.LineSv, TwoSides) | | 0% | | 0% | 2 | 2 | 3 | 3 | 1 | 1 |
| getOtherSideQ(TieLineTest.LineSv, TwoSides) | | 0% | | 0% | 2 | 2 | 3 | 3 | 1 | 1 |
| getP(TieLineTest.LineSv, TwoSides) | | 0% | | 0% | 2 | 2 | 3 | 3 | 1 | 1 |
| getQ(TieLineTest.LineSv, TwoSides) | | 0% | | 0% | 2 | 2 | 3 | 3 | 1 | 1 |
| getI(TieLineTest.LineSv, TwoSides) | | 0% | | 0% | 2 | 2 | 3 | 3 | 1 | 1 |
| TieLineTest() | | 0% | | n/a | 1 | 1 | 1 | 1 | 1 | 1 |