SerializerIntrinsics

Source file "jnr/x86asm/SerializerIntrinsics.java" was not found during generation of report.

Element	Missed Instructions	Cov.	Missed Branches	Cov.	Missed	Cxty	Missed	Lines	Missed	Methods
Total	7,666 of 7,666	0%	246 of 246	0%	1,343	1,343	2,299	2,299	1,220	1,220
popcnt(Register, Register)		0%		0%	5	5	4	4	1	1
pop(Register)		0%		0%	5	5	3	3	1	1
pop(Mem)		0%		0%	5	5	3	3	1	1
push(Mem)		0%		0%	5	5	3	3	1	1
fild(Mem)		0%		0%	5	5	3	3	1	1
fistp(Mem)		0%		0%	5	5	3	3	1	1
fld(Mem)		0%		0%	5	5	3	3	1	1
fstp(Mem)		0%		0%	5	5	3	3	1	1
call(Register)		0%		0%	4	4	3	3	1	1
crc32(Register, Register)		0%		0%	4	4	3	3	1	1
crc32(Register, Mem)		0%		0%	4	4	3	3	1	1
bswap(Register)		0%		0%	4	4	3	3	1	1
fiadd(Mem)		0%		0%	4	4	3	3	1	1
ficom(Mem)		0%		0%	4	4	3	3	1	1
ficomp(Mem)		0%		0%	4	4	3	3	1	1
fidiv(Mem)		0%		0%	4	4	3	3	1	1
fidivr(Mem)		0%		0%	4	4	3	3	1	1
fimul(Mem)		0%		0%	4	4	3	3	1	1
fisub(Mem)		0%		0%	4	4	3	3	1	1
fisubr(Mem)		0%		0%	4	4	3	3	1	1
fist(Mem)		0%		0%	4	4	3	3	1	1
fst(Mem)		0%		0%	4	4	3	3	1	1
fsub(Mem)		0%		0%	4	4	3	3	1	1
fsubr(Mem)		0%		0%	4	4	3	3	1	1
fadd(X87Register, X87Register)		0%		0%	4	4	3	3	1	1
fdiv(X87Register, X87Register)		0%		0%	4	4	3	3	1	1
fdivr(X87Register, X87Register)		0%		0%	4	4	3	3	1	1
fmul(X87Register, X87Register)		0%		0%	4	4	3	3	1	1
fsub(X87Register, X87Register)		0%		0%	4	4	3	3	1	1
fsubr(X87Register, X87Register)		0%		0%	4	4	3	3	1	1
bsf(Register, Register)		0%		0%	3	3	3	3	1	1
bsf(Register, Mem)		0%		0%	3	3	3	3	1	1
bsr(Register, Register)		0%		0%	3	3	3	3	1	1
bsr(Register, Mem)		0%		0%	3	3	3	3	1	1
mov_ptr(Register, long)		0%		0%	3	3	3	3	1	1
mov_ptr(long, Register)		0%		0%	3	3	3	3	1	1
popcnt(Register, Mem)		0%		0%	3	3	3	3	1	1
movbe(Register, Mem)		0%		0%	3	3	3	3	1	1
movbe(Mem, Register)		0%		0%	3	3	3	3	1	1
j_short(CONDITION, Label, int)		0%		n/a	1	1	2	2	1	1
fnstsw(Register)		0%		0%	3	3	3	3	1	1
fstsw(Register)		0%		0%	3	3	3	3	1	1
popf()		0%		0%	2	2	4	4	1	1
pushf()		0%		0%	2	2	4	4	1	1
static {...}		0%		0%	2	2	1	1	1	1
cmov(CONDITION, Register, Register)		0%		n/a	1	1	2	2	1	1
cmov(CONDITION, Register, Mem)		0%		n/a	1	1	2	2	1	1
imul(Register, Register, Immediate)		0%		n/a	1	1	2	2	1	1
imul(Register, Mem, Immediate)		0%		n/a	1	1	2	2	1	1
j(CONDITION, Label, int)		0%		n/a	1	1	2	2	1	1
shld(Register, Register, Register)		0%		n/a	1	1	2	2	1	1
shld(Register, Register, Immediate)		0%		n/a	1	1	2	2	1	1
shld(Mem, Register, Register)		0%		n/a	1	1	2	2	1	1
shld(Mem, Register, Immediate)		0%		n/a	1	1	2	2	1	1
shrd(Register, Register, Register)		0%		n/a	1	1	2	2	1	1
shrd(Register, Register, Immediate)		0%		n/a	1	1	2	2	1	1
shrd(Mem, Register, Register)		0%		n/a	1	1	2	2	1	1
shrd(Mem, Register, Immediate)		0%		n/a	1	1	2	2	1	1
cmpps(XMMRegister, XMMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
cmpps(XMMRegister, Mem, Immediate)		0%		n/a	1	1	2	2	1	1
cmpss(XMMRegister, XMMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
cmpss(XMMRegister, Mem, Immediate)		0%		n/a	1	1	2	2	1	1
pextrw(Register, MMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
pinsrw(MMRegister, Register, Immediate)		0%		n/a	1	1	2	2	1	1
pinsrw(MMRegister, Mem, Immediate)		0%		n/a	1	1	2	2	1	1
pshufw(MMRegister, MMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
pshufw(MMRegister, Mem, Immediate)		0%		n/a	1	1	2	2	1	1
shufps(XMMRegister, XMMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
shufps(XMMRegister, Mem, Immediate)		0%		n/a	1	1	2	2	1	1
cmppd(XMMRegister, XMMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
cmppd(XMMRegister, Mem, Immediate)		0%		n/a	1	1	2	2	1	1
cmpsd(XMMRegister, XMMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
cmpsd(XMMRegister, Mem, Immediate)		0%		n/a	1	1	2	2	1	1
pshufd(XMMRegister, XMMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
pshufd(XMMRegister, Mem, Immediate)		0%		n/a	1	1	2	2	1	1
pshufhw(XMMRegister, XMMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
pshufhw(XMMRegister, Mem, Immediate)		0%		n/a	1	1	2	2	1	1
pshuflw(XMMRegister, XMMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
pshuflw(XMMRegister, Mem, Immediate)		0%		n/a	1	1	2	2	1	1
palignr(MMRegister, MMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
palignr(MMRegister, Mem, Immediate)		0%		n/a	1	1	2	2	1	1
palignr(XMMRegister, XMMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
palignr(XMMRegister, Mem, Immediate)		0%		n/a	1	1	2	2	1	1
blendpd(XMMRegister, XMMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
blendpd(XMMRegister, Mem, Immediate)		0%		n/a	1	1	2	2	1	1
blendps(XMMRegister, XMMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
blendps(XMMRegister, Mem, Immediate)		0%		n/a	1	1	2	2	1	1
dppd(XMMRegister, XMMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
dppd(XMMRegister, Mem, Immediate)		0%		n/a	1	1	2	2	1	1
dpps(XMMRegister, XMMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
dpps(XMMRegister, Mem, Immediate)		0%		n/a	1	1	2	2	1	1
extractps(XMMRegister, XMMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
extractps(XMMRegister, Mem, Immediate)		0%		n/a	1	1	2	2	1	1
mpsadbw(XMMRegister, XMMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
mpsadbw(XMMRegister, Mem, Immediate)		0%		n/a	1	1	2	2	1	1
pblendw(XMMRegister, XMMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
pblendw(XMMRegister, Mem, Immediate)		0%		n/a	1	1	2	2	1	1
pextrb(Register, XMMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
pextrb(Mem, XMMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
pextrd(Register, XMMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
pextrd(Mem, XMMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
pextrq(Register, XMMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
pextrq(Mem, XMMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
pextrw(Register, XMMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
pextrw(Mem, XMMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
pinsrb(XMMRegister, Register, Immediate)		0%		n/a	1	1	2	2	1	1
pinsrb(XMMRegister, Mem, Immediate)		0%		n/a	1	1	2	2	1	1
pinsrd(XMMRegister, Register, Immediate)		0%		n/a	1	1	2	2	1	1
pinsrd(XMMRegister, Mem, Immediate)		0%		n/a	1	1	2	2	1	1
pinsrq(XMMRegister, Register, Immediate)		0%		n/a	1	1	2	2	1	1
pinsrq(XMMRegister, Mem, Immediate)		0%		n/a	1	1	2	2	1	1
pinsrw(XMMRegister, Register, Immediate)		0%		n/a	1	1	2	2	1	1
pinsrw(XMMRegister, Mem, Immediate)		0%		n/a	1	1	2	2	1	1
roundps(XMMRegister, XMMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
roundps(XMMRegister, Mem, Immediate)		0%		n/a	1	1	2	2	1	1
roundss(XMMRegister, XMMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
roundss(XMMRegister, Mem, Immediate)		0%		n/a	1	1	2	2	1	1
roundpd(XMMRegister, XMMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
roundpd(XMMRegister, Mem, Immediate)		0%		n/a	1	1	2	2	1	1
roundsd(XMMRegister, XMMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
roundsd(XMMRegister, Mem, Immediate)		0%		n/a	1	1	2	2	1	1
pcmpestri(XMMRegister, XMMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
pcmpestri(XMMRegister, Mem, Immediate)		0%		n/a	1	1	2	2	1	1
pcmpestrm(XMMRegister, XMMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
pcmpestrm(XMMRegister, Mem, Immediate)		0%		n/a	1	1	2	2	1	1
pcmpistri(XMMRegister, XMMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
pcmpistri(XMMRegister, Mem, Immediate)		0%		n/a	1	1	2	2	1	1
pcmpistrm(XMMRegister, XMMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
pcmpistrm(XMMRegister, Mem, Immediate)		0%		n/a	1	1	2	2	1	1
adc(Register, Register)		0%		n/a	1	1	2	2	1	1
adc(Register, Mem)		0%		n/a	1	1	2	2	1	1
adc(Register, Immediate)		0%		n/a	1	1	2	2	1	1
adc(Mem, Register)		0%		n/a	1	1	2	2	1	1
adc(Mem, Immediate)		0%		n/a	1	1	2	2	1	1
add(Register, Register)		0%		n/a	1	1	2	2	1	1
add(Register, Mem)		0%		n/a	1	1	2	2	1	1
add(Register, Immediate)		0%		n/a	1	1	2	2	1	1
add(Mem, Register)		0%		n/a	1	1	2	2	1	1
add(Mem, Immediate)		0%		n/a	1	1	2	2	1	1
and_(Register, Register)		0%		n/a	1	1	2	2	1	1
and_(Register, Mem)		0%		n/a	1	1	2	2	1	1
and_(Register, Immediate)		0%		n/a	1	1	2	2	1	1
and_(Mem, Register)		0%		n/a	1	1	2	2	1	1
and_(Mem, Immediate)		0%		n/a	1	1	2	2	1	1
bt(Register, Register)		0%		n/a	1	1	2	2	1	1
bt(Register, Immediate)		0%		n/a	1	1	2	2	1	1
bt(Mem, Register)		0%		n/a	1	1	2	2	1	1
bt(Mem, Immediate)		0%		n/a	1	1	2	2	1	1
btc(Register, Register)		0%		n/a	1	1	2	2	1	1
btc(Register, Immediate)		0%		n/a	1	1	2	2	1	1
btc(Mem, Register)		0%		n/a	1	1	2	2	1	1
btc(Mem, Immediate)		0%		n/a	1	1	2	2	1	1
btr(Register, Register)		0%		n/a	1	1	2	2	1	1
btr(Register, Immediate)		0%		n/a	1	1	2	2	1	1
btr(Mem, Register)		0%		n/a	1	1	2	2	1	1
btr(Mem, Immediate)		0%		n/a	1	1	2	2	1	1
bts(Register, Register)		0%		n/a	1	1	2	2	1	1
bts(Register, Immediate)		0%		n/a	1	1	2	2	1	1
bts(Mem, Register)		0%		n/a	1	1	2	2	1	1
bts(Mem, Immediate)		0%		n/a	1	1	2	2	1	1
call(long)		0%		n/a	1	1	2	2	1	1
cmova(Register, Register)		0%		n/a	1	1	1	1	1	1
cmova(Register, Mem)		0%		n/a	1	1	1	1	1	1
cmovae(Register, Register)		0%		n/a	1	1	1	1	1	1
cmovae(Register, Mem)		0%		n/a	1	1	1	1	1	1
cmovb(Register, Register)		0%		n/a	1	1	1	1	1	1
cmovb(Register, Mem)		0%		n/a	1	1	1	1	1	1
cmovbe(Register, Register)		0%		n/a	1	1	1	1	1	1
cmovbe(Register, Mem)		0%		n/a	1	1	1	1	1	1
cmovc(Register, Register)		0%		n/a	1	1	1	1	1	1
cmovc(Register, Mem)		0%		n/a	1	1	1	1	1	1
cmove(Register, Register)		0%		n/a	1	1	1	1	1	1
cmove(Register, Mem)		0%		n/a	1	1	1	1	1	1
cmovg(Register, Register)		0%		n/a	1	1	1	1	1	1
cmovg(Register, Mem)		0%		n/a	1	1	1	1	1	1
cmovge(Register, Register)		0%		n/a	1	1	1	1	1	1
cmovge(Register, Mem)		0%		n/a	1	1	1	1	1	1
cmovl(Register, Register)		0%		n/a	1	1	1	1	1	1
cmovl(Register, Mem)		0%		n/a	1	1	1	1	1	1
cmovle(Register, Register)		0%		n/a	1	1	1	1	1	1
cmovle(Register, Mem)		0%		n/a	1	1	1	1	1	1
cmovna(Register, Register)		0%		n/a	1	1	1	1	1	1
cmovna(Register, Mem)		0%		n/a	1	1	1	1	1	1
cmovnae(Register, Register)		0%		n/a	1	1	1	1	1	1
cmovnae(Register, Mem)		0%		n/a	1	1	1	1	1	1
cmovnb(Register, Register)		0%		n/a	1	1	1	1	1	1
cmovnb(Register, Mem)		0%		n/a	1	1	1	1	1	1
cmovnbe(Register, Register)		0%		n/a	1	1	1	1	1	1
cmovnbe(Register, Mem)		0%		n/a	1	1	1	1	1	1
cmovnc(Register, Register)		0%		n/a	1	1	1	1	1	1
cmovnc(Register, Mem)		0%		n/a	1	1	1	1	1	1
cmovne(Register, Register)		0%		n/a	1	1	1	1	1	1
cmovne(Register, Mem)		0%		n/a	1	1	1	1	1	1
cmovng(Register, Register)		0%		n/a	1	1	1	1	1	1
cmovng(Register, Mem)		0%		n/a	1	1	1	1	1	1
cmovnge(Register, Register)		0%		n/a	1	1	1	1	1	1
cmovnge(Register, Mem)		0%		n/a	1	1	1	1	1	1
cmovnl(Register, Register)		0%		n/a	1	1	1	1	1	1
cmovnl(Register, Mem)		0%		n/a	1	1	1	1	1	1
cmovnle(Register, Register)		0%		n/a	1	1	1	1	1	1
cmovnle(Register, Mem)		0%		n/a	1	1	1	1	1	1
cmovno(Register, Register)		0%		n/a	1	1	1	1	1	1
cmovno(Register, Mem)		0%		n/a	1	1	1	1	1	1
cmovnp(Register, Register)		0%		n/a	1	1	1	1	1	1
cmovnp(Register, Mem)		0%		n/a	1	1	1	1	1	1
cmovns(Register, Register)		0%		n/a	1	1	1	1	1	1
cmovns(Register, Mem)		0%		n/a	1	1	1	1	1	1
cmovnz(Register, Register)		0%		n/a	1	1	1	1	1	1
cmovnz(Register, Mem)		0%		n/a	1	1	1	1	1	1
cmovo(Register, Register)		0%		n/a	1	1	1	1	1	1
cmovo(Register, Mem)		0%		n/a	1	1	1	1	1	1
cmovp(Register, Register)		0%		n/a	1	1	1	1	1	1
cmovp(Register, Mem)		0%		n/a	1	1	1	1	1	1
cmovpe(Register, Register)		0%		n/a	1	1	1	1	1	1
cmovpe(Register, Mem)		0%		n/a	1	1	1	1	1	1
cmovpo(Register, Register)		0%		n/a	1	1	1	1	1	1
cmovpo(Register, Mem)		0%		n/a	1	1	1	1	1	1
cmovs(Register, Register)		0%		n/a	1	1	1	1	1	1
cmovs(Register, Mem)		0%		n/a	1	1	1	1	1	1
cmovz(Register, Register)		0%		n/a	1	1	1	1	1	1
cmovz(Register, Mem)		0%		n/a	1	1	1	1	1	1
cmp(Register, Register)		0%		n/a	1	1	2	2	1	1
cmp(Register, Mem)		0%		n/a	1	1	2	2	1	1
cmp(Register, Immediate)		0%		n/a	1	1	2	2	1	1
cmp(Mem, Register)		0%		n/a	1	1	2	2	1	1
cmp(Mem, Immediate)		0%		n/a	1	1	2	2	1	1
cmpxchg(Register, Register)		0%		n/a	1	1	2	2	1	1
cmpxchg(Mem, Register)		0%		n/a	1	1	2	2	1	1
enter(Immediate, Immediate)		0%		n/a	1	1	2	2	1	1
imul(Register, Register)		0%		n/a	1	1	2	2	1	1
imul(Register, Mem)		0%		n/a	1	1	2	2	1	1
imul(Register, Immediate)		0%		n/a	1	1	2	2	1	1
ja(Label, int)		0%		n/a	1	1	1	1	1	1
jae(Label, int)		0%		n/a	1	1	1	1	1	1
jb(Label, int)		0%		n/a	1	1	1	1	1	1
jbe(Label, int)		0%		n/a	1	1	1	1	1	1
jc(Label, int)		0%		n/a	1	1	1	1	1	1
je(Label, int)		0%		n/a	1	1	1	1	1	1
jg(Label, int)		0%		n/a	1	1	1	1	1	1
jge(Label, int)		0%		n/a	1	1	1	1	1	1
jl(Label, int)		0%		n/a	1	1	1	1	1	1
jle(Label, int)		0%		n/a	1	1	1	1	1	1
jna(Label, int)		0%		n/a	1	1	1	1	1	1
jnae(Label, int)		0%		n/a	1	1	1	1	1	1
jnb(Label, int)		0%		n/a	1	1	1	1	1	1
jnbe(Label, int)		0%		n/a	1	1	1	1	1	1
jnc(Label, int)		0%		n/a	1	1	1	1	1	1
jne(Label, int)		0%		n/a	1	1	1	1	1	1
jng(Label, int)		0%		n/a	1	1	1	1	1	1
jnge(Label, int)		0%		n/a	1	1	1	1	1	1
jnl(Label, int)		0%		n/a	1	1	1	1	1	1
jnle(Label, int)		0%		n/a	1	1	1	1	1	1
jno(Label, int)		0%		n/a	1	1	1	1	1	1
jnp(Label, int)		0%		n/a	1	1	1	1	1	1
jns(Label, int)		0%		n/a	1	1	1	1	1	1
jnz(Label, int)		0%		n/a	1	1	1	1	1	1
jo(Label, int)		0%		n/a	1	1	1	1	1	1
jp(Label, int)		0%		n/a	1	1	1	1	1	1
jpe(Label, int)		0%		n/a	1	1	1	1	1	1
jpo(Label, int)		0%		n/a	1	1	1	1	1	1
js(Label, int)		0%		n/a	1	1	1	1	1	1
jz(Label, int)		0%		n/a	1	1	1	1	1	1
ja_short(Label, int)		0%		n/a	1	1	1	1	1	1
jae_short(Label, int)		0%		n/a	1	1	1	1	1	1
jb_short(Label, int)		0%		n/a	1	1	1	1	1	1
jbe_short(Label, int)		0%		n/a	1	1	1	1	1	1
jc_short(Label, int)		0%		n/a	1	1	1	1	1	1
je_short(Label, int)		0%		n/a	1	1	1	1	1	1
jg_short(Label, int)		0%		n/a	1	1	1	1	1	1
jge_short(Label, int)		0%		n/a	1	1	1	1	1	1
jl_short(Label, int)		0%		n/a	1	1	1	1	1	1
jle_short(Label, int)		0%		n/a	1	1	1	1	1	1
jna_short(Label, int)		0%		n/a	1	1	1	1	1	1
jnae_short(Label, int)		0%		n/a	1	1	1	1	1	1
jnb_short(Label, int)		0%		n/a	1	1	1	1	1	1
jnbe_short(Label, int)		0%		n/a	1	1	1	1	1	1
jnc_short(Label, int)		0%		n/a	1	1	1	1	1	1
jne_short(Label, int)		0%		n/a	1	1	1	1	1	1
jng_short(Label, int)		0%		n/a	1	1	1	1	1	1
jnge_short(Label, int)		0%		n/a	1	1	1	1	1	1
jnl_short(Label, int)		0%		n/a	1	1	1	1	1	1
jnle_short(Label, int)		0%		n/a	1	1	1	1	1	1
jno_short(Label, int)		0%		n/a	1	1	1	1	1	1
jnp_short(Label, int)		0%		n/a	1	1	1	1	1	1
jns_short(Label, int)		0%		n/a	1	1	1	1	1	1
jnz_short(Label, int)		0%		n/a	1	1	1	1	1	1
jo_short(Label, int)		0%		n/a	1	1	1	1	1	1
jp_short(Label, int)		0%		n/a	1	1	1	1	1	1
jpe_short(Label, int)		0%		n/a	1	1	1	1	1	1
jpo_short(Label, int)		0%		n/a	1	1	1	1	1	1
js_short(Label, int)		0%		n/a	1	1	1	1	1	1
jz_short(Label, int)		0%		n/a	1	1	1	1	1	1
jmp(long)		0%		n/a	1	1	2	2	1	1
lea(Register, Mem)		0%		n/a	1	1	2	2	1	1
mov(Register, Register)		0%		n/a	1	1	2	2	1	1
mov(Register, Mem)		0%		n/a	1	1	2	2	1	1
mov(Register, Immediate)		0%		n/a	1	1	2	2	1	1
mov(Mem, Register)		0%		n/a	1	1	2	2	1	1
mov(Mem, Immediate)		0%		n/a	1	1	2	2	1	1
movsx(Register, Register)		0%		n/a	1	1	2	2	1	1
movsx(Register, Mem)		0%		n/a	1	1	2	2	1	1
movsxd(Register, Register)		0%		n/a	1	1	2	2	1	1
movsxd(Register, Mem)		0%		n/a	1	1	2	2	1	1
movzx(Register, Register)		0%		n/a	1	1	2	2	1	1
movzx(Register, Mem)		0%		n/a	1	1	2	2	1	1
or_(Register, Register)		0%		n/a	1	1	2	2	1	1
or_(Register, Mem)		0%		n/a	1	1	2	2	1	1
or_(Register, Immediate)		0%		n/a	1	1	2	2	1	1
or_(Mem, Register)		0%		n/a	1	1	2	2	1	1
or_(Mem, Immediate)		0%		n/a	1	1	2	2	1	1
rcl(Register, Register)		0%		n/a	1	1	2	2	1	1
rcl(Register, Immediate)		0%		n/a	1	1	2	2	1	1
rcl(Mem, Register)		0%		n/a	1	1	2	2	1	1
rcl(Mem, Immediate)		0%		n/a	1	1	2	2	1	1
rcr(Register, Register)		0%		n/a	1	1	2	2	1	1
rcr(Register, Immediate)		0%		n/a	1	1	2	2	1	1
rcr(Mem, Register)		0%		n/a	1	1	2	2	1	1
rcr(Mem, Immediate)		0%		n/a	1	1	2	2	1	1
rol(Register, Register)		0%		n/a	1	1	2	2	1	1
rol(Register, Immediate)		0%		n/a	1	1	2	2	1	1
rol(Mem, Register)		0%		n/a	1	1	2	2	1	1
rol(Mem, Immediate)		0%		n/a	1	1	2	2	1	1
ror(Register, Register)		0%		n/a	1	1	2	2	1	1
ror(Register, Immediate)		0%		n/a	1	1	2	2	1	1
ror(Mem, Register)		0%		n/a	1	1	2	2	1	1
ror(Mem, Immediate)		0%		n/a	1	1	2	2	1	1
sbb(Register, Register)		0%		n/a	1	1	2	2	1	1
sbb(Register, Mem)		0%		n/a	1	1	2	2	1	1
sbb(Register, Immediate)		0%		n/a	1	1	2	2	1	1
sbb(Mem, Register)		0%		n/a	1	1	2	2	1	1
sbb(Mem, Immediate)		0%		n/a	1	1	2	2	1	1
sal(Register, Register)		0%		n/a	1	1	2	2	1	1
sal(Register, Immediate)		0%		n/a	1	1	2	2	1	1
sal(Mem, Register)		0%		n/a	1	1	2	2	1	1
sal(Mem, Immediate)		0%		n/a	1	1	2	2	1	1
sar(Register, Register)		0%		n/a	1	1	2	2	1	1
sar(Register, Immediate)		0%		n/a	1	1	2	2	1	1
sar(Mem, Register)		0%		n/a	1	1	2	2	1	1
sar(Mem, Immediate)		0%		n/a	1	1	2	2	1	1
set(CONDITION, Register)		0%		n/a	1	1	2	2	1	1
set(CONDITION, Mem)		0%		n/a	1	1	2	2	1	1
shl(Register, Register)		0%		n/a	1	1	2	2	1	1
shl(Register, Immediate)		0%		n/a	1	1	2	2	1	1
shl(Mem, Register)		0%		n/a	1	1	2	2	1	1
shl(Mem, Immediate)		0%		n/a	1	1	2	2	1	1
shr(Register, Register)		0%		n/a	1	1	2	2	1	1
shr(Register, Immediate)		0%		n/a	1	1	2	2	1	1
shr(Mem, Register)		0%		n/a	1	1	2	2	1	1
shr(Mem, Immediate)		0%		n/a	1	1	2	2	1	1
sub(Register, Register)		0%		n/a	1	1	2	2	1	1
sub(Register, Mem)		0%		n/a	1	1	2	2	1	1
sub(Register, Immediate)		0%		n/a	1	1	2	2	1	1
sub(Mem, Register)		0%		n/a	1	1	2	2	1	1
sub(Mem, Immediate)		0%		n/a	1	1	2	2	1	1
test(Register, Register)		0%		n/a	1	1	2	2	1	1
test(Register, Immediate)		0%		n/a	1	1	2	2	1	1
test(Mem, Register)		0%		n/a	1	1	2	2	1	1
test(Mem, Immediate)		0%		n/a	1	1	2	2	1	1
xadd(Register, Register)		0%		n/a	1	1	2	2	1	1
xadd(Mem, Register)		0%		n/a	1	1	2	2	1	1
xchg(Register, Register)		0%		n/a	1	1	2	2	1	1
xchg(Mem, Register)		0%		n/a	1	1	2	2	1	1
xchg(Register, Mem)		0%		n/a	1	1	2	2	1	1
xor_(Register, Register)		0%		n/a	1	1	2	2	1	1
xor_(Register, Mem)		0%		n/a	1	1	2	2	1	1
xor_(Register, Immediate)		0%		n/a	1	1	2	2	1	1
xor_(Mem, Register)		0%		n/a	1	1	2	2	1	1
xor_(Mem, Immediate)		0%		n/a	1	1	2	2	1	1
fdivrp()		0%		n/a	1	1	2	2	1	1
fsubp()		0%		n/a	1	1	2	2	1	1
fsubrp()		0%		n/a	1	1	2	2	1	1
fucom()		0%		n/a	1	1	2	2	1	1
fucomip()		0%		n/a	1	1	2	2	1	1
fucomp()		0%		n/a	1	1	2	2	1	1
fxch()		0%		n/a	1	1	2	2	1	1
movd(Mem, MMRegister)		0%		n/a	1	1	2	2	1	1
movd(Register, MMRegister)		0%		n/a	1	1	2	2	1	1
movd(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
movd(MMRegister, Register)		0%		n/a	1	1	2	2	1	1
movq(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
movq(Mem, MMRegister)		0%		n/a	1	1	2	2	1	1
movq(Register, MMRegister)		0%		n/a	1	1	2	2	1	1
movq(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
movq(MMRegister, Register)		0%		n/a	1	1	2	2	1	1
packuswb(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
packuswb(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
paddb(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
paddb(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
paddw(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
paddw(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
paddd(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
paddd(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
paddsb(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
paddsb(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
paddsw(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
paddsw(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
paddusb(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
paddusb(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
paddusw(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
paddusw(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pand(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pand(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pandn(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pandn(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pcmpeqb(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pcmpeqb(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pcmpeqw(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pcmpeqw(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pcmpeqd(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pcmpeqd(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pcmpgtb(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pcmpgtb(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pcmpgtw(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pcmpgtw(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pcmpgtd(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pcmpgtd(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pmulhw(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pmulhw(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pmullw(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pmullw(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
por(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
por(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pmaddwd(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pmaddwd(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pslld(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pslld(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pslld(MMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
psllq(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
psllq(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
psllq(MMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
psllw(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
psllw(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
psllw(MMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
psrad(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
psrad(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
psrad(MMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
psraw(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
psraw(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
psraw(MMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
psrld(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
psrld(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
psrld(MMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
psrlq(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
psrlq(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
psrlq(MMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
psrlw(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
psrlw(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
psrlw(MMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
psubb(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
psubb(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
psubw(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
psubw(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
psubd(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
psubd(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
psubsb(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
psubsb(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
psubsw(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
psubsw(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
psubusb(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
psubusb(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
psubusw(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
psubusw(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
punpckhbw(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
punpckhbw(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
punpckhwd(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
punpckhwd(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
punpckhdq(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
punpckhdq(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
punpcklbw(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
punpcklbw(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
punpcklwd(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
punpcklwd(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
punpckldq(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
punpckldq(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pxor(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pxor(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pf2id(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pf2id(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pf2iw(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pf2iw(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pfacc(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pfacc(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pfadd(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pfadd(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pfcmpeq(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pfcmpeq(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pfcmpge(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pfcmpge(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pfcmpgt(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pfcmpgt(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pfmax(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pfmax(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pfmin(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pfmin(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pfmul(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pfmul(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pfnacc(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pfnacc(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pfpnaxx(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pfpnacc(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pfrcp(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pfrcp(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pfrcpit1(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pfrcpit1(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pfrcpit2(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pfrcpit2(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pfrsqit1(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pfrsqit1(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pfrsqrt(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pfrsqrt(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pfsub(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pfsub(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pfsubr(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pfsubr(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pi2fd(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pi2fd(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pi2fw(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pi2fw(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pswapd(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pswapd(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
addps(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
addps(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
addss(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
addss(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
andnps(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
andnps(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
andps(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
andps(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
comiss(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
comiss(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
cvtpi2ps(XMMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
cvtpi2ps(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
cvtps2pi(MMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
cvtps2pi(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
cvtsi2ss(XMMRegister, Register)		0%		n/a	1	1	2	2	1	1
cvtsi2ss(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
cvtss2si(Register, XMMRegister)		0%		n/a	1	1	2	2	1	1
cvtss2si(Register, Mem)		0%		n/a	1	1	2	2	1	1
cvttps2pi(MMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
cvttps2pi(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
cvttss2si(Register, XMMRegister)		0%		n/a	1	1	2	2	1	1
cvttss2si(Register, Mem)		0%		n/a	1	1	2	2	1	1
divps(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
divps(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
divss(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
divss(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
maskmovq(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
maxps(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
maxps(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
maxss(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
maxss(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
minps(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
minps(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
minss(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
minss(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
movaps(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
movaps(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
movaps(Mem, XMMRegister)		0%		n/a	1	1	2	2	1	1
movd(Mem, XMMRegister)		0%		n/a	1	1	2	2	1	1
movd(Register, XMMRegister)		0%		n/a	1	1	2	2	1	1
movd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
movd(XMMRegister, Register)		0%		n/a	1	1	2	2	1	1
movq(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
movq(Mem, XMMRegister)		0%		n/a	1	1	2	2	1	1
movq(Register, XMMRegister)		0%		n/a	1	1	2	2	1	1
movq(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
movq(XMMRegister, Register)		0%		n/a	1	1	2	2	1	1
movntq(Mem, MMRegister)		0%		n/a	1	1	2	2	1	1
movhlps(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
movhps(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
movhps(Mem, XMMRegister)		0%		n/a	1	1	2	2	1	1
movlhps(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
movlps(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
movlps(Mem, XMMRegister)		0%		n/a	1	1	2	2	1	1
movntps(Mem, XMMRegister)		0%		n/a	1	1	2	2	1	1
movss(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
movss(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
movss(Mem, XMMRegister)		0%		n/a	1	1	2	2	1	1
movups(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
movups(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
movups(Mem, XMMRegister)		0%		n/a	1	1	2	2	1	1
mulps(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
mulps(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
mulss(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
mulss(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
orps(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
orps(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pavgb(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pavgb(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pavgw(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pavgw(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pmaxsw(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pmaxsw(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pmaxub(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pmaxub(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pminsw(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pminsw(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pminub(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pminub(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pmovmskb(Register, MMRegister)		0%		n/a	1	1	2	2	1	1
pmulhuw(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pmulhuw(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
psadbw(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
psadbw(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
rcpps(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
rcpps(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
rcpss(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
rcpss(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
prefetch(Mem, Immediate)		0%		n/a	1	1	2	2	1	1
psadbw(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
psadbw(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
rsqrtps(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
rsqrtps(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
rsqrtss(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
rsqrtss(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
sqrtps(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
sqrtps(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
sqrtss(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
sqrtss(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
subps(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
subps(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
subss(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
subss(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
ucomiss(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
ucomiss(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
unpckhps(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
unpckhps(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
unpcklps(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
unpcklps(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
xorps(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
xorps(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
addpd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
addpd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
addsd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
addsd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
andnpd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
andnpd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
andpd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
andpd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
comisd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
comisd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
cvtdq2pd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
cvtdq2pd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
cvtdq2ps(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
cvtdq2ps(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
cvtpd2dq(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
cvtpd2dq(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
cvtpd2pi(MMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
cvtpd2pi(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
cvtpd2ps(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
cvtpd2ps(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
cvtpi2pd(XMMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
cvtpi2pd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
cvtps2dq(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
cvtps2dq(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
cvtps2pd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
cvtps2pd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
cvtsd2si(Register, XMMRegister)		0%		n/a	1	1	2	2	1	1
cvtsd2si(Register, Mem)		0%		n/a	1	1	2	2	1	1
cvtsd2ss(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
cvtsd2ss(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
cvtsi2sd(XMMRegister, Register)		0%		n/a	1	1	2	2	1	1
cvtsi2sd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
cvtss2sd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
cvtss2sd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
cvttpd2pi(MMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
cvttpd2pi(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
cvttpd2dq(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
cvttpd2dq(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
cvttps2dq(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
cvttps2dq(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
cvttsd2si(Register, XMMRegister)		0%		n/a	1	1	2	2	1	1
cvttsd2si(Register, Mem)		0%		n/a	1	1	2	2	1	1
divpd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
divpd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
divsd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
divsd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
maskmovdqu(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
maxpd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
maxpd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
maxsd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
maxsd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
minpd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
minpd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
minsd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
minsd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
movdqa(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
movdqa(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
movdqa(Mem, XMMRegister)		0%		n/a	1	1	2	2	1	1
movdqu(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
movdqu(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
movdqu(Mem, XMMRegister)		0%		n/a	1	1	2	2	1	1
movmskps(Register, XMMRegister)		0%		n/a	1	1	2	2	1	1
movmskpd(Register, XMMRegister)		0%		n/a	1	1	2	2	1	1
movsd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
movsd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
movsd(Mem, XMMRegister)		0%		n/a	1	1	2	2	1	1
movapd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
movapd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
movapd(Mem, XMMRegister)		0%		n/a	1	1	2	2	1	1
movdq2q(MMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
movq2dq(XMMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
movhpd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
movhpd(Mem, XMMRegister)		0%		n/a	1	1	2	2	1	1
movlpd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
movlpd(Mem, XMMRegister)		0%		n/a	1	1	2	2	1	1
movntdq(Mem, XMMRegister)		0%		n/a	1	1	2	2	1	1
movnti(Mem, Register)		0%		n/a	1	1	2	2	1	1
movntpd(Mem, XMMRegister)		0%		n/a	1	1	2	2	1	1
movupd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
movupd(Mem, XMMRegister)		0%		n/a	1	1	2	2	1	1
mulpd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
mulpd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
mulsd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
mulsd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
orpd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
orpd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
packsswb(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
packsswb(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
packssdw(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
packssdw(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
packuswb(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
packuswb(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
paddb(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
paddb(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
paddw(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
paddw(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
paddd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
paddd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
paddq(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
paddq(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
paddq(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
paddq(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
paddsb(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
paddsb(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
paddsw(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
paddsw(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
paddusb(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
paddusb(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
paddusw(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
paddusw(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pand(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pand(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pandn(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pandn(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pavgb(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pavgb(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pavgw(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pavgw(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pcmpeqb(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pcmpeqb(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pcmpeqw(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pcmpeqw(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pcmpeqd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pcmpeqd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pcmpgtb(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pcmpgtb(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pcmpgtw(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pcmpgtw(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pcmpgtd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pcmpgtd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pmaxsw(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pmaxsw(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pmaxub(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pmaxub(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pminsw(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pminsw(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pminub(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pminub(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pmovmskb(Register, XMMRegister)		0%		n/a	1	1	2	2	1	1
pmulhw(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pmulhw(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pmulhuw(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pmulhuw(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pmullw(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pmullw(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pmuludq(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pmuludq(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pmuludq(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pmuludq(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
por(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
por(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pslld(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pslld(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pslld(XMMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
psllq(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
psllq(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
psllq(XMMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
psllw(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
psllw(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
psllw(XMMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
pslldq(XMMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
psrad(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
psrad(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
psrad(XMMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
psraw(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
psraw(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
psraw(XMMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
psubb(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
psubb(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
psubw(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
psubw(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
psubd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
psubd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
psubq(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
psubq(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
psubq(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
psubq(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pmaddwd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pmaddwd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
psrld(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
psrld(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
psrld(XMMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
psrlq(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
psrlq(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
psrlq(XMMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
psrldq(XMMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
psrlw(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
psrlw(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
psrlw(XMMRegister, Immediate)		0%		n/a	1	1	2	2	1	1
psubsb(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
psubsb(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
psubsw(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
psubsw(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
psubusb(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
psubusb(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
psubusw(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
psubusw(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
punpckhbw(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
punpckhbw(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
punpckhwd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
punpckhwd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
punpckhdq(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
punpckhdq(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
punpckhqdq(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
punpckhqdq(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
punpcklbw(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
punpcklbw(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
punpcklwd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
punpcklwd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
punpckldq(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
punpckldq(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
punpcklqdq(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
punpcklqdq(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pxor(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pxor(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
sqrtpd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
sqrtpd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
sqrtsd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
sqrtsd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
subpd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
subpd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
subsd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
subsd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
ucomisd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
ucomisd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
unpckhpd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
unpckhpd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
unpcklpd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
unpcklpd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
xorpd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
xorpd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
addsubpd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
addsubpd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
addsubps(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
addsubps(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
haddpd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
haddpd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
haddps(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
haddps(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
hsubpd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
hsubpd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
hsubps(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
hsubps(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
lddqu(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
movddup(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
movddup(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
movshdup(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
movshdup(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
movsldup(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
movsldup(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
psignb(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
psignb(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
psignb(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
psignb(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
psignw(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
psignw(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
psignw(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
psignw(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
psignd(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
psignd(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
psignd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
psignd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
phaddw(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
phaddw(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
phaddw(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
phaddw(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
phaddd(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
phaddd(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
phaddd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
phaddd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
phaddsw(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
phaddsw(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
phaddsw(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
phaddsw(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
phsubw(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
phsubw(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
phsubw(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
phsubw(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
phsubd(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
phsubd(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
phsubd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
phsubd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
phsubsw(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
phsubsw(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
phsubsw(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
phsubsw(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pmaddubsw(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pmaddubsw(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pmaddubsw(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pmaddubsw(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pabsb(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pabsb(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pabsb(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pabsb(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pabsw(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pabsw(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pabsw(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pabsw(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pabsd(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pabsd(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pabsd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pabsd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pmulhrsw(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pmulhrsw(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pmulhrsw(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pmulhrsw(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pshufb(MMRegister, MMRegister)		0%		n/a	1	1	2	2	1	1
pshufb(MMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pshufb(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pshufb(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
blendvpd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
blendvpd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
blendvps(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
blendvps(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
movntdqa(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
packusdw(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
packusdw(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pblendvb(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pblendvb(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pcmpeqq(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pcmpeqq(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
phminposuw(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
phminposuw(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pmaxuw(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pmaxuw(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pmaxsb(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pmaxsb(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pmaxsd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pmaxsd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pmaxud(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pmaxud(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pminsb(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pminsb(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pminuw(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pminuw(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pminud(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pminud(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pminsd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pminsd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pmovsxbw(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pmovsxbw(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pmovsxbd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pmovsxbd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pmovsxbq(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pmovsxbq(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pmovsxwd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pmovsxwd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pmovsxwq(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pmovsxwq(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pmovsxdq(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pmovsxdq(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pmovzxbw(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pmovzxbw(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pmovzxbd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pmovzxbd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pmovzxbq(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pmovzxbq(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pmovzxwd(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pmovzxwd(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pmovzxwq(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pmovzxwq(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pmovzxdq(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pmovzxdq(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pmuldq(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pmuldq(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pmulld(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pmulld(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
ptest(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
ptest(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
pcmpgtq(XMMRegister, XMMRegister)		0%		n/a	1	1	2	2	1	1
pcmpgtq(XMMRegister, Mem)		0%		n/a	1	1	2	2	1	1
call(Mem)		0%		n/a	1	1	2	2	1	1
call(Immediate)		0%		n/a	1	1	2	2	1	1
call(Label)		0%		n/a	1	1	2	2	1	1
cmpxchg8b(Mem)		0%		n/a	1	1	2	2	1	1
cmpxchg16b(Mem)		0%		n/a	1	1	2	2	1	1
dec(Register)		0%		n/a	1	1	2	2	1	1
dec(Mem)		0%		n/a	1	1	2	2	1	1
div(Register)		0%		n/a	1	1	2	2	1	1
div(Mem)		0%		n/a	1	1	2	2	1	1
idiv(Register)		0%		n/a	1	1	2	2	1	1
idiv(Mem)		0%		n/a	1	1	2	2	1	1
imul(Register)		0%		n/a	1	1	2	2	1	1
imul(Mem)		0%		n/a	1	1	2	2	1	1
inc(Register)		0%		n/a	1	1	2	2	1	1
inc(Mem)		0%		n/a	1	1	2	2	1	1
jmp(Register)		0%		n/a	1	1	2	2	1	1
jmp(Mem)		0%		n/a	1	1	2	2	1	1
jmp(Immediate)		0%		n/a	1	1	2	2	1	1
jmp(Label)		0%		n/a	1	1	2	2	1	1
jmp_short(Label)		0%		n/a	1	1	2	2	1	1
mul(Register)		0%		n/a	1	1	2	2	1	1
mul(Mem)		0%		n/a	1	1	2	2	1	1
neg(Register)		0%		n/a	1	1	2	2	1	1
neg(Mem)		0%		n/a	1	1	2	2	1	1
not_(Register)		0%		n/a	1	1	2	2	1	1
not_(Mem)		0%		n/a	1	1	2	2	1	1
push(Register)		0%		n/a	1	1	2	2	1	1
push(Immediate)		0%		n/a	1	1	2	2	1	1
ret(Immediate)		0%		n/a	1	1	2	2	1	1
seta(Register)		0%		n/a	1	1	1	1	1	1
seta(Mem)		0%		n/a	1	1	1	1	1	1
setae(Register)		0%		n/a	1	1	1	1	1	1
setae(Mem)		0%		n/a	1	1	1	1	1	1
setb(Register)		0%		n/a	1	1	1	1	1	1
setb(Mem)		0%		n/a	1	1	1	1	1	1
setbe(Register)		0%		n/a	1	1	1	1	1	1
setbe(Mem)		0%		n/a	1	1	1	1	1	1
setc(Register)		0%		n/a	1	1	1	1	1	1
setc(Mem)		0%		n/a	1	1	1	1	1	1
sete(Register)		0%		n/a	1	1	1	1	1	1
sete(Mem)		0%		n/a	1	1	1	1	1	1
setg(Register)		0%		n/a	1	1	1	1	1	1
setg(Mem)		0%		n/a	1	1	1	1	1	1
setge(Register)		0%		n/a	1	1	1	1	1	1
setge(Mem)		0%		n/a	1	1	1	1	1	1
setl(Register)		0%		n/a	1	1	1	1	1	1
setl(Mem)		0%		n/a	1	1	1	1	1	1
setle(Register)		0%		n/a	1	1	1	1	1	1
setle(Mem)		0%		n/a	1	1	1	1	1	1
setna(Register)		0%		n/a	1	1	1	1	1	1
setna(Mem)		0%		n/a	1	1	1	1	1	1
setnae(Register)		0%		n/a	1	1	1	1	1	1
setnae(Mem)		0%		n/a	1	1	1	1	1	1
setnb(Register)		0%		n/a	1	1	1	1	1	1
setnb(Mem)		0%		n/a	1	1	1	1	1	1
setnbe(Register)		0%		n/a	1	1	1	1	1	1
setnbe(Mem)		0%		n/a	1	1	1	1	1	1
setnc(Register)		0%		n/a	1	1	1	1	1	1
setnc(Mem)		0%		n/a	1	1	1	1	1	1
setne(Register)		0%		n/a	1	1	1	1	1	1
setne(Mem)		0%		n/a	1	1	1	1	1	1
setng(Register)		0%		n/a	1	1	1	1	1	1
setng(Mem)		0%		n/a	1	1	1	1	1	1
setnge(Register)		0%		n/a	1	1	1	1	1	1
setnge(Mem)		0%		n/a	1	1	1	1	1	1
setnl(Register)		0%		n/a	1	1	1	1	1	1
setnl(Mem)		0%		n/a	1	1	1	1	1	1
setnle(Register)		0%		n/a	1	1	1	1	1	1
setnle(Mem)		0%		n/a	1	1	1	1	1	1
setno(Register)		0%		n/a	1	1	1	1	1	1
setno(Mem)		0%		n/a	1	1	1	1	1	1
setnp(Register)		0%		n/a	1	1	1	1	1	1
setnp(Mem)		0%		n/a	1	1	1	1	1	1
setns(Register)		0%		n/a	1	1	1	1	1	1
setns(Mem)		0%		n/a	1	1	1	1	1	1
setnz(Register)		0%		n/a	1	1	1	1	1	1
setnz(Mem)		0%		n/a	1	1	1	1	1	1
seto(Register)		0%		n/a	1	1	1	1	1	1
seto(Mem)		0%		n/a	1	1	1	1	1	1
setp(Register)		0%		n/a	1	1	1	1	1	1
setp(Mem)		0%		n/a	1	1	1	1	1	1
setpe(Register)		0%		n/a	1	1	1	1	1	1
setpe(Mem)		0%		n/a	1	1	1	1	1	1
setpo(Register)		0%		n/a	1	1	1	1	1	1
setpo(Mem)		0%		n/a	1	1	1	1	1	1
sets(Register)		0%		n/a	1	1	1	1	1	1
sets(Mem)		0%		n/a	1	1	1	1	1	1
setz(Register)		0%		n/a	1	1	1	1	1	1
setz(Mem)		0%		n/a	1	1	1	1	1	1
fadd(Mem)		0%		n/a	1	1	2	2	1	1
faddp(X87Register)		0%		n/a	1	1	2	2	1	1
faddp()		0%		n/a	1	1	2	2	1	1
fbld(Mem)		0%		n/a	1	1	2	2	1	1
fbstp(Mem)		0%		n/a	1	1	2	2	1	1
fcmovb(X87Register)		0%		n/a	1	1	2	2	1	1
fcmovbe(X87Register)		0%		n/a	1	1	2	2	1	1
fcmove(X87Register)		0%		n/a	1	1	2	2	1	1
fcmovnb(X87Register)		0%		n/a	1	1	2	2	1	1
fcmovnbe(X87Register)		0%		n/a	1	1	2	2	1	1
fcmovne(X87Register)		0%		n/a	1	1	2	2	1	1
fcmovnu(X87Register)		0%		n/a	1	1	2	2	1	1
fcmovu(X87Register)		0%		n/a	1	1	2	2	1	1
fcom(X87Register)		0%		n/a	1	1	2	2	1	1
fcom()		0%		n/a	1	1	2	2	1	1
fcom(Mem)		0%		n/a	1	1	2	2	1	1
fcomp(X87Register)		0%		n/a	1	1	2	2	1	1
fcomp()		0%		n/a	1	1	2	2	1	1
fcomp(Mem)		0%		n/a	1	1	2	2	1	1
fcomi(X87Register)		0%		n/a	1	1	2	2	1	1
fcomip(X87Register)		0%		n/a	1	1	2	2	1	1
fdiv(Mem)		0%		n/a	1	1	2	2	1	1
fdivp(X87Register)		0%		n/a	1	1	2	2	1	1
fdivp()		0%		n/a	1	1	2	2	1	1
fdivr(Mem)		0%		n/a	1	1	2	2	1	1
fdivrp(X87Register)		0%		n/a	1	1	2	2	1	1
ffree(X87Register)		0%		n/a	1	1	2	2	1	1
fld(X87Register)		0%		n/a	1	1	2	2	1	1
fldcw(Mem)		0%		n/a	1	1	2	2	1	1
fldenv(Mem)		0%		n/a	1	1	2	2	1	1
fmul(Mem)		0%		n/a	1	1	2	2	1	1
fmulp(X87Register)		0%		n/a	1	1	2	2	1	1
fmulp()		0%		n/a	1	1	2	2	1	1
fnsave(Mem)		0%		n/a	1	1	2	2	1	1
fnstenv(Mem)		0%		n/a	1	1	2	2	1	1
fnstcw(Mem)		0%		n/a	1	1	2	2	1	1
fnstsw(Mem)		0%		n/a	1	1	2	2	1	1
frstor(Mem)		0%		n/a	1	1	2	2	1	1
fsave(Mem)		0%		n/a	1	1	2	2	1	1
fst(X87Register)		0%		n/a	1	1	2	2	1	1
fstp(X87Register)		0%		n/a	1	1	2	2	1	1
fstcw(Mem)		0%		n/a	1	1	2	2	1	1
fstenv(Mem)		0%		n/a	1	1	2	2	1	1
fstsw(Mem)		0%		n/a	1	1	2	2	1	1
fsubp(X87Register)		0%		n/a	1	1	2	2	1	1
fsubrp(X87Register)		0%		n/a	1	1	2	2	1	1
fucom(X87Register)		0%		n/a	1	1	2	2	1	1
fucomi(X87Register)		0%		n/a	1	1	2	2	1	1
fucomip(X87Register)		0%		n/a	1	1	2	2	1	1
fucomp(X87Register)		0%		n/a	1	1	2	2	1	1
fxch(X87Register)		0%		n/a	1	1	2	2	1	1
fxrstor(Mem)		0%		n/a	1	1	2	2	1	1
fxsave(Mem)		0%		n/a	1	1	2	2	1	1
ldmxcsr(Mem)		0%		n/a	1	1	2	2	1	1
stmxcsr(Mem)		0%		n/a	1	1	2	2	1	1
clflush(Mem)		0%		n/a	1	1	2	2	1	1
fisttp(Mem)		0%		n/a	1	1	2	2	1	1
amd_prefetch(Mem)		0%		n/a	1	1	2	2	1	1
amd_prefetchw(Mem)		0%		n/a	1	1	2	2	1	1
cbw()		0%		n/a	1	1	2	2	1	1
cwde()		0%		n/a	1	1	2	2	1	1
cdqe()		0%		n/a	1	1	2	2	1	1
clc()		0%		n/a	1	1	2	2	1	1
cld()		0%		n/a	1	1	2	2	1	1
cmc()		0%		n/a	1	1	2	2	1	1
cpuid()		0%		n/a	1	1	2	2	1	1
daa()		0%		n/a	1	1	2	2	1	1
das()		0%		n/a	1	1	2	2	1	1
int3()		0%		n/a	1	1	2	2	1	1
leave()		0%		n/a	1	1	2	2	1	1
lock()		0%		n/a	1	1	2	2	1	1
nop()		0%		n/a	1	1	2	2	1	1
popad()		0%		n/a	1	1	2	2	1	1
popfd()		0%		n/a	1	1	1	1	1	1
popfq()		0%		n/a	1	1	1	1	1	1
pushad()		0%		n/a	1	1	2	2	1	1
pushfd()		0%		n/a	1	1	1	1	1	1
pushfq()		0%		n/a	1	1	1	1	1	1
rdtsc()		0%		n/a	1	1	2	2	1	1
rdtscp()		0%		n/a	1	1	2	2	1	1
ret()		0%		n/a	1	1	2	2	1	1
sahf()		0%		n/a	1	1	2	2	1	1
stc()		0%		n/a	1	1	2	2	1	1
std()		0%		n/a	1	1	2	2	1	1
ud2()		0%		n/a	1	1	2	2	1	1
f2xm1()		0%		n/a	1	1	2	2	1	1
fabs()		0%		n/a	1	1	2	2	1	1
fchs()		0%		n/a	1	1	2	2	1	1
fclex()		0%		n/a	1	1	2	2	1	1
fcompp()		0%		n/a	1	1	2	2	1	1
fcos()		0%		n/a	1	1	2	2	1	1
fdecstp()		0%		n/a	1	1	2	2	1	1
fincstp()		0%		n/a	1	1	2	2	1	1
finit()		0%		n/a	1	1	2	2	1	1
fninit()		0%		n/a	1	1	2	2	1	1
fld1()		0%		n/a	1	1	2	2	1	1
fldl2t()		0%		n/a	1	1	2	2	1	1
fldl2e()		0%		n/a	1	1	2	2	1	1
fldpi()		0%		n/a	1	1	2	2	1	1
fldlg2()		0%		n/a	1	1	2	2	1	1
fldln2()		0%		n/a	1	1	2	2	1	1
fldz()		0%		n/a	1	1	2	2	1	1
fnclex()		0%		n/a	1	1	2	2	1	1
fnop()		0%		n/a	1	1	2	2	1	1
fpatan()		0%		n/a	1	1	2	2	1	1
fprem()		0%		n/a	1	1	2	2	1	1
fprem1()		0%		n/a	1	1	2	2	1	1
fptan()		0%		n/a	1	1	2	2	1	1
frndint()		0%		n/a	1	1	2	2	1	1
fscale()		0%		n/a	1	1	2	2	1	1
fsin()		0%		n/a	1	1	2	2	1	1
fsincos()		0%		n/a	1	1	2	2	1	1
fsqrt()		0%		n/a	1	1	2	2	1	1
ftst()		0%		n/a	1	1	2	2	1	1
fucompp()		0%		n/a	1	1	2	2	1	1
fwait()		0%		n/a	1	1	2	2	1	1
fxam()		0%		n/a	1	1	2	2	1	1
fxtract()		0%		n/a	1	1	2	2	1	1
fyl2x()		0%		n/a	1	1	2	2	1	1
fyl2xp1()		0%		n/a	1	1	2	2	1	1
emms()		0%		n/a	1	1	2	2	1	1
femms()		0%		n/a	1	1	2	2	1	1
sfence()		0%		n/a	1	1	2	2	1	1
lfence()		0%		n/a	1	1	2	2	1	1
mfence()		0%		n/a	1	1	2	2	1	1
pause()		0%		n/a	1	1	2	2	1	1
monitor()		0%		n/a	1	1	2	2	1	1
mwait()		0%		n/a	1	1	2	2	1	1
SerializerIntrinsics()		0%		n/a	1	1	1	1	1	1