Coverage Report

Created: 2026-06-07 07:05

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/rust/registry/src/index.crates.io-1949cf8c6b5b557f/adler2-2.0.1/src/algo.rs
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Source
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use crate::Adler32;
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use std::ops::{AddAssign, MulAssign, RemAssign};
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impl Adler32 {
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0
    pub(crate) fn compute(&mut self, bytes: &[u8]) {
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        // The basic algorithm is, for every byte:
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        //   a = (a + byte) % MOD
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        //   b = (b + a) % MOD
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        // where MOD = 65521.
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        //
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        // For efficiency, we can defer the `% MOD` operations as long as neither a nor b overflows:
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        // - Between calls to `write`, we ensure that a and b are always in range 0..MOD.
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        // - We use 32-bit arithmetic in this function.
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        // - Therefore, a and b must not increase by more than 2^32-MOD without performing a `% MOD`
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        //   operation.
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        //
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        // According to Wikipedia, b is calculated as follows for non-incremental checksumming:
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        //   b = n×D1 + (n−1)×D2 + (n−2)×D3 + ... + Dn + n*1 (mod 65521)
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        // Where n is the number of bytes and Di is the i-th Byte. We need to change this to account
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        // for the previous values of a and b, as well as treat every input Byte as being 255:
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        //   b_inc = n×255 + (n-1)×255 + ... + 255 + n*65520
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        // Or in other words:
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        //   b_inc = n*65520 + n(n+1)/2*255
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        // The max chunk size is thus the largest value of n so that b_inc <= 2^32-65521.
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        //   2^32-65521 = n*65520 + n(n+1)/2*255
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        // Plugging this into an equation solver since I can't math gives n = 5552.18..., so 5552.
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        //
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        // On top of the optimization outlined above, the algorithm can also be parallelized with a
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        // bit more work:
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        //
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        // Note that b is a linear combination of a vector of input bytes (D1, ..., Dn).
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        //
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        // If we fix some value k<N and rewrite indices 1, ..., N as
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        //
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        //   1_1, 1_2, ..., 1_k, 2_1, ..., 2_k, ..., (N/k)_k,
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        //
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        // then we can express a and b in terms of sums of smaller sequences kb and ka:
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        //
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        //   ka(j) := D1_j + D2_j + ... + D(N/k)_j where j <= k
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        //   kb(j) := (N/k)*D1_j + (N/k-1)*D2_j + ... + D(N/k)_j where j <= k
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        //
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        //  a = ka(1) + ka(2) + ... + ka(k) + 1
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        //  b = k*(kb(1) + kb(2) + ... + kb(k)) - 1*ka(2) - ...  - (k-1)*ka(k) + N
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        //
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        // We use this insight to unroll the main loop and process k=4 bytes at a time.
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        // The resulting code is highly amenable to SIMD acceleration, although the immediate speedups
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        // stem from increased pipeline parallelism rather than auto-vectorization.
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        //
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        // This technique is described in-depth (here:)[https://software.intel.com/content/www/us/\
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        // en/develop/articles/fast-computation-of-fletcher-checksums.html]
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        const MOD: u32 = 65521;
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        const CHUNK_SIZE: usize = 5552 * 4;
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        let mut a = u32::from(self.a);
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        let mut b = u32::from(self.b);
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        let mut a_vec = U32X4([0; 4]);
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        let mut b_vec = a_vec;
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        let (bytes, remainder) = bytes.split_at(bytes.len() - bytes.len() % 4);
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        // iterate over 4 bytes at a time
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        let chunk_iter = bytes.chunks_exact(CHUNK_SIZE);
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        let remainder_chunk = chunk_iter.remainder();
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        for chunk in chunk_iter {
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            for byte_vec in chunk.chunks_exact(4) {
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                let val = U32X4::from(byte_vec);
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                a_vec += val;
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                b_vec += a_vec;
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            }
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            b += CHUNK_SIZE as u32 * a;
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            a_vec %= MOD;
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            b_vec %= MOD;
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            b %= MOD;
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        }
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        // special-case the final chunk because it may be shorter than the rest
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        for byte_vec in remainder_chunk.chunks_exact(4) {
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            let val = U32X4::from(byte_vec);
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            a_vec += val;
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            b_vec += a_vec;
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        }
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        b += remainder_chunk.len() as u32 * a;
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        a_vec %= MOD;
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        b_vec %= MOD;
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        b %= MOD;
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        // combine the sub-sum results into the main sum
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        b_vec *= 4;
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        b_vec.0[1] += MOD - a_vec.0[1];
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        b_vec.0[2] += (MOD - a_vec.0[2]) * 2;
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        b_vec.0[3] += (MOD - a_vec.0[3]) * 3;
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        for &av in a_vec.0.iter() {
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            a += av;
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        }
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        for &bv in b_vec.0.iter() {
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            b += bv;
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        }
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        // iterate over the remaining few bytes in serial
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        for &byte in remainder.iter() {
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            a += u32::from(byte);
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            b += a;
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        }
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        self.a = (a % MOD) as u16;
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        self.b = (b % MOD) as u16;
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    }
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}
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#[derive(Copy, Clone)]
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struct U32X4([u32; 4]);
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impl U32X4 {
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    #[inline]
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    fn from(bytes: &[u8]) -> Self {
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        U32X4([
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            u32::from(bytes[0]),
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            u32::from(bytes[1]),
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            u32::from(bytes[2]),
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            u32::from(bytes[3]),
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        ])
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    }
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}
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impl AddAssign<Self> for U32X4 {
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    #[inline]
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    fn add_assign(&mut self, other: Self) {
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        // Implement this in a primitive manner to help out the compiler a bit.
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        self.0[0] += other.0[0];
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        self.0[1] += other.0[1];
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        self.0[2] += other.0[2];
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        self.0[3] += other.0[3];
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    }
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}
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impl RemAssign<u32> for U32X4 {
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    #[inline]
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    fn rem_assign(&mut self, quotient: u32) {
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        self.0[0] %= quotient;
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        self.0[1] %= quotient;
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        self.0[2] %= quotient;
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        self.0[3] %= quotient;
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    }
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}
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impl MulAssign<u32> for U32X4 {
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    #[inline]
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    fn mul_assign(&mut self, rhs: u32) {
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        self.0[0] *= rhs;
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        self.0[1] *= rhs;
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        self.0[2] *= rhs;
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        self.0[3] *= rhs;
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    }
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}