/src/WasmEdge/lib/loader/ast/instruction.cpp
Line | Count | Source |
1 | | // SPDX-License-Identifier: Apache-2.0 |
2 | | // SPDX-FileCopyrightText: 2019-2024 Second State INC |
3 | | |
4 | | #include "loader/loader.h" |
5 | | |
6 | | #include <utility> |
7 | | |
8 | | using namespace std::literals; |
9 | | |
10 | | namespace WasmEdge { |
11 | | namespace Loader { |
12 | | |
13 | | // OpCode loader. See "include/loader/loader.h". |
14 | 8.17M | Expect<OpCode> Loader::loadOpCode() { |
15 | 8.17M | EXPECTED_TRY(uint8_t Prefix, FMgr.readByte()); |
16 | | |
17 | 8.17M | if (Prefix >= 0xFBU && Prefix <= 0xFEU) { |
18 | | // Multi-byte OpCode case. |
19 | 951k | EXPECTED_TRY(uint32_t Extend, FMgr.readU32()); |
20 | 951k | if (Prefix == 0xFBU) { |
21 | 41 | switch (Extend) { |
22 | 0 | #define UseOpCode |
23 | 0 | #define Line(NAME, STRING, PREFIX) |
24 | 0 | #define Line_FB(NAME, STRING, PREFIX, EXTEND) \ |
25 | 38 | case EXTEND: \ |
26 | 38 | return OpCode::NAME; |
27 | 0 | #define Line_FC(NAME, STRING, PREFIX, EXTEND) |
28 | 0 | #define Line_FD(NAME, STRING, PREFIX, EXTEND) |
29 | 0 | #define Line_FE(NAME, STRING, PREFIX, EXTEND) |
30 | 0 | #include "common/enum.inc" |
31 | 0 | #undef Line |
32 | 0 | #undef Line_FB |
33 | 0 | #undef Line_FC |
34 | 0 | #undef Line_FD |
35 | 0 | #undef Line_FE |
36 | 0 | #undef UseOpCode |
37 | 3 | default: |
38 | 3 | return Unexpect(ErrCode::Value::IllegalOpCode); |
39 | 41 | } |
40 | 951k | } else if (Prefix == 0xFCU) { |
41 | 29.0k | switch (Extend) { |
42 | 0 | #define UseOpCode |
43 | 0 | #define Line(NAME, STRING, PREFIX) |
44 | 0 | #define Line_FB(NAME, STRING, PREFIX, EXTEND) |
45 | 0 | #define Line_FC(NAME, STRING, PREFIX, EXTEND) \ |
46 | 29.0k | case EXTEND: \ |
47 | 29.0k | return OpCode::NAME; |
48 | 0 | #define Line_FD(NAME, STRING, PREFIX, EXTEND) |
49 | 0 | #define Line_FE(NAME, STRING, PREFIX, EXTEND) |
50 | 0 | #include "common/enum.inc" |
51 | 0 | #undef Line |
52 | 0 | #undef Line_FB |
53 | 0 | #undef Line_FC |
54 | 0 | #undef Line_FD |
55 | 0 | #undef Line_FE |
56 | 0 | #undef UseOpCode |
57 | 4 | default: |
58 | 4 | return Unexpect(ErrCode::Value::IllegalOpCode); |
59 | 29.0k | } |
60 | 922k | } else if (Prefix == 0xFDU) { |
61 | 914k | switch (Extend) { |
62 | 0 | #define UseOpCode |
63 | 0 | #define Line(NAME, STRING, PREFIX) |
64 | 0 | #define Line_FB(NAME, STRING, PREFIX, EXTEND) |
65 | 0 | #define Line_FC(NAME, STRING, PREFIX, EXTEND) |
66 | 0 | #define Line_FD(NAME, STRING, PREFIX, EXTEND) \ |
67 | 914k | case EXTEND: \ |
68 | 914k | return OpCode::NAME; |
69 | 0 | #define Line_FE(NAME, STRING, PREFIX, EXTEND) |
70 | 0 | #include "common/enum.inc" |
71 | 0 | #undef Line |
72 | 0 | #undef Line_FB |
73 | 0 | #undef Line_FC |
74 | 0 | #undef Line_FD |
75 | 0 | #undef Line_FE |
76 | 0 | #undef UseOpCode |
77 | 63 | default: |
78 | 63 | return Unexpect(ErrCode::Value::IllegalOpCode); |
79 | 914k | } |
80 | 914k | } else { |
81 | 8.12k | switch (Extend) { |
82 | 0 | #define UseOpCode |
83 | 0 | #define Line(NAME, STRING, PREFIX) |
84 | 0 | #define Line_FB(NAME, STRING, PREFIX, EXTEND) |
85 | 0 | #define Line_FC(NAME, STRING, PREFIX, EXTEND) |
86 | 0 | #define Line_FD(NAME, STRING, PREFIX, EXTEND) |
87 | 0 | #define Line_FE(NAME, STRING, PREFIX, EXTEND) \ |
88 | 8.11k | case EXTEND: \ |
89 | 8.11k | return OpCode::NAME; |
90 | 0 | #include "common/enum.inc" |
91 | 0 | #undef Line |
92 | 0 | #undef Line_FB |
93 | 0 | #undef Line_FC |
94 | 0 | #undef Line_FD |
95 | 0 | #undef Line_FE |
96 | 0 | #undef UseOpCode |
97 | 7 | default: |
98 | 7 | return Unexpect(ErrCode::Value::IllegalOpCode); |
99 | 8.12k | } |
100 | 8.12k | } |
101 | 7.22M | } else { |
102 | | // Single-byte OpCode case. |
103 | 7.22M | switch (Prefix) { |
104 | 0 | #define UseOpCode |
105 | 0 | #define Line(NAME, STRING, PREFIX) \ |
106 | 7.22M | case PREFIX: \ |
107 | 7.22M | return OpCode::NAME; |
108 | 0 | #define Line_FB(NAME, STRING, PREFIX, EXTEND) |
109 | 0 | #define Line_FC(NAME, STRING, PREFIX, EXTEND) |
110 | 0 | #define Line_FD(NAME, STRING, PREFIX, EXTEND) |
111 | 0 | #define Line_FE(NAME, STRING, PREFIX, EXTEND) |
112 | 0 | #include "common/enum.inc" |
113 | 0 | #undef Line |
114 | 0 | #undef Line_FB |
115 | 0 | #undef Line_FC |
116 | 0 | #undef Line_FD |
117 | 0 | #undef Line_FE |
118 | 0 | #undef UseOpCode |
119 | 100 | default: |
120 | 100 | return Unexpect(ErrCode::Value::IllegalOpCode); |
121 | 7.22M | } |
122 | 7.22M | } |
123 | 8.17M | } |
124 | | |
125 | | // Load instruction sequence. See "include/loader/loader.h". |
126 | 29.3k | Expect<AST::InstrVec> Loader::loadInstrSeq(std::optional<uint64_t> SizeBound) { |
127 | 29.3k | AST::InstrVec Instrs; |
128 | 29.3k | std::vector<std::pair<OpCode, uint32_t>> BlockStack; |
129 | 29.3k | uint32_t Cnt = 0; |
130 | 29.3k | bool IsReachEnd = false; |
131 | | // Read opcode until the End code of the top block. |
132 | 8.17M | do { |
133 | | // Read the opcode and check if error. |
134 | 8.17M | uint64_t Offset = FMgr.getOffset(); |
135 | 8.17M | EXPECTED_TRY(OpCode Code, loadOpCode().map_error([this](auto E) { |
136 | 8.17M | return logLoadError(E, FMgr.getLastOffset(), ASTNodeAttr::Instruction); |
137 | 8.17M | })); |
138 | | |
139 | | // Check with proposals. |
140 | 8.17M | if (auto Res = Conf.isInstrNeedProposal(Code); unlikely(!!Res)) { |
141 | 225 | return logNeedProposal(ErrCode::Value::IllegalOpCode, Res.value(), Offset, |
142 | 225 | ASTNodeAttr::Instruction); |
143 | 225 | } |
144 | | |
145 | 8.17M | auto logIllegalOpCode = [this, &Offset, |
146 | 8.17M | &SizeBound]() -> Unexpected<ErrCode> { |
147 | 38 | if (SizeBound.has_value() && FMgr.getOffset() > SizeBound.value()) { |
148 | 11 | return logLoadError(ErrCode::Value::ENDCodeExpected, Offset, |
149 | 11 | ASTNodeAttr::Instruction); |
150 | 27 | } else { |
151 | 27 | return logLoadError(ErrCode::Value::IllegalOpCode, Offset, |
152 | 27 | ASTNodeAttr::Instruction); |
153 | 27 | } |
154 | 38 | }; |
155 | | |
156 | | // Process the instruction which contains a block. |
157 | 8.17M | switch (Code) { |
158 | 102k | case OpCode::Block: |
159 | 208k | case OpCode::Loop: |
160 | 261k | case OpCode::If: |
161 | | // LEGACY-EH: remove the `Try` after deprecating legacy EH. |
162 | 261k | case OpCode::Try: |
163 | 261k | case OpCode::Try_table: |
164 | 261k | BlockStack.emplace_back(Code, Cnt); |
165 | 261k | break; |
166 | 3.01k | case OpCode::Else: { |
167 | 3.01k | if (BlockStack.size() == 0 || BlockStack.back().first != OpCode::If) { |
168 | | // An Else instruction appeared outside the If-block. |
169 | 35 | return logIllegalOpCode(); |
170 | 35 | } |
171 | 2.97k | uint32_t Pos = BlockStack.back().second; |
172 | 2.97k | if (Instrs[Pos].getJumpElse() > 0) { |
173 | | // An Else instruction appeared before in this If-block. |
174 | 3 | return logIllegalOpCode(); |
175 | 3 | } |
176 | 2.97k | Instrs[Pos].setJumpElse(Cnt - Pos); |
177 | 2.97k | break; |
178 | 2.97k | } |
179 | | // LEGACY-EH: remove the `Catch` cases after deprecating legacy EH. |
180 | 0 | case OpCode::Catch: |
181 | 0 | case OpCode::Catch_all: { |
182 | 0 | if (BlockStack.size() == 0 || BlockStack.back().first != OpCode::Try) { |
183 | | // A Catch/Catch_all instruction appeared outside a try-block. |
184 | 0 | return logIllegalOpCode(); |
185 | 0 | } |
186 | 0 | auto Pos = BlockStack.back().second; |
187 | 0 | auto &CatchClause = Instrs[Pos].getTryCatch().Catch; |
188 | 0 | if (CatchClause.size() > 0 && CatchClause.back().IsAll) { |
189 | | // A Catch shouldn't behind a Catch_all in the same block. |
190 | | // And also a try block may contain only one Catch_all instruction. |
191 | 0 | return logIllegalOpCode(); |
192 | 0 | } |
193 | 0 | break; |
194 | 0 | } |
195 | 7.90M | default: |
196 | 7.90M | break; |
197 | 8.17M | } |
198 | | |
199 | | // Create the instruction node and load contents. |
200 | 8.17M | Instrs.emplace_back(Code, static_cast<uint32_t>(Offset)); |
201 | 8.17M | EXPECTED_TRY(loadInstruction(Instrs.back())); |
202 | | |
203 | 8.17M | if (Code == OpCode::End) { |
204 | | // Post process the End instruction. |
205 | 51.5k | if (BlockStack.size() > 0) { |
206 | 25.2k | Instrs.back().setExprLast(false); |
207 | 25.2k | const auto &[BackOp, Pos] = BlockStack.back(); |
208 | 25.2k | if (BackOp == OpCode::Block || BackOp == OpCode::Loop || |
209 | 25.2k | BackOp == OpCode::If) { |
210 | 25.2k | Instrs.back().setTryBlockLast(false); |
211 | | // LEGACY-EH: remove this after deprecating legacy EH. |
212 | 25.2k | Instrs.back().setLegacyTryBlockLast(false); |
213 | 25.2k | Instrs[Pos].setJumpEnd(Cnt - Pos); |
214 | 25.2k | if (BackOp == OpCode::If) { |
215 | 10.4k | if (Instrs[Pos].getJumpElse() == 0) { |
216 | | // If block without else. Set the else jump the same as end jump. |
217 | 7.65k | Instrs[Pos].setJumpElse(Cnt - Pos); |
218 | 7.65k | } else { |
219 | 2.78k | const uint32_t ElsePos = Pos + Instrs[Pos].getJumpElse(); |
220 | 2.78k | Instrs[ElsePos].setJumpEnd(Cnt - ElsePos); |
221 | 2.78k | } |
222 | 10.4k | } |
223 | 25.2k | } else if (BackOp == OpCode::Try_table) { |
224 | 0 | Instrs.back().setTryBlockLast(true); |
225 | | // LEGACY-EH: remove this after deprecating legacy EH. |
226 | 0 | Instrs.back().setLegacyTryBlockLast(false); |
227 | 0 | Instrs[Pos].getTryCatch().JumpEnd = Cnt - Pos; |
228 | 0 | } else if (BackOp == OpCode::Try) { |
229 | | // LEGACY-EH: remove the `Try` case after deprecating legacy EH. |
230 | 0 | Instrs.back().setTryBlockLast(false); |
231 | 0 | Instrs.back().setLegacyTryBlockLast(true); |
232 | 0 | Instrs[Pos].getTryCatch().JumpEnd = Cnt - Pos; |
233 | 0 | } |
234 | 25.2k | BlockStack.pop_back(); |
235 | 26.3k | } else { |
236 | 26.3k | Instrs.back().setExprLast(true); |
237 | 26.3k | IsReachEnd = true; |
238 | 26.3k | } |
239 | 8.12M | } else if (Code == OpCode::Catch || Code == OpCode::Catch_all) { |
240 | | // LEGACY-EH: remove these cases after deprecating legacy EH. |
241 | 0 | uint32_t Pos = BlockStack.back().second; |
242 | 0 | auto &CatchClause = Instrs[Pos].getTryCatch().Catch; |
243 | 0 | auto &CatchDesc = Instrs.back().getCatchLegacy(); |
244 | 0 | CatchDesc.CatchPCOffset = Cnt - Pos; |
245 | 0 | CatchDesc.CatchIndex = static_cast<uint32_t>(CatchClause.size()); |
246 | 0 | CatchClause.push_back({true, |
247 | 0 | Code == OpCode::Catch_all, |
248 | 0 | false, |
249 | 0 | Code == OpCode::Catch ? CatchDesc.TagIndex : 0, |
250 | 0 | 0, |
251 | 0 | {0, 0, 0, 0}}); |
252 | 0 | } |
253 | 8.17M | Cnt++; |
254 | 8.17M | } while (!IsReachEnd); |
255 | | |
256 | | // Check the loaded offset should match the segment boundary. |
257 | 26.3k | if (SizeBound.has_value()) { |
258 | 17.5k | auto Offset = FMgr.getOffset(); |
259 | 17.5k | if (Offset < SizeBound.value()) { |
260 | 8 | return logLoadError(ErrCode::Value::JunkSection, Offset, |
261 | 8 | ASTNodeAttr::Instruction); |
262 | 17.5k | } else if (Offset > SizeBound.value()) { |
263 | 69 | return logLoadError(ErrCode::Value::SectionSizeMismatch, Offset, |
264 | 69 | ASTNodeAttr::Instruction); |
265 | 69 | } |
266 | 17.5k | } |
267 | 26.2k | return Instrs; |
268 | 26.3k | } |
269 | | |
270 | | // Load instruction node. See "include/loader/loader.h". |
271 | 8.17M | Expect<void> Loader::loadInstruction(AST::Instruction &Instr) { |
272 | | // Node: The instruction has checked for the proposals. Need to check their |
273 | | // immediates. |
274 | | |
275 | 8.17M | auto ReportError = [this](auto E) { |
276 | 550 | return logLoadError(E, FMgr.getLastOffset(), ASTNodeAttr::Instruction); |
277 | 550 | }; |
278 | | |
279 | 8.17M | auto readU8 = [this, ReportError](uint8_t &Dst) -> Expect<void> { |
280 | 70.4k | EXPECTED_TRY(Dst, FMgr.readByte().map_error(ReportError)); |
281 | 70.4k | return {}; |
282 | 70.4k | }; |
283 | | |
284 | 8.17M | auto readU32 = [this, ReportError](uint32_t &Dst) -> Expect<void> { |
285 | 496k | EXPECTED_TRY(Dst, FMgr.readU32().map_error(ReportError)); |
286 | 495k | return {}; |
287 | 496k | }; |
288 | | |
289 | 8.17M | auto readMemImmediate = [this, readU32, &Instr]() -> Expect<void> { |
290 | 158k | Instr.getTargetIndex() = 0; |
291 | 158k | EXPECTED_TRY(readU32(Instr.getMemoryAlign())); |
292 | 158k | if (Conf.hasProposal(Proposal::MultiMemories) && |
293 | 0 | Instr.getMemoryAlign() >= 64) { |
294 | 0 | Instr.getMemoryAlign() -= 64; |
295 | 0 | EXPECTED_TRY(readU32(Instr.getTargetIndex())); |
296 | 0 | } |
297 | 158k | if (unlikely(Instr.getMemoryAlign() >= 32)) { |
298 | | // This is for WASM32. May change for memory64 proposal in the future. |
299 | 230 | return logLoadError(ErrCode::Value::MalformedMemoryOpFlags, |
300 | 230 | FMgr.getLastOffset(), ASTNodeAttr::Instruction); |
301 | 230 | } |
302 | 158k | EXPECTED_TRY(readU32(Instr.getMemoryOffset())); |
303 | 158k | return {}; |
304 | 158k | }; |
305 | | |
306 | 8.17M | auto readCheckZero = [this, readU8](uint32_t &Dst) -> Expect<void> { |
307 | 24.0k | uint8_t C = 0; |
308 | 24.0k | EXPECTED_TRY(readU8(C)); |
309 | 23.9k | if (C != UINT8_C(0)) { |
310 | 21 | return logLoadError(ErrCode::Value::ExpectedZeroByte, |
311 | 21 | FMgr.getLastOffset(), ASTNodeAttr::Instruction); |
312 | 21 | } |
313 | 23.9k | Dst = 0; |
314 | 23.9k | return {}; |
315 | 23.9k | }; |
316 | | |
317 | 8.17M | auto readBlockType = [this, ReportError](BlockType &Dst) -> Expect<void> { |
318 | 261k | auto StartOffset = FMgr.getOffset(); |
319 | | // Read the block return type. |
320 | 261k | EXPECTED_TRY(int64_t Code, FMgr.readS33().map_error(ReportError)); |
321 | 261k | if (Code < 0) { |
322 | 55.7k | TypeCode TypeByte = static_cast<TypeCode>(Code & INT64_C(0x7F)); |
323 | 55.7k | if (TypeByte == TypeCode::Epsilon) { |
324 | | // Empty case. |
325 | 5.13k | Dst.setEmpty(); |
326 | 50.5k | } else { |
327 | | // Value type case. Seek back to the origin offset and read the |
328 | | // valtype. |
329 | 50.5k | FMgr.seek(StartOffset); |
330 | | // The AST node information is handled. |
331 | 50.5k | EXPECTED_TRY(auto Type, loadValType(ASTNodeAttr::Instruction)); |
332 | 50.5k | Dst.setData(Type); |
333 | 50.5k | } |
334 | 205k | } else { |
335 | | // Type index case. |
336 | 205k | if (unlikely(!Conf.hasProposal(Proposal::MultiValue))) { |
337 | 0 | return logNeedProposal(ErrCode::Value::MalformedValType, |
338 | 0 | Proposal::MultiValue, FMgr.getLastOffset(), |
339 | 0 | ASTNodeAttr::Instruction); |
340 | 0 | } |
341 | 205k | Dst.setData(static_cast<uint32_t>(Code)); |
342 | 205k | } |
343 | 261k | return {}; |
344 | 261k | }; |
345 | | |
346 | 8.17M | switch (Instr.getOpCode()) { |
347 | | // Control instructions. |
348 | 2.99M | case OpCode::Unreachable: |
349 | 3.30M | case OpCode::Nop: |
350 | 3.31M | case OpCode::Return: |
351 | 3.31M | case OpCode::Throw_ref: |
352 | 3.36M | case OpCode::End: |
353 | 3.36M | case OpCode::Else: |
354 | | // LEGACY-EH: remove the `Catch_all` case after deprecating legacy EH. |
355 | 3.36M | case OpCode::Catch_all: |
356 | 3.36M | return {}; |
357 | | |
358 | 102k | case OpCode::Block: |
359 | 208k | case OpCode::Loop: |
360 | 261k | case OpCode::If: |
361 | 261k | return readBlockType(Instr.getBlockType()); |
362 | | |
363 | 0 | case OpCode::Try_table: { |
364 | 0 | Instr.setTryCatch(); |
365 | | // Read the result type. |
366 | 0 | EXPECTED_TRY(readBlockType(Instr.getTryCatch().ResType)); |
367 | 0 | EXPECTED_TRY(uint32_t VecCnt, loadVecCnt().map_error(ReportError)); |
368 | 0 | Instr.getTryCatch().Catch.resize(VecCnt); |
369 | 0 | for (uint32_t I = 0; I < VecCnt; ++I) { |
370 | 0 | auto &Desc = Instr.getTryCatch().Catch[I]; |
371 | | // Read the catch flag. |
372 | 0 | EXPECTED_TRY(uint8_t Flag, FMgr.readByte().map_error(ReportError)); |
373 | | // LEGACY-EH: remove this `IsLegacy` flag after deprecating legacy EH. |
374 | 0 | Desc.IsLegacy = false; |
375 | 0 | Desc.IsRef = (Flag & 0x01U) ? true : false; |
376 | 0 | Desc.IsAll = (Flag & 0x02U) ? true : false; |
377 | 0 | if (!Desc.IsAll) { |
378 | | // Read the tag index. |
379 | 0 | EXPECTED_TRY(readU32(Desc.TagIndex)); |
380 | 0 | } |
381 | | // Read the label index. |
382 | 0 | EXPECTED_TRY(readU32(Desc.LabelIndex)); |
383 | 0 | } |
384 | 0 | return {}; |
385 | 0 | } |
386 | | |
387 | | // LEGACY-EH: remove the `Try` case after deprecating legacy EH. |
388 | 0 | case OpCode::Try: |
389 | 0 | Instr.setTryCatch(); |
390 | 0 | return readBlockType(Instr.getTryCatch().ResType); |
391 | | |
392 | | // LEGACY-EH: remove the `Catch` case after deprecating legacy EH. |
393 | 0 | case OpCode::Catch: |
394 | 0 | return readU32(Instr.getCatchLegacy().TagIndex); |
395 | | |
396 | 0 | case OpCode::Throw: |
397 | 0 | return readU32(Instr.getTargetIndex()); |
398 | | |
399 | | // LEGACY-EH: remove the `Rethrow` case after deprecating legacy EH. |
400 | 0 | case OpCode::Rethrow: |
401 | 0 | spdlog::error(ErrCode::Value::IllegalOpCode); |
402 | 0 | spdlog::error(" Deprecated `rethrow` instruction."sv); |
403 | 0 | return Unexpect(ErrCode::Value::IllegalOpCode); |
404 | | |
405 | 5.74k | case OpCode::Br: |
406 | 11.6k | case OpCode::Br_if: |
407 | 11.6k | case OpCode::Br_on_null: |
408 | 11.6k | case OpCode::Br_on_non_null: |
409 | 11.6k | return readU32(Instr.getJump().TargetIndex); |
410 | | |
411 | | // LEGACY-EH: remove the `Delegate` case after deprecating legacy EH. |
412 | 0 | case OpCode::Delegate: |
413 | 0 | spdlog::error(ErrCode::Value::IllegalOpCode); |
414 | 0 | spdlog::error(" Deprecated `delegate` instruction."sv); |
415 | 0 | return Unexpect(ErrCode::Value::IllegalOpCode); |
416 | | |
417 | 6.29k | case OpCode::Br_table: { |
418 | | // Read the vector of labels. |
419 | 6.29k | EXPECTED_TRY(uint32_t VecCnt, loadVecCnt().map_error(ReportError)); |
420 | 6.26k | Instr.setLabelListSize(VecCnt + 1); |
421 | 78.1k | for (uint32_t I = 0; I < VecCnt; ++I) { |
422 | 71.9k | EXPECTED_TRY(readU32(Instr.getLabelList()[I].TargetIndex)); |
423 | 71.9k | } |
424 | | // Read default label. |
425 | 6.25k | return readU32(Instr.getLabelList()[VecCnt].TargetIndex); |
426 | 6.26k | } |
427 | | |
428 | 6.84k | case OpCode::Call: |
429 | 6.84k | case OpCode::Return_call: |
430 | 6.84k | case OpCode::Call_ref: |
431 | 6.84k | case OpCode::Return_call_ref: |
432 | 6.84k | return readU32(Instr.getTargetIndex()); |
433 | | |
434 | 7.84k | case OpCode::Call_indirect: |
435 | 7.84k | case OpCode::Return_call_indirect: { |
436 | | // Read the type index. |
437 | 7.84k | EXPECTED_TRY(readU32(Instr.getTargetIndex())); |
438 | 7.83k | uint64_t SrcIdxOffset = FMgr.getOffset(); |
439 | | // Read the table index. |
440 | 7.83k | EXPECTED_TRY(readU32(Instr.getSourceIndex())); |
441 | 7.83k | if ((Instr.getSourceIndex() > 0 || FMgr.getOffset() - SrcIdxOffset > 1) && |
442 | 5.32k | !Conf.hasProposal(Proposal::ReferenceTypes)) { |
443 | 0 | return logNeedProposal(ErrCode::Value::ExpectedZeroByte, |
444 | 0 | Proposal::ReferenceTypes, FMgr.getLastOffset(), |
445 | 0 | ASTNodeAttr::Instruction); |
446 | 0 | } |
447 | 7.83k | return {}; |
448 | 7.83k | } |
449 | | |
450 | | // Reference Instructions. |
451 | 3.51k | case OpCode::Ref__null: |
452 | 3.51k | case OpCode::Ref__test_null: |
453 | 3.51k | case OpCode::Ref__cast_null: { |
454 | | // The AST node information is handled. |
455 | 3.51k | EXPECTED_TRY(auto Type, |
456 | 3.47k | loadHeapType(TypeCode::RefNull, ASTNodeAttr::Instruction)); |
457 | 3.47k | Instr.setValType(Type); |
458 | 3.47k | return {}; |
459 | 3.51k | } |
460 | 0 | case OpCode::Ref__test: |
461 | 0 | case OpCode::Ref__cast: { |
462 | | // The AST node information is handled. |
463 | 0 | EXPECTED_TRY(auto Type, |
464 | 0 | loadHeapType(TypeCode::Ref, ASTNodeAttr::Instruction)); |
465 | 0 | Instr.setValType(Type); |
466 | 0 | return {}; |
467 | 0 | } |
468 | 2.50k | case OpCode::Ref__is_null: |
469 | 2.50k | case OpCode::Ref__eq: |
470 | 2.50k | case OpCode::Ref__as_non_null: |
471 | 2.50k | return {}; |
472 | 7.25k | case OpCode::Ref__func: |
473 | 7.25k | case OpCode::Struct__new: |
474 | 7.25k | case OpCode::Struct__new_default: |
475 | 7.25k | case OpCode::Array__new: |
476 | 7.25k | case OpCode::Array__new_default: |
477 | 7.25k | case OpCode::Array__get: |
478 | 7.25k | case OpCode::Array__get_s: |
479 | 7.25k | case OpCode::Array__get_u: |
480 | 7.25k | case OpCode::Array__set: |
481 | 7.25k | case OpCode::Array__fill: |
482 | 7.25k | return readU32(Instr.getTargetIndex()); |
483 | 0 | case OpCode::Struct__get: |
484 | 0 | case OpCode::Struct__get_s: |
485 | 0 | case OpCode::Struct__get_u: |
486 | 0 | case OpCode::Struct__set: |
487 | 0 | case OpCode::Array__new_fixed: |
488 | 0 | case OpCode::Array__new_data: |
489 | 0 | case OpCode::Array__new_elem: |
490 | 0 | case OpCode::Array__copy: |
491 | 0 | case OpCode::Array__init_data: |
492 | 0 | case OpCode::Array__init_elem: |
493 | 0 | EXPECTED_TRY(readU32(Instr.getTargetIndex())); |
494 | 0 | return readU32(Instr.getSourceIndex()); |
495 | 0 | case OpCode::Br_on_cast: |
496 | 0 | case OpCode::Br_on_cast_fail: { |
497 | | // Read the flag. |
498 | 0 | uint8_t Flag = 0U; |
499 | 0 | EXPECTED_TRY(readU8(Flag).map_error(ReportError)); |
500 | | // Read the label index. |
501 | 0 | uint32_t LabelIdx = 0U; |
502 | 0 | EXPECTED_TRY(readU32(LabelIdx).map_error(ReportError)); |
503 | | // Read the heap types. |
504 | 0 | Instr.setBrCast(LabelIdx); |
505 | 0 | TypeCode TC = ((Flag & 0x01U) ? TypeCode::RefNull : TypeCode::Ref); |
506 | 0 | EXPECTED_TRY( |
507 | 0 | Instr.getBrCast().RType1, |
508 | 0 | loadHeapType(TC, ASTNodeAttr::Instruction).map_error(ReportError)); |
509 | 0 | TC = ((Flag & 0x02U) ? TypeCode::RefNull : TypeCode::Ref); |
510 | 0 | EXPECTED_TRY( |
511 | 0 | Instr.getBrCast().RType2, |
512 | 0 | loadHeapType(TC, ASTNodeAttr::Instruction).map_error(ReportError)); |
513 | 0 | return {}; |
514 | 0 | } |
515 | 0 | case OpCode::Array__len: |
516 | 0 | case OpCode::Any__convert_extern: |
517 | 0 | case OpCode::Extern__convert_any: |
518 | 0 | case OpCode::Ref__i31: |
519 | 0 | case OpCode::I31__get_s: |
520 | 0 | case OpCode::I31__get_u: |
521 | 0 | return {}; |
522 | | |
523 | | // Parametric Instructions. |
524 | 22.9k | case OpCode::Drop: |
525 | 31.1k | case OpCode::Select: |
526 | 31.1k | return {}; |
527 | 1.88k | case OpCode::Select_t: { |
528 | | // Read the vector of value types. |
529 | 1.88k | EXPECTED_TRY(uint32_t VecCnt, loadVecCnt().map_error(ReportError)); |
530 | 1.87k | Instr.setValTypeListSize(VecCnt); |
531 | 3.53k | for (uint32_t I = 0; I < VecCnt; ++I) { |
532 | | // The AST node information is handled. |
533 | 1.67k | EXPECTED_TRY(Instr.getValTypeList()[I], |
534 | 1.66k | loadValType(ASTNodeAttr::Instruction)); |
535 | 1.66k | } |
536 | 1.85k | return {}; |
537 | 1.87k | } |
538 | | |
539 | | // Variable Instructions. |
540 | 28.2k | case OpCode::Local__get: |
541 | 38.0k | case OpCode::Local__set: |
542 | 46.5k | case OpCode::Local__tee: |
543 | 47.8k | case OpCode::Global__get: |
544 | 48.8k | case OpCode::Global__set: |
545 | 48.8k | return readU32(Instr.getTargetIndex()); |
546 | | |
547 | | // Table Instructions. |
548 | 264 | case OpCode::Table__init: |
549 | 264 | EXPECTED_TRY(readU32(Instr.getSourceIndex())); |
550 | 262 | [[fallthrough]]; |
551 | 2.45k | case OpCode::Table__get: |
552 | 3.52k | case OpCode::Table__set: |
553 | 4.75k | case OpCode::Table__grow: |
554 | 5.62k | case OpCode::Table__size: |
555 | 5.91k | case OpCode::Table__fill: |
556 | 7.82k | case OpCode::Elem__drop: |
557 | 7.82k | return readU32(Instr.getTargetIndex()); |
558 | 477 | case OpCode::Table__copy: |
559 | 477 | EXPECTED_TRY(readU32(Instr.getTargetIndex())); |
560 | 475 | return readU32(Instr.getSourceIndex()); |
561 | | |
562 | | // Memory Instructions. |
563 | 4.26k | case OpCode::I32__load: |
564 | 11.9k | case OpCode::I64__load: |
565 | 12.3k | case OpCode::F32__load: |
566 | 15.0k | case OpCode::F64__load: |
567 | 17.9k | case OpCode::I32__load8_s: |
568 | 19.4k | case OpCode::I32__load8_u: |
569 | 21.9k | case OpCode::I32__load16_s: |
570 | 29.3k | case OpCode::I32__load16_u: |
571 | 33.4k | case OpCode::I64__load8_s: |
572 | 37.5k | case OpCode::I64__load8_u: |
573 | 42.6k | case OpCode::I64__load16_s: |
574 | 51.7k | case OpCode::I64__load16_u: |
575 | 55.8k | case OpCode::I64__load32_s: |
576 | 59.4k | case OpCode::I64__load32_u: |
577 | 61.4k | case OpCode::I32__store: |
578 | 66.4k | case OpCode::I64__store: |
579 | 69.1k | case OpCode::F32__store: |
580 | 70.2k | case OpCode::F64__store: |
581 | 73.4k | case OpCode::I32__store8: |
582 | 77.7k | case OpCode::I32__store16: |
583 | 80.1k | case OpCode::I64__store8: |
584 | 83.5k | case OpCode::I64__store16: |
585 | 84.5k | case OpCode::I64__store32: |
586 | 84.5k | return readMemImmediate(); |
587 | | |
588 | 736 | case OpCode::Memory__init: |
589 | 736 | if (!HasDataSection) { |
590 | 2 | return logLoadError(ErrCode::Value::DataCountRequired, Instr.getOffset(), |
591 | 2 | ASTNodeAttr::Instruction); |
592 | 2 | } |
593 | 734 | EXPECTED_TRY(readU32(Instr.getSourceIndex())); |
594 | 729 | [[fallthrough]]; |
595 | 8.20k | case OpCode::Memory__grow: |
596 | 19.2k | case OpCode::Memory__size: |
597 | 21.6k | case OpCode::Memory__fill: |
598 | 21.6k | if (Conf.hasProposal(Proposal::MultiMemories)) { |
599 | 0 | return readU32(Instr.getTargetIndex()); |
600 | 0 | } |
601 | 21.6k | return readCheckZero(Instr.getTargetIndex()); |
602 | 692 | case OpCode::Memory__copy: |
603 | 692 | if (Conf.hasProposal(Proposal::MultiMemories)) { |
604 | 0 | EXPECTED_TRY(readU32(Instr.getTargetIndex())); |
605 | 0 | return readU32(Instr.getSourceIndex()); |
606 | 0 | } |
607 | 692 | EXPECTED_TRY(readCheckZero(Instr.getTargetIndex())); |
608 | 691 | return readCheckZero(Instr.getSourceIndex()); |
609 | 677 | case OpCode::Data__drop: |
610 | 677 | if (!HasDataSection) { |
611 | 1 | return logLoadError(ErrCode::Value::DataCountRequired, Instr.getOffset(), |
612 | 1 | ASTNodeAttr::Instruction); |
613 | 1 | } |
614 | 676 | return readU32(Instr.getTargetIndex()); |
615 | | |
616 | | // Const Instructions. |
617 | 2.11M | case OpCode::I32__const: |
618 | 2.11M | EXPECTED_TRY(FMgr.readS32().map_error(ReportError).map([&](int32_t Num) { |
619 | 2.11M | Instr.setNum(static_cast<uint32_t>(Num)); |
620 | 2.11M | })); |
621 | 2.11M | return {}; |
622 | 281k | case OpCode::I64__const: |
623 | 281k | EXPECTED_TRY(FMgr.readS64().map_error(ReportError).map([&](int64_t Num) { |
624 | 281k | Instr.setNum(static_cast<uint64_t>(Num)); |
625 | 281k | })); |
626 | 281k | return {}; |
627 | 39.0k | case OpCode::F32__const: |
628 | 39.0k | EXPECTED_TRY(FMgr.readF32().map_error(ReportError).map([&](float Num) { |
629 | 39.0k | Instr.setNum(Num); |
630 | 39.0k | })); |
631 | 39.0k | return {}; |
632 | 16.4k | case OpCode::F64__const: |
633 | 16.4k | EXPECTED_TRY(FMgr.readF64().map_error(ReportError).map([&](double Num) { |
634 | 16.4k | Instr.setNum(Num); |
635 | 16.4k | })); |
636 | 16.4k | return {}; |
637 | | |
638 | | // Unary Numeric Instructions. |
639 | 21.7k | case OpCode::I32__eqz: |
640 | 37.7k | case OpCode::I32__clz: |
641 | 43.9k | case OpCode::I32__ctz: |
642 | 127k | case OpCode::I32__popcnt: |
643 | 138k | case OpCode::I64__eqz: |
644 | 140k | case OpCode::I64__clz: |
645 | 143k | case OpCode::I64__ctz: |
646 | 161k | case OpCode::I64__popcnt: |
647 | 162k | case OpCode::F32__abs: |
648 | 165k | case OpCode::F32__neg: |
649 | 169k | case OpCode::F32__ceil: |
650 | 170k | case OpCode::F32__floor: |
651 | 173k | case OpCode::F32__trunc: |
652 | 180k | case OpCode::F32__nearest: |
653 | 188k | case OpCode::F32__sqrt: |
654 | 190k | case OpCode::F64__abs: |
655 | 193k | case OpCode::F64__neg: |
656 | 201k | case OpCode::F64__ceil: |
657 | 204k | case OpCode::F64__floor: |
658 | 206k | case OpCode::F64__trunc: |
659 | 207k | case OpCode::F64__nearest: |
660 | 214k | case OpCode::F64__sqrt: |
661 | 218k | case OpCode::I32__wrap_i64: |
662 | 224k | case OpCode::I32__trunc_f32_s: |
663 | 231k | case OpCode::I32__trunc_f32_u: |
664 | 234k | case OpCode::I32__trunc_f64_s: |
665 | 239k | case OpCode::I32__trunc_f64_u: |
666 | 249k | case OpCode::I64__extend_i32_s: |
667 | 254k | case OpCode::I64__extend_i32_u: |
668 | 257k | case OpCode::I64__trunc_f32_s: |
669 | 259k | case OpCode::I64__trunc_f32_u: |
670 | 262k | case OpCode::I64__trunc_f64_s: |
671 | 266k | case OpCode::I64__trunc_f64_u: |
672 | 274k | case OpCode::F32__convert_i32_s: |
673 | 278k | case OpCode::F32__convert_i32_u: |
674 | 282k | case OpCode::F32__convert_i64_s: |
675 | 288k | case OpCode::F32__convert_i64_u: |
676 | 289k | case OpCode::F32__demote_f64: |
677 | 297k | case OpCode::F64__convert_i32_s: |
678 | 304k | case OpCode::F64__convert_i32_u: |
679 | 328k | case OpCode::F64__convert_i64_s: |
680 | 329k | case OpCode::F64__convert_i64_u: |
681 | 331k | case OpCode::F64__promote_f32: |
682 | 336k | case OpCode::I32__reinterpret_f32: |
683 | 341k | case OpCode::I64__reinterpret_f64: |
684 | 360k | case OpCode::F32__reinterpret_i32: |
685 | 368k | case OpCode::F64__reinterpret_i64: |
686 | 377k | case OpCode::I32__extend8_s: |
687 | 388k | case OpCode::I32__extend16_s: |
688 | 389k | case OpCode::I64__extend8_s: |
689 | 410k | case OpCode::I64__extend16_s: |
690 | 417k | case OpCode::I64__extend32_s: |
691 | 421k | case OpCode::I32__trunc_sat_f32_s: |
692 | 423k | case OpCode::I32__trunc_sat_f32_u: |
693 | 426k | case OpCode::I32__trunc_sat_f64_s: |
694 | 427k | case OpCode::I32__trunc_sat_f64_u: |
695 | 429k | case OpCode::I64__trunc_sat_f32_s: |
696 | 431k | case OpCode::I64__trunc_sat_f32_u: |
697 | 435k | case OpCode::I64__trunc_sat_f64_s: |
698 | 437k | case OpCode::I64__trunc_sat_f64_u: |
699 | | |
700 | | // Binary Numeric Instructions. |
701 | 441k | case OpCode::I32__eq: |
702 | 444k | case OpCode::I32__ne: |
703 | 456k | case OpCode::I32__lt_s: |
704 | 481k | case OpCode::I32__lt_u: |
705 | 488k | case OpCode::I32__gt_s: |
706 | 511k | case OpCode::I32__gt_u: |
707 | 522k | case OpCode::I32__le_s: |
708 | 525k | case OpCode::I32__le_u: |
709 | 534k | case OpCode::I32__ge_s: |
710 | 540k | case OpCode::I32__ge_u: |
711 | 542k | case OpCode::I64__eq: |
712 | 546k | case OpCode::I64__ne: |
713 | 553k | case OpCode::I64__lt_s: |
714 | 554k | case OpCode::I64__lt_u: |
715 | 557k | case OpCode::I64__gt_s: |
716 | 558k | case OpCode::I64__gt_u: |
717 | 562k | case OpCode::I64__le_s: |
718 | 570k | case OpCode::I64__le_u: |
719 | 571k | case OpCode::I64__ge_s: |
720 | 574k | case OpCode::I64__ge_u: |
721 | 577k | case OpCode::F32__eq: |
722 | 578k | case OpCode::F32__ne: |
723 | 581k | case OpCode::F32__lt: |
724 | 597k | case OpCode::F32__gt: |
725 | 601k | case OpCode::F32__le: |
726 | 604k | case OpCode::F32__ge: |
727 | 609k | case OpCode::F64__eq: |
728 | 627k | case OpCode::F64__ne: |
729 | 630k | case OpCode::F64__lt: |
730 | 633k | case OpCode::F64__gt: |
731 | 635k | case OpCode::F64__le: |
732 | 640k | case OpCode::F64__ge: |
733 | | |
734 | 644k | case OpCode::I32__add: |
735 | 650k | case OpCode::I32__sub: |
736 | 654k | case OpCode::I32__mul: |
737 | 670k | case OpCode::I32__div_s: |
738 | 689k | case OpCode::I32__div_u: |
739 | 694k | case OpCode::I32__rem_s: |
740 | 700k | case OpCode::I32__rem_u: |
741 | 704k | case OpCode::I32__and: |
742 | 711k | case OpCode::I32__or: |
743 | 720k | case OpCode::I32__xor: |
744 | 734k | case OpCode::I32__shl: |
745 | 742k | case OpCode::I32__shr_s: |
746 | 766k | case OpCode::I32__shr_u: |
747 | 780k | case OpCode::I32__rotl: |
748 | 787k | case OpCode::I32__rotr: |
749 | 797k | case OpCode::I64__add: |
750 | 803k | case OpCode::I64__sub: |
751 | 807k | case OpCode::I64__mul: |
752 | 810k | case OpCode::I64__div_s: |
753 | 819k | case OpCode::I64__div_u: |
754 | 826k | case OpCode::I64__rem_s: |
755 | 828k | case OpCode::I64__rem_u: |
756 | 831k | case OpCode::I64__and: |
757 | 839k | case OpCode::I64__or: |
758 | 872k | case OpCode::I64__xor: |
759 | 874k | case OpCode::I64__shl: |
760 | 878k | case OpCode::I64__shr_s: |
761 | 882k | case OpCode::I64__shr_u: |
762 | 891k | case OpCode::I64__rotl: |
763 | 897k | case OpCode::I64__rotr: |
764 | 899k | case OpCode::F32__add: |
765 | 903k | case OpCode::F32__sub: |
766 | 907k | case OpCode::F32__mul: |
767 | 908k | case OpCode::F32__div: |
768 | 909k | case OpCode::F32__min: |
769 | 912k | case OpCode::F32__max: |
770 | 913k | case OpCode::F32__copysign: |
771 | 917k | case OpCode::F64__add: |
772 | 926k | case OpCode::F64__sub: |
773 | 927k | case OpCode::F64__mul: |
774 | 929k | case OpCode::F64__div: |
775 | 931k | case OpCode::F64__min: |
776 | 934k | case OpCode::F64__max: |
777 | 935k | case OpCode::F64__copysign: |
778 | 935k | return {}; |
779 | | |
780 | | // SIMD Memory Instruction. |
781 | 24.3k | case OpCode::V128__load: |
782 | 28.2k | case OpCode::V128__load8x8_s: |
783 | 28.8k | case OpCode::V128__load8x8_u: |
784 | 30.0k | case OpCode::V128__load16x4_s: |
785 | 33.6k | case OpCode::V128__load16x4_u: |
786 | 36.0k | case OpCode::V128__load32x2_s: |
787 | 36.7k | case OpCode::V128__load32x2_u: |
788 | 38.4k | case OpCode::V128__load8_splat: |
789 | 41.9k | case OpCode::V128__load16_splat: |
790 | 44.4k | case OpCode::V128__load32_splat: |
791 | 45.8k | case OpCode::V128__load64_splat: |
792 | 49.5k | case OpCode::V128__load32_zero: |
793 | 50.0k | case OpCode::V128__load64_zero: |
794 | 51.2k | case OpCode::V128__store: |
795 | 51.2k | return readMemImmediate(); |
796 | 837 | case OpCode::V128__load8_lane: |
797 | 5.33k | case OpCode::V128__load16_lane: |
798 | 6.40k | case OpCode::V128__load32_lane: |
799 | 7.89k | case OpCode::V128__load64_lane: |
800 | 9.80k | case OpCode::V128__store8_lane: |
801 | 10.2k | case OpCode::V128__store16_lane: |
802 | 14.4k | case OpCode::V128__store32_lane: |
803 | 15.7k | case OpCode::V128__store64_lane: |
804 | | // Read memory immediate. |
805 | 15.7k | EXPECTED_TRY(readMemImmediate()); |
806 | | // Read lane index. |
807 | 15.7k | return readU8(Instr.getMemoryLane()); |
808 | | |
809 | | // SIMD Const Instruction. |
810 | 885 | case OpCode::V128__const: |
811 | | // SIMD Shuffle Instruction. |
812 | 1.95k | case OpCode::I8x16__shuffle: { |
813 | | // Read value. |
814 | 1.95k | uint128_t Value = 0U; |
815 | 32.9k | for (uint32_t I = 0U; I < 16U; ++I) { |
816 | 30.9k | EXPECTED_TRY(FMgr.readByte().map_error(ReportError).map([&](uint8_t B) { |
817 | 30.9k | Value |= static_cast<uint128_t>(static_cast<uint32_t>(B)) << (I * 8U); |
818 | 30.9k | })); |
819 | 30.9k | } |
820 | 1.93k | Instr.setNum(Value); |
821 | 1.93k | return {}; |
822 | 1.95k | } |
823 | | |
824 | | // SIMD Lane Instructions. |
825 | 4.47k | case OpCode::I8x16__extract_lane_s: |
826 | 5.01k | case OpCode::I8x16__extract_lane_u: |
827 | 8.06k | case OpCode::I8x16__replace_lane: |
828 | 11.7k | case OpCode::I16x8__extract_lane_s: |
829 | 13.1k | case OpCode::I16x8__extract_lane_u: |
830 | 15.3k | case OpCode::I16x8__replace_lane: |
831 | 19.9k | case OpCode::I32x4__extract_lane: |
832 | 21.4k | case OpCode::I32x4__replace_lane: |
833 | 22.5k | case OpCode::I64x2__extract_lane: |
834 | 24.4k | case OpCode::I64x2__replace_lane: |
835 | 25.4k | case OpCode::F32x4__extract_lane: |
836 | 26.9k | case OpCode::F32x4__replace_lane: |
837 | 28.7k | case OpCode::F64x2__extract_lane: |
838 | 30.7k | case OpCode::F64x2__replace_lane: |
839 | | // Read lane index. |
840 | 30.7k | return readU8(Instr.getMemoryLane()); |
841 | | |
842 | | // SIMD Numeric Instructions. |
843 | 7.83k | case OpCode::I8x16__swizzle: |
844 | 174k | case OpCode::I8x16__splat: |
845 | 219k | case OpCode::I16x8__splat: |
846 | 228k | case OpCode::I32x4__splat: |
847 | 232k | case OpCode::I64x2__splat: |
848 | 233k | case OpCode::F32x4__splat: |
849 | 237k | case OpCode::F64x2__splat: |
850 | | |
851 | 242k | case OpCode::I8x16__eq: |
852 | 243k | case OpCode::I8x16__ne: |
853 | 246k | case OpCode::I8x16__lt_s: |
854 | 248k | case OpCode::I8x16__lt_u: |
855 | 254k | case OpCode::I8x16__gt_s: |
856 | 257k | case OpCode::I8x16__gt_u: |
857 | 258k | case OpCode::I8x16__le_s: |
858 | 259k | case OpCode::I8x16__le_u: |
859 | 261k | case OpCode::I8x16__ge_s: |
860 | 264k | case OpCode::I8x16__ge_u: |
861 | | |
862 | 269k | case OpCode::I16x8__eq: |
863 | 272k | case OpCode::I16x8__ne: |
864 | 275k | case OpCode::I16x8__lt_s: |
865 | 281k | case OpCode::I16x8__lt_u: |
866 | 284k | case OpCode::I16x8__gt_s: |
867 | 290k | case OpCode::I16x8__gt_u: |
868 | 292k | case OpCode::I16x8__le_s: |
869 | 294k | case OpCode::I16x8__le_u: |
870 | 297k | case OpCode::I16x8__ge_s: |
871 | 303k | case OpCode::I16x8__ge_u: |
872 | | |
873 | 304k | case OpCode::I32x4__eq: |
874 | 306k | case OpCode::I32x4__ne: |
875 | 309k | case OpCode::I32x4__lt_s: |
876 | 310k | case OpCode::I32x4__lt_u: |
877 | 311k | case OpCode::I32x4__gt_s: |
878 | 313k | case OpCode::I32x4__gt_u: |
879 | 318k | case OpCode::I32x4__le_s: |
880 | 319k | case OpCode::I32x4__le_u: |
881 | 320k | case OpCode::I32x4__ge_s: |
882 | 323k | case OpCode::I32x4__ge_u: |
883 | | |
884 | 333k | case OpCode::F32x4__eq: |
885 | 335k | case OpCode::F32x4__ne: |
886 | 337k | case OpCode::F32x4__lt: |
887 | 338k | case OpCode::F32x4__gt: |
888 | 341k | case OpCode::F32x4__le: |
889 | 342k | case OpCode::F32x4__ge: |
890 | | |
891 | 352k | case OpCode::F64x2__eq: |
892 | 354k | case OpCode::F64x2__ne: |
893 | 355k | case OpCode::F64x2__lt: |
894 | 360k | case OpCode::F64x2__gt: |
895 | 362k | case OpCode::F64x2__le: |
896 | 366k | case OpCode::F64x2__ge: |
897 | | |
898 | 378k | case OpCode::V128__not: |
899 | 379k | case OpCode::V128__and: |
900 | 380k | case OpCode::V128__andnot: |
901 | 383k | case OpCode::V128__or: |
902 | 385k | case OpCode::V128__xor: |
903 | 385k | case OpCode::V128__bitselect: |
904 | 387k | case OpCode::V128__any_true: |
905 | | |
906 | 408k | case OpCode::I8x16__abs: |
907 | 436k | case OpCode::I8x16__neg: |
908 | 438k | case OpCode::I8x16__popcnt: |
909 | 439k | case OpCode::I8x16__all_true: |
910 | 442k | case OpCode::I8x16__bitmask: |
911 | 445k | case OpCode::I8x16__narrow_i16x8_s: |
912 | 446k | case OpCode::I8x16__narrow_i16x8_u: |
913 | 449k | case OpCode::I8x16__shl: |
914 | 451k | case OpCode::I8x16__shr_s: |
915 | 453k | case OpCode::I8x16__shr_u: |
916 | 454k | case OpCode::I8x16__add: |
917 | 457k | case OpCode::I8x16__add_sat_s: |
918 | 458k | case OpCode::I8x16__add_sat_u: |
919 | 463k | case OpCode::I8x16__sub: |
920 | 466k | case OpCode::I8x16__sub_sat_s: |
921 | 468k | case OpCode::I8x16__sub_sat_u: |
922 | 470k | case OpCode::I8x16__min_s: |
923 | 477k | case OpCode::I8x16__min_u: |
924 | 478k | case OpCode::I8x16__max_s: |
925 | 480k | case OpCode::I8x16__max_u: |
926 | 481k | case OpCode::I8x16__avgr_u: |
927 | | |
928 | 483k | case OpCode::I16x8__abs: |
929 | 484k | case OpCode::I16x8__neg: |
930 | 486k | case OpCode::I16x8__all_true: |
931 | 488k | case OpCode::I16x8__bitmask: |
932 | 489k | case OpCode::I16x8__narrow_i32x4_s: |
933 | 492k | case OpCode::I16x8__narrow_i32x4_u: |
934 | 499k | case OpCode::I16x8__extend_low_i8x16_s: |
935 | 500k | case OpCode::I16x8__extend_high_i8x16_s: |
936 | 501k | case OpCode::I16x8__extend_low_i8x16_u: |
937 | 502k | case OpCode::I16x8__extend_high_i8x16_u: |
938 | 503k | case OpCode::I16x8__shl: |
939 | 505k | case OpCode::I16x8__shr_s: |
940 | 505k | case OpCode::I16x8__shr_u: |
941 | 507k | case OpCode::I16x8__add: |
942 | 508k | case OpCode::I16x8__add_sat_s: |
943 | 510k | case OpCode::I16x8__add_sat_u: |
944 | 513k | case OpCode::I16x8__sub: |
945 | 517k | case OpCode::I16x8__sub_sat_s: |
946 | 518k | case OpCode::I16x8__sub_sat_u: |
947 | 519k | case OpCode::I16x8__mul: |
948 | 521k | case OpCode::I16x8__min_s: |
949 | 523k | case OpCode::I16x8__min_u: |
950 | 526k | case OpCode::I16x8__max_s: |
951 | 529k | case OpCode::I16x8__max_u: |
952 | 532k | case OpCode::I16x8__avgr_u: |
953 | 534k | case OpCode::I16x8__extmul_low_i8x16_s: |
954 | 536k | case OpCode::I16x8__extmul_high_i8x16_s: |
955 | 537k | case OpCode::I16x8__extmul_low_i8x16_u: |
956 | 542k | case OpCode::I16x8__extmul_high_i8x16_u: |
957 | 544k | case OpCode::I16x8__q15mulr_sat_s: |
958 | 547k | case OpCode::I16x8__extadd_pairwise_i8x16_s: |
959 | 552k | case OpCode::I16x8__extadd_pairwise_i8x16_u: |
960 | | |
961 | 553k | case OpCode::I32x4__abs: |
962 | 555k | case OpCode::I32x4__neg: |
963 | 558k | case OpCode::I32x4__all_true: |
964 | 561k | case OpCode::I32x4__bitmask: |
965 | 563k | case OpCode::I32x4__extend_low_i16x8_s: |
966 | 565k | case OpCode::I32x4__extend_high_i16x8_s: |
967 | 575k | case OpCode::I32x4__extend_low_i16x8_u: |
968 | 577k | case OpCode::I32x4__extend_high_i16x8_u: |
969 | 581k | case OpCode::I32x4__shl: |
970 | 582k | case OpCode::I32x4__shr_s: |
971 | 585k | case OpCode::I32x4__shr_u: |
972 | 586k | case OpCode::I32x4__add: |
973 | 588k | case OpCode::I32x4__sub: |
974 | 589k | case OpCode::I32x4__mul: |
975 | 591k | case OpCode::I32x4__min_s: |
976 | 592k | case OpCode::I32x4__min_u: |
977 | 593k | case OpCode::I32x4__max_s: |
978 | 595k | case OpCode::I32x4__max_u: |
979 | 596k | case OpCode::I32x4__extmul_low_i16x8_s: |
980 | 597k | case OpCode::I32x4__extmul_high_i16x8_s: |
981 | 598k | case OpCode::I32x4__extmul_low_i16x8_u: |
982 | 600k | case OpCode::I32x4__extmul_high_i16x8_u: |
983 | 604k | case OpCode::I32x4__extadd_pairwise_i16x8_s: |
984 | 624k | case OpCode::I32x4__extadd_pairwise_i16x8_u: |
985 | | |
986 | 626k | case OpCode::I64x2__abs: |
987 | 628k | case OpCode::I64x2__neg: |
988 | 629k | case OpCode::I64x2__bitmask: |
989 | 629k | case OpCode::I64x2__extend_low_i32x4_s: |
990 | 632k | case OpCode::I64x2__extend_high_i32x4_s: |
991 | 636k | case OpCode::I64x2__extend_low_i32x4_u: |
992 | 640k | case OpCode::I64x2__extend_high_i32x4_u: |
993 | 641k | case OpCode::I64x2__shl: |
994 | 643k | case OpCode::I64x2__shr_s: |
995 | 643k | case OpCode::I64x2__shr_u: |
996 | 646k | case OpCode::I64x2__add: |
997 | 647k | case OpCode::I64x2__sub: |
998 | 649k | case OpCode::I64x2__mul: |
999 | 649k | case OpCode::I64x2__eq: |
1000 | 651k | case OpCode::I64x2__ne: |
1001 | 655k | case OpCode::I64x2__lt_s: |
1002 | 656k | case OpCode::I64x2__gt_s: |
1003 | 656k | case OpCode::I64x2__le_s: |
1004 | 659k | case OpCode::I64x2__ge_s: |
1005 | 661k | case OpCode::I64x2__all_true: |
1006 | 662k | case OpCode::I64x2__extmul_low_i32x4_s: |
1007 | 664k | case OpCode::I64x2__extmul_high_i32x4_s: |
1008 | 665k | case OpCode::I64x2__extmul_low_i32x4_u: |
1009 | 668k | case OpCode::I64x2__extmul_high_i32x4_u: |
1010 | | |
1011 | 670k | case OpCode::F32x4__abs: |
1012 | 672k | case OpCode::F32x4__neg: |
1013 | 673k | case OpCode::F32x4__sqrt: |
1014 | 678k | case OpCode::F32x4__add: |
1015 | 680k | case OpCode::F32x4__sub: |
1016 | 682k | case OpCode::F32x4__mul: |
1017 | 684k | case OpCode::F32x4__div: |
1018 | 685k | case OpCode::F32x4__min: |
1019 | 687k | case OpCode::F32x4__max: |
1020 | 694k | case OpCode::F32x4__pmin: |
1021 | 696k | case OpCode::F32x4__pmax: |
1022 | | |
1023 | 699k | case OpCode::F64x2__abs: |
1024 | 702k | case OpCode::F64x2__neg: |
1025 | 703k | case OpCode::F64x2__sqrt: |
1026 | 705k | case OpCode::F64x2__add: |
1027 | 710k | case OpCode::F64x2__sub: |
1028 | 711k | case OpCode::F64x2__mul: |
1029 | 711k | case OpCode::F64x2__div: |
1030 | 712k | case OpCode::F64x2__min: |
1031 | 713k | case OpCode::F64x2__max: |
1032 | 715k | case OpCode::F64x2__pmin: |
1033 | 716k | case OpCode::F64x2__pmax: |
1034 | | |
1035 | 718k | case OpCode::I32x4__trunc_sat_f32x4_s: |
1036 | 738k | case OpCode::I32x4__trunc_sat_f32x4_u: |
1037 | 740k | case OpCode::F32x4__convert_i32x4_s: |
1038 | 744k | case OpCode::F32x4__convert_i32x4_u: |
1039 | 748k | case OpCode::I32x4__trunc_sat_f64x2_s_zero: |
1040 | 759k | case OpCode::I32x4__trunc_sat_f64x2_u_zero: |
1041 | 763k | case OpCode::F64x2__convert_low_i32x4_s: |
1042 | 771k | case OpCode::F64x2__convert_low_i32x4_u: |
1043 | 775k | case OpCode::F32x4__demote_f64x2_zero: |
1044 | 780k | case OpCode::F64x2__promote_low_f32x4: |
1045 | | |
1046 | 782k | case OpCode::I32x4__dot_i16x8_s: |
1047 | 790k | case OpCode::F32x4__ceil: |
1048 | 799k | case OpCode::F32x4__floor: |
1049 | 804k | case OpCode::F32x4__trunc: |
1050 | 806k | case OpCode::F32x4__nearest: |
1051 | 808k | case OpCode::F64x2__ceil: |
1052 | 810k | case OpCode::F64x2__floor: |
1053 | 812k | case OpCode::F64x2__trunc: |
1054 | 814k | case OpCode::F64x2__nearest: |
1055 | 814k | return {}; |
1056 | | |
1057 | 0 | case OpCode::I8x16__relaxed_swizzle: |
1058 | 0 | case OpCode::I32x4__relaxed_trunc_f32x4_s: |
1059 | 0 | case OpCode::I32x4__relaxed_trunc_f32x4_u: |
1060 | 0 | case OpCode::I32x4__relaxed_trunc_f64x2_s_zero: |
1061 | 0 | case OpCode::I32x4__relaxed_trunc_f64x2_u_zero: |
1062 | 0 | case OpCode::F32x4__relaxed_madd: |
1063 | 0 | case OpCode::F32x4__relaxed_nmadd: |
1064 | 0 | case OpCode::F64x2__relaxed_madd: |
1065 | 0 | case OpCode::F64x2__relaxed_nmadd: |
1066 | 0 | case OpCode::I8x16__relaxed_laneselect: |
1067 | 0 | case OpCode::I16x8__relaxed_laneselect: |
1068 | 0 | case OpCode::I32x4__relaxed_laneselect: |
1069 | 0 | case OpCode::I64x2__relaxed_laneselect: |
1070 | 0 | case OpCode::F32x4__relaxed_min: |
1071 | 0 | case OpCode::F32x4__relaxed_max: |
1072 | 0 | case OpCode::F64x2__relaxed_min: |
1073 | 0 | case OpCode::F64x2__relaxed_max: |
1074 | 0 | case OpCode::I16x8__relaxed_q15mulr_s: |
1075 | 0 | case OpCode::I16x8__relaxed_dot_i8x16_i7x16_s: |
1076 | 0 | case OpCode::I32x4__relaxed_dot_i8x16_i7x16_add_s: |
1077 | 0 | return {}; |
1078 | | |
1079 | | // Atomic Memory Instructions. |
1080 | 935 | case OpCode::Atomic__fence: |
1081 | 935 | return readCheckZero(Instr.getTargetIndex()); |
1082 | | |
1083 | 2.95k | case OpCode::Memory__atomic__notify: |
1084 | 6.98k | case OpCode::Memory__atomic__wait32: |
1085 | 7.09k | case OpCode::Memory__atomic__wait64: |
1086 | | |
1087 | 7.09k | case OpCode::I32__atomic__load: |
1088 | 7.09k | case OpCode::I64__atomic__load: |
1089 | 7.09k | case OpCode::I32__atomic__load8_u: |
1090 | 7.09k | case OpCode::I32__atomic__load16_u: |
1091 | 7.09k | case OpCode::I64__atomic__load8_u: |
1092 | 7.09k | case OpCode::I64__atomic__load16_u: |
1093 | 7.09k | case OpCode::I64__atomic__load32_u: |
1094 | 7.09k | case OpCode::I32__atomic__store: |
1095 | 7.09k | case OpCode::I64__atomic__store: |
1096 | 7.09k | case OpCode::I32__atomic__store8: |
1097 | 7.09k | case OpCode::I32__atomic__store16: |
1098 | 7.09k | case OpCode::I64__atomic__store8: |
1099 | 7.09k | case OpCode::I64__atomic__store16: |
1100 | 7.09k | case OpCode::I64__atomic__store32: |
1101 | 7.09k | case OpCode::I32__atomic__rmw__add: |
1102 | 7.09k | case OpCode::I64__atomic__rmw__add: |
1103 | 7.09k | case OpCode::I32__atomic__rmw8__add_u: |
1104 | 7.09k | case OpCode::I32__atomic__rmw16__add_u: |
1105 | 7.09k | case OpCode::I64__atomic__rmw8__add_u: |
1106 | 7.09k | case OpCode::I64__atomic__rmw16__add_u: |
1107 | 7.09k | case OpCode::I64__atomic__rmw32__add_u: |
1108 | 7.09k | case OpCode::I32__atomic__rmw__sub: |
1109 | 7.09k | case OpCode::I64__atomic__rmw__sub: |
1110 | 7.09k | case OpCode::I32__atomic__rmw8__sub_u: |
1111 | 7.09k | case OpCode::I32__atomic__rmw16__sub_u: |
1112 | 7.09k | case OpCode::I64__atomic__rmw8__sub_u: |
1113 | 7.09k | case OpCode::I64__atomic__rmw16__sub_u: |
1114 | 7.09k | case OpCode::I64__atomic__rmw32__sub_u: |
1115 | 7.09k | case OpCode::I32__atomic__rmw__and: |
1116 | 7.09k | case OpCode::I64__atomic__rmw__and: |
1117 | 7.09k | case OpCode::I32__atomic__rmw8__and_u: |
1118 | 7.09k | case OpCode::I32__atomic__rmw16__and_u: |
1119 | 7.09k | case OpCode::I64__atomic__rmw8__and_u: |
1120 | 7.09k | case OpCode::I64__atomic__rmw16__and_u: |
1121 | 7.09k | case OpCode::I64__atomic__rmw32__and_u: |
1122 | 7.09k | case OpCode::I32__atomic__rmw__or: |
1123 | 7.09k | case OpCode::I64__atomic__rmw__or: |
1124 | 7.09k | case OpCode::I32__atomic__rmw8__or_u: |
1125 | 7.09k | case OpCode::I32__atomic__rmw16__or_u: |
1126 | 7.09k | case OpCode::I64__atomic__rmw8__or_u: |
1127 | 7.09k | case OpCode::I64__atomic__rmw16__or_u: |
1128 | 7.09k | case OpCode::I64__atomic__rmw32__or_u: |
1129 | 7.09k | case OpCode::I32__atomic__rmw__xor: |
1130 | 7.09k | case OpCode::I64__atomic__rmw__xor: |
1131 | 7.09k | case OpCode::I32__atomic__rmw8__xor_u: |
1132 | 7.09k | case OpCode::I32__atomic__rmw16__xor_u: |
1133 | 7.09k | case OpCode::I64__atomic__rmw8__xor_u: |
1134 | 7.09k | case OpCode::I64__atomic__rmw16__xor_u: |
1135 | 7.09k | case OpCode::I64__atomic__rmw32__xor_u: |
1136 | 7.09k | case OpCode::I32__atomic__rmw__xchg: |
1137 | 7.09k | case OpCode::I64__atomic__rmw__xchg: |
1138 | 7.09k | case OpCode::I32__atomic__rmw8__xchg_u: |
1139 | 7.09k | case OpCode::I32__atomic__rmw16__xchg_u: |
1140 | 7.09k | case OpCode::I64__atomic__rmw8__xchg_u: |
1141 | 7.09k | case OpCode::I64__atomic__rmw16__xchg_u: |
1142 | 7.09k | case OpCode::I64__atomic__rmw32__xchg_u: |
1143 | 7.09k | case OpCode::I32__atomic__rmw__cmpxchg: |
1144 | 7.09k | case OpCode::I64__atomic__rmw__cmpxchg: |
1145 | 7.09k | case OpCode::I32__atomic__rmw8__cmpxchg_u: |
1146 | 7.09k | case OpCode::I32__atomic__rmw16__cmpxchg_u: |
1147 | 7.09k | case OpCode::I64__atomic__rmw8__cmpxchg_u: |
1148 | 7.09k | case OpCode::I64__atomic__rmw16__cmpxchg_u: |
1149 | 7.09k | case OpCode::I64__atomic__rmw32__cmpxchg_u: |
1150 | 7.09k | return readMemImmediate(); |
1151 | | |
1152 | 0 | default: |
1153 | 0 | assumingUnreachable(); |
1154 | 8.17M | } |
1155 | 8.17M | } |
1156 | | |
1157 | | } // namespace Loader |
1158 | | } // namespace WasmEdge |