/src/WasmEdge/lib/loader/ast/instruction.cpp
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1 | | // SPDX-License-Identifier: Apache-2.0 |
2 | | // SPDX-FileCopyrightText: 2019-2024 Second State INC |
3 | | |
4 | | #include "loader/loader.h" |
5 | | |
6 | | #include <utility> |
7 | | |
8 | | using namespace std::literals; |
9 | | |
10 | | namespace WasmEdge { |
11 | | namespace Loader { |
12 | | |
13 | | // OpCode loader. See "include/loader/loader.h". |
14 | 8.01M | Expect<OpCode> Loader::loadOpCode() { |
15 | 8.01M | EXPECTED_TRY(uint8_t Prefix, FMgr.readByte()); |
16 | | |
17 | 8.00M | if (Prefix >= 0xFBU && Prefix <= 0xFEU) { |
18 | | // Multi-byte OpCode case. |
19 | 870k | EXPECTED_TRY(uint32_t Extend, FMgr.readU32()); |
20 | 870k | if (Prefix == 0xFBU) { |
21 | 4.56k | switch (Extend) { |
22 | 0 | #define UseOpCode |
23 | 0 | #define Line(NAME, STRING, PREFIX) |
24 | 0 | #define Line_FB(NAME, STRING, PREFIX, EXTEND) \ |
25 | 4.54k | case EXTEND: \ |
26 | 4.54k | return OpCode::NAME; |
27 | 0 | #define Line_FC(NAME, STRING, PREFIX, EXTEND) |
28 | 0 | #define Line_FD(NAME, STRING, PREFIX, EXTEND) |
29 | 0 | #define Line_FE(NAME, STRING, PREFIX, EXTEND) |
30 | 0 | #include "common/enum.inc" |
31 | 0 | #undef Line |
32 | 0 | #undef Line_FB |
33 | 0 | #undef Line_FC |
34 | 0 | #undef Line_FD |
35 | 0 | #undef Line_FE |
36 | 0 | #undef UseOpCode |
37 | 13 | default: |
38 | 13 | return Unexpect(ErrCode::Value::IllegalOpCode); |
39 | 4.56k | } |
40 | 866k | } else if (Prefix == 0xFCU) { |
41 | 31.6k | switch (Extend) { |
42 | 0 | #define UseOpCode |
43 | 0 | #define Line(NAME, STRING, PREFIX) |
44 | 0 | #define Line_FB(NAME, STRING, PREFIX, EXTEND) |
45 | 0 | #define Line_FC(NAME, STRING, PREFIX, EXTEND) \ |
46 | 31.6k | case EXTEND: \ |
47 | 31.6k | return OpCode::NAME; |
48 | 0 | #define Line_FD(NAME, STRING, PREFIX, EXTEND) |
49 | 0 | #define Line_FE(NAME, STRING, PREFIX, EXTEND) |
50 | 0 | #include "common/enum.inc" |
51 | 0 | #undef Line |
52 | 0 | #undef Line_FB |
53 | 0 | #undef Line_FC |
54 | 0 | #undef Line_FD |
55 | 0 | #undef Line_FE |
56 | 0 | #undef UseOpCode |
57 | 7 | default: |
58 | 7 | return Unexpect(ErrCode::Value::IllegalOpCode); |
59 | 31.6k | } |
60 | 834k | } else if (Prefix == 0xFDU) { |
61 | 827k | switch (Extend) { |
62 | 0 | #define UseOpCode |
63 | 0 | #define Line(NAME, STRING, PREFIX) |
64 | 0 | #define Line_FB(NAME, STRING, PREFIX, EXTEND) |
65 | 0 | #define Line_FC(NAME, STRING, PREFIX, EXTEND) |
66 | 0 | #define Line_FD(NAME, STRING, PREFIX, EXTEND) \ |
67 | 827k | case EXTEND: \ |
68 | 827k | return OpCode::NAME; |
69 | 0 | #define Line_FE(NAME, STRING, PREFIX, EXTEND) |
70 | 0 | #include "common/enum.inc" |
71 | 0 | #undef Line |
72 | 0 | #undef Line_FB |
73 | 0 | #undef Line_FC |
74 | 0 | #undef Line_FD |
75 | 0 | #undef Line_FE |
76 | 0 | #undef UseOpCode |
77 | 102 | default: |
78 | 102 | return Unexpect(ErrCode::Value::IllegalOpCode); |
79 | 827k | } |
80 | 827k | } else { |
81 | 6.90k | switch (Extend) { |
82 | 0 | #define UseOpCode |
83 | 0 | #define Line(NAME, STRING, PREFIX) |
84 | 0 | #define Line_FB(NAME, STRING, PREFIX, EXTEND) |
85 | 0 | #define Line_FC(NAME, STRING, PREFIX, EXTEND) |
86 | 0 | #define Line_FD(NAME, STRING, PREFIX, EXTEND) |
87 | 0 | #define Line_FE(NAME, STRING, PREFIX, EXTEND) \ |
88 | 6.89k | case EXTEND: \ |
89 | 6.89k | return OpCode::NAME; |
90 | 0 | #include "common/enum.inc" |
91 | 0 | #undef Line |
92 | 0 | #undef Line_FB |
93 | 0 | #undef Line_FC |
94 | 0 | #undef Line_FD |
95 | 0 | #undef Line_FE |
96 | 0 | #undef UseOpCode |
97 | 10 | default: |
98 | 10 | return Unexpect(ErrCode::Value::IllegalOpCode); |
99 | 6.90k | } |
100 | 6.90k | } |
101 | 7.13M | } else { |
102 | | // Single-byte OpCode case. |
103 | 7.13M | switch (Prefix) { |
104 | 0 | #define UseOpCode |
105 | 0 | #define Line(NAME, STRING, PREFIX) \ |
106 | 7.13M | case PREFIX: \ |
107 | 7.13M | return OpCode::NAME; |
108 | 0 | #define Line_FB(NAME, STRING, PREFIX, EXTEND) |
109 | 0 | #define Line_FC(NAME, STRING, PREFIX, EXTEND) |
110 | 0 | #define Line_FD(NAME, STRING, PREFIX, EXTEND) |
111 | 0 | #define Line_FE(NAME, STRING, PREFIX, EXTEND) |
112 | 0 | #include "common/enum.inc" |
113 | 0 | #undef Line |
114 | 0 | #undef Line_FB |
115 | 0 | #undef Line_FC |
116 | 0 | #undef Line_FD |
117 | 0 | #undef Line_FE |
118 | 0 | #undef UseOpCode |
119 | 250 | default: |
120 | 250 | return Unexpect(ErrCode::Value::IllegalOpCode); |
121 | 7.13M | } |
122 | 7.13M | } |
123 | 8.00M | } |
124 | | |
125 | | // Load instruction sequence. See "include/loader/loader.h". |
126 | 32.4k | Expect<AST::InstrVec> Loader::loadInstrSeq(std::optional<uint64_t> SizeBound) { |
127 | 32.4k | AST::InstrVec Instrs; |
128 | 32.4k | std::vector<std::pair<OpCode, uint32_t>> BlockStack; |
129 | 32.4k | uint32_t Cnt = 0; |
130 | 32.4k | bool IsReachEnd = false; |
131 | | // Read opcode until the End code of the top block. |
132 | 8.01M | do { |
133 | | // Read the opcode and check if error. |
134 | 8.01M | uint64_t Offset = FMgr.getOffset(); |
135 | 8.01M | EXPECTED_TRY(OpCode Code, loadOpCode().map_error([this](auto E) { |
136 | 8.00M | return logLoadError(E, FMgr.getLastOffset(), ASTNodeAttr::Instruction); |
137 | 8.00M | })); |
138 | | |
139 | | // Check with proposals. |
140 | 8.00M | if (auto Res = Conf.isInstrNeedProposal(Code); unlikely(!!Res)) { |
141 | 79 | return logNeedProposal(ErrCode::Value::IllegalOpCode, Res.value(), Offset, |
142 | 79 | ASTNodeAttr::Instruction); |
143 | 79 | } |
144 | | |
145 | 8.00M | auto logIllegalOpCode = [this, &Offset, |
146 | 8.00M | &SizeBound]() -> Unexpected<ErrCode> { |
147 | 44 | if (SizeBound.has_value() && FMgr.getOffset() > SizeBound.value()) { |
148 | 15 | return logLoadError(ErrCode::Value::ENDCodeExpected, Offset, |
149 | 15 | ASTNodeAttr::Instruction); |
150 | 29 | } else { |
151 | 29 | return logLoadError(ErrCode::Value::IllegalOpCode, Offset, |
152 | 29 | ASTNodeAttr::Instruction); |
153 | 29 | } |
154 | 44 | }; |
155 | | |
156 | | // Process the instruction which contains a block. |
157 | 8.00M | switch (Code) { |
158 | 103k | case OpCode::Block: |
159 | 210k | case OpCode::Loop: |
160 | 262k | case OpCode::If: |
161 | 263k | case OpCode::Try_table: |
162 | 263k | BlockStack.emplace_back(Code, Cnt); |
163 | 263k | break; |
164 | 2.86k | case OpCode::Else: { |
165 | 2.86k | if (BlockStack.size() == 0 || BlockStack.back().first != OpCode::If) { |
166 | | // An Else instruction appeared outside the If-block. |
167 | 40 | return logIllegalOpCode(); |
168 | 40 | } |
169 | 2.82k | uint32_t Pos = BlockStack.back().second; |
170 | 2.82k | if (Instrs[Pos].getJumpElse() > 0) { |
171 | | // An Else instruction appeared before in this If-block. |
172 | 4 | return logIllegalOpCode(); |
173 | 4 | } |
174 | 2.82k | Instrs[Pos].setJumpElse(Cnt - Pos); |
175 | 2.82k | break; |
176 | 2.82k | } |
177 | 7.74M | default: |
178 | 7.74M | break; |
179 | 8.00M | } |
180 | | |
181 | | // Create the instruction node and load contents. |
182 | 8.00M | Instrs.emplace_back(Code, static_cast<uint32_t>(Offset)); |
183 | 8.00M | EXPECTED_TRY(loadInstruction(Instrs.back())); |
184 | | |
185 | 8.00M | if (Code == OpCode::End) { |
186 | | // Post process the End instruction. |
187 | 56.2k | if (BlockStack.size() > 0) { |
188 | 27.0k | Instrs.back().setExprLast(false); |
189 | 27.0k | const auto &[BackOp, Pos] = BlockStack.back(); |
190 | 27.0k | if (BackOp == OpCode::Block || BackOp == OpCode::Loop || |
191 | 26.1k | BackOp == OpCode::If) { |
192 | 26.1k | Instrs.back().setTryBlockLast(false); |
193 | 26.1k | Instrs[Pos].setJumpEnd(Cnt - Pos); |
194 | 26.1k | if (BackOp == OpCode::If) { |
195 | 10.7k | if (Instrs[Pos].getJumpElse() == 0) { |
196 | | // If block without else. Set the else jump the same as end jump. |
197 | 8.11k | Instrs[Pos].setJumpElse(Cnt - Pos); |
198 | 8.11k | } else { |
199 | 2.62k | const uint32_t ElsePos = Pos + Instrs[Pos].getJumpElse(); |
200 | 2.62k | Instrs[ElsePos].setJumpEnd(Cnt - ElsePos); |
201 | 2.62k | } |
202 | 10.7k | } |
203 | 26.1k | } else if (BackOp == OpCode::Try_table) { |
204 | 932 | Instrs.back().setTryBlockLast(true); |
205 | 932 | Instrs[Pos].getTryCatch().JumpEnd = Cnt - Pos; |
206 | 932 | } |
207 | 27.0k | BlockStack.pop_back(); |
208 | 29.1k | } else { |
209 | 29.1k | Instrs.back().setExprLast(true); |
210 | 29.1k | IsReachEnd = true; |
211 | 29.1k | } |
212 | 56.2k | } |
213 | 8.00M | Cnt++; |
214 | 8.00M | } while (!IsReachEnd); |
215 | | |
216 | | // Check the loaded offset should match the segment boundary. |
217 | 29.1k | if (SizeBound.has_value()) { |
218 | 20.0k | auto Offset = FMgr.getOffset(); |
219 | 20.0k | if (Offset < SizeBound.value()) { |
220 | 8 | return logLoadError(ErrCode::Value::JunkSection, Offset, |
221 | 8 | ASTNodeAttr::Instruction); |
222 | 20.0k | } else if (Offset > SizeBound.value()) { |
223 | 108 | return logLoadError(ErrCode::Value::SectionSizeMismatch, Offset, |
224 | 108 | ASTNodeAttr::Instruction); |
225 | 108 | } |
226 | 20.0k | } |
227 | 29.0k | return Instrs; |
228 | 29.1k | } |
229 | | |
230 | | // Load instruction node. See "include/loader/loader.h". |
231 | 8.01M | Expect<void> Loader::loadInstruction(AST::Instruction &Instr) { |
232 | | // Node: The instruction has checked for the proposals. Need to check their |
233 | | // immediates. |
234 | | |
235 | 8.01M | auto ReportError = [this](auto E) { |
236 | 711 | return logLoadError(E, FMgr.getLastOffset(), ASTNodeAttr::Instruction); |
237 | 711 | }; |
238 | | |
239 | 8.01M | auto readU8 = [this, ReportError](uint8_t &Dst) -> Expect<void> { |
240 | 50.9k | EXPECTED_TRY(Dst, FMgr.readByte().map_error(ReportError)); |
241 | 50.8k | return {}; |
242 | 50.9k | }; |
243 | | |
244 | 8.01M | auto readU32 = [this, ReportError](uint32_t &Dst) -> Expect<void> { |
245 | 540k | EXPECTED_TRY(Dst, FMgr.readU32().map_error(ReportError)); |
246 | 540k | return {}; |
247 | 540k | }; |
248 | | |
249 | 8.01M | auto readU64 = [this, ReportError](uint64_t &Dst) -> Expect<void> { |
250 | 0 | EXPECTED_TRY(Dst, FMgr.readU64().map_error(ReportError)); |
251 | 0 | return {}; |
252 | 0 | }; |
253 | | |
254 | 8.01M | auto readMemImmediate = [this, readU32, readU64, &Instr]() -> Expect<void> { |
255 | 155k | Instr.getTargetIndex() = 0; |
256 | 155k | EXPECTED_TRY(readU32(Instr.getMemoryAlign())); |
257 | 155k | if (Conf.hasProposal(Proposal::MultiMemories) && |
258 | 155k | Instr.getMemoryAlign() >= 64) { |
259 | 365 | Instr.getMemoryAlign() -= 64; |
260 | 365 | EXPECTED_TRY(readU32(Instr.getTargetIndex())); |
261 | 365 | } |
262 | 155k | uint32_t MaxAlign = Conf.hasProposal(Proposal::Memory64) ? 64U : 32U; |
263 | 155k | if (unlikely(Instr.getMemoryAlign() >= MaxAlign)) { |
264 | 204 | return logLoadError(ErrCode::Value::MalformedMemoryOpFlags, |
265 | 204 | FMgr.getLastOffset(), ASTNodeAttr::Instruction); |
266 | 204 | } |
267 | 154k | if (Conf.hasProposal(Proposal::Memory64)) { |
268 | | // TODO: MEMORY64 - fully support implementation. |
269 | 0 | uint64_t Offset; |
270 | 0 | EXPECTED_TRY(readU64(Offset)); |
271 | 0 | Instr.getMemoryOffset() = static_cast<uint32_t>(Offset); |
272 | 154k | } else { |
273 | 154k | EXPECTED_TRY(readU32(Instr.getMemoryOffset())); |
274 | 154k | } |
275 | 154k | return {}; |
276 | 154k | }; |
277 | | |
278 | 8.01M | auto readCheckZero = [this, readU8](uint32_t &Dst) -> Expect<void> { |
279 | 1.13k | uint8_t C = 0; |
280 | 1.13k | EXPECTED_TRY(readU8(C)); |
281 | 1.13k | if (C != UINT8_C(0)) { |
282 | 4 | return logLoadError(ErrCode::Value::ExpectedZeroByte, |
283 | 4 | FMgr.getLastOffset(), ASTNodeAttr::Instruction); |
284 | 4 | } |
285 | 1.13k | Dst = 0; |
286 | 1.13k | return {}; |
287 | 1.13k | }; |
288 | | |
289 | 8.01M | auto readBlockType = [this, ReportError](BlockType &Dst) -> Expect<void> { |
290 | 263k | auto StartOffset = FMgr.getOffset(); |
291 | | // Read the block return type. |
292 | 263k | EXPECTED_TRY(int64_t Code, FMgr.readS33().map_error(ReportError)); |
293 | 263k | if (Code < 0) { |
294 | 56.0k | TypeCode TypeByte = static_cast<TypeCode>(Code & INT64_C(0x7F)); |
295 | 56.0k | if (TypeByte == TypeCode::Epsilon) { |
296 | | // Empty case. |
297 | 5.56k | Dst.setEmpty(); |
298 | 50.4k | } else { |
299 | | // Value type case. Seek back to the origin offset and read the |
300 | | // valtype. |
301 | 50.4k | FMgr.seek(StartOffset); |
302 | | // The AST node information is handled. |
303 | 50.4k | EXPECTED_TRY(auto Type, loadValType(ASTNodeAttr::Instruction)); |
304 | 50.4k | Dst.setData(Type); |
305 | 50.4k | } |
306 | 207k | } else { |
307 | | // Type index case. |
308 | 207k | if (unlikely(!Conf.hasProposal(Proposal::MultiValue))) { |
309 | 0 | return logNeedProposal(ErrCode::Value::MalformedValType, |
310 | 0 | Proposal::MultiValue, FMgr.getLastOffset(), |
311 | 0 | ASTNodeAttr::Instruction); |
312 | 0 | } |
313 | 207k | Dst.setData(static_cast<uint32_t>(Code)); |
314 | 207k | } |
315 | 263k | return {}; |
316 | 263k | }; |
317 | | |
318 | 8.01M | switch (Instr.getOpCode()) { |
319 | | // Control instructions. |
320 | 3.01M | case OpCode::Unreachable: |
321 | 3.33M | case OpCode::Nop: |
322 | 3.34M | case OpCode::Return: |
323 | 3.34M | case OpCode::Throw_ref: |
324 | 3.40M | case OpCode::End: |
325 | 3.40M | case OpCode::Else: |
326 | 3.40M | return {}; |
327 | | |
328 | 103k | case OpCode::Block: |
329 | 210k | case OpCode::Loop: |
330 | 262k | case OpCode::If: |
331 | 262k | return readBlockType(Instr.getBlockType()); |
332 | | |
333 | 1.33k | case OpCode::Try_table: { |
334 | 1.33k | Instr.setTryCatch(); |
335 | | // Read the result type. |
336 | 1.33k | EXPECTED_TRY(readBlockType(Instr.getTryCatch().ResType)); |
337 | 2.66k | EXPECTED_TRY(uint32_t VecCnt, loadVecCnt().map_error(ReportError)); |
338 | 2.66k | Instr.getTryCatch().Catch.resize(VecCnt); |
339 | 25.0k | for (uint32_t I = 0; I < VecCnt; ++I) { |
340 | 23.7k | auto &Desc = Instr.getTryCatch().Catch[I]; |
341 | | // Read the catch flag. |
342 | 23.7k | EXPECTED_TRY(uint8_t Flag, FMgr.readByte().map_error(ReportError)); |
343 | 23.7k | Desc.IsRef = (Flag & 0x01U) ? true : false; |
344 | 23.7k | Desc.IsAll = (Flag & 0x02U) ? true : false; |
345 | 23.7k | if (!Desc.IsAll) { |
346 | | // Read the tag index. |
347 | 3.96k | EXPECTED_TRY(readU32(Desc.TagIndex)); |
348 | 3.96k | } |
349 | | // Read the label index. |
350 | 23.7k | EXPECTED_TRY(readU32(Desc.LabelIndex)); |
351 | 23.7k | } |
352 | 1.29k | return {}; |
353 | 2.66k | } |
354 | | |
355 | 381 | case OpCode::Throw: |
356 | 381 | return readU32(Instr.getTargetIndex()); |
357 | | |
358 | 6.27k | case OpCode::Br: |
359 | 11.8k | case OpCode::Br_if: |
360 | 11.9k | case OpCode::Br_on_null: |
361 | 12.0k | case OpCode::Br_on_non_null: |
362 | 12.0k | return readU32(Instr.getJump().TargetIndex); |
363 | | |
364 | 6.00k | case OpCode::Br_table: { |
365 | | // Read the vector of labels. |
366 | 6.00k | EXPECTED_TRY(uint32_t VecCnt, loadVecCnt().map_error(ReportError)); |
367 | 5.98k | Instr.setLabelListSize(VecCnt + 1); |
368 | 53.1k | for (uint32_t I = 0; I < VecCnt; ++I) { |
369 | 47.1k | EXPECTED_TRY(readU32(Instr.getLabelList()[I].TargetIndex)); |
370 | 47.1k | } |
371 | | // Read default label. |
372 | 5.97k | return readU32(Instr.getLabelList()[VecCnt].TargetIndex); |
373 | 5.98k | } |
374 | | |
375 | 8.57k | case OpCode::Call: |
376 | 8.97k | case OpCode::Return_call: |
377 | 14.8k | case OpCode::Call_ref: |
378 | 15.4k | case OpCode::Return_call_ref: |
379 | 15.4k | return readU32(Instr.getTargetIndex()); |
380 | | |
381 | 8.83k | case OpCode::Call_indirect: |
382 | 9.60k | case OpCode::Return_call_indirect: { |
383 | | // Read the type index. |
384 | 9.60k | EXPECTED_TRY(readU32(Instr.getTargetIndex())); |
385 | 9.59k | uint64_t SrcIdxOffset = FMgr.getOffset(); |
386 | | // Read the table index. |
387 | 9.59k | EXPECTED_TRY(readU32(Instr.getSourceIndex())); |
388 | 9.59k | if ((Instr.getSourceIndex() > 0 || FMgr.getOffset() - SrcIdxOffset > 1) && |
389 | 5.95k | !Conf.hasProposal(Proposal::ReferenceTypes)) { |
390 | 0 | return logNeedProposal(ErrCode::Value::ExpectedZeroByte, |
391 | 0 | Proposal::ReferenceTypes, FMgr.getLastOffset(), |
392 | 0 | ASTNodeAttr::Instruction); |
393 | 0 | } |
394 | 9.59k | return {}; |
395 | 9.59k | } |
396 | | |
397 | | // Reference Instructions. |
398 | 10.9k | case OpCode::Ref__null: |
399 | 11.1k | case OpCode::Ref__test_null: |
400 | 11.2k | case OpCode::Ref__cast_null: { |
401 | | // The AST node information is handled. |
402 | 11.2k | EXPECTED_TRY(auto Type, |
403 | 11.2k | loadHeapType(TypeCode::RefNull, ASTNodeAttr::Instruction)); |
404 | 11.2k | Instr.setValType(Type); |
405 | 11.2k | return {}; |
406 | 11.2k | } |
407 | 36 | case OpCode::Ref__test: |
408 | 320 | case OpCode::Ref__cast: { |
409 | | // The AST node information is handled. |
410 | 320 | EXPECTED_TRY(auto Type, |
411 | 315 | loadHeapType(TypeCode::Ref, ASTNodeAttr::Instruction)); |
412 | 315 | Instr.setValType(Type); |
413 | 315 | return {}; |
414 | 320 | } |
415 | 5.69k | case OpCode::Ref__is_null: |
416 | 8.25k | case OpCode::Ref__eq: |
417 | 9.42k | case OpCode::Ref__as_non_null: |
418 | 9.42k | return {}; |
419 | 7.75k | case OpCode::Ref__func: |
420 | 8.29k | case OpCode::Struct__new: |
421 | 8.67k | case OpCode::Struct__new_default: |
422 | 8.75k | case OpCode::Array__new: |
423 | 8.79k | case OpCode::Array__new_default: |
424 | 8.85k | case OpCode::Array__get: |
425 | 8.93k | case OpCode::Array__get_s: |
426 | 8.96k | case OpCode::Array__get_u: |
427 | 9.02k | case OpCode::Array__set: |
428 | 9.12k | case OpCode::Array__fill: |
429 | 9.12k | return readU32(Instr.getTargetIndex()); |
430 | 80 | case OpCode::Struct__get: |
431 | 220 | case OpCode::Struct__get_s: |
432 | 499 | case OpCode::Struct__get_u: |
433 | 531 | case OpCode::Struct__set: |
434 | 716 | case OpCode::Array__new_fixed: |
435 | 797 | case OpCode::Array__new_data: |
436 | 851 | case OpCode::Array__new_elem: |
437 | 927 | case OpCode::Array__copy: |
438 | 953 | case OpCode::Array__init_data: |
439 | 1.41k | case OpCode::Array__init_elem: |
440 | 1.41k | EXPECTED_TRY(readU32(Instr.getTargetIndex())); |
441 | 1.39k | return readU32(Instr.getSourceIndex()); |
442 | 457 | case OpCode::Br_on_cast: |
443 | 638 | case OpCode::Br_on_cast_fail: { |
444 | | // Read the flag. |
445 | 638 | uint8_t Flag = 0U; |
446 | 638 | EXPECTED_TRY(readU8(Flag).map_error(ReportError)); |
447 | | // Read the label index. |
448 | 637 | uint32_t LabelIdx = 0U; |
449 | 637 | EXPECTED_TRY(readU32(LabelIdx).map_error(ReportError)); |
450 | | // Read the heap types. |
451 | 635 | Instr.setBrCast(LabelIdx); |
452 | 635 | TypeCode TC = ((Flag & 0x01U) ? TypeCode::RefNull : TypeCode::Ref); |
453 | 635 | EXPECTED_TRY( |
454 | 632 | Instr.getBrCast().RType1, |
455 | 632 | loadHeapType(TC, ASTNodeAttr::Instruction).map_error(ReportError)); |
456 | 632 | TC = ((Flag & 0x02U) ? TypeCode::RefNull : TypeCode::Ref); |
457 | 632 | EXPECTED_TRY( |
458 | 629 | Instr.getBrCast().RType2, |
459 | 629 | loadHeapType(TC, ASTNodeAttr::Instruction).map_error(ReportError)); |
460 | 629 | return {}; |
461 | 632 | } |
462 | 84 | case OpCode::Array__len: |
463 | 129 | case OpCode::Any__convert_extern: |
464 | 320 | case OpCode::Extern__convert_any: |
465 | 408 | case OpCode::Ref__i31: |
466 | 472 | case OpCode::I31__get_s: |
467 | 503 | case OpCode::I31__get_u: |
468 | 503 | return {}; |
469 | | |
470 | | // Parametric Instructions. |
471 | 19.4k | case OpCode::Drop: |
472 | 33.0k | case OpCode::Select: |
473 | 33.0k | return {}; |
474 | 1.87k | case OpCode::Select_t: { |
475 | | // Read the vector of value types. |
476 | 1.87k | EXPECTED_TRY(uint32_t VecCnt, loadVecCnt().map_error(ReportError)); |
477 | 1.86k | Instr.setValTypeListSize(VecCnt); |
478 | 4.45k | for (uint32_t I = 0; I < VecCnt; ++I) { |
479 | | // The AST node information is handled. |
480 | 2.61k | EXPECTED_TRY(Instr.getValTypeList()[I], |
481 | 2.59k | loadValType(ASTNodeAttr::Instruction)); |
482 | 2.59k | } |
483 | 1.84k | return {}; |
484 | 1.86k | } |
485 | | |
486 | | // Variable Instructions. |
487 | 31.1k | case OpCode::Local__get: |
488 | 41.1k | case OpCode::Local__set: |
489 | 51.5k | case OpCode::Local__tee: |
490 | 52.8k | case OpCode::Global__get: |
491 | 53.8k | case OpCode::Global__set: |
492 | 53.8k | return readU32(Instr.getTargetIndex()); |
493 | | |
494 | | // Table Instructions. |
495 | 139 | case OpCode::Table__init: |
496 | 139 | EXPECTED_TRY(readU32(Instr.getSourceIndex())); |
497 | 137 | [[fallthrough]]; |
498 | 2.67k | case OpCode::Table__get: |
499 | 5.24k | case OpCode::Table__set: |
500 | 7.96k | case OpCode::Table__grow: |
501 | 8.94k | case OpCode::Table__size: |
502 | 9.26k | case OpCode::Table__fill: |
503 | 9.93k | case OpCode::Elem__drop: |
504 | 9.93k | return readU32(Instr.getTargetIndex()); |
505 | 1.95k | case OpCode::Table__copy: |
506 | 1.95k | EXPECTED_TRY(readU32(Instr.getTargetIndex())); |
507 | 1.95k | return readU32(Instr.getSourceIndex()); |
508 | | |
509 | | // Memory Instructions. |
510 | 4.35k | case OpCode::I32__load: |
511 | 11.7k | case OpCode::I64__load: |
512 | 12.1k | case OpCode::F32__load: |
513 | 14.7k | case OpCode::F64__load: |
514 | 17.7k | case OpCode::I32__load8_s: |
515 | 18.5k | case OpCode::I32__load8_u: |
516 | 21.0k | case OpCode::I32__load16_s: |
517 | 28.3k | case OpCode::I32__load16_u: |
518 | 32.2k | case OpCode::I64__load8_s: |
519 | 36.3k | case OpCode::I64__load8_u: |
520 | 41.3k | case OpCode::I64__load16_s: |
521 | 49.8k | case OpCode::I64__load16_u: |
522 | 52.7k | case OpCode::I64__load32_s: |
523 | 56.3k | case OpCode::I64__load32_u: |
524 | 58.1k | case OpCode::I32__store: |
525 | 63.7k | case OpCode::I64__store: |
526 | 66.7k | case OpCode::F32__store: |
527 | 67.5k | case OpCode::F64__store: |
528 | 71.1k | case OpCode::I32__store8: |
529 | 75.6k | case OpCode::I32__store16: |
530 | 77.7k | case OpCode::I64__store8: |
531 | 79.7k | case OpCode::I64__store16: |
532 | 80.9k | case OpCode::I64__store32: |
533 | 80.9k | return readMemImmediate(); |
534 | | |
535 | 741 | case OpCode::Memory__init: |
536 | 741 | if (!HasDataSection) { |
537 | 2 | return logLoadError(ErrCode::Value::DataCountRequired, Instr.getOffset(), |
538 | 2 | ASTNodeAttr::Instruction); |
539 | 2 | } |
540 | 739 | EXPECTED_TRY(readU32(Instr.getSourceIndex())); |
541 | 733 | [[fallthrough]]; |
542 | 8.54k | case OpCode::Memory__grow: |
543 | 16.6k | case OpCode::Memory__size: |
544 | 19.1k | case OpCode::Memory__fill: |
545 | 19.1k | if (Conf.hasProposal(Proposal::MultiMemories)) { |
546 | 19.1k | return readU32(Instr.getTargetIndex()); |
547 | 19.1k | } |
548 | 0 | return readCheckZero(Instr.getTargetIndex()); |
549 | 762 | case OpCode::Memory__copy: |
550 | 762 | if (Conf.hasProposal(Proposal::MultiMemories)) { |
551 | 762 | EXPECTED_TRY(readU32(Instr.getTargetIndex())); |
552 | 761 | return readU32(Instr.getSourceIndex()); |
553 | 762 | } |
554 | 0 | EXPECTED_TRY(readCheckZero(Instr.getTargetIndex())); |
555 | 0 | return readCheckZero(Instr.getSourceIndex()); |
556 | 680 | case OpCode::Data__drop: |
557 | 680 | if (!HasDataSection) { |
558 | 1 | return logLoadError(ErrCode::Value::DataCountRequired, Instr.getOffset(), |
559 | 1 | ASTNodeAttr::Instruction); |
560 | 1 | } |
561 | 679 | return readU32(Instr.getTargetIndex()); |
562 | | |
563 | | // Const Instructions. |
564 | 2.00M | case OpCode::I32__const: |
565 | 2.00M | EXPECTED_TRY(FMgr.readS32().map_error(ReportError).map([&](int32_t Num) { |
566 | 2.00M | Instr.setNum(static_cast<uint32_t>(Num)); |
567 | 2.00M | })); |
568 | 2.00M | return {}; |
569 | 258k | case OpCode::I64__const: |
570 | 258k | EXPECTED_TRY(FMgr.readS64().map_error(ReportError).map([&](int64_t Num) { |
571 | 258k | Instr.setNum(static_cast<uint64_t>(Num)); |
572 | 258k | })); |
573 | 258k | return {}; |
574 | 40.0k | case OpCode::F32__const: |
575 | 40.0k | EXPECTED_TRY(FMgr.readF32().map_error(ReportError).map([&](float Num) { |
576 | 40.0k | Instr.setNum(Num); |
577 | 40.0k | })); |
578 | 40.0k | return {}; |
579 | 15.8k | case OpCode::F64__const: |
580 | 15.8k | EXPECTED_TRY(FMgr.readF64().map_error(ReportError).map([&](double Num) { |
581 | 15.8k | Instr.setNum(Num); |
582 | 15.8k | })); |
583 | 15.8k | return {}; |
584 | | |
585 | | // Unary Numeric Instructions. |
586 | 21.9k | case OpCode::I32__eqz: |
587 | 38.8k | case OpCode::I32__clz: |
588 | 45.0k | case OpCode::I32__ctz: |
589 | 118k | case OpCode::I32__popcnt: |
590 | 129k | case OpCode::I64__eqz: |
591 | 132k | case OpCode::I64__clz: |
592 | 135k | case OpCode::I64__ctz: |
593 | 156k | case OpCode::I64__popcnt: |
594 | 158k | case OpCode::F32__abs: |
595 | 161k | case OpCode::F32__neg: |
596 | 165k | case OpCode::F32__ceil: |
597 | 166k | case OpCode::F32__floor: |
598 | 169k | case OpCode::F32__trunc: |
599 | 176k | case OpCode::F32__nearest: |
600 | 184k | case OpCode::F32__sqrt: |
601 | 186k | case OpCode::F64__abs: |
602 | 189k | case OpCode::F64__neg: |
603 | 198k | case OpCode::F64__ceil: |
604 | 201k | case OpCode::F64__floor: |
605 | 205k | case OpCode::F64__trunc: |
606 | 206k | case OpCode::F64__nearest: |
607 | 214k | case OpCode::F64__sqrt: |
608 | 218k | case OpCode::I32__wrap_i64: |
609 | 225k | case OpCode::I32__trunc_f32_s: |
610 | 231k | case OpCode::I32__trunc_f32_u: |
611 | 234k | case OpCode::I32__trunc_f64_s: |
612 | 239k | case OpCode::I32__trunc_f64_u: |
613 | 248k | case OpCode::I64__extend_i32_s: |
614 | 253k | case OpCode::I64__extend_i32_u: |
615 | 255k | case OpCode::I64__trunc_f32_s: |
616 | 256k | case OpCode::I64__trunc_f32_u: |
617 | 260k | case OpCode::I64__trunc_f64_s: |
618 | 264k | case OpCode::I64__trunc_f64_u: |
619 | 271k | case OpCode::F32__convert_i32_s: |
620 | 275k | case OpCode::F32__convert_i32_u: |
621 | 279k | case OpCode::F32__convert_i64_s: |
622 | 283k | case OpCode::F32__convert_i64_u: |
623 | 284k | case OpCode::F32__demote_f64: |
624 | 291k | case OpCode::F64__convert_i32_s: |
625 | 298k | case OpCode::F64__convert_i32_u: |
626 | 323k | case OpCode::F64__convert_i64_s: |
627 | 325k | case OpCode::F64__convert_i64_u: |
628 | 327k | case OpCode::F64__promote_f32: |
629 | 332k | case OpCode::I32__reinterpret_f32: |
630 | 337k | case OpCode::I64__reinterpret_f64: |
631 | 355k | case OpCode::F32__reinterpret_i32: |
632 | 363k | case OpCode::F64__reinterpret_i64: |
633 | 373k | case OpCode::I32__extend8_s: |
634 | 383k | case OpCode::I32__extend16_s: |
635 | 384k | case OpCode::I64__extend8_s: |
636 | 406k | case OpCode::I64__extend16_s: |
637 | 413k | case OpCode::I64__extend32_s: |
638 | 417k | case OpCode::I32__trunc_sat_f32_s: |
639 | 419k | case OpCode::I32__trunc_sat_f32_u: |
640 | 423k | case OpCode::I32__trunc_sat_f64_s: |
641 | 424k | case OpCode::I32__trunc_sat_f64_u: |
642 | 426k | case OpCode::I64__trunc_sat_f32_s: |
643 | 427k | case OpCode::I64__trunc_sat_f32_u: |
644 | 431k | case OpCode::I64__trunc_sat_f64_s: |
645 | 433k | case OpCode::I64__trunc_sat_f64_u: |
646 | | |
647 | | // Binary Numeric Instructions. |
648 | 438k | case OpCode::I32__eq: |
649 | 442k | case OpCode::I32__ne: |
650 | 453k | case OpCode::I32__lt_s: |
651 | 477k | case OpCode::I32__lt_u: |
652 | 485k | case OpCode::I32__gt_s: |
653 | 507k | case OpCode::I32__gt_u: |
654 | 517k | case OpCode::I32__le_s: |
655 | 521k | case OpCode::I32__le_u: |
656 | 529k | case OpCode::I32__ge_s: |
657 | 535k | case OpCode::I32__ge_u: |
658 | 537k | case OpCode::I64__eq: |
659 | 542k | case OpCode::I64__ne: |
660 | 550k | case OpCode::I64__lt_s: |
661 | 551k | case OpCode::I64__lt_u: |
662 | 554k | case OpCode::I64__gt_s: |
663 | 555k | case OpCode::I64__gt_u: |
664 | 558k | case OpCode::I64__le_s: |
665 | 567k | case OpCode::I64__le_u: |
666 | 568k | case OpCode::I64__ge_s: |
667 | 570k | case OpCode::I64__ge_u: |
668 | 572k | case OpCode::F32__eq: |
669 | 574k | case OpCode::F32__ne: |
670 | 576k | case OpCode::F32__lt: |
671 | 592k | case OpCode::F32__gt: |
672 | 597k | case OpCode::F32__le: |
673 | 600k | case OpCode::F32__ge: |
674 | 606k | case OpCode::F64__eq: |
675 | 624k | case OpCode::F64__ne: |
676 | 627k | case OpCode::F64__lt: |
677 | 630k | case OpCode::F64__gt: |
678 | 632k | case OpCode::F64__le: |
679 | 637k | case OpCode::F64__ge: |
680 | | |
681 | 642k | case OpCode::I32__add: |
682 | 649k | case OpCode::I32__sub: |
683 | 654k | case OpCode::I32__mul: |
684 | 671k | case OpCode::I32__div_s: |
685 | 691k | case OpCode::I32__div_u: |
686 | 696k | case OpCode::I32__rem_s: |
687 | 703k | case OpCode::I32__rem_u: |
688 | 707k | case OpCode::I32__and: |
689 | 714k | case OpCode::I32__or: |
690 | 723k | case OpCode::I32__xor: |
691 | 741k | case OpCode::I32__shl: |
692 | 751k | case OpCode::I32__shr_s: |
693 | 772k | case OpCode::I32__shr_u: |
694 | 786k | case OpCode::I32__rotl: |
695 | 792k | case OpCode::I32__rotr: |
696 | 803k | case OpCode::I64__add: |
697 | 809k | case OpCode::I64__sub: |
698 | 813k | case OpCode::I64__mul: |
699 | 818k | case OpCode::I64__div_s: |
700 | 828k | case OpCode::I64__div_u: |
701 | 834k | case OpCode::I64__rem_s: |
702 | 837k | case OpCode::I64__rem_u: |
703 | 840k | case OpCode::I64__and: |
704 | 847k | case OpCode::I64__or: |
705 | 850k | case OpCode::I64__xor: |
706 | 852k | case OpCode::I64__shl: |
707 | 856k | case OpCode::I64__shr_s: |
708 | 860k | case OpCode::I64__shr_u: |
709 | 869k | case OpCode::I64__rotl: |
710 | 876k | case OpCode::I64__rotr: |
711 | 877k | case OpCode::F32__add: |
712 | 882k | case OpCode::F32__sub: |
713 | 886k | case OpCode::F32__mul: |
714 | 887k | case OpCode::F32__div: |
715 | 888k | case OpCode::F32__min: |
716 | 891k | case OpCode::F32__max: |
717 | 893k | case OpCode::F32__copysign: |
718 | 896k | case OpCode::F64__add: |
719 | 904k | case OpCode::F64__sub: |
720 | 905k | case OpCode::F64__mul: |
721 | 907k | case OpCode::F64__div: |
722 | 909k | case OpCode::F64__min: |
723 | 913k | case OpCode::F64__max: |
724 | 915k | case OpCode::F64__copysign: |
725 | 915k | return {}; |
726 | | |
727 | | // SIMD Memory Instruction. |
728 | 23.6k | case OpCode::V128__load: |
729 | 27.6k | case OpCode::V128__load8x8_s: |
730 | 28.2k | case OpCode::V128__load8x8_u: |
731 | 29.5k | case OpCode::V128__load16x4_s: |
732 | 33.2k | case OpCode::V128__load16x4_u: |
733 | 35.6k | case OpCode::V128__load32x2_s: |
734 | 36.5k | case OpCode::V128__load32x2_u: |
735 | 38.1k | case OpCode::V128__load8_splat: |
736 | 41.5k | case OpCode::V128__load16_splat: |
737 | 44.5k | case OpCode::V128__load32_splat: |
738 | 47.2k | case OpCode::V128__load64_splat: |
739 | 50.9k | case OpCode::V128__load32_zero: |
740 | 51.5k | case OpCode::V128__load64_zero: |
741 | 52.8k | case OpCode::V128__store: |
742 | 52.8k | return readMemImmediate(); |
743 | 809 | case OpCode::V128__load8_lane: |
744 | 5.29k | case OpCode::V128__load16_lane: |
745 | 6.46k | case OpCode::V128__load32_lane: |
746 | 7.97k | case OpCode::V128__load64_lane: |
747 | 9.94k | case OpCode::V128__store8_lane: |
748 | 10.3k | case OpCode::V128__store16_lane: |
749 | 14.4k | case OpCode::V128__store32_lane: |
750 | 15.8k | case OpCode::V128__store64_lane: |
751 | | // Read memory immediate. |
752 | 15.8k | EXPECTED_TRY(readMemImmediate()); |
753 | | // Read lane index. |
754 | 15.7k | return readU8(Instr.getMemoryLane()); |
755 | | |
756 | | // SIMD Const Instruction. |
757 | 822 | case OpCode::V128__const: |
758 | | // SIMD Shuffle Instruction. |
759 | 1.99k | case OpCode::I8x16__shuffle: { |
760 | | // Read value. |
761 | 1.99k | uint128_t Value = 0U; |
762 | 33.6k | for (uint32_t I = 0U; I < 16U; ++I) { |
763 | 31.6k | EXPECTED_TRY(FMgr.readByte().map_error(ReportError).map([&](uint8_t B) { |
764 | 31.6k | Value |= static_cast<uint128_t>(static_cast<uint32_t>(B)) << (I * 8U); |
765 | 31.6k | })); |
766 | 31.6k | } |
767 | 1.97k | Instr.setNum(Value); |
768 | 1.97k | return {}; |
769 | 1.99k | } |
770 | | |
771 | | // SIMD Lane Instructions. |
772 | 4.40k | case OpCode::I8x16__extract_lane_s: |
773 | 4.95k | case OpCode::I8x16__extract_lane_u: |
774 | 8.38k | case OpCode::I8x16__replace_lane: |
775 | 12.6k | case OpCode::I16x8__extract_lane_s: |
776 | 14.3k | case OpCode::I16x8__extract_lane_u: |
777 | 16.3k | case OpCode::I16x8__replace_lane: |
778 | 21.6k | case OpCode::I32x4__extract_lane: |
779 | 23.8k | case OpCode::I32x4__replace_lane: |
780 | 24.9k | case OpCode::I64x2__extract_lane: |
781 | 26.9k | case OpCode::I64x2__replace_lane: |
782 | 27.9k | case OpCode::F32x4__extract_lane: |
783 | 29.4k | case OpCode::F32x4__replace_lane: |
784 | 31.1k | case OpCode::F64x2__extract_lane: |
785 | 33.3k | case OpCode::F64x2__replace_lane: |
786 | | // Read lane index. |
787 | 33.3k | return readU8(Instr.getMemoryLane()); |
788 | | |
789 | | // SIMD Numeric Instructions. |
790 | 4.43k | case OpCode::I8x16__swizzle: |
791 | 153k | case OpCode::I8x16__splat: |
792 | 197k | case OpCode::I16x8__splat: |
793 | 208k | case OpCode::I32x4__splat: |
794 | 211k | case OpCode::I64x2__splat: |
795 | 212k | case OpCode::F32x4__splat: |
796 | 217k | case OpCode::F64x2__splat: |
797 | | |
798 | 221k | case OpCode::I8x16__eq: |
799 | 223k | case OpCode::I8x16__ne: |
800 | 225k | case OpCode::I8x16__lt_s: |
801 | 227k | case OpCode::I8x16__lt_u: |
802 | 232k | case OpCode::I8x16__gt_s: |
803 | 233k | case OpCode::I8x16__gt_u: |
804 | 234k | case OpCode::I8x16__le_s: |
805 | 236k | case OpCode::I8x16__le_u: |
806 | 237k | case OpCode::I8x16__ge_s: |
807 | 240k | case OpCode::I8x16__ge_u: |
808 | | |
809 | 242k | case OpCode::I16x8__eq: |
810 | 245k | case OpCode::I16x8__ne: |
811 | 249k | case OpCode::I16x8__lt_s: |
812 | 254k | case OpCode::I16x8__lt_u: |
813 | 258k | case OpCode::I16x8__gt_s: |
814 | 263k | case OpCode::I16x8__gt_u: |
815 | 265k | case OpCode::I16x8__le_s: |
816 | 266k | case OpCode::I16x8__le_u: |
817 | 269k | case OpCode::I16x8__ge_s: |
818 | 272k | case OpCode::I16x8__ge_u: |
819 | | |
820 | 274k | case OpCode::I32x4__eq: |
821 | 275k | case OpCode::I32x4__ne: |
822 | 279k | case OpCode::I32x4__lt_s: |
823 | 280k | case OpCode::I32x4__lt_u: |
824 | 280k | case OpCode::I32x4__gt_s: |
825 | 282k | case OpCode::I32x4__gt_u: |
826 | 287k | case OpCode::I32x4__le_s: |
827 | 289k | case OpCode::I32x4__le_u: |
828 | 289k | case OpCode::I32x4__ge_s: |
829 | 292k | case OpCode::I32x4__ge_u: |
830 | | |
831 | 300k | case OpCode::F32x4__eq: |
832 | 301k | case OpCode::F32x4__ne: |
833 | 303k | case OpCode::F32x4__lt: |
834 | 304k | case OpCode::F32x4__gt: |
835 | 306k | case OpCode::F32x4__le: |
836 | 308k | case OpCode::F32x4__ge: |
837 | | |
838 | 318k | case OpCode::F64x2__eq: |
839 | 320k | case OpCode::F64x2__ne: |
840 | 321k | case OpCode::F64x2__lt: |
841 | 325k | case OpCode::F64x2__gt: |
842 | 327k | case OpCode::F64x2__le: |
843 | 331k | case OpCode::F64x2__ge: |
844 | | |
845 | 335k | case OpCode::V128__not: |
846 | 336k | case OpCode::V128__and: |
847 | 337k | case OpCode::V128__andnot: |
848 | 339k | case OpCode::V128__or: |
849 | 341k | case OpCode::V128__xor: |
850 | 342k | case OpCode::V128__bitselect: |
851 | 344k | case OpCode::V128__any_true: |
852 | | |
853 | 355k | case OpCode::I8x16__abs: |
854 | 367k | case OpCode::I8x16__neg: |
855 | 369k | case OpCode::I8x16__popcnt: |
856 | 370k | case OpCode::I8x16__all_true: |
857 | 373k | case OpCode::I8x16__bitmask: |
858 | 376k | case OpCode::I8x16__narrow_i16x8_s: |
859 | 377k | case OpCode::I8x16__narrow_i16x8_u: |
860 | 380k | case OpCode::I8x16__shl: |
861 | 382k | case OpCode::I8x16__shr_s: |
862 | 384k | case OpCode::I8x16__shr_u: |
863 | 384k | case OpCode::I8x16__add: |
864 | 387k | case OpCode::I8x16__add_sat_s: |
865 | 389k | case OpCode::I8x16__add_sat_u: |
866 | 393k | case OpCode::I8x16__sub: |
867 | 396k | case OpCode::I8x16__sub_sat_s: |
868 | 398k | case OpCode::I8x16__sub_sat_u: |
869 | 400k | case OpCode::I8x16__min_s: |
870 | 407k | case OpCode::I8x16__min_u: |
871 | 408k | case OpCode::I8x16__max_s: |
872 | 411k | case OpCode::I8x16__max_u: |
873 | 412k | case OpCode::I8x16__avgr_u: |
874 | | |
875 | 414k | case OpCode::I16x8__abs: |
876 | 415k | case OpCode::I16x8__neg: |
877 | 416k | case OpCode::I16x8__all_true: |
878 | 419k | case OpCode::I16x8__bitmask: |
879 | 421k | case OpCode::I16x8__narrow_i32x4_s: |
880 | 423k | case OpCode::I16x8__narrow_i32x4_u: |
881 | 428k | case OpCode::I16x8__extend_low_i8x16_s: |
882 | 428k | case OpCode::I16x8__extend_high_i8x16_s: |
883 | 430k | case OpCode::I16x8__extend_low_i8x16_u: |
884 | 431k | case OpCode::I16x8__extend_high_i8x16_u: |
885 | 432k | case OpCode::I16x8__shl: |
886 | 434k | case OpCode::I16x8__shr_s: |
887 | 434k | case OpCode::I16x8__shr_u: |
888 | 436k | case OpCode::I16x8__add: |
889 | 437k | case OpCode::I16x8__add_sat_s: |
890 | 439k | case OpCode::I16x8__add_sat_u: |
891 | 443k | case OpCode::I16x8__sub: |
892 | 447k | case OpCode::I16x8__sub_sat_s: |
893 | 447k | case OpCode::I16x8__sub_sat_u: |
894 | 448k | case OpCode::I16x8__mul: |
895 | 451k | case OpCode::I16x8__min_s: |
896 | 452k | case OpCode::I16x8__min_u: |
897 | 455k | case OpCode::I16x8__max_s: |
898 | 458k | case OpCode::I16x8__max_u: |
899 | 461k | case OpCode::I16x8__avgr_u: |
900 | 463k | case OpCode::I16x8__extmul_low_i8x16_s: |
901 | 465k | case OpCode::I16x8__extmul_high_i8x16_s: |
902 | 466k | case OpCode::I16x8__extmul_low_i8x16_u: |
903 | 472k | case OpCode::I16x8__extmul_high_i8x16_u: |
904 | 473k | case OpCode::I16x8__q15mulr_sat_s: |
905 | 476k | case OpCode::I16x8__extadd_pairwise_i8x16_s: |
906 | 481k | case OpCode::I16x8__extadd_pairwise_i8x16_u: |
907 | | |
908 | 483k | case OpCode::I32x4__abs: |
909 | 484k | case OpCode::I32x4__neg: |
910 | 487k | case OpCode::I32x4__all_true: |
911 | 491k | case OpCode::I32x4__bitmask: |
912 | 492k | case OpCode::I32x4__extend_low_i16x8_s: |
913 | 494k | case OpCode::I32x4__extend_high_i16x8_s: |
914 | 505k | case OpCode::I32x4__extend_low_i16x8_u: |
915 | 507k | case OpCode::I32x4__extend_high_i16x8_u: |
916 | 510k | case OpCode::I32x4__shl: |
917 | 512k | case OpCode::I32x4__shr_s: |
918 | 515k | case OpCode::I32x4__shr_u: |
919 | 516k | case OpCode::I32x4__add: |
920 | 518k | case OpCode::I32x4__sub: |
921 | 520k | case OpCode::I32x4__mul: |
922 | 521k | case OpCode::I32x4__min_s: |
923 | 522k | case OpCode::I32x4__min_u: |
924 | 523k | case OpCode::I32x4__max_s: |
925 | 525k | case OpCode::I32x4__max_u: |
926 | 526k | case OpCode::I32x4__extmul_low_i16x8_s: |
927 | 527k | case OpCode::I32x4__extmul_high_i16x8_s: |
928 | 528k | case OpCode::I32x4__extmul_low_i16x8_u: |
929 | 529k | case OpCode::I32x4__extmul_high_i16x8_u: |
930 | 533k | case OpCode::I32x4__extadd_pairwise_i16x8_s: |
931 | 540k | case OpCode::I32x4__extadd_pairwise_i16x8_u: |
932 | | |
933 | 542k | case OpCode::I64x2__abs: |
934 | 544k | case OpCode::I64x2__neg: |
935 | 544k | case OpCode::I64x2__bitmask: |
936 | 545k | case OpCode::I64x2__extend_low_i32x4_s: |
937 | 548k | case OpCode::I64x2__extend_high_i32x4_s: |
938 | 551k | case OpCode::I64x2__extend_low_i32x4_u: |
939 | 556k | case OpCode::I64x2__extend_high_i32x4_u: |
940 | 556k | case OpCode::I64x2__shl: |
941 | 558k | case OpCode::I64x2__shr_s: |
942 | 559k | case OpCode::I64x2__shr_u: |
943 | 561k | case OpCode::I64x2__add: |
944 | 562k | case OpCode::I64x2__sub: |
945 | 564k | case OpCode::I64x2__mul: |
946 | 565k | case OpCode::I64x2__eq: |
947 | 566k | case OpCode::I64x2__ne: |
948 | 569k | case OpCode::I64x2__lt_s: |
949 | 570k | case OpCode::I64x2__gt_s: |
950 | 570k | case OpCode::I64x2__le_s: |
951 | 574k | case OpCode::I64x2__ge_s: |
952 | 576k | case OpCode::I64x2__all_true: |
953 | 577k | case OpCode::I64x2__extmul_low_i32x4_s: |
954 | 579k | case OpCode::I64x2__extmul_high_i32x4_s: |
955 | 580k | case OpCode::I64x2__extmul_low_i32x4_u: |
956 | 582k | case OpCode::I64x2__extmul_high_i32x4_u: |
957 | | |
958 | 583k | case OpCode::F32x4__abs: |
959 | 585k | case OpCode::F32x4__neg: |
960 | 586k | case OpCode::F32x4__sqrt: |
961 | 591k | case OpCode::F32x4__add: |
962 | 593k | case OpCode::F32x4__sub: |
963 | 596k | case OpCode::F32x4__mul: |
964 | 597k | case OpCode::F32x4__div: |
965 | 599k | case OpCode::F32x4__min: |
966 | 600k | case OpCode::F32x4__max: |
967 | 608k | case OpCode::F32x4__pmin: |
968 | 610k | case OpCode::F32x4__pmax: |
969 | | |
970 | 612k | case OpCode::F64x2__abs: |
971 | 615k | case OpCode::F64x2__neg: |
972 | 616k | case OpCode::F64x2__sqrt: |
973 | 618k | case OpCode::F64x2__add: |
974 | 623k | case OpCode::F64x2__sub: |
975 | 624k | case OpCode::F64x2__mul: |
976 | 625k | case OpCode::F64x2__div: |
977 | 625k | case OpCode::F64x2__min: |
978 | 626k | case OpCode::F64x2__max: |
979 | 628k | case OpCode::F64x2__pmin: |
980 | 629k | case OpCode::F64x2__pmax: |
981 | | |
982 | 631k | case OpCode::I32x4__trunc_sat_f32x4_s: |
983 | 651k | case OpCode::I32x4__trunc_sat_f32x4_u: |
984 | 653k | case OpCode::F32x4__convert_i32x4_s: |
985 | 657k | case OpCode::F32x4__convert_i32x4_u: |
986 | 661k | case OpCode::I32x4__trunc_sat_f64x2_s_zero: |
987 | 672k | case OpCode::I32x4__trunc_sat_f64x2_u_zero: |
988 | 676k | case OpCode::F64x2__convert_low_i32x4_s: |
989 | 684k | case OpCode::F64x2__convert_low_i32x4_u: |
990 | 687k | case OpCode::F32x4__demote_f64x2_zero: |
991 | 691k | case OpCode::F64x2__promote_low_f32x4: |
992 | | |
993 | 692k | case OpCode::I32x4__dot_i16x8_s: |
994 | 697k | case OpCode::F32x4__ceil: |
995 | 704k | case OpCode::F32x4__floor: |
996 | 711k | case OpCode::F32x4__trunc: |
997 | 713k | case OpCode::F32x4__nearest: |
998 | 715k | case OpCode::F64x2__ceil: |
999 | 717k | case OpCode::F64x2__floor: |
1000 | 719k | case OpCode::F64x2__trunc: |
1001 | 721k | case OpCode::F64x2__nearest: |
1002 | 721k | return {}; |
1003 | | |
1004 | 95 | case OpCode::I8x16__relaxed_swizzle: |
1005 | 285 | case OpCode::I32x4__relaxed_trunc_f32x4_s: |
1006 | 337 | case OpCode::I32x4__relaxed_trunc_f32x4_u: |
1007 | 381 | case OpCode::I32x4__relaxed_trunc_f64x2_s_zero: |
1008 | 527 | case OpCode::I32x4__relaxed_trunc_f64x2_u_zero: |
1009 | 619 | case OpCode::F32x4__relaxed_madd: |
1010 | 716 | case OpCode::F32x4__relaxed_nmadd: |
1011 | 794 | case OpCode::F64x2__relaxed_madd: |
1012 | 871 | case OpCode::F64x2__relaxed_nmadd: |
1013 | 1.00k | case OpCode::I8x16__relaxed_laneselect: |
1014 | 1.07k | case OpCode::I16x8__relaxed_laneselect: |
1015 | 1.13k | case OpCode::I32x4__relaxed_laneselect: |
1016 | 1.15k | case OpCode::I64x2__relaxed_laneselect: |
1017 | 1.20k | case OpCode::F32x4__relaxed_min: |
1018 | 1.23k | case OpCode::F32x4__relaxed_max: |
1019 | 1.27k | case OpCode::F64x2__relaxed_min: |
1020 | 1.38k | case OpCode::F64x2__relaxed_max: |
1021 | 1.44k | case OpCode::I16x8__relaxed_q15mulr_s: |
1022 | 1.51k | case OpCode::I16x8__relaxed_dot_i8x16_i7x16_s: |
1023 | 1.70k | case OpCode::I32x4__relaxed_dot_i8x16_i7x16_add_s: |
1024 | 1.70k | return {}; |
1025 | | |
1026 | | // Atomic Memory Instructions. |
1027 | 1.13k | case OpCode::Atomic__fence: |
1028 | 1.13k | return readCheckZero(Instr.getTargetIndex()); |
1029 | | |
1030 | 2.94k | case OpCode::Memory__atomic__notify: |
1031 | 5.55k | case OpCode::Memory__atomic__wait32: |
1032 | 5.67k | case OpCode::Memory__atomic__wait64: |
1033 | | |
1034 | 5.67k | case OpCode::I32__atomic__load: |
1035 | 5.67k | case OpCode::I64__atomic__load: |
1036 | 5.67k | case OpCode::I32__atomic__load8_u: |
1037 | 5.67k | case OpCode::I32__atomic__load16_u: |
1038 | 5.67k | case OpCode::I64__atomic__load8_u: |
1039 | 5.67k | case OpCode::I64__atomic__load16_u: |
1040 | 5.67k | case OpCode::I64__atomic__load32_u: |
1041 | 5.67k | case OpCode::I32__atomic__store: |
1042 | 5.67k | case OpCode::I64__atomic__store: |
1043 | 5.67k | case OpCode::I32__atomic__store8: |
1044 | 5.67k | case OpCode::I32__atomic__store16: |
1045 | 5.67k | case OpCode::I64__atomic__store8: |
1046 | 5.67k | case OpCode::I64__atomic__store16: |
1047 | 5.67k | case OpCode::I64__atomic__store32: |
1048 | 5.67k | case OpCode::I32__atomic__rmw__add: |
1049 | 5.67k | case OpCode::I64__atomic__rmw__add: |
1050 | 5.67k | case OpCode::I32__atomic__rmw8__add_u: |
1051 | 5.67k | case OpCode::I32__atomic__rmw16__add_u: |
1052 | 5.67k | case OpCode::I64__atomic__rmw8__add_u: |
1053 | 5.67k | case OpCode::I64__atomic__rmw16__add_u: |
1054 | 5.67k | case OpCode::I64__atomic__rmw32__add_u: |
1055 | 5.67k | case OpCode::I32__atomic__rmw__sub: |
1056 | 5.67k | case OpCode::I64__atomic__rmw__sub: |
1057 | 5.67k | case OpCode::I32__atomic__rmw8__sub_u: |
1058 | 5.67k | case OpCode::I32__atomic__rmw16__sub_u: |
1059 | 5.67k | case OpCode::I64__atomic__rmw8__sub_u: |
1060 | 5.67k | case OpCode::I64__atomic__rmw16__sub_u: |
1061 | 5.67k | case OpCode::I64__atomic__rmw32__sub_u: |
1062 | 5.67k | case OpCode::I32__atomic__rmw__and: |
1063 | 5.67k | case OpCode::I64__atomic__rmw__and: |
1064 | 5.67k | case OpCode::I32__atomic__rmw8__and_u: |
1065 | 5.67k | case OpCode::I32__atomic__rmw16__and_u: |
1066 | 5.67k | case OpCode::I64__atomic__rmw8__and_u: |
1067 | 5.67k | case OpCode::I64__atomic__rmw16__and_u: |
1068 | 5.67k | case OpCode::I64__atomic__rmw32__and_u: |
1069 | 5.67k | case OpCode::I32__atomic__rmw__or: |
1070 | 5.67k | case OpCode::I64__atomic__rmw__or: |
1071 | 5.67k | case OpCode::I32__atomic__rmw8__or_u: |
1072 | 5.67k | case OpCode::I32__atomic__rmw16__or_u: |
1073 | 5.67k | case OpCode::I64__atomic__rmw8__or_u: |
1074 | 5.67k | case OpCode::I64__atomic__rmw16__or_u: |
1075 | 5.67k | case OpCode::I64__atomic__rmw32__or_u: |
1076 | 5.67k | case OpCode::I32__atomic__rmw__xor: |
1077 | 5.67k | case OpCode::I64__atomic__rmw__xor: |
1078 | 5.67k | case OpCode::I32__atomic__rmw8__xor_u: |
1079 | 5.67k | case OpCode::I32__atomic__rmw16__xor_u: |
1080 | 5.67k | case OpCode::I64__atomic__rmw8__xor_u: |
1081 | 5.67k | case OpCode::I64__atomic__rmw16__xor_u: |
1082 | 5.67k | case OpCode::I64__atomic__rmw32__xor_u: |
1083 | 5.67k | case OpCode::I32__atomic__rmw__xchg: |
1084 | 5.67k | case OpCode::I64__atomic__rmw__xchg: |
1085 | 5.67k | case OpCode::I32__atomic__rmw8__xchg_u: |
1086 | 5.67k | case OpCode::I32__atomic__rmw16__xchg_u: |
1087 | 5.67k | case OpCode::I64__atomic__rmw8__xchg_u: |
1088 | 5.67k | case OpCode::I64__atomic__rmw16__xchg_u: |
1089 | 5.67k | case OpCode::I64__atomic__rmw32__xchg_u: |
1090 | 5.67k | case OpCode::I32__atomic__rmw__cmpxchg: |
1091 | 5.67k | case OpCode::I64__atomic__rmw__cmpxchg: |
1092 | 5.67k | case OpCode::I32__atomic__rmw8__cmpxchg_u: |
1093 | 5.67k | case OpCode::I32__atomic__rmw16__cmpxchg_u: |
1094 | 5.67k | case OpCode::I64__atomic__rmw8__cmpxchg_u: |
1095 | 5.67k | case OpCode::I64__atomic__rmw16__cmpxchg_u: |
1096 | 5.67k | case OpCode::I64__atomic__rmw32__cmpxchg_u: |
1097 | 5.67k | return readMemImmediate(); |
1098 | | |
1099 | 0 | default: |
1100 | 0 | assumingUnreachable(); |
1101 | 8.01M | } |
1102 | 8.01M | } |
1103 | | |
1104 | | } // namespace Loader |
1105 | | } // namespace WasmEdge |