/src/WasmEdge/lib/loader/serialize/serial_instruction.cpp
Line | Count | Source |
1 | | // SPDX-License-Identifier: Apache-2.0 |
2 | | // SPDX-FileCopyrightText: Copyright The WasmEdge Authors |
3 | | |
4 | | #include "loader/serialize.h" |
5 | | |
6 | | namespace WasmEdge { |
7 | | namespace Loader { |
8 | | |
9 | | // Serialize instruction. See "include/loader/serialize.h". |
10 | | void Serializer::serializeInstruction( |
11 | | const AST::Instruction &Instr, |
12 | 0 | std::vector<uint8_t> &OutVec) const noexcept { |
13 | 0 | auto serializeMemImmediate = [this, &Instr, &OutVec]() { |
14 | | // The alignment flag form is required exactly when the memory index is |
15 | | // not zero. |
16 | 0 | if (Instr.getTargetIndex() != 0) { |
17 | 0 | serializeU32(Instr.getMemoryAlign() | 0x40U, OutVec); |
18 | 0 | serializeU32(Instr.getTargetIndex(), OutVec); |
19 | 0 | } else { |
20 | 0 | serializeU32(Instr.getMemoryAlign(), OutVec); |
21 | 0 | } |
22 | 0 | serializeU64(Instr.getMemoryOffset(), OutVec); |
23 | 0 | }; |
24 | | |
25 | | // Serialize OpCode. |
26 | 0 | switch (Instr.getOpCode()) { |
27 | 0 | #define UseOpCode |
28 | 0 | #define Line(NAME, STRING, PREFIX) \ |
29 | 0 | case OpCode::NAME: \ |
30 | 0 | OutVec.push_back(static_cast<uint8_t>(PREFIX)); \ |
31 | 0 | break; |
32 | 0 | #define Line_FB(NAME, STRING, PREFIX, EXTEND) \ |
33 | 0 | case OpCode::NAME: \ |
34 | 0 | OutVec.push_back(static_cast<uint8_t>(PREFIX)); \ |
35 | 0 | serializeU32(EXTEND, OutVec); \ |
36 | 0 | break; |
37 | 0 | #define Line_FC(NAME, STRING, PREFIX, EXTEND) \ |
38 | 0 | case OpCode::NAME: \ |
39 | 0 | OutVec.push_back(static_cast<uint8_t>(PREFIX)); \ |
40 | 0 | serializeU32(EXTEND, OutVec); \ |
41 | 0 | break; |
42 | 0 | #define Line_FD(NAME, STRING, PREFIX, EXTEND) \ |
43 | 0 | case OpCode::NAME: \ |
44 | 0 | OutVec.push_back(static_cast<uint8_t>(PREFIX)); \ |
45 | 0 | serializeU32(EXTEND, OutVec); \ |
46 | 0 | break; |
47 | 0 | #define Line_FE(NAME, STRING, PREFIX, EXTEND) \ |
48 | 0 | case OpCode::NAME: \ |
49 | 0 | OutVec.push_back(static_cast<uint8_t>(PREFIX)); \ |
50 | 0 | serializeU32(EXTEND, OutVec); \ |
51 | 0 | break; |
52 | 0 | #include "common/enum.inc" |
53 | 0 | #undef Line |
54 | 0 | #undef Line_FB |
55 | 0 | #undef Line_FC |
56 | 0 | #undef Line_FD |
57 | 0 | #undef Line_FE |
58 | 0 | #undef UseOpCode |
59 | 0 | default: |
60 | 0 | assumingUnreachable(); |
61 | 0 | } |
62 | | |
63 | 0 | auto serializeBlockType = [this, &OutVec](const BlockType &Type) { |
64 | 0 | if (Type.isEmpty()) { |
65 | 0 | OutVec.push_back(static_cast<uint8_t>(TypeCode::Epsilon)); |
66 | 0 | } else if (Type.isValType()) { |
67 | 0 | serializeValType(Type.getValType(), OutVec); |
68 | 0 | } else { |
69 | 0 | serializeS33(static_cast<int64_t>(Type.getTypeIndex()), OutVec); |
70 | 0 | } |
71 | 0 | }; |
72 | | |
73 | | // Serialize immediate. |
74 | 0 | switch (Instr.getOpCode()) { |
75 | | // Control instructions. |
76 | 0 | case OpCode::Unreachable: |
77 | 0 | case OpCode::Nop: |
78 | 0 | case OpCode::Return: |
79 | 0 | case OpCode::Throw_ref: |
80 | 0 | case OpCode::End: |
81 | 0 | case OpCode::Else: |
82 | 0 | return; |
83 | | |
84 | 0 | case OpCode::Block: |
85 | 0 | case OpCode::Loop: |
86 | 0 | case OpCode::If: |
87 | 0 | return serializeBlockType(Instr.getBlockType()); |
88 | | |
89 | 0 | case OpCode::Try_table: { |
90 | | // Serialize the result type. |
91 | 0 | serializeBlockType(Instr.getTryCatch().ResType); |
92 | | // Serialize the vector of catches. |
93 | 0 | uint32_t VecCnt = static_cast<uint32_t>(Instr.getTryCatch().Catch.size()); |
94 | 0 | serializeU32(VecCnt, OutVec); |
95 | 0 | for (auto Catch : Instr.getTryCatch().Catch) { |
96 | | // Read the catch flags. |
97 | 0 | uint8_t Flags = 0; |
98 | 0 | if (Catch.IsRef) { |
99 | 0 | Flags |= 0x01U; |
100 | 0 | } |
101 | 0 | if (Catch.IsAll) { |
102 | 0 | Flags |= 0x02U; |
103 | 0 | } |
104 | 0 | OutVec.push_back(Flags); |
105 | | // Read the tag index. |
106 | 0 | if (!Catch.IsAll) { |
107 | 0 | serializeU32(Catch.TagIndex, OutVec); |
108 | 0 | } |
109 | | // Read the label index. |
110 | 0 | serializeU32(Catch.LabelIndex, OutVec); |
111 | 0 | } |
112 | 0 | return; |
113 | 0 | } |
114 | | |
115 | 0 | case OpCode::Throw: |
116 | 0 | serializeU32(Instr.getTargetIndex(), OutVec); |
117 | 0 | return; |
118 | | |
119 | 0 | case OpCode::Br: |
120 | 0 | case OpCode::Br_if: |
121 | 0 | case OpCode::Br_on_null: |
122 | 0 | case OpCode::Br_on_non_null: |
123 | 0 | serializeU32(Instr.getJump().TargetIndex, OutVec); |
124 | 0 | return; |
125 | | |
126 | 0 | case OpCode::Br_table: { |
127 | 0 | uint32_t VecCnt = static_cast<uint32_t>(Instr.getLabelList().size()) - 1; |
128 | 0 | serializeU32(VecCnt, OutVec); |
129 | 0 | for (auto &Label : Instr.getLabelList()) { |
130 | 0 | serializeU32(Label.TargetIndex, OutVec); |
131 | 0 | } |
132 | 0 | return; |
133 | 0 | } |
134 | | |
135 | 0 | case OpCode::Call: |
136 | 0 | case OpCode::Return_call: |
137 | 0 | case OpCode::Call_ref: |
138 | 0 | case OpCode::Return_call_ref: |
139 | 0 | serializeU32(Instr.getTargetIndex(), OutVec); |
140 | 0 | return; |
141 | | |
142 | 0 | case OpCode::Call_indirect: |
143 | 0 | case OpCode::Return_call_indirect: |
144 | | // Serialize the type index. |
145 | 0 | serializeU32(Instr.getTargetIndex(), OutVec); |
146 | | // Serialize the table index. |
147 | 0 | serializeU32(Instr.getSourceIndex(), OutVec); |
148 | 0 | return; |
149 | | |
150 | | // Reference Instructions. |
151 | 0 | case OpCode::Ref__null: |
152 | 0 | case OpCode::Ref__test: |
153 | 0 | case OpCode::Ref__cast: |
154 | 0 | case OpCode::Ref__test_null: |
155 | 0 | case OpCode::Ref__cast_null: |
156 | 0 | serializeHeapType(Instr.getValType(), OutVec); |
157 | 0 | return; |
158 | 0 | case OpCode::Ref__eq: |
159 | 0 | case OpCode::Ref__is_null: |
160 | 0 | case OpCode::Ref__as_non_null: |
161 | 0 | return; |
162 | 0 | case OpCode::Ref__func: |
163 | 0 | case OpCode::Struct__new: |
164 | 0 | case OpCode::Struct__new_default: |
165 | 0 | case OpCode::Array__new: |
166 | 0 | case OpCode::Array__new_default: |
167 | 0 | case OpCode::Array__get: |
168 | 0 | case OpCode::Array__get_s: |
169 | 0 | case OpCode::Array__get_u: |
170 | 0 | case OpCode::Array__set: |
171 | 0 | case OpCode::Array__fill: |
172 | 0 | serializeU32(Instr.getTargetIndex(), OutVec); |
173 | 0 | return; |
174 | 0 | case OpCode::Struct__get: |
175 | 0 | case OpCode::Struct__get_s: |
176 | 0 | case OpCode::Struct__get_u: |
177 | 0 | case OpCode::Struct__set: |
178 | 0 | case OpCode::Array__new_fixed: |
179 | 0 | case OpCode::Array__new_data: |
180 | 0 | case OpCode::Array__new_elem: |
181 | 0 | case OpCode::Array__copy: |
182 | 0 | case OpCode::Array__init_data: |
183 | 0 | case OpCode::Array__init_elem: |
184 | 0 | serializeU32(Instr.getTargetIndex(), OutVec); |
185 | 0 | serializeU32(Instr.getSourceIndex(), OutVec); |
186 | 0 | return; |
187 | 0 | case OpCode::Array__len: |
188 | 0 | case OpCode::Any__convert_extern: |
189 | 0 | case OpCode::Extern__convert_any: |
190 | 0 | case OpCode::Ref__i31: |
191 | 0 | case OpCode::I31__get_s: |
192 | 0 | case OpCode::I31__get_u: |
193 | 0 | return; |
194 | 0 | case OpCode::Br_on_cast: |
195 | 0 | case OpCode::Br_on_cast_fail: { |
196 | | // Flag |
197 | 0 | uint8_t Flags = 0U; |
198 | 0 | if (Instr.getBrCast().RType1.isNullableRefType()) { |
199 | 0 | Flags |= 0x01U; |
200 | 0 | } |
201 | 0 | if (Instr.getBrCast().RType2.isNullableRefType()) { |
202 | 0 | Flags |= 0x02U; |
203 | 0 | } |
204 | 0 | OutVec.push_back(Flags); |
205 | | // LabelIdx |
206 | 0 | serializeU32(Instr.getBrCast().Jump.TargetIndex, OutVec); |
207 | | // First RefType |
208 | 0 | serializeHeapType(Instr.getBrCast().RType1, OutVec); |
209 | | // Second RefType. |
210 | 0 | serializeHeapType(Instr.getBrCast().RType2, OutVec); |
211 | 0 | return; |
212 | 0 | } |
213 | | // Parametric Instructions. |
214 | 0 | case OpCode::Drop: |
215 | 0 | case OpCode::Select: |
216 | 0 | return; |
217 | 0 | case OpCode::Select_t: { |
218 | 0 | uint32_t VecCnt = static_cast<uint32_t>(Instr.getValTypeList().size()); |
219 | 0 | serializeU32(VecCnt, OutVec); |
220 | 0 | for (auto &VType : Instr.getValTypeList()) { |
221 | 0 | serializeValType(VType, OutVec); |
222 | 0 | } |
223 | 0 | return; |
224 | 0 | } |
225 | | |
226 | | // Variable Instructions. |
227 | 0 | case OpCode::Local__get: |
228 | 0 | case OpCode::Local__set: |
229 | 0 | case OpCode::Local__tee: |
230 | 0 | case OpCode::Global__get: |
231 | 0 | case OpCode::Global__set: |
232 | 0 | serializeU32(Instr.getTargetIndex(), OutVec); |
233 | 0 | return; |
234 | | |
235 | | // Table Instructions. |
236 | 0 | case OpCode::Table__init: |
237 | 0 | serializeU32(Instr.getSourceIndex(), OutVec); |
238 | 0 | [[fallthrough]]; |
239 | 0 | case OpCode::Table__get: |
240 | 0 | case OpCode::Table__set: |
241 | 0 | case OpCode::Table__grow: |
242 | 0 | case OpCode::Table__size: |
243 | 0 | case OpCode::Table__fill: |
244 | 0 | case OpCode::Elem__drop: |
245 | 0 | serializeU32(Instr.getTargetIndex(), OutVec); |
246 | 0 | return; |
247 | 0 | case OpCode::Table__copy: |
248 | 0 | serializeU32(Instr.getTargetIndex(), OutVec); |
249 | 0 | serializeU32(Instr.getSourceIndex(), OutVec); |
250 | 0 | return; |
251 | | |
252 | | // Memory Instructions. |
253 | 0 | case OpCode::I32__load: |
254 | 0 | case OpCode::I64__load: |
255 | 0 | case OpCode::F32__load: |
256 | 0 | case OpCode::F64__load: |
257 | 0 | case OpCode::I32__load8_s: |
258 | 0 | case OpCode::I32__load8_u: |
259 | 0 | case OpCode::I32__load16_s: |
260 | 0 | case OpCode::I32__load16_u: |
261 | 0 | case OpCode::I64__load8_s: |
262 | 0 | case OpCode::I64__load8_u: |
263 | 0 | case OpCode::I64__load16_s: |
264 | 0 | case OpCode::I64__load16_u: |
265 | 0 | case OpCode::I64__load32_s: |
266 | 0 | case OpCode::I64__load32_u: |
267 | 0 | case OpCode::I32__store: |
268 | 0 | case OpCode::I64__store: |
269 | 0 | case OpCode::F32__store: |
270 | 0 | case OpCode::F64__store: |
271 | 0 | case OpCode::I32__store8: |
272 | 0 | case OpCode::I32__store16: |
273 | 0 | case OpCode::I64__store8: |
274 | 0 | case OpCode::I64__store16: |
275 | 0 | case OpCode::I64__store32: |
276 | 0 | return serializeMemImmediate(); |
277 | | |
278 | 0 | case OpCode::Memory__init: |
279 | 0 | serializeU32(Instr.getSourceIndex(), OutVec); |
280 | 0 | [[fallthrough]]; |
281 | 0 | case OpCode::Memory__grow: |
282 | 0 | case OpCode::Memory__size: |
283 | 0 | case OpCode::Memory__fill: |
284 | 0 | serializeU32(Instr.getTargetIndex(), OutVec); |
285 | 0 | return; |
286 | | |
287 | 0 | case OpCode::Memory__copy: |
288 | 0 | serializeU32(Instr.getTargetIndex(), OutVec); |
289 | 0 | serializeU32(Instr.getSourceIndex(), OutVec); |
290 | 0 | return; |
291 | | |
292 | 0 | case OpCode::Data__drop: |
293 | 0 | serializeU32(Instr.getTargetIndex(), OutVec); |
294 | 0 | return; |
295 | | |
296 | | // Const Instructions. |
297 | 0 | case OpCode::I32__const: |
298 | 0 | serializeS32(Instr.getNum().get<int32_t>(), OutVec); |
299 | 0 | return; |
300 | | |
301 | 0 | case OpCode::I64__const: |
302 | 0 | serializeS64(Instr.getNum().get<int64_t>(), OutVec); |
303 | 0 | return; |
304 | 0 | case OpCode::F32__const: |
305 | 0 | serializeF32(Instr.getNum().get<float>(), OutVec); |
306 | 0 | return; |
307 | 0 | case OpCode::F64__const: |
308 | 0 | serializeF64(Instr.getNum().get<double>(), OutVec); |
309 | 0 | return; |
310 | | |
311 | | // Unary Numeric Instructions. |
312 | 0 | case OpCode::I32__eqz: |
313 | 0 | case OpCode::I32__clz: |
314 | 0 | case OpCode::I32__ctz: |
315 | 0 | case OpCode::I32__popcnt: |
316 | 0 | case OpCode::I64__eqz: |
317 | 0 | case OpCode::I64__clz: |
318 | 0 | case OpCode::I64__ctz: |
319 | 0 | case OpCode::I64__popcnt: |
320 | 0 | case OpCode::F32__abs: |
321 | 0 | case OpCode::F32__neg: |
322 | 0 | case OpCode::F32__ceil: |
323 | 0 | case OpCode::F32__floor: |
324 | 0 | case OpCode::F32__trunc: |
325 | 0 | case OpCode::F32__nearest: |
326 | 0 | case OpCode::F32__sqrt: |
327 | 0 | case OpCode::F64__abs: |
328 | 0 | case OpCode::F64__neg: |
329 | 0 | case OpCode::F64__ceil: |
330 | 0 | case OpCode::F64__floor: |
331 | 0 | case OpCode::F64__trunc: |
332 | 0 | case OpCode::F64__nearest: |
333 | 0 | case OpCode::F64__sqrt: |
334 | 0 | case OpCode::I32__wrap_i64: |
335 | 0 | case OpCode::I32__trunc_f32_s: |
336 | 0 | case OpCode::I32__trunc_f32_u: |
337 | 0 | case OpCode::I32__trunc_f64_s: |
338 | 0 | case OpCode::I32__trunc_f64_u: |
339 | 0 | case OpCode::I64__extend_i32_s: |
340 | 0 | case OpCode::I64__extend_i32_u: |
341 | 0 | case OpCode::I64__trunc_f32_s: |
342 | 0 | case OpCode::I64__trunc_f32_u: |
343 | 0 | case OpCode::I64__trunc_f64_s: |
344 | 0 | case OpCode::I64__trunc_f64_u: |
345 | 0 | case OpCode::F32__convert_i32_s: |
346 | 0 | case OpCode::F32__convert_i32_u: |
347 | 0 | case OpCode::F32__convert_i64_s: |
348 | 0 | case OpCode::F32__convert_i64_u: |
349 | 0 | case OpCode::F32__demote_f64: |
350 | 0 | case OpCode::F64__convert_i32_s: |
351 | 0 | case OpCode::F64__convert_i32_u: |
352 | 0 | case OpCode::F64__convert_i64_s: |
353 | 0 | case OpCode::F64__convert_i64_u: |
354 | 0 | case OpCode::F64__promote_f32: |
355 | 0 | case OpCode::I32__reinterpret_f32: |
356 | 0 | case OpCode::I64__reinterpret_f64: |
357 | 0 | case OpCode::F32__reinterpret_i32: |
358 | 0 | case OpCode::F64__reinterpret_i64: |
359 | 0 | case OpCode::I32__extend8_s: |
360 | 0 | case OpCode::I32__extend16_s: |
361 | 0 | case OpCode::I64__extend8_s: |
362 | 0 | case OpCode::I64__extend16_s: |
363 | 0 | case OpCode::I64__extend32_s: |
364 | 0 | case OpCode::I32__trunc_sat_f32_s: |
365 | 0 | case OpCode::I32__trunc_sat_f32_u: |
366 | 0 | case OpCode::I32__trunc_sat_f64_s: |
367 | 0 | case OpCode::I32__trunc_sat_f64_u: |
368 | 0 | case OpCode::I64__trunc_sat_f32_s: |
369 | 0 | case OpCode::I64__trunc_sat_f32_u: |
370 | 0 | case OpCode::I64__trunc_sat_f64_s: |
371 | 0 | case OpCode::I64__trunc_sat_f64_u: |
372 | | |
373 | | // Binary Numeric Instructions. |
374 | 0 | case OpCode::I32__eq: |
375 | 0 | case OpCode::I32__ne: |
376 | 0 | case OpCode::I32__lt_s: |
377 | 0 | case OpCode::I32__lt_u: |
378 | 0 | case OpCode::I32__gt_s: |
379 | 0 | case OpCode::I32__gt_u: |
380 | 0 | case OpCode::I32__le_s: |
381 | 0 | case OpCode::I32__le_u: |
382 | 0 | case OpCode::I32__ge_s: |
383 | 0 | case OpCode::I32__ge_u: |
384 | 0 | case OpCode::I64__eq: |
385 | 0 | case OpCode::I64__ne: |
386 | 0 | case OpCode::I64__lt_s: |
387 | 0 | case OpCode::I64__lt_u: |
388 | 0 | case OpCode::I64__gt_s: |
389 | 0 | case OpCode::I64__gt_u: |
390 | 0 | case OpCode::I64__le_s: |
391 | 0 | case OpCode::I64__le_u: |
392 | 0 | case OpCode::I64__ge_s: |
393 | 0 | case OpCode::I64__ge_u: |
394 | 0 | case OpCode::F32__eq: |
395 | 0 | case OpCode::F32__ne: |
396 | 0 | case OpCode::F32__lt: |
397 | 0 | case OpCode::F32__gt: |
398 | 0 | case OpCode::F32__le: |
399 | 0 | case OpCode::F32__ge: |
400 | 0 | case OpCode::F64__eq: |
401 | 0 | case OpCode::F64__ne: |
402 | 0 | case OpCode::F64__lt: |
403 | 0 | case OpCode::F64__gt: |
404 | 0 | case OpCode::F64__le: |
405 | 0 | case OpCode::F64__ge: |
406 | |
|
407 | 0 | case OpCode::I32__add: |
408 | 0 | case OpCode::I32__sub: |
409 | 0 | case OpCode::I32__mul: |
410 | 0 | case OpCode::I32__div_s: |
411 | 0 | case OpCode::I32__div_u: |
412 | 0 | case OpCode::I32__rem_s: |
413 | 0 | case OpCode::I32__rem_u: |
414 | 0 | case OpCode::I32__and: |
415 | 0 | case OpCode::I32__or: |
416 | 0 | case OpCode::I32__xor: |
417 | 0 | case OpCode::I32__shl: |
418 | 0 | case OpCode::I32__shr_s: |
419 | 0 | case OpCode::I32__shr_u: |
420 | 0 | case OpCode::I32__rotl: |
421 | 0 | case OpCode::I32__rotr: |
422 | 0 | case OpCode::I64__add: |
423 | 0 | case OpCode::I64__sub: |
424 | 0 | case OpCode::I64__mul: |
425 | 0 | case OpCode::I64__div_s: |
426 | 0 | case OpCode::I64__div_u: |
427 | 0 | case OpCode::I64__rem_s: |
428 | 0 | case OpCode::I64__rem_u: |
429 | 0 | case OpCode::I64__and: |
430 | 0 | case OpCode::I64__or: |
431 | 0 | case OpCode::I64__xor: |
432 | 0 | case OpCode::I64__shl: |
433 | 0 | case OpCode::I64__shr_s: |
434 | 0 | case OpCode::I64__shr_u: |
435 | 0 | case OpCode::I64__rotl: |
436 | 0 | case OpCode::I64__rotr: |
437 | 0 | case OpCode::F32__add: |
438 | 0 | case OpCode::F32__sub: |
439 | 0 | case OpCode::F32__mul: |
440 | 0 | case OpCode::F32__div: |
441 | 0 | case OpCode::F32__min: |
442 | 0 | case OpCode::F32__max: |
443 | 0 | case OpCode::F32__copysign: |
444 | 0 | case OpCode::F64__add: |
445 | 0 | case OpCode::F64__sub: |
446 | 0 | case OpCode::F64__mul: |
447 | 0 | case OpCode::F64__div: |
448 | 0 | case OpCode::F64__min: |
449 | 0 | case OpCode::F64__max: |
450 | 0 | case OpCode::F64__copysign: |
451 | 0 | return; |
452 | | |
453 | | // SIMD Memory Instruction. |
454 | 0 | case OpCode::V128__load: |
455 | 0 | case OpCode::V128__load8x8_s: |
456 | 0 | case OpCode::V128__load8x8_u: |
457 | 0 | case OpCode::V128__load16x4_s: |
458 | 0 | case OpCode::V128__load16x4_u: |
459 | 0 | case OpCode::V128__load32x2_s: |
460 | 0 | case OpCode::V128__load32x2_u: |
461 | 0 | case OpCode::V128__load8_splat: |
462 | 0 | case OpCode::V128__load16_splat: |
463 | 0 | case OpCode::V128__load32_splat: |
464 | 0 | case OpCode::V128__load64_splat: |
465 | 0 | case OpCode::V128__load32_zero: |
466 | 0 | case OpCode::V128__load64_zero: |
467 | 0 | case OpCode::V128__store: |
468 | 0 | return serializeMemImmediate(); |
469 | 0 | case OpCode::V128__load8_lane: |
470 | 0 | case OpCode::V128__load16_lane: |
471 | 0 | case OpCode::V128__load32_lane: |
472 | 0 | case OpCode::V128__load64_lane: |
473 | 0 | case OpCode::V128__store8_lane: |
474 | 0 | case OpCode::V128__store16_lane: |
475 | 0 | case OpCode::V128__store32_lane: |
476 | 0 | case OpCode::V128__store64_lane: |
477 | 0 | serializeMemImmediate(); |
478 | 0 | OutVec.push_back(Instr.getMemoryLane()); |
479 | 0 | return; |
480 | | |
481 | | // SIMD Const Instruction. |
482 | 0 | case OpCode::V128__const: |
483 | | // SIMD Shuffle Instruction. |
484 | 0 | case OpCode::I8x16__shuffle: { |
485 | 0 | uint128_t Value = Instr.getNum().get<uint128_t>(); |
486 | 0 | for (uint32_t I = 0; I < 16; ++I) { |
487 | 0 | OutVec.push_back(static_cast<uint8_t>(Value >> (I * 8))); |
488 | 0 | } |
489 | 0 | return; |
490 | 0 | } |
491 | | |
492 | | // SIMD Lane Instructions. |
493 | 0 | case OpCode::I8x16__extract_lane_s: |
494 | 0 | case OpCode::I8x16__extract_lane_u: |
495 | 0 | case OpCode::I8x16__replace_lane: |
496 | 0 | case OpCode::I16x8__extract_lane_s: |
497 | 0 | case OpCode::I16x8__extract_lane_u: |
498 | 0 | case OpCode::I16x8__replace_lane: |
499 | 0 | case OpCode::I32x4__extract_lane: |
500 | 0 | case OpCode::I32x4__replace_lane: |
501 | 0 | case OpCode::I64x2__extract_lane: |
502 | 0 | case OpCode::I64x2__replace_lane: |
503 | 0 | case OpCode::F32x4__extract_lane: |
504 | 0 | case OpCode::F32x4__replace_lane: |
505 | 0 | case OpCode::F64x2__extract_lane: |
506 | 0 | case OpCode::F64x2__replace_lane: |
507 | 0 | OutVec.push_back(Instr.getMemoryLane()); |
508 | 0 | return; |
509 | | |
510 | | // SIMD Numeric Instructions. |
511 | 0 | case OpCode::I8x16__swizzle: |
512 | 0 | case OpCode::I8x16__splat: |
513 | 0 | case OpCode::I16x8__splat: |
514 | 0 | case OpCode::I32x4__splat: |
515 | 0 | case OpCode::I64x2__splat: |
516 | 0 | case OpCode::F32x4__splat: |
517 | 0 | case OpCode::F64x2__splat: |
518 | |
|
519 | 0 | case OpCode::I8x16__eq: |
520 | 0 | case OpCode::I8x16__ne: |
521 | 0 | case OpCode::I8x16__lt_s: |
522 | 0 | case OpCode::I8x16__lt_u: |
523 | 0 | case OpCode::I8x16__gt_s: |
524 | 0 | case OpCode::I8x16__gt_u: |
525 | 0 | case OpCode::I8x16__le_s: |
526 | 0 | case OpCode::I8x16__le_u: |
527 | 0 | case OpCode::I8x16__ge_s: |
528 | 0 | case OpCode::I8x16__ge_u: |
529 | |
|
530 | 0 | case OpCode::I16x8__eq: |
531 | 0 | case OpCode::I16x8__ne: |
532 | 0 | case OpCode::I16x8__lt_s: |
533 | 0 | case OpCode::I16x8__lt_u: |
534 | 0 | case OpCode::I16x8__gt_s: |
535 | 0 | case OpCode::I16x8__gt_u: |
536 | 0 | case OpCode::I16x8__le_s: |
537 | 0 | case OpCode::I16x8__le_u: |
538 | 0 | case OpCode::I16x8__ge_s: |
539 | 0 | case OpCode::I16x8__ge_u: |
540 | |
|
541 | 0 | case OpCode::I32x4__eq: |
542 | 0 | case OpCode::I32x4__ne: |
543 | 0 | case OpCode::I32x4__lt_s: |
544 | 0 | case OpCode::I32x4__lt_u: |
545 | 0 | case OpCode::I32x4__gt_s: |
546 | 0 | case OpCode::I32x4__gt_u: |
547 | 0 | case OpCode::I32x4__le_s: |
548 | 0 | case OpCode::I32x4__le_u: |
549 | 0 | case OpCode::I32x4__ge_s: |
550 | 0 | case OpCode::I32x4__ge_u: |
551 | |
|
552 | 0 | case OpCode::F32x4__eq: |
553 | 0 | case OpCode::F32x4__ne: |
554 | 0 | case OpCode::F32x4__lt: |
555 | 0 | case OpCode::F32x4__gt: |
556 | 0 | case OpCode::F32x4__le: |
557 | 0 | case OpCode::F32x4__ge: |
558 | |
|
559 | 0 | case OpCode::F64x2__eq: |
560 | 0 | case OpCode::F64x2__ne: |
561 | 0 | case OpCode::F64x2__lt: |
562 | 0 | case OpCode::F64x2__gt: |
563 | 0 | case OpCode::F64x2__le: |
564 | 0 | case OpCode::F64x2__ge: |
565 | |
|
566 | 0 | case OpCode::V128__not: |
567 | 0 | case OpCode::V128__and: |
568 | 0 | case OpCode::V128__andnot: |
569 | 0 | case OpCode::V128__or: |
570 | 0 | case OpCode::V128__xor: |
571 | 0 | case OpCode::V128__bitselect: |
572 | 0 | case OpCode::V128__any_true: |
573 | |
|
574 | 0 | case OpCode::I8x16__abs: |
575 | 0 | case OpCode::I8x16__neg: |
576 | 0 | case OpCode::I8x16__popcnt: |
577 | 0 | case OpCode::I8x16__all_true: |
578 | 0 | case OpCode::I8x16__bitmask: |
579 | 0 | case OpCode::I8x16__narrow_i16x8_s: |
580 | 0 | case OpCode::I8x16__narrow_i16x8_u: |
581 | 0 | case OpCode::I8x16__shl: |
582 | 0 | case OpCode::I8x16__shr_s: |
583 | 0 | case OpCode::I8x16__shr_u: |
584 | 0 | case OpCode::I8x16__add: |
585 | 0 | case OpCode::I8x16__add_sat_s: |
586 | 0 | case OpCode::I8x16__add_sat_u: |
587 | 0 | case OpCode::I8x16__sub: |
588 | 0 | case OpCode::I8x16__sub_sat_s: |
589 | 0 | case OpCode::I8x16__sub_sat_u: |
590 | 0 | case OpCode::I8x16__min_s: |
591 | 0 | case OpCode::I8x16__min_u: |
592 | 0 | case OpCode::I8x16__max_s: |
593 | 0 | case OpCode::I8x16__max_u: |
594 | 0 | case OpCode::I8x16__avgr_u: |
595 | |
|
596 | 0 | case OpCode::I16x8__abs: |
597 | 0 | case OpCode::I16x8__neg: |
598 | 0 | case OpCode::I16x8__all_true: |
599 | 0 | case OpCode::I16x8__bitmask: |
600 | 0 | case OpCode::I16x8__narrow_i32x4_s: |
601 | 0 | case OpCode::I16x8__narrow_i32x4_u: |
602 | 0 | case OpCode::I16x8__extend_low_i8x16_s: |
603 | 0 | case OpCode::I16x8__extend_high_i8x16_s: |
604 | 0 | case OpCode::I16x8__extend_low_i8x16_u: |
605 | 0 | case OpCode::I16x8__extend_high_i8x16_u: |
606 | 0 | case OpCode::I16x8__shl: |
607 | 0 | case OpCode::I16x8__shr_s: |
608 | 0 | case OpCode::I16x8__shr_u: |
609 | 0 | case OpCode::I16x8__add: |
610 | 0 | case OpCode::I16x8__add_sat_s: |
611 | 0 | case OpCode::I16x8__add_sat_u: |
612 | 0 | case OpCode::I16x8__sub: |
613 | 0 | case OpCode::I16x8__sub_sat_s: |
614 | 0 | case OpCode::I16x8__sub_sat_u: |
615 | 0 | case OpCode::I16x8__mul: |
616 | 0 | case OpCode::I16x8__min_s: |
617 | 0 | case OpCode::I16x8__min_u: |
618 | 0 | case OpCode::I16x8__max_s: |
619 | 0 | case OpCode::I16x8__max_u: |
620 | 0 | case OpCode::I16x8__avgr_u: |
621 | 0 | case OpCode::I16x8__extmul_low_i8x16_s: |
622 | 0 | case OpCode::I16x8__extmul_high_i8x16_s: |
623 | 0 | case OpCode::I16x8__extmul_low_i8x16_u: |
624 | 0 | case OpCode::I16x8__extmul_high_i8x16_u: |
625 | 0 | case OpCode::I16x8__q15mulr_sat_s: |
626 | 0 | case OpCode::I16x8__extadd_pairwise_i8x16_s: |
627 | 0 | case OpCode::I16x8__extadd_pairwise_i8x16_u: |
628 | |
|
629 | 0 | case OpCode::I32x4__abs: |
630 | 0 | case OpCode::I32x4__neg: |
631 | 0 | case OpCode::I32x4__all_true: |
632 | 0 | case OpCode::I32x4__bitmask: |
633 | 0 | case OpCode::I32x4__extend_low_i16x8_s: |
634 | 0 | case OpCode::I32x4__extend_high_i16x8_s: |
635 | 0 | case OpCode::I32x4__extend_low_i16x8_u: |
636 | 0 | case OpCode::I32x4__extend_high_i16x8_u: |
637 | 0 | case OpCode::I32x4__shl: |
638 | 0 | case OpCode::I32x4__shr_s: |
639 | 0 | case OpCode::I32x4__shr_u: |
640 | 0 | case OpCode::I32x4__add: |
641 | 0 | case OpCode::I32x4__sub: |
642 | 0 | case OpCode::I32x4__mul: |
643 | 0 | case OpCode::I32x4__min_s: |
644 | 0 | case OpCode::I32x4__min_u: |
645 | 0 | case OpCode::I32x4__max_s: |
646 | 0 | case OpCode::I32x4__max_u: |
647 | 0 | case OpCode::I32x4__extmul_low_i16x8_s: |
648 | 0 | case OpCode::I32x4__extmul_high_i16x8_s: |
649 | 0 | case OpCode::I32x4__extmul_low_i16x8_u: |
650 | 0 | case OpCode::I32x4__extmul_high_i16x8_u: |
651 | 0 | case OpCode::I32x4__extadd_pairwise_i16x8_s: |
652 | 0 | case OpCode::I32x4__extadd_pairwise_i16x8_u: |
653 | |
|
654 | 0 | case OpCode::I64x2__abs: |
655 | 0 | case OpCode::I64x2__neg: |
656 | 0 | case OpCode::I64x2__bitmask: |
657 | 0 | case OpCode::I64x2__extend_low_i32x4_s: |
658 | 0 | case OpCode::I64x2__extend_high_i32x4_s: |
659 | 0 | case OpCode::I64x2__extend_low_i32x4_u: |
660 | 0 | case OpCode::I64x2__extend_high_i32x4_u: |
661 | 0 | case OpCode::I64x2__shl: |
662 | 0 | case OpCode::I64x2__shr_s: |
663 | 0 | case OpCode::I64x2__shr_u: |
664 | 0 | case OpCode::I64x2__add: |
665 | 0 | case OpCode::I64x2__sub: |
666 | 0 | case OpCode::I64x2__mul: |
667 | 0 | case OpCode::I64x2__eq: |
668 | 0 | case OpCode::I64x2__ne: |
669 | 0 | case OpCode::I64x2__lt_s: |
670 | 0 | case OpCode::I64x2__gt_s: |
671 | 0 | case OpCode::I64x2__le_s: |
672 | 0 | case OpCode::I64x2__ge_s: |
673 | 0 | case OpCode::I64x2__all_true: |
674 | 0 | case OpCode::I64x2__extmul_low_i32x4_s: |
675 | 0 | case OpCode::I64x2__extmul_high_i32x4_s: |
676 | 0 | case OpCode::I64x2__extmul_low_i32x4_u: |
677 | 0 | case OpCode::I64x2__extmul_high_i32x4_u: |
678 | |
|
679 | 0 | case OpCode::F32x4__abs: |
680 | 0 | case OpCode::F32x4__neg: |
681 | 0 | case OpCode::F32x4__sqrt: |
682 | 0 | case OpCode::F32x4__add: |
683 | 0 | case OpCode::F32x4__sub: |
684 | 0 | case OpCode::F32x4__mul: |
685 | 0 | case OpCode::F32x4__div: |
686 | 0 | case OpCode::F32x4__min: |
687 | 0 | case OpCode::F32x4__max: |
688 | 0 | case OpCode::F32x4__pmin: |
689 | 0 | case OpCode::F32x4__pmax: |
690 | |
|
691 | 0 | case OpCode::F64x2__abs: |
692 | 0 | case OpCode::F64x2__neg: |
693 | 0 | case OpCode::F64x2__sqrt: |
694 | 0 | case OpCode::F64x2__add: |
695 | 0 | case OpCode::F64x2__sub: |
696 | 0 | case OpCode::F64x2__mul: |
697 | 0 | case OpCode::F64x2__div: |
698 | 0 | case OpCode::F64x2__min: |
699 | 0 | case OpCode::F64x2__max: |
700 | 0 | case OpCode::F64x2__pmin: |
701 | 0 | case OpCode::F64x2__pmax: |
702 | |
|
703 | 0 | case OpCode::I32x4__trunc_sat_f32x4_s: |
704 | 0 | case OpCode::I32x4__trunc_sat_f32x4_u: |
705 | 0 | case OpCode::F32x4__convert_i32x4_s: |
706 | 0 | case OpCode::F32x4__convert_i32x4_u: |
707 | 0 | case OpCode::I32x4__trunc_sat_f64x2_s_zero: |
708 | 0 | case OpCode::I32x4__trunc_sat_f64x2_u_zero: |
709 | 0 | case OpCode::F64x2__convert_low_i32x4_s: |
710 | 0 | case OpCode::F64x2__convert_low_i32x4_u: |
711 | 0 | case OpCode::F32x4__demote_f64x2_zero: |
712 | 0 | case OpCode::F64x2__promote_low_f32x4: |
713 | |
|
714 | 0 | case OpCode::I32x4__dot_i16x8_s: |
715 | 0 | case OpCode::F32x4__ceil: |
716 | 0 | case OpCode::F32x4__floor: |
717 | 0 | case OpCode::F32x4__trunc: |
718 | 0 | case OpCode::F32x4__nearest: |
719 | 0 | case OpCode::F64x2__ceil: |
720 | 0 | case OpCode::F64x2__floor: |
721 | 0 | case OpCode::F64x2__trunc: |
722 | 0 | case OpCode::F64x2__nearest: |
723 | 0 | return; |
724 | | |
725 | 0 | case OpCode::I8x16__relaxed_swizzle: |
726 | 0 | case OpCode::I32x4__relaxed_trunc_f32x4_s: |
727 | 0 | case OpCode::I32x4__relaxed_trunc_f32x4_u: |
728 | 0 | case OpCode::I32x4__relaxed_trunc_f64x2_s_zero: |
729 | 0 | case OpCode::I32x4__relaxed_trunc_f64x2_u_zero: |
730 | 0 | case OpCode::F32x4__relaxed_madd: |
731 | 0 | case OpCode::F32x4__relaxed_nmadd: |
732 | 0 | case OpCode::F64x2__relaxed_madd: |
733 | 0 | case OpCode::F64x2__relaxed_nmadd: |
734 | 0 | case OpCode::I8x16__relaxed_laneselect: |
735 | 0 | case OpCode::I16x8__relaxed_laneselect: |
736 | 0 | case OpCode::I32x4__relaxed_laneselect: |
737 | 0 | case OpCode::I64x2__relaxed_laneselect: |
738 | 0 | case OpCode::F32x4__relaxed_min: |
739 | 0 | case OpCode::F32x4__relaxed_max: |
740 | 0 | case OpCode::F64x2__relaxed_min: |
741 | 0 | case OpCode::F64x2__relaxed_max: |
742 | 0 | case OpCode::I16x8__relaxed_q15mulr_s: |
743 | 0 | case OpCode::I16x8__relaxed_dot_i8x16_i7x16_s: |
744 | 0 | case OpCode::I32x4__relaxed_dot_i8x16_i7x16_add_s: |
745 | 0 | return; |
746 | | |
747 | | // Atomic Memory Instructions. |
748 | 0 | case OpCode::Atomic__fence: |
749 | | // The immediate is a reserved byte, not a LEB128 memory index. |
750 | 0 | OutVec.push_back(0x00U); |
751 | 0 | return; |
752 | | |
753 | 0 | case OpCode::Memory__atomic__notify: |
754 | 0 | case OpCode::Memory__atomic__wait32: |
755 | 0 | case OpCode::Memory__atomic__wait64: |
756 | |
|
757 | 0 | case OpCode::I32__atomic__load: |
758 | 0 | case OpCode::I64__atomic__load: |
759 | 0 | case OpCode::I32__atomic__load8_u: |
760 | 0 | case OpCode::I32__atomic__load16_u: |
761 | 0 | case OpCode::I64__atomic__load8_u: |
762 | 0 | case OpCode::I64__atomic__load16_u: |
763 | 0 | case OpCode::I64__atomic__load32_u: |
764 | 0 | case OpCode::I32__atomic__store: |
765 | 0 | case OpCode::I64__atomic__store: |
766 | 0 | case OpCode::I32__atomic__store8: |
767 | 0 | case OpCode::I32__atomic__store16: |
768 | 0 | case OpCode::I64__atomic__store8: |
769 | 0 | case OpCode::I64__atomic__store16: |
770 | 0 | case OpCode::I64__atomic__store32: |
771 | 0 | case OpCode::I32__atomic__rmw__add: |
772 | 0 | case OpCode::I64__atomic__rmw__add: |
773 | 0 | case OpCode::I32__atomic__rmw8__add_u: |
774 | 0 | case OpCode::I32__atomic__rmw16__add_u: |
775 | 0 | case OpCode::I64__atomic__rmw8__add_u: |
776 | 0 | case OpCode::I64__atomic__rmw16__add_u: |
777 | 0 | case OpCode::I64__atomic__rmw32__add_u: |
778 | 0 | case OpCode::I32__atomic__rmw__sub: |
779 | 0 | case OpCode::I64__atomic__rmw__sub: |
780 | 0 | case OpCode::I32__atomic__rmw8__sub_u: |
781 | 0 | case OpCode::I32__atomic__rmw16__sub_u: |
782 | 0 | case OpCode::I64__atomic__rmw8__sub_u: |
783 | 0 | case OpCode::I64__atomic__rmw16__sub_u: |
784 | 0 | case OpCode::I64__atomic__rmw32__sub_u: |
785 | 0 | case OpCode::I32__atomic__rmw__and: |
786 | 0 | case OpCode::I64__atomic__rmw__and: |
787 | 0 | case OpCode::I32__atomic__rmw8__and_u: |
788 | 0 | case OpCode::I32__atomic__rmw16__and_u: |
789 | 0 | case OpCode::I64__atomic__rmw8__and_u: |
790 | 0 | case OpCode::I64__atomic__rmw16__and_u: |
791 | 0 | case OpCode::I64__atomic__rmw32__and_u: |
792 | 0 | case OpCode::I32__atomic__rmw__or: |
793 | 0 | case OpCode::I64__atomic__rmw__or: |
794 | 0 | case OpCode::I32__atomic__rmw8__or_u: |
795 | 0 | case OpCode::I32__atomic__rmw16__or_u: |
796 | 0 | case OpCode::I64__atomic__rmw8__or_u: |
797 | 0 | case OpCode::I64__atomic__rmw16__or_u: |
798 | 0 | case OpCode::I64__atomic__rmw32__or_u: |
799 | 0 | case OpCode::I32__atomic__rmw__xor: |
800 | 0 | case OpCode::I64__atomic__rmw__xor: |
801 | 0 | case OpCode::I32__atomic__rmw8__xor_u: |
802 | 0 | case OpCode::I32__atomic__rmw16__xor_u: |
803 | 0 | case OpCode::I64__atomic__rmw8__xor_u: |
804 | 0 | case OpCode::I64__atomic__rmw16__xor_u: |
805 | 0 | case OpCode::I64__atomic__rmw32__xor_u: |
806 | 0 | case OpCode::I32__atomic__rmw__xchg: |
807 | 0 | case OpCode::I64__atomic__rmw__xchg: |
808 | 0 | case OpCode::I32__atomic__rmw8__xchg_u: |
809 | 0 | case OpCode::I32__atomic__rmw16__xchg_u: |
810 | 0 | case OpCode::I64__atomic__rmw8__xchg_u: |
811 | 0 | case OpCode::I64__atomic__rmw16__xchg_u: |
812 | 0 | case OpCode::I64__atomic__rmw32__xchg_u: |
813 | 0 | case OpCode::I32__atomic__rmw__cmpxchg: |
814 | 0 | case OpCode::I64__atomic__rmw__cmpxchg: |
815 | 0 | case OpCode::I32__atomic__rmw8__cmpxchg_u: |
816 | 0 | case OpCode::I32__atomic__rmw16__cmpxchg_u: |
817 | 0 | case OpCode::I64__atomic__rmw8__cmpxchg_u: |
818 | 0 | case OpCode::I64__atomic__rmw16__cmpxchg_u: |
819 | 0 | case OpCode::I64__atomic__rmw32__cmpxchg_u: |
820 | 0 | return serializeMemImmediate(); |
821 | | |
822 | 0 | default: |
823 | 0 | assumingUnreachable(); |
824 | 0 | } |
825 | 0 | } |
826 | | |
827 | | } // namespace Loader |
828 | | } // namespace WasmEdge |