Coverage Report

Created: 2026-03-26 07:41

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/rust/registry/src/index.crates.io-1949cf8c6b5b557f/cranelift-codegen-0.129.1/src/isle_prelude.rs
Line
Count
Source
1
//! Shared ISLE prelude implementation for optimization (mid-end) and
2
//! lowering (backend) ISLE environments.
3
4
/// Helper macro to define methods in `prelude.isle` within `impl Context for
5
/// ...` for each backend. These methods are shared amongst all backends.
6
#[macro_export]
7
#[doc(hidden)]
8
macro_rules! isle_common_prelude_methods {
9
    () => {
10
        isle_numerics_methods!();
11
12
        /// We don't have a way of making a `()` value in isle directly.
13
        #[inline]
14
0
        fn unit(&mut self) -> Unit {
15
0
            ()
16
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::unit
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::unit
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::unit
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::unit
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::unit
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::unit
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::unit
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::unit
17
18
        #[inline]
19
0
        fn checked_add_with_type(&mut self, ty: Type, a: u64, b: u64) -> Option<u64> {
20
0
            let c = a.checked_add(b)?;
21
0
            let ty_mask = self.ty_mask(ty);
22
0
            if (c & !ty_mask) == 0 { Some(c) } else { None }
23
0
        }
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::checked_add_with_type
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::checked_add_with_type
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::checked_add_with_type
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::checked_add_with_type
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::checked_add_with_type
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::checked_add_with_type
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::checked_add_with_type
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::checked_add_with_type
24
25
        #[inline]
26
0
        fn add_overflows_with_type(&mut self, ty: Type, a: u64, b: u64) -> bool {
27
0
            self.checked_add_with_type(ty, a, b).is_none()
28
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::add_overflows_with_type
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::add_overflows_with_type
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::add_overflows_with_type
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::add_overflows_with_type
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::add_overflows_with_type
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::add_overflows_with_type
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::add_overflows_with_type
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::add_overflows_with_type
29
30
        #[inline]
31
5.05k
        fn imm64_clz(&mut self, ty: Type, a: Imm64) -> Imm64 {
32
5.05k
            let bits = ty.bits();
33
5.05k
            assert!(bits <= 64);
34
5.05k
            let clz_offset = 64 - bits;
35
5.05k
            let a_v: u64 = a.bits().cast_unsigned();
36
5.05k
            let lz = a_v.leading_zeros() - clz_offset;
37
5.05k
            Imm64::new(i64::from(lz))
38
5.05k
        }
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::imm64_clz
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::imm64_clz
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::imm64_clz
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::imm64_clz
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::imm64_clz
Line
Count
Source
31
5.05k
        fn imm64_clz(&mut self, ty: Type, a: Imm64) -> Imm64 {
32
5.05k
            let bits = ty.bits();
33
5.05k
            assert!(bits <= 64);
34
5.05k
            let clz_offset = 64 - bits;
35
5.05k
            let a_v: u64 = a.bits().cast_unsigned();
36
5.05k
            let lz = a_v.leading_zeros() - clz_offset;
37
5.05k
            Imm64::new(i64::from(lz))
38
5.05k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::imm64_clz
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::imm64_clz
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::imm64_clz
39
40
        #[inline]
41
4.72k
        fn imm64_ctz(&mut self, ty: Type, a: Imm64) -> Imm64 {
42
4.72k
            let bits = ty.bits();
43
4.72k
            assert!(bits <= 64);
44
4.72k
            let a_v: u64 = a.bits().cast_unsigned();
45
4.72k
            if a_v == 0 {
46
                // ctz(0) is defined to be the number of bits in the type.
47
892
                Imm64::new(i64::from(bits))
48
            } else {
49
3.82k
                let lz = a_v.trailing_zeros();
50
3.82k
                Imm64::new(i64::from(lz))
51
            }
52
4.72k
        }
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::imm64_ctz
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::imm64_ctz
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::imm64_ctz
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::imm64_ctz
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::imm64_ctz
Line
Count
Source
41
4.72k
        fn imm64_ctz(&mut self, ty: Type, a: Imm64) -> Imm64 {
42
4.72k
            let bits = ty.bits();
43
4.72k
            assert!(bits <= 64);
44
4.72k
            let a_v: u64 = a.bits().cast_unsigned();
45
4.72k
            if a_v == 0 {
46
                // ctz(0) is defined to be the number of bits in the type.
47
892
                Imm64::new(i64::from(bits))
48
            } else {
49
3.82k
                let lz = a_v.trailing_zeros();
50
3.82k
                Imm64::new(i64::from(lz))
51
            }
52
4.72k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::imm64_ctz
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::imm64_ctz
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::imm64_ctz
53
54
        #[inline]
55
156
        fn imm64_sdiv(&mut self, ty: Type, x: Imm64, y: Imm64) -> Option<Imm64> {
56
            // Sign extend `x` and `y`.
57
156
            let type_width = ty.bits();
58
156
            assert!(type_width <= 64);
59
156
            let x = x.sign_extend_from_width(type_width).bits();
60
156
            let y = y.sign_extend_from_width(type_width).bits();
61
156
            let shift = 64 - type_width;
62
63
            // NB: We can't rely on `checked_div` to detect `ty::MIN / -1`
64
            // (which overflows and should trap) because we are working with
65
            // `i64` values here, and `i32::MIN != i64::MIN`, for
66
            // example. Therefore, we have to explicitly check for this case
67
            // ourselves.
68
156
            let min = ((self.ty_smin(ty) as i64) << shift) >> shift;
69
156
            if x == min && y == -1 {
70
0
                return None;
71
156
            }
72
73
156
            let result = x.checked_div(y)?;
74
155
            Some(Imm64::new(result).mask_to_width(type_width))
75
156
        }
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::imm64_sdiv
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::imm64_sdiv
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::imm64_sdiv
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::imm64_sdiv
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::imm64_sdiv
Line
Count
Source
55
156
        fn imm64_sdiv(&mut self, ty: Type, x: Imm64, y: Imm64) -> Option<Imm64> {
56
            // Sign extend `x` and `y`.
57
156
            let type_width = ty.bits();
58
156
            assert!(type_width <= 64);
59
156
            let x = x.sign_extend_from_width(type_width).bits();
60
156
            let y = y.sign_extend_from_width(type_width).bits();
61
156
            let shift = 64 - type_width;
62
63
            // NB: We can't rely on `checked_div` to detect `ty::MIN / -1`
64
            // (which overflows and should trap) because we are working with
65
            // `i64` values here, and `i32::MIN != i64::MIN`, for
66
            // example. Therefore, we have to explicitly check for this case
67
            // ourselves.
68
156
            let min = ((self.ty_smin(ty) as i64) << shift) >> shift;
69
156
            if x == min && y == -1 {
70
0
                return None;
71
156
            }
72
73
156
            let result = x.checked_div(y)?;
74
155
            Some(Imm64::new(result).mask_to_width(type_width))
75
156
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::imm64_sdiv
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::imm64_sdiv
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::imm64_sdiv
76
77
        #[inline]
78
2.46k
        fn imm64_srem(&mut self, ty: Type, x: Imm64, y: Imm64) -> Option<Imm64> {
79
            // Sign extend `x` and `y`.
80
2.46k
            let type_width = ty.bits();
81
2.46k
            assert!(type_width <= 64);
82
2.46k
            let x = x.sign_extend_from_width(type_width).bits();
83
2.46k
            let y = y.sign_extend_from_width(type_width).bits();
84
85
            // iN::min % -1 is defined as 0 in wasm so no need
86
            // to check for it
87
88
2.46k
            let result = x.checked_rem(y)?;
89
2.35k
            Some(Imm64::new(result).mask_to_width(type_width))
90
2.46k
        }
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::imm64_srem
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::imm64_srem
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::imm64_srem
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::imm64_srem
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::imm64_srem
Line
Count
Source
78
2.46k
        fn imm64_srem(&mut self, ty: Type, x: Imm64, y: Imm64) -> Option<Imm64> {
79
            // Sign extend `x` and `y`.
80
2.46k
            let type_width = ty.bits();
81
2.46k
            assert!(type_width <= 64);
82
2.46k
            let x = x.sign_extend_from_width(type_width).bits();
83
2.46k
            let y = y.sign_extend_from_width(type_width).bits();
84
85
            // iN::min % -1 is defined as 0 in wasm so no need
86
            // to check for it
87
88
2.46k
            let result = x.checked_rem(y)?;
89
2.35k
            Some(Imm64::new(result).mask_to_width(type_width))
90
2.46k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::imm64_srem
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::imm64_srem
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::imm64_srem
91
92
        #[inline]
93
1.31k
        fn imm64_shl(&mut self, ty: Type, x: Imm64, y: Imm64) -> Imm64 {
94
            // Mask off any excess shift bits.
95
1.31k
            let shift_mask = (ty.bits() - 1) as u64;
96
1.31k
            let y = (y.bits() as u64) & shift_mask;
97
98
            // Mask the result to `ty` bits.
99
1.31k
            let ty_mask = self.ty_mask(ty) as i64;
100
1.31k
            Imm64::new((x.bits() << y) & ty_mask)
101
1.31k
        }
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::imm64_shl
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::imm64_shl
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::imm64_shl
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::imm64_shl
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::imm64_shl
Line
Count
Source
93
1.31k
        fn imm64_shl(&mut self, ty: Type, x: Imm64, y: Imm64) -> Imm64 {
94
            // Mask off any excess shift bits.
95
1.31k
            let shift_mask = (ty.bits() - 1) as u64;
96
1.31k
            let y = (y.bits() as u64) & shift_mask;
97
98
            // Mask the result to `ty` bits.
99
1.31k
            let ty_mask = self.ty_mask(ty) as i64;
100
1.31k
            Imm64::new((x.bits() << y) & ty_mask)
101
1.31k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::imm64_shl
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::imm64_shl
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::imm64_shl
102
103
        #[inline]
104
1.01k
        fn imm64_ushr(&mut self, ty: Type, x: Imm64, y: Imm64) -> Imm64 {
105
1.01k
            let ty_mask = self.ty_mask(ty);
106
1.01k
            let x = (x.bits() as u64) & ty_mask;
107
108
            // Mask off any excess shift bits.
109
1.01k
            let shift_mask = (ty.bits() - 1) as u64;
110
1.01k
            let y = (y.bits() as u64) & shift_mask;
111
112
            // NB: No need to mask off high bits because they are already zero.
113
1.01k
            Imm64::new((x >> y) as i64)
114
1.01k
        }
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::imm64_ushr
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::imm64_ushr
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::imm64_ushr
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::imm64_ushr
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::imm64_ushr
Line
Count
Source
104
1.01k
        fn imm64_ushr(&mut self, ty: Type, x: Imm64, y: Imm64) -> Imm64 {
105
1.01k
            let ty_mask = self.ty_mask(ty);
106
1.01k
            let x = (x.bits() as u64) & ty_mask;
107
108
            // Mask off any excess shift bits.
109
1.01k
            let shift_mask = (ty.bits() - 1) as u64;
110
1.01k
            let y = (y.bits() as u64) & shift_mask;
111
112
            // NB: No need to mask off high bits because they are already zero.
113
1.01k
            Imm64::new((x >> y) as i64)
114
1.01k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::imm64_ushr
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::imm64_ushr
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::imm64_ushr
115
116
        #[inline]
117
1.73k
        fn imm64_sshr(&mut self, ty: Type, x: Imm64, y: Imm64) -> Imm64 {
118
            // Sign extend `x` from `ty.bits()`-width to the full 64 bits.
119
1.73k
            let shift = u32::checked_sub(64, ty.bits()).unwrap_or(0);
120
1.73k
            let x = (x.bits() << shift) >> shift;
121
122
            // Mask off any excess shift bits.
123
1.73k
            let shift_mask = (ty.bits() - 1) as i64;
124
1.73k
            let y = y.bits() & shift_mask;
125
126
            // Mask off sign bits that aren't part of `ty`.
127
1.73k
            let ty_mask = self.ty_mask(ty) as i64;
128
1.73k
            Imm64::new((x >> y) & ty_mask)
129
1.73k
        }
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::imm64_sshr
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::imm64_sshr
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::imm64_sshr
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::imm64_sshr
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::imm64_sshr
Line
Count
Source
117
1.73k
        fn imm64_sshr(&mut self, ty: Type, x: Imm64, y: Imm64) -> Imm64 {
118
            // Sign extend `x` from `ty.bits()`-width to the full 64 bits.
119
1.73k
            let shift = u32::checked_sub(64, ty.bits()).unwrap_or(0);
120
1.73k
            let x = (x.bits() << shift) >> shift;
121
122
            // Mask off any excess shift bits.
123
1.73k
            let shift_mask = (ty.bits() - 1) as i64;
124
1.73k
            let y = y.bits() & shift_mask;
125
126
            // Mask off sign bits that aren't part of `ty`.
127
1.73k
            let ty_mask = self.ty_mask(ty) as i64;
128
1.73k
            Imm64::new((x >> y) & ty_mask)
129
1.73k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::imm64_sshr
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::imm64_sshr
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::imm64_sshr
130
131
        #[inline]
132
24.0k
        fn i64_sextend_u64(&mut self, ty: Type, x: u64) -> i64 {
133
24.0k
            let shift_amt = core::cmp::max(0, 64 - ty.bits());
134
24.0k
            ((x as i64) << shift_amt) >> shift_amt
135
24.0k
        }
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::i64_sextend_u64
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::i64_sextend_u64
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::i64_sextend_u64
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::i64_sextend_u64
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::i64_sextend_u64
Line
Count
Source
132
24.0k
        fn i64_sextend_u64(&mut self, ty: Type, x: u64) -> i64 {
133
24.0k
            let shift_amt = core::cmp::max(0, 64 - ty.bits());
134
24.0k
            ((x as i64) << shift_amt) >> shift_amt
135
24.0k
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::i64_sextend_u64
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::i64_sextend_u64
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::i64_sextend_u64
136
137
        #[inline]
138
850k
        fn i64_sextend_imm64(&mut self, ty: Type, x: Imm64) -> i64 {
139
850k
            x.sign_extend_from_width(ty.bits()).bits()
140
850k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::i64_sextend_imm64
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::i64_sextend_imm64
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::i64_sextend_imm64
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::i64_sextend_imm64
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::i64_sextend_imm64
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::i64_sextend_imm64
Line
Count
Source
138
850k
        fn i64_sextend_imm64(&mut self, ty: Type, x: Imm64) -> i64 {
139
850k
            x.sign_extend_from_width(ty.bits()).bits()
140
850k
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::i64_sextend_imm64
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::i64_sextend_imm64
141
142
        #[inline]
143
174k
        fn u64_uextend_imm64(&mut self, ty: Type, x: Imm64) -> u64 {
144
174k
            (x.bits() as u64) & self.ty_mask(ty)
145
174k
        }
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::u64_uextend_imm64
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::u64_uextend_imm64
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::u64_uextend_imm64
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::u64_uextend_imm64
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::u64_uextend_imm64
Line
Count
Source
143
174k
        fn u64_uextend_imm64(&mut self, ty: Type, x: Imm64) -> u64 {
144
174k
            (x.bits() as u64) & self.ty_mask(ty)
145
174k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::u64_uextend_imm64
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::u64_uextend_imm64
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::u64_uextend_imm64
146
147
        #[inline]
148
87.2k
        fn imm64_icmp(&mut self, ty: Type, cc: &IntCC, x: Imm64, y: Imm64) -> Imm64 {
149
87.2k
            let ux = self.u64_uextend_imm64(ty, x);
150
87.2k
            let uy = self.u64_uextend_imm64(ty, y);
151
87.2k
            let sx = self.i64_sextend_imm64(ty, x);
152
87.2k
            let sy = self.i64_sextend_imm64(ty, y);
153
87.2k
            let result = match cc {
154
36.6k
                IntCC::Equal => ux == uy,
155
9.53k
                IntCC::NotEqual => ux != uy,
156
5.68k
                IntCC::UnsignedGreaterThanOrEqual => ux >= uy,
157
1.23k
                IntCC::UnsignedGreaterThan => ux > uy,
158
5.68k
                IntCC::UnsignedLessThanOrEqual => ux <= uy,
159
1.23k
                IntCC::UnsignedLessThan => ux < uy,
160
11.4k
                IntCC::SignedGreaterThanOrEqual => sx >= sy,
161
2.21k
                IntCC::SignedGreaterThan => sx > sy,
162
11.4k
                IntCC::SignedLessThanOrEqual => sx <= sy,
163
2.17k
                IntCC::SignedLessThan => sx < sy,
164
            };
165
87.2k
            Imm64::new(result.into())
166
87.2k
        }
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::imm64_icmp
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::imm64_icmp
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::imm64_icmp
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::imm64_icmp
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::imm64_icmp
Line
Count
Source
148
87.2k
        fn imm64_icmp(&mut self, ty: Type, cc: &IntCC, x: Imm64, y: Imm64) -> Imm64 {
149
87.2k
            let ux = self.u64_uextend_imm64(ty, x);
150
87.2k
            let uy = self.u64_uextend_imm64(ty, y);
151
87.2k
            let sx = self.i64_sextend_imm64(ty, x);
152
87.2k
            let sy = self.i64_sextend_imm64(ty, y);
153
87.2k
            let result = match cc {
154
36.6k
                IntCC::Equal => ux == uy,
155
9.53k
                IntCC::NotEqual => ux != uy,
156
5.68k
                IntCC::UnsignedGreaterThanOrEqual => ux >= uy,
157
1.23k
                IntCC::UnsignedGreaterThan => ux > uy,
158
5.68k
                IntCC::UnsignedLessThanOrEqual => ux <= uy,
159
1.23k
                IntCC::UnsignedLessThan => ux < uy,
160
11.4k
                IntCC::SignedGreaterThanOrEqual => sx >= sy,
161
2.21k
                IntCC::SignedGreaterThan => sx > sy,
162
11.4k
                IntCC::SignedLessThanOrEqual => sx <= sy,
163
2.17k
                IntCC::SignedLessThan => sx < sy,
164
            };
165
87.2k
            Imm64::new(result.into())
166
87.2k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::imm64_icmp
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::imm64_icmp
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::imm64_icmp
167
168
        #[inline]
169
953k
        fn ty_bits(&mut self, ty: Type) -> u8 {
170
            use core::convert::TryInto;
171
953k
            ty.bits().try_into().unwrap()
172
953k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_bits
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_bits
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_bits
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_bits
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_bits
Line
Count
Source
169
895k
        fn ty_bits(&mut self, ty: Type) -> u8 {
170
            use core::convert::TryInto;
171
895k
            ty.bits().try_into().unwrap()
172
895k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_bits
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_bits
Line
Count
Source
169
57.7k
        fn ty_bits(&mut self, ty: Type) -> u8 {
170
            use core::convert::TryInto;
171
57.7k
            ty.bits().try_into().unwrap()
172
57.7k
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_bits
173
174
        #[inline]
175
381k
        fn ty_bits_u16(&mut self, ty: Type) -> u16 {
176
381k
            ty.bits() as u16
177
381k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_bits_u16
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_bits_u16
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_bits_u16
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_bits_u16
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_bits_u16
Line
Count
Source
175
381k
        fn ty_bits_u16(&mut self, ty: Type) -> u16 {
176
381k
            ty.bits() as u16
177
381k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_bits_u16
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_bits_u16
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_bits_u16
178
179
        #[inline]
180
137k
        fn ty_bits_u64(&mut self, ty: Type) -> u64 {
181
137k
            ty.bits() as u64
182
137k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_bits_u64
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_bits_u64
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_bits_u64
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_bits_u64
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_bits_u64
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_bits_u64
Line
Count
Source
180
137k
        fn ty_bits_u64(&mut self, ty: Type) -> u64 {
181
137k
            ty.bits() as u64
182
137k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_bits_u64
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_bits_u64
183
184
        #[inline]
185
0
        fn ty_bytes(&mut self, ty: Type) -> u16 {
186
0
            u16::try_from(ty.bytes()).unwrap()
187
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_bytes
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_bytes
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_bytes
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_bytes
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_bytes
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_bytes
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_bytes
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_bytes
188
189
        #[inline]
190
1.30M
        fn ty_mask(&mut self, ty: Type) -> u64 {
191
1.30M
            let ty_bits = ty.bits();
192
1.30M
            debug_assert_ne!(ty_bits, 0);
193
1.30M
            let shift = 64_u64
194
1.30M
                .checked_sub(ty_bits.into())
195
1.30M
                .expect("unimplemented for > 64 bits");
196
1.30M
            u64::MAX >> shift
197
1.30M
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_mask
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_mask
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_mask
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_mask
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_mask
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_mask
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_mask
Line
Count
Source
190
1.30M
        fn ty_mask(&mut self, ty: Type) -> u64 {
191
1.30M
            let ty_bits = ty.bits();
192
1.30M
            debug_assert_ne!(ty_bits, 0);
193
1.30M
            let shift = 64_u64
194
1.30M
                .checked_sub(ty_bits.into())
195
1.30M
                .expect("unimplemented for > 64 bits");
196
1.30M
            u64::MAX >> shift
197
1.30M
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_mask
198
199
        #[inline]
200
0
        fn ty_lane_mask(&mut self, ty: Type) -> u64 {
201
0
            let ty_lane_count = ty.lane_count();
202
0
            debug_assert_ne!(ty_lane_count, 0);
203
0
            let shift = 64_u64
204
0
                .checked_sub(ty_lane_count.into())
205
0
                .expect("unimplemented for > 64 bits");
206
0
            u64::MAX >> shift
207
0
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_lane_mask
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_lane_mask
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_lane_mask
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_lane_mask
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_lane_mask
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_lane_mask
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_lane_mask
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_lane_mask
208
209
        #[inline]
210
0
        fn ty_lane_count(&mut self, ty: Type) -> u64 {
211
0
            ty.lane_count() as u64
212
0
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_lane_count
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_lane_count
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_lane_count
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_lane_count
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_lane_count
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_lane_count
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_lane_count
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_lane_count
213
214
        #[inline]
215
0
        fn ty_umin(&mut self, _ty: Type) -> u64 {
216
0
            0
217
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_umin
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_umin
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_umin
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_umin
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_umin
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_umin
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_umin
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_umin
218
219
        #[inline]
220
441k
        fn ty_umax(&mut self, ty: Type) -> u64 {
221
441k
            self.ty_mask(ty)
222
441k
        }
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_umax
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_umax
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_umax
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_umax
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_umax
Line
Count
Source
220
441k
        fn ty_umax(&mut self, ty: Type) -> u64 {
221
441k
            self.ty_mask(ty)
222
441k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_umax
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_umax
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_umax
223
224
        #[inline]
225
56.1k
        fn ty_smin(&mut self, ty: Type) -> u64 {
226
56.1k
            let ty_bits = ty.bits();
227
56.1k
            debug_assert_ne!(ty_bits, 0);
228
56.1k
            let shift = 64_u64
229
56.1k
                .checked_sub(ty_bits.into())
230
56.1k
                .expect("unimplemented for > 64 bits");
231
56.1k
            (i64::MIN as u64) >> shift
232
56.1k
        }
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_smin
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_smin
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_smin
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_smin
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_smin
Line
Count
Source
225
56.1k
        fn ty_smin(&mut self, ty: Type) -> u64 {
226
56.1k
            let ty_bits = ty.bits();
227
56.1k
            debug_assert_ne!(ty_bits, 0);
228
56.1k
            let shift = 64_u64
229
56.1k
                .checked_sub(ty_bits.into())
230
56.1k
                .expect("unimplemented for > 64 bits");
231
56.1k
            (i64::MIN as u64) >> shift
232
56.1k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_smin
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_smin
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_smin
233
234
        #[inline]
235
56.0k
        fn ty_smax(&mut self, ty: Type) -> u64 {
236
56.0k
            let ty_bits = ty.bits();
237
56.0k
            debug_assert_ne!(ty_bits, 0);
238
56.0k
            let shift = 64_u64
239
56.0k
                .checked_sub(ty_bits.into())
240
56.0k
                .expect("unimplemented for > 64 bits");
241
56.0k
            (i64::MAX as u64) >> shift
242
56.0k
        }
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_smax
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_smax
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_smax
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_smax
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_smax
Line
Count
Source
235
56.0k
        fn ty_smax(&mut self, ty: Type) -> u64 {
236
56.0k
            let ty_bits = ty.bits();
237
56.0k
            debug_assert_ne!(ty_bits, 0);
238
56.0k
            let shift = 64_u64
239
56.0k
                .checked_sub(ty_bits.into())
240
56.0k
                .expect("unimplemented for > 64 bits");
241
56.0k
            (i64::MAX as u64) >> shift
242
56.0k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_smax
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_smax
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_smax
243
244
11.3k
        fn fits_in_16(&mut self, ty: Type) -> Option<Type> {
245
11.3k
            if ty.bits() <= 16 && !ty.is_dynamic_vector() {
246
46
                Some(ty)
247
            } else {
248
11.3k
                None
249
            }
250
11.3k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::fits_in_16
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::fits_in_16
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::fits_in_16
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::fits_in_16
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::fits_in_16
Line
Count
Source
244
11.3k
        fn fits_in_16(&mut self, ty: Type) -> Option<Type> {
245
11.3k
            if ty.bits() <= 16 && !ty.is_dynamic_vector() {
246
46
                Some(ty)
247
            } else {
248
11.3k
                None
249
            }
250
11.3k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::fits_in_16
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::fits_in_16
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::fits_in_16
251
252
        #[inline]
253
406k
        fn fits_in_32(&mut self, ty: Type) -> Option<Type> {
254
406k
            if ty.bits() <= 32 && !ty.is_dynamic_vector() {
255
355k
                Some(ty)
256
            } else {
257
50.5k
                None
258
            }
259
406k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::fits_in_32
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::fits_in_32
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::fits_in_32
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::fits_in_32
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::fits_in_32
Line
Count
Source
253
406k
        fn fits_in_32(&mut self, ty: Type) -> Option<Type> {
254
406k
            if ty.bits() <= 32 && !ty.is_dynamic_vector() {
255
355k
                Some(ty)
256
            } else {
257
50.5k
                None
258
            }
259
406k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::fits_in_32
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::fits_in_32
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::fits_in_32
260
261
        #[inline]
262
0
        fn lane_fits_in_32(&mut self, ty: Type) -> Option<Type> {
263
0
            if !ty.is_vector() && !ty.is_dynamic_vector() {
264
0
                None
265
0
            } else if ty.lane_type().bits() <= 32 {
266
0
                Some(ty)
267
            } else {
268
0
                None
269
            }
270
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::lane_fits_in_32
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::lane_fits_in_32
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::lane_fits_in_32
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::lane_fits_in_32
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::lane_fits_in_32
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::lane_fits_in_32
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::lane_fits_in_32
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::lane_fits_in_32
271
272
        #[inline]
273
3.40M
        fn fits_in_64(&mut self, ty: Type) -> Option<Type> {
274
3.40M
            if ty.bits() <= 64 && !ty.is_dynamic_vector() {
275
3.40M
                Some(ty)
276
            } else {
277
0
                None
278
            }
279
3.40M
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::fits_in_64
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::fits_in_64
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::fits_in_64
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::fits_in_64
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::fits_in_64
Line
Count
Source
273
2.40M
        fn fits_in_64(&mut self, ty: Type) -> Option<Type> {
274
2.40M
            if ty.bits() <= 64 && !ty.is_dynamic_vector() {
275
2.40M
                Some(ty)
276
            } else {
277
0
                None
278
            }
279
2.40M
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::fits_in_64
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::fits_in_64
Line
Count
Source
273
1.00M
        fn fits_in_64(&mut self, ty: Type) -> Option<Type> {
274
1.00M
            if ty.bits() <= 64 && !ty.is_dynamic_vector() {
275
1.00M
                Some(ty)
276
            } else {
277
0
                None
278
            }
279
1.00M
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::fits_in_64
280
281
        #[inline]
282
259k
        fn ty_int_ref_scalar_64(&mut self, ty: Type) -> Option<Type> {
283
259k
            if ty.bits() <= 64 && !ty.is_float() && !ty.is_vector() {
284
150k
                Some(ty)
285
            } else {
286
108k
                None
287
            }
288
259k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_int_ref_scalar_64
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_int_ref_scalar_64
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_int_ref_scalar_64
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_int_ref_scalar_64
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_int_ref_scalar_64
Line
Count
Source
282
257k
        fn ty_int_ref_scalar_64(&mut self, ty: Type) -> Option<Type> {
283
257k
            if ty.bits() <= 64 && !ty.is_float() && !ty.is_vector() {
284
149k
                Some(ty)
285
            } else {
286
108k
                None
287
            }
288
257k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_int_ref_scalar_64
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_int_ref_scalar_64
Line
Count
Source
282
1.44k
        fn ty_int_ref_scalar_64(&mut self, ty: Type) -> Option<Type> {
283
1.44k
            if ty.bits() <= 64 && !ty.is_float() && !ty.is_vector() {
284
1.44k
                Some(ty)
285
            } else {
286
0
                None
287
            }
288
1.44k
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_int_ref_scalar_64
289
290
        #[inline]
291
109k
        fn ty_int_ref_scalar_64_extract(&mut self, ty: Type) -> Option<Type> {
292
109k
            self.ty_int_ref_scalar_64(ty)
293
109k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_int_ref_scalar_64_extract
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_int_ref_scalar_64_extract
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_int_ref_scalar_64_extract
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_int_ref_scalar_64_extract
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_int_ref_scalar_64_extract
Line
Count
Source
291
108k
        fn ty_int_ref_scalar_64_extract(&mut self, ty: Type) -> Option<Type> {
292
108k
            self.ty_int_ref_scalar_64(ty)
293
108k
        }
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_int_ref_scalar_64_extract
Line
Count
Source
291
1.44k
        fn ty_int_ref_scalar_64_extract(&mut self, ty: Type) -> Option<Type> {
292
1.44k
            self.ty_int_ref_scalar_64(ty)
293
1.44k
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_int_ref_scalar_64_extract
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_int_ref_scalar_64_extract
294
295
        #[inline]
296
976k
        fn ty_16(&mut self, ty: Type) -> Option<Type> {
297
976k
            if ty.bits() == 16 { Some(ty) } else { None }
298
976k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_16
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_16
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_16
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_16
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_16
Line
Count
Source
296
976k
        fn ty_16(&mut self, ty: Type) -> Option<Type> {
297
976k
            if ty.bits() == 16 { Some(ty) } else { None }
298
976k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_16
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_16
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_16
299
300
        #[inline]
301
976k
        fn ty_32(&mut self, ty: Type) -> Option<Type> {
302
976k
            if ty.bits() == 32 { Some(ty) } else { None }
303
976k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_32
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_32
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_32
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_32
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_32
Line
Count
Source
301
976k
        fn ty_32(&mut self, ty: Type) -> Option<Type> {
302
976k
            if ty.bits() == 32 { Some(ty) } else { None }
303
976k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_32
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_32
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_32
304
305
        #[inline]
306
308k
        fn ty_64(&mut self, ty: Type) -> Option<Type> {
307
308k
            if ty.bits() == 64 { Some(ty) } else { None }
308
308k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_64
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_64
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_64
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_64
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_64
Line
Count
Source
306
308k
        fn ty_64(&mut self, ty: Type) -> Option<Type> {
307
308k
            if ty.bits() == 64 { Some(ty) } else { None }
308
308k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_64
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_64
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_64
309
310
        #[inline]
311
0
        fn ty_128(&mut self, ty: Type) -> Option<Type> {
312
0
            if ty.bits() == 128 { Some(ty) } else { None }
313
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_128
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_128
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_128
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_128
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_128
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_128
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_128
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_128
314
315
        #[inline]
316
734k
        fn ty_32_or_64(&mut self, ty: Type) -> Option<Type> {
317
734k
            if ty.bits() == 32 || ty.bits() == 64 {
318
734k
                Some(ty)
319
            } else {
320
362
                None
321
            }
322
734k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_32_or_64
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_32_or_64
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_32_or_64
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_32_or_64
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_32_or_64
Line
Count
Source
316
734k
        fn ty_32_or_64(&mut self, ty: Type) -> Option<Type> {
317
734k
            if ty.bits() == 32 || ty.bits() == 64 {
318
734k
                Some(ty)
319
            } else {
320
362
                None
321
            }
322
734k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_32_or_64
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_32_or_64
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_32_or_64
323
324
        #[inline]
325
0
        fn ty_8_or_16(&mut self, ty: Type) -> Option<Type> {
326
0
            if ty.bits() == 8 || ty.bits() == 16 {
327
0
                Some(ty)
328
            } else {
329
0
                None
330
            }
331
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_8_or_16
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_8_or_16
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_8_or_16
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_8_or_16
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_8_or_16
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_8_or_16
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_8_or_16
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_8_or_16
332
333
        #[inline]
334
0
        fn ty_16_or_32(&mut self, ty: Type) -> Option<Type> {
335
0
            if ty.bits() == 16 || ty.bits() == 32 {
336
0
                Some(ty)
337
            } else {
338
0
                None
339
            }
340
0
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_16_or_32
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_16_or_32
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_16_or_32
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_16_or_32
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_16_or_32
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_16_or_32
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_16_or_32
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_16_or_32
341
342
        #[inline]
343
0
        fn int_fits_in_32(&mut self, ty: Type) -> Option<Type> {
344
0
            match ty {
345
0
                I8 | I16 | I32 => Some(ty),
346
0
                _ => None,
347
            }
348
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::int_fits_in_32
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::int_fits_in_32
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::int_fits_in_32
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::int_fits_in_32
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::int_fits_in_32
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::int_fits_in_32
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::int_fits_in_32
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::int_fits_in_32
349
350
        #[inline]
351
1.37M
        fn ty_int_ref_64(&mut self, ty: Type) -> Option<Type> {
352
1.37M
            match ty {
353
1.19M
                I64 => Some(ty),
354
184k
                _ => None,
355
            }
356
1.37M
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_int_ref_64
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_int_ref_64
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_int_ref_64
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_int_ref_64
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_int_ref_64
Line
Count
Source
351
1.37M
        fn ty_int_ref_64(&mut self, ty: Type) -> Option<Type> {
352
1.37M
            match ty {
353
1.19M
                I64 => Some(ty),
354
184k
                _ => None,
355
            }
356
1.37M
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_int_ref_64
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_int_ref_64
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_int_ref_64
357
358
        #[inline]
359
2.06k
        fn ty_int_ref_16_to_64(&mut self, ty: Type) -> Option<Type> {
360
2.06k
            match ty {
361
1.64k
                I16 | I32 | I64 => Some(ty),
362
414
                _ => None,
363
            }
364
2.06k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_int_ref_16_to_64
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_int_ref_16_to_64
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_int_ref_16_to_64
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_int_ref_16_to_64
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_int_ref_16_to_64
Line
Count
Source
359
2.06k
        fn ty_int_ref_16_to_64(&mut self, ty: Type) -> Option<Type> {
360
2.06k
            match ty {
361
1.64k
                I16 | I32 | I64 => Some(ty),
362
414
                _ => None,
363
            }
364
2.06k
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_int_ref_16_to_64
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_int_ref_16_to_64
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_int_ref_16_to_64
365
366
        #[inline]
367
1.06M
        fn ty_int(&mut self, ty: Type) -> Option<Type> {
368
1.06M
            ty.is_int().then(|| ty)
369
1.06M
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_int
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_int
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_int
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_int
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_int
Line
Count
Source
367
330k
        fn ty_int(&mut self, ty: Type) -> Option<Type> {
368
330k
            ty.is_int().then(|| ty)
369
330k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_int
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_int
Line
Count
Source
367
732k
        fn ty_int(&mut self, ty: Type) -> Option<Type> {
368
732k
            ty.is_int().then(|| ty)
369
732k
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_int
370
371
        #[inline]
372
0
        fn ty_scalar(&mut self, ty: Type) -> Option<Type> {
373
0
            if ty.lane_count() == 1 { Some(ty) } else { None }
374
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_scalar
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_scalar
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_scalar
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_scalar
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_scalar
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_scalar
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_scalar
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_scalar
375
376
        #[inline]
377
584k
        fn ty_scalar_float(&mut self, ty: Type) -> Option<Type> {
378
584k
            if ty.is_float() { Some(ty) } else { None }
379
584k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_scalar_float
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_scalar_float
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_scalar_float
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_scalar_float
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_scalar_float
Line
Count
Source
377
584k
        fn ty_scalar_float(&mut self, ty: Type) -> Option<Type> {
378
584k
            if ty.is_float() { Some(ty) } else { None }
379
584k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_scalar_float
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_scalar_float
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_scalar_float
380
381
        #[inline]
382
0
        fn ty_float_or_vec(&mut self, ty: Type) -> Option<Type> {
383
0
            if ty.is_float() || ty.is_vector() {
384
0
                Some(ty)
385
            } else {
386
0
                None
387
            }
388
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_float_or_vec
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_float_or_vec
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_float_or_vec
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_float_or_vec
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_float_or_vec
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_float_or_vec
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_float_or_vec
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_float_or_vec
389
390
0
        fn ty_vector_float(&mut self, ty: Type) -> Option<Type> {
391
0
            if ty.is_vector() && ty.lane_type().is_float() {
392
0
                Some(ty)
393
            } else {
394
0
                None
395
            }
396
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_vector_float
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_vector_float
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_vector_float
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_vector_float
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_vector_float
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_vector_float
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_vector_float
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_vector_float
397
398
        #[inline]
399
0
        fn ty_vector_not_float(&mut self, ty: Type) -> Option<Type> {
400
0
            if ty.is_vector() && !ty.lane_type().is_float() {
401
0
                Some(ty)
402
            } else {
403
0
                None
404
            }
405
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_vector_not_float
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_vector_not_float
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_vector_not_float
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_vector_not_float
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_vector_not_float
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_vector_not_float
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_vector_not_float
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_vector_not_float
406
407
        #[inline]
408
0
        fn ty_vec64_ctor(&mut self, ty: Type) -> Option<Type> {
409
0
            if ty.is_vector() && ty.bits() == 64 {
410
0
                Some(ty)
411
            } else {
412
0
                None
413
            }
414
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_vec64_ctor
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_vec64_ctor
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_vec64_ctor
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_vec64_ctor
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_vec64_ctor
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_vec64_ctor
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_vec64_ctor
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_vec64_ctor
415
416
        #[inline]
417
0
        fn ty_vec64(&mut self, ty: Type) -> Option<Type> {
418
0
            if ty.is_vector() && ty.bits() == 64 {
419
0
                Some(ty)
420
            } else {
421
0
                None
422
            }
423
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_vec64
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_vec64
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_vec64
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_vec64
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_vec64
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_vec64
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_vec64
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_vec64
424
425
        #[inline]
426
191k
        fn ty_vec128(&mut self, ty: Type) -> Option<Type> {
427
191k
            if ty.is_vector() && ty.bits() == 128 {
428
108k
                Some(ty)
429
            } else {
430
83.1k
                None
431
            }
432
191k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_vec128
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_vec128
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_vec128
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_vec128
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_vec128
Line
Count
Source
426
191k
        fn ty_vec128(&mut self, ty: Type) -> Option<Type> {
427
191k
            if ty.is_vector() && ty.bits() == 128 {
428
108k
                Some(ty)
429
            } else {
430
83.1k
                None
431
            }
432
191k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_vec128
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_vec128
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_vec128
433
434
        #[inline]
435
0
        fn ty_dyn_vec64(&mut self, ty: Type) -> Option<Type> {
436
0
            if ty.is_dynamic_vector() && dynamic_to_fixed(ty).bits() == 64 {
437
0
                Some(ty)
438
            } else {
439
0
                None
440
            }
441
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_dyn_vec64
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_dyn_vec64
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_dyn_vec64
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_dyn_vec64
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_dyn_vec64
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_dyn_vec64
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_dyn_vec64
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_dyn_vec64
442
443
        #[inline]
444
0
        fn ty_dyn_vec128(&mut self, ty: Type) -> Option<Type> {
445
0
            if ty.is_dynamic_vector() && dynamic_to_fixed(ty).bits() == 128 {
446
0
                Some(ty)
447
            } else {
448
0
                None
449
            }
450
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_dyn_vec128
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_dyn_vec128
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_dyn_vec128
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_dyn_vec128
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_dyn_vec128
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_dyn_vec128
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_dyn_vec128
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_dyn_vec128
451
452
        #[inline]
453
0
        fn ty_vec64_int(&mut self, ty: Type) -> Option<Type> {
454
0
            if ty.is_vector() && ty.bits() == 64 && ty.lane_type().is_int() {
455
0
                Some(ty)
456
            } else {
457
0
                None
458
            }
459
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_vec64_int
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_vec64_int
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_vec64_int
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_vec64_int
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_vec64_int
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_vec64_int
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_vec64_int
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_vec64_int
460
461
        #[inline]
462
0
        fn ty_vec128_int(&mut self, ty: Type) -> Option<Type> {
463
0
            if ty.is_vector() && ty.bits() == 128 && ty.lane_type().is_int() {
464
0
                Some(ty)
465
            } else {
466
0
                None
467
            }
468
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_vec128_int
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_vec128_int
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_vec128_int
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_vec128_int
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_vec128_int
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_vec128_int
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_vec128_int
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_vec128_int
469
470
        #[inline]
471
0
        fn ty_addr64(&mut self, ty: Type) -> Option<Type> {
472
0
            match ty {
473
0
                I64 => Some(ty),
474
0
                _ => None,
475
            }
476
0
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_addr64
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_addr64
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_addr64
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_addr64
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_addr64
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_addr64
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_addr64
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_addr64
477
478
        #[inline]
479
3.76M
        fn u64_from_imm64(&mut self, imm: Imm64) -> u64 {
480
3.76M
            imm.bits() as u64
481
3.76M
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::u64_from_imm64
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::u64_from_imm64
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::u64_from_imm64
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::u64_from_imm64
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::u64_from_imm64
Line
Count
Source
479
635k
        fn u64_from_imm64(&mut self, imm: Imm64) -> u64 {
480
635k
            imm.bits() as u64
481
635k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::u64_from_imm64
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::u64_from_imm64
Line
Count
Source
479
3.13M
        fn u64_from_imm64(&mut self, imm: Imm64) -> u64 {
480
3.13M
            imm.bits() as u64
481
3.13M
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::u64_from_imm64
482
483
        #[inline]
484
43.2k
        fn imm64_power_of_two(&mut self, x: Imm64) -> Option<u64> {
485
43.2k
            let x = i64::from(x);
486
43.2k
            let x = u64::try_from(x).ok()?;
487
39.9k
            if x.is_power_of_two() {
488
34.0k
                Some(x.trailing_zeros().into())
489
            } else {
490
5.93k
                None
491
            }
492
43.2k
        }
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::imm64_power_of_two
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::imm64_power_of_two
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::imm64_power_of_two
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::imm64_power_of_two
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::imm64_power_of_two
Line
Count
Source
484
43.2k
        fn imm64_power_of_two(&mut self, x: Imm64) -> Option<u64> {
485
43.2k
            let x = i64::from(x);
486
43.2k
            let x = u64::try_from(x).ok()?;
487
39.9k
            if x.is_power_of_two() {
488
34.0k
                Some(x.trailing_zeros().into())
489
            } else {
490
5.93k
                None
491
            }
492
43.2k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::imm64_power_of_two
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::imm64_power_of_two
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::imm64_power_of_two
493
494
        #[inline]
495
0
        fn u64_from_bool(&mut self, b: bool) -> u64 {
496
0
            if b { u64::MAX } else { 0 }
497
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::u64_from_bool
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::u64_from_bool
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::u64_from_bool
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::u64_from_bool
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::u64_from_bool
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::u64_from_bool
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::u64_from_bool
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::u64_from_bool
498
499
        #[inline]
500
902k
        fn multi_lane(&mut self, ty: Type) -> Option<(u32, u32)> {
501
902k
            if ty.lane_count() > 1 {
502
337k
                Some((ty.lane_bits(), ty.lane_count()))
503
            } else {
504
564k
                None
505
            }
506
902k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::multi_lane
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::multi_lane
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::multi_lane
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::multi_lane
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::multi_lane
Line
Count
Source
500
780k
        fn multi_lane(&mut self, ty: Type) -> Option<(u32, u32)> {
501
780k
            if ty.lane_count() > 1 {
502
216k
                Some((ty.lane_bits(), ty.lane_count()))
503
            } else {
504
564k
                None
505
            }
506
780k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::multi_lane
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::multi_lane
Line
Count
Source
500
121k
        fn multi_lane(&mut self, ty: Type) -> Option<(u32, u32)> {
501
121k
            if ty.lane_count() > 1 {
502
121k
                Some((ty.lane_bits(), ty.lane_count()))
503
            } else {
504
0
                None
505
            }
506
121k
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::multi_lane
507
508
        #[inline]
509
0
        fn dynamic_lane(&mut self, ty: Type) -> Option<(u32, u32)> {
510
0
            if ty.is_dynamic_vector() {
511
0
                Some((ty.lane_bits(), ty.min_lane_count()))
512
            } else {
513
0
                None
514
            }
515
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::dynamic_lane
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::dynamic_lane
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::dynamic_lane
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::dynamic_lane
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::dynamic_lane
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::dynamic_lane
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::dynamic_lane
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::dynamic_lane
516
517
        #[inline]
518
0
        fn ty_dyn64_int(&mut self, ty: Type) -> Option<Type> {
519
0
            if ty.is_dynamic_vector() && ty.min_bits() == 64 && ty.lane_type().is_int() {
520
0
                Some(ty)
521
            } else {
522
0
                None
523
            }
524
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_dyn64_int
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_dyn64_int
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_dyn64_int
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_dyn64_int
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_dyn64_int
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_dyn64_int
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_dyn64_int
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_dyn64_int
525
526
        #[inline]
527
0
        fn ty_dyn128_int(&mut self, ty: Type) -> Option<Type> {
528
0
            if ty.is_dynamic_vector() && ty.min_bits() == 128 && ty.lane_type().is_int() {
529
0
                Some(ty)
530
            } else {
531
0
                None
532
            }
533
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_dyn128_int
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_dyn128_int
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_dyn128_int
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_dyn128_int
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_dyn128_int
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_dyn128_int
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_dyn128_int
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_dyn128_int
534
535
0
        fn u16_from_ieee16(&mut self, val: Ieee16) -> u16 {
536
0
            val.bits()
537
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::u16_from_ieee16
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::u16_from_ieee16
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::u16_from_ieee16
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::u16_from_ieee16
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::u16_from_ieee16
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::u16_from_ieee16
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::u16_from_ieee16
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::u16_from_ieee16
538
539
76.8k
        fn u32_from_ieee32(&mut self, val: Ieee32) -> u32 {
540
76.8k
            val.bits()
541
76.8k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::u32_from_ieee32
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::u32_from_ieee32
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::u32_from_ieee32
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::u32_from_ieee32
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::u32_from_ieee32
Line
Count
Source
539
76.8k
        fn u32_from_ieee32(&mut self, val: Ieee32) -> u32 {
540
76.8k
            val.bits()
541
76.8k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::u32_from_ieee32
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::u32_from_ieee32
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::u32_from_ieee32
542
543
76.4k
        fn u64_from_ieee64(&mut self, val: Ieee64) -> u64 {
544
76.4k
            val.bits()
545
76.4k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::u64_from_ieee64
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::u64_from_ieee64
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::u64_from_ieee64
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::u64_from_ieee64
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::u64_from_ieee64
Line
Count
Source
543
76.4k
        fn u64_from_ieee64(&mut self, val: Ieee64) -> u64 {
544
76.4k
            val.bits()
545
76.4k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::u64_from_ieee64
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::u64_from_ieee64
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::u64_from_ieee64
546
547
275
        fn u8_from_uimm8(&mut self, val: Uimm8) -> u8 {
548
275
            val
549
275
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::u8_from_uimm8
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::u8_from_uimm8
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::u8_from_uimm8
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::u8_from_uimm8
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::u8_from_uimm8
Line
Count
Source
547
275
        fn u8_from_uimm8(&mut self, val: Uimm8) -> u8 {
548
275
            val
549
275
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::u8_from_uimm8
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::u8_from_uimm8
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::u8_from_uimm8
550
551
0
        fn not_vec32x2(&mut self, ty: Type) -> Option<Type> {
552
0
            if ty.lane_bits() == 32 && ty.lane_count() == 2 {
553
0
                None
554
            } else {
555
0
                Some(ty)
556
            }
557
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::not_vec32x2
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::not_vec32x2
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::not_vec32x2
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::not_vec32x2
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::not_vec32x2
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::not_vec32x2
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::not_vec32x2
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::not_vec32x2
558
559
0
        fn not_i64x2(&mut self, ty: Type) -> Option<()> {
560
0
            if ty == I64X2 { None } else { Some(()) }
561
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::not_i64x2
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::not_i64x2
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::not_i64x2
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::not_i64x2
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::not_i64x2
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::not_i64x2
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::not_i64x2
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::not_i64x2
562
563
0
        fn trap_code_division_by_zero(&mut self) -> TrapCode {
564
0
            TrapCode::INTEGER_DIVISION_BY_ZERO
565
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::trap_code_division_by_zero
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::trap_code_division_by_zero
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::trap_code_division_by_zero
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::trap_code_division_by_zero
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::trap_code_division_by_zero
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::trap_code_division_by_zero
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::trap_code_division_by_zero
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::trap_code_division_by_zero
566
567
0
        fn trap_code_integer_overflow(&mut self) -> TrapCode {
568
0
            TrapCode::INTEGER_OVERFLOW
569
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::trap_code_integer_overflow
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::trap_code_integer_overflow
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::trap_code_integer_overflow
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::trap_code_integer_overflow
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::trap_code_integer_overflow
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::trap_code_integer_overflow
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::trap_code_integer_overflow
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::trap_code_integer_overflow
570
571
0
        fn trap_code_bad_conversion_to_integer(&mut self) -> TrapCode {
572
0
            TrapCode::BAD_CONVERSION_TO_INTEGER
573
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::trap_code_bad_conversion_to_integer
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::trap_code_bad_conversion_to_integer
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::trap_code_bad_conversion_to_integer
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::trap_code_bad_conversion_to_integer
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::trap_code_bad_conversion_to_integer
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::trap_code_bad_conversion_to_integer
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::trap_code_bad_conversion_to_integer
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::trap_code_bad_conversion_to_integer
574
575
0
        fn nonzero_u64_from_imm64(&mut self, val: Imm64) -> Option<u64> {
576
0
            match val.bits() {
577
0
                0 => None,
578
0
                n => Some(n as u64),
579
            }
580
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::nonzero_u64_from_imm64
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::nonzero_u64_from_imm64
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::nonzero_u64_from_imm64
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::nonzero_u64_from_imm64
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::nonzero_u64_from_imm64
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::nonzero_u64_from_imm64
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::nonzero_u64_from_imm64
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::nonzero_u64_from_imm64
581
582
        #[inline]
583
0
        fn u32_nonnegative(&mut self, x: u32) -> Option<u32> {
584
0
            if (x as i32) >= 0 { Some(x) } else { None }
585
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::u32_nonnegative
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::u32_nonnegative
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::u32_nonnegative
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::u32_nonnegative
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::u32_nonnegative
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::u32_nonnegative
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::u32_nonnegative
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::u32_nonnegative
586
587
        #[inline]
588
223k
        fn imm64(&mut self, x: u64) -> Imm64 {
589
223k
            Imm64::new(x as i64)
590
223k
        }
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::imm64
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::imm64
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::imm64
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::imm64
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::imm64
Line
Count
Source
588
223k
        fn imm64(&mut self, x: u64) -> Imm64 {
589
223k
            Imm64::new(x as i64)
590
223k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::imm64
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::imm64
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::imm64
591
592
        #[inline]
593
684k
        fn imm64_masked(&mut self, ty: Type, x: u64) -> Imm64 {
594
684k
            Imm64::new((x & self.ty_mask(ty)) as i64)
595
684k
        }
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::imm64_masked
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::imm64_masked
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::imm64_masked
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::imm64_masked
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::imm64_masked
Line
Count
Source
593
684k
        fn imm64_masked(&mut self, ty: Type, x: u64) -> Imm64 {
594
684k
            Imm64::new((x & self.ty_mask(ty)) as i64)
595
684k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::imm64_masked
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::imm64_masked
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::imm64_masked
596
597
        #[inline]
598
0
        fn offset32(&mut self, x: Offset32) -> i32 {
599
0
            x.into()
600
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::offset32
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::offset32
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::offset32
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::offset32
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::offset32
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::offset32
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::offset32
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::offset32
601
602
        #[inline]
603
57.5k
        fn lane_type(&mut self, ty: Type) -> Type {
604
57.5k
            ty.lane_type()
605
57.5k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::lane_type
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::lane_type
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::lane_type
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::lane_type
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::lane_type
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::lane_type
Line
Count
Source
603
57.5k
        fn lane_type(&mut self, ty: Type) -> Type {
604
57.5k
            ty.lane_type()
605
57.5k
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::lane_type
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::lane_type
606
607
        #[inline]
608
0
        fn ty_half_lanes(&mut self, ty: Type) -> Option<Type> {
609
0
            if ty.lane_count() == 1 {
610
0
                None
611
            } else {
612
0
                ty.lane_type().by(ty.lane_count() / 2)
613
            }
614
0
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_half_lanes
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_half_lanes
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_half_lanes
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_half_lanes
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_half_lanes
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_half_lanes
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_half_lanes
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_half_lanes
615
616
        #[inline]
617
2
        fn ty_half_width(&mut self, ty: Type) -> Option<Type> {
618
2
            ty.half_width()
619
2
        }
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_half_width
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_half_width
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_half_width
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_half_width
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_half_width
Line
Count
Source
617
2
        fn ty_half_width(&mut self, ty: Type) -> Option<Type> {
618
2
            ty.half_width()
619
2
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_half_width
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_half_width
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_half_width
620
621
        #[inline]
622
0
        fn ty_equal(&mut self, lhs: Type, rhs: Type) -> bool {
623
0
            lhs == rhs
624
0
        }
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_equal
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_equal
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_equal
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_equal
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::ty_equal
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ty_equal
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ty_equal
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ty_equal
625
626
        #[inline]
627
3.67M
        fn offset32_to_i32(&mut self, offset: Offset32) -> i32 {
628
3.67M
            offset.into()
629
3.67M
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::offset32_to_i32
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::offset32_to_i32
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::offset32_to_i32
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::offset32_to_i32
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::offset32_to_i32
Line
Count
Source
627
3.67M
        fn offset32_to_i32(&mut self, offset: Offset32) -> i32 {
628
3.67M
            offset.into()
629
3.67M
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::offset32_to_i32
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::offset32_to_i32
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::offset32_to_i32
630
631
        #[inline]
632
116k
        fn i32_to_offset32(&mut self, offset: i32) -> Offset32 {
633
116k
            Offset32::new(offset)
634
116k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::i32_to_offset32
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::i32_to_offset32
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::i32_to_offset32
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::i32_to_offset32
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::i32_to_offset32
Line
Count
Source
632
116k
        fn i32_to_offset32(&mut self, offset: i32) -> Offset32 {
633
116k
            Offset32::new(offset)
634
116k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::i32_to_offset32
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::i32_to_offset32
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::i32_to_offset32
635
636
        #[inline]
637
43.8k
        fn mem_flags_trusted(&mut self) -> MemFlags {
638
43.8k
            MemFlags::trusted()
639
43.8k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::mem_flags_trusted
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::mem_flags_trusted
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::mem_flags_trusted
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::mem_flags_trusted
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::mem_flags_trusted
Line
Count
Source
637
43.8k
        fn mem_flags_trusted(&mut self) -> MemFlags {
638
43.8k
            MemFlags::trusted()
639
43.8k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::mem_flags_trusted
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::mem_flags_trusted
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::mem_flags_trusted
640
641
        #[inline]
642
3.51M
        fn little_or_native_endian(&mut self, flags: MemFlags) -> Option<MemFlags> {
643
3.51M
            match flags.explicit_endianness() {
644
3.51M
                Some(crate::ir::Endianness::Little) | None => Some(flags),
645
0
                Some(crate::ir::Endianness::Big) => None,
646
            }
647
3.51M
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::little_or_native_endian
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::little_or_native_endian
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::little_or_native_endian
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::little_or_native_endian
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::little_or_native_endian
Line
Count
Source
642
3.51M
        fn little_or_native_endian(&mut self, flags: MemFlags) -> Option<MemFlags> {
643
3.51M
            match flags.explicit_endianness() {
644
3.51M
                Some(crate::ir::Endianness::Little) | None => Some(flags),
645
0
                Some(crate::ir::Endianness::Big) => None,
646
            }
647
3.51M
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::little_or_native_endian
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::little_or_native_endian
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::little_or_native_endian
648
649
        #[inline]
650
0
        fn intcc_unsigned(&mut self, x: &IntCC) -> IntCC {
651
0
            x.unsigned()
652
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::intcc_unsigned
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::intcc_unsigned
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::intcc_unsigned
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::intcc_unsigned
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::intcc_unsigned
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::intcc_unsigned
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::intcc_unsigned
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::intcc_unsigned
653
654
        #[inline]
655
7.25k
        fn signed_cond_code(&mut self, cc: &IntCC) -> Option<IntCC> {
656
7.25k
            match cc {
657
                IntCC::Equal
658
                | IntCC::UnsignedGreaterThanOrEqual
659
                | IntCC::UnsignedGreaterThan
660
                | IntCC::UnsignedLessThanOrEqual
661
                | IntCC::UnsignedLessThan
662
5.92k
                | IntCC::NotEqual => None,
663
                IntCC::SignedGreaterThanOrEqual
664
                | IntCC::SignedGreaterThan
665
                | IntCC::SignedLessThanOrEqual
666
1.32k
                | IntCC::SignedLessThan => Some(*cc),
667
            }
668
7.25k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::signed_cond_code
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::signed_cond_code
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::signed_cond_code
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::signed_cond_code
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::signed_cond_code
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::signed_cond_code
Line
Count
Source
655
7.25k
        fn signed_cond_code(&mut self, cc: &IntCC) -> Option<IntCC> {
656
7.25k
            match cc {
657
                IntCC::Equal
658
                | IntCC::UnsignedGreaterThanOrEqual
659
                | IntCC::UnsignedGreaterThan
660
                | IntCC::UnsignedLessThanOrEqual
661
                | IntCC::UnsignedLessThan
662
5.92k
                | IntCC::NotEqual => None,
663
                IntCC::SignedGreaterThanOrEqual
664
                | IntCC::SignedGreaterThan
665
                | IntCC::SignedLessThanOrEqual
666
1.32k
                | IntCC::SignedLessThan => Some(*cc),
667
            }
668
7.25k
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::signed_cond_code
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::signed_cond_code
669
670
        #[inline]
671
93.8k
        fn intcc_swap_args(&mut self, cc: &IntCC) -> IntCC {
672
93.8k
            cc.swap_args()
673
93.8k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::intcc_swap_args
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::intcc_swap_args
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::intcc_swap_args
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::intcc_swap_args
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::intcc_swap_args
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::intcc_swap_args
Line
Count
Source
671
93.8k
        fn intcc_swap_args(&mut self, cc: &IntCC) -> IntCC {
672
93.8k
            cc.swap_args()
673
93.8k
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::intcc_swap_args
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::intcc_swap_args
674
675
        #[inline]
676
7.03k
        fn intcc_complement(&mut self, cc: &IntCC) -> IntCC {
677
7.03k
            cc.complement()
678
7.03k
        }
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::intcc_complement
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::intcc_complement
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::intcc_complement
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::intcc_complement
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::intcc_complement
Line
Count
Source
676
7.03k
        fn intcc_complement(&mut self, cc: &IntCC) -> IntCC {
677
7.03k
            cc.complement()
678
7.03k
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::intcc_complement
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::intcc_complement
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::intcc_complement
679
680
        #[inline]
681
0
        fn intcc_without_eq(&mut self, x: &IntCC) -> IntCC {
682
0
            x.without_equal()
683
0
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::intcc_without_eq
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::intcc_without_eq
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::intcc_without_eq
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::intcc_without_eq
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::intcc_without_eq
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::intcc_without_eq
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::intcc_without_eq
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::intcc_without_eq
684
685
        #[inline]
686
0
        fn floatcc_swap_args(&mut self, cc: &FloatCC) -> FloatCC {
687
0
            cc.swap_args()
688
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::floatcc_swap_args
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::floatcc_swap_args
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::floatcc_swap_args
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::floatcc_swap_args
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::floatcc_swap_args
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::floatcc_swap_args
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::floatcc_swap_args
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::floatcc_swap_args
689
690
        #[inline]
691
0
        fn floatcc_complement(&mut self, cc: &FloatCC) -> FloatCC {
692
0
            cc.complement()
693
0
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::floatcc_complement
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::floatcc_complement
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::floatcc_complement
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::floatcc_complement
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::floatcc_complement
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::floatcc_complement
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::floatcc_complement
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::floatcc_complement
694
695
0
        fn floatcc_unordered(&mut self, cc: &FloatCC) -> bool {
696
0
            match *cc {
697
                FloatCC::Unordered
698
                | FloatCC::UnorderedOrEqual
699
                | FloatCC::UnorderedOrLessThan
700
                | FloatCC::UnorderedOrLessThanOrEqual
701
                | FloatCC::UnorderedOrGreaterThan
702
0
                | FloatCC::UnorderedOrGreaterThanOrEqual => true,
703
0
                _ => false,
704
            }
705
0
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::floatcc_unordered
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::floatcc_unordered
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::floatcc_unordered
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::floatcc_unordered
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::floatcc_unordered
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::floatcc_unordered
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::floatcc_unordered
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::floatcc_unordered
706
707
        #[inline]
708
7.83M
        fn unpack_value_array_2(&mut self, arr: &ValueArray2) -> (Value, Value) {
709
7.83M
            let [a, b] = *arr;
710
7.83M
            (a, b)
711
7.83M
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::unpack_value_array_2
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::unpack_value_array_2
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::unpack_value_array_2
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::unpack_value_array_2
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::unpack_value_array_2
Line
Count
Source
708
3.52M
        fn unpack_value_array_2(&mut self, arr: &ValueArray2) -> (Value, Value) {
709
3.52M
            let [a, b] = *arr;
710
3.52M
            (a, b)
711
3.52M
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::unpack_value_array_2
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::unpack_value_array_2
Line
Count
Source
708
4.31M
        fn unpack_value_array_2(&mut self, arr: &ValueArray2) -> (Value, Value) {
709
4.31M
            let [a, b] = *arr;
710
4.31M
            (a, b)
711
4.31M
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::unpack_value_array_2
712
713
        #[inline]
714
0
        fn pack_value_array_2(&mut self, a: Value, b: Value) -> ValueArray2 {
715
0
            [a, b]
716
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::pack_value_array_2
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::pack_value_array_2
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::pack_value_array_2
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::pack_value_array_2
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::pack_value_array_2
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::pack_value_array_2
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::pack_value_array_2
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::pack_value_array_2
717
718
        #[inline]
719
489k
        fn unpack_value_array_3(&mut self, arr: &ValueArray3) -> (Value, Value, Value) {
720
489k
            let [a, b, c] = *arr;
721
489k
            (a, b, c)
722
489k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::unpack_value_array_3
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::unpack_value_array_3
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::unpack_value_array_3
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::unpack_value_array_3
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::unpack_value_array_3
Line
Count
Source
719
221k
        fn unpack_value_array_3(&mut self, arr: &ValueArray3) -> (Value, Value, Value) {
720
221k
            let [a, b, c] = *arr;
721
221k
            (a, b, c)
722
221k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::unpack_value_array_3
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::unpack_value_array_3
Line
Count
Source
719
267k
        fn unpack_value_array_3(&mut self, arr: &ValueArray3) -> (Value, Value, Value) {
720
267k
            let [a, b, c] = *arr;
721
267k
            (a, b, c)
722
267k
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::unpack_value_array_3
723
724
        #[inline]
725
0
        fn pack_value_array_3(&mut self, a: Value, b: Value, c: Value) -> ValueArray3 {
726
0
            [a, b, c]
727
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::pack_value_array_3
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::pack_value_array_3
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::pack_value_array_3
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::pack_value_array_3
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::pack_value_array_3
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::pack_value_array_3
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::pack_value_array_3
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::pack_value_array_3
728
729
        #[inline]
730
0
        fn unpack_block_array_2(&mut self, arr: &BlockArray2) -> (BlockCall, BlockCall) {
731
0
            let [a, b] = *arr;
732
0
            (a, b)
733
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::unpack_block_array_2
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::unpack_block_array_2
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::unpack_block_array_2
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::unpack_block_array_2
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::unpack_block_array_2
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::unpack_block_array_2
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::unpack_block_array_2
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::unpack_block_array_2
734
735
        #[inline]
736
0
        fn pack_block_array_2(&mut self, a: BlockCall, b: BlockCall) -> BlockArray2 {
737
0
            [a, b]
738
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::pack_block_array_2
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::pack_block_array_2
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::pack_block_array_2
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::pack_block_array_2
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::pack_block_array_2
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::pack_block_array_2
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::pack_block_array_2
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::pack_block_array_2
739
740
0
        fn u128_replicated_u64(&mut self, val: u128) -> Option<u64> {
741
0
            let low64 = val as u64 as u128;
742
0
            if (low64 | (low64 << 64)) == val {
743
0
                Some(low64 as u64)
744
            } else {
745
0
                None
746
            }
747
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::u128_replicated_u64
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::u128_replicated_u64
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::u128_replicated_u64
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::u128_replicated_u64
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::u128_replicated_u64
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::u128_replicated_u64
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::u128_replicated_u64
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::u128_replicated_u64
748
749
0
        fn u64_replicated_u32(&mut self, val: u64) -> Option<u64> {
750
0
            let low32 = val as u32 as u64;
751
0
            if (low32 | (low32 << 32)) == val {
752
0
                Some(low32)
753
            } else {
754
0
                None
755
            }
756
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::u64_replicated_u32
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::u64_replicated_u32
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::u64_replicated_u32
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::u64_replicated_u32
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::u64_replicated_u32
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::u64_replicated_u32
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::u64_replicated_u32
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::u64_replicated_u32
757
758
0
        fn u32_replicated_u16(&mut self, val: u64) -> Option<u64> {
759
0
            let val = val as u32;
760
0
            let low16 = val as u16 as u32;
761
0
            if (low16 | (low16 << 16)) == val {
762
0
                Some(low16.into())
763
            } else {
764
0
                None
765
            }
766
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::u32_replicated_u16
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::u32_replicated_u16
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::u32_replicated_u16
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::u32_replicated_u16
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::u32_replicated_u16
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::u32_replicated_u16
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::u32_replicated_u16
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::u32_replicated_u16
767
768
0
        fn u16_replicated_u8(&mut self, val: u64) -> Option<u8> {
769
0
            let val = val as u16;
770
0
            let low8 = val as u8 as u16;
771
0
            if (low8 | (low8 << 8)) == val {
772
0
                Some(low8 as u8)
773
            } else {
774
0
                None
775
            }
776
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::u16_replicated_u8
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::u16_replicated_u8
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::u16_replicated_u8
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::u16_replicated_u8
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::u16_replicated_u8
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::u16_replicated_u8
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::u16_replicated_u8
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::u16_replicated_u8
777
778
0
        fn u128_low_bits(&mut self, val: u128) -> u64 {
779
0
            val as u64
780
0
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::u128_low_bits
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::u128_low_bits
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::u128_low_bits
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::u128_low_bits
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::u128_low_bits
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::u128_low_bits
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::u128_low_bits
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::u128_low_bits
781
782
0
        fn u128_high_bits(&mut self, val: u128) -> u64 {
783
0
            (val >> 64) as u64
784
0
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::u128_high_bits
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::u128_high_bits
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::u128_high_bits
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::u128_high_bits
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::u128_high_bits
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::u128_high_bits
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::u128_high_bits
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::u128_high_bits
785
786
0
        fn f16_min(&mut self, a: Ieee16, b: Ieee16) -> Option<Ieee16> {
787
0
            a.minimum(b).non_nan()
788
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f16_min
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f16_min
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f16_min
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f16_min
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f16_min
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f16_min
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f16_min
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f16_min
789
790
0
        fn f16_max(&mut self, a: Ieee16, b: Ieee16) -> Option<Ieee16> {
791
0
            a.maximum(b).non_nan()
792
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f16_max
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f16_max
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f16_max
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f16_max
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f16_max
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f16_max
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f16_max
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f16_max
793
794
0
        fn f16_neg(&mut self, n: Ieee16) -> Ieee16 {
795
0
            -n
796
0
        }
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f16_neg
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f16_neg
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f16_neg
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f16_neg
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f16_neg
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f16_neg
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f16_neg
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f16_neg
797
798
0
        fn f16_abs(&mut self, n: Ieee16) -> Ieee16 {
799
0
            n.abs()
800
0
        }
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f16_abs
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f16_abs
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f16_abs
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f16_abs
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f16_abs
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f16_abs
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f16_abs
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f16_abs
801
802
0
        fn f16_copysign(&mut self, a: Ieee16, b: Ieee16) -> Ieee16 {
803
0
            a.copysign(b)
804
0
        }
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f16_copysign
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f16_copysign
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f16_copysign
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f16_copysign
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f16_copysign
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f16_copysign
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f16_copysign
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f16_copysign
805
806
20
        fn f32_add(&mut self, lhs: Ieee32, rhs: Ieee32) -> Option<Ieee32> {
807
20
            (lhs + rhs).non_nan()
808
20
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f32_add
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f32_add
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f32_add
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f32_add
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f32_add
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f32_add
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f32_add
Line
Count
Source
806
20
        fn f32_add(&mut self, lhs: Ieee32, rhs: Ieee32) -> Option<Ieee32> {
807
20
            (lhs + rhs).non_nan()
808
20
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f32_add
809
810
129
        fn f32_sub(&mut self, lhs: Ieee32, rhs: Ieee32) -> Option<Ieee32> {
811
129
            (lhs - rhs).non_nan()
812
129
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f32_sub
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f32_sub
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f32_sub
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f32_sub
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f32_sub
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f32_sub
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f32_sub
Line
Count
Source
810
129
        fn f32_sub(&mut self, lhs: Ieee32, rhs: Ieee32) -> Option<Ieee32> {
811
129
            (lhs - rhs).non_nan()
812
129
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f32_sub
813
814
30
        fn f32_mul(&mut self, lhs: Ieee32, rhs: Ieee32) -> Option<Ieee32> {
815
30
            (lhs * rhs).non_nan()
816
30
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f32_mul
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f32_mul
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f32_mul
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f32_mul
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f32_mul
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f32_mul
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f32_mul
Line
Count
Source
814
30
        fn f32_mul(&mut self, lhs: Ieee32, rhs: Ieee32) -> Option<Ieee32> {
815
30
            (lhs * rhs).non_nan()
816
30
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f32_mul
817
818
25
        fn f32_div(&mut self, lhs: Ieee32, rhs: Ieee32) -> Option<Ieee32> {
819
25
            (lhs / rhs).non_nan()
820
25
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f32_div
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f32_div
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f32_div
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f32_div
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f32_div
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f32_div
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f32_div
Line
Count
Source
818
25
        fn f32_div(&mut self, lhs: Ieee32, rhs: Ieee32) -> Option<Ieee32> {
819
25
            (lhs / rhs).non_nan()
820
25
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f32_div
821
822
355
        fn f32_sqrt(&mut self, n: Ieee32) -> Option<Ieee32> {
823
355
            n.sqrt().non_nan()
824
355
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f32_sqrt
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f32_sqrt
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f32_sqrt
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f32_sqrt
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f32_sqrt
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f32_sqrt
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f32_sqrt
Line
Count
Source
822
355
        fn f32_sqrt(&mut self, n: Ieee32) -> Option<Ieee32> {
823
355
            n.sqrt().non_nan()
824
355
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f32_sqrt
825
826
407
        fn f32_ceil(&mut self, n: Ieee32) -> Option<Ieee32> {
827
407
            n.ceil().non_nan()
828
407
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f32_ceil
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f32_ceil
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f32_ceil
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f32_ceil
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f32_ceil
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f32_ceil
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f32_ceil
Line
Count
Source
826
407
        fn f32_ceil(&mut self, n: Ieee32) -> Option<Ieee32> {
827
407
            n.ceil().non_nan()
828
407
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f32_ceil
829
830
575
        fn f32_floor(&mut self, n: Ieee32) -> Option<Ieee32> {
831
575
            n.floor().non_nan()
832
575
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f32_floor
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f32_floor
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f32_floor
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f32_floor
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f32_floor
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f32_floor
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f32_floor
Line
Count
Source
830
575
        fn f32_floor(&mut self, n: Ieee32) -> Option<Ieee32> {
831
575
            n.floor().non_nan()
832
575
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f32_floor
833
834
493
        fn f32_trunc(&mut self, n: Ieee32) -> Option<Ieee32> {
835
493
            n.trunc().non_nan()
836
493
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f32_trunc
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f32_trunc
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f32_trunc
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f32_trunc
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f32_trunc
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f32_trunc
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f32_trunc
Line
Count
Source
834
493
        fn f32_trunc(&mut self, n: Ieee32) -> Option<Ieee32> {
835
493
            n.trunc().non_nan()
836
493
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f32_trunc
837
838
295
        fn f32_nearest(&mut self, n: Ieee32) -> Option<Ieee32> {
839
295
            n.round_ties_even().non_nan()
840
295
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f32_nearest
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f32_nearest
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f32_nearest
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f32_nearest
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f32_nearest
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f32_nearest
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f32_nearest
Line
Count
Source
838
295
        fn f32_nearest(&mut self, n: Ieee32) -> Option<Ieee32> {
839
295
            n.round_ties_even().non_nan()
840
295
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f32_nearest
841
842
42
        fn f32_min(&mut self, a: Ieee32, b: Ieee32) -> Option<Ieee32> {
843
42
            a.minimum(b).non_nan()
844
42
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f32_min
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f32_min
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f32_min
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f32_min
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f32_min
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f32_min
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f32_min
Line
Count
Source
842
42
        fn f32_min(&mut self, a: Ieee32, b: Ieee32) -> Option<Ieee32> {
843
42
            a.minimum(b).non_nan()
844
42
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f32_min
845
846
21
        fn f32_max(&mut self, a: Ieee32, b: Ieee32) -> Option<Ieee32> {
847
21
            a.maximum(b).non_nan()
848
21
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f32_max
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f32_max
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f32_max
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f32_max
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f32_max
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f32_max
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f32_max
Line
Count
Source
846
21
        fn f32_max(&mut self, a: Ieee32, b: Ieee32) -> Option<Ieee32> {
847
21
            a.maximum(b).non_nan()
848
21
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f32_max
849
850
502
        fn f32_neg(&mut self, n: Ieee32) -> Ieee32 {
851
502
            -n
852
502
        }
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f32_neg
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f32_neg
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f32_neg
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f32_neg
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f32_neg
Line
Count
Source
850
502
        fn f32_neg(&mut self, n: Ieee32) -> Ieee32 {
851
502
            -n
852
502
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f32_neg
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f32_neg
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f32_neg
853
854
683
        fn f32_abs(&mut self, n: Ieee32) -> Ieee32 {
855
683
            n.abs()
856
683
        }
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f32_abs
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f32_abs
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f32_abs
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f32_abs
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f32_abs
Line
Count
Source
854
683
        fn f32_abs(&mut self, n: Ieee32) -> Ieee32 {
855
683
            n.abs()
856
683
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f32_abs
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f32_abs
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f32_abs
857
858
115
        fn f32_copysign(&mut self, a: Ieee32, b: Ieee32) -> Ieee32 {
859
115
            a.copysign(b)
860
115
        }
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f32_copysign
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f32_copysign
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f32_copysign
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f32_copysign
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f32_copysign
Line
Count
Source
858
115
        fn f32_copysign(&mut self, a: Ieee32, b: Ieee32) -> Ieee32 {
859
115
            a.copysign(b)
860
115
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f32_copysign
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f32_copysign
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f32_copysign
861
862
72
        fn f64_add(&mut self, lhs: Ieee64, rhs: Ieee64) -> Option<Ieee64> {
863
72
            (lhs + rhs).non_nan()
864
72
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f64_add
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f64_add
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f64_add
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f64_add
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f64_add
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f64_add
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f64_add
Line
Count
Source
862
72
        fn f64_add(&mut self, lhs: Ieee64, rhs: Ieee64) -> Option<Ieee64> {
863
72
            (lhs + rhs).non_nan()
864
72
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f64_add
865
866
21
        fn f64_sub(&mut self, lhs: Ieee64, rhs: Ieee64) -> Option<Ieee64> {
867
21
            (lhs - rhs).non_nan()
868
21
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f64_sub
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f64_sub
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f64_sub
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f64_sub
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f64_sub
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f64_sub
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f64_sub
Line
Count
Source
866
21
        fn f64_sub(&mut self, lhs: Ieee64, rhs: Ieee64) -> Option<Ieee64> {
867
21
            (lhs - rhs).non_nan()
868
21
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f64_sub
869
870
32
        fn f64_mul(&mut self, lhs: Ieee64, rhs: Ieee64) -> Option<Ieee64> {
871
32
            (lhs * rhs).non_nan()
872
32
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f64_mul
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f64_mul
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f64_mul
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f64_mul
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f64_mul
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f64_mul
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f64_mul
Line
Count
Source
870
32
        fn f64_mul(&mut self, lhs: Ieee64, rhs: Ieee64) -> Option<Ieee64> {
871
32
            (lhs * rhs).non_nan()
872
32
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f64_mul
873
874
23
        fn f64_div(&mut self, lhs: Ieee64, rhs: Ieee64) -> Option<Ieee64> {
875
23
            (lhs / rhs).non_nan()
876
23
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f64_div
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f64_div
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f64_div
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f64_div
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f64_div
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f64_div
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f64_div
Line
Count
Source
874
23
        fn f64_div(&mut self, lhs: Ieee64, rhs: Ieee64) -> Option<Ieee64> {
875
23
            (lhs / rhs).non_nan()
876
23
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f64_div
877
878
417
        fn f64_sqrt(&mut self, n: Ieee64) -> Option<Ieee64> {
879
417
            n.sqrt().non_nan()
880
417
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f64_sqrt
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f64_sqrt
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f64_sqrt
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f64_sqrt
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f64_sqrt
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f64_sqrt
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f64_sqrt
Line
Count
Source
878
417
        fn f64_sqrt(&mut self, n: Ieee64) -> Option<Ieee64> {
879
417
            n.sqrt().non_nan()
880
417
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f64_sqrt
881
882
639
        fn f64_ceil(&mut self, n: Ieee64) -> Option<Ieee64> {
883
639
            n.ceil().non_nan()
884
639
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f64_ceil
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f64_ceil
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f64_ceil
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f64_ceil
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f64_ceil
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f64_ceil
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f64_ceil
Line
Count
Source
882
639
        fn f64_ceil(&mut self, n: Ieee64) -> Option<Ieee64> {
883
639
            n.ceil().non_nan()
884
639
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f64_ceil
885
886
364
        fn f64_floor(&mut self, n: Ieee64) -> Option<Ieee64> {
887
364
            n.floor().non_nan()
888
364
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f64_floor
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f64_floor
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f64_floor
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f64_floor
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f64_floor
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f64_floor
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f64_floor
Line
Count
Source
886
364
        fn f64_floor(&mut self, n: Ieee64) -> Option<Ieee64> {
887
364
            n.floor().non_nan()
888
364
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f64_floor
889
890
379
        fn f64_trunc(&mut self, n: Ieee64) -> Option<Ieee64> {
891
379
            n.trunc().non_nan()
892
379
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f64_trunc
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f64_trunc
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f64_trunc
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f64_trunc
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f64_trunc
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f64_trunc
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f64_trunc
Line
Count
Source
890
379
        fn f64_trunc(&mut self, n: Ieee64) -> Option<Ieee64> {
891
379
            n.trunc().non_nan()
892
379
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f64_trunc
893
894
302
        fn f64_nearest(&mut self, n: Ieee64) -> Option<Ieee64> {
895
302
            n.round_ties_even().non_nan()
896
302
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f64_nearest
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f64_nearest
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f64_nearest
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f64_nearest
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f64_nearest
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f64_nearest
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f64_nearest
Line
Count
Source
894
302
        fn f64_nearest(&mut self, n: Ieee64) -> Option<Ieee64> {
895
302
            n.round_ties_even().non_nan()
896
302
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f64_nearest
897
898
16
        fn f64_min(&mut self, a: Ieee64, b: Ieee64) -> Option<Ieee64> {
899
16
            a.minimum(b).non_nan()
900
16
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f64_min
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f64_min
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f64_min
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f64_min
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f64_min
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f64_min
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f64_min
Line
Count
Source
898
16
        fn f64_min(&mut self, a: Ieee64, b: Ieee64) -> Option<Ieee64> {
899
16
            a.minimum(b).non_nan()
900
16
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f64_min
901
902
18
        fn f64_max(&mut self, a: Ieee64, b: Ieee64) -> Option<Ieee64> {
903
18
            a.maximum(b).non_nan()
904
18
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f64_max
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f64_max
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f64_max
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f64_max
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f64_max
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f64_max
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f64_max
Line
Count
Source
902
18
        fn f64_max(&mut self, a: Ieee64, b: Ieee64) -> Option<Ieee64> {
903
18
            a.maximum(b).non_nan()
904
18
        }
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f64_max
905
906
980
        fn f64_neg(&mut self, n: Ieee64) -> Ieee64 {
907
980
            -n
908
980
        }
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f64_neg
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f64_neg
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f64_neg
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f64_neg
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f64_neg
Line
Count
Source
906
980
        fn f64_neg(&mut self, n: Ieee64) -> Ieee64 {
907
980
            -n
908
980
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f64_neg
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f64_neg
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f64_neg
909
910
496
        fn f64_abs(&mut self, n: Ieee64) -> Ieee64 {
911
496
            n.abs()
912
496
        }
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f64_abs
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f64_abs
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f64_abs
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f64_abs
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f64_abs
Line
Count
Source
910
496
        fn f64_abs(&mut self, n: Ieee64) -> Ieee64 {
911
496
            n.abs()
912
496
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f64_abs
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f64_abs
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f64_abs
913
914
81
        fn f64_copysign(&mut self, a: Ieee64, b: Ieee64) -> Ieee64 {
915
81
            a.copysign(b)
916
81
        }
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f64_copysign
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f64_copysign
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f64_copysign
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f64_copysign
<cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f64_copysign
Line
Count
Source
914
81
        fn f64_copysign(&mut self, a: Ieee64, b: Ieee64) -> Ieee64 {
915
81
            a.copysign(b)
916
81
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f64_copysign
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f64_copysign
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f64_copysign
917
918
0
        fn f128_min(&mut self, a: Ieee128, b: Ieee128) -> Option<Ieee128> {
919
0
            a.minimum(b).non_nan()
920
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f128_min
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f128_min
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f128_min
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f128_min
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f128_min
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f128_min
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f128_min
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f128_min
921
922
0
        fn f128_max(&mut self, a: Ieee128, b: Ieee128) -> Option<Ieee128> {
923
0
            a.maximum(b).non_nan()
924
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f128_max
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f128_max
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f128_max
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f128_max
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f128_max
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f128_max
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f128_max
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f128_max
925
926
0
        fn f128_neg(&mut self, n: Ieee128) -> Ieee128 {
927
0
            -n
928
0
        }
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f128_neg
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f128_neg
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f128_neg
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f128_neg
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f128_neg
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f128_neg
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f128_neg
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f128_neg
929
930
0
        fn f128_abs(&mut self, n: Ieee128) -> Ieee128 {
931
0
            n.abs()
932
0
        }
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f128_abs
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f128_abs
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f128_abs
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f128_abs
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f128_abs
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f128_abs
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f128_abs
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f128_abs
933
934
0
        fn f128_copysign(&mut self, a: Ieee128, b: Ieee128) -> Ieee128 {
935
0
            a.copysign(b)
936
0
        }
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f128_copysign
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f128_copysign
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f128_copysign
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f128_copysign
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::f128_copysign
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::f128_copysign
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::f128_copysign
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::f128_copysign
937
938
        #[inline]
939
14.6M
        fn def_inst(&mut self, val: Value) -> Option<Inst> {
940
14.6M
            self.dfg().value_def(val).inst()
941
14.6M
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::def_inst
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::def_inst
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::def_inst
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::def_inst
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::def_inst
Line
Count
Source
939
14.6M
        fn def_inst(&mut self, val: Value) -> Option<Inst> {
940
14.6M
            self.dfg().value_def(val).inst()
941
14.6M
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::def_inst
Unexecuted instantiation: <cranelift_codegen::isa::riscv64::lower::isle::RV64IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::def_inst
Unexecuted instantiation: <cranelift_codegen::opts::IsleContext as cranelift_codegen::opts::generated_code::Context>::def_inst
942
    };
943
}