Coverage Report

Created: 2023-04-25 07:07

/src/wasmtime/cranelift/codegen/src/machinst/isle.rs
Line
Count
Source (jump to first uncovered line)
1
use crate::ir::{BlockCall, Value, ValueList};
2
use alloc::boxed::Box;
3
use alloc::vec::Vec;
4
use smallvec::SmallVec;
5
use std::cell::Cell;
6
7
pub use super::MachLabel;
8
use super::RetPair;
9
pub use crate::ir::{
10
    condcodes, condcodes::CondCode, dynamic_to_fixed, ArgumentExtension, ArgumentPurpose, Constant,
11
    DynamicStackSlot, ExternalName, FuncRef, GlobalValue, Immediate, SigRef, StackSlot,
12
};
13
pub use crate::isa::unwind::UnwindInst;
14
pub use crate::isa::TargetIsa;
15
pub use crate::machinst::{
16
    ABIArg, ABIArgSlot, InputSourceInst, Lower, LowerBackend, RealReg, Reg, RelocDistance, Sig,
17
    VCodeInst, Writable,
18
};
19
pub use crate::settings::{OptLevel, TlsModel};
20
21
pub type Unit = ();
22
pub type ValueSlice = (ValueList, usize);
23
pub type ValueArray2 = [Value; 2];
24
pub type ValueArray3 = [Value; 3];
25
pub type BlockArray2 = [BlockCall; 2];
26
pub type WritableReg = Writable<Reg>;
27
pub type VecRetPair = Vec<RetPair>;
28
pub type VecMask = Vec<u8>;
29
pub type ValueRegs = crate::machinst::ValueRegs<Reg>;
30
pub type WritableValueRegs = crate::machinst::ValueRegs<WritableReg>;
31
pub type InstOutput = SmallVec<[ValueRegs; 2]>;
32
pub type InstOutputBuilder = Cell<InstOutput>;
33
pub type BoxExternalName = Box<ExternalName>;
34
pub type Range = (usize, usize);
35
36
pub enum RangeView {
37
    Empty,
38
    NonEmpty { index: usize, rest: Range },
39
}
40
41
/// Helper macro to define methods in `prelude.isle` within `impl Context for
42
/// ...` for each backend. These methods are shared amongst all backends.
43
#[macro_export]
44
#[doc(hidden)]
45
macro_rules! isle_lower_prelude_methods {
46
    () => {
47
        isle_common_prelude_methods!();
48
49
        #[inline]
50
67.9M
        fn value_type(&mut self, val: Value) -> Type {
51
67.9M
            self.lower_ctx.dfg().value_type(val)
52
67.9M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::value_type
Line
Count
Source
50
609k
        fn value_type(&mut self, val: Value) -> Type {
51
609k
            self.lower_ctx.dfg().value_type(val)
52
609k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::value_type
Line
Count
Source
50
1.21M
        fn value_type(&mut self, val: Value) -> Type {
51
1.21M
            self.lower_ctx.dfg().value_type(val)
52
1.21M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::value_type
Line
Count
Source
50
658k
        fn value_type(&mut self, val: Value) -> Type {
51
658k
            self.lower_ctx.dfg().value_type(val)
52
658k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::value_type
Line
Count
Source
50
65.4M
        fn value_type(&mut self, val: Value) -> Type {
51
65.4M
            self.lower_ctx.dfg().value_type(val)
52
65.4M
        }
53
54
        #[inline]
55
46.6M
        fn value_reg(&mut self, reg: Reg) -> ValueRegs {
56
46.6M
            ValueRegs::one(reg)
57
46.6M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::value_reg
Line
Count
Source
55
44.8M
        fn value_reg(&mut self, reg: Reg) -> ValueRegs {
56
44.8M
            ValueRegs::one(reg)
57
44.8M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::value_reg
Line
Count
Source
55
358k
        fn value_reg(&mut self, reg: Reg) -> ValueRegs {
56
358k
            ValueRegs::one(reg)
57
358k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::value_reg
Line
Count
Source
55
412k
        fn value_reg(&mut self, reg: Reg) -> ValueRegs {
56
412k
            ValueRegs::one(reg)
57
412k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::value_reg
Line
Count
Source
55
1.06M
        fn value_reg(&mut self, reg: Reg) -> ValueRegs {
56
1.06M
            ValueRegs::one(reg)
57
1.06M
        }
58
59
        #[inline]
60
1.90M
        fn value_regs(&mut self, r1: Reg, r2: Reg) -> ValueRegs {
61
1.90M
            ValueRegs::two(r1, r2)
62
1.90M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::value_regs
Line
Count
Source
60
34.1k
        fn value_regs(&mut self, r1: Reg, r2: Reg) -> ValueRegs {
61
34.1k
            ValueRegs::two(r1, r2)
62
34.1k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::value_regs
Line
Count
Source
60
74.8k
        fn value_regs(&mut self, r1: Reg, r2: Reg) -> ValueRegs {
61
74.8k
            ValueRegs::two(r1, r2)
62
74.8k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::value_regs
Line
Count
Source
60
1.80M
        fn value_regs(&mut self, r1: Reg, r2: Reg) -> ValueRegs {
61
1.80M
            ValueRegs::two(r1, r2)
62
1.80M
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::value_regs
63
64
        #[inline]
65
0
        fn value_regs_invalid(&mut self) -> ValueRegs {
66
0
            ValueRegs::invalid()
67
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::value_regs_invalid
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::value_regs_invalid
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::value_regs_invalid
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::value_regs_invalid
68
69
        #[inline]
70
8.99M
        fn output_none(&mut self) -> InstOutput {
71
8.99M
            smallvec::smallvec![]
72
8.99M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::output_none
Line
Count
Source
70
38.7k
        fn output_none(&mut self) -> InstOutput {
71
38.7k
            smallvec::smallvec![]
72
38.7k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::output_none
Line
Count
Source
70
145k
        fn output_none(&mut self) -> InstOutput {
71
145k
            smallvec::smallvec![]
72
145k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::output_none
Line
Count
Source
70
926k
        fn output_none(&mut self) -> InstOutput {
71
926k
            smallvec::smallvec![]
72
926k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::output_none
Line
Count
Source
70
7.88M
        fn output_none(&mut self) -> InstOutput {
71
7.88M
            smallvec::smallvec![]
72
7.88M
        }
73
74
        #[inline]
75
46.0M
        fn output(&mut self, regs: ValueRegs) -> InstOutput {
76
46.0M
            smallvec::smallvec![regs]
77
46.0M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::output
Line
Count
Source
75
450k
        fn output(&mut self, regs: ValueRegs) -> InstOutput {
76
450k
            smallvec::smallvec![regs]
77
450k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::output
Line
Count
Source
75
44.8M
        fn output(&mut self, regs: ValueRegs) -> InstOutput {
76
44.8M
            smallvec::smallvec![regs]
77
44.8M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::output
Line
Count
Source
75
370k
        fn output(&mut self, regs: ValueRegs) -> InstOutput {
76
370k
            smallvec::smallvec![regs]
77
370k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::output
Line
Count
Source
75
360k
        fn output(&mut self, regs: ValueRegs) -> InstOutput {
76
360k
            smallvec::smallvec![regs]
77
360k
        }
78
79
        #[inline]
80
3.26k
        fn output_pair(&mut self, r1: ValueRegs, r2: ValueRegs) -> InstOutput {
81
3.26k
            smallvec::smallvec![r1, r2]
82
3.26k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::output_pair
Line
Count
Source
80
2.18k
        fn output_pair(&mut self, r1: ValueRegs, r2: ValueRegs) -> InstOutput {
81
2.18k
            smallvec::smallvec![r1, r2]
82
2.18k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::output_pair
Line
Count
Source
80
1.07k
        fn output_pair(&mut self, r1: ValueRegs, r2: ValueRegs) -> InstOutput {
81
1.07k
            smallvec::smallvec![r1, r2]
82
1.07k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::output_pair
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::output_pair
Line
Count
Source
80
12
        fn output_pair(&mut self, r1: ValueRegs, r2: ValueRegs) -> InstOutput {
81
12
            smallvec::smallvec![r1, r2]
82
12
        }
83
84
        #[inline]
85
56.2k
        fn output_builder_new(&mut self) -> InstOutputBuilder {
86
56.2k
            std::cell::Cell::new(InstOutput::new())
87
56.2k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::output_builder_new
Line
Count
Source
85
56.2k
        fn output_builder_new(&mut self) -> InstOutputBuilder {
86
56.2k
            std::cell::Cell::new(InstOutput::new())
87
56.2k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::output_builder_new
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::output_builder_new
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::output_builder_new
88
89
        #[inline]
90
572k
        fn output_builder_push(&mut self, builder: &InstOutputBuilder, regs: ValueRegs) -> Unit {
91
572k
            let mut vec = builder.take();
92
572k
            vec.push(regs);
93
572k
            builder.set(vec);
94
572k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::output_builder_push
Line
Count
Source
90
572k
        fn output_builder_push(&mut self, builder: &InstOutputBuilder, regs: ValueRegs) -> Unit {
91
572k
            let mut vec = builder.take();
92
572k
            vec.push(regs);
93
572k
            builder.set(vec);
94
572k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::output_builder_push
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::output_builder_push
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::output_builder_push
95
96
        #[inline]
97
56.2k
        fn output_builder_finish(&mut self, builder: &InstOutputBuilder) -> InstOutput {
98
56.2k
            builder.take()
99
56.2k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::output_builder_finish
Line
Count
Source
97
56.2k
        fn output_builder_finish(&mut self, builder: &InstOutputBuilder) -> InstOutput {
98
56.2k
            builder.take()
99
56.2k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::output_builder_finish
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::output_builder_finish
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::output_builder_finish
100
101
        #[inline]
102
74.0M
        fn temp_writable_reg(&mut self, ty: Type) -> WritableReg {
103
74.0M
            let value_regs = self.lower_ctx.alloc_tmp(ty);
104
74.0M
            value_regs.only_reg().unwrap()
105
74.0M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::temp_writable_reg
Line
Count
Source
102
1.59M
        fn temp_writable_reg(&mut self, ty: Type) -> WritableReg {
103
1.59M
            let value_regs = self.lower_ctx.alloc_tmp(ty);
104
1.59M
            value_regs.only_reg().unwrap()
105
1.59M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::temp_writable_reg
Line
Count
Source
102
70.7M
        fn temp_writable_reg(&mut self, ty: Type) -> WritableReg {
103
70.7M
            let value_regs = self.lower_ctx.alloc_tmp(ty);
104
70.7M
            value_regs.only_reg().unwrap()
105
70.7M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::temp_writable_reg
Line
Count
Source
102
840k
        fn temp_writable_reg(&mut self, ty: Type) -> WritableReg {
103
840k
            let value_regs = self.lower_ctx.alloc_tmp(ty);
104
840k
            value_regs.only_reg().unwrap()
105
840k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::temp_writable_reg
Line
Count
Source
102
869k
        fn temp_writable_reg(&mut self, ty: Type) -> WritableReg {
103
869k
            let value_regs = self.lower_ctx.alloc_tmp(ty);
104
869k
            value_regs.only_reg().unwrap()
105
869k
        }
106
107
        #[inline]
108
0
        fn is_valid_reg(&mut self, reg: Reg) -> bool {
109
0
            use crate::machinst::valueregs::InvalidSentinel;
110
0
            !reg.is_invalid_sentinel()
111
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::is_valid_reg
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::is_valid_reg
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::is_valid_reg
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::is_valid_reg
112
113
        #[inline]
114
12.5k
        fn invalid_reg(&mut self) -> Reg {
115
12.5k
            use crate::machinst::valueregs::InvalidSentinel;
116
12.5k
            Reg::invalid_sentinel()
117
12.5k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::invalid_reg
Line
Count
Source
114
12.5k
        fn invalid_reg(&mut self) -> Reg {
115
12.5k
            use crate::machinst::valueregs::InvalidSentinel;
116
12.5k
            Reg::invalid_sentinel()
117
12.5k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::invalid_reg
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::invalid_reg
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::invalid_reg
118
119
        #[inline]
120
2.65k
        fn mark_value_used(&mut self, val: Value) {
121
2.65k
            self.lower_ctx.increment_lowered_uses(val);
122
2.65k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::mark_value_used
Line
Count
Source
120
2.65k
        fn mark_value_used(&mut self, val: Value) {
121
2.65k
            self.lower_ctx.increment_lowered_uses(val);
122
2.65k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::mark_value_used
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::mark_value_used
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::mark_value_used
123
124
        #[inline]
125
72.1M
        fn put_in_reg(&mut self, val: Value) -> Reg {
126
72.1M
            self.put_in_regs(val).only_reg().unwrap()
127
72.1M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::put_in_reg
Line
Count
Source
125
352k
        fn put_in_reg(&mut self, val: Value) -> Reg {
126
352k
            self.put_in_regs(val).only_reg().unwrap()
127
352k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::put_in_reg
Line
Count
Source
125
70.3M
        fn put_in_reg(&mut self, val: Value) -> Reg {
126
70.3M
            self.put_in_regs(val).only_reg().unwrap()
127
70.3M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::put_in_reg
Line
Count
Source
125
236k
        fn put_in_reg(&mut self, val: Value) -> Reg {
126
236k
            self.put_in_regs(val).only_reg().unwrap()
127
236k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::put_in_reg
Line
Count
Source
125
1.17M
        fn put_in_reg(&mut self, val: Value) -> Reg {
126
1.17M
            self.put_in_regs(val).only_reg().unwrap()
127
1.17M
        }
128
129
        #[inline]
130
112M
        fn put_in_regs(&mut self, val: Value) -> ValueRegs {
131
112M
            self.lower_ctx.put_value_in_regs(val)
132
112M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::put_in_regs
Line
Count
Source
130
711k
        fn put_in_regs(&mut self, val: Value) -> ValueRegs {
131
711k
            self.lower_ctx.put_value_in_regs(val)
132
711k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::put_in_regs
Line
Count
Source
130
669k
        fn put_in_regs(&mut self, val: Value) -> ValueRegs {
131
669k
            self.lower_ctx.put_value_in_regs(val)
132
669k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::put_in_regs
Line
Count
Source
130
1.22M
        fn put_in_regs(&mut self, val: Value) -> ValueRegs {
131
1.22M
            self.lower_ctx.put_value_in_regs(val)
132
1.22M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::put_in_regs
Line
Count
Source
130
109M
        fn put_in_regs(&mut self, val: Value) -> ValueRegs {
131
109M
            self.lower_ctx.put_value_in_regs(val)
132
109M
        }
133
134
        #[inline]
135
0
        fn ensure_in_vreg(&mut self, reg: Reg, ty: Type) -> Reg {
136
0
            self.lower_ctx.ensure_in_vreg(reg, ty)
137
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::ensure_in_vreg
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::ensure_in_vreg
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::ensure_in_vreg
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::ensure_in_vreg
138
139
        #[inline]
140
6.13M
        fn value_regs_get(&mut self, regs: ValueRegs, i: usize) -> Reg {
141
6.13M
            regs.regs()[i]
142
6.13M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::value_regs_get
Line
Count
Source
140
465k
        fn value_regs_get(&mut self, regs: ValueRegs, i: usize) -> Reg {
141
465k
            regs.regs()[i]
142
465k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::value_regs_get
Line
Count
Source
140
295k
        fn value_regs_get(&mut self, regs: ValueRegs, i: usize) -> Reg {
141
295k
            regs.regs()[i]
142
295k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::value_regs_get
Line
Count
Source
140
52.6k
        fn value_regs_get(&mut self, regs: ValueRegs, i: usize) -> Reg {
141
52.6k
            regs.regs()[i]
142
52.6k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::value_regs_get
Line
Count
Source
140
5.31M
        fn value_regs_get(&mut self, regs: ValueRegs, i: usize) -> Reg {
141
5.31M
            regs.regs()[i]
142
5.31M
        }
143
144
        #[inline]
145
0
        fn value_regs_len(&mut self, regs: ValueRegs) -> usize {
146
0
            regs.regs().len()
147
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::value_regs_len
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::value_regs_len
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::value_regs_len
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::value_regs_len
148
149
        #[inline]
150
14.8M
        fn value_list_slice(&mut self, list: ValueList) -> ValueSlice {
151
14.8M
            (list, 0)
152
14.8M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::value_list_slice
Line
Count
Source
150
61.2k
        fn value_list_slice(&mut self, list: ValueList) -> ValueSlice {
151
61.2k
            (list, 0)
152
61.2k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::value_list_slice
Line
Count
Source
150
14.7M
        fn value_list_slice(&mut self, list: ValueList) -> ValueSlice {
151
14.7M
            (list, 0)
152
14.7M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::value_list_slice
Line
Count
Source
150
11.1k
        fn value_list_slice(&mut self, list: ValueList) -> ValueSlice {
151
11.1k
            (list, 0)
152
11.1k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::value_list_slice
Line
Count
Source
150
28.7k
        fn value_list_slice(&mut self, list: ValueList) -> ValueSlice {
151
28.7k
            (list, 0)
152
28.7k
        }
153
154
        #[inline]
155
0
        fn value_slice_empty(&mut self, slice: ValueSlice) -> Option<()> {
156
0
            let (list, off) = slice;
157
0
            if off >= list.len(&self.lower_ctx.dfg().value_lists) {
158
0
                Some(())
159
            } else {
160
0
                None
161
            }
162
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::value_slice_empty
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::value_slice_empty
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::value_slice_empty
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::value_slice_empty
163
164
        #[inline]
165
11.2M
        fn value_slice_unwrap(&mut self, slice: ValueSlice) -> Option<(Value, ValueSlice)> {
166
11.2M
            let (list, off) = slice;
167
11.2M
            if let Some(val) = list.get(off, &self.lower_ctx.dfg().value_lists) {
168
11.2M
                Some((val, (list, off + 1)))
169
            } else {
170
0
                None
171
            }
172
11.2M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::value_slice_unwrap
Line
Count
Source
165
11.2M
        fn value_slice_unwrap(&mut self, slice: ValueSlice) -> Option<(Value, ValueSlice)> {
166
11.2M
            let (list, off) = slice;
167
11.2M
            if let Some(val) = list.get(off, &self.lower_ctx.dfg().value_lists) {
168
11.2M
                Some((val, (list, off + 1)))
169
            } else {
170
0
                None
171
            }
172
11.2M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::value_slice_unwrap
Line
Count
Source
165
22
        fn value_slice_unwrap(&mut self, slice: ValueSlice) -> Option<(Value, ValueSlice)> {
166
22
            let (list, off) = slice;
167
22
            if let Some(val) = list.get(off, &self.lower_ctx.dfg().value_lists) {
168
22
                Some((val, (list, off + 1)))
169
            } else {
170
0
                None
171
            }
172
22
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::value_slice_unwrap
Line
Count
Source
165
1.68k
        fn value_slice_unwrap(&mut self, slice: ValueSlice) -> Option<(Value, ValueSlice)> {
166
1.68k
            let (list, off) = slice;
167
1.68k
            if let Some(val) = list.get(off, &self.lower_ctx.dfg().value_lists) {
168
1.68k
                Some((val, (list, off + 1)))
169
            } else {
170
0
                None
171
            }
172
1.68k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::value_slice_unwrap
Line
Count
Source
165
314
        fn value_slice_unwrap(&mut self, slice: ValueSlice) -> Option<(Value, ValueSlice)> {
166
314
            let (list, off) = slice;
167
314
            if let Some(val) = list.get(off, &self.lower_ctx.dfg().value_lists) {
168
314
                Some((val, (list, off + 1)))
169
            } else {
170
0
                None
171
            }
172
314
        }
173
174
        #[inline]
175
1.51M
        fn value_slice_len(&mut self, slice: ValueSlice) -> usize {
176
1.51M
            let (list, off) = slice;
177
1.51M
            list.len(&self.lower_ctx.dfg().value_lists) - off
178
1.51M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::value_slice_len
Line
Count
Source
175
3.68k
        fn value_slice_len(&mut self, slice: ValueSlice) -> usize {
176
3.68k
            let (list, off) = slice;
177
3.68k
            list.len(&self.lower_ctx.dfg().value_lists) - off
178
3.68k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::value_slice_len
Line
Count
Source
175
1.50M
        fn value_slice_len(&mut self, slice: ValueSlice) -> usize {
176
1.50M
            let (list, off) = slice;
177
1.50M
            list.len(&self.lower_ctx.dfg().value_lists) - off
178
1.50M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::value_slice_len
Line
Count
Source
175
4.98k
        fn value_slice_len(&mut self, slice: ValueSlice) -> usize {
176
4.98k
            let (list, off) = slice;
177
4.98k
            list.len(&self.lower_ctx.dfg().value_lists) - off
178
4.98k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::value_slice_len
Line
Count
Source
175
2.82k
        fn value_slice_len(&mut self, slice: ValueSlice) -> usize {
176
2.82k
            let (list, off) = slice;
177
2.82k
            list.len(&self.lower_ctx.dfg().value_lists) - off
178
2.82k
        }
179
180
        #[inline]
181
577k
        fn value_slice_get(&mut self, slice: ValueSlice, idx: usize) -> Value {
182
577k
            let (list, off) = slice;
183
577k
            list.get(off + idx, &self.lower_ctx.dfg().value_lists)
184
577k
                .unwrap()
185
577k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::value_slice_get
Line
Count
Source
181
577k
        fn value_slice_get(&mut self, slice: ValueSlice, idx: usize) -> Value {
182
577k
            let (list, off) = slice;
183
577k
            list.get(off + idx, &self.lower_ctx.dfg().value_lists)
184
577k
                .unwrap()
185
577k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::value_slice_get
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::value_slice_get
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::value_slice_get
186
187
        #[inline]
188
27.8M
        fn writable_reg_to_reg(&mut self, r: WritableReg) -> Reg {
189
27.8M
            r.to_reg()
190
27.8M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::writable_reg_to_reg
Line
Count
Source
188
25.2M
        fn writable_reg_to_reg(&mut self, r: WritableReg) -> Reg {
189
25.2M
            r.to_reg()
190
25.2M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::writable_reg_to_reg
Line
Count
Source
188
367k
        fn writable_reg_to_reg(&mut self, r: WritableReg) -> Reg {
189
367k
            r.to_reg()
190
367k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::writable_reg_to_reg
Line
Count
Source
188
1.59M
        fn writable_reg_to_reg(&mut self, r: WritableReg) -> Reg {
189
1.59M
            r.to_reg()
190
1.59M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::writable_reg_to_reg
Line
Count
Source
188
645k
        fn writable_reg_to_reg(&mut self, r: WritableReg) -> Reg {
189
645k
            r.to_reg()
190
645k
        }
191
192
        #[inline]
193
0
        fn inst_results(&mut self, inst: Inst) -> ValueSlice {
194
0
            (self.lower_ctx.dfg().inst_results_list(inst), 0)
195
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::inst_results
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::inst_results
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::inst_results
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::inst_results
196
197
        #[inline]
198
42.7M
        fn first_result(&mut self, inst: Inst) -> Option<Value> {
199
42.7M
            self.lower_ctx.dfg().inst_results(inst).first().copied()
200
42.7M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::first_result
Line
Count
Source
198
230k
        fn first_result(&mut self, inst: Inst) -> Option<Value> {
199
230k
            self.lower_ctx.dfg().inst_results(inst).first().copied()
200
230k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::first_result
Line
Count
Source
198
41.8M
        fn first_result(&mut self, inst: Inst) -> Option<Value> {
199
41.8M
            self.lower_ctx.dfg().inst_results(inst).first().copied()
200
41.8M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::first_result
Line
Count
Source
198
331k
        fn first_result(&mut self, inst: Inst) -> Option<Value> {
199
331k
            self.lower_ctx.dfg().inst_results(inst).first().copied()
200
331k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::first_result
Line
Count
Source
198
424k
        fn first_result(&mut self, inst: Inst) -> Option<Value> {
199
424k
            self.lower_ctx.dfg().inst_results(inst).first().copied()
200
424k
        }
201
202
        #[inline]
203
138M
        fn inst_data(&mut self, inst: Inst) -> InstructionData {
204
138M
            self.lower_ctx.dfg().insts[inst]
205
138M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::inst_data
Line
Count
Source
203
1.16M
        fn inst_data(&mut self, inst: Inst) -> InstructionData {
204
1.16M
            self.lower_ctx.dfg().insts[inst]
205
1.16M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::inst_data
Line
Count
Source
203
791k
        fn inst_data(&mut self, inst: Inst) -> InstructionData {
204
791k
            self.lower_ctx.dfg().insts[inst]
205
791k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::inst_data
Line
Count
Source
203
694k
        fn inst_data(&mut self, inst: Inst) -> InstructionData {
204
694k
            self.lower_ctx.dfg().insts[inst]
205
694k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::inst_data
Line
Count
Source
203
135M
        fn inst_data(&mut self, inst: Inst) -> InstructionData {
204
135M
            self.lower_ctx.dfg().insts[inst]
205
135M
        }
206
207
        #[inline]
208
79.6M
        fn def_inst(&mut self, val: Value) -> Option<Inst> {
209
79.6M
            self.lower_ctx.dfg().value_def(val).inst()
210
79.6M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::def_inst
Line
Count
Source
208
363k
        fn def_inst(&mut self, val: Value) -> Option<Inst> {
209
363k
            self.lower_ctx.dfg().value_def(val).inst()
210
363k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::def_inst
Line
Count
Source
208
189k
        fn def_inst(&mut self, val: Value) -> Option<Inst> {
209
189k
            self.lower_ctx.dfg().value_def(val).inst()
210
189k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::def_inst
Line
Count
Source
208
78.6M
        fn def_inst(&mut self, val: Value) -> Option<Inst> {
209
78.6M
            self.lower_ctx.dfg().value_def(val).inst()
210
78.6M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::def_inst
Line
Count
Source
208
391k
        fn def_inst(&mut self, val: Value) -> Option<Inst> {
209
391k
            self.lower_ctx.dfg().value_def(val).inst()
210
391k
        }
211
212
3.16k
        fn zero_value(&mut self, value: Value) -> Option<Value> {
213
3.16k
            let insn = self.def_inst(value);
214
3.16k
            if insn.is_some() {
215
2.89k
                let insn = insn.unwrap();
216
2.89k
                let inst_data = self.lower_ctx.data(insn);
217
2.89k
                match inst_data {
218
                    InstructionData::Unary {
219
                        opcode: Opcode::Splat,
220
6
                        arg,
221
6
                    } => {
222
6
                        let arg = arg.clone();
223
6
                        return self.zero_value(arg);
224
                    }
225
                    InstructionData::UnaryConst {
226
                        opcode: Opcode::Vconst,
227
374
                        constant_handle,
228
374
                    } => {
229
374
                        let constant_data =
230
374
                            self.lower_ctx.get_constant_data(*constant_handle).clone();
231
374
                        if constant_data.into_vec().iter().any(|&x| x != 0) {
232
374
                            return None;
233
                        } else {
234
0
                            return Some(value);
235
                        }
236
                    }
237
2
                    InstructionData::UnaryImm { imm, .. } => {
238
2
                        if imm.bits() == 0 {
239
0
                            return Some(value);
240
                        } else {
241
2
                            return None;
242
                        }
243
                    }
244
0
                    InstructionData::UnaryIeee32 { imm, .. } => {
245
0
                        if imm.bits() == 0 {
246
0
                            return Some(value);
247
                        } else {
248
0
                            return None;
249
                        }
250
                    }
251
0
                    InstructionData::UnaryIeee64 { imm, .. } => {
252
0
                        if imm.bits() == 0 {
253
0
                            return Some(value);
254
                        } else {
255
0
                            return None;
256
                        }
257
                    }
258
2.51k
                    _ => None,
259
                }
260
            } else {
261
272
                None
262
            }
263
3.16k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::zero_value
Line
Count
Source
212
3.16k
        fn zero_value(&mut self, value: Value) -> Option<Value> {
213
3.16k
            let insn = self.def_inst(value);
214
3.16k
            if insn.is_some() {
215
2.89k
                let insn = insn.unwrap();
216
2.89k
                let inst_data = self.lower_ctx.data(insn);
217
2.89k
                match inst_data {
218
                    InstructionData::Unary {
219
                        opcode: Opcode::Splat,
220
6
                        arg,
221
6
                    } => {
222
6
                        let arg = arg.clone();
223
6
                        return self.zero_value(arg);
224
                    }
225
                    InstructionData::UnaryConst {
226
                        opcode: Opcode::Vconst,
227
374
                        constant_handle,
228
374
                    } => {
229
374
                        let constant_data =
230
374
                            self.lower_ctx.get_constant_data(*constant_handle).clone();
231
374
                        if constant_data.into_vec().iter().any(|&x| x != 0) {
232
374
                            return None;
233
                        } else {
234
0
                            return Some(value);
235
                        }
236
                    }
237
2
                    InstructionData::UnaryImm { imm, .. } => {
238
2
                        if imm.bits() == 0 {
239
0
                            return Some(value);
240
                        } else {
241
2
                            return None;
242
                        }
243
                    }
244
0
                    InstructionData::UnaryIeee32 { imm, .. } => {
245
0
                        if imm.bits() == 0 {
246
0
                            return Some(value);
247
                        } else {
248
0
                            return None;
249
                        }
250
                    }
251
0
                    InstructionData::UnaryIeee64 { imm, .. } => {
252
0
                        if imm.bits() == 0 {
253
0
                            return Some(value);
254
                        } else {
255
0
                            return None;
256
                        }
257
                    }
258
2.51k
                    _ => None,
259
                }
260
            } else {
261
272
                None
262
            }
263
3.16k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::zero_value
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::zero_value
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::zero_value
264
265
        #[inline]
266
0
        fn tls_model(&mut self, _: Type) -> TlsModel {
267
0
            self.backend.flags().tls_model()
268
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::tls_model
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::tls_model
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::tls_model
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::tls_model
269
270
        #[inline]
271
0
        fn tls_model_is_elf_gd(&mut self) -> Option<()> {
272
0
            if self.backend.flags().tls_model() == TlsModel::ElfGd {
273
0
                Some(())
274
            } else {
275
0
                None
276
            }
277
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::tls_model_is_elf_gd
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::tls_model_is_elf_gd
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::tls_model_is_elf_gd
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::tls_model_is_elf_gd
278
279
        #[inline]
280
0
        fn tls_model_is_macho(&mut self) -> Option<()> {
281
0
            if self.backend.flags().tls_model() == TlsModel::Macho {
282
0
                Some(())
283
            } else {
284
0
                None
285
            }
286
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::tls_model_is_macho
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::tls_model_is_macho
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::tls_model_is_macho
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::tls_model_is_macho
287
288
        #[inline]
289
0
        fn tls_model_is_coff(&mut self) -> Option<()> {
290
0
            if self.backend.flags().tls_model() == TlsModel::Coff {
291
0
                Some(())
292
            } else {
293
0
                None
294
            }
295
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::tls_model_is_coff
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::tls_model_is_coff
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::tls_model_is_coff
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::tls_model_is_coff
296
297
        #[inline]
298
0
        fn preserve_frame_pointers(&mut self) -> Option<()> {
299
0
            if self.backend.flags().preserve_frame_pointers() {
300
0
                Some(())
301
            } else {
302
0
                None
303
            }
304
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::preserve_frame_pointers
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::preserve_frame_pointers
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::preserve_frame_pointers
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::preserve_frame_pointers
305
306
        #[inline]
307
2.00M
        fn func_ref_data(&mut self, func_ref: FuncRef) -> (SigRef, ExternalName, RelocDistance) {
308
2.00M
            let funcdata = &self.lower_ctx.dfg().ext_funcs[func_ref];
309
2.00M
            (
310
2.00M
                funcdata.signature,
311
2.00M
                funcdata.name.clone(),
312
2.00M
                funcdata.reloc_distance(),
313
2.00M
            )
314
2.00M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::func_ref_data
Line
Count
Source
307
25.0k
        fn func_ref_data(&mut self, func_ref: FuncRef) -> (SigRef, ExternalName, RelocDistance) {
308
25.0k
            let funcdata = &self.lower_ctx.dfg().ext_funcs[func_ref];
309
25.0k
            (
310
25.0k
                funcdata.signature,
311
25.0k
                funcdata.name.clone(),
312
25.0k
                funcdata.reloc_distance(),
313
25.0k
            )
314
25.0k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::func_ref_data
Line
Count
Source
307
1.91M
        fn func_ref_data(&mut self, func_ref: FuncRef) -> (SigRef, ExternalName, RelocDistance) {
308
1.91M
            let funcdata = &self.lower_ctx.dfg().ext_funcs[func_ref];
309
1.91M
            (
310
1.91M
                funcdata.signature,
311
1.91M
                funcdata.name.clone(),
312
1.91M
                funcdata.reloc_distance(),
313
1.91M
            )
314
1.91M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::func_ref_data
Line
Count
Source
307
8.30k
        fn func_ref_data(&mut self, func_ref: FuncRef) -> (SigRef, ExternalName, RelocDistance) {
308
8.30k
            let funcdata = &self.lower_ctx.dfg().ext_funcs[func_ref];
309
8.30k
            (
310
8.30k
                funcdata.signature,
311
8.30k
                funcdata.name.clone(),
312
8.30k
                funcdata.reloc_distance(),
313
8.30k
            )
314
8.30k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::func_ref_data
Line
Count
Source
307
55.6k
        fn func_ref_data(&mut self, func_ref: FuncRef) -> (SigRef, ExternalName, RelocDistance) {
308
55.6k
            let funcdata = &self.lower_ctx.dfg().ext_funcs[func_ref];
309
55.6k
            (
310
55.6k
                funcdata.signature,
311
55.6k
                funcdata.name.clone(),
312
55.6k
                funcdata.reloc_distance(),
313
55.6k
            )
314
55.6k
        }
315
316
        #[inline]
317
542
        fn box_external_name(&mut self, extname: ExternalName) -> BoxExternalName {
318
542
            Box::new(extname)
319
542
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::box_external_name
Line
Count
Source
317
286
        fn box_external_name(&mut self, extname: ExternalName) -> BoxExternalName {
318
286
            Box::new(extname)
319
286
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::box_external_name
Line
Count
Source
317
256
        fn box_external_name(&mut self, extname: ExternalName) -> BoxExternalName {
318
256
            Box::new(extname)
319
256
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::box_external_name
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::box_external_name
320
321
        #[inline]
322
0
        fn symbol_value_data(
323
0
            &mut self,
324
0
            global_value: GlobalValue,
325
0
        ) -> Option<(ExternalName, RelocDistance, i64)> {
326
0
            let (name, reloc, offset) = self.lower_ctx.symbol_value_data(global_value)?;
327
0
            Some((name.clone(), reloc, offset))
328
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::symbol_value_data
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::symbol_value_data
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::symbol_value_data
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::symbol_value_data
329
330
        #[inline]
331
55.6k
        fn reloc_distance_near(&mut self, dist: RelocDistance) -> Option<()> {
332
55.6k
            if dist == RelocDistance::Near {
333
38.2k
                Some(())
334
            } else {
335
17.4k
                None
336
            }
337
55.6k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::reloc_distance_near
Line
Count
Source
331
55.6k
        fn reloc_distance_near(&mut self, dist: RelocDistance) -> Option<()> {
332
55.6k
            if dist == RelocDistance::Near {
333
38.2k
                Some(())
334
            } else {
335
17.4k
                None
336
            }
337
55.6k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::reloc_distance_near
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::reloc_distance_near
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::reloc_distance_near
338
339
        #[inline]
340
375
        fn u128_from_immediate(&mut self, imm: Immediate) -> Option<u128> {
341
375
            let bytes = self.lower_ctx.get_immediate_data(imm).as_slice();
342
375
            Some(u128::from_le_bytes(bytes.try_into().ok()?))
343
375
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::u128_from_immediate
Line
Count
Source
340
118
        fn u128_from_immediate(&mut self, imm: Immediate) -> Option<u128> {
341
118
            let bytes = self.lower_ctx.get_immediate_data(imm).as_slice();
342
118
            Some(u128::from_le_bytes(bytes.try_into().ok()?))
343
118
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::u128_from_immediate
Line
Count
Source
340
92
        fn u128_from_immediate(&mut self, imm: Immediate) -> Option<u128> {
341
92
            let bytes = self.lower_ctx.get_immediate_data(imm).as_slice();
342
92
            Some(u128::from_le_bytes(bytes.try_into().ok()?))
343
92
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::u128_from_immediate
Line
Count
Source
340
165
        fn u128_from_immediate(&mut self, imm: Immediate) -> Option<u128> {
341
165
            let bytes = self.lower_ctx.get_immediate_data(imm).as_slice();
342
165
            Some(u128::from_le_bytes(bytes.try_into().ok()?))
343
165
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::u128_from_immediate
344
345
        #[inline]
346
145
        fn vec_mask_from_immediate(&mut self, imm: Immediate) -> Option<VecMask> {
347
145
            let data = self.lower_ctx.get_immediate_data(imm);
348
145
            if data.len() == 16 {
349
145
                Some(Vec::from(data.as_slice()))
350
            } else {
351
0
                None
352
            }
353
145
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::vec_mask_from_immediate
Line
Count
Source
346
145
        fn vec_mask_from_immediate(&mut self, imm: Immediate) -> Option<VecMask> {
347
145
            let data = self.lower_ctx.get_immediate_data(imm);
348
145
            if data.len() == 16 {
349
145
                Some(Vec::from(data.as_slice()))
350
            } else {
351
0
                None
352
            }
353
145
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::vec_mask_from_immediate
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::vec_mask_from_immediate
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::vec_mask_from_immediate
354
355
        #[inline]
356
5.57k
        fn u64_from_constant(&mut self, constant: Constant) -> Option<u64> {
357
5.57k
            let bytes = self.lower_ctx.get_constant_data(constant).as_slice();
358
5.57k
            Some(u64::from_le_bytes(bytes.try_into().ok()?))
359
5.57k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::u64_from_constant
Line
Count
Source
356
5.57k
        fn u64_from_constant(&mut self, constant: Constant) -> Option<u64> {
357
5.57k
            let bytes = self.lower_ctx.get_constant_data(constant).as_slice();
358
5.57k
            Some(u64::from_le_bytes(bytes.try_into().ok()?))
359
5.57k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::u64_from_constant
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::u64_from_constant
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::u64_from_constant
360
361
        #[inline]
362
22.9k
        fn u128_from_constant(&mut self, constant: Constant) -> Option<u128> {
363
22.9k
            let bytes = self.lower_ctx.get_constant_data(constant).as_slice();
364
22.9k
            Some(u128::from_le_bytes(bytes.try_into().ok()?))
365
22.9k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::u128_from_constant
Line
Count
Source
362
5.57k
        fn u128_from_constant(&mut self, constant: Constant) -> Option<u128> {
363
5.57k
            let bytes = self.lower_ctx.get_constant_data(constant).as_slice();
364
5.57k
            Some(u128::from_le_bytes(bytes.try_into().ok()?))
365
5.57k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::u128_from_constant
Line
Count
Source
362
6.50k
        fn u128_from_constant(&mut self, constant: Constant) -> Option<u128> {
363
6.50k
            let bytes = self.lower_ctx.get_constant_data(constant).as_slice();
364
6.50k
            Some(u128::from_le_bytes(bytes.try_into().ok()?))
365
6.50k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::u128_from_constant
Line
Count
Source
362
10.8k
        fn u128_from_constant(&mut self, constant: Constant) -> Option<u128> {
363
10.8k
            let bytes = self.lower_ctx.get_constant_data(constant).as_slice();
364
10.8k
            Some(u128::from_le_bytes(bytes.try_into().ok()?))
365
10.8k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::u128_from_constant
366
367
        #[inline]
368
284k
        fn emit_u64_le_const(&mut self, value: u64) -> VCodeConstant {
369
284k
            let data = VCodeConstantData::U64(value.to_le_bytes());
370
284k
            self.lower_ctx.use_constant(data)
371
284k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::emit_u64_le_const
Line
Count
Source
368
350
        fn emit_u64_le_const(&mut self, value: u64) -> VCodeConstant {
369
350
            let data = VCodeConstantData::U64(value.to_le_bytes());
370
350
            self.lower_ctx.use_constant(data)
371
350
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::emit_u64_le_const
Line
Count
Source
368
284k
        fn emit_u64_le_const(&mut self, value: u64) -> VCodeConstant {
369
284k
            let data = VCodeConstantData::U64(value.to_le_bytes());
370
284k
            self.lower_ctx.use_constant(data)
371
284k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::emit_u64_le_const
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::emit_u64_le_const
372
373
        #[inline]
374
558k
        fn emit_u128_le_const(&mut self, value: u128) -> VCodeConstant {
375
558k
            let data = VCodeConstantData::Generated(value.to_le_bytes().as_slice().into());
376
558k
            self.lower_ctx.use_constant(data)
377
558k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::emit_u128_le_const
Line
Count
Source
374
5.25k
        fn emit_u128_le_const(&mut self, value: u128) -> VCodeConstant {
375
5.25k
            let data = VCodeConstantData::Generated(value.to_le_bytes().as_slice().into());
376
5.25k
            self.lower_ctx.use_constant(data)
377
5.25k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::emit_u128_le_const
Line
Count
Source
374
553k
        fn emit_u128_le_const(&mut self, value: u128) -> VCodeConstant {
375
553k
            let data = VCodeConstantData::Generated(value.to_le_bytes().as_slice().into());
376
553k
            self.lower_ctx.use_constant(data)
377
553k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::emit_u128_le_const
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::emit_u128_le_const
378
379
        #[inline]
380
265k
        fn const_to_vconst(&mut self, constant: Constant) -> VCodeConstant {
381
265k
            self.lower_ctx.use_constant(VCodeConstantData::Pool(
382
265k
                constant,
383
265k
                self.lower_ctx.get_constant_data(constant).clone(),
384
265k
            ))
385
265k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::const_to_vconst
Line
Count
Source
380
265k
        fn const_to_vconst(&mut self, constant: Constant) -> VCodeConstant {
381
265k
            self.lower_ctx.use_constant(VCodeConstantData::Pool(
382
265k
                constant,
383
265k
                self.lower_ctx.get_constant_data(constant).clone(),
384
265k
            ))
385
265k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::const_to_vconst
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::const_to_vconst
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::const_to_vconst
386
387
0
        fn only_writable_reg(&mut self, regs: WritableValueRegs) -> Option<WritableReg> {
388
0
            regs.only_reg()
389
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::only_writable_reg
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::only_writable_reg
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::only_writable_reg
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::only_writable_reg
390
391
0
        fn writable_regs_get(&mut self, regs: WritableValueRegs, idx: usize) -> WritableReg {
392
0
            regs.regs()[idx]
393
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::writable_regs_get
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::writable_regs_get
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::writable_regs_get
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::writable_regs_get
394
395
56.2k
        fn abi_num_args(&mut self, abi: Sig) -> usize {
396
56.2k
            self.lower_ctx.sigs().num_args(abi)
397
56.2k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::abi_num_args
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::abi_num_args
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::abi_num_args
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::abi_num_args
Line
Count
Source
395
56.2k
        fn abi_num_args(&mut self, abi: Sig) -> usize {
396
56.2k
            self.lower_ctx.sigs().num_args(abi)
397
56.2k
        }
398
399
577k
        fn abi_get_arg(&mut self, abi: Sig, idx: usize) -> ABIArg {
400
577k
            self.lower_ctx.sigs().get_arg(abi, idx)
401
577k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::abi_get_arg
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::abi_get_arg
Line
Count
Source
399
577k
        fn abi_get_arg(&mut self, abi: Sig, idx: usize) -> ABIArg {
400
577k
            self.lower_ctx.sigs().get_arg(abi, idx)
401
577k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::abi_get_arg
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::abi_get_arg
402
403
56.2k
        fn abi_num_rets(&mut self, abi: Sig) -> usize {
404
56.2k
            self.lower_ctx.sigs().num_rets(abi)
405
56.2k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::abi_num_rets
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::abi_num_rets
Line
Count
Source
403
56.2k
        fn abi_num_rets(&mut self, abi: Sig) -> usize {
404
56.2k
            self.lower_ctx.sigs().num_rets(abi)
405
56.2k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::abi_num_rets
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::abi_num_rets
406
407
572k
        fn abi_get_ret(&mut self, abi: Sig, idx: usize) -> ABIArg {
408
572k
            self.lower_ctx.sigs().get_ret(abi, idx)
409
572k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::abi_get_ret
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::abi_get_ret
Line
Count
Source
407
572k
        fn abi_get_ret(&mut self, abi: Sig, idx: usize) -> ABIArg {
408
572k
            self.lower_ctx.sigs().get_ret(abi, idx)
409
572k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::abi_get_ret
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::abi_get_ret
410
411
56.2k
        fn abi_ret_arg(&mut self, abi: Sig) -> Option<ABIArg> {
412
56.2k
            self.lower_ctx.sigs().get_ret_arg(abi)
413
56.2k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::abi_ret_arg
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::abi_ret_arg
Line
Count
Source
411
56.2k
        fn abi_ret_arg(&mut self, abi: Sig) -> Option<ABIArg> {
412
56.2k
            self.lower_ctx.sigs().get_ret_arg(abi)
413
56.2k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::abi_ret_arg
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::abi_ret_arg
414
415
40.8k
        fn abi_no_ret_arg(&mut self, abi: Sig) -> Option<()> {
416
40.8k
            if let Some(_) = self.lower_ctx.sigs().get_ret_arg(abi) {
417
0
                None
418
            } else {
419
40.8k
                Some(())
420
            }
421
40.8k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::abi_no_ret_arg
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::abi_no_ret_arg
Line
Count
Source
415
40.8k
        fn abi_no_ret_arg(&mut self, abi: Sig) -> Option<()> {
416
40.8k
            if let Some(_) = self.lower_ctx.sigs().get_ret_arg(abi) {
417
0
                None
418
            } else {
419
40.8k
                Some(())
420
            }
421
40.8k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::abi_no_ret_arg
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::abi_no_ret_arg
422
423
587k
        fn abi_sized_stack_arg_space(&mut self, abi: Sig) -> i64 {
424
587k
            self.lower_ctx.sigs()[abi].sized_stack_arg_space()
425
587k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::abi_sized_stack_arg_space
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::abi_sized_stack_arg_space
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::abi_sized_stack_arg_space
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::abi_sized_stack_arg_space
Line
Count
Source
423
587k
        fn abi_sized_stack_arg_space(&mut self, abi: Sig) -> i64 {
424
587k
            self.lower_ctx.sigs()[abi].sized_stack_arg_space()
425
587k
        }
426
427
0
        fn abi_sized_stack_ret_space(&mut self, abi: Sig) -> i64 {
428
0
            self.lower_ctx.sigs()[abi].sized_stack_ret_space()
429
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::abi_sized_stack_ret_space
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::abi_sized_stack_ret_space
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::abi_sized_stack_ret_space
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::abi_sized_stack_ret_space
430
431
1.16M
        fn abi_arg_only_slot(&mut self, arg: &ABIArg) -> Option<ABIArgSlot> {
432
1.16M
            match arg {
433
1.13M
                &ABIArg::Slots { ref slots, .. } => {
434
1.13M
                    if slots.len() == 1 {
435
1.13M
                        Some(slots[0])
436
                    } else {
437
0
                        None
438
                    }
439
                }
440
24.8k
                _ => None,
441
            }
442
1.16M
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::abi_arg_only_slot
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::abi_arg_only_slot
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::abi_arg_only_slot
Line
Count
Source
431
1.16M
        fn abi_arg_only_slot(&mut self, arg: &ABIArg) -> Option<ABIArgSlot> {
432
1.16M
            match arg {
433
1.13M
                &ABIArg::Slots { ref slots, .. } => {
434
1.13M
                    if slots.len() == 1 {
435
1.13M
                        Some(slots[0])
436
                    } else {
437
0
                        None
438
                    }
439
                }
440
24.8k
                _ => None,
441
            }
442
1.16M
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::abi_arg_only_slot
443
444
24.8k
        fn abi_arg_struct_pointer(&mut self, arg: &ABIArg) -> Option<(ABIArgSlot, i64, u64)> {
445
24.8k
            match arg {
446
                &ABIArg::StructArg {
447
0
                    pointer,
448
0
                    offset,
449
0
                    size,
450
                    ..
451
                } => {
452
0
                    if let Some(pointer) = pointer {
453
0
                        Some((pointer, offset, size))
454
                    } else {
455
0
                        None
456
                    }
457
                }
458
24.8k
                _ => None,
459
            }
460
24.8k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::abi_arg_struct_pointer
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::abi_arg_struct_pointer
Line
Count
Source
444
24.8k
        fn abi_arg_struct_pointer(&mut self, arg: &ABIArg) -> Option<(ABIArgSlot, i64, u64)> {
445
24.8k
            match arg {
446
                &ABIArg::StructArg {
447
0
                    pointer,
448
0
                    offset,
449
0
                    size,
450
                    ..
451
                } => {
452
0
                    if let Some(pointer) = pointer {
453
0
                        Some((pointer, offset, size))
454
                    } else {
455
0
                        None
456
                    }
457
                }
458
24.8k
                _ => None,
459
            }
460
24.8k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::abi_arg_struct_pointer
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::abi_arg_struct_pointer
461
462
24.8k
        fn abi_arg_implicit_pointer(&mut self, arg: &ABIArg) -> Option<(ABIArgSlot, i64, Type)> {
463
24.8k
            match arg {
464
                &ABIArg::ImplicitPtrArg {
465
24.8k
                    pointer,
466
24.8k
                    offset,
467
24.8k
                    ty,
468
24.8k
                    ..
469
24.8k
                } => Some((pointer, offset, ty)),
470
0
                _ => None,
471
            }
472
24.8k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::abi_arg_implicit_pointer
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::abi_arg_implicit_pointer
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::abi_arg_implicit_pointer
Line
Count
Source
462
24.8k
        fn abi_arg_implicit_pointer(&mut self, arg: &ABIArg) -> Option<(ABIArgSlot, i64, Type)> {
463
24.8k
            match arg {
464
                &ABIArg::ImplicitPtrArg {
465
24.8k
                    pointer,
466
24.8k
                    offset,
467
24.8k
                    ty,
468
24.8k
                    ..
469
24.8k
                } => Some((pointer, offset, ty)),
470
0
                _ => None,
471
            }
472
24.8k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::abi_arg_implicit_pointer
473
474
572k
        fn abi_stackslot_addr(
475
572k
            &mut self,
476
572k
            dst: WritableReg,
477
572k
            stack_slot: StackSlot,
478
572k
            offset: Offset32,
479
572k
        ) -> MInst {
480
572k
            let offset = u32::try_from(i32::from(offset)).unwrap();
481
572k
            self.lower_ctx
482
572k
                .abi()
483
572k
                .sized_stackslot_addr(stack_slot, offset, dst)
484
572k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::abi_stackslot_addr
Line
Count
Source
474
123k
        fn abi_stackslot_addr(
475
123k
            &mut self,
476
123k
            dst: WritableReg,
477
123k
            stack_slot: StackSlot,
478
123k
            offset: Offset32,
479
123k
        ) -> MInst {
480
123k
            let offset = u32::try_from(i32::from(offset)).unwrap();
481
123k
            self.lower_ctx
482
123k
                .abi()
483
123k
                .sized_stackslot_addr(stack_slot, offset, dst)
484
123k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::abi_stackslot_addr
Line
Count
Source
474
91.3k
        fn abi_stackslot_addr(
475
91.3k
            &mut self,
476
91.3k
            dst: WritableReg,
477
91.3k
            stack_slot: StackSlot,
478
91.3k
            offset: Offset32,
479
91.3k
        ) -> MInst {
480
91.3k
            let offset = u32::try_from(i32::from(offset)).unwrap();
481
91.3k
            self.lower_ctx
482
91.3k
                .abi()
483
91.3k
                .sized_stackslot_addr(stack_slot, offset, dst)
484
91.3k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::abi_stackslot_addr
Line
Count
Source
474
357k
        fn abi_stackslot_addr(
475
357k
            &mut self,
476
357k
            dst: WritableReg,
477
357k
            stack_slot: StackSlot,
478
357k
            offset: Offset32,
479
357k
        ) -> MInst {
480
357k
            let offset = u32::try_from(i32::from(offset)).unwrap();
481
357k
            self.lower_ctx
482
357k
                .abi()
483
357k
                .sized_stackslot_addr(stack_slot, offset, dst)
484
357k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::abi_stackslot_addr
485
486
0
        fn abi_dynamic_stackslot_addr(
487
0
            &mut self,
488
0
            dst: WritableReg,
489
0
            stack_slot: DynamicStackSlot,
490
0
        ) -> MInst {
491
0
            assert!(self
492
0
                .lower_ctx
493
0
                .abi()
494
0
                .dynamic_stackslot_offsets()
495
0
                .is_valid(stack_slot));
496
0
            self.lower_ctx.abi().dynamic_stackslot_addr(stack_slot, dst)
497
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::abi_dynamic_stackslot_addr
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::abi_dynamic_stackslot_addr
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::abi_dynamic_stackslot_addr
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::abi_dynamic_stackslot_addr
498
499
0
        fn real_reg_to_reg(&mut self, reg: RealReg) -> Reg {
500
0
            Reg::from(reg)
501
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::real_reg_to_reg
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::real_reg_to_reg
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::real_reg_to_reg
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::real_reg_to_reg
502
503
0
        fn real_reg_to_writable_reg(&mut self, reg: RealReg) -> WritableReg {
504
0
            Writable::from_reg(Reg::from(reg))
505
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::real_reg_to_writable_reg
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::real_reg_to_writable_reg
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::real_reg_to_writable_reg
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::real_reg_to_writable_reg
506
507
6
        fn is_sinkable_inst(&mut self, val: Value) -> Option<Inst> {
508
6
            let input = self.lower_ctx.get_value_as_source_or_const(val);
509
510
6
            if let InputSourceInst::UniqueUse(inst, _) = input.inst {
511
0
                Some(inst)
512
            } else {
513
6
                None
514
            }
515
6
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::is_sinkable_inst
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::is_sinkable_inst
Line
Count
Source
507
6
        fn is_sinkable_inst(&mut self, val: Value) -> Option<Inst> {
508
6
            let input = self.lower_ctx.get_value_as_source_or_const(val);
509
510
6
            if let InputSourceInst::UniqueUse(inst, _) = input.inst {
511
0
                Some(inst)
512
            } else {
513
6
                None
514
            }
515
6
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::is_sinkable_inst
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::is_sinkable_inst
516
517
        #[inline]
518
18
        fn sink_inst(&mut self, inst: Inst) {
519
18
            self.lower_ctx.sink_inst(inst);
520
18
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::sink_inst
Line
Count
Source
518
18
        fn sink_inst(&mut self, inst: Inst) {
519
18
            self.lower_ctx.sink_inst(inst);
520
18
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::sink_inst
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::sink_inst
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::sink_inst
521
522
        #[inline]
523
        fn maybe_uextend(&mut self, value: Value) -> Option<Value> {
524
7.34M
            if let Some(def_inst) = self.def_inst(value) {
525
                if let InstructionData::Unary {
526
                    opcode: Opcode::Uextend,
527
2.05M
                    arg,
528
6.95M
                } = self.lower_ctx.data(def_inst)
529
                {
530
2.05M
                    return Some(*arg);
531
4.90M
                }
532
397k
            }
533
534
5.29M
            Some(value)
535
7.34M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::maybe_uextend
Line
Count
Source
524
7.16M
            if let Some(def_inst) = self.def_inst(value) {
525
                if let InstructionData::Unary {
526
                    opcode: Opcode::Uextend,
527
2.04M
                    arg,
528
6.76M
                } = self.lower_ctx.data(def_inst)
529
                {
530
2.04M
                    return Some(*arg);
531
4.71M
                }
532
394k
            }
533
534
5.11M
            Some(value)
535
7.16M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::maybe_uextend
Line
Count
Source
524
122k
            if let Some(def_inst) = self.def_inst(value) {
525
                if let InstructionData::Unary {
526
                    opcode: Opcode::Uextend,
527
0
                    arg,
528
120k
                } = self.lower_ctx.data(def_inst)
529
                {
530
0
                    return Some(*arg);
531
120k
                }
532
2.09k
            }
533
534
122k
            Some(value)
535
122k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::maybe_uextend
Line
Count
Source
524
63.8k
            if let Some(def_inst) = self.def_inst(value) {
525
                if let InstructionData::Unary {
526
                    opcode: Opcode::Uextend,
527
136
                    arg,
528
63.2k
                } = self.lower_ctx.data(def_inst)
529
                {
530
136
                    return Some(*arg);
531
63.0k
                }
532
608
            }
533
534
63.6k
            Some(value)
535
63.8k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::maybe_uextend
536
537
        #[inline]
538
808
        fn preg_to_reg(&mut self, preg: PReg) -> Reg {
539
808
            preg.into()
540
808
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::preg_to_reg
Line
Count
Source
538
808
        fn preg_to_reg(&mut self, preg: PReg) -> Reg {
539
808
            preg.into()
540
808
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::preg_to_reg
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::preg_to_reg
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::preg_to_reg
541
542
        #[inline]
543
0
        fn gen_move(&mut self, ty: Type, dst: WritableReg, src: Reg) -> MInst {
544
0
            MInst::gen_move(dst, src, ty)
545
0
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::gen_move
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::gen_move
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::gen_move
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::gen_move
546
547
        /// Generate the return instruction.
548
1.51M
        fn gen_return(&mut self, (list, off): ValueSlice) {
549
1.51M
            let rets = (off..list.len(&self.lower_ctx.dfg().value_lists))
550
1.51M
                .map(|ix| {
551
                    let val = list.get(ix, &self.lower_ctx.dfg().value_lists).unwrap();
552
                    self.put_in_regs(val)
553
1.51M
                })
554
1.51M
                .collect();
555
1.51M
            self.lower_ctx.gen_return(rets);
556
1.51M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::gen_return
Line
Count
Source
548
4.98k
        fn gen_return(&mut self, (list, off): ValueSlice) {
549
4.98k
            let rets = (off..list.len(&self.lower_ctx.dfg().value_lists))
550
4.98k
                .map(|ix| {
551
                    let val = list.get(ix, &self.lower_ctx.dfg().value_lists).unwrap();
552
                    self.put_in_regs(val)
553
4.98k
                })
554
4.98k
                .collect();
555
4.98k
            self.lower_ctx.gen_return(rets);
556
4.98k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::gen_return
Line
Count
Source
548
1.50M
        fn gen_return(&mut self, (list, off): ValueSlice) {
549
1.50M
            let rets = (off..list.len(&self.lower_ctx.dfg().value_lists))
550
1.50M
                .map(|ix| {
551
                    let val = list.get(ix, &self.lower_ctx.dfg().value_lists).unwrap();
552
                    self.put_in_regs(val)
553
1.50M
                })
554
1.50M
                .collect();
555
1.50M
            self.lower_ctx.gen_return(rets);
556
1.50M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::gen_return
Line
Count
Source
548
2.82k
        fn gen_return(&mut self, (list, off): ValueSlice) {
549
2.82k
            let rets = (off..list.len(&self.lower_ctx.dfg().value_lists))
550
2.82k
                .map(|ix| {
551
                    let val = list.get(ix, &self.lower_ctx.dfg().value_lists).unwrap();
552
                    self.put_in_regs(val)
553
2.82k
                })
554
2.82k
                .collect();
555
2.82k
            self.lower_ctx.gen_return(rets);
556
2.82k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::gen_return
Line
Count
Source
548
3.68k
        fn gen_return(&mut self, (list, off): ValueSlice) {
549
3.68k
            let rets = (off..list.len(&self.lower_ctx.dfg().value_lists))
550
3.68k
                .map(|ix| {
551
                    let val = list.get(ix, &self.lower_ctx.dfg().value_lists).unwrap();
552
                    self.put_in_regs(val)
553
3.68k
                })
554
3.68k
                .collect();
555
3.68k
            self.lower_ctx.gen_return(rets);
556
3.68k
        }
557
558
        /// Same as `shuffle32_from_imm`, but for 64-bit lane shuffles.
559
92
        fn shuffle64_from_imm(&mut self, imm: Immediate) -> Option<(u8, u8)> {
560
92
            use crate::machinst::isle::shuffle_imm_as_le_lane_idx;
561
92
562
92
            let bytes = self.lower_ctx.get_immediate_data(imm).as_slice();
563
92
            Some((
564
92
                shuffle_imm_as_le_lane_idx(8, &bytes[0..8])?,
565
0
                shuffle_imm_as_le_lane_idx(8, &bytes[8..16])?,
566
            ))
567
92
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::shuffle64_from_imm
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::shuffle64_from_imm
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::shuffle64_from_imm
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::shuffle64_from_imm
Line
Count
Source
559
92
        fn shuffle64_from_imm(&mut self, imm: Immediate) -> Option<(u8, u8)> {
560
92
            use crate::machinst::isle::shuffle_imm_as_le_lane_idx;
561
92
562
92
            let bytes = self.lower_ctx.get_immediate_data(imm).as_slice();
563
92
            Some((
564
92
                shuffle_imm_as_le_lane_idx(8, &bytes[0..8])?,
565
0
                shuffle_imm_as_le_lane_idx(8, &bytes[8..16])?,
566
            ))
567
92
        }
568
569
        /// Attempts to interpret the shuffle immediate `imm` as a shuffle of
570
        /// 32-bit lanes, returning four integers, each of which is less than 8,
571
        /// which represents a permutation of 32-bit lanes as specified by
572
        /// `imm`.
573
        ///
574
        /// For example the shuffle immediate
575
        ///
576
        /// `0 1 2 3 8 9 10 11 16 17 18 19 24 25 26 27`
577
        ///
578
        /// would return `Some((0, 2, 4, 6))`.
579
712
        fn shuffle32_from_imm(&mut self, imm: Immediate) -> Option<(u8, u8, u8, u8)> {
580
712
            use crate::machinst::isle::shuffle_imm_as_le_lane_idx;
581
712
582
712
            let bytes = self.lower_ctx.get_immediate_data(imm).as_slice();
583
712
            Some((
584
712
                shuffle_imm_as_le_lane_idx(4, &bytes[0..4])?,
585
0
                shuffle_imm_as_le_lane_idx(4, &bytes[4..8])?,
586
0
                shuffle_imm_as_le_lane_idx(4, &bytes[8..12])?,
587
0
                shuffle_imm_as_le_lane_idx(4, &bytes[12..16])?,
588
            ))
589
712
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::shuffle32_from_imm
Line
Count
Source
579
92
        fn shuffle32_from_imm(&mut self, imm: Immediate) -> Option<(u8, u8, u8, u8)> {
580
92
            use crate::machinst::isle::shuffle_imm_as_le_lane_idx;
581
92
582
92
            let bytes = self.lower_ctx.get_immediate_data(imm).as_slice();
583
92
            Some((
584
92
                shuffle_imm_as_le_lane_idx(4, &bytes[0..4])?,
585
0
                shuffle_imm_as_le_lane_idx(4, &bytes[4..8])?,
586
0
                shuffle_imm_as_le_lane_idx(4, &bytes[8..12])?,
587
0
                shuffle_imm_as_le_lane_idx(4, &bytes[12..16])?,
588
            ))
589
92
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::shuffle32_from_imm
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::shuffle32_from_imm
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::shuffle32_from_imm
Line
Count
Source
579
620
        fn shuffle32_from_imm(&mut self, imm: Immediate) -> Option<(u8, u8, u8, u8)> {
580
620
            use crate::machinst::isle::shuffle_imm_as_le_lane_idx;
581
620
582
620
            let bytes = self.lower_ctx.get_immediate_data(imm).as_slice();
583
620
            Some((
584
620
                shuffle_imm_as_le_lane_idx(4, &bytes[0..4])?,
585
0
                shuffle_imm_as_le_lane_idx(4, &bytes[4..8])?,
586
0
                shuffle_imm_as_le_lane_idx(4, &bytes[8..12])?,
587
0
                shuffle_imm_as_le_lane_idx(4, &bytes[12..16])?,
588
            ))
589
620
        }
590
591
        /// Same as `shuffle32_from_imm`, but for 16-bit lane shuffles.
592
1.03k
        fn shuffle16_from_imm(
593
1.03k
            &mut self,
594
1.03k
            imm: Immediate,
595
1.03k
        ) -> Option<(u8, u8, u8, u8, u8, u8, u8, u8)> {
596
1.03k
            use crate::machinst::isle::shuffle_imm_as_le_lane_idx;
597
1.03k
            let bytes = self.lower_ctx.get_immediate_data(imm).as_slice();
598
1.03k
            Some((
599
1.03k
                shuffle_imm_as_le_lane_idx(2, &bytes[0..2])?,
600
120
                shuffle_imm_as_le_lane_idx(2, &bytes[2..4])?,
601
120
                shuffle_imm_as_le_lane_idx(2, &bytes[4..6])?,
602
120
                shuffle_imm_as_le_lane_idx(2, &bytes[6..8])?,
603
120
                shuffle_imm_as_le_lane_idx(2, &bytes[8..10])?,
604
120
                shuffle_imm_as_le_lane_idx(2, &bytes[10..12])?,
605
120
                shuffle_imm_as_le_lane_idx(2, &bytes[12..14])?,
606
120
                shuffle_imm_as_le_lane_idx(2, &bytes[14..16])?,
607
            ))
608
1.03k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::shuffle16_from_imm
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::shuffle16_from_imm
Line
Count
Source
592
92
        fn shuffle16_from_imm(
593
92
            &mut self,
594
92
            imm: Immediate,
595
92
        ) -> Option<(u8, u8, u8, u8, u8, u8, u8, u8)> {
596
92
            use crate::machinst::isle::shuffle_imm_as_le_lane_idx;
597
92
            let bytes = self.lower_ctx.get_immediate_data(imm).as_slice();
598
92
            Some((
599
92
                shuffle_imm_as_le_lane_idx(2, &bytes[0..2])?,
600
0
                shuffle_imm_as_le_lane_idx(2, &bytes[2..4])?,
601
0
                shuffle_imm_as_le_lane_idx(2, &bytes[4..6])?,
602
0
                shuffle_imm_as_le_lane_idx(2, &bytes[6..8])?,
603
0
                shuffle_imm_as_le_lane_idx(2, &bytes[8..10])?,
604
0
                shuffle_imm_as_le_lane_idx(2, &bytes[10..12])?,
605
0
                shuffle_imm_as_le_lane_idx(2, &bytes[12..14])?,
606
0
                shuffle_imm_as_le_lane_idx(2, &bytes[14..16])?,
607
            ))
608
92
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::shuffle16_from_imm
Line
Count
Source
592
945
        fn shuffle16_from_imm(
593
945
            &mut self,
594
945
            imm: Immediate,
595
945
        ) -> Option<(u8, u8, u8, u8, u8, u8, u8, u8)> {
596
945
            use crate::machinst::isle::shuffle_imm_as_le_lane_idx;
597
945
            let bytes = self.lower_ctx.get_immediate_data(imm).as_slice();
598
945
            Some((
599
945
                shuffle_imm_as_le_lane_idx(2, &bytes[0..2])?,
600
120
                shuffle_imm_as_le_lane_idx(2, &bytes[2..4])?,
601
120
                shuffle_imm_as_le_lane_idx(2, &bytes[4..6])?,
602
120
                shuffle_imm_as_le_lane_idx(2, &bytes[6..8])?,
603
120
                shuffle_imm_as_le_lane_idx(2, &bytes[8..10])?,
604
120
                shuffle_imm_as_le_lane_idx(2, &bytes[10..12])?,
605
120
                shuffle_imm_as_le_lane_idx(2, &bytes[12..14])?,
606
120
                shuffle_imm_as_le_lane_idx(2, &bytes[14..16])?,
607
            ))
608
945
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::shuffle16_from_imm
609
610
17.3k
        fn safe_divisor_from_imm64(&mut self, ty: Type, val: Imm64) -> Option<u64> {
611
17.3k
            let minus_one = if ty.bytes() == 8 {
612
2.08k
                -1
613
            } else {
614
15.2k
                (1 << (ty.bytes() * 8)) - 1
615
            };
616
17.3k
            let bits = val.bits() & minus_one;
617
17.3k
            if bits == 0 || bits == minus_one {
618
751
                None
619
            } else {
620
16.5k
                Some(bits as u64)
621
            }
622
17.3k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::safe_divisor_from_imm64
Line
Count
Source
610
17.3k
        fn safe_divisor_from_imm64(&mut self, ty: Type, val: Imm64) -> Option<u64> {
611
17.3k
            let minus_one = if ty.bytes() == 8 {
612
2.07k
                -1
613
            } else {
614
15.2k
                (1 << (ty.bytes() * 8)) - 1
615
            };
616
17.3k
            let bits = val.bits() & minus_one;
617
17.3k
            if bits == 0 || bits == minus_one {
618
751
                None
619
            } else {
620
16.5k
                Some(bits as u64)
621
            }
622
17.3k
        }
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::safe_divisor_from_imm64
Unexecuted instantiation: <cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::s390x::lower::isle::generated_code::MInst, cranelift_codegen::isa::s390x::S390xBackend> as cranelift_codegen::isa::s390x::lower::isle::generated_code::Context>::safe_divisor_from_imm64
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::safe_divisor_from_imm64
Line
Count
Source
610
12
        fn safe_divisor_from_imm64(&mut self, ty: Type, val: Imm64) -> Option<u64> {
611
12
            let minus_one = if ty.bytes() == 8 {
612
4
                -1
613
            } else {
614
8
                (1 << (ty.bytes() * 8)) - 1
615
            };
616
12
            let bits = val.bits() & minus_one;
617
12
            if bits == 0 || bits == minus_one {
618
0
                None
619
            } else {
620
12
                Some(bits as u64)
621
            }
622
12
        }
623
    };
624
}
625
626
/// Returns the `size`-byte lane referred to by the shuffle immediate specified
627
/// in `bytes`.
628
///
629
/// This helper is used by `shuffleNN_from_imm` above and is used to interpret a
630
/// byte-based shuffle as a higher-level shuffle of bigger lanes. This will see
631
/// if the `bytes` specified, which must have `size` length, specifies a lane in
632
/// vectors aligned to a `size`-byte boundary.
633
///
634
/// Returns `None` if `bytes` doesn't specify a `size`-byte lane aligned
635
/// appropriately, or returns `Some(n)` where `n` is the index of the lane being
636
/// shuffled.
637
2.68k
pub fn shuffle_imm_as_le_lane_idx(size: u8, bytes: &[u8]) -> Option<u8> {
638
2.68k
    assert_eq!(bytes.len(), usize::from(size));
639
640
    // The first index in `bytes` must be aligned to a `size` boundary for the
641
    // bytes to be a valid specifier for a lane of `size` bytes.
642
2.68k
    if bytes[0] % size != 0 {
643
840
        return None;
644
1.84k
    }
645
646
    // Afterwards the bytes must all be one larger than the prior to specify a
647
    // contiguous sequence of bytes that's being shuffled. Basically `bytes`
648
    // must refer to the entire `size`-byte lane, in little-endian order.
649
1.84k
    for i in 0..size - 1 {
650
1.84k
        let idx = usize::from(i);
651
1.84k
        if bytes[idx] + 1 != bytes[idx + 1] {
652
881
            return None;
653
960
        }
654
    }
655
656
    // All of the `bytes` are in-order, meaning that this is a valid shuffle
657
    // immediate to specify a lane of `size` bytes. The index, when viewed as
658
    // `size`-byte immediates, will be the first byte divided by the byte size.
659
960
    Some(bytes[0] / size)
660
2.68k
}
661
662
/// Helpers specifically for machines that use ABICaller.
663
#[macro_export]
664
#[doc(hidden)]
665
macro_rules! isle_prelude_caller_methods {
666
    ($abispec:ty, $abicaller:ty) => {
667
1.94M
        fn gen_call(
668
1.94M
            &mut self,
669
1.94M
            sig_ref: SigRef,
670
1.94M
            extname: ExternalName,
671
1.94M
            dist: RelocDistance,
672
1.94M
            args @ (inputs, off): ValueSlice,
673
1.94M
        ) -> InstOutput {
674
1.94M
            let caller_conv = self.lower_ctx.abi().call_conv(self.lower_ctx.sigs());
675
1.94M
            let sig = &self.lower_ctx.dfg().signatures[sig_ref];
676
1.94M
            let num_rets = sig.returns.len();
677
1.94M
            let abi = self.lower_ctx.sigs().abi_sig_for_sig_ref(sig_ref);
678
1.94M
            let caller = <$abicaller>::from_func(
679
1.94M
                self.lower_ctx.sigs(),
680
1.94M
                sig_ref,
681
1.94M
                &extname,
682
1.94M
                dist,
683
1.94M
                caller_conv,
684
1.94M
                self.backend.flags().clone(),
685
1.94M
            )
686
1.94M
            .unwrap();
687
1.94M
688
1.94M
            assert_eq!(
689
1.94M
                inputs.len(&self.lower_ctx.dfg().value_lists) - off,
690
1.94M
                sig.params.len()
691
1.94M
            );
692
693
1.94M
            self.gen_call_common(abi, num_rets, caller, args)
694
1.94M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::gen_call
Line
Count
Source
667
1.91M
        fn gen_call(
668
1.91M
            &mut self,
669
1.91M
            sig_ref: SigRef,
670
1.91M
            extname: ExternalName,
671
1.91M
            dist: RelocDistance,
672
1.91M
            args @ (inputs, off): ValueSlice,
673
1.91M
        ) -> InstOutput {
674
1.91M
            let caller_conv = self.lower_ctx.abi().call_conv(self.lower_ctx.sigs());
675
1.91M
            let sig = &self.lower_ctx.dfg().signatures[sig_ref];
676
1.91M
            let num_rets = sig.returns.len();
677
1.91M
            let abi = self.lower_ctx.sigs().abi_sig_for_sig_ref(sig_ref);
678
1.91M
            let caller = <$abicaller>::from_func(
679
1.91M
                self.lower_ctx.sigs(),
680
1.91M
                sig_ref,
681
1.91M
                &extname,
682
1.91M
                dist,
683
1.91M
                caller_conv,
684
1.91M
                self.backend.flags().clone(),
685
1.91M
            )
686
1.91M
            .unwrap();
687
1.91M
688
1.91M
            assert_eq!(
689
1.91M
                inputs.len(&self.lower_ctx.dfg().value_lists) - off,
690
1.91M
                sig.params.len()
691
1.91M
            );
692
693
1.91M
            self.gen_call_common(abi, num_rets, caller, args)
694
1.91M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::gen_call
Line
Count
Source
667
8.28k
        fn gen_call(
668
8.28k
            &mut self,
669
8.28k
            sig_ref: SigRef,
670
8.28k
            extname: ExternalName,
671
8.28k
            dist: RelocDistance,
672
8.28k
            args @ (inputs, off): ValueSlice,
673
8.28k
        ) -> InstOutput {
674
8.28k
            let caller_conv = self.lower_ctx.abi().call_conv(self.lower_ctx.sigs());
675
8.28k
            let sig = &self.lower_ctx.dfg().signatures[sig_ref];
676
8.28k
            let num_rets = sig.returns.len();
677
8.28k
            let abi = self.lower_ctx.sigs().abi_sig_for_sig_ref(sig_ref);
678
8.28k
            let caller = <$abicaller>::from_func(
679
8.28k
                self.lower_ctx.sigs(),
680
8.28k
                sig_ref,
681
8.28k
                &extname,
682
8.28k
                dist,
683
8.28k
                caller_conv,
684
8.28k
                self.backend.flags().clone(),
685
8.28k
            )
686
8.28k
            .unwrap();
687
8.28k
688
8.28k
            assert_eq!(
689
8.28k
                inputs.len(&self.lower_ctx.dfg().value_lists) - off,
690
8.28k
                sig.params.len()
691
8.28k
            );
692
693
8.28k
            self.gen_call_common(abi, num_rets, caller, args)
694
8.28k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::gen_call
Line
Count
Source
667
24.7k
        fn gen_call(
668
24.7k
            &mut self,
669
24.7k
            sig_ref: SigRef,
670
24.7k
            extname: ExternalName,
671
24.7k
            dist: RelocDistance,
672
24.7k
            args @ (inputs, off): ValueSlice,
673
24.7k
        ) -> InstOutput {
674
24.7k
            let caller_conv = self.lower_ctx.abi().call_conv(self.lower_ctx.sigs());
675
24.7k
            let sig = &self.lower_ctx.dfg().signatures[sig_ref];
676
24.7k
            let num_rets = sig.returns.len();
677
24.7k
            let abi = self.lower_ctx.sigs().abi_sig_for_sig_ref(sig_ref);
678
24.7k
            let caller = <$abicaller>::from_func(
679
24.7k
                self.lower_ctx.sigs(),
680
24.7k
                sig_ref,
681
24.7k
                &extname,
682
24.7k
                dist,
683
24.7k
                caller_conv,
684
24.7k
                self.backend.flags().clone(),
685
24.7k
            )
686
24.7k
            .unwrap();
687
24.7k
688
24.7k
            assert_eq!(
689
24.7k
                inputs.len(&self.lower_ctx.dfg().value_lists) - off,
690
24.7k
                sig.params.len()
691
24.7k
            );
692
693
24.7k
            self.gen_call_common(abi, num_rets, caller, args)
694
24.7k
        }
695
696
11.2M
        fn gen_call_indirect(
697
11.2M
            &mut self,
698
11.2M
            sig_ref: SigRef,
699
11.2M
            val: Value,
700
11.2M
            args @ (inputs, off): ValueSlice,
701
11.2M
        ) -> InstOutput {
702
11.2M
            let caller_conv = self.lower_ctx.abi().call_conv(self.lower_ctx.sigs());
703
11.2M
            let ptr = self.put_in_reg(val);
704
11.2M
            let sig = &self.lower_ctx.dfg().signatures[sig_ref];
705
11.2M
            let num_rets = sig.returns.len();
706
11.2M
            let abi = self.lower_ctx.sigs().abi_sig_for_sig_ref(sig_ref);
707
11.2M
            let caller = <$abicaller>::from_ptr(
708
11.2M
                self.lower_ctx.sigs(),
709
11.2M
                sig_ref,
710
11.2M
                ptr,
711
11.2M
                Opcode::CallIndirect,
712
11.2M
                caller_conv,
713
11.2M
                self.backend.flags().clone(),
714
11.2M
            )
715
11.2M
            .unwrap();
716
11.2M
717
11.2M
            assert_eq!(
718
11.2M
                inputs.len(&self.lower_ctx.dfg().value_lists) - off,
719
11.2M
                sig.params.len()
720
11.2M
            );
721
722
11.2M
            self.gen_call_common(abi, num_rets, caller, args)
723
11.2M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend> as cranelift_codegen::isa::aarch64::lower::isle::generated_code::Context>::gen_call_indirect
Line
Count
Source
696
314
        fn gen_call_indirect(
697
314
            &mut self,
698
314
            sig_ref: SigRef,
699
314
            val: Value,
700
314
            args @ (inputs, off): ValueSlice,
701
314
        ) -> InstOutput {
702
314
            let caller_conv = self.lower_ctx.abi().call_conv(self.lower_ctx.sigs());
703
314
            let ptr = self.put_in_reg(val);
704
314
            let sig = &self.lower_ctx.dfg().signatures[sig_ref];
705
314
            let num_rets = sig.returns.len();
706
314
            let abi = self.lower_ctx.sigs().abi_sig_for_sig_ref(sig_ref);
707
314
            let caller = <$abicaller>::from_ptr(
708
314
                self.lower_ctx.sigs(),
709
314
                sig_ref,
710
314
                ptr,
711
314
                Opcode::CallIndirect,
712
314
                caller_conv,
713
314
                self.backend.flags().clone(),
714
314
            )
715
314
            .unwrap();
716
314
717
314
            assert_eq!(
718
314
                inputs.len(&self.lower_ctx.dfg().value_lists) - off,
719
314
                sig.params.len()
720
314
            );
721
722
314
            self.gen_call_common(abi, num_rets, caller, args)
723
314
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend> as cranelift_codegen::isa::x64::lower::isle::generated_code::Context>::gen_call_indirect
Line
Count
Source
696
11.2M
        fn gen_call_indirect(
697
11.2M
            &mut self,
698
11.2M
            sig_ref: SigRef,
699
11.2M
            val: Value,
700
11.2M
            args @ (inputs, off): ValueSlice,
701
11.2M
        ) -> InstOutput {
702
11.2M
            let caller_conv = self.lower_ctx.abi().call_conv(self.lower_ctx.sigs());
703
11.2M
            let ptr = self.put_in_reg(val);
704
11.2M
            let sig = &self.lower_ctx.dfg().signatures[sig_ref];
705
11.2M
            let num_rets = sig.returns.len();
706
11.2M
            let abi = self.lower_ctx.sigs().abi_sig_for_sig_ref(sig_ref);
707
11.2M
            let caller = <$abicaller>::from_ptr(
708
11.2M
                self.lower_ctx.sigs(),
709
11.2M
                sig_ref,
710
11.2M
                ptr,
711
11.2M
                Opcode::CallIndirect,
712
11.2M
                caller_conv,
713
11.2M
                self.backend.flags().clone(),
714
11.2M
            )
715
11.2M
            .unwrap();
716
11.2M
717
11.2M
            assert_eq!(
718
11.2M
                inputs.len(&self.lower_ctx.dfg().value_lists) - off,
719
11.2M
                sig.params.len()
720
11.2M
            );
721
722
11.2M
            self.gen_call_common(abi, num_rets, caller, args)
723
11.2M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend> as cranelift_codegen::isa::riscv64::lower::isle::generated_code::Context>::gen_call_indirect
Line
Count
Source
696
22
        fn gen_call_indirect(
697
22
            &mut self,
698
22
            sig_ref: SigRef,
699
22
            val: Value,
700
22
            args @ (inputs, off): ValueSlice,
701
22
        ) -> InstOutput {
702
22
            let caller_conv = self.lower_ctx.abi().call_conv(self.lower_ctx.sigs());
703
22
            let ptr = self.put_in_reg(val);
704
22
            let sig = &self.lower_ctx.dfg().signatures[sig_ref];
705
22
            let num_rets = sig.returns.len();
706
22
            let abi = self.lower_ctx.sigs().abi_sig_for_sig_ref(sig_ref);
707
22
            let caller = <$abicaller>::from_ptr(
708
22
                self.lower_ctx.sigs(),
709
22
                sig_ref,
710
22
                ptr,
711
22
                Opcode::CallIndirect,
712
22
                caller_conv,
713
22
                self.backend.flags().clone(),
714
22
            )
715
22
            .unwrap();
716
22
717
22
            assert_eq!(
718
22
                inputs.len(&self.lower_ctx.dfg().value_lists) - off,
719
22
                sig.params.len()
720
22
            );
721
722
22
            self.gen_call_common(abi, num_rets, caller, args)
723
22
        }
724
    };
725
}
726
727
/// Helpers for the above ISLE prelude implementations. Meant to go
728
/// inside the `impl` for the context type, not the trait impl.
729
#[macro_export]
730
#[doc(hidden)]
731
macro_rules! isle_prelude_method_helpers {
732
    ($abicaller:ty) => {
733
13.2M
        fn gen_call_common(
734
13.2M
            &mut self,
735
13.2M
            abi: Sig,
736
13.2M
            num_rets: usize,
737
13.2M
            mut caller: $abicaller,
738
13.2M
            (inputs, off): ValueSlice,
739
13.2M
        ) -> InstOutput {
740
13.2M
            caller.emit_stack_pre_adjust(self.lower_ctx);
741
13.2M
742
13.2M
            let num_args = self.lower_ctx.sigs().num_args(abi);
743
13.2M
744
13.2M
            assert_eq!(
745
13.2M
                inputs.len(&self.lower_ctx.dfg().value_lists) - off,
746
13.2M
                num_args
747
13.2M
            );
748
13.2M
            let mut arg_regs = vec![];
749
30.3M
            for i in 0..num_args {
750
30.3M
                let input = inputs
751
30.3M
                    .get(off + i, &self.lower_ctx.dfg().value_lists)
752
30.3M
                    .unwrap();
753
30.3M
                arg_regs.push(self.put_in_regs(input));
754
30.3M
            }
755
30.3M
            for (i, arg_regs) in arg_regs.iter().enumerate() {
756
30.3M
                caller.emit_copy_regs_to_buffer(self.lower_ctx, i, *arg_regs);
757
30.3M
            }
758
30.3M
            for (i, arg_regs) in arg_regs.iter().enumerate() {
759
30.3M
                for inst in caller.gen_arg(self.lower_ctx, i, *arg_regs) {
760
708k
                    self.lower_ctx.emit(inst);
761
708k
                }
762
            }
763
764
            // Handle retvals prior to emitting call, so the
765
            // constraints are on the call instruction; but buffer the
766
            // instructions till after the call.
767
13.2M
            let mut outputs = InstOutput::new();
768
13.2M
            let mut retval_insts: crate::machinst::abi::SmallInstVec<_> = smallvec::smallvec![];
769
            // We take the *last* `num_rets` returns of the sig:
770
            // this skips a StructReturn, if any, that is present.
771
13.2M
            let sigdata_num_rets = self.lower_ctx.sigs().num_rets(abi);
772
0
            debug_assert!(num_rets <= sigdata_num_rets);
773
15.9M
            for i in (sigdata_num_rets - num_rets)..sigdata_num_rets {
774
15.9M
                // Borrow `sigdata` again so we don't hold a `self`
775
15.9M
                // borrow across the `&mut self` arg to
776
15.9M
                // `abi_arg_slot_regs()` below.
777
15.9M
                let ret = self.lower_ctx.sigs().get_ret(abi, i);
778
15.9M
                let retval_regs = self.abi_arg_slot_regs(&ret).unwrap();
779
15.9M
                retval_insts.extend(
780
15.9M
                    caller
781
15.9M
                        .gen_retval(self.lower_ctx, i, retval_regs.clone())
782
15.9M
                        .into_iter(),
783
15.9M
                );
784
15.9M
                outputs.push(valueregs::non_writable_value_regs(retval_regs));
785
15.9M
            }
786
787
13.2M
            caller.emit_call(self.lower_ctx);
788
789
22.8M
            for inst in retval_insts {
790
9.59M
                self.lower_ctx.emit(inst);
791
9.59M
            }
792
793
13.2M
            caller.emit_stack_post_adjust(self.lower_ctx);
794
13.2M
795
13.2M
            outputs
796
13.2M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend>>::gen_call_common
Line
Count
Source
733
25.1k
        fn gen_call_common(
734
25.1k
            &mut self,
735
25.1k
            abi: Sig,
736
25.1k
            num_rets: usize,
737
25.1k
            mut caller: $abicaller,
738
25.1k
            (inputs, off): ValueSlice,
739
25.1k
        ) -> InstOutput {
740
25.1k
            caller.emit_stack_pre_adjust(self.lower_ctx);
741
25.1k
742
25.1k
            let num_args = self.lower_ctx.sigs().num_args(abi);
743
25.1k
744
25.1k
            assert_eq!(
745
25.1k
                inputs.len(&self.lower_ctx.dfg().value_lists) - off,
746
25.1k
                num_args
747
25.1k
            );
748
25.1k
            let mut arg_regs = vec![];
749
25.1k
            for i in 0..num_args {
750
16.7k
                let input = inputs
751
16.7k
                    .get(off + i, &self.lower_ctx.dfg().value_lists)
752
16.7k
                    .unwrap();
753
16.7k
                arg_regs.push(self.put_in_regs(input));
754
16.7k
            }
755
25.1k
            for (i, arg_regs) in arg_regs.iter().enumerate() {
756
16.7k
                caller.emit_copy_regs_to_buffer(self.lower_ctx, i, *arg_regs);
757
16.7k
            }
758
25.1k
            for (i, arg_regs) in arg_regs.iter().enumerate() {
759
16.7k
                for inst in caller.gen_arg(self.lower_ctx, i, *arg_regs) {
760
256
                    self.lower_ctx.emit(inst);
761
256
                }
762
            }
763
764
            // Handle retvals prior to emitting call, so the
765
            // constraints are on the call instruction; but buffer the
766
            // instructions till after the call.
767
25.1k
            let mut outputs = InstOutput::new();
768
25.1k
            let mut retval_insts: crate::machinst::abi::SmallInstVec<_> = smallvec::smallvec![];
769
            // We take the *last* `num_rets` returns of the sig:
770
            // this skips a StructReturn, if any, that is present.
771
25.1k
            let sigdata_num_rets = self.lower_ctx.sigs().num_rets(abi);
772
0
            debug_assert!(num_rets <= sigdata_num_rets);
773
61.0k
            for i in (sigdata_num_rets - num_rets)..sigdata_num_rets {
774
61.0k
                // Borrow `sigdata` again so we don't hold a `self`
775
61.0k
                // borrow across the `&mut self` arg to
776
61.0k
                // `abi_arg_slot_regs()` below.
777
61.0k
                let ret = self.lower_ctx.sigs().get_ret(abi, i);
778
61.0k
                let retval_regs = self.abi_arg_slot_regs(&ret).unwrap();
779
61.0k
                retval_insts.extend(
780
61.0k
                    caller
781
61.0k
                        .gen_retval(self.lower_ctx, i, retval_regs.clone())
782
61.0k
                        .into_iter(),
783
61.0k
                );
784
61.0k
                outputs.push(valueregs::non_writable_value_regs(retval_regs));
785
61.0k
            }
786
787
25.1k
            caller.emit_call(self.lower_ctx);
788
789
28.3k
            for inst in retval_insts {
790
3.21k
                self.lower_ctx.emit(inst);
791
3.21k
            }
792
793
25.1k
            caller.emit_stack_post_adjust(self.lower_ctx);
794
25.1k
795
25.1k
            outputs
796
25.1k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend>>::gen_call_common
Line
Count
Source
733
8.30k
        fn gen_call_common(
734
8.30k
            &mut self,
735
8.30k
            abi: Sig,
736
8.30k
            num_rets: usize,
737
8.30k
            mut caller: $abicaller,
738
8.30k
            (inputs, off): ValueSlice,
739
8.30k
        ) -> InstOutput {
740
8.30k
            caller.emit_stack_pre_adjust(self.lower_ctx);
741
8.30k
742
8.30k
            let num_args = self.lower_ctx.sigs().num_args(abi);
743
8.30k
744
8.30k
            assert_eq!(
745
8.30k
                inputs.len(&self.lower_ctx.dfg().value_lists) - off,
746
8.30k
                num_args
747
8.30k
            );
748
8.30k
            let mut arg_regs = vec![];
749
72.2k
            for i in 0..num_args {
750
72.2k
                let input = inputs
751
72.2k
                    .get(off + i, &self.lower_ctx.dfg().value_lists)
752
72.2k
                    .unwrap();
753
72.2k
                arg_regs.push(self.put_in_regs(input));
754
72.2k
            }
755
72.2k
            for (i, arg_regs) in arg_regs.iter().enumerate() {
756
72.2k
                caller.emit_copy_regs_to_buffer(self.lower_ctx, i, *arg_regs);
757
72.2k
            }
758
72.2k
            for (i, arg_regs) in arg_regs.iter().enumerate() {
759
72.2k
                for inst in caller.gen_arg(self.lower_ctx, i, *arg_regs) {
760
38.6k
                    self.lower_ctx.emit(inst);
761
38.6k
                }
762
            }
763
764
            // Handle retvals prior to emitting call, so the
765
            // constraints are on the call instruction; but buffer the
766
            // instructions till after the call.
767
8.30k
            let mut outputs = InstOutput::new();
768
8.30k
            let mut retval_insts: crate::machinst::abi::SmallInstVec<_> = smallvec::smallvec![];
769
            // We take the *last* `num_rets` returns of the sig:
770
            // this skips a StructReturn, if any, that is present.
771
8.30k
            let sigdata_num_rets = self.lower_ctx.sigs().num_rets(abi);
772
0
            debug_assert!(num_rets <= sigdata_num_rets);
773
65.3k
            for i in (sigdata_num_rets - num_rets)..sigdata_num_rets {
774
65.3k
                // Borrow `sigdata` again so we don't hold a `self`
775
65.3k
                // borrow across the `&mut self` arg to
776
65.3k
                // `abi_arg_slot_regs()` below.
777
65.3k
                let ret = self.lower_ctx.sigs().get_ret(abi, i);
778
65.3k
                let retval_regs = self.abi_arg_slot_regs(&ret).unwrap();
779
65.3k
                retval_insts.extend(
780
65.3k
                    caller
781
65.3k
                        .gen_retval(self.lower_ctx, i, retval_regs.clone())
782
65.3k
                        .into_iter(),
783
65.3k
                );
784
65.3k
                outputs.push(valueregs::non_writable_value_regs(retval_regs));
785
65.3k
            }
786
787
8.30k
            caller.emit_call(self.lower_ctx);
788
789
68.0k
            for inst in retval_insts {
790
59.7k
                self.lower_ctx.emit(inst);
791
59.7k
            }
792
793
8.30k
            caller.emit_stack_post_adjust(self.lower_ctx);
794
8.30k
795
8.30k
            outputs
796
8.30k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend>>::gen_call_common
Line
Count
Source
733
13.2M
        fn gen_call_common(
734
13.2M
            &mut self,
735
13.2M
            abi: Sig,
736
13.2M
            num_rets: usize,
737
13.2M
            mut caller: $abicaller,
738
13.2M
            (inputs, off): ValueSlice,
739
13.2M
        ) -> InstOutput {
740
13.2M
            caller.emit_stack_pre_adjust(self.lower_ctx);
741
13.2M
742
13.2M
            let num_args = self.lower_ctx.sigs().num_args(abi);
743
13.2M
744
13.2M
            assert_eq!(
745
13.2M
                inputs.len(&self.lower_ctx.dfg().value_lists) - off,
746
13.2M
                num_args
747
13.2M
            );
748
13.2M
            let mut arg_regs = vec![];
749
30.2M
            for i in 0..num_args {
750
30.2M
                let input = inputs
751
30.2M
                    .get(off + i, &self.lower_ctx.dfg().value_lists)
752
30.2M
                    .unwrap();
753
30.2M
                arg_regs.push(self.put_in_regs(input));
754
30.2M
            }
755
30.2M
            for (i, arg_regs) in arg_regs.iter().enumerate() {
756
30.2M
                caller.emit_copy_regs_to_buffer(self.lower_ctx, i, *arg_regs);
757
30.2M
            }
758
30.2M
            for (i, arg_regs) in arg_regs.iter().enumerate() {
759
30.2M
                for inst in caller.gen_arg(self.lower_ctx, i, *arg_regs) {
760
669k
                    self.lower_ctx.emit(inst);
761
669k
                }
762
            }
763
764
            // Handle retvals prior to emitting call, so the
765
            // constraints are on the call instruction; but buffer the
766
            // instructions till after the call.
767
13.2M
            let mut outputs = InstOutput::new();
768
13.2M
            let mut retval_insts: crate::machinst::abi::SmallInstVec<_> = smallvec::smallvec![];
769
            // We take the *last* `num_rets` returns of the sig:
770
            // this skips a StructReturn, if any, that is present.
771
13.2M
            let sigdata_num_rets = self.lower_ctx.sigs().num_rets(abi);
772
0
            debug_assert!(num_rets <= sigdata_num_rets);
773
15.8M
            for i in (sigdata_num_rets - num_rets)..sigdata_num_rets {
774
15.8M
                // Borrow `sigdata` again so we don't hold a `self`
775
15.8M
                // borrow across the `&mut self` arg to
776
15.8M
                // `abi_arg_slot_regs()` below.
777
15.8M
                let ret = self.lower_ctx.sigs().get_ret(abi, i);
778
15.8M
                let retval_regs = self.abi_arg_slot_regs(&ret).unwrap();
779
15.8M
                retval_insts.extend(
780
15.8M
                    caller
781
15.8M
                        .gen_retval(self.lower_ctx, i, retval_regs.clone())
782
15.8M
                        .into_iter(),
783
15.8M
                );
784
15.8M
                outputs.push(valueregs::non_writable_value_regs(retval_regs));
785
15.8M
            }
786
787
13.2M
            caller.emit_call(self.lower_ctx);
788
789
22.7M
            for inst in retval_insts {
790
9.53M
                self.lower_ctx.emit(inst);
791
9.53M
            }
792
793
13.2M
            caller.emit_stack_post_adjust(self.lower_ctx);
794
13.2M
795
13.2M
            outputs
796
13.2M
        }
797
798
15.9M
        fn abi_arg_slot_regs(&mut self, arg: &ABIArg) -> Option<WritableValueRegs> {
799
15.9M
            match arg {
800
15.9M
                &ABIArg::Slots { ref slots, .. } => match slots.len() {
801
                    1 => {
802
15.9M
                        let a = self.temp_writable_reg(slots[0].get_type());
803
15.9M
                        Some(WritableValueRegs::one(a))
804
                    }
805
                    2 => {
806
22.1k
                        let a = self.temp_writable_reg(slots[0].get_type());
807
22.1k
                        let b = self.temp_writable_reg(slots[1].get_type());
808
22.1k
                        Some(WritableValueRegs::two(a, b))
809
                    }
810
0
                    _ => panic!("Expected to see one or two slots only from {:?}", arg),
811
                },
812
0
                _ => None,
813
            }
814
15.9M
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::riscv64::lower::isle::generated_code::MInst, cranelift_codegen::isa::riscv64::Riscv64Backend>>::abi_arg_slot_regs
Line
Count
Source
798
65.3k
        fn abi_arg_slot_regs(&mut self, arg: &ABIArg) -> Option<WritableValueRegs> {
799
65.3k
            match arg {
800
65.3k
                &ABIArg::Slots { ref slots, .. } => match slots.len() {
801
                    1 => {
802
50.7k
                        let a = self.temp_writable_reg(slots[0].get_type());
803
50.7k
                        Some(WritableValueRegs::one(a))
804
                    }
805
                    2 => {
806
14.5k
                        let a = self.temp_writable_reg(slots[0].get_type());
807
14.5k
                        let b = self.temp_writable_reg(slots[1].get_type());
808
14.5k
                        Some(WritableValueRegs::two(a, b))
809
                    }
810
0
                    _ => panic!("Expected to see one or two slots only from {:?}", arg),
811
                },
812
0
                _ => None,
813
            }
814
65.3k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::aarch64::lower::isle::generated_code::MInst, cranelift_codegen::isa::aarch64::AArch64Backend>>::abi_arg_slot_regs
Line
Count
Source
798
61.0k
        fn abi_arg_slot_regs(&mut self, arg: &ABIArg) -> Option<WritableValueRegs> {
799
61.0k
            match arg {
800
61.0k
                &ABIArg::Slots { ref slots, .. } => match slots.len() {
801
                    1 => {
802
60.5k
                        let a = self.temp_writable_reg(slots[0].get_type());
803
60.5k
                        Some(WritableValueRegs::one(a))
804
                    }
805
                    2 => {
806
514
                        let a = self.temp_writable_reg(slots[0].get_type());
807
514
                        let b = self.temp_writable_reg(slots[1].get_type());
808
514
                        Some(WritableValueRegs::two(a, b))
809
                    }
810
0
                    _ => panic!("Expected to see one or two slots only from {:?}", arg),
811
                },
812
0
                _ => None,
813
            }
814
61.0k
        }
<cranelift_codegen::machinst::isle::IsleContext<cranelift_codegen::isa::x64::lower::isle::generated_code::MInst, cranelift_codegen::isa::x64::X64Backend>>::abi_arg_slot_regs
Line
Count
Source
798
15.8M
        fn abi_arg_slot_regs(&mut self, arg: &ABIArg) -> Option<WritableValueRegs> {
799
15.8M
            match arg {
800
15.8M
                &ABIArg::Slots { ref slots, .. } => match slots.len() {
801
                    1 => {
802
15.8M
                        let a = self.temp_writable_reg(slots[0].get_type());
803
15.8M
                        Some(WritableValueRegs::one(a))
804
                    }
805
                    2 => {
806
7.02k
                        let a = self.temp_writable_reg(slots[0].get_type());
807
7.02k
                        let b = self.temp_writable_reg(slots[1].get_type());
808
7.02k
                        Some(WritableValueRegs::two(a, b))
809
                    }
810
0
                    _ => panic!("Expected to see one or two slots only from {:?}", arg),
811
                },
812
0
                _ => None,
813
            }
814
15.8M
        }
815
    };
816
}
817
818
/// This structure is used to implement the ISLE-generated `Context` trait and
819
/// internally has a temporary reference to a machinst `LowerCtx`.
820
pub(crate) struct IsleContext<'a, 'b, I, B>
821
where
822
    I: VCodeInst,
823
    B: LowerBackend,
824
{
825
    pub lower_ctx: &'a mut Lower<'b, I>,
826
    pub backend: &'a B,
827
}