Coverage Report

Created: 2026-03-30 07:00

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/wireshark/epan/dissectors/packet-ipmi-picmg.c
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Source
1
/* packet-ipmi-picmg.c
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 * Sub-dissectors for IPMI messages (netFn=Group, defining body = PICMG)
3
 * Copyright 2007-2008, Alexey Neyman, Pigeon Point Systems <avn@pigeonpoint.com>
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 *
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 * Wireshark - Network traffic analyzer
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 * By Gerald Combs <gerald@wireshark.org>
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 * Copyright 1998 Gerald Combs
8
 *
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 * SPDX-License-Identifier: GPL-2.0-or-later
10
 */
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#include "config.h"
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#include <epan/packet.h>
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#include <epan/tfs.h>
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#include <wsutil/array.h>
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#include "packet-ipmi.h"
19
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void proto_register_ipmi_picmg(void);
21
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static int ett_ipmi_picmg_led_color;
23
static int ett_ipmi_picmg_05_byte1;
24
static int ett_ipmi_picmg_06_byte1;
25
static int ett_ipmi_picmg_06_byte2;
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static int ett_ipmi_picmg_06_byte3;
27
static int ett_ipmi_picmg_link_info;
28
static int ett_ipmi_picmg_08_byte1;
29
static int ett_ipmi_picmg_09_ipmba;
30
static int ett_ipmi_picmg_09_ipmbb;
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static int ett_ipmi_picmg_0a_byte2;
32
static int ett_ipmi_picmg_0a_byte3;
33
static int ett_ipmi_picmg_0b_byte1;
34
static int ett_ipmi_picmg_0f_chan;
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static int ett_ipmi_picmg_12_byte1;
36
static int ett_ipmi_picmg_14_prop;
37
static int ett_ipmi_picmg_1e_byte1;
38
static int ett_ipmi_picmg_21_byte9;
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static int ett_ipmi_picmg_XX_compbits;
40
static int ett_ipmi_picmg_2e_byte2;
41
static int ett_ipmi_picmg_prop00_byte1;
42
static int ett_ipmi_picmg_prop01_byte1;
43
static int ett_ipmi_picmg_34_byte3;
44
static int ett_ipmi_picmg_36_byte2;
45
static int ett_ipmi_picmg_37_byte2;
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static int ett_ipmi_picmg_link_state;
47
static int ett_ipmi_picmg_link_dev;
48
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static int ett_ipmi_picmg_clock_setting;
50
static int ett_ipmi_picmg_clock_res;
51
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static int ett_ipmi_picmg_hpm_caps;
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static int ett_ipmi_picmg_47_byte1;
55
56
static int ett_ipmi_picmg_23_rq_byte2;
57
static int ett_ipmi_picmg_23_rs_byte5;
58
static int ett_ipmi_picmg_25_rs_byte4;
59
static int ett_ipmi_picmg_25_rs_byte5;
60
static int ett_ipmi_picmg_27_rs_byte3;
61
static int ett_ipmi_picmg_28_rq_byte3;
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static int ett_ipmi_picmg_29_rs_byte3;
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static int hf_ipmi_picmg_led_function;
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static int hf_ipmi_picmg_led_on_duration;
66
static int hf_ipmi_picmg_led_color;
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static int hf_ipmi_picmg_linkinfo_grpid;
69
static int hf_ipmi_picmg_linkinfo_type_ext;
70
static int hf_ipmi_picmg_linkinfo_type;
71
static int hf_ipmi_picmg_linkinfo_ports;
72
static int hf_ipmi_picmg_linkinfo_iface;
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static int hf_ipmi_picmg_linkinfo_chan;
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static int hf_ipmi_picmg_linkinfo_state;
75
static int hf_ipmi_picmg_linkinfo;
76
static int hf_ipmi_picmg_linkinfo_amc_chan;
77
static int hf_ipmi_picmg_linkinfo_amc_ports;
78
static int hf_ipmi_picmg_linkinfo_amc_type;
79
static int hf_ipmi_picmg_linkinfo_amc_type_ext;
80
static int hf_ipmi_picmg_linkinfo_amc_grpid;
81
static int hf_ipmi_picmg_linkinfo_state_0;
82
static int hf_ipmi_picmg_linkinfo_state_1;
83
static int hf_ipmi_picmg_linkinfo_dev;
84
static int hf_ipmi_picmg_linkinfo_dev_type;
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static int hf_ipmi_picmg_linkinfo_dev_id;
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static int hf_ipmi_picmg_clock_id;
88
static int hf_ipmi_picmg_clock_cfg;
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static int hf_ipmi_picmg_clock_setting;
90
static int hf_ipmi_picmg_clock_state;
91
static int hf_ipmi_picmg_clock_dir;
92
static int hf_ipmi_picmg_clock_pll;
93
static int hf_ipmi_picmg_clock_family;
94
static int hf_ipmi_picmg_clock_accuracy;
95
static int hf_ipmi_picmg_clock_frequency;
96
static int hf_ipmi_picmg_clock_resource;
97
static int hf_ipmi_picmg_clock_resource_type;
98
static int hf_ipmi_picmg_clock_resource_dev;
99
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static int hf_ipmi_picmg_00_version;
101
static int hf_ipmi_picmg_00_max_fruid;
102
static int hf_ipmi_picmg_00_ipmc_fruid;
103
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static int hf_ipmi_picmg_01_rq_fruid;
105
static int hf_ipmi_picmg_01_rq_addr_key_type;
106
static int hf_ipmi_picmg_01_rq_addr_key;
107
static int hf_ipmi_picmg_01_rq_site_type;
108
static int hf_ipmi_picmg_01_rs_hwaddr;
109
static int hf_ipmi_picmg_01_rs_ipmbaddr;
110
static int hf_ipmi_picmg_01_rs_rsrv;
111
static int hf_ipmi_picmg_01_rs_fruid;
112
static int hf_ipmi_picmg_01_rs_site_num;
113
static int hf_ipmi_picmg_01_rs_site_type;
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static int hf_ipmi_picmg_02_shelf_address;
116
static int hf_ipmi_picmg_02_shelf_type;
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static int hf_ipmi_picmg_02_shelf_length;
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static int hf_ipmi_picmg_03_shelf_address;
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static int hf_ipmi_picmg_03_shelf_type;
121
static int hf_ipmi_picmg_03_shelf_length;
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static int hf_ipmi_picmg_04_fruid;
124
static int hf_ipmi_picmg_04_cmd;
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static int hf_ipmi_picmg_05_fruid;
127
static int hf_ipmi_picmg_05_led3;
128
static int hf_ipmi_picmg_05_led2;
129
static int hf_ipmi_picmg_05_led1;
130
static int hf_ipmi_picmg_05_blue_led;
131
static int hf_ipmi_picmg_05_app_leds;
132
133
static int hf_ipmi_picmg_06_fruid;
134
static int hf_ipmi_picmg_06_ledid;
135
static int hf_ipmi_picmg_06_cap_white;
136
static int hf_ipmi_picmg_06_cap_orange;
137
static int hf_ipmi_picmg_06_cap_amber;
138
static int hf_ipmi_picmg_06_cap_green;
139
static int hf_ipmi_picmg_06_cap_red;
140
static int hf_ipmi_picmg_06_cap_blue;
141
static int hf_ipmi_picmg_06_default_local_color;
142
static int hf_ipmi_picmg_06_default_override_color;
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static int hf_ipmi_picmg_07_fruid;
145
static int hf_ipmi_picmg_07_ledid;
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static int hf_ipmi_picmg_08_fruid;
148
static int hf_ipmi_picmg_08_ledid;
149
static int hf_ipmi_picmg_08_state_lamptest;
150
static int hf_ipmi_picmg_08_state_override;
151
static int hf_ipmi_picmg_08_state_local;
152
static int hf_ipmi_picmg_08_lamptest_duration;
153
154
static int hf_ipmi_picmg_09_ipmba;
155
static int hf_ipmi_picmg_09_ipmba_link;
156
static int hf_ipmi_picmg_09_ipmba_state;
157
static int hf_ipmi_picmg_09_ipmbb;
158
static int hf_ipmi_picmg_09_ipmbb_link;
159
static int hf_ipmi_picmg_09_ipmbb_state;
160
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static int hf_ipmi_picmg_0a_fruid;
162
static int hf_ipmi_picmg_0a_msk_d_locked;
163
static int hf_ipmi_picmg_0a_msk_locked;
164
static int hf_ipmi_picmg_0a_d_locked;
165
static int hf_ipmi_picmg_0a_locked;
166
167
static int hf_ipmi_picmg_0b_fruid;
168
static int hf_ipmi_picmg_0b_d_locked;
169
static int hf_ipmi_picmg_0b_locked;
170
171
static int hf_ipmi_picmg_0c_fruid;
172
static int hf_ipmi_picmg_0c_cmd;
173
174
static int hf_ipmi_picmg_0d_fruid;
175
static int hf_ipmi_picmg_0d_start;
176
static int hf_ipmi_picmg_0d_recordid;
177
178
static int hf_ipmi_picmg_0f_iface;
179
static int hf_ipmi_picmg_0f_chan;
180
181
static int hf_ipmi_picmg_10_fruid;
182
static int hf_ipmi_picmg_10_nslots;
183
static int hf_ipmi_picmg_10_ipmc_loc;
184
185
static int hf_ipmi_picmg_11_fruid;
186
static int hf_ipmi_picmg_11_power_level;
187
static int hf_ipmi_picmg_11_set_to_desired;
188
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static int hf_ipmi_picmg_12_fruid;
190
static int hf_ipmi_picmg_12_pwr_type;
191
static int hf_ipmi_picmg_12_dynamic;
192
static int hf_ipmi_picmg_12_pwr_lvl;
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static int hf_ipmi_picmg_12_delay;
194
static int hf_ipmi_picmg_12_pwr_mult;
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static int hf_ipmi_picmg_12_pwr_draw;
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static int hf_ipmi_picmg_13_fruid;
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static int hf_ipmi_picmg_14_fruid;
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static int hf_ipmi_picmg_14_speed_min;
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static int hf_ipmi_picmg_14_speed_max;
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static int hf_ipmi_picmg_14_speed_norm;
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static int hf_ipmi_picmg_14_local_control;
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static int hf_ipmi_picmg_15_fruid;
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static int hf_ipmi_picmg_15_fan_level;
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static int hf_ipmi_picmg_15_local_enable;
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static int hf_ipmi_picmg_16_fruid;
210
static int hf_ipmi_picmg_16_override_level;
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static int hf_ipmi_picmg_16_local_level;
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static int hf_ipmi_picmg_16_local_enable;
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static int hf_ipmi_picmg_17_cmd;
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static int hf_ipmi_picmg_17_resid;
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static int hf_ipmi_picmg_17_status;
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static int hf_ipmi_picmg_18_li_key_type;
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static int hf_ipmi_picmg_18_li_key;
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static int hf_ipmi_picmg_18_link_num;
221
static int hf_ipmi_picmg_18_sensor_num;
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static int hf_ipmi_picmg_1a_flags;
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static int hf_ipmi_picmg_1b_addr_active;
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static int hf_ipmi_picmg_1b_addr_backup;
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static int hf_ipmi_picmg_1c_fan_site_number;
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static int hf_ipmi_picmg_1c_fan_enable_state;
230
static int hf_ipmi_picmg_1c_fan_policy_timeout;
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static int hf_ipmi_picmg_1c_site_number;
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static int hf_ipmi_picmg_1c_site_type;
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static int hf_ipmi_picmg_1d_fan_site_number;
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static int hf_ipmi_picmg_1d_site_number;
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static int hf_ipmi_picmg_1d_site_type;
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static int hf_ipmi_picmg_1d_policy;
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static int hf_ipmi_picmg_1d_coverage;
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static int hf_ipmi_picmg_1e_fruid;
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static int hf_ipmi_picmg_1e_cap_diagintr;
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static int hf_ipmi_picmg_1e_cap_graceful_reboot;
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static int hf_ipmi_picmg_1e_cap_warm_reset;
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static int hf_ipmi_picmg_1f_rq_fruid;
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static int hf_ipmi_picmg_1f_rq_op;
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static int hf_ipmi_picmg_1f_rq_lockid;
248
static int hf_ipmi_picmg_1f_rs_lockid;
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static int hf_ipmi_picmg_1f_rs_tstamp;
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static int hf_ipmi_picmg_20_fruid;
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static int hf_ipmi_picmg_20_lockid;
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static int hf_ipmi_picmg_20_offset;
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static int hf_ipmi_picmg_20_data;
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static int hf_ipmi_picmg_20_count;
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static int hf_ipmi_picmg_21_addr_num;
258
static int hf_ipmi_picmg_21_tstamp;
259
static int hf_ipmi_picmg_21_addr_count;
260
static int hf_ipmi_picmg_21_site_type;
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static int hf_ipmi_picmg_21_site_num;
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static int hf_ipmi_picmg_21_max_unavail;
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static int hf_ipmi_picmg_21_is_shm;
264
static int hf_ipmi_picmg_21_addr_type;
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static int hf_ipmi_picmg_21_ipaddr;
266
static int hf_ipmi_picmg_21_rmcpport;
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static int hf_ipmi_picmg_22_feed_idx;
269
static int hf_ipmi_picmg_22_update_cnt;
270
static int hf_ipmi_picmg_22_pwr_alloc;
271
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static int hf_ipmi_picmg_XX_comp7;
273
static int hf_ipmi_picmg_XX_comp6;
274
static int hf_ipmi_picmg_XX_comp5;
275
static int hf_ipmi_picmg_XX_comp4;
276
static int hf_ipmi_picmg_XX_comp3;
277
static int hf_ipmi_picmg_XX_comp2;
278
static int hf_ipmi_picmg_XX_comp1;
279
static int hf_ipmi_picmg_XX_comp0;
280
281
static int hf_ipmi_picmg_2e_version;
282
static int hf_ipmi_picmg_2e_upgrade_undesirable;
283
static int hf_ipmi_picmg_2e_auto_rollback_override;
284
static int hf_ipmi_picmg_2e_ipmc_degraded;
285
static int hf_ipmi_picmg_2e_deferred_activate;
286
static int hf_ipmi_picmg_2e_services_affected;
287
static int hf_ipmi_picmg_2e_manual_rollback;
288
static int hf_ipmi_picmg_2e_auto_rollback;
289
static int hf_ipmi_picmg_2e_self_test;
290
static int hf_ipmi_picmg_2e_upgrade_tout;
291
static int hf_ipmi_picmg_2e_selftest_tout;
292
static int hf_ipmi_picmg_2e_rollback_tout;
293
static int hf_ipmi_picmg_2e_inaccessibility_tout;
294
295
static int hf_ipmi_picmg_prop00_cold_reset;
296
static int hf_ipmi_picmg_prop00_deferred_activation;
297
static int hf_ipmi_picmg_prop00_comparison;
298
static int hf_ipmi_picmg_prop00_preparation;
299
static int hf_ipmi_picmg_prop00_rollback;
300
static int hf_ipmi_picmg_prop01_fw_major;
301
static int hf_ipmi_picmg_prop01_fw_minor;
302
static int hf_ipmi_picmg_prop01_fw_aux;
303
static int hf_ipmi_picmg_prop02_desc;
304
305
static int hf_ipmi_picmg_2f_comp_id;
306
static int hf_ipmi_picmg_2f_comp_prop;
307
static int hf_ipmi_picmg_2f_prop_data;
308
309
static int hf_ipmi_picmg_31_action;
310
311
static int hf_ipmi_picmg_32_block;
312
static int hf_ipmi_picmg_32_data;
313
static int hf_ipmi_picmg_32_sec_offs;
314
static int hf_ipmi_picmg_32_sec_len;
315
316
static int hf_ipmi_picmg_33_comp_id;
317
static int hf_ipmi_picmg_33_img_len;
318
319
static int hf_ipmi_picmg_34_cmd;
320
static int hf_ipmi_picmg_34_ccode;
321
static int hf_ipmi_picmg_34_percentage;
322
323
static int hf_ipmi_picmg_35_rollback_override;
324
325
static int hf_ipmi_picmg_36_result;
326
static int hf_ipmi_picmg_36_fail;
327
static int hf_ipmi_picmg_36_fail_sel;
328
static int hf_ipmi_picmg_36_fail_sdr;
329
static int hf_ipmi_picmg_36_fail_bmc_fru;
330
static int hf_ipmi_picmg_36_fail_ipmb_sig;
331
static int hf_ipmi_picmg_36_fail_sdr_empty;
332
static int hf_ipmi_picmg_36_fail_iua;
333
static int hf_ipmi_picmg_36_fail_bb_fw;
334
static int hf_ipmi_picmg_36_fail_oper_fw;
335
336
static int hf_ipmi_picmg_37_percent;
337
338
static int hf_ipmi_picmg_hpm_id;
339
static int hf_ipmi_picmg_hpm_rev;
340
static int hf_ipmi_picmg_hpm2_mask;
341
static int hf_ipmi_picmg_hpm2_caps;
342
static int hf_ipmi_picmg_hpm2_dyn_ssn;
343
static int hf_ipmi_picmg_hpm2_ver_chg;
344
static int hf_ipmi_picmg_hpm2_ext_mgt;
345
static int hf_ipmi_picmg_hpm2_pkt_trc;
346
static int hf_ipmi_picmg_hpm2_sol_ext;
347
static int hf_ipmi_picmg_hpm_oem_start;
348
static int hf_ipmi_picmg_hpm_oem_rev;
349
static int hf_ipmi_picmg_hpm2_sol_oem_start;
350
static int hf_ipmi_picmg_hpm2_sol_oem_rev;
351
static int hf_ipmi_picmg_hpm_cred_hnd;
352
static int hf_ipmi_picmg_hpm_func_sel;
353
static int hf_ipmi_picmg_hpm_ipmi_rev;
354
static int hf_ipmi_picmg_hpm_cipher_id;
355
static int hf_ipmi_picmg_hpm_auth_type;
356
static int hf_ipmi_picmg_hpm_priv_level;
357
static int hf_ipmi_picmg_hpm_chn_num;
358
static int hf_ipmi_picmg_hpm_avail_time;
359
static int hf_ipmi_picmg_hpm_user_name;
360
static int hf_ipmi_picmg_hpm_user_pwd;
361
static int hf_ipmi_picmg_hpm_bmc_key;
362
static int hf_ipmi_picmg_hpm_operation;
363
static int hf_ipmi_picmg_hpm_ssn_hnd;
364
365
static int hf_ipmi_picmg_hpm_power_draw;
366
static int hf_ipmi_picmg_hpm_base_channels;
367
static int hf_ipmi_picmg_hpm_fabric_channels;
368
static int hf_ipmi_picmg_hpm_update_channels;
369
static int hf_ipmi_picmg_hpm_cross_channels;
370
static int hf_ipmi_picmg_hpm_num_chn_desc;
371
static int hf_ipmi_picmg_hpm_chn_mask;
372
373
static int hf_ipmi_picmg_hpm_ext_mgmt_state;
374
static int hf_ipmi_picmg_hpm_polling_period;
375
static int hf_ipmi_picmg_hpm_auth_pwr_state;
376
static int hf_ipmi_picmg_hpm_amc_pwr_state;
377
378
static int hf_ipmi_picmg47_port;
379
static int hf_ipmi_picmg47_flags;
380
static int hf_ipmi_picmg47_assignment;
381
static int hf_ipmi_picmg47_state;
382
static int hf_ipmi_picmg47_instance;
383
384
static int hf_ipmi_picmg48_sub_fru_type;
385
static int hf_ipmi_picmg48_sub_fru_id;
386
static int hf_ipmi_picmg48_ip_source;
387
388
static int hf_ipmi_picmg_23_rq_byte2;
389
static int hf_ipmi_picmg_23_slot_sel;
390
static int hf_ipmi_picmg_23_carrier_num;
391
static int hf_ipmi_picmg_23_slot_num;
392
static int hf_ipmi_picmg_23_tier_num;
393
static int hf_ipmi_picmg_23_rs_byte5;
394
static int hf_ipmi_picmg_23_slot_base;
395
static int hf_ipmi_picmg_23_tier_base;
396
static int hf_ipmi_picmg_23_orientation;
397
static int hf_ipmi_picmg_23_origin_x;
398
static int hf_ipmi_picmg_23_origin_y;
399
400
static int hf_ipmi_picmg_24_channel;
401
static int hf_ipmi_picmg_24_control;
402
static int hf_ipmi_picmg_24_current;
403
static int hf_ipmi_picmg_24_primary_pm;
404
static int hf_ipmi_picmg_24_backup_pm;
405
406
static int hf_ipmi_picmg_25_start;
407
static int hf_ipmi_picmg_25_count;
408
static int hf_ipmi_picmg_25_max;
409
static int hf_ipmi_picmg_25_gstatus;
410
static int hf_ipmi_picmg_25_fault;
411
static int hf_ipmi_picmg_25_pwr_good;
412
static int hf_ipmi_picmg_25_mp_good;
413
static int hf_ipmi_picmg_25_role;
414
static int hf_ipmi_picmg_25_cstatus;
415
static int hf_ipmi_picmg_25_pwr_on;
416
static int hf_ipmi_picmg_25_pwr_ovr;
417
static int hf_ipmi_picmg_25_pwr;
418
static int hf_ipmi_picmg_25_enable;
419
static int hf_ipmi_picmg_25_mp_ovr;
420
static int hf_ipmi_picmg_25_mp;
421
static int hf_ipmi_picmg_25_ps1;
422
423
static int hf_ipmi_picmg_26_pm_site;
424
static int hf_ipmi_picmg_27_rs_byte3;
425
static int hf_ipmi_picmg_27_pm_healthy;
426
static int hf_ipmi_picmg_28_timeout;
427
static int hf_ipmi_picmg_28_rq_byte3;
428
static int hf_ipmi_picmg_28_mch2;
429
static int hf_ipmi_picmg_28_mch1;
430
431
static int hf_ipmi_picmg_29_rs_byte3;
432
static int hf_ipmi_picmg_29_maj_rst;
433
static int hf_ipmi_picmg_29_min_rst;
434
static int hf_ipmi_picmg_29_alarm_cut;
435
static int hf_ipmi_picmg_29_test_mode;
436
static int hf_ipmi_picmg_29_pwr_alarm;
437
static int hf_ipmi_picmg_29_minor_alarm;
438
static int hf_ipmi_picmg_29_major_alarm;
439
static int hf_ipmi_picmg_29_crit_alarm;
440
441
static int hf_ipmi_picmg_2a_alarm_id;
442
static int hf_ipmi_picmg_2a_alarm_ctrl;
443
444
static int hf_ipmi_picmg_2b_alarm_state;
445
446
static const value_string site_type_vals[] = {
447
  { 0x00, "PICMG board" },
448
  { 0x01, "Power Entry" },
449
  { 0x02, "Shelf FRU Information" },
450
  { 0x03, "Dedicated ShMC" },
451
  { 0x04, "Fan Tray / Cooling Unit" },
452
  { 0x05, "Fan Filter Tray" },
453
  { 0x06, "Alarm" },
454
  { 0x07, "AdvancedMC module" },
455
  { 0x08, "PMC" },
456
  { 0x09, "Rear Transition Module" },
457
  { 0x0A, "MicroTCA Carrier Hub" },
458
  { 0x0B, "Power Module" },
459
  { 0xC0, "OEM" },
460
  { 0xC1, "OEM" },
461
  { 0xC2, "OEM" },
462
  { 0xC3, "OEM" },
463
  { 0xC4, "OEM" },
464
  { 0xC5, "OEM" },
465
  { 0xC6, "OEM" },
466
  { 0xC7, "OEM" },
467
  { 0xC8, "OEM" },
468
  { 0xC9, "OEM" },
469
  { 0xCA, "OEM" },
470
  { 0xCB, "OEM" },
471
  { 0xCC, "OEM" },
472
  { 0xCD, "OEM" },
473
  { 0xCE, "OEM" },
474
  { 0xCF, "OEM" },
475
  { 0, NULL }
476
};
477
478
static const value_string addr_key_type_vals[] = {
479
  { 0x00, "Hardware Address" },
480
  { 0x01, "IPMB-0 Address" },
481
  { 0x03, "Physical Address" },
482
  { 0, NULL }
483
};
484
485
static const struct true_false_string set_clear_tfs = {
486
  "Set", "Clear"
487
};
488
489
static const value_string led_color_vals[] = {
490
  { 0x00, "Reserved (Control not supported)" },
491
  { 0x01, "Blue" },
492
  { 0x02, "Red" },
493
  { 0x03, "Green" },
494
  { 0x04, "Amber" },
495
  { 0x05, "Orange" },
496
  { 0x06, "White" },
497
  { 0x0E, "Do not change" },
498
  { 0x0F, "Use default" },
499
  { 0, NULL }
500
};
501
502
static const value_string linkinfo_type_vals[] = {
503
  { 0x01, "PICMG3.0 Base Interface 10/100/1000 BASE-T" },
504
  { 0x02, "PICMG3.1 Ethernet Fabric Interface" },
505
  { 0x03, "PICMG3.2 Infiniband Fabric Interface" },
506
  { 0x04, "PICMG3.3 StarFabric Fabric Interface" },
507
  { 0x05, "PICMG3.4 PCI Express Fabric Interface" },
508
  { 0xf0, "OEM" }, { 0xf1, "OEM" }, { 0xf2, "OEM" }, { 0xf3, "OEM" },
509
  { 0xf4, "OEM" }, { 0xf5, "OEM" }, { 0xf6, "OEM" }, { 0xf7, "OEM" },
510
  { 0xf8, "OEM" }, { 0xf9, "OEM" }, { 0xfa, "OEM" }, { 0xfb, "OEM" },
511
  { 0xfc, "OEM" }, { 0xfd, "OEM" }, { 0xfe, "OEM" },
512
513
  { 0, NULL }
514
};
515
516
static const value_string linkinfo_amc_type_vals[] = {
517
  { 0x02, "AMC.1 PCI Express" },
518
  { 0x03, "AMC.1 PCI Express Advanced Switching" },
519
  { 0x04, "AMC.1 PCI Express Advanced Switching" },
520
  { 0x05, "AMC.2 Ethernet" },
521
  { 0x06, "AMC.3 Serial RapidIO" },
522
  { 0x07, "AMC.3 Storage" },
523
  { 0xf0, "OEM" }, { 0xf1, "OEM" }, { 0xf2, "OEM" }, { 0xf3, "OEM" },
524
  { 0xf4, "OEM" }, { 0xf5, "OEM" }, { 0xf6, "OEM" }, { 0xf7, "OEM" },
525
  { 0xf8, "OEM" }, { 0xf9, "OEM" }, { 0xfa, "OEM" }, { 0xfb, "OEM" },
526
  { 0xfc, "OEM" }, { 0xfd, "OEM" }, { 0xfe, "OEM" },
527
528
  { 0, NULL }
529
};
530
531
static const value_string linkinfo_ports_vals[] = {
532
  { 0x00, "None" },
533
  { 0x01, "0" },
534
  { 0x02, "1" },
535
  { 0x03, "0,1" },
536
  { 0x04, "2" },
537
  { 0x05, "0,2" },
538
  { 0x06, "1,2" },
539
  { 0x07, "0,1,2" },
540
  { 0x08, "3" },
541
  { 0x09, "0,3" },
542
  { 0x0a, "1,3" },
543
  { 0x0b, "0,1,3" },
544
  { 0x0c, "2,3" },
545
  { 0x0d, "0,2,3" },
546
  { 0x0e, "1,2,3" },
547
  { 0x0f, "0,1,2,3" },
548
549
  { 0, NULL }
550
};
551
552
static const value_string linkinfo_iface_vals[] = {
553
  { 0x00, "Base Interface" },
554
  { 0x01, "Fabric Interface" },
555
  { 0x02, "Update Channel Interface" },
556
557
  { 0, NULL }
558
};
559
560
static const value_string busresid_vals[] = {
561
  { 0x00, "Metallic Test Bus #1" },
562
  { 0x01, "Metallic Test Bus #2" },
563
  { 0x02, "Synch clock group #1" },
564
  { 0x03, "Synch clock group #2" },
565
  { 0x04, "Synch clock group #3" },
566
  { 0, NULL }
567
};
568
569
static const value_string fan_level_vals[] = {
570
  { 0xFE, "Shut down" },
571
  { 0xFF, "Local control" },
572
  { 0, NULL }
573
};
574
575
static const value_string enable_vals[] = {
576
  { 0x00, "Disable" },
577
  { 0x01, "Enable" },
578
  { 0, NULL }
579
};
580
581
static const value_string enabled_vals[] = {
582
  { 0x00, "Disabled" },
583
  { 0x01, "Enabled" },
584
  { 0, NULL }
585
};
586
587
static const value_string vals_04_cmd[] = {
588
  { 0x00, "Cold Reset" },
589
  { 0x01, "Warm Reset" },
590
  { 0x02, "Graceful Reboot" },
591
  { 0x03, "Issue Diagnostic Interrupt" },
592
  { 0x04, "Quiesce" },
593
  { 0, NULL }
594
};
595
596
static const value_string vals_0c_cmd[] = {
597
  { 0x00, "Deactivate FRU" },
598
  { 0x01, "Activate FRU" },
599
  { 0, NULL }
600
};
601
602
static const value_string vals_11_set[] = {
603
  { 0x00, "Do not change present levels" },
604
  { 0x01, "Copy desired levels to present levels" },
605
  { 0, NULL }
606
};
607
608
static const value_string vals_12_pwr_type[] = {
609
  { 0x00, "Steady state power draw levels" },
610
  { 0x01, "Desired steady state draw levels" },
611
  { 0x02, "Early power draw levels" },
612
  { 0x03, "Desired early levels" },
613
  { 0, NULL }
614
};
615
616
static const value_string vals_18_keytype[] = {
617
  { 0x00, "Link Info Key contains Link Number" },
618
  { 0x01, "Link Info Key contains Sensor Number" },
619
  { 0, NULL }
620
};
621
622
static const value_string vals_1d_policy[] = {
623
  { 0x00, "Disabled" },
624
  { 0x01, "Enabled" },
625
  { 0xFF, "Indeterminate" },
626
  { 0, NULL }
627
};
628
629
static const value_string vals_1d_coverage[] = {
630
  { 0x00, "Not Covered" },
631
  { 0x01, "Covered" },
632
  { 0, NULL }
633
};
634
635
static const value_string vals_1f_op[] = {
636
  { 0x00, "Get Last Commit Timestamp" },
637
  { 0x01, "Lock" },
638
  { 0x02, "Unlock and Discard" },
639
  { 0x03, "Unlock and Commit" },
640
  { 0, NULL }
641
};
642
643
#if 0
644
static const value_string vals_21_addr_type[] = {
645
  { 0x01, "IPv4" },
646
  { 0x60, "OEM" }, { 0x61, "OEM" }, { 0x62, "OEM" }, { 0x63, "OEM" },
647
  { 0x64, "OEM" }, { 0x65, "OEM" }, { 0x66, "OEM" }, { 0x67, "OEM" },
648
  { 0x68, "OEM" }, { 0x69, "OEM" }, { 0x6a, "OEM" }, { 0x6b, "OEM" },
649
  { 0x6c, "OEM" }, { 0x6d, "OEM" }, { 0x6e, "OEM" }, { 0x6f, "OEM" },
650
  { 0x70, "OEM" }, { 0x71, "OEM" }, { 0x72, "OEM" }, { 0x73, "OEM" },
651
  { 0x74, "OEM" }, { 0x75, "OEM" }, { 0x76, "OEM" }, { 0x77, "OEM" },
652
  { 0x78, "OEM" }, { 0x79, "OEM" }, { 0x7a, "OEM" }, { 0x7b, "OEM" },
653
  { 0x7c, "OEM" }, { 0x7d, "OEM" }, { 0x7e, "OEM" }, { 0x7f, "OEM" },
654
  { 0, NULL }
655
};
656
#endif
657
658
static const value_string vals_prop00_rollback[] = {
659
  { 0x00, "Not supported" },
660
  { 0x01, "Rollback supported, Backup required" },
661
  { 0x02, "Rollback supported, Backup not required" },
662
  { 0, NULL }
663
};
664
665
static const value_string vals_31_action[] = {
666
  { 0x00, "Backup components" },
667
  { 0x01, "Prepare components" },
668
  { 0x02, "Upload for upgrade" },
669
  { 0x03, "Upload for compare" },
670
  { 0, NULL }
671
};
672
673
static const value_string vals_35_override[] = {
674
  { 0x00, "Automatic Rollback allowed" },
675
  { 0x01, "Automatic Rollback override" },
676
  { 0, NULL }
677
};
678
679
static const value_string vals_36_result[] = {
680
  { 0x55, "No error. All Self Tests Passed" },
681
  { 0x56, "Reserved, cannot be used" },
682
  { 0x57, "Corrupted or inaccessible data or devices" },
683
  { 0x58, "Fatal hardware error" },
684
  { 0x60, "Component failure" },
685
  { 0xff, "Reserved" },
686
  { 0, NULL }
687
};
688
689
static const struct true_false_string tfs_36_fail_unknown = {
690
  "Test failed",
691
  "Unknown"
692
};
693
694
/* Get PICMG Properties.
695
 */
696
static void
697
rs00(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
698
0
{
699
0
  proto_tree_add_item(tree, hf_ipmi_picmg_00_version, tvb, 0, 1, ENC_LITTLE_ENDIAN);
700
0
  proto_tree_add_item(tree, hf_ipmi_picmg_00_max_fruid, tvb, 1, 1, ENC_LITTLE_ENDIAN);
701
0
  proto_tree_add_item(tree, hf_ipmi_picmg_00_ipmc_fruid, tvb, 2, 1, ENC_LITTLE_ENDIAN);
702
0
}
703
704
/* Get Address Info Command.
705
 */
706
static void
707
rq01(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
708
0
{
709
0
  if (tvb_captured_length(tvb) > 0) {
710
0
    proto_tree_add_item(tree, hf_ipmi_picmg_01_rq_fruid, tvb, 0, 1, ENC_LITTLE_ENDIAN);
711
0
  }
712
0
  if (tvb_captured_length(tvb) > 1) {
713
0
    proto_tree_add_item(tree, hf_ipmi_picmg_01_rq_addr_key_type, tvb, 1, 1, ENC_LITTLE_ENDIAN);
714
0
  }
715
0
  if (tvb_captured_length(tvb) > 2) {
716
0
    proto_tree_add_item(tree, hf_ipmi_picmg_01_rq_addr_key, tvb, 2, 1, ENC_LITTLE_ENDIAN);
717
0
  }
718
0
  if (tvb_captured_length(tvb) > 3) {
719
0
    proto_tree_add_item(tree, hf_ipmi_picmg_01_rq_site_type, tvb, 3, 1, ENC_LITTLE_ENDIAN);
720
0
  }
721
0
}
722
723
static void
724
rs01(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
725
0
{
726
0
  proto_tree_add_item(tree, hf_ipmi_picmg_01_rs_hwaddr, tvb, 0, 1, ENC_LITTLE_ENDIAN);
727
0
  proto_tree_add_item(tree, hf_ipmi_picmg_01_rs_ipmbaddr, tvb, 1, 1, ENC_LITTLE_ENDIAN);
728
0
  proto_tree_add_item(tree, hf_ipmi_picmg_01_rs_rsrv, tvb, 2, 1, ENC_LITTLE_ENDIAN);
729
0
  proto_tree_add_item(tree, hf_ipmi_picmg_01_rs_fruid, tvb, 3, 1, ENC_LITTLE_ENDIAN);
730
0
  proto_tree_add_item(tree, hf_ipmi_picmg_01_rs_site_num, tvb, 4, 1, ENC_LITTLE_ENDIAN);
731
0
  proto_tree_add_item(tree, hf_ipmi_picmg_01_rs_site_type, tvb, 5, 1, ENC_LITTLE_ENDIAN);
732
  /* TBD Next byte is carrier number in MTCA */
733
0
}
734
735
/* Get Shelf Address Info
736
 */
737
static void
738
rs02(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree)
739
0
{
740
0
  ipmi_add_typelen(pinfo, tree, hf_ipmi_picmg_02_shelf_address, hf_ipmi_picmg_02_shelf_type, hf_ipmi_picmg_02_shelf_length, tvb, 0, true);
741
0
}
742
743
/* Set Shelf Address Info
744
 */
745
static void
746
rq03(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree)
747
0
{
748
0
  ipmi_add_typelen(pinfo, tree, hf_ipmi_picmg_03_shelf_address, hf_ipmi_picmg_03_shelf_type, hf_ipmi_picmg_03_shelf_length, tvb, 0, true);
749
0
}
750
751
/* FRU Control.
752
 */
753
static void
754
rq04(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
755
0
{
756
0
  proto_tree_add_item(tree, hf_ipmi_picmg_04_fruid, tvb, 0, 1, ENC_LITTLE_ENDIAN);
757
0
  proto_tree_add_item(tree, hf_ipmi_picmg_04_cmd, tvb, 1, 1, ENC_LITTLE_ENDIAN);
758
0
}
759
760
/* Get FRU LED Properties
761
 */
762
static void
763
rq05(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
764
0
{
765
0
  proto_tree_add_item(tree, hf_ipmi_picmg_05_fruid, tvb, 0, 1, ENC_LITTLE_ENDIAN);
766
0
}
767
768
static void
769
rs05(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
770
0
{
771
0
  static int * const byte1[] = { &hf_ipmi_picmg_05_led3, &hf_ipmi_picmg_05_led2,
772
0
    &hf_ipmi_picmg_05_led1, &hf_ipmi_picmg_05_blue_led, NULL };
773
774
0
  proto_tree_add_bitmask_text(tree, tvb, 0, 1, "General Status LEDs: ", "None",
775
0
      ett_ipmi_picmg_05_byte1, byte1, ENC_LITTLE_ENDIAN, 0);
776
0
  proto_tree_add_item(tree, hf_ipmi_picmg_05_app_leds, tvb, 1, 1, ENC_LITTLE_ENDIAN);
777
0
}
778
779
/* Get LED Color Capabilities
780
 */
781
static void
782
rq06(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
783
0
{
784
0
  proto_tree_add_item(tree, hf_ipmi_picmg_06_fruid, tvb, 0, 1, ENC_LITTLE_ENDIAN);
785
0
  proto_tree_add_item(tree, hf_ipmi_picmg_06_ledid, tvb, 1, 1, ENC_LITTLE_ENDIAN);
786
0
}
787
788
static void
789
rs06(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
790
0
{
791
0
  static int * const byte1[] = { &hf_ipmi_picmg_06_cap_white, &hf_ipmi_picmg_06_cap_orange,
792
0
    &hf_ipmi_picmg_06_cap_amber, &hf_ipmi_picmg_06_cap_green, &hf_ipmi_picmg_06_cap_red,
793
0
    &hf_ipmi_picmg_06_cap_blue, NULL };
794
0
  static int * const byte2[] = { &hf_ipmi_picmg_06_default_local_color, NULL };
795
0
  static int * const byte3[] = { &hf_ipmi_picmg_06_default_override_color, NULL };
796
797
0
  proto_tree_add_bitmask_text(tree, tvb, 0, 1, "Color capabilities: ", "None",
798
0
      ett_ipmi_picmg_06_byte1, byte1, ENC_LITTLE_ENDIAN, 0);
799
0
  proto_tree_add_bitmask_text(tree, tvb, 1, 1, NULL, NULL,
800
0
      ett_ipmi_picmg_06_byte2, byte2, ENC_LITTLE_ENDIAN, 0);
801
0
  proto_tree_add_bitmask_text(tree, tvb, 2, 1, NULL, NULL,
802
0
      ett_ipmi_picmg_06_byte3, byte3, ENC_LITTLE_ENDIAN, 0);
803
0
}
804
805
static void
806
parse_led_state(proto_tree *tree, packet_info* pinfo, tvbuff_t *tvb, unsigned offs, const char *desc)
807
0
{
808
0
  static int * const color[] = { &hf_ipmi_picmg_led_color, NULL };
809
0
  static const value_string funcs[] = {
810
0
    { 0x00, "LED Off override" },
811
0
    { 0xfb, "Lamp Test state" },
812
0
    { 0xfc, "Restore Local Control" },
813
0
    { 0xfd, "Reserved" },
814
0
    { 0xfe, "Reserved" },
815
0
    { 0xff, "LED On override" },
816
0
    { 0, NULL }
817
0
  };
818
0
  proto_item *ti;
819
0
  uint8_t v;
820
821
0
  v = tvb_get_uint8(tvb, offs);
822
0
  proto_tree_add_uint_format(tree, hf_ipmi_picmg_led_function, tvb, offs, 1,
823
0
      v, "%sFunction: %s (0x%02x)", desc,
824
0
      val_to_str(pinfo->pool, v, funcs, "LED Blinking override, off-duration %d0ms"),
825
0
      v);
826
0
  v = tvb_get_uint8(tvb, offs + 1);
827
0
  proto_tree_add_uint_format(tree, hf_ipmi_picmg_led_on_duration, tvb, offs + 1, 1,
828
0
      v, "%sOn-duration: %d0ms", desc, v);
829
0
  v = tvb_get_uint8(tvb, offs + 2) & 0x0f;
830
0
  ti = proto_tree_add_bitmask_text(tree, tvb, offs + 2, 1,
831
0
      NULL, NULL, ett_ipmi_picmg_led_color, color, ENC_LITTLE_ENDIAN, 0);
832
0
  proto_item_set_text(ti, "%sColor: %s", desc, val_to_str_const(v, led_color_vals, "Reserved"));
833
0
}
834
835
/* Set FRU LED State
836
 */
837
static void
838
rq07(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree)
839
0
{
840
0
  proto_tree_add_item(tree, hf_ipmi_picmg_07_fruid, tvb, 0, 1, ENC_LITTLE_ENDIAN);
841
0
  proto_tree_add_item(tree, hf_ipmi_picmg_07_ledid, tvb, 1, 1, ENC_LITTLE_ENDIAN);
842
0
  parse_led_state(tree, pinfo, tvb, 2, "");
843
0
}
844
845
/* Get FRU LED State
846
 */
847
static void
848
rq08(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
849
0
{
850
0
  proto_tree_add_item(tree, hf_ipmi_picmg_08_fruid, tvb, 0, 1, ENC_LITTLE_ENDIAN);
851
0
  proto_tree_add_item(tree, hf_ipmi_picmg_08_ledid, tvb, 1, 1, ENC_LITTLE_ENDIAN);
852
0
}
853
854
static void
855
rs08(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree)
856
0
{
857
0
  static int * const byte1[] = { &hf_ipmi_picmg_08_state_lamptest, &hf_ipmi_picmg_08_state_override,
858
0
    &hf_ipmi_picmg_08_state_local, NULL };
859
860
0
  proto_tree_add_bitmask_text(tree, tvb, 0, 1, "LED States: ", "None",
861
0
      ett_ipmi_picmg_08_byte1, byte1, ENC_LITTLE_ENDIAN, 0);
862
0
  parse_led_state(tree, pinfo, tvb, 1, "Local Control ");
863
0
  if (tvb_captured_length(tvb) > 4) {
864
0
    parse_led_state(tree, pinfo, tvb, 4, "Override ");
865
0
  }
866
0
  if (tvb_captured_length(tvb) > 7) {
867
0
    proto_tree_add_item(tree, hf_ipmi_picmg_08_lamptest_duration, tvb, 7, 1, ENC_LITTLE_ENDIAN);
868
0
  }
869
0
}
870
871
/* Set IPMB State
872
 */
873
static const true_false_string tfs_local_control_override = { "Local Control State", "Override State (Isolate)" };
874
875
static void
876
parse_ipmb_state(proto_tree *tree, tvbuff_t *tvb, unsigned offs, int hf, int hf_link, int hf_state, int ett)
877
0
{
878
0
  char buf[32];
879
0
  const char *desc;
880
0
  proto_tree *s_tree;
881
0
  proto_item *ti;
882
0
  uint8_t v, num;
883
884
0
  v = tvb_get_uint8(tvb, offs);
885
0
  if (v == 0xff) {
886
0
    proto_tree_add_uint_format_value(tree, hf, tvb, 0, 1,
887
0
        v, "Don't change (0xff)");
888
0
  } else {
889
0
    num = v >> 1;
890
0
    if (!num) {
891
0
      desc = "All Links";
892
0
    } else if (num < 0x60) {
893
0
      snprintf(buf, sizeof(buf), "Link #%d", num);
894
0
      desc = buf;
895
0
    } else {
896
0
      desc = "Reserved";
897
0
    }
898
0
    ti = proto_tree_add_uint_format_value(tree, hf, tvb, 0, 1,
899
0
        v, "%s, %s", desc, (v & 1) ? "Local Control" : "Override");
900
0
    s_tree = proto_item_add_subtree(ti, ett);
901
0
    proto_tree_add_uint_format_value(s_tree, hf_link, tvb, 0, 1, v, "%s (0x%02x)",
902
0
        desc, num);
903
0
    proto_tree_add_item(s_tree, hf_state, tvb, 0, 1, ENC_NA);
904
0
  }
905
0
}
906
907
static void
908
rq09(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
909
0
{
910
0
  parse_ipmb_state(tree, tvb, 0, hf_ipmi_picmg_09_ipmba, hf_ipmi_picmg_09_ipmba_link, hf_ipmi_picmg_09_ipmba_state, ett_ipmi_picmg_09_ipmba);
911
0
  parse_ipmb_state(tree, tvb, 1, hf_ipmi_picmg_09_ipmbb, hf_ipmi_picmg_09_ipmbb_link, hf_ipmi_picmg_09_ipmbb_state, ett_ipmi_picmg_09_ipmbb);
912
0
}
913
914
/* Set FRU Activation Policy
915
 */
916
static void
917
rq0a(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
918
0
{
919
0
  static int * const byte2[] = { &hf_ipmi_picmg_0a_msk_d_locked, &hf_ipmi_picmg_0a_msk_locked, NULL };
920
0
  static int * const byte3[] = { &hf_ipmi_picmg_0a_d_locked, &hf_ipmi_picmg_0a_locked, NULL };
921
922
0
  proto_tree_add_item(tree, hf_ipmi_picmg_0a_fruid, tvb, 0, 1, ENC_LITTLE_ENDIAN);
923
0
  proto_tree_add_bitmask_text(tree, tvb, 1, 1, "Will affect bits: ", "None",
924
0
      ett_ipmi_picmg_0a_byte2, byte2, ENC_LITTLE_ENDIAN, BMT_NO_TFS);
925
0
  proto_tree_add_bitmask_text(tree, tvb, 2, 1, "Activation Policy Set Bits: ", NULL,
926
0
      ett_ipmi_picmg_0a_byte3, byte3, ENC_LITTLE_ENDIAN, 0);
927
0
}
928
929
/* Get FRU Activation Policy
930
 */
931
static void
932
rq0b(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
933
0
{
934
0
  proto_tree_add_item(tree, hf_ipmi_picmg_0b_fruid, tvb, 0, 1, ENC_LITTLE_ENDIAN);
935
0
}
936
937
static void
938
rs0b(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
939
0
{
940
0
  static int * const byte1[] = { &hf_ipmi_picmg_0b_d_locked, &hf_ipmi_picmg_0b_locked, NULL };
941
942
0
  proto_tree_add_bitmask_text(tree, tvb, 0, 1, "Activation Policy Bits: ", NULL,
943
0
      ett_ipmi_picmg_0b_byte1, byte1, ENC_LITTLE_ENDIAN, 0);
944
0
}
945
946
947
/* Set FRU Activation
948
 */
949
static void
950
rq0c(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
951
0
{
952
0
  proto_tree_add_item(tree, hf_ipmi_picmg_0c_fruid, tvb, 0, 1, ENC_LITTLE_ENDIAN);
953
0
  proto_tree_add_item(tree, hf_ipmi_picmg_0c_cmd, tvb, 1, 1, ENC_LITTLE_ENDIAN);
954
0
}
955
956
/* Get Device Locator Record ID
957
 */
958
static void
959
rq0d(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
960
0
{
961
0
  proto_tree_add_item(tree, hf_ipmi_picmg_0d_fruid, tvb, 0, 1, ENC_LITTLE_ENDIAN);
962
0
  if (tvb_captured_length(tvb) > 1) {
963
0
    proto_tree_add_item(tree, hf_ipmi_picmg_0d_start, tvb, 1, 2, ENC_LITTLE_ENDIAN);
964
0
  }
965
0
}
966
967
static void
968
rs0d(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
969
0
{
970
0
  proto_tree_add_item(tree, hf_ipmi_picmg_0d_recordid, tvb, 0, 2, ENC_LITTLE_ENDIAN);
971
0
}
972
973
static void
974
parse_link_info_state(proto_tree *tree, tvbuff_t *tvb, unsigned offs, const char *num, const value_string *vs)
975
0
{
976
0
  static int * const link_info[] = { &hf_ipmi_picmg_linkinfo_grpid, &hf_ipmi_picmg_linkinfo_type_ext,
977
0
    &hf_ipmi_picmg_linkinfo_type, &hf_ipmi_picmg_linkinfo_ports, &hf_ipmi_picmg_linkinfo_iface,
978
0
    &hf_ipmi_picmg_linkinfo_chan, NULL };
979
0
  uint8_t v = tvb_get_uint8(tvb, offs + 4);
980
0
  char buf[32];
981
982
0
  snprintf(buf, sizeof(buf), "Link info%s: ", num);
983
0
  proto_tree_add_bitmask_text(tree, tvb, offs, 4, buf, NULL,
984
0
      ett_ipmi_picmg_link_info, link_info, ENC_LITTLE_ENDIAN, 0);
985
0
  proto_tree_add_uint_format(tree, hf_ipmi_picmg_linkinfo_state, tvb, offs + 4, 1,
986
0
      v, "State%s: %s (0x%02x)", num, val_to_str_const(v, vs, "Reserved"), v);
987
0
}
988
989
/* Set Port State
990
 */
991
static void
992
rq0e(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
993
0
{
994
0
  static const value_string state_vals[] = {
995
0
    { 0x00, "Disable" },
996
0
    { 0x01, "Enable" },
997
0
    { 0, NULL }
998
0
  };
999
1000
0
  parse_link_info_state(tree, tvb, 0, "", state_vals);
1001
0
}
1002
1003
/* Get Port State
1004
 */
1005
static void
1006
rq0f(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1007
0
{
1008
0
  static int * const chan[] = { &hf_ipmi_picmg_0f_iface, &hf_ipmi_picmg_0f_chan, NULL };
1009
1010
0
  proto_tree_add_bitmask_text(tree, tvb, 0, 1, NULL, NULL, ett_ipmi_picmg_0f_chan, chan, ENC_LITTLE_ENDIAN, 0);
1011
0
  if (tvb_captured_length(tvb) > 1) {
1012
0
    proto_tree_add_item(tree, hf_ipmi_picmg_1a_flags, tvb, 1, 1, ENC_LITTLE_ENDIAN);
1013
0
  }
1014
0
}
1015
1016
static void
1017
rs0f(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1018
0
{
1019
0
  static const value_string state_vals[] = {
1020
0
    { 0x00, "Disabled" },
1021
0
    { 0x01, "Enabled" },
1022
0
    { 0x02, "Disabled, Extended Inactive State Link" },
1023
0
    { 0x03, "Enabled, Extended Inactive State Link" },
1024
0
    { 0, NULL }
1025
0
  };
1026
1027
0
  if (tvb_captured_length(tvb) > 0) {
1028
0
    parse_link_info_state(tree, tvb, 0, " 1", state_vals);
1029
0
  }
1030
0
  if (tvb_captured_length(tvb) > 5) {
1031
0
    parse_link_info_state(tree, tvb, 5, " 2", state_vals);
1032
0
  }
1033
0
  if (tvb_captured_length(tvb) > 10) {
1034
0
    parse_link_info_state(tree, tvb, 10, " 3", state_vals);
1035
0
  }
1036
0
  if (tvb_captured_length(tvb) > 15) {
1037
0
    parse_link_info_state(tree, tvb, 15, " 4", state_vals);
1038
0
  }
1039
0
}
1040
1041
/* Compute Power Properties
1042
 */
1043
static void
1044
rq10(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1045
0
{
1046
0
  proto_tree_add_item(tree, hf_ipmi_picmg_10_fruid, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1047
0
}
1048
1049
static void
1050
rs10(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1051
0
{
1052
0
  proto_tree_add_item(tree, hf_ipmi_picmg_10_nslots, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1053
0
  proto_tree_add_item(tree, hf_ipmi_picmg_10_ipmc_loc, tvb, 1, 1, ENC_LITTLE_ENDIAN);
1054
0
}
1055
1056
/* Set Power Level
1057
 */
1058
static void
1059
rq11(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1060
0
{
1061
0
  static const value_string plvl_vals[] = {
1062
0
    { 0x00, "Power Off" },
1063
0
    { 0xff, "Do not change" },
1064
0
    { 0, NULL }
1065
0
  };
1066
0
  uint8_t v = tvb_get_uint8(tvb, 1);
1067
1068
0
  proto_tree_add_item(tree, hf_ipmi_picmg_11_fruid, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1069
0
  proto_tree_add_uint_format_value(tree, hf_ipmi_picmg_11_power_level, tvb, 1, 1,
1070
0
      v, "%s", val_to_str(pinfo->pool, v, plvl_vals, "Power Level %d"));
1071
0
  proto_tree_add_item(tree, hf_ipmi_picmg_11_set_to_desired, tvb, 2, 1, ENC_LITTLE_ENDIAN);
1072
0
}
1073
1074
/* Get Power Level
1075
 */
1076
static void
1077
rq12(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1078
0
{
1079
0
  proto_tree_add_item(tree, hf_ipmi_picmg_12_fruid, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1080
0
  proto_tree_add_item(tree, hf_ipmi_picmg_12_pwr_type, tvb, 1, 1, ENC_LITTLE_ENDIAN);
1081
0
}
1082
1083
static void
1084
rs12(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1085
0
{
1086
0
  static int * const byte1[] = { &hf_ipmi_picmg_12_dynamic, &hf_ipmi_picmg_12_pwr_lvl, NULL };
1087
0
  uint8_t v, v2;
1088
0
  uint32_t tmp, max;
1089
1090
0
  proto_tree_add_bitmask_text(tree, tvb, 0, 1, NULL, NULL, ett_ipmi_picmg_12_byte1, byte1, ENC_LITTLE_ENDIAN, BMT_NO_FALSE);
1091
0
  proto_tree_add_item(tree, hf_ipmi_picmg_12_delay, tvb, 1, 1, ENC_LITTLE_ENDIAN);
1092
0
  v = tvb_get_uint8(tvb, 2);
1093
0
  proto_tree_add_uint_format_value(tree, hf_ipmi_picmg_12_pwr_mult, tvb, 2, 1,
1094
0
      v, "%d.%dW", v / 10, v % 10);
1095
0
  max = tvb_captured_length(tvb) - 3;
1096
0
  if (max == 0) {
1097
0
    max = 1; /* One byte is mandatory */
1098
0
  } else if (max > 20) {
1099
0
    max = 20; /* 20 levels at most */
1100
0
  }
1101
0
  for (unsigned i = 1; i <= max; i++) {
1102
0
    v2 = tvb_get_uint8(tvb, 2 + i);
1103
0
    tmp = (unsigned)v2 * v;
1104
0
    proto_tree_add_uint_format(tree, hf_ipmi_picmg_12_pwr_draw, tvb, 2 + i, 1,
1105
0
        v2, "Power Draw [%d]: %d.%dW (0x%02x)", i,
1106
0
        tmp / 10, tmp % 10, v2);
1107
1108
0
  }
1109
0
}
1110
1111
/* Renegotiate Power
1112
 */
1113
static void
1114
rq13(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1115
0
{
1116
0
  if (tvb_captured_length(tvb) > 0) {
1117
0
    proto_tree_add_item(tree, hf_ipmi_picmg_13_fruid, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1118
0
  }
1119
0
}
1120
1121
/* Get Fan Speed Properties
1122
 */
1123
static void
1124
rq14(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1125
0
{
1126
0
  proto_tree_add_item(tree, hf_ipmi_picmg_14_fruid, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1127
0
}
1128
1129
static void
1130
rs14(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1131
0
{
1132
0
  static int * const prop[] = { &hf_ipmi_picmg_14_local_control, NULL };
1133
1134
0
  proto_tree_add_item(tree, hf_ipmi_picmg_14_speed_min, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1135
0
  proto_tree_add_item(tree, hf_ipmi_picmg_14_speed_max, tvb, 1, 1, ENC_LITTLE_ENDIAN);
1136
0
  proto_tree_add_item(tree, hf_ipmi_picmg_14_speed_norm, tvb, 2, 1, ENC_LITTLE_ENDIAN);
1137
0
  proto_tree_add_bitmask_text(tree, tvb, 3, 1, "Fan Tray Properties: ", "None",
1138
0
      ett_ipmi_picmg_14_prop, prop, ENC_LITTLE_ENDIAN, 0);
1139
0
}
1140
1141
/* Set Fan Level
1142
 */
1143
static void
1144
rq15(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1145
0
{
1146
0
  uint8_t v = tvb_get_uint8(tvb, 1);
1147
1148
0
  proto_tree_add_item(tree, hf_ipmi_picmg_15_fruid, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1149
0
  proto_tree_add_uint_format_value(tree, hf_ipmi_picmg_15_fan_level, tvb, 1, 1,
1150
0
      v, "%s", val_to_str(pinfo->pool, v, fan_level_vals, "%d"));
1151
0
  if (tvb_captured_length(tvb) > 2) {
1152
0
    proto_tree_add_item(tree, hf_ipmi_picmg_15_local_enable, tvb, 2, 1, ENC_LITTLE_ENDIAN);
1153
0
  }
1154
0
}
1155
1156
/* Get Fan Level
1157
 */
1158
static void
1159
rq16(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1160
0
{
1161
0
  proto_tree_add_item(tree, hf_ipmi_picmg_16_fruid, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1162
0
}
1163
1164
static void
1165
rs16(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1166
0
{
1167
0
  uint8_t v;
1168
1169
0
  v = tvb_get_uint8(tvb, 0);
1170
0
  proto_tree_add_uint_format_value(tree, hf_ipmi_picmg_16_override_level, tvb, 0, 1,
1171
0
      v, "%s", val_to_str(pinfo->pool, v, fan_level_vals, "%d"));
1172
0
  if (tvb_captured_length(tvb) > 1) {
1173
0
    proto_tree_add_item(tree, hf_ipmi_picmg_16_local_level, tvb, 1, 1, ENC_LITTLE_ENDIAN);
1174
0
  }
1175
0
  if (tvb_captured_length(tvb) > 2) {
1176
0
    proto_tree_add_item(tree, hf_ipmi_picmg_16_local_enable, tvb, 2, 1, ENC_LITTLE_ENDIAN);
1177
0
  }
1178
0
}
1179
1180
/* Bused Resource Control
1181
 */
1182
static void
1183
rq17(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1184
0
{
1185
0
  static const value_string vals_17_cmd_fromshmm[] = {
1186
0
    { 0x00, "Query" },
1187
0
    { 0x01, "Release" },
1188
0
    { 0x02, "Force" },
1189
0
    { 0x03, "Bus Free" },
1190
0
    { 0, NULL }
1191
0
  };
1192
0
  static const value_string vals_17_cmd_toshmm[] = {
1193
0
    { 0x00, "Request" },
1194
0
    { 0x01, "Relinquish" },
1195
0
    { 0x02, "Notify" },
1196
0
    { 0, NULL }
1197
0
  };
1198
0
  unsigned cmd = tvb_get_uint8(tvb, 0);
1199
0
  const ipmi_header_t *header = ipmi_get_hdr(pinfo);
1200
0
  if (header == NULL)
1201
0
    return;
1202
1203
0
  unsigned to_shmm = header->rs_sa == 0x20;
1204
1205
0
  ipmi_set_data(pinfo, 0, (to_shmm << 8) | cmd);
1206
1207
0
  if (!tree) {
1208
0
    return;
1209
0
  }
1210
1211
0
  proto_tree_add_uint_format_value(tree, hf_ipmi_picmg_17_cmd, tvb, 0, 1,
1212
0
        cmd, "%s (0x%02x)",
1213
0
        val_to_str_const(cmd,
1214
0
             to_shmm ? vals_17_cmd_toshmm : vals_17_cmd_fromshmm,
1215
0
             "Reserved"),
1216
0
        cmd);
1217
0
  proto_tree_add_item(tree, hf_ipmi_picmg_17_resid, tvb, 1, 1, ENC_LITTLE_ENDIAN);
1218
0
}
1219
1220
static void
1221
rs17(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1222
0
{
1223
  /* Key is 3 bytes: direction, command, status */
1224
0
  static const value_string response_vals[] = {
1225
0
    { 0x000000, "In Control" },
1226
0
    { 0x000001, "No Control" },
1227
0
    { 0x000100, "Ack" },
1228
0
    { 0x000101, "Refused" },
1229
0
    { 0x000102, "No Control" },
1230
0
    { 0x000200, "Ack" },
1231
0
    { 0x000201, "No Control" },
1232
0
    { 0x000300, "Accept" },
1233
0
    { 0x000301, "Not Needed" },
1234
0
    { 0x010000, "Grant" },
1235
0
    { 0x010001, "Busy" },
1236
0
    { 0x010002, "Defer" },
1237
0
    { 0x010003, "Deny" },
1238
0
    { 0x010100, "Ack" },
1239
0
    { 0x010101, "Error" },
1240
0
    { 0x010200, "Ack" },
1241
0
    { 0x010201, "Error" },
1242
0
    { 0x010202, "Deny" },
1243
0
    { 0, NULL }
1244
0
  };
1245
0
  uint32_t val;
1246
0
  uint8_t status;
1247
1248
0
  if (!ipmi_get_data(pinfo, 0, &val)) {
1249
    /* Without knowing the command, we cannot decipher the response */
1250
0
    proto_tree_add_item(tree, hf_ipmi_picmg_17_status, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1251
0
    return;
1252
0
  }
1253
1254
0
  status = tvb_get_uint8(tvb, 0);
1255
0
  val = (val << 8) | status;
1256
0
  proto_tree_add_uint_format_value(tree, hf_ipmi_picmg_17_status, tvb, 0, 1,
1257
0
      status, "%s (0x%02x)", val_to_str_const(val, response_vals, "Reserved"), status);
1258
0
}
1259
1260
/* Get IPMB Link Info
1261
 */
1262
static void
1263
rq18(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1264
0
{
1265
0
  proto_tree_add_item(tree, hf_ipmi_picmg_18_li_key_type, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1266
0
  proto_tree_add_item(tree, hf_ipmi_picmg_18_li_key, tvb, 1, 1, ENC_LITTLE_ENDIAN);
1267
0
}
1268
1269
static void
1270
rs18(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1271
0
{
1272
0
  proto_tree_add_item(tree, hf_ipmi_picmg_18_link_num, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1273
0
  proto_tree_add_item(tree, hf_ipmi_picmg_18_sensor_num, tvb, 1, 1, ENC_LITTLE_ENDIAN);
1274
0
}
1275
1276
static void
1277
parse_amc_link_info_state(proto_tree *tree, tvbuff_t *tvb, unsigned offs)
1278
0
{
1279
0
  static int * const amc_link_info[] = {
1280
0
      &hf_ipmi_picmg_linkinfo_amc_ports,
1281
0
      &hf_ipmi_picmg_linkinfo_amc_type,
1282
0
      &hf_ipmi_picmg_linkinfo_amc_type_ext,
1283
0
      &hf_ipmi_picmg_linkinfo_amc_grpid,
1284
0
      NULL };
1285
0
  static int * const amc_link_state[] = {
1286
0
      &hf_ipmi_picmg_linkinfo_state_0,
1287
0
      &hf_ipmi_picmg_linkinfo_state_1,
1288
0
      NULL };
1289
1290
0
  proto_tree_add_bitmask(tree, tvb, offs, hf_ipmi_picmg_linkinfo,
1291
0
      ett_ipmi_picmg_link_info, amc_link_info, ENC_LITTLE_ENDIAN);
1292
0
  proto_tree_add_bitmask(tree, tvb, offs + 3, hf_ipmi_picmg_linkinfo_state,
1293
0
      ett_ipmi_picmg_link_state, amc_link_state, ENC_LITTLE_ENDIAN);
1294
0
}
1295
1296
static int * const amc_link_dev[] = {
1297
    &hf_ipmi_picmg_linkinfo_dev_id,
1298
    NULL };
1299
1300
/* Set AMC Port State
1301
 */
1302
static void
1303
rq19(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1304
0
{
1305
0
  proto_tree_add_item(tree, hf_ipmi_picmg_linkinfo_amc_chan, tvb, 0, 1,
1306
0
      ENC_LITTLE_ENDIAN);
1307
0
  parse_amc_link_info_state(tree, tvb, 1);
1308
0
  if (tvb_captured_length(tvb) > 5) {
1309
0
    proto_tree_add_bitmask(tree, tvb, 5, hf_ipmi_picmg_linkinfo_dev,
1310
0
        ett_ipmi_picmg_link_dev, amc_link_dev, ENC_LITTLE_ENDIAN);
1311
0
  }
1312
0
}
1313
1314
/* Get AMC Port State
1315
 */
1316
static void
1317
rq1a(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1318
0
{
1319
0
  proto_tree_add_item(tree, hf_ipmi_picmg_linkinfo_amc_chan, tvb, 0, 1,
1320
0
      ENC_LITTLE_ENDIAN);
1321
0
  if (tvb_captured_length(tvb) > 1) {
1322
0
    proto_tree_add_bitmask(tree, tvb, 1, hf_ipmi_picmg_linkinfo_dev,
1323
0
        ett_ipmi_picmg_link_state, amc_link_dev, ENC_LITTLE_ENDIAN);
1324
0
  }
1325
0
  if (tvb_captured_length(tvb) > 2) {
1326
0
    proto_tree_add_item(tree, hf_ipmi_picmg_1a_flags, tvb, 2, 1, ENC_LITTLE_ENDIAN);
1327
0
  }
1328
0
}
1329
1330
static void
1331
rs1a(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1332
0
{
1333
0
  unsigned len = tvb_captured_length(tvb);
1334
0
  if (len > 0) {
1335
0
    parse_amc_link_info_state(tree, tvb, 0);
1336
0
  }
1337
0
  if (len > 4) {
1338
0
    parse_amc_link_info_state(tree, tvb, 4);
1339
0
  }
1340
0
  if (len > 8) {
1341
0
    parse_amc_link_info_state(tree, tvb, 8);
1342
0
  }
1343
0
  if (len > 12) {
1344
0
    parse_amc_link_info_state(tree, tvb, 12);
1345
0
  }
1346
0
}
1347
1348
/* Get Shelf Manager IPMB Address
1349
 */
1350
static void
1351
rs1b(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1352
0
{
1353
0
  proto_tree_add_item(tree, hf_ipmi_picmg_1b_addr_active, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1354
0
  proto_tree_add_item(tree, hf_ipmi_picmg_1b_addr_backup, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1355
0
}
1356
1357
/* Set Fan Policy
1358
 */
1359
static void
1360
rq1c(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1361
0
{
1362
0
  proto_tree_add_item(tree, hf_ipmi_picmg_1c_fan_site_number, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1363
0
  proto_tree_add_item(tree, hf_ipmi_picmg_1c_fan_enable_state, tvb, 1, 1, ENC_LITTLE_ENDIAN);
1364
0
  proto_tree_add_item(tree, hf_ipmi_picmg_1c_fan_policy_timeout, tvb, 2, 1, ENC_LITTLE_ENDIAN);
1365
0
  if (tvb_captured_length(tvb) > 3) {
1366
0
    proto_tree_add_item(tree, hf_ipmi_picmg_1c_site_number, tvb, 3, 1, ENC_LITTLE_ENDIAN);
1367
0
    proto_tree_add_item(tree, hf_ipmi_picmg_1c_site_type, tvb, 4, 1, ENC_LITTLE_ENDIAN);
1368
0
  }
1369
0
}
1370
1371
/* Get Fan Policy
1372
 */
1373
static void
1374
rq1d(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1375
0
{
1376
0
  proto_tree_add_item(tree, hf_ipmi_picmg_1d_fan_site_number, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1377
0
  if (tvb_captured_length(tvb) > 1) {
1378
0
    proto_tree_add_item(tree, hf_ipmi_picmg_1d_site_number, tvb, 1, 1, ENC_LITTLE_ENDIAN);
1379
0
    proto_tree_add_item(tree, hf_ipmi_picmg_1d_site_type, tvb, 2, 1, ENC_LITTLE_ENDIAN);
1380
0
  }
1381
0
}
1382
1383
static void
1384
rs1d(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1385
0
{
1386
0
  proto_tree_add_item(tree, hf_ipmi_picmg_1d_policy, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1387
0
  if (tvb_captured_length(tvb) > 1) {
1388
0
    proto_tree_add_item(tree, hf_ipmi_picmg_1d_coverage, tvb, 1, 1, ENC_LITTLE_ENDIAN);
1389
0
  }
1390
0
}
1391
1392
/* FRU Control Capabilities
1393
 */
1394
static void
1395
rq1e(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1396
0
{
1397
0
  proto_tree_add_item(tree, hf_ipmi_picmg_1e_fruid, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1398
0
}
1399
1400
static void
1401
rs1e(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1402
0
{
1403
0
  static int * const byte1[] = { &hf_ipmi_picmg_1e_cap_diagintr,
1404
0
    &hf_ipmi_picmg_1e_cap_graceful_reboot, &hf_ipmi_picmg_1e_cap_warm_reset, NULL };
1405
1406
0
  proto_tree_add_bitmask_text(tree, tvb, 0, 1, "FRU Control Capabilities: ", "None",
1407
0
      ett_ipmi_picmg_1e_byte1, byte1, ENC_LITTLE_ENDIAN, 0);
1408
0
}
1409
1410
/* FRU Inventory Device Lock Control
1411
 */
1412
static void
1413
rq1f(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1414
0
{
1415
0
  proto_tree_add_item(tree, hf_ipmi_picmg_1f_rq_fruid, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1416
0
  proto_tree_add_item(tree, hf_ipmi_picmg_1f_rq_op, tvb, 1, 1, ENC_LITTLE_ENDIAN);
1417
0
  proto_tree_add_item(tree, hf_ipmi_picmg_1f_rq_lockid, tvb, 2, 2, ENC_LITTLE_ENDIAN);
1418
0
}
1419
1420
static void
1421
rs1f(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree)
1422
0
{
1423
0
  proto_tree_add_item(tree, hf_ipmi_picmg_1f_rs_lockid, tvb, 0, 2, ENC_LITTLE_ENDIAN);
1424
0
  ipmi_add_timestamp(pinfo, tree, hf_ipmi_picmg_1f_rs_tstamp, tvb, 2);
1425
0
}
1426
1427
static const value_string cc1f[] = {
1428
  { 0x80, "Invalid FRU Information" },
1429
  { 0x81, "Lock Failed" },
1430
  { 0, NULL }
1431
};
1432
1433
/* FRU Inventory Device Write
1434
 */
1435
static void
1436
rq20(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1437
0
{
1438
0
  proto_tree_add_item(tree, hf_ipmi_picmg_20_fruid, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1439
0
  proto_tree_add_item(tree, hf_ipmi_picmg_20_lockid, tvb, 1, 2, ENC_LITTLE_ENDIAN);
1440
0
  proto_tree_add_item(tree, hf_ipmi_picmg_20_offset, tvb, 3, 2, ENC_LITTLE_ENDIAN);
1441
0
  proto_tree_add_item(tree, hf_ipmi_picmg_20_data, tvb, 5, -1, ENC_NA);
1442
0
}
1443
1444
static void
1445
rs20(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1446
0
{
1447
0
  proto_tree_add_item(tree, hf_ipmi_picmg_20_count, tvb, 0, 1, ENC_NA);
1448
0
}
1449
1450
static const value_string cc20[] = {
1451
  { 0x80, "Invalid Lock ID" },
1452
  { 0, NULL }
1453
};
1454
1455
/* Get Shelf Manager IP Address
1456
 */
1457
static void
1458
rq21(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1459
0
{
1460
0
  proto_tree_add_item(tree, hf_ipmi_picmg_21_addr_num, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1461
0
}
1462
1463
static void
1464
rs21(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree)
1465
0
{
1466
0
  static int * const byte9[] = { &hf_ipmi_picmg_21_is_shm, &hf_ipmi_picmg_21_addr_type, NULL };
1467
0
  uint8_t addrtype;
1468
1469
0
  ipmi_add_timestamp(pinfo, tree, hf_ipmi_picmg_21_tstamp, tvb, 0);
1470
0
  proto_tree_add_item(tree, hf_ipmi_picmg_21_addr_count, tvb, 4, 1, ENC_LITTLE_ENDIAN);
1471
0
  proto_tree_add_item(tree, hf_ipmi_picmg_21_site_type, tvb, 5, 1, ENC_LITTLE_ENDIAN);
1472
0
  proto_tree_add_item(tree, hf_ipmi_picmg_21_site_num, tvb, 6, 1, ENC_LITTLE_ENDIAN);
1473
0
  proto_tree_add_item(tree, hf_ipmi_picmg_21_max_unavail, tvb, 7, 1, ENC_LITTLE_ENDIAN);
1474
0
  proto_tree_add_bitmask_text(tree, tvb, 8, 1, NULL, NULL, ett_ipmi_picmg_21_byte9, byte9, ENC_LITTLE_ENDIAN, 0);
1475
1476
0
  addrtype = tvb_get_uint8(tvb, 8) & 0x7f;
1477
0
  if (addrtype == 0x01) {
1478
    /* IP address and RMCP port are in network byte order! */
1479
0
    proto_tree_add_item(tree, hf_ipmi_picmg_21_ipaddr, tvb, 9, 4, ENC_BIG_ENDIAN);
1480
0
    proto_tree_add_item(tree, hf_ipmi_picmg_21_rmcpport, tvb, 13, 2, ENC_BIG_ENDIAN);
1481
0
  };
1482
0
}
1483
1484
/* Get Shelf Power Allocation
1485
 */
1486
static void
1487
rq22(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1488
0
{
1489
0
  ipmi_set_data(pinfo, 0, tvb_get_uint8(tvb, 0));
1490
0
  if (!tree) {
1491
0
    return;
1492
0
  }
1493
0
  proto_tree_add_item(tree, hf_ipmi_picmg_22_feed_idx, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1494
0
}
1495
1496
static void
1497
rs22(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1498
0
{
1499
0
  uint32_t offs = 0;
1500
0
  uint16_t v;
1501
0
  unsigned i, max;
1502
1503
0
  proto_tree_add_item(tree, hf_ipmi_picmg_22_update_cnt, tvb, 0, 2, ENC_LITTLE_ENDIAN);
1504
1505
0
  max = tvb_captured_length(tvb) / 2 - 1;
1506
0
  if (!max) {
1507
    /* At least one shall be present */
1508
0
    max = 1;
1509
0
  }
1510
0
  (void) ipmi_get_data(pinfo, 0, &offs);
1511
0
  for (i = 0; i < max; i++) {
1512
0
    v = tvb_get_letohs(tvb, 2 + 2 * i);
1513
0
    proto_tree_add_uint_format(tree, hf_ipmi_picmg_22_pwr_alloc, tvb, 2 + 2 * i, 2,
1514
0
        v, "Power Feed [%d] Allocation: %d Watts", offs + i, v);
1515
0
  }
1516
0
}
1517
1518
static const value_string picmg_23_slot_selectors[] = {
1519
  { 0, "MicroTCA Shelf within a Frame" },
1520
  { 1, "MicroTCA Carrier within a Shelf" },
1521
  { 2, "Slot within a MicroTCA Carrier" },
1522
  { 0, NULL }
1523
};
1524
1525
static const value_string picmg_23_num_bases[] = {
1526
  { 0, "Zero-based" },
1527
  { 1, "One-based" },
1528
  { 0, NULL }
1529
};
1530
1531
static const value_string picmg_23_orientations[] = {
1532
  { 0, "Vertical" },
1533
  { 1, "Horizontal" },
1534
  { 0, NULL }
1535
};
1536
1537
/* Get Location Info
1538
 */
1539
static void
1540
rq23(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1541
0
{
1542
0
  static int * const picmg_23_rq_byte2[] = {
1543
0
    &hf_ipmi_picmg_23_slot_sel,
1544
0
    &hf_ipmi_picmg_23_carrier_num,
1545
0
    NULL
1546
0
  };
1547
1548
0
  proto_tree_add_bitmask(tree, tvb, 0, hf_ipmi_picmg_23_rq_byte2,
1549
0
      ett_ipmi_picmg_23_rq_byte2, picmg_23_rq_byte2,
1550
0
      ENC_LITTLE_ENDIAN);
1551
0
  if ((tvb_get_uint8(tvb, 0) & 0xC0) == 0x80) {
1552
0
    proto_tree_add_item(tree, hf_ipmi_picmg_01_rs_site_num,
1553
0
        tvb, 1, 1, ENC_LITTLE_ENDIAN);
1554
0
    proto_tree_add_item(tree, hf_ipmi_picmg_01_rs_site_type,
1555
0
        tvb, 2, 1, ENC_LITTLE_ENDIAN);
1556
0
  }
1557
0
}
1558
1559
static void
1560
rs23(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1561
0
{
1562
0
  static int * const picmg_23_rs_byte5[] = {
1563
0
    &hf_ipmi_picmg_23_slot_base,
1564
0
    &hf_ipmi_picmg_23_tier_base,
1565
0
    &hf_ipmi_picmg_23_orientation,
1566
0
    NULL
1567
0
  };
1568
1569
0
  proto_tree_add_item(tree, hf_ipmi_picmg_23_slot_num,
1570
0
      tvb, 0, 1, ENC_LITTLE_ENDIAN);
1571
0
  proto_tree_add_item(tree, hf_ipmi_picmg_23_tier_num,
1572
0
      tvb, 1, 1, ENC_LITTLE_ENDIAN);
1573
0
  proto_tree_add_bitmask(tree, tvb, 2, hf_ipmi_picmg_23_rs_byte5,
1574
0
      ett_ipmi_picmg_23_rs_byte5, picmg_23_rs_byte5,
1575
0
      ENC_LITTLE_ENDIAN);
1576
0
  proto_tree_add_item(tree, hf_ipmi_picmg_23_origin_x,
1577
0
      tvb, 3, 2, ENC_LITTLE_ENDIAN);
1578
0
  proto_tree_add_item(tree, hf_ipmi_picmg_23_origin_y,
1579
0
      tvb, 5, 2, ENC_LITTLE_ENDIAN);
1580
0
}
1581
1582
static const value_string picmg_24_controls[] = {
1583
  { 0, "Disable MP" },
1584
  { 1, "Enable MP" },
1585
  { 2, "De-assert ENABLE#" },
1586
  { 3, "Assert ENABLE#" },
1587
  { 4, "Disable PWR" },
1588
  { 5, "Enable PWR" },
1589
  { 0, NULL }
1590
};
1591
1592
static void
1593
fmt_power_amps(char *s, uint32_t v)
1594
0
{
1595
0
  snprintf(s, ITEM_LABEL_LENGTH, "%d.%dA", v / 10, v % 10);
1596
0
}
1597
1598
/* Power Channel Control
1599
 */
1600
static void
1601
rq24(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1602
0
{
1603
0
  proto_tree_add_item(tree, hf_ipmi_picmg_24_channel,
1604
0
      tvb, 0, 1, ENC_LITTLE_ENDIAN);
1605
0
  proto_tree_add_item(tree, hf_ipmi_picmg_24_control,
1606
0
      tvb, 1, 1, ENC_LITTLE_ENDIAN);
1607
0
  proto_tree_add_item(tree, hf_ipmi_picmg_24_current,
1608
0
      tvb, 2, 1, ENC_LITTLE_ENDIAN);
1609
0
  proto_tree_add_item(tree, hf_ipmi_picmg_24_primary_pm,
1610
0
      tvb, 3, 1, ENC_LITTLE_ENDIAN);
1611
0
  proto_tree_add_item(tree, hf_ipmi_picmg_24_backup_pm,
1612
0
      tvb, 4, 1, ENC_LITTLE_ENDIAN);
1613
0
}
1614
1615
static const value_string picmg_25_fault_vals[] = {
1616
  { 0, "Redundant PM is not providing Payload Power current" },
1617
  { 1, "Redundant PM is providing Payload Power current" },
1618
  { 0, NULL }
1619
};
1620
1621
static const true_false_string picmg_25_roles = {
1622
  "Primary",  "Redundant"
1623
};
1624
1625
/* Get Power Channel Status
1626
 */
1627
static void
1628
rq25(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1629
0
{
1630
0
  proto_tree_add_item(tree, hf_ipmi_picmg_25_start,
1631
0
      tvb, 0, 1, ENC_LITTLE_ENDIAN);
1632
0
  proto_tree_add_item(tree, hf_ipmi_picmg_25_count,
1633
0
      tvb, 1, 1, ENC_LITTLE_ENDIAN);
1634
0
}
1635
1636
static void
1637
rs25(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1638
0
{
1639
0
  static int * const picmg_25_gstatus[] = {
1640
0
    &hf_ipmi_picmg_25_fault,
1641
0
    &hf_ipmi_picmg_25_pwr_good,
1642
0
    &hf_ipmi_picmg_25_mp_good,
1643
0
    &hf_ipmi_picmg_25_role,
1644
0
    NULL
1645
0
  };
1646
0
  static int * const picmg_25_cstatus[] = {
1647
0
    &hf_ipmi_picmg_25_pwr_on,
1648
0
    &hf_ipmi_picmg_25_pwr_ovr,
1649
0
    &hf_ipmi_picmg_25_pwr,
1650
0
    &hf_ipmi_picmg_25_enable,
1651
0
    &hf_ipmi_picmg_25_mp_ovr,
1652
0
    &hf_ipmi_picmg_25_mp,
1653
0
    &hf_ipmi_picmg_25_ps1,
1654
0
    NULL
1655
0
  };
1656
1657
0
  unsigned i, len = tvb_captured_length(tvb);
1658
1659
0
  proto_tree_add_item(tree, hf_ipmi_picmg_25_max,
1660
0
      tvb, 0, 1, ENC_LITTLE_ENDIAN);
1661
0
  proto_tree_add_bitmask(tree, tvb, 1, hf_ipmi_picmg_25_gstatus,
1662
0
      ett_ipmi_picmg_25_rs_byte4, picmg_25_gstatus,
1663
0
      ENC_LITTLE_ENDIAN);
1664
1665
0
  for (i = 2; i < len; i++) {
1666
0
    proto_tree_add_bitmask(tree, tvb, i, hf_ipmi_picmg_25_cstatus,
1667
0
        ett_ipmi_picmg_25_rs_byte5, picmg_25_cstatus,
1668
0
        ENC_LITTLE_ENDIAN);
1669
0
  }
1670
0
}
1671
1672
/* PM Reset
1673
 */
1674
static void
1675
rq26(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1676
0
{
1677
0
  proto_tree_add_item(tree, hf_ipmi_picmg_26_pm_site,
1678
0
      tvb, 0, 1, ENC_LITTLE_ENDIAN);
1679
0
}
1680
1681
/* Get PM Status
1682
 */
1683
static void
1684
rs27(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1685
0
{
1686
0
  static int * const picmg_27_status[] = {
1687
0
    &hf_ipmi_picmg_27_pm_healthy,
1688
0
    NULL
1689
0
  };
1690
0
  proto_tree_add_bitmask(tree, tvb, 0, hf_ipmi_picmg_27_rs_byte3,
1691
0
      ett_ipmi_picmg_27_rs_byte3, picmg_27_status,
1692
0
      ENC_LITTLE_ENDIAN);
1693
0
}
1694
1695
static const value_string cc28[] = {
1696
  { 0x80, "Returned from autonomous mode" },
1697
  { 0, NULL }
1698
};
1699
1700
static void
1701
fmt_100ms(char *s, uint32_t v)
1702
0
{
1703
0
  snprintf(s, ITEM_LABEL_LENGTH, "%d.%dS", v / 10, v % 10);
1704
0
}
1705
1706
/* PM Heart-Beat
1707
 */
1708
static void
1709
rq28(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1710
0
{
1711
0
  static int * const picmg_28_flags[] = {
1712
0
    &hf_ipmi_picmg_28_mch2,
1713
0
    &hf_ipmi_picmg_28_mch1,
1714
0
    NULL
1715
0
  };
1716
0
  proto_tree_add_item(tree, hf_ipmi_picmg_28_timeout,
1717
0
      tvb, 0, 1, ENC_LITTLE_ENDIAN);
1718
0
  proto_tree_add_bitmask(tree, tvb, 1, hf_ipmi_picmg_28_rq_byte3,
1719
0
      ett_ipmi_picmg_28_rq_byte3, picmg_28_flags,
1720
0
      ENC_LITTLE_ENDIAN);
1721
0
}
1722
1723
static const true_false_string picmg_29_alarm_actions = {
1724
  "Produces(results in) an implementation-defined action",
1725
  "Not implemented"
1726
};
1727
1728
static const true_false_string picmg_29_alarm_modes = {
1729
  "Can be controlled/enabled by the Set Telco Alarm State command",
1730
  "Can not be controlled/enabled"
1731
};
1732
1733
/* Get Telco Alarm Capabilities
1734
 */
1735
static void
1736
rs29(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1737
0
{
1738
0
  static int * const picmg_29_caps[] = {
1739
0
    &hf_ipmi_picmg_29_maj_rst,
1740
0
    &hf_ipmi_picmg_29_min_rst,
1741
0
    &hf_ipmi_picmg_29_alarm_cut,
1742
0
    &hf_ipmi_picmg_29_test_mode,
1743
0
    &hf_ipmi_picmg_29_pwr_alarm,
1744
0
    &hf_ipmi_picmg_29_minor_alarm,
1745
0
    &hf_ipmi_picmg_29_major_alarm,
1746
0
    &hf_ipmi_picmg_29_crit_alarm,
1747
0
    NULL
1748
0
  };
1749
0
  proto_tree_add_bitmask(tree, tvb, 0, hf_ipmi_picmg_29_rs_byte3,
1750
0
      ett_ipmi_picmg_29_rs_byte3, picmg_29_caps,
1751
0
      ENC_LITTLE_ENDIAN);
1752
0
}
1753
1754
static const value_string picmg_2a_alarm_ids[] = {
1755
  { 0, "Critical Alarm" },
1756
  { 1, "Major Alarm" },
1757
  { 2, "Minor Alarm" },
1758
  { 3, "Power Alarm" },
1759
  { 4, "Alarm Cutoff" },
1760
  { 0, NULL }
1761
};
1762
1763
static const value_string picmg_2a_alarm_ctrls[] = {
1764
  { 0, "off / cutoff disabled" },
1765
  { 1, "on / cutoff enabled" },
1766
  { 0xFF, "test mode" },
1767
  { 0, NULL }
1768
};
1769
1770
/* Set Telco Alarm State
1771
 */
1772
static void
1773
rq2a(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1774
0
{
1775
0
  proto_tree_add_item(tree, hf_ipmi_picmg_05_fruid,
1776
0
      tvb, 0, 1, ENC_LITTLE_ENDIAN);
1777
0
  proto_tree_add_item(tree, hf_ipmi_picmg_2a_alarm_id,
1778
0
      tvb, 1, 1, ENC_LITTLE_ENDIAN);
1779
0
  proto_tree_add_item(tree, hf_ipmi_picmg_2a_alarm_ctrl,
1780
0
      tvb, 2, 1, ENC_LITTLE_ENDIAN);
1781
0
}
1782
1783
/* Get Telco Alarm State
1784
 */
1785
static void
1786
rq2b(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1787
0
{
1788
0
  proto_tree_add_item(tree, hf_ipmi_picmg_05_fruid,
1789
0
      tvb, 0, 1, ENC_LITTLE_ENDIAN);
1790
0
  proto_tree_add_item(tree, hf_ipmi_picmg_2a_alarm_id,
1791
0
      tvb, 1, 1, ENC_LITTLE_ENDIAN);
1792
0
}
1793
1794
static void
1795
rs2b(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1796
0
{
1797
0
  proto_tree_add_item(tree, hf_ipmi_picmg_2b_alarm_state,
1798
0
      tvb, 0, 1, ENC_LITTLE_ENDIAN);
1799
0
}
1800
1801
static const value_string amc_clock_ids[] = {
1802
  { 1, "TCLKA(CLK1A)" },
1803
  { 2, "TCLKB(CLK1B)" },
1804
  { 3, "TCLKC(CLK1)" },
1805
  { 4, "TCLKD(CLK2A)" },
1806
  { 5, "FCLKA(CLK2B)" },
1807
  { 6, "CLK2" },
1808
  { 7, "CLK3A" },
1809
  { 8, "CLK3B" },
1810
  { 9, "CLK3" },
1811
  { 0, NULL }
1812
};
1813
1814
static const value_string amc_clock_dirs[] = {
1815
  { 0, "Clock receiver" },
1816
  { 1, "Clock source" },
1817
  { 0, NULL }
1818
};
1819
1820
static const value_string amc_clock_plls[] = {
1821
  { 0, "Default state" },
1822
  { 1, "Connect through PLL" },
1823
  { 2, "Bypass PLL" },
1824
  { 0, NULL }
1825
};
1826
1827
static const range_string amc_clock_families[] = {
1828
  { 0, 0, "Unspecified" },
1829
  { 1, 1, "SONET/SDH/PDH" },
1830
  { 2, 2, "Reserved for PCI Express" },
1831
  { 3, 0xC8, "Reserved" },
1832
  { 0xC9, 0xFF, "Vendor defined" },
1833
  { 0, 0, NULL }
1834
};
1835
1836
static const value_string amc_clock_resource_types[] = {
1837
  { 0, "On-Carrier device" },
1838
  { 1, "AMC module" },
1839
  { 2, "Backplane" },
1840
  { 3, "Reserved" },
1841
  { 0, NULL }
1842
};
1843
1844
static int * const amc_clock_setting[] = {
1845
  &hf_ipmi_picmg_clock_pll,
1846
  &hf_ipmi_picmg_clock_dir,
1847
  &hf_ipmi_picmg_clock_state,
1848
  NULL
1849
};
1850
1851
static int * const amc_clock_resource[] = {
1852
  &hf_ipmi_picmg_clock_resource_type,
1853
  &hf_ipmi_picmg_clock_resource_dev,
1854
  NULL
1855
};
1856
1857
/* Set Clock State
1858
 */
1859
static void
1860
rq2c(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1861
0
{
1862
0
  proto_tree_add_item(tree, hf_ipmi_picmg_clock_id, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1863
0
  proto_tree_add_item(tree, hf_ipmi_picmg_clock_cfg, tvb, 1, 1, ENC_LITTLE_ENDIAN);
1864
0
  proto_tree_add_bitmask(tree, tvb, 2, hf_ipmi_picmg_clock_setting,
1865
0
      ett_ipmi_picmg_clock_setting, amc_clock_setting, ENC_LITTLE_ENDIAN);
1866
0
  if (tvb_captured_length(tvb) > 3) {
1867
0
    proto_tree_add_item(tree, hf_ipmi_picmg_clock_family, tvb, 3, 1, ENC_LITTLE_ENDIAN);
1868
0
    proto_tree_add_item(tree, hf_ipmi_picmg_clock_accuracy, tvb, 4, 1, ENC_LITTLE_ENDIAN);
1869
0
    proto_tree_add_item(tree, hf_ipmi_picmg_clock_frequency, tvb, 5, 4, ENC_LITTLE_ENDIAN);
1870
0
  }
1871
0
  if (tvb_captured_length(tvb) > 9) {
1872
0
    proto_tree_add_bitmask(tree, tvb, 9, hf_ipmi_picmg_clock_resource,
1873
0
        ett_ipmi_picmg_clock_res, amc_clock_resource, ENC_LITTLE_ENDIAN);
1874
0
  }
1875
0
}
1876
1877
/* Get Clock State (request)
1878
 */
1879
static void
1880
rq2d(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1881
0
{
1882
0
  proto_tree_add_item(tree, hf_ipmi_picmg_clock_id, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1883
0
  if (tvb_captured_length(tvb) > 1) {
1884
0
    proto_tree_add_bitmask(tree, tvb, 1, hf_ipmi_picmg_clock_resource,
1885
0
        ett_ipmi_picmg_clock_res, amc_clock_resource, ENC_LITTLE_ENDIAN);
1886
0
  }
1887
0
}
1888
1889
/* Get Clock State (response)
1890
 */
1891
static void
1892
rs2d(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1893
0
{
1894
0
  proto_tree_add_bitmask(tree, tvb, 0, hf_ipmi_picmg_clock_setting,
1895
0
      ett_ipmi_picmg_clock_setting, amc_clock_setting, ENC_LITTLE_ENDIAN);
1896
0
  if (tvb_captured_length(tvb) > 1) {
1897
0
    proto_tree_add_item(tree, hf_ipmi_picmg_clock_cfg, tvb, 1, 1, ENC_LITTLE_ENDIAN);
1898
0
    proto_tree_add_item(tree, hf_ipmi_picmg_clock_family, tvb, 2, 1, ENC_LITTLE_ENDIAN);
1899
0
    proto_tree_add_item(tree, hf_ipmi_picmg_clock_accuracy, tvb, 3, 1, ENC_LITTLE_ENDIAN);
1900
0
    proto_tree_add_item(tree, hf_ipmi_picmg_clock_frequency, tvb, 4, 4, ENC_LITTLE_ENDIAN);
1901
0
  }
1902
0
}
1903
1904
static void
1905
add_component_bits(proto_tree *tree, tvbuff_t *tvb, unsigned offs, const char *desc)
1906
0
{
1907
0
  static int * const compbits[] = { &hf_ipmi_picmg_XX_comp7, &hf_ipmi_picmg_XX_comp6, &hf_ipmi_picmg_XX_comp5,
1908
0
    &hf_ipmi_picmg_XX_comp4, &hf_ipmi_picmg_XX_comp3, &hf_ipmi_picmg_XX_comp2, &hf_ipmi_picmg_XX_comp1, &hf_ipmi_picmg_XX_comp0, NULL };
1909
1910
0
  proto_tree_add_bitmask_text(tree, tvb, offs, 1, desc, "None",
1911
0
      ett_ipmi_picmg_XX_compbits, compbits, ENC_LITTLE_ENDIAN, 0);
1912
0
}
1913
1914
/* Get Target Upgrade Capabilities
1915
 */
1916
static void
1917
rs2e(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1918
0
{
1919
0
  static int * const byte2[] = { &hf_ipmi_picmg_2e_upgrade_undesirable, &hf_ipmi_picmg_2e_auto_rollback_override,
1920
0
    &hf_ipmi_picmg_2e_ipmc_degraded, &hf_ipmi_picmg_2e_deferred_activate, &hf_ipmi_picmg_2e_services_affected,
1921
0
    &hf_ipmi_picmg_2e_manual_rollback, &hf_ipmi_picmg_2e_auto_rollback, &hf_ipmi_picmg_2e_self_test, NULL };
1922
1923
0
  proto_tree_add_item(tree, hf_ipmi_picmg_2e_version, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1924
0
  proto_tree_add_bitmask_text(tree, tvb, 1, 1, "Capabilities: ", "None",
1925
0
      ett_ipmi_picmg_2e_byte2, byte2, ENC_LITTLE_ENDIAN, 0);
1926
0
  proto_tree_add_item(tree, hf_ipmi_picmg_2e_upgrade_tout, tvb, 2, 1, ENC_LITTLE_ENDIAN);
1927
0
  proto_tree_add_item(tree, hf_ipmi_picmg_2e_selftest_tout, tvb, 3, 1, ENC_LITTLE_ENDIAN);
1928
0
  proto_tree_add_item(tree, hf_ipmi_picmg_2e_rollback_tout, tvb, 4, 1, ENC_LITTLE_ENDIAN);
1929
0
  proto_tree_add_item(tree, hf_ipmi_picmg_2e_inaccessibility_tout, tvb, 5, 1, ENC_LITTLE_ENDIAN);
1930
0
  add_component_bits(tree, tvb, 6, "Components present: ");
1931
0
}
1932
1933
static const value_string cc2e[] = {
1934
  { 0x81, "Firmware Upgrade is not supported over this interface" },
1935
  { 0, NULL }
1936
};
1937
1938
/* Get Component Properties
1939
 */
1940
static void
1941
prop_00(tvbuff_t *tvb, proto_tree *tree)
1942
0
{
1943
0
  static int * const byte1[] = { &hf_ipmi_picmg_prop00_cold_reset, &hf_ipmi_picmg_prop00_deferred_activation,
1944
0
    &hf_ipmi_picmg_prop00_comparison, &hf_ipmi_picmg_prop00_preparation, &hf_ipmi_picmg_prop00_rollback, NULL };
1945
1946
0
  proto_tree_add_bitmask_text(tree, tvb, 0, 1, "General Component Properties: ", "None",
1947
0
      ett_ipmi_picmg_prop00_byte1, byte1, ENC_LITTLE_ENDIAN, 0);
1948
0
}
1949
1950
static void
1951
parse_version(tvbuff_t *tvb, proto_tree *tree)
1952
0
{
1953
0
  static int * const byte1[] = { &hf_ipmi_picmg_prop01_fw_major, NULL };
1954
1955
0
  proto_tree_add_bitmask_text(tree, tvb, 0, 1, NULL, NULL,
1956
0
      ett_ipmi_picmg_prop01_byte1, byte1, ENC_LITTLE_ENDIAN, 0);
1957
0
  proto_tree_add_item(tree, hf_ipmi_picmg_prop01_fw_minor, tvb, 1, 1, ENC_LITTLE_ENDIAN);
1958
0
  proto_tree_add_item(tree, hf_ipmi_picmg_prop01_fw_aux, tvb, 2, 4, ENC_NA);
1959
0
}
1960
1961
static void
1962
prop_02(tvbuff_t *tvb, proto_tree *tree)
1963
0
{
1964
0
  unsigned len = tvb_captured_length(tvb);
1965
1966
0
  if (len > 12) {
1967
0
    len = 12;
1968
0
  }
1969
0
  proto_tree_add_item(tree, hf_ipmi_picmg_prop02_desc, tvb, 0, len, ENC_ASCII);
1970
0
}
1971
1972
static const struct {
1973
  void (*intrp)(tvbuff_t *tvb, proto_tree *tree);
1974
  const char *name;
1975
} compprops[] = {
1976
  { prop_00, "General Component Properties" },
1977
  { parse_version, "Current Version" },
1978
  { prop_02, "Description String" },
1979
  { parse_version, "Rollback firmware version" },
1980
  { parse_version, "Deferred upgrade firmware version" }
1981
};
1982
1983
static void
1984
rq2f(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1985
0
{
1986
0
  uint8_t pno = tvb_get_uint8(tvb, 1);
1987
0
  const char *desc;
1988
1989
0
  ipmi_set_data(pinfo, 0, pno);
1990
0
  if (!tree) {
1991
0
    return;
1992
0
  }
1993
1994
0
  if (pno < array_length(compprops)) {
1995
0
    desc = compprops[pno].name;
1996
0
  } else if (pno >= 0xC0) {
1997
0
    desc = "OEM";
1998
0
  } else {
1999
0
    desc = "Reserved";
2000
0
  }
2001
2002
0
  proto_tree_add_item(tree, hf_ipmi_picmg_2f_comp_id, tvb, 0, 1, ENC_LITTLE_ENDIAN);
2003
0
  proto_tree_add_uint_format_value(tree, hf_ipmi_picmg_2f_comp_prop, tvb, 1, 1, pno,
2004
0
      "%s (0x%02x)", desc, pno);
2005
0
}
2006
2007
static void
2008
rs2f(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2009
0
{
2010
0
  uint32_t pno;
2011
0
  const char *desc;
2012
0
  proto_item *ti;
2013
2014
0
  if (!ipmi_get_data(pinfo, 0, &pno)) {
2015
    /* Can't parse further if property selector is not known */
2016
0
    proto_tree_add_item(tree, hf_ipmi_picmg_2f_prop_data, tvb, 0, -1, ENC_NA);
2017
0
    return;
2018
0
  }
2019
2020
0
  if (pno < array_length(compprops)) {
2021
0
    desc = compprops[pno].name;
2022
0
  } else if (pno >= 0xC0) {
2023
0
    desc = "OEM";
2024
0
  } else {
2025
0
    desc = "Reserved";
2026
0
  }
2027
2028
0
  ti = proto_tree_add_uint_format_value(tree, hf_ipmi_picmg_2f_comp_prop, tvb, 0, 0, pno, "%s (0x%02x)", desc, pno);
2029
0
  proto_item_set_generated(ti);
2030
0
  if (pno < array_length(compprops)) {
2031
0
    compprops[pno].intrp(tvb, tree);
2032
0
  } else {
2033
0
    proto_tree_add_item(tree, hf_ipmi_picmg_2f_prop_data, tvb, 0, -1, ENC_NA);
2034
0
  }
2035
0
}
2036
2037
static const value_string cc2f[] = {
2038
  { 0x81, "Firmware Upgrade is not supported over this interface" },
2039
  { 0x82, "Invalid Component ID" },
2040
  { 0x83, "Invalid Component property selector" },
2041
  { 0, NULL }
2042
};
2043
2044
/* Abort Firmware Upgrade
2045
 */
2046
static const value_string cc30[] = {
2047
  { 0x80, "Firmware Upgrade cannot be aborted at this moment" },
2048
  { 0x81, "Firmware Upgrade aborted, IPMC cannot resume normal operation" },
2049
  { 0, NULL }
2050
};
2051
2052
/* Initiate upgrade action
2053
 */
2054
static void
2055
rq31(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2056
0
{
2057
0
  add_component_bits(tree, tvb, 0, "Components: ");
2058
0
  proto_tree_add_item(tree, hf_ipmi_picmg_31_action, tvb, 1, 1, ENC_LITTLE_ENDIAN);
2059
0
}
2060
2061
static const value_string cc31[] = {
2062
  { 0x80, "Command in progress" },
2063
  { 0x81, "Invalid component" },
2064
  { 0, NULL }
2065
};
2066
2067
/* Upload Firmware Block
2068
 */
2069
static void
2070
rq32(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2071
0
{
2072
0
  proto_tree_add_item(tree, hf_ipmi_picmg_32_block, tvb, 0, 1, ENC_LITTLE_ENDIAN);
2073
0
  proto_tree_add_item(tree, hf_ipmi_picmg_32_data, tvb, 1, -1, ENC_NA);
2074
0
}
2075
2076
static void
2077
rs32(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2078
0
{
2079
0
  if (tvb_captured_length(tvb) > 0) {
2080
0
    proto_tree_add_item(tree, hf_ipmi_picmg_32_sec_offs, tvb, 0, 4, ENC_LITTLE_ENDIAN);
2081
0
    proto_tree_add_item(tree, hf_ipmi_picmg_32_sec_len, tvb, 4, 4, ENC_LITTLE_ENDIAN);
2082
0
  }
2083
0
}
2084
2085
static const value_string cc32[] = {
2086
  { 0x80, "Command in progress" },
2087
  { 0x81, "Invalid component" },
2088
  { 0x82, "Internal checksum error detected in the received blocks" },
2089
  { 0, NULL }
2090
};
2091
2092
/* Finish Firmware Upgrade
2093
 */
2094
static void
2095
rq33(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2096
0
{
2097
0
  proto_tree_add_item(tree, hf_ipmi_picmg_33_comp_id, tvb, 0, 1, ENC_LITTLE_ENDIAN);
2098
0
  proto_tree_add_item(tree, hf_ipmi_picmg_33_img_len, tvb, 1, 4, ENC_LITTLE_ENDIAN);
2099
0
}
2100
2101
static const value_string cc33[] = {
2102
  { 0x80, "Command in progress" },
2103
  { 0x81, "Number of bytes received does not match size in the request" },
2104
  { 0x82, "Internal checksum error detected in the received image" },
2105
  { 0x83, "Uploaded firmware does not match current" },
2106
  { 0, NULL }
2107
};
2108
2109
/* Get Upgrade Status
2110
 */
2111
static void
2112
rs34(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2113
0
{
2114
0
  static const uint8_t sig = 0;
2115
0
  static int * const byte3[] = { &hf_ipmi_picmg_34_percentage, NULL };
2116
0
  uint8_t v;
2117
0
  const ipmi_cmd_t *c;
2118
2119
0
  v = tvb_get_uint8(tvb, 0);
2120
0
  c = ipmi_getcmd(ipmi_getnetfn(IPMI_GROUP_REQ, &sig), v);
2121
0
  proto_tree_add_uint_format_value(tree, hf_ipmi_picmg_34_cmd, tvb, 0, 1, v,
2122
0
      "%s (0x%02x)", c->desc, v);
2123
0
  v = tvb_get_uint8(tvb, 1);
2124
0
  proto_tree_add_uint_format_value(tree, hf_ipmi_picmg_34_ccode, tvb, 1, 1, v,
2125
0
      "%s (0x%02x)", ipmi_get_completion_code(v, c), v);
2126
0
  if (tvb_captured_length(tvb) > 2) {
2127
0
    proto_tree_add_bitmask_text(tree, tvb, 2, 1, NULL, NULL,
2128
0
        ett_ipmi_picmg_34_byte3, byte3, ENC_LITTLE_ENDIAN, 0);
2129
0
  }
2130
0
}
2131
2132
static const value_string cc34[] = {
2133
  { 0x80, "Command in progress" },
2134
  { 0, NULL }
2135
};
2136
2137
/* Activate Firmware
2138
 */
2139
static void
2140
rq35(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2141
0
{
2142
0
  if (tvb_captured_length(tvb) > 0) {
2143
0
    proto_tree_add_item(tree, hf_ipmi_picmg_35_rollback_override, tvb, 0, 1, ENC_LITTLE_ENDIAN);
2144
0
  }
2145
0
}
2146
2147
static const value_string cc35[] = {
2148
  { 0x80, "Command in progress" },
2149
  { 0, NULL }
2150
};
2151
2152
/* Query Self-test Results
2153
 */
2154
static void
2155
rs36(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2156
0
{
2157
0
  static int * const byte2[] = { &hf_ipmi_picmg_36_fail_sel, &hf_ipmi_picmg_36_fail_sdr,
2158
0
    &hf_ipmi_picmg_36_fail_bmc_fru, &hf_ipmi_picmg_36_fail_ipmb_sig, &hf_ipmi_picmg_36_fail_sdr_empty,
2159
0
    &hf_ipmi_picmg_36_fail_iua, &hf_ipmi_picmg_36_fail_bb_fw, &hf_ipmi_picmg_36_fail_oper_fw, NULL };
2160
0
  int res, fail;
2161
2162
0
  res = tvb_get_uint8(tvb, 0);
2163
0
  fail = tvb_get_uint8(tvb, 1);
2164
2165
0
  proto_tree_add_uint_format_value(tree, hf_ipmi_picmg_36_result, tvb, 0, 1,
2166
0
      res, "%s (0x%02x)",
2167
0
      val_to_str_const(res, vals_36_result, "Device-specific internal failure"),
2168
0
      res);
2169
2170
0
  if (res == 0x55 || res == 0xff) {
2171
0
    proto_tree_add_uint_format_value(tree, hf_ipmi_picmg_36_fail, tvb, 1, 1,
2172
0
        fail, "0x%02x (must be 0x00)",
2173
0
        fail);
2174
0
  } else if (res == 0x57) {
2175
0
    proto_tree_add_bitmask(tree, tvb, 1, hf_ipmi_picmg_36_fail, ett_ipmi_picmg_36_byte2, byte2, ENC_LITTLE_ENDIAN);
2176
0
  } else if (res == 0x60) {
2177
0
    add_component_bits(tree, tvb, 1, "Failed components: ");
2178
0
  } else {
2179
0
    proto_tree_add_uint_format_value(tree, hf_ipmi_picmg_36_fail, tvb, 1, 1,
2180
0
        fail, "0x%02x (device-specific)", fail);
2181
0
  }
2182
0
}
2183
2184
static const value_string cc36[] = {
2185
  { 0x80, "Self-test in progress" },
2186
  { 0x81, "Firmware upgrade not supported over this interface" },
2187
  { 0, NULL }
2188
};
2189
2190
/* Query Rollback Results
2191
 */
2192
static void
2193
rs37(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2194
0
{
2195
0
  static int * const byte2[] = { &hf_ipmi_picmg_37_percent, NULL };
2196
0
  const char *desc;
2197
2198
0
  switch (ipmi_get_ccode(pinfo)) {
2199
0
  case 0x00: desc = "Components completed rollback: "; break;
2200
0
  case 0x80: desc = "Components (should be None): "; break;
2201
0
  case 0x81: desc = "Components failed to rollback: "; break;
2202
0
  default: desc = "Components (ignored): "; break;
2203
0
  }
2204
2205
0
  add_component_bits(tree, tvb, 0, desc);
2206
0
  if (tvb_captured_length(tvb) > 1) {
2207
0
    proto_tree_add_bitmask_text(tree, tvb, 1, 1, NULL, NULL,
2208
0
        ett_ipmi_picmg_37_byte2, byte2, ENC_LITTLE_ENDIAN, 0);
2209
0
  }
2210
0
}
2211
2212
/* Get HPM.x Capabilities
2213
 */
2214
static void
2215
rq3e(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2216
0
{
2217
0
  proto_tree_add_item(tree, hf_ipmi_picmg_hpm_id, tvb, 0, 1, ENC_LITTLE_ENDIAN);
2218
0
}
2219
2220
static void
2221
rs3e(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2222
0
{
2223
0
  static int * const hpm2_caps[] = {
2224
0
      &hf_ipmi_picmg_hpm2_dyn_ssn,
2225
0
      &hf_ipmi_picmg_hpm2_ver_chg,
2226
0
      &hf_ipmi_picmg_hpm2_ext_mgt,
2227
0
      &hf_ipmi_picmg_hpm2_pkt_trc,
2228
0
      &hf_ipmi_picmg_hpm2_sol_ext,
2229
0
      NULL };
2230
0
  uint8_t hpm_x;
2231
2232
0
  proto_tree_add_item(tree, hf_ipmi_picmg_hpm_id, tvb, 0, 1, ENC_LITTLE_ENDIAN);
2233
0
  proto_tree_add_item(tree, hf_ipmi_picmg_hpm_rev, tvb, 1, 1, ENC_LITTLE_ENDIAN);
2234
2235
0
  hpm_x = tvb_get_uint8(tvb, 0);
2236
2237
0
  if (hpm_x == 2) {
2238
0
    proto_tree_add_item(tree, hf_ipmi_picmg_hpm2_mask, tvb, 2, 2, ENC_LITTLE_ENDIAN);
2239
0
    if (tvb_captured_length(tvb) > 4) {
2240
0
      proto_tree_add_bitmask(tree, tvb, 4, hf_ipmi_picmg_hpm2_caps,
2241
0
          ett_ipmi_picmg_hpm_caps, hpm2_caps, ENC_LITTLE_ENDIAN);
2242
0
    }
2243
0
    if (tvb_captured_length(tvb) > 5) {
2244
0
      proto_tree_add_item(tree, hf_ipmi_picmg_hpm_oem_start,
2245
0
          tvb, 5, 1, ENC_LITTLE_ENDIAN);
2246
0
      proto_tree_add_item(tree, hf_ipmi_picmg_hpm_oem_rev,
2247
0
          tvb, 6, 1, ENC_LITTLE_ENDIAN);
2248
0
    }
2249
0
    if (tvb_captured_length(tvb) > 7) {
2250
0
      proto_tree_add_item(tree, hf_ipmi_picmg_hpm2_sol_oem_start,
2251
0
          tvb, 7, 1, ENC_LITTLE_ENDIAN);
2252
0
      proto_tree_add_item(tree, hf_ipmi_picmg_hpm2_sol_oem_rev,
2253
0
          tvb, 8, 1, ENC_LITTLE_ENDIAN);
2254
0
    }
2255
0
  } else if (hpm_x == 3) {
2256
0
    proto_tree_add_item(tree, hf_ipmi_picmg_hpm_oem_start,
2257
0
        tvb, 2, 1, ENC_LITTLE_ENDIAN);
2258
0
    proto_tree_add_item(tree, hf_ipmi_picmg_hpm_oem_rev,
2259
0
        tvb, 3, 1, ENC_LITTLE_ENDIAN);
2260
0
  }
2261
0
}
2262
2263
static const value_string hpm2_func_selectors[] = {
2264
  { 0x0, "Create Credentials" },
2265
  { 0x1, "Get Session Info" },
2266
  { 0x2, "Get User Name, least significant bytes" },
2267
  { 0x3, "Get User Name, most significant bytes" },
2268
  { 0x4, "Get Password, least significant bytes" },
2269
  { 0x5, "Get Password, most significant bytes" },
2270
  { 0x6, "Get BMC Key, least significant bytes" },
2271
  { 0x7, "Get BMC Key, most significant bytes" },
2272
  { 0, NULL }
2273
};
2274
2275
static const value_string hpm2_ipmi_revs[] = {
2276
  { 0x0, "IPMI 1.5 session" },
2277
  { 0x1, "IPMI 2.0 session" },
2278
  { 0, NULL }
2279
};
2280
2281
static const value_string hpm2_auth_types[] = {
2282
  { 0x0, "None" },
2283
  { 0x1, "MD2" },
2284
  { 0x2, "MD5" },
2285
  { 0x4, "Straight password" },
2286
  { 0x5, "OEM" },
2287
  { 0, NULL }
2288
};
2289
2290
/* Get Dynamic Credentials
2291
 */
2292
static void
2293
rq3f(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2294
0
{
2295
0
  proto_tree_add_item(tree, hf_ipmi_picmg_hpm_cred_hnd,
2296
0
      tvb, 0, 1, ENC_LITTLE_ENDIAN);
2297
0
  proto_tree_add_item(tree, hf_ipmi_picmg_hpm_func_sel,
2298
0
      tvb, 1, 1, ENC_LITTLE_ENDIAN);
2299
0
  if (!tvb_get_uint8(tvb, 1)) {
2300
0
    proto_tree_add_item(tree, hf_ipmi_picmg_hpm_ipmi_rev,
2301
0
        tvb, 2, 1, ENC_LITTLE_ENDIAN);
2302
0
    if (tvb_get_uint8(tvb, 2)) {
2303
0
      proto_tree_add_item(tree, hf_ipmi_picmg_hpm_cipher_id,
2304
0
          tvb, 3, 1, ENC_LITTLE_ENDIAN);
2305
0
    } else {
2306
0
      proto_tree_add_item(tree, hf_ipmi_picmg_hpm_auth_type,
2307
0
          tvb, 3, 1, ENC_LITTLE_ENDIAN);
2308
0
    }
2309
0
    proto_tree_add_item(tree, hf_ipmi_picmg_hpm_priv_level,
2310
0
        tvb, 4, 1, ENC_LITTLE_ENDIAN);
2311
0
    proto_tree_add_item(tree, hf_ipmi_picmg_hpm_chn_num,
2312
0
        tvb, 5, 1, ENC_LITTLE_ENDIAN);
2313
0
    proto_tree_add_item(tree, hf_ipmi_picmg_hpm_avail_time,
2314
0
        tvb, 6, 4, ENC_LITTLE_ENDIAN);
2315
0
    proto_tree_add_item(tree, hf_ipmi_picmg_21_ipaddr,
2316
0
        tvb, 10, 4, ENC_BIG_ENDIAN);
2317
0
  }
2318
0
}
2319
2320
static void
2321
rs3f(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2322
0
{
2323
0
  uint8_t func;
2324
2325
0
  proto_tree_add_item(tree, hf_ipmi_picmg_hpm_cred_hnd,
2326
0
      tvb, 0, 1, ENC_LITTLE_ENDIAN);
2327
0
  proto_tree_add_item(tree, hf_ipmi_picmg_hpm_func_sel,
2328
0
      tvb, 1, 1, ENC_LITTLE_ENDIAN);
2329
2330
0
  func = tvb_get_uint8(tvb, 1);
2331
2332
0
  switch (func) {
2333
0
  case 0:
2334
0
  case 1:
2335
0
    proto_tree_add_item(tree, hf_ipmi_picmg_hpm_avail_time,
2336
0
        tvb, 2, 4, ENC_LITTLE_ENDIAN);
2337
0
    break;
2338
0
  case 2:
2339
0
  case 3:
2340
0
    proto_tree_add_item(tree, hf_ipmi_picmg_hpm_user_name,
2341
0
        tvb, 2, 8, ENC_NA);
2342
0
    break;
2343
0
  case 4:
2344
0
  case 5:
2345
0
    proto_tree_add_item(tree, hf_ipmi_picmg_hpm_user_pwd,
2346
0
        tvb, 2, 10, ENC_NA);
2347
0
    break;
2348
0
  case 6:
2349
0
  case 7:
2350
0
    proto_tree_add_item(tree, hf_ipmi_picmg_hpm_bmc_key,
2351
0
        tvb, 2, 10, ENC_NA);
2352
0
    break;
2353
0
  }
2354
0
}
2355
2356
static const value_string picmg40_operations[] = {
2357
  { 0x0, "Initiate new operation" },
2358
  { 0x1, "Poll for completion status" },
2359
  { 0, NULL }
2360
};
2361
2362
static const value_string cc40[] = {
2363
  { 0x80, "In progress" },
2364
  { 0x81, "No previous establishment request" },
2365
  { 0x82, "LAN sessions are not supported" },
2366
  { 0x83, "Error trying to establish a session" },
2367
  { 0, NULL }
2368
};
2369
2370
/* Get Session Handle for Explicit LAN Bridging
2371
 */
2372
static void
2373
rq40(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2374
0
{
2375
0
  proto_tree_add_item(tree, hf_ipmi_picmg_01_rs_ipmbaddr,
2376
0
      tvb, 0, 1, ENC_LITTLE_ENDIAN);
2377
0
  proto_tree_add_item(tree, hf_ipmi_picmg_01_rs_fruid,
2378
0
      tvb, 1, 1, ENC_LITTLE_ENDIAN);
2379
0
  if (tvb_captured_length(tvb) > 2) {
2380
0
    proto_tree_add_item(tree, hf_ipmi_picmg_hpm_operation,
2381
0
        tvb, 2, 1, ENC_LITTLE_ENDIAN);
2382
0
  }
2383
0
}
2384
2385
static void
2386
rs40(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2387
0
{
2388
0
  proto_tree_add_item(tree, hf_ipmi_picmg_hpm_chn_num,
2389
0
      tvb, 0, 1, ENC_LITTLE_ENDIAN);
2390
0
  proto_tree_add_item(tree, hf_ipmi_picmg_hpm_ssn_hnd,
2391
0
      tvb, 1, 1, ENC_LITTLE_ENDIAN);
2392
0
  proto_tree_add_item(tree, hf_ipmi_picmg_hpm_ssn_hnd,
2393
0
      tvb, 2, 1, ENC_LITTLE_ENDIAN);
2394
0
  proto_tree_add_item(tree, hf_ipmi_picmg_hpm_ssn_hnd,
2395
0
      tvb, 3, 1, ENC_LITTLE_ENDIAN);
2396
0
}
2397
2398
static const value_string cc37[] = {
2399
  { 0x80, "Rollback in progress" },
2400
  { 0x81, "Rollback failure" },
2401
  { 0x82, "Rollback overridden" },
2402
  { 0x83, "Rollback denied for integrity reasons" },
2403
  { 0, NULL }
2404
};
2405
2406
/* Initiate Manual Rollback
2407
 */
2408
static const value_string cc38[] = {
2409
  { 0x80, "Rollback in progress" },
2410
  { 0, NULL }
2411
};
2412
2413
static const value_string hpm_x_ids[] = {
2414
  { 0x02, "HPM.2" },
2415
  { 0x03, "HPM.3" },
2416
  { 0, NULL }
2417
};
2418
2419
/* Get ATCA Extended Management Resources
2420
 */
2421
static void
2422
rs41(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2423
0
{
2424
0
  proto_tree_add_item(tree, hf_ipmi_picmg_hpm_power_draw,
2425
0
      tvb, 0, 1, ENC_LITTLE_ENDIAN);
2426
0
  proto_tree_add_item(tree, hf_ipmi_picmg_hpm_base_channels,
2427
0
      tvb, 1, 2, ENC_LITTLE_ENDIAN);
2428
0
  proto_tree_add_item(tree, hf_ipmi_picmg_hpm_fabric_channels,
2429
0
      tvb, 3, 2, ENC_LITTLE_ENDIAN);
2430
0
  if (tvb_captured_length(tvb) > 5) {
2431
0
    proto_tree_add_item(tree, hf_ipmi_picmg_hpm_update_channels,
2432
0
        tvb, 5, 1, ENC_LITTLE_ENDIAN);
2433
0
  }
2434
0
  if (tvb_captured_length(tvb) > 6) {
2435
0
    proto_tree_add_item(tree, hf_ipmi_picmg_hpm_cross_channels,
2436
0
        tvb, 6, 1, ENC_LITTLE_ENDIAN);
2437
0
  }
2438
0
}
2439
2440
2441
static const value_string amc_resource_types[] = {
2442
  { 0, "On-Carrier device (IRTM, MCH)" },
2443
  { 1, "AMC module" },
2444
  { 0, NULL }
2445
};
2446
2447
/* Get AMC Extended Management Resources
2448
 */
2449
static void
2450
rs42(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2451
0
{
2452
0
  static int * const amc_resource_type[] = {
2453
0
      &hf_ipmi_picmg_linkinfo_dev_type,
2454
0
      &hf_ipmi_picmg_linkinfo_dev_id,
2455
0
      NULL };
2456
0
  uint8_t num, i;
2457
2458
0
  proto_tree_add_item(tree, hf_ipmi_picmg_hpm_power_draw,
2459
0
      tvb, 0, 1, ENC_LITTLE_ENDIAN);
2460
0
  proto_tree_add_item(tree, hf_ipmi_picmg_hpm_num_chn_desc,
2461
0
      tvb, 1, 1, ENC_LITTLE_ENDIAN);
2462
2463
0
  num = tvb_get_uint8(tvb, 1);
2464
2465
0
  for (i = 0; i < num; i++) {
2466
0
    proto_tree_add_bitmask(tree, tvb, 2 + i * 5,
2467
0
        hf_ipmi_picmg_linkinfo_dev, ett_ipmi_picmg_link_dev,
2468
0
        amc_resource_type, ENC_LITTLE_ENDIAN);
2469
0
    proto_tree_add_item(tree, hf_ipmi_picmg_hpm_chn_mask,
2470
0
        tvb, 3 + i * 5, 4, ENC_LITTLE_ENDIAN);
2471
0
  }
2472
0
}
2473
2474
/* Set ATCA Extended Management State
2475
 */
2476
static void
2477
rq43(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2478
0
{
2479
0
  proto_tree_add_item(tree, hf_ipmi_picmg_hpm_ext_mgmt_state,
2480
0
      tvb, 0, 1, ENC_LITTLE_ENDIAN);
2481
0
  proto_tree_add_item(tree, hf_ipmi_picmg_hpm_polling_period,
2482
0
      tvb, 1, 1, ENC_LITTLE_ENDIAN);
2483
0
}
2484
2485
/* Get ATCA Extended Management State
2486
 */
2487
static void
2488
rs44(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2489
0
{
2490
0
  proto_tree_add_item(tree, hf_ipmi_picmg_hpm_ext_mgmt_state,
2491
0
      tvb, 0, 1, ENC_LITTLE_ENDIAN);
2492
0
}
2493
2494
static const value_string auth_pwr_states[] = {
2495
  { 0, "Normal. Full Payload Power." },
2496
  { 1, "Extended Management Power" },
2497
  { 0, NULL }
2498
};
2499
2500
static const value_string amc_pwr_states[] = {
2501
  { 0, "Standard Management Power" },
2502
  { 1, "Extended Management Power" },
2503
  { 2, "Full Payload Power." },
2504
  { 0, NULL }
2505
};
2506
2507
/* Set AMC Power State
2508
 */
2509
static void
2510
rq45(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2511
0
{
2512
0
  proto_tree_add_item(tree, hf_ipmi_picmg_hpm_auth_pwr_state,
2513
0
      tvb, 0, 1, ENC_LITTLE_ENDIAN);
2514
0
}
2515
2516
/* Get AMC Power State
2517
 */
2518
static void
2519
rs46(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2520
0
{
2521
0
  proto_tree_add_item(tree, hf_ipmi_picmg_hpm_auth_pwr_state,
2522
0
      tvb, 0, 1, ENC_LITTLE_ENDIAN);
2523
0
  proto_tree_add_item(tree, hf_ipmi_picmg_hpm_amc_pwr_state,
2524
0
      tvb, 1, 1, ENC_LITTLE_ENDIAN);
2525
0
}
2526
2527
static const value_string picmg47_flags[] = {
2528
  { 0, "Assign Payload Instance." },
2529
  { 1, "Return Assigned Instance" },
2530
  { 0, NULL }
2531
};
2532
2533
static const value_string picmg47_states[] = {
2534
  { 0, "No session currently opened on this System Serial Port." },
2535
  { 1, "A session already opened on this System Serial Port." },
2536
  { 0, NULL }
2537
};
2538
2539
static const value_string cc47[] = {
2540
  { 0x80, "Payload Instance can not be assigned at this time." },
2541
  { 0, NULL }
2542
};
2543
2544
/* Assign SOL Payload Instance
2545
 */
2546
static void
2547
rq47(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2548
0
{
2549
0
  proto_tree_add_item(tree, hf_ipmi_picmg47_port,
2550
0
      tvb, 0, 1, ENC_LITTLE_ENDIAN);
2551
0
  proto_tree_add_item(tree, hf_ipmi_picmg47_flags,
2552
0
      tvb, 1, 1, ENC_LITTLE_ENDIAN);
2553
2554
0
}
2555
2556
static void
2557
rs47(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2558
0
{
2559
0
  static int * const byte1[] = {
2560
0
      &hf_ipmi_picmg47_state,
2561
0
      &hf_ipmi_picmg47_instance,
2562
0
      NULL };
2563
2564
0
  proto_tree_add_bitmask(tree, tvb, 0, hf_ipmi_picmg47_assignment,
2565
0
      ett_ipmi_picmg_47_byte1, byte1, ENC_LITTLE_ENDIAN);
2566
0
}
2567
2568
static const value_string picmg48_fru_types[] = {
2569
  { 0, "None" },
2570
  { 1, "IPMB-L address of subsidiary MMC" },
2571
  { 2, "IPMB-0 address of subsidiary EMMC" },
2572
  { 3, "FRU Device ID of subsidiary FRU" },
2573
  { 0, NULL }
2574
};
2575
2576
static const value_string picmg48_ip_sources[] = {
2577
  { 0, "Not configured for HPM.3" },
2578
  { 2, "DHCP assigned" },
2579
  { 4, "DHCP Proxy assigned" },
2580
  { 0, NULL }
2581
};
2582
2583
/* Get IP Address Source
2584
 */
2585
static void
2586
rq48(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2587
0
{
2588
0
  proto_tree_add_item(tree, hf_ipmi_picmg_01_rs_ipmbaddr,
2589
0
      tvb, 0, 1, ENC_LITTLE_ENDIAN);
2590
0
  if (tvb_captured_length(tvb) > 1) {
2591
0
    proto_tree_add_item(tree, hf_ipmi_picmg48_sub_fru_type,
2592
0
        tvb, 1, 1, ENC_LITTLE_ENDIAN);
2593
0
  }
2594
0
  if (tvb_captured_length(tvb) > 2) {
2595
0
    proto_tree_add_item(tree, hf_ipmi_picmg48_sub_fru_id,
2596
0
        tvb, 2, 1, ENC_LITTLE_ENDIAN);
2597
0
  }
2598
0
}
2599
2600
static void
2601
rs48(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2602
0
{
2603
0
  proto_tree_add_item(tree, hf_ipmi_picmg48_ip_source,
2604
0
      tvb, 0, 1, ENC_LITTLE_ENDIAN);
2605
0
}
2606
2607
static const ipmi_cmd_t cmd_picmg[] = {
2608
  /* AdvancedTCA Commands */
2609
  { 0x00, NULL, rs00, NULL, NULL, "[ATCA] Get PICMG Properties", 0 },
2610
  { 0x01, rq01, rs01, NULL, NULL, "[ATCA] Get Address Info", 0 },
2611
  { 0x02, NULL, rs02, NULL, NULL, "[ATCA] Get Shelf Address Info", 0 },
2612
  { 0x03, rq03, NULL, NULL, NULL, "[ATCA] Set Shelf Address Info", 0 },
2613
  { 0x04, rq04, NULL, NULL, NULL, "[ATCA] FRU Control", 0 },
2614
  { 0x05, rq05, rs05, NULL, NULL, "[ATCA] Get FRU LED Properties", 0 },
2615
  { 0x06, rq06, rs06, NULL, NULL, "[ATCA] Get LED Color Capabilities", 0 },
2616
  { 0x07, rq07, NULL, NULL, NULL, "[ATCA] Set FRU LED State", 0 },
2617
  { 0x08, rq08, rs08, NULL, NULL, "[ATCA] Get FRU LED State", 0 },
2618
  { 0x09, rq09, NULL, NULL, NULL, "[ATCA] Set IPMB State", 0 },
2619
  { 0x0a, rq0a, NULL, NULL, NULL, "[ATCA] Set FRU Activation Policy", 0 },
2620
  { 0x0b, rq0b, rs0b, NULL, NULL, "[ATCA] Get FRU Activation Policy", 0 },
2621
  { 0x0c, rq0c, NULL, NULL, NULL, "[ATCA] Set FRU Activation", 0 },
2622
  { 0x0d, rq0d, rs0d, NULL, NULL, "[ATCA] Get Device Locator Record ID", 0 },
2623
  { 0x0e, rq0e, NULL, NULL, NULL, "[ATCA] Set Port State", 0 },
2624
  { 0x0f, rq0f, rs0f, NULL, NULL, "[ATCA] Get Port State", 0 },
2625
  { 0x10, rq10, rs10, NULL, NULL, "[ATCA] Compute Power Properties", 0 },
2626
  { 0x11, rq11, NULL, NULL, NULL, "[ATCA] Set Power Level", 0 },
2627
  { 0x12, rq12, rs12, NULL, NULL, "[ATCA] Get Power Level", 0 },
2628
  { 0x13, rq13, NULL, NULL, NULL, "[ATCA] Renegotiate Power", 0 },
2629
  { 0x14, rq14, rs14, NULL, NULL, "[ATCA] Get Fan Speed Properties", 0 },
2630
  { 0x15, rq15, NULL, NULL, NULL, "[ATCA] Set Fan Level", 0 },
2631
  { 0x16, rq16, rs16, NULL, NULL, "[ATCA] Get Fan Level", 0 },
2632
  { 0x17, rq17, rs17, NULL, NULL, "[ATCA] Bused Resource Control", CMD_CALLRQ },
2633
  { 0x18, rq18, rs18, NULL, NULL, "[ATCA] Get IPMB Link Info", 0 },
2634
  { 0x19, rq19, NULL, NULL, NULL, "[AMC.0] Set AMC Port State", 0 },
2635
  { 0x1a, rq1a, rs1a, NULL, NULL, "[AMC.0] Get AMC Port State", 0 },
2636
  { 0x1b, NULL, rs1b, NULL, NULL, "[ATCA] Get Shelf Manager IPMB Address", 0 },
2637
  { 0x1c, rq1c, NULL, NULL, NULL, "[ATCA] Set Fan Policy", 0 },
2638
  { 0x1d, rq1d, rs1d, NULL, NULL, "[ATCA] Get Fan Policy", 0 },
2639
  { 0x1e, rq1e, rs1e, NULL, NULL, "[ATCA] FRU Control Capabilities", 0 },
2640
  { 0x1f, rq1f, rs1f, cc1f, NULL, "[ATCA] FRU Inventory Device Lock Control", 0 },
2641
  { 0x20, rq20, rs20, cc20, NULL, "[ATCA] FRU Inventory Device Write", 0 },
2642
  { 0x21, rq21, rs21, NULL, NULL, "[ATCA] Get Shelf Manager IP Addresses", 0 },
2643
  { 0x22, rq22, rs22, NULL, NULL, "[ATCA] Get Shelf Power Allocation", CMD_CALLRQ },
2644
  { 0x23, rq23, rs23, NULL, NULL, "[uTCA] Get Location Information", 0 },
2645
  { 0x24, rq24, NULL, NULL, NULL, "[uTCA] Power Channel Control", 0 },
2646
  { 0x25, rq25, rs25, NULL, NULL, "[uTCA] Get Power Channel Status", 0 },
2647
  { 0x26, rq26, NULL, NULL, NULL, "[uTCA] PM Reset", 0 },
2648
  { 0x27, rq26, rs27, NULL, NULL, "[uTCA] Get PM Status", 0 },
2649
  { 0x28, rq28, NULL, cc28, NULL, "[uTCA] PM Heartbeat", 0 },
2650
  { 0x29, rq05, rs29, NULL, NULL, "[uTCA] Get Telco Alarm Capability", 0 },
2651
  { 0x2a, rq2a, NULL, NULL, NULL, "[uTCA] Set Telco Alarm State", 0 },
2652
  { 0x2b, rq2b, rs2b, NULL, NULL, "[uTCA] Get Telco Alarm State", 0 },
2653
  { 0x2c, rq2c, NULL, NULL, NULL, "[AMC.0] Set Clock State", 0 },
2654
  { 0x2d, rq2d, rs2d, NULL, NULL, "[AMC.0] Get Clock State", 0 },
2655
  { 0x2e, NULL, rs2e, cc2e, NULL, "[HPM.1] Get Target Upgrade Capabilities", 0 },
2656
  { 0x2f, rq2f, rs2f, cc2f, NULL, "[HPM.1] Get Component Properties", CMD_CALLRQ },
2657
  { 0x30, NULL, NULL, cc30, NULL, "[HPM.1] Abort Firmware Upgrade", 0 },
2658
  { 0x31, rq31, NULL, cc31, NULL, "[HPM.1] Initiate Upgrade Action", 0 },
2659
  { 0x32, rq32, rs32, cc32, NULL, "[HPM.1] Upload Firmware Block", 0 },
2660
  { 0x33, rq33, NULL, cc33, NULL, "[HPM.1] Finish Firmware Upload", 0 },
2661
  { 0x34, NULL, rs34, cc34, NULL, "[HPM.1] Get Upgrade Status", 0 },
2662
  { 0x35, rq35, NULL, cc35, NULL, "[HPM.1] Activate Firmware", 0 },
2663
  { 0x36, NULL, rs36, cc36, NULL, "[HPM.1] Query Self-test Results", 0 },
2664
  { 0x37, NULL, rs37, cc37, NULL, "[HPM.1] Query Rollback Status", 0 },
2665
  { 0x38, NULL, NULL, cc38, NULL, "[HPM.1] Initiate Manual Rollback", 0 },
2666
  { 0x3e, rq3e, rs3e, NULL, NULL, "[HPM.2] Get HPM.x Capabilities", 0 },
2667
  { 0x3f, rq3f, rs3f, NULL, NULL, "[HPM.2] Get Dynamic Credentials", 0 },
2668
  { 0x40, rq40, rs40, cc40, NULL, "[HPM.2] Get Session Handle for Explicit LAN Bridging", 0 },
2669
  { 0x41, NULL, rs41, NULL, NULL, "[HPM.2] Get ATCA Extended Management Resources", 0 },
2670
  { 0x42, NULL, rs42, NULL, NULL, "[HPM.2] Get AMC Extended Management Resources", 0 },
2671
  { 0x43, rq43, NULL, NULL, NULL, "[HPM.2] Set ATCA Extended Management State", 0 },
2672
  { 0x44, NULL, rs44, NULL, NULL, "[HPM.2] Get ATCA Extended Management State", 0 },
2673
  { 0x45, rq45, NULL, NULL, NULL, "[HPM.2] Set AMC Power State", 0 },
2674
  { 0x46, NULL, rs46, NULL, NULL, "[HPM.2] Get AMC Power State", 0 },
2675
  { 0x47, rq47, rs47, cc47, NULL, "[HPM.2] Assign SOL Payload Instance", 0 },
2676
  { 0x48, rq48, rs48, NULL, NULL, "[HPM.3] Get IP Address Source", 0 }
2677
};
2678
2679
void
2680
proto_register_ipmi_picmg(void)
2681
14
{
2682
14
  static hf_register_info hf[] = {
2683
14
    { &hf_ipmi_picmg_led_function,
2684
14
      { "LED Function",
2685
14
        "ipmi.led.function", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
2686
14
    { &hf_ipmi_picmg_led_on_duration,
2687
14
      { "On-duration",
2688
14
        "ipmi.led.on_duration", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
2689
14
    { &hf_ipmi_picmg_led_color,
2690
14
      { "Color",
2691
14
        "ipmi.led.color", FT_UINT8, BASE_HEX, VALS(led_color_vals), 0x0f, NULL, HFILL }},
2692
2693
14
    { &hf_ipmi_picmg_linkinfo_grpid,
2694
14
      { "Grouping ID",
2695
14
        "ipmi.linkinfo.grpid", FT_UINT32, BASE_DEC, NULL, 0xff000000, NULL, HFILL }},
2696
14
    { &hf_ipmi_picmg_linkinfo_type_ext,
2697
14
      { "Type extension",
2698
14
        "ipmi.linkinfo.type_ext", FT_UINT32, BASE_HEX, NULL, 0x00f00000, NULL, HFILL }},
2699
14
    { &hf_ipmi_picmg_linkinfo_type,
2700
14
      { "Type",
2701
14
        "ipmi.linkinfo.type", FT_UINT32, BASE_HEX, VALS(linkinfo_type_vals), 0x000ff000, NULL, HFILL }},
2702
14
    { &hf_ipmi_picmg_linkinfo_ports,
2703
14
      { "Ports",
2704
14
        "ipmi.linkinfo.ports", FT_UINT32, BASE_HEX, VALS(linkinfo_ports_vals), 0x00000f00, NULL, HFILL }},
2705
14
    { &hf_ipmi_picmg_linkinfo_iface,
2706
14
      { "Interface",
2707
14
        "ipmi.linkinfo.iface", FT_UINT32, BASE_HEX, VALS(linkinfo_iface_vals), 0x000000c0, NULL, HFILL }},
2708
14
    { &hf_ipmi_picmg_linkinfo_chan,
2709
14
      { "Channel",
2710
14
        "ipmi.linkinfo.chan", FT_UINT32, BASE_DEC, NULL, 0x0000003f, NULL, HFILL }},
2711
14
    { &hf_ipmi_picmg_linkinfo_state,
2712
14
      { "State",
2713
14
        "ipmi.linkinfo.state", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
2714
14
    { &hf_ipmi_picmg_linkinfo,
2715
14
      { "Link Info",
2716
14
        "ipmi.linkinfo", FT_UINT32, BASE_HEX, NULL, 0, NULL, HFILL }},
2717
14
    { &hf_ipmi_picmg_linkinfo_amc_chan,
2718
14
      { "Channel",
2719
14
        "ipmi.linkinfo.chan", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
2720
14
    { &hf_ipmi_picmg_linkinfo_amc_ports,
2721
14
      { "Ports",
2722
14
        "ipmi.linkinfo.ports", FT_UINT24, BASE_HEX, VALS(linkinfo_ports_vals), 0x00000f, NULL, HFILL }},
2723
14
    { &hf_ipmi_picmg_linkinfo_amc_type,
2724
14
      { "Type",
2725
14
        "ipmi.linkinfo.type", FT_UINT24, BASE_HEX, VALS(linkinfo_amc_type_vals), 0x000ff0, NULL, HFILL }},
2726
14
    { &hf_ipmi_picmg_linkinfo_amc_type_ext,
2727
14
      { "Type extension",
2728
14
        "ipmi.linkinfo.type_ext", FT_UINT24, BASE_HEX, NULL, 0x00f000, NULL, HFILL }},
2729
14
    { &hf_ipmi_picmg_linkinfo_amc_grpid,
2730
14
      { "Grouping ID",
2731
14
        "ipmi.linkinfo.grpid", FT_UINT24, BASE_DEC, NULL, 0xff0000, NULL, HFILL }},
2732
14
    { &hf_ipmi_picmg_linkinfo_state_0,
2733
14
      { "Enabled",
2734
14
        "ipmi.linkinfo.state0", FT_BOOLEAN, 8, NULL, 0x1, NULL, HFILL }},
2735
14
    { &hf_ipmi_picmg_linkinfo_state_1,
2736
14
      { "Extended Management Link",
2737
14
        "ipmi.linkinfo.state1", FT_BOOLEAN, 8, NULL, 0x2, NULL, HFILL }},
2738
14
    { &hf_ipmi_picmg_linkinfo_dev,
2739
14
      { "On-Carrier Device",
2740
14
        "ipmi.linkinfo.dev", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
2741
14
    { &hf_ipmi_picmg_linkinfo_dev_type,
2742
14
      { "Device Type",
2743
14
        "ipmi.linkinfo.dev.type", FT_UINT8, BASE_DEC, VALS(amc_resource_types), 0x80, NULL, HFILL }},
2744
14
    { &hf_ipmi_picmg_linkinfo_dev_id,
2745
14
      { "Device ID",
2746
14
        "ipmi.linkinfo.dev.id", FT_UINT8, BASE_DEC_HEX, NULL, 0xF, NULL, HFILL }},
2747
2748
14
    { &hf_ipmi_picmg_clock_id,
2749
14
      { "Clock ID",
2750
14
        "ipmi.clock.id", FT_UINT8, BASE_HEX, VALS(amc_clock_ids), 0, NULL, HFILL }},
2751
14
    { &hf_ipmi_picmg_clock_cfg,
2752
14
      { "Clock Configuration Descriptor Index",
2753
14
        "ipmi.clock.cfg", FT_UINT8, BASE_DEC_HEX, NULL, 0, NULL, HFILL }},
2754
14
    { &hf_ipmi_picmg_clock_setting,
2755
14
      { "Clock Setting",
2756
14
        "ipmi.clock.setting", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
2757
14
    { &hf_ipmi_picmg_clock_state,
2758
14
      { "Clock State",
2759
14
        "ipmi.clock.state", FT_UINT8, BASE_DEC, VALS(enable_vals), 0x8, NULL, HFILL }},
2760
14
    { &hf_ipmi_picmg_clock_dir,
2761
14
      { "Clock Direction",
2762
14
        "ipmi.clock.dir", FT_UINT8, BASE_DEC, VALS(amc_clock_dirs), 0x4, NULL, HFILL }},
2763
14
    { &hf_ipmi_picmg_clock_pll,
2764
14
      { "PLL Control",
2765
14
        "ipmi.clock.pll", FT_UINT8, BASE_DEC, VALS(amc_clock_plls), 0x3, NULL, HFILL }},
2766
14
    { &hf_ipmi_picmg_clock_family,
2767
14
      { "Clock Family",
2768
14
        "ipmi.clock.family", FT_UINT8, BASE_HEX|BASE_RANGE_STRING, RVALS(amc_clock_families), 0, NULL, HFILL }},
2769
14
    { &hf_ipmi_picmg_clock_accuracy,
2770
14
      { "Clock Accuracy",
2771
14
        "ipmi.clock.accu", FT_UINT8, BASE_HEX_DEC, NULL, 0, NULL, HFILL }},
2772
14
    { &hf_ipmi_picmg_clock_frequency,
2773
14
      { "Clock Frequency",
2774
14
        "ipmi.clock.freq", FT_UINT32, BASE_DEC_HEX, NULL, 0, NULL, HFILL }},
2775
14
    { &hf_ipmi_picmg_clock_resource,
2776
14
      { "Clock Resource ID",
2777
14
        "ipmi.clock.res", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
2778
14
    { &hf_ipmi_picmg_clock_resource_type,
2779
14
      { "Resource Type",
2780
14
        "ipmi.clock.res.type", FT_UINT8, BASE_HEX, VALS(amc_clock_resource_types), 0xC0, NULL, HFILL }},
2781
14
    { &hf_ipmi_picmg_clock_resource_dev,
2782
14
      { "Device ID",
2783
14
        "ipmi.clock.res.id", FT_UINT8, BASE_DEC, NULL, 0x0F, NULL, HFILL }},
2784
2785
14
    { &hf_ipmi_picmg_00_version,
2786
14
      { "PICMG Extension Version",
2787
14
        "ipmi.picmg00.version", FT_UINT8, BASE_CUSTOM, CF_FUNC(ipmi_fmt_version), 0, NULL, HFILL }},
2788
14
    { &hf_ipmi_picmg_00_max_fruid,
2789
14
      { "Max FRU Device ID",
2790
14
        "ipmi.picmg00.max_fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
2791
14
    { &hf_ipmi_picmg_00_ipmc_fruid,
2792
14
      { "FRU Device ID for IPMC",
2793
14
        "ipmi.picmg00.ipmc_fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
2794
2795
14
    { &hf_ipmi_picmg_01_rq_fruid,
2796
14
      { "FRU ID",
2797
14
        "ipmi.picmg01.rq_fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
2798
14
    { &hf_ipmi_picmg_01_rq_addr_key_type,
2799
14
      { "Address Key Type",
2800
14
        "ipmi.picmg01.rq_addr_key_type", FT_UINT8, BASE_HEX, VALS(addr_key_type_vals), 0, NULL, HFILL }},
2801
14
    { &hf_ipmi_picmg_01_rq_addr_key,
2802
14
      { "Address Key",
2803
14
        "ipmi.picmg01.rq_addr_key", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
2804
14
    { &hf_ipmi_picmg_01_rq_site_type,
2805
14
      { "Site Type",
2806
14
        "ipmi.picmg01.rq_site_type", FT_UINT8, BASE_HEX, VALS(site_type_vals), 0, NULL, HFILL }},
2807
14
    { &hf_ipmi_picmg_01_rs_hwaddr,
2808
14
      { "Hardware Address",
2809
14
        "ipmi.picmg01.rs_hwaddr", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
2810
14
    { &hf_ipmi_picmg_01_rs_ipmbaddr,
2811
14
      { "IPMB Address",
2812
14
        "ipmi.picmg01.rs_ipmbaddr", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
2813
14
    { &hf_ipmi_picmg_01_rs_rsrv,
2814
14
      { "Reserved (shall be 0xFF)",
2815
14
        "ipmi.picmg01.rs_rsrv", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
2816
14
    { &hf_ipmi_picmg_01_rs_fruid,
2817
14
      { "FRU ID",
2818
14
        "ipmi.picmg01.rs_fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
2819
14
    { &hf_ipmi_picmg_01_rs_site_num,
2820
14
      { "Site Number",
2821
14
        "ipmi.picmg01.rs_site_num", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
2822
14
    { &hf_ipmi_picmg_01_rs_site_type,
2823
14
      { "Site Type",
2824
14
        "ipmi.picmg01.rs_site_type", FT_UINT8, BASE_HEX, VALS(site_type_vals), 0, NULL, HFILL }},
2825
2826
14
    { &hf_ipmi_picmg_02_shelf_address,
2827
14
      { "Shelf Address",
2828
14
        "ipmi.picmg02.shelf_address", FT_STRING, BASE_NONE, NULL, 0x0, NULL, HFILL }},
2829
14
    { &hf_ipmi_picmg_02_shelf_type,
2830
14
      { "Type",
2831
14
        "ipmi.picmg02.shelf_type", FT_UINT8, BASE_DEC, NULL, 0xc0, NULL, HFILL }},
2832
14
    { &hf_ipmi_picmg_02_shelf_length,
2833
14
      { "Length",
2834
14
        "ipmi.picmg02.shelf_length", FT_UINT8, BASE_DEC, NULL, 0x3f, NULL, HFILL }},
2835
2836
14
    { &hf_ipmi_picmg_03_shelf_address,
2837
14
      { "Shelf Address",
2838
14
        "ipmi.picmg03.shelf_address", FT_STRING, BASE_NONE, NULL, 0x0, NULL, HFILL }},
2839
14
    { &hf_ipmi_picmg_03_shelf_type,
2840
14
      { "Type",
2841
14
        "ipmi.picmg03.shelf_type", FT_UINT8, BASE_DEC, NULL, 0xc0, NULL, HFILL }},
2842
14
    { &hf_ipmi_picmg_03_shelf_length,
2843
14
      { "Length",
2844
14
        "ipmi.picmg03.shelf_length", FT_UINT8, BASE_DEC, NULL, 0x3f, NULL, HFILL }},
2845
2846
14
    { &hf_ipmi_picmg_04_fruid,
2847
14
      { "FRU ID",
2848
14
        "ipmi.picmg04.fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
2849
14
    { &hf_ipmi_picmg_04_cmd,
2850
14
      { "Command",
2851
14
        "ipmi.picmg04.cmd", FT_UINT8, BASE_HEX, VALS(vals_04_cmd), 0, NULL, HFILL }},
2852
2853
14
    { &hf_ipmi_picmg_05_fruid,
2854
14
      { "FRU ID",
2855
14
        "ipmi.picmg05.fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
2856
14
    { &hf_ipmi_picmg_05_led3,
2857
14
      { "LED 3",
2858
14
        "ipmi.picmg05.led3", FT_BOOLEAN, 8, NULL, 0x08, NULL, HFILL }},
2859
14
    { &hf_ipmi_picmg_05_led2,
2860
14
      { "LED 2",
2861
14
        "ipmi.picmg05.led2", FT_BOOLEAN, 8, NULL, 0x04, NULL, HFILL }},
2862
14
    { &hf_ipmi_picmg_05_led1,
2863
14
      { "LED 1",
2864
14
        "ipmi.picmg05.led1", FT_BOOLEAN, 8, NULL, 0x02, NULL, HFILL }},
2865
14
    { &hf_ipmi_picmg_05_blue_led,
2866
14
      { "BLUE LED",
2867
14
        "ipmi.picmg05.blue_led", FT_BOOLEAN, 8, NULL, 0x01, NULL, HFILL }},
2868
14
    { &hf_ipmi_picmg_05_app_leds,
2869
14
      { "Application-specific LED Count",
2870
14
        "ipmi.picmg05.app_leds", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
2871
2872
14
    { &hf_ipmi_picmg_06_fruid,
2873
14
      { "FRU ID",
2874
14
        "ipmi.picmg06.fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
2875
14
    { &hf_ipmi_picmg_06_ledid,
2876
14
      { "LED ID",
2877
14
        "ipmi.picmg06.ledid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
2878
14
    { &hf_ipmi_picmg_06_cap_white,
2879
14
      { "White",
2880
14
        "ipmi.picmg06.cap_white", FT_BOOLEAN, 8, NULL, 0x40, NULL, HFILL }},
2881
14
    { &hf_ipmi_picmg_06_cap_orange,
2882
14
      { "Orange",
2883
14
        "ipmi.picmg06.cap_orange", FT_BOOLEAN, 8, NULL, 0x20, NULL, HFILL }},
2884
14
    { &hf_ipmi_picmg_06_cap_amber,
2885
14
      { "Amber",
2886
14
        "ipmi.picmg06.cap_amber", FT_BOOLEAN, 8, NULL, 0x10, NULL, HFILL }},
2887
14
    { &hf_ipmi_picmg_06_cap_green,
2888
14
      { "Green",
2889
14
        "ipmi.picmg06.cap_green", FT_BOOLEAN, 8, NULL, 0x08, NULL, HFILL }},
2890
14
    { &hf_ipmi_picmg_06_cap_red,
2891
14
      { "Red",
2892
14
        "ipmi.picmg06.cap_red", FT_BOOLEAN, 8, NULL, 0x04, NULL, HFILL }},
2893
14
    { &hf_ipmi_picmg_06_cap_blue,
2894
14
      { "Blue",
2895
14
        "ipmi.picmg06.cap_blue", FT_BOOLEAN, 8, NULL, 0x02, NULL, HFILL }},
2896
14
    { &hf_ipmi_picmg_06_default_local_color,
2897
14
      { "Default LED Color in Local Control state",
2898
14
        "ipmi.picmg06.def_local", FT_UINT8, BASE_HEX, VALS(led_color_vals), 0x0f, NULL, HFILL }},
2899
14
    { &hf_ipmi_picmg_06_default_override_color,
2900
14
      { "Default LED Color in Override state",
2901
14
        "ipmi.picmg06.def_override", FT_UINT8, BASE_HEX, VALS(led_color_vals), 0x0f, NULL, HFILL }},
2902
2903
14
    { &hf_ipmi_picmg_07_fruid,
2904
14
      { "FRU ID",
2905
14
        "ipmi.picmg07.fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
2906
14
    { &hf_ipmi_picmg_07_ledid,
2907
14
      { "LED ID",
2908
14
        "ipmi.picmg07.ledid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
2909
2910
14
    { &hf_ipmi_picmg_08_fruid,
2911
14
      { "FRU ID",
2912
14
        "ipmi.picmg08.fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
2913
14
    { &hf_ipmi_picmg_08_ledid,
2914
14
      { "LED ID",
2915
14
        "ipmi.picmg08.ledid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
2916
14
    { &hf_ipmi_picmg_08_state_lamptest,
2917
14
      { "Lamp Test",
2918
14
        "ipmi.picmg08.state_lamptest", FT_BOOLEAN, 8, NULL, 0x04, NULL, HFILL }},
2919
14
    { &hf_ipmi_picmg_08_state_override,
2920
14
      { "Override",
2921
14
        "ipmi.picmg08.state_override", FT_BOOLEAN, 8, NULL, 0x02, NULL, HFILL }},
2922
14
    { &hf_ipmi_picmg_08_state_local,
2923
14
      { "Local Control",
2924
14
        "ipmi.picmg08.state_local", FT_BOOLEAN, 8, NULL, 0x01, NULL, HFILL }},
2925
14
    { &hf_ipmi_picmg_08_lamptest_duration,
2926
14
      { "Lamp test duration",
2927
14
        "ipmi.picmg08.lamptest_duration", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
2928
2929
14
    { &hf_ipmi_picmg_09_ipmba,
2930
14
      { "IPMB-A State",
2931
14
        "ipmi.picmg09.ipmba", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
2932
14
    { &hf_ipmi_picmg_09_ipmba_link,
2933
14
      { "Link",
2934
14
        "ipmi.picmg09.ipmba_link", FT_UINT8, BASE_HEX, NULL, 0xFE, NULL, HFILL }},
2935
14
    { &hf_ipmi_picmg_09_ipmba_state,
2936
14
      { "State",
2937
14
        "ipmi.picmg09.ipmba_state", FT_BOOLEAN, 8, TFS(&tfs_local_control_override), 0x01, NULL, HFILL }},
2938
14
    { &hf_ipmi_picmg_09_ipmbb,
2939
14
      { "IPMB-B State",
2940
14
        "ipmi.picmg09.ipmbb", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
2941
14
    { &hf_ipmi_picmg_09_ipmbb_link,
2942
14
      { "Link",
2943
14
        "ipmi.picmg09.ipmbb_link", FT_UINT8, BASE_HEX, NULL, 0xFE, NULL, HFILL }},
2944
14
    { &hf_ipmi_picmg_09_ipmbb_state,
2945
14
      { "State",
2946
14
        "ipmi.picmg09.ipmbb_state", FT_BOOLEAN, 8, TFS(&tfs_local_control_override), 0x01, NULL, HFILL }},
2947
2948
14
    { &hf_ipmi_picmg_0a_fruid,
2949
14
      { "FRU ID",
2950
14
        "ipmi.picmg0a.fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
2951
14
    { &hf_ipmi_picmg_0a_msk_d_locked,
2952
14
      { "Deactivation-Locked bit",
2953
14
        "ipmi.picmg0a.msk_deactivation", FT_BOOLEAN, 8, NULL, 0x02, NULL, HFILL }},
2954
14
    { &hf_ipmi_picmg_0a_msk_locked,
2955
14
      { "Locked bit",
2956
14
        "ipmi.picmg0a.msk_locked", FT_BOOLEAN, 8, NULL, 0x01, NULL, HFILL }},
2957
14
    { &hf_ipmi_picmg_0a_d_locked,
2958
14
      { "Deactivation-Locked bit",
2959
14
        "ipmi.picmg0a.deactivation", FT_BOOLEAN, 8, TFS(&set_clear_tfs), 0x02, NULL, HFILL }},
2960
14
    { &hf_ipmi_picmg_0a_locked,
2961
14
      { "Locked bit",
2962
14
        "ipmi.picmg0a.locked", FT_BOOLEAN, 8, TFS(&set_clear_tfs), 0x01, NULL, HFILL }},
2963
2964
14
    { &hf_ipmi_picmg_0b_fruid,
2965
14
      { "FRU ID",
2966
14
        "ipmi.picmg0b.fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
2967
14
    { &hf_ipmi_picmg_0b_d_locked,
2968
14
      { "Deactivation-Locked bit",
2969
14
        "ipmi.picmg0b.deactivation", FT_BOOLEAN, 8, TFS(&set_clear_tfs), 0x02, NULL, HFILL }},
2970
14
    { &hf_ipmi_picmg_0b_locked,
2971
14
      { "Locked bit",
2972
14
        "ipmi.picmg0b.locked", FT_BOOLEAN, 8, TFS(&set_clear_tfs), 0x01, NULL, HFILL }},
2973
2974
14
    { &hf_ipmi_picmg_0c_fruid,
2975
14
      { "FRU ID",
2976
14
        "ipmi.picmg0c.fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
2977
14
    { &hf_ipmi_picmg_0c_cmd,
2978
14
      { "Command",
2979
14
        "ipmi.picmg0c.cmd", FT_UINT8, BASE_HEX, VALS(vals_0c_cmd), 0, NULL, HFILL }},
2980
2981
14
    { &hf_ipmi_picmg_0d_fruid,
2982
14
      { "FRU ID",
2983
14
        "ipmi.picmg0d.fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
2984
14
    { &hf_ipmi_picmg_0d_start,
2985
14
      { "Search after record ID",
2986
14
        "ipmi.picmg0d.start", FT_UINT16, BASE_DEC, NULL, 0, NULL, HFILL }},
2987
14
    { &hf_ipmi_picmg_0d_recordid,
2988
14
      { "Record ID",
2989
14
        "ipmi.picmg0d.recordid", FT_UINT16, BASE_DEC, NULL, 0, NULL, HFILL }},
2990
2991
14
    { &hf_ipmi_picmg_0f_iface,
2992
14
      { "Interface",
2993
14
        "ipmi.linkinfo.iface", FT_UINT8, BASE_HEX, VALS(linkinfo_iface_vals), 0xc0, NULL, HFILL }},
2994
14
    { &hf_ipmi_picmg_0f_chan,
2995
14
      { "Channel",
2996
14
        "ipmi.linkinfo.chan", FT_UINT8, BASE_DEC, NULL, 0x3f, NULL, HFILL }},
2997
2998
14
    { &hf_ipmi_picmg_10_fruid,
2999
14
      { "FRU ID",
3000
14
        "ipmi.picmg10.fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3001
14
    { &hf_ipmi_picmg_10_nslots,
3002
14
      { "Number of spanned slots",
3003
14
        "ipmi.picmg10.nslots", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3004
14
    { &hf_ipmi_picmg_10_ipmc_loc,
3005
14
      { "IPMC Location",
3006
14
        "ipmi.picmg10.ipmc_loc", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3007
3008
14
    { &hf_ipmi_picmg_11_fruid,
3009
14
      { "FRU ID",
3010
14
        "ipmi.picmg11.fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3011
14
    { &hf_ipmi_picmg_11_power_level,
3012
14
      { "Power Level",
3013
14
        "ipmi.picmg11.power_level", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3014
14
    { &hf_ipmi_picmg_11_set_to_desired,
3015
14
      { "Set Present Levels to Desired",
3016
14
        "ipmi.picmg11.set_to_desired", FT_UINT8, BASE_HEX, VALS(vals_11_set), 0, NULL, HFILL }},
3017
3018
14
    { &hf_ipmi_picmg_12_fruid,
3019
14
      { "FRU ID",
3020
14
        "ipmi.picmg12.fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3021
14
    { &hf_ipmi_picmg_12_pwr_type,
3022
14
      { "Power Type",
3023
14
        "ipmi.picmg12.pwr_type", FT_UINT8, BASE_HEX, VALS(vals_12_pwr_type), 0, NULL, HFILL }},
3024
14
    { &hf_ipmi_picmg_12_dynamic,
3025
14
      { "Dynamic Power Configuration",
3026
14
        "ipmi.picmg12.dynamic", FT_BOOLEAN, 8, NULL, 0x80, NULL, HFILL }},
3027
14
    { &hf_ipmi_picmg_12_pwr_lvl,
3028
14
      { "Power Level",
3029
14
        "ipmi.picmg12.pwd_lvl", FT_UINT8, BASE_DEC, NULL, 0x0f, NULL, HFILL }},
3030
14
    { &hf_ipmi_picmg_12_delay,
3031
14
      { "Delay to stable power",
3032
14
        "ipmi.picmg12.delay", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3033
14
    { &hf_ipmi_picmg_12_pwr_mult,
3034
14
      { "Power multiplier",
3035
14
        "ipmi.picmg12.pwr_mult", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3036
14
    { &hf_ipmi_picmg_12_pwr_draw,
3037
14
      { "Power draw",
3038
14
        "ipmi.picmg12.pwr_draw", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3039
3040
14
    { &hf_ipmi_picmg_13_fruid,
3041
14
      { "FRU ID",
3042
14
        "ipmi.picmg13.fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3043
3044
14
    { &hf_ipmi_picmg_14_fruid,
3045
14
      { "FRU ID",
3046
14
        "ipmi.picmg14.fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3047
14
    { &hf_ipmi_picmg_14_speed_min,
3048
14
      { "Minimum Speed Level",
3049
14
        "ipmi.picmg14.speed_min", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3050
14
    { &hf_ipmi_picmg_14_speed_max,
3051
14
      { "Maximum Speed Level",
3052
14
        "ipmi.picmg14.speed_max", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3053
14
    { &hf_ipmi_picmg_14_speed_norm,
3054
14
      { "Normal Operating Level",
3055
14
        "ipmi.picmg14.speed_norm", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3056
14
    { &hf_ipmi_picmg_14_local_control,
3057
14
      { "Local Control Mode Supported",
3058
14
        "ipmi.picmg14.local_control", FT_BOOLEAN, 8, NULL, 0x80, NULL, HFILL }},
3059
3060
14
    { &hf_ipmi_picmg_15_fruid,
3061
14
      { "FRU ID",
3062
14
        "ipmi.picmg15.fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3063
14
    { &hf_ipmi_picmg_15_fan_level,
3064
14
      { "Fan Level",
3065
14
        "ipmi.picmg15.fan_level", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3066
14
    { &hf_ipmi_picmg_15_local_enable,
3067
14
      { "Local Control Enable State",
3068
14
        "ipmi.picmg15.local_enable", FT_UINT8, BASE_HEX, VALS(enable_vals), 0, NULL, HFILL }},
3069
3070
14
    { &hf_ipmi_picmg_16_fruid,
3071
14
      { "FRU ID",
3072
14
        "ipmi.picmg16.fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3073
14
    { &hf_ipmi_picmg_16_override_level,
3074
14
      { "Override Fan Level",
3075
14
        "ipmi.picmg16.override_level", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3076
14
    { &hf_ipmi_picmg_16_local_level,
3077
14
      { "Local Control Fan Level",
3078
14
        "ipmi.picmg16.local_level", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3079
14
    { &hf_ipmi_picmg_16_local_enable,
3080
14
      { "Local Control Enable State",
3081
14
        "ipmi.picmg16.local_enable", FT_UINT8, BASE_HEX, VALS(enabled_vals), 0, NULL, HFILL }},
3082
3083
14
    { &hf_ipmi_picmg_17_cmd,
3084
14
      { "Command",
3085
14
        "ipmi.picmg17.cmd", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3086
14
    { &hf_ipmi_picmg_17_resid,
3087
14
      { "Bused Resource ID",
3088
14
        "ipmi.picmg17.resid", FT_UINT8, BASE_HEX, VALS(busresid_vals), 0, NULL, HFILL }},
3089
14
    { &hf_ipmi_picmg_17_status,
3090
14
      { "Status",
3091
14
        "ipmi.picmg17.status", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3092
3093
14
    { &hf_ipmi_picmg_18_li_key_type,
3094
14
      { "Link Info Key Type",
3095
14
        "ipmi.picmg18.li_key_type", FT_UINT8, BASE_HEX, VALS(vals_18_keytype), 0, NULL, HFILL }},
3096
14
    { &hf_ipmi_picmg_18_li_key,
3097
14
      { "Link Info Key",
3098
14
        "ipmi.picmg18.li_key", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3099
14
    { &hf_ipmi_picmg_18_link_num,
3100
14
      { "Link Number",
3101
14
        "ipmi.picmg18.link_num", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3102
14
    { &hf_ipmi_picmg_18_sensor_num,
3103
14
      { "Sensor Number",
3104
14
        "ipmi.picmg18.sensor_num", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3105
3106
14
    { &hf_ipmi_picmg_1a_flags,
3107
14
      { "Extended Request Flags",
3108
14
        "ipmi.picmg1a.flags", FT_UINT8, BASE_DEC_HEX, NULL, 0, NULL, HFILL }},
3109
3110
14
    { &hf_ipmi_picmg_1b_addr_active,
3111
14
      { "Active Shelf Manager IPMB Address",
3112
14
        "ipmi.picmg1b.addr_active", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3113
14
    { &hf_ipmi_picmg_1b_addr_backup,
3114
14
      { "Backup Shelf Manager IPMB Address",
3115
14
        "ipmi.picmg1b.addr_backup", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3116
3117
14
    { &hf_ipmi_picmg_1c_fan_site_number,
3118
14
      { "Fan Tray Site Number",
3119
14
        "ipmi.picmg1c.fan_site_number", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3120
14
    { &hf_ipmi_picmg_1c_fan_enable_state,
3121
14
      { "Fan Enable state",
3122
14
        "ipmi.picmg1c.fan_enable_state", FT_UINT8, BASE_HEX, VALS(enable_vals), 0, NULL, HFILL }},
3123
14
    { &hf_ipmi_picmg_1c_fan_policy_timeout,
3124
14
      { "Fan Policy Timeout",
3125
14
        "ipmi.picmg1c.fan_policy_timeout", FT_UINT8, BASE_CUSTOM, CF_FUNC(ipmi_fmt_5s_1based), 0, NULL, HFILL }},
3126
14
    { &hf_ipmi_picmg_1c_site_number,
3127
14
      { "Site Number",
3128
14
        "ipmi.picmg1c.site_number", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3129
14
    { &hf_ipmi_picmg_1c_site_type,
3130
14
      { "Site Type",
3131
14
        "ipmi.picmg1c.site_type", FT_UINT8, BASE_HEX, VALS(site_type_vals), 0, NULL, HFILL }},
3132
3133
14
    { &hf_ipmi_picmg_1d_fan_site_number,
3134
14
      { "Fan Tray Site Number",
3135
14
        "ipmi.picmg1d.fan_site_number", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3136
14
    { &hf_ipmi_picmg_1d_site_number,
3137
14
      { "Site Number",
3138
14
        "ipmi.picmg1d.site_number", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3139
14
    { &hf_ipmi_picmg_1d_site_type,
3140
14
      { "Site Type",
3141
14
        "ipmi.picmg1d.site_type", FT_UINT8, BASE_HEX, VALS(site_type_vals), 0, NULL, HFILL }},
3142
14
    { &hf_ipmi_picmg_1d_policy,
3143
14
      { "Policy",
3144
14
        "ipmi.picmg1d.fan_enable_state", FT_UINT8, BASE_HEX, VALS(vals_1d_policy), 0, NULL, HFILL }},
3145
14
    { &hf_ipmi_picmg_1d_coverage,
3146
14
      { "Coverage",
3147
14
        "ipmi.picmg1d.coverage", FT_UINT8, BASE_HEX, VALS(vals_1d_coverage), 0, NULL, HFILL }},
3148
3149
14
    { &hf_ipmi_picmg_1e_fruid,
3150
14
      { "FRU ID",
3151
14
        "ipmi.picmg1e.fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3152
14
    { &hf_ipmi_picmg_1e_cap_diagintr,
3153
14
      { "Diagnostic interrupt",
3154
14
        "ipmi.picmg1e.cap_diagintr", FT_BOOLEAN, 8, NULL, 0x08, NULL, HFILL }},
3155
14
    { &hf_ipmi_picmg_1e_cap_graceful_reboot,
3156
14
      { "Graceful reboot",
3157
14
        "ipmi.picmg1e.cap_reboot", FT_BOOLEAN, 8, NULL, 0x04, NULL, HFILL }},
3158
14
    { &hf_ipmi_picmg_1e_cap_warm_reset,
3159
14
      { "Warm Reset",
3160
14
        "ipmi.picmg1e.cap_warmreset", FT_BOOLEAN, 8, NULL, 0x02, NULL, HFILL }},
3161
3162
14
    { &hf_ipmi_picmg_1f_rq_fruid,
3163
14
      { "FRU ID",
3164
14
        "ipmi.picmg1f.rq_fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3165
14
    { &hf_ipmi_picmg_1f_rq_op,
3166
14
      { "Operation",
3167
14
        "ipmi.picmg1f.rq_op", FT_UINT8, BASE_HEX, VALS(vals_1f_op), 0, NULL, HFILL }},
3168
14
    { &hf_ipmi_picmg_1f_rq_lockid,
3169
14
      { "Lock ID",
3170
14
        "ipmi.picmg1f.rq_lockid", FT_UINT16, BASE_HEX, NULL, 0, NULL, HFILL }},
3171
14
    { &hf_ipmi_picmg_1f_rs_lockid,
3172
14
      { "Lock ID",
3173
14
        "ipmi.picmg1f.rs_lockid", FT_UINT16, BASE_HEX, NULL, 0, NULL, HFILL }},
3174
14
    { &hf_ipmi_picmg_1f_rs_tstamp,
3175
14
      { "Last Commit Timestamp",
3176
14
        "ipmi.picmg1f.rs_tstamp", FT_UINT32, BASE_DEC, NULL, 0, NULL, HFILL }},
3177
3178
14
    { &hf_ipmi_picmg_20_fruid,
3179
14
      { "FRU ID",
3180
14
        "ipmi.picmg20.fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3181
14
    { &hf_ipmi_picmg_20_lockid,
3182
14
      { "Lock ID",
3183
14
        "ipmi.picmg20.lockid", FT_UINT16, BASE_HEX, NULL, 0, NULL, HFILL }},
3184
14
    { &hf_ipmi_picmg_20_offset,
3185
14
      { "Offset to write",
3186
14
        "ipmi.picmg20.offset", FT_UINT16, BASE_DEC, NULL, 0, NULL, HFILL }},
3187
14
    { &hf_ipmi_picmg_20_data,
3188
14
      { "Data to write",
3189
14
        "ipmi.picmg20.data", FT_BYTES, BASE_NONE, NULL, 0, NULL, HFILL }},
3190
14
    { &hf_ipmi_picmg_20_count,
3191
14
      { "Count written",
3192
14
        "ipmi.picmg20.count", FT_BYTES, BASE_NONE, NULL, 0, NULL, HFILL }},
3193
3194
14
    { &hf_ipmi_picmg_21_addr_num,
3195
14
      { "Address Number",
3196
14
        "ipmi.picmg21.addr_num", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3197
14
    { &hf_ipmi_picmg_21_tstamp,
3198
14
      { "Shelf IP Address Last Change Timestamp",
3199
14
        "ipmi.picmg21.tstamp", FT_UINT32, BASE_DEC, NULL, 0, NULL, HFILL }},
3200
14
    { &hf_ipmi_picmg_21_addr_count,
3201
14
      { "Address Count",
3202
14
        "ipmi.picmg21.addr_count", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3203
14
    { &hf_ipmi_picmg_21_site_type,
3204
14
      { "Site Type",
3205
14
        "ipmi.picmg21.site_type", FT_UINT8, BASE_HEX, VALS(site_type_vals), 0, NULL, HFILL }},
3206
14
    { &hf_ipmi_picmg_21_site_num,
3207
14
      { "Site Number",
3208
14
        "ipmi.picmg21.site_num", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3209
14
    { &hf_ipmi_picmg_21_max_unavail,
3210
14
      { "Maximum Unavailable Time",
3211
14
        "ipmi.picmg21.max_unavail", FT_UINT8, BASE_CUSTOM, CF_FUNC(ipmi_fmt_1s_1based), 0, NULL, HFILL }},
3212
14
    { &hf_ipmi_picmg_21_is_shm,
3213
14
      { "Shelf Manager IP Address",
3214
14
        "ipmi.picmg21.is_shm", FT_BOOLEAN, 8, NULL, 0x80, NULL, HFILL }},
3215
14
    { &hf_ipmi_picmg_21_addr_type,
3216
14
      { "Address Type",
3217
14
        "ipmi.picmg21.addr_type", FT_UINT8, BASE_HEX, NULL, 0x7f, NULL, HFILL }},
3218
14
    { &hf_ipmi_picmg_21_ipaddr,
3219
14
      { "IP Address",
3220
14
        "ipmi.picmg21.ip_addr", FT_IPv4, BASE_NONE, NULL, 0, NULL, HFILL }},
3221
14
    { &hf_ipmi_picmg_21_rmcpport,
3222
14
      { "RMCP Port",
3223
14
        "ipmi.picmg21.rmcp_port", FT_UINT16, BASE_DEC, NULL, 0, NULL, HFILL }},
3224
3225
14
    { &hf_ipmi_picmg_22_feed_idx,
3226
14
      { "Power Feed Index",
3227
14
        "ipmi.picmg22.feed_idx", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3228
14
    { &hf_ipmi_picmg_22_update_cnt,
3229
14
      { "Update Counter",
3230
14
        "ipmi.picmg22.update_cnt", FT_UINT16, BASE_DEC, NULL, 0, NULL, HFILL }},
3231
14
    { &hf_ipmi_picmg_22_pwr_alloc,
3232
14
      { "Power Feed Allocation",
3233
14
        "ipmi.picmg22.pwr_alloc", FT_UINT16, BASE_DEC, NULL, 0, NULL, HFILL }},
3234
3235
14
    { &hf_ipmi_picmg_XX_comp7,
3236
14
      { "Component 7",
3237
14
        "ipmi.hpm1.comp7", FT_BOOLEAN, 8, NULL, 0x80, NULL, HFILL }},
3238
14
    { &hf_ipmi_picmg_XX_comp6,
3239
14
      { "Component 6",
3240
14
        "ipmi.hpm1.comp6", FT_BOOLEAN, 8, NULL, 0x40, NULL, HFILL }},
3241
14
    { &hf_ipmi_picmg_XX_comp5,
3242
14
      { "Component 5",
3243
14
        "ipmi.hpm1.comp5", FT_BOOLEAN, 8, NULL, 0x20, NULL, HFILL }},
3244
14
    { &hf_ipmi_picmg_XX_comp4,
3245
14
      { "Component 4",
3246
14
        "ipmi.hpm1.comp4", FT_BOOLEAN, 8, NULL, 0x10, NULL, HFILL }},
3247
14
    { &hf_ipmi_picmg_XX_comp3,
3248
14
      { "Component 3",
3249
14
        "ipmi.hpm1.comp3", FT_BOOLEAN, 8, NULL, 0x08, NULL, HFILL }},
3250
14
    { &hf_ipmi_picmg_XX_comp2,
3251
14
      { "Component 2",
3252
14
        "ipmi.hpm1.comp2", FT_BOOLEAN, 8, NULL, 0x04, NULL, HFILL }},
3253
14
    { &hf_ipmi_picmg_XX_comp1,
3254
14
      { "Component 1",
3255
14
        "ipmi.hpm1.comp1", FT_BOOLEAN, 8, NULL, 0x02, NULL, HFILL }},
3256
14
    { &hf_ipmi_picmg_XX_comp0,
3257
14
      { "Component 0",
3258
14
        "ipmi.hpm1.comp0", FT_BOOLEAN, 8, NULL, 0x01, NULL, HFILL }},
3259
3260
14
    { &hf_ipmi_picmg_2e_version,
3261
14
      { "HPM.1 version",
3262
14
        "ipmi.picmg2e.hpm1_version", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3263
14
    { &hf_ipmi_picmg_2e_upgrade_undesirable,
3264
14
      { "Firmware Upgrade Undesirable",
3265
14
        "ipmi.picmg2e.upgrade_undesirable", FT_BOOLEAN, 8, NULL, 0x80, NULL, HFILL }},
3266
14
    { &hf_ipmi_picmg_2e_auto_rollback_override,
3267
14
      { "Automatic Rollback Overridden",
3268
14
        "ipmi.picmg2e.auto_rollback_override", FT_BOOLEAN, 8, NULL, 0x40, NULL, HFILL }},
3269
14
    { &hf_ipmi_picmg_2e_ipmc_degraded,
3270
14
      { "IPMC degraded during upgrade",
3271
14
        "ipmi.picmg2e.ipmc_degraded", FT_BOOLEAN, 8, NULL, 0x20, NULL, HFILL }},
3272
14
    { &hf_ipmi_picmg_2e_deferred_activate,
3273
14
      { "Deferred Activation supported",
3274
14
        "ipmi.picmg2e.deferred_activate", FT_BOOLEAN, 8, NULL, 0x10, NULL, HFILL }},
3275
14
    { &hf_ipmi_picmg_2e_services_affected,
3276
14
      { "Services affected by upgrade",
3277
14
        "ipmi.picmg2e.services_affected", FT_BOOLEAN, 8, NULL, 0x08, NULL, HFILL }},
3278
14
    { &hf_ipmi_picmg_2e_manual_rollback,
3279
14
      { "Manual Rollback supported",
3280
14
        "ipmi.picmg2e.manual_rollback", FT_BOOLEAN, 8, NULL, 0x04, NULL, HFILL }},
3281
14
    { &hf_ipmi_picmg_2e_auto_rollback,
3282
14
      { "Automatic Rollback supported",
3283
14
        "ipmi.picmg2e.auto_rollback", FT_BOOLEAN, 8, NULL, 0x02, NULL, HFILL }},
3284
14
    { &hf_ipmi_picmg_2e_self_test,
3285
14
      { "Self-Test supported",
3286
14
        "ipmi.picmg2e.self_test", FT_BOOLEAN, 8, NULL, 0x01, NULL, HFILL }},
3287
14
    { &hf_ipmi_picmg_2e_upgrade_tout,
3288
14
      { "Upgrade timeout",
3289
14
        "ipmi.picmg2e.upgrade_tout", FT_UINT8, BASE_CUSTOM, CF_FUNC(ipmi_fmt_5s_1based), 0, NULL, HFILL }},
3290
14
    { &hf_ipmi_picmg_2e_selftest_tout,
3291
14
      { "Self-test timeout",
3292
14
        "ipmi.picmg2e.selftest_tout", FT_UINT8, BASE_CUSTOM, CF_FUNC(ipmi_fmt_5s_1based), 0, NULL, HFILL }},
3293
14
    { &hf_ipmi_picmg_2e_rollback_tout,
3294
14
      { "Rollback timeout",
3295
14
        "ipmi.picmg2e.rollback_tout", FT_UINT8, BASE_CUSTOM, CF_FUNC(ipmi_fmt_5s_1based), 0, NULL, HFILL }},
3296
14
    { &hf_ipmi_picmg_2e_inaccessibility_tout,
3297
14
      { "Inaccessibility timeout",
3298
14
        "ipmi.picmg2e.inaccessibility_tout", FT_UINT8, BASE_CUSTOM, CF_FUNC(ipmi_fmt_5s_1based), 0, NULL, HFILL }},
3299
3300
14
    { &hf_ipmi_picmg_prop00_cold_reset,
3301
14
      { "Payload cold reset required",
3302
14
        "ipmi.prop00.cold_reset", FT_BOOLEAN, 8, NULL, 0x20, NULL, HFILL }},
3303
14
    { &hf_ipmi_picmg_prop00_deferred_activation,
3304
14
      { "Deferred firmware activation supported",
3305
14
        "ipmi.prop00.deferred_activation", FT_BOOLEAN, 8, NULL, 0x10, NULL, HFILL }},
3306
14
    { &hf_ipmi_picmg_prop00_comparison,
3307
14
      { "Firmware comparison supported",
3308
14
        "ipmi.prop00.firmware_comparison", FT_BOOLEAN, 8, NULL, 0x08, NULL, HFILL }},
3309
14
    { &hf_ipmi_picmg_prop00_preparation,
3310
14
      { "Prepare Components action required",
3311
14
        "ipmi.prop00.preparation", FT_BOOLEAN, 8, NULL, 0x04, NULL, HFILL }},
3312
14
    { &hf_ipmi_picmg_prop00_rollback,
3313
14
      { "Rollback/Backup support",
3314
14
        "ipmi.prop00.rollback", FT_UINT8, BASE_HEX, VALS(vals_prop00_rollback), 0x03, NULL, HFILL }},
3315
14
    { &hf_ipmi_picmg_prop01_fw_major,
3316
14
      { "Major Firmware Revision (binary encoded)",
3317
14
        "ipmi.prop01.fw_major", FT_UINT8, BASE_HEX, NULL, 0x7f, NULL, HFILL }},
3318
14
    { &hf_ipmi_picmg_prop01_fw_minor,
3319
14
      { "Minor Firmware Revision (BCD encoded)",
3320
14
        "ipmi.prop01.fw_minor", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3321
14
    { &hf_ipmi_picmg_prop01_fw_aux,
3322
14
      { "Auxiliary Firmware Revision Information",
3323
14
        "ipmi.prop01.fw_aux", FT_BYTES, BASE_NONE, NULL, 0, NULL, HFILL }},
3324
14
    { &hf_ipmi_picmg_prop02_desc,
3325
14
      { "Description string",
3326
14
        "ipmi.prop02.desc", FT_STRING, BASE_NONE, NULL, 0, NULL, HFILL }},
3327
3328
14
    { &hf_ipmi_picmg_2f_comp_id,
3329
14
      { "Component ID",
3330
14
        "ipmi.picmg2f.comp_id", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3331
14
    { &hf_ipmi_picmg_2f_comp_prop,
3332
14
      { "Component property selector",
3333
14
        "ipmi.picmg2f.comp_prop", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3334
14
    { &hf_ipmi_picmg_2f_prop_data,
3335
14
      { "Unknown property data",
3336
14
        "ipmi.picmg2f.prop_data", FT_BYTES, BASE_NONE, NULL, 0, NULL, HFILL }},
3337
3338
14
    { &hf_ipmi_picmg_31_action,
3339
14
      { "Upgrade action",
3340
14
        "ipmi.picmg31.action", FT_UINT8, BASE_HEX, VALS(vals_31_action), 0, NULL, HFILL }},
3341
3342
14
    { &hf_ipmi_picmg_32_block,
3343
14
      { "Block Number",
3344
14
        "ipmi.picmg32.block", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3345
14
    { &hf_ipmi_picmg_32_data,
3346
14
      { "Data",
3347
14
        "ipmi.picmg32.data", FT_BYTES, BASE_NONE, NULL, 0, NULL, HFILL }},
3348
14
    { &hf_ipmi_picmg_32_sec_offs,
3349
14
      { "Section Offset",
3350
14
        "ipmi.picmg32.sec_offs", FT_UINT32, BASE_HEX, NULL, 0, NULL, HFILL }},
3351
14
    { &hf_ipmi_picmg_32_sec_len,
3352
14
      { "Section Length",
3353
14
        "ipmi.picmg32.sec_len", FT_UINT32, BASE_HEX, NULL, 0, NULL, HFILL }},
3354
3355
14
    { &hf_ipmi_picmg_33_comp_id,
3356
14
      { "Component ID",
3357
14
        "ipmi.picmg33.comp_id", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3358
14
    { &hf_ipmi_picmg_33_img_len,
3359
14
      { "Image Length",
3360
14
        "ipmi.picmg33.img_len", FT_UINT32, BASE_HEX, NULL, 0, NULL, HFILL }},
3361
3362
14
    { &hf_ipmi_picmg_34_cmd,
3363
14
      { "Command in progress",
3364
14
        "ipmi.picmg34.cmd", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3365
14
    { &hf_ipmi_picmg_34_ccode,
3366
14
      { "Last command completion code",
3367
14
        "ipmi.picmg34.ccode", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3368
14
    { &hf_ipmi_picmg_34_percentage,
3369
14
      { "Completion estimate",
3370
14
        "ipmi.picmg34.percent", FT_UINT8, BASE_CUSTOM, CF_FUNC(ipmi_fmt_percent), 0x7f, NULL, HFILL }},
3371
3372
14
    { &hf_ipmi_picmg_35_rollback_override,
3373
14
      { "Rollback Override Policy",
3374
14
        "ipmi.picmg35.rollback_override", FT_UINT8, BASE_HEX, VALS(vals_35_override), 0, NULL, HFILL }},
3375
3376
14
    { &hf_ipmi_picmg_36_result,
3377
14
      { "Self test result",
3378
14
        "ipmi.picmg36.self_test_result", FT_UINT8, BASE_HEX, VALS(vals_36_result), 0, NULL, HFILL }},
3379
14
    { &hf_ipmi_picmg_36_fail,
3380
14
      { "Self-test error bitfield",
3381
14
        "ipmi.picmg36.fail", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3382
14
    { &hf_ipmi_picmg_36_fail_sel,
3383
14
      { "Cannot access SEL device",
3384
14
        "ipmi.picmg36.fail.sel", FT_BOOLEAN, 8, TFS(&tfs_36_fail_unknown), 0x80, NULL, HFILL }},
3385
14
    { &hf_ipmi_picmg_36_fail_sdr,
3386
14
      { "Cannot access SDR Repository",
3387
14
        "ipmi.picmg36.fail.sdr", FT_BOOLEAN, 8, TFS(&tfs_36_fail_unknown), 0x40, NULL, HFILL }},
3388
14
    { &hf_ipmi_picmg_36_fail_bmc_fru,
3389
14
      { "Cannot access BMC FRU device",
3390
14
        "ipmi.picmg36.fail.bmc_fru", FT_BOOLEAN, 8, TFS(&tfs_36_fail_unknown), 0x20, NULL, HFILL }},
3391
14
    { &hf_ipmi_picmg_36_fail_ipmb_sig,
3392
14
      { "IPMB signal lines do not respond",
3393
14
        "ipmi.picmg36.fail.ipmb_sig", FT_BOOLEAN, 8, TFS(&tfs_36_fail_unknown), 0x10, NULL, HFILL }},
3394
14
    { &hf_ipmi_picmg_36_fail_sdr_empty,
3395
14
      { "SDR Repository is empty",
3396
14
        "ipmi.picmg36.fail.sdr_empty", FT_BOOLEAN, 8, TFS(&tfs_36_fail_unknown), 0x08, NULL, HFILL }},
3397
14
    { &hf_ipmi_picmg_36_fail_iua,
3398
14
      { "Internal Use Area of BMC FRU corrupted",
3399
14
        "ipmi.picmg36.fail.iua", FT_BOOLEAN, 8, TFS(&tfs_36_fail_unknown), 0x04, NULL, HFILL }},
3400
14
    { &hf_ipmi_picmg_36_fail_bb_fw,
3401
14
      { "Controller update boot block firmware corrupted",
3402
14
        "ipmi.picmg36.fail.bb_fw", FT_BOOLEAN, 8, TFS(&tfs_36_fail_unknown), 0x02, NULL, HFILL }},
3403
14
    { &hf_ipmi_picmg_36_fail_oper_fw,
3404
14
      { "Controller operational firmware corrupted",
3405
14
        "ipmi.picmg36.fail.oper_fw", FT_BOOLEAN, 8, TFS(&tfs_36_fail_unknown), 0x01, NULL, HFILL }},
3406
3407
14
    { &hf_ipmi_picmg_37_percent,
3408
14
      { "Estimated percentage complete",
3409
14
        "ipmi.picmg37.percent", FT_UINT8, BASE_CUSTOM, CF_FUNC(ipmi_fmt_percent), 0x7f, NULL, HFILL }},
3410
3411
14
    { &hf_ipmi_picmg_hpm_id,
3412
14
      { "HPM.x Identifier",
3413
14
        "ipmi.picmg.hpm.id", FT_UINT8, BASE_HEX, VALS(hpm_x_ids), 0, NULL, HFILL }},
3414
14
    { &hf_ipmi_picmg_hpm_rev,
3415
14
      { "HPM.x Revision Identifier",
3416
14
        "ipmi.picmg.hpm.rev", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3417
14
    { &hf_ipmi_picmg_hpm2_mask,
3418
14
      { "IPMI LAN Channel Mask",
3419
14
        "ipmi.picmg.hpm2.mask", FT_UINT16, BASE_HEX, NULL, 0, NULL, HFILL }},
3420
14
    { &hf_ipmi_picmg_hpm2_caps,
3421
14
      { "HPM.2 Capabilities",
3422
14
        "ipmi.picmg.hpm2.caps", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3423
14
    { &hf_ipmi_picmg_hpm2_dyn_ssn,
3424
14
      { "Dynamic Sessions",
3425
14
        "ipmi.picmg.hpm2.dynssn", FT_BOOLEAN, 8, NULL, 0x10, NULL, HFILL }},
3426
14
    { &hf_ipmi_picmg_hpm2_ver_chg,
3427
14
      { "Version Change Sensor for LAN Configuration",
3428
14
        "ipmi.picmg.hpm2.verchg", FT_BOOLEAN, 8, NULL, 0x08, NULL, HFILL }},
3429
14
    { &hf_ipmi_picmg_hpm2_ext_mgt,
3430
14
      { "Extended Inactive State Management",
3431
14
        "ipmi.picmg.hpm2.extmgt", FT_BOOLEAN, 8, NULL, 0x04, NULL, HFILL }},
3432
14
    { &hf_ipmi_picmg_hpm2_pkt_trc,
3433
14
      { "IPMI Channel Packet Trace",
3434
14
        "ipmi.picmg.hpm2.pkttrc", FT_BOOLEAN, 8, NULL, 0x02, NULL, HFILL }},
3435
14
    { &hf_ipmi_picmg_hpm2_sol_ext,
3436
14
      { "SOL Extensions",
3437
14
        "ipmi.picmg.hpm2.solext", FT_BOOLEAN, 8, NULL, 0x01, NULL, HFILL }},
3438
14
    { &hf_ipmi_picmg_hpm_oem_start,
3439
14
      { "OEM LAN Parameters Start Location",
3440
14
        "ipmi.picmg.hpm.oem.start", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3441
14
    { &hf_ipmi_picmg_hpm_oem_rev,
3442
14
      { "OEM LAN Parameters Blocks Revision Number",
3443
14
        "ipmi.picmg.hpm.oem.rev", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3444
14
    { &hf_ipmi_picmg_hpm2_sol_oem_start,
3445
14
      { "OEM SOL Parameters Start Location",
3446
14
        "ipmi.picmg.hpm2.sol.oem.start", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3447
14
    { &hf_ipmi_picmg_hpm2_sol_oem_rev,
3448
14
      { "OEM SOL Parameters Blocks Revision Number",
3449
14
        "ipmi.picmg.hpm2.sol.oem.rev", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3450
14
    { &hf_ipmi_picmg_hpm_cred_hnd,
3451
14
      { "Credentials Handle",
3452
14
        "ipmi.picmg.hpm.cred.hnd", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3453
14
    { &hf_ipmi_picmg_hpm_func_sel,
3454
14
      { "Function Selector",
3455
14
        "ipmi.picmg.hpm.func.sel", FT_UINT8, BASE_DEC, VALS(hpm2_func_selectors), 0, NULL, HFILL }},
3456
14
    { &hf_ipmi_picmg_hpm_ipmi_rev,
3457
14
      { "IPMI Revision",
3458
14
        "ipmi.picmg.hpm.ipmi.rev", FT_UINT8, BASE_HEX, VALS(hpm2_ipmi_revs), 0, NULL, HFILL }},
3459
14
    { &hf_ipmi_picmg_hpm_auth_type,
3460
14
      { "Authentication Type",
3461
14
        "ipmi.picmg.hpm.auth.type", FT_UINT8, BASE_HEX, VALS(hpm2_auth_types), 0, NULL, HFILL }},
3462
14
    { &hf_ipmi_picmg_hpm_cipher_id,
3463
14
      { "Cipher Suite ID",
3464
14
        "ipmi.picmg.hpm.cipher", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3465
14
    { &hf_ipmi_picmg_hpm_priv_level,
3466
14
      { "Maximum Privilege Level",
3467
14
        "ipmi.picmg.hpm.priv", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3468
14
    { &hf_ipmi_picmg_hpm_chn_num,
3469
14
      { "IPMI Lan Channel Number",
3470
14
        "ipmi.picmg.hpm.chn.num", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3471
14
    { &hf_ipmi_picmg_hpm_avail_time,
3472
14
      { "Availability Time",
3473
14
        "ipmi.picmg.hpm.avail", FT_UINT32, BASE_DEC_HEX, NULL, 0, NULL, HFILL }},
3474
14
    { &hf_ipmi_picmg_hpm_user_name,
3475
14
      { "User Name",
3476
14
        "ipmi.picmg.hpm.user.name", FT_BYTES, BASE_NONE, NULL, 0, NULL, HFILL }},
3477
14
    { &hf_ipmi_picmg_hpm_user_pwd,
3478
14
      { "User Password",
3479
14
        "ipmi.picmg.hpm.user.pwd", FT_BYTES, BASE_NONE, NULL, 0, NULL, HFILL }},
3480
14
    { &hf_ipmi_picmg_hpm_bmc_key,
3481
14
      { "BMC Key",
3482
14
        "ipmi.picmg.hpm.bmc.key", FT_BYTES, BASE_NONE, NULL, 0, NULL, HFILL }},
3483
14
    { &hf_ipmi_picmg_hpm_operation,
3484
14
      { "Command Operation Mode",
3485
14
        "ipmi.picmg.hpm.operation", FT_UINT8, BASE_DEC, VALS(picmg40_operations), 0, NULL, HFILL }},
3486
14
    { &hf_ipmi_picmg_hpm_ssn_hnd,
3487
14
      { "Session Handle",
3488
14
        "ipmi.picmg.hpm.ssn.hnd", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3489
14
    { &hf_ipmi_picmg_hpm_power_draw,
3490
14
      { "Extended Management Power Draw",
3491
14
        "ipmi.picmg.hpm.pwr.draw", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3492
14
    { &hf_ipmi_picmg_hpm_base_channels,
3493
14
      { "Base Interface Channels",
3494
14
        "ipmi.picmg.hpm.base.chn", FT_UINT16, BASE_HEX, NULL, 0, NULL, HFILL }},
3495
14
    { &hf_ipmi_picmg_hpm_fabric_channels,
3496
14
      { "Fabric Interface Channels",
3497
14
        "ipmi.picmg.hpm.fabric.chn", FT_UINT16, BASE_HEX, NULL, 0, NULL, HFILL }},
3498
14
    { &hf_ipmi_picmg_hpm_update_channels,
3499
14
      { "Update Channels",
3500
14
        "ipmi.picmg.hpm.upd.chn", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3501
14
    { &hf_ipmi_picmg_hpm_cross_channels,
3502
14
      { "ShMC Cross-Connect Channels",
3503
14
        "ipmi.picmg.hpm.cross.chn", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3504
14
    { &hf_ipmi_picmg_hpm_num_chn_desc,
3505
14
      { "Number of Channel Descriptors",
3506
14
        "ipmi.picmg.hpm.num.chn.desc", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3507
14
    { &hf_ipmi_picmg_hpm_chn_mask,
3508
14
      { "Channel Bitmask",
3509
14
        "ipmi.picmg.hpm.chn.mask", FT_UINT32, BASE_HEX, NULL, 0, NULL, HFILL }},
3510
14
    { &hf_ipmi_picmg_hpm_ext_mgmt_state,
3511
14
      { "Extended Management State",
3512
14
        "ipmi.picmg.hpm.ext.mgmt.state", FT_UINT8, BASE_DEC, VALS(enable_vals), 0, NULL, HFILL }},
3513
14
    { &hf_ipmi_picmg_hpm_polling_period,
3514
14
      { "Polling Period",
3515
14
        "ipmi.picmg.hpm.poll.period", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3516
14
    { &hf_ipmi_picmg_hpm_auth_pwr_state,
3517
14
      { "Authorized Power State",
3518
14
        "ipmi.picmg.hpm.auth.pwr", FT_UINT8, BASE_DEC, VALS(auth_pwr_states), 0, NULL, HFILL }},
3519
14
    { &hf_ipmi_picmg_hpm_amc_pwr_state,
3520
14
      { "Actual Power State",
3521
14
        "ipmi.picmg.hpm.amc.pwr", FT_UINT8, BASE_DEC, VALS(amc_pwr_states), 0, NULL, HFILL }},
3522
3523
14
    { &hf_ipmi_picmg47_port,
3524
14
      { "System Serial Port Number",
3525
14
        "ipmi.picmg47.port", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3526
14
    { &hf_ipmi_picmg47_flags,
3527
14
      { "Flags",
3528
14
        "ipmi.picmg47.flags", FT_UINT8, BASE_DEC, VALS(picmg47_flags), 0x01, NULL, HFILL }},
3529
14
    { &hf_ipmi_picmg47_assignment,
3530
14
      { "Assigned Instance",
3531
14
        "ipmi.picmg47.assign", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3532
14
    { &hf_ipmi_picmg47_state,
3533
14
      { "Serial port assigned to instance state",
3534
14
        "ipmi.picmg47.state", FT_UINT8, BASE_DEC, VALS(picmg47_states), 0x80, NULL, HFILL }},
3535
14
    { &hf_ipmi_picmg47_instance,
3536
14
      { "Payload instance number",
3537
14
        "ipmi.picmg47.instance", FT_UINT8, BASE_DEC, NULL, 0x0F, NULL, HFILL }},
3538
3539
14
    { &hf_ipmi_picmg48_sub_fru_type,
3540
14
      { "Subsidiary FRU Identifier Type",
3541
14
        "ipmi.picmg48.fru.type", FT_UINT8, BASE_DEC, VALS(picmg48_fru_types), 0, NULL, HFILL }},
3542
14
    { &hf_ipmi_picmg48_sub_fru_id,
3543
14
      { "Subsidiary FRU Identifier",
3544
14
        "ipmi.picmg48.fru.id", FT_UINT8, BASE_DEC_HEX, NULL, 0, NULL, HFILL }},
3545
14
    { &hf_ipmi_picmg48_ip_source,
3546
14
      { "IP Address Source",
3547
14
        "ipmi.picmg48.ip.source", FT_UINT8, BASE_DEC, VALS(picmg48_ip_sources), 0, NULL, HFILL }},
3548
3549
14
    { &hf_ipmi_picmg_23_rq_byte2,
3550
14
      { "Request Flags",
3551
14
        "ipmi.picmg23.rq.flags", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3552
14
    { &hf_ipmi_picmg_23_slot_sel,
3553
14
      { "MCS",
3554
14
        "ipmi.picmg23.rq.mcs", FT_UINT8, BASE_HEX, VALS(picmg_23_slot_selectors), 0xC0, NULL, HFILL }},
3555
14
    { &hf_ipmi_picmg_23_carrier_num,
3556
14
      { "Carrier Number",
3557
14
        "ipmi.picmg23.carrier.num", FT_UINT8, BASE_DEC, NULL, 0x1F, NULL, HFILL }},
3558
14
    { &hf_ipmi_picmg_23_slot_num,
3559
14
      { "Slot Number",
3560
14
        "ipmi.picmg23.slot.num", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3561
14
    { &hf_ipmi_picmg_23_tier_num,
3562
14
      { "Tier Number",
3563
14
        "ipmi.picmg23.tier.num", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3564
14
    { &hf_ipmi_picmg_23_rs_byte5,
3565
14
      { "Orientation Flags",
3566
14
        "ipmi.picmg23.rs.flags", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3567
14
    { &hf_ipmi_picmg_23_slot_base,
3568
14
      { "Slot Numbers",
3569
14
        "ipmi.picmg23.slot.base", FT_UINT8, BASE_DEC, VALS(picmg_23_num_bases), 0x80, NULL, HFILL }},
3570
14
    { &hf_ipmi_picmg_23_tier_base,
3571
14
      { "Tier Numbers",
3572
14
        "ipmi.picmg23.tier.base", FT_UINT8, BASE_DEC, VALS(picmg_23_num_bases), 0x40, NULL, HFILL }},
3573
14
    { &hf_ipmi_picmg_23_orientation,
3574
14
      { "Carrier Orientation",
3575
14
        "ipmi.picmg23.orient", FT_UINT8, BASE_DEC, VALS(picmg_23_orientations), 0x20, NULL, HFILL }},
3576
14
    { &hf_ipmi_picmg_23_origin_x,
3577
14
      { "Origin X",
3578
14
        "ipmi.picmg23.origin.x", FT_UINT16, BASE_DEC, NULL, 0, NULL, HFILL }},
3579
14
    { &hf_ipmi_picmg_23_origin_y,
3580
14
      { "Origin Y",
3581
14
        "ipmi.picmg23.origin.y", FT_UINT16, BASE_DEC, NULL, 0, NULL, HFILL }},
3582
3583
14
    { &hf_ipmi_picmg_24_channel,
3584
14
      { "Power Channel Number",
3585
14
        "ipmi.picmg.pwr.channel", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3586
14
    { &hf_ipmi_picmg_24_control,
3587
14
      { "Power Channel Control",
3588
14
        "ipmi.picmg.pwr.control", FT_UINT8, BASE_DEC, VALS(picmg_24_controls), 0, NULL, HFILL }},
3589
14
    { &hf_ipmi_picmg_24_current,
3590
14
      { "Power Channel Current Limit",
3591
14
        "ipmi.picmg.pwr.limit", FT_UINT8, BASE_CUSTOM, CF_FUNC(fmt_power_amps), 0, NULL, HFILL }},
3592
14
    { &hf_ipmi_picmg_24_primary_pm,
3593
14
      { "Primary PM",
3594
14
        "ipmi.picmg.primary.pm", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3595
14
    { &hf_ipmi_picmg_24_backup_pm,
3596
14
      { "Redundant PM",
3597
14
        "ipmi.picmg.backup.pm", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3598
3599
14
    { &hf_ipmi_picmg_25_start,
3600
14
      { "Starting Power Channel Number",
3601
14
        "ipmi.picmg25.start", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3602
14
    { &hf_ipmi_picmg_25_count,
3603
14
      { "Power Channel Count",
3604
14
        "ipmi.picmg25.count", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3605
14
    { &hf_ipmi_picmg_25_max,
3606
14
      { "Max Power Channel Number",
3607
14
        "ipmi.picmg25.max", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3608
14
    { &hf_ipmi_picmg_25_gstatus,
3609
14
      { "Global Status",
3610
14
        "ipmi.picmg25.gstatus", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3611
14
    { &hf_ipmi_picmg_25_fault,
3612
14
      { "Unidentified Fault",
3613
14
        "ipmi.picmg25.fault", FT_UINT8, BASE_DEC, VALS(picmg_25_fault_vals), 0x08, NULL, HFILL }},
3614
14
    { &hf_ipmi_picmg_25_pwr_good,
3615
14
      { "Payload Power is Good",
3616
14
        "ipmi.picmg25.pwr.good", FT_BOOLEAN, 8, NULL, 0x04, NULL, HFILL }},
3617
14
    { &hf_ipmi_picmg_25_mp_good,
3618
14
      { "Management Power is Good",
3619
14
        "ipmi.picmg25.mp.good", FT_BOOLEAN, 8, NULL, 0x02, NULL, HFILL }},
3620
14
    { &hf_ipmi_picmg_25_role,
3621
14
      { "Role",
3622
14
        "ipmi.picmg25.role", FT_BOOLEAN, 8, TFS(&picmg_25_roles), 0x01, NULL, HFILL }},
3623
14
    { &hf_ipmi_picmg_25_cstatus,
3624
14
      { "Power Channel Status",
3625
14
        "ipmi.picmg25.cstatus", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3626
14
    { &hf_ipmi_picmg_25_pwr_on,
3627
14
      { "PWR_ON is asserted",
3628
14
        "ipmi.picmg25.pwr.on", FT_BOOLEAN, 8, NULL, 0x40, NULL, HFILL }},
3629
14
    { &hf_ipmi_picmg_25_pwr_ovr,
3630
14
      { "Payload Power Overcurrent is detected",
3631
14
        "ipmi.picmg25.pwr.ovr", FT_BOOLEAN, 8, NULL, 0x20, NULL, HFILL }},
3632
14
    { &hf_ipmi_picmg_25_pwr,
3633
14
      { "Payload Power is enabled",
3634
14
        "ipmi.picmg25.pwr", FT_BOOLEAN, 8, NULL, 0x10, NULL, HFILL }},
3635
14
    { &hf_ipmi_picmg_25_enable,
3636
14
      { "ENABLE# is asserted",
3637
14
        "ipmi.picmg25.enable", FT_BOOLEAN, 8, NULL, 0x08, NULL, HFILL }},
3638
14
    { &hf_ipmi_picmg_25_mp_ovr,
3639
14
      { "Management Power Overcurrent is detected",
3640
14
        "ipmi.picmg25.mp.ovr", FT_BOOLEAN, 8, NULL, 0x04, NULL, HFILL }},
3641
14
    { &hf_ipmi_picmg_25_mp,
3642
14
      { "Management Power is enabled",
3643
14
        "ipmi.picmg25.mp", FT_BOOLEAN, 8, NULL, 0x02, NULL, HFILL }},
3644
14
    { &hf_ipmi_picmg_25_ps1,
3645
14
      { "PS1# is asserted",
3646
14
        "ipmi.picmg25.ps1", FT_BOOLEAN, 8, NULL, 0x01, NULL, HFILL }},
3647
3648
14
    { &hf_ipmi_picmg_26_pm_site,
3649
14
      { "PM Site Number",
3650
14
        "ipmi.picmg26.pm.site", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3651
14
    { &hf_ipmi_picmg_27_rs_byte3,
3652
14
      { "PM Status",
3653
14
        "ipmi.picmg26.pm.status", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3654
14
    { &hf_ipmi_picmg_27_pm_healthy,
3655
14
      { "PM is present and healthy",
3656
14
        "ipmi.picmg26.pm.hly", FT_BOOLEAN, 8, NULL, 0x01, NULL, HFILL }},
3657
14
    { &hf_ipmi_picmg_28_timeout,
3658
14
      { "Time-out",
3659
14
        "ipmi.picmg28.timeout", FT_UINT8, BASE_CUSTOM, CF_FUNC(fmt_100ms), 0, NULL, HFILL }},
3660
14
    { &hf_ipmi_picmg_28_rq_byte3,
3661
14
      { "Flags",
3662
14
        "ipmi.picmg28.flags", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3663
14
    { &hf_ipmi_picmg_28_mch2,
3664
14
      { "Use MCH2 PS1# de-assertion to indicate Carrier Manager is extracted",
3665
14
        "ipmi.picmg28.mch2", FT_BOOLEAN, 8, NULL, 0x02, NULL, HFILL }},
3666
14
    { &hf_ipmi_picmg_28_mch1,
3667
14
      { "Use MCH1 PS1# de-assertion to indicate Carrier Manager is extracted",
3668
14
        "ipmi.picmg28.mch1", FT_BOOLEAN, 8, NULL, 0x01, NULL, HFILL }},
3669
3670
14
    { &hf_ipmi_picmg_29_rs_byte3,
3671
14
      { "Alarm Capabilities",
3672
14
        "ipmi.picmg29.caps", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3673
14
    { &hf_ipmi_picmg_29_maj_rst,
3674
14
      { "Autonomous Major Reset",
3675
14
        "ipmi.picmg29.maj.rst", FT_BOOLEAN, 8, TFS(&picmg_29_alarm_actions), 0x80, NULL, HFILL }},
3676
14
    { &hf_ipmi_picmg_29_min_rst,
3677
14
      { "Autonomous Minor Reset",
3678
14
        "ipmi.picmg29.min.rst", FT_BOOLEAN, 8, TFS(&picmg_29_alarm_actions), 0x40, NULL, HFILL }},
3679
14
    { &hf_ipmi_picmg_29_alarm_cut,
3680
14
      { "Autonomous alarm cutoff",
3681
14
        "ipmi.picmg29.alrm.cut", FT_BOOLEAN, 8, TFS(&picmg_29_alarm_actions), 0x20, NULL, HFILL }},
3682
14
    { &hf_ipmi_picmg_29_test_mode,
3683
14
      { "Test Mode",
3684
14
        "ipmi.picmg29.test.mode", FT_BOOLEAN, 8, TFS(&picmg_29_alarm_modes), 0x10, NULL, HFILL }},
3685
14
    { &hf_ipmi_picmg_29_pwr_alarm,
3686
14
      { "Power Alarm",
3687
14
        "ipmi.picmg29.pwr.alrm", FT_BOOLEAN, 8, TFS(&picmg_29_alarm_modes), 0x08, NULL, HFILL }},
3688
14
    { &hf_ipmi_picmg_29_minor_alarm,
3689
14
      { "Minor Alarm",
3690
14
        "ipmi.picmg29.min.alrm", FT_BOOLEAN, 8, TFS(&picmg_29_alarm_modes), 0x04, NULL, HFILL }},
3691
14
    { &hf_ipmi_picmg_29_major_alarm,
3692
14
      { "Minor Alarm",
3693
14
        "ipmi.picmg29.maj.alrm", FT_BOOLEAN, 8, TFS(&picmg_29_alarm_modes), 0x02, NULL, HFILL }},
3694
14
    { &hf_ipmi_picmg_29_crit_alarm,
3695
14
      { "Critical Alarm",
3696
14
        "ipmi.picmg29.crit.alrm", FT_BOOLEAN, 8, TFS(&picmg_29_alarm_modes), 0x01, NULL, HFILL }},
3697
3698
14
    { &hf_ipmi_picmg_2a_alarm_id,
3699
14
      { "Alarm ID",
3700
14
        "ipmi.picmg29.alrm.id", FT_UINT8, BASE_HEX, VALS(picmg_2a_alarm_ids), 0, NULL, HFILL }},
3701
14
    { &hf_ipmi_picmg_2a_alarm_ctrl,
3702
14
      { "Alarm Control",
3703
14
        "ipmi.picmg29.alrm.ctrl", FT_UINT8, BASE_HEX, VALS(picmg_2a_alarm_ctrls), 0, NULL, HFILL }},
3704
3705
14
    { &hf_ipmi_picmg_2b_alarm_state,
3706
14
      { "Alarm State",
3707
14
        "ipmi.picmg29.alrm.state", FT_UINT8, BASE_HEX, VALS(picmg_2a_alarm_ctrls), 0, NULL, HFILL }},
3708
3709
14
  };
3710
14
  static int *ett[] = {
3711
14
    &ett_ipmi_picmg_led_color,
3712
14
    &ett_ipmi_picmg_link_info,
3713
14
    &ett_ipmi_picmg_link_state,
3714
14
    &ett_ipmi_picmg_link_dev,
3715
14
    &ett_ipmi_picmg_clock_setting,
3716
14
    &ett_ipmi_picmg_clock_res,
3717
14
    &ett_ipmi_picmg_05_byte1,
3718
14
    &ett_ipmi_picmg_06_byte1,
3719
14
    &ett_ipmi_picmg_06_byte2,
3720
14
    &ett_ipmi_picmg_06_byte3,
3721
14
    &ett_ipmi_picmg_08_byte1,
3722
14
    &ett_ipmi_picmg_09_ipmba,
3723
14
    &ett_ipmi_picmg_09_ipmbb,
3724
14
    &ett_ipmi_picmg_0a_byte2,
3725
14
    &ett_ipmi_picmg_0a_byte3,
3726
14
    &ett_ipmi_picmg_0b_byte1,
3727
14
    &ett_ipmi_picmg_0f_chan,
3728
14
    &ett_ipmi_picmg_12_byte1,
3729
14
    &ett_ipmi_picmg_14_prop,
3730
14
    &ett_ipmi_picmg_1e_byte1,
3731
14
    &ett_ipmi_picmg_21_byte9,
3732
14
    &ett_ipmi_picmg_XX_compbits,
3733
14
    &ett_ipmi_picmg_2e_byte2,
3734
14
    &ett_ipmi_picmg_prop00_byte1,
3735
14
    &ett_ipmi_picmg_prop01_byte1,
3736
14
    &ett_ipmi_picmg_34_byte3,
3737
14
    &ett_ipmi_picmg_36_byte2,
3738
14
    &ett_ipmi_picmg_37_byte2,
3739
14
    &ett_ipmi_picmg_hpm_caps,
3740
14
    &ett_ipmi_picmg_47_byte1,
3741
14
    &ett_ipmi_picmg_23_rq_byte2,
3742
14
    &ett_ipmi_picmg_23_rs_byte5,
3743
14
    &ett_ipmi_picmg_25_rs_byte4,
3744
14
    &ett_ipmi_picmg_25_rs_byte5,
3745
14
    &ett_ipmi_picmg_27_rs_byte3,
3746
14
    &ett_ipmi_picmg_28_rq_byte3,
3747
14
    &ett_ipmi_picmg_29_rs_byte3
3748
14
  };
3749
14
  static uint8_t sig_picmg[1] = { 0 };
3750
3751
14
  proto_register_field_array(proto_ipmi, hf, array_length(hf));
3752
14
  proto_register_subtree_array(ett, array_length(ett));
3753
14
  ipmi_register_netfn_cmdtab(IPMI_GROUP_REQ, IPMI_OEM_NONE, sig_picmg, 1,
3754
14
      "PICMG", cmd_picmg, array_length(cmd_picmg));
3755
14
}
3756
3757
3758
/*
3759
 * Editor modelines  -  https://www.wireshark.org/tools/modelines.html
3760
 *
3761
 * Local variables:
3762
 * c-basic-offset: 8
3763
 * tab-width: 8
3764
 * indent-tabs-mode: t
3765
 * End:
3766
 *
3767
 * vi: set shiftwidth=8 tabstop=8 noexpandtab:
3768
 * :indentSize=8:tabSize=8:noTabs=false:
3769
 */