/* packet-ebhscr.c

 * Routines for EBHSCR dissection

 * Copyright 2019, Ana Pantar <ana.pantar@gmail.com> for Elektrobit

 *

 * Wireshark - Network traffic analyzer

 * By Gerald Combs <gerald@wireshark.org>

 * Copyright 1998 Gerald Combs

 *

 * For more information on this protocol see:

 * https://www.elektrobit.com/ebhscr

 *

 * SPDX-License-Identifier: GPL-2.0-or-later

 */

#include <config.h>

#include <epan/packet.h>

#include <epan/decode_as.h>

#include <epan/prefs.h>

#include <wiretap/wtap.h>

#include <epan/expert.h>

#include <epan/tfs.h>

/* Custom EBHSCR packet types */

#define EBHSCR_USER_FIRST 0x43

#define EBHSCR_USER_LAST 0x4F

/* EBHSCR packet types */

#define ETHERNET_FRAME 0x50

#define NMEA_FRAME 0x51

#define TIME_STATE_FRAME 0x52

#define CAN_FRAME 0x53

#define LIN_FRAME 0x55

#define DIO_FRAME 0x56

#define FLEXRAY_FRAME 0x57

#define MIPI_CSI2 0x59

#define DSI3_FRAME 0x5C

#define CSI2_FRAME 0x5E

/* Protocol specific definitions */

#define FLEXRAY_FRAME_PACKET 0x00

#define FLEXRAY_SYMBOL_PACKET 0x01

#define FLEXRAY_SLOT_STATUS_PACKET 0x02

#define FLEXRAY_START_OF_CYCLE_PACKET 0x03

#define FLEXRAY_CHANNEL_B_MASK 0x02

#define FLEXRAY_TSSVIOL_MASK 0x0020

#define FLEXRAY_CODERR_MASK 0x0010

#define FLEXRAY_FESERR_MASK 0x0100

#define FLEXRAY_HCRCERR_MASK 0x0040

#define FLEXRAY_FCRCERR_MASK 0x0080

#define MIPI_CSI2_PKT_HDR_LEN 8U

#define CSI2_FRAME_NUM_SECTIONS 8U

#define CSI2_FRAME_SECTION_SIZE_BYTES 16U

#define CSI2_FRAME_PKT_HDR_LEN 128U

#define DSI3_CHANNEL_SLAVE 0x00

#define DSI3_CHANNEL_MASTER 0x01

#define EBHSCR_HEADER_LENGTH 32U

void proto_reg_handoff_ebhscr(void);

void proto_register_ebhscr(void);

static int proto_ebhscr;

static int hf_ebhscr_packet_header;

static int hf_ebhscr_major_number;

static int hf_ebhscr_slot;

static int hf_ebhscr_channel;

static int hf_ebhscr_status;

static int hf_ebhscr_status_unused;

static int hf_can_proto_type;

static int hf_can_status_available;

static int hf_can_status_overflow;

static int hf_can_LEC;

static int hf_can_ERRP;

static int hf_can_ERRW;

static int hf_can_BOFF;

static int hf_can_DLEC;

static int hf_can_TEC;

static int hf_can_REC;

static int hf_can_CEL;

static int hf_can_reserved_bytes;

static int hf_eth_reserved_bytes;

static int hf_eth_tx_trunc;

static int hf_eth_trans_undrun;

static int hf_eth_retrans_limit;

static int hf_eth_late_collision;

static int hf_eth_link_up_down;

static int hf_eth_master_slave;

static int hf_eth_fcs_unavailable;

static int hf_eth_rsvd_bit;

static int hf_eth_speed;

static int hf_eth_crc_error;

static int hf_eth_mii_foe;

static int hf_eth_payload_foe;

static int hf_eth_hdr_foe;

static int hf_eth_rcv_dec_err;

static int hf_eth_sym_error;

static int hf_eth_jabber_event;

static int hf_eth_pol_ch_event;

static int hf_eth_fls_carrier_event;

static int hf_eth_rx_trunc;

static int hf_eth_transmission_disc_err;

static int hf_eth_wait_frame_sep_bit;

static int hf_ts_time_offset_valid;

static int hf_ts_last_offset_change_valid;

static int hf_ts_nano_seconds_last_jump_valid;

static int hf_ts_UTC_leap_seconds_valid;

static int hf_ts_sync_state_valid;

static int hf_ts_time_source;

static int hf_ts_time_offset_ns;

static int hf_ts_last_offset_ns;

static int hf_ts_last_jump_ns;

static int hf_ts_utc_leap_sec;

static int hf_ts_sync_state;

static int hf_lin_1_3_classic_chksum;

static int hf_lin_1_2_enhanced_chksum;

static int hf_lin_wakeup;

static int hf_lin_time_jump;

static int hf_lin_reserved_bytes;

static int hf_lin_wakeup_length;

static int hf_lin_sts_reserved;

static int hf_lin_sts_syn;

static int hf_lin_sts_par;

static int hf_lin_sts_res;

static int hf_lin_sts_dat;

static int hf_lin_sts_chk;

static int hf_lin_sts_sta;

static int hf_lin_sts_sto;

static int hf_lin_sts_emp;

static int hf_lin_payload;

static int hf_lin_payload_pid;

static int hf_lin_payload_id_parity_0;

static int hf_lin_payload_id_parity_1;

static int hf_lin_payload_id;

static int hf_lin_payload_data;

static int hf_lin_payload_checksum;

static int hf_dio_overflow_mon_unit;

static int hf_dio_jump_occurred;

static int hf_dio_value_type;

static int hf_dio_channel_ref;

static int hf_dio_gpio_id;

static int hf_dio_reserved_bytes;

static int hf_flexray_ch_a;

static int hf_flexray_ch_b;

static int hf_flexray_ctrl_id;

static int hf_flexray_monitoring_bit;

static int hf_flexray_sync_bit;

static int hf_flexray_packet_type;

static int hf_flexray_CODERR;

static int hf_flexray_TSSVIOL;

static int hf_flexray_HCRCERR;

static int hf_flexray_FCRCERR;

static int hf_flexray_FESERR;

static int hf_flexray_FSSERR;

static int hf_flexray_BSSERR;

static int hf_flexray_jump_occurred;

static int hf_flexray_overflow_err;

static int hf_flexray_slot_information;

static int hf_flexray_SBV;

static int hf_flexray_ACI;

static int hf_flexray_CED;

static int hf_flexray_SED;

static int hf_flexray_VFR;

static int hf_flexray_SID;

static int hf_flexray_frame_status;

static int hf_flexray_SPLERR;

static int hf_flexray_CCERR;

static int hf_flexray_FIDERR;

static int hf_flexray_SSERR;

static int hf_flexray_NERR;

static int hf_flexray_SOVERR;

static int hf_flexray_SWVIOL;

static int hf_flexray_NITVIOL;

static int hf_flexray_BVIOL;

static int hf_flexray_PCD;

static int hf_flexray_SYNCERR;

static int hf_flexray_CP;

static int hf_flexray_BRC;

static int hf_flexray_symbol_length_and_status;

static int hf_flexray_SYERR;

static int hf_flexray_SL;

static int hf_flexray_POC_state;

static int hf_flexray_following_cycle_counter;

static int hf_flexray_supercycle_counter;

static int hf_dsi3_status_crc_error;

static int hf_dsi3_status_transition_error;

static int hf_dsi3_status_packet_truncated_error;

static int hf_dsi3_status_packet_dropped_error;

static int hf_dsi3_mjr_hdr_st0_command_type;

static int hf_dsi3_mjr_hdr_slave_st0_bit_count;

static int hf_dsi3_mjr_hdr_slave_st2_blnk_err;

static int hf_dsi3_mjr_hdr_slave_st2_no_trans_err;

static int hf_dsi3_mjr_hdr_slave_st3_crc_err;

static int hf_dsi3_mjr_hdr_slave_st3_cnt_overflow;

static int hf_dsi3_mjr_hdr_slave_st3_disabled_err;

static int hf_dsi3_mjr_hdr_slave_st3_trunc_data;

static int hf_dsi3_mjr_hdr_slave_st3_drop_data;

static int hf_dsi3_mjr_hdr_master_st0_nibble_count;

static int hf_dsi3_mjr_hdr_master_st2_blnk_err;

static int hf_dsi3_mjr_hdr_master_st2_bad_trans_err;

static int hf_dsi3_mjr_hdr_master_st2_bad_chip_err;

static int hf_dsi3_mjr_hdr_master_st2_no_trans_err;

static int hf_dsi3_mjr_hdr_master_st3_crc_err;

static int hf_dsi3_mjr_hdr_master_st3_bad_decode_err;

static int hf_dsi3_mjr_hdr_master_st3_cnt_overflow;

static int hf_dsi3_mjr_hdr_master_st3_disable_err;

static int hf_dsi3_mjr_hdr_master_st3_trunc_data;

static int hf_dsi3_mjr_hdr_master_st3_drop_data;

static int hf_mipi_csi2_status_packet_checksum_err;

static int hf_mipi_csi2_status_ecc_err;

static int hf_mipi_csi2_status_payload_fifo_overflow;

static int hf_mipi_csi2_status_header_fifo_overflow;

static int hf_mipi_csi2_status_rcv_decoder_err;

static int hf_mipi_csi2_status_payload_trunc_err;

static int hf_mipi_csi2_status_trans_rejected;

static int hf_mipi_csi2_mjr_hdr_flags_packet_checksum_err;

static int hf_mipi_csi2_mjr_hdr_flags_correctable_ecc_err;

static int hf_mipi_csi2_mjr_hdr_flags_uncorrectable_ecc_err;

static int hf_mipi_csi2_mjr_hdr_flags_mipi_phy_type;

static int hf_mipi_csi2_mjr_hdr_flags_first_line_of_frame;

static int hf_mipi_csi2_mjr_hdr_frame_counter;

static int hf_mipi_csi2_mjr_hdr_line_counter;

static int hf_mipi_csi2_payload_pkt_hdr;

static int hf_mipi_csi2_payload_pkt_hdr_dt;

static int hf_mipi_csi2_payload_pkt_hdr_vc;

static int hf_mipi_csi2_payload_pkt_hdr_ecc;

static int hf_mipi_csi2_payload_pkt_hdr_crc;

static int hf_mipi_csi2_payload_pkt_hdr_wc_lsb;

static int hf_mipi_csi2_payload_pkt_hdr_wc_msb;

static int hf_csi2_frame_status_packet_checksum_err;

static int hf_csi2_frame_status_ecc_err;

static int hf_csi2_frame_status_rcv_decoder_err;

static int hf_csi2_frame_status_section_err;

static int hf_csi2_frame_status_fifo_overflow;

static int hf_csi2_frame_status_payload_trunc_err;

static int hf_csi2_frame_status_trans_rejected;

static int hf_csi2_frame_mjr_hdr_flags_proc;

static int hf_csi2_frame_mjr_hdr_flags_pad_align;

static int hf_csi2_frame_mjr_hdr_flags_mipi_phy_type;

static int hf_csi2_frame_mjr_hdr_vc;

static int hf_csi2_frame_mjr_hdr_imhv;

static int hf_csi2_frame_header;

static int hf_csi2_frame_header_payload_byte_offset;

static int hf_csi2_frame_header_bytes_total;

static int hf_csi2_frame_header_bytes_per_line;

static int hf_csi2_frame_header_number_lines;

static int hf_csi2_frame_header_error_bits_field;

static int hf_csi2_frame_header_mipi_data_type;

static int hf_csi2_frame_sections[CSI2_FRAME_NUM_SECTIONS];

static int hf_csi2_frame_header_error_bits_packet_checksum_err;

static int hf_csi2_frame_header_error_bits_correctable_ecc_err;

static int hf_csi2_frame_header_error_bits_uncorrectable_ecc_err;

static int hf_csi2_frame_header_error_bits_rcv_dec_err;

static int hf_ebhscr_version;

static int hf_ebhscr_length;

static int hf_ebhscr_start_timestamp;

static int hf_ebhscr_stop_timestamp;

static int hf_ebhscr_mjr_hdr;

static int hf_ebhscr_mjr_hdr_unused;

static int ett_ebhscr;

static int ett_ebhscr_channel;

static int ett_ebhscr_packet_header;

static int ett_ebhscr_status;

static int ett_ebhscr_mjr_hdr;

static int ett_lin_payload;

static int * const can_status_bits[] = {

  &hf_can_proto_type,

  &hf_can_status_available,

  &hf_can_status_overflow,

  NULL

};

static int * const can_mjr_hdr_bits[] = {

  &hf_can_reserved_bytes,

  &hf_can_LEC,

  &hf_can_ERRP,

  &hf_can_ERRW,

  &hf_can_BOFF,

  &hf_can_DLEC,

  &hf_can_TEC,

  &hf_can_REC,

  &hf_can_CEL,

  NULL

};

static const value_string can_proto_type_strings[] = {

  { 0,  "Classical CAN" },

  { 1,  "CAN FD data frame" },

  { 0, NULL },

};

static const value_string can_status_available_strings[] = {

  { 0,  "CAN protocol status not available" },

  { 1,  "CAN protocol status available" },

  { 0, NULL },

};

static const value_string can_status_overflow_strings[] = {

  { 0,  "No FIFO overflow detected" },

  { 1,  "FIFO overflow detected, data were lost" },

  { 0, NULL },

};

static const val64_string can_last_err_code_strings[] = {

  { 0,  "No Error" },

  { 1,  "Stuff Error" },

  { 2,  "Form Error" },

  { 3,  "Ack Error" },

  { 4,  "Bit1 Error" },

  { 5,  "Bit0 Error" },

  { 6,  "CRC Error" },

  { 7,  "No Change" },

  { 0, NULL },

};

static const val64_string can_ERRP_strings[] = {

  { 0,  "Error counters are below the error passive limit (128)" },

  { 1,  "One of the error counters has reached the error passive limit (128)" },

  { 0, NULL },

};

static const val64_string can_ERRW_strings[] = {

  { 0,  "Error counters are below the error warning limit (96)" },

  { 1,  "One of the error counters has reached the error warning limit (96)" },

  { 0, NULL },

};

static const val64_string can_BOFF_strings[] = {

  { 0,  "Not in Bus Off state" },

  { 1,  "In Bus Off state." },

  { 0, NULL },

};

static int * const  eth_rx_error_bits[] = {

  &hf_eth_crc_error,

  &hf_eth_mii_foe,

  &hf_eth_payload_foe,

  &hf_eth_hdr_foe,

  &hf_eth_rcv_dec_err,

  &hf_eth_sym_error,

  &hf_eth_jabber_event,

  &hf_eth_pol_ch_event,

  &hf_eth_fls_carrier_event,

  &hf_eth_rx_trunc,

  &hf_eth_transmission_disc_err,

  &hf_eth_wait_frame_sep_bit,

  NULL

};

static int * const eth_mjr_hdr_bits[] = {

  &hf_eth_reserved_bytes,

  &hf_eth_tx_trunc,

  &hf_eth_trans_undrun,

  &hf_eth_retrans_limit,

  &hf_eth_late_collision,

  &hf_eth_link_up_down,

  &hf_eth_master_slave,

  &hf_eth_fcs_unavailable,

  &hf_eth_rsvd_bit,

  &hf_eth_speed,

  NULL

};

static const val64_string eth_link_strings[] = {

  { 0,  "Link Down" },

  { 1,  "Link Up" },

  { 0, NULL },

};

static const val64_string eth_master_strings[] = {

  { 0,  "Slave" },

  { 1,  "Master" },

  { 0, NULL },

};

static const val64_string eth_fcs_strings[] = {

  { 0,  "FCS appended to payload" },

  { 1,  "FCS not appended to payload." },

  { 0, NULL },

};

static const val64_string eth_speed_strings[] = {

  { 0,  "Speed 10M" },

  { 1,  "Speed 100M" },

  { 2,  "Speed 1000M" },

  { 3,  "Speed 2.5G" },

  { 4,  "Speed 5G" },

  { 5,  "Speed 10G" },

  { 6,  "Speed 25G" },

  { 7,  "Speed 40G" },

  { 8,  "Speed 100G" },

  { 9,  "Reserved" },

  { 10, "Reserved" },

  { 11, "Reserved" },

  { 12, "Reserved" },

  { 13, "Reserved" },

  { 14, "Reserved" },

  { 15, "Speed unknown. This value can be used when the speed could not be detected." },

  { 0, NULL },

};

static int * const ts_status_bits[] = {

  &hf_ts_time_offset_valid,

  &hf_ts_last_offset_change_valid,

  &hf_ts_nano_seconds_last_jump_valid,

  &hf_ts_UTC_leap_seconds_valid,

  &hf_ts_sync_state_valid,

  NULL

};

static const val64_string ts_time_source_strings[] = {

  { 0x00, "TimeSourceNone" },

  { 0x01, "TimeSourceEBTimesyncHard" },

  { 0x02, "TimeSourceXTSS" },

  { 0x03, "TimeSourcePTPHW" },

  { 0x10, "TimeSourcePTPSW" },

  { 0x20, "TimeSourceGPS" },

  { 0x30, "TimeSourceEBTimesyncSoft" },

  { 0x40, "TimeSourceCAN" },

  { 0x50, "TimeSourceEBVirt" },

  { 0, NULL },

};

static const value_string ts_sync_state_strings[] = {

  { 0,  "Free running" },

  { 1,  "Locked to master" },

  { 0, NULL },

};

static int * const lin_status_bits[] = {

  &hf_lin_time_jump,

  &hf_lin_wakeup,

  &hf_lin_1_2_enhanced_chksum,

  &hf_lin_1_3_classic_chksum,

  NULL

};

static int * const lin_mjr_hdr_bits[] = {

  &hf_lin_wakeup_length,

  &hf_lin_sts_emp,

  &hf_lin_sts_sto,

  &hf_lin_sts_sta,

  &hf_lin_sts_chk,

  &hf_lin_sts_dat,

  &hf_lin_sts_res,

  &hf_lin_sts_par,

  &hf_lin_sts_syn,

  &hf_lin_sts_reserved,

  &hf_lin_reserved_bytes,

  NULL

};

static int * const lin_payload_pid_bits[] = {

  &hf_lin_payload_id,

  &hf_lin_payload_id_parity_0,

  &hf_lin_payload_id_parity_1,

  NULL

};

static int * const dio_status_bits[] = {

  &hf_dio_overflow_mon_unit,

  &hf_dio_jump_occurred,

  NULL

};

static int * const dio_mjr_hdr_bits[] = {

  &hf_dio_value_type,

  &hf_dio_channel_ref,

  &hf_dio_gpio_id,

  &hf_dio_reserved_bytes,

  NULL

};

static const val64_string dio_val_type_strings[] = {

  { 0,  "Event triggered falling edge" },

  { 1,  "Event triggered rising edge" },

  { 2,  "GPIO is in low state (No state change)" },

  { 3,  "GPIO is in high state (No state change)" },

  { 0, NULL },

};

static const val64_string dio_channel_ref_strings[] = {

  { 0,  "The EBHSCR header 'Channel' field refers to the Digital IO line number (zero based). EB 2200 /"

      "EB 5200 provides four input lines for DETI with the values 0-3" },

  { 1,  "The EBHSCR header 'Channel' field refers to a accumulated GPIO data channel and the GPIO-"

      "ID field is used for further identification of the GPIO" },

  { 0, NULL },

};

static int * const flexray_channel_bits[] = {

  &hf_flexray_ch_a,

  &hf_flexray_ch_b,

  &hf_flexray_ctrl_id,

  NULL

};

static int * const flexray_status_bits[] = {

  &hf_flexray_monitoring_bit,

  &hf_flexray_sync_bit,

  &hf_flexray_packet_type,

  &hf_flexray_jump_occurred,

  NULL

};

static int * const flexray_frame_status_bits[] = {

  &hf_flexray_monitoring_bit,

  &hf_flexray_sync_bit,

  &hf_flexray_packet_type,

  &hf_flexray_CODERR,

  &hf_flexray_TSSVIOL,

  &hf_flexray_HCRCERR,

  &hf_flexray_FCRCERR,

  &hf_flexray_FESERR,

  &hf_flexray_FSSERR,

  &hf_flexray_BSSERR,

  &hf_flexray_jump_occurred,

  NULL

};

static int * const flexray_slot_status_bits[] = {

  &hf_flexray_monitoring_bit,

  &hf_flexray_sync_bit,

  &hf_flexray_packet_type,

  &hf_flexray_overflow_err,

  &hf_flexray_jump_occurred,

  NULL

};

static int * const flexray_mhdr_slot_information_bits[] = {

  &hf_flexray_SBV,

  &hf_flexray_ACI,

  &hf_flexray_CED,

  &hf_flexray_SED,

  &hf_flexray_VFR,

  &hf_flexray_SID,

  NULL

};

static int * const flexray_mhdr_frame_status_bits[] = {

  &hf_flexray_SPLERR,

  &hf_flexray_CCERR,

  &hf_flexray_FIDERR,

  &hf_flexray_SSERR,

  &hf_flexray_NERR,

  &hf_flexray_SOVERR,

  &hf_flexray_SWVIOL,

  &hf_flexray_NITVIOL,

  &hf_flexray_BVIOL,

  &hf_flexray_PCD,

  &hf_flexray_SYNCERR,

  &hf_flexray_CP,

  &hf_flexray_BRC,

  NULL

};

static int * const flexray_mhdr_symbol_length_and_status_bits[] = {

  &hf_flexray_SYERR,

  &hf_flexray_SL,

  NULL

};

static const value_string flexray_monitoring_bit_strings[] = {

  { 0x00, "Packet was generated by asynchronous monitoring" },

  { 0x01, "Packet was generated by FlexRay synchronous monitoring" },

  { 0, NULL },

};

static const value_string flexray_packet_type_strings[] = {

  { FLEXRAY_FRAME_PACKET, "Frame" },

  { FLEXRAY_SYMBOL_PACKET, "Symbol" },

  { FLEXRAY_SLOT_STATUS_PACKET, "Slot status" },

  { FLEXRAY_START_OF_CYCLE_PACKET, "Start of cycle" },

  { 0, NULL },

};

static const value_string flexray_CP_strings[] = {

  { 0x00, "Static part" },

  { 0x01, "Dynamic part" },

  { 0x02, "Symbol window" },

  { 0x03, "NIT" },

  { 0, NULL },

};

static const value_string flexray_POC_state_strings[] = {

  { 0x00, "DEFAULT_CONFIG state" },

  { 0x01, "READY state" },

  { 0x02, "NORMAL_ACTIVE state" },

  { 0x03, "NORMAL_PASSIVE state" },

  { 0x04, "HALT state" },

  { 0x05, "MONITOR_MODE state" },

  { 0x0F, "CONFIG state" },

  { 0x10, "WAKEUP_STANDBY state" },

  { 0x11, "WAKEUP_LISTEN state" },

  { 0x12, "WAKEUP_SEND state" },

  { 0x13, "WAKEUP_DETECT state" },

  { 0x20, "STARTUP_PREPARE state" },

  { 0x21, "COLDSTART_LISTEN state" },

  { 0x22, "COLDSTART_COLLISION_RESOLUTION state" },

  { 0x23, "COLDSTART_CONSISTENCY_CHECK state" },

  { 0x24, "COLDSTART_GAP state" },

  { 0x25, "COLDSTART_JOIN state" },

  { 0x26, "INTEGRATION_COLDSTART_CHECK state" },

  { 0x27, "INTEGRATION_LISTEN state" },

  { 0x28, "INTEGRATION_CONSISTENCY_CHECK state" },

  { 0x29, "INITIALIZE_SCHEDULE state" },

  { 0x2A, "ABORT_STARTUP state" },

  { 0x2B, "STARTUP_SUCCESS state" },

  { 0, NULL },

};

static int * const dsi3_status_bits[] = {

  &hf_dsi3_status_crc_error,

  &hf_dsi3_status_transition_error,

  &hf_dsi3_status_packet_truncated_error,

  &hf_dsi3_status_packet_dropped_error,

  NULL

};

static int * const dis3_mjr_hdr_slave_status_bits[] = {

  &hf_dsi3_mjr_hdr_st0_command_type,

  &hf_dsi3_mjr_hdr_slave_st0_bit_count,

  &hf_dsi3_mjr_hdr_slave_st2_blnk_err,

  &hf_dsi3_mjr_hdr_slave_st2_no_trans_err,

  &hf_dsi3_mjr_hdr_slave_st3_crc_err,

  &hf_dsi3_mjr_hdr_slave_st3_cnt_overflow,

  &hf_dsi3_mjr_hdr_slave_st3_disabled_err,

  &hf_dsi3_mjr_hdr_slave_st3_trunc_data,

  &hf_dsi3_mjr_hdr_slave_st3_drop_data,

  NULL

};

static int * const dis3_mjr_hdr_master_status_bits[] = {

  &hf_dsi3_mjr_hdr_st0_command_type,

  &hf_dsi3_mjr_hdr_master_st0_nibble_count,

  &hf_dsi3_mjr_hdr_master_st2_blnk_err,

  &hf_dsi3_mjr_hdr_master_st2_bad_trans_err,

  &hf_dsi3_mjr_hdr_master_st2_bad_chip_err,

  &hf_dsi3_mjr_hdr_master_st2_no_trans_err,

  &hf_dsi3_mjr_hdr_master_st3_crc_err,

  &hf_dsi3_mjr_hdr_master_st3_bad_decode_err,

  &hf_dsi3_mjr_hdr_master_st3_cnt_overflow,

  &hf_dsi3_mjr_hdr_master_st3_disable_err,

  &hf_dsi3_mjr_hdr_master_st3_trunc_data,

  &hf_dsi3_mjr_hdr_master_st3_drop_data,

  NULL

};

static const true_false_string dsi3_status_err_CRC_strings = {

  "CRC error occurred",

  "No CRC error occurred"

};

static const true_false_string dsi3_status_err_trans_strings = {

  "An unexpected transition was detected during reception or an unexpected transition was detected",

  "No transition error occurred"

};

static const true_false_string dsi3_status_err_trunc_strings = {

  "An associated data packet has been truncated",

  "No packet truncation error occurred"

};

static const true_false_string dsi3_status_err_drop_strings = {

  "An associated packet or an undefined number of them were dropped since last successful data reception",

  "No packet drop error occurred"

};

static const true_false_string dsi3_mjr_hdr_st0_command_type_strings = {

  "Periodic Data Collection Mode (PDCM) command",

  "Command and Response Mode (CRM) command"

};

static int * const mipi_csi2_status_bits[] = {

  &hf_mipi_csi2_status_packet_checksum_err,

  &hf_mipi_csi2_status_ecc_err,

  &hf_mipi_csi2_status_payload_fifo_overflow,

  &hf_mipi_csi2_status_header_fifo_overflow,

  &hf_mipi_csi2_status_rcv_decoder_err,

  &hf_mipi_csi2_status_payload_trunc_err,

  &hf_mipi_csi2_status_trans_rejected,

  NULL

};

static int * const mipi_csi2_mjr_hdr_flags_bits[] = {

  &hf_mipi_csi2_mjr_hdr_flags_packet_checksum_err,

  &hf_mipi_csi2_mjr_hdr_flags_correctable_ecc_err,

  &hf_mipi_csi2_mjr_hdr_flags_uncorrectable_ecc_err,

  &hf_mipi_csi2_mjr_hdr_flags_mipi_phy_type,

  &hf_mipi_csi2_mjr_hdr_flags_first_line_of_frame,

  NULL

};

static const true_false_string hf_mipi_csi2_mjr_hdr_flags_mipi_phy_type_string = {

  "CPHY",

  "DPHY"

};

static int * const csi2_frame_status_bits[] = {

  &hf_csi2_frame_status_packet_checksum_err,

  &hf_csi2_frame_status_ecc_err,

  &hf_csi2_frame_status_rcv_decoder_err,

  &hf_csi2_frame_status_section_err,

  &hf_csi2_frame_status_fifo_overflow,

  &hf_csi2_frame_status_payload_trunc_err,

  &hf_csi2_frame_status_trans_rejected,

  NULL

};

static int * const csi2_frame_mjr_hdr_bits[] = {

  &hf_csi2_frame_mjr_hdr_flags_proc,

  &hf_csi2_frame_mjr_hdr_flags_pad_align,

  &hf_csi2_frame_mjr_hdr_flags_mipi_phy_type,

  &hf_csi2_frame_mjr_hdr_vc,

  &hf_csi2_frame_mjr_hdr_imhv,

  NULL

};

static int * const csi2_frame_header_error_bits[] = {

  &hf_csi2_frame_header_error_bits_packet_checksum_err,

  &hf_csi2_frame_header_error_bits_correctable_ecc_err,

  &hf_csi2_frame_header_error_bits_uncorrectable_ecc_err,

  &hf_csi2_frame_header_error_bits_rcv_dec_err,

  NULL

};

static expert_field ei_ebhscr_frame_header;

static expert_field ei_ebhscr_err_status_flag;

static expert_field ei_ebhscr_info_status_flag;

static expert_field ei_ebhscr_err_channel_flag;

static expert_field ei_ebhscr_warn_mjr_hdr_status_flag;

static expert_field ei_ebhscr_warn_csi2_hdr_error_flag;

static dissector_handle_t ebhscr_handle;

static dissector_handle_t can_handle;

static dissector_handle_t can_fd_handle;

static dissector_handle_t eth_withfcs_handle;

static dissector_handle_t eth_withoutfcs_handle;

static dissector_handle_t flexray_handle;

static dissector_handle_t ebhscr_user_handle;

static dissector_table_t subdissector_table;

static int dissect_ebhscr_can(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree,

                proto_tree *ebhscr_packet_header_tree, uint16_t ebhscr_status,

                uint32_t ebhscr_frame_length)

{

  uint16_t can_proto_status, can_type;

  uint32_t ebhscr_current_payload_length;

  tvbuff_t* next_tvb;

  proto_item *ti;

  ti = proto_tree_add_bitmask(ebhscr_packet_header_tree, tvb, 2, hf_ebhscr_status, ett_ebhscr_status,

                can_status_bits, ENC_BIG_ENDIAN);

  can_proto_status = (ebhscr_status & 0x0002);

  if (can_proto_status) {

    proto_tree_add_bitmask(ebhscr_packet_header_tree, tvb, 24, hf_ebhscr_mjr_hdr, ett_ebhscr_mjr_hdr,

                can_mjr_hdr_bits, ENC_BIG_ENDIAN);

    expert_add_info(pinfo, ti, &ei_ebhscr_info_status_flag);

  }

  else {

    proto_tree_add_item(ebhscr_packet_header_tree, hf_ebhscr_mjr_hdr, tvb, 24, 8, ENC_BIG_ENDIAN);

  }

  /* received hdr only and no data */

  if (ebhscr_frame_length == EBHSCR_HEADER_LENGTH) {

    return tvb_captured_length(tvb);

  }

  ebhscr_current_payload_length = ebhscr_frame_length - EBHSCR_HEADER_LENGTH;

  /* payload is CAN or CAN FD frame */

  next_tvb = tvb_new_subset_length(tvb, 32, ebhscr_current_payload_length);

  can_type = (ebhscr_status & 0x0001);

  if (can_type) {

    call_dissector(can_fd_handle, next_tvb, pinfo, tree);

  }

  else {

    call_dissector(can_handle, next_tvb, pinfo, tree);

  }

  return tvb_captured_length(tvb);

}

static int dissect_ebhscr_eth(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree,

                proto_tree *ebhscr_packet_header_tree, uint16_t ebhscr_status,

                uint32_t ebhscr_frame_length)

{

  tvbuff_t* next_tvb;

  proto_item *ti;

  uint8_t channel;

  uint32_t ebhscr_current_payload_length;

  uint64_t major_hrd, fsc_not_present, link_up, link_speed;

  ebhscr_current_payload_length = ebhscr_frame_length - EBHSCR_HEADER_LENGTH;

  ti = proto_tree_add_bitmask(ebhscr_packet_header_tree, tvb, 2, hf_ebhscr_status,

                ett_ebhscr_status, eth_rx_error_bits, ENC_BIG_ENDIAN);

  if (ebhscr_status) {

    expert_add_info(pinfo, ti, &ei_ebhscr_err_status_flag);

  }

  channel = (tvb_get_uint8(tvb, 1) & 0x1C) >> 2;

  major_hrd = tvb_get_uint64(tvb, 24, ENC_BIG_ENDIAN);

  proto_tree_add_bitmask(ebhscr_packet_header_tree, tvb, 24, hf_ebhscr_mjr_hdr, ett_ebhscr_mjr_hdr,

              eth_mjr_hdr_bits, ENC_BIG_ENDIAN);

  fsc_not_present = (major_hrd & 0x0000000400000000);

  link_up = (major_hrd & 0x0000000100000000) ? 1 : 0;

  link_speed = (major_hrd & 0x00000000F0000000) >> 28U;

  /* received hdr only and no data */

  if (ebhscr_frame_length == EBHSCR_HEADER_LENGTH) {

    col_append_fstr(pinfo->cinfo, COL_INFO, "Ethernet controller %d %s", channel, val64_to_str_const(link_up, eth_link_strings, ""));

    if (link_up)

    {

      col_append_fstr(pinfo->cinfo, COL_INFO, " %s", val64_to_str_const(link_speed, eth_speed_strings, "Speed unknown"));

    }

    return tvb_captured_length(tvb);

  }

  /* payload is 802.3 Ethernet frame */

  next_tvb = tvb_new_subset_length(tvb, 32, ebhscr_current_payload_length);

  if (fsc_not_present) {

    call_dissector(eth_withoutfcs_handle, next_tvb, pinfo, tree);

  }

  else {

    call_dissector(eth_withfcs_handle, next_tvb, pinfo, tree);

  }

  return tvb_captured_length(tvb);

}

static int dissect_ebhscr_nmea(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree,

                proto_tree *ebhscr_packet_header_tree, uint32_t ebhscr_frame_length,

                uint32_t ebhscr_length)

{

  tvbuff_t* next_tvb;

  uint8_t *nmea_str;

  uint32_t ebhscr_current_payload_length;

  if (ebhscr_frame_length == EBHSCR_HEADER_LENGTH) {

    return tvb_captured_length(tvb);

  }

  ebhscr_current_payload_length = ebhscr_frame_length - EBHSCR_HEADER_LENGTH;

  proto_tree_add_item(ebhscr_packet_header_tree, hf_ebhscr_status_unused, tvb, 2, 2, ENC_BIG_ENDIAN);

  proto_tree_add_item(ebhscr_packet_header_tree, hf_ebhscr_mjr_hdr_unused, tvb, 24, 8, ENC_BIG_ENDIAN);

  next_tvb = tvb_new_subset_length(tvb, 32, ebhscr_current_payload_length);

  call_data_dissector(next_tvb, pinfo, tree);

  nmea_str = tvb_get_string_enc(pinfo->pool, tvb, 32, ebhscr_length, ENC_UTF_8);

  col_add_fstr(pinfo->cinfo, COL_INFO, "%s %s", "NMEA:", nmea_str);

  return tvb_captured_length(tvb);

}

static int dissect_ebhscr_ts(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree,

                proto_tree *ebhscr_packet_header_tree, uint16_t ebhscr_status,

                uint32_t ebhscr_frame_length)

{

  tvbuff_t* next_tvb;

  uint32_t ebhscr_current_payload_length;

  uint64_t time_source = 0;

  proto_item *ti;

  col_set_str(pinfo->cinfo, COL_INFO, "TimeState:");

  ti = proto_tree_add_bitmask(ebhscr_packet_header_tree, tvb, 2, hf_ebhscr_status, ett_ebhscr_status,

                ts_status_bits, ENC_BIG_ENDIAN);

  if (ebhscr_status) {

    expert_add_info(pinfo, ti, &ei_ebhscr_info_status_flag);

  }

  proto_tree_add_item(ebhscr_packet_header_tree, hf_ebhscr_mjr_hdr, tvb, 24, 8, ENC_BIG_ENDIAN);

  proto_tree_add_item_ret_uint64(ebhscr_packet_header_tree, hf_ts_time_source, tvb, 24, 8, ENC_BIG_ENDIAN, &time_source);

  col_append_str(pinfo->cinfo, COL_INFO, val64_to_str_const(time_source, ts_time_source_strings, "Unknown Time Source"));

  if (ebhscr_frame_length == EBHSCR_HEADER_LENGTH) {

    return tvb_captured_length(tvb);

  }

  ebhscr_current_payload_length = ebhscr_frame_length - EBHSCR_HEADER_LENGTH;

  if (ebhscr_current_payload_length < 28) {

    return tvb_captured_length(tvb);

  }

  /* display params only if the appropriate valid bit is set */

  if ((ebhscr_status & 0x001) != 0) {

    proto_tree_add_item(ebhscr_packet_header_tree, hf_ts_time_offset_ns, tvb, 32, 8, ENC_BIG_ENDIAN);

  }

  if ((ebhscr_status & 0x002) != 0) {

    proto_tree_add_item(ebhscr_packet_header_tree, hf_ts_last_offset_ns, tvb, 40, 8, ENC_BIG_ENDIAN);

  }

  if ((ebhscr_status & 0x004) != 0) {

    proto_tree_add_item(ebhscr_packet_header_tree, hf_ts_last_jump_ns, tvb, 48, 8, ENC_BIG_ENDIAN);

  }

  if ((ebhscr_status & 0x008) != 0) {

    proto_tree_add_item(ebhscr_packet_header_tree, hf_ts_utc_leap_sec, tvb, 56, 2, ENC_BIG_ENDIAN);

  }

  if ((ebhscr_status & 0x010) != 0) {

    proto_tree_add_item(ebhscr_packet_header_tree, hf_ts_sync_state, tvb, 58, 2, ENC_BIG_ENDIAN);

  }

  next_tvb = tvb_new_subset_length(tvb, 32, ebhscr_current_payload_length);

  call_data_dissector(next_tvb, pinfo, tree);

  return tvb_captured_length(tvb);

}

static int dissect_ebhscr_lin(tvbuff_t *tvb, packet_info *pinfo, proto_tree *ebhscr_tree,

          proto_tree *ebhscr_packet_header_tree, uint16_t ebhscr_status, uint32_t ebhscr_frame_length)

{

  proto_item* ti;

  proto_tree *lin_payload_tree, *lin_pid_tree;

  uint32_t ebhscr_current_payload_length;

  ebhscr_current_payload_length = ebhscr_frame_length - EBHSCR_HEADER_LENGTH;

  ti = proto_tree_add_bitmask(ebhscr_packet_header_tree, tvb, 2, hf_ebhscr_status,

                ett_ebhscr_status, lin_status_bits, ENC_BIG_ENDIAN);

  if (ebhscr_status) {

    expert_add_info(pinfo, ti, &ei_ebhscr_info_status_flag);

  }

  if ((ebhscr_status & 0x0010) != 0) {

    col_set_str(pinfo->cinfo, COL_INFO, "LIN Wake-Up Packet");

  }

  else {

    col_set_str(pinfo->cinfo, COL_INFO, "LIN Frame");

  }

  proto_tree_add_bitmask(ebhscr_packet_header_tree, tvb, 24, hf_ebhscr_mjr_hdr, ett_ebhscr_mjr_hdr,

              lin_mjr_hdr_bits, ENC_BIG_ENDIAN);

  /* received hdr only and no data */

  if (ebhscr_frame_length == EBHSCR_HEADER_LENGTH) {

    return tvb_captured_length(tvb);

  }

  ti = proto_tree_add_item(ebhscr_tree, hf_lin_payload, tvb, 32, ebhscr_current_payload_length, ENC_NA);

  lin_payload_tree = proto_item_add_subtree(ti, ett_lin_payload);

  ti = proto_tree_add_item(lin_payload_tree, hf_lin_payload_pid, tvb, 32, 1, ENC_BIG_ENDIAN);

  lin_pid_tree = proto_item_add_subtree(ti, ett_lin_payload);

  proto_tree_add_bitmask_list(lin_pid_tree, tvb, 32, 1, lin_payload_pid_bits, ENC_BIG_ENDIAN);

  proto_tree_add_item(lin_payload_tree, hf_lin_payload_data, tvb, EBHSCR_HEADER_LENGTH + 1, ebhscr_current_payload_length - 2, ENC_NA);

  proto_tree_add_item(lin_payload_tree, hf_lin_payload_checksum, tvb, EBHSCR_HEADER_LENGTH + ebhscr_current_payload_length - 1, 1, ENC_BIG_ENDIAN);

  return tvb_captured_length(tvb);

}

static int

dissect_ebhscr_dio(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree,

          proto_tree *ebhscr_packet_header_tree, uint16_t ebhscr_status, uint32_t ebhscr_frame_length)

{

  tvbuff_t* next_tvb;

  proto_item *ti;

  uint32_t ebhscr_current_payload_length;

  col_set_str(pinfo->cinfo, COL_INFO, "DIO:");

  ebhscr_current_payload_length = ebhscr_frame_length - EBHSCR_HEADER_LENGTH;

  ti = proto_tree_add_bitmask(ebhscr_packet_header_tree, tvb, 2, hf_ebhscr_status,

                ett_ebhscr_status, dio_status_bits, ENC_BIG_ENDIAN);

  if (ebhscr_status) {

    expert_add_info(pinfo, ti, &ei_ebhscr_err_status_flag);

  }

  proto_tree_add_bitmask(ebhscr_packet_header_tree, tvb, 24, hf_ebhscr_mjr_hdr, ett_ebhscr_mjr_hdr,

              dio_mjr_hdr_bits, ENC_BIG_ENDIAN);

  if (ebhscr_frame_length == EBHSCR_HEADER_LENGTH) {

    return tvb_captured_length(tvb);

  }

  next_tvb = tvb_new_subset_length(tvb, 32, ebhscr_current_payload_length);

  call_data_dissector(next_tvb, pinfo, tree);

  col_append_fstr(pinfo->cinfo, COL_INFO, "  %s", tvb_bytes_to_str_punct(pinfo->pool, tvb, 32, ebhscr_current_payload_length, ' '));

  return tvb_captured_length(tvb);

}

static int dissect_ebhscr_flexray_frame_packet(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree,

                        proto_tree *ebhscr_packet_header_tree, uint16_t ebhscr_status,

                        uint32_t ebhscr_current_payload_length)

{

  proto_item *ti;

  proto_tree *flexray_mhdr_tree, *flexray_mhdr_sub_tree, *flexray_status_tree;

  tvbuff_t *fr_tvb, *hdr_tvb;

  uint8_t channel;

  uint8_t header_data[2U];

  ti = proto_tree_add_item(ebhscr_packet_header_tree, hf_ebhscr_status, tvb, 2, 2, ENC_BIG_ENDIAN);

  flexray_status_tree = proto_item_add_subtree(ti, ett_ebhscr_status);

  proto_tree_add_bitmask_list(flexray_status_tree, tvb, 2, 2, flexray_frame_status_bits, ENC_BIG_ENDIAN);

  ti = proto_tree_add_item(ebhscr_packet_header_tree, hf_ebhscr_mjr_hdr, tvb, 24, 8, ENC_BIG_ENDIAN);

  flexray_mhdr_tree = proto_item_add_subtree(ti, ett_ebhscr_mjr_hdr);

  ti = proto_tree_add_item(flexray_mhdr_tree, hf_flexray_slot_information, tvb, 24, 2, ENC_BIG_ENDIAN);

  flexray_mhdr_sub_tree = proto_item_add_subtree(ti, ett_ebhscr_mjr_hdr);

  proto_tree_add_bitmask_list(flexray_mhdr_sub_tree, tvb, 24, 2, flexray_mhdr_slot_information_bits, ENC_BIG_ENDIAN);

  ti = proto_tree_add_item(flexray_mhdr_tree, hf_flexray_frame_status, tvb, 26, 2, ENC_BIG_ENDIAN);

  flexray_mhdr_sub_tree = proto_item_add_subtree(ti, ett_ebhscr_mjr_hdr);

  proto_tree_add_bitmask_list(flexray_mhdr_sub_tree, tvb, 26, 2, flexray_mhdr_frame_status_bits, ENC_BIG_ENDIAN);

  proto_tree_add_item(flexray_mhdr_tree, hf_flexray_supercycle_counter, tvb, 28, 4, ENC_BIG_ENDIAN);

  fr_tvb = tvb_new_composite();

  header_data[0] = 0x01;

  channel = tvb_get_uint8(tvb, 1);

  if ((channel & FLEXRAY_CHANNEL_B_MASK) != 0) {

    header_data[0] |= 0x80;

  }

  header_data[1] = 0x00;

  if ((ebhscr_status & FLEXRAY_TSSVIOL_MASK) != 0) {

    header_data[1] |= 0x01;

  }

  if ((ebhscr_status & FLEXRAY_CODERR_MASK) != 0) {