_ZN7llvm_ks7APFloat6getInfERKNS_12fltSemanticsEb: 225| 235| static APFloat getInf(const fltSemantics &Sem, bool Negative = false) { 226| 235| APFloat Val(Sem, uninitialized); 227| 235| Val.makeInf(Negative); 228| 235| return Val; 229| 235| } _ZN7llvm_ks7APFloat6getNaNERKNS_12fltSemanticsEbj: 237| 329| unsigned type = 0) { 238| 329| if (type) { ------------------ | Branch (238:9): [True: 329, False: 0] ------------------ 239| 329| APInt fill(64, type); 240| 329| return getQNaN(Sem, Negative, &fill); 241| 329| } else { 242| 0| return getQNaN(Sem, Negative, nullptr); 243| 0| } 244| 329| } _ZN7llvm_ks7APFloat7getQNaNERKNS_12fltSemanticsEbPKNS_5APIntE: 248| 329| const APInt *payload = nullptr) { 249| 329| return makeNaN(Sem, false, Negative, payload); 250| 329| } _ZNK7llvm_ks7APFloat12needsCleanupEv: 208| 14.2k| bool needsCleanup() const { return partCount() > 1; } _ZN7llvm_ks7APFloat7getZeroERKNS_12fltSemanticsEb: 216| 2.53k| static APFloat getZero(const fltSemantics &Sem, bool Negative = false) { 217| 2.53k| APFloat Val(Sem, uninitialized); 218| 2.53k| Val.makeZero(Negative); 219| 2.53k| return Val; 220| 2.53k| } _ZNK7llvm_ks7APFloat8isFiniteEv: 414| 18.2k| bool isFinite() const { return !isNaN() && !isInfinity(); } ------------------ | Branch (414:34): [True: 17.8k, False: 329] | Branch (414:46): [True: 17.5k, False: 306] ------------------ _ZNK7llvm_ks7APFloat6isZeroEv: 417| 17.5k| bool isZero() const { return category == fcZero; } _ZNK7llvm_ks7APFloat10isInfinityEv: 424| 17.8k| bool isInfinity() const { return category == fcInfinity; } _ZNK7llvm_ks7APFloat5isNaNEv: 427| 18.2k| bool isNaN() const { return category == fcNaN; } _ZNK7llvm_ks7APFloat15isFiniteNonZeroEv: 440| 18.2k| bool isFiniteNonZero() const { return isFinite() && !isZero(); } ------------------ | Branch (440:41): [True: 17.5k, False: 635] | Branch (440:55): [True: 13.0k, False: 4.56k] ------------------ _ZN7llvm_ks5APIntC2EPmj: 98| 258k| APInt(uint64_t *val, unsigned bits) : BitWidth(bits), pVal(val) {} _ZNK7llvm_ks5APInt12isSingleWordEv: 103| 79.2M| bool isSingleWord() const { return BitWidth <= APINT_BITS_PER_WORD; } _ZN7llvm_ks5APInt15clearUnusedBitsEv: 136| 25.7M| APInt &clearUnusedBits() { 137| | // Compute how many bits are used in the final word 138| 25.7M| unsigned wordBits = BitWidth % APINT_BITS_PER_WORD; 139| 25.7M| if (wordBits == 0) ------------------ | Branch (139:9): [True: 25.7M, False: 58.8k] ------------------ 140| | // If all bits are used, we want to leave the value alone. This also 141| | // avoids the undefined behavior of >> when the shift is the same size as 142| | // the word size (64). 143| 25.7M| return *this; 144| | 145| | // Mask out the high bits. 146| 58.8k| uint64_t mask = ~uint64_t(0ULL) >> (APINT_BITS_PER_WORD - wordBits); 147| 58.8k| if (isSingleWord()) ------------------ | Branch (147:9): [True: 2.31k, False: 56.5k] ------------------ 148| 2.31k| VAL &= mask; 149| 56.5k| else 150| 56.5k| pVal[getNumWords() - 1] &= mask; 151| 58.8k| return *this; 152| 25.7M| } _ZN7llvm_ks5APIntC2Ejmb: 237| 25.3M| : BitWidth(numBits), VAL(0) { 238| 25.3M| assert(BitWidth && "bitwidth too small"); ------------------ | Branch (238:5): [True: 25.3M, False: 0] | Branch (238:5): [True: 25.3M, Folded] | Branch (238:5): [True: 25.3M, False: 0] ------------------ 239| 25.3M| if (isSingleWord()) ------------------ | Branch (239:9): [True: 25.2M, False: 140k] ------------------ 240| 25.2M| VAL = val; 241| 140k| else 242| 140k| initSlowCase(numBits, val, isSigned); 243| 25.3M| clearUnusedBits(); 244| 25.3M| } _ZN7llvm_ks5APIntC2ERKS0_: 279| 678k| APInt(const APInt &that) : BitWidth(that.BitWidth), VAL(0) { 280| 678k| if (isSingleWord()) ------------------ | Branch (280:9): [True: 444k, False: 233k] ------------------ 281| 444k| VAL = that.VAL; 282| 233k| else 283| 233k| initSlowCase(that); 284| 678k| } _ZN7llvm_ks5APIntC2EOS0_: 287| 25.3M| APInt(APInt &&that) : BitWidth(that.BitWidth), VAL(that.VAL) { 288| 25.3M| that.BitWidth = 0; 289| 25.3M| } _ZN7llvm_ks5APIntD2Ev: 292| 51.9M| ~APInt() { 293| 51.9M| if (needsCleanup()) ------------------ | Branch (293:9): [True: 350k, False: 51.5M] ------------------ 294| 350k| delete[] pVal; 295| 51.9M| } _ZN7llvm_ks5APIntC2Ev: 302| 267k| explicit APInt() : BitWidth(1), VAL(0) {} _ZNK7llvm_ks5APInt12needsCleanupEv: 305| 51.9M| bool needsCleanup() const { return !isSingleWord(); } _ZNK7llvm_ks5APInt6isIntNEj: 373| 140k| bool isIntN(unsigned N) const { 374| 140k| assert(N && "N == 0 ???"); ------------------ | Branch (374:5): [True: 140k, False: 0] | Branch (374:5): [True: 140k, Folded] | Branch (374:5): [True: 140k, False: 0] ------------------ 375| 140k| return getActiveBits() <= N; 376| 140k| } _ZNK7llvm_ks5APInt15getLimitedValueEm: 405| 2.31k| uint64_t getLimitedValue(uint64_t Limit = ~0ULL) const { 406| 2.31k| return (getActiveBits() > 64 || getZExtValue() > Limit) ? Limit ------------------ | Branch (406:13): [True: 0, False: 2.31k] | Branch (406:37): [True: 0, False: 2.31k] ------------------ 407| 2.31k| : getZExtValue(); 408| 2.31k| } _ZNK7llvm_ks5APInt10getRawDataEv: 574| 537| const uint64_t *getRawData() const { 575| 537| if (isSingleWord()) ------------------ | Branch (575:9): [True: 329, False: 208] ------------------ 576| 329| return &VAL; 577| 208| return &pVal[0]; 578| 537| } _ZN7llvm_ks5APIntaSERKS0_: 652| 38.1k| APInt &operator=(const APInt &RHS) { 653| | // If the bitwidths are the same, we can avoid mucking with memory 654| 38.1k| if (isSingleWord() && RHS.isSingleWord()) { ------------------ | Branch (654:9): [True: 37.9k, False: 219] | Branch (654:27): [True: 36.9k, False: 961] ------------------ 655| 36.9k| VAL = RHS.VAL; 656| 36.9k| BitWidth = RHS.BitWidth; 657| 36.9k| return clearUnusedBits(); 658| 36.9k| } 659| | 660| 1.18k| return AssignSlowCase(RHS); 661| 38.1k| } _ZN7llvm_ks5APIntaSEOS0_: 664| 283k| APInt &operator=(APInt &&that) { 665| 283k| if (!isSingleWord()) { ------------------ | Branch (665:9): [True: 283k, False: 0] ------------------ 666| | // The MSVC STL shipped in 2013 requires that self move assignment be a 667| | // no-op. Otherwise algorithms like stable_sort will produce answers 668| | // where half of the output is left in a moved-from state. 669| 283k| if (this == &that) ------------------ | Branch (669:11): [True: 0, False: 283k] ------------------ 670| 0| return *this; 671| 283k| delete[] pVal; 672| 283k| } 673| | 674| | // Use memcpy so that type based alias analysis sees both VAL and pVal 675| | // as modified. 676| 283k| memcpy(&VAL, &that.VAL, sizeof(uint64_t)); 677| | 678| | // If 'this == &that', avoid zeroing our own bitwidth by storing to 'that' 679| | // first. 680| 283k| unsigned ThatBitWidth = that.BitWidth; 681| 283k| that.BitWidth = 0; 682| 283k| BitWidth = ThatBitWidth; 683| | 684| 283k| return *this; 685| 283k| } _ZN7llvm_ks5APIntoREm: 717| 257k| APInt &operator|=(uint64_t RHS) { 718| 257k| if (isSingleWord()) { ------------------ | Branch (718:9): [True: 0, False: 257k] ------------------ 719| 0| VAL |= RHS; 720| 0| clearUnusedBits(); 721| 257k| } else { 722| 257k| pVal[0] |= RHS; 723| 257k| } 724| 257k| return *this; 725| 257k| } _ZN7llvm_ks5APIntlSEj: 761| 257k| APInt &operator<<=(unsigned shiftAmt) { 762| 257k| *this = shl(shiftAmt); 763| 257k| return *this; 764| 257k| } _ZNK7llvm_ks5APInt3shlEj: 869| 257k| APInt LLVM_ATTRIBUTE_UNUSED_RESULT shl(unsigned shiftAmt) const { 870| 257k| assert(shiftAmt <= BitWidth && "Invalid shift amount"); ------------------ | Branch (870:5): [True: 257k, False: 0] | Branch (870:5): [True: 257k, Folded] | Branch (870:5): [True: 257k, False: 0] ------------------ 871| 257k| if (isSingleWord()) { ------------------ | Branch (871:9): [True: 0, False: 257k] ------------------ 872| 0| if (shiftAmt >= BitWidth) ------------------ | Branch (872:11): [True: 0, False: 0] ------------------ 873| 0| return APInt(BitWidth, 0); // avoid undefined shift results 874| 0| return APInt(BitWidth, VAL << shiftAmt); 875| 0| } 876| 257k| return shlSlowCase(shiftAmt); 877| 257k| } _ZNK7llvm_ks5APInt11getBitWidthEv: 1274| 233k| unsigned getBitWidth() const { return BitWidth; } _ZNK7llvm_ks5APInt11getNumWordsEv: 1281| 9.54M| unsigned getNumWords() const { return getNumWords(BitWidth); } _ZN7llvm_ks5APInt11getNumWordsEj: 1289| 9.54M| static unsigned getNumWords(unsigned BitWidth) { 1290| 9.54M| return ((uint64_t)BitWidth + APINT_BITS_PER_WORD - 1) / APINT_BITS_PER_WORD; 1291| 9.54M| } _ZNK7llvm_ks5APInt13getActiveBitsEv: 1298| 154k| unsigned getActiveBits() const { return BitWidth - countLeadingZeros(); } _ZNK7llvm_ks5APInt12getZExtValueEv: 1328| 28.8k| uint64_t getZExtValue() const { 1329| 28.8k| if (isSingleWord()) ------------------ | Branch (1329:9): [True: 17.2k, False: 11.5k] ------------------ 1330| 17.2k| return VAL; 1331| 28.8k| assert(getActiveBits() <= 64 && "Too many bits for uint64_t"); ------------------ | Branch (1331:5): [True: 11.5k, False: 0] | Branch (1331:5): [True: 11.5k, Folded] | Branch (1331:5): [True: 11.5k, False: 0] ------------------ 1332| 11.5k| return pVal[0]; 1333| 11.5k| } _ZNK7llvm_ks5APInt17countLeadingZerosEv: 1362| 154k| unsigned countLeadingZeros() const { 1363| 154k| if (isSingleWord()) { ------------------ | Branch (1363:9): [True: 27.8k, False: 126k] ------------------ 1364| 27.8k| unsigned unusedBits = APINT_BITS_PER_WORD - BitWidth; 1365| 27.8k| return llvm_ks::countLeadingZeros(VAL) - unusedBits; 1366| 27.8k| } 1367| 126k| return countLeadingZerosSlowCase(); 1368| 154k| } _ZN7llvm_ks8APIntOps4lshrERKNS_5APIntEj: 1841| 196|inline APInt lshr(const APInt &LHS, unsigned shiftAmt) { 1842| 196| return LHS.lshr(shiftAmt); 1843| 196|} _ZN7llvm_ks8APIntOps3shlERKNS_5APIntEj: 1848| 98|inline APInt shl(const APInt &LHS, unsigned shiftAmt) { 1849| 98| return LHS.shl(shiftAmt); 1850| 98|} _ZNK7llvm_ks8ArrayRefINS_18SubtargetFeatureKVEE5beginEv: 123| 21.0k| iterator begin() const { return Data; } _ZNK7llvm_ks8ArrayRefINS_18SubtargetFeatureKVEE3endEv: 124| 28.7k| iterator end() const { return Data + Length; } _ZN7llvm_ks8ArrayRefINS_7SMRangeEEC2ENS_8NoneTypeE: 54| 45.9k| /*implicit*/ ArrayRef(NoneType) : Data(nullptr), Length(0) {} _ZN7llvm_ks8ArrayRefINS_7SMFixItEEC2ENS_8NoneTypeE: 54| 46.3k| /*implicit*/ ArrayRef(NoneType) : Data(nullptr), Length(0) {} _ZN7llvm_ks8ArrayRefINSt3__14pairIjjEEEC2INS1_9allocatorIS3_EEEERKNS1_6vectorIS3_T_EE: 79| 343| : Data(Vec.data()), Length(Vec.size()) {} _ZN7llvm_ks15MutableArrayRefINS_8AsmTokenEEC2ERS1_: 233| 29.6k| /*implicit*/ MutableArrayRef(T &OneElt) : ArrayRef(OneElt) {} _ZN7llvm_ks8ArrayRefINS_8AsmTokenEEC2ERKS1_: 58| 29.6k| : Data(&OneElt), Length(1) {} AsmParser.cpp:_ZNK7llvm_ks8ArrayRefIN12_GLOBAL__N_119MCAsmMacroParameterEE4sizeEv: 135| 13.3k| size_t size() const { return Length; } AsmParser.cpp:_ZNK7llvm_ks8ArrayRefIN12_GLOBAL__N_119MCAsmMacroParameterEE4backEv: 144| 11.4k| const T &back() const { 145| 11.4k| assert(!empty()); ------------------ | Branch (145:7): [True: 11.4k, False: 0] ------------------ 146| 11.4k| return Data[Length-1]; 147| 11.4k| } AsmParser.cpp:_ZNK7llvm_ks8ArrayRefIN12_GLOBAL__N_119MCAsmMacroParameterEE5emptyEv: 130| 11.4k| bool empty() const { return Length == 0; } _ZNK7llvm_ks8ArrayRefINSt3__16vectorINS_8AsmTokenENS1_9allocatorIS3_EEEEE4sizeEv: 135| 13.2k| size_t size() const { return Length; } _ZNK7llvm_ks8ArrayRefINSt3__16vectorINS_8AsmTokenENS1_9allocatorIS3_EEEEEixEm: 185| 251| const T &operator[](size_t Index) const { 186| 251| assert(Index < Length && "Invalid index!"); ------------------ | Branch (186:7): [True: 251, False: 0] | Branch (186:7): [True: 251, Folded] | Branch (186:7): [True: 251, False: 0] ------------------ 187| 251| return Data[Index]; 188| 251| } AsmParser.cpp:_ZNK7llvm_ks8ArrayRefIN12_GLOBAL__N_119MCAsmMacroParameterEEixEm: 185| 811k| const T &operator[](size_t Index) const { 186| 811k| assert(Index < Length && "Invalid index!"); ------------------ | Branch (186:7): [True: 811k, False: 0] | Branch (186:7): [True: 811k, Folded] | Branch (186:7): [True: 811k, False: 0] ------------------ 187| 811k| return Data[Index]; 188| 811k| } AsmParser.cpp:_ZN7llvm_ks8ArrayRefIN12_GLOBAL__N_119MCAsmMacroParameterEEC2INSt3__19allocatorIS2_EEEERKNS5_6vectorIS2_T_EE: 79| 116| : Data(Vec.data()), Length(Vec.size()) {} _ZN7llvm_ks8ArrayRefINSt3__16vectorINS_8AsmTokenENS1_9allocatorIS3_EEEEEC2INS4_IS6_EEEERKNS2_IS6_T_EE: 79| 62| : Data(Vec.data()), Length(Vec.size()) {} AsmParser.cpp:_ZN7llvm_ks8ArrayRefIN12_GLOBAL__N_119MCAsmMacroParameterEEC2ENS_8NoneTypeE: 54| 1.77k| /*implicit*/ ArrayRef(NoneType) : Data(nullptr), Length(0) {} _ZN7llvm_ks8ArrayRefINSt3__16vectorINS_8AsmTokenENS1_9allocatorIS3_EEEEEC2ENS_8NoneTypeE: 54| 1.77k| /*implicit*/ ArrayRef(NoneType) : Data(nullptr), Length(0) {} AsmParser.cpp:_ZN7llvm_ks8ArrayRefIN12_GLOBAL__N_119MCAsmMacroParameterEEC2ERKS2_: 58| 11.4k| : Data(&OneElt), Length(1) {} _ZN7llvm_ks8ArrayRefINSt3__16vectorINS_8AsmTokenENS1_9allocatorIS3_EEEEEC2ERKS6_: 58| 11.4k| : Data(&OneElt), Length(1) {} _ZNK7llvm_ks8ArrayRefINS_7SMFixItEE5emptyEv: 130| 10.7k| bool empty() const { return Length == 0; } _ZN7llvm_ks8ArrayRefINS_7SMFixItEEC2IvEERKNS_25SmallVectorTemplateCommonIS1_T_EE: 73| 10.7k| : Data(Vec.data()), Length(Vec.size()) { 74| 10.7k| } _ZNK7llvm_ks8ArrayRefINS_7SMRangeEE4sizeEv: 135| 44.9k| size_t size() const { return Length; } _ZN7llvm_ks8ArrayRefINSt3__14pairIjjEEEC2IvEERKNS_25SmallVectorTemplateCommonIS3_T_EE: 73| 45.9k| : Data(Vec.data()), Length(Vec.size()) { 74| 45.9k| } _ZNK7llvm_ks8ArrayRefINSt3__14pairIjjEEE3vecEv: 193| 46.3k| std::vector vec() const { 194| 46.3k| return std::vector(Data, Data+Length); 195| 46.3k| } _ZNK7llvm_ks8ArrayRefINS_7SMFixItEE5beginEv: 123| 46.3k| iterator begin() const { return Data; } _ZNK7llvm_ks8ArrayRefINS_7SMFixItEE3endEv: 124| 46.3k| iterator end() const { return Data + Length; } _ZN7llvm_ks12makeArrayRefIcEENS_8ArrayRefIT_EEPKS2_m: 313| 10.7k| ArrayRef makeArrayRef(const T *data, size_t length) { 314| 10.7k| return ArrayRef(data, length); 315| 10.7k| } _ZN7llvm_ks8ArrayRefIcEC2EPKcm: 62| 10.7k| : Data(data), Length(length) {} _ZNK7llvm_ks8ArrayRefIcE4sizeEv: 135| 1.44k| size_t size() const { return Length; } _ZN7llvm_ks8ArrayRefINS_18SubtargetFeatureKVEEC2ILm39EEERAT__KS1_: 84| 749| : Data(Arr), Length(N) {} _ZN7llvm_ks8ArrayRefINS_18SubtargetFeatureKVEEC2ILm17EEERAT__KS1_: 84| 749| : Data(Arr), Length(N) {} _ZN7llvm_ks8ArrayRefINS_7MCFixupEEC2Ev: 51| 301| /*implicit*/ ArrayRef() : Data(nullptr), Length(0) {} _ZN7llvm_ks15MutableArrayRefIcEC2Ev: 227| 301| /*implicit*/ MutableArrayRef() : ArrayRef() {} _ZN7llvm_ks8ArrayRefIcEC2Ev: 51| 301| /*implicit*/ ArrayRef() : Data(nullptr), Length(0) {} _ZN7llvm_ks8ArrayRefINS_7MCFixupEEC2IvEERKNS_25SmallVectorTemplateCommonIS1_T_EE: 73| 301| : Data(Vec.data()), Length(Vec.size()) { 74| 301| } _ZN7llvm_ks15MutableArrayRefIcEC2ERNS_15SmallVectorImplIcEE: 244| 301| : ArrayRef(Vec) {} _ZN7llvm_ks8ArrayRefIcEC2IvEERKNS_25SmallVectorTemplateCommonIcT_EE: 73| 301| : Data(Vec.data()), Length(Vec.size()) { 74| 301| } _ZNK7llvm_ks8ArrayRefINS_7MCFixupEE5beginEv: 123| 301| iterator begin() const { return Data; } _ZNK7llvm_ks8ArrayRefINS_7MCFixupEE3endEv: 124| 301| iterator end() const { return Data + Length; } _ZNK7llvm_ks15MutableArrayRefIcE4dataEv: 255| 1.44k| T *data() const { return const_cast(ArrayRef::data()); } _ZNK7llvm_ks8ArrayRefIcE4dataEv: 132| 1.44k| const T *data() const { return Data; } _ZNK7llvm_ks8ArrayRefINS_8AsmTokenEE4sizeEv: 135| 88.9k| size_t size() const { return Length; } _ZNK7llvm_ks15MutableArrayRefINS_8AsmTokenEEixEm: 296| 29.6k| T &operator[](size_t Index) const { 297| 29.6k| assert(Index < this->size() && "Invalid index!"); ------------------ | Branch (297:7): [True: 29.6k, False: 0] | Branch (297:7): [True: 29.6k, Folded] | Branch (297:7): [True: 29.6k, False: 0] ------------------ 298| 29.6k| return data()[Index]; 299| 29.6k| } _ZNK7llvm_ks15MutableArrayRefINS_8AsmTokenEE4dataEv: 255| 29.6k| T *data() const { return const_cast(ArrayRef::data()); } _ZNK7llvm_ks8ArrayRefINS_8AsmTokenEE4dataEv: 132| 29.6k| const T *data() const { return Data; } _ZNK7llvm_ks8ArrayRefINS_18SubtargetFeatureKVEE5emptyEv: 130| 1.49k| bool empty() const { return Length == 0; } _ZN7llvm_ks8DenseMapIjiNS_12DenseMapInfoIjEENS_6detail12DenseMapPairIjiEEED2Ev: 573| 749| ~DenseMap() { 574| 749| this->destroyAll(); 575| 749| operator delete(Buckets); 576| 749| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIjiNS_12DenseMapInfoIjEENS_6detail12DenseMapPairIjiEEEEjiS3_S6_E10destroyAllEv: 264| 749| void destroyAll() { 265| 749| if (getNumBuckets() == 0) // Nothing to do. ------------------ | Branch (265:9): [True: 749, False: 0] ------------------ 266| 749| return; 267| | 268| 0| const KeyT EmptyKey = getEmptyKey(), TombstoneKey = getTombstoneKey(); 269| 0| for (BucketT *P = getBuckets(), *E = getBucketsEnd(); P != E; ++P) { ------------------ | Branch (269:59): [True: 0, False: 0] ------------------ 270| 0| if (!KeyInfoT::isEqual(P->getFirst(), EmptyKey) && ------------------ | Branch (270:11): [True: 0, False: 0] ------------------ 271| 0| !KeyInfoT::isEqual(P->getFirst(), TombstoneKey)) ------------------ | Branch (271:11): [True: 0, False: 0] ------------------ 272| 0| P->getSecond().~ValueT(); 273| 0| P->getFirst().~KeyT(); 274| 0| } 275| 0| } _ZNK7llvm_ks12DenseMapBaseINS_8DenseMapIjiNS_12DenseMapInfoIjEENS_6detail12DenseMapPairIjiEEEEjiS3_S6_E13getNumBucketsEv: 381| 749| unsigned getNumBuckets() const { 382| 749| return static_cast(this)->getNumBuckets(); 383| 749| } _ZNK7llvm_ks8DenseMapIjiNS_12DenseMapInfoIjEENS_6detail12DenseMapPairIjiEEE13getNumBucketsEv: 674| 749| unsigned getNumBuckets() const { 675| 749| return NumBuckets; 676| 749| } _ZNK7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_8MCSymbolEjNS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_jEEEES4_jS6_S9_E13getNumBucketsEv: 381| 1.01k| unsigned getNumBuckets() const { 382| 1.01k| return static_cast(this)->getNumBuckets(); 383| 1.01k| } _ZNK7llvm_ks8DenseMapIPKNS_8MCSymbolEjNS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_jEEE13getNumBucketsEv: 674| 1.01k| unsigned getNumBuckets() const { 675| 1.01k| return NumBuckets; 676| 1.01k| } _ZNK7llvm_ks12DenseMapBaseINS_8DenseMapIPNS_9MCSectionENS_6detail13DenseSetEmptyENS_12DenseMapInfoIS3_EENS4_12DenseSetPairIS3_EEEES3_S5_S7_S9_E13getNumBucketsEv: 381| 749| unsigned getNumBuckets() const { 382| 749| return static_cast(this)->getNumBuckets(); 383| 749| } _ZNK7llvm_ks8DenseMapIPNS_9MCSectionENS_6detail13DenseSetEmptyENS_12DenseMapInfoIS2_EENS3_12DenseSetPairIS2_EEE13getNumBucketsEv: 674| 749| unsigned getNumBuckets() const { 675| 749| return NumBuckets; 676| 749| } _ZNK7llvm_ks12DenseMapBaseINS_8DenseMapIPNS_9MCSectionENS_6detail13DenseSetEmptyENS_12DenseMapInfoIS3_EENS4_12DenseSetPairIS3_EEEES3_S5_S7_S9_E13getNumEntriesEv: 351| 749| unsigned getNumEntries() const { 352| 749| return static_cast(this)->getNumEntries(); 353| 749| } _ZNK7llvm_ks8DenseMapIPNS_9MCSectionENS_6detail13DenseSetEmptyENS_12DenseMapInfoIS2_EENS3_12DenseSetPairIS2_EEE13getNumEntriesEv: 656| 749| unsigned getNumEntries() const { 657| 749| return NumEntries; 658| 749| } _ZN7llvm_ks8DenseMapIPNS_9MCSectionENS_6detail13DenseSetEmptyENS_12DenseMapInfoIS2_EENS3_12DenseSetPairIS2_EEE15allocateBucketsEj: 678| 749| bool allocateBuckets(unsigned Num) { 679| 749| NumBuckets = Num; 680| 749| if (NumBuckets == 0) { ------------------ | Branch (680:9): [True: 749, False: 0] ------------------ 681| 749| Buckets = nullptr; 682| 749| return false; 683| 749| } 684| | 685| 0| Buckets = static_cast(operator new(sizeof(BucketT) * NumBuckets)); 686| 0| return true; 687| 749| } _ZNK7llvm_ks12DenseMapBaseINS_8DenseMapIPNS_9MCSectionENS_6detail13DenseSetEmptyENS_12DenseMapInfoIS3_EENS4_12DenseSetPairIS3_EEEES3_S5_S7_S9_E16getNumTombstonesEv: 363| 749| unsigned getNumTombstones() const { 364| 749| return static_cast(this)->getNumTombstones(); 365| 749| } _ZNK7llvm_ks8DenseMapIPNS_9MCSectionENS_6detail13DenseSetEmptyENS_12DenseMapInfoIS2_EENS3_12DenseSetPairIS2_EEE16getNumTombstonesEv: 663| 749| unsigned getNumTombstones() const { 664| 749| return NumTombstones; 665| 749| } _ZN7llvm_ks8DenseMapIjiNS_12DenseMapInfoIjEENS_6detail12DenseMapPairIjiEEE15allocateBucketsEj: 678| 749| bool allocateBuckets(unsigned Num) { 679| 749| NumBuckets = Num; 680| 749| if (NumBuckets == 0) { ------------------ | Branch (680:9): [True: 749, False: 0] ------------------ 681| 749| Buckets = nullptr; 682| 749| return false; 683| 749| } 684| | 685| 0| Buckets = static_cast(operator new(sizeof(BucketT) * NumBuckets)); 686| 0| return true; 687| 749| } _ZN7llvm_ks8DenseMapIPNS_9MCSectionENS_6detail13DenseSetEmptyENS_12DenseMapInfoIS2_EENS3_12DenseSetPairIS2_EEED2Ev: 573| 749| ~DenseMap() { 574| 749| this->destroyAll(); 575| 749| operator delete(Buckets); 576| 749| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPNS_9MCSectionENS_6detail13DenseSetEmptyENS_12DenseMapInfoIS3_EENS4_12DenseSetPairIS3_EEEES3_S5_S7_S9_E10destroyAllEv: 264| 749| void destroyAll() { 265| 749| if (getNumBuckets() == 0) // Nothing to do. ------------------ | Branch (265:9): [True: 749, False: 0] ------------------ 266| 749| return; 267| | 268| 0| const KeyT EmptyKey = getEmptyKey(), TombstoneKey = getTombstoneKey(); 269| 0| for (BucketT *P = getBuckets(), *E = getBucketsEnd(); P != E; ++P) { ------------------ | Branch (269:59): [True: 0, False: 0] ------------------ 270| 0| if (!KeyInfoT::isEqual(P->getFirst(), EmptyKey) && ------------------ | Branch (270:11): [True: 0, False: 0] ------------------ 271| 0| !KeyInfoT::isEqual(P->getFirst(), TombstoneKey)) ------------------ | Branch (271:11): [True: 0, False: 0] ------------------ 272| 0| P->getSecond().~ValueT(); 273| 0| P->getFirst().~KeyT(); 274| 0| } 275| 0| } _ZN7llvm_ks8DenseMapIPKNS_12MCSectionELFEPNS_11MCSymbolELFENS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S5_EEEC2Ej: 553| 749| explicit DenseMap(unsigned NumInitBuckets = 0) { 554| 749| init(NumInitBuckets); 555| 749| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEPNS_11MCSymbolELFENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_EC2Ev: 262| 749| DenseMapBase() = default; _ZN7llvm_ks8DenseMapIPKNS_12MCSectionELFEPNS_11MCSymbolELFENS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S5_EEE4initEj: 612| 749| void init(unsigned InitBuckets) { 613| 749| if (allocateBuckets(InitBuckets)) { ------------------ | Branch (613:9): [True: 0, False: 749] ------------------ 614| 0| this->BaseT::initEmpty(); 615| 749| } else { 616| 749| NumEntries = 0; 617| 749| NumTombstones = 0; 618| 749| } 619| 749| } _ZN7llvm_ks8DenseMapIPKNS_12MCSectionELFEPNS_11MCSymbolELFENS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S5_EEE15allocateBucketsEj: 678| 1.49k| bool allocateBuckets(unsigned Num) { 679| 1.49k| NumBuckets = Num; 680| 1.49k| if (NumBuckets == 0) { ------------------ | Branch (680:9): [True: 749, False: 749] ------------------ 681| 749| Buckets = nullptr; 682| 749| return false; 683| 749| } 684| | 685| 749| Buckets = static_cast(operator new(sizeof(BucketT) * NumBuckets)); 686| 749| return true; 687| 1.49k| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEPNS_11MCSymbolELFENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E9initEmptyEv: 277| 749| void initEmpty() { 278| 749| setNumEntries(0); 279| 749| setNumTombstones(0); 280| | 281| 749| assert((getNumBuckets() & (getNumBuckets()-1)) == 0 && ------------------ | Branch (281:5): [True: 749, False: 0] | Branch (281:5): [True: 749, Folded] | Branch (281:5): [True: 749, False: 0] ------------------ 282| 749| "# initial buckets must be a power of two!"); 283| 749| const KeyT EmptyKey = getEmptyKey(); 284| 48.6k| for (BucketT *B = getBuckets(), *E = getBucketsEnd(); B != E; ++B) ------------------ | Branch (284:59): [True: 47.9k, False: 749] ------------------ 285| 47.9k| ::new (&B->getFirst()) KeyT(EmptyKey); 286| 749| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEPNS_11MCSymbolELFENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E13setNumEntriesEj: 354| 2.37k| void setNumEntries(unsigned Num) { 355| 2.37k| static_cast(this)->setNumEntries(Num); 356| 2.37k| } _ZN7llvm_ks8DenseMapIPKNS_12MCSectionELFEPNS_11MCSymbolELFENS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S5_EEE13setNumEntriesEj: 659| 2.37k| void setNumEntries(unsigned Num) { 660| 2.37k| NumEntries = Num; 661| 2.37k| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEPNS_11MCSymbolELFENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E16setNumTombstonesEj: 366| 1.49k| void setNumTombstones(unsigned Num) { 367| 1.49k| static_cast(this)->setNumTombstones(Num); 368| 1.49k| } _ZN7llvm_ks8DenseMapIPKNS_12MCSectionELFEPNS_11MCSymbolELFENS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S5_EEE16setNumTombstonesEj: 666| 1.49k| void setNumTombstones(unsigned Num) { 667| 1.49k| NumTombstones = Num; 668| 1.49k| } _ZNK7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEPNS_11MCSymbolELFENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E13getNumBucketsEv: 381| 9.24k| unsigned getNumBuckets() const { 382| 9.24k| return static_cast(this)->getNumBuckets(); 383| 9.24k| } _ZNK7llvm_ks8DenseMapIPKNS_12MCSectionELFEPNS_11MCSymbolELFENS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S5_EEE13getNumBucketsEv: 674| 9.24k| unsigned getNumBuckets() const { 675| 9.24k| return NumBuckets; 676| 9.24k| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEPNS_11MCSymbolELFENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E11getEmptyKeyEv: 343| 4.00k| static const KeyT getEmptyKey() { 344| 4.00k| return KeyInfoT::getEmptyKey(); 345| 4.00k| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEPNS_11MCSymbolELFENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E10getBucketsEv: 378| 4.49k| BucketT *getBuckets() { 379| 4.49k| return static_cast(this)->getBuckets(); 380| 4.49k| } _ZNK7llvm_ks8DenseMapIPKNS_12MCSectionELFEPNS_11MCSymbolELFENS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S5_EEE10getBucketsEv: 670| 6.12k| BucketT *getBuckets() const { 671| 6.12k| return Buckets; 672| 6.12k| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEPNS_11MCSymbolELFENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E13getBucketsEndEv: 384| 2.24k| BucketT *getBucketsEnd() { 385| 2.24k| return getBuckets() + getNumBuckets(); 386| 2.24k| } _ZN7llvm_ks6detail12DenseMapPairIPKNS_12MCSectionELFEPNS_11MCSymbolELFEE8getFirstEv: 40| 195k| KeyT &getFirst() { return std::pair::first; } _ZN7llvm_ks8DenseMapINSt3__14pairIjjEEPNS_8MCSymbolENS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S5_EEEC2Ej: 553| 749| explicit DenseMap(unsigned NumInitBuckets = 0) { 554| 749| init(NumInitBuckets); 555| 749| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapINSt3__14pairIjjEEPNS_8MCSymbolENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_EC2Ev: 262| 749| DenseMapBase() = default; _ZN7llvm_ks8DenseMapINSt3__14pairIjjEEPNS_8MCSymbolENS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S5_EEE4initEj: 612| 749| void init(unsigned InitBuckets) { 613| 749| if (allocateBuckets(InitBuckets)) { ------------------ | Branch (613:9): [True: 0, False: 749] ------------------ 614| 0| this->BaseT::initEmpty(); 615| 749| } else { 616| 749| NumEntries = 0; 617| 749| NumTombstones = 0; 618| 749| } 619| 749| } _ZN7llvm_ks8DenseMapINSt3__14pairIjjEEPNS_8MCSymbolENS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S5_EEE15allocateBucketsEj: 678| 749| bool allocateBuckets(unsigned Num) { 679| 749| NumBuckets = Num; 680| 749| if (NumBuckets == 0) { ------------------ | Branch (680:9): [True: 749, False: 0] ------------------ 681| 749| Buckets = nullptr; 682| 749| return false; 683| 749| } 684| | 685| 0| Buckets = static_cast(operator new(sizeof(BucketT) * NumBuckets)); 686| 0| return true; 687| 749| } _ZNK7llvm_ks12DenseMapBaseINS_8DenseMapINSt3__14pairIjjEEPNS_8MCSymbolENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E13getNumBucketsEv: 381| 749| unsigned getNumBuckets() const { 382| 749| return static_cast(this)->getNumBuckets(); 383| 749| } _ZNK7llvm_ks8DenseMapINSt3__14pairIjjEEPNS_8MCSymbolENS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S5_EEE13getNumBucketsEv: 674| 749| unsigned getNumBuckets() const { 675| 749| return NumBuckets; 676| 749| } _ZN7llvm_ks8DenseMapIjPNS_7MCLabelENS_12DenseMapInfoIjEENS_6detail12DenseMapPairIjS2_EEEC2Ej: 553| 749| explicit DenseMap(unsigned NumInitBuckets = 0) { 554| 749| init(NumInitBuckets); 555| 749| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIjPNS_7MCLabelENS_12DenseMapInfoIjEENS_6detail12DenseMapPairIjS3_EEEEjS3_S5_S8_EC2Ev: 262| 749| DenseMapBase() = default; _ZN7llvm_ks8DenseMapIjPNS_7MCLabelENS_12DenseMapInfoIjEENS_6detail12DenseMapPairIjS2_EEE4initEj: 612| 749| void init(unsigned InitBuckets) { 613| 749| if (allocateBuckets(InitBuckets)) { ------------------ | Branch (613:9): [True: 0, False: 749] ------------------ 614| 0| this->BaseT::initEmpty(); 615| 749| } else { 616| 749| NumEntries = 0; 617| 749| NumTombstones = 0; 618| 749| } 619| 749| } _ZN7llvm_ks8DenseMapIjPNS_7MCLabelENS_12DenseMapInfoIjEENS_6detail12DenseMapPairIjS2_EEE15allocateBucketsEj: 678| 749| bool allocateBuckets(unsigned Num) { 679| 749| NumBuckets = Num; 680| 749| if (NumBuckets == 0) { ------------------ | Branch (680:9): [True: 749, False: 0] ------------------ 681| 749| Buckets = nullptr; 682| 749| return false; 683| 749| } 684| | 685| 0| Buckets = static_cast(operator new(sizeof(BucketT) * NumBuckets)); 686| 0| return true; 687| 749| } _ZNK7llvm_ks12DenseMapBaseINS_8DenseMapIjPNS_7MCLabelENS_12DenseMapInfoIjEENS_6detail12DenseMapPairIjS3_EEEEjS3_S5_S8_E13getNumBucketsEv: 381| 749| unsigned getNumBuckets() const { 382| 749| return static_cast(this)->getNumBuckets(); 383| 749| } _ZNK7llvm_ks8DenseMapIjPNS_7MCLabelENS_12DenseMapInfoIjEENS_6detail12DenseMapPairIjS2_EEE13getNumBucketsEv: 674| 749| unsigned getNumBuckets() const { 675| 749| return NumBuckets; 676| 749| } _ZN7llvm_ks8DenseMapIPNS_9MCSectionENS_6detail13DenseSetEmptyENS_12DenseMapInfoIS2_EENS3_12DenseSetPairIS2_EEEC2Ej: 553| 749| explicit DenseMap(unsigned NumInitBuckets = 0) { 554| 749| init(NumInitBuckets); 555| 749| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPNS_9MCSectionENS_6detail13DenseSetEmptyENS_12DenseMapInfoIS3_EENS4_12DenseSetPairIS3_EEEES3_S5_S7_S9_EC2Ev: 262| 749| DenseMapBase() = default; _ZN7llvm_ks8DenseMapIPNS_9MCSectionENS_6detail13DenseSetEmptyENS_12DenseMapInfoIS2_EENS3_12DenseSetPairIS2_EEE4initEj: 612| 749| void init(unsigned InitBuckets) { 613| 749| if (allocateBuckets(InitBuckets)) { ------------------ | Branch (613:9): [True: 0, False: 749] ------------------ 614| 0| this->BaseT::initEmpty(); 615| 749| } else { 616| 749| NumEntries = 0; 617| 749| NumTombstones = 0; 618| 749| } 619| 749| } _ZN7llvm_ks8DenseMapIPKNS_12MCSectionELFEPNS_11MCSymbolELFENS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S5_EEED2Ev: 573| 749| ~DenseMap() { 574| 749| this->destroyAll(); 575| 749| operator delete(Buckets); 576| 749| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEPNS_11MCSymbolELFENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E10destroyAllEv: 264| 749| void destroyAll() { 265| 749| if (getNumBuckets() == 0) // Nothing to do. ------------------ | Branch (265:9): [True: 0, False: 749] ------------------ 266| 0| return; 267| | 268| 749| const KeyT EmptyKey = getEmptyKey(), TombstoneKey = getTombstoneKey(); 269| 48.6k| for (BucketT *P = getBuckets(), *E = getBucketsEnd(); P != E; ++P) { ------------------ | Branch (269:59): [True: 47.9k, False: 749] ------------------ 270| 47.9k| if (!KeyInfoT::isEqual(P->getFirst(), EmptyKey) && ------------------ | Branch (270:11): [True: 0, False: 47.9k] ------------------ 271| 0| !KeyInfoT::isEqual(P->getFirst(), TombstoneKey)) ------------------ | Branch (271:11): [True: 0, False: 0] ------------------ 272| 0| P->getSecond().~ValueT(); 273| 47.9k| P->getFirst().~KeyT(); 274| 47.9k| } 275| 749| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEPNS_11MCSymbolELFENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E15getTombstoneKeyEv: 346| 2.37k| static const KeyT getTombstoneKey() { 347| 2.37k| return KeyInfoT::getTombstoneKey(); 348| 2.37k| } _ZN7llvm_ks6detail12DenseMapPairIPKNS_12MCSectionELFEPNS_11MCSymbolELFEE9getSecondEv: 42| 1.75k| ValueT &getSecond() { return std::pair::second; } _ZN7llvm_ks8DenseMapINSt3__14pairIjjEEPNS_8MCSymbolENS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S5_EEED2Ev: 573| 749| ~DenseMap() { 574| 749| this->destroyAll(); 575| 749| operator delete(Buckets); 576| 749| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapINSt3__14pairIjjEEPNS_8MCSymbolENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E10destroyAllEv: 264| 749| void destroyAll() { 265| 749| if (getNumBuckets() == 0) // Nothing to do. ------------------ | Branch (265:9): [True: 749, False: 0] ------------------ 266| 749| return; 267| | 268| 0| const KeyT EmptyKey = getEmptyKey(), TombstoneKey = getTombstoneKey(); 269| 0| for (BucketT *P = getBuckets(), *E = getBucketsEnd(); P != E; ++P) { ------------------ | Branch (269:59): [True: 0, False: 0] ------------------ 270| 0| if (!KeyInfoT::isEqual(P->getFirst(), EmptyKey) && ------------------ | Branch (270:11): [True: 0, False: 0] ------------------ 271| 0| !KeyInfoT::isEqual(P->getFirst(), TombstoneKey)) ------------------ | Branch (271:11): [True: 0, False: 0] ------------------ 272| 0| P->getSecond().~ValueT(); 273| 0| P->getFirst().~KeyT(); 274| 0| } 275| 0| } _ZN7llvm_ks8DenseMapIjPNS_7MCLabelENS_12DenseMapInfoIjEENS_6detail12DenseMapPairIjS2_EEED2Ev: 573| 749| ~DenseMap() { 574| 749| this->destroyAll(); 575| 749| operator delete(Buckets); 576| 749| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIjPNS_7MCLabelENS_12DenseMapInfoIjEENS_6detail12DenseMapPairIjS3_EEEEjS3_S5_S8_E10destroyAllEv: 264| 749| void destroyAll() { 265| 749| if (getNumBuckets() == 0) // Nothing to do. ------------------ | Branch (265:9): [True: 749, False: 0] ------------------ 266| 749| return; 267| | 268| 0| const KeyT EmptyKey = getEmptyKey(), TombstoneKey = getTombstoneKey(); 269| 0| for (BucketT *P = getBuckets(), *E = getBucketsEnd(); P != E; ++P) { ------------------ | Branch (269:59): [True: 0, False: 0] ------------------ 270| 0| if (!KeyInfoT::isEqual(P->getFirst(), EmptyKey) && ------------------ | Branch (270:11): [True: 0, False: 0] ------------------ 271| 0| !KeyInfoT::isEqual(P->getFirst(), TombstoneKey)) ------------------ | Branch (271:11): [True: 0, False: 0] ------------------ 272| 0| P->getSecond().~ValueT(); 273| 0| P->getFirst().~KeyT(); 274| 0| } 275| 0| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEPNS_11MCSymbolELFENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E5clearEv: 91| 749| void clear() { 92| 749| incrementEpoch(); 93| 749| if (getNumEntries() == 0 && getNumTombstones() == 0) return; ------------------ | Branch (93:9): [True: 0, False: 749] | Branch (93:33): [True: 0, False: 0] ------------------ 94| | 95| | // If the capacity of the array is huge, and the # elements used is small, 96| | // shrink the array. 97| 749| if (getNumEntries() * 4 < getNumBuckets() && getNumBuckets() > 64) { ------------------ | Branch (97:9): [True: 749, False: 0] | Branch (97:50): [True: 0, False: 749] ------------------ 98| 0| shrink_and_clear(); 99| 0| return; 100| 0| } 101| | 102| 749| const KeyT EmptyKey = getEmptyKey(), TombstoneKey = getTombstoneKey(); 103| 749| unsigned NumEntries = getNumEntries(); 104| 48.6k| for (BucketT *P = getBuckets(), *E = getBucketsEnd(); P != E; ++P) { ------------------ | Branch (104:59): [True: 47.9k, False: 749] ------------------ 105| 47.9k| if (!KeyInfoT::isEqual(P->getFirst(), EmptyKey)) { ------------------ | Branch (105:11): [True: 879, False: 47.0k] ------------------ 106| 879| if (!KeyInfoT::isEqual(P->getFirst(), TombstoneKey)) { ------------------ | Branch (106:13): [True: 879, False: 0] ------------------ 107| 879| P->getSecond().~ValueT(); 108| 879| --NumEntries; 109| 879| } 110| 879| P->getFirst() = EmptyKey; 111| 879| } 112| 47.9k| } 113| 749| assert(NumEntries == 0 && "Node count imbalance!"); ------------------ | Branch (113:5): [True: 749, False: 0] | Branch (113:5): [True: 749, Folded] | Branch (113:5): [True: 749, False: 0] ------------------ 114| 749| setNumEntries(0); 115| 749| setNumTombstones(0); 116| 749| } _ZNK7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEPNS_11MCSymbolELFENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E13getNumEntriesEv: 351| 4.00k| unsigned getNumEntries() const { 352| 4.00k| return static_cast(this)->getNumEntries(); 353| 4.00k| } _ZNK7llvm_ks8DenseMapIPKNS_12MCSectionELFEPNS_11MCSymbolELFENS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S5_EEE13getNumEntriesEv: 656| 4.00k| unsigned getNumEntries() const { 657| 4.00k| return NumEntries; 658| 4.00k| } _ZNK7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEPNS_11MCSymbolELFENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E16getNumTombstonesEv: 363| 130| unsigned getNumTombstones() const { 364| 130| return static_cast(this)->getNumTombstones(); 365| 130| } _ZNK7llvm_ks8DenseMapIPKNS_12MCSectionELFEPNS_11MCSymbolELFENS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S5_EEE16getNumTombstonesEv: 663| 130| unsigned getNumTombstones() const { 664| 130| return NumTombstones; 665| 130| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIjPNS_7MCLabelENS_12DenseMapInfoIjEENS_6detail12DenseMapPairIjS3_EEEEjS3_S5_S8_E5clearEv: 91| 749| void clear() { 92| 749| incrementEpoch(); 93| 749| if (getNumEntries() == 0 && getNumTombstones() == 0) return; ------------------ | Branch (93:9): [True: 749, False: 0] | Branch (93:33): [True: 749, False: 0] ------------------ 94| | 95| | // If the capacity of the array is huge, and the # elements used is small, 96| | // shrink the array. 97| 0| if (getNumEntries() * 4 < getNumBuckets() && getNumBuckets() > 64) { ------------------ | Branch (97:9): [True: 0, False: 0] | Branch (97:50): [True: 0, False: 0] ------------------ 98| 0| shrink_and_clear(); 99| 0| return; 100| 0| } 101| | 102| 0| const KeyT EmptyKey = getEmptyKey(), TombstoneKey = getTombstoneKey(); 103| 0| unsigned NumEntries = getNumEntries(); 104| 0| for (BucketT *P = getBuckets(), *E = getBucketsEnd(); P != E; ++P) { ------------------ | Branch (104:59): [True: 0, False: 0] ------------------ 105| 0| if (!KeyInfoT::isEqual(P->getFirst(), EmptyKey)) { ------------------ | Branch (105:11): [True: 0, False: 0] ------------------ 106| 0| if (!KeyInfoT::isEqual(P->getFirst(), TombstoneKey)) { ------------------ | Branch (106:13): [True: 0, False: 0] ------------------ 107| 0| P->getSecond().~ValueT(); 108| 0| --NumEntries; 109| 0| } 110| 0| P->getFirst() = EmptyKey; 111| 0| } 112| 0| } 113| 0| assert(NumEntries == 0 && "Node count imbalance!"); ------------------ | Branch (113:5): [True: 0, False: 0] | Branch (113:5): [True: 0, Folded] | Branch (113:5): [True: 0, False: 0] ------------------ 114| 0| setNumEntries(0); 115| 0| setNumTombstones(0); 116| 0| } _ZNK7llvm_ks12DenseMapBaseINS_8DenseMapIjPNS_7MCLabelENS_12DenseMapInfoIjEENS_6detail12DenseMapPairIjS3_EEEEjS3_S5_S8_E13getNumEntriesEv: 351| 819| unsigned getNumEntries() const { 352| 819| return static_cast(this)->getNumEntries(); 353| 819| } _ZNK7llvm_ks8DenseMapIjPNS_7MCLabelENS_12DenseMapInfoIjEENS_6detail12DenseMapPairIjS2_EEE13getNumEntriesEv: 656| 819| unsigned getNumEntries() const { 657| 819| return NumEntries; 658| 819| } _ZNK7llvm_ks12DenseMapBaseINS_8DenseMapIjPNS_7MCLabelENS_12DenseMapInfoIjEENS_6detail12DenseMapPairIjS3_EEEEjS3_S5_S8_E16getNumTombstonesEv: 363| 749| unsigned getNumTombstones() const { 364| 749| return static_cast(this)->getNumTombstones(); 365| 749| } _ZNK7llvm_ks8DenseMapIjPNS_7MCLabelENS_12DenseMapInfoIjEENS_6detail12DenseMapPairIjS2_EEE16getNumTombstonesEv: 663| 749| unsigned getNumTombstones() const { 664| 749| return NumTombstones; 665| 749| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPNS_9MCSectionENS_6detail13DenseSetEmptyENS_12DenseMapInfoIS3_EENS4_12DenseSetPairIS3_EEEES3_S5_S7_S9_E5clearEv: 91| 749| void clear() { 92| 749| incrementEpoch(); 93| 749| if (getNumEntries() == 0 && getNumTombstones() == 0) return; ------------------ | Branch (93:9): [True: 749, False: 0] | Branch (93:33): [True: 749, False: 0] ------------------ 94| | 95| | // If the capacity of the array is huge, and the # elements used is small, 96| | // shrink the array. 97| 0| if (getNumEntries() * 4 < getNumBuckets() && getNumBuckets() > 64) { ------------------ | Branch (97:9): [True: 0, False: 0] | Branch (97:50): [True: 0, False: 0] ------------------ 98| 0| shrink_and_clear(); 99| 0| return; 100| 0| } 101| | 102| 0| const KeyT EmptyKey = getEmptyKey(), TombstoneKey = getTombstoneKey(); 103| 0| unsigned NumEntries = getNumEntries(); 104| 0| for (BucketT *P = getBuckets(), *E = getBucketsEnd(); P != E; ++P) { ------------------ | Branch (104:59): [True: 0, False: 0] ------------------ 105| 0| if (!KeyInfoT::isEqual(P->getFirst(), EmptyKey)) { ------------------ | Branch (105:11): [True: 0, False: 0] ------------------ 106| 0| if (!KeyInfoT::isEqual(P->getFirst(), TombstoneKey)) { ------------------ | Branch (106:13): [True: 0, False: 0] ------------------ 107| 0| P->getSecond().~ValueT(); 108| 0| --NumEntries; 109| 0| } 110| 0| P->getFirst() = EmptyKey; 111| 0| } 112| 0| } 113| 0| assert(NumEntries == 0 && "Node count imbalance!"); ------------------ | Branch (113:5): [True: 0, False: 0] | Branch (113:5): [True: 0, Folded] | Branch (113:5): [True: 0, False: 0] ------------------ 114| 0| setNumEntries(0); 115| 0| setNumTombstones(0); 116| 0| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEPNS_11MCSymbolELFENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_EixEOS4_: 245| 879| ValueT &operator[](KeyT &&Key) { 246| 879| return FindAndConstruct(std::move(Key)).second; 247| 879| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEPNS_11MCSymbolELFENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E16FindAndConstructEOS4_: 237| 879| value_type& FindAndConstruct(KeyT &&Key) { 238| 879| BucketT *TheBucket; 239| 879| if (LookupBucketFor(Key, TheBucket)) ------------------ | Branch (239:9): [True: 0, False: 879] ------------------ 240| 0| return *TheBucket; 241| | 242| 879| return *InsertIntoBucket(std::move(Key), ValueT(), TheBucket); 243| 879| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEPNS_11MCSymbolELFENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E15LookupBucketForIS4_EEbRKT_RPSB_: 519| 1.62k| bool LookupBucketFor(const LookupKeyT &Val, BucketT *&FoundBucket) { 520| 1.62k| const BucketT *ConstFoundBucket; 521| 1.62k| bool Result = const_cast(this) 522| 1.62k| ->LookupBucketFor(Val, ConstFoundBucket); 523| 1.62k| FoundBucket = const_cast(ConstFoundBucket); 524| 1.62k| return Result; 525| 1.62k| } _ZNK7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEPNS_11MCSymbolELFENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E15LookupBucketForIS4_EEbRKT_RPKSB_: 469| 1.62k| const BucketT *&FoundBucket) const { 470| 1.62k| const BucketT *BucketsPtr = getBuckets(); 471| 1.62k| const unsigned NumBuckets = getNumBuckets(); 472| | 473| 1.62k| if (NumBuckets == 0) { ------------------ | Branch (473:9): [True: 749, False: 879] ------------------ 474| 749| FoundBucket = nullptr; 475| 749| return false; 476| 749| } 477| | 478| | // FoundTombstone - Keep track of whether we find a tombstone while probing. 479| 879| const BucketT *FoundTombstone = nullptr; 480| 879| const KeyT EmptyKey = getEmptyKey(); 481| 879| const KeyT TombstoneKey = getTombstoneKey(); 482| 879| assert(!KeyInfoT::isEqual(Val, EmptyKey) && ------------------ | Branch (482:5): [True: 879, False: 0] | Branch (482:5): [True: 879, False: 0] | Branch (482:5): [True: 879, Folded] | Branch (482:5): [True: 879, False: 0] ------------------ 483| 879| !KeyInfoT::isEqual(Val, TombstoneKey) && 484| 879| "Empty/Tombstone value shouldn't be inserted into map!"); 485| | 486| 879| unsigned BucketNo = getHashValue(Val) & (NumBuckets-1); 487| 879| unsigned ProbeAmt = 1; 488| 880| while (1) { ------------------ | Branch (488:12): [True: 880, Folded] ------------------ 489| 880| const BucketT *ThisBucket = BucketsPtr + BucketNo; 490| | // Found Val's bucket? If so, return it. 491| 880| if (LLVM_LIKELY(KeyInfoT::isEqual(Val, ThisBucket->getFirst()))) { ------------------ | | 170| 880|#define LLVM_LIKELY(EXPR) __builtin_expect((bool)(EXPR), true) | | ------------------ | | | Branch (170:27): [True: 0, False: 880] | | ------------------ ------------------ 492| 0| FoundBucket = ThisBucket; 493| 0| return true; 494| 0| } 495| | 496| | // If we found an empty bucket, the key doesn't exist in the set. 497| | // Insert it and return the default value. 498| 880| if (LLVM_LIKELY(KeyInfoT::isEqual(ThisBucket->getFirst(), EmptyKey))) { ------------------ | | 170| 880|#define LLVM_LIKELY(EXPR) __builtin_expect((bool)(EXPR), true) | | ------------------ | | | Branch (170:27): [True: 879, False: 1] | | ------------------ ------------------ 499| | // If we've already seen a tombstone while probing, fill it in instead 500| | // of the empty bucket we eventually probed to. 501| 879| FoundBucket = FoundTombstone ? FoundTombstone : ThisBucket; ------------------ | Branch (501:23): [True: 0, False: 879] ------------------ 502| 879| return false; 503| 879| } 504| | 505| | // If this is a tombstone, remember it. If Val ends up not in the map, we 506| | // prefer to return it than something that would require more probing. 507| 1| if (KeyInfoT::isEqual(ThisBucket->getFirst(), TombstoneKey) && ------------------ | Branch (507:11): [True: 0, False: 1] ------------------ 508| 0| !FoundTombstone) ------------------ | Branch (508:11): [True: 0, False: 0] ------------------ 509| 0| FoundTombstone = ThisBucket; // Remember the first tombstone found. 510| | 511| | // Otherwise, it's a hash collision or a tombstone, continue quadratic 512| | // probing. 513| 1| BucketNo += ProbeAmt++; 514| 1| BucketNo &= (NumBuckets-1); 515| 1| } 516| 879| } _ZNK7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEPNS_11MCSymbolELFENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E10getBucketsEv: 375| 1.62k| const BucketT *getBuckets() const { 376| 1.62k| return static_cast(this)->getBuckets(); 377| 1.62k| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEPNS_11MCSymbolELFENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E12getHashValueERKS4_: 336| 879| static unsigned getHashValue(const KeyT &Val) { 337| 879| return KeyInfoT::getHashValue(Val); 338| 879| } _ZNK7llvm_ks6detail12DenseMapPairIPKNS_12MCSectionELFEPNS_11MCSymbolELFEE8getFirstEv: 41| 1.76k| const KeyT &getFirst() const { return std::pair::first; } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEPNS_11MCSymbolELFENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E16InsertIntoBucketEOS4_OS6_PSB_: 418| 879| BucketT *InsertIntoBucket(KeyT &&Key, ValueT &&Value, BucketT *TheBucket) { 419| 879| TheBucket = InsertIntoBucketImpl(Key, TheBucket); 420| | 421| 879| TheBucket->getFirst() = std::move(Key); 422| 879| ::new (&TheBucket->getSecond()) ValueT(std::move(Value)); 423| 879| return TheBucket; 424| 879| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEPNS_11MCSymbolELFENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E20InsertIntoBucketImplERKS4_PSB_: 426| 879| BucketT *InsertIntoBucketImpl(const KeyT &Key, BucketT *TheBucket) { 427| 879| incrementEpoch(); 428| | 429| | // If the load of the hash table is more than 3/4, or if fewer than 1/8 of 430| | // the buckets are empty (meaning that many are filled with tombstones), 431| | // grow the table. 432| | // 433| | // The later case is tricky. For example, if we had one empty bucket with 434| | // tons of tombstones, failing lookups (e.g. for insertion) would have to 435| | // probe almost the entire table until it found the empty bucket. If the 436| | // table completely filled with tombstones, no lookup would ever succeed, 437| | // causing infinite loops in lookup. 438| 879| unsigned NewNumEntries = getNumEntries() + 1; 439| 879| unsigned NumBuckets = getNumBuckets(); 440| 879| if (LLVM_UNLIKELY(NewNumEntries * 4 >= NumBuckets * 3)) { ------------------ | | 171| 879|#define LLVM_UNLIKELY(EXPR) __builtin_expect((bool)(EXPR), false) | | ------------------ | | | Branch (171:29): [True: 749, False: 130] | | ------------------ ------------------ 441| 749| this->grow(NumBuckets * 2); 442| 749| LookupBucketFor(Key, TheBucket); 443| 749| NumBuckets = getNumBuckets(); 444| 749| } else if (LLVM_UNLIKELY(NumBuckets-(NewNumEntries+getNumTombstones()) <= ------------------ | | 171| 130|#define LLVM_UNLIKELY(EXPR) __builtin_expect((bool)(EXPR), false) | | ------------------ | | | Branch (171:29): [True: 0, False: 130] | | ------------------ ------------------ 445| 130| NumBuckets/8)) { 446| 0| this->grow(NumBuckets); 447| 0| LookupBucketFor(Key, TheBucket); 448| 0| } 449| 879| assert(TheBucket); ------------------ | Branch (449:5): [True: 879, False: 0] ------------------ 450| | 451| | // Only update the state after we've grown our bucket space appropriately 452| | // so that when growing buckets we have self-consistent entry count. 453| 879| incrementNumEntries(); 454| | 455| | // If we are writing over a tombstone, remember this. 456| 879| const KeyT EmptyKey = getEmptyKey(); 457| 879| if (!KeyInfoT::isEqual(TheBucket->getFirst(), EmptyKey)) ------------------ | Branch (457:9): [True: 0, False: 879] ------------------ 458| 0| decrementNumTombstones(); 459| | 460| 879| return TheBucket; 461| 879| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEPNS_11MCSymbolELFENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E4growEj: 391| 749| void grow(unsigned AtLeast) { 392| 749| static_cast(this)->grow(AtLeast); 393| 749| } _ZN7llvm_ks8DenseMapIPKNS_12MCSectionELFEPNS_11MCSymbolELFENS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S5_EEE4growEj: 621| 749| void grow(unsigned AtLeast) { 622| 749| unsigned OldNumBuckets = NumBuckets; 623| 749| BucketT *OldBuckets = Buckets; 624| | 625| 749| allocateBuckets(std::max(64, static_cast(NextPowerOf2(AtLeast-1)))); 626| 749| assert(Buckets); ------------------ | Branch (626:5): [True: 749, False: 0] ------------------ 627| 749| if (!OldBuckets) { ------------------ | Branch (627:9): [True: 749, False: 0] ------------------ 628| 749| this->BaseT::initEmpty(); 629| 749| return; 630| 749| } 631| | 632| 0| this->moveFromOldBuckets(OldBuckets, OldBuckets+OldNumBuckets); 633| | 634| | // Free the old table. 635| 0| operator delete(OldBuckets); 636| 0| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEPNS_11MCSymbolELFENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E19incrementNumEntriesEv: 357| 879| void incrementNumEntries() { 358| 879| setNumEntries(getNumEntries() + 1); 359| 879| } _ZNK7llvm_ks12DenseMapBaseINS_8DenseMapIjPNS_7MCLabelENS_12DenseMapInfoIjEENS_6detail12DenseMapPairIjS3_EEEEjS3_S5_S8_E4sizeEv: 82| 70| unsigned size() const { return getNumEntries(); } _ZN7llvm_ks8DenseMapIPKNS_9MCSectionEPNS_10MCFragmentENS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S5_EEEC2Ej: 553| 312| explicit DenseMap(unsigned NumInitBuckets = 0) { 554| 312| init(NumInitBuckets); 555| 312| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_9MCSectionEPNS_10MCFragmentENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_EC2Ev: 262| 312| DenseMapBase() = default; _ZN7llvm_ks8DenseMapIPKNS_9MCSectionEPNS_10MCFragmentENS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S5_EEE4initEj: 612| 312| void init(unsigned InitBuckets) { 613| 312| if (allocateBuckets(InitBuckets)) { ------------------ | Branch (613:9): [True: 0, False: 312] ------------------ 614| 0| this->BaseT::initEmpty(); 615| 312| } else { 616| 312| NumEntries = 0; 617| 312| NumTombstones = 0; 618| 312| } 619| 312| } _ZN7llvm_ks8DenseMapIPKNS_9MCSectionEPNS_10MCFragmentENS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S5_EEE15allocateBucketsEj: 678| 624| bool allocateBuckets(unsigned Num) { 679| 624| NumBuckets = Num; 680| 624| if (NumBuckets == 0) { ------------------ | Branch (680:9): [True: 312, False: 312] ------------------ 681| 312| Buckets = nullptr; 682| 312| return false; 683| 312| } 684| | 685| 312| Buckets = static_cast(operator new(sizeof(BucketT) * NumBuckets)); 686| 312| return true; 687| 624| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_9MCSectionEPNS_10MCFragmentENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E9initEmptyEv: 277| 312| void initEmpty() { 278| 312| setNumEntries(0); 279| 312| setNumTombstones(0); 280| | 281| 312| assert((getNumBuckets() & (getNumBuckets()-1)) == 0 && ------------------ | Branch (281:5): [True: 312, False: 0] | Branch (281:5): [True: 312, Folded] | Branch (281:5): [True: 312, False: 0] ------------------ 282| 312| "# initial buckets must be a power of two!"); 283| 312| const KeyT EmptyKey = getEmptyKey(); 284| 20.2k| for (BucketT *B = getBuckets(), *E = getBucketsEnd(); B != E; ++B) ------------------ | Branch (284:59): [True: 19.9k, False: 312] ------------------ 285| 19.9k| ::new (&B->getFirst()) KeyT(EmptyKey); 286| 312| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_9MCSectionEPNS_10MCFragmentENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E13setNumEntriesEj: 354| 628| void setNumEntries(unsigned Num) { 355| 628| static_cast(this)->setNumEntries(Num); 356| 628| } _ZN7llvm_ks8DenseMapIPKNS_9MCSectionEPNS_10MCFragmentENS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S5_EEE13setNumEntriesEj: 659| 628| void setNumEntries(unsigned Num) { 660| 628| NumEntries = Num; 661| 628| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_9MCSectionEPNS_10MCFragmentENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E16setNumTombstonesEj: 366| 312| void setNumTombstones(unsigned Num) { 367| 312| static_cast(this)->setNumTombstones(Num); 368| 312| } _ZN7llvm_ks8DenseMapIPKNS_9MCSectionEPNS_10MCFragmentENS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S5_EEE16setNumTombstonesEj: 666| 312| void setNumTombstones(unsigned Num) { 667| 312| NumTombstones = Num; 668| 312| } _ZNK7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_9MCSectionEPNS_10MCFragmentENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E13getNumBucketsEv: 381| 20.7k| unsigned getNumBuckets() const { 382| 20.7k| return static_cast(this)->getNumBuckets(); 383| 20.7k| } _ZNK7llvm_ks8DenseMapIPKNS_9MCSectionEPNS_10MCFragmentENS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S5_EEE13getNumBucketsEv: 674| 20.7k| unsigned getNumBuckets() const { 675| 20.7k| return NumBuckets; 676| 20.7k| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_9MCSectionEPNS_10MCFragmentENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E11getEmptyKeyEv: 343| 19.1k| static const KeyT getEmptyKey() { 344| 19.1k| return KeyInfoT::getEmptyKey(); 345| 19.1k| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_9MCSectionEPNS_10MCFragmentENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E10getBucketsEv: 378| 1.24k| BucketT *getBuckets() { 379| 1.24k| return static_cast(this)->getBuckets(); 380| 1.24k| } _ZNK7llvm_ks8DenseMapIPKNS_9MCSectionEPNS_10MCFragmentENS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S5_EEE10getBucketsEv: 670| 19.7k| BucketT *getBuckets() const { 671| 19.7k| return Buckets; 672| 19.7k| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_9MCSectionEPNS_10MCFragmentENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E13getBucketsEndEv: 384| 624| BucketT *getBucketsEnd() { 385| 624| return getBuckets() + getNumBuckets(); 386| 624| } _ZN7llvm_ks6detail12DenseMapPairIPKNS_9MCSectionEPNS_10MCFragmentEE8getFirstEv: 40| 60.8k| KeyT &getFirst() { return std::pair::first; } _ZN7llvm_ks8DenseMapIPKNS_9MCSectionEPNS_10MCFragmentENS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S5_EEED2Ev: 573| 312| ~DenseMap() { 574| 312| this->destroyAll(); 575| 312| operator delete(Buckets); 576| 312| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_9MCSectionEPNS_10MCFragmentENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E10destroyAllEv: 264| 312| void destroyAll() { 265| 312| if (getNumBuckets() == 0) // Nothing to do. ------------------ | Branch (265:9): [True: 0, False: 312] ------------------ 266| 0| return; 267| | 268| 312| const KeyT EmptyKey = getEmptyKey(), TombstoneKey = getTombstoneKey(); 269| 20.2k| for (BucketT *P = getBuckets(), *E = getBucketsEnd(); P != E; ++P) { ------------------ | Branch (269:59): [True: 19.9k, False: 312] ------------------ 270| 19.9k| if (!KeyInfoT::isEqual(P->getFirst(), EmptyKey) && ------------------ | Branch (270:11): [True: 316, False: 19.6k] ------------------ 271| 316| !KeyInfoT::isEqual(P->getFirst(), TombstoneKey)) ------------------ | Branch (271:11): [True: 316, False: 0] ------------------ 272| 316| P->getSecond().~ValueT(); 273| 19.9k| P->getFirst().~KeyT(); 274| 19.9k| } 275| 312| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_9MCSectionEPNS_10MCFragmentENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E15getTombstoneKeyEv: 346| 18.5k| static const KeyT getTombstoneKey() { 347| 18.5k| return KeyInfoT::getTombstoneKey(); 348| 18.5k| } _ZN7llvm_ks6detail12DenseMapPairIPKNS_9MCSectionEPNS_10MCFragmentEE9getSecondEv: 42| 632| ValueT &getSecond() { return std::pair::second; } _ZNK7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_9MCSectionEPNS_10MCFragmentENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E6lookupERKS4_: 159| 10.6k| ValueT lookup(const KeyT &Val) const { 160| 10.6k| const BucketT *TheBucket; 161| 10.6k| if (LookupBucketFor(Val, TheBucket)) ------------------ | Branch (161:9): [True: 10.6k, False: 0] ------------------ 162| 10.6k| return TheBucket->getSecond(); 163| 0| return ValueT(); 164| 10.6k| } _ZNK7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_9MCSectionEPNS_10MCFragmentENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E15LookupBucketForIS4_EEbRKT_RPKSB_: 469| 18.5k| const BucketT *&FoundBucket) const { 470| 18.5k| const BucketT *BucketsPtr = getBuckets(); 471| 18.5k| const unsigned NumBuckets = getNumBuckets(); 472| | 473| 18.5k| if (NumBuckets == 0) { ------------------ | Branch (473:9): [True: 312, False: 18.2k] ------------------ 474| 312| FoundBucket = nullptr; 475| 312| return false; 476| 312| } 477| | 478| | // FoundTombstone - Keep track of whether we find a tombstone while probing. 479| 18.2k| const BucketT *FoundTombstone = nullptr; 480| 18.2k| const KeyT EmptyKey = getEmptyKey(); 481| 18.2k| const KeyT TombstoneKey = getTombstoneKey(); 482| 18.2k| assert(!KeyInfoT::isEqual(Val, EmptyKey) && ------------------ | Branch (482:5): [True: 18.2k, False: 0] | Branch (482:5): [True: 18.2k, False: 0] | Branch (482:5): [True: 18.2k, Folded] | Branch (482:5): [True: 18.2k, False: 0] ------------------ 483| 18.2k| !KeyInfoT::isEqual(Val, TombstoneKey) && 484| 18.2k| "Empty/Tombstone value shouldn't be inserted into map!"); 485| | 486| 18.2k| unsigned BucketNo = getHashValue(Val) & (NumBuckets-1); 487| 18.2k| unsigned ProbeAmt = 1; 488| 18.2k| while (1) { ------------------ | Branch (488:12): [True: 18.2k, Folded] ------------------ 489| 18.2k| const BucketT *ThisBucket = BucketsPtr + BucketNo; 490| | // Found Val's bucket? If so, return it. 491| 18.2k| if (LLVM_LIKELY(KeyInfoT::isEqual(Val, ThisBucket->getFirst()))) { ------------------ | | 170| 18.2k|#define LLVM_LIKELY(EXPR) __builtin_expect((bool)(EXPR), true) | | ------------------ | | | Branch (170:27): [True: 17.8k, False: 316] | | ------------------ ------------------ 492| 17.8k| FoundBucket = ThisBucket; 493| 17.8k| return true; 494| 17.8k| } 495| | 496| | // If we found an empty bucket, the key doesn't exist in the set. 497| | // Insert it and return the default value. 498| 316| if (LLVM_LIKELY(KeyInfoT::isEqual(ThisBucket->getFirst(), EmptyKey))) { ------------------ | | 170| 316|#define LLVM_LIKELY(EXPR) __builtin_expect((bool)(EXPR), true) | | ------------------ | | | Branch (170:27): [True: 316, False: 0] | | ------------------ ------------------ 499| | // If we've already seen a tombstone while probing, fill it in instead 500| | // of the empty bucket we eventually probed to. 501| 316| FoundBucket = FoundTombstone ? FoundTombstone : ThisBucket; ------------------ | Branch (501:23): [True: 0, False: 316] ------------------ 502| 316| return false; 503| 316| } 504| | 505| | // If this is a tombstone, remember it. If Val ends up not in the map, we 506| | // prefer to return it than something that would require more probing. 507| 0| if (KeyInfoT::isEqual(ThisBucket->getFirst(), TombstoneKey) && ------------------ | Branch (507:11): [True: 0, False: 0] ------------------ 508| 0| !FoundTombstone) ------------------ | Branch (508:11): [True: 0, False: 0] ------------------ 509| 0| FoundTombstone = ThisBucket; // Remember the first tombstone found. 510| | 511| | // Otherwise, it's a hash collision or a tombstone, continue quadratic 512| | // probing. 513| 0| BucketNo += ProbeAmt++; 514| 0| BucketNo &= (NumBuckets-1); 515| 0| } 516| 18.2k| } _ZNK7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_9MCSectionEPNS_10MCFragmentENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E10getBucketsEv: 375| 18.5k| const BucketT *getBuckets() const { 376| 18.5k| return static_cast(this)->getBuckets(); 377| 18.5k| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_9MCSectionEPNS_10MCFragmentENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E12getHashValueERKS4_: 336| 18.2k| static unsigned getHashValue(const KeyT &Val) { 337| 18.2k| return KeyInfoT::getHashValue(Val); 338| 18.2k| } _ZNK7llvm_ks6detail12DenseMapPairIPKNS_9MCSectionEPNS_10MCFragmentEE8getFirstEv: 41| 18.5k| const KeyT &getFirst() const { return std::pair::first; } _ZNK7llvm_ks6detail12DenseMapPairIPKNS_9MCSectionEPNS_10MCFragmentEE9getSecondEv: 43| 10.6k| const ValueT &getSecond() const { return std::pair::second; } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_9MCSectionEPNS_10MCFragmentENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_EixEOS4_: 245| 1.59k| ValueT &operator[](KeyT &&Key) { 246| 1.59k| return FindAndConstruct(std::move(Key)).second; 247| 1.59k| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_9MCSectionEPNS_10MCFragmentENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E16FindAndConstructEOS4_: 237| 1.59k| value_type& FindAndConstruct(KeyT &&Key) { 238| 1.59k| BucketT *TheBucket; 239| 1.59k| if (LookupBucketFor(Key, TheBucket)) ------------------ | Branch (239:9): [True: 1.59k, False: 0] ------------------ 240| 1.59k| return *TheBucket; 241| | 242| 0| return *InsertIntoBucket(std::move(Key), ValueT(), TheBucket); 243| 1.59k| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_9MCSectionEPNS_10MCFragmentENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E15LookupBucketForIS4_EEbRKT_RPSB_: 519| 7.91k| bool LookupBucketFor(const LookupKeyT &Val, BucketT *&FoundBucket) { 520| 7.91k| const BucketT *ConstFoundBucket; 521| 7.91k| bool Result = const_cast(this) 522| 7.91k| ->LookupBucketFor(Val, ConstFoundBucket); 523| 7.91k| FoundBucket = const_cast(ConstFoundBucket); 524| 7.91k| return Result; 525| 7.91k| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_9MCSectionEPNS_10MCFragmentENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E20InsertIntoBucketImplERKS4_PSB_: 426| 316| BucketT *InsertIntoBucketImpl(const KeyT &Key, BucketT *TheBucket) { 427| 316| incrementEpoch(); 428| | 429| | // If the load of the hash table is more than 3/4, or if fewer than 1/8 of 430| | // the buckets are empty (meaning that many are filled with tombstones), 431| | // grow the table. 432| | // 433| | // The later case is tricky. For example, if we had one empty bucket with 434| | // tons of tombstones, failing lookups (e.g. for insertion) would have to 435| | // probe almost the entire table until it found the empty bucket. If the 436| | // table completely filled with tombstones, no lookup would ever succeed, 437| | // causing infinite loops in lookup. 438| 316| unsigned NewNumEntries = getNumEntries() + 1; 439| 316| unsigned NumBuckets = getNumBuckets(); 440| 316| if (LLVM_UNLIKELY(NewNumEntries * 4 >= NumBuckets * 3)) { ------------------ | | 171| 316|#define LLVM_UNLIKELY(EXPR) __builtin_expect((bool)(EXPR), false) | | ------------------ | | | Branch (171:29): [True: 312, False: 4] | | ------------------ ------------------ 441| 312| this->grow(NumBuckets * 2); 442| 312| LookupBucketFor(Key, TheBucket); 443| 312| NumBuckets = getNumBuckets(); 444| 312| } else if (LLVM_UNLIKELY(NumBuckets-(NewNumEntries+getNumTombstones()) <= ------------------ | | 171| 4|#define LLVM_UNLIKELY(EXPR) __builtin_expect((bool)(EXPR), false) | | ------------------ | | | Branch (171:29): [True: 0, False: 4] | | ------------------ ------------------ 445| 4| NumBuckets/8)) { 446| 0| this->grow(NumBuckets); 447| 0| LookupBucketFor(Key, TheBucket); 448| 0| } 449| 316| assert(TheBucket); ------------------ | Branch (449:5): [True: 316, False: 0] ------------------ 450| | 451| | // Only update the state after we've grown our bucket space appropriately 452| | // so that when growing buckets we have self-consistent entry count. 453| 316| incrementNumEntries(); 454| | 455| | // If we are writing over a tombstone, remember this. 456| 316| const KeyT EmptyKey = getEmptyKey(); 457| 316| if (!KeyInfoT::isEqual(TheBucket->getFirst(), EmptyKey)) ------------------ | Branch (457:9): [True: 0, False: 316] ------------------ 458| 0| decrementNumTombstones(); 459| | 460| 316| return TheBucket; 461| 316| } _ZNK7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_9MCSectionEPNS_10MCFragmentENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E13getNumEntriesEv: 351| 632| unsigned getNumEntries() const { 352| 632| return static_cast(this)->getNumEntries(); 353| 632| } _ZNK7llvm_ks8DenseMapIPKNS_9MCSectionEPNS_10MCFragmentENS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S5_EEE13getNumEntriesEv: 656| 632| unsigned getNumEntries() const { 657| 632| return NumEntries; 658| 632| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_9MCSectionEPNS_10MCFragmentENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E4growEj: 391| 312| void grow(unsigned AtLeast) { 392| 312| static_cast(this)->grow(AtLeast); 393| 312| } _ZN7llvm_ks8DenseMapIPKNS_9MCSectionEPNS_10MCFragmentENS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S5_EEE4growEj: 621| 312| void grow(unsigned AtLeast) { 622| 312| unsigned OldNumBuckets = NumBuckets; 623| 312| BucketT *OldBuckets = Buckets; 624| | 625| 312| allocateBuckets(std::max(64, static_cast(NextPowerOf2(AtLeast-1)))); 626| 312| assert(Buckets); ------------------ | Branch (626:5): [True: 312, False: 0] ------------------ 627| 312| if (!OldBuckets) { ------------------ | Branch (627:9): [True: 312, False: 0] ------------------ 628| 312| this->BaseT::initEmpty(); 629| 312| return; 630| 312| } 631| | 632| 0| this->moveFromOldBuckets(OldBuckets, OldBuckets+OldNumBuckets); 633| | 634| | // Free the old table. 635| 0| operator delete(OldBuckets); 636| 0| } _ZNK7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_9MCSectionEPNS_10MCFragmentENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E16getNumTombstonesEv: 363| 4| unsigned getNumTombstones() const { 364| 4| return static_cast(this)->getNumTombstones(); 365| 4| } _ZNK7llvm_ks8DenseMapIPKNS_9MCSectionEPNS_10MCFragmentENS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S5_EEE16getNumTombstonesEv: 663| 4| unsigned getNumTombstones() const { 664| 4| return NumTombstones; 665| 4| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_9MCSectionEPNS_10MCFragmentENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E19incrementNumEntriesEv: 357| 316| void incrementNumEntries() { 358| 316| setNumEntries(getNumEntries() + 1); 359| 316| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_9MCSectionEPNS_10MCFragmentENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_EixERKS4_: 233| 6.01k| ValueT &operator[](const KeyT &Key) { 234| 6.01k| return FindAndConstruct(Key).second; 235| 6.01k| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_9MCSectionEPNS_10MCFragmentENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E16FindAndConstructERKS4_: 225| 6.01k| value_type& FindAndConstruct(const KeyT &Key) { 226| 6.01k| BucketT *TheBucket; 227| 6.01k| if (LookupBucketFor(Key, TheBucket)) ------------------ | Branch (227:9): [True: 5.69k, False: 316] ------------------ 228| 5.69k| return *TheBucket; 229| | 230| 316| return *InsertIntoBucket(Key, ValueT(), TheBucket); 231| 6.01k| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_9MCSectionEPNS_10MCFragmentENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S6_EEEES4_S6_S8_SB_E16InsertIntoBucketERKS4_OS6_PSB_: 410| 316| BucketT *TheBucket) { 411| 316| TheBucket = InsertIntoBucketImpl(Key, TheBucket); 412| | 413| 316| TheBucket->getFirst() = Key; 414| 316| ::new (&TheBucket->getSecond()) ValueT(std::move(Value)); 415| 316| return TheBucket; 416| 316| } _ZN7llvm_ks8DenseMapIPKNS_8MCSymbolEjNS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_jEEEC2Ej: 553| 1.01k| explicit DenseMap(unsigned NumInitBuckets = 0) { 554| 1.01k| init(NumInitBuckets); 555| 1.01k| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_8MCSymbolEjNS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_jEEEES4_jS6_S9_EC2Ev: 262| 1.01k| DenseMapBase() = default; _ZN7llvm_ks8DenseMapIPKNS_8MCSymbolEjNS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_jEEE4initEj: 612| 1.01k| void init(unsigned InitBuckets) { 613| 1.01k| if (allocateBuckets(InitBuckets)) { ------------------ | Branch (613:9): [True: 0, False: 1.01k] ------------------ 614| 0| this->BaseT::initEmpty(); 615| 1.01k| } else { 616| 1.01k| NumEntries = 0; 617| 1.01k| NumTombstones = 0; 618| 1.01k| } 619| 1.01k| } _ZN7llvm_ks8DenseMapIPKNS_8MCSymbolEjNS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_jEEE15allocateBucketsEj: 678| 1.01k| bool allocateBuckets(unsigned Num) { 679| 1.01k| NumBuckets = Num; 680| 1.01k| if (NumBuckets == 0) { ------------------ | Branch (680:9): [True: 1.01k, False: 0] ------------------ 681| 1.01k| Buckets = nullptr; 682| 1.01k| return false; 683| 1.01k| } 684| | 685| 0| Buckets = static_cast(operator new(sizeof(BucketT) * NumBuckets)); 686| 0| return true; 687| 1.01k| } _ZN7llvm_ks8DenseMapIPKNS_8MCSymbolEjNS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_jEEED2Ev: 573| 1.01k| ~DenseMap() { 574| 1.01k| this->destroyAll(); 575| 1.01k| operator delete(Buckets); 576| 1.01k| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_8MCSymbolEjNS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_jEEEES4_jS6_S9_E10destroyAllEv: 264| 1.01k| void destroyAll() { 265| 1.01k| if (getNumBuckets() == 0) // Nothing to do. ------------------ | Branch (265:9): [True: 1.01k, False: 0] ------------------ 266| 1.01k| return; 267| | 268| 0| const KeyT EmptyKey = getEmptyKey(), TombstoneKey = getTombstoneKey(); 269| 0| for (BucketT *P = getBuckets(), *E = getBucketsEnd(); P != E; ++P) { ------------------ | Branch (269:59): [True: 0, False: 0] ------------------ 270| 0| if (!KeyInfoT::isEqual(P->getFirst(), EmptyKey) && ------------------ | Branch (270:11): [True: 0, False: 0] ------------------ 271| 0| !KeyInfoT::isEqual(P->getFirst(), TombstoneKey)) ------------------ | Branch (271:11): [True: 0, False: 0] ------------------ 272| 0| P->getSecond().~ValueT(); 273| 0| P->getFirst().~KeyT(); 274| 0| } 275| 0| } _ZN7llvm_ks8DenseMapIjiNS_12DenseMapInfoIjEENS_6detail12DenseMapPairIjiEEEC2Ej: 553| 749| explicit DenseMap(unsigned NumInitBuckets = 0) { 554| 749| init(NumInitBuckets); 555| 749| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIjiNS_12DenseMapInfoIjEENS_6detail12DenseMapPairIjiEEEEjiS3_S6_EC2Ev: 262| 749| DenseMapBase() = default; _ZN7llvm_ks8DenseMapIjiNS_12DenseMapInfoIjEENS_6detail12DenseMapPairIjiEEE4initEj: 612| 749| void init(unsigned InitBuckets) { 613| 749| if (allocateBuckets(InitBuckets)) { ------------------ | Branch (613:9): [True: 0, False: 749] ------------------ 614| 0| this->BaseT::initEmpty(); 615| 749| } else { 616| 749| NumEntries = 0; 617| 749| NumTombstones = 0; 618| 749| } 619| 749| } _ZN7llvm_ks8DenseMapIPKNS_11MCSymbolELFES3_NS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S3_EEEC2Ej: 553| 749| explicit DenseMap(unsigned NumInitBuckets = 0) { 554| 749| init(NumInitBuckets); 555| 749| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_11MCSymbolELFES4_NS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S4_EEEES4_S4_S6_S9_EC2Ev: 262| 749| DenseMapBase() = default; _ZN7llvm_ks8DenseMapIPKNS_11MCSymbolELFES3_NS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S3_EEE4initEj: 612| 749| void init(unsigned InitBuckets) { 613| 749| if (allocateBuckets(InitBuckets)) { ------------------ | Branch (613:9): [True: 0, False: 749] ------------------ 614| 0| this->BaseT::initEmpty(); 615| 749| } else { 616| 749| NumEntries = 0; 617| 749| NumTombstones = 0; 618| 749| } 619| 749| } _ZN7llvm_ks8DenseMapIPKNS_11MCSymbolELFES3_NS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S3_EEE15allocateBucketsEj: 678| 757| bool allocateBuckets(unsigned Num) { 679| 757| NumBuckets = Num; 680| 757| if (NumBuckets == 0) { ------------------ | Branch (680:9): [True: 749, False: 8] ------------------ 681| 749| Buckets = nullptr; 682| 749| return false; 683| 749| } 684| | 685| 8| Buckets = static_cast(operator new(sizeof(BucketT) * NumBuckets)); 686| 8| return true; 687| 757| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_11MCSymbolELFES4_NS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S4_EEEES4_S4_S6_S9_E9initEmptyEv: 277| 8| void initEmpty() { 278| 8| setNumEntries(0); 279| 8| setNumTombstones(0); 280| | 281| 8| assert((getNumBuckets() & (getNumBuckets()-1)) == 0 && ------------------ | Branch (281:5): [True: 8, False: 0] | Branch (281:5): [True: 8, Folded] | Branch (281:5): [True: 8, False: 0] ------------------ 282| 8| "# initial buckets must be a power of two!"); 283| 8| const KeyT EmptyKey = getEmptyKey(); 284| 520| for (BucketT *B = getBuckets(), *E = getBucketsEnd(); B != E; ++B) ------------------ | Branch (284:59): [True: 512, False: 8] ------------------ 285| 512| ::new (&B->getFirst()) KeyT(EmptyKey); 286| 8| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_11MCSymbolELFES4_NS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S4_EEEES4_S4_S6_S9_E13setNumEntriesEj: 354| 34| void setNumEntries(unsigned Num) { 355| 34| static_cast(this)->setNumEntries(Num); 356| 34| } _ZN7llvm_ks8DenseMapIPKNS_11MCSymbolELFES3_NS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S3_EEE13setNumEntriesEj: 659| 34| void setNumEntries(unsigned Num) { 660| 34| NumEntries = Num; 661| 34| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_11MCSymbolELFES4_NS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S4_EEEES4_S4_S6_S9_E16setNumTombstonesEj: 366| 8| void setNumTombstones(unsigned Num) { 367| 8| static_cast(this)->setNumTombstones(Num); 368| 8| } _ZN7llvm_ks8DenseMapIPKNS_11MCSymbolELFES3_NS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S3_EEE16setNumTombstonesEj: 666| 8| void setNumTombstones(unsigned Num) { 667| 8| NumTombstones = Num; 668| 8| } _ZNK7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_11MCSymbolELFES4_NS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S4_EEEES4_S4_S6_S9_E13getNumBucketsEv: 381| 1.09k| unsigned getNumBuckets() const { 382| 1.09k| return static_cast(this)->getNumBuckets(); 383| 1.09k| } _ZNK7llvm_ks8DenseMapIPKNS_11MCSymbolELFES3_NS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S3_EEE13getNumBucketsEv: 674| 1.09k| unsigned getNumBuckets() const { 675| 1.09k| return NumBuckets; 676| 1.09k| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_11MCSymbolELFES4_NS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S4_EEEES4_S4_S6_S9_E11getEmptyKeyEv: 343| 180| static const KeyT getEmptyKey() { 344| 180| return KeyInfoT::getEmptyKey(); 345| 180| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_11MCSymbolELFES4_NS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S4_EEEES4_S4_S6_S9_E10getBucketsEv: 378| 170| BucketT *getBuckets() { 379| 170| return static_cast(this)->getBuckets(); 380| 170| } _ZNK7llvm_ks8DenseMapIPKNS_11MCSymbolELFES3_NS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S3_EEE10getBucketsEv: 670| 316| BucketT *getBuckets() const { 671| 316| return Buckets; 672| 316| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_11MCSymbolELFES4_NS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S4_EEEES4_S4_S6_S9_E13getBucketsEndEv: 384| 154| BucketT *getBucketsEnd() { 385| 154| return getBuckets() + getNumBuckets(); 386| 154| } _ZN7llvm_ks6detail12DenseMapPairIPKNS_11MCSymbolELFES4_E8getFirstEv: 40| 1.61k| KeyT &getFirst() { return std::pair::first; } _ZN7llvm_ks8DenseMapIPKNS_12MCSectionELFENSt3__16vectorINS_18ELFRelocationEntryENS4_9allocatorIS6_EEEENS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S9_EEEC2Ej: 553| 749| explicit DenseMap(unsigned NumInitBuckets = 0) { 554| 749| init(NumInitBuckets); 555| 749| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFENSt3__16vectorINS_18ELFRelocationEntryENS5_9allocatorIS7_EEEENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_SA_EEEES4_SA_SC_SF_EC2Ev: 262| 749| DenseMapBase() = default; _ZN7llvm_ks8DenseMapIPKNS_12MCSectionELFENSt3__16vectorINS_18ELFRelocationEntryENS4_9allocatorIS6_EEEENS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S9_EEE4initEj: 612| 749| void init(unsigned InitBuckets) { 613| 749| if (allocateBuckets(InitBuckets)) { ------------------ | Branch (613:9): [True: 0, False: 749] ------------------ 614| 0| this->BaseT::initEmpty(); 615| 749| } else { 616| 749| NumEntries = 0; 617| 749| NumTombstones = 0; 618| 749| } 619| 749| } _ZN7llvm_ks8DenseMapIPKNS_12MCSectionELFENSt3__16vectorINS_18ELFRelocationEntryENS4_9allocatorIS6_EEEENS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S9_EEE15allocateBucketsEj: 678| 1.00k| bool allocateBuckets(unsigned Num) { 679| 1.00k| NumBuckets = Num; 680| 1.00k| if (NumBuckets == 0) { ------------------ | Branch (680:9): [True: 749, False: 257] ------------------ 681| 749| Buckets = nullptr; 682| 749| return false; 683| 749| } 684| | 685| 257| Buckets = static_cast(operator new(sizeof(BucketT) * NumBuckets)); 686| 257| return true; 687| 1.00k| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFENSt3__16vectorINS_18ELFRelocationEntryENS5_9allocatorIS7_EEEENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_SA_EEEES4_SA_SC_SF_E9initEmptyEv: 277| 257| void initEmpty() { 278| 257| setNumEntries(0); 279| 257| setNumTombstones(0); 280| | 281| 257| assert((getNumBuckets() & (getNumBuckets()-1)) == 0 && ------------------ | Branch (281:5): [True: 257, False: 0] | Branch (281:5): [True: 257, Folded] | Branch (281:5): [True: 257, False: 0] ------------------ 282| 257| "# initial buckets must be a power of two!"); 283| 257| const KeyT EmptyKey = getEmptyKey(); 284| 16.7k| for (BucketT *B = getBuckets(), *E = getBucketsEnd(); B != E; ++B) ------------------ | Branch (284:59): [True: 16.4k, False: 257] ------------------ 285| 16.4k| ::new (&B->getFirst()) KeyT(EmptyKey); 286| 257| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFENSt3__16vectorINS_18ELFRelocationEntryENS5_9allocatorIS7_EEEENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_SA_EEEES4_SA_SC_SF_E13setNumEntriesEj: 354| 516| void setNumEntries(unsigned Num) { 355| 516| static_cast(this)->setNumEntries(Num); 356| 516| } _ZN7llvm_ks8DenseMapIPKNS_12MCSectionELFENSt3__16vectorINS_18ELFRelocationEntryENS4_9allocatorIS6_EEEENS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S9_EEE13setNumEntriesEj: 659| 516| void setNumEntries(unsigned Num) { 660| 516| NumEntries = Num; 661| 516| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFENSt3__16vectorINS_18ELFRelocationEntryENS5_9allocatorIS7_EEEENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_SA_EEEES4_SA_SC_SF_E16setNumTombstonesEj: 366| 257| void setNumTombstones(unsigned Num) { 367| 257| static_cast(this)->setNumTombstones(Num); 368| 257| } _ZN7llvm_ks8DenseMapIPKNS_12MCSectionELFENSt3__16vectorINS_18ELFRelocationEntryENS4_9allocatorIS6_EEEENS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S9_EEE16setNumTombstonesEj: 666| 257| void setNumTombstones(unsigned Num) { 667| 257| NumTombstones = Num; 668| 257| } _ZNK7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFENSt3__16vectorINS_18ELFRelocationEntryENS5_9allocatorIS7_EEEENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_SA_EEEES4_SA_SC_SF_E13getNumBucketsEv: 381| 3.20k| unsigned getNumBuckets() const { 382| 3.20k| return static_cast(this)->getNumBuckets(); 383| 3.20k| } _ZNK7llvm_ks8DenseMapIPKNS_12MCSectionELFENSt3__16vectorINS_18ELFRelocationEntryENS4_9allocatorIS6_EEEENS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S9_EEE13getNumBucketsEv: 674| 3.20k| unsigned getNumBuckets() const { 675| 3.20k| return NumBuckets; 676| 3.20k| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFENSt3__16vectorINS_18ELFRelocationEntryENS5_9allocatorIS7_EEEENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_SA_EEEES4_SA_SC_SF_E11getEmptyKeyEv: 343| 1.42k| static const KeyT getEmptyKey() { 344| 1.42k| return KeyInfoT::getEmptyKey(); 345| 1.42k| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFENSt3__16vectorINS_18ELFRelocationEntryENS5_9allocatorIS7_EEEENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_SA_EEEES4_SA_SC_SF_E10getBucketsEv: 378| 1.02k| BucketT *getBuckets() { 379| 1.02k| return static_cast(this)->getBuckets(); 380| 1.02k| } _ZNK7llvm_ks8DenseMapIPKNS_12MCSectionELFENSt3__16vectorINS_18ELFRelocationEntryENS4_9allocatorIS6_EEEENS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S9_EEE10getBucketsEv: 670| 1.93k| BucketT *getBuckets() const { 671| 1.93k| return Buckets; 672| 1.93k| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFENSt3__16vectorINS_18ELFRelocationEntryENS5_9allocatorIS7_EEEENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_SA_EEEES4_SA_SC_SF_E13getBucketsEndEv: 384| 514| BucketT *getBucketsEnd() { 385| 514| return getBuckets() + getNumBuckets(); 386| 514| } _ZN7llvm_ks6detail12DenseMapPairIPKNS_12MCSectionELFENSt3__16vectorINS_18ELFRelocationEntryENS5_9allocatorIS7_EEEEE8getFirstEv: 40| 50.1k| KeyT &getFirst() { return std::pair::first; } _ZN7llvm_ks8DenseMapIPKNS_12MCSectionELFENSt3__16vectorINS_18ELFRelocationEntryENS4_9allocatorIS6_EEEENS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S9_EEED2Ev: 573| 749| ~DenseMap() { 574| 749| this->destroyAll(); 575| 749| operator delete(Buckets); 576| 749| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFENSt3__16vectorINS_18ELFRelocationEntryENS5_9allocatorIS7_EEEENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_SA_EEEES4_SA_SC_SF_E10destroyAllEv: 264| 749| void destroyAll() { 265| 749| if (getNumBuckets() == 0) // Nothing to do. ------------------ | Branch (265:9): [True: 492, False: 257] ------------------ 266| 492| return; 267| | 268| 257| const KeyT EmptyKey = getEmptyKey(), TombstoneKey = getTombstoneKey(); 269| 16.7k| for (BucketT *P = getBuckets(), *E = getBucketsEnd(); P != E; ++P) { ------------------ | Branch (269:59): [True: 16.4k, False: 257] ------------------ 270| 16.4k| if (!KeyInfoT::isEqual(P->getFirst(), EmptyKey) && ------------------ | Branch (270:11): [True: 259, False: 16.1k] ------------------ 271| 259| !KeyInfoT::isEqual(P->getFirst(), TombstoneKey)) ------------------ | Branch (271:11): [True: 259, False: 0] ------------------ 272| 259| P->getSecond().~ValueT(); 273| 16.4k| P->getFirst().~KeyT(); 274| 16.4k| } 275| 257| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFENSt3__16vectorINS_18ELFRelocationEntryENS5_9allocatorIS7_EEEENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_SA_EEEES4_SA_SC_SF_E15getTombstoneKeyEv: 346| 909| static const KeyT getTombstoneKey() { 347| 909| return KeyInfoT::getTombstoneKey(); 348| 909| } _ZN7llvm_ks6detail12DenseMapPairIPKNS_12MCSectionELFENSt3__16vectorINS_18ELFRelocationEntryENS5_9allocatorIS7_EEEEE9getSecondEv: 42| 518| ValueT &getSecond() { return std::pair::second; } _ZN7llvm_ks8DenseMapIPKNS_11MCSymbolELFES3_NS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S3_EEED2Ev: 573| 749| ~DenseMap() { 574| 749| this->destroyAll(); 575| 749| operator delete(Buckets); 576| 749| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_11MCSymbolELFES4_NS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S4_EEEES4_S4_S6_S9_E10destroyAllEv: 264| 749| void destroyAll() { 265| 749| if (getNumBuckets() == 0) // Nothing to do. ------------------ | Branch (265:9): [True: 741, False: 8] ------------------ 266| 741| return; 267| | 268| 8| const KeyT EmptyKey = getEmptyKey(), TombstoneKey = getTombstoneKey(); 269| 520| for (BucketT *P = getBuckets(), *E = getBucketsEnd(); P != E; ++P) { ------------------ | Branch (269:59): [True: 512, False: 8] ------------------ 270| 512| if (!KeyInfoT::isEqual(P->getFirst(), EmptyKey) && ------------------ | Branch (270:11): [True: 26, False: 486] ------------------ 271| 26| !KeyInfoT::isEqual(P->getFirst(), TombstoneKey)) ------------------ | Branch (271:11): [True: 26, False: 0] ------------------ 272| 26| P->getSecond().~ValueT(); 273| 512| P->getFirst().~KeyT(); 274| 512| } 275| 8| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_11MCSymbolELFES4_NS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S4_EEEES4_S4_S6_S9_E15getTombstoneKeyEv: 346| 146| static const KeyT getTombstoneKey() { 347| 146| return KeyInfoT::getTombstoneKey(); 348| 146| } _ZN7llvm_ks6detail12DenseMapPairIPKNS_11MCSymbolELFES4_E9getSecondEv: 42| 52| ValueT &getSecond() { return std::pair::second; } _ZN7llvm_ks8DenseMapINS_9StringRefEmNS_12DenseMapInfoIS1_EENS_6detail12DenseMapPairIS1_mEEED2Ev: 573| 749| ~DenseMap() { 574| 749| this->destroyAll(); 575| 749| operator delete(Buckets); 576| 749| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapINS_9StringRefEmNS_12DenseMapInfoIS2_EENS_6detail12DenseMapPairIS2_mEEEES2_mS4_S7_E10destroyAllEv: 264| 749| void destroyAll() { 265| 749| if (getNumBuckets() == 0) // Nothing to do. ------------------ | Branch (265:9): [True: 487, False: 262] ------------------ 266| 487| return; 267| | 268| 262| const KeyT EmptyKey = getEmptyKey(), TombstoneKey = getTombstoneKey(); 269| 17.0k| for (BucketT *P = getBuckets(), *E = getBucketsEnd(); P != E; ++P) { ------------------ | Branch (269:59): [True: 16.7k, False: 262] ------------------ 270| 16.7k| if (!KeyInfoT::isEqual(P->getFirst(), EmptyKey) && ------------------ | Branch (270:11): [True: 517, False: 16.2k] ------------------ 271| 517| !KeyInfoT::isEqual(P->getFirst(), TombstoneKey)) ------------------ | Branch (271:11): [True: 517, False: 0] ------------------ 272| 517| P->getSecond().~ValueT(); 273| 16.7k| P->getFirst().~KeyT(); 274| 16.7k| } 275| 262| } _ZNK7llvm_ks12DenseMapBaseINS_8DenseMapINS_9StringRefEmNS_12DenseMapInfoIS2_EENS_6detail12DenseMapPairIS2_mEEEES2_mS4_S7_E13getNumBucketsEv: 381| 3.87k| unsigned getNumBuckets() const { 382| 3.87k| return static_cast(this)->getNumBuckets(); 383| 3.87k| } _ZNK7llvm_ks8DenseMapINS_9StringRefEmNS_12DenseMapInfoIS1_EENS_6detail12DenseMapPairIS1_mEEE13getNumBucketsEv: 674| 3.87k| unsigned getNumBuckets() const { 675| 3.87k| return NumBuckets; 676| 3.87k| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapINS_9StringRefEmNS_12DenseMapInfoIS2_EENS_6detail12DenseMapPairIS2_mEEEES2_mS4_S7_E11getEmptyKeyEv: 343| 1.55k| static const KeyT getEmptyKey() { 344| 1.55k| return KeyInfoT::getEmptyKey(); 345| 1.55k| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapINS_9StringRefEmNS_12DenseMapInfoIS2_EENS_6detail12DenseMapPairIS2_mEEEES2_mS4_S7_E15getTombstoneKeyEv: 346| 779| static const KeyT getTombstoneKey() { 347| 779| return KeyInfoT::getTombstoneKey(); 348| 779| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapINS_9StringRefEmNS_12DenseMapInfoIS2_EENS_6detail12DenseMapPairIS2_mEEEES2_mS4_S7_E10getBucketsEv: 378| 1.56k| BucketT *getBuckets() { 379| 1.56k| return static_cast(this)->getBuckets(); 380| 1.56k| } _ZNK7llvm_ks8DenseMapINS_9StringRefEmNS_12DenseMapInfoIS1_EENS_6detail12DenseMapPairIS1_mEEE10getBucketsEv: 670| 2.34k| BucketT *getBuckets() const { 671| 2.34k| return Buckets; 672| 2.34k| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapINS_9StringRefEmNS_12DenseMapInfoIS2_EENS_6detail12DenseMapPairIS2_mEEEES2_mS4_S7_E13getBucketsEndEv: 384| 1.04k| BucketT *getBucketsEnd() { 385| 1.04k| return getBuckets() + getNumBuckets(); 386| 1.04k| } _ZN7llvm_ks6detail12DenseMapPairINS_9StringRefEmE8getFirstEv: 40| 51.8k| KeyT &getFirst() { return std::pair::first; } _ZN7llvm_ks6detail12DenseMapPairINS_9StringRefEmE9getSecondEv: 42| 1.03k| ValueT &getSecond() { return std::pair::second; } _ZNK7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_11MCSymbolELFES4_NS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S4_EEEES4_S4_S6_S9_E13getNumEntriesEv: 351| 52| unsigned getNumEntries() const { 352| 52| return static_cast(this)->getNumEntries(); 353| 52| } _ZNK7llvm_ks8DenseMapIPKNS_11MCSymbolELFES3_NS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S3_EEE13getNumEntriesEv: 656| 52| unsigned getNumEntries() const { 657| 52| return NumEntries; 658| 52| } _ZNK7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_11MCSymbolELFES4_NS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S4_EEEES4_S4_S6_S9_E16getNumTombstonesEv: 363| 18| unsigned getNumTombstones() const { 364| 18| return static_cast(this)->getNumTombstones(); 365| 18| } _ZNK7llvm_ks8DenseMapIPKNS_11MCSymbolELFES3_NS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S3_EEE16getNumTombstonesEv: 663| 18| unsigned getNumTombstones() const { 664| 18| return NumTombstones; 665| 18| } _ZNK7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFENSt3__16vectorINS_18ELFRelocationEntryENS5_9allocatorIS7_EEEENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_SA_EEEES4_SA_SC_SF_E13getNumEntriesEv: 351| 518| unsigned getNumEntries() const { 352| 518| return static_cast(this)->getNumEntries(); 353| 518| } _ZNK7llvm_ks8DenseMapIPKNS_12MCSectionELFENSt3__16vectorINS_18ELFRelocationEntryENS4_9allocatorIS6_EEEENS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S9_EEE13getNumEntriesEv: 656| 518| unsigned getNumEntries() const { 657| 518| return NumEntries; 658| 518| } _ZNK7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFENSt3__16vectorINS_18ELFRelocationEntryENS5_9allocatorIS7_EEEENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_SA_EEEES4_SA_SC_SF_E16getNumTombstonesEv: 363| 2| unsigned getNumTombstones() const { 364| 2| return static_cast(this)->getNumTombstones(); 365| 2| } _ZNK7llvm_ks8DenseMapIPKNS_12MCSectionELFENSt3__16vectorINS_18ELFRelocationEntryENS4_9allocatorIS6_EEEENS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S9_EEE16getNumTombstonesEv: 663| 2| unsigned getNumTombstones() const { 664| 2| return NumTombstones; 665| 2| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_11MCSymbolELFES4_NS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S4_EEEES4_S4_S6_S9_E6insertEONSt3__14pairIS4_S4_EE: 184| 138| std::pair insert(std::pair &&KV) { 185| 138| BucketT *TheBucket; 186| 138| if (LookupBucketFor(KV.first, TheBucket)) ------------------ | Branch (186:9): [True: 112, False: 26] ------------------ 187| 112| return std::make_pair(iterator(TheBucket, getBucketsEnd(), *this, true), 188| 112| false); // Already in map. 189| | 190| | // Otherwise, insert the new element. 191| 26| TheBucket = InsertIntoBucket(std::move(KV.first), 192| 26| std::move(KV.second), 193| 26| TheBucket); 194| 26| return std::make_pair(iterator(TheBucket, getBucketsEnd(), *this, true), 195| 26| true); 196| 138| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_11MCSymbolELFES4_NS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S4_EEEES4_S4_S6_S9_E15LookupBucketForIS4_EEbRKT_RPS9_: 519| 146| bool LookupBucketFor(const LookupKeyT &Val, BucketT *&FoundBucket) { 520| 146| const BucketT *ConstFoundBucket; 521| 146| bool Result = const_cast(this) 522| 146| ->LookupBucketFor(Val, ConstFoundBucket); 523| 146| FoundBucket = const_cast(ConstFoundBucket); 524| 146| return Result; 525| 146| } _ZNK7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_11MCSymbolELFES4_NS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S4_EEEES4_S4_S6_S9_E15LookupBucketForIS4_EEbRKT_RPKS9_: 469| 146| const BucketT *&FoundBucket) const { 470| 146| const BucketT *BucketsPtr = getBuckets(); 471| 146| const unsigned NumBuckets = getNumBuckets(); 472| | 473| 146| if (NumBuckets == 0) { ------------------ | Branch (473:9): [True: 8, False: 138] ------------------ 474| 8| FoundBucket = nullptr; 475| 8| return false; 476| 8| } 477| | 478| | // FoundTombstone - Keep track of whether we find a tombstone while probing. 479| 138| const BucketT *FoundTombstone = nullptr; 480| 138| const KeyT EmptyKey = getEmptyKey(); 481| 138| const KeyT TombstoneKey = getTombstoneKey(); 482| 138| assert(!KeyInfoT::isEqual(Val, EmptyKey) && ------------------ | Branch (482:5): [True: 138, False: 0] | Branch (482:5): [True: 138, False: 0] | Branch (482:5): [True: 138, Folded] | Branch (482:5): [True: 138, False: 0] ------------------ 483| 138| !KeyInfoT::isEqual(Val, TombstoneKey) && 484| 138| "Empty/Tombstone value shouldn't be inserted into map!"); 485| | 486| 138| unsigned BucketNo = getHashValue(Val) & (NumBuckets-1); 487| 138| unsigned ProbeAmt = 1; 488| 138| while (1) { ------------------ | Branch (488:12): [True: 138, Folded] ------------------ 489| 138| const BucketT *ThisBucket = BucketsPtr + BucketNo; 490| | // Found Val's bucket? If so, return it. 491| 138| if (LLVM_LIKELY(KeyInfoT::isEqual(Val, ThisBucket->getFirst()))) { ------------------ | | 170| 138|#define LLVM_LIKELY(EXPR) __builtin_expect((bool)(EXPR), true) | | ------------------ | | | Branch (170:27): [True: 112, False: 26] | | ------------------ ------------------ 492| 112| FoundBucket = ThisBucket; 493| 112| return true; 494| 112| } 495| | 496| | // If we found an empty bucket, the key doesn't exist in the set. 497| | // Insert it and return the default value. 498| 26| if (LLVM_LIKELY(KeyInfoT::isEqual(ThisBucket->getFirst(), EmptyKey))) { ------------------ | | 170| 26|#define LLVM_LIKELY(EXPR) __builtin_expect((bool)(EXPR), true) | | ------------------ | | | Branch (170:27): [True: 26, False: 0] | | ------------------ ------------------ 499| | // If we've already seen a tombstone while probing, fill it in instead 500| | // of the empty bucket we eventually probed to. 501| 26| FoundBucket = FoundTombstone ? FoundTombstone : ThisBucket; ------------------ | Branch (501:23): [True: 0, False: 26] ------------------ 502| 26| return false; 503| 26| } 504| | 505| | // If this is a tombstone, remember it. If Val ends up not in the map, we 506| | // prefer to return it than something that would require more probing. 507| 0| if (KeyInfoT::isEqual(ThisBucket->getFirst(), TombstoneKey) && ------------------ | Branch (507:11): [True: 0, False: 0] ------------------ 508| 0| !FoundTombstone) ------------------ | Branch (508:11): [True: 0, False: 0] ------------------ 509| 0| FoundTombstone = ThisBucket; // Remember the first tombstone found. 510| | 511| | // Otherwise, it's a hash collision or a tombstone, continue quadratic 512| | // probing. 513| 0| BucketNo += ProbeAmt++; 514| 0| BucketNo &= (NumBuckets-1); 515| 0| } 516| 138| } _ZNK7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_11MCSymbolELFES4_NS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S4_EEEES4_S4_S6_S9_E10getBucketsEv: 375| 146| const BucketT *getBuckets() const { 376| 146| return static_cast(this)->getBuckets(); 377| 146| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_11MCSymbolELFES4_NS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S4_EEEES4_S4_S6_S9_E12getHashValueERKS4_: 336| 138| static unsigned getHashValue(const KeyT &Val) { 337| 138| return KeyInfoT::getHashValue(Val); 338| 138| } _ZNK7llvm_ks6detail12DenseMapPairIPKNS_11MCSymbolELFES4_E8getFirstEv: 41| 164| const KeyT &getFirst() const { return std::pair::first; } _ZN7llvm_ks16DenseMapIteratorIPKNS_11MCSymbolELFES3_NS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S3_EELb0EEC2EPS8_SA_RKNS_14DebugEpochBaseEb: 1006| 138| : DebugEpochBase::HandleBase(&Epoch), Ptr(Pos), End(E) { 1007| 138| assert(isHandleInSync() && "invalid construction!"); ------------------ | Branch (1007:5): [True: 138, False: 0] | Branch (1007:5): [True: 138, Folded] | Branch (1007:5): [True: 138, False: 0] ------------------ 1008| 138| if (!NoAdvance) AdvancePastEmptyBuckets(); ------------------ | Branch (1008:9): [True: 0, False: 138] ------------------ 1009| 138| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_11MCSymbolELFES4_NS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S4_EEEES4_S4_S6_S9_E16InsertIntoBucketEOS4_SC_PS9_: 418| 26| BucketT *InsertIntoBucket(KeyT &&Key, ValueT &&Value, BucketT *TheBucket) { 419| 26| TheBucket = InsertIntoBucketImpl(Key, TheBucket); 420| | 421| 26| TheBucket->getFirst() = std::move(Key); 422| 26| ::new (&TheBucket->getSecond()) ValueT(std::move(Value)); 423| 26| return TheBucket; 424| 26| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_11MCSymbolELFES4_NS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S4_EEEES4_S4_S6_S9_E20InsertIntoBucketImplERKS4_PS9_: 426| 26| BucketT *InsertIntoBucketImpl(const KeyT &Key, BucketT *TheBucket) { 427| 26| incrementEpoch(); 428| | 429| | // If the load of the hash table is more than 3/4, or if fewer than 1/8 of 430| | // the buckets are empty (meaning that many are filled with tombstones), 431| | // grow the table. 432| | // 433| | // The later case is tricky. For example, if we had one empty bucket with 434| | // tons of tombstones, failing lookups (e.g. for insertion) would have to 435| | // probe almost the entire table until it found the empty bucket. If the 436| | // table completely filled with tombstones, no lookup would ever succeed, 437| | // causing infinite loops in lookup. 438| 26| unsigned NewNumEntries = getNumEntries() + 1; 439| 26| unsigned NumBuckets = getNumBuckets(); 440| 26| if (LLVM_UNLIKELY(NewNumEntries * 4 >= NumBuckets * 3)) { ------------------ | | 171| 26|#define LLVM_UNLIKELY(EXPR) __builtin_expect((bool)(EXPR), false) | | ------------------ | | | Branch (171:29): [True: 8, False: 18] | | ------------------ ------------------ 441| 8| this->grow(NumBuckets * 2); 442| 8| LookupBucketFor(Key, TheBucket); 443| 8| NumBuckets = getNumBuckets(); 444| 18| } else if (LLVM_UNLIKELY(NumBuckets-(NewNumEntries+getNumTombstones()) <= ------------------ | | 171| 18|#define LLVM_UNLIKELY(EXPR) __builtin_expect((bool)(EXPR), false) | | ------------------ | | | Branch (171:29): [True: 0, False: 18] | | ------------------ ------------------ 445| 18| NumBuckets/8)) { 446| 0| this->grow(NumBuckets); 447| 0| LookupBucketFor(Key, TheBucket); 448| 0| } 449| 26| assert(TheBucket); ------------------ | Branch (449:5): [True: 26, False: 0] ------------------ 450| | 451| | // Only update the state after we've grown our bucket space appropriately 452| | // so that when growing buckets we have self-consistent entry count. 453| 26| incrementNumEntries(); 454| | 455| | // If we are writing over a tombstone, remember this. 456| 26| const KeyT EmptyKey = getEmptyKey(); 457| 26| if (!KeyInfoT::isEqual(TheBucket->getFirst(), EmptyKey)) ------------------ | Branch (457:9): [True: 0, False: 26] ------------------ 458| 0| decrementNumTombstones(); 459| | 460| 26| return TheBucket; 461| 26| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_11MCSymbolELFES4_NS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S4_EEEES4_S4_S6_S9_E4growEj: 391| 8| void grow(unsigned AtLeast) { 392| 8| static_cast(this)->grow(AtLeast); 393| 8| } _ZN7llvm_ks8DenseMapIPKNS_11MCSymbolELFES3_NS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S3_EEE4growEj: 621| 8| void grow(unsigned AtLeast) { 622| 8| unsigned OldNumBuckets = NumBuckets; 623| 8| BucketT *OldBuckets = Buckets; 624| | 625| 8| allocateBuckets(std::max(64, static_cast(NextPowerOf2(AtLeast-1)))); 626| 8| assert(Buckets); ------------------ | Branch (626:5): [True: 8, False: 0] ------------------ 627| 8| if (!OldBuckets) { ------------------ | Branch (627:9): [True: 8, False: 0] ------------------ 628| 8| this->BaseT::initEmpty(); 629| 8| return; 630| 8| } 631| | 632| 0| this->moveFromOldBuckets(OldBuckets, OldBuckets+OldNumBuckets); 633| | 634| | // Free the old table. 635| 0| operator delete(OldBuckets); 636| 0| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_11MCSymbolELFES4_NS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_S4_EEEES4_S4_S6_S9_E19incrementNumEntriesEv: 357| 26| void incrementNumEntries() { 358| 26| setNumEntries(getNumEntries() + 1); 359| 26| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFENSt3__16vectorINS_18ELFRelocationEntryENS5_9allocatorIS7_EEEENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_SA_EEEES4_SA_SC_SF_EixEOS4_: 245| 652| ValueT &operator[](KeyT &&Key) { 246| 652| return FindAndConstruct(std::move(Key)).second; 247| 652| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFENSt3__16vectorINS_18ELFRelocationEntryENS5_9allocatorIS7_EEEENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_SA_EEEES4_SA_SC_SF_E16FindAndConstructEOS4_: 237| 652| value_type& FindAndConstruct(KeyT &&Key) { 238| 652| BucketT *TheBucket; 239| 652| if (LookupBucketFor(Key, TheBucket)) ------------------ | Branch (239:9): [True: 393, False: 259] ------------------ 240| 393| return *TheBucket; 241| | 242| 259| return *InsertIntoBucket(std::move(Key), ValueT(), TheBucket); 243| 652| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFENSt3__16vectorINS_18ELFRelocationEntryENS5_9allocatorIS7_EEEENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_SA_EEEES4_SA_SC_SF_E15LookupBucketForIS4_EEbRKT_RPSF_: 519| 909| bool LookupBucketFor(const LookupKeyT &Val, BucketT *&FoundBucket) { 520| 909| const BucketT *ConstFoundBucket; 521| 909| bool Result = const_cast(this) 522| 909| ->LookupBucketFor(Val, ConstFoundBucket); 523| 909| FoundBucket = const_cast(ConstFoundBucket); 524| 909| return Result; 525| 909| } _ZNK7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFENSt3__16vectorINS_18ELFRelocationEntryENS5_9allocatorIS7_EEEENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_SA_EEEES4_SA_SC_SF_E15LookupBucketForIS4_EEbRKT_RPKSF_: 469| 909| const BucketT *&FoundBucket) const { 470| 909| const BucketT *BucketsPtr = getBuckets(); 471| 909| const unsigned NumBuckets = getNumBuckets(); 472| | 473| 909| if (NumBuckets == 0) { ------------------ | Branch (473:9): [True: 257, False: 652] ------------------ 474| 257| FoundBucket = nullptr; 475| 257| return false; 476| 257| } 477| | 478| | // FoundTombstone - Keep track of whether we find a tombstone while probing. 479| 652| const BucketT *FoundTombstone = nullptr; 480| 652| const KeyT EmptyKey = getEmptyKey(); 481| 652| const KeyT TombstoneKey = getTombstoneKey(); 482| 652| assert(!KeyInfoT::isEqual(Val, EmptyKey) && ------------------ | Branch (482:5): [True: 652, False: 0] | Branch (482:5): [True: 652, False: 0] | Branch (482:5): [True: 652, Folded] | Branch (482:5): [True: 652, False: 0] ------------------ 483| 652| !KeyInfoT::isEqual(Val, TombstoneKey) && 484| 652| "Empty/Tombstone value shouldn't be inserted into map!"); 485| | 486| 652| unsigned BucketNo = getHashValue(Val) & (NumBuckets-1); 487| 652| unsigned ProbeAmt = 1; 488| 652| while (1) { ------------------ | Branch (488:12): [True: 652, Folded] ------------------ 489| 652| const BucketT *ThisBucket = BucketsPtr + BucketNo; 490| | // Found Val's bucket? If so, return it. 491| 652| if (LLVM_LIKELY(KeyInfoT::isEqual(Val, ThisBucket->getFirst()))) { ------------------ | | 170| 652|#define LLVM_LIKELY(EXPR) __builtin_expect((bool)(EXPR), true) | | ------------------ | | | Branch (170:27): [True: 393, False: 259] | | ------------------ ------------------ 492| 393| FoundBucket = ThisBucket; 493| 393| return true; 494| 393| } 495| | 496| | // If we found an empty bucket, the key doesn't exist in the set. 497| | // Insert it and return the default value. 498| 259| if (LLVM_LIKELY(KeyInfoT::isEqual(ThisBucket->getFirst(), EmptyKey))) { ------------------ | | 170| 259|#define LLVM_LIKELY(EXPR) __builtin_expect((bool)(EXPR), true) | | ------------------ | | | Branch (170:27): [True: 259, False: 0] | | ------------------ ------------------ 499| | // If we've already seen a tombstone while probing, fill it in instead 500| | // of the empty bucket we eventually probed to. 501| 259| FoundBucket = FoundTombstone ? FoundTombstone : ThisBucket; ------------------ | Branch (501:23): [True: 0, False: 259] ------------------ 502| 259| return false; 503| 259| } 504| | 505| | // If this is a tombstone, remember it. If Val ends up not in the map, we 506| | // prefer to return it than something that would require more probing. 507| 0| if (KeyInfoT::isEqual(ThisBucket->getFirst(), TombstoneKey) && ------------------ | Branch (507:11): [True: 0, False: 0] ------------------ 508| 0| !FoundTombstone) ------------------ | Branch (508:11): [True: 0, False: 0] ------------------ 509| 0| FoundTombstone = ThisBucket; // Remember the first tombstone found. 510| | 511| | // Otherwise, it's a hash collision or a tombstone, continue quadratic 512| | // probing. 513| 0| BucketNo += ProbeAmt++; 514| 0| BucketNo &= (NumBuckets-1); 515| 0| } 516| 652| } _ZNK7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFENSt3__16vectorINS_18ELFRelocationEntryENS5_9allocatorIS7_EEEENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_SA_EEEES4_SA_SC_SF_E10getBucketsEv: 375| 909| const BucketT *getBuckets() const { 376| 909| return static_cast(this)->getBuckets(); 377| 909| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFENSt3__16vectorINS_18ELFRelocationEntryENS5_9allocatorIS7_EEEENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_SA_EEEES4_SA_SC_SF_E12getHashValueERKS4_: 336| 652| static unsigned getHashValue(const KeyT &Val) { 337| 652| return KeyInfoT::getHashValue(Val); 338| 652| } _ZNK7llvm_ks6detail12DenseMapPairIPKNS_12MCSectionELFENSt3__16vectorINS_18ELFRelocationEntryENS5_9allocatorIS7_EEEEE8getFirstEv: 41| 911| const KeyT &getFirst() const { return std::pair::first; } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFENSt3__16vectorINS_18ELFRelocationEntryENS5_9allocatorIS7_EEEENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_SA_EEEES4_SA_SC_SF_E16InsertIntoBucketEOS4_OSA_PSF_: 418| 259| BucketT *InsertIntoBucket(KeyT &&Key, ValueT &&Value, BucketT *TheBucket) { 419| 259| TheBucket = InsertIntoBucketImpl(Key, TheBucket); 420| | 421| 259| TheBucket->getFirst() = std::move(Key); 422| 259| ::new (&TheBucket->getSecond()) ValueT(std::move(Value)); 423| 259| return TheBucket; 424| 259| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFENSt3__16vectorINS_18ELFRelocationEntryENS5_9allocatorIS7_EEEENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_SA_EEEES4_SA_SC_SF_E20InsertIntoBucketImplERKS4_PSF_: 426| 259| BucketT *InsertIntoBucketImpl(const KeyT &Key, BucketT *TheBucket) { 427| 259| incrementEpoch(); 428| | 429| | // If the load of the hash table is more than 3/4, or if fewer than 1/8 of 430| | // the buckets are empty (meaning that many are filled with tombstones), 431| | // grow the table. 432| | // 433| | // The later case is tricky. For example, if we had one empty bucket with 434| | // tons of tombstones, failing lookups (e.g. for insertion) would have to 435| | // probe almost the entire table until it found the empty bucket. If the 436| | // table completely filled with tombstones, no lookup would ever succeed, 437| | // causing infinite loops in lookup. 438| 259| unsigned NewNumEntries = getNumEntries() + 1; 439| 259| unsigned NumBuckets = getNumBuckets(); 440| 259| if (LLVM_UNLIKELY(NewNumEntries * 4 >= NumBuckets * 3)) { ------------------ | | 171| 259|#define LLVM_UNLIKELY(EXPR) __builtin_expect((bool)(EXPR), false) | | ------------------ | | | Branch (171:29): [True: 257, False: 2] | | ------------------ ------------------ 441| 257| this->grow(NumBuckets * 2); 442| 257| LookupBucketFor(Key, TheBucket); 443| 257| NumBuckets = getNumBuckets(); 444| 257| } else if (LLVM_UNLIKELY(NumBuckets-(NewNumEntries+getNumTombstones()) <= ------------------ | | 171| 2|#define LLVM_UNLIKELY(EXPR) __builtin_expect((bool)(EXPR), false) | | ------------------ | | | Branch (171:29): [True: 0, False: 2] | | ------------------ ------------------ 445| 2| NumBuckets/8)) { 446| 0| this->grow(NumBuckets); 447| 0| LookupBucketFor(Key, TheBucket); 448| 0| } 449| 259| assert(TheBucket); ------------------ | Branch (449:5): [True: 259, False: 0] ------------------ 450| | 451| | // Only update the state after we've grown our bucket space appropriately 452| | // so that when growing buckets we have self-consistent entry count. 453| 259| incrementNumEntries(); 454| | 455| | // If we are writing over a tombstone, remember this. 456| 259| const KeyT EmptyKey = getEmptyKey(); 457| 259| if (!KeyInfoT::isEqual(TheBucket->getFirst(), EmptyKey)) ------------------ | Branch (457:9): [True: 0, False: 259] ------------------ 458| 0| decrementNumTombstones(); 459| | 460| 259| return TheBucket; 461| 259| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFENSt3__16vectorINS_18ELFRelocationEntryENS5_9allocatorIS7_EEEENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_SA_EEEES4_SA_SC_SF_E4growEj: 391| 257| void grow(unsigned AtLeast) { 392| 257| static_cast(this)->grow(AtLeast); 393| 257| } _ZN7llvm_ks8DenseMapIPKNS_12MCSectionELFENSt3__16vectorINS_18ELFRelocationEntryENS4_9allocatorIS6_EEEENS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_S9_EEE4growEj: 621| 257| void grow(unsigned AtLeast) { 622| 257| unsigned OldNumBuckets = NumBuckets; 623| 257| BucketT *OldBuckets = Buckets; 624| | 625| 257| allocateBuckets(std::max(64, static_cast(NextPowerOf2(AtLeast-1)))); 626| 257| assert(Buckets); ------------------ | Branch (626:5): [True: 257, False: 0] ------------------ 627| 257| if (!OldBuckets) { ------------------ | Branch (627:9): [True: 257, False: 0] ------------------ 628| 257| this->BaseT::initEmpty(); 629| 257| return; 630| 257| } 631| | 632| 0| this->moveFromOldBuckets(OldBuckets, OldBuckets+OldNumBuckets); 633| | 634| | // Free the old table. 635| 0| operator delete(OldBuckets); 636| 0| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFENSt3__16vectorINS_18ELFRelocationEntryENS5_9allocatorIS7_EEEENS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_SA_EEEES4_SA_SC_SF_E19incrementNumEntriesEv: 357| 259| void incrementNumEntries() { 358| 259| setNumEntries(getNumEntries() + 1); 359| 259| } _ZN7llvm_ks8DenseMapIPKNS_12MCSectionELFEjNS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_jEEEC2Ej: 553| 262| explicit DenseMap(unsigned NumInitBuckets = 0) { 554| 262| init(NumInitBuckets); 555| 262| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEjNS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_jEEEES4_jS6_S9_EC2Ev: 262| 262| DenseMapBase() = default; _ZN7llvm_ks8DenseMapIPKNS_12MCSectionELFEjNS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_jEEE4initEj: 612| 262| void init(unsigned InitBuckets) { 613| 262| if (allocateBuckets(InitBuckets)) { ------------------ | Branch (613:9): [True: 0, False: 262] ------------------ 614| 0| this->BaseT::initEmpty(); 615| 262| } else { 616| 262| NumEntries = 0; 617| 262| NumTombstones = 0; 618| 262| } 619| 262| } _ZN7llvm_ks8DenseMapIPKNS_12MCSectionELFEjNS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_jEEE15allocateBucketsEj: 678| 513| bool allocateBuckets(unsigned Num) { 679| 513| NumBuckets = Num; 680| 513| if (NumBuckets == 0) { ------------------ | Branch (680:9): [True: 262, False: 251] ------------------ 681| 262| Buckets = nullptr; 682| 262| return false; 683| 262| } 684| | 685| 251| Buckets = static_cast(operator new(sizeof(BucketT) * NumBuckets)); 686| 251| return true; 687| 513| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEjNS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_jEEEES4_jS6_S9_E9initEmptyEv: 277| 251| void initEmpty() { 278| 251| setNumEntries(0); 279| 251| setNumTombstones(0); 280| | 281| 251| assert((getNumBuckets() & (getNumBuckets()-1)) == 0 && ------------------ | Branch (281:5): [True: 251, False: 0] | Branch (281:5): [True: 251, Folded] | Branch (281:5): [True: 251, False: 0] ------------------ 282| 251| "# initial buckets must be a power of two!"); 283| 251| const KeyT EmptyKey = getEmptyKey(); 284| 16.3k| for (BucketT *B = getBuckets(), *E = getBucketsEnd(); B != E; ++B) ------------------ | Branch (284:59): [True: 16.0k, False: 251] ------------------ 285| 16.0k| ::new (&B->getFirst()) KeyT(EmptyKey); 286| 251| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEjNS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_jEEEES4_jS6_S9_E13setNumEntriesEj: 354| 506| void setNumEntries(unsigned Num) { 355| 506| static_cast(this)->setNumEntries(Num); 356| 506| } _ZN7llvm_ks8DenseMapIPKNS_12MCSectionELFEjNS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_jEEE13setNumEntriesEj: 659| 506| void setNumEntries(unsigned Num) { 660| 506| NumEntries = Num; 661| 506| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEjNS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_jEEEES4_jS6_S9_E16setNumTombstonesEj: 366| 251| void setNumTombstones(unsigned Num) { 367| 251| static_cast(this)->setNumTombstones(Num); 368| 251| } _ZN7llvm_ks8DenseMapIPKNS_12MCSectionELFEjNS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_jEEE16setNumTombstonesEj: 666| 251| void setNumTombstones(unsigned Num) { 667| 251| NumTombstones = Num; 668| 251| } _ZNK7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEjNS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_jEEEES4_jS6_S9_E13getNumBucketsEv: 381| 2.27k| unsigned getNumBuckets() const { 382| 2.27k| return static_cast(this)->getNumBuckets(); 383| 2.27k| } _ZNK7llvm_ks8DenseMapIPKNS_12MCSectionELFEjNS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_jEEE13getNumBucketsEv: 674| 2.27k| unsigned getNumBuckets() const { 675| 2.27k| return NumBuckets; 676| 2.27k| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEjNS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_jEEEES4_jS6_S9_E11getEmptyKeyEv: 343| 1.01k| static const KeyT getEmptyKey() { 344| 1.01k| return KeyInfoT::getEmptyKey(); 345| 1.01k| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEjNS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_jEEEES4_jS6_S9_E10getBucketsEv: 378| 1.00k| BucketT *getBuckets() { 379| 1.00k| return static_cast(this)->getBuckets(); 380| 1.00k| } _ZNK7llvm_ks8DenseMapIPKNS_12MCSectionELFEjNS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_jEEE10getBucketsEv: 670| 1.51k| BucketT *getBuckets() const { 671| 1.51k| return Buckets; 672| 1.51k| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEjNS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_jEEEES4_jS6_S9_E13getBucketsEndEv: 384| 502| BucketT *getBucketsEnd() { 385| 502| return getBuckets() + getNumBuckets(); 386| 502| } _ZN7llvm_ks6detail12DenseMapPairIPKNS_12MCSectionELFEjE8getFirstEv: 40| 48.9k| KeyT &getFirst() { return std::pair::first; } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEjNS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_jEEEES4_jS6_S9_EixEOS4_: 245| 253| ValueT &operator[](KeyT &&Key) { 246| 253| return FindAndConstruct(std::move(Key)).second; 247| 253| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEjNS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_jEEEES4_jS6_S9_E16FindAndConstructEOS4_: 237| 253| value_type& FindAndConstruct(KeyT &&Key) { 238| 253| BucketT *TheBucket; 239| 253| if (LookupBucketFor(Key, TheBucket)) ------------------ | Branch (239:9): [True: 0, False: 253] ------------------ 240| 0| return *TheBucket; 241| | 242| 253| return *InsertIntoBucket(std::move(Key), ValueT(), TheBucket); 243| 253| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEjNS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_jEEEES4_jS6_S9_E15LookupBucketForIS4_EEbRKT_RPS9_: 519| 506| bool LookupBucketFor(const LookupKeyT &Val, BucketT *&FoundBucket) { 520| 506| const BucketT *ConstFoundBucket; 521| 506| bool Result = const_cast(this) 522| 506| ->LookupBucketFor(Val, ConstFoundBucket); 523| 506| FoundBucket = const_cast(ConstFoundBucket); 524| 506| return Result; 525| 506| } _ZNK7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEjNS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_jEEEES4_jS6_S9_E15LookupBucketForIS4_EEbRKT_RPKS9_: 469| 506| const BucketT *&FoundBucket) const { 470| 506| const BucketT *BucketsPtr = getBuckets(); 471| 506| const unsigned NumBuckets = getNumBuckets(); 472| | 473| 506| if (NumBuckets == 0) { ------------------ | Branch (473:9): [True: 251, False: 255] ------------------ 474| 251| FoundBucket = nullptr; 475| 251| return false; 476| 251| } 477| | 478| | // FoundTombstone - Keep track of whether we find a tombstone while probing. 479| 255| const BucketT *FoundTombstone = nullptr; 480| 255| const KeyT EmptyKey = getEmptyKey(); 481| 255| const KeyT TombstoneKey = getTombstoneKey(); 482| 255| assert(!KeyInfoT::isEqual(Val, EmptyKey) && ------------------ | Branch (482:5): [True: 255, False: 0] | Branch (482:5): [True: 255, False: 0] | Branch (482:5): [True: 255, Folded] | Branch (482:5): [True: 255, False: 0] ------------------ 483| 255| !KeyInfoT::isEqual(Val, TombstoneKey) && 484| 255| "Empty/Tombstone value shouldn't be inserted into map!"); 485| | 486| 255| unsigned BucketNo = getHashValue(Val) & (NumBuckets-1); 487| 255| unsigned ProbeAmt = 1; 488| 255| while (1) { ------------------ | Branch (488:12): [True: 255, Folded] ------------------ 489| 255| const BucketT *ThisBucket = BucketsPtr + BucketNo; 490| | // Found Val's bucket? If so, return it. 491| 255| if (LLVM_LIKELY(KeyInfoT::isEqual(Val, ThisBucket->getFirst()))) { ------------------ | | 170| 255|#define LLVM_LIKELY(EXPR) __builtin_expect((bool)(EXPR), true) | | ------------------ | | | Branch (170:27): [True: 0, False: 255] | | ------------------ ------------------ 492| 0| FoundBucket = ThisBucket; 493| 0| return true; 494| 0| } 495| | 496| | // If we found an empty bucket, the key doesn't exist in the set. 497| | // Insert it and return the default value. 498| 255| if (LLVM_LIKELY(KeyInfoT::isEqual(ThisBucket->getFirst(), EmptyKey))) { ------------------ | | 170| 255|#define LLVM_LIKELY(EXPR) __builtin_expect((bool)(EXPR), true) | | ------------------ | | | Branch (170:27): [True: 255, False: 0] | | ------------------ ------------------ 499| | // If we've already seen a tombstone while probing, fill it in instead 500| | // of the empty bucket we eventually probed to. 501| 255| FoundBucket = FoundTombstone ? FoundTombstone : ThisBucket; ------------------ | Branch (501:23): [True: 0, False: 255] ------------------ 502| 255| return false; 503| 255| } 504| | 505| | // If this is a tombstone, remember it. If Val ends up not in the map, we 506| | // prefer to return it than something that would require more probing. 507| 0| if (KeyInfoT::isEqual(ThisBucket->getFirst(), TombstoneKey) && ------------------ | Branch (507:11): [True: 0, False: 0] ------------------ 508| 0| !FoundTombstone) ------------------ | Branch (508:11): [True: 0, False: 0] ------------------ 509| 0| FoundTombstone = ThisBucket; // Remember the first tombstone found. 510| | 511| | // Otherwise, it's a hash collision or a tombstone, continue quadratic 512| | // probing. 513| 0| BucketNo += ProbeAmt++; 514| 0| BucketNo &= (NumBuckets-1); 515| 0| } 516| 255| } _ZNK7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEjNS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_jEEEES4_jS6_S9_E10getBucketsEv: 375| 506| const BucketT *getBuckets() const { 376| 506| return static_cast(this)->getBuckets(); 377| 506| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEjNS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_jEEEES4_jS6_S9_E15getTombstoneKeyEv: 346| 506| static const KeyT getTombstoneKey() { 347| 506| return KeyInfoT::getTombstoneKey(); 348| 506| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEjNS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_jEEEES4_jS6_S9_E12getHashValueERKS4_: 336| 255| static unsigned getHashValue(const KeyT &Val) { 337| 255| return KeyInfoT::getHashValue(Val); 338| 255| } _ZNK7llvm_ks6detail12DenseMapPairIPKNS_12MCSectionELFEjE8getFirstEv: 41| 510| const KeyT &getFirst() const { return std::pair::first; } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEjNS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_jEEEES4_jS6_S9_E16InsertIntoBucketEOS4_OjPS9_: 418| 253| BucketT *InsertIntoBucket(KeyT &&Key, ValueT &&Value, BucketT *TheBucket) { 419| 253| TheBucket = InsertIntoBucketImpl(Key, TheBucket); 420| | 421| 253| TheBucket->getFirst() = std::move(Key); 422| 253| ::new (&TheBucket->getSecond()) ValueT(std::move(Value)); 423| 253| return TheBucket; 424| 253| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEjNS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_jEEEES4_jS6_S9_E20InsertIntoBucketImplERKS4_PS9_: 426| 255| BucketT *InsertIntoBucketImpl(const KeyT &Key, BucketT *TheBucket) { 427| 255| incrementEpoch(); 428| | 429| | // If the load of the hash table is more than 3/4, or if fewer than 1/8 of 430| | // the buckets are empty (meaning that many are filled with tombstones), 431| | // grow the table. 432| | // 433| | // The later case is tricky. For example, if we had one empty bucket with 434| | // tons of tombstones, failing lookups (e.g. for insertion) would have to 435| | // probe almost the entire table until it found the empty bucket. If the 436| | // table completely filled with tombstones, no lookup would ever succeed, 437| | // causing infinite loops in lookup. 438| 255| unsigned NewNumEntries = getNumEntries() + 1; 439| 255| unsigned NumBuckets = getNumBuckets(); 440| 255| if (LLVM_UNLIKELY(NewNumEntries * 4 >= NumBuckets * 3)) { ------------------ | | 171| 255|#define LLVM_UNLIKELY(EXPR) __builtin_expect((bool)(EXPR), false) | | ------------------ | | | Branch (171:29): [True: 251, False: 4] | | ------------------ ------------------ 441| 251| this->grow(NumBuckets * 2); 442| 251| LookupBucketFor(Key, TheBucket); 443| 251| NumBuckets = getNumBuckets(); 444| 251| } else if (LLVM_UNLIKELY(NumBuckets-(NewNumEntries+getNumTombstones()) <= ------------------ | | 171| 4|#define LLVM_UNLIKELY(EXPR) __builtin_expect((bool)(EXPR), false) | | ------------------ | | | Branch (171:29): [True: 0, False: 4] | | ------------------ ------------------ 445| 4| NumBuckets/8)) { 446| 0| this->grow(NumBuckets); 447| 0| LookupBucketFor(Key, TheBucket); 448| 0| } 449| 255| assert(TheBucket); ------------------ | Branch (449:5): [True: 255, False: 0] ------------------ 450| | 451| | // Only update the state after we've grown our bucket space appropriately 452| | // so that when growing buckets we have self-consistent entry count. 453| 255| incrementNumEntries(); 454| | 455| | // If we are writing over a tombstone, remember this. 456| 255| const KeyT EmptyKey = getEmptyKey(); 457| 255| if (!KeyInfoT::isEqual(TheBucket->getFirst(), EmptyKey)) ------------------ | Branch (457:9): [True: 0, False: 255] ------------------ 458| 0| decrementNumTombstones(); 459| | 460| 255| return TheBucket; 461| 255| } _ZNK7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEjNS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_jEEEES4_jS6_S9_E13getNumEntriesEv: 351| 510| unsigned getNumEntries() const { 352| 510| return static_cast(this)->getNumEntries(); 353| 510| } _ZNK7llvm_ks8DenseMapIPKNS_12MCSectionELFEjNS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_jEEE13getNumEntriesEv: 656| 510| unsigned getNumEntries() const { 657| 510| return NumEntries; 658| 510| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEjNS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_jEEEES4_jS6_S9_E4growEj: 391| 251| void grow(unsigned AtLeast) { 392| 251| static_cast(this)->grow(AtLeast); 393| 251| } _ZN7llvm_ks8DenseMapIPKNS_12MCSectionELFEjNS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_jEEE4growEj: 621| 251| void grow(unsigned AtLeast) { 622| 251| unsigned OldNumBuckets = NumBuckets; 623| 251| BucketT *OldBuckets = Buckets; 624| | 625| 251| allocateBuckets(std::max(64, static_cast(NextPowerOf2(AtLeast-1)))); 626| 251| assert(Buckets); ------------------ | Branch (626:5): [True: 251, False: 0] ------------------ 627| 251| if (!OldBuckets) { ------------------ | Branch (627:9): [True: 251, False: 0] ------------------ 628| 251| this->BaseT::initEmpty(); 629| 251| return; 630| 251| } 631| | 632| 0| this->moveFromOldBuckets(OldBuckets, OldBuckets+OldNumBuckets); 633| | 634| | // Free the old table. 635| 0| operator delete(OldBuckets); 636| 0| } _ZNK7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEjNS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_jEEEES4_jS6_S9_E16getNumTombstonesEv: 363| 4| unsigned getNumTombstones() const { 364| 4| return static_cast(this)->getNumTombstones(); 365| 4| } _ZNK7llvm_ks8DenseMapIPKNS_12MCSectionELFEjNS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_jEEE16getNumTombstonesEv: 663| 4| unsigned getNumTombstones() const { 664| 4| return NumTombstones; 665| 4| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEjNS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_jEEEES4_jS6_S9_E19incrementNumEntriesEv: 357| 255| void incrementNumEntries() { 358| 255| setNumEntries(getNumEntries() + 1); 359| 255| } _ZN7llvm_ks6detail12DenseMapPairIPKNS_12MCSectionELFEjE9getSecondEv: 42| 510| ValueT &getSecond() { return std::pair::second; } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEjNS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_jEEEES4_jS6_S9_EixERKS4_: 233| 2| ValueT &operator[](const KeyT &Key) { 234| 2| return FindAndConstruct(Key).second; 235| 2| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEjNS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_jEEEES4_jS6_S9_E16FindAndConstructERKS4_: 225| 2| value_type& FindAndConstruct(const KeyT &Key) { 226| 2| BucketT *TheBucket; 227| 2| if (LookupBucketFor(Key, TheBucket)) ------------------ | Branch (227:9): [True: 0, False: 2] ------------------ 228| 0| return *TheBucket; 229| | 230| 2| return *InsertIntoBucket(Key, ValueT(), TheBucket); 231| 2| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEjNS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_jEEEES4_jS6_S9_E16InsertIntoBucketERKS4_OjPS9_: 410| 2| BucketT *TheBucket) { 411| 2| TheBucket = InsertIntoBucketImpl(Key, TheBucket); 412| | 413| 2| TheBucket->getFirst() = Key; 414| 2| ::new (&TheBucket->getSecond()) ValueT(std::move(Value)); 415| 2| return TheBucket; 416| 2| } _ZN7llvm_ks8DenseMapIPKNS_12MCSectionELFEjNS_12DenseMapInfoIS3_EENS_6detail12DenseMapPairIS3_jEEED2Ev: 573| 262| ~DenseMap() { 574| 262| this->destroyAll(); 575| 262| operator delete(Buckets); 576| 262| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapIPKNS_12MCSectionELFEjNS_12DenseMapInfoIS4_EENS_6detail12DenseMapPairIS4_jEEEES4_jS6_S9_E10destroyAllEv: 264| 262| void destroyAll() { 265| 262| if (getNumBuckets() == 0) // Nothing to do. ------------------ | Branch (265:9): [True: 11, False: 251] ------------------ 266| 11| return; 267| | 268| 251| const KeyT EmptyKey = getEmptyKey(), TombstoneKey = getTombstoneKey(); 269| 16.3k| for (BucketT *P = getBuckets(), *E = getBucketsEnd(); P != E; ++P) { ------------------ | Branch (269:59): [True: 16.0k, False: 251] ------------------ 270| 16.0k| if (!KeyInfoT::isEqual(P->getFirst(), EmptyKey) && ------------------ | Branch (270:11): [True: 255, False: 15.8k] ------------------ 271| 255| !KeyInfoT::isEqual(P->getFirst(), TombstoneKey)) ------------------ | Branch (271:11): [True: 255, False: 0] ------------------ 272| 255| P->getSecond().~ValueT(); 273| 16.0k| P->getFirst().~KeyT(); 274| 16.0k| } 275| 251| } _ZN7llvm_ks8DenseMapINS_9StringRefEmNS_12DenseMapInfoIS1_EENS_6detail12DenseMapPairIS1_mEEEC2Ej: 553| 749| explicit DenseMap(unsigned NumInitBuckets = 0) { 554| 749| init(NumInitBuckets); 555| 749| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapINS_9StringRefEmNS_12DenseMapInfoIS2_EENS_6detail12DenseMapPairIS2_mEEEES2_mS4_S7_EC2Ev: 262| 749| DenseMapBase() = default; _ZN7llvm_ks8DenseMapINS_9StringRefEmNS_12DenseMapInfoIS1_EENS_6detail12DenseMapPairIS1_mEEE4initEj: 612| 749| void init(unsigned InitBuckets) { 613| 749| if (allocateBuckets(InitBuckets)) { ------------------ | Branch (613:9): [True: 0, False: 749] ------------------ 614| 0| this->BaseT::initEmpty(); 615| 749| } else { 616| 749| NumEntries = 0; 617| 749| NumTombstones = 0; 618| 749| } 619| 749| } _ZN7llvm_ks8DenseMapINS_9StringRefEmNS_12DenseMapInfoIS1_EENS_6detail12DenseMapPairIS1_mEEE15allocateBucketsEj: 678| 1.01k| bool allocateBuckets(unsigned Num) { 679| 1.01k| NumBuckets = Num; 680| 1.01k| if (NumBuckets == 0) { ------------------ | Branch (680:9): [True: 749, False: 262] ------------------ 681| 749| Buckets = nullptr; 682| 749| return false; 683| 749| } 684| | 685| 262| Buckets = static_cast(operator new(sizeof(BucketT) * NumBuckets)); 686| 262| return true; 687| 1.01k| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapINS_9StringRefEmNS_12DenseMapInfoIS2_EENS_6detail12DenseMapPairIS2_mEEEES2_mS4_S7_E9initEmptyEv: 277| 262| void initEmpty() { 278| 262| setNumEntries(0); 279| 262| setNumTombstones(0); 280| | 281| 262| assert((getNumBuckets() & (getNumBuckets()-1)) == 0 && ------------------ | Branch (281:5): [True: 262, False: 0] | Branch (281:5): [True: 262, Folded] | Branch (281:5): [True: 262, False: 0] ------------------ 282| 262| "# initial buckets must be a power of two!"); 283| 262| const KeyT EmptyKey = getEmptyKey(); 284| 17.0k| for (BucketT *B = getBuckets(), *E = getBucketsEnd(); B != E; ++B) ------------------ | Branch (284:59): [True: 16.7k, False: 262] ------------------ 285| 16.7k| ::new (&B->getFirst()) KeyT(EmptyKey); 286| 262| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapINS_9StringRefEmNS_12DenseMapInfoIS2_EENS_6detail12DenseMapPairIS2_mEEEES2_mS4_S7_E13setNumEntriesEj: 354| 779| void setNumEntries(unsigned Num) { 355| 779| static_cast(this)->setNumEntries(Num); 356| 779| } _ZN7llvm_ks8DenseMapINS_9StringRefEmNS_12DenseMapInfoIS1_EENS_6detail12DenseMapPairIS1_mEEE13setNumEntriesEj: 659| 779| void setNumEntries(unsigned Num) { 660| 779| NumEntries = Num; 661| 779| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapINS_9StringRefEmNS_12DenseMapInfoIS2_EENS_6detail12DenseMapPairIS2_mEEEES2_mS4_S7_E16setNumTombstonesEj: 366| 262| void setNumTombstones(unsigned Num) { 367| 262| static_cast(this)->setNumTombstones(Num); 368| 262| } _ZN7llvm_ks8DenseMapINS_9StringRefEmNS_12DenseMapInfoIS1_EENS_6detail12DenseMapPairIS1_mEEE16setNumTombstonesEj: 666| 262| void setNumTombstones(unsigned Num) { 667| 262| NumTombstones = Num; 668| 262| } _ZNK7llvm_ks12DenseMapBaseINS_8DenseMapINS_9StringRefEmNS_12DenseMapInfoIS2_EENS_6detail12DenseMapPairIS2_mEEEES2_mS4_S7_E13getNumEntriesEv: 351| 1.03k| unsigned getNumEntries() const { 352| 1.03k| return static_cast(this)->getNumEntries(); 353| 1.03k| } _ZNK7llvm_ks8DenseMapINS_9StringRefEmNS_12DenseMapInfoIS1_EENS_6detail12DenseMapPairIS1_mEEE13getNumEntriesEv: 656| 1.03k| unsigned getNumEntries() const { 657| 1.03k| return NumEntries; 658| 1.03k| } _ZN7llvm_ks16DenseMapIteratorINS_9StringRefEmNS_12DenseMapInfoIS1_EENS_6detail12DenseMapPairIS1_mEELb0EEC2EPS6_S8_RKNS_14DebugEpochBaseEb: 1006| 517| : DebugEpochBase::HandleBase(&Epoch), Ptr(Pos), End(E) { 1007| 517| assert(isHandleInSync() && "invalid construction!"); ------------------ | Branch (1007:5): [True: 517, False: 0] | Branch (1007:5): [True: 517, Folded] | Branch (1007:5): [True: 517, False: 0] ------------------ 1008| 517| if (!NoAdvance) AdvancePastEmptyBuckets(); ------------------ | Branch (1008:9): [True: 0, False: 517] ------------------ 1009| 517| } _ZNK7llvm_ks12DenseMapBaseINS_8DenseMapINS_9StringRefEmNS_12DenseMapInfoIS2_EENS_6detail12DenseMapPairIS2_mEEEES2_mS4_S7_E16getNumTombstonesEv: 363| 255| unsigned getNumTombstones() const { 364| 255| return static_cast(this)->getNumTombstones(); 365| 255| } _ZNK7llvm_ks8DenseMapINS_9StringRefEmNS_12DenseMapInfoIS1_EENS_6detail12DenseMapPairIS1_mEEE16getNumTombstonesEv: 663| 255| unsigned getNumTombstones() const { 664| 255| return NumTombstones; 665| 255| } _ZNK7llvm_ks12DenseMapBaseINS_8DenseMapINS_9StringRefEmNS_12DenseMapInfoIS2_EENS_6detail12DenseMapPairIS2_mEEEES2_mS4_S7_E15LookupBucketForIS2_EEbRKT_RPKS7_: 469| 779| const BucketT *&FoundBucket) const { 470| 779| const BucketT *BucketsPtr = getBuckets(); 471| 779| const unsigned NumBuckets = getNumBuckets(); 472| | 473| 779| if (NumBuckets == 0) { ------------------ | Branch (473:9): [True: 262, False: 517] ------------------ 474| 262| FoundBucket = nullptr; 475| 262| return false; 476| 262| } 477| | 478| | // FoundTombstone - Keep track of whether we find a tombstone while probing. 479| 517| const BucketT *FoundTombstone = nullptr; 480| 517| const KeyT EmptyKey = getEmptyKey(); 481| 517| const KeyT TombstoneKey = getTombstoneKey(); 482| 517| assert(!KeyInfoT::isEqual(Val, EmptyKey) && ------------------ | Branch (482:5): [True: 517, False: 0] | Branch (482:5): [True: 517, False: 0] | Branch (482:5): [True: 517, Folded] | Branch (482:5): [True: 517, False: 0] ------------------ 483| 517| !KeyInfoT::isEqual(Val, TombstoneKey) && 484| 517| "Empty/Tombstone value shouldn't be inserted into map!"); 485| | 486| 517| unsigned BucketNo = getHashValue(Val) & (NumBuckets-1); 487| 517| unsigned ProbeAmt = 1; 488| 519| while (1) { ------------------ | Branch (488:12): [True: 519, Folded] ------------------ 489| 519| const BucketT *ThisBucket = BucketsPtr + BucketNo; 490| | // Found Val's bucket? If so, return it. 491| 519| if (LLVM_LIKELY(KeyInfoT::isEqual(Val, ThisBucket->getFirst()))) { ------------------ | | 170| 519|#define LLVM_LIKELY(EXPR) __builtin_expect((bool)(EXPR), true) | | ------------------ | | | Branch (170:27): [True: 0, False: 519] | | ------------------ ------------------ 492| 0| FoundBucket = ThisBucket; 493| 0| return true; 494| 0| } 495| | 496| | // If we found an empty bucket, the key doesn't exist in the set. 497| | // Insert it and return the default value. 498| 519| if (LLVM_LIKELY(KeyInfoT::isEqual(ThisBucket->getFirst(), EmptyKey))) { ------------------ | | 170| 519|#define LLVM_LIKELY(EXPR) __builtin_expect((bool)(EXPR), true) | | ------------------ | | | Branch (170:27): [True: 517, False: 2] | | ------------------ ------------------ 499| | // If we've already seen a tombstone while probing, fill it in instead 500| | // of the empty bucket we eventually probed to. 501| 517| FoundBucket = FoundTombstone ? FoundTombstone : ThisBucket; ------------------ | Branch (501:23): [True: 0, False: 517] ------------------ 502| 517| return false; 503| 517| } 504| | 505| | // If this is a tombstone, remember it. If Val ends up not in the map, we 506| | // prefer to return it than something that would require more probing. 507| 2| if (KeyInfoT::isEqual(ThisBucket->getFirst(), TombstoneKey) && ------------------ | Branch (507:11): [True: 0, False: 2] ------------------ 508| 0| !FoundTombstone) ------------------ | Branch (508:11): [True: 0, False: 0] ------------------ 509| 0| FoundTombstone = ThisBucket; // Remember the first tombstone found. 510| | 511| | // Otherwise, it's a hash collision or a tombstone, continue quadratic 512| | // probing. 513| 2| BucketNo += ProbeAmt++; 514| 2| BucketNo &= (NumBuckets-1); 515| 2| } 516| 517| } _ZNK7llvm_ks12DenseMapBaseINS_8DenseMapINS_9StringRefEmNS_12DenseMapInfoIS2_EENS_6detail12DenseMapPairIS2_mEEEES2_mS4_S7_E10getBucketsEv: 375| 779| const BucketT *getBuckets() const { 376| 779| return static_cast(this)->getBuckets(); 377| 779| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapINS_9StringRefEmNS_12DenseMapInfoIS2_EENS_6detail12DenseMapPairIS2_mEEEES2_mS4_S7_E12getHashValueERKS2_: 336| 517| static unsigned getHashValue(const KeyT &Val) { 337| 517| return KeyInfoT::getHashValue(Val); 338| 517| } _ZNK7llvm_ks6detail12DenseMapPairINS_9StringRefEmE8getFirstEv: 41| 1.04k| const KeyT &getFirst() const { return std::pair::first; } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapINS_9StringRefEmNS_12DenseMapInfoIS2_EENS_6detail12DenseMapPairIS2_mEEEES2_mS4_S7_E6insertEONSt3__14pairIS2_mEE: 184| 517| std::pair insert(std::pair &&KV) { 185| 517| BucketT *TheBucket; 186| 517| if (LookupBucketFor(KV.first, TheBucket)) ------------------ | Branch (186:9): [True: 0, False: 517] ------------------ 187| 0| return std::make_pair(iterator(TheBucket, getBucketsEnd(), *this, true), 188| 0| false); // Already in map. 189| | 190| | // Otherwise, insert the new element. 191| 517| TheBucket = InsertIntoBucket(std::move(KV.first), 192| 517| std::move(KV.second), 193| 517| TheBucket); 194| 517| return std::make_pair(iterator(TheBucket, getBucketsEnd(), *this, true), 195| 517| true); 196| 517| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapINS_9StringRefEmNS_12DenseMapInfoIS2_EENS_6detail12DenseMapPairIS2_mEEEES2_mS4_S7_E15LookupBucketForIS2_EEbRKT_RPS7_: 519| 779| bool LookupBucketFor(const LookupKeyT &Val, BucketT *&FoundBucket) { 520| 779| const BucketT *ConstFoundBucket; 521| 779| bool Result = const_cast(this) 522| 779| ->LookupBucketFor(Val, ConstFoundBucket); 523| 779| FoundBucket = const_cast(ConstFoundBucket); 524| 779| return Result; 525| 779| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapINS_9StringRefEmNS_12DenseMapInfoIS2_EENS_6detail12DenseMapPairIS2_mEEEES2_mS4_S7_E16InsertIntoBucketEOS2_OmPS7_: 418| 517| BucketT *InsertIntoBucket(KeyT &&Key, ValueT &&Value, BucketT *TheBucket) { 419| 517| TheBucket = InsertIntoBucketImpl(Key, TheBucket); 420| | 421| 517| TheBucket->getFirst() = std::move(Key); 422| 517| ::new (&TheBucket->getSecond()) ValueT(std::move(Value)); 423| 517| return TheBucket; 424| 517| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapINS_9StringRefEmNS_12DenseMapInfoIS2_EENS_6detail12DenseMapPairIS2_mEEEES2_mS4_S7_E20InsertIntoBucketImplERKS2_PS7_: 426| 517| BucketT *InsertIntoBucketImpl(const KeyT &Key, BucketT *TheBucket) { 427| 517| incrementEpoch(); 428| | 429| | // If the load of the hash table is more than 3/4, or if fewer than 1/8 of 430| | // the buckets are empty (meaning that many are filled with tombstones), 431| | // grow the table. 432| | // 433| | // The later case is tricky. For example, if we had one empty bucket with 434| | // tons of tombstones, failing lookups (e.g. for insertion) would have to 435| | // probe almost the entire table until it found the empty bucket. If the 436| | // table completely filled with tombstones, no lookup would ever succeed, 437| | // causing infinite loops in lookup. 438| 517| unsigned NewNumEntries = getNumEntries() + 1; 439| 517| unsigned NumBuckets = getNumBuckets(); 440| 517| if (LLVM_UNLIKELY(NewNumEntries * 4 >= NumBuckets * 3)) { ------------------ | | 171| 517|#define LLVM_UNLIKELY(EXPR) __builtin_expect((bool)(EXPR), false) | | ------------------ | | | Branch (171:29): [True: 262, False: 255] | | ------------------ ------------------ 441| 262| this->grow(NumBuckets * 2); 442| 262| LookupBucketFor(Key, TheBucket); 443| 262| NumBuckets = getNumBuckets(); 444| 262| } else if (LLVM_UNLIKELY(NumBuckets-(NewNumEntries+getNumTombstones()) <= ------------------ | | 171| 255|#define LLVM_UNLIKELY(EXPR) __builtin_expect((bool)(EXPR), false) | | ------------------ | | | Branch (171:29): [True: 0, False: 255] | | ------------------ ------------------ 445| 255| NumBuckets/8)) { 446| 0| this->grow(NumBuckets); 447| 0| LookupBucketFor(Key, TheBucket); 448| 0| } 449| 517| assert(TheBucket); ------------------ | Branch (449:5): [True: 517, False: 0] ------------------ 450| | 451| | // Only update the state after we've grown our bucket space appropriately 452| | // so that when growing buckets we have self-consistent entry count. 453| 517| incrementNumEntries(); 454| | 455| | // If we are writing over a tombstone, remember this. 456| 517| const KeyT EmptyKey = getEmptyKey(); 457| 517| if (!KeyInfoT::isEqual(TheBucket->getFirst(), EmptyKey)) ------------------ | Branch (457:9): [True: 0, False: 517] ------------------ 458| 0| decrementNumTombstones(); 459| | 460| 517| return TheBucket; 461| 517| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapINS_9StringRefEmNS_12DenseMapInfoIS2_EENS_6detail12DenseMapPairIS2_mEEEES2_mS4_S7_E4growEj: 391| 262| void grow(unsigned AtLeast) { 392| 262| static_cast(this)->grow(AtLeast); 393| 262| } _ZN7llvm_ks8DenseMapINS_9StringRefEmNS_12DenseMapInfoIS1_EENS_6detail12DenseMapPairIS1_mEEE4growEj: 621| 262| void grow(unsigned AtLeast) { 622| 262| unsigned OldNumBuckets = NumBuckets; 623| 262| BucketT *OldBuckets = Buckets; 624| | 625| 262| allocateBuckets(std::max(64, static_cast(NextPowerOf2(AtLeast-1)))); 626| 262| assert(Buckets); ------------------ | Branch (626:5): [True: 262, False: 0] ------------------ 627| 262| if (!OldBuckets) { ------------------ | Branch (627:9): [True: 262, False: 0] ------------------ 628| 262| this->BaseT::initEmpty(); 629| 262| return; 630| 262| } 631| | 632| 0| this->moveFromOldBuckets(OldBuckets, OldBuckets+OldNumBuckets); 633| | 634| | // Free the old table. 635| 0| operator delete(OldBuckets); 636| 0| } _ZN7llvm_ks12DenseMapBaseINS_8DenseMapINS_9StringRefEmNS_12DenseMapInfoIS2_EENS_6detail12DenseMapPairIS2_mEEEES2_mS4_S7_E19incrementNumEntriesEv: 357| 517| void incrementNumEntries() { 358| 517| setNumEntries(getNumEntries() + 1); 359| 517| } _ZNK7llvm_ks16DenseMapIteratorINS_9StringRefEmNS_12DenseMapInfoIS1_EENS_6detail12DenseMapPairIS1_mEELb0EEptEv: 1024| 517| pointer operator->() const { 1025| 517| assert(isHandleInSync() && "invalid iterator access!"); ------------------ | Branch (1025:5): [True: 517, False: 0] | Branch (1025:5): [True: 517, Folded] | Branch (1025:5): [True: 517, False: 0] ------------------ 1026| 517| return Ptr; 1027| 517| } _ZN7llvm_ks12DenseMapInfoINS_9StringRefEE11getEmptyKeyEv: 171| 40.7k| static inline StringRef getEmptyKey() { 172| 40.7k| return StringRef(reinterpret_cast(~static_cast(0)), 173| 40.7k| 0); 174| 40.7k| } _ZN7llvm_ks12DenseMapInfoINS_9StringRefEE15getTombstoneKeyEv: 175| 3.37k| static inline StringRef getTombstoneKey() { 176| 3.37k| return StringRef(reinterpret_cast(~static_cast(1)), 177| 3.37k| 0); 178| 3.37k| } _ZN7llvm_ks12DenseMapInfoINS_9StringRefEE12getHashValueES1_: 179| 517| static unsigned getHashValue(StringRef Val) { 180| 517| assert(Val.data() != getEmptyKey().data() && "Cannot hash the empty key!"); ------------------ | Branch (180:5): [True: 517, False: 0] | Branch (180:5): [True: 517, Folded] | Branch (180:5): [True: 517, False: 0] ------------------ 181| 517| assert(Val.data() != getTombstoneKey().data() && ------------------ | Branch (181:5): [True: 517, False: 0] | Branch (181:5): [True: 517, Folded] | Branch (181:5): [True: 517, False: 0] ------------------ 182| 517| "Cannot hash the tombstone key!"); 183| 517| return (unsigned)(hash_value(Val)); 184| 517| } _ZN7llvm_ks12DenseMapInfoINS_9StringRefEE7isEqualES1_S1_: 185| 19.8k| static bool isEqual(StringRef LHS, StringRef RHS) { 186| 19.8k| if (RHS.data() == getEmptyKey().data()) ------------------ | Branch (186:9): [True: 18.8k, False: 1.03k] ------------------ 187| 18.8k| return LHS.data() == getEmptyKey().data(); 188| 1.03k| if (RHS.data() == getTombstoneKey().data()) ------------------ | Branch (188:9): [True: 1.03k, False: 2] ------------------ 189| 1.03k| return LHS.data() == getTombstoneKey().data(); 190| 2| return LHS == RHS; 191| 1.03k| } _ZN7llvm_ks12DenseMapInfoIPKNS_12MCSectionELFEE11getEmptyKeyEv: 36| 6.44k| static inline T* getEmptyKey() { 37| 6.44k| uintptr_t Val = static_cast(-1); 38| 6.44k| Val <<= PointerLikeTypeTraits::NumLowBitsAvailable; 39| 6.44k| return reinterpret_cast(Val); 40| 6.44k| } _ZN7llvm_ks12DenseMapInfoIPKNS_12MCSectionELFEE15getTombstoneKeyEv: 41| 3.79k| static inline T* getTombstoneKey() { 42| 3.79k| uintptr_t Val = static_cast(-2); 43| 3.79k| Val <<= PointerLikeTypeTraits::NumLowBitsAvailable; 44| 3.79k| return reinterpret_cast(Val); 45| 3.79k| } _ZN7llvm_ks12DenseMapInfoIPKNS_12MCSectionELFEE7isEqualES3_S3_: 50| 137k| static bool isEqual(const T *LHS, const T *RHS) { return LHS == RHS; } _ZN7llvm_ks12DenseMapInfoIPKNS_12MCSectionELFEE12getHashValueES3_: 46| 1.78k| static unsigned getHashValue(const T *PtrVal) { 47| 1.78k| return (unsigned((uintptr_t)PtrVal) >> 4) ^ 48| 1.78k| (unsigned((uintptr_t)PtrVal) >> 9); 49| 1.78k| } _ZN7llvm_ks12DenseMapInfoIPKNS_9MCSectionEE11getEmptyKeyEv: 36| 19.1k| static inline T* getEmptyKey() { 37| 19.1k| uintptr_t Val = static_cast(-1); 38| 19.1k| Val <<= PointerLikeTypeTraits::NumLowBitsAvailable; 39| 19.1k| return reinterpret_cast(Val); 40| 19.1k| } _ZN7llvm_ks12DenseMapInfoIPKNS_9MCSectionEE15getTombstoneKeyEv: 41| 18.5k| static inline T* getTombstoneKey() { 42| 18.5k| uintptr_t Val = static_cast(-2); 43| 18.5k| Val <<= PointerLikeTypeTraits::NumLowBitsAvailable; 44| 18.5k| return reinterpret_cast(Val); 45| 18.5k| } _ZN7llvm_ks12DenseMapInfoIPKNS_9MCSectionEE7isEqualES3_S3_: 50| 75.5k| static bool isEqual(const T *LHS, const T *RHS) { return LHS == RHS; } _ZN7llvm_ks12DenseMapInfoIPKNS_9MCSectionEE12getHashValueES3_: 46| 18.2k| static unsigned getHashValue(const T *PtrVal) { 47| 18.2k| return (unsigned((uintptr_t)PtrVal) >> 4) ^ 48| 18.2k| (unsigned((uintptr_t)PtrVal) >> 9); 49| 18.2k| } _ZN7llvm_ks12DenseMapInfoIPKNS_11MCSymbolELFEE11getEmptyKeyEv: 36| 180| static inline T* getEmptyKey() { 37| 180| uintptr_t Val = static_cast(-1); 38| 180| Val <<= PointerLikeTypeTraits::NumLowBitsAvailable; 39| 180| return reinterpret_cast(Val); 40| 180| } _ZN7llvm_ks12DenseMapInfoIPKNS_11MCSymbolELFEE15getTombstoneKeyEv: 41| 146| static inline T* getTombstoneKey() { 42| 146| uintptr_t Val = static_cast(-2); 43| 146| Val <<= PointerLikeTypeTraits::NumLowBitsAvailable; 44| 146| return reinterpret_cast(Val); 45| 146| } _ZN7llvm_ks12DenseMapInfoIPKNS_11MCSymbolELFEE7isEqualES3_S3_: 50| 1.00k| static bool isEqual(const T *LHS, const T *RHS) { return LHS == RHS; } _ZN7llvm_ks12DenseMapInfoIPKNS_11MCSymbolELFEE12getHashValueES3_: 46| 138| static unsigned getHashValue(const T *PtrVal) { 47| 138| return (unsigned((uintptr_t)PtrVal) >> 4) ^ 48| 138| (unsigned((uintptr_t)PtrVal) >> 9); 49| 138| } _ZN7llvm_ks8DenseSetIPNS_9MCSectionENS_12DenseMapInfoIS2_EEEC2Ej: 51| 749| explicit DenseSet(unsigned NumInitBuckets = 0) : TheMap(NumInitBuckets) {} _ZN7llvm_ks8DenseSetIPNS_9MCSectionENS_12DenseMapInfoIS2_EEE5clearEv: 61| 749| void clear() { 62| 749| TheMap.clear(); 63| 749| } _ZN7llvm_ks14DebugEpochBaseD2Ev: 63| 7.57k| ~DebugEpochBase() { incrementEpoch(); } _ZN7llvm_ks14DebugEpochBase14incrementEpochEv: 59| 12.0k| void incrementEpoch() { ++Epoch; } _ZN7llvm_ks14DebugEpochBaseC2Ev: 55| 7.57k| DebugEpochBase() : Epoch(0) {} _ZN7llvm_ks14DebugEpochBase10HandleBaseC2EPKS0_: 81| 655| : EpochAddress(&Parent->Epoch), EpochAtCreation(Parent->Epoch) {} _ZNK7llvm_ks14DebugEpochBase10HandleBase14isHandleInSyncEv: 86| 1.17k| bool isHandleInSync() const { return *EpochAddress == EpochAtCreation; } _ZN7llvm_ks9hash_codeC2Em: 82| 517| hash_code(size_t value) : value(value) {} _ZNK7llvm_ks9hash_codecvmEv: 85| 517| /*explicit*/ operator size_t() const { return value; } _ZN7llvm_ks7hashing6detail7fetch64EPKc: 146| 4|inline uint64_t fetch64(const char *p) { 147| 4| uint64_t result; 148| 4| memcpy(&result, p, sizeof(result)); 149| 4| if (sys::IsBigEndianHost) ------------------ | Branch (149:7): [Folded, False: 4] ------------------ 150| 0| sys::swapByteOrder(result); 151| 4| return result; 152| 4|} _ZN7llvm_ks7hashing6detail7fetch32EPKc: 154| 1.02k|inline uint32_t fetch32(const char *p) { 155| 1.02k| uint32_t result; 156| 1.02k| memcpy(&result, p, sizeof(result)); 157| 1.02k| if (sys::IsBigEndianHost) ------------------ | Branch (157:7): [Folded, False: 1.02k] ------------------ 158| 0| sys::swapByteOrder(result); 159| 1.02k| return result; 160| 1.02k|} _ZN7llvm_ks7hashing6detail6rotateEmm: 171| 2|inline uint64_t rotate(uint64_t val, size_t shift) { 172| | // Avoid shifting by 64: doing so yields an undefined result. 173| 2| return shift == 0 ? val : ((val >> shift) | (val << (64 - shift))); ------------------ | Branch (173:10): [True: 0, False: 2] ------------------ 174| 2|} _ZN7llvm_ks7hashing6detail13hash_16_bytesEmm: 180| 515|inline uint64_t hash_16_bytes(uint64_t low, uint64_t high) { 181| | // Murmur-inspired hashing. 182| 515| const uint64_t kMul = 0x9ddfea08eb382d69ULL; 183| 515| uint64_t a = (low ^ high) * kMul; 184| 515| a ^= (a >> 47); 185| 515| uint64_t b = (high ^ a) * kMul; 186| 515| b ^= (b >> 47); 187| 515| b *= kMul; 188| 515| return b; 189| 515|} _ZN7llvm_ks7hashing6detail15hash_4to8_bytesEPKcmm: 200| 513|inline uint64_t hash_4to8_bytes(const char *s, size_t len, uint64_t seed) { 201| 513| uint64_t a = fetch32(s); 202| 513| return hash_16_bytes(len + (a << 3), seed ^ fetch32(s + len - 4)); 203| 513|} _ZN7llvm_ks7hashing6detail16hash_9to16_bytesEPKcmm: 205| 2|inline uint64_t hash_9to16_bytes(const char *s, size_t len, uint64_t seed) { 206| 2| uint64_t a = fetch64(s); 207| 2| uint64_t b = fetch64(s + len - 8); 208| 2| return hash_16_bytes(seed ^ a, rotate(b + len, len)) ^ b; 209| 2|} _ZN7llvm_ks7hashing6detail10hash_shortEPKcmm: 243| 517|inline uint64_t hash_short(const char *s, size_t length, uint64_t seed) { 244| 517| if (length >= 4 && length <= 8) ------------------ | Branch (244:7): [True: 515, False: 2] | Branch (244:22): [True: 513, False: 2] ------------------ 245| 513| return hash_4to8_bytes(s, length, seed); 246| 4| if (length > 8 && length <= 16) ------------------ | Branch (246:7): [True: 2, False: 2] | Branch (246:21): [True: 2, False: 0] ------------------ 247| 2| return hash_9to16_bytes(s, length, seed); 248| 2| if (length > 16 && length <= 32) ------------------ | Branch (248:7): [True: 0, False: 2] | Branch (248:22): [True: 0, False: 0] ------------------ 249| 0| return hash_17to32_bytes(s, length, seed); 250| 2| if (length > 32) ------------------ | Branch (250:7): [True: 0, False: 2] ------------------ 251| 0| return hash_33to64_bytes(s, length, seed); 252| 2| if (length != 0) ------------------ | Branch (252:7): [True: 0, False: 2] ------------------ 253| 0| return hash_1to3_bytes(s, length, seed); 254| | 255| 2| return k2 ^ seed; 256| 2|} _ZN7llvm_ks7hashing6detail18get_execution_seedEv: 322| 517|inline size_t get_execution_seed() { 323| | // FIXME: This needs to be a per-execution seed. This is just a placeholder 324| | // implementation. Switching to a per-execution seed is likely to flush out 325| | // instability bugs and so will happen as its own commit. 326| | // 327| | // However, if there is a fixed seed override set the first time this is 328| | // called, return that instead of the per-execution seed. 329| 517| const uint64_t seed_prime = 0xff51afd7ed558ccdULL; 330| 517| static size_t seed = fixed_seed_override ? fixed_seed_override ------------------ | Branch (330:24): [True: 0, False: 517] ------------------ 331| 517| : (size_t)seed_prime; 332| 517| return seed; 333| 517|} _ZN7llvm_ks18hash_combine_rangeIPKcEENS_9hash_codeET_S4_: 481| 517|hash_code hash_combine_range(InputIteratorT first, InputIteratorT last) { 482| 517| return ::llvm_ks::hashing::detail::hash_combine_range_impl(first, last); 483| 517|} _ZN7llvm_ks7hashing6detail23hash_combine_range_implIKcEENSt3__19enable_ifIXsr16is_hashable_dataIT_EE5valueENS_9hash_codeEE4typeEPS6_SA_: 449| 517|hash_combine_range_impl(ValueT *first, ValueT *last) { 450| 517| const size_t seed = get_execution_seed(); 451| 517| const char *s_begin = reinterpret_cast(first); 452| 517| const char *s_end = reinterpret_cast(last); 453| 517| const size_t length = std::distance(s_begin, s_end); 454| 517| if (length <= 64) ------------------ | Branch (454:7): [True: 517, False: 0] ------------------ 455| 517| return hash_short(s_begin, length, seed); 456| | 457| 0| const char *s_aligned_end = s_begin + (length & ~63); 458| 0| hash_state state = state.create(s_begin, seed); 459| 0| s_begin += 64; 460| 0| while (s_begin != s_aligned_end) { ------------------ | Branch (460:10): [True: 0, False: 0] ------------------ 461| 0| state.mix(s_begin); 462| 0| s_begin += 64; 463| 0| } 464| 0| if (length & 63) ------------------ | Branch (464:7): [True: 0, False: 0] ------------------ 465| 0| state.mix(s_end - 64); 466| | 467| 0| return state.finalize(length); 468| 517|} _ZN7llvm_ks8OptionalINS_11MCFixupKindEED2Ev: 115| 148| ~Optional() { 116| 148| reset(); 117| 148| } _ZN7llvm_ks8OptionalINS_11MCFixupKindEE5resetEv: 108| 148| void reset() { 109| 148| if (hasVal) { ------------------ | Branch (109:9): [True: 74, False: 74] ------------------ 110| 74| (**this).~T(); 111| 74| hasVal = false; 112| 74| } 113| 148| } _ZNK7llvm_ks8OptionalINS_11MCFixupKindEE8hasValueEv: 125| 37| bool hasValue() const { return hasVal; } _ZNR7llvm_ks8OptionalINS_11MCFixupKindEEdeEv: 129| 74| T& operator*() LLVM_LVALUE_FUNCTION { assert(hasVal); return *getPointer(); } ------------------ | Branch (129:41): [True: 74, False: 0] ------------------ _ZN7llvm_ks8OptionalINS_11MCFixupKindEE10getPointerEv: 120| 74| T* getPointer() { assert(hasVal); return reinterpret_cast(storage.buffer); } ------------------ | Branch (120:21): [True: 74, False: 0] ------------------ _ZN7llvm_ks8OptionalINS_11MCFixupKindEEC2EOS1_: 45| 74| Optional(T &&y) : hasVal(true) { 46| 74| new (storage.buffer) T(std::forward(y)); 47| 74| } _ZN7llvm_ks8OptionalINS_11MCFixupKindEEC2ERKS2_: 40| 37| Optional(const Optional &O) : hasVal(O.hasVal) { 41| 37| if (hasVal) ------------------ | Branch (41:9): [True: 0, False: 37] ------------------ 42| 0| new (storage.buffer) T(*O); 43| 37| } _ZN7llvm_ks8OptionalINS_11MCFixupKindEEC2ENS_8NoneTypeE: 35| 37| Optional(NoneType) : hasVal(false) {} _ZN7llvm_ks14PointerIntPairIPNS_10MCFragmentELj1EjNS_21PointerLikeTypeTraitsIS2_EENS_18PointerIntPairInfoIS2_Lj1ES4_EEE6setIntEj: 66| 17.7k| void setInt(IntType IntVal) { 67| 17.7k| Value = Info::updateInt(Value, static_cast(IntVal)); 68| 17.7k| } _ZN7llvm_ks18PointerIntPairInfoIPNS_10MCFragmentELj1ENS_21PointerLikeTypeTraitsIS2_EEE9updateIntEll: 165| 17.7k| static intptr_t updateInt(intptr_t OrigValue, intptr_t Int) { 166| 17.7k| intptr_t IntWord = static_cast(Int); 167| 17.7k| assert((IntWord & ~IntMask) == 0 && "Integer too large for field"); ------------------ | Branch (167:5): [True: 17.7k, False: 0] | Branch (167:5): [True: 17.7k, Folded] | Branch (167:5): [True: 17.7k, False: 0] ------------------ 168| | 169| | // Preserve all bits other than the ones we are updating. 170| 17.7k| return (OrigValue & ~ShiftedIntMask) | IntWord << IntShift; 171| 17.7k| } _ZNK7llvm_ks14PointerIntPairIPNS_10MCFragmentELj1EjNS_21PointerLikeTypeTraitsIS2_EENS_18PointerIntPairInfoIS2_Lj1ES4_EEE6getIntEv: 58| 20.2k| IntType getInt() const { 59| 20.2k| return (IntType)Info::getInt(Value); 60| 20.2k| } _ZN7llvm_ks18PointerIntPairInfoIPNS_10MCFragmentELj1ENS_21PointerLikeTypeTraitsIS2_EEE6getIntEl: 152| 20.2k| static intptr_t getInt(intptr_t Value) { 153| 20.2k| return (Value >> IntShift) & IntMask; 154| 20.2k| } _ZN7llvm_ks14PointerIntPairIPNS_10MCFragmentELj1EjNS_21PointerLikeTypeTraitsIS2_EENS_18PointerIntPairInfoIS2_Lj1ES4_EEE10setPointerES2_: 62| 18.3k| void setPointer(PointerTy PtrVal) { 63| 18.3k| Value = Info::updatePointer(Value, PtrVal); 64| 18.3k| } _ZN7llvm_ks18PointerIntPairInfoIPNS_10MCFragmentELj1ENS_21PointerLikeTypeTraitsIS2_EEE13updatePointerElS2_: 156| 18.3k| static intptr_t updatePointer(intptr_t OrigValue, PointerT Ptr) { 157| 18.3k| intptr_t PtrWord = 158| 18.3k| reinterpret_cast(PtrTraits::getAsVoidPointer(Ptr)); 159| 18.3k| assert((PtrWord & ~PointerBitMask) == 0 && ------------------ | Branch (159:5): [True: 18.3k, False: 0] | Branch (159:5): [True: 18.3k, Folded] | Branch (159:5): [True: 18.3k, False: 0] ------------------ 160| 18.3k| "Pointer is not sufficiently aligned"); 161| | // Preserve all low bits, just update the pointer. 162| 18.3k| return PtrWord | (OrigValue & ~PointerBitMask); 163| 18.3k| } _ZNK7llvm_ks14PointerIntPairIPNS_10MCFragmentELj1EjNS_21PointerLikeTypeTraitsIS2_EENS_18PointerIntPairInfoIS2_Lj1ES4_EEE10getPointerEv: 56| 79.5k| PointerTy getPointer() const { return Info::getPointer(Value); } _ZN7llvm_ks18PointerIntPairInfoIPNS_10MCFragmentELj1ENS_21PointerLikeTypeTraitsIS2_EEE10getPointerEl: 147| 79.5k| static PointerT getPointer(intptr_t Value) { 148| 79.5k| return PtrTraits::getFromVoidPointer( 149| 79.5k| reinterpret_cast(Value & PointerBitMask)); 150| 79.5k| } _ZN7llvm_ks14PointerIntPairIPNS_10MCFragmentELj1EjNS_21PointerLikeTypeTraitsIS2_EENS_18PointerIntPairInfoIS2_Lj1ES4_EEEC2Ev: 50| 17.7k| PointerIntPair() : Value(0) {} _ZN7llvm_ks14array_lengthofIbLm4EEEmRAT0__T_: 282| 5.99k|LLVM_CONSTEXPR inline size_t array_lengthof(T (&)[N]) { 283| 5.99k| return N; 284| 5.99k|} MipsAsmParser.cpp:_ZN7llvm_ks11make_uniqueIN12_GLOBAL__N_120MipsAssemblerOptionsEJRKNS_13FeatureBitsetEEEENSt3__19enable_ifIXntsr3std8is_arrayIT_EE5valueENS6_10unique_ptrIS8_NS6_14default_deleteIS8_EEEEE4typeEDpOT0_: 404| 1.49k|make_unique(Args &&... args) { 405| 1.49k| return std::unique_ptr(new T(std::forward(args)...)); 406| 1.49k|} MipsAsmParser.cpp:_ZN7llvm_ks11make_uniqueIN12_GLOBAL__N_111MipsOperandEJNS2_6KindTyERNS1_13MipsAsmParserEEEENSt3__19enable_ifIXntsr3std8is_arrayIT_EE5valueENS6_10unique_ptrIS8_NS6_14default_deleteIS8_EEEEE4typeEDpOT0_: 404| 18.0k|make_unique(Args &&... args) { 405| 18.0k| return std::unique_ptr(new T(std::forward(args)...)); 406| 18.0k|} _ZN7llvm_ks14array_lengthofIKNS_15MCFixupKindInfoELm16EEEmRAT0__T_: 282| 6.90k|LLVM_CONSTEXPR inline size_t array_lengthof(T (&)[N]) { 283| 6.90k| return N; 284| 6.90k|} _ZN7llvm_ks9SetVectorIPNS_9MCSectionENSt3__16vectorIS2_NS3_9allocatorIS2_EEEENS_8DenseSetIS2_NS_12DenseMapInfoIS2_EEEEEC2Ev: 53| 749| SetVector() {} _ZN7llvm_ks9SetVectorIPNS_9MCSectionENSt3__16vectorIS2_NS3_9allocatorIS2_EEEENS_8DenseSetIS2_NS_12DenseMapInfoIS2_EEEEE5clearEv: 185| 749| void clear() { 186| 749| set_.clear(); 187| 749| vector_.clear(); 188| 749| } _ZN7llvm_ks19SmallPtrSetImplBaseC2EPPKvj: 72| 749| SmallArray(SmallStorage), CurArray(SmallStorage), CurArraySize(SmallSize) { 73| 749| assert(SmallSize && (SmallSize & (SmallSize-1)) == 0 && ------------------ | Branch (73:5): [True: 749, False: 0] | Branch (73:5): [True: 749, False: 0] | Branch (73:5): [True: 749, Folded] | Branch (73:5): [True: 749, False: 0] ------------------ 74| 749| "Initial size must be a power of two!"); 75| 749| clear(); 76| 749| } _ZN7llvm_ks19SmallPtrSetImplBaseD2Ev: 77| 749| ~SmallPtrSetImplBase() { 78| 749| if (!isSmall()) ------------------ | Branch (78:9): [True: 0, False: 749] ------------------ 79| 0| free(CurArray); 80| 749| } _ZN7llvm_ks19SmallPtrSetImplBase5clearEv: 87| 749| void clear() { 88| | // If the capacity of the array is huge, and the # elements used is small, 89| | // shrink the array. 90| 749| if (!isSmall() && NumElements*4 < CurArraySize && CurArraySize > 32) ------------------ | Branch (90:9): [True: 0, False: 749] | Branch (90:23): [True: 0, False: 0] | Branch (90:55): [True: 0, False: 0] ------------------ 91| 0| return shrink_and_clear(); 92| | 93| | // Fill the array with empty markers. 94| 749| memset(CurArray, -1, CurArraySize*sizeof(void*)); 95| 749| NumElements = 0; 96| 749| NumTombstones = 0; 97| 749| } _ZNK7llvm_ks19SmallPtrSetImplBase9count_impEPKv: 134| 2.17k| bool count_imp(const void * Ptr) const { 135| 2.17k| if (isSmall()) { ------------------ | Branch (135:9): [True: 2.17k, False: 0] ------------------ 136| | // Linear search for the item. 137| 2.17k| for (const void *const *APtr = SmallArray, 138| 2.17k| *const *E = SmallArray+NumElements; APtr != E; ++APtr) ------------------ | Branch (138:59): [True: 0, False: 2.17k] ------------------ 139| 0| if (*APtr == Ptr) ------------------ | Branch (139:13): [True: 0, False: 0] ------------------ 140| 0| return true; 141| 2.17k| return false; 142| 2.17k| } 143| | 144| | // Big set case. 145| 0| return *FindBucketFor(Ptr) == Ptr; 146| 2.17k| } _ZNK7llvm_ks19SmallPtrSetImplBase7isSmallEv: 149| 3.67k| bool isSmall() const { return CurArray == SmallArray; } _ZN7llvm_ks11SmallPtrSetIPKNS_8MCSymbolELj32EEC2Ev: 345| 749| SmallPtrSet() : BaseT(SmallStorage, SmallSizePowTwo) {} _ZN7llvm_ks15SmallPtrSetImplIPKNS_8MCSymbolEEC2EPPKvj: 286| 749| : SmallPtrSetImplBase(SmallStorage, SmallSize) {} _ZNK7llvm_ks15SmallPtrSetImplIPKNS_8MCSymbolEE5countES3_: 308| 2.17k| size_type count(PtrType Ptr) const { 309| 2.17k| return count_imp(PtrTraits::getAsVoidPointer(Ptr)) ? 1 : 0; ------------------ | Branch (309:12): [True: 0, False: 2.17k] ------------------ 310| 2.17k| } _ZN7llvm_ks11SmallStringILj1024EEC2Ev: 28| 749| SmallString() {} _ZNK7llvm_ks11SmallStringILj128EEcvNS_9StringRefEEv: 277| 31.9k| operator StringRef() const { return str(); } _ZNK7llvm_ks11SmallStringILj128EE3strEv: 267| 31.9k| StringRef str() const { return StringRef(this->begin(), this->size()); } _ZN7llvm_ks11SmallStringILj128EEC2Ev: 28| 42.5k| SmallString() {} _ZN7llvm_ks11SmallStringILj128EEC2ENS_9StringRefE: 31| 16.8k| SmallString(StringRef S) : SmallVector(S.begin(), S.end()) {} _ZN7llvm_ks11SmallStringILj64EEC2Ev: 28| 5.74k| SmallString() {} _ZN7llvm_ks11SmallStringILj64EEpLENS_9StringRefE: 285| 11.4k| SmallString &operator+=(StringRef RHS) { 286| 11.4k| this->append(RHS.begin(), RHS.end()); 287| 11.4k| return *this; 288| 11.4k| } _ZN7llvm_ks11SmallStringILj64EE6appendIPKcEEvT_S5_: 74| 11.4k| void append(in_iter S, in_iter E) { 75| 11.4k| SmallVectorImpl::append(S, E); 76| 11.4k| } _ZNK7llvm_ks11SmallStringILj64EEcvNS_9StringRefEEv: 277| 5.74k| operator StringRef() const { return str(); } _ZNK7llvm_ks11SmallStringILj64EE3strEv: 267| 5.74k| StringRef str() const { return StringRef(this->begin(), this->size()); } _ZN7llvm_ks11SmallStringILj256EEC2Ev: 28| 72.7k| SmallString() {} _ZN7llvm_ks15SmallVectorImplIcED2Ev: 368| 156k| ~SmallVectorImpl() { 369| | // Destroy the constructed elements in the vector. 370| 156k| this->destroy_range(this->begin(), this->end()); 371| | 372| | // If this wasn't grown from the inline copy, deallocate the old space. 373| 156k| if (!this->isSmall()) ------------------ | Branch (373:9): [True: 6.91k, False: 149k] ------------------ 374| 6.91k| free(this->begin()); 375| 156k| } _ZN7llvm_ks23SmallVectorTemplateBaseIcLb1EE13destroy_rangeEPcS2_: 284| 158k| static void destroy_range(T *, T *) {} _ZN7llvm_ks25SmallVectorTemplateCommonIcvE5beginEv: 113| 221k| iterator begin() { return (iterator)this->BeginX; } _ZN7llvm_ks25SmallVectorTemplateCommonIcvE3endEv: 117| 5.93M| iterator end() { return (iterator)this->EndX; } _ZNK7llvm_ks25SmallVectorTemplateCommonIcvE7isSmallEv: 86| 156k| bool isSmall() const { 87| 156k| return BeginX == static_cast(&FirstEl); 88| 156k| } _ZNK7llvm_ks25SmallVectorTemplateCommonIcvE4sizeEv: 132| 352k| size_type size() const { return end()-begin(); } _ZNK7llvm_ks25SmallVectorTemplateCommonIcvE3endEv: 119| 369k| const_iterator end() const { return (const_iterator)this->EndX; } _ZNK7llvm_ks25SmallVectorTemplateCommonIcvE5beginEv: 115| 427k| const_iterator begin() const { return (const_iterator)this->BeginX; } _ZN7llvm_ks25SmallVectorTemplateCommonIcvE4dataEv: 139| 8.55k| pointer data() { return pointer(begin()); } _ZN7llvm_ks11SmallVectorIcLj1024EEC2Ev: 872| 749| SmallVector() : SmallVectorImpl(N) { 873| 749| } _ZN7llvm_ks15SmallVectorImplIcEC2Ej: 364| 156k| : SmallVectorTemplateBase::value>(N*sizeof(T)) { 365| 156k| } _ZN7llvm_ks23SmallVectorTemplateBaseIcLb1EEC2Em: 281| 156k| SmallVectorTemplateBase(size_t Size) : SmallVectorTemplateCommon(Size) {} _ZN7llvm_ks25SmallVectorTemplateCommonIcvEC2Em: 78| 156k| SmallVectorTemplateCommon(size_t Size) : SmallVectorBase(&FirstEl, Size) {} _ZN7llvm_ks15SmallVectorBaseC2EPvm: 40| 513k| : BeginX(FirstEl), EndX(FirstEl), CapacityX((char*)FirstEl+Size) {} _ZNK7llvm_ks15SmallVectorBase13size_in_bytesEv: 48| 27.6k| size_t size_in_bytes() const { 49| 27.6k| return size_t((char*)EndX - (char*)BeginX); 50| 27.6k| } _ZNK7llvm_ks15SmallVectorBase17capacity_in_bytesEv: 53| 27.6k| size_t capacity_in_bytes() const { 54| 27.6k| return size_t((char*)CapacityX - (char*)BeginX); 55| 27.6k| } _ZNK7llvm_ks15SmallVectorBase5emptyEv: 57| 77.3M| bool LLVM_ATTRIBUTE_UNUSED_RESULT empty() const { return BeginX == EndX; } _ZNK7llvm_ks25SmallVectorTemplateCommonIcvE4dataEv: 141| 546| const_pointer data() const { return const_pointer(begin()); } _ZN7llvm_ks23SmallVectorTemplateBaseINS_9MCOperandELb1EE13destroy_rangeEPS1_S3_: 284| 29.0k| static void destroy_range(T *, T *) {} _ZNK7llvm_ks25SmallVectorTemplateCommonINS_9MCOperandEvE7isSmallEv: 86| 24.8k| bool isSmall() const { 87| 24.8k| return BeginX == static_cast(&FirstEl); 88| 24.8k| } _ZNK7llvm_ks25SmallVectorTemplateCommonINS_9MCOperandEvEixEm: 149| 24.5k| const_reference operator[](size_type idx) const { 150| 24.5k| assert(idx < size()); ------------------ | Branch (150:5): [True: 24.5k, False: 0] ------------------ 151| 24.5k| return begin()[idx]; 152| 24.5k| } _ZN7llvm_ks25SmallVectorTemplateCommonINS_9MCOperandEvEixEm: 144| 33.6k| reference operator[](size_type idx) { 145| 33.6k| assert(idx < size()); ------------------ | Branch (145:5): [True: 33.6k, False: 0] ------------------ 146| 33.6k| return begin()[idx]; 147| 33.6k| } _ZNK7llvm_ks25SmallVectorTemplateCommonINS_9MCOperandEvE4sizeEv: 132| 99.6k| size_type size() const { return end()-begin(); } _ZN7llvm_ks23SmallVectorTemplateBaseINS_9MCOperandELb1EE9push_backERKS1_: 337| 24.6k| void push_back(const T &Elt) { 338| 24.6k| if (LLVM_UNLIKELY(this->EndX >= this->CapacityX)) ------------------ | | 171| 24.6k|#define LLVM_UNLIKELY(EXPR) __builtin_expect((bool)(EXPR), false) | | ------------------ | | | Branch (171:29): [True: 0, False: 24.6k] | | ------------------ ------------------ 339| 0| this->grow(); 340| 24.6k| memcpy(reinterpret_cast(this->end()), &Elt, sizeof(T)); 341| 24.6k| this->setEnd(this->end()+1); 342| 24.6k| } _ZN7llvm_ks25SmallVectorTemplateCommonINS_9MCOperandEvE6setEndEPS1_: 95| 41.1k| void setEnd(T *P) { this->EndX = P; } _ZN7llvm_ks15SmallVectorImplINS_9MCOperandEE5clearEv: 378| 4.26k| void clear() { 379| 4.26k| this->destroy_range(this->begin(), this->end()); 380| 4.26k| this->EndX = this->BeginX; 381| 4.26k| } _ZN7llvm_ks25SmallVectorTemplateCommonINS_9MCOperandEvE5beginEv: 113| 95.7k| iterator begin() { return (iterator)this->BeginX; } _ZNK7llvm_ks25SmallVectorTemplateCommonINS_9MCOperandEvE5beginEv: 115| 157k| const_iterator begin() const { return (const_iterator)this->BeginX; } _ZN7llvm_ks25SmallVectorTemplateCommonINS_9MCOperandEvE3endEv: 117| 78.3k| iterator end() { return (iterator)this->EndX; } _ZNK7llvm_ks25SmallVectorTemplateCommonINS_9MCOperandEvE3endEv: 119| 116k| const_iterator end() const { return (const_iterator)this->EndX; } _ZN7llvm_ks23SmallVectorTemplateBaseINS_7MCFixupELb1EE13destroy_rangeEPS1_S3_: 284| 9.12k| static void destroy_range(T *, T *) {} _ZN7llvm_ks25SmallVectorTemplateCommonINS_7MCFixupEvE5beginEv: 113| 30.8k| iterator begin() { return (iterator)this->BeginX; } _ZN7llvm_ks25SmallVectorTemplateCommonINS_7MCFixupEvE3endEv: 117| 36.6k| iterator end() { return (iterator)this->EndX; } _ZNK7llvm_ks25SmallVectorTemplateCommonINS_7MCFixupEvE7isSmallEv: 86| 9.12k| bool isSmall() const { 87| 9.12k| return BeginX == static_cast(&FirstEl); 88| 9.12k| } _ZN7llvm_ks15SmallVectorImplINS_9MCOperandEEaSERKS2_: 739| 16.4k| operator=(const SmallVectorImpl &RHS) { 740| | // Avoid self-assignment. 741| 16.4k| if (this == &RHS) return *this; ------------------ | Branch (741:7): [True: 0, False: 16.4k] ------------------ 742| | 743| | // If we already have sufficient space, assign the common elements, then 744| | // destroy any excess. 745| 16.4k| size_t RHSSize = RHS.size(); 746| 16.4k| size_t CurSize = this->size(); 747| 16.4k| if (CurSize >= RHSSize) { ------------------ | Branch (747:7): [True: 0, False: 16.4k] ------------------ 748| | // Assign common elements. 749| 0| iterator NewEnd; 750| 0| if (RHSSize) ------------------ | Branch (750:9): [True: 0, False: 0] ------------------ 751| 0| NewEnd = std::copy(RHS.begin(), RHS.begin()+RHSSize, this->begin()); 752| 0| else 753| 0| NewEnd = this->begin(); 754| | 755| | // Destroy excess elements. 756| 0| this->destroy_range(NewEnd, this->end()); 757| | 758| | // Trim. 759| 0| this->setEnd(NewEnd); 760| 0| return *this; 761| 0| } 762| | 763| | // If we have to grow to have enough elements, destroy the current elements. 764| | // This allows us to avoid copying them during the grow. 765| | // FIXME: don't do this if they're efficiently moveable. 766| 16.4k| if (this->capacity() < RHSSize) { ------------------ | Branch (766:7): [True: 0, False: 16.4k] ------------------ 767| | // Destroy current elements. 768| 0| this->destroy_range(this->begin(), this->end()); 769| 0| this->setEnd(this->begin()); 770| 0| CurSize = 0; 771| 0| this->grow(RHSSize); 772| 16.4k| } else if (CurSize) { ------------------ | Branch (772:14): [True: 0, False: 16.4k] ------------------ 773| | // Otherwise, use assignment for the already-constructed elements. 774| 0| std::copy(RHS.begin(), RHS.begin()+CurSize, this->begin()); 775| 0| } 776| | 777| | // Copy construct the new elements in place. 778| 16.4k| this->uninitialized_copy(RHS.begin()+CurSize, RHS.end(), 779| 16.4k| this->begin()+CurSize); 780| | 781| | // Set end. 782| 16.4k| this->setEnd(this->begin()+RHSSize); 783| 16.4k| return *this; 784| 16.4k|} _ZNK7llvm_ks25SmallVectorTemplateCommonINS_9MCOperandEvE8capacityEv: 136| 16.4k| size_t capacity() const { return capacity_ptr() - begin(); } _ZNK7llvm_ks25SmallVectorTemplateCommonINS_9MCOperandEvE12capacity_ptrEv: 122| 16.4k| const_iterator capacity_ptr() const { return (const_iterator)this->CapacityX;} _ZN7llvm_ks23SmallVectorTemplateBaseINS_9MCOperandELb1EE18uninitialized_copyIKS1_S1_EEvPT_S6_PT0_PNSt3__19enable_ifIXsr3std7is_sameINS9_12remove_constIS5_E4typeES7_EE5valueEvE4typeE: 322| 16.4k| T2>::value>::type * = nullptr) { 323| | // Use memcpy for PODs iterated by pointers (which includes SmallVector 324| | // iterators): std::uninitialized_copy optimizes to memmove, but we can 325| | // use memcpy here. Note that I and E are iterators and thus might be 326| | // invalid for memcpy if they are equal. 327| 16.4k| if (I != E) ------------------ | Branch (327:9): [True: 16.4k, False: 0] ------------------ 328| 16.4k| memcpy(Dest, I, (E - I) * sizeof(T)); 329| 16.4k| } _ZN7llvm_ks23SmallVectorTemplateBaseIcLb1EE9push_backERKc: 337| 5.74k| void push_back(const T &Elt) { 338| 5.74k| if (LLVM_UNLIKELY(this->EndX >= this->CapacityX)) ------------------ | | 171| 5.74k|#define LLVM_UNLIKELY(EXPR) __builtin_expect((bool)(EXPR), false) | | ------------------ | | | Branch (171:29): [True: 0, False: 5.74k] | | ------------------ ------------------ 339| 0| this->grow(); 340| 5.74k| memcpy(reinterpret_cast(this->end()), &Elt, sizeof(T)); 341| 5.74k| this->setEnd(this->end()+1); 342| 5.74k| } _ZN7llvm_ks23SmallVectorTemplateBaseIcLb1EE4growEm: 333| 14.2k| void grow(size_t MinSize = 0) { 334| 14.2k| this->grow_pod(MinSize*sizeof(T), sizeof(T)); 335| 14.2k| } _ZN7llvm_ks25SmallVectorTemplateCommonIcvE8grow_podEmm: 80| 14.2k| void grow_pod(size_t MinSizeInBytes, size_t TSize) { 81| 14.2k| SmallVectorBase::grow_pod(&FirstEl, MinSizeInBytes, TSize); 82| 14.2k| } _ZN7llvm_ks25SmallVectorTemplateCommonIcvE6setEndEPc: 95| 1.94M| void setEnd(T *P) { this->EndX = P; } _ZN7llvm_ks25SmallVectorTemplateCommonIPNS_8MCSymbolEvE3endEv: 117| 14.6k| iterator end() { return (iterator)this->EndX; } _ZN7llvm_ks23SmallVectorTemplateBaseIPNS_8MCSymbolELb1EE4growEm: 333| 162| void grow(size_t MinSize = 0) { 334| 162| this->grow_pod(MinSize*sizeof(T), sizeof(T)); 335| 162| } _ZN7llvm_ks25SmallVectorTemplateCommonIPNS_8MCSymbolEvE8grow_podEmm: 80| 162| void grow_pod(size_t MinSizeInBytes, size_t TSize) { 81| 162| SmallVectorBase::grow_pod(&FirstEl, MinSizeInBytes, TSize); 82| 162| } _ZN7llvm_ks25SmallVectorTemplateCommonIPNS_8MCSymbolEvE6setEndEPS2_: 95| 5.72k| void setEnd(T *P) { this->EndX = P; } _ZN7llvm_ks23SmallVectorTemplateBaseIPNS_8MCSymbolELb1EE13destroy_rangeEPS2_S4_: 284| 1.95k| static void destroy_range(T *, T *) {} _ZN7llvm_ks25SmallVectorTemplateCommonIPNS_8MCSymbolEvE5beginEv: 113| 3.21k| iterator begin() { return (iterator)this->BeginX; } _ZNK7llvm_ks25SmallVectorTemplateCommonIPNS_8MCSymbolEvE7isSmallEv: 86| 749| bool isSmall() const { 87| 749| return BeginX == static_cast(&FirstEl); 88| 749| } _ZN7llvm_ks23SmallVectorTemplateBaseINS_14MCLOHDirectiveELb0EE13destroy_rangeEPS1_S3_: 180| 749| static void destroy_range(T *S, T *E) { 181| 749| while (S != E) { ------------------ | Branch (181:12): [True: 0, False: 749] ------------------ 182| 0| --E; 183| 0| E->~T(); 184| 0| } 185| 749| } _ZN7llvm_ks25SmallVectorTemplateCommonINS_14MCLOHDirectiveEvE5beginEv: 113| 749| iterator begin() { return (iterator)this->BeginX; } _ZN7llvm_ks25SmallVectorTemplateCommonINS_14MCLOHDirectiveEvE3endEv: 117| 749| iterator end() { return (iterator)this->EndX; } _ZNK7llvm_ks25SmallVectorTemplateCommonINS_14MCLOHDirectiveEvE7isSmallEv: 86| 749| bool isSmall() const { 87| 749| return BeginX == static_cast(&FirstEl); 88| 749| } _ZN7llvm_ks15SmallVectorImplIPNS_8MCSymbolEE5clearEv: 378| 1.20k| void clear() { 379| 1.20k| this->destroy_range(this->begin(), this->end()); 380| 1.20k| this->EndX = this->BeginX; 381| 1.20k| } _ZNK7llvm_ks25SmallVectorTemplateCommonINSt3__14pairINS2_IPNS_9MCSectionEPKNS_6MCExprEEES8_EEvE4backEv: 167| 566k| const_reference back() const { 168| 566k| assert(!empty()); ------------------ | Branch (168:5): [True: 566k, False: 0] ------------------ 169| 566k| return end()[-1]; 170| 566k| } _ZNK7llvm_ks25SmallVectorTemplateCommonINSt3__14pairINS2_IPNS_9MCSectionEPKNS_6MCExprEEES8_EEvE3endEv: 119| 566k| const_iterator end() const { return (const_iterator)this->EndX; } _ZN7llvm_ks23SmallVectorTemplateBaseINSt3__14pairINS2_IPNS_9MCSectionEPKNS_6MCExprEEES8_EELb1EE9push_backERKS9_: 337| 749| void push_back(const T &Elt) { 338| 749| if (LLVM_UNLIKELY(this->EndX >= this->CapacityX)) ------------------ | | 171| 749|#define LLVM_UNLIKELY(EXPR) __builtin_expect((bool)(EXPR), false) | | ------------------ | | | Branch (171:29): [True: 0, False: 749] | | ------------------ ------------------ 339| 0| this->grow(); 340| 749| memcpy(reinterpret_cast(this->end()), &Elt, sizeof(T)); 341| 749| this->setEnd(this->end()+1); 342| 749| } _ZN7llvm_ks25SmallVectorTemplateCommonINSt3__14pairINS2_IPNS_9MCSectionEPKNS_6MCExprEEES8_EEvE6setEndEPS9_: 95| 749| void setEnd(T *P) { this->EndX = P; } _ZN7llvm_ks25SmallVectorTemplateCommonINSt3__14pairINS2_IPNS_9MCSectionEPKNS_6MCExprEEES8_EEvE3endEv: 117| 19.8k| iterator end() { return (iterator)this->EndX; } _ZN7llvm_ks25SmallVectorTemplateCommonINSt3__14pairINS2_IPNS_9MCSectionEPKNS_6MCExprEEES8_EEvE4backEv: 163| 17.6k| reference back() { 164| 17.6k| assert(!empty()); ------------------ | Branch (164:5): [True: 17.6k, False: 0] ------------------ 165| 17.6k| return end()[-1]; 166| 17.6k| } _ZNK7llvm_ks25SmallVectorTemplateCommonINS_9StringRefEvE5beginEv: 115| 92.4k| const_iterator begin() const { return (const_iterator)this->BeginX; } _ZNK7llvm_ks25SmallVectorTemplateCommonINS_9StringRefEvE4sizeEv: 132| 92.4k| size_type size() const { return end()-begin(); } _ZNK7llvm_ks25SmallVectorTemplateCommonINS_9StringRefEvE3endEv: 119| 92.4k| const_iterator end() const { return (const_iterator)this->EndX; } _ZN7llvm_ks15SmallVectorImplIcE5clearEv: 378| 1.49k| void clear() { 379| 1.49k| this->destroy_range(this->begin(), this->end()); 380| 1.49k| this->EndX = this->BeginX; 381| 1.49k| } _ZN7llvm_ks15SmallVectorImplIcE6appendIPKcEEvT_S5_: 423| 1.90M| void append(in_iter in_start, in_iter in_end) { 424| 1.90M| size_type NumInputs = std::distance(in_start, in_end); 425| | // Grow allocated space if needed. 426| 1.90M| if (NumInputs > size_type(this->capacity_ptr()-this->end())) ------------------ | Branch (426:9): [True: 13.8k, False: 1.89M] ------------------ 427| 13.8k| this->grow(this->size()+NumInputs); 428| | 429| | // Copy the new elements over. 430| 1.90M| this->uninitialized_copy(in_start, in_end, this->end()); 431| 1.90M| this->setEnd(this->end() + NumInputs); 432| 1.90M| } _ZN7llvm_ks25SmallVectorTemplateCommonIcvE12capacity_ptrEv: 121| 1.91M| iterator capacity_ptr() { return (iterator)this->CapacityX; } _ZN7llvm_ks23SmallVectorTemplateBaseIcLb1EE18uninitialized_copyIKccEEvPT_S5_PT0_PNSt3__19enable_ifIXsr3std7is_sameINS8_12remove_constIS4_E4typeES6_EE5valueEvE4typeE: 322| 1.92M| T2>::value>::type * = nullptr) { 323| | // Use memcpy for PODs iterated by pointers (which includes SmallVector 324| | // iterators): std::uninitialized_copy optimizes to memmove, but we can 325| | // use memcpy here. Note that I and E are iterators and thus might be 326| | // invalid for memcpy if they are equal. 327| 1.92M| if (I != E) ------------------ | Branch (327:9): [True: 1.92M, False: 177] ------------------ 328| 1.92M| memcpy(Dest, I, (E - I) * sizeof(T)); 329| 1.92M| } _ZN7llvm_ks23SmallVectorTemplateBaseINSt3__14pairIPvmEELb1EE9push_backERKS4_: 337| 9| void push_back(const T &Elt) { 338| 9| if (LLVM_UNLIKELY(this->EndX >= this->CapacityX)) ------------------ | | 171| 9|#define LLVM_UNLIKELY(EXPR) __builtin_expect((bool)(EXPR), false) | | ------------------ | | | Branch (171:29): [True: 9, False: 0] | | ------------------ ------------------ 339| 9| this->grow(); 340| 9| memcpy(reinterpret_cast(this->end()), &Elt, sizeof(T)); 341| 9| this->setEnd(this->end()+1); 342| 9| } _ZN7llvm_ks23SmallVectorTemplateBaseINSt3__14pairIPvmEELb1EE4growEm: 333| 9| void grow(size_t MinSize = 0) { 334| 9| this->grow_pod(MinSize*sizeof(T), sizeof(T)); 335| 9| } _ZN7llvm_ks25SmallVectorTemplateCommonINSt3__14pairIPvmEEvE8grow_podEmm: 80| 9| void grow_pod(size_t MinSizeInBytes, size_t TSize) { 81| 9| SmallVectorBase::grow_pod(&FirstEl, MinSizeInBytes, TSize); 82| 9| } _ZN7llvm_ks25SmallVectorTemplateCommonINSt3__14pairIPvmEEvE3endEv: 117| 28.4k| iterator end() { return (iterator)this->EndX; } _ZN7llvm_ks25SmallVectorTemplateCommonINSt3__14pairIPvmEEvE6setEndEPS4_: 95| 9| void setEnd(T *P) { this->EndX = P; } _ZNK7llvm_ks25SmallVectorTemplateCommonIPvvE4sizeEv: 132| 3.81k| size_type size() const { return end()-begin(); } _ZNK7llvm_ks25SmallVectorTemplateCommonIPvvE3endEv: 119| 3.81k| const_iterator end() const { return (const_iterator)this->EndX; } _ZNK7llvm_ks25SmallVectorTemplateCommonIPvvE5beginEv: 115| 3.81k| const_iterator begin() const { return (const_iterator)this->BeginX; } _ZN7llvm_ks23SmallVectorTemplateBaseIPvLb1EE9push_backERKS1_: 337| 3.81k| void push_back(const T &Elt) { 338| 3.81k| if (LLVM_UNLIKELY(this->EndX >= this->CapacityX)) ------------------ | | 171| 3.81k|#define LLVM_UNLIKELY(EXPR) __builtin_expect((bool)(EXPR), false) | | ------------------ | | | Branch (171:29): [True: 86, False: 3.72k] | | ------------------ ------------------ 339| 86| this->grow(); 340| 3.81k| memcpy(reinterpret_cast(this->end()), &Elt, sizeof(T)); 341| 3.81k| this->setEnd(this->end()+1); 342| 3.81k| } _ZN7llvm_ks23SmallVectorTemplateBaseIPvLb1EE4growEm: 333| 86| void grow(size_t MinSize = 0) { 334| 86| this->grow_pod(MinSize*sizeof(T), sizeof(T)); 335| 86| } _ZN7llvm_ks25SmallVectorTemplateCommonIPvvE8grow_podEmm: 80| 86| void grow_pod(size_t MinSizeInBytes, size_t TSize) { 81| 86| SmallVectorBase::grow_pod(&FirstEl, MinSizeInBytes, TSize); 82| 86| } _ZN7llvm_ks25SmallVectorTemplateCommonIPvvE3endEv: 117| 38.7k| iterator end() { return (iterator)this->EndX; } _ZN7llvm_ks25SmallVectorTemplateCommonIPvvE6setEndEPS1_: 95| 6.33k| void setEnd(T *P) { this->EndX = P; } _ZN7llvm_ks25SmallVectorTemplateCommonINS_8AsmTokenEvE5beginEv: 113| 75.9M| iterator begin() { return (iterator)this->BeginX; } _ZN7llvm_ks15SmallVectorImplINS_8AsmTokenEE5eraseEPS1_: 462| 25.3M| iterator erase(iterator I) { 463| 25.3M| assert(I >= this->begin() && "Iterator to erase is out of bounds."); ------------------ | Branch (463:5): [True: 25.3M, False: 0] | Branch (463:5): [True: 25.3M, Folded] | Branch (463:5): [True: 25.3M, False: 0] ------------------ 464| 25.3M| assert(I < this->end() && "Erasing at past-the-end iterator."); ------------------ | Branch (464:5): [True: 25.3M, False: 0] | Branch (464:5): [True: 25.3M, Folded] | Branch (464:5): [True: 25.3M, False: 0] ------------------ 465| | 466| 25.3M| iterator N = I; 467| | // Shift all elts down one. 468| 25.3M| this->move(I+1, this->end(), I); 469| | // Drop the last elt. 470| 25.3M| this->pop_back(); 471| 25.3M| return(N); 472| 25.3M| } _ZN7llvm_ks25SmallVectorTemplateCommonINS_8AsmTokenEvE3endEv: 117| 151M| iterator end() { return (iterator)this->EndX; } _ZN7llvm_ks23SmallVectorTemplateBaseINS_8AsmTokenELb0EE4moveIPS1_S4_EET0_T_S6_S5_: 191| 25.3M| static It2 move(It1 I, It1 E, It2 Dest) { 192| 25.3M| for (; I != E; ++I, ++Dest) ------------------ | Branch (192:12): [True: 0, False: 25.3M] ------------------ 193| 0| *Dest = ::std::move(*I); 194| 25.3M| return Dest; 195| 25.3M| } _ZN7llvm_ks23SmallVectorTemplateBaseINS_8AsmTokenELb0EE8pop_backEv: 243| 25.3M| void pop_back() { 244| 25.3M| this->setEnd(this->end()-1); 245| 25.3M| this->end()->~T(); 246| 25.3M| } _ZN7llvm_ks25SmallVectorTemplateCommonINS_8AsmTokenEvE6setEndEPS1_: 95| 50.6M| void setEnd(T *P) { this->EndX = P; } _ZN7llvm_ks15SmallVectorImplINS_8AsmTokenEE12emplace_backIJS1_EEEvDpOT_: 659| 25.3M| template void emplace_back(ArgTypes &&... Args) { 660| 25.3M| if (LLVM_UNLIKELY(this->EndX >= this->CapacityX)) ------------------ | | 171| 25.3M|#define LLVM_UNLIKELY(EXPR) __builtin_expect((bool)(EXPR), false) | | ------------------ | | | Branch (171:29): [True: 0, False: 25.3M] | | ------------------ ------------------ 661| 0| this->grow(); 662| 25.3M| ::new ((void *)this->end()) T(std::forward(Args)...); 663| 25.3M| this->setEnd(this->end() + 1); 664| 25.3M| } _ZNK7llvm_ks25SmallVectorTemplateCommonINS_8AsmTokenEvE5beginEv: 115| 130M| const_iterator begin() const { return (const_iterator)this->BeginX; } _ZNK7llvm_ks25SmallVectorTemplateCommonINS_8AsmTokenEvE4sizeEv: 132| 65.2M| size_type size() const { return end()-begin(); } _ZNK7llvm_ks25SmallVectorTemplateCommonINS_8AsmTokenEvE3endEv: 119| 65.2M| const_iterator end() const { return (const_iterator)this->EndX; } _ZN7llvm_ks23SmallVectorTemplateBaseINS_8AsmTokenELb0EE13destroy_rangeEPS1_S3_: 180| 749| static void destroy_range(T *S, T *E) { 181| 1.49k| while (S != E) { ------------------ | Branch (181:12): [True: 749, False: 749] ------------------ 182| 749| --E; 183| 749| E->~T(); 184| 749| } 185| 749| } _ZNK7llvm_ks25SmallVectorTemplateCommonINS_8AsmTokenEvE7isSmallEv: 86| 749| bool isSmall() const { 87| 749| return BeginX == static_cast(&FirstEl); 88| 749| } _ZN7llvm_ks25SmallVectorTemplateCommonINS_8AsmTokenEvE5frontEv: 154| 25.3M| reference front() { 155| 25.3M| assert(!empty()); ------------------ | Branch (155:5): [True: 25.3M, False: 0] ------------------ 156| 25.3M| return begin()[0]; 157| 25.3M| } _ZNK7llvm_ks25SmallVectorTemplateCommonINS_8AsmTokenEvEixEm: 149| 65.2M| const_reference operator[](size_type idx) const { 150| 65.2M| assert(idx < size()); ------------------ | Branch (150:5): [True: 65.2M, False: 0] ------------------ 151| 65.2M| return begin()[idx]; 152| 65.2M| } _ZN7llvm_ks23SmallVectorTemplateBaseINS_7SMFixItELb0EE13destroy_rangeEPS1_S3_: 180| 46.3k| static void destroy_range(T *S, T *E) { 181| 46.3k| while (S != E) { ------------------ | Branch (181:12): [True: 0, False: 46.3k] ------------------ 182| 0| --E; 183| 0| E->~T(); 184| 0| } 185| 46.3k| } _ZN7llvm_ks25SmallVectorTemplateCommonINS_7SMFixItEvE5beginEv: 113| 92.6k| iterator begin() { return (iterator)this->BeginX; } _ZN7llvm_ks25SmallVectorTemplateCommonINS_7SMFixItEvE3endEv: 117| 231k| iterator end() { return (iterator)this->EndX; } _ZNK7llvm_ks25SmallVectorTemplateCommonINS_7SMFixItEvE7isSmallEv: 86| 46.3k| bool isSmall() const { 87| 46.3k| return BeginX == static_cast(&FirstEl); 88| 46.3k| } _ZNK7llvm_ks25SmallVectorTemplateCommonINS_7SMFixItEvE5beginEv: 115| 21.5k| const_iterator begin() const { return (const_iterator)this->BeginX; } _ZNK7llvm_ks25SmallVectorTemplateCommonINS_7SMFixItEvE4sizeEv: 132| 10.7k| size_type size() const { return end()-begin(); } _ZNK7llvm_ks25SmallVectorTemplateCommonINS_7SMFixItEvE3endEv: 119| 10.7k| const_iterator end() const { return (const_iterator)this->EndX; } _ZN7llvm_ks25SmallVectorTemplateCommonINS_7SMFixItEvE6setEndEPS1_: 95| 46.3k| void setEnd(T *P) { this->EndX = P; } _ZNK7llvm_ks25SmallVectorTemplateCommonINS_7SMFixItEvE4dataEv: 141| 10.7k| const_pointer data() const { return const_pointer(begin()); } _ZN7llvm_ks11SmallVectorIcLj128EEC2Ev: 872| 42.5k| SmallVector() : SmallVectorImpl(N) { 873| 42.5k| } _ZN7llvm_ks11SmallVectorIPvLj4EEC2Ev: 872| 4.49k| SmallVector() : SmallVectorImpl(N) { 873| 4.49k| } _ZN7llvm_ks15SmallVectorImplIPvEC2Ej: 364| 4.49k| : SmallVectorTemplateBase::value>(N*sizeof(T)) { 365| 4.49k| } _ZN7llvm_ks23SmallVectorTemplateBaseIPvLb1EEC2Em: 281| 4.49k| SmallVectorTemplateBase(size_t Size) : SmallVectorTemplateCommon(Size) {} _ZN7llvm_ks25SmallVectorTemplateCommonIPvvEC2Em: 78| 4.49k| SmallVectorTemplateCommon(size_t Size) : SmallVectorBase(&FirstEl, Size) {} _ZN7llvm_ks11SmallVectorINSt3__14pairIPvmEELj0EEC2Ev: 872| 4.49k| SmallVector() : SmallVectorImpl(N) { 873| 4.49k| } _ZN7llvm_ks15SmallVectorImplINSt3__14pairIPvmEEEC2Ej: 364| 4.49k| : SmallVectorTemplateBase::value>(N*sizeof(T)) { 365| 4.49k| } _ZN7llvm_ks23SmallVectorTemplateBaseINSt3__14pairIPvmEELb1EEC2Em: 281| 4.49k| SmallVectorTemplateBase(size_t Size) : SmallVectorTemplateCommon(Size) {} _ZN7llvm_ks25SmallVectorTemplateCommonINSt3__14pairIPvmEEvEC2Em: 78| 4.49k| SmallVectorTemplateCommon(size_t Size) : SmallVectorBase(&FirstEl, Size) {} _ZN7llvm_ks15SmallVectorImplIPvED2Ev: 368| 4.49k| ~SmallVectorImpl() { 369| | // Destroy the constructed elements in the vector. 370| 4.49k| this->destroy_range(this->begin(), this->end()); 371| | 372| | // If this wasn't grown from the inline copy, deallocate the old space. 373| 4.49k| if (!this->isSmall()) ------------------ | Branch (373:9): [True: 73, False: 4.42k] ------------------ 374| 73| free(this->begin()); 375| 4.49k| } _ZN7llvm_ks23SmallVectorTemplateBaseIPvLb1EE13destroy_rangeEPS1_S3_: 284| 7.01k| static void destroy_range(T *, T *) {} _ZN7llvm_ks25SmallVectorTemplateCommonIPvvE5beginEv: 113| 32.4k| iterator begin() { return (iterator)this->BeginX; } _ZNK7llvm_ks25SmallVectorTemplateCommonIPvvE7isSmallEv: 86| 4.49k| bool isSmall() const { 87| 4.49k| return BeginX == static_cast(&FirstEl); 88| 4.49k| } _ZN7llvm_ks25SmallVectorTemplateCommonINSt3__14pairIPvmEEvE5beginEv: 113| 28.4k| iterator begin() { return (iterator)this->BeginX; } _ZN7llvm_ks15SmallVectorImplINSt3__14pairIPvmEEED2Ev: 368| 4.49k| ~SmallVectorImpl() { 369| | // Destroy the constructed elements in the vector. 370| 4.49k| this->destroy_range(this->begin(), this->end()); 371| | 372| | // If this wasn't grown from the inline copy, deallocate the old space. 373| 4.49k| if (!this->isSmall()) ------------------ | Branch (373:9): [True: 6, False: 4.48k] ------------------ 374| 6| free(this->begin()); 375| 4.49k| } _ZN7llvm_ks23SmallVectorTemplateBaseINSt3__14pairIPvmEELb1EE13destroy_rangeEPS4_S6_: 284| 11.2k| static void destroy_range(T *, T *) {} _ZNK7llvm_ks25SmallVectorTemplateCommonINSt3__14pairIPvmEEvE7isSmallEv: 86| 4.49k| bool isSmall() const { 87| 4.49k| return BeginX == static_cast(&FirstEl); 88| 4.49k| } _ZN7llvm_ks25SmallVectorTemplateCommonIPvvE4backEv: 163| 3.48k| reference back() { 164| 3.48k| assert(!empty()); ------------------ | Branch (164:5): [True: 3.48k, False: 0] ------------------ 165| 3.48k| return end()[-1]; 166| 3.48k| } _ZN7llvm_ks15SmallVectorImplINSt3__14pairIPvmEEE5clearEv: 378| 6.74k| void clear() { 379| 6.74k| this->destroy_range(this->begin(), this->end()); 380| 6.74k| this->EndX = this->BeginX; 381| 6.74k| } _ZN7llvm_ks25SmallVectorTemplateCommonIPvvE5frontEv: 154| 2.52k| reference front() { 155| 2.52k| assert(!empty()); ------------------ | Branch (155:5): [True: 2.52k, False: 0] ------------------ 156| 2.52k| return begin()[0]; 157| 2.52k| } _ZN7llvm_ks15SmallVectorImplIPvE5eraseEPS1_S3_: 474| 2.52k| iterator erase(iterator S, iterator E) { 475| 2.52k| assert(S >= this->begin() && "Range to erase is out of bounds."); ------------------ | Branch (475:5): [True: 2.52k, False: 0] | Branch (475:5): [True: 2.52k, Folded] | Branch (475:5): [True: 2.52k, False: 0] ------------------ 476| 2.52k| assert(S <= E && "Trying to erase invalid range."); ------------------ | Branch (476:5): [True: 2.52k, False: 0] | Branch (476:5): [True: 2.52k, Folded] | Branch (476:5): [True: 2.52k, False: 0] ------------------ 477| 2.52k| assert(E <= this->end() && "Trying to erase past the end."); ------------------ | Branch (477:5): [True: 2.52k, False: 0] | Branch (477:5): [True: 2.52k, Folded] | Branch (477:5): [True: 2.52k, False: 0] ------------------ 478| | 479| 2.52k| iterator N = S; 480| | // Shift all elts down. 481| 2.52k| iterator I = this->move(E, this->end(), S); 482| | // Drop the last elts. 483| 2.52k| this->destroy_range(I, this->end()); 484| 2.52k| this->setEnd(I); 485| 2.52k| return(N); 486| 2.52k| } _ZN7llvm_ks23SmallVectorTemplateBaseIPvLb1EE4moveIPS1_S4_EET0_T_S6_S5_: 289| 2.52k| static It2 move(It1 I, It1 E, It2 Dest) { 290| 2.52k| return ::std::copy(I, E, Dest); 291| 2.52k| } _ZN7llvm_ks11SmallVectorIcLj128EEC2IPKcEET_S5_: 881| 16.8k| SmallVector(ItTy S, ItTy E) : SmallVectorImpl(N) { 882| 16.8k| this->append(S, E); 883| 16.8k| } _ZN7llvm_ks15SmallVectorImplIcE6resizeEm: 383| 7.60k| void resize(size_type N) { 384| 7.60k| if (N < this->size()) { ------------------ | Branch (384:9): [True: 0, False: 7.60k] ------------------ 385| 0| this->destroy_range(this->begin()+N, this->end()); 386| 0| this->setEnd(this->begin()+N); 387| 7.60k| } else if (N > this->size()) { ------------------ | Branch (387:16): [True: 0, False: 7.60k] ------------------ 388| 0| if (this->capacity() < N) ------------------ | Branch (388:11): [True: 0, False: 0] ------------------ 389| 0| this->grow(N); 390| 0| for (auto I = this->end(), E = this->begin() + N; I != E; ++I) ------------------ | Branch (390:57): [True: 0, False: 0] ------------------ 391| 0| new (&*I) T(); 392| 0| this->setEnd(this->begin()+N); 393| 0| } 394| 7.60k| } _ZNK7llvm_ks25SmallVectorTemplateCommonIcvE8capacityEv: 136| 19.8k| size_t capacity() const { return capacity_ptr() - begin(); } _ZNK7llvm_ks25SmallVectorTemplateCommonIcvE12capacity_ptrEv: 122| 19.8k| const_iterator capacity_ptr() const { return (const_iterator)this->CapacityX;} _ZN7llvm_ks11SmallVectorIcLj128EEC2ERKS1_: 895| 16.8k| SmallVector(const SmallVector &RHS) : SmallVectorImpl(N) { 896| 16.8k| if (!RHS.empty()) ------------------ | Branch (896:9): [True: 16.8k, False: 0] ------------------ 897| 16.8k| SmallVectorImpl::operator=(RHS); 898| 16.8k| } _ZN7llvm_ks15SmallVectorImplIcEaSERKS1_: 739| 16.8k| operator=(const SmallVectorImpl &RHS) { 740| | // Avoid self-assignment. 741| 16.8k| if (this == &RHS) return *this; ------------------ | Branch (741:7): [True: 0, False: 16.8k] ------------------ 742| | 743| | // If we already have sufficient space, assign the common elements, then 744| | // destroy any excess. 745| 16.8k| size_t RHSSize = RHS.size(); 746| 16.8k| size_t CurSize = this->size(); 747| 16.8k| if (CurSize >= RHSSize) { ------------------ | Branch (747:7): [True: 0, False: 16.8k] ------------------ 748| | // Assign common elements. 749| 0| iterator NewEnd; 750| 0| if (RHSSize) ------------------ | Branch (750:9): [True: 0, False: 0] ------------------ 751| 0| NewEnd = std::copy(RHS.begin(), RHS.begin()+RHSSize, this->begin()); 752| 0| else 753| 0| NewEnd = this->begin(); 754| | 755| | // Destroy excess elements. 756| 0| this->destroy_range(NewEnd, this->end()); 757| | 758| | // Trim. 759| 0| this->setEnd(NewEnd); 760| 0| return *this; 761| 0| } 762| | 763| | // If we have to grow to have enough elements, destroy the current elements. 764| | // This allows us to avoid copying them during the grow. 765| | // FIXME: don't do this if they're efficiently moveable. 766| 16.8k| if (this->capacity() < RHSSize) { ------------------ | Branch (766:7): [True: 72, False: 16.8k] ------------------ 767| | // Destroy current elements. 768| 72| this->destroy_range(this->begin(), this->end()); 769| 72| this->setEnd(this->begin()); 770| 72| CurSize = 0; 771| 72| this->grow(RHSSize); 772| 16.8k| } else if (CurSize) { ------------------ | Branch (772:14): [True: 0, False: 16.8k] ------------------ 773| | // Otherwise, use assignment for the already-constructed elements. 774| 0| std::copy(RHS.begin(), RHS.begin()+CurSize, this->begin()); 775| 0| } 776| | 777| | // Copy construct the new elements in place. 778| 16.8k| this->uninitialized_copy(RHS.begin()+CurSize, RHS.end(), 779| 16.8k| this->begin()+CurSize); 780| | 781| | // Set end. 782| 16.8k| this->setEnd(this->begin()+RHSSize); 783| 16.8k| return *this; 784| 16.8k|} _ZN7llvm_ks11SmallVectorIcLj64EEC2Ev: 872| 5.74k| SmallVector() : SmallVectorImpl(N) { 873| 5.74k| } _ZN7llvm_ks23SmallVectorTemplateBaseIcLb1EE18uninitialized_copyIccEEvPT_S4_PT0_PNSt3__19enable_ifIXsr3std7is_sameINS7_12remove_constIS3_E4typeES5_EE5valueEvE4typeE: 322| 8.24k| T2>::value>::type * = nullptr) { 323| | // Use memcpy for PODs iterated by pointers (which includes SmallVector 324| | // iterators): std::uninitialized_copy optimizes to memmove, but we can 325| | // use memcpy here. Note that I and E are iterators and thus might be 326| | // invalid for memcpy if they are equal. 327| 8.24k| if (I != E) ------------------ | Branch (327:9): [True: 8.24k, False: 0] ------------------ 328| 8.24k| memcpy(Dest, I, (E - I) * sizeof(T)); 329| 8.24k| } _ZN7llvm_ks15SmallVectorImplIPNS_14MCDataFragmentEED2Ev: 368| 749| ~SmallVectorImpl() { 369| | // Destroy the constructed elements in the vector. 370| 749| this->destroy_range(this->begin(), this->end()); 371| | 372| | // If this wasn't grown from the inline copy, deallocate the old space. 373| 749| if (!this->isSmall()) ------------------ | Branch (373:9): [True: 0, False: 749] ------------------ 374| 0| free(this->begin()); 375| 749| } _ZN7llvm_ks23SmallVectorTemplateBaseIPNS_14MCDataFragmentELb1EE13destroy_rangeEPS2_S4_: 284| 749| static void destroy_range(T *, T *) {} _ZN7llvm_ks25SmallVectorTemplateCommonIPNS_14MCDataFragmentEvE5beginEv: 113| 749| iterator begin() { return (iterator)this->BeginX; } _ZN7llvm_ks25SmallVectorTemplateCommonIPNS_14MCDataFragmentEvE3endEv: 117| 749| iterator end() { return (iterator)this->EndX; } _ZNK7llvm_ks25SmallVectorTemplateCommonIPNS_14MCDataFragmentEvE7isSmallEv: 86| 749| bool isSmall() const { 87| 749| return BeginX == static_cast(&FirstEl); 88| 749| } _ZN7llvm_ks11SmallVectorIcLj32EEC2Ev: 872| 888| SmallVector() : SmallVectorImpl(N) { 873| 888| } _ZN7llvm_ks15SmallVectorImplINS_7MCFixupEED2Ev: 368| 9.12k| ~SmallVectorImpl() { 369| | // Destroy the constructed elements in the vector. 370| 9.12k| this->destroy_range(this->begin(), this->end()); 371| | 372| | // If this wasn't grown from the inline copy, deallocate the old space. 373| 9.12k| if (!this->isSmall()) ------------------ | Branch (373:9): [True: 103, False: 9.02k] ------------------ 374| 103| free(this->begin()); 375| 9.12k| } _ZN7llvm_ks11SmallVectorIPNS_14MCDataFragmentELj4EEC2Ev: 872| 749| SmallVector() : SmallVectorImpl(N) { 873| 749| } _ZN7llvm_ks15SmallVectorImplIPNS_14MCDataFragmentEEC2Ej: 364| 749| : SmallVectorTemplateBase::value>(N*sizeof(T)) { 365| 749| } _ZN7llvm_ks23SmallVectorTemplateBaseIPNS_14MCDataFragmentELb1EEC2Em: 281| 749| SmallVectorTemplateBase(size_t Size) : SmallVectorTemplateCommon(Size) {} _ZN7llvm_ks25SmallVectorTemplateCommonIPNS_14MCDataFragmentEvEC2Em: 78| 749| SmallVectorTemplateCommon(size_t Size) : SmallVectorBase(&FirstEl, Size) {} _ZN7llvm_ks11SmallVectorIcLj256EEC2Ev: 872| 72.7k| SmallVector() : SmallVectorImpl(N) { 873| 72.7k| } _ZN7llvm_ks15SmallVectorImplIcE6appendIPcEEvT_S4_: 423| 8.24k| void append(in_iter in_start, in_iter in_end) { 424| 8.24k| size_type NumInputs = std::distance(in_start, in_end); 425| | // Grow allocated space if needed. 426| 8.24k| if (NumInputs > size_type(this->capacity_ptr()-this->end())) ------------------ | Branch (426:9): [True: 267, False: 7.97k] ------------------ 427| 267| this->grow(this->size()+NumInputs); 428| | 429| | // Copy the new elements over. 430| 8.24k| this->uninitialized_copy(in_start, in_end, this->end()); 431| 8.24k| this->setEnd(this->end() + NumInputs); 432| 8.24k| } _ZNK7llvm_ks25SmallVectorTemplateCommonINS_7MCFixupEvE4sizeEv: 132| 46.6k| size_type size() const { return end()-begin(); } _ZNK7llvm_ks25SmallVectorTemplateCommonINS_7MCFixupEvE3endEv: 119| 46.6k| const_iterator end() const { return (const_iterator)this->EndX; } _ZNK7llvm_ks25SmallVectorTemplateCommonINS_7MCFixupEvE5beginEv: 115| 46.9k| const_iterator begin() const { return (const_iterator)this->BeginX; } _ZN7llvm_ks25SmallVectorTemplateCommonINS_7MCFixupEvEixEm: 144| 21.6k| reference operator[](size_type idx) { 145| 21.6k| assert(idx < size()); ------------------ | Branch (145:5): [True: 21.6k, False: 0] ------------------ 146| 21.6k| return begin()[idx]; 147| 21.6k| } _ZN7llvm_ks23SmallVectorTemplateBaseINS_7MCFixupELb1EE9push_backERKS1_: 337| 13.7k| void push_back(const T &Elt) { 338| 13.7k| if (LLVM_UNLIKELY(this->EndX >= this->CapacityX)) ------------------ | | 171| 13.7k|#define LLVM_UNLIKELY(EXPR) __builtin_expect((bool)(EXPR), false) | | ------------------ | | | Branch (171:29): [True: 397, False: 13.3k] | | ------------------ ------------------ 339| 397| this->grow(); 340| 13.7k| memcpy(reinterpret_cast(this->end()), &Elt, sizeof(T)); 341| 13.7k| this->setEnd(this->end()+1); 342| 13.7k| } _ZN7llvm_ks23SmallVectorTemplateBaseINS_7MCFixupELb1EE4growEm: 333| 397| void grow(size_t MinSize = 0) { 334| 397| this->grow_pod(MinSize*sizeof(T), sizeof(T)); 335| 397| } _ZN7llvm_ks25SmallVectorTemplateCommonINS_7MCFixupEvE8grow_podEmm: 80| 397| void grow_pod(size_t MinSizeInBytes, size_t TSize) { 81| 397| SmallVectorBase::grow_pod(&FirstEl, MinSizeInBytes, TSize); 82| 397| } _ZN7llvm_ks25SmallVectorTemplateCommonINS_7MCFixupEvE6setEndEPS1_: 95| 13.7k| void setEnd(T *P) { this->EndX = P; } _ZN7llvm_ks11SmallVectorINS_7MCFixupELj4EEC2Ev: 872| 9.12k| SmallVector() : SmallVectorImpl(N) { 873| 9.12k| } _ZN7llvm_ks15SmallVectorImplINS_7MCFixupEEC2Ej: 364| 9.12k| : SmallVectorTemplateBase::value>(N*sizeof(T)) { 365| 9.12k| } _ZN7llvm_ks23SmallVectorTemplateBaseINS_7MCFixupELb1EEC2Em: 281| 9.12k| SmallVectorTemplateBase(size_t Size) : SmallVectorTemplateCommon(Size) {} _ZN7llvm_ks25SmallVectorTemplateCommonINS_7MCFixupEvEC2Em: 78| 9.12k| SmallVectorTemplateCommon(size_t Size) : SmallVectorBase(&FirstEl, Size) {} _ZN7llvm_ks15SmallVectorImplIPNS_9MCSectionEED2Ev: 368| 312| ~SmallVectorImpl() { 369| | // Destroy the constructed elements in the vector. 370| 312| this->destroy_range(this->begin(), this->end()); 371| | 372| | // If this wasn't grown from the inline copy, deallocate the old space. 373| 312| if (!this->isSmall()) ------------------ | Branch (373:9): [True: 0, False: 312] ------------------ 374| 0| free(this->begin()); 375| 312| } _ZN7llvm_ks23SmallVectorTemplateBaseIPNS_9MCSectionELb1EE13destroy_rangeEPS2_S4_: 284| 312| static void destroy_range(T *, T *) {} _ZN7llvm_ks25SmallVectorTemplateCommonIPNS_9MCSectionEvE5beginEv: 113| 944| iterator begin() { return (iterator)this->BeginX; } _ZN7llvm_ks25SmallVectorTemplateCommonIPNS_9MCSectionEvE3endEv: 117| 944| iterator end() { return (iterator)this->EndX; } _ZNK7llvm_ks25SmallVectorTemplateCommonIPNS_9MCSectionEvE7isSmallEv: 86| 312| bool isSmall() const { 87| 312| return BeginX == static_cast(&FirstEl); 88| 312| } _ZN7llvm_ks15SmallVectorImplINS_9MCOperandEED2Ev: 368| 24.8k| ~SmallVectorImpl() { 369| | // Destroy the constructed elements in the vector. 370| 24.8k| this->destroy_range(this->begin(), this->end()); 371| | 372| | // If this wasn't grown from the inline copy, deallocate the old space. 373| 24.8k| if (!this->isSmall()) ------------------ | Branch (373:9): [True: 0, False: 24.8k] ------------------ 374| 0| free(this->begin()); 375| 24.8k| } _ZN7llvm_ks11SmallVectorIPNS_9MCSectionELj16EEC2Ev: 872| 312| SmallVector() : SmallVectorImpl(N) { 873| 312| } _ZN7llvm_ks15SmallVectorImplIPNS_9MCSectionEEC2Ej: 364| 312| : SmallVectorTemplateBase::value>(N*sizeof(T)) { 365| 312| } _ZN7llvm_ks23SmallVectorTemplateBaseIPNS_9MCSectionELb1EEC2Em: 281| 312| SmallVectorTemplateBase(size_t Size) : SmallVectorTemplateCommon(Size) {} _ZN7llvm_ks25SmallVectorTemplateCommonIPNS_9MCSectionEvEC2Em: 78| 312| SmallVectorTemplateCommon(size_t Size) : SmallVectorBase(&FirstEl, Size) {} _ZN7llvm_ks23SmallVectorTemplateBaseIPNS_9MCSectionELb1EE9push_backERKS2_: 337| 316| void push_back(const T &Elt) { 338| 316| if (LLVM_UNLIKELY(this->EndX >= this->CapacityX)) ------------------ | | 171| 316|#define LLVM_UNLIKELY(EXPR) __builtin_expect((bool)(EXPR), false) | | ------------------ | | | Branch (171:29): [True: 0, False: 316] | | ------------------ ------------------ 339| 0| this->grow(); 340| 316| memcpy(reinterpret_cast(this->end()), &Elt, sizeof(T)); 341| 316| this->setEnd(this->end()+1); 342| 316| } _ZN7llvm_ks25SmallVectorTemplateCommonIPNS_9MCSectionEvE6setEndEPS2_: 95| 316| void setEnd(T *P) { this->EndX = P; } _ZN7llvm_ks15SmallVectorImplIPNS_8MCSymbolEED2Ev: 368| 749| ~SmallVectorImpl() { 369| | // Destroy the constructed elements in the vector. 370| 749| this->destroy_range(this->begin(), this->end()); 371| | 372| | // If this wasn't grown from the inline copy, deallocate the old space. 373| 749| if (!this->isSmall()) ------------------ | Branch (373:9): [True: 51, False: 698] ------------------ 374| 51| free(this->begin()); 375| 749| } _ZN7llvm_ks11SmallVectorINS_9MCOperandELj8EEC2Ev: 872| 8.35k| SmallVector() : SmallVectorImpl(N) { 873| 8.35k| } _ZN7llvm_ks15SmallVectorImplINS_9MCOperandEEC2Ej: 364| 24.8k| : SmallVectorTemplateBase::value>(N*sizeof(T)) { 365| 24.8k| } _ZN7llvm_ks23SmallVectorTemplateBaseINS_9MCOperandELb1EEC2Em: 281| 24.8k| SmallVectorTemplateBase(size_t Size) : SmallVectorTemplateCommon(Size) {} _ZN7llvm_ks25SmallVectorTemplateCommonINS_9MCOperandEvEC2Em: 78| 24.8k| SmallVectorTemplateCommon(size_t Size) : SmallVectorBase(&FirstEl, Size) {} _ZN7llvm_ks11SmallVectorINS_9MCOperandELj8EEC2ERKS2_: 895| 16.4k| SmallVector(const SmallVector &RHS) : SmallVectorImpl(N) { 896| 16.4k| if (!RHS.empty()) ------------------ | Branch (896:9): [True: 16.4k, False: 0] ------------------ 897| 16.4k| SmallVectorImpl::operator=(RHS); 898| 16.4k| } _ZN7llvm_ks11SmallVectorIPNS_8MCSymbolELj2EEC2Ev: 872| 749| SmallVector() : SmallVectorImpl(N) { 873| 749| } _ZN7llvm_ks15SmallVectorImplIPNS_8MCSymbolEEC2Ej: 364| 749| : SmallVectorTemplateBase::value>(N*sizeof(T)) { 365| 749| } _ZN7llvm_ks23SmallVectorTemplateBaseIPNS_8MCSymbolELb1EEC2Em: 281| 749| SmallVectorTemplateBase(size_t Size) : SmallVectorTemplateCommon(Size) {} _ZN7llvm_ks25SmallVectorTemplateCommonIPNS_8MCSymbolEvEC2Em: 78| 749| SmallVectorTemplateCommon(size_t Size) : SmallVectorBase(&FirstEl, Size) {} _ZN7llvm_ks15SmallVectorImplIcE6resizeEmRKc: 396| 2.94k| void resize(size_type N, const T &NV) { 397| 2.94k| if (N < this->size()) { ------------------ | Branch (397:9): [True: 0, False: 2.94k] ------------------ 398| 0| this->destroy_range(this->begin()+N, this->end()); 399| 0| this->setEnd(this->begin()+N); 400| 2.94k| } else if (N > this->size()) { ------------------ | Branch (400:16): [True: 2.94k, False: 0] ------------------ 401| 2.94k| if (this->capacity() < N) ------------------ | Branch (401:11): [True: 57, False: 2.88k] ------------------ 402| 57| this->grow(N); 403| 2.94k| std::uninitialized_fill(this->end(), this->begin()+N, NV); 404| 2.94k| this->setEnd(this->begin()+N); 405| 2.94k| } 406| 2.94k| } _ZN7llvm_ks23SmallVectorTemplateBaseIPNS_8MCSymbolELb1EE9push_backERKS2_: 337| 5.72k| void push_back(const T &Elt) { 338| 5.72k| if (LLVM_UNLIKELY(this->EndX >= this->CapacityX)) ------------------ | | 171| 5.72k|#define LLVM_UNLIKELY(EXPR) __builtin_expect((bool)(EXPR), false) | | ------------------ | | | Branch (171:29): [True: 162, False: 5.56k] | | ------------------ ------------------ 339| 162| this->grow(); 340| 5.72k| memcpy(reinterpret_cast(this->end()), &Elt, sizeof(T)); 341| 5.72k| this->setEnd(this->end()+1); 342| 5.72k| } _ZN7llvm_ks15SmallVectorImplINS_7SMFixItEED2Ev: 368| 46.3k| ~SmallVectorImpl() { 369| | // Destroy the constructed elements in the vector. 370| 46.3k| this->destroy_range(this->begin(), this->end()); 371| | 372| | // If this wasn't grown from the inline copy, deallocate the old space. 373| 46.3k| if (!this->isSmall()) ------------------ | Branch (373:9): [True: 0, False: 46.3k] ------------------ 374| 0| free(this->begin()); 375| 46.3k| } _ZN7llvm_ks11SmallVectorINSt3__110unique_ptrINS_18MCParsedAsmOperandENS1_14default_deleteIS3_EEEELj8EEC2Ev: 872| 150k| SmallVector() : SmallVectorImpl(N) { 873| 150k| } _ZN7llvm_ks15SmallVectorImplINSt3__110unique_ptrINS_18MCParsedAsmOperandENS1_14default_deleteIS3_EEEEEC2Ej: 364| 159k| : SmallVectorTemplateBase::value>(N*sizeof(T)) { 365| 159k| } _ZN7llvm_ks23SmallVectorTemplateBaseINSt3__110unique_ptrINS_18MCParsedAsmOperandENS1_14default_deleteIS3_EEEELb0EEC2Em: 178| 159k| SmallVectorTemplateBase(size_t Size) : SmallVectorTemplateCommon(Size) {} _ZN7llvm_ks25SmallVectorTemplateCommonINSt3__110unique_ptrINS_18MCParsedAsmOperandENS1_14default_deleteIS3_EEEEvEC2Em: 78| 159k| SmallVectorTemplateCommon(size_t Size) : SmallVectorBase(&FirstEl, Size) {} _ZN7llvm_ks11SmallVectorINS_5SMLocELj4EEC2Ev: 872| 7.40k| SmallVector() : SmallVectorImpl(N) { 873| 7.40k| } _ZN7llvm_ks15SmallVectorImplINS_5SMLocEEC2Ej: 364| 7.40k| : SmallVectorTemplateBase::value>(N*sizeof(T)) { 365| 7.40k| } _ZN7llvm_ks23SmallVectorTemplateBaseINS_5SMLocELb1EEC2Em: 281| 7.40k| SmallVectorTemplateBase(size_t Size) : SmallVectorTemplateCommon(Size) {} _ZN7llvm_ks25SmallVectorTemplateCommonINS_5SMLocEvEC2Em: 78| 7.40k| SmallVectorTemplateCommon(size_t Size) : SmallVectorBase(&FirstEl, Size) {} _ZN7llvm_ks15SmallVectorImplINS_5SMLocEE6resizeEm: 383| 15.6k| void resize(size_type N) { 384| 15.6k| if (N < this->size()) { ------------------ | Branch (384:9): [True: 0, False: 15.6k] ------------------ 385| 0| this->destroy_range(this->begin()+N, this->end()); 386| 0| this->setEnd(this->begin()+N); 387| 15.6k| } else if (N > this->size()) { ------------------ | Branch (387:16): [True: 8.54k, False: 7.14k] ------------------ 388| 8.54k| if (this->capacity() < N) ------------------ | Branch (388:11): [True: 415, False: 8.13k] ------------------ 389| 415| this->grow(N); 390| 41.6k| for (auto I = this->end(), E = this->begin() + N; I != E; ++I) ------------------ | Branch (390:57): [True: 33.1k, False: 8.54k] ------------------ 391| 33.1k| new (&*I) T(); 392| 8.54k| this->setEnd(this->begin()+N); 393| 8.54k| } 394| 15.6k| } _ZN7llvm_ks23SmallVectorTemplateBaseINS_5SMLocELb1EE13destroy_rangeEPS1_S3_: 284| 7.40k| static void destroy_range(T *, T *) {} _ZN7llvm_ks25SmallVectorTemplateCommonINS_5SMLocEvE5beginEv: 113| 33.1k| iterator begin() { return (iterator)this->BeginX; } _ZN7llvm_ks25SmallVectorTemplateCommonINS_5SMLocEvE3endEv: 117| 15.9k| iterator end() { return (iterator)this->EndX; } _ZN7llvm_ks25SmallVectorTemplateCommonINS_5SMLocEvE6setEndEPS1_: 95| 8.54k| void setEnd(T *P) { this->EndX = P; } _ZNK7llvm_ks25SmallVectorTemplateCommonINS_5SMLocEvE8capacityEv: 136| 8.54k| size_t capacity() const { return capacity_ptr() - begin(); } _ZNK7llvm_ks25SmallVectorTemplateCommonINS_5SMLocEvE12capacity_ptrEv: 122| 8.54k| const_iterator capacity_ptr() const { return (const_iterator)this->CapacityX;} _ZNK7llvm_ks25SmallVectorTemplateCommonINS_5SMLocEvE5beginEv: 115| 56.9k| const_iterator begin() const { return (const_iterator)this->BeginX; } _ZN7llvm_ks23SmallVectorTemplateBaseINS_5SMLocELb1EE4growEm: 333| 415| void grow(size_t MinSize = 0) { 334| 415| this->grow_pod(MinSize*sizeof(T), sizeof(T)); 335| 415| } _ZN7llvm_ks25SmallVectorTemplateCommonINS_5SMLocEvE8grow_podEmm: 80| 415| void grow_pod(size_t MinSizeInBytes, size_t TSize) { 81| 415| SmallVectorBase::grow_pod(&FirstEl, MinSizeInBytes, TSize); 82| 415| } _ZNK7llvm_ks25SmallVectorTemplateCommonINS_5SMLocEvE4sizeEv: 132| 48.4k| size_type size() const { return end()-begin(); } _ZNK7llvm_ks25SmallVectorTemplateCommonINS_5SMLocEvE3endEv: 119| 48.4k| const_iterator end() const { return (const_iterator)this->EndX; } _ZN7llvm_ks25SmallVectorTemplateCommonINS_5SMLocEvEixEm: 144| 8.50k| reference operator[](size_type idx) { 145| 8.50k| assert(idx < size()); ------------------ | Branch (145:5): [True: 8.50k, False: 0] ------------------ 146| 8.50k| return begin()[idx]; 147| 8.50k| } _ZN7llvm_ks15SmallVectorImplINS_5SMLocEED2Ev: 368| 7.40k| ~SmallVectorImpl() { 369| | // Destroy the constructed elements in the vector. 370| 7.40k| this->destroy_range(this->begin(), this->end()); 371| | 372| | // If this wasn't grown from the inline copy, deallocate the old space. 373| 7.40k| if (!this->isSmall()) ------------------ | Branch (373:9): [True: 150, False: 7.25k] ------------------ 374| 150| free(this->begin()); 375| 7.40k| } _ZNK7llvm_ks25SmallVectorTemplateCommonINS_5SMLocEvE7isSmallEv: 86| 7.40k| bool isSmall() const { 87| 7.40k| return BeginX == static_cast(&FirstEl); 88| 7.40k| } _ZN7llvm_ks15SmallVectorImplINSt3__110unique_ptrINS_18MCParsedAsmOperandENS1_14default_deleteIS3_EEEEED2Ev: 368| 159k| ~SmallVectorImpl() { 369| | // Destroy the constructed elements in the vector. 370| 159k| this->destroy_range(this->begin(), this->end()); 371| | 372| | // If this wasn't grown from the inline copy, deallocate the old space. 373| 159k| if (!this->isSmall()) ------------------ | Branch (373:9): [True: 4, False: 159k] ------------------ 374| 4| free(this->begin()); 375| 159k| } _ZN7llvm_ks23SmallVectorTemplateBaseINSt3__110unique_ptrINS_18MCParsedAsmOperandENS1_14default_deleteIS3_EEEELb0EE13destroy_rangeEPS6_S8_: 180| 162k| static void destroy_range(T *S, T *E) { 181| 181k| while (S != E) { ------------------ | Branch (181:12): [True: 18.2k, False: 162k] ------------------ 182| 18.2k| --E; 183| 18.2k| E->~T(); 184| 18.2k| } 185| 162k| } _ZN7llvm_ks25SmallVectorTemplateCommonINSt3__110unique_ptrINS_18MCParsedAsmOperandENS1_14default_deleteIS3_EEEEvE5beginEv: 113| 167k| iterator begin() { return (iterator)this->BeginX; } _ZN7llvm_ks25SmallVectorTemplateCommonINSt3__110unique_ptrINS_18MCParsedAsmOperandENS1_14default_deleteIS3_EEEEvE3endEv: 117| 198k| iterator end() { return (iterator)this->EndX; } _ZNK7llvm_ks25SmallVectorTemplateCommonINSt3__110unique_ptrINS_18MCParsedAsmOperandENS1_14default_deleteIS3_EEEEvE7isSmallEv: 86| 159k| bool isSmall() const { 87| 159k| return BeginX == static_cast(&FirstEl); 88| 159k| } _ZNK7llvm_ks25SmallVectorTemplateCommonINSt3__110unique_ptrINS_18MCParsedAsmOperandENS1_14default_deleteIS3_EEEEvE4sizeEv: 132| 68.1k| size_type size() const { return end()-begin(); } _ZNK7llvm_ks25SmallVectorTemplateCommonINSt3__110unique_ptrINS_18MCParsedAsmOperandENS1_14default_deleteIS3_EEEEvE3endEv: 119| 68.1k| const_iterator end() const { return (const_iterator)this->EndX; } _ZNK7llvm_ks25SmallVectorTemplateCommonINSt3__110unique_ptrINS_18MCParsedAsmOperandENS1_14default_deleteIS3_EEEEvE5beginEv: 115| 91.8k| const_iterator begin() const { return (const_iterator)this->BeginX; } _ZN7llvm_ks25SmallVectorTemplateCommonINSt3__110unique_ptrINS_18MCParsedAsmOperandENS1_14default_deleteIS3_EEEEvEixEm: 144| 4.43k| reference operator[](size_type idx) { 145| 4.43k| assert(idx < size()); ------------------ | Branch (145:5): [True: 4.43k, False: 0] ------------------ 146| 4.43k| return begin()[idx]; 147| 4.43k| } _ZN7llvm_ks15SmallVectorImplINS_8AsmTokenEED2Ev: 368| 749| ~SmallVectorImpl() { 369| | // Destroy the constructed elements in the vector. 370| 749| this->destroy_range(this->begin(), this->end()); 371| | 372| | // If this wasn't grown from the inline copy, deallocate the old space. 373| 749| if (!this->isSmall()) ------------------ | Branch (373:9): [True: 0, False: 749] ------------------ 374| 0| free(this->begin()); 375| 749| } _ZN7llvm_ks11SmallVectorINS_8AsmTokenELj1EEC2Ev: 872| 749| SmallVector() : SmallVectorImpl(N) { 873| 749| } _ZN7llvm_ks15SmallVectorImplINS_8AsmTokenEEC2Ej: 364| 749| : SmallVectorTemplateBase::value>(N*sizeof(T)) { 365| 749| } _ZN7llvm_ks23SmallVectorTemplateBaseINS_8AsmTokenELb0EEC2Em: 178| 749| SmallVectorTemplateBase(size_t Size) : SmallVectorTemplateCommon(Size) {} _ZN7llvm_ks25SmallVectorTemplateCommonINS_8AsmTokenEvEC2Em: 78| 749| SmallVectorTemplateCommon(size_t Size) : SmallVectorBase(&FirstEl, Size) {} _ZN7llvm_ks15SmallVectorImplINS_8AsmTokenEE12emplace_backIJNS1_9TokenKindENS_9StringRefEEEEvDpOT_: 659| 749| template void emplace_back(ArgTypes &&... Args) { 660| 749| if (LLVM_UNLIKELY(this->EndX >= this->CapacityX)) ------------------ | | 171| 749|#define LLVM_UNLIKELY(EXPR) __builtin_expect((bool)(EXPR), false) | | ------------------ | | | Branch (171:29): [True: 0, False: 749] | | ------------------ ------------------ 661| 0| this->grow(); 662| 749| ::new ((void *)this->end()) T(std::forward(Args)...); 663| 749| this->setEnd(this->end() + 1); 664| 749| } _ZN7llvm_ks15SmallVectorImplINSt3__14pairIjPNS_10MCFragmentEEEED2Ev: 368| 32.6k| ~SmallVectorImpl() { 369| | // Destroy the constructed elements in the vector. 370| 32.6k| this->destroy_range(this->begin(), this->end()); 371| | 372| | // If this wasn't grown from the inline copy, deallocate the old space. 373| 32.6k| if (!this->isSmall()) ------------------ | Branch (373:9): [True: 0, False: 32.6k] ------------------ 374| 0| free(this->begin()); 375| 32.6k| } _ZN7llvm_ks23SmallVectorTemplateBaseINSt3__14pairIjPNS_10MCFragmentEEELb1EE13destroy_rangeEPS5_S7_: 284| 32.6k| static void destroy_range(T *, T *) {} _ZNK7llvm_ks25SmallVectorTemplateCommonINSt3__14pairIjPNS_10MCFragmentEEEvE7isSmallEv: 86| 32.6k| bool isSmall() const { 87| 32.6k| return BeginX == static_cast(&FirstEl); 88| 32.6k| } _ZN7llvm_ks11SmallVectorINSt3__14pairIjPNS_10MCFragmentEEELj1EEC2Ev: 872| 32.6k| SmallVector() : SmallVectorImpl(N) { 873| 32.6k| } _ZN7llvm_ks15SmallVectorImplINSt3__14pairIjPNS_10MCFragmentEEEEC2Ej: 364| 32.6k| : SmallVectorTemplateBase::value>(N*sizeof(T)) { 365| 32.6k| } _ZN7llvm_ks23SmallVectorTemplateBaseINSt3__14pairIjPNS_10MCFragmentEEELb1EEC2Em: 281| 32.6k| SmallVectorTemplateBase(size_t Size) : SmallVectorTemplateCommon(Size) {} _ZN7llvm_ks25SmallVectorTemplateCommonINSt3__14pairIjPNS_10MCFragmentEEEvEC2Em: 78| 32.6k| SmallVectorTemplateCommon(size_t Size) : SmallVectorBase(&FirstEl, Size) {} _ZN7llvm_ks25SmallVectorTemplateCommonINSt3__14pairIjPNS_10MCFragmentEEEvE5beginEv: 113| 32.6k| iterator begin() { return (iterator)this->BeginX; } _ZN7llvm_ks25SmallVectorTemplateCommonINSt3__14pairIjPNS_10MCFragmentEEEvE3endEv: 117| 32.6k| iterator end() { return (iterator)this->EndX; } _ZN7llvm_ks25SmallVectorTemplateCommonINS_9StringRefEvEixEm: 144| 42.3k| reference operator[](size_type idx) { 145| 42.3k| assert(idx < size()); ------------------ | Branch (145:5): [True: 42.3k, False: 0] ------------------ 146| 42.3k| return begin()[idx]; 147| 42.3k| } _ZN7llvm_ks15SmallVectorImplINS_9StringRefEED2Ev: 368| 13.7k| ~SmallVectorImpl() { 369| | // Destroy the constructed elements in the vector. 370| 13.7k| this->destroy_range(this->begin(), this->end()); 371| | 372| | // If this wasn't grown from the inline copy, deallocate the old space. 373| 13.7k| if (!this->isSmall()) ------------------ | Branch (373:9): [True: 5.43k, False: 8.32k] ------------------ 374| 5.43k| free(this->begin()); 375| 13.7k| } _ZN7llvm_ks23SmallVectorTemplateBaseINS_9StringRefELb1EE13destroy_rangeEPS1_S3_: 284| 13.7k| static void destroy_range(T *, T *) {} _ZNK7llvm_ks25SmallVectorTemplateCommonINS_9StringRefEvE7isSmallEv: 86| 13.7k| bool isSmall() const { 87| 13.7k| return BeginX == static_cast(&FirstEl); 88| 13.7k| } _ZN7llvm_ks11SmallVectorINS_9StringRefELj5EEC2Ev: 872| 5.52k| SmallVector() : SmallVectorImpl(N) { 873| 5.52k| } _ZN7llvm_ks15SmallVectorImplINS_9StringRefEEC2Ej: 364| 13.7k| : SmallVectorTemplateBase::value>(N*sizeof(T)) { 365| 13.7k| } _ZN7llvm_ks23SmallVectorTemplateBaseINS_9StringRefELb1EEC2Em: 281| 13.7k| SmallVectorTemplateBase(size_t Size) : SmallVectorTemplateCommon(Size) {} _ZN7llvm_ks25SmallVectorTemplateCommonINS_9StringRefEvEC2Em: 78| 13.7k| SmallVectorTemplateCommon(size_t Size) : SmallVectorBase(&FirstEl, Size) {} _ZN7llvm_ks25SmallVectorTemplateCommonINS_9StringRefEvE5beginEv: 113| 62.3k| iterator begin() { return (iterator)this->BeginX; } _ZN7llvm_ks25SmallVectorTemplateCommonINS_9StringRefEvE3endEv: 117| 229k| iterator end() { return (iterator)this->EndX; } _ZN7llvm_ks15SmallVectorImplINSt3__14pairINS2_IPNS_9MCSectionEPKNS_6MCExprEEES8_EEED2Ev: 368| 749| ~SmallVectorImpl() { 369| | // Destroy the constructed elements in the vector. 370| 749| this->destroy_range(this->begin(), this->end()); 371| | 372| | // If this wasn't grown from the inline copy, deallocate the old space. 373| 749| if (!this->isSmall()) ------------------ | Branch (373:9): [True: 0, False: 749] ------------------ 374| 0| free(this->begin()); 375| 749| } _ZN7llvm_ks23SmallVectorTemplateBaseINSt3__14pairINS2_IPNS_9MCSectionEPKNS_6MCExprEEES8_EELb1EE13destroy_rangeEPS9_SB_: 284| 749| static void destroy_range(T *, T *) {} _ZN7llvm_ks25SmallVectorTemplateCommonINSt3__14pairINS2_IPNS_9MCSectionEPKNS_6MCExprEEES8_EEvE5beginEv: 113| 749| iterator begin() { return (iterator)this->BeginX; } _ZNK7llvm_ks25SmallVectorTemplateCommonINSt3__14pairINS2_IPNS_9MCSectionEPKNS_6MCExprEEES8_EEvE7isSmallEv: 86| 749| bool isSmall() const { 87| 749| return BeginX == static_cast(&FirstEl); 88| 749| } _ZN7llvm_ks11SmallVectorINSt3__14pairINS2_IPNS_9MCSectionEPKNS_6MCExprEEES8_EELj4EEC2Ev: 872| 749| SmallVector() : SmallVectorImpl(N) { 873| 749| } _ZN7llvm_ks15SmallVectorImplINSt3__14pairINS2_IPNS_9MCSectionEPKNS_6MCExprEEES8_EEEC2Ej: 364| 749| : SmallVectorTemplateBase::value>(N*sizeof(T)) { 365| 749| } _ZN7llvm_ks23SmallVectorTemplateBaseINSt3__14pairINS2_IPNS_9MCSectionEPKNS_6MCExprEEES8_EELb1EEC2Em: 281| 749| SmallVectorTemplateBase(size_t Size) : SmallVectorTemplateCommon(Size) {} _ZN7llvm_ks25SmallVectorTemplateCommonINSt3__14pairINS2_IPNS_9MCSectionEPKNS_6MCExprEEES8_EEvEC2Em: 78| 749| SmallVectorTemplateCommon(size_t Size) : SmallVectorBase(&FirstEl, Size) {} _ZN7llvm_ks25SmallVectorTemplateCommonINS_9StringRefEvE6setEndEPS1_: 95| 107k| void setEnd(T *P) { this->EndX = P; } _ZN7llvm_ks11SmallVectorINS_9StringRefELj4EEC2Ev: 872| 7.49k| SmallVector() : SmallVectorImpl(N) { 873| 7.49k| } _ZN7llvm_ks23SmallVectorTemplateBaseINS_9StringRefELb1EE9push_backERKS1_: 337| 107k| void push_back(const T &Elt) { 338| 107k| if (LLVM_UNLIKELY(this->EndX >= this->CapacityX)) ------------------ | | 171| 107k|#define LLVM_UNLIKELY(EXPR) __builtin_expect((bool)(EXPR), false) | | ------------------ | | | Branch (171:29): [True: 12.3k, False: 95.1k] | | ------------------ ------------------ 339| 12.3k| this->grow(); 340| 107k| memcpy(reinterpret_cast(this->end()), &Elt, sizeof(T)); 341| 107k| this->setEnd(this->end()+1); 342| 107k| } _ZN7llvm_ks23SmallVectorTemplateBaseINS_9StringRefELb1EE4growEm: 333| 12.3k| void grow(size_t MinSize = 0) { 334| 12.3k| this->grow_pod(MinSize*sizeof(T), sizeof(T)); 335| 12.3k| } _ZN7llvm_ks25SmallVectorTemplateCommonINS_9StringRefEvE8grow_podEmm: 80| 12.3k| void grow_pod(size_t MinSizeInBytes, size_t TSize) { 81| 12.3k| SmallVectorBase::grow_pod(&FirstEl, MinSizeInBytes, TSize); 82| 12.3k| } _ZN7llvm_ks15SmallVectorImplINSt3__14pairIjjEEED2Ev: 368| 45.9k| ~SmallVectorImpl() { 369| | // Destroy the constructed elements in the vector. 370| 45.9k| this->destroy_range(this->begin(), this->end()); 371| | 372| | // If this wasn't grown from the inline copy, deallocate the old space. 373| 45.9k| if (!this->isSmall()) ------------------ | Branch (373:9): [True: 0, False: 45.9k] ------------------ 374| 0| free(this->begin()); 375| 45.9k| } _ZN7llvm_ks23SmallVectorTemplateBaseINSt3__14pairIjjEELb1EE13destroy_rangeEPS3_S5_: 284| 45.9k| static void destroy_range(T *, T *) {} _ZN7llvm_ks25SmallVectorTemplateCommonINSt3__14pairIjjEEvE5beginEv: 113| 45.9k| iterator begin() { return (iterator)this->BeginX; } _ZN7llvm_ks25SmallVectorTemplateCommonINSt3__14pairIjjEEvE3endEv: 117| 45.9k| iterator end() { return (iterator)this->EndX; } _ZNK7llvm_ks25SmallVectorTemplateCommonINSt3__14pairIjjEEvE7isSmallEv: 86| 45.9k| bool isSmall() const { 87| 45.9k| return BeginX == static_cast(&FirstEl); 88| 45.9k| } _ZN7llvm_ks11SmallVectorINSt3__14pairIjjEELj4EEC2Ev: 872| 45.9k| SmallVector() : SmallVectorImpl(N) { 873| 45.9k| } _ZN7llvm_ks15SmallVectorImplINSt3__14pairIjjEEEC2Ej: 364| 45.9k| : SmallVectorTemplateBase::value>(N*sizeof(T)) { 365| 45.9k| } _ZN7llvm_ks23SmallVectorTemplateBaseINSt3__14pairIjjEELb1EEC2Em: 281| 45.9k| SmallVectorTemplateBase(size_t Size) : SmallVectorTemplateCommon(Size) {} _ZN7llvm_ks25SmallVectorTemplateCommonINSt3__14pairIjjEEvEC2Em: 78| 45.9k| SmallVectorTemplateCommon(size_t Size) : SmallVectorBase(&FirstEl, Size) {} _ZNK7llvm_ks25SmallVectorTemplateCommonINSt3__14pairIjjEEvE4dataEv: 141| 45.9k| const_pointer data() const { return const_pointer(begin()); } _ZNK7llvm_ks25SmallVectorTemplateCommonINSt3__14pairIjjEEvE5beginEv: 115| 91.9k| const_iterator begin() const { return (const_iterator)this->BeginX; } _ZNK7llvm_ks25SmallVectorTemplateCommonINSt3__14pairIjjEEvE4sizeEv: 132| 45.9k| size_type size() const { return end()-begin(); } _ZNK7llvm_ks25SmallVectorTemplateCommonINSt3__14pairIjjEEvE3endEv: 119| 45.9k| const_iterator end() const { return (const_iterator)this->EndX; } _ZN7llvm_ks11SmallVectorINS_7SMFixItELj4EEC2IPKS1_EET_S6_: 881| 46.3k| SmallVector(ItTy S, ItTy E) : SmallVectorImpl(N) { 882| 46.3k| this->append(S, E); 883| 46.3k| } _ZN7llvm_ks15SmallVectorImplINS_7SMFixItEEC2Ej: 364| 46.3k| : SmallVectorTemplateBase::value>(N*sizeof(T)) { 365| 46.3k| } _ZN7llvm_ks23SmallVectorTemplateBaseINS_7SMFixItELb0EEC2Em: 178| 46.3k| SmallVectorTemplateBase(size_t Size) : SmallVectorTemplateCommon(Size) {} _ZN7llvm_ks25SmallVectorTemplateCommonINS_7SMFixItEvEC2Em: 78| 46.3k| SmallVectorTemplateCommon(size_t Size) : SmallVectorBase(&FirstEl, Size) {} _ZN7llvm_ks15SmallVectorImplINS_7SMFixItEE6appendIPKS1_EEvT_S6_: 423| 46.3k| void append(in_iter in_start, in_iter in_end) { 424| 46.3k| size_type NumInputs = std::distance(in_start, in_end); 425| | // Grow allocated space if needed. 426| 46.3k| if (NumInputs > size_type(this->capacity_ptr()-this->end())) ------------------ | Branch (426:9): [True: 0, False: 46.3k] ------------------ 427| 0| this->grow(this->size()+NumInputs); 428| | 429| | // Copy the new elements over. 430| 46.3k| this->uninitialized_copy(in_start, in_end, this->end()); 431| 46.3k| this->setEnd(this->end() + NumInputs); 432| 46.3k| } _ZN7llvm_ks25SmallVectorTemplateCommonINS_7SMFixItEvE12capacity_ptrEv: 121| 46.3k| iterator capacity_ptr() { return (iterator)this->CapacityX; } _ZN7llvm_ks23SmallVectorTemplateBaseINS_7SMFixItELb0EE18uninitialized_copyIPKS1_PS1_EEvT_S7_T0_: 219| 46.3k| static void uninitialized_copy(It1 I, It1 E, It2 Dest) { 220| 46.3k| std::uninitialized_copy(I, E, Dest); 221| 46.3k| } _ZN7llvm_ks23SmallVectorTemplateBaseINSt3__110unique_ptrINS_18MCParsedAsmOperandENS1_14default_deleteIS3_EEEELb0EE9push_backEOS6_: 236| 17.8k| void push_back(T &&Elt) { 237| 17.8k| if (LLVM_UNLIKELY(this->EndX >= this->CapacityX)) ------------------ | | 171| 17.8k|#define LLVM_UNLIKELY(EXPR) __builtin_expect((bool)(EXPR), false) | | ------------------ | | | Branch (171:29): [True: 14, False: 17.8k] | | ------------------ ------------------ 238| 14| this->grow(); 239| 17.8k| ::new ((void*) this->end()) T(::std::move(Elt)); 240| 17.8k| this->setEnd(this->end()+1); 241| 17.8k| } _ZN7llvm_ks23SmallVectorTemplateBaseINSt3__110unique_ptrINS_18MCParsedAsmOperandENS1_14default_deleteIS3_EEEELb0EE4growEm: 251| 14|void SmallVectorTemplateBase::grow(size_t MinSize) { 252| 14| size_t CurCapacity = this->capacity(); 253| 14| size_t CurSize = this->size(); 254| | // Always grow, even from zero. 255| 14| size_t NewCapacity = size_t(NextPowerOf2(CurCapacity+2)); 256| 14| if (NewCapacity < MinSize) ------------------ | Branch (256:7): [True: 0, False: 14] ------------------ 257| 0| NewCapacity = MinSize; 258| 14| T *NewElts = static_cast(malloc(NewCapacity*sizeof(T))); 259| | 260| | // Move the elements over. 261| 14| this->uninitialized_move(this->begin(), this->end(), NewElts); 262| | 263| | // Destroy the original elements. 264| 14| destroy_range(this->begin(), this->end()); 265| | 266| | // If this wasn't grown from the inline copy, deallocate the old space. 267| 14| if (!this->isSmall()) ------------------ | Branch (267:7): [True: 10, False: 4] ------------------ 268| 10| free(this->begin()); 269| | 270| 14| this->setEnd(NewElts+CurSize); 271| 14| this->BeginX = NewElts; 272| 14| this->CapacityX = this->begin()+NewCapacity; 273| 14|} _ZNK7llvm_ks25SmallVectorTemplateCommonINSt3__110unique_ptrINS_18MCParsedAsmOperandENS1_14default_deleteIS3_EEEEvE8capacityEv: 136| 14| size_t capacity() const { return capacity_ptr() - begin(); } _ZNK7llvm_ks25SmallVectorTemplateCommonINSt3__110unique_ptrINS_18MCParsedAsmOperandENS1_14default_deleteIS3_EEEEvE12capacity_ptrEv: 122| 14| const_iterator capacity_ptr() const { return (const_iterator)this->CapacityX;} _ZN7llvm_ks23SmallVectorTemplateBaseINSt3__110unique_ptrINS_18MCParsedAsmOperandENS1_14default_deleteIS3_EEEELb0EE18uninitialized_moveIPS6_S9_EEvT_SA_T0_: 211| 14| static void uninitialized_move(It1 I, It1 E, It2 Dest) { 212| 366| for (; I != E; ++I, ++Dest) ------------------ | Branch (212:12): [True: 352, False: 14] ------------------ 213| 352| ::new ((void*) &*Dest) T(::std::move(*I)); 214| 14| } _ZN7llvm_ks25SmallVectorTemplateCommonINSt3__110unique_ptrINS_18MCParsedAsmOperandENS1_14default_deleteIS3_EEEEvE6setEndEPS6_: 95| 17.8k| void setEnd(T *P) { this->EndX = P; } _ZNK7llvm_ks25SmallVectorTemplateCommonINSt3__110unique_ptrINS_18MCParsedAsmOperandENS1_14default_deleteIS3_EEEEvEixEm: 149| 23.7k| const_reference operator[](size_type idx) const { 150| 23.7k| assert(idx < size()); ------------------ | Branch (150:5): [True: 23.7k, False: 0] ------------------ 151| 23.7k| return begin()[idx]; 152| 23.7k| } _ZN7llvm_ks11SmallVectorINSt3__110unique_ptrINS_18MCParsedAsmOperandENS1_14default_deleteIS3_EEEELj1EEC2Ev: 872| 8.48k| SmallVector() : SmallVectorImpl(N) { 873| 8.48k| } MipsAsmParser.cpp:_ZN7llvm_ks11SmallVectorINSt3__110unique_ptrIN12_GLOBAL__N_120MipsAssemblerOptionsENS1_14default_deleteIS4_EEEELj2EEC2Ev: 872| 749| SmallVector() : SmallVectorImpl(N) { 873| 749| } MipsAsmParser.cpp:_ZN7llvm_ks15SmallVectorImplINSt3__110unique_ptrIN12_GLOBAL__N_120MipsAssemblerOptionsENS1_14default_deleteIS4_EEEEEC2Ej: 364| 749| : SmallVectorTemplateBase::value>(N*sizeof(T)) { 365| 749| } MipsAsmParser.cpp:_ZN7llvm_ks23SmallVectorTemplateBaseINSt3__110unique_ptrIN12_GLOBAL__N_120MipsAssemblerOptionsENS1_14default_deleteIS4_EEEELb0EEC2Em: 178| 749| SmallVectorTemplateBase(size_t Size) : SmallVectorTemplateCommon(Size) {} MipsAsmParser.cpp:_ZN7llvm_ks25SmallVectorTemplateCommonINSt3__110unique_ptrIN12_GLOBAL__N_120MipsAssemblerOptionsENS1_14default_deleteIS4_EEEEvEC2Em: 78| 749| SmallVectorTemplateCommon(size_t Size) : SmallVectorBase(&FirstEl, Size) {} MipsAsmParser.cpp:_ZN7llvm_ks23SmallVectorTemplateBaseINSt3__110unique_ptrIN12_GLOBAL__N_120MipsAssemblerOptionsENS1_14default_deleteIS4_EEEELb0EE9push_backEOS7_: 236| 1.49k| void push_back(T &&Elt) { 237| 1.49k| if (LLVM_UNLIKELY(this->EndX >= this->CapacityX)) ------------------ | | 171| 1.49k|#define LLVM_UNLIKELY(EXPR) __builtin_expect((bool)(EXPR), false) | | ------------------ | | | Branch (171:29): [True: 0, False: 1.49k] | | ------------------ ------------------ 238| 0| this->grow(); 239| 1.49k| ::new ((void*) this->end()) T(::std::move(Elt)); 240| 1.49k| this->setEnd(this->end()+1); 241| 1.49k| } MipsAsmParser.cpp:_ZN7llvm_ks25SmallVectorTemplateCommonINSt3__110unique_ptrIN12_GLOBAL__N_120MipsAssemblerOptionsENS1_14default_deleteIS4_EEEEvE5beginEv: 113| 749| iterator begin() { return (iterator)this->BeginX; } MipsAsmParser.cpp:_ZN7llvm_ks23SmallVectorTemplateBaseINSt3__110unique_ptrIN12_GLOBAL__N_120MipsAssemblerOptionsENS1_14default_deleteIS4_EEEELb0EE13destroy_rangeEPS7_S9_: 180| 749| static void destroy_range(T *S, T *E) { 181| 2.24k| while (S != E) { ------------------ | Branch (181:12): [True: 1.49k, False: 749] ------------------ 182| 1.49k| --E; 183| 1.49k| E->~T(); 184| 1.49k| } 185| 749| } MipsAsmParser.cpp:_ZNK7llvm_ks25SmallVectorTemplateCommonINSt3__110unique_ptrIN12_GLOBAL__N_120MipsAssemblerOptionsENS1_14default_deleteIS4_EEEEvE7isSmallEv: 86| 749| bool isSmall() const { 87| 749| return BeginX == static_cast(&FirstEl); 88| 749| } MipsAsmParser.cpp:_ZN7llvm_ks25SmallVectorTemplateCommonINSt3__110unique_ptrIN12_GLOBAL__N_120MipsAssemblerOptionsENS1_14default_deleteIS4_EEEEvE3endEv: 117| 15.4k| iterator end() { return (iterator)this->EndX; } MipsAsmParser.cpp:_ZN7llvm_ks25SmallVectorTemplateCommonINSt3__110unique_ptrIN12_GLOBAL__N_120MipsAssemblerOptionsENS1_14default_deleteIS4_EEEEvE6setEndEPS7_: 95| 1.49k| void setEnd(T *P) { this->EndX = P; } MipsAsmParser.cpp:_ZN7llvm_ks15SmallVectorImplINSt3__110unique_ptrIN12_GLOBAL__N_120MipsAssemblerOptionsENS1_14default_deleteIS4_EEEEED2Ev: 368| 749| ~SmallVectorImpl() { 369| | // Destroy the constructed elements in the vector. 370| 749| this->destroy_range(this->begin(), this->end()); 371| | 372| | // If this wasn't grown from the inline copy, deallocate the old space. 373| 749| if (!this->isSmall()) ------------------ | Branch (373:9): [True: 0, False: 749] ------------------ 374| 0| free(this->begin()); 375| 749| } MipsAsmParser.cpp:_ZN7llvm_ks25SmallVectorTemplateCommonINSt3__110unique_ptrIN12_GLOBAL__N_120MipsAssemblerOptionsENS1_14default_deleteIS4_EEEEvE4backEv: 163| 11.6k| reference back() { 164| 11.6k| assert(!empty()); ------------------ | Branch (164:5): [True: 11.6k, False: 0] ------------------ 165| 11.6k| return end()[-1]; 166| 11.6k| } _ZN7llvm_ks15SmallVectorImplINS_6MCInstEEC2Ej: 364| 4.27k| : SmallVectorTemplateBase::value>(N*sizeof(T)) { 365| 4.27k| } _ZN7llvm_ks23SmallVectorTemplateBaseINS_6MCInstELb0EEC2Em: 178| 4.27k| SmallVectorTemplateBase(size_t Size) : SmallVectorTemplateCommon(Size) {} _ZN7llvm_ks25SmallVectorTemplateCommonINS_6MCInstEvEC2Em: 78| 4.27k| SmallVectorTemplateCommon(size_t Size) : SmallVectorBase(&FirstEl, Size) {} _ZN7llvm_ks23SmallVectorTemplateBaseINS_6MCInstELb0EE9push_backERKS1_: 229| 8.24k| void push_back(const T &Elt) { 230| 8.24k| if (LLVM_UNLIKELY(this->EndX >= this->CapacityX)) ------------------ | | 171| 8.24k|#define LLVM_UNLIKELY(EXPR) __builtin_expect((bool)(EXPR), false) | | ------------------ | | | Branch (171:29): [True: 0, False: 8.24k] | | ------------------ ------------------ 231| 0| this->grow(); 232| 8.24k| ::new ((void*) this->end()) T(Elt); 233| 8.24k| this->setEnd(this->end()+1); 234| 8.24k| } _ZNK7llvm_ks25SmallVectorTemplateCommonINS_6MCInstEvE5beginEv: 115| 20.7k| const_iterator begin() const { return (const_iterator)this->BeginX; } _ZNK7llvm_ks25SmallVectorTemplateCommonINS_6MCInstEvE4sizeEv: 132| 20.7k| size_type size() const { return end()-begin(); } _ZNK7llvm_ks25SmallVectorTemplateCommonINS_6MCInstEvE3endEv: 119| 20.7k| const_iterator end() const { return (const_iterator)this->EndX; } _ZN7llvm_ks25SmallVectorTemplateCommonINS_6MCInstEvE5beginEv: 113| 12.5k| iterator begin() { return (iterator)this->BeginX; } _ZN7llvm_ks23SmallVectorTemplateBaseINS_6MCInstELb0EE13destroy_rangeEPS1_S3_: 180| 4.27k| static void destroy_range(T *S, T *E) { 181| 12.5k| while (S != E) { ------------------ | Branch (181:12): [True: 8.24k, False: 4.27k] ------------------ 182| 8.24k| --E; 183| 8.24k| E->~T(); 184| 8.24k| } 185| 4.27k| } _ZNK7llvm_ks25SmallVectorTemplateCommonINS_6MCInstEvE7isSmallEv: 86| 4.27k| bool isSmall() const { 87| 4.27k| return BeginX == static_cast(&FirstEl); 88| 4.27k| } _ZN7llvm_ks25SmallVectorTemplateCommonINS_6MCInstEvE3endEv: 117| 20.7k| iterator end() { return (iterator)this->EndX; } _ZN7llvm_ks25SmallVectorTemplateCommonINS_6MCInstEvE6setEndEPS1_: 95| 8.24k| void setEnd(T *P) { this->EndX = P; } _ZN7llvm_ks15SmallVectorImplINS_6MCInstEED2Ev: 368| 4.27k| ~SmallVectorImpl() { 369| | // Destroy the constructed elements in the vector. 370| 4.27k| this->destroy_range(this->begin(), this->end()); 371| | 372| | // If this wasn't grown from the inline copy, deallocate the old space. 373| 4.27k| if (!this->isSmall()) ------------------ | Branch (373:9): [True: 0, False: 4.27k] ------------------ 374| 0| free(this->begin()); 375| 4.27k| } _ZN7llvm_ks15SmallVectorImplINSt3__110unique_ptrINS_18MCParsedAsmOperandENS1_14default_deleteIS3_EEEEE5clearEv: 378| 3.58k| void clear() { 379| 3.58k| this->destroy_range(this->begin(), this->end()); 380| 3.58k| this->EndX = this->BeginX; 381| 3.58k| } _ZN7llvm_ks11SmallVectorINS_6MCInstELj8EEC2Ev: 872| 4.27k| SmallVector() : SmallVectorImpl(N) { 873| 4.27k| } _ZN7llvm_ks25SmallVectorTemplateCommonINS_6MCInstEvEixEm: 144| 8.24k| reference operator[](size_type idx) { 145| 8.24k| assert(idx < size()); ------------------ | Branch (145:5): [True: 8.24k, False: 0] ------------------ 146| 8.24k| return begin()[idx]; 147| 8.24k| } _ZN7llvm_ks11SmallVectorINS_14MCLOHDirectiveELj32EEC2Ev: 872| 749| SmallVector() : SmallVectorImpl(N) { 873| 749| } _ZN7llvm_ks15SmallVectorImplINS_14MCLOHDirectiveEEC2Ej: 364| 749| : SmallVectorTemplateBase::value>(N*sizeof(T)) { 365| 749| } _ZN7llvm_ks23SmallVectorTemplateBaseINS_14MCLOHDirectiveELb0EEC2Em: 178| 749| SmallVectorTemplateBase(size_t Size) : SmallVectorTemplateCommon(Size) {} _ZN7llvm_ks25SmallVectorTemplateCommonINS_14MCLOHDirectiveEvEC2Em: 78| 749| SmallVectorTemplateCommon(size_t Size) : SmallVectorBase(&FirstEl, Size) {} _ZN7llvm_ks15SmallVectorImplINS_14MCLOHDirectiveEED2Ev: 368| 749| ~SmallVectorImpl() { 369| | // Destroy the constructed elements in the vector. 370| 749| this->destroy_range(this->begin(), this->end()); 371| | 372| | // If this wasn't grown from the inline copy, deallocate the old space. 373| 749| if (!this->isSmall()) ------------------ | Branch (373:9): [True: 0, False: 749] ------------------ 374| 0| free(this->begin()); 375| 749| } _ZNK7llvm_ks25SmallVectorTemplateCommonIPNS_9MCSectionEvE4sizeEv: 132| 1.25k| size_type size() const { return end()-begin(); } _ZNK7llvm_ks25SmallVectorTemplateCommonIPNS_9MCSectionEvE3endEv: 119| 1.25k| const_iterator end() const { return (const_iterator)this->EndX; } _ZNK7llvm_ks25SmallVectorTemplateCommonIPNS_9MCSectionEvE5beginEv: 115| 1.25k| const_iterator begin() const { return (const_iterator)this->BeginX; } _ZN7llvm_ks25SmallVectorTemplateCommonIPNS_9MCSectionEvEixEm: 144| 632| reference operator[](size_type idx) { 145| 632| assert(idx < size()); ------------------ | Branch (145:5): [True: 632, False: 0] ------------------ 146| 632| return begin()[idx]; 147| 632| } _ZNK7llvm_ks25SmallVectorTemplateCommonINS_7MCFixupEvE4dataEv: 141| 301| const_pointer data() const { return const_pointer(begin()); } _ZN7llvm_ks11SmallVectorINS_9StringRefELj3EEC2Ev: 872| 749| SmallVector() : SmallVectorImpl(N) { 873| 749| } APFloat.cpp:_ZN7llvm_ksL13hexDigitValueEc: 40| 6.97k|static inline unsigned hexDigitValue(char C) { 41| 6.97k| if (C >= '0' && C <= '9') return C-'0'; ------------------ | Branch (41:7): [True: 6.97k, False: 0] | Branch (41:19): [True: 4.23k, False: 2.73k] ------------------ 42| 2.73k| if (C >= 'a' && C <= 'f') return C-'a'+10U; ------------------ | Branch (42:7): [True: 1.57k, False: 1.16k] | Branch (42:19): [True: 1.40k, False: 161] ------------------ 43| 1.32k| if (C >= 'A' && C <= 'F') return C-'A'+10U; ------------------ | Branch (43:7): [True: 1.32k, False: 0] | Branch (43:19): [True: 979, False: 345] ------------------ 44| 345| return -1U; 45| 1.32k|} StringMap.cpp:_ZN7llvm_ksL10HashStringENS_9StringRefEj: 112| 334k|static inline unsigned HashString(StringRef Str, unsigned Result = 0) { 113| 3.21M| for (StringRef::size_type i = 0, e = Str.size(); i != e; ++i) ------------------ | Branch (113:52): [True: 2.87M, False: 334k] ------------------ 114| 2.87M| Result = Result * 33 + (unsigned char)Str[i]; 115| 334k| return Result; 116| 334k|} _ZN7llvm_ks18StringMapEntryBaseC2Ej: 35| 171k| explicit StringMapEntryBase(unsigned Len) : StrLen(Len) {} _ZNK7llvm_ks18StringMapEntryBase12getKeyLengthEv: 37| 260k| unsigned getKeyLength() const { return StrLen; } _ZN7llvm_ks13StringMapImplC2Ej: 55| 5.99k| : TheTable(nullptr), 56| | // Initialize the map with zero buckets to allocation. 57| 5.99k| NumBuckets(0), NumItems(0), NumTombstones(0), ItemSize(itemSize) {} _ZN7llvm_ks13StringMapImpl15getTombstoneValEv: 95| 1.26M| static StringMapEntryBase *getTombstoneVal() { 96| 1.26M| return (StringMapEntryBase*)-1; 97| 1.26M| } _ZNK7llvm_ks13StringMapImpl5emptyEv: 102| 9.73k| bool empty() const { return NumItems == 0; } _ZN7llvm_ks14StringMapEntryIjE7DestroyINS_15MallocAllocatorEEEvRT_: 198| 9.40k| void Destroy(AllocatorTy &Allocator) { 199| | // Free memory referenced by the item. 200| 9.40k| unsigned AllocSize = 201| 9.40k| static_cast(sizeof(StringMapEntry)) + getKeyLength() + 1; 202| 9.40k| this->~StringMapEntry(); 203| 9.40k| Allocator.Deallocate(static_cast(this), AllocSize); 204| 9.40k| } _ZNK7llvm_ks14StringMapEntryIbE5firstEv: 143| 1.22k| StringRef first() const { return StringRef(getKeyData(), getKeyLength()); } _ZNK7llvm_ks14StringMapEntryIbE10getKeyDataEv: 141| 18.9k| const char *getKeyData() const {return reinterpret_cast(this+1);} _ZN7llvm_ks9StringMapIjNS_15MallocAllocatorEEC2Ev: 224| 749| StringMap() : StringMapImpl(static_cast(sizeof(MapEntryTy))) {} _ZN7llvm_ks9StringMapIjNS_15MallocAllocatorEED2Ev: 385| 749| ~StringMap() { 386| | // Delete all the elements in the map, but don't reset the elements 387| | // to default values. This is a copy of clear(), but avoids unnecessary 388| | // work not required in the destructor. 389| 749| if (!empty()) { ------------------ | Branch (389:9): [True: 0, False: 749] ------------------ 390| 0| for (unsigned I = 0, E = NumBuckets; I != E; ++I) { ------------------ | Branch (390:44): [True: 0, False: 0] ------------------ 391| 0| StringMapEntryBase *Bucket = TheTable[I]; 392| 0| if (Bucket && Bucket != getTombstoneVal()) { ------------------ | Branch (392:13): [True: 0, False: 0] | Branch (392:23): [True: 0, False: 0] ------------------ 393| 0| static_cast(Bucket)->Destroy(Allocator); 394| 0| } 395| 0| } 396| 0| } 397| 749| free(TheTable); 398| 749| } _ZN7llvm_ks9StringMapIPNS_8MCSymbolERNS_20BumpPtrAllocatorImplINS_15MallocAllocatorELm4096ELm4096EEEEC2ES6_: 229| 749| : StringMapImpl(static_cast(sizeof(MapEntryTy))), Allocator(A) {} _ZN7llvm_ks9StringMapIbRNS_20BumpPtrAllocatorImplINS_15MallocAllocatorELm4096ELm4096EEEEC2ES4_: 229| 749| : StringMapImpl(static_cast(sizeof(MapEntryTy))), Allocator(A) {} _ZN7llvm_ks9StringMapIPNS_14MCSectionMachOENS_15MallocAllocatorEEC2Ev: 224| 749| StringMap() : StringMapImpl(static_cast(sizeof(MapEntryTy))) {} _ZN7llvm_ks9StringMapIbNS_15MallocAllocatorEEC2Ev: 224| 749| StringMap() : StringMapImpl(static_cast(sizeof(MapEntryTy))) {} _ZN7llvm_ks9StringMapIPNS_8MCSymbolERNS_20BumpPtrAllocatorImplINS_15MallocAllocatorELm4096ELm4096EEEED2Ev: 385| 749| ~StringMap() { 386| | // Delete all the elements in the map, but don't reset the elements 387| | // to default values. This is a copy of clear(), but avoids unnecessary 388| | // work not required in the destructor. 389| 749| if (!empty()) { ------------------ | Branch (389:9): [True: 0, False: 749] ------------------ 390| 0| for (unsigned I = 0, E = NumBuckets; I != E; ++I) { ------------------ | Branch (390:44): [True: 0, False: 0] ------------------ 391| 0| StringMapEntryBase *Bucket = TheTable[I]; 392| 0| if (Bucket && Bucket != getTombstoneVal()) { ------------------ | Branch (392:13): [True: 0, False: 0] | Branch (392:23): [True: 0, False: 0] ------------------ 393| 0| static_cast(Bucket)->Destroy(Allocator); 394| 0| } 395| 0| } 396| 0| } 397| 749| free(TheTable); 398| 749| } _ZN7llvm_ks14StringMapEntryIPNS_8MCSymbolEE7DestroyINS_20BumpPtrAllocatorImplINS_15MallocAllocatorELm4096ELm4096EEEEEvRT_: 198| 2.59k| void Destroy(AllocatorTy &Allocator) { 199| | // Free memory referenced by the item. 200| 2.59k| unsigned AllocSize = 201| 2.59k| static_cast(sizeof(StringMapEntry)) + getKeyLength() + 1; 202| 2.59k| this->~StringMapEntry(); 203| 2.59k| Allocator.Deallocate(static_cast(this), AllocSize); 204| 2.59k| } _ZN7llvm_ks9StringMapIbRNS_20BumpPtrAllocatorImplINS_15MallocAllocatorELm4096ELm4096EEEED2Ev: 385| 749| ~StringMap() { 386| | // Delete all the elements in the map, but don't reset the elements 387| | // to default values. This is a copy of clear(), but avoids unnecessary 388| | // work not required in the destructor. 389| 749| if (!empty()) { ------------------ | Branch (389:9): [True: 0, False: 749] ------------------ 390| 0| for (unsigned I = 0, E = NumBuckets; I != E; ++I) { ------------------ | Branch (390:44): [True: 0, False: 0] ------------------ 391| 0| StringMapEntryBase *Bucket = TheTable[I]; 392| 0| if (Bucket && Bucket != getTombstoneVal()) { ------------------ | Branch (392:13): [True: 0, False: 0] | Branch (392:23): [True: 0, False: 0] ------------------ 393| 0| static_cast(Bucket)->Destroy(Allocator); 394| 0| } 395| 0| } 396| 0| } 397| 749| free(TheTable); 398| 749| } _ZN7llvm_ks14StringMapEntryIbE7DestroyINS_20BumpPtrAllocatorImplINS_15MallocAllocatorELm4096ELm4096EEEEEvRT_: 198| 17.6k| void Destroy(AllocatorTy &Allocator) { 199| | // Free memory referenced by the item. 200| 17.6k| unsigned AllocSize = 201| 17.6k| static_cast(sizeof(StringMapEntry)) + getKeyLength() + 1; 202| 17.6k| this->~StringMapEntry(); 203| 17.6k| Allocator.Deallocate(static_cast(this), AllocSize); 204| 17.6k| } _ZN7llvm_ks9StringMapIPNS_14MCSectionMachOENS_15MallocAllocatorEED2Ev: 385| 749| ~StringMap() { 386| | // Delete all the elements in the map, but don't reset the elements 387| | // to default values. This is a copy of clear(), but avoids unnecessary 388| | // work not required in the destructor. 389| 749| if (!empty()) { ------------------ | Branch (389:9): [True: 0, False: 749] ------------------ 390| 0| for (unsigned I = 0, E = NumBuckets; I != E; ++I) { ------------------ | Branch (390:44): [True: 0, False: 0] ------------------ 391| 0| StringMapEntryBase *Bucket = TheTable[I]; 392| 0| if (Bucket && Bucket != getTombstoneVal()) { ------------------ | Branch (392:13): [True: 0, False: 0] | Branch (392:23): [True: 0, False: 0] ------------------ 393| 0| static_cast(Bucket)->Destroy(Allocator); 394| 0| } 395| 0| } 396| 0| } 397| 749| free(TheTable); 398| 749| } _ZN7llvm_ks14StringMapEntryIPNS_14MCSectionMachOEE7DestroyINS_15MallocAllocatorEEEvRT_: 198| 130| void Destroy(AllocatorTy &Allocator) { 199| | // Free memory referenced by the item. 200| 130| unsigned AllocSize = 201| 130| static_cast(sizeof(StringMapEntry)) + getKeyLength() + 1; 202| 130| this->~StringMapEntry(); 203| 130| Allocator.Deallocate(static_cast(this), AllocSize); 204| 130| } _ZN7llvm_ks9StringMapIbNS_15MallocAllocatorEED2Ev: 385| 749| ~StringMap() { 386| | // Delete all the elements in the map, but don't reset the elements 387| | // to default values. This is a copy of clear(), but avoids unnecessary 388| | // work not required in the destructor. 389| 749| if (!empty()) { ------------------ | Branch (389:9): [True: 2, False: 747] ------------------ 390| 34| for (unsigned I = 0, E = NumBuckets; I != E; ++I) { ------------------ | Branch (390:44): [True: 32, False: 2] ------------------ 391| 32| StringMapEntryBase *Bucket = TheTable[I]; 392| 32| if (Bucket && Bucket != getTombstoneVal()) { ------------------ | Branch (392:13): [True: 2, False: 30] | Branch (392:23): [True: 2, False: 0] ------------------ 393| 2| static_cast(Bucket)->Destroy(Allocator); 394| 2| } 395| 32| } 396| 2| } 397| 749| free(TheTable); 398| 749| } _ZN7llvm_ks14StringMapEntryIbE7DestroyINS_15MallocAllocatorEEEvRT_: 198| 2| void Destroy(AllocatorTy &Allocator) { 199| | // Free memory referenced by the item. 200| 2| unsigned AllocSize = 201| 2| static_cast(sizeof(StringMapEntry)) + getKeyLength() + 1; 202| 2| this->~StringMapEntry(); 203| 2| Allocator.Deallocate(static_cast(this), AllocSize); 204| 2| } _ZN7llvm_ks9StringMapIbRNS_20BumpPtrAllocatorImplINS_15MallocAllocatorELm4096ELm4096EEEE5clearEv: 349| 749| void clear() { 350| 749| if (empty()) return; ------------------ | Branch (350:9): [True: 0, False: 749] ------------------ 351| | 352| | // Zap all values, resetting the keys back to non-present (not tombstone), 353| | // which is safe because we're removing all elements. 354| 33.8k| for (unsigned I = 0, E = NumBuckets; I != E; ++I) { ------------------ | Branch (354:42): [True: 33.0k, False: 749] ------------------ 355| 33.0k| StringMapEntryBase *&Bucket = TheTable[I]; 356| 33.0k| if (Bucket && Bucket != getTombstoneVal()) { ------------------ | Branch (356:11): [True: 17.6k, False: 15.3k] | Branch (356:21): [True: 17.6k, False: 0] ------------------ 357| 17.6k| static_cast(Bucket)->Destroy(Allocator); 358| 17.6k| } 359| 33.0k| Bucket = nullptr; 360| 33.0k| } 361| | 362| 749| NumItems = 0; 363| 749| NumTombstones = 0; 364| 749| } _ZN7llvm_ks9StringMapIPNS_8MCSymbolERNS_20BumpPtrAllocatorImplINS_15MallocAllocatorELm4096ELm4096EEEE5clearEv: 349| 749| void clear() { 350| 749| if (empty()) return; ------------------ | Branch (350:9): [True: 0, False: 749] ------------------ 351| | 352| | // Zap all values, resetting the keys back to non-present (not tombstone), 353| | // which is safe because we're removing all elements. 354| 14.1k| for (unsigned I = 0, E = NumBuckets; I != E; ++I) { ------------------ | Branch (354:42): [True: 13.4k, False: 749] ------------------ 355| 13.4k| StringMapEntryBase *&Bucket = TheTable[I]; 356| 13.4k| if (Bucket && Bucket != getTombstoneVal()) { ------------------ | Branch (356:11): [True: 2.59k, False: 10.8k] | Branch (356:21): [True: 2.59k, False: 0] ------------------ 357| 2.59k| static_cast(Bucket)->Destroy(Allocator); 358| 2.59k| } 359| 13.4k| Bucket = nullptr; 360| 13.4k| } 361| | 362| 749| NumItems = 0; 363| 749| NumTombstones = 0; 364| 749| } _ZN7llvm_ks9StringMapIPNS_14MCSectionMachOENS_15MallocAllocatorEE5clearEv: 349| 749| void clear() { 350| 749| if (empty()) return; ------------------ | Branch (350:9): [True: 681, False: 68] ------------------ 351| | 352| | // Zap all values, resetting the keys back to non-present (not tombstone), 353| | // which is safe because we're removing all elements. 354| 1.15k| for (unsigned I = 0, E = NumBuckets; I != E; ++I) { ------------------ | Branch (354:42): [True: 1.08k, False: 68] ------------------ 355| 1.08k| StringMapEntryBase *&Bucket = TheTable[I]; 356| 1.08k| if (Bucket && Bucket != getTombstoneVal()) { ------------------ | Branch (356:11): [True: 130, False: 958] | Branch (356:21): [True: 130, False: 0] ------------------ 357| 130| static_cast(Bucket)->Destroy(Allocator); 358| 130| } 359| 1.08k| Bucket = nullptr; 360| 1.08k| } 361| | 362| 68| NumItems = 0; 363| 68| NumTombstones = 0; 364| 68| } _ZN7llvm_ks9StringMapIjNS_15MallocAllocatorEE5clearEv: 349| 749| void clear() { 350| 749| if (empty()) return; ------------------ | Branch (350:9): [True: 0, False: 749] ------------------ 351| | 352| | // Zap all values, resetting the keys back to non-present (not tombstone), 353| | // which is safe because we're removing all elements. 354| 17.5k| for (unsigned I = 0, E = NumBuckets; I != E; ++I) { ------------------ | Branch (354:42): [True: 16.7k, False: 749] ------------------ 355| 16.7k| StringMapEntryBase *&Bucket = TheTable[I]; 356| 16.7k| if (Bucket && Bucket != getTombstoneVal()) { ------------------ | Branch (356:11): [True: 9.40k, False: 7.37k] | Branch (356:21): [True: 9.40k, False: 0] ------------------ 357| 9.40k| static_cast(Bucket)->Destroy(Allocator); 358| 9.40k| } 359| 16.7k| Bucket = nullptr; 360| 16.7k| } 361| | 362| 749| NumItems = 0; 363| 749| NumTombstones = 0; 364| 749| } _ZN7llvm_ks9StringMapIPNS_8MCSymbolERNS_20BumpPtrAllocatorImplINS_15MallocAllocatorELm4096ELm4096EEEEixENS_9StringRefE: 298| 14.8k| ValueTy &operator[](StringRef Key) { 299| 14.8k| return insert(std::make_pair(Key, ValueTy())).first->second; 300| 14.8k| } _ZN7llvm_ks9StringMapIPNS_8MCSymbolERNS_20BumpPtrAllocatorImplINS_15MallocAllocatorELm4096ELm4096EEEE6insertENSt3__14pairINS_9StringRefES2_EE: 330| 14.8k| std::pair insert(std::pair KV) { 331| 14.8k| unsigned BucketNo = LookupBucketFor(KV.first); 332| 14.8k| StringMapEntryBase *&Bucket = TheTable[BucketNo]; 333| 14.8k| if (Bucket && Bucket != getTombstoneVal()) ------------------ | Branch (333:9): [True: 12.2k, False: 2.59k] | Branch (333:19): [True: 12.2k, False: 0] ------------------ 334| 12.2k| return std::make_pair(iterator(TheTable + BucketNo, false), 335| 12.2k| false); // Already exists in map. 336| | 337| 2.59k| if (Bucket == getTombstoneVal()) ------------------ | Branch (337:9): [True: 0, False: 2.59k] ------------------ 338| 0| --NumTombstones; 339| 2.59k| Bucket = 340| 2.59k| MapEntryTy::Create(KV.first, Allocator, std::move(KV.second)); 341| 2.59k| ++NumItems; 342| 2.59k| assert(NumItems + NumTombstones <= NumBuckets); ------------------ | Branch (342:5): [True: 2.59k, False: 0] ------------------ 343| | 344| 2.59k| BucketNo = RehashTable(BucketNo); 345| 2.59k| return std::make_pair(iterator(TheTable + BucketNo, false), true); 346| 2.59k| } _ZN7llvm_ks17StringMapIteratorIPNS_8MCSymbolEEC2EPPNS_18StringMapEntryBaseEb: 452| 14.8k| : StringMapConstIterator(Bucket, NoAdvance) { 453| 14.8k| } _ZN7llvm_ks22StringMapConstIteratorIPNS_8MCSymbolEEC2EPPNS_18StringMapEntryBaseEb: 412| 34.3k| : Ptr(Bucket) { 413| 34.3k| if (!NoAdvance) AdvancePastEmptyBuckets(); ------------------ | Branch (413:9): [True: 14.8k, False: 19.5k] ------------------ 414| 34.3k| } _ZN7llvm_ks22StringMapConstIteratorIPNS_8MCSymbolEE23AdvancePastEmptyBucketsEv: 440| 14.8k| void AdvancePastEmptyBuckets() { 441| 14.8k| while (*Ptr == nullptr || *Ptr == StringMapImpl::getTombstoneVal()) ------------------ | Branch (441:12): [True: 0, False: 14.8k] | Branch (441:31): [True: 0, False: 14.8k] ------------------ 442| 0| ++Ptr; 443| 14.8k| } _ZN7llvm_ks14StringMapEntryIPNS_8MCSymbolEE6CreateINS_20BumpPtrAllocatorImplINS_15MallocAllocatorELm4096ELm4096EEES2_EEPS3_NS_9StringRefERT_OT0_: 149| 2.59k| InitType &&InitVal) { 150| 2.59k| unsigned KeyLength = Key.size(); 151| | 152| | // Allocate a new item with space for the string at the end and a null 153| | // terminator. 154| 2.59k| unsigned AllocSize = static_cast(sizeof(StringMapEntry))+ 155| 2.59k| KeyLength+1; 156| 2.59k| unsigned Alignment = alignOf(); 157| | 158| 2.59k| StringMapEntry *NewItem = 159| 2.59k| static_cast(Allocator.Allocate(AllocSize,Alignment)); 160| | 161| | // Default construct the value. 162| 2.59k| new (NewItem) StringMapEntry(KeyLength, std::forward(InitVal)); 163| | 164| | // Copy the string information. 165| 2.59k| char *StrBuffer = const_cast(NewItem->getKeyData()); 166| 2.59k| if (KeyLength > 0) ------------------ | Branch (166:9): [True: 2.53k, False: 68] ------------------ 167| 2.53k| memcpy(StrBuffer, Key.data(), KeyLength); 168| 2.59k| StrBuffer[KeyLength] = 0; // Null terminate for convenience of clients. 169| 2.59k| return NewItem; 170| 2.59k| } _ZN7llvm_ks14StringMapEntryIPNS_8MCSymbolEEC2IS2_EEjOT_: 127| 2.59k| : StringMapEntryBase(strLen), second(std::forward(V)) {} _ZNK7llvm_ks14StringMapEntryIPNS_8MCSymbolEE10getKeyDataEv: 141| 2.59k| const char *getKeyData() const {return reinterpret_cast(this+1);} _ZNK7llvm_ks17StringMapIteratorIPNS_8MCSymbolEEptEv: 457| 14.8k| StringMapEntry *operator->() const { 458| 14.8k| return static_cast*>(*this->Ptr); 459| 14.8k| } _ZN7llvm_ks9StringMapIbRNS_20BumpPtrAllocatorImplINS_15MallocAllocatorELm4096ELm4096EEEE6insertENSt3__14pairINS_9StringRefEbEE: 330| 17.7k| std::pair insert(std::pair KV) { 331| 17.7k| unsigned BucketNo = LookupBucketFor(KV.first); 332| 17.7k| StringMapEntryBase *&Bucket = TheTable[BucketNo]; 333| 17.7k| if (Bucket && Bucket != getTombstoneVal()) ------------------ | Branch (333:9): [True: 62, False: 17.6k] | Branch (333:19): [True: 62, False: 0] ------------------ 334| 62| return std::make_pair(iterator(TheTable + BucketNo, false), 335| 62| false); // Already exists in map. 336| | 337| 17.6k| if (Bucket == getTombstoneVal()) ------------------ | Branch (337:9): [True: 0, False: 17.6k] ------------------ 338| 0| --NumTombstones; 339| 17.6k| Bucket = 340| 17.6k| MapEntryTy::Create(KV.first, Allocator, std::move(KV.second)); 341| 17.6k| ++NumItems; 342| 17.6k| assert(NumItems + NumTombstones <= NumBuckets); ------------------ | Branch (342:5): [True: 17.6k, False: 0] ------------------ 343| | 344| 17.6k| BucketNo = RehashTable(BucketNo); 345| 17.6k| return std::make_pair(iterator(TheTable + BucketNo, false), true); 346| 17.6k| } _ZN7llvm_ks17StringMapIteratorIbEC2EPPNS_18StringMapEntryBaseEb: 452| 17.7k| : StringMapConstIterator(Bucket, NoAdvance) { 453| 17.7k| } _ZN7llvm_ks22StringMapConstIteratorIbEC2EPPNS_18StringMapEntryBaseEb: 412| 17.7k| : Ptr(Bucket) { 413| 17.7k| if (!NoAdvance) AdvancePastEmptyBuckets(); ------------------ | Branch (413:9): [True: 17.7k, False: 0] ------------------ 414| 17.7k| } _ZN7llvm_ks22StringMapConstIteratorIbE23AdvancePastEmptyBucketsEv: 440| 17.7k| void AdvancePastEmptyBuckets() { 441| 17.7k| while (*Ptr == nullptr || *Ptr == StringMapImpl::getTombstoneVal()) ------------------ | Branch (441:12): [True: 0, False: 17.7k] | Branch (441:31): [True: 0, False: 17.7k] ------------------ 442| 0| ++Ptr; 443| 17.7k| } _ZN7llvm_ks14StringMapEntryIbE6CreateINS_20BumpPtrAllocatorImplINS_15MallocAllocatorELm4096ELm4096EEEbEEPS1_NS_9StringRefERT_OT0_: 149| 17.6k| InitType &&InitVal) { 150| 17.6k| unsigned KeyLength = Key.size(); 151| | 152| | // Allocate a new item with space for the string at the end and a null 153| | // terminator. 154| 17.6k| unsigned AllocSize = static_cast(sizeof(StringMapEntry))+ 155| 17.6k| KeyLength+1; 156| 17.6k| unsigned Alignment = alignOf(); 157| | 158| 17.6k| StringMapEntry *NewItem = 159| 17.6k| static_cast(Allocator.Allocate(AllocSize,Alignment)); 160| | 161| | // Default construct the value. 162| 17.6k| new (NewItem) StringMapEntry(KeyLength, std::forward(InitVal)); 163| | 164| | // Copy the string information. 165| 17.6k| char *StrBuffer = const_cast(NewItem->getKeyData()); 166| 17.6k| if (KeyLength > 0) ------------------ | Branch (166:9): [True: 17.6k, False: 68] ------------------ 167| 17.6k| memcpy(StrBuffer, Key.data(), KeyLength); 168| 17.6k| StrBuffer[KeyLength] = 0; // Null terminate for convenience of clients. 169| 17.6k| return NewItem; 170| 17.6k| } _ZN7llvm_ks14StringMapEntryIbEC2IbEEjOT_: 127| 17.6k| : StringMapEntryBase(strLen), second(std::forward(V)) {} _ZNK7llvm_ks17StringMapIteratorIbEdeEv: 454| 18.6k| StringMapEntry &operator*() const { 455| 18.6k| return *static_cast*>(*this->Ptr); 456| 18.6k| } _ZN7llvm_ks9StringMapIjNS_15MallocAllocatorEEixENS_9StringRefE: 298| 16.8k| ValueTy &operator[](StringRef Key) { 299| 16.8k| return insert(std::make_pair(Key, ValueTy())).first->second; 300| 16.8k| } _ZN7llvm_ks9StringMapIjNS_15MallocAllocatorEE6insertENSt3__14pairINS_9StringRefEjEE: 330| 16.8k| std::pair insert(std::pair KV) { 331| 16.8k| unsigned BucketNo = LookupBucketFor(KV.first); 332| 16.8k| StringMapEntryBase *&Bucket = TheTable[BucketNo]; 333| 16.8k| if (Bucket && Bucket != getTombstoneVal()) ------------------ | Branch (333:9): [True: 7.46k, False: 9.40k] | Branch (333:19): [True: 7.46k, False: 0] ------------------ 334| 7.46k| return std::make_pair(iterator(TheTable + BucketNo, false), 335| 7.46k| false); // Already exists in map. 336| | 337| 9.40k| if (Bucket == getTombstoneVal()) ------------------ | Branch (337:9): [True: 0, False: 9.40k] ------------------ 338| 0| --NumTombstones; 339| 9.40k| Bucket = 340| 9.40k| MapEntryTy::Create(KV.first, Allocator, std::move(KV.second)); 341| 9.40k| ++NumItems; 342| 9.40k| assert(NumItems + NumTombstones <= NumBuckets); ------------------ | Branch (342:5): [True: 9.40k, False: 0] ------------------ 343| | 344| 9.40k| BucketNo = RehashTable(BucketNo); 345| 9.40k| return std::make_pair(iterator(TheTable + BucketNo, false), true); 346| 9.40k| } _ZN7llvm_ks17StringMapIteratorIjEC2EPPNS_18StringMapEntryBaseEb: 452| 16.8k| : StringMapConstIterator(Bucket, NoAdvance) { 453| 16.8k| } _ZN7llvm_ks22StringMapConstIteratorIjEC2EPPNS_18StringMapEntryBaseEb: 412| 16.8k| : Ptr(Bucket) { 413| 16.8k| if (!NoAdvance) AdvancePastEmptyBuckets(); ------------------ | Branch (413:9): [True: 16.8k, False: 0] ------------------ 414| 16.8k| } _ZN7llvm_ks22StringMapConstIteratorIjE23AdvancePastEmptyBucketsEv: 440| 16.8k| void AdvancePastEmptyBuckets() { 441| 16.8k| while (*Ptr == nullptr || *Ptr == StringMapImpl::getTombstoneVal()) ------------------ | Branch (441:12): [True: 0, False: 16.8k] | Branch (441:31): [True: 0, False: 16.8k] ------------------ 442| 0| ++Ptr; 443| 16.8k| } _ZN7llvm_ks14StringMapEntryIjE6CreateINS_15MallocAllocatorEjEEPS1_NS_9StringRefERT_OT0_: 149| 9.40k| InitType &&InitVal) { 150| 9.40k| unsigned KeyLength = Key.size(); 151| | 152| | // Allocate a new item with space for the string at the end and a null 153| | // terminator. 154| 9.40k| unsigned AllocSize = static_cast(sizeof(StringMapEntry))+ 155| 9.40k| KeyLength+1; 156| 9.40k| unsigned Alignment = alignOf(); 157| | 158| 9.40k| StringMapEntry *NewItem = 159| 9.40k| static_cast(Allocator.Allocate(AllocSize,Alignment)); 160| | 161| | // Default construct the value. 162| 9.40k| new (NewItem) StringMapEntry(KeyLength, std::forward(InitVal)); 163| | 164| | // Copy the string information. 165| 9.40k| char *StrBuffer = const_cast(NewItem->getKeyData()); 166| 9.40k| if (KeyLength > 0) ------------------ | Branch (166:9): [True: 9.40k, False: 0] ------------------ 167| 9.40k| memcpy(StrBuffer, Key.data(), KeyLength); 168| 9.40k| StrBuffer[KeyLength] = 0; // Null terminate for convenience of clients. 169| 9.40k| return NewItem; 170| 9.40k| } _ZN7llvm_ks14StringMapEntryIjEC2IjEEjOT_: 127| 9.40k| : StringMapEntryBase(strLen), second(std::forward(V)) {} _ZNK7llvm_ks14StringMapEntryIjE10getKeyDataEv: 141| 9.40k| const char *getKeyData() const {return reinterpret_cast(this+1);} _ZNK7llvm_ks17StringMapIteratorIjEptEv: 457| 16.8k| StringMapEntry *operator->() const { 458| 16.8k| return static_cast*>(*this->Ptr); 459| 16.8k| } _ZNK7llvm_ks9StringMapIPNS_8MCSymbolERNS_20BumpPtrAllocatorImplINS_15MallocAllocatorELm4096ELm4096EEEE6lookupENS_9StringRefE: 291| 9.75k| ValueTy lookup(StringRef Key) const { 292| 9.75k| const_iterator it = find(Key); 293| 9.75k| if (it != end()) ------------------ | Branch (293:9): [True: 4.66k, False: 5.09k] ------------------ 294| 4.66k| return it->second; 295| 5.09k| return ValueTy(); 296| 9.75k| } _ZNK7llvm_ks9StringMapIPNS_8MCSymbolERNS_20BumpPtrAllocatorImplINS_15MallocAllocatorELm4096ELm4096EEEE4findENS_9StringRefE: 283| 9.75k| const_iterator find(StringRef Key) const { 284| 9.75k| int Bucket = FindKey(Key); 285| 9.75k| if (Bucket == -1) return end(); ------------------ | Branch (285:9): [True: 5.09k, False: 4.66k] ------------------ 286| 4.66k| return const_iterator(TheTable+Bucket, true); 287| 9.75k| } _ZNK7llvm_ks22StringMapConstIteratorIPNS_8MCSymbolEEneERKS3_: 426| 9.75k| bool operator!=(const StringMapConstIterator &RHS) const { 427| 9.75k| return Ptr != RHS.Ptr; 428| 9.75k| } _ZNK7llvm_ks9StringMapIPNS_8MCSymbolERNS_20BumpPtrAllocatorImplINS_15MallocAllocatorELm4096ELm4096EEEE3endEv: 273| 14.8k| const_iterator end() const { 274| 14.8k| return const_iterator(TheTable+NumBuckets, true); 275| 14.8k| } _ZNK7llvm_ks22StringMapConstIteratorIPNS_8MCSymbolEEptEv: 419| 4.66k| const value_type *operator->() const { 420| 4.66k| return static_cast*>(*Ptr); 421| 4.66k| } _ZN7llvm_ks9StringMapIPNS_14MCSectionMachOENS_15MallocAllocatorEEixENS_9StringRefE: 298| 5.74k| ValueTy &operator[](StringRef Key) { 299| 5.74k| return insert(std::make_pair(Key, ValueTy())).first->second; 300| 5.74k| } _ZN7llvm_ks9StringMapIPNS_14MCSectionMachOENS_15MallocAllocatorEE6insertENSt3__14pairINS_9StringRefES2_EE: 330| 5.74k| std::pair insert(std::pair KV) { 331| 5.74k| unsigned BucketNo = LookupBucketFor(KV.first); 332| 5.74k| StringMapEntryBase *&Bucket = TheTable[BucketNo]; 333| 5.74k| if (Bucket && Bucket != getTombstoneVal()) ------------------ | Branch (333:9): [True: 5.61k, False: 130] | Branch (333:19): [True: 5.61k, False: 0] ------------------ 334| 5.61k| return std::make_pair(iterator(TheTable + BucketNo, false), 335| 5.61k| false); // Already exists in map. 336| | 337| 130| if (Bucket == getTombstoneVal()) ------------------ | Branch (337:9): [True: 0, False: 130] ------------------ 338| 0| --NumTombstones; 339| 130| Bucket = 340| 130| MapEntryTy::Create(KV.first, Allocator, std::move(KV.second)); 341| 130| ++NumItems; 342| 130| assert(NumItems + NumTombstones <= NumBuckets); ------------------ | Branch (342:5): [True: 130, False: 0] ------------------ 343| | 344| 130| BucketNo = RehashTable(BucketNo); 345| 130| return std::make_pair(iterator(TheTable + BucketNo, false), true); 346| 130| } _ZN7llvm_ks17StringMapIteratorIPNS_14MCSectionMachOEEC2EPPNS_18StringMapEntryBaseEb: 452| 5.74k| : StringMapConstIterator(Bucket, NoAdvance) { 453| 5.74k| } _ZN7llvm_ks22StringMapConstIteratorIPNS_14MCSectionMachOEEC2EPPNS_18StringMapEntryBaseEb: 412| 5.74k| : Ptr(Bucket) { 413| 5.74k| if (!NoAdvance) AdvancePastEmptyBuckets(); ------------------ | Branch (413:9): [True: 5.74k, False: 0] ------------------ 414| 5.74k| } _ZN7llvm_ks22StringMapConstIteratorIPNS_14MCSectionMachOEE23AdvancePastEmptyBucketsEv: 440| 5.74k| void AdvancePastEmptyBuckets() { 441| 5.74k| while (*Ptr == nullptr || *Ptr == StringMapImpl::getTombstoneVal()) ------------------ | Branch (441:12): [True: 0, False: 5.74k] | Branch (441:31): [True: 0, False: 5.74k] ------------------ 442| 0| ++Ptr; 443| 5.74k| } _ZN7llvm_ks14StringMapEntryIPNS_14MCSectionMachOEE6CreateINS_15MallocAllocatorES2_EEPS3_NS_9StringRefERT_OT0_: 149| 130| InitType &&InitVal) { 150| 130| unsigned KeyLength = Key.size(); 151| | 152| | // Allocate a new item with space for the string at the end and a null 153| | // terminator. 154| 130| unsigned AllocSize = static_cast(sizeof(StringMapEntry))+ 155| 130| KeyLength+1; 156| 130| unsigned Alignment = alignOf(); 157| | 158| 130| StringMapEntry *NewItem = 159| 130| static_cast(Allocator.Allocate(AllocSize,Alignment)); 160| | 161| | // Default construct the value. 162| 130| new (NewItem) StringMapEntry(KeyLength, std::forward(InitVal)); 163| | 164| | // Copy the string information. 165| 130| char *StrBuffer = const_cast(NewItem->getKeyData()); 166| 130| if (KeyLength > 0) ------------------ | Branch (166:9): [True: 130, False: 0] ------------------ 167| 130| memcpy(StrBuffer, Key.data(), KeyLength); 168| 130| StrBuffer[KeyLength] = 0; // Null terminate for convenience of clients. 169| 130| return NewItem; 170| 130| } _ZN7llvm_ks14StringMapEntryIPNS_14MCSectionMachOEEC2IS2_EEjOT_: 127| 130| : StringMapEntryBase(strLen), second(std::forward(V)) {} _ZNK7llvm_ks14StringMapEntryIPNS_14MCSectionMachOEE10getKeyDataEv: 141| 130| const char *getKeyData() const {return reinterpret_cast(this+1);} _ZNK7llvm_ks17StringMapIteratorIPNS_14MCSectionMachOEEptEv: 457| 5.74k| StringMapEntry *operator->() const { 458| 5.74k| return static_cast*>(*this->Ptr); 459| 5.74k| } _ZN7llvm_ks17StringMapIteratorIbEC2Ev: 449| 2| StringMapIterator() {} _ZN7llvm_ks22StringMapConstIteratorIbEC2Ev: 408| 2| StringMapConstIterator() : Ptr(nullptr) { } _ZN7llvm_ks9StringMapIbNS_15MallocAllocatorEE6insertENSt3__14pairINS_9StringRefEbEE: 330| 2| std::pair insert(std::pair KV) { 331| 2| unsigned BucketNo = LookupBucketFor(KV.first); 332| 2| StringMapEntryBase *&Bucket = TheTable[BucketNo]; 333| 2| if (Bucket && Bucket != getTombstoneVal()) ------------------ | Branch (333:9): [True: 0, False: 2] | Branch (333:19): [True: 0, False: 0] ------------------ 334| 0| return std::make_pair(iterator(TheTable + BucketNo, false), 335| 0| false); // Already exists in map. 336| | 337| 2| if (Bucket == getTombstoneVal()) ------------------ | Branch (337:9): [True: 0, False: 2] ------------------ 338| 0| --NumTombstones; 339| 2| Bucket = 340| 2| MapEntryTy::Create(KV.first, Allocator, std::move(KV.second)); 341| 2| ++NumItems; 342| 2| assert(NumItems + NumTombstones <= NumBuckets); ------------------ | Branch (342:5): [True: 2, False: 0] ------------------ 343| | 344| 2| BucketNo = RehashTable(BucketNo); 345| 2| return std::make_pair(iterator(TheTable + BucketNo, false), true); 346| 2| } _ZN7llvm_ks14StringMapEntryIbE6CreateINS_15MallocAllocatorEbEEPS1_NS_9StringRefERT_OT0_: 149| 2| InitType &&InitVal) { 150| 2| unsigned KeyLength = Key.size(); 151| | 152| | // Allocate a new item with space for the string at the end and a null 153| | // terminator. 154| 2| unsigned AllocSize = static_cast(sizeof(StringMapEntry))+ 155| 2| KeyLength+1; 156| 2| unsigned Alignment = alignOf(); 157| | 158| 2| StringMapEntry *NewItem = 159| 2| static_cast(Allocator.Allocate(AllocSize,Alignment)); 160| | 161| | // Default construct the value. 162| 2| new (NewItem) StringMapEntry(KeyLength, std::forward(InitVal)); 163| | 164| | // Copy the string information. 165| 2| char *StrBuffer = const_cast(NewItem->getKeyData()); 166| 2| if (KeyLength > 0) ------------------ | Branch (166:9): [True: 2, False: 0] ------------------ 167| 2| memcpy(StrBuffer, Key.data(), KeyLength); 168| 2| StrBuffer[KeyLength] = 0; // Null terminate for convenience of clients. 169| 2| return NewItem; 170| 2| } _ZNK7llvm_ks17StringMapIteratorIbEptEv: 457| 2| StringMapEntry *operator->() const { 458| 2| return static_cast*>(*this->Ptr); 459| 2| } _ZNK7llvm_ks14StringMapEntryIbE6getKeyEv: 129| 2| StringRef getKey() const { 130| 2| return StringRef(getKeyData(), getKeyLength()); 131| 2| } _ZN7llvm_ks9StringMapINSt3__14pairIPNS_20MCAsmParserExtensionEPFbS4_NS_9StringRefENS_5SMLocEEEENS_15MallocAllocatorEEC2Ev: 224| 749| StringMap() : StringMapImpl(static_cast(sizeof(MapEntryTy))) {} AsmParser.cpp:_ZN7llvm_ks9StringMapIN12_GLOBAL__N_110MCAsmMacroENS_15MallocAllocatorEEC2Ev: 224| 749| StringMap() : StringMapImpl(static_cast(sizeof(MapEntryTy))) {} AsmParser.cpp:_ZN7llvm_ks9StringMapIN12_GLOBAL__N_19AsmParser13DirectiveKindENS_15MallocAllocatorEEC2Ev: 224| 749| StringMap() : StringMapImpl(static_cast(sizeof(MapEntryTy))) {} AsmParser.cpp:_ZN7llvm_ks9StringMapIN12_GLOBAL__N_19AsmParser13DirectiveKindENS_15MallocAllocatorEED2Ev: 385| 749| ~StringMap() { 386| | // Delete all the elements in the map, but don't reset the elements 387| | // to default values. This is a copy of clear(), but avoids unnecessary 388| | // work not required in the destructor. 389| 749| if (!empty()) { ------------------ | Branch (389:9): [True: 749, False: 0] ------------------ 390| 192k| for (unsigned I = 0, E = NumBuckets; I != E; ++I) { ------------------ | Branch (390:44): [True: 191k, False: 749] ------------------ 391| 191k| StringMapEntryBase *Bucket = TheTable[I]; 392| 191k| if (Bucket && Bucket != getTombstoneVal()) { ------------------ | Branch (392:13): [True: 92.1k, False: 99.6k] | Branch (392:23): [True: 92.1k, False: 0] ------------------ 393| 92.1k| static_cast(Bucket)->Destroy(Allocator); 394| 92.1k| } 395| 191k| } 396| 749| } 397| 749| free(TheTable); 398| 749| } AsmParser.cpp:_ZN7llvm_ks14StringMapEntryIN12_GLOBAL__N_19AsmParser13DirectiveKindEE7DestroyINS_15MallocAllocatorEEEvRT_: 198| 92.1k| void Destroy(AllocatorTy &Allocator) { 199| | // Free memory referenced by the item. 200| 92.1k| unsigned AllocSize = 201| 92.1k| static_cast(sizeof(StringMapEntry)) + getKeyLength() + 1; 202| 92.1k| this->~StringMapEntry(); 203| 92.1k| Allocator.Deallocate(static_cast(this), AllocSize); 204| 92.1k| } AsmParser.cpp:_ZN7llvm_ks9StringMapIN12_GLOBAL__N_110MCAsmMacroENS_15MallocAllocatorEED2Ev: 385| 749| ~StringMap() { 386| | // Delete all the elements in the map, but don't reset the elements 387| | // to default values. This is a copy of clear(), but avoids unnecessary 388| | // work not required in the destructor. 389| 749| if (!empty()) { ------------------ | Branch (389:9): [True: 42, False: 707] ------------------ 390| 714| for (unsigned I = 0, E = NumBuckets; I != E; ++I) { ------------------ | Branch (390:44): [True: 672, False: 42] ------------------ 391| 672| StringMapEntryBase *Bucket = TheTable[I]; 392| 672| if (Bucket && Bucket != getTombstoneVal()) { ------------------ | Branch (392:13): [True: 54, False: 618] | Branch (392:23): [True: 54, False: 0] ------------------ 393| 54| static_cast(Bucket)->Destroy(Allocator); 394| 54| } 395| 672| } 396| 42| } 397| 749| free(TheTable); 398| 749| } AsmParser.cpp:_ZN7llvm_ks14StringMapEntryIN12_GLOBAL__N_110MCAsmMacroEE7DestroyINS_15MallocAllocatorEEEvRT_: 198| 54| void Destroy(AllocatorTy &Allocator) { 199| | // Free memory referenced by the item. 200| 54| unsigned AllocSize = 201| 54| static_cast(sizeof(StringMapEntry)) + getKeyLength() + 1; 202| 54| this->~StringMapEntry(); 203| 54| Allocator.Deallocate(static_cast(this), AllocSize); 204| 54| } _ZN7llvm_ks9StringMapINSt3__14pairIPNS_20MCAsmParserExtensionEPFbS4_NS_9StringRefENS_5SMLocEEEENS_15MallocAllocatorEED2Ev: 385| 749| ~StringMap() { 386| | // Delete all the elements in the map, but don't reset the elements 387| | // to default values. This is a copy of clear(), but avoids unnecessary 388| | // work not required in the destructor. 389| 749| if (!empty()) { ------------------ | Branch (389:9): [True: 749, False: 0] ------------------ 390| 96.6k| for (unsigned I = 0, E = NumBuckets; I != E; ++I) { ------------------ | Branch (390:44): [True: 95.8k, False: 749] ------------------ 391| 95.8k| StringMapEntryBase *Bucket = TheTable[I]; 392| 95.8k| if (Bucket && Bucket != getTombstoneVal()) { ------------------ | Branch (392:13): [True: 49.4k, False: 46.4k] | Branch (392:23): [True: 49.4k, False: 0] ------------------ 393| 49.4k| static_cast(Bucket)->Destroy(Allocator); 394| 49.4k| } 395| 95.8k| } 396| 749| } 397| 749| free(TheTable); 398| 749| } _ZN7llvm_ks14StringMapEntryINSt3__14pairIPNS_20MCAsmParserExtensionEPFbS4_NS_9StringRefENS_5SMLocEEEEE7DestroyINS_15MallocAllocatorEEEvRT_: 198| 49.4k| void Destroy(AllocatorTy &Allocator) { 199| | // Free memory referenced by the item. 200| 49.4k| unsigned AllocSize = 201| 49.4k| static_cast(sizeof(StringMapEntry)) + getKeyLength() + 1; 202| 49.4k| this->~StringMapEntry(); 203| 49.4k| Allocator.Deallocate(static_cast(this), AllocSize); 204| 49.4k| } _ZN7llvm_ks9StringMapINSt3__14pairIPNS_20MCAsmParserExtensionEPFbS4_NS_9StringRefENS_5SMLocEEEENS_15MallocAllocatorEEixES5_: 298| 49.4k| ValueTy &operator[](StringRef Key) { 299| 49.4k| return insert(std::make_pair(Key, ValueTy())).first->second; 300| 49.4k| } _ZN7llvm_ks9StringMapINSt3__14pairIPNS_20MCAsmParserExtensionEPFbS4_NS_9StringRefENS_5SMLocEEEENS_15MallocAllocatorEE6insertENS2_IS5_S9_EE: 330| 49.4k| std::pair insert(std::pair KV) { 331| 49.4k| unsigned BucketNo = LookupBucketFor(KV.first); 332| 49.4k| StringMapEntryBase *&Bucket = TheTable[BucketNo]; 333| 49.4k| if (Bucket && Bucket != getTombstoneVal()) ------------------ | Branch (333:9): [True: 0, False: 49.4k] | Branch (333:19): [True: 0, False: 0] ------------------ 334| 0| return std::make_pair(iterator(TheTable + BucketNo, false), 335| 0| false); // Already exists in map. 336| | 337| 49.4k| if (Bucket == getTombstoneVal()) ------------------ | Branch (337:9): [True: 0, False: 49.4k] ------------------ 338| 0| --NumTombstones; 339| 49.4k| Bucket = 340| 49.4k| MapEntryTy::Create(KV.first, Allocator, std::move(KV.second)); 341| 49.4k| ++NumItems; 342| 49.4k| assert(NumItems + NumTombstones <= NumBuckets); ------------------ | Branch (342:5): [True: 49.4k, False: 0] ------------------ 343| | 344| 49.4k| BucketNo = RehashTable(BucketNo); 345| 49.4k| return std::make_pair(iterator(TheTable + BucketNo, false), true); 346| 49.4k| } _ZN7llvm_ks17StringMapIteratorINSt3__14pairIPNS_20MCAsmParserExtensionEPFbS4_NS_9StringRefENS_5SMLocEEEEEC2EPPNS_18StringMapEntryBaseEb: 452| 49.4k| : StringMapConstIterator(Bucket, NoAdvance) { 453| 49.4k| } _ZN7llvm_ks22StringMapConstIteratorINSt3__14pairIPNS_20MCAsmParserExtensionEPFbS4_NS_9StringRefENS_5SMLocEEEEEC2EPPNS_18StringMapEntryBaseEb: 412| 120k| : Ptr(Bucket) { 413| 120k| if (!NoAdvance) AdvancePastEmptyBuckets(); ------------------ | Branch (413:9): [True: 49.4k, False: 70.5k] ------------------ 414| 120k| } _ZN7llvm_ks22StringMapConstIteratorINSt3__14pairIPNS_20MCAsmParserExtensionEPFbS4_NS_9StringRefENS_5SMLocEEEEE23AdvancePastEmptyBucketsEv: 440| 49.4k| void AdvancePastEmptyBuckets() { 441| 49.4k| while (*Ptr == nullptr || *Ptr == StringMapImpl::getTombstoneVal()) ------------------ | Branch (441:12): [True: 0, False: 49.4k] | Branch (441:31): [True: 0, False: 49.4k] ------------------ 442| 0| ++Ptr; 443| 49.4k| } _ZN7llvm_ks14StringMapEntryINSt3__14pairIPNS_20MCAsmParserExtensionEPFbS4_NS_9StringRefENS_5SMLocEEEEE6CreateINS_15MallocAllocatorES9_EEPSA_S5_RT_OT0_: 149| 49.4k| InitType &&InitVal) { 150| 49.4k| unsigned KeyLength = Key.size(); 151| | 152| | // Allocate a new item with space for the string at the end and a null 153| | // terminator. 154| 49.4k| unsigned AllocSize = static_cast(sizeof(StringMapEntry))+ 155| 49.4k| KeyLength+1; 156| 49.4k| unsigned Alignment = alignOf(); 157| | 158| 49.4k| StringMapEntry *NewItem = 159| 49.4k| static_cast(Allocator.Allocate(AllocSize,Alignment)); 160| | 161| | // Default construct the value. 162| 49.4k| new (NewItem) StringMapEntry(KeyLength, std::forward(InitVal)); 163| | 164| | // Copy the string information. 165| 49.4k| char *StrBuffer = const_cast(NewItem->getKeyData()); 166| 49.4k| if (KeyLength > 0) ------------------ | Branch (166:9): [True: 49.4k, False: 0] ------------------ 167| 49.4k| memcpy(StrBuffer, Key.data(), KeyLength); 168| 49.4k| StrBuffer[KeyLength] = 0; // Null terminate for convenience of clients. 169| 49.4k| return NewItem; 170| 49.4k| } _ZN7llvm_ks14StringMapEntryINSt3__14pairIPNS_20MCAsmParserExtensionEPFbS4_NS_9StringRefENS_5SMLocEEEEEC2IS9_EEjOT_: 127| 49.4k| : StringMapEntryBase(strLen), second(std::forward(V)) {} _ZNK7llvm_ks14StringMapEntryINSt3__14pairIPNS_20MCAsmParserExtensionEPFbS4_NS_9StringRefENS_5SMLocEEEEE10getKeyDataEv: 141| 49.4k| const char *getKeyData() const {return reinterpret_cast(this+1);} _ZNK7llvm_ks17StringMapIteratorINSt3__14pairIPNS_20MCAsmParserExtensionEPFbS4_NS_9StringRefENS_5SMLocEEEEEptEv: 457| 49.4k| StringMapEntry *operator->() const { 458| 49.4k| return static_cast*>(*this->Ptr); 459| 49.4k| } AsmParser.cpp:_ZN7llvm_ks9StringMapIN12_GLOBAL__N_19AsmParser13DirectiveKindENS_15MallocAllocatorEEixENS_9StringRefE: 298| 92.8k| ValueTy &operator[](StringRef Key) { 299| 92.8k| return insert(std::make_pair(Key, ValueTy())).first->second; 300| 92.8k| } AsmParser.cpp:_ZN7llvm_ks9StringMapIN12_GLOBAL__N_19AsmParser13DirectiveKindENS_15MallocAllocatorEE6insertENSt3__14pairINS_9StringRefES3_EE: 330| 92.8k| std::pair insert(std::pair KV) { 331| 92.8k| unsigned BucketNo = LookupBucketFor(KV.first); 332| 92.8k| StringMapEntryBase *&Bucket = TheTable[BucketNo]; 333| 92.8k| if (Bucket && Bucket != getTombstoneVal()) ------------------ | Branch (333:9): [True: 749, False: 92.1k] | Branch (333:19): [True: 749, False: 0] ------------------ 334| 749| return std::make_pair(iterator(TheTable + BucketNo, false), 335| 749| false); // Already exists in map. 336| | 337| 92.1k| if (Bucket == getTombstoneVal()) ------------------ | Branch (337:9): [True: 0, False: 92.1k] ------------------ 338| 0| --NumTombstones; 339| 92.1k| Bucket = 340| 92.1k| MapEntryTy::Create(KV.first, Allocator, std::move(KV.second)); 341| 92.1k| ++NumItems; 342| 92.1k| assert(NumItems + NumTombstones <= NumBuckets); ------------------ | Branch (342:5): [True: 92.1k, False: 0] ------------------ 343| | 344| 92.1k| BucketNo = RehashTable(BucketNo); 345| 92.1k| return std::make_pair(iterator(TheTable + BucketNo, false), true); 346| 92.1k| } AsmParser.cpp:_ZN7llvm_ks17StringMapIteratorIN12_GLOBAL__N_19AsmParser13DirectiveKindEEC2EPPNS_18StringMapEntryBaseEb: 452| 274k| : StringMapConstIterator(Bucket, NoAdvance) { 453| 274k| } AsmParser.cpp:_ZN7llvm_ks22StringMapConstIteratorIN12_GLOBAL__N_19AsmParser13DirectiveKindEEC2EPPNS_18StringMapEntryBaseEb: 412| 274k| : Ptr(Bucket) { 413| 274k| if (!NoAdvance) AdvancePastEmptyBuckets(); ------------------ | Branch (413:9): [True: 92.8k, False: 181k] ------------------ 414| 274k| } AsmParser.cpp:_ZN7llvm_ks22StringMapConstIteratorIN12_GLOBAL__N_19AsmParser13DirectiveKindEE23AdvancePastEmptyBucketsEv: 440| 92.8k| void AdvancePastEmptyBuckets() { 441| 92.8k| while (*Ptr == nullptr || *Ptr == StringMapImpl::getTombstoneVal()) ------------------ | Branch (441:12): [True: 0, False: 92.8k] | Branch (441:31): [True: 0, False: 92.8k] ------------------ 442| 0| ++Ptr; 443| 92.8k| } AsmParser.cpp:_ZN7llvm_ks14StringMapEntryIN12_GLOBAL__N_19AsmParser13DirectiveKindEE6CreateINS_15MallocAllocatorES3_EEPS4_NS_9StringRefERT_OT0_: 149| 92.1k| InitType &&InitVal) { 150| 92.1k| unsigned KeyLength = Key.size(); 151| | 152| | // Allocate a new item with space for the string at the end and a null 153| | // terminator. 154| 92.1k| unsigned AllocSize = static_cast(sizeof(StringMapEntry))+ 155| 92.1k| KeyLength+1; 156| 92.1k| unsigned Alignment = alignOf(); 157| | 158| 92.1k| StringMapEntry *NewItem = 159| 92.1k| static_cast(Allocator.Allocate(AllocSize,Alignment)); 160| | 161| | // Default construct the value. 162| 92.1k| new (NewItem) StringMapEntry(KeyLength, std::forward(InitVal)); 163| | 164| | // Copy the string information. 165| 92.1k| char *StrBuffer = const_cast(NewItem->getKeyData()); 166| 92.1k| if (KeyLength > 0) ------------------ | Branch (166:9): [True: 92.1k, False: 0] ------------------ 167| 92.1k| memcpy(StrBuffer, Key.data(), KeyLength); 168| 92.1k| StrBuffer[KeyLength] = 0; // Null terminate for convenience of clients. 169| 92.1k| return NewItem; 170| 92.1k| } AsmParser.cpp:_ZN7llvm_ks14StringMapEntryIN12_GLOBAL__N_19AsmParser13DirectiveKindEEC2IS3_EEjOT_: 127| 92.1k| : StringMapEntryBase(strLen), second(std::forward(V)) {} AsmParser.cpp:_ZNK7llvm_ks14StringMapEntryIN12_GLOBAL__N_19AsmParser13DirectiveKindEE10getKeyDataEv: 141| 92.1k| const char *getKeyData() const {return reinterpret_cast(this+1);} AsmParser.cpp:_ZNK7llvm_ks17StringMapIteratorIN12_GLOBAL__N_19AsmParser13DirectiveKindEEptEv: 457| 92.8k| StringMapEntry *operator->() const { 458| 92.8k| return static_cast*>(*this->Ptr); 459| 92.8k| } AsmParser.cpp:_ZN7llvm_ks9StringMapIN12_GLOBAL__N_19AsmParser13DirectiveKindENS_15MallocAllocatorEE4findENS_9StringRefE: 277| 90.6k| iterator find(StringRef Key) { 278| 90.6k| int Bucket = FindKey(Key); 279| 90.6k| if (Bucket == -1) return end(); ------------------ | Branch (279:9): [True: 41.3k, False: 49.2k] ------------------ 280| 49.2k| return iterator(TheTable+Bucket, true); 281| 90.6k| } AsmParser.cpp:_ZNK7llvm_ks22StringMapConstIteratorIN12_GLOBAL__N_19AsmParser13DirectiveKindEEeqERKS4_: 423| 90.6k| bool operator==(const StringMapConstIterator &RHS) const { 424| 90.6k| return Ptr == RHS.Ptr; 425| 90.6k| } AsmParser.cpp:_ZN7llvm_ks9StringMapIN12_GLOBAL__N_19AsmParser13DirectiveKindENS_15MallocAllocatorEE3endEv: 267| 132k| iterator end() { 268| 132k| return iterator(TheTable+NumBuckets, true); 269| 132k| } AsmParser.cpp:_ZNK7llvm_ks22StringMapConstIteratorIN12_GLOBAL__N_19AsmParser13DirectiveKindEEptEv: 419| 49.2k| const value_type *operator->() const { 420| 49.2k| return static_cast*>(*Ptr); 421| 49.2k| } AsmParser.cpp:_ZNK7llvm_ks14StringMapEntryIN12_GLOBAL__N_19AsmParser13DirectiveKindEE8getValueEv: 133| 49.2k| const ValueTy &getValue() const { return second; } AsmParser.cpp:_ZN7llvm_ks9StringMapIN12_GLOBAL__N_110MCAsmMacroENS_15MallocAllocatorEE4findENS_9StringRefE: 277| 75.2k| iterator find(StringRef Key) { 278| 75.2k| int Bucket = FindKey(Key); 279| 75.2k| if (Bucket == -1) return end(); ------------------ | Branch (279:9): [True: 74.7k, False: 501] ------------------ 280| 501| return iterator(TheTable+Bucket, true); 281| 75.2k| } AsmParser.cpp:_ZN7llvm_ks17StringMapIteratorIN12_GLOBAL__N_110MCAsmMacroEEC2EPPNS_18StringMapEntryBaseEb: 452| 150k| : StringMapConstIterator(Bucket, NoAdvance) { 453| 150k| } AsmParser.cpp:_ZN7llvm_ks22StringMapConstIteratorIN12_GLOBAL__N_110MCAsmMacroEEC2EPPNS_18StringMapEntryBaseEb: 412| 150k| : Ptr(Bucket) { 413| 150k| if (!NoAdvance) AdvancePastEmptyBuckets(); ------------------ | Branch (413:9): [True: 54, False: 150k] ------------------ 414| 150k| } AsmParser.cpp:_ZN7llvm_ks22StringMapConstIteratorIN12_GLOBAL__N_110MCAsmMacroEE23AdvancePastEmptyBucketsEv: 440| 54| void AdvancePastEmptyBuckets() { 441| 54| while (*Ptr == nullptr || *Ptr == StringMapImpl::getTombstoneVal()) ------------------ | Branch (441:12): [True: 0, False: 54] | Branch (441:31): [True: 0, False: 54] ------------------ 442| 0| ++Ptr; 443| 54| } AsmParser.cpp:_ZNK7llvm_ks22StringMapConstIteratorIN12_GLOBAL__N_110MCAsmMacroEEeqERKS3_: 423| 75.2k| bool operator==(const StringMapConstIterator &RHS) const { 424| 75.2k| return Ptr == RHS.Ptr; 425| 75.2k| } AsmParser.cpp:_ZN7llvm_ks9StringMapIN12_GLOBAL__N_110MCAsmMacroENS_15MallocAllocatorEE3endEv: 267| 149k| iterator end() { 268| 149k| return iterator(TheTable+NumBuckets, true); 269| 149k| } AsmParser.cpp:_ZNK7llvm_ks17StringMapIteratorIN12_GLOBAL__N_110MCAsmMacroEEptEv: 457| 501| StringMapEntry *operator->() const { 458| 501| return static_cast*>(*this->Ptr); 459| 501| } AsmParser.cpp:_ZN7llvm_ks14StringMapEntryIN12_GLOBAL__N_110MCAsmMacroEE8getValueEv: 134| 501| ValueTy &getValue() { return second; } _ZNK7llvm_ks9StringMapINSt3__14pairIPNS_20MCAsmParserExtensionEPFbS4_NS_9StringRefENS_5SMLocEEEENS_15MallocAllocatorEE6lookupES5_: 291| 35.2k| ValueTy lookup(StringRef Key) const { 292| 35.2k| const_iterator it = find(Key); 293| 35.2k| if (it != end()) ------------------ | Branch (293:9): [True: 6.48k, False: 28.8k] ------------------ 294| 6.48k| return it->second; 295| 28.8k| return ValueTy(); 296| 35.2k| } _ZNK7llvm_ks9StringMapINSt3__14pairIPNS_20MCAsmParserExtensionEPFbS4_NS_9StringRefENS_5SMLocEEEENS_15MallocAllocatorEE4findES5_: 283| 35.2k| const_iterator find(StringRef Key) const { 284| 35.2k| int Bucket = FindKey(Key); 285| 35.2k| if (Bucket == -1) return end(); ------------------ | Branch (285:9): [True: 28.8k, False: 6.48k] ------------------ 286| 6.48k| return const_iterator(TheTable+Bucket, true); 287| 35.2k| } _ZNK7llvm_ks22StringMapConstIteratorINSt3__14pairIPNS_20MCAsmParserExtensionEPFbS4_NS_9StringRefENS_5SMLocEEEEEneERKSA_: 426| 35.2k| bool operator!=(const StringMapConstIterator &RHS) const { 427| 35.2k| return Ptr != RHS.Ptr; 428| 35.2k| } _ZNK7llvm_ks9StringMapINSt3__14pairIPNS_20MCAsmParserExtensionEPFbS4_NS_9StringRefENS_5SMLocEEEENS_15MallocAllocatorEE3endEv: 273| 64.0k| const_iterator end() const { 274| 64.0k| return const_iterator(TheTable+NumBuckets, true); 275| 64.0k| } _ZNK7llvm_ks22StringMapConstIteratorINSt3__14pairIPNS_20MCAsmParserExtensionEPFbS4_NS_9StringRefENS_5SMLocEEEEEptEv: 419| 6.48k| const value_type *operator->() const { 420| 6.48k| return static_cast*>(*Ptr); 421| 6.48k| } AsmParser.cpp:_ZN7llvm_ks9StringMapIN12_GLOBAL__N_110MCAsmMacroENS_15MallocAllocatorEE6insertENSt3__14pairINS_9StringRefES2_EE: 330| 54| std::pair insert(std::pair KV) { 331| 54| unsigned BucketNo = LookupBucketFor(KV.first); 332| 54| StringMapEntryBase *&Bucket = TheTable[BucketNo]; 333| 54| if (Bucket && Bucket != getTombstoneVal()) ------------------ | Branch (333:9): [True: 0, False: 54] | Branch (333:19): [True: 0, False: 0] ------------------ 334| 0| return std::make_pair(iterator(TheTable + BucketNo, false), 335| 0| false); // Already exists in map. 336| | 337| 54| if (Bucket == getTombstoneVal()) ------------------ | Branch (337:9): [True: 0, False: 54] ------------------ 338| 0| --NumTombstones; 339| 54| Bucket = 340| 54| MapEntryTy::Create(KV.first, Allocator, std::move(KV.second)); 341| 54| ++NumItems; 342| 54| assert(NumItems + NumTombstones <= NumBuckets); ------------------ | Branch (342:5): [True: 54, False: 0] ------------------ 343| | 344| 54| BucketNo = RehashTable(BucketNo); 345| 54| return std::make_pair(iterator(TheTable + BucketNo, false), true); 346| 54| } AsmParser.cpp:_ZN7llvm_ks14StringMapEntryIN12_GLOBAL__N_110MCAsmMacroEE6CreateINS_15MallocAllocatorES2_EEPS3_NS_9StringRefERT_OT0_: 149| 54| InitType &&InitVal) { 150| 54| unsigned KeyLength = Key.size(); 151| | 152| | // Allocate a new item with space for the string at the end and a null 153| | // terminator. 154| 54| unsigned AllocSize = static_cast(sizeof(StringMapEntry))+ 155| 54| KeyLength+1; 156| 54| unsigned Alignment = alignOf(); 157| | 158| 54| StringMapEntry *NewItem = 159| 54| static_cast(Allocator.Allocate(AllocSize,Alignment)); 160| | 161| | // Default construct the value. 162| 54| new (NewItem) StringMapEntry(KeyLength, std::forward(InitVal)); 163| | 164| | // Copy the string information. 165| 54| char *StrBuffer = const_cast(NewItem->getKeyData()); 166| 54| if (KeyLength > 0) ------------------ | Branch (166:9): [True: 53, False: 1] ------------------ 167| 53| memcpy(StrBuffer, Key.data(), KeyLength); 168| 54| StrBuffer[KeyLength] = 0; // Null terminate for convenience of clients. 169| 54| return NewItem; 170| 54| } AsmParser.cpp:_ZN7llvm_ks14StringMapEntryIN12_GLOBAL__N_110MCAsmMacroEEC2IS2_EEjOT_: 127| 54| : StringMapEntryBase(strLen), second(std::forward(V)) {} AsmParser.cpp:_ZNK7llvm_ks14StringMapEntryIN12_GLOBAL__N_110MCAsmMacroEE10getKeyDataEv: 141| 54| const char *getKeyData() const {return reinterpret_cast(this+1);} AsmParser.cpp:_ZN7llvm_ks9StringMapIN12_GLOBAL__N_19AsmParser13DirectiveKindENS_15MallocAllocatorEE5clearEv: 349| 749| void clear() { 350| 749| if (empty()) return; ------------------ | Branch (350:9): [True: 749, False: 0] ------------------ 351| | 352| | // Zap all values, resetting the keys back to non-present (not tombstone), 353| | // which is safe because we're removing all elements. 354| 0| for (unsigned I = 0, E = NumBuckets; I != E; ++I) { ------------------ | Branch (354:42): [True: 0, False: 0] ------------------ 355| 0| StringMapEntryBase *&Bucket = TheTable[I]; 356| 0| if (Bucket && Bucket != getTombstoneVal()) { ------------------ | Branch (356:11): [True: 0, False: 0] | Branch (356:21): [True: 0, False: 0] ------------------ 357| 0| static_cast(Bucket)->Destroy(Allocator); 358| 0| } 359| 0| Bucket = nullptr; 360| 0| } 361| | 362| 0| NumItems = 0; 363| 0| NumTombstones = 0; 364| 0| } _ZN7llvm_ks9StringRefC2ERKNSt3__112basic_stringIcNS1_11char_traitsIcEENS1_9allocatorIcEEEE: 91| 303k| : Data(Str.data()), Length(Str.length()) {} _ZN7llvm_ks9StringRefC2EPKc: 72| 8.65M| : Data(Str) { 73| | //assert(Str && "StringRef cannot be built from a NULL argument"); 74| 8.65M| if (!Str) ------------------ | Branch (74:13): [True: 0, False: 8.65M] ------------------ 75| 0| Length = 0; 76| 8.65M| else 77| 8.65M| Length = ::strlen(Str); // invoking strlen(NULL) is undefined behavior 78| 8.65M| } _ZN7llvm_ks9StringRef13compareMemoryEPKcS2_m: 58| 1.24M| static int compareMemory(const char *Lhs, const char *Rhs, size_t Length) { 59| 1.24M| if (Length == 0) { return 0; } ------------------ | Branch (59:11): [True: 668, False: 1.23M] ------------------ 60| 1.23M| return ::memcmp(Lhs,Rhs,Length); 61| 1.24M| } _ZN7llvm_ks9StringRefC2Ev: 68| 290k| /*implicit*/ StringRef() : Data(nullptr), Length(0) {} _ZN7llvm_ks9StringRefC2EPKcm: 83| 29.5M| : Data(data), Length(length) { 84| | assert((data || length == 0) && ------------------ | Branch (84:9): [True: 29.5M, False: 0] | Branch (84:9): [True: 0, False: 0] | Branch (84:9): [True: 29.5M, Folded] | Branch (84:9): [True: 29.5M, False: 0] ------------------ 85| 29.5M| "StringRef cannot be built from a NULL argument with non-null length"); 86| 29.5M| } _ZNK7llvm_ks9StringRef5beginEv: 97| 208k| iterator begin() const { return Data; } _ZNK7llvm_ks9StringRef3endEv: 99| 423k| iterator end() const { return Data + Length; } _ZNK7llvm_ks9StringRef4dataEv: 115| 2.38M| const char *data() const { return Data; } _ZNK7llvm_ks9StringRef5emptyEv: 119| 2.11M| bool empty() const { return Length == 0; } _ZNK7llvm_ks9StringRef4sizeEv: 123| 4.55M| size_t size() const { return Length; } _ZNK7llvm_ks9StringRef5frontEv: 126| 182k| char front() const { 127| 182k| assert(!empty()); ------------------ | Branch (127:7): [True: 182k, False: 0] ------------------ 128| 182k| return Data[0]; 129| 182k| } _ZNK7llvm_ks9StringRef6equalsES0_: 147| 8.73M| bool equals(StringRef RHS) const { 148| 8.73M| return (Length == RHS.Length && ------------------ | Branch (148:15): [True: 491k, False: 8.24M] ------------------ 149| 491k| compareMemory(Data, RHS.Data, RHS.Length) == 0); ------------------ | Branch (149:15): [True: 222k, False: 268k] ------------------ 150| 8.73M| } _ZNK7llvm_ks9StringRef7compareES0_: 160| 515k| int compare(StringRef RHS) const { 161| | // Check the prefix for a mismatch. 162| 515k| if (int Res = compareMemory(Data, RHS.Data, std::min(Length, RHS.Length))) ------------------ | Branch (162:15): [True: 247k, False: 268k] ------------------ 163| 247k| return Res < 0 ? -1 : 1; ------------------ | Branch (163:16): [True: 152k, False: 94.8k] ------------------ 164| | 165| | // Otherwise the prefixes match, so we only need to check the lengths. 166| 268k| if (Length == RHS.Length) ------------------ | Branch (166:11): [True: 105k, False: 162k] ------------------ 167| 105k| return 0; 168| 162k| return Length < RHS.Length ? -1 : 1; ------------------ | Branch (168:14): [True: 101k, False: 60.7k] ------------------ 169| 268k| } _ZNK7llvm_ks9StringRef3strEv: 200| 234k| std::string str() const { 201| 234k| if (!Data) return std::string(); ------------------ | Branch (201:11): [True: 0, False: 234k] ------------------ 202| 234k| return std::string(Data, Length); 203| 234k| } _ZNK7llvm_ks9StringRefixEm: 209| 93.3M| char operator[](size_t Index) const { 210| 93.3M| assert(Index < Length && "Invalid index!"); ------------------ | Branch (210:7): [True: 93.3M, False: 0] | Branch (210:7): [True: 93.3M, Folded] | Branch (210:7): [True: 93.3M, False: 0] ------------------ 211| 93.3M| return Data[Index]; 212| 93.3M| } _ZNK7llvm_ks9StringRefcvNSt3__112basic_stringIcNS1_11char_traitsIcEENS1_9allocatorIcEEEEEv: 218| 185k| operator std::string() const { 219| 185k| return str(); 220| 185k| } _ZNK7llvm_ks9StringRef10startswithES0_: 228| 67.2k| bool startswith(StringRef Prefix) const { 229| 67.2k| return Length >= Prefix.Length && ------------------ | Branch (229:14): [True: 23.7k, False: 43.5k] ------------------ 230| 23.7k| compareMemory(Data, Prefix.Data, Prefix.Length) == 0; ------------------ | Branch (230:14): [True: 3.42k, False: 20.3k] ------------------ 231| 67.2k| } _ZNK7llvm_ks9StringRef8endswithES0_: 238| 208k| bool endswith(StringRef Suffix) const { 239| 208k| return Length >= Suffix.Length && ------------------ | Branch (239:14): [True: 208k, False: 0] ------------------ 240| 208k| compareMemory(end() - Suffix.Length, Suffix.Data, Suffix.Length) == 0; ------------------ | Branch (240:9): [True: 0, False: 208k] ------------------ 241| 208k| } _ZNK7llvm_ks9StringRef4findEcm: 255| 123k| size_t find(char C, size_t From = 0) const { 256| 123k| size_t FindBegin = std::min(From, Length); 257| 123k| if (FindBegin < Length) { // Avoid calling memchr with nullptr. ------------------ | Branch (257:11): [True: 122k, False: 921] ------------------ 258| | // Just forward to memchr, which is faster than a hand-rolled loop. 259| 122k| if (const void *P = ::memchr(Data + FindBegin, C, Length - FindBegin)) ------------------ | Branch (259:25): [True: 95.9k, False: 26.0k] ------------------ 260| 95.9k| return static_cast(P) - Data; 261| 122k| } 262| 27.0k| return npos; 263| 123k| } _ZNK7llvm_ks9StringRef6substrEmm: 421| 1.21M| StringRef substr(size_t Start, size_t N = npos) const { 422| 1.21M| Start = std::min(Start, Length); 423| 1.21M| return StringRef(Data + Start, std::min(N, Length - Start)); 424| 1.21M| } _ZNK7llvm_ks9StringRef10drop_frontEm: 429| 28.4k| StringRef drop_front(size_t N = 1) const { 430| 28.4k| assert(size() >= N && "Dropping more elements than exist"); ------------------ | Branch (430:7): [True: 28.4k, False: 0] | Branch (430:7): [True: 28.4k, Folded] | Branch (430:7): [True: 28.4k, False: 0] ------------------ 431| 28.4k| return substr(N); 432| 28.4k| } _ZNK7llvm_ks9StringRef9drop_backEm: 437| 28.4k| StringRef drop_back(size_t N = 1) const { 438| 28.4k| assert(size() >= N && "Dropping more elements than exist"); ------------------ | Branch (438:7): [True: 28.4k, False: 0] | Branch (438:7): [True: 28.4k, Folded] | Branch (438:7): [True: 28.4k, False: 0] ------------------ 439| 28.4k| return substr(0, size()-N); 440| 28.4k| } _ZNK7llvm_ks9StringRef5sliceEmm: 453| 1.02M| StringRef slice(size_t Start, size_t End) const { 454| 1.02M| Start = std::min(Start, Length); 455| 1.02M| End = std::min(std::max(Start, End), Length); 456| 1.02M| return StringRef(Data + Start, End - Start); 457| 1.02M| } _ZNK7llvm_ks9StringRef5splitEc: 469| 14.5k| std::pair split(char Separator) const { 470| 14.5k| size_t Idx = find(Separator); 471| 14.5k| if (Idx == npos) ------------------ | Branch (471:11): [True: 13.2k, False: 1.38k] ------------------ 472| 13.2k| return std::make_pair(*this, StringRef()); 473| 1.38k| return std::make_pair(slice(0, Idx), slice(Idx+1, npos)); 474| 14.5k| } _ZNK7llvm_ks9StringRef5ltrimES0_: 547| 28.4k| StringRef ltrim(StringRef Chars = " \t\n\v\f\r") const { 548| 28.4k| return drop_front(std::min(Length, find_first_not_of(Chars))); 549| 28.4k| } _ZNK7llvm_ks9StringRef5rtrimES0_: 553| 28.4k| StringRef rtrim(StringRef Chars = " \t\n\v\f\r") const { 554| 28.4k| return drop_back(Length - std::min(Length, find_last_not_of(Chars) + 1)); 555| 28.4k| } _ZNK7llvm_ks9StringRef4trimES0_: 559| 28.4k| StringRef trim(StringRef Chars = " \t\n\v\f\r") const { 560| 28.4k| return ltrim(Chars).rtrim(Chars); 561| 28.4k| } _ZN7llvm_kseqENS_9StringRefES0_: 579| 8.67M| inline bool operator==(StringRef LHS, StringRef RHS) { 580| 8.67M| return LHS.equals(RHS); 581| 8.67M| } _ZN7llvm_ksneENS_9StringRefES0_: 584| 73.8k| inline bool operator!=(StringRef LHS, StringRef RHS) { 585| 73.8k| return !(LHS == RHS); 586| 73.8k| } _ZN7llvm_ksltENS_9StringRefES0_: 588| 515k| inline bool operator<(StringRef LHS, StringRef RHS) { 589| 515k| return LHS.compare(RHS) == -1; 590| 515k| } _ZN7llvm_kspLERNSt3__112basic_stringIcNS0_11char_traitsIcEENS0_9allocatorIcEEEENS_9StringRefE: 604| 751| inline std::string &operator+=(std::string &buffer, StringRef string) { 605| 751| return buffer.append(string.data(), string.size()); 606| 751| } _ZNK7llvm_ks9StringRef12getAsIntegerIjEENSt3__19enable_ifIXntsr3std14numeric_limitsIT_EE9is_signedEbE4typeEjRS4_: 373| 315| getAsInteger(unsigned Radix, T &Result) const { 374| 315| unsigned long long ULLVal; 375| | // The additional cast to unsigned long long is required to avoid the 376| | // Visual C++ warning C4805: '!=' : unsafe mix of type 'bool' and type 377| | // 'unsigned __int64' when instantiating getAsInteger with T = bool. 378| 315| if (getAsUnsignedInteger(*this, Radix, ULLVal) || ------------------ | Branch (378:11): [True: 206, False: 109] ------------------ 379| 109| static_cast(static_cast(ULLVal)) != ULLVal) ------------------ | Branch (379:11): [True: 0, False: 109] ------------------ 380| 206| return true; 381| 109| Result = ULLVal; 382| 109| return false; 383| 315| } _ZN7llvm_ks12StringSwitchINS_15MCSymbolRefExpr11VariantKindES2_EC2ENS_9StringRefE: 54| 1.68k| : Str(S), Result(nullptr) { } _ZN7llvm_ks12StringSwitchINS_15MCSymbolRefExpr11VariantKindES2_E4CaseILj4EEERS3_RAT__KcRKS2_: 58| 5.89k| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 5.89k| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 4.56k, False: 1.33k] | Branch (59:20): [True: 243, False: 4.32k] ------------------ 60| 243| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 16, False: 227] ------------------ 61| 16| Result = &Value; 62| 16| } 63| | 64| 5.89k| return *this; 65| 5.89k| } _ZN7llvm_ks12StringSwitchINS_15MCSymbolRefExpr11VariantKindES2_E4CaseILj7EEERS3_RAT__KcRKS2_: 58| 18.5k| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 18.5k| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 11.8k, False: 6.63k] | Branch (59:20): [True: 1.13k, False: 10.7k] ------------------ 60| 1.13k| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 192, False: 944] ------------------ 61| 192| Result = &Value; 62| 192| } 63| | 64| 18.5k| return *this; 65| 18.5k| } _ZN7llvm_ks12StringSwitchINS_15MCSymbolRefExpr11VariantKindES2_E4CaseILj9EEERS3_RAT__KcRKS2_: 58| 14.8k| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 14.8k| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 9.22k, False: 5.64k] | Branch (59:20): [True: 633, False: 8.58k] ------------------ 60| 633| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 128, False: 505] ------------------ 61| 128| Result = &Value; 62| 128| } 63| | 64| 14.8k| return *this; 65| 14.8k| } _ZN7llvm_ks12StringSwitchINS_15MCSymbolRefExpr11VariantKindES2_E4CaseILj10EEERS3_RAT__KcRKS2_: 58| 8.98k| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 8.98k| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 5.43k, False: 3.55k] | Branch (59:20): [True: 300, False: 5.13k] ------------------ 60| 300| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 76, False: 224] ------------------ 61| 76| Result = &Value; 62| 76| } 63| | 64| 8.98k| return *this; 65| 8.98k| } _ZN7llvm_ks12StringSwitchINS_15MCSymbolRefExpr11VariantKindES2_E4CaseILj6EEERS3_RAT__KcRKS2_: 58| 22.7k| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 22.7k| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 12.6k, False: 10.1k] | Branch (59:20): [True: 1.43k, False: 11.1k] ------------------ 60| 1.43k| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 78, False: 1.35k] ------------------ 61| 78| Result = &Value; 62| 78| } 63| | 64| 22.7k| return *this; 65| 22.7k| } _ZN7llvm_ks12StringSwitchINS_15MCSymbolRefExpr11VariantKindES2_E4CaseILj5EEERS3_RAT__KcRKS2_: 58| 5.62k| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 5.62k| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 3.71k, False: 1.90k] | Branch (59:20): [True: 360, False: 3.35k] ------------------ 60| 360| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 0, False: 360] ------------------ 61| 0| Result = &Value; 62| 0| } 63| | 64| 5.62k| return *this; 65| 5.62k| } _ZN7llvm_ks12StringSwitchINS_15MCSymbolRefExpr11VariantKindES2_E4CaseILj12EEERS3_RAT__KcRKS2_: 58| 9.83k| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 9.83k| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 5.07k, False: 4.75k] | Branch (59:20): [True: 609, False: 4.46k] ------------------ 60| 609| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 65, False: 544] ------------------ 61| 65| Result = &Value; 62| 65| } 63| | 64| 9.83k| return *this; 65| 9.83k| } _ZN7llvm_ks12StringSwitchINS_15MCSymbolRefExpr11VariantKindES2_E4CaseILj8EEERS3_RAT__KcRKS2_: 58| 16.2k| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 16.2k| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 9.02k, False: 7.26k] | Branch (59:20): [True: 189, False: 8.83k] ------------------ 60| 189| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 4, False: 185] ------------------ 61| 4| Result = &Value; 62| 4| } 63| | 64| 16.2k| return *this; 65| 16.2k| } _ZN7llvm_ks12StringSwitchINS_15MCSymbolRefExpr11VariantKindES2_E4CaseILj11EEERS3_RAT__KcRKS2_: 58| 2.81k| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 2.81k| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 1.84k, False: 968] | Branch (59:20): [True: 34, False: 1.80k] ------------------ 60| 34| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 17, False: 17] ------------------ 61| 17| Result = &Value; 62| 17| } 63| | 64| 2.81k| return *this; 65| 2.81k| } _ZN7llvm_ks12StringSwitchINS_15MCSymbolRefExpr11VariantKindES2_E4CaseILj2EEERS3_RAT__KcRKS2_: 58| 2.81k| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 2.81k| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 2.11k, False: 692] | Branch (59:20): [True: 144, False: 1.97k] ------------------ 60| 144| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 64, False: 80] ------------------ 61| 64| Result = &Value; 62| 64| } 63| | 64| 2.81k| return *this; 65| 2.81k| } _ZN7llvm_ks12StringSwitchINS_15MCSymbolRefExpr11VariantKindES2_E4CaseILj3EEERS3_RAT__KcRKS2_: 58| 3.36k| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 3.36k| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 1.88k, False: 1.48k] | Branch (59:20): [True: 453, False: 1.43k] ------------------ 60| 453| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 278, False: 175] ------------------ 61| 278| Result = &Value; 62| 278| } 63| | 64| 3.36k| return *this; 65| 3.36k| } _ZN7llvm_ks12StringSwitchINS_15MCSymbolRefExpr11VariantKindES2_E4CaseILj13EEERS3_RAT__KcRKS2_: 58| 8.43k| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 8.43k| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 4.42k, False: 4.00k] | Branch (59:20): [True: 1.04k, False: 3.37k] ------------------ 60| 1.04k| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 205, False: 844] ------------------ 61| 205| Result = &Value; 62| 205| } 63| | 64| 8.43k| return *this; 65| 8.43k| } _ZN7llvm_ks12StringSwitchINS_15MCSymbolRefExpr11VariantKindES2_E4CaseILj14EEERS3_RAT__KcRKS2_: 58| 5.62k| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 5.62k| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 3.58k, False: 2.03k] | Branch (59:20): [True: 2, False: 3.58k] ------------------ 60| 2| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 1, False: 1] ------------------ 61| 1| Result = &Value; 62| 1| } 63| | 64| 5.62k| return *this; 65| 5.62k| } _ZN7llvm_ks12StringSwitchINS_15MCSymbolRefExpr11VariantKindES2_E4CaseILj15EEERS3_RAT__KcRKS2_: 58| 4.21k| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 4.21k| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 2.65k, False: 1.56k] | Branch (59:20): [True: 211, False: 2.44k] ------------------ 60| 211| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 117, False: 94] ------------------ 61| 117| Result = &Value; 62| 117| } 63| | 64| 4.21k| return *this; 65| 4.21k| } _ZN7llvm_ks12StringSwitchINS_15MCSymbolRefExpr11VariantKindES2_E4CaseILj16EEERS3_RAT__KcRKS2_: 58| 1.96k| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 1.96k| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 801, False: 1.16k] | Branch (59:20): [True: 0, False: 801] ------------------ 60| 0| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 0, False: 0] ------------------ 61| 0| Result = &Value; 62| 0| } 63| | 64| 1.96k| return *this; 65| 1.96k| } _ZNK7llvm_ks12StringSwitchINS_15MCSymbolRefExpr11VariantKindES2_E7DefaultERKS2_: 150| 1.68k| R Default(const T& Value) const { 151| 1.68k| if (Result) ------------------ | Branch (151:9): [True: 1.24k, False: 442] ------------------ 152| 1.24k| return *Result; 153| | 154| 442| return Value; 155| 1.68k| } _ZN7llvm_ks12StringSwitchINS_9StringRefES1_EC2ES1_: 54| 12.3k| : Str(S), Result(nullptr) { } _ZN7llvm_ks12StringSwitchINS_9StringRefES1_E4CaseILj14EEERS2_RAT__KcRKS1_: 58| 11.0k| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 11.0k| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 11.0k, False: 0] | Branch (59:20): [True: 64, False: 10.9k] ------------------ 60| 64| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 0, False: 64] ------------------ 61| 0| Result = &Value; 62| 0| } 63| | 64| 11.0k| return *this; 65| 11.0k| } _ZN7llvm_ks12StringSwitchINS_9StringRefES1_E4CaseILj13EEERS2_RAT__KcRKS1_: 58| 5.51k| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 5.51k| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 5.51k, False: 0] | Branch (59:20): [True: 32, False: 5.48k] ------------------ 60| 32| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 0, False: 32] ------------------ 61| 0| Result = &Value; 62| 0| } 63| | 64| 5.51k| return *this; 65| 5.51k| } _ZNK7llvm_ks12StringSwitchINS_9StringRefES1_E7DefaultERKS1_: 150| 12.3k| R Default(const T& Value) const { 151| 12.3k| if (Result) ------------------ | Branch (151:9): [True: 4, False: 12.3k] ------------------ 152| 4| return *Result; 153| | 154| 12.3k| return Value; 155| 12.3k| } _ZN7llvm_ks12StringSwitchINS_6Triple8ArchTypeES2_E5CasesILj5ELj5ELj5ELj5EEERS3_RAT__KcRAT0__S6_RAT1__S6_RAT2__S6_RKS2_: 120| 7.49k| const T& Value) { 121| 7.49k| if (!Result && ( ------------------ | Branch (121:9): [True: 7.49k, False: 0] ------------------ 122| 7.49k| (N0-1 == Str.size() && std::memcmp(S0, Str.data(), N0-1) == 0) || ------------------ | Branch (122:10): [True: 7.49k, False: 0] | Branch (122:32): [True: 0, False: 7.49k] ------------------ 123| 7.49k| (N1-1 == Str.size() && std::memcmp(S1, Str.data(), N1-1) == 0) || ------------------ | Branch (123:10): [True: 7.49k, False: 0] | Branch (123:32): [True: 0, False: 7.49k] ------------------ 124| 7.49k| (N2-1 == Str.size() && std::memcmp(S2, Str.data(), N2-1) == 0) || ------------------ | Branch (124:10): [True: 7.49k, False: 0] | Branch (124:32): [True: 0, False: 7.49k] ------------------ 125| 7.49k| (N3-1 == Str.size() && std::memcmp(S3, Str.data(), N3-1) == 0))) { ------------------ | Branch (125:10): [True: 7.49k, False: 0] | Branch (125:32): [True: 0, False: 7.49k] ------------------ 126| 0| Result = &Value; 127| 0| } 128| | 129| 7.49k| return *this; 130| 7.49k| } _ZN7llvm_ks12StringSwitchINS_6Triple8ArchTypeES2_E5CasesILj5ELj5ELj5EEERS3_RAT__KcRAT0__S6_RAT1__S6_RKS2_: 105| 7.49k| const char (&S2)[N2], const T& Value) { 106| 7.49k| if (!Result && ( ------------------ | Branch (106:9): [True: 7.49k, False: 0] ------------------ 107| 7.49k| (N0-1 == Str.size() && std::memcmp(S0, Str.data(), N0-1) == 0) || ------------------ | Branch (107:10): [True: 7.49k, False: 0] | Branch (107:32): [True: 0, False: 7.49k] ------------------ 108| 7.49k| (N1-1 == Str.size() && std::memcmp(S1, Str.data(), N1-1) == 0) || ------------------ | Branch (108:10): [True: 7.49k, False: 0] | Branch (108:32): [True: 0, False: 7.49k] ------------------ 109| 7.49k| (N2-1 == Str.size() && std::memcmp(S2, Str.data(), N2-1) == 0))) { ------------------ | Branch (109:10): [True: 7.49k, False: 0] | Branch (109:32): [True: 0, False: 7.49k] ------------------ 110| 0| Result = &Value; 111| 0| } 112| | 113| 7.49k| return *this; 114| 7.49k| } _ZN7llvm_ks12StringSwitchINS_6Triple8ArchTypeES2_E5CasesILj6ELj7ELj8EEERS3_RAT__KcRAT0__S6_RAT1__S6_RKS2_: 105| 7.49k| const char (&S2)[N2], const T& Value) { 106| 7.49k| if (!Result && ( ------------------ | Branch (106:9): [True: 7.49k, False: 0] ------------------ 107| 7.49k| (N0-1 == Str.size() && std::memcmp(S0, Str.data(), N0-1) == 0) || ------------------ | Branch (107:10): [True: 0, False: 7.49k] | Branch (107:32): [True: 0, False: 0] ------------------ 108| 7.49k| (N1-1 == Str.size() && std::memcmp(S1, Str.data(), N1-1) == 0) || ------------------ | Branch (108:10): [True: 0, False: 7.49k] | Branch (108:32): [True: 0, False: 0] ------------------ 109| 7.49k| (N2-1 == Str.size() && std::memcmp(S2, Str.data(), N2-1) == 0))) { ------------------ | Branch (109:10): [True: 0, False: 7.49k] | Branch (109:32): [True: 0, False: 0] ------------------ 110| 0| Result = &Value; 111| 0| } 112| | 113| 7.49k| return *this; 114| 7.49k| } _ZN7llvm_ks12StringSwitchINS_6Triple8ArchTypeES2_E5CasesILj8ELj6EEERS3_RAT__KcRAT0__S6_RKS2_: 92| 7.49k| const T& Value) { 93| 7.49k| if (!Result && ( ------------------ | Branch (93:9): [True: 7.49k, False: 0] ------------------ 94| 7.49k| (N0-1 == Str.size() && std::memcmp(S0, Str.data(), N0-1) == 0) || ------------------ | Branch (94:10): [True: 0, False: 7.49k] | Branch (94:32): [True: 0, False: 0] ------------------ 95| 7.49k| (N1-1 == Str.size() && std::memcmp(S1, Str.data(), N1-1) == 0))) { ------------------ | Branch (95:10): [True: 0, False: 7.49k] | Branch (95:32): [True: 0, False: 0] ------------------ 96| 0| Result = &Value; 97| 0| } 98| | 99| 7.49k| return *this; 100| 7.49k| } _ZN7llvm_ks12StringSwitchINS_6Triple8ArchTypeES2_E5CasesILj10ELj4ELj6EEERS3_RAT__KcRAT0__S6_RAT1__S6_RKS2_: 105| 7.49k| const char (&S2)[N2], const T& Value) { 106| 7.49k| if (!Result && ( ------------------ | Branch (106:9): [True: 7.49k, False: 0] ------------------ 107| 7.49k| (N0-1 == Str.size() && std::memcmp(S0, Str.data(), N0-1) == 0) || ------------------ | Branch (107:10): [True: 0, False: 7.49k] | Branch (107:32): [True: 0, False: 0] ------------------ 108| 7.49k| (N1-1 == Str.size() && std::memcmp(S1, Str.data(), N1-1) == 0) || ------------------ | Branch (108:10): [True: 0, False: 7.49k] | Branch (108:32): [True: 0, False: 0] ------------------ 109| 7.49k| (N2-1 == Str.size() && std::memcmp(S2, Str.data(), N2-1) == 0))) { ------------------ | Branch (109:10): [True: 0, False: 7.49k] | Branch (109:32): [True: 0, False: 0] ------------------ 110| 0| Result = &Value; 111| 0| } 112| | 113| 7.49k| return *this; 114| 7.49k| } _ZN7llvm_ks12StringSwitchINS_6Triple8ArchTypeES2_E5CasesILj12ELj8EEERS3_RAT__KcRAT0__S6_RKS2_: 92| 7.49k| const T& Value) { 93| 7.49k| if (!Result && ( ------------------ | Branch (93:9): [True: 7.49k, False: 0] ------------------ 94| 7.49k| (N0-1 == Str.size() && std::memcmp(S0, Str.data(), N0-1) == 0) || ------------------ | Branch (94:10): [True: 0, False: 7.49k] | Branch (94:32): [True: 0, False: 0] ------------------ 95| 7.49k| (N1-1 == Str.size() && std::memcmp(S1, Str.data(), N1-1) == 0))) { ------------------ | Branch (95:10): [True: 0, False: 7.49k] | Branch (95:32): [True: 0, False: 0] ------------------ 96| 0| Result = &Value; 97| 0| } 98| | 99| 7.49k| return *this; 100| 7.49k| } _ZN7llvm_ks12StringSwitchINS_6Triple8ArchTypeES2_E5CasesILj5ELj7ELj13EEERS3_RAT__KcRAT0__S6_RAT1__S6_RKS2_: 105| 7.49k| const char (&S2)[N2], const T& Value) { 106| 7.49k| if (!Result && ( ------------------ | Branch (106:9): [True: 7.49k, False: 0] ------------------ 107| 7.49k| (N0-1 == Str.size() && std::memcmp(S0, Str.data(), N0-1) == 0) || ------------------ | Branch (107:10): [True: 7.49k, False: 0] | Branch (107:32): [True: 7.49k, False: 0] ------------------ 108| 0| (N1-1 == Str.size() && std::memcmp(S1, Str.data(), N1-1) == 0) || ------------------ | Branch (108:10): [True: 0, False: 0] | Branch (108:32): [True: 0, False: 0] ------------------ 109| 7.49k| (N2-1 == Str.size() && std::memcmp(S2, Str.data(), N2-1) == 0))) { ------------------ | Branch (109:10): [True: 0, False: 0] | Branch (109:32): [True: 0, False: 0] ------------------ 110| 7.49k| Result = &Value; 111| 7.49k| } 112| | 113| 7.49k| return *this; 114| 7.49k| } _ZN7llvm_ks12StringSwitchINS_6Triple8ArchTypeES2_E5CasesILj7ELj15EEERS3_RAT__KcRAT0__S6_RKS2_: 92| 7.49k| const T& Value) { 93| 7.49k| if (!Result && ( ------------------ | Branch (93:9): [True: 0, False: 7.49k] ------------------ 94| 0| (N0-1 == Str.size() && std::memcmp(S0, Str.data(), N0-1) == 0) || ------------------ | Branch (94:10): [True: 0, False: 0] | Branch (94:32): [True: 0, False: 0] ------------------ 95| 0| (N1-1 == Str.size() && std::memcmp(S1, Str.data(), N1-1) == 0))) { ------------------ | Branch (95:10): [True: 0, False: 0] | Branch (95:32): [True: 0, False: 0] ------------------ 96| 0| Result = &Value; 97| 0| } 98| | 99| 7.49k| return *this; 100| 7.49k| } _ZN7llvm_ks12StringSwitchINS_6Triple8ArchTypeES2_E5CasesILj7ELj9EEERS3_RAT__KcRAT0__S6_RKS2_: 92| 7.49k| const T& Value) { 93| 7.49k| if (!Result && ( ------------------ | Branch (93:9): [True: 0, False: 7.49k] ------------------ 94| 0| (N0-1 == Str.size() && std::memcmp(S0, Str.data(), N0-1) == 0) || ------------------ | Branch (94:10): [True: 0, False: 0] | Branch (94:32): [True: 0, False: 0] ------------------ 95| 0| (N1-1 == Str.size() && std::memcmp(S1, Str.data(), N1-1) == 0))) { ------------------ | Branch (95:10): [True: 0, False: 0] | Branch (95:32): [True: 0, False: 0] ------------------ 96| 0| Result = &Value; 97| 0| } 98| | 99| 7.49k| return *this; 100| 7.49k| } _ZN7llvm_ks12StringSwitchINS_6Triple8ArchTypeES2_E5CasesILj6ELj8EEERS3_RAT__KcRAT0__S6_RKS2_: 92| 7.49k| const T& Value) { 93| 7.49k| if (!Result && ( ------------------ | Branch (93:9): [True: 0, False: 7.49k] ------------------ 94| 0| (N0-1 == Str.size() && std::memcmp(S0, Str.data(), N0-1) == 0) || ------------------ | Branch (94:10): [True: 0, False: 0] | Branch (94:32): [True: 0, False: 0] ------------------ 95| 0| (N1-1 == Str.size() && std::memcmp(S1, Str.data(), N1-1) == 0))) { ------------------ | Branch (95:10): [True: 0, False: 0] | Branch (95:32): [True: 0, False: 0] ------------------ 96| 0| Result = &Value; 97| 0| } 98| | 99| 7.49k| return *this; 100| 7.49k| } _ZN7llvm_ks12StringSwitchINS_6Triple8ArchTypeES2_E5CasesILj8ELj8EEERS3_RAT__KcRAT0__S6_RKS2_: 92| 7.49k| const T& Value) { 93| 7.49k| if (!Result && ( ------------------ | Branch (93:9): [True: 0, False: 7.49k] ------------------ 94| 0| (N0-1 == Str.size() && std::memcmp(S0, Str.data(), N0-1) == 0) || ------------------ | Branch (94:10): [True: 0, False: 0] | Branch (94:32): [True: 0, False: 0] ------------------ 95| 0| (N1-1 == Str.size() && std::memcmp(S1, Str.data(), N1-1) == 0))) { ------------------ | Branch (95:10): [True: 0, False: 0] | Branch (95:32): [True: 0, False: 0] ------------------ 96| 0| Result = &Value; 97| 0| } 98| | 99| 7.49k| return *this; 100| 7.49k| } _ZN7llvm_ks12StringSwitchINS_6Triple8ArchTypeES2_E10StartsWithILj8EEERS3_RAT__KcRKS2_: 80| 7.49k| StringSwitch& StartsWith(const char (&S)[N], const T &Value) { 81| 7.49k| if (!Result && Str.size() >= N-1 && ------------------ | Branch (81:9): [True: 0, False: 7.49k] | Branch (81:20): [True: 0, False: 0] ------------------ 82| 0| std::memcmp(S, Str.data(), N-1) == 0) { ------------------ | Branch (82:9): [True: 0, False: 0] ------------------ 83| 0| Result = &Value; 84| 0| } 85| | 86| 7.49k| return *this; 87| 7.49k| } _ZN7llvm_ks12StringSwitchINS_6Triple8ArchTypeES2_EC2ENS_9StringRefE: 54| 7.49k| : Str(S), Result(nullptr) { } _ZN7llvm_ks12StringSwitchINS_6Triple8ArchTypeES2_E4CaseILj8EEERS3_RAT__KcRKS2_: 58| 67.4k| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 67.4k| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 14.9k, False: 52.4k] | Branch (59:20): [True: 0, False: 14.9k] ------------------ 60| 0| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 0, False: 0] ------------------ 61| 0| Result = &Value; 62| 0| } 63| | 64| 67.4k| return *this; 65| 67.4k| } _ZN7llvm_ks12StringSwitchINS_6Triple8ArchTypeES2_E4CaseILj11EEERS3_RAT__KcRKS2_: 58| 7.49k| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 7.49k| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 7.49k, False: 0] | Branch (59:20): [True: 0, False: 7.49k] ------------------ 60| 0| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 0, False: 0] ------------------ 61| 0| Result = &Value; 62| 0| } 63| | 64| 7.49k| return *this; 65| 7.49k| } _ZN7llvm_ks12StringSwitchINS_6Triple8ArchTypeES2_E4CaseILj6EEERS3_RAT__KcRKS2_: 58| 67.4k| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 67.4k| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 22.4k, False: 44.9k] | Branch (59:20): [True: 0, False: 22.4k] ------------------ 60| 0| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 0, False: 0] ------------------ 61| 0| Result = &Value; 62| 0| } 63| | 64| 67.4k| return *this; 65| 67.4k| } _ZN7llvm_ks12StringSwitchINS_6Triple8ArchTypeES2_E4CaseILj4EEERS3_RAT__KcRKS2_: 58| 22.4k| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 22.4k| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 14.9k, False: 7.49k] | Branch (59:20): [True: 0, False: 14.9k] ------------------ 60| 0| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 0, False: 0] ------------------ 61| 0| Result = &Value; 62| 0| } 63| | 64| 22.4k| return *this; 65| 22.4k| } _ZN7llvm_ks12StringSwitchINS_6Triple8ArchTypeES2_E4CaseILj5EEERS3_RAT__KcRKS2_: 58| 29.9k| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 29.9k| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 0, False: 29.9k] | Branch (59:20): [True: 0, False: 0] ------------------ 60| 0| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 0, False: 0] ------------------ 61| 0| Result = &Value; 62| 0| } 63| | 64| 29.9k| return *this; 65| 29.9k| } _ZN7llvm_ks12StringSwitchINS_6Triple8ArchTypeES2_E4CaseILj7EEERS3_RAT__KcRKS2_: 58| 44.9k| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 44.9k| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 14.9k, False: 29.9k] | Branch (59:20): [True: 0, False: 14.9k] ------------------ 60| 0| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 0, False: 0] ------------------ 61| 0| Result = &Value; 62| 0| } 63| | 64| 44.9k| return *this; 65| 44.9k| } _ZN7llvm_ks12StringSwitchINS_6Triple8ArchTypeES2_E4CaseILj9EEERS3_RAT__KcRKS2_: 58| 14.9k| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 14.9k| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 7.49k, False: 7.49k] | Branch (59:20): [True: 0, False: 7.49k] ------------------ 60| 0| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 0, False: 0] ------------------ 61| 0| Result = &Value; 62| 0| } 63| | 64| 14.9k| return *this; 65| 14.9k| } _ZNK7llvm_ks12StringSwitchINS_6Triple8ArchTypeES2_E7DefaultERKS2_: 150| 7.49k| R Default(const T& Value) const { 151| 7.49k| if (Result) ------------------ | Branch (151:9): [True: 7.49k, False: 0] ------------------ 152| 7.49k| return *Result; 153| | 154| 0| return Value; 155| 7.49k| } _ZN7llvm_ks12StringSwitchIjjEC2ENS_9StringRefE: 54| 2.75k| : Str(S), Result(nullptr) { } _ZN7llvm_ks12StringSwitchIjjE4CaseILj3EEERS1_RAT__KcRKj: 58| 31.0k| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 31.0k| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 30.2k, False: 807] | Branch (59:20): [True: 2.58k, False: 27.6k] ------------------ 60| 2.58k| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 33, False: 2.55k] ------------------ 61| 33| Result = &Value; 62| 33| } 63| | 64| 31.0k| return *this; 65| 31.0k| } _ZNK7llvm_ks12StringSwitchIjjE7DefaultERKj: 150| 2.75k| R Default(const T& Value) const { 151| 2.75k| if (Result) ------------------ | Branch (151:9): [True: 54, False: 2.69k] ------------------ 152| 54| return *Result; 153| | 154| 2.69k| return Value; 155| 2.75k| } _ZN7llvm_ks12StringSwitchINS_9StringRefES1_E4CaseILj4EEERS2_RAT__KcRKS1_: 58| 26.9k| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 26.9k| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 26.9k, False: 0] | Branch (59:20): [True: 0, False: 26.9k] ------------------ 60| 0| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 0, False: 0] ------------------ 61| 0| Result = &Value; 62| 0| } 63| | 64| 26.9k| return *this; 65| 26.9k| } _ZN7llvm_ks12StringSwitchIjjE4CaseILj7EEERS1_RAT__KcRKj: 58| 2.63k| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 2.63k| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 2.61k, False: 21] | Branch (59:20): [True: 303, False: 2.31k] ------------------ 60| 303| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 0, False: 303] ------------------ 61| 0| Result = &Value; 62| 0| } 63| | 64| 2.63k| return *this; 65| 2.63k| } _ZN7llvm_ks12StringSwitchIjjE4CaseILj8EEERS1_RAT__KcRKj: 58| 1.77k| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 1.77k| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 1.77k, False: 0] | Branch (59:20): [True: 198, False: 1.58k] ------------------ 60| 198| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 0, False: 198] ------------------ 61| 0| Result = &Value; 62| 0| } 63| | 64| 1.77k| return *this; 65| 1.77k| } _ZN7llvm_ks12StringSwitchIjjE4CaseILj9EEERS1_RAT__KcRKj: 58| 857| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 857| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 836, False: 21] | Branch (59:20): [True: 132, False: 704] ------------------ 60| 132| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 0, False: 132] ------------------ 61| 0| Result = &Value; 62| 0| } 63| | 64| 857| return *this; 65| 857| } _ZN7llvm_ks12StringSwitchIjjE4CaseILj5EEERS1_RAT__KcRKj: 58| 971| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 971| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 971, False: 0] | Branch (59:20): [True: 103, False: 868] ------------------ 60| 103| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 0, False: 103] ------------------ 61| 0| Result = &Value; 62| 0| } 63| | 64| 971| return *this; 65| 971| } _ZN7llvm_ks12StringSwitchIjjE4CaseILj11EEERS1_RAT__KcRKj: 58| 1.77k| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 1.77k| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 1.77k, False: 0] | Branch (59:20): [True: 184, False: 1.59k] ------------------ 60| 184| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 21, False: 163] ------------------ 61| 21| Result = &Value; 62| 21| } 63| | 64| 1.77k| return *this; 65| 1.77k| } _ZN7llvm_ks12StringSwitchIjjE4CaseILj6EEERS1_RAT__KcRKj: 58| 857| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 857| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 857, False: 0] | Branch (59:20): [True: 28, False: 829] ------------------ 60| 28| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 0, False: 28] ------------------ 61| 0| Result = &Value; 62| 0| } 63| | 64| 857| return *this; 65| 857| } _ZN7llvm_ks12StringSwitchIjjE4CaseILj10EEERS1_RAT__KcRKj: 58| 2.63k| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 2.63k| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 2.63k, False: 0] | Branch (59:20): [True: 171, False: 2.46k] ------------------ 60| 171| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 0, False: 171] ------------------ 61| 0| Result = &Value; 62| 0| } 63| | 64| 2.63k| return *this; 65| 2.63k| } _ZN7llvm_ks12StringSwitchIjjE4CaseILj15EEERS1_RAT__KcRKj: 58| 922| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 922| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 922, False: 0] | Branch (59:20): [True: 8, False: 914] ------------------ 60| 8| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 0, False: 8] ------------------ 61| 0| Result = &Value; 62| 0| } 63| | 64| 922| return *this; 65| 922| } _ZN7llvm_ks12StringSwitchINS_9StringRefES1_E4CaseILj3EEERS2_RAT__KcRKS1_: 58| 6.74k| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 6.74k| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 6.74k, False: 0] | Branch (59:20): [True: 0, False: 6.74k] ------------------ 60| 0| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 0, False: 0] ------------------ 61| 0| Result = &Value; 62| 0| } 63| | 64| 6.74k| return *this; 65| 6.74k| } _ZN7llvm_ks12StringSwitchINS_9StringRefES1_E4CaseILj6EEERS2_RAT__KcRKS1_: 58| 13.8k| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 13.8k| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 13.8k, False: 12] | Branch (59:20): [True: 127, False: 13.7k] ------------------ 60| 127| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 3, False: 124] ------------------ 61| 3| Result = &Value; 62| 3| } 63| | 64| 13.8k| return *this; 65| 13.8k| } _ZN7llvm_ks12StringSwitchINS_9StringRefES1_E4CaseILj7EEERS2_RAT__KcRKS1_: 58| 195| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 195| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 185, False: 10] | Branch (59:20): [True: 2, False: 183] ------------------ 60| 2| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 1, False: 1] ------------------ 61| 1| Result = &Value; 62| 1| } 63| | 64| 195| return *this; 65| 195| } _ZN7llvm_ks12StringSwitchINS_9StringRefES1_E4CaseILj9EEERS2_RAT__KcRKS1_: 58| 14.0k| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 14.0k| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 13.9k, False: 28] | Branch (59:20): [True: 112, False: 13.8k] ------------------ 60| 112| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 0, False: 112] ------------------ 61| 0| Result = &Value; 62| 0| } 63| | 64| 14.0k| return *this; 65| 14.0k| } _ZN7llvm_ks12StringSwitchINS_11MipsABIInfoES1_EC2ENS_9StringRefE: 54| 749| : Str(S), Result(nullptr) { } _ZN7llvm_ks12StringSwitchINS_11MipsABIInfoES1_E4CaseILj6EEERS2_RAT__KcRKS1_: 58| 3.74k| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 3.74k| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 1.49k, False: 2.24k] | Branch (59:20): [True: 0, False: 1.49k] ------------------ 60| 0| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 0, False: 0] ------------------ 61| 0| Result = &Value; 62| 0| } 63| | 64| 3.74k| return *this; 65| 3.74k| } _ZN7llvm_ks12StringSwitchINS_11MipsABIInfoES1_E4CaseILj7EEERS2_RAT__KcRKS1_: 58| 2.24k| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 2.24k| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 749, False: 1.49k] | Branch (59:20): [True: 749, False: 0] ------------------ 60| 749| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 749, False: 0] ------------------ 61| 749| Result = &Value; 62| 749| } 63| | 64| 2.24k| return *this; 65| 2.24k| } _ZN7llvm_ks12StringSwitchINS_11MipsABIInfoES1_E4CaseILj9EEERS2_RAT__KcRKS1_: 58| 5.99k| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 5.99k| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 0, False: 5.99k] | Branch (59:20): [True: 0, False: 0] ------------------ 60| 0| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 0, False: 0] ------------------ 61| 0| Result = &Value; 62| 0| } 63| | 64| 5.99k| return *this; 65| 5.99k| } _ZNK7llvm_ks12StringSwitchINS_11MipsABIInfoES1_E7DefaultERKS1_: 150| 749| R Default(const T& Value) const { 151| 749| if (Result) ------------------ | Branch (151:9): [True: 749, False: 0] ------------------ 152| 749| return *Result; 153| | 154| 0| return Value; 155| 749| } _ZN7llvm_ks12StringSwitchINS_9StringRefES1_E4CaseILj5EEERS2_RAT__KcRKS1_: 58| 13.4k| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 13.4k| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 13.4k, False: 0] | Branch (59:20): [True: 13.4k, False: 0] ------------------ 60| 13.4k| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 0, False: 13.4k] ------------------ 61| 0| Result = &Value; 62| 0| } 63| | 64| 13.4k| return *this; 65| 13.4k| } _ZN7llvm_ks12StringSwitchINS_9StringRefES1_E5CasesILj4ELj5ELj6EEERS2_RAT__KcRAT0__S5_RAT1__S5_RKS1_: 105| 6.74k| const char (&S2)[N2], const T& Value) { 106| 6.74k| if (!Result && ( ------------------ | Branch (106:9): [True: 6.74k, False: 0] ------------------ 107| 6.74k| (N0-1 == Str.size() && std::memcmp(S0, Str.data(), N0-1) == 0) || ------------------ | Branch (107:10): [True: 0, False: 6.74k] | Branch (107:32): [True: 0, False: 0] ------------------ 108| 6.74k| (N1-1 == Str.size() && std::memcmp(S1, Str.data(), N1-1) == 0) || ------------------ | Branch (108:10): [True: 6.74k, False: 0] | Branch (108:32): [True: 0, False: 6.74k] ------------------ 109| 6.74k| (N2-1 == Str.size() && std::memcmp(S2, Str.data(), N2-1) == 0))) { ------------------ | Branch (109:10): [True: 0, False: 6.74k] | Branch (109:32): [True: 0, False: 0] ------------------ 110| 0| Result = &Value; 111| 0| } 112| | 113| 6.74k| return *this; 114| 6.74k| } _ZN7llvm_ks12StringSwitchINS_9StringRefES1_E5CasesILj4ELj5EEERS2_RAT__KcRAT0__S5_RKS1_: 92| 6.74k| const T& Value) { 93| 6.74k| if (!Result && ( ------------------ | Branch (93:9): [True: 6.74k, False: 0] ------------------ 94| 6.74k| (N0-1 == Str.size() && std::memcmp(S0, Str.data(), N0-1) == 0) || ------------------ | Branch (94:10): [True: 0, False: 6.74k] | Branch (94:32): [True: 0, False: 0] ------------------ 95| 6.74k| (N1-1 == Str.size() && std::memcmp(S1, Str.data(), N1-1) == 0))) { ------------------ | Branch (95:10): [True: 6.74k, False: 0] | Branch (95:32): [True: 0, False: 6.74k] ------------------ 96| 0| Result = &Value; 97| 0| } 98| | 99| 6.74k| return *this; 100| 6.74k| } _ZN7llvm_ks12StringSwitchINS_9StringRefES1_E5CasesILj3ELj4ELj5ELj4EEERS2_RAT__KcRAT0__S5_RAT1__S5_RAT2__S5_RKS1_: 120| 6.74k| const T& Value) { 121| 6.74k| if (!Result && ( ------------------ | Branch (121:9): [True: 6.74k, False: 0] ------------------ 122| 6.74k| (N0-1 == Str.size() && std::memcmp(S0, Str.data(), N0-1) == 0) || ------------------ | Branch (122:10): [True: 0, False: 6.74k] | Branch (122:32): [True: 0, False: 0] ------------------ 123| 6.74k| (N1-1 == Str.size() && std::memcmp(S1, Str.data(), N1-1) == 0) || ------------------ | Branch (123:10): [True: 0, False: 6.74k] | Branch (123:32): [True: 0, False: 0] ------------------ 124| 6.74k| (N2-1 == Str.size() && std::memcmp(S2, Str.data(), N2-1) == 0) || ------------------ | Branch (124:10): [True: 6.74k, False: 0] | Branch (124:32): [True: 0, False: 6.74k] ------------------ 125| 6.74k| (N3-1 == Str.size() && std::memcmp(S3, Str.data(), N3-1) == 0))) { ------------------ | Branch (125:10): [True: 0, False: 6.74k] | Branch (125:32): [True: 0, False: 0] ------------------ 126| 0| Result = &Value; 127| 0| } 128| | 129| 6.74k| return *this; 130| 6.74k| } _ZN7llvm_ks12StringSwitchINS_9StringRefES1_E5CasesILj3ELj4ELj8ELj6EEERS2_RAT__KcRAT0__S5_RAT1__S5_RAT2__S5_RKS1_: 120| 6.74k| const T& Value) { 121| 6.74k| if (!Result && ( ------------------ | Branch (121:9): [True: 6.74k, False: 0] ------------------ 122| 6.74k| (N0-1 == Str.size() && std::memcmp(S0, Str.data(), N0-1) == 0) || ------------------ | Branch (122:10): [True: 0, False: 6.74k] | Branch (122:32): [True: 0, False: 0] ------------------ 123| 6.74k| (N1-1 == Str.size() && std::memcmp(S1, Str.data(), N1-1) == 0) || ------------------ | Branch (123:10): [True: 0, False: 6.74k] | Branch (123:32): [True: 0, False: 0] ------------------ 124| 6.74k| (N2-1 == Str.size() && std::memcmp(S2, Str.data(), N2-1) == 0) || ------------------ | Branch (124:10): [True: 0, False: 6.74k] | Branch (124:32): [True: 0, False: 0] ------------------ 125| 6.74k| (N3-1 == Str.size() && std::memcmp(S3, Str.data(), N3-1) == 0))) { ------------------ | Branch (125:10): [True: 0, False: 6.74k] | Branch (125:32): [True: 0, False: 0] ------------------ 126| 0| Result = &Value; 127| 0| } 128| | 129| 6.74k| return *this; 130| 6.74k| } _ZN7llvm_ks12StringSwitchINS_8OptionalINS_11MCFixupKindEEES3_EC2ENS_9StringRefE: 54| 37| : Str(S), Result(nullptr) { } _ZN7llvm_ks12StringSwitchINS_8OptionalINS_11MCFixupKindEEES3_E4CaseILj12EEERS4_RAT__KcRKS3_: 58| 37| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 37| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 37, False: 0] | Branch (59:20): [True: 0, False: 37] ------------------ 60| 0| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 0, False: 0] ------------------ 61| 0| Result = &Value; 62| 0| } 63| | 64| 37| return *this; 65| 37| } _ZN7llvm_ks12StringSwitchINS_8OptionalINS_11MCFixupKindEEES3_E4CaseILj10EEERS4_RAT__KcRKS3_: 58| 37| StringSwitch& Case(const char (&S)[N], const T& Value) { 59| 37| if (!Result && N-1 == Str.size() && ------------------ | Branch (59:9): [True: 37, False: 0] | Branch (59:20): [True: 0, False: 37] ------------------ 60| 0| (std::memcmp(S, Str.data(), N-1) == 0)) { ------------------ | Branch (60:9): [True: 0, False: 0] ------------------ 61| 0| Result = &Value; 62| 0| } 63| | 64| 37| return *this; 65| 37| } _ZNK7llvm_ks12StringSwitchINS_8OptionalINS_11MCFixupKindEEES3_E7DefaultERKS3_: 150| 37| R Default(const T& Value) const { 151| 37| if (Result) ------------------ | Branch (151:9): [True: 0, False: 37] ------------------ 152| 0| return *Result; 153| | 154| 37| return Value; 155| 37| } _ZN7llvm_ks6TripleC2Ev: 223| 749| Triple() : Data(), Arch(), Vendor(), OS(), Environment(), ObjectFormat() {} _ZNK7llvm_ks6Triple15getObjectFormatEv: 285| 1.49k| ObjectFormatType getObjectFormat() const { return ObjectFormat; } _ZNK7llvm_ks6Triple7getArchEv: 255| 18.9k| ArchType getArch() const { return Arch; } _ZNK7llvm_ks6Triple5getOSEv: 264| 1.49k| OSType getOS() const { return OS; } _ZNK7llvm_ks6Triple9getTripleEv: 326| 749| const std::string &getTriple() const { return Data; } _ZNK7llvm_ks6Triple11isOSSolarisEv: 458| 749| bool isOSSolaris() const { 459| 749| return getOS() == Triple::Solaris; 460| 749| } _ZN7llvm_ks5TwineC2ERKNS_9StringRefE: 286| 29.2k| : LHSKind(StringRefKind), RHSKind(EmptyKind) { 287| 29.2k| LHS.stringRef = &Str; 288| | assert(isValid() && "Invalid twine!"); ------------------ | Branch (288:7): [True: 29.2k, False: 0] | Branch (288:7): [True: 29.2k, Folded] | Branch (288:7): [True: 29.2k, False: 0] ------------------ 289| 29.2k| } _ZNK7llvm_ks5Twine7isValidEv: 213| 106k| bool isValid() const { 214| | // Nullary twines always have Empty on the RHS. 215| 106k| if (isNullary() && getRHSKind() != EmptyKind) ------------------ | Branch (215:11): [True: 0, False: 106k] | Branch (215:26): [True: 0, False: 0] ------------------ 216| 0| return false; 217| | 218| | // Null should never appear on the RHS. 219| 106k| if (getRHSKind() == NullKind) ------------------ | Branch (219:11): [True: 0, False: 106k] ------------------ 220| 0| return false; 221| | 222| | // The RHS cannot be non-empty if the LHS is empty. 223| 106k| if (getRHSKind() != EmptyKind && getLHSKind() == EmptyKind) ------------------ | Branch (223:11): [True: 2.31k, False: 104k] | Branch (223:40): [True: 0, False: 2.31k] ------------------ 224| 0| return false; 225| | 226| | // A twine child should always be binary. 227| 106k| if (getLHSKind() == TwineKind && ------------------ | Branch (227:11): [True: 1.05k, False: 105k] ------------------ 228| 1.05k| !LHS.twine->isBinary()) ------------------ | Branch (228:11): [True: 0, False: 1.05k] ------------------ 229| 0| return false; 230| 106k| if (getRHSKind() == TwineKind && ------------------ | Branch (230:11): [True: 0, False: 106k] ------------------ 231| 0| !RHS.twine->isBinary()) ------------------ | Branch (231:11): [True: 0, False: 0] ------------------ 232| 0| return false; 233| | 234| 106k| return true; 235| 106k| } _ZNK7llvm_ks5Twine9isNullaryEv: 197| 111k| bool isNullary() const { 198| 111k| return isNull() || isEmpty(); ------------------ | Branch (198:14): [True: 0, False: 111k] | Branch (198:26): [True: 0, False: 111k] ------------------ 199| 111k| } _ZNK7llvm_ks5Twine6isNullEv: 187| 115k| bool isNull() const { 188| 115k| return getLHSKind() == NullKind; 189| 115k| } _ZNK7llvm_ks5Twine7isEmptyEv: 192| 115k| bool isEmpty() const { 193| 115k| return getLHSKind() == EmptyKind; 194| 115k| } _ZNK7llvm_ks5Twine10getRHSKindEv: 241| 506k| NodeKind getRHSKind() const { return RHSKind; } _ZNK7llvm_ks5Twine10getLHSKindEv: 238| 604k| NodeKind getLHSKind() const { return LHSKind; } _ZNK7llvm_ks5Twine8isBinaryEv: 207| 1.05k| bool isBinary() const { 208| 1.05k| return getLHSKind() != NullKind && getRHSKind() != EmptyKind; ------------------ | Branch (208:14): [True: 1.05k, False: 0] | Branch (208:42): [True: 1.05k, False: 0] ------------------ 209| 1.05k| } _ZN7llvm_ks5TwineC2ERKNSt3__112basic_stringIcNS1_11char_traitsIcEENS1_9allocatorIcEEEE: 279| 3.74k| : LHSKind(StdStringKind), RHSKind(EmptyKind) { 280| 3.74k| LHS.stdString = &Str; 281| | assert(isValid() && "Invalid twine!"); ------------------ | Branch (281:7): [True: 3.74k, False: 0] | Branch (281:7): [True: 3.74k, Folded] | Branch (281:7): [True: 3.74k, False: 0] ------------------ 282| 3.74k| } _ZN7llvm_ks5TwineC2ENS0_5ChildENS0_8NodeKindES1_S2_: 178| 2.10k| : LHS(LHS), RHS(RHS), LHSKind(LHSKind), RHSKind(RHSKind) { 179| | assert(isValid() && "Invalid twine!"); ------------------ | Branch (179:7): [True: 2.10k, False: 0] | Branch (179:7): [True: 2.10k, Folded] | Branch (179:7): [True: 2.10k, False: 0] ------------------ 180| 2.10k| } _ZNK7llvm_ks5Twine7isUnaryEv: 202| 5.71k| bool isUnary() const { 203| 5.71k| return getRHSKind() == EmptyKind && !isNullary(); ------------------ | Branch (203:14): [True: 4.66k, False: 1.05k] | Branch (203:43): [True: 4.66k, False: 0] ------------------ 204| 5.71k| } _ZN7llvm_ks5TwineC2EPKc: 267| 71.2k| : RHSKind(EmptyKind) { 268| 71.2k| if (Str[0] != '\0') { ------------------ | Branch (268:11): [True: 71.2k, False: 0] ------------------ 269| 71.2k| LHS.cString = Str; 270| 71.2k| LHSKind = CStringKind; 271| 71.2k| } else 272| 0| LHSKind = EmptyKind; 273| | 274| | assert(isValid() && "Invalid twine!"); ------------------ | Branch (274:7): [True: 71.2k, False: 0] | Branch (274:7): [True: 71.2k, Folded] | Branch (274:7): [True: 71.2k, False: 0] ------------------ 275| 71.2k| } _ZN7llvm_ks5TwineC2EPKcRKNS_9StringRefE: 359| 206| : LHSKind(CStringKind), RHSKind(StringRefKind) { 360| 206| this->LHS.cString = LHS; 361| 206| this->RHS.stringRef = &RHS; 362| | assert(isValid() && "Invalid twine!"); ------------------ | Branch (362:7): [True: 206, False: 0] | Branch (362:7): [True: 206, Folded] | Branch (362:7): [True: 206, False: 0] ------------------ 363| 206| } _ZNK7llvm_ks5Twine17isSingleStringRefEv: 403| 162k| bool isSingleStringRef() const { 404| 162k| if (getRHSKind() != EmptyKind) return false; ------------------ | Branch (404:11): [True: 1.26k, False: 161k] ------------------ 405| | 406| 161k| switch (getLHSKind()) { 407| 0| case EmptyKind: ------------------ | Branch (407:7): [True: 0, False: 161k] ------------------ 408| 105k| case CStringKind: ------------------ | Branch (408:7): [True: 105k, False: 56.4k] ------------------ 409| 105k| case StdStringKind: ------------------ | Branch (409:7): [True: 0, False: 161k] ------------------ 410| 161k| case StringRefKind: ------------------ | Branch (410:7): [True: 56.4k, False: 105k] ------------------ 411| 161k| case SmallStringKind: ------------------ | Branch (411:7): [True: 0, False: 161k] ------------------ 412| 161k| return true; 413| 0| default: ------------------ | Branch (413:7): [True: 0, False: 161k] ------------------ 414| 0| return false; 415| 161k| } 416| 161k| } _ZNK7llvm_ks5Twine18getSingleStringRefEv: 436| 80.7k| StringRef getSingleStringRef() const { 437| 80.7k| assert(isSingleStringRef() &&"This cannot be had as a single stringref!"); ------------------ | Branch (437:7): [True: 80.7k, False: 0] | Branch (437:7): [True: 80.7k, Folded] | Branch (437:7): [True: 80.7k, False: 0] ------------------ 438| 80.7k| switch (getLHSKind()) { 439| 0| default: llvm_unreachable("Out of sync with isSingleStringRef"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ | Branch (439:7): [True: 0, False: 80.7k] ------------------ 440| 0| case EmptyKind: return StringRef(); ------------------ | Branch (440:7): [True: 0, False: 80.7k] ------------------ 441| 52.5k| case CStringKind: return StringRef(LHS.cString); ------------------ | Branch (441:7): [True: 52.5k, False: 28.2k] ------------------ 442| 0| case StdStringKind: return StringRef(*LHS.stdString); ------------------ | Branch (442:7): [True: 0, False: 80.7k] ------------------ 443| 28.2k| case StringRefKind: return *LHS.stringRef; ------------------ | Branch (443:7): [True: 28.2k, False: 52.5k] ------------------ 444| 0| case SmallStringKind: ------------------ | Branch (444:7): [True: 0, False: 80.7k] ------------------ 445| 0| return StringRef(LHS.smallString->data(), LHS.smallString->size()); 446| 80.7k| } 447| 80.7k| } _ZNK7llvm_ks5Twine11toStringRefERNS_15SmallVectorImplIcEE: 452| 81.9k| StringRef toStringRef(SmallVectorImpl &Out) const { 453| 81.9k| if (isSingleStringRef()) ------------------ | Branch (453:11): [True: 80.7k, False: 1.26k] ------------------ 454| 80.7k| return getSingleStringRef(); 455| 1.26k| toVector(Out); 456| 1.26k| return StringRef(Out.data(), Out.size()); 457| 81.9k| } _ZNK7llvm_ks5Twine6concatERKS0_: 485| 2.10k| inline Twine Twine::concat(const Twine &Suffix) const { 486| | // Concatenation with null is null. 487| 2.10k| if (isNull() || Suffix.isNull()) ------------------ | Branch (487:9): [True: 0, False: 2.10k] | Branch (487:21): [True: 0, False: 2.10k] ------------------ 488| 0| return Twine(NullKind); 489| | 490| | // Concatenation with empty yields the other side. 491| 2.10k| if (isEmpty()) ------------------ | Branch (491:9): [True: 0, False: 2.10k] ------------------ 492| 0| return Suffix; 493| 2.10k| if (Suffix.isEmpty()) ------------------ | Branch (493:9): [True: 0, False: 2.10k] ------------------ 494| 0| return *this; 495| | 496| | // Otherwise we need to create a new node, taking care to fold in unary 497| | // twines. 498| 2.10k| Child NewLHS, NewRHS; 499| 2.10k| NewLHS.twine = this; 500| 2.10k| NewRHS.twine = &Suffix; 501| 2.10k| NodeKind NewLHSKind = TwineKind, NewRHSKind = TwineKind; 502| 2.10k| if (isUnary()) { ------------------ | Branch (502:9): [True: 1.05k, False: 1.05k] ------------------ 503| 1.05k| NewLHS = LHS; 504| 1.05k| NewLHSKind = getLHSKind(); 505| 1.05k| } 506| 2.10k| if (Suffix.isUnary()) { ------------------ | Branch (506:9): [True: 2.10k, False: 0] ------------------ 507| 2.10k| NewRHS = Suffix.LHS; 508| 2.10k| NewRHSKind = Suffix.getLHSKind(); 509| 2.10k| } 510| | 511| 2.10k| return Twine(NewLHS, NewLHSKind, NewRHS, NewRHSKind); 512| 2.10k| } _ZN7llvm_ksplERKNS_5TwineES2_: 514| 2.10k| inline Twine operator+(const Twine &LHS, const Twine &RHS) { 515| 2.10k| return LHS.concat(RHS); 516| 2.10k| } _ZN7llvm_ksplEPKcRKNS_9StringRefE: 521| 206| inline Twine operator+(const char *LHS, const StringRef &RHS) { 522| 206| return Twine(LHS, RHS); 523| 206| } _ZN7llvm_kslsERNS_11raw_ostreamERKNS_5TwineE: 532| 15.0k| inline raw_ostream &operator<<(raw_ostream &OS, const Twine &RHS) { 533| 15.0k| RHS.print(OS); 534| 15.0k| return OS; 535| 15.0k| } _ZNK7llvm_ks14ilist_iteratorINS_10MCFragmentEE19getNodePtrUncheckedEv: 283| 276k| pointer getNodePtrUnchecked() const { return NodePtr; } _ZN7llvm_ks6iplistINS_10MCFragmentENS_12ilist_traitsIS1_EEE6insertENS_14ilist_iteratorIS1_EEPS1_: 461| 3.05k| iterator insert(iterator where, NodeTy *New) { 462| 3.05k| NodeTy *CurNode = where.getNodePtrUnchecked(); 463| 3.05k| NodeTy *PrevNode = this->getPrev(CurNode); 464| 3.05k| this->setNext(New, CurNode); 465| 3.05k| this->setPrev(New, PrevNode); 466| | 467| 3.05k| if (CurNode != Head) // Is PrevNode off the beginning of the list? ------------------ | Branch (467:9): [True: 2.46k, False: 589] ------------------ 468| 2.46k| this->setNext(PrevNode, New); 469| 589| else 470| 589| Head = New; 471| 3.05k| this->setPrev(CurNode, New); 472| | 473| 3.05k| this->addNodeToList(New); // Notify traits that we added a node... 474| 3.05k| return iterator(New); 475| 3.05k| } _ZN7llvm_ks21ilist_nextprev_traitsINS_10MCFragmentEE7getPrevEPS1_: 57| 526k| static NodeTy *getPrev(NodeTy *N) { return N->getPrev(); } _ZN7llvm_ks21ilist_nextprev_traitsINS_10MCFragmentEE7setNextEPS1_S3_: 63| 9.44k| static void setNext(NodeTy *N, NodeTy *Next) { N->setNext(Next); } _ZN7llvm_ks21ilist_nextprev_traitsINS_10MCFragmentEE7setPrevEPS1_S3_: 62| 13.0k| static void setPrev(NodeTy *N, NodeTy *Prev) { N->setPrev(Prev); } _ZN7llvm_ks14ilist_iteratorINS_10MCFragmentEEC2EPS1_: 223| 282k| explicit ilist_iterator(pointer NP) : NodePtr(NP) {} _ZNK7llvm_ks6iplistINS_10MCFragmentENS_12ilist_traitsIS1_EEE11getPrevNodeERS1_: 692| 1.64k| NodeTy *getPrevNode(NodeTy &N) const { 693| 1.64k| auto I = N.getIterator(); 694| 1.64k| if (I == begin()) ------------------ | Branch (694:9): [True: 316, False: 1.32k] ------------------ 695| 316| return nullptr; 696| 1.32k| return &*std::prev(I); 697| 1.64k| } _ZNK7llvm_ks14ilist_iteratorINS_10MCFragmentEEeqIKS1_EEbRKNS0_IT_EE: 254| 1.64k| template bool operator==(const ilist_iterator &RHS) const { 255| 1.64k| return NodePtr == RHS.getNodePtrUnchecked(); 256| 1.64k| } _ZNK7llvm_ks14ilist_iteratorIKNS_10MCFragmentEE19getNodePtrUncheckedEv: 283| 3.68k| pointer getNodePtrUnchecked() const { return NodePtr; } _ZNK7llvm_ks6iplistINS_10MCFragmentENS_12ilist_traitsIS1_EEE5beginEv: 412| 1.64k| const_iterator begin() const { 413| 1.64k| CreateLazySentinel(); 414| 1.64k| return const_iterator(Head); 415| 1.64k| } _ZNK7llvm_ks6iplistINS_10MCFragmentENS_12ilist_traitsIS1_EEE18CreateLazySentinelEv: 375| 273k| void CreateLazySentinel() const { 376| 273k| this->ensureHead(Head); 377| 273k| } _ZN7llvm_ks21ilist_sentinel_traitsINS_10MCFragmentEE10ensureHeadERPS1_: 91| 286k| static NodeTy *ensureHead(NodeTy *&Head) { 92| 286k| if (!Head) { ------------------ | Branch (92:9): [True: 879, False: 285k] ------------------ 93| 879| Head = ilist_traits::createSentinel(); 94| 879| ilist_traits::noteHead(Head, Head); 95| 879| ilist_traits::setNext(Head, nullptr); 96| 879| return Head; 97| 879| } 98| 285k| return ilist_traits::getPrev(Head); 99| 286k| } _ZN7llvm_ks21ilist_sentinel_traitsINS_10MCFragmentEE14createSentinelEv: 78| 879| static NodeTy *createSentinel() { return new NodeTy(); } _ZN7llvm_ks21ilist_sentinel_traitsINS_10MCFragmentEE8noteHeadEPS1_S3_: 102| 879| static void noteHead(NodeTy *NewHead, NodeTy *Sentinel) { 103| 879| ilist_traits::setPrev(NewHead, Sentinel); 104| 879| } _ZN7llvm_ks14ilist_iteratorIKNS_10MCFragmentEEC2EPS2_: 223| 1.64k| explicit ilist_iterator(pointer NP) : NodePtr(NP) {} _ZN7llvm_ks14ilist_iteratorINS_10MCFragmentEEmmEv: 262| 234k| ilist_iterator &operator--() { // predecrement - Back up 263| 234k| NodePtr = Traits::getPrev(NodePtr); 264| 234k| assert(NodePtr && "--'d off the beginning of an ilist!"); ------------------ | Branch (264:5): [True: 234k, False: 0] | Branch (264:5): [True: 234k, Folded] | Branch (264:5): [True: 234k, False: 0] ------------------ 265| 234k| return *this; 266| 234k| } _ZN7llvm_ks14ilist_iteratorINS_10MCFragmentEEC2Ev: 225| 6.75k| ilist_iterator() : NodePtr(nullptr) {} _ZN7llvm_ks14ilist_iteratorINS_10MCFragmentEEppEv: 267| 12.8k| ilist_iterator &operator++() { // preincrement - Advance 268| 12.8k| NodePtr = Traits::getNext(NodePtr); 269| 12.8k| return *this; 270| 12.8k| } _ZN7llvm_ks21ilist_nextprev_traitsINS_10MCFragmentEE7getNextEPS1_: 58| 15.9k| static NodeTy *getNext(NodeTy *N) { return N->getNext(); } _ZNK7llvm_ks14ilist_iteratorINS_10MCFragmentEEeqIS1_EEbRKNS0_IT_EE: 254| 1.64k| template bool operator==(const ilist_iterator &RHS) const { 255| 1.64k| return NodePtr == RHS.getNodePtrUnchecked(); 256| 1.64k| } _ZNK7llvm_ks14ilist_iteratorINS_10MCFragmentEEdeEv: 248| 244k| reference operator*() const { 249| 244k| return *NodePtr; 250| 244k| } _ZNK7llvm_ks6iplistINS_10MCFragmentENS_12ilist_traitsIS1_EEE5emptyEv: 434| 316| bool LLVM_ATTRIBUTE_UNUSED_RESULT empty() const { 435| 316| return !Head || Head == getTail(); ------------------ | Branch (435:12): [True: 0, False: 316] | Branch (435:21): [True: 0, False: 316] ------------------ 436| 316| } _ZNK7llvm_ks6iplistINS_10MCFragmentENS_12ilist_traitsIS1_EEE7getTailEv: 370| 316| const NodeTy *getTail() const { return this->ensureHead(Head); } _ZN7llvm_ks6iplistINS_10MCFragmentENS_12ilist_traitsIS1_EEE3endEv: 416| 11.7k| iterator end() { 417| 11.7k| CreateLazySentinel(); 418| 11.7k| return iterator(getTail()); 419| 11.7k| } _ZN7llvm_ks6iplistINS_10MCFragmentENS_12ilist_traitsIS1_EEE7getTailEv: 369| 12.6k| NodeTy *getTail() { return this->ensureHead(Head); } _ZN7llvm_ks6iplistINS_10MCFragmentENS_12ilist_traitsIS1_EEE5beginEv: 408| 260k| iterator begin() { 409| 260k| CreateLazySentinel(); 410| 260k| return iterator(Head); 411| 260k| } _ZNK7llvm_ks14ilist_iteratorINS_10MCFragmentEEneIS1_EEbRKNS0_IT_EE: 257| 271k| template bool operator!=(const ilist_iterator &RHS) const { 258| 271k| return NodePtr != RHS.getNodePtrUnchecked(); 259| 271k| } _ZN7llvm_ks6iplistINS_10MCFragmentENS_12ilist_traitsIS1_EEEC2Ev: 400| 32.6k| iplist() : Head(this->provideInitialHead()) {} _ZN7llvm_ks21ilist_sentinel_traitsINS_10MCFragmentEE18provideInitialHeadEv: 86| 32.6k| static NodeTy *provideInitialHead() { return nullptr; } _ZN7llvm_ks6iplistINS_10MCFragmentENS_12ilist_traitsIS1_EEED2Ev: 401| 32.6k| ~iplist() { 402| 32.6k| if (!Head) return; ------------------ | Branch (402:9): [True: 31.7k, False: 879] ------------------ 403| 879| clear(); 404| 879| Traits::destroySentinel(getTail()); 405| 879| } _ZN7llvm_ks6iplistINS_10MCFragmentENS_12ilist_traitsIS1_EEE5clearEv: 605| 879| void clear() { if (Head) erase(begin(), end()); } ------------------ | Branch (605:22): [True: 879, False: 0] ------------------ _ZN7llvm_ks6iplistINS_10MCFragmentENS_12ilist_traitsIS1_EEE5eraseENS_14ilist_iteratorIS1_EES6_: 599| 879| iterator erase(iterator first, iterator last) { 600| 3.93k| while (first != last) ------------------ | Branch (600:12): [True: 3.05k, False: 879] ------------------ 601| 3.05k| first = erase(first); 602| 879| return last; 603| 879| } _ZN7llvm_ks6iplistINS_10MCFragmentENS_12ilist_traitsIS1_EEE5eraseENS_14ilist_iteratorIS1_EE: 517| 3.05k| iterator erase(iterator where) { 518| 3.05k| this->deleteNode(remove(where)); 519| 3.05k| return where; 520| 3.05k| } _ZN7llvm_ks6iplistINS_10MCFragmentENS_12ilist_traitsIS1_EEE6removeERNS_14ilist_iteratorIS1_EE: 484| 3.05k| NodeTy *remove(iterator &IT) { 485| 3.05k| assert(IT != end() && "Cannot remove end of list!"); ------------------ | Branch (485:5): [True: 3.05k, False: 0] | Branch (485:5): [True: 3.05k, Folded] | Branch (485:5): [True: 3.05k, False: 0] ------------------ 486| 3.05k| NodeTy *Node = &*IT; 487| 3.05k| NodeTy *NextNode = this->getNext(Node); 488| 3.05k| NodeTy *PrevNode = this->getPrev(Node); 489| | 490| 3.05k| if (Node != Head) // Is PrevNode off the beginning of the list? ------------------ | Branch (490:9): [True: 0, False: 3.05k] ------------------ 491| 0| this->setNext(PrevNode, NextNode); 492| 3.05k| else 493| 3.05k| Head = NextNode; 494| 3.05k| this->setPrev(NextNode, PrevNode); 495| 3.05k| IT.reset(NextNode); 496| 3.05k| this->removeNodeFromList(Node); // Notify traits that we removed a node... 497| | 498| | // Set the next/prev pointers of the current node to null. This isn't 499| | // strictly required, but this catches errors where a node is removed from 500| | // an ilist (and potentially deleted) with iterators still pointing at it. 501| | // When those iterators are incremented or decremented, they will assert on 502| | // the null next/prev pointer instead of "usually working". 503| 3.05k| this->setNext(Node, nullptr); 504| 3.05k| this->setPrev(Node, nullptr); 505| 3.05k| return Node; 506| 3.05k| } _ZN7llvm_ks14ilist_iteratorINS_10MCFragmentEE5resetEPS1_: 241| 3.05k| void reset(pointer NP) { NodePtr = NP; } _ZN7llvm_ks21ilist_sentinel_traitsINS_10MCFragmentEE15destroySentinelEPS1_: 81| 879| static void destroySentinel(NodeTy *N) { delete N; } _ZNK7llvm_ks14ilist_iteratorINS_10MCFragmentEEptEv: 251| 1.89k| pointer operator->() const { return &operator*(); } _ZN7llvm_ks6iplistINS_10MCFragmentENS_12ilist_traitsIS1_EEE6rbeginEv: 426| 316| reverse_iterator rbegin() { return reverse_iterator(end()); } _ZN7llvm_ks14ilist_iteratorIKNS_10MCFragmentEEC2IS1_EERKNS0_IT_EE: 231| 528| : NodePtr(RHS.getNodePtrUnchecked()) {} _ZNK7llvm_ks14ilist_iteratorIKNS_10MCFragmentEEneIS2_EEbRKNS0_IT_EE: 257| 2.03k| template bool operator!=(const ilist_iterator &RHS) const { 258| 2.03k| return NodePtr != RHS.getNodePtrUnchecked(); 259| 2.03k| } _ZN7llvm_ks14ilist_iteratorIKNS_10MCFragmentEEppEv: 267| 1.77k| ilist_iterator &operator++() { // preincrement - Advance 268| 1.77k| NodePtr = Traits::getNext(NodePtr); 269| 1.77k| return *this; 270| 1.77k| } _ZN7llvm_ks21ilist_nextprev_traitsINS_10MCFragmentEE7getNextEPKS1_: 60| 1.77k| static const NodeTy *getNext(const NodeTy *N) { return N->getNext(); } _ZNK7llvm_ks14ilist_iteratorIKNS_10MCFragmentEEdeEv: 248| 1.77k| reference operator*() const { 249| 1.77k| return *NodePtr; 250| 1.77k| } _ZN7llvm_ks15ilist_half_nodeINS_10MCFragmentEE7getPrevEv: 33| 526k| NodeTy *getPrev() { return Prev; } _ZN7llvm_ks10ilist_nodeINS_10MCFragmentEE7setNextEPS1_: 56| 9.44k| void setNext(NodeTy *N) { Next = N; } _ZN7llvm_ks15ilist_half_nodeINS_10MCFragmentEE7setPrevEPS1_: 35| 13.0k| void setPrev(NodeTy *P) { Prev = P; } _ZN7llvm_ks22ilist_node_with_parentINS_10MCFragmentENS_9MCSectionEEC2Ev: 78| 36.5k| ilist_node_with_parent() = default; _ZN7llvm_ks10ilist_nodeINS_10MCFragmentEEC2Ev: 58| 36.5k| ilist_node() : Next(nullptr) {} _ZN7llvm_ks15ilist_half_nodeINS_10MCFragmentEEC2Ev: 36| 36.5k| ilist_half_node() : Prev(nullptr) {} _ZN7llvm_ks22ilist_node_with_parentINS_10MCFragmentENS_9MCSectionEE11getPrevNodeEv: 94| 1.64k| NodeTy *getPrevNode() { 95| | // Should be separated to a reused function, but then we couldn't use auto 96| | // (and would need the type of the list). 97| 1.64k| const auto &List = 98| 1.64k| getNodeParent()->*(ParentTy::getSublistAccess((NodeTy *)nullptr)); 99| 1.64k| return List.getPrevNode(*static_cast(this)); 100| 1.64k| } _ZNK7llvm_ks22ilist_node_with_parentINS_10MCFragmentENS_9MCSectionEE13getNodeParentEv: 86| 1.64k| const ParentTy *getNodeParent() const { 87| 1.64k| return static_cast(this)->getParent(); 88| 1.64k| } _ZN7llvm_ks10ilist_nodeINS_10MCFragmentEE11getIteratorEv: 61| 1.64k| ilist_iterator getIterator() { 62| | // FIXME: Stop downcasting to create the iterator (potential UB). 63| 1.64k| return ilist_iterator(static_cast(this)); 64| 1.64k| } _ZN7llvm_ks10ilist_nodeINS_10MCFragmentEE7getNextEv: 54| 15.9k| NodeTy *getNext() { return Next; } _ZNK7llvm_ks10ilist_nodeINS_10MCFragmentEE7getNextEv: 55| 1.77k| const NodeTy *getNext() const { return Next; } _ZN7llvm_ks16pointee_iteratorINSt3__111__wrap_iterIPPNS_9MCSectionEEES3_EC2IS6_EEOT_: 239| 3.64k| : pointee_iterator::iterator_adaptor_base(std::forward(u)) {} _ZN7llvm_ks21iterator_adaptor_baseINS_16pointee_iteratorINSt3__111__wrap_iterIPPNS_9MCSectionEEES4_EES7_NS2_26random_access_iterator_tagES4_lS5_RS4_NS2_15iterator_traitsIS7_EEEC2IS7_EEOT_NS2_9enable_ifIXntsr3std10is_base_ofINS2_9remove_cvINS2_16remove_referenceISF_E4typeEE4typeES8_EE5valueEiE4typeE: 163| 3.64k| : I(std::forward(u)) {} _ZN7llvm_ks16pointee_iteratorINSt3__111__wrap_iterIPPKNS_8MCSymbolEEES4_EC2IS7_EEOT_: 239| 624| : pointee_iterator::iterator_adaptor_base(std::forward(u)) {} _ZN7llvm_ks21iterator_adaptor_baseINS_16pointee_iteratorINSt3__111__wrap_iterIPPKNS_8MCSymbolEEES5_EES8_NS2_26random_access_iterator_tagES5_lS6_RS5_NS2_15iterator_traitsIS8_EEEC2IS8_EEOT_NS2_9enable_ifIXntsr3std10is_base_ofINS2_9remove_cvINS2_16remove_referenceISG_E4typeEE4typeES9_EE5valueEiE4typeE: 163| 624| : I(std::forward(u)) {} _ZNK7llvm_ks20iterator_facade_baseINS_16pointee_iteratorINSt3__111__wrap_iterIPPNS_9MCSectionEEES4_EENS2_26random_access_iterator_tagES4_lS5_RS4_EneERKS8_: 96| 3.60k| bool operator!=(const DerivedT &RHS) const { 97| 3.60k| return !static_cast(this)->operator==(RHS); 98| 3.60k| } _ZNK7llvm_ks21iterator_adaptor_baseINS_16pointee_iteratorINSt3__111__wrap_iterIPPNS_9MCSectionEEES4_EES7_NS2_26random_access_iterator_tagES4_lS5_RS4_NS2_15iterator_traitsIS7_EEEeqERKS8_: 208| 3.60k| bool operator==(const DerivedT &RHS) const { return I == RHS.I; } _ZN7llvm_ks21iterator_adaptor_baseINS_16pointee_iteratorINSt3__111__wrap_iterIPPNS_9MCSectionEEES4_EES7_NS2_26random_access_iterator_tagES4_lS5_RS4_NS2_15iterator_traitsIS7_EEEppEv: 195| 1.78k| DerivedT &operator++() { 196| 1.78k| ++I; 197| 1.78k| return *static_cast(this); 198| 1.78k| } _ZNK7llvm_ks16pointee_iteratorINSt3__111__wrap_iterIPPNS_9MCSectionEEES3_EdeEv: 241| 1.84k| T &operator*() const { return **this->I; } _ZNK7llvm_ks20iterator_facade_baseINS_16pointee_iteratorINSt3__111__wrap_iterIPPKNS_8MCSymbolEEES5_EENS2_26random_access_iterator_tagES5_lS6_RS5_EneERKS9_: 96| 7.63k| bool operator!=(const DerivedT &RHS) const { 97| 7.63k| return !static_cast(this)->operator==(RHS); 98| 7.63k| } _ZNK7llvm_ks21iterator_adaptor_baseINS_16pointee_iteratorINSt3__111__wrap_iterIPPKNS_8MCSymbolEEES5_EES8_NS2_26random_access_iterator_tagES5_lS6_RS5_NS2_15iterator_traitsIS8_EEEeqERKS9_: 208| 7.63k| bool operator==(const DerivedT &RHS) const { return I == RHS.I; } _ZN7llvm_ks21iterator_adaptor_baseINS_16pointee_iteratorINSt3__111__wrap_iterIPPKNS_8MCSymbolEEES5_EES8_NS2_26random_access_iterator_tagES5_lS6_RS5_NS2_15iterator_traitsIS8_EEEppEv: 195| 7.32k| DerivedT &operator++() { 196| 7.32k| ++I; 197| 7.32k| return *static_cast(this); 198| 7.32k| } _ZNK7llvm_ks16pointee_iteratorINSt3__111__wrap_iterIPPKNS_8MCSymbolEEES4_EdeEv: 241| 7.32k| T &operator*() const { return **this->I; } _ZN7llvm_ks10make_rangeINS_16pointee_iteratorINSt3__111__wrap_iterIPPKNS_8MCSymbolEEES5_EEEENS_14iterator_rangeIT_EESB_SB_: 54| 312|template iterator_range make_range(T x, T y) { 55| 312| return iterator_range(std::move(x), std::move(y)); 56| 312|} _ZN7llvm_ks10make_rangeINS_14TargetRegistry8iteratorEEENS_14iterator_rangeIT_EES4_S4_: 54| 5.24k|template iterator_range make_range(T x, T y) { 55| 5.24k| return iterator_range(std::move(x), std::move(y)); 56| 5.24k|} _ZN7llvm_ks14iterator_rangeINS_14TargetRegistry8iteratorEEC2ES2_S2_: 43| 5.24k| : begin_iterator(std::move(begin_iterator)), 44| 5.24k| end_iterator(std::move(end_iterator)) {} _ZNK7llvm_ks14iterator_rangeINS_14TargetRegistry8iteratorEE5beginEv: 46| 1.49k| IteratorT begin() const { return begin_iterator; } _ZNK7llvm_ks14iterator_rangeINS_14TargetRegistry8iteratorEE3endEv: 47| 3.74k| IteratorT end() const { return end_iterator; } _ZN7llvm_ks14iterator_rangeINS_16pointee_iteratorINSt3__111__wrap_iterIPPKNS_8MCSymbolEEES5_EEEC2ES9_S9_: 43| 312| : begin_iterator(std::move(begin_iterator)), 44| 312| end_iterator(std::move(end_iterator)) {} _ZNK7llvm_ks14iterator_rangeINS_16pointee_iteratorINSt3__111__wrap_iterIPPKNS_8MCSymbolEEES5_EEE5beginEv: 46| 312| IteratorT begin() const { return begin_iterator; } _ZNK7llvm_ks14iterator_rangeINS_16pointee_iteratorINSt3__111__wrap_iterIPPKNS_8MCSymbolEEES5_EEE3endEv: 47| 312| IteratorT end() const { return end_iterator; } _ZN7llvm_ks12MCAsmBackend7setArchEi: 145| 749| void setArch(int arch) { KsArch = arch; } _ZN7llvm_ks9MCAsmInfo8setRadixEj: 480| 749| void setRadix(unsigned v) { Radix = v; } _ZNK7llvm_ks9MCAsmInfo14isLittleEndianEv: 379| 140k| bool isLittleEndian() const { return IsLittleEndian; } _ZNK7llvm_ks9MCAsmInfo24hasSubsectionsViaSymbolsEv: 384| 23.4k| bool hasSubsectionsViaSymbols() const { return HasSubsectionsViaSymbols; } _ZNK7llvm_ks9MCAsmInfo13getDollarIsPCEv: 450| 198| bool getDollarIsPC() const { return DollarIsPC; } _ZNK7llvm_ks9MCAsmInfo18getSeparatorStringEv: 451| 57.3M| const char *getSeparatorString() const { return SeparatorString; } _ZNK7llvm_ks9MCAsmInfo16getCommentStringEv: 457| 28.7M| const char *getCommentString() const { return CommentString; } _ZNK7llvm_ks9MCAsmInfo22getPrivateGlobalPrefixEv: 463| 16.8k| const char *getPrivateGlobalPrefix() const { return PrivateGlobalPrefix; } _ZNK7llvm_ks9MCAsmInfo8getRadixEv: 481| 749| unsigned getRadix() const { return Radix; } _ZNK7llvm_ks9MCAsmInfo17doesAllowAtInNameEv: 482| 426| bool doesAllowAtInName() const { return AllowAtInName; } _ZNK7llvm_ks9MCAsmInfo21getAlignmentIsInBytesEv: 490| 249| bool getAlignmentIsInBytes() const { return AlignmentIsInBytes; } _ZNK7llvm_ks9MCAsmInfo21getTextAlignFillValueEv: 491| 87| unsigned getTextAlignFillValue() const { return TextAlignFillValue; } _ZNK7llvm_ks9MCAsmInfo25useParensForSymbolVariantEv: 548| 37.0k| bool useParensForSymbolVariant() const { return UseParensForSymbolVariant; } _ZN7llvm_ks9MCAsmInfo20addInitialFrameStateERKNS_16MCCFIInstructionE: 550| 749| void addInitialFrameState(const MCCFIInstruction &Inst) { 551| 749| InitialFrameState.push_back(Inst); 552| 749| } _ZNK7llvm_ks9MCAsmInfo21compressDebugSectionsEv: 566| 264| bool compressDebugSections() const { return CompressDebugSections; } _ZNK7llvm_ks9MCAsmInfo19shouldUseLogicalShrEv: 572| 60.6k| bool shouldUseLogicalShr() const { return UseLogicalShr; } _ZNK7llvm_ks11MCAsmLayout12getAssemblerEv: 51| 4.14k| MCAssembler &getAssembler() const { return Assembler; } _ZN7llvm_ks11MCAsmLayout15getSectionOrderEv: 66| 1.25k| llvm_ks::SmallVectorImpl &getSectionOrder() { return SectionOrder; } _ZNK7llvm_ks11MCAssembler8setErrorEj: 64| 275| void setError(unsigned E) const { KsError = E; } _ZNK7llvm_ks11MCAssembler8getErrorEv: 65| 2.30k| unsigned getError() const { return KsError; } _ZNK7llvm_ks11MCAssembler14setSymResolverEPv: 67| 312| void setSymResolver(void *h) const { KsSymResolver = h; } _ZNK7llvm_ks11MCAssembler10getContextEv: 264| 3.73k| MCContext &getContext() const { return Context; } _ZNK7llvm_ks11MCAssembler10getBackendEv: 266| 9.97k| MCAsmBackend &getBackend() const { return Backend; } _ZNK7llvm_ks11MCAssembler10getEmitterEv: 268| 8.24k| MCCodeEmitter &getEmitter() const { return Emitter; } _ZNK7llvm_ks11MCAssembler9getWriterEv: 270| 6.31k| MCObjectWriter &getWriter() const { return Writer; } _ZNK7llvm_ks11MCAssembler17isBundlingEnabledEv: 297| 176k| bool isBundlingEnabled() const { return BundleAlignSize != 0; } _ZN7llvm_ks11MCAssembler5beginEv: 310| 1.82k| iterator begin() { return Sections.begin(); } _ZN7llvm_ks11MCAssembler3endEv: 313| 1.82k| iterator end() { return Sections.end(); } _ZN7llvm_ks11MCAssembler12symbol_beginEv: 321| 312| symbol_iterator symbol_begin() { return Symbols.begin(); } _ZN7llvm_ks11MCAssembler10symbol_endEv: 324| 312| symbol_iterator symbol_end() { return Symbols.end(); } _ZN7llvm_ks11MCAssembler7symbolsEv: 327| 312| symbol_range symbols() { return make_range(symbol_begin(), symbol_end()); } _ZN7llvm_ks11MCAssembler11addFileNameENS_9StringRefE: 411| 355| void addFileName(StringRef FileName) { 412| 355| if (std::find(FileNames.begin(), FileNames.end(), FileName) == ------------------ | Branch (412:9): [True: 111, False: 244] ------------------ 413| 355| FileNames.end()) 414| 111| FileNames.push_back(FileName); 415| 355| } _ZN7llvm_ks7MCCVLocC2Ejjjjbb: 43| 749| : FunctionId(functionid), FileNum(fileNum), Line(line), Column(column), 44| 749| PrologueEnd(prologueend), IsStmt(isstmt) {} _ZN7llvm_ks9MCContext13ELFSectionKeyC2ENS_9StringRefES2_j: 183| 32.4k| : SectionName(SectionName), GroupName(GroupName), UniqueID(UniqueID) { 184| 32.4k| } _ZNK7llvm_ks9MCContext13ELFSectionKeyltERKS1_: 185| 220k| bool operator<(const ELFSectionKey &Other) const { 186| 220k| if (SectionName != Other.SectionName) ------------------ | Branch (186:13): [True: 220k, False: 0] ------------------ 187| 220k| return SectionName < Other.SectionName; 188| 0| if (GroupName != Other.GroupName) ------------------ | Branch (188:13): [True: 0, False: 0] ------------------ 189| 0| return GroupName < Other.GroupName; 190| 0| return UniqueID < Other.UniqueID; 191| 0| } _ZNK7llvm_ks9MCContext10getAsmInfoEv: 242| 163k| const MCAsmInfo *getAsmInfo() const { return MAI; } _ZNK7llvm_ks9MCContext15getRegisterInfoEv: 244| 21.2k| const MCRegisterInfo *getRegisterInfo() const { return MRI; } _ZNK7llvm_ks9MCContext17getObjectFileInfoEv: 246| 6.26k| const MCObjectFileInfo *getObjectFileInfo() const { return MOFI; } _ZN7llvm_ks9MCContext14getBaseAddressEv: 251| 316| uint64_t getBaseAddress() { return BaseAddress; } _ZN7llvm_ks9MCContext13getELFSectionENS_9StringRefEjj: 331| 21.2k| unsigned Flags) { 332| 21.2k| return getELFSection(Section, Type, Flags, nullptr); 333| 21.2k| } _ZN7llvm_ks9MCContext13getELFSectionENS_9StringRefEjjPKc: 336| 28.7k| unsigned Flags, const char *BeginSymName) { 337| 28.7k| return getELFSection(Section, Type, Flags, 0, "", BeginSymName); 338| 28.7k| } _ZN7llvm_ks9MCContext13getELFSectionENS_9StringRefEjjjS1_: 342| 3.74k| StringRef Group) { 343| 3.74k| return getELFSection(Section, Type, Flags, EntrySize, Group, nullptr); 344| 3.74k| } _ZN7llvm_ks9MCContext13getELFSectionENS_9StringRefEjjjS1_PKc: 348| 32.4k| StringRef Group, const char *BeginSymName) { 349| 32.4k| return getELFSection(Section, Type, Flags, EntrySize, Group, ~0, 350| 32.4k| BeginSymName); 351| 32.4k| } _ZN7llvm_ks9MCContext22getGenDwarfForAssemblyEv: 486| 744| bool getGenDwarfForAssembly() { return GenDwarfForAssembly; } _ZN7llvm_ks9MCContext8allocateEjj: 555| 103k| void *allocate(unsigned Size, unsigned Align = 8) { 556| 103k| return Allocator.Allocate(Size, Align); 557| 103k| } _ZnwmRN7llvm_ks9MCContextEm: 596| 86.0k| size_t Alignment = 8) LLVM_NOEXCEPT { 597| 86.0k| return C.allocate(Bytes, Alignment); 598| 86.0k|} _ZN7llvm_ks10MCDwarfLocC2Ejjjjjj: 78| 1.49k| : FileNum(fileNum), Line(line), Column(column), Flags(flags), Isa(isa), 79| 1.49k| Discriminator(discriminator) {} _ZN7llvm_ks16MCCFIInstructionC2ENS0_6OpTypeEPNS_8MCSymbolEjiNS_9StringRefE: 358| 749| : Operation(Op), Label(L), Register(R), Offset(O), 359| 749| Values(V.begin(), V.end()) { 360| | assert(Op != OpRegister); ------------------ | Branch (360:5): [True: 749, False: 0] ------------------ 361| 749| } _ZN7llvm_ks16MCCFIInstruction12createDefCfaEPNS_8MCSymbolEji: 372| 749| int Offset) { 373| 749| return MCCFIInstruction(OpDefCfa, L, Register, -Offset, ""); 374| 749| } _ZN7llvm_ks23MCELFObjectTargetWriter8getOSABIENS_6Triple6OSTypeE: 54| 749| static uint8_t getOSABI(Triple::OSType OSType) { 55| 749| switch (OSType) { 56| 0| case Triple::CloudABI: ------------------ | Branch (56:7): [True: 0, False: 749] ------------------ 57| 0| return ELF::ELFOSABI_CLOUDABI; 58| 0| case Triple::PS4: ------------------ | Branch (58:7): [True: 0, False: 749] ------------------ 59| 0| case Triple::FreeBSD: ------------------ | Branch (59:7): [True: 0, False: 749] ------------------ 60| 0| return ELF::ELFOSABI_FREEBSD; 61| 749| default: ------------------ | Branch (61:7): [True: 749, False: 0] ------------------ 62| 749| return ELF::ELFOSABI_NONE; 63| 749| } 64| 749| } _ZN7llvm_ks18ELFRelocationEntryC2EmPKNS_11MCSymbolELFEjm: 37| 399| : Offset(Offset), Symbol(Symbol), Type(Type), Addend(Addend) {} _ZN7llvm_ks23MCELFObjectTargetWriterD2Ev: 66| 749| virtual ~MCELFObjectTargetWriter() {} _ZNK7llvm_ks23MCELFObjectTargetWriter7is64BitEv: 82| 4| bool is64Bit() const { return Is64Bit; } _ZN7llvm_ks13MCELFStreamerC2ERNS_9MCContextERNS_12MCAsmBackendERNS_17raw_pwrite_streamEPNS_13MCCodeEmitterE: 32| 749| : MCObjectStreamer(Context, TAB, OS, Emitter), SeenIdent(false) {} _ZN7llvm_ks6MCExprC2ENS0_8ExprKindE: 59| 86.0k| explicit MCExpr(ExprKind Kind) : Kind(Kind) {} _ZNK7llvm_ks6MCExpr7getKindEv: 70| 628k| ExprKind getKind() const { return Kind; } _ZN7llvm_ks14MCConstantExprC2El: 134| 31.9k| : MCExpr(MCExpr::Constant), Value(Value) {} _ZNK7llvm_ks14MCConstantExpr8getValueEv: 146| 37.3k| int64_t getValue() const { return Value; } _ZN7llvm_ks14MCConstantExpr7classofEPKNS_6MCExprE: 150| 80.1k| static bool classof(const MCExpr *E) { 151| 80.1k| return E->getKind() == MCExpr::Constant; 152| 80.1k| } _ZNK7llvm_ks15MCSymbolRefExpr9getSymbolEv: 333| 71.6k| const MCSymbol &getSymbol() const { return *Symbol; } _ZNK7llvm_ks15MCSymbolRefExpr7getKindEv: 335| 25.2k| VariantKind getKind() const { return Kind; } _ZNK7llvm_ks15MCSymbolRefExpr24hasSubsectionsViaSymbolsEv: 339| 810| bool hasSubsectionsViaSymbols() const { return HasSubsectionsViaSymbols; } _ZN7llvm_ks15MCSymbolRefExpr7classofEPKNS_6MCExprE: 351| 67.3k| static bool classof(const MCExpr *E) { 352| 67.3k| return E->getKind() == MCExpr::SymbolRef; 353| 67.3k| } _ZN7llvm_ks11MCUnaryExprC2ENS0_6OpcodeEPKNS_6MCExprE: 371| 6.21k| : MCExpr(MCExpr::Unary), Op(Op), Expr(Expr) {} _ZN7llvm_ks11MCUnaryExpr10createLNotEPKNS_6MCExprERNS_9MCContextE: 379| 710| static const MCUnaryExpr *createLNot(const MCExpr *Expr, MCContext &Ctx) { 380| 710| return create(LNot, Expr, Ctx); 381| 710| } _ZN7llvm_ks11MCUnaryExpr11createMinusEPKNS_6MCExprERNS_9MCContextE: 382| 2.59k| static const MCUnaryExpr *createMinus(const MCExpr *Expr, MCContext &Ctx) { 383| 2.59k| return create(Minus, Expr, Ctx); 384| 2.59k| } _ZN7llvm_ks11MCUnaryExpr9createNotEPKNS_6MCExprERNS_9MCContextE: 385| 14| static const MCUnaryExpr *createNot(const MCExpr *Expr, MCContext &Ctx) { 386| 14| return create(Not, Expr, Ctx); 387| 14| } _ZN7llvm_ks11MCUnaryExpr10createPlusEPKNS_6MCExprERNS_9MCContextE: 388| 2.14k| static const MCUnaryExpr *createPlus(const MCExpr *Expr, MCContext &Ctx) { 389| 2.14k| return create(Plus, Expr, Ctx); 390| 2.14k| } _ZNK7llvm_ks11MCUnaryExpr9getOpcodeEv: 397| 9.21k| Opcode getOpcode() const { return Op; } _ZNK7llvm_ks11MCUnaryExpr10getSubExprEv: 400| 13.0k| const MCExpr *getSubExpr() const { return Expr; } _ZN7llvm_ks11MCUnaryExpr7classofEPKNS_6MCExprE: 404| 13.0k| static bool classof(const MCExpr *E) { 405| 13.0k| return E->getKind() == MCExpr::Unary; 406| 13.0k| } _ZN7llvm_ks12MCBinaryExprC2ENS0_6OpcodeEPKNS_6MCExprES4_: 443| 24.9k| : MCExpr(MCExpr::Binary), Op(Op), LHS(LHS), RHS(RHS) {} _ZN7llvm_ks12MCBinaryExpr9createAddEPKNS_6MCExprES3_RNS_9MCContextE: 452| 3.71k| MCContext &Ctx) { 453| 3.71k| return create(Add, LHS, RHS, Ctx); 454| 3.71k| } _ZNK7llvm_ks12MCBinaryExpr9getOpcodeEv: 533| 28.8k| Opcode getOpcode() const { return Op; } _ZNK7llvm_ks12MCBinaryExpr6getLHSEv: 536| 176k| const MCExpr *getLHS() const { return LHS; } _ZNK7llvm_ks12MCBinaryExpr6getRHSEv: 539| 58.6k| const MCExpr *getRHS() const { return RHS; } _ZN7llvm_ks12MCBinaryExpr7classofEPKNS_6MCExprE: 543| 178k| static bool classof(const MCExpr *E) { 544| 178k| return E->getKind() == MCExpr::Binary; 545| 178k| } _ZN7llvm_ks12MCTargetExprC2Ev: 555| 6| MCTargetExpr() : MCExpr(Target) {} _ZN7llvm_ks12MCTargetExpr7classofEPKNS_6MCExprE: 567| 18| static bool classof(const MCExpr *E) { 568| 18| return E->getKind() == MCExpr::Target; 569| 18| } _ZN7llvm_ks7MCFixup6createEjPKNS_6MCExprENS_11MCFixupKindENS_5SMLocE: 87| 8.35k| MCFixupKind Kind, SMLoc Loc = SMLoc()) { 88| 8.35k| assert(unsigned(Kind) < MaxTargetFixupKind && "Kind out of range!"); ------------------ | Branch (88:5): [True: 8.35k, False: 0] | Branch (88:5): [True: 8.35k, Folded] | Branch (88:5): [True: 8.35k, False: 0] ------------------ 89| 8.35k| MCFixup FI; 90| 8.35k| FI.Value = Value; 91| 8.35k| FI.Offset = Offset; 92| 8.35k| FI.Kind = unsigned(Kind); 93| 8.35k| FI.Loc = Loc; 94| 8.35k| return FI; 95| 8.35k| } _ZNK7llvm_ks7MCFixup7getKindEv: 119| 9.16k| MCFixupKind getKind() const { return MCFixupKind(Kind); } _ZNK7llvm_ks7MCFixup9getOffsetEv: 121| 8.23k| uint32_t getOffset() const { return Offset; } _ZN7llvm_ks7MCFixup9setOffsetEj: 122| 5.41k| void setOffset(uint32_t Value) { Offset = Value; } _ZNK7llvm_ks7MCFixup8getValueEv: 124| 6.90k| const MCExpr *getValue() const { return Value; } _ZN7llvm_ks7MCFixup14getKindForSizeEjb: 128| 2.86k| static MCFixupKind getKindForSize(unsigned Size, bool isPCRel) { 129| 2.86k| switch (Size) { 130| 0| default: llvm_unreachable("Invalid generic fixup size!"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ | Branch (130:5): [True: 0, False: 2.86k] ------------------ 131| 0| case 1: return isPCRel ? FK_PCRel_1 : FK_Data_1; ------------------ | Branch (131:5): [True: 0, False: 2.86k] | Branch (131:20): [True: 0, False: 0] ------------------ 132| 0| case 2: return isPCRel ? FK_PCRel_2 : FK_Data_2; ------------------ | Branch (132:5): [True: 0, False: 2.86k] | Branch (132:20): [True: 0, False: 0] ------------------ 133| 2.86k| case 4: return isPCRel ? FK_PCRel_4 : FK_Data_4; ------------------ | Branch (133:5): [True: 2.86k, False: 0] | Branch (133:20): [True: 0, False: 2.86k] ------------------ 134| 0| case 8: return isPCRel ? FK_PCRel_8 : FK_Data_8; ------------------ | Branch (134:5): [True: 0, False: 2.86k] | Branch (134:20): [True: 0, False: 0] ------------------ 135| 2.86k| } 136| 2.86k| } _ZNK7llvm_ks7MCFixup6getLocEv: 162| 1.04k| SMLoc getLoc() const { return Loc; } _ZNK7llvm_ks10MCFragment7getKindEv: 97| 478k| FragmentType getKind() const { return Kind; } _ZNK7llvm_ks10MCFragment9getParentEv: 99| 36.9k| MCSection *getParent() const { return Parent; } _ZN7llvm_ks10MCFragment9setParentEPNS_9MCSectionE: 100| 3.05k| void setParent(MCSection *Value) { Parent = Value; } _ZNK7llvm_ks10MCFragment14getLayoutOrderEv: 105| 19.9k| unsigned getLayoutOrder() const { return LayoutOrder; } _ZN7llvm_ks10MCFragment14setLayoutOrderEj: 106| 1.89k| void setLayoutOrder(unsigned Value) { LayoutOrder = Value; } _ZNK7llvm_ks10MCFragment16getBundlePaddingEv: 121| 1.46k| uint8_t getBundlePadding() const { return BundlePadding; } _ZNK7llvm_ks10MCFragment7isDummyEv: 128| 32.6k| bool isDummy() const { return Kind == FT_Dummy; } _ZN7llvm_ks15MCDummyFragmentC2EPNS_9MCSectionE: 136| 32.6k| : MCFragment(FT_Dummy, false, 0, Sec){}; _ZN7llvm_ks17MCEncodedFragmentC2ENS_10MCFragment12FragmentTypeEbPNS_9MCSectionE: 147| 888| : MCFragment(FType, HasInstructions, 0, Sec) {} _ZN7llvm_ks17MCEncodedFragment7classofEPKNS_10MCFragmentE: 150| 2.12k| static bool classof(const MCFragment *F) { 151| 2.12k| MCFragment::FragmentType Kind = F->getKind(); 152| 2.12k| switch (Kind) { 153| 1.52k| default: ------------------ | Branch (153:5): [True: 1.52k, False: 602] ------------------ 154| 1.52k| return false; 155| 0| case MCFragment::FT_Relaxable: ------------------ | Branch (155:5): [True: 0, False: 2.12k] ------------------ 156| 0| case MCFragment::FT_CompactEncodedInst: ------------------ | Branch (156:5): [True: 0, False: 2.12k] ------------------ 157| 602| case MCFragment::FT_Data: ------------------ | Branch (157:5): [True: 602, False: 1.52k] ------------------ 158| 602| return true; 159| 2.12k| } 160| 2.12k| } _ZN7llvm_ks14MCDataFragmentC2EPNS_9MCSectionE: 222| 888| : MCEncodedFragmentWithFixups<32, 4>(FT_Data, false, Sec) {} _ZN7llvm_ks14MCDataFragment18setHasInstructionsEb: 224| 8.24k| void setHasInstructions(bool V) { HasInstructions = V; } _ZN7llvm_ks14MCDataFragment7classofEPKNS_10MCFragmentE: 226| 463k| static bool classof(const MCFragment *F) { 227| 463k| return F->getKind() == MCFragment::FT_Data; 228| 463k| } _ZN7llvm_ks28MCCompactEncodedInstFragment7classofEPKNS_10MCFragmentE: 242| 301| static bool classof(const MCFragment *F) { 243| 301| return F->getKind() == MCFragment::FT_CompactEncodedInst; 244| 301| } _ZN7llvm_ks15MCAlignFragmentC2EjljjPNS_9MCSectionE: 297| 338| : MCFragment(FT_Align, false, 0, Sec), Alignment(Alignment), 298| 338| EmitNops(false), Value(Value), 299| 338| ValueSize(ValueSize), MaxBytesToEmit(MaxBytesToEmit) {} _ZNK7llvm_ks15MCAlignFragment12getAlignmentEv: 304| 538| unsigned getAlignment() const { return Alignment; } _ZNK7llvm_ks15MCAlignFragment12getValueSizeEv: 308| 765| unsigned getValueSize() const { return ValueSize; } _ZNK7llvm_ks15MCAlignFragment17getMaxBytesToEmitEv: 310| 538| unsigned getMaxBytesToEmit() const { return MaxBytesToEmit; } _ZNK7llvm_ks15MCAlignFragment11hasEmitNopsEv: 312| 255| bool hasEmitNops() const { return EmitNops; } _ZN7llvm_ks15MCAlignFragment11setEmitNopsEb: 313| 251| void setEmitNops(bool Value) { EmitNops = Value; } _ZN7llvm_ks15MCAlignFragment7classofEPKNS_10MCFragmentE: 317| 1.38k| static bool classof(const MCFragment *F) { 318| 1.38k| return F->getKind() == MCFragment::FT_Align; 319| 1.38k| } _ZN7llvm_ks14MCFillFragmentC2EhmPNS_9MCSectionE: 332| 614| : MCFragment(FT_Fill, false, 0, Sec), Value(Value), Size(Size) {} _ZNK7llvm_ks14MCFillFragment8getValueEv: 334| 602| uint8_t getValue() const { return Value; } _ZNK7llvm_ks14MCFillFragment7getSizeEv: 335| 1.80k| uint64_t getSize() const { return Size; } _ZN7llvm_ks14MCFillFragment7classofEPKNS_10MCFragmentE: 337| 2.41k| static bool classof(const MCFragment *F) { 338| 2.41k| return F->getKind() == MCFragment::FT_Fill; 339| 2.41k| } _ZN7llvm_ks13MCOrgFragmentC2ERKNS_6MCExprEaPNS_9MCSectionE: 352| 1.21k| : MCFragment(FT_Org, false, 0, Sec), Offset(&Offset), Value(Value) {} _ZNK7llvm_ks13MCOrgFragment9getOffsetEv: 357| 769| const MCExpr &getOffset() const { return *Offset; } _ZNK7llvm_ks13MCOrgFragment8getValueEv: 359| 1| uint8_t getValue() const { return Value; } _ZN7llvm_ks13MCOrgFragment7classofEPKNS_10MCFragmentE: 363| 2.34k| static bool classof(const MCFragment *F) { 364| 2.34k| return F->getKind() == MCFragment::FT_Org; 365| 2.34k| } _ZN7llvm_ks27MCEncodedFragmentWithFixupsILj32ELj4EEC2ENS_10MCFragment12FragmentTypeEbPNS_9MCSectionE: 195| 888| : MCEncodedFragmentWithContents(FType, HasInstructions, 196| 888| Sec) {} _ZN7llvm_ks29MCEncodedFragmentWithContentsILj32EEC2ENS_10MCFragment12FragmentTypeEbPNS_9MCSectionE: 174| 888| : MCEncodedFragment(FType, HasInstructions, Sec) {} _ZN7llvm_ks29MCEncodedFragmentWithContentsILj32EE11getContentsEv: 177| 384k| SmallVectorImpl &getContents() { return Contents; } _ZN7llvm_ks27MCEncodedFragmentWithFixupsILj32ELj4EE9getFixupsEv: 202| 8.65k| SmallVectorImpl &getFixups() { return Fixups; } _ZNK7llvm_ks29MCEncodedFragmentWithContentsILj32EE11getContentsEv: 178| 523| const SmallVectorImpl &getContents() const { return Contents; } _ZN7llvm_ks9MCOperandC2Ev: 52| 28.4k| MCOperand() : Kind(kInvalid), FPImmVal(0.0) {} _ZNK7llvm_ks9MCOperand5isRegEv: 55| 37.6k| bool isReg() const { return Kind == kRegister; } _ZNK7llvm_ks9MCOperand5isImmEv: 56| 16.5k| bool isImm() const { return Kind == kImmediate; } _ZNK7llvm_ks9MCOperand7isFPImmEv: 57| 363| bool isFPImm() const { return Kind == kFPImmediate; } _ZNK7llvm_ks9MCOperand6isExprEv: 58| 37.2k| bool isExpr() const { return Kind == kExpr; } _ZNK7llvm_ks9MCOperand6getRegEv: 62| 16.3k| unsigned getReg() const { 63| 16.3k| assert(isReg() && "This is not a register operand!"); ------------------ | Branch (63:5): [True: 16.3k, False: 0] | Branch (63:5): [True: 16.3k, Folded] | Branch (63:5): [True: 16.3k, False: 0] ------------------ 64| 16.3k| return RegVal; 65| 16.3k| } _ZNK7llvm_ks9MCOperand6getImmEv: 73| 4.08k| int64_t getImm() const { 74| 4.08k| assert(isImm() && "This is not an immediate"); ------------------ | Branch (74:5): [True: 4.08k, False: 0] | Branch (74:5): [True: 4.08k, Folded] | Branch (74:5): [True: 4.08k, False: 0] ------------------ 75| 4.08k| return ImmVal; 76| 4.08k| } _ZNK7llvm_ks9MCOperand7getExprEv: 92| 8.49k| const MCExpr *getExpr() const { 93| 8.49k| assert(isExpr() && "This is not an expression"); ------------------ | Branch (93:5): [True: 8.49k, False: 0] | Branch (93:5): [True: 8.49k, Folded] | Branch (93:5): [True: 8.49k, False: 0] ------------------ 94| 8.49k| return ExprVal; 95| 8.49k| } _ZN7llvm_ks9MCOperand9createRegEj: 110| 16.3k| static MCOperand createReg(unsigned Reg) { 111| 16.3k| MCOperand Op; 112| 16.3k| Op.Kind = kRegister; 113| 16.3k| Op.RegVal = Reg; 114| 16.3k| return Op; 115| 16.3k| } _ZN7llvm_ks9MCOperand9createImmEl: 116| 3.99k| static MCOperand createImm(int64_t Val) { 117| 3.99k| MCOperand Op; 118| 3.99k| Op.Kind = kImmediate; 119| 3.99k| Op.ImmVal = Val; 120| 3.99k| return Op; 121| 3.99k| } _ZN7llvm_ks9MCOperand10createExprEPKNS_6MCExprE: 128| 4.24k| static MCOperand createExpr(const MCExpr *Val) { 129| 4.24k| MCOperand Op; 130| 4.24k| Op.Kind = kExpr; 131| 4.24k| Op.ExprVal = Val; 132| 4.24k| return Op; 133| 4.24k| } _ZN7llvm_ks6MCInstC2Em: 158| 8.35k| MCInst(uint64_t addr = 0) : Opcode(0), Address(addr) {} _ZN7llvm_ks6MCInst9setOpcodeEj: 160| 8.34k| void setOpcode(unsigned Op) { Opcode = Op; } _ZNK7llvm_ks6MCInst9getOpcodeEv: 161| 70.4k| unsigned getOpcode() const { return Opcode; } _ZN7llvm_ks6MCInst10setAddressEm: 163| 8.24k| void setAddress(uint64_t addr) { Address = addr; } _ZNK7llvm_ks6MCInst10getAddressEv: 164| 12.5k| uint64_t getAddress() const { return Address; } _ZN7llvm_ks6MCInst6setLocENS_5SMLocE: 166| 8.34k| void setLoc(SMLoc loc) { Loc = loc; } _ZNK7llvm_ks6MCInst10getOperandEj: 169| 24.5k| const MCOperand &getOperand(unsigned i) const { return Operands[i]; } _ZN7llvm_ks6MCInst10getOperandEj: 170| 33.6k| MCOperand &getOperand(unsigned i) { return Operands[i]; } _ZNK7llvm_ks6MCInst14getNumOperandsEv: 171| 8.48k| unsigned getNumOperands() const { return Operands.size(); } _ZN7llvm_ks6MCInst10addOperandERKNS_9MCOperandE: 173| 24.6k| void addOperand(const MCOperand &Op) { Operands.push_back(Op); } _ZN7llvm_ks6MCInst5clearEv: 177| 4.26k| void clear() { Operands.clear(); } _ZNK7llvm_ks11MCInstrDesc14getNumOperandsEv: 203| 4.22k| unsigned getNumOperands() const { return NumOperands; } _ZNK7llvm_ks11MCInstrDesc6isCallEv: 222| 420| bool isCall() const { return Flags & (1 << MCID::Call); } _ZNK7llvm_ks11MCInstrDesc8isBranchEv: 228| 4.26k| bool isBranch() const { return Flags & (1 << MCID::Branch); } _ZNK7llvm_ks11MCInstrDesc12hasDelaySlotEv: 242| 4.19k| bool hasDelaySlot() const { return Flags & (1 << MCID::DelaySlot); } _ZNK7llvm_ks11MCInstrDesc7mayLoadEv: 251| 4.33k| bool mayLoad() const { return Flags & (1 << MCID::MayLoad); } _ZNK7llvm_ks11MCInstrDesc8mayStoreEv: 257| 4.22k| bool mayStore() const { return Flags & (1 << MCID::MayStore); } _ZNK7llvm_ks11MCInstrDesc7getSizeEv: 324| 8.24k| unsigned getSize() const { return Size; } _ZN7llvm_ks11MCInstrInfo15InitMCInstrInfoEPKNS_11MCInstrDescEPKjPKcj: 34| 749| unsigned NO) { 35| 749| Desc = D; 36| 749| InstrNameIndices = NI; 37| 749| InstrNameData = ND; 38| 749| NumOpcodes = NO; 39| 749| } _ZNK7llvm_ks11MCInstrInfo3getEj: 45| 8.24k| const MCInstrDesc &get(unsigned Opcode) const { 46| 8.24k| assert(Opcode < NumOpcodes && "Invalid opcode!"); ------------------ | Branch (46:5): [True: 8.24k, False: 0] | Branch (46:5): [True: 8.24k, Folded] | Branch (46:5): [True: 8.24k, False: 0] ------------------ 47| 8.24k| return Desc[Opcode]; 48| 8.24k| } _ZN7llvm_ks14MCLOHContainerC2Ev: 128| 749| MCLOHContainer() : EmitSize(0) {} _ZNK7llvm_ks16MCObjectFileInfo14getTextSectionEv: 219| 749| MCSection *getTextSection() const { return TextSection; } _ZNK7llvm_ks16MCObjectFileInfo17getObjectFileTypeEv: 339| 16.8k| Environment getObjectFileType() const { return Env; } _ZNK7llvm_ks16MCObjectFileInfo15getTargetTripleEv: 352| 5.51k| const Triple &getTargetTriple() const { return TT; } _ZN7llvm_ks16MCObjectStreamer6insertEPNS_10MCFragmentE: 64| 2.71k| void insert(MCFragment *F) { 65| 2.71k| flushPendingLabels(F); 66| 2.71k| MCSection *CurSection = getCurrentSectionOnly(); 67| 2.71k| CurSection->getFragmentList().insert(CurInsertionPoint, F); 68| 2.71k| F->setParent(CurSection); 69| 2.71k| } _ZN7llvm_ks16MCObjectStreamer12getAssemblerEv: 87| 44.3k| MCAssembler &getAssembler() { return *Assembler; } _ZN7llvm_ks14MCObjectWriterC2ERNS_17raw_pwrite_streamEb: 51| 749| : OS(&OS), IsLittleEndian(IsLittleEndian) {} _ZN7llvm_ks14MCObjectWriter9getStreamEv: 65| 3.98k| raw_pwrite_stream &getStream() { return *OS; } _ZN7llvm_ks14MCObjectWriter6write8Eh: 127| 1| void write8(uint8_t Value) { *OS << char(Value); } _ZN7llvm_ks14MCObjectWriter10WriteZerosEj: 174| 515| void WriteZeros(unsigned N) { 175| 515| const char Zeros[16] = {0}; 176| | 177| 515| for (unsigned i = 0, e = N / 16; i != e; ++i) ------------------ | Branch (177:38): [True: 0, False: 515] ------------------ 178| 0| *OS << StringRef(Zeros, 16); 179| | 180| 515| *OS << StringRef(Zeros, N % 16); 181| 515| } _ZN7llvm_ks14MCObjectWriter10writeBytesERKNS_15SmallVectorImplIcEEj: 184| 245| unsigned ZeroFillSize = 0) { 185| 245| writeBytes(StringRef(ByteVec.data(), ByteVec.size()), ZeroFillSize); 186| 245| } _ZN7llvm_ks14MCObjectWriter10writeBytesENS_9StringRefEj: 188| 13.7k| void writeBytes(StringRef Str, unsigned ZeroFillSize = 0) { 189| | // TODO: this version may need to go away once all fragment contents are 190| | // converted to SmallVector 191| 13.7k| assert( ------------------ | Branch (191:5): [True: 13.7k, False: 0] | Branch (191:5): [True: 0, False: 0] | Branch (191:5): [True: 13.7k, Folded] | Branch (191:5): [True: 13.7k, False: 0] ------------------ 192| 13.7k| (ZeroFillSize == 0 || Str.size() <= ZeroFillSize) && 193| 13.7k| "data size greater than fill size, unexpected large write will occur"); 194| 13.7k| *OS << Str; 195| 13.7k| if (ZeroFillSize) ------------------ | Branch (195:9): [True: 0, False: 13.7k] ------------------ 196| 0| WriteZeros(ZeroFillSize - Str.size()); 197| 13.7k| } _ZN7llvm_ks7AsmCondC2Ev: 35| 749| AsmCond() : TheCond(NoCond), CondMet(false), Ignore(false) {} _ZNK7llvm_ks8AsmLexer6getMAIEv: 57| 285| const MCAsmInfo &getMAI() const { return MAI; } _ZN7llvm_ks8AsmTokenC2Ev: 65| 36.9k| AsmToken() {} _ZN7llvm_ks8AsmTokenC2ENS0_9TokenKindENS_9StringRefENS_5APIntE: 67| 140k| : Kind(Kind), Str(Str), IntVal(IntVal) {} _ZN7llvm_ks8AsmTokenC2ENS0_9TokenKindENS_9StringRefEl: 69| 25.2M| : Kind(Kind), Str(Str), IntVal(64, IntVal, true) {} _ZNK7llvm_ks8AsmToken7getKindEv: 71| 272k| TokenKind getKind() const { return Kind; } _ZNK7llvm_ks8AsmToken2isENS0_9TokenKindE: 72| 37.3M| bool is(TokenKind K) const { return Kind == K; } _ZNK7llvm_ks8AsmToken5isNotENS0_9TokenKindE: 73| 47.4M| bool isNot(TokenKind K) const { return Kind != K; } _ZNK7llvm_ks8AsmToken17getStringContentsERb: 80| 1.54k| StringRef getStringContents(bool &valid) const { 81| | //assert(Kind == String && "This token isn't a string!"); 82| 1.54k| if (Kind != String) { ------------------ | Branch (82:9): [True: 0, False: 1.54k] ------------------ 83| 0| valid = false; 84| 0| return nullptr; 85| 0| } 86| 1.54k| valid = true; 87| 1.54k| return Str.slice(1, Str.size() - 1); 88| 1.54k| } _ZNK7llvm_ks8AsmToken13getIdentifierEv: 94| 5.29M| StringRef getIdentifier() const { 95| 5.29M| if (Kind == Identifier) ------------------ | Branch (95:9): [True: 5.29M, False: 643] ------------------ 96| 5.29M| return getString(); 97| 643| bool valid; 98| 643| return getStringContents(valid); 99| 5.29M| } _ZNK7llvm_ks8AsmToken9getStringEv: 106| 6.14M| StringRef getString() const { return Str; } _ZNK7llvm_ks8AsmToken9getIntValERb: 111| 18.3k| int64_t getIntVal(bool &valid) const { 112| | //assert(Kind == Integer && "This token isn't an integer!"); 113| 18.3k| if (Kind != Integer) { ------------------ | Branch (113:9): [True: 0, False: 18.3k] ------------------ 114| 0| valid = false; 115| 0| return -1; 116| 0| } 117| 18.3k| valid = true; 118| 18.3k| return IntVal.getZExtValue(); 119| 18.3k| } _ZNK7llvm_ks8AsmToken11getAPIntValERb: 121| 245| APInt getAPIntVal(bool &valid) const { 122| | //assert((Kind == Integer || Kind == BigNum) && 123| | // "This token isn't an integer!"); 124| 245| if (Kind != Integer && Kind != BigNum) { ------------------ | Branch (124:9): [True: 98, False: 147] | Branch (124:28): [True: 0, False: 98] ------------------ 125| 0| valid = false; 126| | //return APInt(-1); 127| 0| } 128| 245| valid = true; 129| 245| return IntVal; 130| 245| } _ZN7llvm_ks10MCAsmLexer8SetErrorENS_5SMLocERKNSt3__112basic_stringIcNS2_11char_traitsIcEENS2_9allocatorIcEEEE: 154| 29.6k| void SetError(SMLoc errLoc, const std::string &err) { 155| 29.6k| ErrLoc = errLoc; 156| 29.6k| Err = err; 157| 29.6k| } _ZN7llvm_ks10MCAsmLexer3LexEv: 166| 25.3M| const AsmToken &Lex() { 167| 25.3M| assert(!CurTok.empty()); ------------------ | Branch (167:5): [True: 25.3M, False: 0] ------------------ 168| 25.3M| CurTok.erase(CurTok.begin()); 169| 25.3M| if (CurTok.empty()) ------------------ | Branch (169:9): [True: 25.3M, False: 0] ------------------ 170| 25.3M| CurTok.emplace_back(LexToken()); 171| 25.3M| return CurTok.front(); 172| 25.3M| } _ZNK7llvm_ks10MCAsmLexer6getTokEv: 184| 65.2M| const AsmToken &getTok() const { 185| 65.2M| return CurTok[0]; 186| 65.2M| } _ZN7llvm_ks10MCAsmLexer7peekTokEb: 189| 29.6k| const AsmToken peekTok(bool ShouldSkipSpace = true) { 190| 29.6k| AsmToken Tok; 191| | 192| 29.6k| MutableArrayRef Buf(Tok); 193| 29.6k| if (peekTokens(Buf, ShouldSkipSpace) != 1) ------------------ | Branch (193:9): [True: 0, False: 29.6k] ------------------ 194| 0| return AsmToken(AsmToken::Error, nullptr); 195| | 196| 29.6k| return Tok; 197| 29.6k| } _ZN7llvm_ks10MCAsmLexer9getErrLocEv: 204| 29.6k| SMLoc getErrLoc() { 205| 29.6k| return ErrLoc; 206| 29.6k| } _ZN7llvm_ks10MCAsmLexer6getErrEv: 209| 29.6k| const std::string &getErr() { 210| 29.6k| return Err; 211| 29.6k| } _ZNK7llvm_ks10MCAsmLexer7getKindEv: 214| 271k| AsmToken::TokenKind getKind() const { return getTok().getKind(); } _ZNK7llvm_ks10MCAsmLexer2isENS_8AsmToken9TokenKindE: 217| 11.9M| bool is(AsmToken::TokenKind K) const { return getTok().is(K); } _ZNK7llvm_ks10MCAsmLexer5isNotENS_8AsmToken9TokenKindE: 220| 47.4M| bool isNot(AsmToken::TokenKind K) const { return getTok().isNot(K); } _ZN7llvm_ks10MCAsmLexer12setSkipSpaceEb: 223| 63.4k| void setSkipSpace(bool val) { SkipSpace = val; } _ZNK7llvm_ks11MCAsmParser8getLexerEv: 93| 5.59M| const MCAsmLexer &getLexer() const { 94| 5.59M| return const_cast(this)->getLexer(); 95| 5.59M| } _ZNK7llvm_ks11MCAsmParser15getTargetParserEv: 102| 90.6k| MCTargetAsmParser &getTargetParser() const { return *TargetParser; } _ZN7llvm_ks20MCAsmParserExtension10getContextEv: 54| 26.2k| MCContext &getContext() { return getParser().getContext(); } _ZN7llvm_ks20MCAsmParserExtension8getLexerEv: 56| 115k| MCAsmLexer &getLexer() { return getParser().getLexer(); } _ZN7llvm_ks20MCAsmParserExtension9getParserEv: 61| 482k| MCAsmParser &getParser() { return *Parser; } _ZN7llvm_ks20MCAsmParserExtension11getStreamerEv: 67| 5.74k| MCStreamer &getStreamer() { return getParser().getStreamer(); } _ZN7llvm_ks20MCAsmParserExtension7WarningENS_5SMLocERKNS_5TwineE: 68| 519| bool Warning(SMLoc L, const Twine &Msg) { 69| 519| return getParser().Warning(L, Msg); 70| 519| } _ZN7llvm_ks20MCAsmParserExtension5ErrorENS_5SMLocERKNS_5TwineE: 71| 21.5k| bool Error(SMLoc L, const Twine &Msg) { 72| 21.5k| return getParser().Error(L, Msg); 73| 21.5k| } _ZN7llvm_ks20MCAsmParserExtension8TokErrorERKNS_5TwineE: 77| 21| bool TokError(const Twine &Msg) { 78| 21| return getParser().TokError(Msg); 79| 21| } _ZN7llvm_ks20MCAsmParserExtension3LexEv: 81| 12.3k| const AsmToken &Lex() { return getParser().Lex(); } _ZNK7llvm_ks20MCAsmParserExtension21HasBracketExpressionsEv: 85| 128| bool HasBracketExpressions() const { return BracketExpressionsSupported; } DarwinAsmParser.cpp:_ZN7llvm_ks20MCAsmParserExtension15HandleDirectiveIN12_GLOBAL__N_115DarwinAsmParserETnMT_FbNS_9StringRefENS_5SMLocEEXadL_ZNS3_18parseDirectiveDescES5_S6_EEEEbPS0_S5_S6_: 36| 32| SMLoc DirectiveLoc) { 37| 32| T *Obj = static_cast(Target); 38| 32| return (Obj->*Handler)(Directive, DirectiveLoc); 39| 32| } DarwinAsmParser.cpp:_ZN7llvm_ks20MCAsmParserExtension15HandleDirectiveIN12_GLOBAL__N_115DarwinAsmParserETnMT_FbNS_9StringRefENS_5SMLocEEXadL_ZNS3_18parseDirectiveLsymES5_S6_EEEEbPS0_S5_S6_: 36| 16| SMLoc DirectiveLoc) { 37| 16| T *Obj = static_cast(Target); 38| 16| return (Obj->*Handler)(Directive, DirectiveLoc); 39| 16| } DarwinAsmParser.cpp:_ZN7llvm_ks20MCAsmParserExtension15HandleDirectiveIN12_GLOBAL__N_115DarwinAsmParserETnMT_FbNS_9StringRefENS_5SMLocEEXadL_ZNS3_24parseDirectiveDumpOrLoadES5_S6_EEEEbPS0_S5_S6_: 36| 523| SMLoc DirectiveLoc) { 37| 523| T *Obj = static_cast(Target); 38| 523| return (Obj->*Handler)(Directive, DirectiveLoc); 39| 523| } DarwinAsmParser.cpp:_ZN7llvm_ks20MCAsmParserExtension15HandleDirectiveIN12_GLOBAL__N_115DarwinAsmParserETnMT_FbNS_9StringRefENS_5SMLocEEXadL_ZNS3_21parseDirectiveSectionES5_S6_EEEEbPS0_S5_S6_: 36| 5.55k| SMLoc DirectiveLoc) { 37| 5.55k| T *Obj = static_cast(Target); 38| 5.55k| return (Obj->*Handler)(Directive, DirectiveLoc); 39| 5.55k| } DarwinAsmParser.cpp:_ZN7llvm_ks20MCAsmParserExtension15HandleDirectiveIN12_GLOBAL__N_115DarwinAsmParserETnMT_FbNS_9StringRefENS_5SMLocEEXadL_ZNS3_18parseDirectiveTBSSES5_S6_EEEEbPS0_S5_S6_: 36| 1| SMLoc DirectiveLoc) { 37| 1| T *Obj = static_cast(Target); 38| 1| return (Obj->*Handler)(Directive, DirectiveLoc); 39| 1| } DarwinAsmParser.cpp:_ZN7llvm_ks20MCAsmParserExtension15HandleDirectiveIN12_GLOBAL__N_115DarwinAsmParserETnMT_FbNS_9StringRefENS_5SMLocEEXadL_ZNS3_24parseSectionDirectiveBssES5_S6_EEEEbPS0_S5_S6_: 36| 189| SMLoc DirectiveLoc) { 37| 189| T *Obj = static_cast(Target); 38| 189| return (Obj->*Handler)(Directive, DirectiveLoc); 39| 189| } DarwinAsmParser.cpp:_ZN7llvm_ks20MCAsmParserExtension15HandleDirectiveIN12_GLOBAL__N_115DarwinAsmParserETnMT_FbNS_9StringRefENS_5SMLocEEXadL_ZNS3_25parseSectionDirectiveDataES5_S6_EEEEbPS0_S5_S6_: 36| 40| SMLoc DirectiveLoc) { 37| 40| T *Obj = static_cast(Target); 38| 40| return (Obj->*Handler)(Directive, DirectiveLoc); 39| 40| } DarwinAsmParser.cpp:_ZN7llvm_ks20MCAsmParserExtension15HandleDirectiveIN12_GLOBAL__N_115DarwinAsmParserETnMT_FbNS_9StringRefENS_5SMLocEEXadL_ZNS3_26parseSectionDirectiveIdentES5_S6_EEEEbPS0_S5_S6_: 36| 130| SMLoc DirectiveLoc) { 37| 130| T *Obj = static_cast(Target); 38| 130| return (Obj->*Handler)(Directive, DirectiveLoc); 39| 130| } _ZN7llvm_ks18MCParsedAsmOperandD2Ev: 43| 18.0k| virtual ~MCParsedAsmOperand() {} _ZN7llvm_ks18MCParsedAsmOperandC2Ev: 40| 18.0k| MCParsedAsmOperand() = default; _ZN7llvm_ks20ParseInstructionInfoC2EPNS_15SmallVectorImplINS_10AsmRewriteEEE: 81| 8.58k| : AsmRewrites(rewrites) {} _ZNK7llvm_ks17MCTargetAsmParser20getAvailableFeaturesEv: 129| 13.5k| uint64_t getAvailableFeatures() const { return AvailableFeatures; } _ZN7llvm_ks17MCTargetAsmParser20setAvailableFeaturesEm: 131| 7.72k| void setAvailableFeatures(uint64_t Value) { AvailableFeatures = Value; } _ZNK7llvm_ks17MCTargetAsmParser16getTargetOptionsEv: 137| 3.97k| MCTargetOptions getTargetOptions() const { return MCOptions; } _ZN7llvm_ks17MCTargetAsmParser16ParseInstructionERNS_20ParseInstructionInfoENS_9StringRefENS_8AsmTokenERNS_15SmallVectorImplINSt3__110unique_ptrINS_18MCParsedAsmOperandENS6_14default_deleteIS8_EEEEEERj: 165| 8.58k| AsmToken Token, OperandVector &Operands, unsigned int &ErrorCode) { 166| 8.58k| return ParseInstruction(Info, Name, Token.getLoc(), Operands, ErrorCode); 167| 8.58k| } _ZN7llvm_ks17MCTargetAsmParser26validateTargetOperandClassERNS_18MCParsedAsmOperandEj: 200| 1.35k| unsigned Kind) { 201| 1.35k| return Match_InvalidOperand; 202| 1.35k| } _ZN7llvm_ks17MCTargetAsmParser20equalIsAsmAssignmentEv: 214| 3.47k| virtual bool equalIsAsmAssignment() { return true; }; _ZN7llvm_ks17MCTargetAsmParser7isLabelERNS_8AsmTokenERb: 216| 134| virtual bool isLabel(AsmToken &Token, bool &valid) { valid = true; return true; }; _ZN7llvm_ks17MCTargetAsmParser19applyModifierToExprEPKNS_6MCExprENS_15MCSymbolRefExpr11VariantKindERNS_9MCContextE: 220| 4.13k| MCContext &Ctx) { 221| 4.13k| return nullptr; 222| 4.13k| } _ZN7llvm_ks17MCTargetAsmParser13onLabelParsedEPNS_8MCSymbolE: 224| 3| virtual void onLabelParsed(MCSymbol *Symbol) { } _ZNK7llvm_ks15MCRegisterClass5getIDEv: 47| 68| unsigned getID() const { return ID; } _ZNK7llvm_ks15MCRegisterClass5beginEv: 51| 31| iterator begin() const { return RegsBegin; } _ZNK7llvm_ks15MCRegisterClass10getNumRegsEv: 56| 951| unsigned getNumRegs() const { return RegsSize; } _ZNK7llvm_ks15MCRegisterClass11getRegisterEj: 60| 951| unsigned getRegister(unsigned i) const { 61| 951| assert(i < getNumRegs() && "Register number out of range!"); ------------------ | Branch (61:5): [True: 951, False: 0] | Branch (61:5): [True: 951, Folded] | Branch (61:5): [True: 951, False: 0] ------------------ 62| 951| return RegsBegin[i]; 63| 951| } _ZNK7llvm_ks14MCRegisterInfo16DwarfLLVMRegPairltES1_: 145| 5.99k| bool operator<(DwarfLLVMRegPair RHS) const { return FromReg < RHS.FromReg; } _ZN7llvm_ks14MCRegisterInfo18InitMCRegisterInfoEPKNS_14MCRegisterDescEjjjPKNS_15MCRegisterClassEjPA2_KtjPS7_PKjPKcSE_SA_jPKNS0_17SubRegCoveredBitsESA_: 256| 749| const uint16_t *RET) { 257| 749| Desc = D; 258| 749| NumRegs = NR; 259| 749| RAReg = RA; 260| 749| PCReg = PC; 261| 749| Classes = C; 262| 749| DiffLists = DL; 263| 749| RegUnitMaskSequences = RUMS; 264| 749| RegStrings = Strings; 265| 749| RegClassStrings = ClassStrings; 266| 749| NumClasses = NC; 267| 749| RegUnitRoots = RURoots; 268| 749| NumRegUnits = NRU; 269| 749| SubRegIndices = SubIndices; 270| 749| NumSubRegIndices = NumIndices; 271| 749| SubRegIdxRanges = SubIdxRanges; 272| 749| RegEncodingTable = RET; 273| 749| } _ZN7llvm_ks14MCRegisterInfo22mapLLVMRegsToDwarfRegsEPKNS0_16DwarfLLVMRegPairEjb: 279| 1.49k| bool isEH) { 280| 1.49k| if (isEH) { ------------------ | Branch (280:9): [True: 749, False: 749] ------------------ 281| 749| EHL2DwarfRegs = Map; 282| 749| EHL2DwarfRegsSize = Size; 283| 749| } else { 284| 749| L2DwarfRegs = Map; 285| 749| L2DwarfRegsSize = Size; 286| 749| } 287| 1.49k| } _ZN7llvm_ks14MCRegisterInfo22mapDwarfRegsToLLVMRegsEPKNS0_16DwarfLLVMRegPairEjb: 293| 1.49k| bool isEH) { 294| 1.49k| if (isEH) { ------------------ | Branch (294:9): [True: 749, False: 749] ------------------ 295| 749| EHDwarf2LRegs = Map; 296| 749| EHDwarf2LRegsSize = Size; 297| 749| } else { 298| 749| Dwarf2LRegs = Map; 299| 749| Dwarf2LRegsSize = Size; 300| 749| } 301| 1.49k| } _ZNK7llvm_ks14MCRegisterInfo14regclass_beginEv: 399| 1.05k| regclass_iterator regclass_begin() const { return Classes; } _ZNK7llvm_ks14MCRegisterInfo12regclass_endEv: 400| 1.05k| regclass_iterator regclass_end() const { return Classes+NumClasses; } _ZNK7llvm_ks14MCRegisterInfo16getNumRegClassesEv: 402| 1.05k| unsigned getNumRegClasses() const { 403| 1.05k| return (unsigned)(regclass_end()-regclass_begin()); 404| 1.05k| } _ZNK7llvm_ks14MCRegisterInfo11getRegClassEj: 408| 1.05k| const MCRegisterClass& getRegClass(unsigned i) const { 409| 1.05k| assert(i < getNumRegClasses() && "Register Class ID out of range"); ------------------ | Branch (409:5): [True: 1.05k, False: 0] | Branch (409:5): [True: 1.05k, Folded] | Branch (409:5): [True: 1.05k, False: 0] ------------------ 410| 1.05k| return Classes[i]; 411| 1.05k| } _ZNK7llvm_ks14MCRegisterInfo16getEncodingValueEj: 418| 16.1k| uint16_t getEncodingValue(unsigned RegNo) const { 419| 16.1k| assert(RegNo < NumRegs && ------------------ | Branch (419:5): [True: 16.1k, False: 0] | Branch (419:5): [True: 16.1k, Folded] | Branch (419:5): [True: 16.1k, False: 0] ------------------ 420| 16.1k| "Attempting to get encoding for invalid register number!"); 421| 16.1k| return RegEncodingTable[RegNo]; 422| 16.1k| } _ZN7llvm_ks17ilist_node_traitsINS_10MCFragmentEE13addNodeToListEPS1_: 40| 3.05k| void addNodeToList(MCFragment *) {} _ZN7llvm_ks17ilist_node_traitsINS_10MCFragmentEE18removeNodeFromListEPS1_: 41| 3.05k| void removeNodeFromList(MCFragment *) {} _ZNK7llvm_ks9MCSection10getVariantEv: 113| 2.63k| SectionVariant getVariant() const { return Variant; } _ZN7llvm_ks9MCSection14getBeginSymbolEv: 115| 9.73k| MCSymbol *getBeginSymbol() { return Begin; } _ZNK7llvm_ks9MCSection14getBeginSymbolEv: 116| 398| const MCSymbol *getBeginSymbol() const { 117| 398| return const_cast(this)->getBeginSymbol(); 118| 398| } _ZN7llvm_ks9MCSection14setBeginSymbolEPNS_8MCSymbolE: 119| 879| void setBeginSymbol(MCSymbol *Sym) { 120| 879| assert(!Begin); ------------------ | Branch (120:5): [True: 879, False: 0] ------------------ 121| 879| Begin = Sym; 122| 879| } _ZNK7llvm_ks9MCSection12getAlignmentEv: 126| 602| unsigned getAlignment() const { return Alignment; } _ZN7llvm_ks9MCSection12setAlignmentEj: 127| 4| void setAlignment(unsigned Value) { Alignment = Value; } _ZN7llvm_ks9MCSection10setOrdinalEj: 130| 316| void setOrdinal(unsigned Value) { Ordinal = Value; } _ZN7llvm_ks9MCSection14setLayoutOrderEj: 133| 316| void setLayoutOrder(unsigned Value) { LayoutOrder = Value; } _ZNK7llvm_ks9MCSection14isBundleLockedEv: 137| 7.38k| bool isBundleLocked() const { return BundleLockState != NotBundleLocked; } _ZN7llvm_ks9MCSection18setHasInstructionsEb: 147| 8.24k| void setHasInstructions(bool Value) { HasInstructions = Value; } _ZNK7llvm_ks9MCSection12isRegisteredEv: 149| 4.66k| bool isRegistered() const { return IsRegistered; } _ZN7llvm_ks9MCSection15setIsRegisteredEb: 150| 879| void setIsRegistered(bool Value) { IsRegistered = Value; } _ZN7llvm_ks9MCSection15getFragmentListEv: 152| 261k| MCSection::FragmentListType &getFragmentList() { return Fragments; } _ZN7llvm_ks9MCSection16getSublistAccessEPNS_10MCFragmentE: 158| 1.64k| static FragmentListType MCSection::*getSublistAccess(MCFragment *) { 159| 1.64k| return &MCSection::Fragments; 160| 1.64k| } _ZN7llvm_ks9MCSection16getDummyFragmentEv: 163| 8.48k| MCDummyFragment &getDummyFragment() { return DummyFragment; } _ZNK7llvm_ks9MCSection5beginEv: 166| 264| MCSection::const_iterator begin() const { 167| 264| return const_cast(this)->begin(); 168| 264| } _ZNK7llvm_ks9MCSection3endEv: 171| 264| MCSection::const_iterator end() const { 172| 264| return const_cast(this)->end(); 173| 264| } _ZNK7llvm_ks12MCSectionELF14getSectionNameEv: 74| 1.66k| StringRef getSectionName() const { return SectionName; } _ZNK7llvm_ks12MCSectionELF8getGroupEv: 78| 4.93k| const MCSymbolELF *getGroup() const { return Group; } _ZN7llvm_ks12MCSectionELFC2ENS_9StringRefEjjNS_11SectionKindEjPKNS_11MCSymbolELFEjPNS_8MCSymbolEPKS0_: 58| 32.4k| : MCSection(SV_ELF, K, Begin), SectionName(Section), Type(type), 59| 32.4k| Flags(flags), UniqueID(UniqueID), EntrySize(entrySize), Group(group), 60| 32.4k| Associated(Associated) { 61| 32.4k| if (Group) ------------------ | Branch (61:9): [True: 0, False: 32.4k] ------------------ 62| 0| Group->setIsSignature(); 63| 32.4k| } _ZNK7llvm_ks12MCSectionELF7getTypeEv: 75| 886| unsigned getType() const { return Type; } _ZNK7llvm_ks12MCSectionELF8getFlagsEv: 76| 9.19k| unsigned getFlags() const { return Flags; } _ZN7llvm_ks12MCSectionELF7classofEPKNS_9MCSectionE: 90| 2.63k| static bool classof(const MCSection *S) { 91| 2.63k| return S->getVariant() == SV_ELF; 92| 2.63k| } _ZNK7llvm_ks14MCSectionMachO7getTypeEv: 58| 30| MachO::SectionType getType() const { 59| 30| return static_cast(TypeAndAttributes & 60| 30| MachO::SECTION_TYPE); 61| 30| } _ZNK7llvm_ks14MCSectionMachO12hasAttributeEj: 62| 32| bool hasAttribute(unsigned Value) const { 63| 32| return (TypeAndAttributes & Value) != 0; 64| 32| } _ZNK7llvm_ks10MCStreamer14setSymResolverEPv: 201| 749| void setSymResolver(void *h) const { KsSymResolver = h; } _ZNK7llvm_ks10MCStreamer14getSymResolverEv: 202| 312| void *getSymResolver() const { return KsSymResolver; } _ZNK7llvm_ks10MCStreamer10getContextEv: 215| 5.42k| MCContext &getContext() const { return Context; } _ZN7llvm_ks10MCStreamer17getTargetStreamerEv: 217| 9.58k| MCTargetStreamer *getTargetStreamer() { 218| 9.58k| return TargetStreamer.get(); 219| 9.58k| } _ZN7llvm_ks10MCStreamer19getNumWinFrameInfosEv: 226| 749| unsigned getNumWinFrameInfos() { return WinFrameInfos.size(); } _ZN7llvm_ks10MCStreamer12AddBlankLineEv: 275| 44.4k| virtual void AddBlankLine() {} _ZNK7llvm_ks10MCStreamer17getCurrentSectionEv: 283| 566k| MCSectionSubPair getCurrentSection() const { 284| 566k| if (!SectionStack.empty()) ------------------ | Branch (284:9): [True: 566k, False: 0] ------------------ 285| 566k| return SectionStack.back().first; 286| 0| return MCSectionSubPair(); 287| 566k| } _ZNK7llvm_ks10MCStreamer21getCurrentSectionOnlyEv: 288| 556k| MCSection *getCurrentSectionOnly() const { return getCurrentSection().first; } _ZNK7llvm_ks15MCSubtargetInfo15getTargetTripleEv: 54| 1.49k| const Triple &getTargetTriple() const { return TargetTriple; } _ZNK7llvm_ks15MCSubtargetInfo6getCPUEv: 57| 749| StringRef getCPU() const { 58| 749| return CPU; 59| 749| } _ZNK7llvm_ks15MCSubtargetInfo14getFeatureBitsEv: 63| 41.4k| const FeatureBitset& getFeatureBits() const { 64| 41.4k| return FeatureBits; 65| 41.4k| } _ZN7llvm_ks15MCSubtargetInfo14setFeatureBitsERKNS_13FeatureBitsetE: 69| 46| void setFeatureBits(const FeatureBitset &FeatureBits_) { 70| 46| FeatureBits = FeatureBits_; 71| 46| } _ZN7llvm_ks15MCSubtargetInfoC2ERKS0_: 47| 6.97k| MCSubtargetInfo(const MCSubtargetInfo &) = default; _ZN7llvm_ks8MCSymbolC2ENS0_10SymbolKindEPKNS_14StringMapEntryIbEEb: 150| 17.7k| : IsTemporary(isTemporary), IsRedefinable(false), IsUsed(false), 151| 17.7k| IsRegistered(false), IsExternal(false), IsPrivateExtern(false), 152| 17.7k| Kind(Kind), IsUsedInReloc(false), SymbolContents(SymContentsUnset), 153| 17.7k| CommonAlignLog2(0), Flags(0) { 154| 17.7k| Offset = 0; 155| 17.7k| FragmentAndHasName.setInt(!!Name); 156| 17.7k| if (Name) ------------------ | Branch (156:9): [True: 17.7k, False: 0] ------------------ 157| 17.7k| getNameEntryPtr() = Name; 158| 17.7k| } _ZNK7llvm_ks8MCSymbol13getSectionPtrEb: 179| 2.58k| MCSection *getSectionPtr(bool SetUsed = true) const { 180| 2.58k| if (MCFragment *F = getFragment(SetUsed)) { ------------------ | Branch (180:21): [True: 2.58k, False: 0] ------------------ 181| 2.58k| assert(F != AbsolutePseudoFragment); ------------------ | Branch (181:7): [True: 2.58k, False: 0] ------------------ 182| 2.58k| return F->getParent(); 183| 2.58k| } 184| 0| return nullptr; 185| 2.58k| } _ZN7llvm_ks8MCSymbol15getNameEntryPtrEv: 188| 18.9k| const StringMapEntry *&getNameEntryPtr() { 189| 18.9k| assert(FragmentAndHasName.getInt() && "Name is required"); ------------------ | Branch (189:5): [True: 18.9k, False: 0] | Branch (189:5): [True: 18.9k, Folded] | Branch (189:5): [True: 18.9k, False: 0] ------------------ 190| 18.9k| NameEntryStorageTy *Name = reinterpret_cast(this); 191| 18.9k| return (*(Name - 1)).NameEntry; 192| 18.9k| } _ZNK7llvm_ks8MCSymbol15getNameEntryPtrEv: 193| 1.22k| const StringMapEntry *&getNameEntryPtr() const { 194| 1.22k| return const_cast(this)->getNameEntryPtr(); 195| 1.22k| } _ZNK7llvm_ks8MCSymbol7getNameEv: 199| 1.22k| StringRef getName() const { 200| 1.22k| if (!FragmentAndHasName.getInt()) ------------------ | Branch (200:9): [True: 0, False: 1.22k] ------------------ 201| 0| return StringRef(); 202| | 203| 1.22k| return getNameEntryPtr()->first(); 204| 1.22k| } _ZNK7llvm_ks8MCSymbol12isRegisteredEv: 206| 27.2k| bool isRegistered() const { return IsRegistered; } _ZNK7llvm_ks8MCSymbol15setIsRegisteredEb: 207| 9.73k| void setIsRegistered(bool Value) const { IsRegistered = Value; } _ZNK7llvm_ks8MCSymbol14setUsedInRelocEv: 209| 398| void setUsedInReloc() const { IsUsedInReloc = true; } _ZNK7llvm_ks8MCSymbol13isUsedInRelocEv: 210| 138| bool isUsedInReloc() const { return IsUsedInReloc; } _ZNK7llvm_ks8MCSymbol6isUsedEv: 219| 1.07k| bool isUsed() const { return IsUsed; } _ZN7llvm_ks8MCSymbol14setRedefinableEb: 225| 793| void setRedefinable(bool Value) { IsRedefinable = Value; } _ZN7llvm_ks8MCSymbol18redefineIfPossibleEv: 227| 3| void redefineIfPossible() { 228| 3| if (IsRedefinable) { ------------------ | Branch (228:9): [True: 0, False: 3] ------------------ 229| 0| if (SymbolContents == SymContentsVariable) { ------------------ | Branch (229:11): [True: 0, False: 0] ------------------ 230| 0| Value = nullptr; 231| 0| SymbolContents = SymContentsUnset; 232| 0| } 233| 0| setUndefined(); 234| 0| IsRedefinable = false; 235| 0| } 236| 3| } _ZNK7llvm_ks8MCSymbol9isDefinedEb: 245| 40.0k| bool isDefined(bool SetUsed = true) const { 246| 40.0k| return getFragment(SetUsed) != nullptr; 247| 40.0k| } _ZNK7llvm_ks8MCSymbol11isInSectionEb: 251| 9.84k| bool isInSection(bool SetUsed = true) const { 252| 9.84k| return isDefined(SetUsed) && !isAbsolute(SetUsed); ------------------ | Branch (252:12): [True: 8.71k, False: 1.13k] | Branch (252:34): [True: 8.62k, False: 86] ------------------ 253| 9.84k| } _ZNK7llvm_ks8MCSymbol11isUndefinedEb: 256| 27.4k| bool isUndefined(bool SetUsed = true) const { return !isDefined(SetUsed); } _ZNK7llvm_ks8MCSymbol10isAbsoluteEb: 259| 8.71k| bool isAbsolute(bool SetUsed = true) const { 260| 8.71k| return getFragment(SetUsed) == AbsolutePseudoFragment; 261| 8.71k| } _ZNK7llvm_ks8MCSymbol10getSectionEb: 264| 2.58k| MCSection &getSection(bool SetUsed = true) const { 265| 2.58k| assert(isInSection(SetUsed) && "Invalid accessor!"); ------------------ | Branch (265:5): [True: 2.58k, False: 0] | Branch (265:5): [True: 2.58k, Folded] | Branch (265:5): [True: 2.58k, False: 0] ------------------ 266| 2.58k| return *getSectionPtr(SetUsed); 267| 2.58k| } _ZNK7llvm_ks8MCSymbol11setFragmentEPNS_10MCFragmentE: 270| 16.5k| void setFragment(MCFragment *F) const { 271| 16.5k| assert(!isVariable() && "Cannot set fragment of variable"); ------------------ | Branch (271:5): [True: 16.5k, False: 0] | Branch (271:5): [True: 16.5k, Folded] | Branch (271:5): [True: 16.5k, False: 0] ------------------ 272| 16.5k| FragmentAndHasName.setPointer(F); 273| 16.5k| } _ZN7llvm_ks8MCSymbol12setUndefinedEv: 276| 814| void setUndefined() { FragmentAndHasName.setPointer(nullptr); } _ZNK7llvm_ks8MCSymbol5isELFEv: 278| 30.4k| bool isELF() const { return Kind == SymbolKindELF; } _ZNK7llvm_ks8MCSymbol10isVariableEv: 289| 120k| bool isVariable() const { 290| 120k| return SymbolContents == SymContentsVariable; 291| 120k| } _ZNK7llvm_ks8MCSymbol16getVariableValueEb: 294| 4.80k| const MCExpr *getVariableValue(bool SetUsed = true) const { 295| 4.80k| assert(isVariable() && "Invalid accessor!"); ------------------ | Branch (295:5): [True: 4.80k, False: 0] | Branch (295:5): [True: 4.80k, Folded] | Branch (295:5): [True: 4.80k, False: 0] ------------------ 296| 4.80k| IsUsed |= SetUsed; 297| 4.80k| return Value; 298| 4.80k| } _ZNK7llvm_ks8MCSymbol9getOffsetEv: 314| 5.20k| uint64_t getOffset() const { 315| 5.20k| assert((SymbolContents == SymContentsUnset || ------------------ | Branch (315:5): [True: 20, False: 5.18k] | Branch (315:5): [True: 5.18k, False: 0] | Branch (315:5): [True: 5.20k, Folded] | Branch (315:5): [True: 5.20k, False: 0] ------------------ 316| 5.20k| SymbolContents == SymContentsOffset) && 317| 5.20k| "Cannot get offset for a common/variable symbol"); 318| 5.20k| return Offset; 319| 5.20k| } _ZN7llvm_ks8MCSymbol9setOffsetEm: 320| 8.03k| void setOffset(uint64_t Value) { 321| 8.03k| assert((SymbolContents == SymContentsUnset || ------------------ | Branch (321:5): [True: 8.03k, False: 0] | Branch (321:5): [True: 0, False: 0] | Branch (321:5): [True: 8.03k, Folded] | Branch (321:5): [True: 8.03k, False: 0] ------------------ 322| 8.03k| SymbolContents == SymContentsOffset) && 323| 8.03k| "Cannot set offset for a common/variable symbol"); 324| 8.03k| Offset = Value; 325| 8.03k| SymbolContents = SymContentsOffset; 326| 8.03k| } _ZN7llvm_ks8MCSymbol9setCommonEmj: 338| 10| void setCommon(uint64_t Size, unsigned Align) { 339| 10| assert(getOffset() == 0); ------------------ | Branch (339:5): [True: 10, False: 0] ------------------ 340| 10| CommonSize = Size; 341| 10| SymbolContents = SymContentsCommon; 342| | 343| 10| assert((!Align || isPowerOf2_32(Align)) && ------------------ | Branch (343:5): [True: 0, False: 10] | Branch (343:5): [True: 10, False: 0] | Branch (343:5): [True: 10, Folded] | Branch (343:5): [True: 10, False: 0] ------------------ 344| 10| "Alignment must be a power of 2"); 345| 10| unsigned Log2Align = Log2_32(Align) + 1; 346| 10| assert(Log2Align < (1U << NumCommonAlignmentBits) && ------------------ | Branch (346:5): [True: 10, False: 0] | Branch (346:5): [True: 10, Folded] | Branch (346:5): [True: 10, False: 0] ------------------ 347| 10| "Out of range alignment"); 348| 10| CommonAlignLog2 = Log2Align; 349| 10| } _ZNK7llvm_ks8MCSymbol18getCommonAlignmentEv: 352| 1| unsigned getCommonAlignment() const { 353| 1| assert(isCommon() && "Not a 'common' symbol!"); ------------------ | Branch (353:5): [True: 1, False: 0] | Branch (353:5): [True: 1, Folded] | Branch (353:5): [True: 1, False: 0] ------------------ 354| 1| return CommonAlignLog2 ? (1U << (CommonAlignLog2 - 1)) : 0; ------------------ | Branch (354:12): [True: 1, False: 0] ------------------ 355| 1| } _ZN7llvm_ks8MCSymbol13declareCommonEmj: 362| 11| bool declareCommon(uint64_t Size, unsigned Align) { 363| 11| assert(isCommon() || getOffset() == 0); ------------------ | Branch (363:5): [True: 1, False: 10] | Branch (363:5): [True: 10, False: 0] | Branch (363:5): [True: 11, False: 0] ------------------ 364| 11| if(isCommon()) { ------------------ | Branch (364:8): [True: 1, False: 10] ------------------ 365| 1| if(CommonSize != Size || getCommonAlignment() != Align) ------------------ | Branch (365:10): [True: 0, False: 1] | Branch (365:32): [True: 0, False: 1] ------------------ 366| 0| return true; 367| 1| } else 368| 10| setCommon(Size, Align); 369| 11| return false; 370| 11| } _ZNK7llvm_ks8MCSymbol8isCommonEv: 373| 23| bool isCommon() const { 374| 23| return SymbolContents == SymContentsCommon; 375| 23| } _ZNK7llvm_ks8MCSymbol11getFragmentEb: 377| 79.5k| MCFragment *getFragment(bool SetUsed = true) const { 378| 79.5k| MCFragment *Fragment = FragmentAndHasName.getPointer(); 379| 79.5k| if (Fragment || !isVariable()) ------------------ | Branch (379:9): [True: 52.2k, False: 27.3k] | Branch (379:21): [True: 26.3k, False: 1.00k] ------------------ 380| 78.5k| return Fragment; 381| 1.00k| Fragment = getVariableValue(SetUsed)->findAssociatedFragment(); 382| 1.00k| FragmentAndHasName.setPointer(Fragment); 383| 1.00k| return Fragment; 384| 79.5k| } _ZNK7llvm_ks8MCSymbol10isExternalEv: 386| 144| bool isExternal() const { return IsExternal; } _ZNK7llvm_ks8MCSymbol11setExternalEb: 387| 154| void setExternal(bool Value) const { IsExternal = Value; } _ZNK7llvm_ks8MCSymbol8getFlagsEv: 400| 4.52k| uint32_t getFlags() const { return Flags; } _ZNK7llvm_ks8MCSymbol8setFlagsEj: 403| 3.27k| void setFlags(uint32_t Value) const { 404| 3.27k| assert(Value < (1U << NumFlagsBits) && "Out of range flags"); ------------------ | Branch (404:5): [True: 3.27k, False: 0] | Branch (404:5): [True: 3.27k, Folded] | Branch (404:5): [True: 3.27k, False: 0] ------------------ 405| 3.27k| Flags = Value; 406| 3.27k| } _ZN7llvm_ks11MCSymbolELFC2EPKNS_14StringMapEntryIbEEb: 22| 17.7k| : MCSymbol(SymbolKindELF, Name, isTemporary) {} _ZN7llvm_ks11MCSymbolELF7classofEPKNS_8MCSymbolE: 47| 30.4k| static bool classof(const MCSymbol *S) { return S->isELF(); } _ZN7llvm_ks11MCSymbolELF7setSizeEPKNS_6MCExprE: 23| 11| void setSize(const MCExpr *SS) { SymbolSize = SS; } ks.cpp:_ZL28InitMCTargetOptionsFromFlagsv: 34| 749|static inline MCTargetOptions InitMCTargetOptionsFromFlags() { 35| 749| MCTargetOptions Options; 36| 749| Options.MCRelaxAll = RelaxAll; 37| 749| Options.DwarfVersion = DwarfVersion; 38| 749| Options.ABIName = ABIName; 39| 749| Options.MCFatalWarnings = FatalWarnings; 40| 749| Options.MCNoWarn = NoWarn; 41| 749| return Options; 42| 749|} _ZNK7llvm_ks7MCValue11getConstantEv: 46| 74.1k| int64_t getConstant() const { return Cst; } _ZNK7llvm_ks7MCValue7getSymAEv: 47| 45.5k| const MCSymbolRefExpr *getSymA() const { return SymA; } _ZNK7llvm_ks7MCValue7getSymBEv: 48| 44.2k| const MCSymbolRefExpr *getSymB() const { return SymB; } _ZNK7llvm_ks7MCValue10isAbsoluteEv: 52| 55.7k| bool isAbsolute() const { return !SymA && !SymB; } ------------------ | Branch (52:36): [True: 21.6k, False: 34.1k] | Branch (52:45): [True: 20.6k, False: 1.01k] ------------------ _ZN7llvm_ks7MCValue3getEPKNS_15MCSymbolRefExprES3_lj: 64| 48.1k| int64_t Val = 0, uint32_t RefKind = 0) { 65| 48.1k| MCValue R; 66| 48.1k| R.Cst = Val; 67| 48.1k| R.SymA = SymA; 68| 48.1k| R.SymB = SymB; 69| 48.1k| R.RefKind = RefKind; 70| 48.1k| return R; 71| 48.1k| } _ZN7llvm_ks7MCValue3getEl: 73| 26.9k| static MCValue get(int64_t Val) { 74| 26.9k| MCValue R; 75| 26.9k| R.Cst = Val; 76| 26.9k| R.SymA = nullptr; 77| 26.9k| R.SymB = nullptr; 78| 26.9k| R.RefKind = 0; 79| 26.9k| return R; 80| 26.9k| } _ZN7llvm_ks11SectionKind3getENS0_4KindE: 161| 38.2k| static SectionKind get(Kind K) { 162| 38.2k| SectionKind Res; 163| 38.2k| Res.K = K; 164| 38.2k| return Res; 165| 38.2k| } _ZN7llvm_ks11SectionKind7getTextEv: 169| 749| static SectionKind getText() { return get(Text); } _ZN7llvm_ks11SectionKind11getReadOnlyEv: 170| 31.7k| static SectionKind getReadOnly() { return get(ReadOnly); } _ZN7llvm_ks11SectionKind7getDataEv: 189| 5.74k| static SectionKind getData() { return get(Data); } _ZNK7llvm_ks18StringTableBuilder11isFinalizedEv: 64| 517| bool isFinalized() const { 65| 517| return !StringTable.empty(); 66| 517| } _ZN7llvm_ks13FeatureBitsetC2Ev: 37| 4.90k| FeatureBitset() : bitset() {} _ZN7llvm_ks13FeatureBitsetC2ESt16initializer_listIjE: 41| 1.44k| FeatureBitset(std::initializer_list Init) : bitset() { 42| 1.44k| for (auto I : Init) ------------------ | Branch (42:17): [True: 3.58k, False: 1.44k] ------------------ 43| 3.58k| set(I); 44| 1.44k| } _ZNK7llvm_ks18SubtargetFeatureKVltENS_9StringRefE: 59| 44.8k| bool operator<(StringRef S) const { 60| 44.8k| return StringRef(Key) < S; 61| 44.8k| } _ZNK7llvm_ks18SubtargetFeatureKVltERKS0_: 64| 40.4k| bool operator<(const SubtargetFeatureKV &Other) const { 65| 40.4k| return StringRef(Key) < StringRef(Other.Key); 66| 40.4k| } _ZN7llvm_ks7alignOfINS_12MCSectionELFEEEjv: 106| 5.99k|inline unsigned alignOf() { return AlignOf::Alignment; } _ZN7llvm_ks7alignOfINS_14MCSectionMachOEEEjv: 106| 272|inline unsigned alignOf() { return AlignOf::Alignment; } _ZN7llvm_ks7alignOfINS_15MCSubtargetInfoEEEjv: 106| 710|inline unsigned alignOf() { return AlignOf::Alignment; } _ZN7llvm_ks7alignOfINS_14StringMapEntryIPNS_8MCSymbolEEEEEjv: 106| 2.59k|inline unsigned alignOf() { return AlignOf::Alignment; } _ZN7llvm_ks7alignOfINS_14StringMapEntryIbEEEEjv: 106| 17.6k|inline unsigned alignOf() { return AlignOf::Alignment; } _ZN7llvm_ks7alignOfINS_14StringMapEntryIjEEEEjv: 106| 9.40k|inline unsigned alignOf() { return AlignOf::Alignment; } _ZN7llvm_ks7alignOfINS_14StringMapEntryIPNS_14MCSectionMachOEEEEEjv: 106| 130|inline unsigned alignOf() { return AlignOf::Alignment; } _ZN7llvm_ks7alignOfINS_14StringMapEntryINSt3__14pairIPNS_20MCAsmParserExtensionEPFbS5_NS_9StringRefENS_5SMLocEEEEEEEEjv: 106| 49.4k|inline unsigned alignOf() { return AlignOf::Alignment; } AsmParser.cpp:_ZN7llvm_ks7alignOfINS_14StringMapEntryIN12_GLOBAL__N_19AsmParser13DirectiveKindEEEEEjv: 106| 92.1k|inline unsigned alignOf() { return AlignOf::Alignment; } AsmParser.cpp:_ZN7llvm_ks7alignOfINS_14StringMapEntryIN12_GLOBAL__N_110MCAsmMacroEEEEEjv: 106| 54|inline unsigned alignOf() { return AlignOf::Alignment; } _ZN7llvm_ks7alignOfINS_8MCSymbol18NameEntryStorageTyEEEjv: 106| 17.7k|inline unsigned alignOf() { return AlignOf::Alignment; } _ZN7llvm_ks15MallocAllocator8AllocateEmm: 94| 154k| size_t /*Alignment*/) { 95| 154k| return malloc(Size); 96| 154k| } _ZN7llvm_ks15MallocAllocator10DeallocateEPKvm: 101| 154k| void Deallocate(const void *Ptr, size_t /*Size*/) { 102| 154k| free(const_cast(Ptr)); 103| 154k| } _ZN7llvm_ks20BumpPtrAllocatorImplINS_15MallocAllocatorELm4096ELm4096EE8AllocateEmm: 209| 163k| Allocate(size_t Size, size_t Alignment) { 210| 163k| assert(Alignment > 0 && "0-byte alignnment is not allowed. Use 1 instead."); ------------------ | Branch (210:5): [True: 163k, False: 0] | Branch (210:5): [True: 163k, Folded] | Branch (210:5): [True: 163k, False: 0] ------------------ 211| | 212| | // Keep track of how many bytes we've allocated. 213| 163k| BytesAllocated += Size; 214| | 215| 163k| size_t Adjustment = alignmentAdjustment(CurPtr, Alignment); 216| 163k| assert(Adjustment + Size >= Size && "Adjustment + Size must not overflow"); ------------------ | Branch (216:5): [True: 163k, False: 0] | Branch (216:5): [True: 163k, Folded] | Branch (216:5): [True: 163k, False: 0] ------------------ 217| | 218| | // Check if we have enough space. 219| 163k| if (Adjustment + Size <= size_t(End - CurPtr)) { ------------------ | Branch (219:9): [True: 159k, False: 3.82k] ------------------ 220| 159k| char *AlignedPtr = CurPtr + Adjustment; 221| 159k| CurPtr = AlignedPtr + Size; 222| | // Update the allocation point of this memory block in MemorySanitizer. 223| | // Without this, MemorySanitizer messages for values originated from here 224| | // will point to the allocation of the entire slab. 225| 159k| __msan_allocated_memory(AlignedPtr, Size); 226| | // Similarly, tell ASan about this space. 227| 159k| __asan_unpoison_memory_region(AlignedPtr, Size); 228| 159k| return AlignedPtr; 229| 159k| } 230| | 231| | // If Size is really big, allocate a separate slab for it. 232| 3.82k| size_t PaddedSize = Size + Alignment - 1; 233| 3.82k| if (PaddedSize > SizeThreshold) { ------------------ | Branch (233:9): [True: 9, False: 3.81k] ------------------ 234| 9| void *NewSlab = Allocator.Allocate(PaddedSize, 0); 235| | // We own the new slab and don't want anyone reading anyting other than 236| | // pieces returned from this method. So poison the whole slab. 237| 9| __asan_poison_memory_region(NewSlab, PaddedSize); 238| 9| CustomSizedSlabs.push_back(std::make_pair(NewSlab, PaddedSize)); 239| | 240| 9| uintptr_t AlignedAddr = alignAddr(NewSlab, Alignment); 241| 9| assert(AlignedAddr + Size <= (uintptr_t)NewSlab + PaddedSize); ------------------ | Branch (241:7): [True: 9, False: 0] ------------------ 242| 9| char *AlignedPtr = (char*)AlignedAddr; 243| 9| __msan_allocated_memory(AlignedPtr, Size); 244| 9| __asan_unpoison_memory_region(AlignedPtr, Size); 245| 9| return AlignedPtr; 246| 9| } 247| | 248| | // Otherwise, start a new slab and try again. 249| 3.81k| StartNewSlab(); 250| 3.81k| uintptr_t AlignedAddr = alignAddr(CurPtr, Alignment); 251| 3.81k| assert(AlignedAddr + Size <= (uintptr_t)End && ------------------ | Branch (251:5): [True: 3.81k, False: 0] | Branch (251:5): [True: 3.81k, Folded] | Branch (251:5): [True: 3.81k, False: 0] ------------------ 252| 3.81k| "Unable to allocate memory!"); 253| 3.81k| char *AlignedPtr = (char*)AlignedAddr; 254| 3.81k| CurPtr = AlignedPtr + Size; 255| 3.81k| __msan_allocated_memory(AlignedPtr, Size); 256| 3.81k| __asan_unpoison_memory_region(AlignedPtr, Size); 257| 3.81k| return AlignedPtr; 258| 3.81k| } _ZN7llvm_ks20BumpPtrAllocatorImplINS_15MallocAllocatorELm4096ELm4096EE12StartNewSlabEv: 319| 3.81k| void StartNewSlab() { 320| 3.81k| size_t AllocatedSlabSize = computeSlabSize(Slabs.size()); 321| | 322| 3.81k| void *NewSlab = Allocator.Allocate(AllocatedSlabSize, 0); 323| | // We own the new slab and don't want anyone reading anything other than 324| | // pieces returned from this method. So poison the whole slab. 325| 3.81k| __asan_poison_memory_region(NewSlab, AllocatedSlabSize); 326| | 327| 3.81k| Slabs.push_back(NewSlab); 328| 3.81k| CurPtr = (char *)(NewSlab); 329| 3.81k| End = ((char *)NewSlab) + AllocatedSlabSize; 330| 3.81k| } _ZN7llvm_ks20BumpPtrAllocatorImplINS_15MallocAllocatorELm4096ELm4096EE15computeSlabSizeEj: 309| 11.1k| static size_t computeSlabSize(unsigned SlabIdx) { 310| | // Scale the actual allocated slab size based on the number of slabs 311| | // allocated. Every 128 slabs allocated, we double the allocated size to 312| | // reduce allocation frequency, but saturate at multiplying the slab size by 313| | // 2^30. 314| 11.1k| return SlabSize * ((size_t)1 << std::min(30, SlabIdx / 128)); 315| 11.1k| } _ZN7llvm_ks20BumpPtrAllocatorImplINS_15MallocAllocatorELm4096ELm4096EEC2Ev: 145| 4.49k| : CurPtr(nullptr), End(nullptr), BytesAllocated(0), Allocator() {} _ZN7llvm_ks24SpecificBumpPtrAllocatorINS_13MCSectionCOFFEEC2Ev: 367| 749| SpecificBumpPtrAllocator() : Allocator() {} _ZN7llvm_ks24SpecificBumpPtrAllocatorINS_12MCSectionELFEEC2Ev: 367| 749| SpecificBumpPtrAllocator() : Allocator() {} _ZN7llvm_ks24SpecificBumpPtrAllocatorINS_14MCSectionMachOEEC2Ev: 367| 749| SpecificBumpPtrAllocator() : Allocator() {} _ZN7llvm_ks24SpecificBumpPtrAllocatorINS_15MCSubtargetInfoEEC2Ev: 367| 749| SpecificBumpPtrAllocator() : Allocator() {} _ZN7llvm_ks20BumpPtrAllocatorImplINS_15MallocAllocatorELm4096ELm4096EED2Ev: 164| 4.49k| ~BumpPtrAllocatorImpl() { 165| 4.49k| DeallocateSlabs(Slabs.begin(), Slabs.end()); 166| 4.49k| DeallocateCustomSizedSlabs(); 167| 4.49k| } _ZN7llvm_ks20BumpPtrAllocatorImplINS_15MallocAllocatorELm4096ELm4096EE15DeallocateSlabsEPPvS4_: 334| 7.01k| SmallVectorImpl::iterator E) { 335| 10.8k| for (; I != E; ++I) { ------------------ | Branch (335:12): [True: 3.81k, False: 7.01k] ------------------ 336| 3.81k| size_t AllocatedSlabSize = 337| 3.81k| computeSlabSize(std::distance(Slabs.begin(), I)); 338| 3.81k| Allocator.Deallocate(*I, AllocatedSlabSize); 339| 3.81k| } 340| 7.01k| } _ZN7llvm_ks20BumpPtrAllocatorImplINS_15MallocAllocatorELm4096ELm4096EE26DeallocateCustomSizedSlabsEv: 343| 11.2k| void DeallocateCustomSizedSlabs() { 344| 11.2k| for (auto &PtrAndSize : CustomSizedSlabs) { ------------------ | Branch (344:27): [True: 9, False: 11.2k] ------------------ 345| 9| void *Ptr = PtrAndSize.first; 346| 9| size_t Size = PtrAndSize.second; 347| 9| Allocator.Deallocate(Ptr, Size); 348| 9| } 349| 11.2k| } _ZN7llvm_ks24SpecificBumpPtrAllocatorINS_13MCSectionCOFFEED2Ev: 370| 749| ~SpecificBumpPtrAllocator() { DestroyAll(); } _ZN7llvm_ks24SpecificBumpPtrAllocatorINS_12MCSectionELFEED2Ev: 370| 749| ~SpecificBumpPtrAllocator() { DestroyAll(); } _ZN7llvm_ks24SpecificBumpPtrAllocatorINS_14MCSectionMachOEED2Ev: 370| 749| ~SpecificBumpPtrAllocator() { DestroyAll(); } _ZN7llvm_ks20BumpPtrAllocatorImplINS_15MallocAllocatorELm4096ELm4096EE10DeallocateEPKvm: 263| 20.2k| void Deallocate(const void *Ptr, size_t Size) { 264| 20.2k| __asan_poison_memory_region(Ptr, Size); 265| 20.2k| } _ZN7llvm_ks24SpecificBumpPtrAllocatorINS_15MCSubtargetInfoEED2Ev: 370| 749| ~SpecificBumpPtrAllocator() { DestroyAll(); } _ZN7llvm_ks24SpecificBumpPtrAllocatorINS_13MCSectionCOFFEE10DestroyAllEv: 380| 1.49k| void DestroyAll() { 381| 1.49k| auto DestroyElements = [](char *Begin, char *End) { 382| 1.49k| assert(Begin == (char*)alignAddr(Begin, alignOf())); 383| 1.49k| for (char *Ptr = Begin; Ptr + sizeof(T) <= End; Ptr += sizeof(T)) 384| 1.49k| reinterpret_cast(Ptr)->~T(); 385| 1.49k| }; 386| | 387| 1.49k| for (auto I = Allocator.Slabs.begin(), E = Allocator.Slabs.end(); I != E; ------------------ | Branch (387:71): [True: 0, False: 1.49k] ------------------ 388| 1.49k| ++I) { 389| 0| size_t AllocatedSlabSize = BumpPtrAllocator::computeSlabSize( 390| 0| std::distance(Allocator.Slabs.begin(), I)); 391| 0| char *Begin = (char*)alignAddr(*I, alignOf()); 392| 0| char *End = *I == Allocator.Slabs.back() ? Allocator.CurPtr ------------------ | Branch (392:19): [True: 0, False: 0] ------------------ 393| 0| : (char *)*I + AllocatedSlabSize; 394| | 395| 0| DestroyElements(Begin, End); 396| 0| } 397| | 398| 1.49k| for (auto &PtrAndSize : Allocator.CustomSizedSlabs) { ------------------ | Branch (398:27): [True: 0, False: 1.49k] ------------------ 399| 0| void *Ptr = PtrAndSize.first; 400| 0| size_t Size = PtrAndSize.second; 401| 0| DestroyElements((char*)alignAddr(Ptr, alignOf()), (char *)Ptr + Size); 402| 0| } 403| | 404| 1.49k| Allocator.Reset(); 405| 1.49k| } _ZN7llvm_ks24SpecificBumpPtrAllocatorINS_12MCSectionELFEE10DestroyAllEv: 380| 1.49k| void DestroyAll() { 381| 1.49k| auto DestroyElements = [](char *Begin, char *End) { 382| 1.49k| assert(Begin == (char*)alignAddr(Begin, alignOf())); 383| 1.49k| for (char *Ptr = Begin; Ptr + sizeof(T) <= End; Ptr += sizeof(T)) 384| 1.49k| reinterpret_cast(Ptr)->~T(); 385| 1.49k| }; 386| | 387| 4.49k| for (auto I = Allocator.Slabs.begin(), E = Allocator.Slabs.end(); I != E; ------------------ | Branch (387:71): [True: 2.99k, False: 1.49k] ------------------ 388| 2.99k| ++I) { 389| 2.99k| size_t AllocatedSlabSize = BumpPtrAllocator::computeSlabSize( 390| 2.99k| std::distance(Allocator.Slabs.begin(), I)); 391| 2.99k| char *Begin = (char*)alignAddr(*I, alignOf()); 392| 2.99k| char *End = *I == Allocator.Slabs.back() ? Allocator.CurPtr ------------------ | Branch (392:19): [True: 1.49k, False: 1.49k] ------------------ 393| 2.99k| : (char *)*I + AllocatedSlabSize; 394| | 395| 2.99k| DestroyElements(Begin, End); 396| 2.99k| } 397| | 398| 1.49k| for (auto &PtrAndSize : Allocator.CustomSizedSlabs) { ------------------ | Branch (398:27): [True: 0, False: 1.49k] ------------------ 399| 0| void *Ptr = PtrAndSize.first; 400| 0| size_t Size = PtrAndSize.second; 401| 0| DestroyElements((char*)alignAddr(Ptr, alignOf()), (char *)Ptr + Size); 402| 0| } 403| | 404| 1.49k| Allocator.Reset(); 405| 1.49k| } _ZZN7llvm_ks24SpecificBumpPtrAllocatorINS_12MCSectionELFEE10DestroyAllEvENKUlPcS3_E_clES3_S3_: 381| 2.99k| auto DestroyElements = [](char *Begin, char *End) { 382| 2.99k| assert(Begin == (char*)alignAddr(Begin, alignOf())); ------------------ | Branch (382:7): [True: 2.99k, False: 0] ------------------ 383| 35.4k| for (char *Ptr = Begin; Ptr + sizeof(T) <= End; Ptr += sizeof(T)) ------------------ | Branch (383:31): [True: 32.4k, False: 2.99k] ------------------ 384| 32.4k| reinterpret_cast(Ptr)->~T(); 385| 2.99k| }; _ZN7llvm_ks24SpecificBumpPtrAllocatorINS_14MCSectionMachOEE10DestroyAllEv: 380| 1.49k| void DestroyAll() { 381| 1.49k| auto DestroyElements = [](char *Begin, char *End) { 382| 1.49k| assert(Begin == (char*)alignAddr(Begin, alignOf())); 383| 1.49k| for (char *Ptr = Begin; Ptr + sizeof(T) <= End; Ptr += sizeof(T)) 384| 1.49k| reinterpret_cast(Ptr)->~T(); 385| 1.49k| }; 386| | 387| 1.63k| for (auto I = Allocator.Slabs.begin(), E = Allocator.Slabs.end(); I != E; ------------------ | Branch (387:71): [True: 136, False: 1.49k] ------------------ 388| 1.49k| ++I) { 389| 136| size_t AllocatedSlabSize = BumpPtrAllocator::computeSlabSize( 390| 136| std::distance(Allocator.Slabs.begin(), I)); 391| 136| char *Begin = (char*)alignAddr(*I, alignOf()); 392| 136| char *End = *I == Allocator.Slabs.back() ? Allocator.CurPtr ------------------ | Branch (392:19): [True: 136, False: 0] ------------------ 393| 136| : (char *)*I + AllocatedSlabSize; 394| | 395| 136| DestroyElements(Begin, End); 396| 136| } 397| | 398| 1.49k| for (auto &PtrAndSize : Allocator.CustomSizedSlabs) { ------------------ | Branch (398:27): [True: 0, False: 1.49k] ------------------ 399| 0| void *Ptr = PtrAndSize.first; 400| 0| size_t Size = PtrAndSize.second; 401| 0| DestroyElements((char*)alignAddr(Ptr, alignOf()), (char *)Ptr + Size); 402| 0| } 403| | 404| 1.49k| Allocator.Reset(); 405| 1.49k| } _ZZN7llvm_ks24SpecificBumpPtrAllocatorINS_14MCSectionMachOEE10DestroyAllEvENKUlPcS3_E_clES3_S3_: 381| 136| auto DestroyElements = [](char *Begin, char *End) { 382| 136| assert(Begin == (char*)alignAddr(Begin, alignOf())); ------------------ | Branch (382:7): [True: 136, False: 0] ------------------ 383| 266| for (char *Ptr = Begin; Ptr + sizeof(T) <= End; Ptr += sizeof(T)) ------------------ | Branch (383:31): [True: 130, False: 136] ------------------ 384| 130| reinterpret_cast(Ptr)->~T(); 385| 136| }; _ZN7llvm_ks24SpecificBumpPtrAllocatorINS_15MCSubtargetInfoEE10DestroyAllEv: 380| 1.49k| void DestroyAll() { 381| 1.49k| auto DestroyElements = [](char *Begin, char *End) { 382| 1.49k| assert(Begin == (char*)alignAddr(Begin, alignOf())); 383| 1.49k| for (char *Ptr = Begin; Ptr + sizeof(T) <= End; Ptr += sizeof(T)) 384| 1.49k| reinterpret_cast(Ptr)->~T(); 385| 1.49k| }; 386| | 387| 1.85k| for (auto I = Allocator.Slabs.begin(), E = Allocator.Slabs.end(); I != E; ------------------ | Branch (387:71): [True: 355, False: 1.49k] ------------------ 388| 1.49k| ++I) { 389| 355| size_t AllocatedSlabSize = BumpPtrAllocator::computeSlabSize( 390| 355| std::distance(Allocator.Slabs.begin(), I)); 391| 355| char *Begin = (char*)alignAddr(*I, alignOf()); 392| 355| char *End = *I == Allocator.Slabs.back() ? Allocator.CurPtr ------------------ | Branch (392:19): [True: 140, False: 215] ------------------ 393| 355| : (char *)*I + AllocatedSlabSize; 394| | 395| 355| DestroyElements(Begin, End); 396| 355| } 397| | 398| 1.49k| for (auto &PtrAndSize : Allocator.CustomSizedSlabs) { ------------------ | Branch (398:27): [True: 0, False: 1.49k] ------------------ 399| 0| void *Ptr = PtrAndSize.first; 400| 0| size_t Size = PtrAndSize.second; 401| 0| DestroyElements((char*)alignAddr(Ptr, alignOf()), (char *)Ptr + Size); 402| 0| } 403| | 404| 1.49k| Allocator.Reset(); 405| 1.49k| } _ZZN7llvm_ks24SpecificBumpPtrAllocatorINS_15MCSubtargetInfoEE10DestroyAllEvENKUlPcS3_E_clES3_S3_: 381| 355| auto DestroyElements = [](char *Begin, char *End) { 382| 355| assert(Begin == (char*)alignAddr(Begin, alignOf())); ------------------ | Branch (382:7): [True: 355, False: 0] ------------------ 383| 7.33k| for (char *Ptr = Begin; Ptr + sizeof(T) <= End; Ptr += sizeof(T)) ------------------ | Branch (383:31): [True: 6.97k, False: 355] ------------------ 384| 6.97k| reinterpret_cast(Ptr)->~T(); 385| 355| }; _ZN7llvm_ks20BumpPtrAllocatorImplINS_15MallocAllocatorELm4096ELm4096EE5ResetEv: 189| 6.74k| void Reset() { 190| | // Deallocate all but the first slab, and deallocate all custom-sized slabs. 191| 6.74k| DeallocateCustomSizedSlabs(); 192| 6.74k| CustomSizedSlabs.clear(); 193| | 194| 6.74k| if (Slabs.empty()) ------------------ | Branch (194:9): [True: 4.21k, False: 2.52k] ------------------ 195| 4.21k| return; 196| | 197| | // Reset the state. 198| 2.52k| BytesAllocated = 0; 199| 2.52k| CurPtr = (char *)Slabs.front(); 200| 2.52k| End = CurPtr + SlabSize; 201| | 202| 2.52k| __asan_poison_memory_region(*Slabs.begin(), computeSlabSize(0)); 203| 2.52k| DeallocateSlabs(std::next(Slabs.begin()), Slabs.end()); 204| 2.52k| Slabs.erase(std::next(Slabs.begin()), Slabs.end()); 205| 2.52k| } _ZN7llvm_ks24SpecificBumpPtrAllocatorINS_14MCSectionMachOEE8AllocateEm: 408| 130| T *Allocate(size_t num = 1) { return Allocator.Allocate(num); } _ZN7llvm_ks13AllocatorBaseINS_20BumpPtrAllocatorImplINS_15MallocAllocatorELm4096ELm4096EEEE8AllocateINS_14MCSectionMachOEEEPT_m: 76| 130| template T *Allocate(size_t Num = 1) { 77| 130| return static_cast(Allocate(Num * sizeof(T), AlignOf::Alignment)); 78| 130| } _ZN7llvm_ks13AllocatorBaseINS_20BumpPtrAllocatorImplINS_15MallocAllocatorELm4096ELm4096EEEE8AllocateEmm: 46| 39.5k| void *Allocate(size_t Size, size_t Alignment) { 47| 39.5k|#ifdef __clang__ 48| 39.5k| static_assert(static_cast( 49| 39.5k| &AllocatorBase::Allocate) != 50| 39.5k| static_cast( 51| 39.5k| &DerivedT::Allocate), 52| 39.5k| "Class derives from AllocatorBase without implementing the " 53| 39.5k| "core Allocate(size_t, size_t) overload!"); 54| 39.5k|#endif 55| 39.5k| return static_cast(this)->Allocate(Size, Alignment); 56| 39.5k| } _ZN7llvm_ks24SpecificBumpPtrAllocatorINS_12MCSectionELFEE8AllocateEm: 408| 32.4k| T *Allocate(size_t num = 1) { return Allocator.Allocate(num); } _ZN7llvm_ks13AllocatorBaseINS_20BumpPtrAllocatorImplINS_15MallocAllocatorELm4096ELm4096EEEE8AllocateINS_12MCSectionELFEEEPT_m: 76| 32.4k| template T *Allocate(size_t Num = 1) { 77| 32.4k| return static_cast(Allocate(Num * sizeof(T), AlignOf::Alignment)); 78| 32.4k| } _ZN7llvm_ks24SpecificBumpPtrAllocatorINS_15MCSubtargetInfoEE8AllocateEm: 408| 6.97k| T *Allocate(size_t num = 1) { return Allocator.Allocate(num); } _ZN7llvm_ks13AllocatorBaseINS_20BumpPtrAllocatorImplINS_15MallocAllocatorELm4096ELm4096EEEE8AllocateINS_15MCSubtargetInfoEEEPT_m: 76| 6.97k| template T *Allocate(size_t Num = 1) { 77| 6.97k| return static_cast(Allocate(Num * sizeof(T), AlignOf::Alignment)); 78| 6.97k| } _ZN7llvm_ks4castINS_11MCSymbolELFENS_8MCSymbolEEENS_10cast_rettyIT_PT0_E8ret_typeES6_: 236| 12.2k|inline typename cast_retty::ret_type cast(Y *Val) { 237| 12.2k| assert(isa(Val) && "cast() argument of incompatible type!"); ------------------ | Branch (237:3): [True: 12.2k, False: 0] | Branch (237:3): [True: 12.2k, Folded] | Branch (237:3): [True: 12.2k, False: 0] ------------------ 238| 12.2k| return cast_convert_val::SimpleType>::doit(Val); 240| 12.2k|} _ZN7llvm_ks3isaINS_11MCSymbolELFEPNS_8MCSymbolEEEbRKT0_: 132| 16.0k|LLVM_ATTRIBUTE_UNUSED_RESULT inline bool isa(const Y &Val) { 133| 16.0k| return isa_impl_wrap::SimpleType>::doit(Val); 135| 16.0k|} _ZN7llvm_ks13isa_impl_wrapINS_11MCSymbolELFEKPNS_8MCSymbolEPKS2_E4doitERS4_: 111| 16.0k| static bool doit(const From &Val) { 112| 16.0k| return isa_impl_wrap::SimpleType>::doit( 114| 16.0k| simplify_type::getSimplifiedValue(Val)); 115| 16.0k| } _ZN7llvm_ks13isa_impl_wrapINS_11MCSymbolELFEPKNS_8MCSymbolES4_E4doitERKS4_: 121| 17.6k| static bool doit(const FromTy &Val) { 122| 17.6k| return isa_impl_cl::doit(Val); 123| 17.6k| } _ZN7llvm_ks11isa_impl_clINS_11MCSymbolELFEPKNS_8MCSymbolEE4doitES4_: 94| 17.6k| static inline bool doit(const From *Val) { 95| 17.6k| assert(Val && "isa<> used on a null pointer"); ------------------ | Branch (95:5): [True: 17.6k, False: 0] | Branch (95:5): [True: 17.6k, Folded] | Branch (95:5): [True: 17.6k, False: 0] ------------------ 96| 17.6k| return isa_impl::doit(*Val); 97| 17.6k| } _ZN7llvm_ks8isa_implINS_11MCSymbolELFENS_8MCSymbolEvE4doitERKS2_: 55| 30.4k| static inline bool doit(const From &Val) { 56| 30.4k| return To::classof(&Val); 57| 30.4k| } _ZN7llvm_ks13simplify_typeIKPNS_8MCSymbolEE18getSimplifiedValueERS3_: 45| 16.0k| static RetType getSimplifiedValue(const From& Val) { 46| 16.0k| return simplify_type::getSimplifiedValue(const_cast(Val)); 47| 16.0k| } _ZN7llvm_ks13simplify_typeIPNS_8MCSymbolEE18getSimplifiedValueERS2_: 36| 16.0k| static SimpleType &getSimplifiedValue(From &Val) { return Val; } _ZN7llvm_ks16cast_convert_valINS_11MCSymbolELFEPNS_8MCSymbolES3_E4doitERKS3_: 200| 12.2k| static typename cast_retty::ret_type doit(const FromTy &Val) { 201| 12.2k| typename cast_retty::ret_type Res2 202| 12.2k| = (typename cast_retty::ret_type)const_cast(Val); 203| 12.2k| return Res2; 204| 12.2k| } _ZN7llvm_ks12cast_or_nullINS_11MCSymbolELFENS_8MCSymbolEEENS_10cast_rettyIT_PT0_E8ret_typeES6_: 267| 4.66k|cast_or_null(Y *Val) { 268| 4.66k| if (!Val) return nullptr; ------------------ | Branch (268:7): [True: 879, False: 3.78k] ------------------ 269| 4.66k| assert(isa(Val) && "cast_or_null() argument of incompatible type!"); ------------------ | Branch (269:3): [True: 3.78k, False: 0] | Branch (269:3): [True: 3.78k, Folded] | Branch (269:3): [True: 3.78k, False: 0] ------------------ 270| 3.78k| return cast(Val); 271| 3.78k|} _ZN7llvm_ks4castINS_11MCSymbolELFES1_EENS_10cast_rettyIT_PT0_E8ret_typeES5_: 236| 11|inline typename cast_retty::ret_type cast(Y *Val) { 237| 11| assert(isa(Val) && "cast() argument of incompatible type!"); ------------------ | Branch (237:3): [True: 11, False: 0] | Branch (237:3): [True: 11, Folded] | Branch (237:3): [True: 11, False: 0] ------------------ 238| 11| return cast_convert_val::SimpleType>::doit(Val); 240| 11|} _ZN7llvm_ks3isaINS_11MCSymbolELFEPS1_EEbRKT0_: 132| 11|LLVM_ATTRIBUTE_UNUSED_RESULT inline bool isa(const Y &Val) { 133| 11| return isa_impl_wrap::SimpleType>::doit(Val); 135| 11|} _ZN7llvm_ks13isa_impl_wrapINS_11MCSymbolELFEKPS1_PKS1_E4doitERS3_: 111| 11| static bool doit(const From &Val) { 112| 11| return isa_impl_wrap::SimpleType>::doit( 114| 11| simplify_type::getSimplifiedValue(Val)); 115| 11| } _ZN7llvm_ks13isa_impl_wrapINS_11MCSymbolELFEPKS1_S3_E4doitERKS3_: 121| 11| static bool doit(const FromTy &Val) { 122| 11| return isa_impl_cl::doit(Val); 123| 11| } _ZN7llvm_ks11isa_impl_clINS_11MCSymbolELFEPKS1_E4doitES3_: 94| 11| static inline bool doit(const From *Val) { 95| 11| assert(Val && "isa<> used on a null pointer"); ------------------ | Branch (95:5): [True: 11, False: 0] | Branch (95:5): [True: 11, Folded] | Branch (95:5): [True: 11, False: 0] ------------------ 96| 11| return isa_impl::doit(*Val); 97| 11| } _ZN7llvm_ks8isa_implINS_11MCSymbolELFES1_vE4doitERKS1_: 64| 11| static inline bool doit(const From &) { return true; } _ZN7llvm_ks13simplify_typeIKPNS_11MCSymbolELFEE18getSimplifiedValueERS3_: 45| 11| static RetType getSimplifiedValue(const From& Val) { 46| 11| return simplify_type::getSimplifiedValue(const_cast(Val)); 47| 11| } _ZN7llvm_ks13simplify_typeIPNS_11MCSymbolELFEE18getSimplifiedValueERS2_: 36| 11| static SimpleType &getSimplifiedValue(From &Val) { return Val; } _ZN7llvm_ks16cast_convert_valINS_11MCSymbolELFEPS1_S2_E4doitERKS2_: 200| 11| static typename cast_retty::ret_type doit(const FromTy &Val) { 201| 11| typename cast_retty::ret_type Res2 202| 11| = (typename cast_retty::ret_type)const_cast(Val); 203| 11| return Res2; 204| 11| } _ZN7llvm_ks4castINS_12MCTargetExprEKNS_6MCExprEEENS_10cast_rettyIT_PT0_E8ret_typeES7_: 236| 12|inline typename cast_retty::ret_type cast(Y *Val) { 237| 12| assert(isa(Val) && "cast() argument of incompatible type!"); ------------------ | Branch (237:3): [True: 12, False: 0] | Branch (237:3): [True: 12, Folded] | Branch (237:3): [True: 12, False: 0] ------------------ 238| 12| return cast_convert_val::SimpleType>::doit(Val); 240| 12|} _ZN7llvm_ks3isaINS_12MCTargetExprEPKNS_6MCExprEEEbRKT0_: 132| 12|LLVM_ATTRIBUTE_UNUSED_RESULT inline bool isa(const Y &Val) { 133| 12| return isa_impl_wrap::SimpleType>::doit(Val); 135| 12|} _ZN7llvm_ks13isa_impl_wrapINS_12MCTargetExprEKPKNS_6MCExprES4_E4doitERS5_: 111| 12| static bool doit(const From &Val) { 112| 12| return isa_impl_wrap::SimpleType>::doit( 114| 12| simplify_type::getSimplifiedValue(Val)); 115| 12| } _ZN7llvm_ks13isa_impl_wrapINS_12MCTargetExprEPKNS_6MCExprES4_E4doitERKS4_: 121| 12| static bool doit(const FromTy &Val) { 122| 12| return isa_impl_cl::doit(Val); 123| 12| } _ZN7llvm_ks11isa_impl_clINS_12MCTargetExprEPKNS_6MCExprEE4doitES4_: 94| 12| static inline bool doit(const From *Val) { 95| 12| assert(Val && "isa<> used on a null pointer"); ------------------ | Branch (95:5): [True: 12, False: 0] | Branch (95:5): [True: 12, Folded] | Branch (95:5): [True: 12, False: 0] ------------------ 96| 12| return isa_impl::doit(*Val); 97| 12| } _ZN7llvm_ks8isa_implINS_12MCTargetExprENS_6MCExprEvE4doitERKS2_: 55| 18| static inline bool doit(const From &Val) { 56| 18| return To::classof(&Val); 57| 18| } _ZN7llvm_ks13simplify_typeIKPKNS_6MCExprEE18getSimplifiedValueERS4_: 45| 310k| static RetType getSimplifiedValue(const From& Val) { 46| 310k| return simplify_type::getSimplifiedValue(const_cast(Val)); 47| 310k| } _ZN7llvm_ks13simplify_typeIPKNS_6MCExprEE18getSimplifiedValueERS3_: 36| 310k| static SimpleType &getSimplifiedValue(From &Val) { return Val; } _ZN7llvm_ks16cast_convert_valINS_12MCTargetExprEPKNS_6MCExprES4_E4doitERKS4_: 200| 12| static typename cast_retty::ret_type doit(const FromTy &Val) { 201| 12| typename cast_retty::ret_type Res2 202| 12| = (typename cast_retty::ret_type)const_cast(Val); 203| 12| return Res2; 204| 12| } _ZN7llvm_ks4castINS_12MCBinaryExprEKNS_6MCExprEEENS_10cast_rettyIT_PT0_E8ret_typeES7_: 236| 166k|inline typename cast_retty::ret_type cast(Y *Val) { 237| 166k| assert(isa(Val) && "cast() argument of incompatible type!"); ------------------ | Branch (237:3): [True: 166k, False: 0] | Branch (237:3): [True: 166k, Folded] | Branch (237:3): [True: 166k, False: 0] ------------------ 238| 166k| return cast_convert_val::SimpleType>::doit(Val); 240| 166k|} _ZN7llvm_ks3isaINS_12MCBinaryExprEPKNS_6MCExprEEEbRKT0_: 132| 166k|LLVM_ATTRIBUTE_UNUSED_RESULT inline bool isa(const Y &Val) { 133| 166k| return isa_impl_wrap::SimpleType>::doit(Val); 135| 166k|} _ZN7llvm_ks13isa_impl_wrapINS_12MCBinaryExprEKPKNS_6MCExprES4_E4doitERS5_: 111| 166k| static bool doit(const From &Val) { 112| 166k| return isa_impl_wrap::SimpleType>::doit( 114| 166k| simplify_type::getSimplifiedValue(Val)); 115| 166k| } _ZN7llvm_ks13isa_impl_wrapINS_12MCBinaryExprEPKNS_6MCExprES4_E4doitERKS4_: 121| 166k| static bool doit(const FromTy &Val) { 122| 166k| return isa_impl_cl::doit(Val); 123| 166k| } _ZN7llvm_ks11isa_impl_clINS_12MCBinaryExprEPKNS_6MCExprEE4doitES4_: 94| 166k| static inline bool doit(const From *Val) { 95| 166k| assert(Val && "isa<> used on a null pointer"); ------------------ | Branch (95:5): [True: 166k, False: 0] | Branch (95:5): [True: 166k, Folded] | Branch (95:5): [True: 166k, False: 0] ------------------ 96| 166k| return isa_impl::doit(*Val); 97| 166k| } _ZN7llvm_ks8isa_implINS_12MCBinaryExprENS_6MCExprEvE4doitERKS2_: 55| 178k| static inline bool doit(const From &Val) { 56| 178k| return To::classof(&Val); 57| 178k| } _ZN7llvm_ks16cast_convert_valINS_12MCBinaryExprEPKNS_6MCExprES4_E4doitERKS4_: 200| 166k| static typename cast_retty::ret_type doit(const FromTy &Val) { 201| 166k| typename cast_retty::ret_type Res2 202| 166k| = (typename cast_retty::ret_type)const_cast(Val); 203| 166k| return Res2; 204| 166k| } _ZN7llvm_ks4castINS_15MCSymbolRefExprEKNS_6MCExprEEENS_10cast_rettyIT_PT0_E8ret_typeES7_: 236| 50.5k|inline typename cast_retty::ret_type cast(Y *Val) { 237| 50.5k| assert(isa(Val) && "cast() argument of incompatible type!"); ------------------ | Branch (237:3): [True: 50.5k, False: 0] | Branch (237:3): [True: 50.5k, Folded] | Branch (237:3): [True: 50.5k, False: 0] ------------------ 238| 50.5k| return cast_convert_val::SimpleType>::doit(Val); 240| 50.5k|} _ZN7llvm_ks3isaINS_15MCSymbolRefExprEPKNS_6MCExprEEEbRKT0_: 132| 52.4k|LLVM_ATTRIBUTE_UNUSED_RESULT inline bool isa(const Y &Val) { 133| 52.4k| return isa_impl_wrap::SimpleType>::doit(Val); 135| 52.4k|} _ZN7llvm_ks13isa_impl_wrapINS_15MCSymbolRefExprEKPKNS_6MCExprES4_E4doitERS5_: 111| 52.4k| static bool doit(const From &Val) { 112| 52.4k| return isa_impl_wrap::SimpleType>::doit( 114| 52.4k| simplify_type::getSimplifiedValue(Val)); 115| 52.4k| } _ZN7llvm_ks13isa_impl_wrapINS_15MCSymbolRefExprEPKNS_6MCExprES4_E4doitERKS4_: 121| 52.4k| static bool doit(const FromTy &Val) { 122| 52.4k| return isa_impl_cl::doit(Val); 123| 52.4k| } _ZN7llvm_ks11isa_impl_clINS_15MCSymbolRefExprEPKNS_6MCExprEE4doitES4_: 94| 52.4k| static inline bool doit(const From *Val) { 95| 52.4k| assert(Val && "isa<> used on a null pointer"); ------------------ | Branch (95:5): [True: 52.4k, False: 0] | Branch (95:5): [True: 52.4k, Folded] | Branch (95:5): [True: 52.4k, False: 0] ------------------ 96| 52.4k| return isa_impl::doit(*Val); 97| 52.4k| } _ZN7llvm_ks8isa_implINS_15MCSymbolRefExprENS_6MCExprEvE4doitERKS2_: 55| 67.3k| static inline bool doit(const From &Val) { 56| 67.3k| return To::classof(&Val); 57| 67.3k| } _ZN7llvm_ks16cast_convert_valINS_15MCSymbolRefExprEPKNS_6MCExprES4_E4doitERKS4_: 200| 50.5k| static typename cast_retty::ret_type doit(const FromTy &Val) { 201| 50.5k| typename cast_retty::ret_type Res2 202| 50.5k| = (typename cast_retty::ret_type)const_cast(Val); 203| 50.5k| return Res2; 204| 50.5k| } _ZN7llvm_ks4castINS_11MCSymbolELFEKNS_8MCSymbolEEENS_10cast_rettyIT_T0_E8ret_typeERS6_: 229| 12.8k|inline typename cast_retty::ret_type cast(Y &Val) { 230| 12.8k| assert(isa(Val) && "cast() argument of incompatible type!"); ------------------ | Branch (230:3): [True: 12.8k, False: 0] | Branch (230:3): [True: 12.8k, Folded] | Branch (230:3): [True: 12.8k, False: 0] ------------------ 231| 12.8k| return cast_convert_val::SimpleType>::doit(Val); 233| 12.8k|} _ZN7llvm_ks3isaINS_11MCSymbolELFENS_8MCSymbolEEEbRKT0_: 132| 12.8k|LLVM_ATTRIBUTE_UNUSED_RESULT inline bool isa(const Y &Val) { 133| 12.8k| return isa_impl_wrap::SimpleType>::doit(Val); 135| 12.8k|} _ZN7llvm_ks13isa_impl_wrapINS_11MCSymbolELFEKNS_8MCSymbolES3_E4doitERS3_: 121| 12.8k| static bool doit(const FromTy &Val) { 122| 12.8k| return isa_impl_cl::doit(Val); 123| 12.8k| } _ZN7llvm_ks11isa_impl_clINS_11MCSymbolELFEKNS_8MCSymbolEE4doitERS3_: 74| 12.8k| static inline bool doit(const From &Val) { 75| 12.8k| return isa_impl::doit(Val); 76| 12.8k| } _ZN7llvm_ks16cast_convert_valINS_11MCSymbolELFEKNS_8MCSymbolES3_E4doitERS3_: 200| 12.8k| static typename cast_retty::ret_type doit(const FromTy &Val) { 201| 12.8k| typename cast_retty::ret_type Res2 202| 12.8k| = (typename cast_retty::ret_type)const_cast(Val); 203| 12.8k| return Res2; 204| 12.8k| } _ZN7llvm_ks4castINS_11MCUnaryExprEKNS_6MCExprEEENS_10cast_rettyIT_PT0_E8ret_typeES7_: 236| 11.2k|inline typename cast_retty::ret_type cast(Y *Val) { 237| 11.2k| assert(isa(Val) && "cast() argument of incompatible type!"); ------------------ | Branch (237:3): [True: 11.2k, False: 0] | Branch (237:3): [True: 11.2k, Folded] | Branch (237:3): [True: 11.2k, False: 0] ------------------ 238| 11.2k| return cast_convert_val::SimpleType>::doit(Val); 240| 11.2k|} _ZN7llvm_ks3isaINS_11MCUnaryExprEPKNS_6MCExprEEEbRKT0_: 132| 11.3k|LLVM_ATTRIBUTE_UNUSED_RESULT inline bool isa(const Y &Val) { 133| 11.3k| return isa_impl_wrap::SimpleType>::doit(Val); 135| 11.3k|} _ZN7llvm_ks13isa_impl_wrapINS_11MCUnaryExprEKPKNS_6MCExprES4_E4doitERS5_: 111| 11.3k| static bool doit(const From &Val) { 112| 11.3k| return isa_impl_wrap::SimpleType>::doit( 114| 11.3k| simplify_type::getSimplifiedValue(Val)); 115| 11.3k| } _ZN7llvm_ks13isa_impl_wrapINS_11MCUnaryExprEPKNS_6MCExprES4_E4doitERKS4_: 121| 11.3k| static bool doit(const FromTy &Val) { 122| 11.3k| return isa_impl_cl::doit(Val); 123| 11.3k| } _ZN7llvm_ks11isa_impl_clINS_11MCUnaryExprEPKNS_6MCExprEE4doitES4_: 94| 11.3k| static inline bool doit(const From *Val) { 95| 11.3k| assert(Val && "isa<> used on a null pointer"); ------------------ | Branch (95:5): [True: 11.3k, False: 0] | Branch (95:5): [True: 11.3k, Folded] | Branch (95:5): [True: 11.3k, False: 0] ------------------ 96| 11.3k| return isa_impl::doit(*Val); 97| 11.3k| } _ZN7llvm_ks8isa_implINS_11MCUnaryExprENS_6MCExprEvE4doitERKS2_: 55| 13.0k| static inline bool doit(const From &Val) { 56| 13.0k| return To::classof(&Val); 57| 13.0k| } _ZN7llvm_ks16cast_convert_valINS_11MCUnaryExprEPKNS_6MCExprES4_E4doitERKS4_: 200| 11.2k| static typename cast_retty::ret_type doit(const FromTy &Val) { 201| 11.2k| typename cast_retty::ret_type Res2 202| 11.2k| = (typename cast_retty::ret_type)const_cast(Val); 203| 11.2k| return Res2; 204| 11.2k| } _ZN7llvm_ks13simplify_typeIKPNS_10MCFragmentEE18getSimplifiedValueERS3_: 45| 466k| static RetType getSimplifiedValue(const From& Val) { 46| 466k| return simplify_type::getSimplifiedValue(const_cast(Val)); 47| 466k| } _ZN7llvm_ks13simplify_typeIPNS_10MCFragmentEE18getSimplifiedValueERS2_: 36| 466k| static SimpleType &getSimplifiedValue(From &Val) { return Val; } _ZN7llvm_ks4castINS_14MCDataFragmentENS_10MCFragmentEEENS_10cast_rettyIT_PT0_E8ret_typeES6_: 236| 230k|inline typename cast_retty::ret_type cast(Y *Val) { 237| 230k| assert(isa(Val) && "cast() argument of incompatible type!"); ------------------ | Branch (237:3): [True: 230k, False: 0] | Branch (237:3): [True: 230k, Folded] | Branch (237:3): [True: 230k, False: 0] ------------------ 238| 230k| return cast_convert_val::SimpleType>::doit(Val); 240| 230k|} _ZN7llvm_ks3isaINS_14MCDataFragmentEPNS_10MCFragmentEEEbRKT0_: 132| 462k|LLVM_ATTRIBUTE_UNUSED_RESULT inline bool isa(const Y &Val) { 133| 462k| return isa_impl_wrap::SimpleType>::doit(Val); 135| 462k|} _ZN7llvm_ks13isa_impl_wrapINS_14MCDataFragmentEKPNS_10MCFragmentEPKS2_E4doitERS4_: 111| 462k| static bool doit(const From &Val) { 112| 462k| return isa_impl_wrap::SimpleType>::doit( 114| 462k| simplify_type::getSimplifiedValue(Val)); 115| 462k| } _ZN7llvm_ks13isa_impl_wrapINS_14MCDataFragmentEPKNS_10MCFragmentES4_E4doitERKS4_: 121| 462k| static bool doit(const FromTy &Val) { 122| 462k| return isa_impl_cl::doit(Val); 123| 462k| } _ZN7llvm_ks11isa_impl_clINS_14MCDataFragmentEPKNS_10MCFragmentEE4doitES4_: 94| 462k| static inline bool doit(const From *Val) { 95| 462k| assert(Val && "isa<> used on a null pointer"); ------------------ | Branch (95:5): [True: 462k, False: 0] | Branch (95:5): [True: 462k, Folded] | Branch (95:5): [True: 462k, False: 0] ------------------ 96| 462k| return isa_impl::doit(*Val); 97| 462k| } _ZN7llvm_ks8isa_implINS_14MCDataFragmentENS_10MCFragmentEvE4doitERKS2_: 55| 462k| static inline bool doit(const From &Val) { 56| 462k| return To::classof(&Val); 57| 462k| } _ZN7llvm_ks16cast_convert_valINS_14MCDataFragmentEPNS_10MCFragmentES3_E4doitERKS3_: 200| 230k| static typename cast_retty::ret_type doit(const FromTy &Val) { 201| 230k| typename cast_retty::ret_type Res2 202| 230k| = (typename cast_retty::ret_type)const_cast(Val); 203| 230k| return Res2; 204| 230k| } _ZN7llvm_ks8dyn_castINS_15MCSymbolRefExprEKNS_6MCExprEEENS_10cast_rettyIT_PT0_E8ret_typeES7_: 297| 1.80k|dyn_cast(Y *Val) { 298| 1.80k| return isa(Val) ? cast(Val) : nullptr; ------------------ | Branch (298:10): [True: 992, False: 812] ------------------ 299| 1.80k|} _ZN7llvm_ks8isa_implINS_14MCConstantExprENS_6MCExprEvE4doitERKS2_: 55| 80.1k| static inline bool doit(const From &Val) { 56| 80.1k| return To::classof(&Val); 57| 80.1k| } _ZN7llvm_ks4castINS_15MCSymbolRefExprEKNS_6MCExprEEENS_10cast_rettyIT_T0_E8ret_typeERS6_: 229| 14.9k|inline typename cast_retty::ret_type cast(Y &Val) { 230| 14.9k| assert(isa(Val) && "cast() argument of incompatible type!"); ------------------ | Branch (230:3): [True: 14.9k, False: 0] | Branch (230:3): [True: 14.9k, Folded] | Branch (230:3): [True: 14.9k, False: 0] ------------------ 231| 14.9k| return cast_convert_val::SimpleType>::doit(Val); 233| 14.9k|} _ZN7llvm_ks3isaINS_15MCSymbolRefExprENS_6MCExprEEEbRKT0_: 132| 14.9k|LLVM_ATTRIBUTE_UNUSED_RESULT inline bool isa(const Y &Val) { 133| 14.9k| return isa_impl_wrap::SimpleType>::doit(Val); 135| 14.9k|} _ZN7llvm_ks13isa_impl_wrapINS_15MCSymbolRefExprEKNS_6MCExprES3_E4doitERS3_: 121| 14.9k| static bool doit(const FromTy &Val) { 122| 14.9k| return isa_impl_cl::doit(Val); 123| 14.9k| } _ZN7llvm_ks11isa_impl_clINS_15MCSymbolRefExprEKNS_6MCExprEE4doitERS3_: 74| 14.9k| static inline bool doit(const From &Val) { 75| 14.9k| return isa_impl::doit(Val); 76| 14.9k| } _ZN7llvm_ks16cast_convert_valINS_15MCSymbolRefExprEKNS_6MCExprES3_E4doitERS3_: 200| 14.9k| static typename cast_retty::ret_type doit(const FromTy &Val) { 201| 14.9k| typename cast_retty::ret_type Res2 202| 14.9k| = (typename cast_retty::ret_type)const_cast(Val); 203| 14.9k| return Res2; 204| 14.9k| } _ZN7llvm_ks4castINS_11MCUnaryExprEKNS_6MCExprEEENS_10cast_rettyIT_T0_E8ret_typeERS6_: 229| 1.71k|inline typename cast_retty::ret_type cast(Y &Val) { 230| 1.71k| assert(isa(Val) && "cast() argument of incompatible type!"); ------------------ | Branch (230:3): [True: 1.71k, False: 0] | Branch (230:3): [True: 1.71k, Folded] | Branch (230:3): [True: 1.71k, False: 0] ------------------ 231| 1.71k| return cast_convert_val::SimpleType>::doit(Val); 233| 1.71k|} _ZN7llvm_ks3isaINS_11MCUnaryExprENS_6MCExprEEEbRKT0_: 132| 1.71k|LLVM_ATTRIBUTE_UNUSED_RESULT inline bool isa(const Y &Val) { 133| 1.71k| return isa_impl_wrap::SimpleType>::doit(Val); 135| 1.71k|} _ZN7llvm_ks13isa_impl_wrapINS_11MCUnaryExprEKNS_6MCExprES3_E4doitERS3_: 121| 1.71k| static bool doit(const FromTy &Val) { 122| 1.71k| return isa_impl_cl::doit(Val); 123| 1.71k| } _ZN7llvm_ks11isa_impl_clINS_11MCUnaryExprEKNS_6MCExprEE4doitERS3_: 74| 1.71k| static inline bool doit(const From &Val) { 75| 1.71k| return isa_impl::doit(Val); 76| 1.71k| } _ZN7llvm_ks16cast_convert_valINS_11MCUnaryExprEKNS_6MCExprES3_E4doitERS3_: 200| 1.71k| static typename cast_retty::ret_type doit(const FromTy &Val) { 201| 1.71k| typename cast_retty::ret_type Res2 202| 1.71k| = (typename cast_retty::ret_type)const_cast(Val); 203| 1.71k| return Res2; 204| 1.71k| } _ZN7llvm_ks4castINS_12MCBinaryExprEKNS_6MCExprEEENS_10cast_rettyIT_T0_E8ret_typeERS6_: 229| 11.8k|inline typename cast_retty::ret_type cast(Y &Val) { 230| 11.8k| assert(isa(Val) && "cast() argument of incompatible type!"); ------------------ | Branch (230:3): [True: 11.8k, False: 0] | Branch (230:3): [True: 11.8k, Folded] | Branch (230:3): [True: 11.8k, False: 0] ------------------ 231| 11.8k| return cast_convert_val::SimpleType>::doit(Val); 233| 11.8k|} _ZN7llvm_ks3isaINS_12MCBinaryExprENS_6MCExprEEEbRKT0_: 132| 11.8k|LLVM_ATTRIBUTE_UNUSED_RESULT inline bool isa(const Y &Val) { 133| 11.8k| return isa_impl_wrap::SimpleType>::doit(Val); 135| 11.8k|} _ZN7llvm_ks13isa_impl_wrapINS_12MCBinaryExprEKNS_6MCExprES3_E4doitERS3_: 121| 11.8k| static bool doit(const FromTy &Val) { 122| 11.8k| return isa_impl_cl::doit(Val); 123| 11.8k| } _ZN7llvm_ks11isa_impl_clINS_12MCBinaryExprEKNS_6MCExprEE4doitERS3_: 74| 11.8k| static inline bool doit(const From &Val) { 75| 11.8k| return isa_impl::doit(Val); 76| 11.8k| } _ZN7llvm_ks16cast_convert_valINS_12MCBinaryExprEKNS_6MCExprES3_E4doitERS3_: 200| 11.8k| static typename cast_retty::ret_type doit(const FromTy &Val) { 201| 11.8k| typename cast_retty::ret_type Res2 202| 11.8k| = (typename cast_retty::ret_type)const_cast(Val); 203| 11.8k| return Res2; 204| 11.8k| } _ZN7llvm_ks3isaINS_14MCConstantExprEPKNS_6MCExprEEEbRKT0_: 132| 80.1k|LLVM_ATTRIBUTE_UNUSED_RESULT inline bool isa(const Y &Val) { 133| 80.1k| return isa_impl_wrap::SimpleType>::doit(Val); 135| 80.1k|} _ZN7llvm_ks13isa_impl_wrapINS_14MCConstantExprEKPKNS_6MCExprES4_E4doitERS5_: 111| 80.1k| static bool doit(const From &Val) { 112| 80.1k| return isa_impl_wrap::SimpleType>::doit( 114| 80.1k| simplify_type::getSimplifiedValue(Val)); 115| 80.1k| } _ZN7llvm_ks13isa_impl_wrapINS_14MCConstantExprEPKNS_6MCExprES4_E4doitERKS4_: 121| 80.1k| static bool doit(const FromTy &Val) { 122| 80.1k| return isa_impl_cl::doit(Val); 123| 80.1k| } _ZN7llvm_ks11isa_impl_clINS_14MCConstantExprEPKNS_6MCExprEE4doitES4_: 94| 80.1k| static inline bool doit(const From *Val) { 95| 80.1k| assert(Val && "isa<> used on a null pointer"); ------------------ | Branch (95:5): [True: 80.1k, False: 0] | Branch (95:5): [True: 80.1k, Folded] | Branch (95:5): [True: 80.1k, False: 0] ------------------ 96| 80.1k| return isa_impl::doit(*Val); 97| 80.1k| } _ZN7llvm_ks8dyn_castINS_14MCConstantExprEKNS_6MCExprEEENS_10cast_rettyIT_PT0_E8ret_typeES7_: 297| 41.6k|dyn_cast(Y *Val) { 298| 41.6k| return isa(Val) ? cast(Val) : nullptr; ------------------ | Branch (298:10): [True: 16.0k, False: 25.6k] ------------------ 299| 41.6k|} _ZN7llvm_ks4castINS_14MCConstantExprEKNS_6MCExprEEENS_10cast_rettyIT_PT0_E8ret_typeES7_: 236| 37.1k|inline typename cast_retty::ret_type cast(Y *Val) { 237| 37.1k| assert(isa(Val) && "cast() argument of incompatible type!"); ------------------ | Branch (237:3): [True: 37.1k, False: 0] | Branch (237:3): [True: 37.1k, Folded] | Branch (237:3): [True: 37.1k, False: 0] ------------------ 238| 37.1k| return cast_convert_val::SimpleType>::doit(Val); 240| 37.1k|} _ZN7llvm_ks16cast_convert_valINS_14MCConstantExprEPKNS_6MCExprES4_E4doitERKS4_: 200| 37.1k| static typename cast_retty::ret_type doit(const FromTy &Val) { 201| 37.1k| typename cast_retty::ret_type Res2 202| 37.1k| = (typename cast_retty::ret_type)const_cast(Val); 203| 37.1k| return Res2; 204| 37.1k| } _ZN7llvm_ks4castINS_15MCAlignFragmentENS_10MCFragmentEEENS_10cast_rettyIT_PT0_E8ret_typeES6_: 236| 589|inline typename cast_retty::ret_type cast(Y *Val) { 237| 589| assert(isa(Val) && "cast() argument of incompatible type!"); ------------------ | Branch (237:3): [True: 589, False: 0] | Branch (237:3): [True: 589, Folded] | Branch (237:3): [True: 589, False: 0] ------------------ 238| 589| return cast_convert_val::SimpleType>::doit(Val); 240| 589|} _ZN7llvm_ks3isaINS_15MCAlignFragmentEPNS_10MCFragmentEEEbRKT0_: 132| 589|LLVM_ATTRIBUTE_UNUSED_RESULT inline bool isa(const Y &Val) { 133| 589| return isa_impl_wrap::SimpleType>::doit(Val); 135| 589|} _ZN7llvm_ks13isa_impl_wrapINS_15MCAlignFragmentEKPNS_10MCFragmentEPKS2_E4doitERS4_: 111| 589| static bool doit(const From &Val) { 112| 589| return isa_impl_wrap::SimpleType>::doit( 114| 589| simplify_type::getSimplifiedValue(Val)); 115| 589| } _ZN7llvm_ks13isa_impl_wrapINS_15MCAlignFragmentEPKNS_10MCFragmentES4_E4doitERKS4_: 121| 589| static bool doit(const FromTy &Val) { 122| 589| return isa_impl_cl::doit(Val); 123| 589| } _ZN7llvm_ks11isa_impl_clINS_15MCAlignFragmentEPKNS_10MCFragmentEE4doitES4_: 94| 589| static inline bool doit(const From *Val) { 95| 589| assert(Val && "isa<> used on a null pointer"); ------------------ | Branch (95:5): [True: 589, False: 0] | Branch (95:5): [True: 589, Folded] | Branch (95:5): [True: 589, False: 0] ------------------ 96| 589| return isa_impl::doit(*Val); 97| 589| } _ZN7llvm_ks8isa_implINS_15MCAlignFragmentENS_10MCFragmentEvE4doitERKS2_: 55| 1.38k| static inline bool doit(const From &Val) { 56| 1.38k| return To::classof(&Val); 57| 1.38k| } _ZN7llvm_ks16cast_convert_valINS_15MCAlignFragmentEPNS_10MCFragmentES3_E4doitERKS3_: 200| 589| static typename cast_retty::ret_type doit(const FromTy &Val) { 201| 589| typename cast_retty::ret_type Res2 202| 589| = (typename cast_retty::ret_type)const_cast(Val); 203| 589| return Res2; 204| 589| } _ZN7llvm_ks4castINS_14MCFillFragmentENS_10MCFragmentEEENS_10cast_rettyIT_PT0_E8ret_typeES6_: 236| 614|inline typename cast_retty::ret_type cast(Y *Val) { 237| 614| assert(isa(Val) && "cast() argument of incompatible type!"); ------------------ | Branch (237:3): [True: 614, False: 0] | Branch (237:3): [True: 614, Folded] | Branch (237:3): [True: 614, False: 0] ------------------ 238| 614| return cast_convert_val::SimpleType>::doit(Val); 240| 614|} _ZN7llvm_ks3isaINS_14MCFillFragmentEPNS_10MCFragmentEEEbRKT0_: 132| 614|LLVM_ATTRIBUTE_UNUSED_RESULT inline bool isa(const Y &Val) { 133| 614| return isa_impl_wrap::SimpleType>::doit(Val); 135| 614|} _ZN7llvm_ks13isa_impl_wrapINS_14MCFillFragmentEKPNS_10MCFragmentEPKS2_E4doitERS4_: 111| 614| static bool doit(const From &Val) { 112| 614| return isa_impl_wrap::SimpleType>::doit( 114| 614| simplify_type::getSimplifiedValue(Val)); 115| 614| } _ZN7llvm_ks13isa_impl_wrapINS_14MCFillFragmentEPKNS_10MCFragmentES4_E4doitERKS4_: 121| 614| static bool doit(const FromTy &Val) { 122| 614| return isa_impl_cl::doit(Val); 123| 614| } _ZN7llvm_ks11isa_impl_clINS_14MCFillFragmentEPKNS_10MCFragmentEE4doitES4_: 94| 614| static inline bool doit(const From *Val) { 95| 614| assert(Val && "isa<> used on a null pointer"); ------------------ | Branch (95:5): [True: 614, False: 0] | Branch (95:5): [True: 614, Folded] | Branch (95:5): [True: 614, False: 0] ------------------ 96| 614| return isa_impl::doit(*Val); 97| 614| } _ZN7llvm_ks8isa_implINS_14MCFillFragmentENS_10MCFragmentEvE4doitERKS2_: 55| 2.41k| static inline bool doit(const From &Val) { 56| 2.41k| return To::classof(&Val); 57| 2.41k| } _ZN7llvm_ks16cast_convert_valINS_14MCFillFragmentEPNS_10MCFragmentES3_E4doitERKS3_: 200| 614| static typename cast_retty::ret_type doit(const FromTy &Val) { 201| 614| typename cast_retty::ret_type Res2 202| 614| = (typename cast_retty::ret_type)const_cast(Val); 203| 614| return Res2; 204| 614| } _ZN7llvm_ks4castINS_13MCOrgFragmentENS_10MCFragmentEEENS_10cast_rettyIT_PT0_E8ret_typeES6_: 236| 1.21k|inline typename cast_retty::ret_type cast(Y *Val) { 237| 1.21k| assert(isa(Val) && "cast() argument of incompatible type!"); ------------------ | Branch (237:3): [True: 1.21k, False: 0] | Branch (237:3): [True: 1.21k, Folded] | Branch (237:3): [True: 1.21k, False: 0] ------------------ 238| 1.21k| return cast_convert_val::SimpleType>::doit(Val); 240| 1.21k|} _ZN7llvm_ks3isaINS_13MCOrgFragmentEPNS_10MCFragmentEEEbRKT0_: 132| 1.21k|LLVM_ATTRIBUTE_UNUSED_RESULT inline bool isa(const Y &Val) { 133| 1.21k| return isa_impl_wrap::SimpleType>::doit(Val); 135| 1.21k|} _ZN7llvm_ks13isa_impl_wrapINS_13MCOrgFragmentEKPNS_10MCFragmentEPKS2_E4doitERS4_: 111| 1.21k| static bool doit(const From &Val) { 112| 1.21k| return isa_impl_wrap::SimpleType>::doit( 114| 1.21k| simplify_type::getSimplifiedValue(Val)); 115| 1.21k| } _ZN7llvm_ks13isa_impl_wrapINS_13MCOrgFragmentEPKNS_10MCFragmentES4_E4doitERKS4_: 121| 1.21k| static bool doit(const FromTy &Val) { 122| 1.21k| return isa_impl_cl::doit(Val); 123| 1.21k| } _ZN7llvm_ks11isa_impl_clINS_13MCOrgFragmentEPKNS_10MCFragmentEE4doitES4_: 94| 1.21k| static inline bool doit(const From *Val) { 95| 1.21k| assert(Val && "isa<> used on a null pointer"); ------------------ | Branch (95:5): [True: 1.21k, False: 0] | Branch (95:5): [True: 1.21k, Folded] | Branch (95:5): [True: 1.21k, False: 0] ------------------ 96| 1.21k| return isa_impl::doit(*Val); 97| 1.21k| } _ZN7llvm_ks8isa_implINS_13MCOrgFragmentENS_10MCFragmentEvE4doitERKS2_: 55| 2.34k| static inline bool doit(const From &Val) { 56| 2.34k| return To::classof(&Val); 57| 2.34k| } _ZN7llvm_ks16cast_convert_valINS_13MCOrgFragmentEPNS_10MCFragmentES3_E4doitERKS3_: 200| 1.21k| static typename cast_retty::ret_type doit(const FromTy &Val) { 201| 1.21k| typename cast_retty::ret_type Res2 202| 1.21k| = (typename cast_retty::ret_type)const_cast(Val); 203| 1.21k| return Res2; 204| 1.21k| } _ZN7llvm_ks16dyn_cast_or_nullINS_14MCDataFragmentENS_10MCFragmentEEENS_10cast_rettyIT_PT0_E8ret_typeES6_: 320| 257k|dyn_cast_or_null(Y *Val) { 321| 257k| return (Val && isa(Val)) ? cast(Val) : nullptr; ------------------ | Branch (321:11): [True: 232k, False: 25.1k] | Branch (321:18): [True: 229k, False: 3.32k] ------------------ 322| 257k|} _ZN7llvm_ks4castINS_12MCTargetExprEKNS_6MCExprEEENS_10cast_rettyIT_T0_E8ret_typeERS6_: 229| 6|inline typename cast_retty::ret_type cast(Y &Val) { 230| 6| assert(isa(Val) && "cast() argument of incompatible type!"); ------------------ | Branch (230:3): [True: 6, False: 0] | Branch (230:3): [True: 6, Folded] | Branch (230:3): [True: 6, False: 0] ------------------ 231| 6| return cast_convert_val::SimpleType>::doit(Val); 233| 6|} _ZN7llvm_ks3isaINS_12MCTargetExprENS_6MCExprEEEbRKT0_: 132| 6|LLVM_ATTRIBUTE_UNUSED_RESULT inline bool isa(const Y &Val) { 133| 6| return isa_impl_wrap::SimpleType>::doit(Val); 135| 6|} _ZN7llvm_ks13isa_impl_wrapINS_12MCTargetExprEKNS_6MCExprES3_E4doitERS3_: 121| 6| static bool doit(const FromTy &Val) { 122| 6| return isa_impl_cl::doit(Val); 123| 6| } _ZN7llvm_ks11isa_impl_clINS_12MCTargetExprEKNS_6MCExprEE4doitERS3_: 74| 6| static inline bool doit(const From &Val) { 75| 6| return isa_impl::doit(Val); 76| 6| } _ZN7llvm_ks16cast_convert_valINS_12MCTargetExprEKNS_6MCExprES3_E4doitERS3_: 200| 6| static typename cast_retty::ret_type doit(const FromTy &Val) { 201| 6| typename cast_retty::ret_type Res2 202| 6| = (typename cast_retty::ret_type)const_cast(Val); 203| 6| return Res2; 204| 6| } _ZN7llvm_ks8dyn_castINS_12MCBinaryExprEKNS_6MCExprEEENS_10cast_rettyIT_PT0_E8ret_typeES7_: 297| 224|dyn_cast(Y *Val) { 298| 224| return isa(Val) ? cast(Val) : nullptr; ------------------ | Branch (298:10): [True: 126, False: 98] ------------------ 299| 224|} _ZN7llvm_ks8dyn_castINS_11MCUnaryExprEKNS_6MCExprEEENS_10cast_rettyIT_PT0_E8ret_typeES7_: 297| 98|dyn_cast(Y *Val) { 298| 98| return isa(Val) ? cast(Val) : nullptr; ------------------ | Branch (298:10): [True: 98, False: 0] ------------------ 299| 98|} _ZN7llvm_ks4castINS_14MCDataFragmentEKNS_10MCFragmentEEENS_10cast_rettyIT_T0_E8ret_typeERS6_: 229| 523|inline typename cast_retty::ret_type cast(Y &Val) { 230| 523| assert(isa(Val) && "cast() argument of incompatible type!"); ------------------ | Branch (230:3): [True: 523, False: 0] | Branch (230:3): [True: 523, Folded] | Branch (230:3): [True: 523, False: 0] ------------------ 231| 523| return cast_convert_val::SimpleType>::doit(Val); 233| 523|} _ZN7llvm_ks3isaINS_14MCDataFragmentENS_10MCFragmentEEEbRKT0_: 132| 523|LLVM_ATTRIBUTE_UNUSED_RESULT inline bool isa(const Y &Val) { 133| 523| return isa_impl_wrap::SimpleType>::doit(Val); 135| 523|} _ZN7llvm_ks13isa_impl_wrapINS_14MCDataFragmentEKNS_10MCFragmentES3_E4doitERS3_: 121| 523| static bool doit(const FromTy &Val) { 122| 523| return isa_impl_cl::doit(Val); 123| 523| } _ZN7llvm_ks11isa_impl_clINS_14MCDataFragmentEKNS_10MCFragmentEE4doitERS3_: 74| 523| static inline bool doit(const From &Val) { 75| 523| return isa_impl::doit(Val); 76| 523| } _ZN7llvm_ks16cast_convert_valINS_14MCDataFragmentEKNS_10MCFragmentES3_E4doitERS3_: 200| 523| static typename cast_retty::ret_type doit(const FromTy &Val) { 201| 523| typename cast_retty::ret_type Res2 202| 523| = (typename cast_retty::ret_type)const_cast(Val); 203| 523| return Res2; 204| 523| } _ZN7llvm_ks4castINS_14MCFillFragmentEKNS_10MCFragmentEEENS_10cast_rettyIT_T0_E8ret_typeERS6_: 229| 1.80k|inline typename cast_retty::ret_type cast(Y &Val) { 230| 1.80k| assert(isa(Val) && "cast() argument of incompatible type!"); ------------------ | Branch (230:3): [True: 1.80k, False: 0] | Branch (230:3): [True: 1.80k, Folded] | Branch (230:3): [True: 1.80k, False: 0] ------------------ 231| 1.80k| return cast_convert_val::SimpleType>::doit(Val); 233| 1.80k|} _ZN7llvm_ks3isaINS_14MCFillFragmentENS_10MCFragmentEEEbRKT0_: 132| 1.80k|LLVM_ATTRIBUTE_UNUSED_RESULT inline bool isa(const Y &Val) { 133| 1.80k| return isa_impl_wrap::SimpleType>::doit(Val); 135| 1.80k|} _ZN7llvm_ks13isa_impl_wrapINS_14MCFillFragmentEKNS_10MCFragmentES3_E4doitERS3_: 121| 1.80k| static bool doit(const FromTy &Val) { 122| 1.80k| return isa_impl_cl::doit(Val); 123| 1.80k| } _ZN7llvm_ks11isa_impl_clINS_14MCFillFragmentEKNS_10MCFragmentEE4doitERS3_: 74| 1.80k| static inline bool doit(const From &Val) { 75| 1.80k| return isa_impl::doit(Val); 76| 1.80k| } _ZN7llvm_ks16cast_convert_valINS_14MCFillFragmentEKNS_10MCFragmentES3_E4doitERS3_: 200| 1.80k| static typename cast_retty::ret_type doit(const FromTy &Val) { 201| 1.80k| typename cast_retty::ret_type Res2 202| 1.80k| = (typename cast_retty::ret_type)const_cast(Val); 203| 1.80k| return Res2; 204| 1.80k| } _ZN7llvm_ks4castINS_15MCAlignFragmentEKNS_10MCFragmentEEENS_10cast_rettyIT_T0_E8ret_typeERS6_: 229| 793|inline typename cast_retty::ret_type cast(Y &Val) { 230| 793| assert(isa(Val) && "cast() argument of incompatible type!"); ------------------ | Branch (230:3): [True: 793, False: 0] | Branch (230:3): [True: 793, Folded] | Branch (230:3): [True: 793, False: 0] ------------------ 231| 793| return cast_convert_val::SimpleType>::doit(Val); 233| 793|} _ZN7llvm_ks3isaINS_15MCAlignFragmentENS_10MCFragmentEEEbRKT0_: 132| 793|LLVM_ATTRIBUTE_UNUSED_RESULT inline bool isa(const Y &Val) { 133| 793| return isa_impl_wrap::SimpleType>::doit(Val); 135| 793|} _ZN7llvm_ks13isa_impl_wrapINS_15MCAlignFragmentEKNS_10MCFragmentES3_E4doitERS3_: 121| 793| static bool doit(const FromTy &Val) { 122| 793| return isa_impl_cl::doit(Val); 123| 793| } _ZN7llvm_ks11isa_impl_clINS_15MCAlignFragmentEKNS_10MCFragmentEE4doitERS3_: 74| 793| static inline bool doit(const From &Val) { 75| 793| return isa_impl::doit(Val); 76| 793| } _ZN7llvm_ks16cast_convert_valINS_15MCAlignFragmentEKNS_10MCFragmentES3_E4doitERS3_: 200| 793| static typename cast_retty::ret_type doit(const FromTy &Val) { 201| 793| typename cast_retty::ret_type Res2 202| 793| = (typename cast_retty::ret_type)const_cast(Val); 203| 793| return Res2; 204| 793| } _ZN7llvm_ks4castINS_13MCOrgFragmentEKNS_10MCFragmentEEENS_10cast_rettyIT_T0_E8ret_typeERS6_: 229| 1.13k|inline typename cast_retty::ret_type cast(Y &Val) { 230| 1.13k| assert(isa(Val) && "cast() argument of incompatible type!"); ------------------ | Branch (230:3): [True: 1.13k, False: 0] | Branch (230:3): [True: 1.13k, Folded] | Branch (230:3): [True: 1.13k, False: 0] ------------------ 231| 1.13k| return cast_convert_val::SimpleType>::doit(Val); 233| 1.13k|} _ZN7llvm_ks3isaINS_13MCOrgFragmentENS_10MCFragmentEEEbRKT0_: 132| 1.13k|LLVM_ATTRIBUTE_UNUSED_RESULT inline bool isa(const Y &Val) { 133| 1.13k| return isa_impl_wrap::SimpleType>::doit(Val); 135| 1.13k|} _ZN7llvm_ks13isa_impl_wrapINS_13MCOrgFragmentEKNS_10MCFragmentES3_E4doitERS3_: 121| 1.13k| static bool doit(const FromTy &Val) { 122| 1.13k| return isa_impl_cl::doit(Val); 123| 1.13k| } _ZN7llvm_ks11isa_impl_clINS_13MCOrgFragmentEKNS_10MCFragmentEE4doitERS3_: 74| 1.13k| static inline bool doit(const From &Val) { 75| 1.13k| return isa_impl::doit(Val); 76| 1.13k| } _ZN7llvm_ks16cast_convert_valINS_13MCOrgFragmentEKNS_10MCFragmentES3_E4doitERS3_: 200| 1.13k| static typename cast_retty::ret_type doit(const FromTy &Val) { 201| 1.13k| typename cast_retty::ret_type Res2 202| 1.13k| = (typename cast_retty::ret_type)const_cast(Val); 203| 1.13k| return Res2; 204| 1.13k| } _ZN7llvm_ks3isaINS_17MCEncodedFragmentEPNS_10MCFragmentEEEbRKT0_: 132| 2.12k|LLVM_ATTRIBUTE_UNUSED_RESULT inline bool isa(const Y &Val) { 133| 2.12k| return isa_impl_wrap::SimpleType>::doit(Val); 135| 2.12k|} _ZN7llvm_ks13isa_impl_wrapINS_17MCEncodedFragmentEKPNS_10MCFragmentEPKS2_E4doitERS4_: 111| 2.12k| static bool doit(const From &Val) { 112| 2.12k| return isa_impl_wrap::SimpleType>::doit( 114| 2.12k| simplify_type::getSimplifiedValue(Val)); 115| 2.12k| } _ZN7llvm_ks13isa_impl_wrapINS_17MCEncodedFragmentEPKNS_10MCFragmentES4_E4doitERKS4_: 121| 2.12k| static bool doit(const FromTy &Val) { 122| 2.12k| return isa_impl_cl::doit(Val); 123| 2.12k| } _ZN7llvm_ks11isa_impl_clINS_17MCEncodedFragmentEPKNS_10MCFragmentEE4doitES4_: 94| 2.12k| static inline bool doit(const From *Val) { 95| 2.12k| assert(Val && "isa<> used on a null pointer"); ------------------ | Branch (95:5): [True: 2.12k, False: 0] | Branch (95:5): [True: 2.12k, Folded] | Branch (95:5): [True: 2.12k, False: 0] ------------------ 96| 2.12k| return isa_impl::doit(*Val); 97| 2.12k| } _ZN7llvm_ks8isa_implINS_17MCEncodedFragmentENS_10MCFragmentEvE4doitERKS2_: 55| 2.12k| static inline bool doit(const From &Val) { 56| 2.12k| return To::classof(&Val); 57| 2.12k| } _ZN7llvm_ks13simplify_typeIKPKNS_9MCSectionEE18getSimplifiedValueERS4_: 45| 796| static RetType getSimplifiedValue(const From& Val) { 46| 796| return simplify_type::getSimplifiedValue(const_cast(Val)); 47| 796| } _ZN7llvm_ks13simplify_typeIPKNS_9MCSectionEE18getSimplifiedValueERS3_: 36| 796| static SimpleType &getSimplifiedValue(From &Val) { return Val; } _ZN7llvm_ks8dyn_castINS_17MCEncodedFragmentENS_10MCFragmentEEENS_10cast_rettyIT_PT0_E8ret_typeES6_: 297| 1.82k|dyn_cast(Y *Val) { 298| 1.82k| return isa(Val) ? cast(Val) : nullptr; ------------------ | Branch (298:10): [True: 301, False: 1.52k] ------------------ 299| 1.82k|} _ZN7llvm_ks4castINS_17MCEncodedFragmentENS_10MCFragmentEEENS_10cast_rettyIT_PT0_E8ret_typeES6_: 236| 301|inline typename cast_retty::ret_type cast(Y *Val) { 237| 301| assert(isa(Val) && "cast() argument of incompatible type!"); ------------------ | Branch (237:3): [True: 301, False: 0] | Branch (237:3): [True: 301, Folded] | Branch (237:3): [True: 301, False: 0] ------------------ 238| 301| return cast_convert_val::SimpleType>::doit(Val); 240| 301|} _ZN7llvm_ks16cast_convert_valINS_17MCEncodedFragmentEPNS_10MCFragmentES3_E4doitERKS3_: 200| 301| static typename cast_retty::ret_type doit(const FromTy &Val) { 201| 301| typename cast_retty::ret_type Res2 202| 301| = (typename cast_retty::ret_type)const_cast(Val); 203| 301| return Res2; 204| 301| } _ZN7llvm_ks3isaINS_28MCCompactEncodedInstFragmentEPNS_17MCEncodedFragmentEEEbRKT0_: 132| 301|LLVM_ATTRIBUTE_UNUSED_RESULT inline bool isa(const Y &Val) { 133| 301| return isa_impl_wrap::SimpleType>::doit(Val); 135| 301|} _ZN7llvm_ks13isa_impl_wrapINS_28MCCompactEncodedInstFragmentEKPNS_17MCEncodedFragmentEPKS2_E4doitERS4_: 111| 301| static bool doit(const From &Val) { 112| 301| return isa_impl_wrap::SimpleType>::doit( 114| 301| simplify_type::getSimplifiedValue(Val)); 115| 301| } _ZN7llvm_ks13isa_impl_wrapINS_28MCCompactEncodedInstFragmentEPKNS_17MCEncodedFragmentES4_E4doitERKS4_: 121| 301| static bool doit(const FromTy &Val) { 122| 301| return isa_impl_cl::doit(Val); 123| 301| } _ZN7llvm_ks11isa_impl_clINS_28MCCompactEncodedInstFragmentEPKNS_17MCEncodedFragmentEE4doitES4_: 94| 301| static inline bool doit(const From *Val) { 95| 301| assert(Val && "isa<> used on a null pointer"); ------------------ | Branch (95:5): [True: 301, False: 0] | Branch (95:5): [True: 301, Folded] | Branch (95:5): [True: 301, False: 0] ------------------ 96| 301| return isa_impl::doit(*Val); 97| 301| } _ZN7llvm_ks8isa_implINS_28MCCompactEncodedInstFragmentENS_17MCEncodedFragmentEvE4doitERKS2_: 55| 301| static inline bool doit(const From &Val) { 56| 301| return To::classof(&Val); 57| 301| } _ZN7llvm_ks13simplify_typeIKPNS_17MCEncodedFragmentEE18getSimplifiedValueERS3_: 45| 903| static RetType getSimplifiedValue(const From& Val) { 46| 903| return simplify_type::getSimplifiedValue(const_cast(Val)); 47| 903| } _ZN7llvm_ks13simplify_typeIPNS_17MCEncodedFragmentEE18getSimplifiedValueERS2_: 36| 903| static SimpleType &getSimplifiedValue(From &Val) { return Val; } _ZN7llvm_ks8dyn_castINS_14MCDataFragmentENS_17MCEncodedFragmentEEENS_10cast_rettyIT_PT0_E8ret_typeES6_: 297| 301|dyn_cast(Y *Val) { 298| 301| return isa(Val) ? cast(Val) : nullptr; ------------------ | Branch (298:10): [True: 301, False: 0] ------------------ 299| 301|} _ZN7llvm_ks3isaINS_14MCDataFragmentEPNS_17MCEncodedFragmentEEEbRKT0_: 132| 602|LLVM_ATTRIBUTE_UNUSED_RESULT inline bool isa(const Y &Val) { 133| 602| return isa_impl_wrap::SimpleType>::doit(Val); 135| 602|} _ZN7llvm_ks13isa_impl_wrapINS_14MCDataFragmentEKPNS_17MCEncodedFragmentEPKS2_E4doitERS4_: 111| 602| static bool doit(const From &Val) { 112| 602| return isa_impl_wrap::SimpleType>::doit( 114| 602| simplify_type::getSimplifiedValue(Val)); 115| 602| } _ZN7llvm_ks13isa_impl_wrapINS_14MCDataFragmentEPKNS_17MCEncodedFragmentES4_E4doitERKS4_: 121| 602| static bool doit(const FromTy &Val) { 122| 602| return isa_impl_cl::doit(Val); 123| 602| } _ZN7llvm_ks11isa_impl_clINS_14MCDataFragmentEPKNS_17MCEncodedFragmentEE4doitES4_: 94| 602| static inline bool doit(const From *Val) { 95| 602| assert(Val && "isa<> used on a null pointer"); ------------------ | Branch (95:5): [True: 602, False: 0] | Branch (95:5): [True: 602, Folded] | Branch (95:5): [True: 602, False: 0] ------------------ 96| 602| return isa_impl::doit(*Val); 97| 602| } _ZN7llvm_ks8isa_implINS_14MCDataFragmentENS_17MCEncodedFragmentEvE4doitERKS2_: 55| 602| static inline bool doit(const From &Val) { 56| 602| return To::classof(&Val); 57| 602| } _ZN7llvm_ks4castINS_14MCDataFragmentENS_17MCEncodedFragmentEEENS_10cast_rettyIT_PT0_E8ret_typeES6_: 236| 301|inline typename cast_retty::ret_type cast(Y *Val) { 237| 301| assert(isa(Val) && "cast() argument of incompatible type!"); ------------------ | Branch (237:3): [True: 301, False: 0] | Branch (237:3): [True: 301, Folded] | Branch (237:3): [True: 301, False: 0] ------------------ 238| 301| return cast_convert_val::SimpleType>::doit(Val); 240| 301|} _ZN7llvm_ks16cast_convert_valINS_14MCDataFragmentEPNS_17MCEncodedFragmentES3_E4doitERKS3_: 200| 301| static typename cast_retty::ret_type doit(const FromTy &Val) { 201| 301| typename cast_retty::ret_type Res2 202| 301| = (typename cast_retty::ret_type)const_cast(Val); 203| 301| return Res2; 204| 301| } _ZN7llvm_ks4castINS_10MipsMCExprEKNS_6MCExprEEENS_10cast_rettyIT_PT0_E8ret_typeES7_: 236| 6|inline typename cast_retty::ret_type cast(Y *Val) { 237| 6| assert(isa(Val) && "cast() argument of incompatible type!"); ------------------ | Branch (237:3): [True: 6, False: 0] | Branch (237:3): [True: 6, Folded] | Branch (237:3): [True: 6, False: 0] ------------------ 238| 6| return cast_convert_val::SimpleType>::doit(Val); 240| 6|} _ZN7llvm_ks3isaINS_10MipsMCExprEPKNS_6MCExprEEEbRKT0_: 132| 6|LLVM_ATTRIBUTE_UNUSED_RESULT inline bool isa(const Y &Val) { 133| 6| return isa_impl_wrap::SimpleType>::doit(Val); 135| 6|} _ZN7llvm_ks13isa_impl_wrapINS_10MipsMCExprEKPKNS_6MCExprES4_E4doitERS5_: 111| 6| static bool doit(const From &Val) { 112| 6| return isa_impl_wrap::SimpleType>::doit( 114| 6| simplify_type::getSimplifiedValue(Val)); 115| 6| } _ZN7llvm_ks13isa_impl_wrapINS_10MipsMCExprEPKNS_6MCExprES4_E4doitERKS4_: 121| 6| static bool doit(const FromTy &Val) { 122| 6| return isa_impl_cl::doit(Val); 123| 6| } _ZN7llvm_ks11isa_impl_clINS_10MipsMCExprEPKNS_6MCExprEE4doitES4_: 94| 6| static inline bool doit(const From *Val) { 95| 6| assert(Val && "isa<> used on a null pointer"); ------------------ | Branch (95:5): [True: 6, False: 0] | Branch (95:5): [True: 6, Folded] | Branch (95:5): [True: 6, False: 0] ------------------ 96| 6| return isa_impl::doit(*Val); 97| 6| } _ZN7llvm_ks8isa_implINS_10MipsMCExprENS_6MCExprEvE4doitERKS2_: 55| 6| static inline bool doit(const From &Val) { 56| 6| return To::classof(&Val); 57| 6| } _ZN7llvm_ks16cast_convert_valINS_10MipsMCExprEPKNS_6MCExprES4_E4doitERKS4_: 200| 6| static typename cast_retty::ret_type doit(const FromTy &Val) { 201| 6| typename cast_retty::ret_type Res2 202| 6| = (typename cast_retty::ret_type)const_cast(Val); 203| 6| return Res2; 204| 6| } _ZN7llvm_ks3isaINS_11MCSymbolELFEPKNS_8MCSymbolEEEbRKT0_: 132| 1.59k|LLVM_ATTRIBUTE_UNUSED_RESULT inline bool isa(const Y &Val) { 133| 1.59k| return isa_impl_wrap::SimpleType>::doit(Val); 135| 1.59k|} _ZN7llvm_ks13isa_impl_wrapINS_11MCSymbolELFEKPKNS_8MCSymbolES4_E4doitERS5_: 111| 1.59k| static bool doit(const From &Val) { 112| 1.59k| return isa_impl_wrap::SimpleType>::doit( 114| 1.59k| simplify_type::getSimplifiedValue(Val)); 115| 1.59k| } _ZN7llvm_ks13simplify_typeIKPKNS_8MCSymbolEE18getSimplifiedValueERS4_: 45| 1.59k| static RetType getSimplifiedValue(const From& Val) { 46| 1.59k| return simplify_type::getSimplifiedValue(const_cast(Val)); 47| 1.59k| } _ZN7llvm_ks13simplify_typeIPKNS_8MCSymbolEE18getSimplifiedValueERS3_: 36| 1.59k| static SimpleType &getSimplifiedValue(From &Val) { return Val; } _ZN7llvm_ks4castINS_11MCSymbolELFEKNS_8MCSymbolEEENS_10cast_rettyIT_PT0_E8ret_typeES7_: 236| 1.19k|inline typename cast_retty::ret_type cast(Y *Val) { 237| 1.19k| assert(isa(Val) && "cast() argument of incompatible type!"); ------------------ | Branch (237:3): [True: 1.19k, False: 0] | Branch (237:3): [True: 1.19k, Folded] | Branch (237:3): [True: 1.19k, False: 0] ------------------ 238| 1.19k| return cast_convert_val::SimpleType>::doit(Val); 240| 1.19k|} _ZN7llvm_ks16cast_convert_valINS_11MCSymbolELFEPKNS_8MCSymbolES4_E4doitERKS4_: 200| 1.19k| static typename cast_retty::ret_type doit(const FromTy &Val) { 201| 1.19k| typename cast_retty::ret_type Res2 202| 1.19k| = (typename cast_retty::ret_type)const_cast(Val); 203| 1.19k| return Res2; 204| 1.19k| } _ZN7llvm_ks4castINS_12MCSectionELFENS_9MCSectionEEENS_10cast_rettyIT_T0_E8ret_typeERS5_: 229| 1.84k|inline typename cast_retty::ret_type cast(Y &Val) { 230| 1.84k| assert(isa(Val) && "cast() argument of incompatible type!"); ------------------ | Branch (230:3): [True: 1.84k, False: 0] | Branch (230:3): [True: 1.84k, Folded] | Branch (230:3): [True: 1.84k, False: 0] ------------------ 231| 1.84k| return cast_convert_val::SimpleType>::doit(Val); 233| 1.84k|} _ZN7llvm_ks3isaINS_12MCSectionELFENS_9MCSectionEEEbRKT0_: 132| 1.84k|LLVM_ATTRIBUTE_UNUSED_RESULT inline bool isa(const Y &Val) { 133| 1.84k| return isa_impl_wrap::SimpleType>::doit(Val); 135| 1.84k|} _ZN7llvm_ks13isa_impl_wrapINS_12MCSectionELFEKNS_9MCSectionES3_E4doitERS3_: 121| 1.84k| static bool doit(const FromTy &Val) { 122| 1.84k| return isa_impl_cl::doit(Val); 123| 1.84k| } _ZN7llvm_ks11isa_impl_clINS_12MCSectionELFEKNS_9MCSectionEE4doitERS3_: 74| 1.84k| static inline bool doit(const From &Val) { 75| 1.84k| return isa_impl::doit(Val); 76| 1.84k| } _ZN7llvm_ks8isa_implINS_12MCSectionELFENS_9MCSectionEvE4doitERKS2_: 55| 2.63k| static inline bool doit(const From &Val) { 56| 2.63k| return To::classof(&Val); 57| 2.63k| } _ZN7llvm_ks16cast_convert_valINS_12MCSectionELFENS_9MCSectionES2_E4doitERKS2_: 200| 1.84k| static typename cast_retty::ret_type doit(const FromTy &Val) { 201| 1.84k| typename cast_retty::ret_type Res2 202| 1.84k| = (typename cast_retty::ret_type)const_cast(Val); 203| 1.84k| return Res2; 204| 1.84k| } _ZN7llvm_ks12cast_or_nullINS_11MCSymbolELFEKNS_8MCSymbolEEENS_10cast_rettyIT_PT0_E8ret_typeES7_: 267| 399|cast_or_null(Y *Val) { 268| 399| if (!Val) return nullptr; ------------------ | Branch (268:7): [True: 1, False: 398] ------------------ 269| 399| assert(isa(Val) && "cast_or_null() argument of incompatible type!"); ------------------ | Branch (269:3): [True: 398, False: 0] | Branch (269:3): [True: 398, Folded] | Branch (269:3): [True: 398, False: 0] ------------------ 270| 398| return cast(Val); 271| 398|} _ZN7llvm_ks12cast_or_nullINS_12MCSectionELFEKNS_9MCSectionEEENS_10cast_rettyIT_PT0_E8ret_typeES7_: 267| 399|cast_or_null(Y *Val) { 268| 399| if (!Val) return nullptr; ------------------ | Branch (268:7): [True: 1, False: 398] ------------------ 269| 399| assert(isa(Val) && "cast_or_null() argument of incompatible type!"); ------------------ | Branch (269:3): [True: 398, False: 0] | Branch (269:3): [True: 398, Folded] | Branch (269:3): [True: 398, False: 0] ------------------ 270| 398| return cast(Val); 271| 398|} _ZN7llvm_ks3isaINS_12MCSectionELFEPKNS_9MCSectionEEEbRKT0_: 132| 796|LLVM_ATTRIBUTE_UNUSED_RESULT inline bool isa(const Y &Val) { 133| 796| return isa_impl_wrap::SimpleType>::doit(Val); 135| 796|} _ZN7llvm_ks13isa_impl_wrapINS_12MCSectionELFEKPKNS_9MCSectionES4_E4doitERS5_: 111| 796| static bool doit(const From &Val) { 112| 796| return isa_impl_wrap::SimpleType>::doit( 114| 796| simplify_type::getSimplifiedValue(Val)); 115| 796| } _ZN7llvm_ks13isa_impl_wrapINS_12MCSectionELFEPKNS_9MCSectionES4_E4doitERKS4_: 121| 796| static bool doit(const FromTy &Val) { 122| 796| return isa_impl_cl::doit(Val); 123| 796| } _ZN7llvm_ks11isa_impl_clINS_12MCSectionELFEPKNS_9MCSectionEE4doitES4_: 94| 796| static inline bool doit(const From *Val) { 95| 796| assert(Val && "isa<> used on a null pointer"); ------------------ | Branch (95:5): [True: 796, False: 0] | Branch (95:5): [True: 796, Folded] | Branch (95:5): [True: 796, False: 0] ------------------ 96| 796| return isa_impl::doit(*Val); 97| 796| } _ZN7llvm_ks4castINS_12MCSectionELFEKNS_9MCSectionEEENS_10cast_rettyIT_PT0_E8ret_typeES7_: 236| 398|inline typename cast_retty::ret_type cast(Y *Val) { 237| 398| assert(isa(Val) && "cast() argument of incompatible type!"); ------------------ | Branch (237:3): [True: 398, False: 0] | Branch (237:3): [True: 398, Folded] | Branch (237:3): [True: 398, False: 0] ------------------ 238| 398| return cast_convert_val::SimpleType>::doit(Val); 240| 398|} _ZN7llvm_ks16cast_convert_valINS_12MCSectionELFEPKNS_9MCSectionES4_E4doitERKS4_: 200| 398| static typename cast_retty::ret_type doit(const FromTy &Val) { 201| 398| typename cast_retty::ret_type Res2 202| 398| = (typename cast_retty::ret_type)const_cast(Val); 203| 398| return Res2; 204| 398| } _ZN7llvm_ks7ErrorOrINSt3__110unique_ptrINS_12MemoryBufferENS1_14default_deleteIS3_EEEEEC2ES6_: 110| 749| ErrorOr(T Val) : HasError(false) { 111| 749| new (getStorage()) storage_type(moveIfMoveConstructible(Val)); 112| 749| } _ZN7llvm_ks7ErrorOrINSt3__110unique_ptrINS_12MemoryBufferENS1_14default_deleteIS3_EEEEE10getStorageEv: 262| 2.24k| storage_type *getStorage() { 263| 2.24k| assert(!HasError && "Cannot get value when an error exists!"); ------------------ | Branch (263:5): [True: 2.24k, False: 0] | Branch (263:5): [True: 2.24k, Folded] | Branch (263:5): [True: 2.24k, False: 0] ------------------ 264| 2.24k| return reinterpret_cast(TStorage.buffer); 265| 2.24k| } _ZN7llvm_ks23moveIfMoveConstructibleINSt3__110unique_ptrINS_12MemoryBufferENS1_14default_deleteIS3_EEEES6_EEONS1_9enable_ifIXsr3std16is_constructibleIT_T0_EE5valueENS1_16remove_referenceIS9_E4typeEE4typeERS9_: 29| 749| moveIfMoveConstructible(V &Val) { 30| 749| return std::move(Val); 31| 749|} _ZN7llvm_ks7ErrorOrINSt3__110unique_ptrINS_12MemoryBufferENS1_14default_deleteIS3_EEEEED2Ev: 166| 749| ~ErrorOr() { 167| 749| if (!HasError) ------------------ | Branch (167:9): [True: 749, False: 0] ------------------ 168| 749| getStorage()->~storage_type(); 169| 749| } _ZNK7llvm_ks7ErrorOrINSt3__110unique_ptrINS_12MemoryBufferENS1_14default_deleteIS3_EEEEE8getErrorEv: 179| 749| std::error_code getError() const { 180| 749| return HasError ? *getErrorStorage() : std::error_code(); ------------------ | Branch (180:12): [True: 0, False: 749] ------------------ 181| 749| } _ZN7llvm_ks7ErrorOrINSt3__110unique_ptrINS_12MemoryBufferENS1_14default_deleteIS3_EEEEEdeEv: 189| 749| reference operator *() { 190| 749| return *getStorage(); 191| 749| } _ZN7llvm_ks3sys2fs8UniqueIDC2Emm: 123| 1.49k| UniqueID(uint64_t Device, uint64_t File) : Device(Device), File(File) {} _ZNK7llvm_ks3sys2fs8UniqueIDeqERKS2_: 124| 749| bool operator==(const UniqueID &Other) const { 125| 749| return Device == Other.Device && File == Other.File; ------------------ | Branch (125:12): [True: 749, False: 0] | Branch (125:38): [True: 749, False: 0] ------------------ 126| 749| } _ZN7llvm_ks3sys2fs11file_statusC2Ev: 161| 1.49k| file_status() : fs_st_dev(0), fs_st_ino(0), fs_st_mtime(0), 162| 1.49k| fs_st_uid(0), fs_st_gid(0), fs_st_size(0), 163| 1.49k| Type(file_type::status_error), Perms(perms_not_known) {} _ZN7llvm_ks3sys2fs11file_statusC2ENS1_9file_typeENS1_5permsEmmljjl: 171| 1.49k| : fs_st_dev(Dev), fs_st_ino(Ino), fs_st_mtime(MTime), fs_st_uid(UID), 172| 1.49k| fs_st_gid(GID), fs_st_size(Size), Type(Type), Perms(Perms) {} _ZN7llvm_ks6isUIntILj16EEEbm: 298| 1|inline bool isUInt<16>(uint64_t x) { 299| 1| return static_cast(x) == x; 300| 1|} _ZN7llvm_ks6isUIntILj32EEEbm: 302| 895|inline bool isUInt<32>(uint64_t x) { 303| 895| return static_cast(x) == x; 304| 895|} _ZN7llvm_ks7isUIntNEjm: 315| 140k|inline bool isUIntN(unsigned N, uint64_t x) { 316| 140k| return N >= 64 || x < (UINT64_C(1)<<(N)); ------------------ | Branch (316:10): [True: 490, False: 139k] | Branch (316:21): [True: 139k, False: 249] ------------------ 317| 140k|} _ZN7llvm_ks6isIntNEjl: 321| 250|inline bool isIntN(unsigned N, int64_t x) { 322| 250| return N >= 64 || (-(INT64_C(1)<<(N-1)) <= x && x < (INT64_C(1)<<(N-1))); ------------------ | Branch (322:10): [True: 0, False: 250] | Branch (322:22): [True: 249, False: 1] | Branch (322:51): [True: 11, False: 238] ------------------ 323| 250|} _ZN7llvm_ks13isPowerOf2_32Ej: 354| 10|inline bool isPowerOf2_32(uint32_t Value) { 355| 10| return Value && !(Value & (Value - 1)); ------------------ | Branch (355:10): [True: 10, False: 0] | Branch (355:19): [True: 10, False: 0] ------------------ 356| 10|} _ZN7llvm_ks13isPowerOf2_64Em: 360| 174k|inline bool isPowerOf2_64(uint64_t Value) { 361| 174k| return Value && !(Value & (Value - int64_t(1L))); ------------------ | Branch (361:10): [True: 174k, False: 0] | Branch (361:19): [True: 174k, False: 0] ------------------ 362| 174k|} _ZN7llvm_ks7Log2_32Ej: 468| 10|inline unsigned Log2_32(uint32_t Value) { 469| 10| return 31 - countLeadingZeros(Value); 470| 10|} _ZN7llvm_ks9alignAddrEPKvm: 565| 174k|inline uintptr_t alignAddr(const void *Addr, size_t Alignment) { 566| 174k| assert(Alignment && isPowerOf2_64((uint64_t)Alignment) && ------------------ | Branch (566:3): [True: 174k, False: 0] | Branch (566:3): [True: 174k, False: 0] | Branch (566:3): [True: 174k, Folded] | Branch (566:3): [True: 174k, False: 0] ------------------ 567| 174k| "Alignment is not a power of two!"); 568| | 569| 174k| assert((uintptr_t)Addr + Alignment - 1 >= (uintptr_t)Addr); ------------------ | Branch (569:3): [True: 174k, False: 0] ------------------ 570| | 571| 174k| return (((uintptr_t)Addr + Alignment - 1) & ~(uintptr_t)(Alignment - 1)); 572| 174k|} _ZN7llvm_ks19alignmentAdjustmentEPKvm: 576| 163k|inline size_t alignmentAdjustment(const void *Ptr, size_t Alignment) { 577| 163k| return alignAddr(Ptr, Alignment) - (uintptr_t)Ptr; 578| 163k|} _ZN7llvm_ks12NextPowerOf2Em: 582| 1.85k|inline uint64_t NextPowerOf2(uint64_t A) { 583| 1.85k| A |= (A >> 1); 584| 1.85k| A |= (A >> 2); 585| 1.85k| A |= (A >> 4); 586| 1.85k| A |= (A >> 8); 587| 1.85k| A |= (A >> 16); 588| 1.85k| A |= (A >> 32); 589| 1.85k| return A + 1; 590| 1.85k|} _ZN7llvm_ks7alignToEmmm: 619| 7.79k|inline uint64_t alignTo(uint64_t Value, uint64_t Align, uint64_t Skew = 0) { 620| 7.79k| Skew %= Align; 621| 7.79k| return (Value + Align - 1 - Skew) / Align * Align + Skew; 622| 7.79k|} _ZN7llvm_ks17OffsetToAlignmentEmm: 627| 802|inline uint64_t OffsetToAlignment(uint64_t Value, uint64_t Align) { 628| 802| return alignTo(Value, Align) - Value; 629| 802|} _ZN7llvm_ks17countLeadingZerosIjEEmT_NS_12ZeroBehaviorE: 178| 10|std::size_t countLeadingZeros(T Val, ZeroBehavior ZB = ZB_Width) { 179| 10| static_assert(std::numeric_limits::is_integer && 180| 10| !std::numeric_limits::is_signed, 181| 10| "Only unsigned integral types are allowed."); 182| 10| return detail::LeadingZerosCounter::count(Val, ZB); 183| 10|} _ZN7llvm_ks6detail19LeadingZerosCounterIjLm4EE5countEjNS_12ZeroBehaviorE: 137| 10| static std::size_t count(T Val, ZeroBehavior ZB) { 138| 10| if (ZB != ZB_Undefined && Val == 0) ------------------ | Branch (138:9): [True: 10, False: 0] | Branch (138:31): [True: 0, False: 10] ------------------ 139| 0| return 32; 140| | 141| 10|#if __has_builtin(__builtin_clz) || LLVM_GNUC_PREREQ(4, 0, 0) 142| 10| return __builtin_clz(Val); 143| |#elif defined(_MSC_VER) 144| | unsigned long Index; 145| | _BitScanReverse(&Index, Val); 146| | return Index ^ 31; 147| |#endif 148| 10| } _ZN7llvm_ks17countLeadingZerosImEEmT_NS_12ZeroBehaviorE: 178| 172k|std::size_t countLeadingZeros(T Val, ZeroBehavior ZB = ZB_Width) { 179| 172k| static_assert(std::numeric_limits::is_integer && 180| 172k| !std::numeric_limits::is_signed, 181| 172k| "Only unsigned integral types are allowed."); 182| 172k| return detail::LeadingZerosCounter::count(Val, ZB); 183| 172k|} _ZN7llvm_ks6detail19LeadingZerosCounterImLm8EE5countEmNS_12ZeroBehaviorE: 153| 172k| static std::size_t count(T Val, ZeroBehavior ZB) { 154| 172k| if (ZB != ZB_Undefined && Val == 0) ------------------ | Branch (154:9): [True: 154k, False: 18.3k] | Branch (154:31): [True: 25.9k, False: 128k] ------------------ 155| 25.9k| return 64; 156| | 157| 146k|#if __has_builtin(__builtin_clzll) || LLVM_GNUC_PREREQ(4, 0, 0) 158| 146k| return __builtin_clzll(Val); 159| |#elif defined(_MSC_VER) 160| | unsigned long Index; 161| | _BitScanReverse64(&Index, Val); 162| | return Index ^ 63; 163| |#endif 164| 172k| } _ZN7llvm_ks18countTrailingZerosImEEmT_NS_12ZeroBehaviorE: 109| 4.61k|std::size_t countTrailingZeros(T Val, ZeroBehavior ZB = ZB_Width) { 110| 4.61k| static_assert(std::numeric_limits::is_integer && 111| 4.61k| !std::numeric_limits::is_signed, 112| 4.61k| "Only unsigned integral types are allowed."); 113| 4.61k| return detail::TrailingZerosCounter::count(Val, ZB); 114| 4.61k|} _ZN7llvm_ks6detail20TrailingZerosCounterImLm8EE5countEmNS_12ZeroBehaviorE: 84| 4.61k| static std::size_t count(T Val, ZeroBehavior ZB) { 85| 4.61k| if (ZB != ZB_Undefined && Val == 0) ------------------ | Branch (85:9): [True: 0, False: 4.61k] | Branch (85:31): [True: 0, False: 0] ------------------ 86| 0| return 64; 87| | 88| 4.61k|#if __has_builtin(__builtin_ctzll) || LLVM_GNUC_PREREQ(4, 0, 0) 89| 4.61k| return __builtin_ctzll(Val); 90| |#elif defined(_MSC_VER) 91| | unsigned long Index; 92| | _BitScanForward64(&Index, Val); 93| | return Index; 94| |#endif 95| 4.61k| } _ZN7llvm_ks15countPopulationImEEjT_: 449| 15.1k|inline unsigned countPopulation(T Value) { 450| 15.1k| static_assert(std::numeric_limits::is_integer && 451| 15.1k| !std::numeric_limits::is_signed, 452| 15.1k| "Only unsigned integral types are allowed."); 453| 15.1k| return detail::PopulationCounter::count(Value); 454| 15.1k|} _ZN7llvm_ks6detail17PopulationCounterImLm8EE5countEm: 431| 15.1k| static unsigned count(T Value) { 432| 15.1k|#if __GNUC__ >= 4 433| 15.1k| return __builtin_popcountll(Value); 434| |#else 435| | uint64_t v = Value; 436| | v = v - ((v >> 1) & 0x5555555555555555ULL); 437| | v = (v & 0x3333333333333333ULL) + ((v >> 2) & 0x3333333333333333ULL); 438| | v = (v + (v >> 4)) & 0x0F0F0F0F0F0F0F0FULL; 439| | return unsigned((uint64_t)(v * 0x0101010101010101ULL) >> 56); 440| |#endif 441| 15.1k| } _ZN7llvm_ks12findFirstSetImEET_S1_NS_12ZeroBehaviorE: 192| 4.61k|template T findFirstSet(T Val, ZeroBehavior ZB = ZB_Max) { 193| 4.61k| if (ZB == ZB_Max && Val == 0) ------------------ | Branch (193:7): [True: 4.61k, False: 0] | Branch (193:23): [True: 0, False: 4.61k] ------------------ 194| 0| return std::numeric_limits::max(); 195| | 196| 4.61k| return countTrailingZeros(Val, ZB_Undefined); 197| 4.61k|} _ZN7llvm_ks11findLastSetImEET_S1_NS_12ZeroBehaviorE: 206| 18.3k|template T findLastSet(T Val, ZeroBehavior ZB = ZB_Max) { 207| 18.3k| if (ZB == ZB_Max && Val == 0) ------------------ | Branch (207:7): [True: 18.3k, False: 0] | Branch (207:23): [True: 0, False: 18.3k] ------------------ 208| 0| return std::numeric_limits::max(); 209| | 210| | // Use ^ instead of - because both gcc and llvm can remove the associated ^ 211| | // in the __builtin_clz intrinsic on x86. 212| 18.3k| return countLeadingZeros(Val, ZB_Undefined) ^ 213| 18.3k| (std::numeric_limits::digits - 1); 214| 18.3k|} _ZN7llvm_ks6isUIntILj7EEEbm: 289| 148|inline bool isUInt(uint64_t x) { 290| 148| return N >= 64 || x < (UINT64_C(1)<<(N)); ------------------ | Branch (290:10): [Folded, False: 148] | Branch (290:21): [True: 118, False: 30] ------------------ 291| 148|} _ZN7llvm_ks5isIntILj11EEEbl: 263| 8|inline bool isInt(int64_t x) { 264| 8| return N >= 64 || (-(INT64_C(1)<<(N-1)) <= x && x < (INT64_C(1)<<(N-1))); ------------------ | Branch (264:10): [Folded, False: 8] | Branch (264:22): [True: 8, False: 0] | Branch (264:51): [True: 0, False: 8] ------------------ 265| 8|} _ZN7llvm_ks5isIntILj9EEEbl: 263| 1|inline bool isInt(int64_t x) { 264| 1| return N >= 64 || (-(INT64_C(1)<<(N-1)) <= x && x < (INT64_C(1)<<(N-1))); ------------------ | Branch (264:10): [Folded, False: 1] | Branch (264:22): [True: 0, False: 1] | Branch (264:51): [True: 0, False: 0] ------------------ 265| 1|} _ZN7llvm_ks12MemoryBufferC2Ev: 43| 7.74k| MemoryBuffer() {} _ZNK7llvm_ks12MemoryBuffer14getBufferStartEv: 49| 417k| const char *getBufferStart() const { return BufferStart; } _ZNK7llvm_ks12MemoryBuffer12getBufferEndEv: 50| 192k| const char *getBufferEnd() const { return BufferEnd; } _ZNK7llvm_ks12MemoryBuffer13getBufferSizeEv: 51| 8.10k| size_t getBufferSize() const { return BufferEnd-BufferStart; } _ZNK7llvm_ks12MemoryBuffer9getBufferEv: 53| 8.10k| StringRef getBuffer() const { 54| 8.10k| return StringRef(BufferStart, getBufferSize()); 55| 8.10k| } _ZNK7llvm_ks3sys4path14const_iteratordeEv: 61| 1.49k| reference operator*() const { return Component; } _ZNK7llvm_ks3sys4path14const_iteratorptEv: 62| 749| pointer operator->() const { return &Component; } _ZNK7llvm_ks3sys4path14const_iteratorneERKS2_: 65| 749| bool operator!=(const const_iterator &RHS) const { return !(*this == RHS); } _ZN7llvm_ks21PointerLikeTypeTraitsIPNS_10MCFragmentEE16getAsVoidPointerES2_: 41| 18.3k| static inline void *getAsVoidPointer(T *P) { return P; } _ZN7llvm_ks21PointerLikeTypeTraitsIPNS_10MCFragmentEE18getFromVoidPointerEPv: 42| 79.5k| static inline T *getFromVoidPointer(void *P) { return static_cast(P); } _ZN7llvm_ks21PointerLikeTypeTraitsIPKNS_8MCSymbolEE16getAsVoidPointerES3_: 68| 2.17k| static inline const void *getAsVoidPointer(const T *P) { 69| 2.17k| return NonConst::getAsVoidPointer(const_cast(P)); 70| 2.17k| } _ZN7llvm_ks21PointerLikeTypeTraitsIPNS_8MCSymbolEE16getAsVoidPointerES2_: 41| 2.17k| static inline void *getAsVoidPointer(T *P) { return P; } _ZN7llvm_ks5SMLocC2Ev: 27| 357M| SMLoc() : Ptr(nullptr) {} _ZNK7llvm_ks5SMLoc7isValidEv: 29| 46.3k| bool isValid() const { return Ptr != nullptr; } _ZNK7llvm_ks5SMLoceqERKS0_: 31| 21.3k| bool operator==(const SMLoc &RHS) const { return RHS.Ptr == Ptr; } _ZNK7llvm_ks5SMLocneERKS0_: 32| 357M| bool operator!=(const SMLoc &RHS) const { return RHS.Ptr != Ptr; } _ZNK7llvm_ks5SMLoc10getPointerEv: 34| 591k| const char *getPointer() const { return Ptr; } _ZN7llvm_ks5SMLoc14getFromPointerEPKc: 36| 357M| static SMLoc getFromPointer(const char *Ptr) { 37| 357M| SMLoc L; 38| 357M| L.Ptr = Ptr; 39| 357M| return L; 40| 357M| } _ZN7llvm_ks9SourceMgrC2Ev: 80| 749| : LineNoCache(nullptr), DiagHandler(nullptr), DiagContext(nullptr) {} _ZN7llvm_ks9SourceMgr12clearBuffersEv: 121| 749| void clearBuffers() { 122| 749| Buffers.clear(); 123| 749| } _ZN7llvm_ks9SourceMgr18AddNewSourceBufferENSt3__110unique_ptrINS_12MemoryBufferENS1_14default_deleteIS3_EEEENS_5SMLocE: 128| 7.74k| SMLoc IncludeLoc) { 129| 7.74k| SrcBuffer NB; 130| 7.74k| NB.Buffer = std::move(F); 131| 7.74k| NB.IncludeLoc = IncludeLoc; 132| 7.74k| Buffers.push_back(std::move(NB)); 133| 7.74k| return Buffers.size(); 134| 7.74k| } _ZN7llvm_ks9SourceMgr9SrcBufferC2Ev: 55| 7.74k| SrcBuffer() {} _ZN7llvm_ks9SourceMgr9SrcBufferC2EOS1_: 58| 17.8k| : Buffer(std::move(O.Buffer)), IncludeLoc(O.IncludeLoc) {} _ZNK7llvm_ks9SourceMgr15isValidBufferIDEj: 74| 120k| bool isValidBufferID(unsigned i) const { return i && i <= Buffers.size(); } ------------------ | Branch (74:51): [True: 120k, False: 0] | Branch (74:56): [True: 120k, False: 0] ------------------ _ZN7llvm_ks9SourceMgr14setDiagHandlerEPFvRKNS_12SMDiagnosticEPvES4_: 89| 1.49k| void setDiagHandler(DiagHandlerTy DH, void *Ctx = nullptr) { 90| 1.49k| DiagHandler = DH; 91| 1.49k| DiagContext = Ctx; 92| 1.49k| } _ZNK7llvm_ks9SourceMgr14getDiagHandlerEv: 94| 749| DiagHandlerTy getDiagHandler() const { return DiagHandler; } _ZNK7llvm_ks9SourceMgr14getDiagContextEv: 95| 749| void *getDiagContext() const { return DiagContext; } _ZNK7llvm_ks9SourceMgr15getMemoryBufferEj: 102| 98.7k| const MemoryBuffer *getMemoryBuffer(unsigned i) const { 103| 98.7k| assert(isValidBufferID(i)); ------------------ | Branch (103:5): [True: 98.7k, False: 0] ------------------ 104| 98.7k| return Buffers[i - 1].Buffer.get(); 105| 98.7k| } _ZNK7llvm_ks9SourceMgr13getNumBuffersEv: 107| 46.4k| unsigned getNumBuffers() const { 108| 46.4k| return Buffers.size(); 109| 46.4k| } _ZNK7llvm_ks9SourceMgr13getMainFileIDEv: 111| 45.7k| unsigned getMainFileID() const { 112| 45.7k| assert(getNumBuffers()); ------------------ | Branch (112:5): [True: 45.7k, False: 0] ------------------ 113| 45.7k| return 1; 114| 45.7k| } _ZNK7llvm_ks9SourceMgr19getParentIncludeLocEj: 116| 21.9k| SMLoc getParentIncludeLoc(unsigned i) const { 117| 21.9k| assert(isValidBufferID(i)); ------------------ | Branch (117:5): [True: 21.9k, False: 0] ------------------ 118| 21.9k| return Buffers[i - 1].IncludeLoc; 119| 21.9k| } _ZNK7llvm_ks9SourceMgr14FindLineNumberENS_5SMLocEj: 152| 686| unsigned FindLineNumber(SMLoc Loc, unsigned BufferID = 0) const { 153| 686| return getLineAndColumn(Loc, BufferID).first; 154| 686| } _ZNK7llvm_ks12SMDiagnostic12getSourceMgrEv: 263| 46.3k| const SourceMgr *getSourceMgr() const { return SM; } _ZNK7llvm_ks12SMDiagnostic6getLocEv: 264| 46.3k| SMLoc getLoc() const { return Loc; } _ZNK7llvm_ks12SMDiagnostic11getColumnNoEv: 267| 343| int getColumnNo() const { return ColumnNo; } _ZNK7llvm_ks12SMDiagnostic7getKindEv: 268| 343| SourceMgr::DiagKind getKind() const { return Kind; } _ZNK7llvm_ks12SMDiagnostic10getMessageEv: 269| 343| StringRef getMessage() const { return Message; } _ZNK7llvm_ks12SMDiagnostic15getLineContentsEv: 270| 343| StringRef getLineContents() const { return LineContents; } _ZNK7llvm_ks12SMDiagnostic9getRangesEv: 271| 343| ArrayRef > getRanges() const { 272| 343| return Ranges; 273| 343| } _ZN7llvm_ks11StringSaverC2ERNS_20BumpPtrAllocatorImplINS_15MallocAllocatorELm4096ELm4096EEE: 25| 749| StringSaver(BumpPtrAllocator &Alloc) : Alloc(Alloc) {} _ZNK7llvm_ks6Target15createMCRegInfoENS_9StringRefE: 260| 749| MCRegisterInfo *createMCRegInfo(StringRef TT) const { 261| 749| if (!MCRegInfoCtorFn) ------------------ | Branch (261:9): [True: 0, False: 749] ------------------ 262| 0| return nullptr; 263| 749| return MCRegInfoCtorFn(Triple(TT)); 264| 749| } _ZNK7llvm_ks6Target15createMCAsmInfoERKNS_14MCRegisterInfoENS_9StringRefE: 236| 749| StringRef TheTriple) const { 237| 749| if (!MCAsmInfoCtorFn) ------------------ | Branch (237:9): [True: 0, False: 749] ------------------ 238| 0| return nullptr; 239| 749| return MCAsmInfoCtorFn(MRI, Triple(TheTriple)); 240| 749| } _ZNK7llvm_ks6Target17createMCInstrInfoEv: 244| 749| MCInstrInfo *createMCInstrInfo() const { 245| 749| if (!MCInstrInfoCtorFn) ------------------ | Branch (245:9): [True: 0, False: 749] ------------------ 246| 0| return nullptr; 247| 749| return MCInstrInfoCtorFn(); 248| 749| } _ZNK7llvm_ks6Target21createMCSubtargetInfoENS_9StringRefES1_S1_: 276| 749| StringRef Features) const { 277| 749| if (!MCSubtargetInfoCtorFn) ------------------ | Branch (277:9): [True: 0, False: 749] ------------------ 278| 0| return nullptr; 279| 749| return MCSubtargetInfoCtorFn(Triple(TheTriple), CPU, Features); 280| 749| } _ZNK7llvm_ks6Target18createMCAsmBackendERKNS_14MCRegisterInfoENS_9StringRefES4_: 301| 749| StringRef TheTriple, StringRef CPU) const { 302| 749| if (!MCAsmBackendCtorFn) ------------------ | Branch (302:9): [True: 0, False: 749] ------------------ 303| 0| return nullptr; 304| 749| return MCAsmBackendCtorFn(*this, MRI, Triple(TheTriple), CPU); 305| 749| } _ZNK7llvm_ks6Target19createMCCodeEmitterERKNS_11MCInstrInfoERKNS_14MCRegisterInfoERNS_9MCContextE: 338| 749| MCContext &Ctx) const { 339| 749| if (!MCCodeEmitterCtorFn) ------------------ | Branch (339:9): [True: 0, False: 749] ------------------ 340| 0| return nullptr; 341| 749| return MCCodeEmitterCtorFn(II, MRI, Ctx); 342| 749| } _ZNK7llvm_ks6Target22createMCObjectStreamerERKNS_6TripleERNS_9MCContextERNS_12MCAsmBackendERNS_17raw_pwrite_streamEPNS_13MCCodeEmitterERKNS_15MCSubtargetInfoEbb: 356| 749| bool DWARFMustBeAtTheEnd) const { 357| 749| MCStreamer *S; 358| 749| switch (T.getObjectFormat()) { 359| 0| default: ------------------ | Branch (359:5): [True: 0, False: 749] ------------------ 360| 0| llvm_unreachable("Unknown object format"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ 361| 749| case Triple::ELF: ------------------ | Branch (361:5): [True: 749, False: 0] ------------------ 362| 749| if (ELFStreamerCtorFn) ------------------ | Branch (362:11): [True: 0, False: 749] ------------------ 363| 0| S = ELFStreamerCtorFn(T, Ctx, TAB, OS, Emitter, RelaxAll); 364| 749| else 365| 749| S = createELFStreamer(Ctx, TAB, OS, Emitter, RelaxAll); 366| 749| break; 367| 749| } 368| 749| if (ObjectTargetStreamerCtorFn) ------------------ | Branch (368:9): [True: 0, False: 749] ------------------ 369| 0| ObjectTargetStreamerCtorFn(*S, STI); 370| 749| return S; 371| 749| } _ZNK7llvm_ks6Target17createMCAsmParserERKNS_15MCSubtargetInfoERNS_11MCAsmParserERKNS_11MCInstrInfoERKNS_15MCTargetOptionsE: 320| 749| const MCTargetOptions &Options) const { 321| 749| if (!MCAsmParserCtorFn) ------------------ | Branch (321:9): [True: 0, False: 749] ------------------ 322| 0| return nullptr; 323| 749| return MCAsmParserCtorFn(STI, Parser, MII, Options); 324| 749| } _ZN7llvm_ks6TargetC2Ev: 198| 46| : ELFStreamerCtorFn(nullptr), NullTargetStreamerCtorFn(nullptr), 199| 46| AsmTargetStreamerCtorFn(nullptr), ObjectTargetStreamerCtorFn(nullptr), 200| 46| MCRelocationInfoCtorFn(nullptr) {} _ZNK7llvm_ks6Target7getNextEv: 206| 17.2k| const Target *getNext() const { return Next; } _ZN7llvm_ks14TargetRegistry8iteratorC2EPNS_6TargetE: 420| 5.24k| explicit iterator(Target *T) : Current(T) {} _ZN7llvm_ks14TargetRegistry8iteratorC2Ev: 424| 5.24k| iterator() : Current(nullptr) {} _ZNK7llvm_ks14TargetRegistry8iteratoreqERKS1_: 426| 20.2k| bool operator==(const iterator &x) const { return Current == x.Current; } _ZNK7llvm_ks14TargetRegistry8iteratorneERKS1_: 427| 18.7k| bool operator!=(const iterator &x) const { return !operator==(x); } _ZN7llvm_ks14TargetRegistry8iteratorppEv: 430| 17.2k| iterator &operator++() { // Preincrement 431| 17.2k| assert(Current && "Cannot increment end iterator!"); ------------------ | Branch (431:7): [True: 17.2k, False: 0] | Branch (431:7): [True: 17.2k, Folded] | Branch (431:7): [True: 17.2k, False: 0] ------------------ 432| 17.2k| Current = Current->getNext(); 433| 17.2k| return *this; 434| 17.2k| } _ZNK7llvm_ks14TargetRegistry8iteratordeEv: 441| 17.9k| const Target &operator*() const { 442| 17.9k| assert(Current && "Cannot dereference end iterator!"); ------------------ | Branch (442:7): [True: 17.9k, False: 0] | Branch (442:7): [True: 17.9k, Folded] | Branch (442:7): [True: 17.9k, False: 0] ------------------ 443| 17.9k| return *Current; 444| 17.9k| } _ZN7llvm_ks14TargetRegistry17RegisterMCAsmInfoERNS_6TargetEPFPNS_9MCAsmInfoERKNS_14MCRegisterInfoERKNS_6TripleEE: 508| 23| static void RegisterMCAsmInfo(Target &T, Target::MCAsmInfoCtorFnTy Fn) { 509| 23| T.MCAsmInfoCtorFn = Fn; 510| 23| } _ZN7llvm_ks14TargetRegistry19RegisterMCInstrInfoERNS_6TargetEPFPNS_11MCInstrInfoEvE: 521| 23| static void RegisterMCInstrInfo(Target &T, Target::MCInstrInfoCtorFnTy Fn) { 522| 23| T.MCInstrInfoCtorFn = Fn; 523| 23| } _ZN7llvm_ks14TargetRegistry17RegisterMCRegInfoERNS_6TargetEPFPNS_14MCRegisterInfoERKNS_6TripleEE: 541| 23| static void RegisterMCRegInfo(Target &T, Target::MCRegInfoCtorFnTy Fn) { 542| 23| T.MCRegInfoCtorFn = Fn; 543| 23| } _ZN7llvm_ks14TargetRegistry23RegisterMCSubtargetInfoERNS_6TargetEPFPNS_15MCSubtargetInfoERKNS_6TripleENS_9StringRefES8_E: 555| 23| Target::MCSubtargetInfoCtorFnTy Fn) { 556| 23| T.MCSubtargetInfoCtorFn = Fn; 557| 23| } _ZN7llvm_ks14TargetRegistry20RegisterMCAsmBackendERNS_6TargetEPFPNS_12MCAsmBackendERKS1_RKNS_14MCRegisterInfoERKNS_6TripleENS_9StringRefEE: 581| 21| static void RegisterMCAsmBackend(Target &T, Target::MCAsmBackendCtorTy Fn) { 582| 21| T.MCAsmBackendCtorFn = Fn; 583| 21| } _ZN7llvm_ks14TargetRegistry21RegisterMCAsmBackend2ERNS_6TargetEPFPNS_12MCAsmBackendERKS1_RKNS_14MCRegisterInfoERKNS_6TripleENS_9StringRefERKNS_15MCSubtargetInfoERKNS_15MCTargetOptionsEE: 584| 2| static void RegisterMCAsmBackend2(Target &T, Target::MCAsmBackendCtorTy2 Fn) { 585| 2| T.MCAsmBackendCtorFn2 = Fn; 586| 2| } _ZN7llvm_ks14TargetRegistry19RegisterMCAsmParserERNS_6TargetEPFPNS_17MCTargetAsmParserERKNS_15MCSubtargetInfoERNS_11MCAsmParserERKNS_11MCInstrInfoERKNS_15MCTargetOptionsEE: 597| 23| static void RegisterMCAsmParser(Target &T, Target::MCAsmParserCtorTy Fn) { 598| 23| T.MCAsmParserCtorFn = Fn; 599| 23| } _ZN7llvm_ks14TargetRegistry21RegisterMCCodeEmitterERNS_6TargetEPFPNS_13MCCodeEmitterERKNS_11MCInstrInfoERKNS_14MCRegisterInfoERNS_9MCContextEE: 623| 23| static void RegisterMCCodeEmitter(Target &T, Target::MCCodeEmitterCtorTy Fn) { 624| 23| T.MCCodeEmitterCtorFn = Fn; 625| 23| } _ZN7llvm_ks14TargetRegistry25RegisterAsmTargetStreamerERNS_6TargetEPFPNS_16MCTargetStreamerERNS_10MCStreamerERNS_21formatted_raw_ostreamEE: 637| 2| Target::AsmTargetStreamerCtorTy Fn) { 638| 2| T.AsmTargetStreamerCtorFn = Fn; 639| 2| } _ZN7llvm_ks14TargetRegistry28RegisterObjectTargetStreamerERNS_6TargetEPFPNS_16MCTargetStreamerERNS_10MCStreamerERKNS_15MCSubtargetInfoEE: 643| 2| Target::ObjectTargetStreamerCtorTy Fn) { 644| 2| T.ObjectTargetStreamerCtorFn = Fn; 645| 2| } _ZN7llvm_ks14TargetRegistry24RegisterMCRelocationInfoERNS_6TargetEPFPNS_16MCRelocationInfoERKNS_6TripleERNS_9MCContextEE: 657| 2| Target::MCRelocationInfoCtorTy Fn) { 658| 2| T.MCRelocationInfoCtorFn = Fn; 659| 2| } _ZN7llvm_ks19RegisterMCAsmInfoFnC2ERNS_6TargetEPFPNS_9MCAsmInfoERKNS_14MCRegisterInfoERKNS_6TripleEE: 715| 20| RegisterMCAsmInfoFn(Target &T, Target::MCAsmInfoCtorFnTy Fn) { 716| 20| TargetRegistry::RegisterMCAsmInfo(T, Fn); 717| 20| } AArch64AsmParser.cpp:_ZN7llvm_ks19RegisterMCAsmParserIN12_GLOBAL__N_116AArch64AsmParserEEC2ERNS_6TargetE: 900| 3| RegisterMCAsmParser(Target &T) { 901| 3| TargetRegistry::RegisterMCAsmParser(T, &Allocator); 902| 3| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE3EEC2ERNS_6TargetEPKcS7_: 677| 1| RegisterTarget(Target &T, const char *Name, const char *Desc) { 678| 1| TargetRegistry::RegisterTarget(T, Name, Desc, &getArchMatch); 679| 1| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE3EE12getArchMatchES2_: 681| 749| static bool getArchMatch(Triple::ArchType Arch) { 682| 749| return Arch == TargetArchType; 683| 749| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE4EEC2ERNS_6TargetEPKcS7_: 677| 1| RegisterTarget(Target &T, const char *Name, const char *Desc) { 678| 1| TargetRegistry::RegisterTarget(T, Name, Desc, &getArchMatch); 679| 1| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE4EE12getArchMatchES2_: 681| 749| static bool getArchMatch(Triple::ArchType Arch) { 682| 749| return Arch == TargetArchType; 683| 749| } ARMAsmParser.cpp:_ZN7llvm_ks19RegisterMCAsmParserIN12_GLOBAL__N_112ARMAsmParserEEC2ERNS_6TargetE: 900| 4| RegisterMCAsmParser(Target &T) { 901| 4| TargetRegistry::RegisterMCAsmParser(T, &Allocator); 902| 4| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE1EEC2ERNS_6TargetEPKcS7_: 677| 1| RegisterTarget(Target &T, const char *Name, const char *Desc) { 678| 1| TargetRegistry::RegisterTarget(T, Name, Desc, &getArchMatch); 679| 1| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE1EE12getArchMatchES2_: 681| 749| static bool getArchMatch(Triple::ArchType Arch) { 682| 749| return Arch == TargetArchType; 683| 749| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE2EEC2ERNS_6TargetEPKcS7_: 677| 1| RegisterTarget(Target &T, const char *Name, const char *Desc) { 678| 1| TargetRegistry::RegisterTarget(T, Name, Desc, &getArchMatch); 679| 1| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE2EE12getArchMatchES2_: 681| 749| static bool getArchMatch(Triple::ArchType Arch) { 682| 749| return Arch == TargetArchType; 683| 749| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE26EEC2ERNS_6TargetEPKcS7_: 677| 1| RegisterTarget(Target &T, const char *Name, const char *Desc) { 678| 1| TargetRegistry::RegisterTarget(T, Name, Desc, &getArchMatch); 679| 1| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE26EE12getArchMatchES2_: 681| 749| static bool getArchMatch(Triple::ArchType Arch) { 682| 749| return Arch == TargetArchType; 683| 749| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE27EEC2ERNS_6TargetEPKcS7_: 677| 1| RegisterTarget(Target &T, const char *Name, const char *Desc) { 678| 1| TargetRegistry::RegisterTarget(T, Name, Desc, &getArchMatch); 679| 1| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE27EE12getArchMatchES2_: 681| 749| static bool getArchMatch(Triple::ArchType Arch) { 682| 749| return Arch == TargetArchType; 683| 749| } HexagonAsmParser.cpp:_ZN7llvm_ks19RegisterMCAsmParserIN12_GLOBAL__N_116HexagonAsmParserEEC2ERNS_6TargetE: 900| 1| RegisterMCAsmParser(Target &T) { 901| 1| TargetRegistry::RegisterMCAsmParser(T, &Allocator); 902| 1| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE8EEC2ERNS_6TargetEPKcS7_: 677| 1| RegisterTarget(Target &T, const char *Name, const char *Desc) { 678| 1| TargetRegistry::RegisterTarget(T, Name, Desc, &getArchMatch); 679| 1| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE8EE12getArchMatchES2_: 681| 749| static bool getArchMatch(Triple::ArchType Arch) { 682| 749| return Arch == TargetArchType; 683| 749| } MipsAsmParser.cpp:_ZN7llvm_ks19RegisterMCAsmParserIN12_GLOBAL__N_113MipsAsmParserEEC2ERNS_6TargetE: 900| 4| RegisterMCAsmParser(Target &T) { 901| 4| TargetRegistry::RegisterMCAsmParser(T, &Allocator); 902| 4| } MipsAsmParser.cpp:_ZN7llvm_ks19RegisterMCAsmParserIN12_GLOBAL__N_113MipsAsmParserEE9AllocatorERKNS_15MCSubtargetInfoERNS_11MCAsmParserERKNS_11MCInstrInfoERKNS_15MCTargetOptionsE: 907| 749| const MCTargetOptions &Options) { 908| 749| return new MCAsmParserImpl(STI, P, MII, Options); 909| 749| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE9EEC2ERNS_6TargetEPKcS7_: 677| 1| RegisterTarget(Target &T, const char *Name, const char *Desc) { 678| 1| TargetRegistry::RegisterTarget(T, Name, Desc, &getArchMatch); 679| 1| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE9EE12getArchMatchES2_: 681| 749| static bool getArchMatch(Triple::ArchType Arch) { 682| 749| return Arch == TargetArchType; 683| 749| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE10EEC2ERNS_6TargetEPKcS7_: 677| 1| RegisterTarget(Target &T, const char *Name, const char *Desc) { 678| 1| TargetRegistry::RegisterTarget(T, Name, Desc, &getArchMatch); 679| 1| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE10EE12getArchMatchES2_: 681| 749| static bool getArchMatch(Triple::ArchType Arch) { 682| 749| return Arch == TargetArchType; 683| 749| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE11EEC2ERNS_6TargetEPKcS7_: 677| 1| RegisterTarget(Target &T, const char *Name, const char *Desc) { 678| 1| TargetRegistry::RegisterTarget(T, Name, Desc, &getArchMatch); 679| 1| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE11EE12getArchMatchES2_: 681| 749| static bool getArchMatch(Triple::ArchType Arch) { 682| 749| return Arch == TargetArchType; 683| 749| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE12EEC2ERNS_6TargetEPKcS7_: 677| 1| RegisterTarget(Target &T, const char *Name, const char *Desc) { 678| 1| TargetRegistry::RegisterTarget(T, Name, Desc, &getArchMatch); 679| 1| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE12EE12getArchMatchES2_: 681| 749| static bool getArchMatch(Triple::ArchType Arch) { 682| 749| return Arch == TargetArchType; 683| 749| } PPCAsmParser.cpp:_ZN7llvm_ks19RegisterMCAsmParserIN12_GLOBAL__N_112PPCAsmParserEEC2ERNS_6TargetE: 900| 3| RegisterMCAsmParser(Target &T) { 901| 3| TargetRegistry::RegisterMCAsmParser(T, &Allocator); 902| 3| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE14EEC2ERNS_6TargetEPKcS7_: 677| 1| RegisterTarget(Target &T, const char *Name, const char *Desc) { 678| 1| TargetRegistry::RegisterTarget(T, Name, Desc, &getArchMatch); 679| 1| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE14EE12getArchMatchES2_: 681| 749| static bool getArchMatch(Triple::ArchType Arch) { 682| 749| return Arch == TargetArchType; 683| 749| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE15EEC2ERNS_6TargetEPKcS7_: 677| 1| RegisterTarget(Target &T, const char *Name, const char *Desc) { 678| 1| TargetRegistry::RegisterTarget(T, Name, Desc, &getArchMatch); 679| 1| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE15EE12getArchMatchES2_: 681| 749| static bool getArchMatch(Triple::ArchType Arch) { 682| 749| return Arch == TargetArchType; 683| 749| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE16EEC2ERNS_6TargetEPKcS7_: 677| 1| RegisterTarget(Target &T, const char *Name, const char *Desc) { 678| 1| TargetRegistry::RegisterTarget(T, Name, Desc, &getArchMatch); 679| 1| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE16EE12getArchMatchES2_: 681| 749| static bool getArchMatch(Triple::ArchType Arch) { 682| 749| return Arch == TargetArchType; 683| 749| } SparcAsmParser.cpp:_ZN7llvm_ks19RegisterMCAsmParserIN12_GLOBAL__N_114SparcAsmParserEEC2ERNS_6TargetE: 900| 3| RegisterMCAsmParser(Target &T) { 901| 3| TargetRegistry::RegisterMCAsmParser(T, &Allocator); 902| 3| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE21EEC2ERNS_6TargetEPKcS7_: 677| 1| RegisterTarget(Target &T, const char *Name, const char *Desc) { 678| 1| TargetRegistry::RegisterTarget(T, Name, Desc, &getArchMatch); 679| 1| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE21EE12getArchMatchES2_: 681| 749| static bool getArchMatch(Triple::ArchType Arch) { 682| 749| return Arch == TargetArchType; 683| 749| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE22EEC2ERNS_6TargetEPKcS7_: 677| 1| RegisterTarget(Target &T, const char *Name, const char *Desc) { 678| 1| TargetRegistry::RegisterTarget(T, Name, Desc, &getArchMatch); 679| 1| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE22EE12getArchMatchES2_: 681| 749| static bool getArchMatch(Triple::ArchType Arch) { 682| 749| return Arch == TargetArchType; 683| 749| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE23EEC2ERNS_6TargetEPKcS7_: 677| 1| RegisterTarget(Target &T, const char *Name, const char *Desc) { 678| 1| TargetRegistry::RegisterTarget(T, Name, Desc, &getArchMatch); 679| 1| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE23EE12getArchMatchES2_: 681| 749| static bool getArchMatch(Triple::ArchType Arch) { 682| 749| return Arch == TargetArchType; 683| 749| } SystemZAsmParser.cpp:_ZN7llvm_ks19RegisterMCAsmParserIN12_GLOBAL__N_116SystemZAsmParserEEC2ERNS_6TargetE: 900| 1| RegisterMCAsmParser(Target &T) { 901| 1| TargetRegistry::RegisterMCAsmParser(T, &Allocator); 902| 1| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE24EEC2ERNS_6TargetEPKcS7_: 677| 1| RegisterTarget(Target &T, const char *Name, const char *Desc) { 678| 1| TargetRegistry::RegisterTarget(T, Name, Desc, &getArchMatch); 679| 1| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE24EE12getArchMatchES2_: 681| 749| static bool getArchMatch(Triple::ArchType Arch) { 682| 749| return Arch == TargetArchType; 683| 749| } X86AsmParser.cpp:_ZN7llvm_ks19RegisterMCAsmParserIN12_GLOBAL__N_112X86AsmParserEEC2ERNS_6TargetE: 900| 2| RegisterMCAsmParser(Target &T) { 901| 2| TargetRegistry::RegisterMCAsmParser(T, &Allocator); 902| 2| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE28EEC2ERNS_6TargetEPKcS7_: 677| 1| RegisterTarget(Target &T, const char *Name, const char *Desc) { 678| 1| TargetRegistry::RegisterTarget(T, Name, Desc, &getArchMatch); 679| 1| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE28EE12getArchMatchES2_: 681| 749| static bool getArchMatch(Triple::ArchType Arch) { 682| 749| return Arch == TargetArchType; 683| 749| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE29EEC2ERNS_6TargetEPKcS7_: 677| 1| RegisterTarget(Target &T, const char *Name, const char *Desc) { 678| 1| TargetRegistry::RegisterTarget(T, Name, Desc, &getArchMatch); 679| 1| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE29EE12getArchMatchES2_: 681| 749| static bool getArchMatch(Triple::ArchType Arch) { 682| 749| return Arch == TargetArchType; 683| 749| } _ZN7llvm_ks19RegisterMCAsmParserINS_14RISCVAsmParserEEC2ERNS_6TargetE: 900| 2| RegisterMCAsmParser(Target &T) { 901| 2| TargetRegistry::RegisterMCAsmParser(T, &Allocator); 902| 2| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE18EEC2ERNS_6TargetEPKcS7_: 677| 1| RegisterTarget(Target &T, const char *Name, const char *Desc) { 678| 1| TargetRegistry::RegisterTarget(T, Name, Desc, &getArchMatch); 679| 1| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE18EE12getArchMatchES2_: 681| 749| static bool getArchMatch(Triple::ArchType Arch) { 682| 749| return Arch == TargetArchType; 683| 749| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE19EEC2ERNS_6TargetEPKcS7_: 677| 1| RegisterTarget(Target &T, const char *Name, const char *Desc) { 678| 1| TargetRegistry::RegisterTarget(T, Name, Desc, &getArchMatch); 679| 1| } _ZN7llvm_ks14RegisterTargetILNS_6Triple8ArchTypeE19EE12getArchMatchES2_: 681| 749| static bool getArchMatch(Triple::ArchType Arch) { 682| 749| return Arch == TargetArchType; 683| 749| } _ZN7llvm_ks24InitializeAllTargetInfosEv: 44| 1| inline void InitializeAllTargetInfos() { 45| 1|#define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##TargetInfo(); 46| 1|#include "llvm/Config/Targets.def" ------------------ | | 1| |/*===- llvm/Config/Targets.def - LLVM Target Architectures ------*- C++ -*-===*\ | | 2| ||* *| | | 3| ||* The LLVM Compiler Infrastructure *| | | 4| ||* *| | | 5| ||* This file is distributed under the University of Illinois Open Source *| | | 6| ||* License. See LICENSE.TXT for details. *| | | 7| ||* *| | | 8| ||*===----------------------------------------------------------------------===*| | | 9| ||* *| | | 10| ||* This file enumerates all of the target architectures supported by *| | | 11| ||* this build of LLVM. Clients of this file should define the *| | | 12| ||* LLVM_TARGET macro to be a function-like macro with a single *| | | 13| ||* parameter (the name of the target); including this file will then *| | | 14| ||* enumerate all of the targets. *| | | 15| ||* *| | | 16| ||* The set of targets supported by LLVM is generated at configuration *| | | 17| ||* time, at which point this header is generated. Do not modify this *| | | 18| ||* header directly. *| | | 19| ||* *| | | 20| |\*===----------------------------------------------------------------------===*/ | | 21| | | | 22| |#ifndef LLVM_TARGET | | 23| |# error Please define the macro LLVM_TARGET(TargetName) | | 24| |#endif | | 25| | | | 26| 1|LLVM_TARGET(AArch64) | | ------------------ | | | | 45| 1|#define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##TargetInfo(); | | ------------------ | | 27| 1|LLVM_TARGET(ARM) | | ------------------ | | | | 45| 1|#define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##TargetInfo(); | | ------------------ | | 28| 1|LLVM_TARGET(Hexagon) | | ------------------ | | | | 45| 1|#define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##TargetInfo(); | | ------------------ | | 29| 1|LLVM_TARGET(Mips) | | ------------------ | | | | 45| 1|#define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##TargetInfo(); | | ------------------ | | 30| 1|LLVM_TARGET(PowerPC) | | ------------------ | | | | 45| 1|#define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##TargetInfo(); | | ------------------ | | 31| 1|LLVM_TARGET(Sparc) | | ------------------ | | | | 45| 1|#define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##TargetInfo(); | | ------------------ | | 32| 1|LLVM_TARGET(SystemZ) | | ------------------ | | | | 45| 1|#define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##TargetInfo(); | | ------------------ | | 33| 1|LLVM_TARGET(X86) | | ------------------ | | | | 45| 1|#define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##TargetInfo(); | | ------------------ | | 34| 1|LLVM_TARGET(RISCV) | | ------------------ | | | | 45| 1|#define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##TargetInfo(); | | ------------------ | | 35| | | | 36| | | | 37| 1|#undef LLVM_TARGET ------------------ 47| 1| } _ZN7llvm_ks22InitializeAllTargetMCsEv: 67| 1| inline void InitializeAllTargetMCs() { 68| 1|#define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##TargetMC(); 69| 1|#include "llvm/Config/Targets.def" ------------------ | | 1| |/*===- llvm/Config/Targets.def - LLVM Target Architectures ------*- C++ -*-===*\ | | 2| ||* *| | | 3| ||* The LLVM Compiler Infrastructure *| | | 4| ||* *| | | 5| ||* This file is distributed under the University of Illinois Open Source *| | | 6| ||* License. See LICENSE.TXT for details. *| | | 7| ||* *| | | 8| ||*===----------------------------------------------------------------------===*| | | 9| ||* *| | | 10| ||* This file enumerates all of the target architectures supported by *| | | 11| ||* this build of LLVM. Clients of this file should define the *| | | 12| ||* LLVM_TARGET macro to be a function-like macro with a single *| | | 13| ||* parameter (the name of the target); including this file will then *| | | 14| ||* enumerate all of the targets. *| | | 15| ||* *| | | 16| ||* The set of targets supported by LLVM is generated at configuration *| | | 17| ||* time, at which point this header is generated. Do not modify this *| | | 18| ||* header directly. *| | | 19| ||* *| | | 20| |\*===----------------------------------------------------------------------===*/ | | 21| | | | 22| |#ifndef LLVM_TARGET | | 23| |# error Please define the macro LLVM_TARGET(TargetName) | | 24| |#endif | | 25| | | | 26| 1|LLVM_TARGET(AArch64) | | ------------------ | | | | 68| 1|#define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##TargetMC(); | | ------------------ | | 27| 1|LLVM_TARGET(ARM) | | ------------------ | | | | 68| 1|#define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##TargetMC(); | | ------------------ | | 28| 1|LLVM_TARGET(Hexagon) | | ------------------ | | | | 68| 1|#define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##TargetMC(); | | ------------------ | | 29| 1|LLVM_TARGET(Mips) | | ------------------ | | | | 68| 1|#define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##TargetMC(); | | ------------------ | | 30| 1|LLVM_TARGET(PowerPC) | | ------------------ | | | | 68| 1|#define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##TargetMC(); | | ------------------ | | 31| 1|LLVM_TARGET(Sparc) | | ------------------ | | | | 68| 1|#define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##TargetMC(); | | ------------------ | | 32| 1|LLVM_TARGET(SystemZ) | | ------------------ | | | | 68| 1|#define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##TargetMC(); | | ------------------ | | 33| 1|LLVM_TARGET(X86) | | ------------------ | | | | 68| 1|#define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##TargetMC(); | | ------------------ | | 34| 1|LLVM_TARGET(RISCV) | | ------------------ | | | | 68| 1|#define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##TargetMC(); | | ------------------ | | 35| | | | 36| | | | 37| 1|#undef LLVM_TARGET ------------------ 70| 1| } _ZN7llvm_ks23InitializeAllAsmParsersEv: 85| 1| inline void InitializeAllAsmParsers() { 86| 1|#define LLVM_ASM_PARSER(TargetName) LLVMInitialize##TargetName##AsmParser(); 87| 1|#include "llvm/Config/AsmParsers.def" ------------------ | | 1| |/*===- llvm/Config/AsmParsers.def - LLVM Assembly Parsers -------*- C++ -*-===*\ | | 2| ||* *| | | 3| ||* The LLVM Compiler Infrastructure *| | | 4| ||* *| | | 5| ||* This file is distributed under the University of Illinois Open Source *| | | 6| ||* License. See LICENSE.TXT for details. *| | | 7| ||* *| | | 8| ||*===----------------------------------------------------------------------===*| | | 9| ||* *| | | 10| ||* This file enumerates all of the assembly-language parsers *| | | 11| ||* supported by this build of LLVM. Clients of this file should define *| | | 12| ||* the LLVM_ASM_PARSER macro to be a function-like macro with a *| | | 13| ||* single parameter (the name of the target whose assembly can be *| | | 14| ||* generated); including this file will then enumerate all of the *| | | 15| ||* targets with assembly parsers. *| | | 16| ||* *| | | 17| ||* The set of targets supported by LLVM is generated at configuration *| | | 18| ||* time, at which point this header is generated. Do not modify this *| | | 19| ||* header directly. *| | | 20| ||* *| | | 21| |\*===----------------------------------------------------------------------===*/ | | 22| | | | 23| |#ifndef LLVM_ASM_PARSER | | 24| |# error Please define the macro LLVM_ASM_PARSER(TargetName) | | 25| |#endif | | 26| | | | 27| 1|LLVM_ASM_PARSER(AArch64) | | ------------------ | | | | 86| 1|#define LLVM_ASM_PARSER(TargetName) LLVMInitialize##TargetName##AsmParser(); | | ------------------ | | 28| 1|LLVM_ASM_PARSER(ARM) | | ------------------ | | | | 86| 1|#define LLVM_ASM_PARSER(TargetName) LLVMInitialize##TargetName##AsmParser(); | | ------------------ | | 29| 1|LLVM_ASM_PARSER(Hexagon) | | ------------------ | | | | 86| 1|#define LLVM_ASM_PARSER(TargetName) LLVMInitialize##TargetName##AsmParser(); | | ------------------ | | 30| 1|LLVM_ASM_PARSER(Mips) | | ------------------ | | | | 86| 1|#define LLVM_ASM_PARSER(TargetName) LLVMInitialize##TargetName##AsmParser(); | | ------------------ | | 31| 1|LLVM_ASM_PARSER(PowerPC) | | ------------------ | | | | 86| 1|#define LLVM_ASM_PARSER(TargetName) LLVMInitialize##TargetName##AsmParser(); | | ------------------ | | 32| 1|LLVM_ASM_PARSER(Sparc) | | ------------------ | | | | 86| 1|#define LLVM_ASM_PARSER(TargetName) LLVMInitialize##TargetName##AsmParser(); | | ------------------ | | 33| 1|LLVM_ASM_PARSER(SystemZ) | | ------------------ | | | | 86| 1|#define LLVM_ASM_PARSER(TargetName) LLVMInitialize##TargetName##AsmParser(); | | ------------------ | | 34| 1|LLVM_ASM_PARSER(X86) | | ------------------ | | | | 86| 1|#define LLVM_ASM_PARSER(TargetName) LLVMInitialize##TargetName##AsmParser(); | | ------------------ | | 35| 1|LLVM_ASM_PARSER(RISCV) | | ------------------ | | | | 86| 1|#define LLVM_ASM_PARSER(TargetName) LLVMInitialize##TargetName##AsmParser(); | | ------------------ | | 36| | | | 37| | | | 38| 1|#undef LLVM_ASM_PARSER ------------------ 88| 1| } _ZN7llvm_ks19raw_svector_ostreamC2ERNS_15SmallVectorImplIcEE: 493| 39.9k| explicit raw_svector_ostream(SmallVectorImpl &O) : OS(O) { 494| 39.9k| SetUnbuffered(); 495| 39.9k| } _ZN7llvm_ks17raw_pwrite_streamC2Eb: 325| 39.9k| : raw_ostream(Unbuffered) {} _ZN7llvm_ks11raw_ostreamC2Eb: 84| 39.9k| : BufferMode(unbuffered ? Unbuffered : InternalBuffer) { ------------------ | Branch (84:20): [True: 1, False: 39.9k] ------------------ 85| | // Start out ready to flush. 86| 39.9k| OutBufStart = OutBufEnd = OutBufCur = nullptr; 87| 39.9k| } _ZN7llvm_ks11raw_ostream13SetUnbufferedEv: 121| 39.9k| void SetUnbuffered() { 122| 39.9k| flush(); 123| 39.9k| SetBufferAndMode(nullptr, 0, Unbuffered); 124| 39.9k| } _ZN7llvm_ks11raw_ostream5flushEv: 134| 39.9k| void flush() { 135| 39.9k| if (OutBufCur != OutBufStart) ------------------ | Branch (135:9): [True: 0, False: 39.9k] ------------------ 136| 0| flush_nonempty(); 137| 39.9k| } _ZNK7llvm_ks11raw_ostream4tellEv: 92| 3.98k| uint64_t tell() const { return current_pos() + GetNumBytesInBuffer(); } _ZNK7llvm_ks11raw_ostream19GetNumBytesInBufferEv: 126| 43.9k| size_t GetNumBytesInBuffer() const { 127| 43.9k| return OutBufCur - OutBufStart; 128| 43.9k| } _ZN7llvm_ks11raw_ostreamlsEc: 139| 4.83M| raw_ostream &operator<<(char C) { 140| 4.83M| if (OutBufCur >= OutBufEnd) ------------------ | Branch (140:9): [True: 4.83M, False: 0] ------------------ 141| 4.83M| return write(C); 142| 0| *OutBufCur++ = C; 143| 0| return *this; 144| 4.83M| } _ZN7llvm_ks11raw_ostreamlsENS_9StringRefE: 160| 1.76M| raw_ostream &operator<<(StringRef Str) { 161| | // Inline fast path, particularly for strings with a known length. 162| 1.76M| size_t Size = Str.size(); 163| | 164| | // Make sure we can use the fast path. 165| 1.76M| if (Size > (size_t)(OutBufEnd - OutBufCur)) ------------------ | Branch (165:9): [True: 952k, False: 811k] ------------------ 166| 952k| return write(Str.data(), Size); 167| | 168| 811k| if (Size) { ------------------ | Branch (168:9): [True: 0, False: 811k] ------------------ 169| 0| memcpy(OutBufCur, Str.data(), Size); 170| 0| OutBufCur += Size; 171| 0| } 172| 811k| return *this; 173| 1.76M| } _ZN7llvm_ks11raw_ostreamlsEPKc: 175| 107k| raw_ostream &operator<<(const char *Str) { 176| | // Inline fast path, particularly for constant strings where a sufficiently 177| | // smart compiler will simplify strlen. 178| | 179| 107k| return this->operator<<(StringRef(Str)); 180| 107k| } _ZN7llvm_ks11raw_ostreamlsERKNSt3__112basic_stringIcNS1_11char_traitsIcEENS1_9allocatorIcEEEE: 182| 68.3k| raw_ostream &operator<<(const std::string &Str) { 183| | // Avoid the fast path, it would only increase code size for a marginal win. 184| 68.3k| return write(Str.data(), Str.length()); 185| 68.3k| } _ZN7llvm_ks11raw_ostreamlsEj: 196| 11.4k| raw_ostream &operator<<(unsigned int N) { 197| 11.4k| return this->operator<<(static_cast(N)); 198| 11.4k| } _ZN7llvm_ks11raw_ostreamlsEi: 200| 43.6k| raw_ostream &operator<<(int N) { 201| 43.6k| return this->operator<<(static_cast(N)); 202| 43.6k| } _ZNK7llvm_ks14raw_fd_ostream9has_errorEv: 415| 1| bool has_error() const { 416| 1| return Error; 417| 1| } _ZN7llvm_ks19raw_svector_ostream3strEv: 501| 6.99k| StringRef str() { return StringRef(OS.data(), OS.size()); } ks_errno: 42| 444|{ 43| 444| return (ks_err)ks->errnum; 44| 444|} ks_open: 261| 749|{ 262| 749| struct ks_struct *ks; 263| 749| std::string TripleName = ""; 264| | 265| 749| if (arch < KS_ARCH_MAX) { ------------------ | Branch (265:9): [True: 749, False: 0] ------------------ 266| | // LLVM-based architectures 267| 749| ks = new (std::nothrow) ks_struct(arch, mode, KS_ERR_OK, KS_OPT_SYNTAX_INTEL); 268| | 269| 749| if (!ks) { ------------------ | Branch (269:13): [True: 0, False: 749] ------------------ 270| | // memory insufficient 271| 0| return KS_ERR_NOMEM; 272| 0| } 273| | 274| 749| switch(arch) { 275| 0| default: break; ------------------ | Branch (275:13): [True: 0, False: 749] ------------------ 276| | 277| 0|#ifdef LLVM_ENABLE_ARCH_ARM 278| 0| case KS_ARCH_ARM: ------------------ | Branch (278:13): [True: 0, False: 749] ------------------ 279| 0| if (mode & ~KS_MODE_ARM_MASK) { ------------------ | | 23| 0|#define KS_MODE_ARM_MASK (KS_MODE_ARM|KS_MODE_THUMB|KS_MODE_LITTLE_ENDIAN|KS_MODE_BIG_ENDIAN|KS_MODE_V8) ------------------ | Branch (279:21): [True: 0, False: 0] ------------------ 280| 0| delete ks; 281| 0| return KS_ERR_MODE; 282| 0| } 283| | 284| 0| switch(mode) { 285| 0| default: ------------------ | Branch (285:21): [True: 0, False: 0] ------------------ 286| 0| return KS_ERR_MODE; 287| | // big-endian 288| 0| case KS_MODE_BIG_ENDIAN | KS_MODE_V8 | KS_MODE_ARM: ------------------ | Branch (288:21): [True: 0, False: 0] ------------------ 289| 0| TripleName = "armv8eb"; 290| 0| break; 291| 0| case KS_MODE_BIG_ENDIAN | KS_MODE_V8 | KS_MODE_THUMB: ------------------ | Branch (291:21): [True: 0, False: 0] ------------------ 292| 0| TripleName = "thumbv8eb"; 293| 0| break; 294| 0| case KS_MODE_BIG_ENDIAN | KS_MODE_ARM: ------------------ | Branch (294:21): [True: 0, False: 0] ------------------ 295| 0| TripleName = "armv7eb"; 296| 0| break; 297| 0| case KS_MODE_BIG_ENDIAN | KS_MODE_THUMB: ------------------ | Branch (297:21): [True: 0, False: 0] ------------------ 298| 0| TripleName = "thumbebv7"; 299| 0| break; 300| | 301| | // little-endian 302| 0| case KS_MODE_LITTLE_ENDIAN | KS_MODE_V8 | KS_MODE_ARM: ------------------ | Branch (302:21): [True: 0, False: 0] ------------------ 303| 0| TripleName = "armv8"; 304| 0| break; 305| 0| case KS_MODE_LITTLE_ENDIAN | KS_MODE_V8 | KS_MODE_THUMB: ------------------ | Branch (305:21): [True: 0, False: 0] ------------------ 306| 0| TripleName = "thumbv8"; 307| 0| break; 308| 0| case KS_MODE_LITTLE_ENDIAN | KS_MODE_ARM: ------------------ | Branch (308:21): [True: 0, False: 0] ------------------ 309| 0| TripleName = "armv7"; 310| 0| break; 311| 0| case KS_MODE_LITTLE_ENDIAN | KS_MODE_THUMB: ------------------ | Branch (311:21): [True: 0, False: 0] ------------------ 312| 0| TripleName = "thumbv7"; 313| 0| break; 314| 0| } 315| | 316| 0| InitKs(arch, ks, TripleName); 317| | 318| | //ks->init_arch = arm_ks_init; 319| 0| break; 320| 0|#endif 321| | 322| 0|#ifdef LLVM_ENABLE_ARCH_AArch64 323| 0| case KS_ARCH_ARM64: ------------------ | Branch (323:13): [True: 0, False: 749] ------------------ 324| 0| if (mode != KS_MODE_LITTLE_ENDIAN) { ------------------ | Branch (324:21): [True: 0, False: 0] ------------------ 325| 0| delete ks; 326| 0| return KS_ERR_MODE; 327| 0| } 328| | 329| 0| TripleName = "aarch64"; 330| 0| InitKs(arch, ks, TripleName); 331| | 332| | //ks->init_arch = arm64_ks_init; 333| 0| break; 334| 0|#endif 335| | 336| 0|#ifdef LLVM_ENABLE_ARCH_Hexagon 337| 0| case KS_ARCH_HEXAGON: ------------------ | Branch (337:13): [True: 0, False: 749] ------------------ 338| 0| if (mode & ~KS_MODE_HEXAGON_MASK) { ------------------ | | 28| 0|#define KS_MODE_HEXAGON_MASK (KS_MODE_BIG_ENDIAN) ------------------ | Branch (338:21): [True: 0, False: 0] ------------------ 339| 0| delete ks; 340| 0| return KS_ERR_MODE; 341| 0| } 342| | 343| 0| TripleName = "hexagon"; 344| | 345| 0| InitKs(arch, ks, TripleName); 346| | 347| | //ks->init_arch = arm_ks_init; 348| 0| break; 349| 0|#endif 350| | 351| 0|#ifdef LLVM_ENABLE_ARCH_SystemZ 352| 0| case KS_ARCH_SYSTEMZ: ------------------ | Branch (352:13): [True: 0, False: 749] ------------------ 353| 0| if (mode & ~KS_MODE_SYSTEMZ_MASK) { ------------------ | | 29| 0|#define KS_MODE_SYSTEMZ_MASK (KS_MODE_BIG_ENDIAN) ------------------ | Branch (353:21): [True: 0, False: 0] ------------------ 354| 0| delete ks; 355| 0| return KS_ERR_MODE; 356| 0| } 357| | 358| 0| TripleName = "s390x"; 359| | 360| 0| InitKs(arch, ks, TripleName); 361| | 362| | //ks->init_arch = arm_ks_init; 363| 0| break; 364| 0|#endif 365| | 366| 0|#ifdef LLVM_ENABLE_ARCH_Sparc 367| 0| case KS_ARCH_SPARC: ------------------ | Branch (367:13): [True: 0, False: 749] ------------------ 368| 0| if ((mode & ~KS_MODE_SPARC_MASK) || ------------------ | | 27| 0|#define KS_MODE_SPARC_MASK (KS_MODE_V9|KS_MODE_SPARC32|KS_MODE_SPARC64|KS_MODE_LITTLE_ENDIAN|KS_MODE_BIG_ENDIAN) ------------------ | Branch (368:21): [True: 0, False: 0] ------------------ 369| 0| !(mode & (KS_MODE_SPARC32|KS_MODE_SPARC64))) { ------------------ | Branch (369:25): [True: 0, False: 0] ------------------ 370| 0| delete ks; 371| 0| return KS_ERR_MODE; 372| 0| } 373| 0| if (mode & KS_MODE_BIG_ENDIAN) { ------------------ | Branch (373:21): [True: 0, False: 0] ------------------ 374| | // big endian 375| 0| if (mode & KS_MODE_SPARC64) ------------------ | Branch (375:25): [True: 0, False: 0] ------------------ 376| 0| TripleName = "sparc64"; 377| 0| else 378| 0| TripleName = "sparc"; 379| 0| } else { 380| | // little endian 381| 0| if (mode & KS_MODE_SPARC64) { ------------------ | Branch (381:25): [True: 0, False: 0] ------------------ 382| | // TripleName = "sparc64el"; 383| | // FIXME 384| 0| delete ks; 385| 0| return KS_ERR_MODE; 386| 0| } else 387| 0| TripleName = "sparcel"; 388| 0| } 389| | 390| 0| InitKs(arch, ks, TripleName); 391| | 392| 0| break; 393| 0|#endif 394| | 395| 0|#ifdef LLVM_ENABLE_ARCH_RISCV 396| 0| case KS_ARCH_RISCV: { ------------------ | Branch (396:13): [True: 0, False: 749] ------------------ 397| 0| if ((mode & ~KS_MODE_RISCV_MASK) || ------------------ | | 32| 0|#define KS_MODE_RISCV_MASK (KS_MODE_RISCV32|KS_MODE_RISCV64|KS_MODE_LITTLE_ENDIAN) ------------------ | Branch (397:21): [True: 0, False: 0] ------------------ 398| 0| (mode & KS_MODE_BIG_ENDIAN) || ------------------ | Branch (398:25): [True: 0, False: 0] ------------------ 399| 0| !(mode & (KS_MODE_RISCV32|KS_MODE_RISCV64))) { ------------------ | Branch (399:25): [True: 0, False: 0] ------------------ 400| 0| delete ks; 401| 0| return KS_ERR_MODE; 402| 0| } 403| | 404| 0| switch(mode) { 405| 0| default: break; ------------------ | Branch (405:21): [True: 0, False: 0] ------------------ 406| 0| case KS_MODE_RISCV32: ------------------ | Branch (406:21): [True: 0, False: 0] ------------------ 407| 0| TripleName = "riscv32"; 408| 0| break; 409| 0| case KS_MODE_RISCV64: ------------------ | Branch (409:21): [True: 0, False: 0] ------------------ 410| 0| TripleName = "riscv64"; 411| 0| break; 412| 0| } 413| | 414| 0| InitKs(arch, ks, TripleName); 415| | 416| 0| break; 417| 0| } 418| 0|#endif 419| | 420| 0|#ifdef LLVM_ENABLE_ARCH_Mips 421| 749| case KS_ARCH_MIPS: ------------------ | Branch (421:13): [True: 749, False: 0] ------------------ 422| 749| if ((mode & ~KS_MODE_MIPS_MASK) || ------------------ | | 24| 749|#define KS_MODE_MIPS_MASK (KS_MODE_MIPS32|KS_MODE_MIPS64|KS_MODE_LITTLE_ENDIAN|KS_MODE_BIG_ENDIAN) ------------------ | Branch (422:21): [True: 0, False: 749] ------------------ 423| 749| !(mode & (KS_MODE_MIPS32|KS_MODE_MIPS64))) { ------------------ | Branch (423:25): [True: 0, False: 749] ------------------ 424| 0| delete ks; 425| 0| return KS_ERR_MODE; 426| 0| } 427| 749| if (mode & KS_MODE_BIG_ENDIAN) { ------------------ | Branch (427:21): [True: 749, False: 0] ------------------ 428| | // big endian 429| 749| if (mode & KS_MODE_MIPS32) ------------------ | Branch (429:25): [True: 749, False: 0] ------------------ 430| 749| TripleName = "mips"; 431| 749| if (mode & KS_MODE_MIPS64) ------------------ | Branch (431:25): [True: 0, False: 749] ------------------ 432| 0| TripleName = "mips64"; 433| 749| } else { // little endian 434| 0| if (mode & KS_MODE_MIPS32) ------------------ | Branch (434:25): [True: 0, False: 0] ------------------ 435| 0| TripleName = "mipsel"; 436| 0| if (mode & KS_MODE_MIPS64) ------------------ | Branch (436:25): [True: 0, False: 0] ------------------ 437| 0| TripleName = "mips64el"; 438| 0| } 439| | 440| 749| InitKs(arch, ks, TripleName); 441| | 442| 749| break; 443| 0|#endif 444| | 445| 0|#ifdef LLVM_ENABLE_ARCH_PowerPC 446| 0| case KS_ARCH_PPC: ------------------ | Branch (446:13): [True: 0, False: 749] ------------------ 447| 0| if ((mode & ~KS_MODE_PPC_MASK) || ------------------ | | 26| 0|#define KS_MODE_PPC_MASK (KS_MODE_PPC32|KS_MODE_PPC64|KS_MODE_LITTLE_ENDIAN|KS_MODE_BIG_ENDIAN) ------------------ | Branch (447:21): [True: 0, False: 0] ------------------ 448| 0| !(mode & (KS_MODE_PPC32|KS_MODE_PPC64))) { ------------------ | Branch (448:25): [True: 0, False: 0] ------------------ 449| 0| delete ks; 450| 0| return KS_ERR_MODE; 451| 0| } 452| | 453| 0| if (mode & KS_MODE_BIG_ENDIAN) { ------------------ | Branch (453:21): [True: 0, False: 0] ------------------ 454| | // big endian 455| 0| if (mode & KS_MODE_PPC32) ------------------ | Branch (455:25): [True: 0, False: 0] ------------------ 456| 0| TripleName = "ppc32"; 457| 0| if (mode & KS_MODE_PPC64) ------------------ | Branch (457:25): [True: 0, False: 0] ------------------ 458| 0| TripleName = "ppc64"; 459| 0| } else { // little endian 460| 0| if (mode & KS_MODE_PPC32) { ------------------ | Branch (460:25): [True: 0, False: 0] ------------------ 461| | // do not support this mode 462| 0| delete ks; 463| 0| return KS_ERR_MODE; 464| 0| } 465| 0| if (mode & KS_MODE_MIPS64) ------------------ | Branch (465:25): [True: 0, False: 0] ------------------ 466| 0| TripleName = "ppc64le"; 467| 0| } 468| | 469| 0| InitKs(arch, ks, TripleName); 470| | 471| | //ks->init_arch = ppc_ks_init; 472| 0| break; 473| 0|#endif 474| | 475| 0|#ifdef LLVM_ENABLE_ARCH_X86 476| 0| case KS_ARCH_X86: { ------------------ | Branch (476:13): [True: 0, False: 749] ------------------ 477| 0| if ((mode & ~KS_MODE_X86_MASK) || ------------------ | | 25| 0|#define KS_MODE_X86_MASK (KS_MODE_16|KS_MODE_32|KS_MODE_64|KS_MODE_LITTLE_ENDIAN) ------------------ | Branch (477:21): [True: 0, False: 0] ------------------ 478| 0| (mode & KS_MODE_BIG_ENDIAN) || ------------------ | Branch (478:25): [True: 0, False: 0] ------------------ 479| 0| !(mode & (KS_MODE_16|KS_MODE_32|KS_MODE_64))) { ------------------ | Branch (479:25): [True: 0, False: 0] ------------------ 480| 0| delete ks; 481| 0| return KS_ERR_MODE; 482| 0| } 483| | 484| 0| switch(mode) { 485| 0| default: break; ------------------ | Branch (485:21): [True: 0, False: 0] ------------------ 486| 0| case KS_MODE_16: ------------------ | Branch (486:21): [True: 0, False: 0] ------------------ 487| | // FIXME 488| 0| TripleName = "i386-unknown-unknown-code16"; 489| 0| break; 490| 0| case KS_MODE_32: ------------------ | Branch (490:21): [True: 0, False: 0] ------------------ 491| | // FIXME 492| 0| TripleName = "i386"; 493| 0| break; 494| 0| case KS_MODE_64: ------------------ | Branch (494:21): [True: 0, False: 0] ------------------ 495| | // FIXME 496| 0| TripleName = "x86_64"; 497| 0| break; 498| 0| } 499| | 500| 0| InitKs(arch, ks, TripleName); 501| | 502| | //ks->init_arch = x86_ks_init; 503| 0| break; 504| 0| } 505| 0|#endif 506| 0|#ifdef LLVM_ENABLE_ARCH_EVM 507| 0| case KS_ARCH_EVM: { ------------------ | Branch (507:13): [True: 0, False: 749] ------------------ 508| 0| *result = ks; 509| 0| return KS_ERR_OK; 510| 0| } 511| 749|#endif 512| 749| } 513| | 514| 749| if (TripleName.empty()) { ------------------ | Branch (514:13): [True: 0, False: 749] ------------------ 515| | // this arch is not supported 516| 0| delete ks; 517| 0| return KS_ERR_ARCH; 518| 0| } 519| | 520| 749| *result = ks; 521| | 522| 749| return KS_ERR_OK; 523| 749| } else 524| 0| return KS_ERR_ARCH; 525| 749|} ks_close: 530| 749|{ 531| 749| if (!ks) ------------------ | Branch (531:9): [True: 0, False: 749] ------------------ 532| 0| return KS_ERR_HANDLE; 533| | 534| 749| if (ks->arch == KS_ARCH_EVM) { ------------------ | Branch (534:9): [True: 0, False: 749] ------------------ 535| | // handle EVM differently 536| 0| delete ks; 537| 0| return KS_ERR_OK; 538| 0| } 539| | 540| | // LLVM-based architectures 541| 749| delete ks->STI; 542| 749| delete ks->MCII; 543| 749| delete ks->MAI; 544| 749| delete ks->MRI; 545| 749| delete ks->MAB; 546| | 547| | // finally, free ks itself. 548| 749| delete ks; 549| | 550| 749| return KS_ERR_OK; 551| 749|} ks_option: 556| 749|{ 557| 749| ks->MAI->setRadix(16); 558| 749| switch(type) { ------------------ | Branch (558:12): [True: 749, False: 0] ------------------ 559| 749| case KS_OPT_SYNTAX: ------------------ | Branch (559:9): [True: 749, False: 0] ------------------ 560| 749| if (ks->arch != KS_ARCH_X86) ------------------ | Branch (560:17): [True: 749, False: 0] ------------------ 561| 749| return KS_ERR_OPT_INVALID; 562| 0| switch(value) { 563| 0| default: ------------------ | Branch (563:17): [True: 0, False: 0] ------------------ 564| 0| return KS_ERR_OPT_INVALID; 565| 0| case KS_OPT_SYNTAX_RADIX16: // default syntax is Intel ------------------ | Branch (565:17): [True: 0, False: 0] ------------------ 566| 0| case KS_OPT_SYNTAX_NASM | KS_OPT_SYNTAX_RADIX16: ------------------ | Branch (566:17): [True: 0, False: 0] ------------------ 567| 0| case KS_OPT_SYNTAX_INTEL | KS_OPT_SYNTAX_RADIX16: ------------------ | Branch (567:17): [True: 0, False: 0] ------------------ 568| 0| ks->MAI->setRadix(16); 569| 0| case KS_OPT_SYNTAX_NASM: ------------------ | Branch (569:17): [True: 0, False: 0] ------------------ 570| 0| case KS_OPT_SYNTAX_INTEL: ------------------ | Branch (570:17): [True: 0, False: 0] ------------------ 571| 0| ks->syntax = (ks_opt_value)value; 572| 0| ks->MAI->setAssemblerDialect(1); 573| 0| break; 574| 0| case KS_OPT_SYNTAX_GAS | KS_OPT_SYNTAX_RADIX16: ------------------ | Branch (574:17): [True: 0, False: 0] ------------------ 575| 0| case KS_OPT_SYNTAX_ATT | KS_OPT_SYNTAX_RADIX16: ------------------ | Branch (575:17): [True: 0, False: 0] ------------------ 576| 0| ks->MAI->setRadix(16); 577| 0| case KS_OPT_SYNTAX_GAS: ------------------ | Branch (577:17): [True: 0, False: 0] ------------------ 578| 0| case KS_OPT_SYNTAX_ATT: ------------------ | Branch (578:17): [True: 0, False: 0] ------------------ 579| 0| ks->syntax = (ks_opt_value)value; 580| 0| ks->MAI->setAssemblerDialect(0); 581| 0| break; 582| 0| } 583| | 584| 0| return KS_ERR_OK; 585| 0| case KS_OPT_SYM_RESOLVER: ------------------ | Branch (585:9): [True: 0, False: 749] ------------------ 586| 0| ks->sym_resolver = (ks_sym_resolver)value; 587| 0| return KS_ERR_OK; 588| 749| } 589| | 590| 0| return KS_ERR_OPT_INVALID; 591| 749|} ks_free: 596| 305|{ 597| 305| free(p); 598| 305|} ks_asm: 610| 749|{ 611| 749| MCCodeEmitter *CE; 612| 749| MCStreamer *Streamer; 613| 749| unsigned char *encoding; 614| 749| SmallString<1024> Msg; 615| 749| raw_svector_ostream OS(Msg); 616| | 617| 749| if (ks->arch == KS_ARCH_EVM) { ------------------ | Branch (617:9): [True: 0, False: 749] ------------------ 618| | // handle EVM differently 619| 0| unsigned short opcode = EVM_opcode(assembly); 620| 0| if (opcode == (unsigned short)-1) { ------------------ | Branch (620:13): [True: 0, False: 0] ------------------ 621| | // invalid instruction 622| 0| return -1; 623| 0| } 624| | 625| 0| *insn_size = 1; 626| 0| *stat_count = 1; 627| 0| encoding = (unsigned char *)malloc(*insn_size); 628| 0| encoding[0] = opcode; 629| 0| *insn = encoding; 630| 0| return 0; 631| 0| } 632| | 633| 749| *insn = NULL; 634| 749| *insn_size = 0; 635| | 636| 749| MCContext Ctx(ks->MAI, ks->MRI, &ks->MOFI, &ks->SrcMgr, true, address); 637| 749| ks->MOFI.InitMCObjectFileInfo(Triple(ks->TripleName), Ctx); 638| 749| CE = ks->TheTarget->createMCCodeEmitter(*ks->MCII, *ks->MRI, Ctx); 639| 749| if (!CE) { ------------------ | Branch (639:9): [True: 0, False: 749] ------------------ 640| | // memory insufficient 641| 0| return KS_ERR_NOMEM; 642| 0| } 643| 749| Streamer = ks->TheTarget->createMCObjectStreamer( 644| 749| Triple(ks->TripleName), Ctx, *ks->MAB, OS, CE, *ks->STI, ks->MCOptions.MCRelaxAll, 645| 749| /*DWARFMustBeAtTheEnd*/ false); 646| | 647| 749| if (!Streamer) { ------------------ | Branch (647:9): [True: 0, False: 749] ------------------ 648| | // memory insufficient 649| 0| delete CE; 650| 0| return KS_ERR_NOMEM; 651| 0| } 652| | 653| | // Tell SrcMgr about this buffer, which is what the parser will pick up. 654| 749| ErrorOr> BufferPtr = MemoryBuffer::getMemBuffer(assembly); 655| 749| if (BufferPtr.getError()) { ------------------ | Branch (655:9): [True: 0, False: 749] ------------------ 656| 0| delete Streamer; 657| 0| delete CE; 658| 0| return KS_ERR_NOMEM; 659| 0| } 660| | 661| 749| ks->SrcMgr.clearBuffers(); 662| 749| ks->SrcMgr.AddNewSourceBuffer(std::move(*BufferPtr), SMLoc()); 663| | 664| 749| Streamer->setSymResolver((void *)(ks->sym_resolver)); 665| | 666| 749| MCAsmParser *Parser = createMCAsmParser(ks->SrcMgr, Ctx, *Streamer, *ks->MAI); 667| 749| if (!Parser) { ------------------ | Branch (667:9): [True: 0, False: 749] ------------------ 668| 0| delete Streamer; 669| 0| delete CE; 670| | // memory insufficient 671| 0| return KS_ERR_NOMEM; 672| 0| } 673| 749| MCTargetAsmParser *TAP = ks->TheTarget->createMCAsmParser(*ks->STI, *Parser, *ks->MCII, ks->MCOptions); 674| 749| if (!TAP) { ------------------ | Branch (674:9): [True: 0, False: 749] ------------------ 675| | // memory insufficient 676| 0| delete Parser; 677| 0| delete Streamer; 678| 0| delete CE; 679| 0| return KS_ERR_NOMEM; 680| 0| } 681| 749| TAP->KsSyntax = ks->syntax; 682| | 683| 749| Parser->setTargetParser(*TAP); 684| | 685| | // TODO: optimize this to avoid setting up NASM every time we call ks_asm() 686| 749| if (ks->arch == KS_ARCH_X86 && ks->syntax == KS_OPT_SYNTAX_NASM) { ------------------ | Branch (686:9): [True: 0, False: 749] | Branch (686:36): [True: 0, False: 0] ------------------ 687| 0| Parser->initializeDirectiveKindMap(KS_OPT_SYNTAX_NASM); 688| 0| ks->MAI->setCommentString(";"); 689| 0| } 690| | 691| 749| *stat_count = Parser->Run(false, address); 692| | 693| | // PPC counts empty statement 694| 749| if (ks->arch == KS_ARCH_PPC) ------------------ | Branch (694:9): [True: 0, False: 749] ------------------ 695| 0| *stat_count = *stat_count / 2; 696| | 697| 749| ks->errnum = Parser->KsError; 698| | 699| 749| delete TAP; 700| 749| delete Parser; 701| 749| delete CE; 702| 749| delete Streamer; 703| | 704| 749| if (ks->errnum >= KS_ERR_ASM) ------------------ | | 103| 749|#define KS_ERR_ASM 128 ------------------ | Branch (704:9): [True: 444, False: 305] ------------------ 705| 444| return -1; 706| 305| else { 707| 305| *insn_size = Msg.size(); 708| 305| encoding = (unsigned char *)malloc(*insn_size); 709| 305| if (!encoding) { ------------------ | Branch (709:13): [True: 0, False: 305] ------------------ 710| 0| return KS_ERR_NOMEM; 711| 0| } 712| 305| memcpy(encoding, Msg.data(), *insn_size); 713| 305| *insn = encoding; 714| 305| return 0; 715| 305| } 716| 749|} ks.cpp:_ZL6InitKsiP9ks_structNSt3__112basic_stringIcNS1_11char_traitsIcEENS1_9allocatorIcEEEE: 204| 749|{ 205| 749| static bool initialized = false; 206| 749| std::string MCPU = ""; 207| | 208| 749| if (!initialized) { ------------------ | Branch (208:9): [True: 1, False: 748] ------------------ 209| 1| initialized = true; 210| | // Initialize targets and assembly parsers. 211| 1| llvm_ks::InitializeAllTargetInfos(); 212| 1| llvm_ks::InitializeAllTargetMCs(); 213| 1| llvm_ks::InitializeAllAsmParsers(); 214| 1| } 215| | 216| 749| ks->TripleName = Triple::normalize(TripleName); 217| 749| ks->TheTarget = GetTarget(ks->TripleName); 218| 749| if (!ks->TheTarget) ------------------ | Branch (218:9): [True: 0, False: 749] ------------------ 219| 0| return KS_ERR_MODE; // FIXME 220| | 221| | // Now that GetTarget() has (potentially) replaced TripleName, it's safe to 222| | // construct the Triple object. 223| 749| Triple TheTriple(ks->TripleName); 224| | 225| 749| ks->MRI = ks->TheTarget->createMCRegInfo(ks->TripleName); 226| 749| assert(ks->MRI && "Unable to create target register info!"); ------------------ | Branch (226:5): [True: 749, False: 0] | Branch (226:5): [True: 749, Folded] | Branch (226:5): [True: 749, False: 0] ------------------ 227| | 228| | // Package up features to be passed to target/subtarget 229| |#if 0 230| | if (MAttrs.size()) { 231| | SubtargetFeatures Features; 232| | for (unsigned i = 0; i != MAttrs.size(); ++i) 233| | Features.AddFeature(MAttrs[i]); 234| | ks->FeaturesStr = Features.getString(); 235| | } 236| |#endif 237| | 238| 749| ks->MAI = ks->TheTarget->createMCAsmInfo(*ks->MRI, ks->TripleName); 239| 749| assert(ks->MAI && "Unable to create target asm info!"); ------------------ | Branch (239:5): [True: 749, False: 0] | Branch (239:5): [True: 749, Folded] | Branch (239:5): [True: 749, False: 0] ------------------ 240| | 241| | // enable Knights Landing architecture for X86 242| 749| if (ks->arch == KS_ARCH_X86) ------------------ | Branch (242:9): [True: 0, False: 749] ------------------ 243| 0| MCPU = "knl"; 244| | 245| 749| ks->MCII = ks->TheTarget->createMCInstrInfo(); 246| 749| ks->STI = ks->TheTarget->createMCSubtargetInfo(ks->TripleName, MCPU, ks->FeaturesStr); 247| 749| if(ks->TripleName.rfind("riscv",0)==0){ ------------------ | Branch (247:8): [True: 0, False: 749] ------------------ 248| 0| ks->MAB = ks->TheTarget->createMCAsmBackend2(*ks->MRI, ks->TripleName, MCPU, *ks->STI, ks->MCOptions); 249| 749| } else { 250| 749| ks->MAB = ks->TheTarget->createMCAsmBackend(*ks->MRI, ks->TripleName, MCPU); 251| 749| } 252| 749| ks->MAB->setArch(arch); 253| 749| ks->MCOptions = InitMCTargetOptionsFromFlags(); 254| | 255| 749| return KS_ERR_OK; 256| 749|} ks.cpp:_ZL9GetTargetNSt3__112basic_stringIcNS_11char_traitsIcEENS_9allocatorIcEEEE: 192| 749|{ 193| | // Figure out the target triple. 194| 749| Triple TheTriple(TripleName); 195| | 196| | // Get the target specific parser. 197| 749| std::string Error; 198| | 199| 749| return TargetRegistry::lookupTarget("", TheTriple, Error); 200| 749|} _ZN9ks_structC2E7ks_archij12ks_opt_value: 63| 749| : arch(arch), mode(mode), errnum(errnum), syntax(syntax) { } _ZN7llvm_ks21createELFObjectWriterEPNS_23MCELFObjectTargetWriterERNS_17raw_pwrite_streamEb: 1271| 749| bool IsLittleEndian) { 1272| 749| return new ELFObjectWriter(MOTW, OS, IsLittleEndian); 1273| 749|} ELFObjectWriter.cpp:_ZN12_GLOBAL__N_115ELFObjectWriterC2EPN7llvm_ks23MCELFObjectTargetWriterERNS1_17raw_pwrite_streamEb: 142| 749| : MCObjectWriter(OS, IsLittleEndian), TargetObjectWriter(MOTW) {} ELFObjectWriter.cpp:_ZN12_GLOBAL__N_115ELFObjectWriterD2Ev: 297| 749|{} ELFObjectWriter.cpp:_ZN12_GLOBAL__N_115ELFObjectWriter24executePostLayoutBindingERN7llvm_ks11MCAssemblerERKNS1_11MCAsmLayoutE: 316| 312| const MCAsmLayout &Layout) { 317| | // The presence of symbol versions causes undefined symbols and 318| | // versions declared with @@@ to be renamed. 319| | 320| 7.32k| for (const MCSymbol &A : Asm.symbols()) { ------------------ | Branch (320:26): [True: 7.32k, False: 312] ------------------ 321| 7.32k| const auto &Alias = cast(A); 322| | // Not an alias. 323| 7.32k| if (!Alias.isVariable()) ------------------ | Branch (323:9): [True: 7.11k, False: 205] ------------------ 324| 7.11k| continue; 325| 205| auto *Ref = dyn_cast(Alias.getVariableValue()); 326| 205| if (!Ref) ------------------ | Branch (326:9): [True: 24, False: 181] ------------------ 327| 24| continue; 328| 181| const auto &Symbol = cast(Ref->getSymbol()); 329| | 330| 181| StringRef AliasName = Alias.getName(); 331| 181| size_t Pos = AliasName.find('@'); 332| 181| if (Pos == StringRef::npos) ------------------ | Branch (332:9): [True: 37, False: 144] ------------------ 333| 37| continue; 334| | 335| | // Aliases defined with .symvar copy the binding from the symbol they alias. 336| | // This is the first place we are able to copy this information. 337| 144| Alias.setExternal(Symbol.isExternal()); 338| 144| Alias.setBinding(Symbol.getBinding()); 339| | 340| 144| StringRef Rest = AliasName.substr(Pos); 341| 144| if (!Symbol.isUndefined() && !Rest.startswith("@@@")) ------------------ | Branch (341:9): [True: 6, False: 138] | Branch (341:9): [True: 6, False: 138] | Branch (341:34): [True: 6, False: 0] ------------------ 342| 6| continue; 343| | 344| | // FIXME: produce a better error message. 345| 138| if (Symbol.isUndefined() && Rest.startswith("@@") && ------------------ | Branch (345:9): [True: 138, False: 0] | Branch (345:9): [True: 0, False: 138] | Branch (345:33): [True: 1, False: 137] ------------------ 346| 1| !Rest.startswith("@@@")) ------------------ | Branch (346:9): [True: 0, False: 1] ------------------ 347| 0| report_fatal_error("A @@ version cannot be undefined"); 348| | 349| 138| Renames.insert(std::make_pair(&Symbol, &Alias)); 350| 138| } 351| 312|} ELFObjectWriter.cpp:_ZN12_GLOBAL__N_115ELFObjectWriter16recordRelocationERN7llvm_ks11MCAssemblerERKNS1_11MCAsmLayoutEPKNS1_10MCFragmentERKNS1_7MCFixupENS1_7MCValueERbRm: 557| 1.44k|{ 558| 1.44k| const MCSectionELF &FixupSection = cast(*Fragment->getParent()); 559| 1.44k| uint64_t C = Target.getConstant(); 560| 1.44k| bool valid; 561| 1.44k| uint64_t FixupOffset = Layout.getFragmentOffset(Fragment, valid) + Fixup.getOffset(); 562| 1.44k| MCContext &Ctx = Asm.getContext(); 563| | 564| 1.44k| if (const MCSymbolRefExpr *RefB = Target.getSymB()) { ------------------ | Branch (564:30): [True: 1.04k, False: 398] ------------------ 565| 1.04k| assert(RefB->getKind() == MCSymbolRefExpr::VK_None && ------------------ | Branch (565:5): [True: 1.04k, False: 0] | Branch (565:5): [True: 1.04k, Folded] | Branch (565:5): [True: 1.04k, False: 0] ------------------ 566| 1.04k| "Should not have constructed this"); 567| | 568| | // Let A, B and C being the components of Target and R be the location of 569| | // the fixup. If the fixup is not pcrel, we want to compute (A - B + C). 570| | // If it is pcrel, we want to compute (A - B + C - R). 571| | 572| | // In general, ELF has no relocations for -B. It can only represent (A + C) 573| | // or (A + C - R). If B = R + K and the relocation is not pcrel, we can 574| | // replace B to implement it: (A - R - K + C) 575| 1.04k| if (IsPCRel) { ------------------ | Branch (575:9): [True: 0, False: 1.04k] ------------------ 576| 0| Ctx.reportError( 577| 0| Fixup.getLoc(), 578| 0| "No relocation available to represent this relative expression"); 579| 0| return; 580| 0| } 581| | 582| 1.04k| const auto &SymB = cast(RefB->getSymbol()); 583| | 584| 1.04k| if (SymB.isUndefined()) { ------------------ | Branch (584:9): [True: 1.04k, False: 1] ------------------ 585| 1.04k| Ctx.reportError(Fixup.getLoc(), 586| 1.04k| Twine("symbol '") + SymB.getName() + 587| 1.04k| "' can not be undefined in a subtraction expression"); 588| 1.04k| return; 589| 1.04k| } 590| | 591| 1.04k| assert(!SymB.isAbsolute() && "Should have been folded"); ------------------ | Branch (591:5): [True: 1, False: 0] | Branch (591:5): [True: 1, Folded] | Branch (591:5): [True: 1, False: 0] ------------------ 592| 1| const MCSection &SecB = SymB.getSection(); 593| 1| if (&SecB != &FixupSection) { ------------------ | Branch (593:9): [True: 0, False: 1] ------------------ 594| 0| Ctx.reportError(Fixup.getLoc(), 595| 0| "Cannot represent a difference across sections"); 596| 0| return; 597| 0| } 598| | 599| 1| bool valid; 600| 1| uint64_t SymBOffset = Layout.getSymbolOffset(SymB, valid); 601| 1| uint64_t K = SymBOffset - FixupOffset; 602| 1| IsPCRel = true; 603| 1| C -= K; 604| 1| } 605| | 606| | // We either rejected the fixup or folded B into C at this point. 607| 399| const MCSymbolRefExpr *RefA = Target.getSymA(); 608| 399| const auto *SymA = RefA ? cast(&RefA->getSymbol()) : nullptr; ------------------ | Branch (608:22): [True: 398, False: 1] ------------------ 609| | 610| 399| bool ViaWeakRef = false; 611| 399| if (SymA && SymA->isVariable()) { ------------------ | Branch (611:7): [True: 398, False: 1] | Branch (611:15): [True: 0, False: 398] ------------------ 612| 0| const MCExpr *Expr = SymA->getVariableValue(); 613| 0| if (const auto *Inner = dyn_cast(Expr)) { ------------------ | Branch (613:21): [True: 0, False: 0] ------------------ 614| 0| if (Inner->getKind() == MCSymbolRefExpr::VK_WEAKREF) { ------------------ | Branch (614:11): [True: 0, False: 0] ------------------ 615| 0| SymA = cast(&Inner->getSymbol()); 616| 0| ViaWeakRef = true; 617| 0| } 618| 0| } 619| 0| } 620| | 621| 399| unsigned Type = getRelocType(Ctx, Target, Fixup, IsPCRel); 622| 399| bool RelocateWithSymbol = shouldRelocateWithSymbol(Asm, RefA, SymA, C, Type); 623| 399| if (!RelocateWithSymbol && SymA && !SymA->isUndefined()) { ------------------ | Branch (623:7): [True: 399, False: 0] | Branch (623:30): [True: 398, False: 1] | Branch (623:38): [True: 398, False: 0] ------------------ 624| 398| bool valid; 625| 398| C += Layout.getSymbolOffset(*SymA, valid); 626| 398| } 627| | 628| 399| uint64_t Addend = 0; 629| 399| if (hasRelocationAddend()) { ------------------ | Branch (629:7): [True: 0, False: 399] ------------------ 630| 0| Addend = C; 631| 0| C = 0; 632| 0| } 633| | 634| 399| FixedValue = C; 635| | 636| 399| if (!RelocateWithSymbol) { ------------------ | Branch (636:7): [True: 399, False: 0] ------------------ 637| 399| const MCSection *SecA = 638| 399| (SymA && !SymA->isUndefined()) ? &SymA->getSection() : nullptr; ------------------ | Branch (638:10): [True: 398, False: 1] | Branch (638:18): [True: 398, False: 0] ------------------ 639| 399| auto *ELFSec = cast_or_null(SecA); 640| 399| const auto *SectionSymbol = 641| 399| ELFSec ? cast(ELFSec->getBeginSymbol()) : nullptr; ------------------ | Branch (641:9): [True: 398, False: 1] ------------------ 642| 399| if (SectionSymbol) ------------------ | Branch (642:9): [True: 398, False: 1] ------------------ 643| 398| SectionSymbol->setUsedInReloc(); 644| 399| ELFRelocationEntry Rec(FixupOffset, SectionSymbol, Type, Addend); 645| 399| Relocations[&FixupSection].push_back(Rec); 646| 399| return; 647| 399| } 648| | 649| 0| if (SymA) { ------------------ | Branch (649:7): [True: 0, False: 0] ------------------ 650| 0| if (const MCSymbolELF *R = Renames.lookup(SymA)) ------------------ | Branch (650:28): [True: 0, False: 0] ------------------ 651| 0| SymA = R; 652| | 653| 0| if (ViaWeakRef) ------------------ | Branch (653:9): [True: 0, False: 0] ------------------ 654| 0| SymA->setIsWeakrefUsedInReloc(); 655| 0| else 656| 0| SymA->setUsedInReloc(); 657| 0| } 658| 0| ELFRelocationEntry Rec(FixupOffset, SymA, Type, Addend); 659| 0| Relocations[&FixupSection].push_back(Rec); 660| 0| return; 661| 399|} ELFObjectWriter.cpp:_ZNK12_GLOBAL__N_115ELFObjectWriter12getRelocTypeERN7llvm_ks9MCContextERKNS1_7MCValueERKNS1_7MCFixupEb: 133| 399| const MCFixup &Fixup, bool IsPCRel) const { 134| 399| return TargetObjectWriter->getRelocType(Ctx, Target, Fixup, IsPCRel); 135| 399| } ELFObjectWriter.cpp:_ZNK12_GLOBAL__N_115ELFObjectWriter24shouldRelocateWithSymbolERKN7llvm_ks11MCAssemblerEPKNS1_15MCSymbolRefExprEPKNS1_8MCSymbolEmj: 437| 399| unsigned Type) const { 438| 399| const auto *Sym = cast_or_null(S); 439| | // A PCRel relocation to an absolute value has no symbol (or section). We 440| | // represent that with a relocation to a null section. 441| 399| if (!RefA) ------------------ | Branch (441:7): [True: 1, False: 398] ------------------ 442| 1| return false; 443| | 444| 398| MCSymbolRefExpr::VariantKind Kind = RefA->getKind(); 445| 398| switch (Kind) { 446| 398| default: ------------------ | Branch (446:3): [True: 398, False: 0] ------------------ 447| 398| break; 448| | // The .odp creation emits a relocation against the symbol ".TOC." which 449| | // create a R_PPC64_TOC relocation. However the relocation symbol name 450| | // in final object creation should be NULL, since the symbol does not 451| | // really exist, it is just the reference to TOC base for the current 452| | // object file. Since the symbol is undefined, returning false results 453| | // in a relocation with a null section which is the desired result. 454| 398| case MCSymbolRefExpr::VK_PPC_TOCBASE: ------------------ | Branch (454:3): [True: 0, False: 398] ------------------ 455| 0| return false; 456| | 457| | // These VariantKind cause the relocation to refer to something other than 458| | // the symbol itself, like a linker generated table. Since the address of 459| | // symbol is not relevant, we cannot replace the symbol with the 460| | // section and patch the difference in the addend. 461| 0| case MCSymbolRefExpr::VK_GOT: ------------------ | Branch (461:3): [True: 0, False: 398] ------------------ 462| 0| case MCSymbolRefExpr::VK_PLT: ------------------ | Branch (462:3): [True: 0, False: 398] ------------------ 463| 0| case MCSymbolRefExpr::VK_GOTPCREL: ------------------ | Branch (463:3): [True: 0, False: 398] ------------------ 464| 0| case MCSymbolRefExpr::VK_Mips_GOT: ------------------ | Branch (464:3): [True: 0, False: 398] ------------------ 465| 0| case MCSymbolRefExpr::VK_PPC_GOT_LO: ------------------ | Branch (465:3): [True: 0, False: 398] ------------------ 466| 0| case MCSymbolRefExpr::VK_PPC_GOT_HI: ------------------ | Branch (466:3): [True: 0, False: 398] ------------------ 467| 0| case MCSymbolRefExpr::VK_PPC_GOT_HA: ------------------ | Branch (467:3): [True: 0, False: 398] ------------------ 468| 0| return true; 469| 398| } 470| | 471| | // An undefined symbol is not in any section, so the relocation has to point 472| | // to the symbol itself. 473| 398| assert(Sym && "Expected a symbol"); ------------------ | Branch (473:3): [True: 398, False: 0] | Branch (473:3): [True: 398, Folded] | Branch (473:3): [True: 398, False: 0] ------------------ 474| 398| if (Sym->isUndefined()) ------------------ | Branch (474:7): [True: 0, False: 398] ------------------ 475| 0| return true; 476| | 477| 398| unsigned Binding = Sym->getBinding(); 478| 398| switch(Binding) { 479| 0| default: ------------------ | Branch (479:3): [True: 0, False: 398] ------------------ 480| 0| llvm_unreachable("Invalid Binding"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ 481| 398| case ELF::STB_LOCAL: ------------------ | Branch (481:3): [True: 398, False: 0] ------------------ 482| 398| break; 483| 0| case ELF::STB_WEAK: ------------------ | Branch (483:3): [True: 0, False: 398] ------------------ 484| | // If the symbol is weak, it might be overridden by a symbol in another 485| | // file. The relocation has to point to the symbol so that the linker 486| | // can update it. 487| 0| return true; 488| 0| case ELF::STB_GLOBAL: ------------------ | Branch (488:3): [True: 0, False: 398] ------------------ 489| | // Global ELF symbols can be preempted by the dynamic linker. The relocation 490| | // has to point to the symbol for a reason analogous to the STB_WEAK case. 491| 0| return true; 492| 398| } 493| | 494| | // If a relocation points to a mergeable section, we have to be careful. 495| | // If the offset is zero, a relocation with the section will encode the 496| | // same information. With a non-zero offset, the situation is different. 497| | // For example, a relocation can point 42 bytes past the end of a string. 498| | // If we change such a relocation to use the section, the linker would think 499| | // that it pointed to another string and subtracting 42 at runtime will 500| | // produce the wrong value. 501| 398| auto &Sec = cast(Sym->getSection()); 502| 398| unsigned Flags = Sec.getFlags(); 503| 398| if (Flags & ELF::SHF_MERGE) { ------------------ | Branch (503:7): [True: 0, False: 398] ------------------ 504| 0| if (C != 0) ------------------ | Branch (504:9): [True: 0, False: 0] ------------------ 505| 0| return true; 506| | 507| | // It looks like gold has a bug (http://sourceware.org/PR16794) and can 508| | // only handle section relocations to mergeable sections if using RELA. 509| 0| if (!hasRelocationAddend()) ------------------ | Branch (509:9): [True: 0, False: 0] ------------------ 510| 0| return true; 511| 0| } 512| | 513| | // Most TLS relocations use a got, so they need the symbol. Even those that 514| | // are just an offset (@tpoff), require a symbol in gold versions before 515| | // 5efeedf61e4fe720fd3e9a08e6c91c10abb66d42 (2014-09-26) which fixed 516| | // http://sourceware.org/PR16773. 517| 398| if (Flags & ELF::SHF_TLS) ------------------ | Branch (517:7): [True: 0, False: 398] ------------------ 518| 0| return true; 519| | 520| | // If the symbol is a thumb function the final relocation must set the lowest 521| | // bit. With a symbol that is done by just having the symbol have that bit 522| | // set, so we would lose the bit if we relocated with the section. 523| | // FIXME: We could use the section but add the bit to the relocation value. 524| 398| if (Asm.isThumbFunc(Sym)) ------------------ | Branch (524:7): [True: 0, False: 398] ------------------ 525| 0| return true; 526| | 527| 398| if (TargetObjectWriter->needsRelocateWithSymbol(*Sym, Type)) ------------------ | Branch (527:7): [True: 0, False: 398] ------------------ 528| 0| return true; 529| 398| return false; 530| 398|} ELFObjectWriter.cpp:_ZNK12_GLOBAL__N_115ELFObjectWriter19hasRelocationAddendEv: 127| 405| bool hasRelocationAddend() const { 128| | // Keystone doesn't want relocation addends. 129| | /* return TargetObjectWriter->hasRelocationAddend(); */ 130| 405| return false; 131| 405| } ELFObjectWriter.cpp:_ZNK12_GLOBAL__N_115ELFObjectWriter38isSymbolRefDifferenceFullyResolvedImplERKN7llvm_ks11MCAssemblerERKNS1_8MCSymbolERKNS1_10MCFragmentEbb: 1237| 1.78k| bool InSet, bool IsPCRel) const { 1238| 1.78k| const auto &SymA = cast(SA); 1239| 1.78k| if (IsPCRel) { ------------------ | Branch (1239:7): [True: 0, False: 1.78k] ------------------ 1240| 0| assert(!InSet); ------------------ | Branch (1240:5): [True: 0, False: 0] ------------------ 1241| 0| if (::isWeak(SymA)) ------------------ | Branch (1241:9): [True: 0, False: 0] ------------------ 1242| 0| return false; 1243| 0| } 1244| 1.78k| return MCObjectWriter::isSymbolRefDifferenceFullyResolvedImpl(Asm, SymA, FB, 1245| 1.78k| InSet, IsPCRel); 1246| 1.78k|} ELFObjectWriter.cpp:_ZN12_GLOBAL__N_115ELFObjectWriter11writeObjectERN7llvm_ks11MCAssemblerERKNS1_11MCAsmLayoutE: 1103| 262|{ 1104| 262| MCContext &Ctx = Asm.getContext(); 1105| 262| MCSectionELF *StrtabSection = 1106| 262| Ctx.getELFSection(".strtab", ELF::SHT_STRTAB, 0); 1107| 262| StringTableIndex = addToSectionTable(StrtabSection); 1108| | 1109| 262| RevGroupMapTy RevGroupMap; 1110| 262| SectionIndexMapTy SectionIndexMap; 1111| | 1112| 262| std::map> GroupMembers; 1113| | 1114| | // ... then the sections ... 1115| 262| SectionOffsetsTy SectionOffsets; 1116| 262| std::vector Groups; 1117| 262| std::vector Relocations; 1118| 264| for (MCSection &Sec : Asm) { ------------------ | Branch (1118:23): [True: 264, False: 251] ------------------ 1119| 264| MCSectionELF &Section = static_cast(Sec); 1120| | 1121| 264| align(Section.getAlignment()); 1122| | 1123| | // Remember the offset into the file for this section. 1124| 264| uint64_t SecStart = getStream().tell(); 1125| | 1126| 264| const MCSymbolELF *SignatureSymbol = Section.getGroup(); 1127| 264| writeSectionData(Asm, Section, Layout); 1128| 264| if (Asm.getError()) ------------------ | Branch (1128:9): [True: 11, False: 253] ------------------ 1129| 11| return; 1130| | 1131| 253| uint64_t SecEnd = getStream().tell(); 1132| 253| SectionOffsets[&Section] = std::make_pair(SecStart, SecEnd); 1133| | 1134| 253| MCSectionELF *RelSection = createRelocationSection(Ctx, Section); 1135| | 1136| 253| if (SignatureSymbol) { ------------------ | Branch (1136:9): [True: 0, False: 253] ------------------ 1137| 0| Asm.registerSymbol(*SignatureSymbol); 1138| 0| unsigned &GroupIdx = RevGroupMap[SignatureSymbol]; 1139| 0| if (!GroupIdx) { ------------------ | Branch (1139:11): [True: 0, False: 0] ------------------ 1140| 0| MCSectionELF *Group = Ctx.createELFGroupSection(SignatureSymbol); 1141| 0| GroupIdx = addToSectionTable(Group); 1142| 0| Group->setAlignment(4); 1143| 0| Groups.push_back(Group); 1144| 0| } 1145| 0| std::vector &Members = 1146| 0| GroupMembers[SignatureSymbol]; 1147| 0| Members.push_back(&Section); 1148| 0| if (RelSection) ------------------ | Branch (1148:11): [True: 0, False: 0] ------------------ 1149| 0| Members.push_back(RelSection); 1150| 0| } 1151| | 1152| 253| SectionIndexMap[&Section] = addToSectionTable(&Section); 1153| 253| if (RelSection) { ------------------ | Branch (1153:9): [True: 2, False: 251] ------------------ 1154| 2| SectionIndexMap[RelSection] = addToSectionTable(RelSection); 1155| 2| Relocations.push_back(RelSection); 1156| 2| } 1157| 253| } 1158| | 1159| 251|return; 1160| | 1161| 251| for (MCSectionELF *Group : Groups) { ------------------ | Branch (1161:28): [True: 0, False: 0] ------------------ 1162| 0| align(Group->getAlignment()); 1163| | 1164| | // Remember the offset into the file for this section. 1165| 0| uint64_t SecStart = getStream().tell(); 1166| | 1167| 0| const MCSymbol *SignatureSymbol = Group->getGroup(); 1168| 0| assert(SignatureSymbol); ------------------ | Branch (1168:5): [True: 0, False: 0] ------------------ 1169| 0| write(uint32_t(ELF::GRP_COMDAT)); 1170| 0| for (const MCSectionELF *Member : GroupMembers[SignatureSymbol]) { ------------------ | Branch (1170:37): [True: 0, False: 0] ------------------ 1171| 0| uint32_t SecIndex = SectionIndexMap.lookup(Member); 1172| 0| write(SecIndex); 1173| 0| } 1174| | 1175| 0| uint64_t SecEnd = getStream().tell(); 1176| 0| SectionOffsets[Group] = std::make_pair(SecStart, SecEnd); 1177| 0| } 1178| | 1179| | // Compute symbol table information. 1180| 0| computeSymbolTable(Asm, Layout, SectionIndexMap, RevGroupMap, SectionOffsets); 1181| | 1182| 0| for (MCSectionELF *RelSection : Relocations) { ------------------ | Branch (1182:33): [True: 0, False: 0] ------------------ 1183| 0| align(RelSection->getAlignment()); 1184| | 1185| | // Remember the offset into the file for this section. 1186| 0| uint64_t SecStart = getStream().tell(); 1187| | 1188| 0| writeRelocations(Asm, *RelSection->getAssociatedSection()); // qq 1189| | 1190| 0| uint64_t SecEnd = getStream().tell(); 1191| 0| SectionOffsets[RelSection] = std::make_pair(SecStart, SecEnd); 1192| 0| } 1193| | 1194| 0| { 1195| 0| uint64_t SecStart = getStream().tell(); 1196| 0| const MCSectionELF *Sec = createStringTable(Ctx); 1197| 0| uint64_t SecEnd = getStream().tell(); 1198| 0| SectionOffsets[Sec] = std::make_pair(SecStart, SecEnd); 1199| 0| } 1200| | 1201| 0| uint64_t NaturalAlignment = is64Bit() ? 8 : 4; ------------------ | Branch (1201:31): [True: 0, False: 0] ------------------ 1202| 0| align(NaturalAlignment); 1203| | 1204| 0| const uint64_t SectionHeaderOffset = getStream().tell(); 1205| | 1206| | // ... then the section header table ... 1207| 0| writeSectionHeader(Layout, SectionIndexMap, SectionOffsets); 1208| | 1209| 0| uint16_t NumSections = (SectionTable.size() + 1 >= ELF::SHN_LORESERVE) ------------------ | Branch (1209:26): [True: 0, False: 0] ------------------ 1210| 0| ? (uint16_t)ELF::SHN_UNDEF 1211| 0| : SectionTable.size() + 1; 1212| 0| if (sys::IsLittleEndianHost != IsLittleEndian) ------------------ | Branch (1212:7): [True: 0, False: 0] ------------------ 1213| 0| sys::swapByteOrder(NumSections); 1214| 0| unsigned NumSectionsOffset; 1215| | 1216| 0| if (is64Bit()) { ------------------ | Branch (1216:7): [True: 0, False: 0] ------------------ 1217| 0| uint64_t Val = SectionHeaderOffset; 1218| 0| if (sys::IsLittleEndianHost != IsLittleEndian) ------------------ | Branch (1218:9): [True: 0, False: 0] ------------------ 1219| 0| sys::swapByteOrder(Val); 1220| 0| getStream().pwrite(reinterpret_cast(&Val), sizeof(Val), 1221| 0| offsetof(ELF::Elf64_Ehdr, e_shoff)); 1222| 0| NumSectionsOffset = offsetof(ELF::Elf64_Ehdr, e_shnum); 1223| 0| } else { 1224| 0| uint32_t Val = SectionHeaderOffset; 1225| 0| if (sys::IsLittleEndianHost != IsLittleEndian) ------------------ | Branch (1225:9): [True: 0, False: 0] ------------------ 1226| 0| sys::swapByteOrder(Val); 1227| 0| getStream().pwrite(reinterpret_cast(&Val), sizeof(Val), 1228| 0| offsetof(ELF::Elf32_Ehdr, e_shoff)); 1229| | NumSectionsOffset = offsetof(ELF::Elf32_Ehdr, e_shnum); 1230| 0| } 1231| 0| getStream().pwrite(reinterpret_cast(&NumSections), 1232| 0| sizeof(NumSections), NumSectionsOffset); 1233| 0|} ELFObjectWriter.cpp:_ZN12_GLOBAL__N_115ELFObjectWriter17addToSectionTableEPKN7llvm_ks12MCSectionELFE: 240| 517|unsigned ELFObjectWriter::addToSectionTable(const MCSectionELF *Sec) { 241| 517| SectionTable.push_back(Sec); 242| 517| StrTabBuilder.add(Sec->getSectionName()); 243| 517| return SectionTable.size(); 244| 517|} ELFObjectWriter.cpp:_ZN12_GLOBAL__N_115ELFObjectWriter5alignEj: 235| 264|void ELFObjectWriter::align(unsigned Alignment) { 236| 264| uint64_t Padding = OffsetToAlignment(getStream().tell(), Alignment); 237| 264| WriteZeros(Padding); 238| 264|} ELFObjectWriter.cpp:_ZN12_GLOBAL__N_115ELFObjectWriter16writeSectionDataERKN7llvm_ks11MCAssemblerERNS1_9MCSectionERKNS1_11MCAsmLayoutE: 911| 264| const MCAsmLayout &Layout) { 912| 264| MCSectionELF &Section = static_cast(Sec); 913| 264| StringRef SectionName = Section.getSectionName(); 914| | 915| | // Compressing debug_frame requires handling alignment fragments which is 916| | // more work (possibly generalizing MCAssembler.cpp:writeFragment to allow 917| | // for writing to arbitrary buffers) for little benefit. 918| 264| if (!Asm.getContext().getAsmInfo()->compressDebugSections() || ------------------ | Branch (918:7): [True: 264, False: 0] | Branch (918:7): [True: 264, False: 0] ------------------ 919| 264| !SectionName.startswith(".debug_") || SectionName == ".debug_frame") { ------------------ | Branch (919:7): [True: 0, False: 0] | Branch (919:45): [True: 0, False: 0] ------------------ 920| 264| Asm.writeSectionData(&Section, Layout); 921| 264| return; 922| 264| } 923| | 924| 0| SmallVector UncompressedData; 925| 0| raw_svector_ostream VecOS(UncompressedData); 926| 0| raw_pwrite_stream &OldStream = getStream(); 927| 0| setStream(VecOS); 928| 0| Asm.writeSectionData(&Section, Layout); 929| 0| setStream(OldStream); 930| | 931| |#if 0 932| | SmallVector CompressedContents; 933| | zlib::Status Success = zlib::compress( 934| | StringRef(UncompressedData.data(), UncompressedData.size()), 935| | CompressedContents); 936| | if (Success != zlib::StatusOK) { 937| | getStream() << UncompressedData; 938| | return; 939| | } 940| | 941| | if (!prependCompressionHeader(UncompressedData.size(), CompressedContents)) { 942| | getStream() << UncompressedData; 943| | return; 944| | } 945| | Asm.getContext().renameELFSection(&Section, 946| | (".z" + SectionName.drop_front(1)).str()); 947| | getStream() << CompressedContents; 948| |#endif 949| 0|} ELFObjectWriter.cpp:_ZN12_GLOBAL__N_115ELFObjectWriter23createRelocationSectionERN7llvm_ks9MCContextERKNS1_12MCSectionELFE: 885| 253| const MCSectionELF &Sec) { 886| 253| if (Relocations[&Sec].empty()) ------------------ | Branch (886:7): [True: 251, False: 2] ------------------ 887| 251| return nullptr; 888| | 889| 2| const StringRef SectionName = Sec.getSectionName(); 890| 2| std::string RelaSectionName = hasRelocationAddend() ? ".rela" : ".rel"; ------------------ | Branch (890:33): [True: 0, False: 2] ------------------ 891| 2| RelaSectionName += SectionName; 892| | 893| 2| unsigned EntrySize; 894| 2| if (hasRelocationAddend()) ------------------ | Branch (894:7): [True: 0, False: 2] ------------------ 895| 0| EntrySize = is64Bit() ? sizeof(ELF::Elf64_Rela) : sizeof(ELF::Elf32_Rela); ------------------ | Branch (895:17): [True: 0, False: 0] ------------------ 896| 2| else 897| 2| EntrySize = is64Bit() ? sizeof(ELF::Elf64_Rel) : sizeof(ELF::Elf32_Rel); ------------------ | Branch (897:17): [True: 0, False: 2] ------------------ 898| | 899| 2| unsigned Flags = 0; 900| 2| if (Sec.getFlags() & ELF::SHF_GROUP) ------------------ | Branch (900:7): [True: 0, False: 2] ------------------ 901| 0| Flags = ELF::SHF_GROUP; 902| | 903| 2| MCSectionELF *RelaSection = Ctx.createELFRelSection( 904| 2| RelaSectionName, hasRelocationAddend() ? ELF::SHT_RELA : ELF::SHT_REL, ------------------ | Branch (904:24): [True: 0, False: 2] ------------------ 905| 2| Flags, EntrySize, Sec.getGroup(), &Sec); 906| 2| RelaSection->setAlignment(is64Bit() ? 8 : 4); ------------------ | Branch (906:29): [True: 0, False: 2] ------------------ 907| 2| return RelaSection; 908| 253|} ELFObjectWriter.cpp:_ZNK12_GLOBAL__N_115ELFObjectWriter7is64BitEv: 126| 4| bool is64Bit() const { return TargetObjectWriter->is64Bit(); } _ZN7llvm_ks12MCAsmBackendC2Ev: 15| 749|MCAsmBackend::MCAsmBackend() : HasDataInCodeSupport(false) {} _ZN7llvm_ks12MCAsmBackendD2Ev: 17| 749|MCAsmBackend::~MCAsmBackend() {} _ZNK7llvm_ks12MCAsmBackend12getFixupKindENS_9StringRefE: 19| 37|Optional MCAsmBackend::getFixupKind(StringRef Name) const { 20| 37| return None; 21| 37|} _ZNK7llvm_ks12MCAsmBackend16getFixupKindInfoENS_11MCFixupKindE: 23| 6.90k|const MCFixupKindInfo &MCAsmBackend::getFixupKindInfo(MCFixupKind Kind) const { 24| 6.90k| static const MCFixupKindInfo Builtins[] = { 25| 6.90k| {"FK_Data_1", 0, 8, 0}, 26| 6.90k| {"FK_Data_2", 0, 16, 0}, 27| 6.90k| {"FK_Data_4", 0, 32, 0}, 28| 6.90k| {"FK_Data_8", 0, 64, 0}, 29| 6.90k| {"FK_PCRel_1", 0, 8, MCFixupKindInfo::FKF_IsPCRel}, 30| 6.90k| {"FK_PCRel_2", 0, 16, MCFixupKindInfo::FKF_IsPCRel}, 31| 6.90k| {"FK_PCRel_4", 0, 32, MCFixupKindInfo::FKF_IsPCRel}, 32| 6.90k| {"FK_PCRel_8", 0, 64, MCFixupKindInfo::FKF_IsPCRel}, 33| 6.90k| {"FK_GPRel_1", 0, 8, 0}, 34| 6.90k| {"FK_GPRel_2", 0, 16, 0}, 35| 6.90k| {"FK_GPRel_4", 0, 32, 0}, 36| 6.90k| {"FK_GPRel_8", 0, 64, 0}, 37| 6.90k| {"FK_SecRel_1", 0, 8, 0}, 38| 6.90k| {"FK_SecRel_2", 0, 16, 0}, 39| 6.90k| {"FK_SecRel_4", 0, 32, 0}, 40| 6.90k| {"FK_SecRel_8", 0, 64, 0}}; 41| | 42| 6.90k| assert((size_t)Kind <= array_lengthof(Builtins) && "Unknown fixup kind"); ------------------ | Branch (42:3): [True: 6.90k, False: 0] | Branch (42:3): [True: 6.90k, Folded] | Branch (42:3): [True: 6.90k, False: 0] ------------------ 43| 6.90k| return Builtins[Kind]; 44| 6.90k|} _ZN7llvm_ks9MCAsmInfoC2Ev: 25| 749|MCAsmInfo::MCAsmInfo() { 26| 749| PointerSize = 4; 27| 749| CalleeSaveStackSlotSize = 4; 28| | 29| 749| IsLittleEndian = true; 30| 749| StackGrowsUp = false; 31| 749| HasSubsectionsViaSymbols = false; 32| 749| HasMachoZeroFillDirective = false; 33| 749| HasMachoTBSSDirective = false; 34| 749| HasStaticCtorDtorReferenceInStaticMode = false; 35| 749| MaxInstLength = 4; 36| 749| MinInstAlignment = 1; 37| 749| DollarIsPC = false; 38| 749| SeparatorString = ";"; 39| 749| CommentString = "#"; 40| 749| LabelSuffix = ":"; 41| 749| UseAssignmentForEHBegin = false; 42| 749| NeedsLocalForSize = false; 43| 749| PrivateGlobalPrefix = "L"; 44| 749| PrivateLabelPrefix = PrivateGlobalPrefix; 45| 749| LinkerPrivateGlobalPrefix = ""; 46| 749| InlineAsmStart = "APP"; 47| 749| InlineAsmEnd = "NO_APP"; 48| 749| Code16Directive = ".code16"; 49| 749| Code32Directive = ".code32"; 50| 749| Code64Directive = ".code64"; 51| 749| AssemblerDialect = 0; 52| 749| AllowAtInName = false; 53| 749| SupportsQuotedNames = true; 54| 749| UseDataRegionDirectives = false; 55| 749| ZeroDirective = "\t.zero\t"; 56| 749| AsciiDirective = "\t.ascii\t"; 57| 749| AscizDirective = "\t.asciz\t"; 58| 749| Data8bitsDirective = "\t.byte\t"; 59| 749| Data16bitsDirective = "\t.short\t"; 60| 749| Data32bitsDirective = "\t.long\t"; 61| 749| Data64bitsDirective = "\t.quad\t"; 62| 749| SunStyleELFSectionSwitchSyntax = false; 63| 749| UsesELFSectionDirectiveForBSS = false; 64| 749| AlignmentIsInBytes = true; 65| 749| TextAlignFillValue = 0; 66| 749| GPRel64Directive = nullptr; 67| 749| GPRel32Directive = nullptr; 68| 749| GlobalDirective = "\t.globl\t"; 69| 749| SetDirectiveSuppressesReloc = false; 70| 749| HasAggressiveSymbolFolding = true; 71| 749| COMMDirectiveAlignmentIsInBytes = true; 72| 749| LCOMMDirectiveAlignmentType = LCOMM::NoAlignment; 73| 749| HasFunctionAlignment = true; 74| 749| HasDotTypeDotSizeDirective = true; 75| 749| HasSingleParameterDotFile = true; 76| 749| HasIdentDirective = false; 77| 749| HasNoDeadStrip = false; 78| 749| WeakDirective = "\t.weak\t"; 79| 749| WeakRefDirective = nullptr; 80| 749| HasWeakDefDirective = false; 81| 749| HasWeakDefCanBeHiddenDirective = false; 82| 749| HasLinkOnceDirective = false; 83| 749| HiddenVisibilityAttr = MCSA_Hidden; 84| 749| HiddenDeclarationVisibilityAttr = MCSA_Hidden; 85| 749| ProtectedVisibilityAttr = MCSA_Protected; 86| 749| SupportsDebugInformation = false; 87| 749| ExceptionsType = ExceptionHandling::None; 88| 749| WinEHEncodingType = WinEH::EncodingType::Invalid; 89| 749| DwarfUsesRelocationsAcrossSections = true; 90| 749| DwarfFDESymbolsUseAbsDiff = false; 91| 749| DwarfRegNumForCFI = false; 92| 749| NeedsDwarfSectionOffsetDirective = false; 93| 749| UseParensForSymbolVariant = false; 94| 749| UseLogicalShr = true; 95| | 96| | // FIXME: Clang's logic should be synced with the logic used to initialize 97| | // this member and the two implementations should be merged. 98| | // For reference: 99| | // - Solaris always enables the integrated assembler by default 100| | // - SparcELFMCAsmInfo and X86ELFMCAsmInfo are handling this case 101| | // - Windows always enables the integrated assembler by default 102| | // - MCAsmInfoCOFF is handling this case, should it be MCAsmInfoMicrosoft? 103| | // - MachO targets always enables the integrated assembler by default 104| | // - MCAsmInfoDarwin is handling this case 105| | // - Generic_GCC toolchains enable the integrated assembler on a per 106| | // architecture basis. 107| | // - The target subclasses for AArch64, ARM, and X86 handle these cases 108| 749| UseIntegratedAssembler = false; 109| | 110| 749| CompressDebugSections = false; 111| 749|} _ZN7llvm_ks9MCAsmInfoD2Ev: 113| 749|MCAsmInfo::~MCAsmInfo() { 114| 749|} _ZN7llvm_ks12MCAsmInfoELFC2Ev: 27| 749|MCAsmInfoELF::MCAsmInfoELF() { 28| 749| HasIdentDirective = true; 29| 749| WeakRefDirective = "\t.weak\t"; 30| 749| PrivateGlobalPrefix = ".L"; 31| 749| PrivateLabelPrefix = ".L"; 32| 749| UsesNonexecutableStackSection = true; 33| 749|} _ZN7llvm_ks11MCAssemblerC2ERNS_9MCContextERNS_12MCAsmBackendERNS_13MCCodeEmitterERNS_14MCObjectWriterE: 48| 749| : Context(Context_), Backend(Backend_), Emitter(Emitter_), Writer(Writer_), 49| 749| BundleAlignSize(0), RelaxAll(false), SubsectionsViaSymbols(false), 50| 749| IncrementalLinkerCompatible(false), ELFHeaderEFlags(0) { 51| 749| VersionMinInfo.Major = 0; // Major version == 0 for "none specified" 52| 749|} _ZN7llvm_ks11MCAssemblerD2Ev: 54| 749|MCAssembler::~MCAssembler() { 55| 749|} _ZN7llvm_ks11MCAssembler15registerSectionERNS_9MCSectionE: 80| 4.66k|bool MCAssembler::registerSection(MCSection &Section) { 81| 4.66k| if (Section.isRegistered()) ------------------ | Branch (81:7): [True: 3.78k, False: 879] ------------------ 82| 3.78k| return false; 83| 879| Sections.push_back(&Section); 84| 879| Section.setIsRegistered(true); 85| 879| return true; 86| 4.66k|} _ZNK7llvm_ks11MCAssembler11isThumbFuncEPKNS_8MCSymbolE: 88| 2.17k|bool MCAssembler::isThumbFunc(const MCSymbol *Symbol) const { 89| 2.17k| if (ThumbFuncs.count(Symbol)) ------------------ | Branch (89:7): [True: 0, False: 2.17k] ------------------ 90| 0| return true; 91| | 92| 2.17k| if (!Symbol->isVariable()) ------------------ | Branch (92:7): [True: 2.17k, False: 1] ------------------ 93| 2.17k| return false; 94| | 95| | // FIXME: It looks like gas supports some cases of the form "foo + 2". It 96| | // is not clear if that is a bug or a feature. 97| 1| const MCExpr *Expr = Symbol->getVariableValue(); 98| 1| const MCSymbolRefExpr *Ref = dyn_cast(Expr); 99| 1| if (!Ref) ------------------ | Branch (99:7): [True: 1, False: 0] ------------------ 100| 1| return false; 101| | 102| 0| if (Ref->getKind() != MCSymbolRefExpr::VK_None) ------------------ | Branch (102:7): [True: 0, False: 0] ------------------ 103| 0| return false; 104| | 105| 0| const MCSymbol &Sym = Ref->getSymbol(); 106| 0| if (!isThumbFunc(&Sym)) ------------------ | Branch (106:7): [True: 0, False: 0] ------------------ 107| 0| return false; 108| | 109| 0| ThumbFuncs.insert(Symbol); // Cache it. 110| 0| return true; 111| 0|} _ZNK7llvm_ks11MCAssembler13evaluateFixupERKNS_11MCAsmLayoutERKNS_7MCFixupEPKNS_10MCFragmentERNS_7MCValueERmRj: 150| 1.49k|{ 151| 1.49k| KsError = 0; 152| | 153| | // FIXME: This code has some duplication with recordRelocation. We should 154| | // probably merge the two into a single callback that tries to evaluate a 155| | // fixup and records a relocation if one is needed. 156| 1.49k| const MCExpr *Expr = Fixup.getValue(); 157| 1.49k| if (!Expr->evaluateAsRelocatable(Target, &Layout, &Fixup)) { ------------------ | Branch (157:7): [True: 19, False: 1.47k] ------------------ 158| | // getContext().reportError(Fixup.getLoc(), "expected relocatable expression"); 159| | // Claim to have completely evaluated the fixup, to prevent any further 160| | // processing from being done. 161| | // return true; 162| 19| Value = 0; 163| 19| KsError = KS_ERR_ASM_INVALIDOPERAND; 164| 19| return false; 165| 19| } 166| | 167| 1.47k| bool IsPCRel = Backend.getFixupKindInfo( 168| 1.47k| Fixup.getKind()).Flags & MCFixupKindInfo::FKF_IsPCRel; 169| | 170| 1.47k| bool IsResolved; 171| 1.47k| if (IsPCRel) { ------------------ | Branch (171:7): [True: 6, False: 1.47k] ------------------ 172| 6| if (Target.getSymB()) { ------------------ | Branch (172:9): [True: 1, False: 5] ------------------ 173| 1| IsResolved = false; 174| 5| } else if (!Target.getSymA()) { ------------------ | Branch (174:16): [True: 0, False: 5] ------------------ 175| 0| if (getBackend().getArch() == KS_ARCH_X86) ------------------ | Branch (175:11): [True: 0, False: 0] ------------------ 176| 0| IsResolved = true; 177| 0| else 178| 0| IsResolved = false; 179| 5| } else { 180| 5| const MCSymbolRefExpr *A = Target.getSymA(); 181| 5| const MCSymbol &SA = A->getSymbol(); 182| 5| if (A->getKind() != MCSymbolRefExpr::VK_None || SA.isUndefined()) { ------------------ | Branch (182:11): [True: 0, False: 5] | Branch (182:55): [True: 5, False: 0] ------------------ 183| 5| IsResolved = false; 184| 5| } else { 185| 0| IsResolved = getWriter().isSymbolRefDifferenceFullyResolvedImpl( 186| 0| *this, SA, *DF, false, true); 187| 0| } 188| 5| } 189| 1.47k| } else { 190| 1.47k| IsResolved = Target.isAbsolute(); 191| 1.47k| } 192| | 193| 1.47k| Value = Target.getConstant(); 194| | 195| 1.47k| if (const MCSymbolRefExpr *A = Target.getSymA()) { ------------------ | Branch (195:30): [True: 1.12k, False: 355] ------------------ 196| 1.12k| const MCSymbol &Sym = A->getSymbol(); 197| 1.12k| bool valid; 198| 1.12k| if (Sym.isDefined()) { ------------------ | Branch (198:9): [True: 1.09k, False: 31] ------------------ 199| 1.09k| Value += Layout.getSymbolOffset(Sym, valid); 200| 1.09k| if (!valid) { ------------------ | Branch (200:11): [True: 0, False: 1.09k] ------------------ 201| 0| KsError = KS_ERR_ASM_FIXUP_INVALID; 202| 0| return false; 203| 0| } 204| 1.09k| } else { 205| | // a missing symbol. is there any resolver registered? 206| 31| if (KsSymResolver) { ------------------ | Branch (206:13): [True: 0, False: 31] ------------------ 207| 0| uint64_t imm; 208| 0| ks_sym_resolver resolver = (ks_sym_resolver)KsSymResolver; 209| 0| if (resolver(Sym.getName().str().c_str(), &imm)) { ------------------ | Branch (209:17): [True: 0, False: 0] ------------------ 210| | // resolver handled this symbol 211| 0| Value = imm; 212| 0| IsResolved = true; 213| 0| } else { 214| | // resolver did not handle this symbol 215| 0| KsError = KS_ERR_ASM_SYMBOL_MISSING; 216| 0| return false; 217| 0| } 218| 31| } else { 219| | // no resolver registered 220| 31| KsError = KS_ERR_ASM_SYMBOL_MISSING; 221| 31| return false; 222| 31| } 223| 31| } 224| 1.12k| } 225| | 226| 1.44k| if (const MCSymbolRefExpr *B = Target.getSymB()) { ------------------ | Branch (226:30): [True: 1.04k, False: 400] ------------------ 227| 1.04k| const MCSymbol &Sym = B->getSymbol(); 228| 1.04k| bool valid; 229| 1.04k| if (Sym.isDefined()) { ------------------ | Branch (229:9): [True: 1, False: 1.04k] ------------------ 230| 1| Value -= Layout.getSymbolOffset(Sym, valid); 231| 1| if (!valid) { ------------------ | Branch (231:11): [True: 0, False: 1] ------------------ 232| 0| KsError = KS_ERR_ASM_FIXUP_INVALID; 233| 0| return false; 234| 0| } 235| 1| } 236| 1.04k| } 237| | 238| 1.44k| bool ShouldAlignPC = Backend.getFixupKindInfo(Fixup.getKind()).Flags & 239| 1.44k| MCFixupKindInfo::FKF_IsAlignedDownTo32Bits; 240| 1.44k| assert((ShouldAlignPC ? IsPCRel : true) && ------------------ | Branch (240:3): [True: 0, False: 1.44k] | Branch (240:3): [True: 1.44k, False: 0] | Branch (240:3): [True: 1.44k, Folded] | Branch (240:3): [True: 1.44k, False: 0] ------------------ 241| 1.44k| "FKF_IsAlignedDownTo32Bits is only allowed on PC-relative fixups!"); 242| | 243| 1.44k| if (IsPCRel) { ------------------ | Branch (243:7): [True: 0, False: 1.44k] ------------------ 244| 0| bool valid; 245| 0| uint64_t Offset = Layout.getFragmentOffset(DF, valid) + Fixup.getOffset(); 246| 0| if (!valid) { ------------------ | Branch (246:9): [True: 0, False: 0] ------------------ 247| 0| KsError = KS_ERR_ASM_FRAGMENT_INVALID; 248| 0| return false; 249| 0| } 250| | 251| | // A number of ARM fixups in Thumb mode require that the effective PC 252| | // address be determined as the 32-bit aligned version of the actual offset. 253| 0| if (ShouldAlignPC) Offset &= ~0x3; ------------------ | Branch (253:9): [True: 0, False: 0] ------------------ 254| 0| Value -= Offset; 255| 0| } 256| | 257| | // Let the backend adjust the fixup value if necessary, including whether 258| | // we need a relocation. 259| 1.44k| Backend.processFixupValue(*this, Layout, Fixup, DF, Target, Value, 260| 1.44k| IsResolved); 261| | 262| 1.44k| return IsResolved; 263| 1.44k|} _ZNK7llvm_ks11MCAssembler19computeFragmentSizeERKNS_11MCAsmLayoutERKNS_10MCFragmentERb: 267| 2.78k|{ 268| 2.78k| valid = true; 269| 2.78k| switch (F.getKind()) { ------------------ | Branch (269:11): [True: 2.78k, False: 0] ------------------ 270| 278| case MCFragment::FT_Data: ------------------ | Branch (270:3): [True: 278, False: 2.50k] ------------------ 271| 278| return cast(F).getContents().size(); 272| 0| case MCFragment::FT_Relaxable: ------------------ | Branch (272:3): [True: 0, False: 2.78k] ------------------ 273| 0| return cast(F).getContents().size(); 274| 0| case MCFragment::FT_CompactEncodedInst: ------------------ | Branch (274:3): [True: 0, False: 2.78k] ------------------ 275| 0| return cast(F).getContents().size(); 276| 1.19k| case MCFragment::FT_Fill: ------------------ | Branch (276:3): [True: 1.19k, False: 1.58k] ------------------ 277| 1.19k| return cast(F).getSize(); 278| | 279| 0| case MCFragment::FT_LEB: ------------------ | Branch (279:3): [True: 0, False: 2.78k] ------------------ 280| 0| return cast(F).getContents().size(); 281| | 282| 0| case MCFragment::FT_SafeSEH: ------------------ | Branch (282:3): [True: 0, False: 2.78k] ------------------ 283| 0| return 4; 284| | 285| 538| case MCFragment::FT_Align: { ------------------ | Branch (285:3): [True: 538, False: 2.24k] ------------------ 286| 538| const MCAlignFragment &AF = cast(F); 287| 538| unsigned Offset = Layout.getFragmentOffset(&AF, valid); 288| 538| if (!valid) { ------------------ | Branch (288:9): [True: 0, False: 538] ------------------ 289| 0| return 0; 290| 0| } 291| 538| unsigned Size = OffsetToAlignment(Offset, AF.getAlignment()); 292| | // If we are padding with nops, force the padding to be larger than the 293| | // minimum nop size. 294| 538| if (Size > 0 && AF.hasEmitNops()) { ------------------ | Branch (294:9): [True: 0, False: 538] | Branch (294:21): [True: 0, False: 0] ------------------ 295| 0| while (Size % getBackend().getMinimumNopSize()) ------------------ | Branch (295:14): [True: 0, False: 0] ------------------ 296| 0| Size += AF.getAlignment(); 297| 0| } 298| 538| if (Size > AF.getMaxBytesToEmit()) ------------------ | Branch (298:9): [True: 0, False: 538] ------------------ 299| 0| return 0; 300| 538| return Size; 301| 538| } 302| | 303| 769| case MCFragment::FT_Org: { ------------------ | Branch (303:3): [True: 769, False: 2.01k] ------------------ 304| 769| const MCOrgFragment &OF = cast(F); 305| 769| MCValue Value; 306| 769| if (!OF.getOffset().evaluateAsValue(Value, Layout)) { ------------------ | Branch (306:9): [True: 13, False: 756] ------------------ 307| | //report_fatal_error("expected assembly-time absolute expression"); 308| 13| valid = false; 309| 13| return 0; 310| 13| } 311| | 312| | // FIXME: We need a way to communicate this error. 313| 756| uint64_t FragmentOffset = Layout.getFragmentOffset(&OF, valid); 314| 756| if (!valid) { ------------------ | Branch (314:9): [True: 0, False: 756] ------------------ 315| 0| return 0; 316| 0| } 317| 756| int64_t TargetLocation = Value.getConstant(); 318| 756| if (const MCSymbolRefExpr *A = Value.getSymA()) { ------------------ | Branch (318:32): [True: 218, False: 538] ------------------ 319| 218| uint64_t Val; 320| 218| if (!Layout.getSymbolOffset(A->getSymbol(), Val, valid)) { ------------------ | Branch (320:11): [True: 22, False: 196] ------------------ 321| | //report_fatal_error("expected absolute expression"); 322| 22| valid = false; 323| 22| return 0; 324| 22| } 325| 196| TargetLocation += Val; 326| 196| } 327| 734| int64_t Size = TargetLocation - FragmentOffset; 328| 734| if (Size < 0 || Size >= 0x40000000) { ------------------ | Branch (328:9): [True: 2, False: 732] | Branch (328:21): [True: 0, False: 732] ------------------ 329| | //report_fatal_error("invalid .org offset '" + Twine(TargetLocation) + 330| | // "' (at offset '" + Twine(FragmentOffset) + "')"); 331| 2| valid = false; 332| 2| return 0; 333| 2| } 334| 732| return Size; 335| 734| } 336| | 337| 0| case MCFragment::FT_Dwarf: ------------------ | Branch (337:3): [True: 0, False: 2.78k] ------------------ 338| 0| return cast(F).getContents().size(); 339| 0| case MCFragment::FT_DwarfFrame: ------------------ | Branch (339:3): [True: 0, False: 2.78k] ------------------ 340| 0| return cast(F).getContents().size(); 341| 0| case MCFragment::FT_Dummy: ------------------ | Branch (341:3): [True: 0, False: 2.78k] ------------------ 342| 0| llvm_unreachable("Should not have been added"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ 343| 2.78k| } 344| | 345| 0| llvm_unreachable("invalid fragment kind"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ 346| 2.78k|} _ZN7llvm_ks11MCAsmLayout14layoutFragmentEPNS_10MCFragmentE: 349| 1.64k|{ 350| 1.64k| MCFragment *Prev = F->getPrevNode(); 351| | 352| | // We should never try to recompute something which is valid. 353| | //assert(!isFragmentValid(F) && "Attempt to recompute a valid fragment!"); 354| 1.64k| if (isFragmentValid(F)) ------------------ | Branch (354:7): [True: 0, False: 1.64k] ------------------ 355| 0| return true; 356| | 357| | // We should never try to compute the fragment layout if its predecessor 358| | // isn't valid. 359| | //assert((!Prev || isFragmentValid(Prev)) && 360| | // "Attempt to compute fragment before its predecessor!"); 361| 1.64k| if (Prev && !isFragmentValid(Prev)) ------------------ | Branch (361:7): [True: 1.32k, False: 316] | Branch (361:15): [True: 24, False: 1.30k] ------------------ 362| 24| return true; 363| | 364| 1.62k| bool valid = true; 365| | // Compute fragment offset and size. 366| 1.62k| if (Prev) ------------------ | Branch (366:7): [True: 1.30k, False: 316] ------------------ 367| 1.30k| F->Offset = Prev->Offset + getAssembler().computeFragmentSize(*this, *Prev, valid); 368| 316| else 369| 316| F->Offset = getAssembler().getContext().getBaseAddress(); 370| 1.62k| if (!valid) { ------------------ | Branch (370:7): [True: 26, False: 1.59k] ------------------ 371| 26| return false; 372| 26| } 373| 1.59k| LastValidFragment[F->getParent()] = F; 374| | 375| | // If bundling is enabled and this fragment has instructions in it, it has to 376| | // obey the bundling restrictions. With padding, we'll have: 377| | // 378| | // 379| | // BundlePadding 380| | // ||| 381| | // ------------------------------------- 382| | // Prev |##########| F | 383| | // ------------------------------------- 384| | // ^ 385| | // | 386| | // F->Offset 387| | // 388| | // The fragment's offset will point to after the padding, and its computed 389| | // size won't include the padding. 390| | // 391| | // When the -mc-relax-all flag is used, we optimize bundling by writting the 392| | // padding directly into fragments when the instructions are emitted inside 393| | // the streamer. When the fragment is larger than the bundle size, we need to 394| | // ensure that it's bundle aligned. This means that if we end up with 395| | // multiple fragments, we must emit bundle padding between fragments. 396| | // 397| | // ".align N" is an example of a directive that introduces multiple 398| | // fragments. We could add a special case to handle ".align N" by emitting 399| | // within-fragment padding (which would produce less padding when N is less 400| | // than the bundle size), but for now we don't. 401| | // 402| 1.59k| if (Assembler.isBundlingEnabled() && F->hasInstructions()) { ------------------ | Branch (402:7): [True: 0, False: 1.59k] | Branch (402:40): [True: 0, False: 0] ------------------ 403| 0| assert(isa(F) && ------------------ | Branch (403:5): [True: 0, False: 0] | Branch (403:5): [True: 0, Folded] | Branch (403:5): [True: 0, False: 0] ------------------ 404| 0| "Only MCEncodedFragment implementations have instructions"); 405| 0| if (!isa(F)) ------------------ | Branch (405:9): [True: 0, False: 0] ------------------ 406| 0| return true; 407| | 408| 0| bool valid; 409| 0| uint64_t FSize = Assembler.computeFragmentSize(*this, *F, valid); 410| 0| if (!valid) ------------------ | Branch (410:9): [True: 0, False: 0] ------------------ 411| 0| return true; 412| | 413| 0| if (!Assembler.getRelaxAll() && FSize > Assembler.getBundleAlignSize()) ------------------ | Branch (413:9): [True: 0, False: 0] | Branch (413:37): [True: 0, False: 0] ------------------ 414| | //report_fatal_error("Fragment can't be larger than a bundle size"); 415| 0| return true; 416| | 417| 0| uint64_t RequiredBundlePadding = computeBundlePadding(Assembler, F, 418| 0| F->Offset, FSize); 419| 0| if (RequiredBundlePadding > UINT8_MAX) ------------------ | Branch (419:9): [True: 0, False: 0] ------------------ 420| | //report_fatal_error("Padding cannot exceed 255 bytes"); 421| 0| return true; 422| | 423| 0| F->setBundlePadding(static_cast(RequiredBundlePadding)); 424| 0| F->Offset += RequiredBundlePadding; 425| 0| } 426| | 427| 1.59k| return false; 428| 1.59k|} _ZN7llvm_ks11MCAssembler14registerSymbolERKNS_8MCSymbolEPb: 430| 27.2k|void MCAssembler::registerSymbol(const MCSymbol &Symbol, bool *Created) { 431| 27.2k| bool New = !Symbol.isRegistered(); 432| 27.2k| if (Created) ------------------ | Branch (432:7): [True: 0, False: 27.2k] ------------------ 433| 0| *Created = New; 434| 27.2k| if (New) { ------------------ | Branch (434:7): [True: 9.73k, False: 17.4k] ------------------ 435| 9.73k| Symbol.setIsRegistered(true); 436| 9.73k| Symbols.push_back(&Symbol); 437| 9.73k| } 438| 27.2k|} _ZNK7llvm_ks11MCAssembler20writeFragmentPaddingERKNS_10MCFragmentEmPNS_14MCObjectWriterE: 441| 1.46k| MCObjectWriter *OW) const { 442| | // Should NOP padding be written out before this fragment? 443| 1.46k| unsigned BundlePadding = F.getBundlePadding(); 444| 1.46k| if (BundlePadding > 0) { ------------------ | Branch (444:7): [True: 0, False: 1.46k] ------------------ 445| 0| assert(isBundlingEnabled() && ------------------ | Branch (445:5): [True: 0, False: 0] | Branch (445:5): [True: 0, Folded] | Branch (445:5): [True: 0, False: 0] ------------------ 446| 0| "Writing bundle padding with disabled bundling"); 447| 0| assert(F.hasInstructions() && ------------------ | Branch (447:5): [True: 0, False: 0] | Branch (447:5): [True: 0, Folded] | Branch (447:5): [True: 0, False: 0] ------------------ 448| 0| "Writing bundle padding for a fragment without instructions"); 449| | 450| 0| unsigned TotalLength = BundlePadding + static_cast(FSize); 451| 0| if (F.alignToBundleEnd() && TotalLength > getBundleAlignSize()) { ------------------ | Branch (451:9): [True: 0, False: 0] | Branch (451:33): [True: 0, False: 0] ------------------ 452| | // If the padding itself crosses a bundle boundary, it must be emitted 453| | // in 2 pieces, since even nop instructions must not cross boundaries. 454| | // v--------------v <- BundleAlignSize 455| | // v---------v <- BundlePadding 456| | // ---------------------------- 457| | // | Prev |####|####| F | 458| | // ---------------------------- 459| | // ^-------------------^ <- TotalLength 460| 0| unsigned DistanceToBoundary = TotalLength - getBundleAlignSize(); 461| 0| if (!getBackend().writeNopData(DistanceToBoundary, OW)) ------------------ | Branch (461:11): [True: 0, False: 0] ------------------ 462| 0| report_fatal_error("unable to write NOP sequence of " + 463| 0| Twine(DistanceToBoundary) + " bytes"); 464| 0| BundlePadding -= DistanceToBoundary; 465| 0| } 466| 0| if (!getBackend().writeNopData(BundlePadding, OW)) ------------------ | Branch (466:9): [True: 0, False: 0] ------------------ 467| 0| report_fatal_error("unable to write NOP sequence of " + 468| 0| Twine(BundlePadding) + " bytes"); 469| 0| } 470| 1.46k|} _ZNK7llvm_ks11MCAssembler16writeSectionDataEPKNS_9MCSectionERKNS_11MCAsmLayoutE: 608| 264|{ 609| | // Ignore virtual sections. 610| 264| if (Sec->isVirtualSection()) { ------------------ | Branch (610:7): [True: 0, False: 264] ------------------ 611| 0| assert(Layout.getSectionFileSize(Sec) == 0 && "Invalid size for section!"); ------------------ | Branch (611:5): [True: 0, False: 0] | Branch (611:5): [True: 0, Folded] | Branch (611:5): [True: 0, False: 0] ------------------ 612| | 613| | // Check that contents are only things legal inside a virtual section. 614| 0| for (const MCFragment &F : *Sec) { ------------------ | Branch (614:30): [True: 0, False: 0] ------------------ 615| 0| switch (F.getKind()) { 616| 0| default: llvm_unreachable("Invalid fragment in virtual section!"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ | Branch (616:7): [True: 0, False: 0] ------------------ 617| 0| case MCFragment::FT_Data: { ------------------ | Branch (617:7): [True: 0, False: 0] ------------------ 618| | // Check that we aren't trying to write a non-zero contents (or fixups) 619| | // into a virtual section. This is to support clients which use standard 620| | // directives to fill the contents of virtual sections. 621| 0| const MCDataFragment &DF = cast(F); 622| 0| assert(DF.fixup_begin() == DF.fixup_end() && ------------------ | Branch (622:9): [True: 0, False: 0] | Branch (622:9): [True: 0, Folded] | Branch (622:9): [True: 0, False: 0] ------------------ 623| 0| "Cannot have fixups in virtual section!"); 624| 0| for (unsigned i = 0, e = DF.getContents().size(); i != e; ++i) ------------------ | Branch (624:59): [True: 0, False: 0] ------------------ 625| 0| if (DF.getContents()[i]) { ------------------ | Branch (625:15): [True: 0, False: 0] ------------------ 626| 0| if (auto *ELFSec = dyn_cast(Sec)) ------------------ | Branch (626:23): [True: 0, False: 0] ------------------ 627| 0| report_fatal_error("non-zero initializer found in section '" + 628| 0| ELFSec->getSectionName() + "'"); 629| 0| else 630| 0| report_fatal_error("non-zero initializer found in virtual section"); 631| 0| } 632| 0| break; 633| 0| } 634| 0| case MCFragment::FT_Align: ------------------ | Branch (634:7): [True: 0, False: 0] ------------------ 635| | // Check that we aren't trying to write a non-zero value into a virtual 636| | // section. 637| 0| assert((cast(F).getValueSize() == 0 || ------------------ | Branch (637:9): [True: 0, False: 0] | Branch (637:9): [True: 0, False: 0] | Branch (637:9): [True: 0, Folded] | Branch (637:9): [True: 0, False: 0] ------------------ 638| 0| cast(F).getValue() == 0) && 639| 0| "Invalid align in virtual section!"); 640| 0| break; 641| 0| case MCFragment::FT_Fill: ------------------ | Branch (641:7): [True: 0, False: 0] ------------------ 642| 0| assert((cast(F).getValue() == 0) && ------------------ | Branch (642:9): [True: 0, False: 0] | Branch (642:9): [True: 0, Folded] | Branch (642:9): [True: 0, False: 0] ------------------ 643| 0| "Invalid fill in virtual section!"); 644| 0| break; 645| 0| } 646| 0| } 647| | 648| 0| return; 649| 0| } 650| | 651| 264| uint64_t Start = getWriter().getStream().tell(); 652| 264| (void)Start; 653| | 654| 264| setError(0); 655| 264| for (const MCFragment &F : *Sec) ------------------ | Branch (655:28): [True: 1.77k, False: 264] ------------------ 656| 1.77k| writeFragment(*this, Layout, F); 657| | 658| | //assert(getWriter().getStream().tell() - Start == 659| | // Layout.getSectionAddressSize(Sec)); 660| 264|} _ZN7llvm_ks11MCAssembler11handleFixupERKNS_11MCAsmLayoutERNS_10MCFragmentERKNS_7MCFixupERj: 664| 1.49k| const MCFixup &Fixup, unsigned int &KsError) { 665| | // Evaluate the fixup. 666| 1.49k| MCValue Target; 667| 1.49k| uint64_t FixedValue; 668| 1.49k| bool IsPCRel = Backend.getFixupKindInfo(Fixup.getKind()).Flags & 669| 1.49k| MCFixupKindInfo::FKF_IsPCRel; 670| 1.49k| if (!evaluateFixup(Layout, Fixup, &F, Target, FixedValue, KsError)) { ------------------ | Branch (670:7): [True: 1.49k, False: 2] ------------------ 671| 1.49k| if (KsError) { ------------------ | Branch (671:9): [True: 50, False: 1.44k] ------------------ 672| | // return a dummy value 673| 50| return std::make_pair(0, false); 674| 50| } 675| | // The fixup was unresolved, we need a relocation. Inform the object 676| | // writer of the relocation, and give it an opportunity to adjust the 677| | // fixup value if need be. 678| 1.44k| if (const MCSymbolRefExpr *RefB = Target.getSymB()) { ------------------ | Branch (678:32): [True: 1.04k, False: 398] ------------------ 679| 1.04k| if (RefB->getKind() != MCSymbolRefExpr::VK_None) { ------------------ | Branch (679:13): [True: 0, False: 1.04k] ------------------ 680| 0| KsError = KS_ERR_ASM_FIXUP_INVALID; 681| | // return a dummy value 682| 0| return std::make_pair(0, false); 683| 0| } 684| 1.04k| } 685| 1.44k| getWriter().recordRelocation(*this, Layout, &F, Fixup, Target, IsPCRel, 686| 1.44k| FixedValue); 687| 1.44k| } 688| | 689| 1.44k| return std::make_pair(FixedValue, IsPCRel); 690| 1.49k|} _ZN7llvm_ks11MCAssembler6layoutERNS_11MCAsmLayoutERj: 693| 312|{ 694| 312| DEBUG_WITH_TYPE("mc-dump", { 695| 312| llvm_ks::errs() << "assembler backend - pre-layout\n--\n"; 696| 312| dump(); }); 697| | 698| | // Create dummy fragments and assign section ordinals. 699| 312| unsigned SectionIndex = 0; 700| 316| for (MCSection &Sec : *this) { ------------------ | Branch (700:23): [True: 316, False: 312] ------------------ 701| | // Create dummy fragments to eliminate any empty sections, this simplifies 702| | // layout. 703| 316| if (Sec.getFragmentList().empty()) ------------------ | Branch (703:9): [True: 0, False: 316] ------------------ 704| 0| new MCDataFragment(&Sec); 705| | 706| 316| Sec.setOrdinal(SectionIndex++); 707| 316| } 708| | 709| | // Assign layout order indices to sections and fragments. 710| 628| for (unsigned i = 0, e = Layout.getSectionOrder().size(); i != e; ++i) { ------------------ | Branch (710:61): [True: 316, False: 312] ------------------ 711| 316| MCSection *Sec = Layout.getSectionOrder()[i]; 712| 316| Sec->setLayoutOrder(i); 713| | 714| 316| unsigned FragmentIndex = 0; 715| 316| for (MCFragment &Frag : *Sec) ------------------ | Branch (715:27): [True: 1.89k, False: 316] ------------------ 716| 1.89k| Frag.setLayoutOrder(FragmentIndex++); 717| 316| } 718| | 719| | // Layout until everything fits. 720| 312| while (layoutOnce(Layout)) ------------------ | Branch (720:10): [True: 0, False: 312] ------------------ 721| 0| continue; 722| | 723| 312| DEBUG_WITH_TYPE("mc-dump", { 724| 312| llvm_ks::errs() << "assembler backend - post-relaxation\n--\n"; 725| 312| dump(); }); 726| | 727| | // Finalize the layout, including fragment lowering. 728| 312| finishLayout(Layout); 729| | 730| 312| DEBUG_WITH_TYPE("mc-dump", { 731| 312| llvm_ks::errs() << "assembler backend - final-layout\n--\n"; 732| 312| dump(); }); 733| | 734| | // Allow the object writer a chance to perform post-layout binding (for 735| | // example, to set the index fields in the symbol data). 736| 312| getWriter().executePostLayoutBinding(*this, Layout); 737| | 738| | // Evaluate and apply the fixups, generating relocation entries as necessary. 739| 315| for (MCSection &Sec : *this) { ------------------ | Branch (739:23): [True: 315, False: 262] ------------------ 740| 1.82k| for (MCFragment &Frag : Sec) { ------------------ | Branch (740:27): [True: 1.82k, False: 265] ------------------ 741| 1.82k| MCEncodedFragment *F = dyn_cast(&Frag); 742| | // Data and relaxable fragments both have fixups. So only process 743| | // those here. 744| | // FIXME: Is there a better way to do this? MCEncodedFragmentWithFixups 745| | // being templated makes this tricky. 746| 1.82k| if (!F || isa(F)) ------------------ | Branch (746:11): [True: 1.52k, False: 301] | Branch (746:17): [True: 0, False: 301] ------------------ 747| 1.52k| continue; 748| 301| ArrayRef Fixups; 749| 301| MutableArrayRef Contents; 750| 301| if (auto *FragWithFixups = dyn_cast(F)) { ------------------ | Branch (750:17): [True: 301, False: 0] ------------------ 751| 301| Fixups = FragWithFixups->getFixups(); 752| 301| Contents = FragWithFixups->getContents(); 753| 301| } else if (auto *FragWithFixups = dyn_cast(F)) { ------------------ | Branch (753:24): [True: 0, False: 0] ------------------ 754| 0| Fixups = FragWithFixups->getFixups(); 755| 0| Contents = FragWithFixups->getContents(); 756| 0| } else 757| 0| llvm_unreachable("Unknown fragment with fixups!"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ 758| 1.49k| for (const MCFixup &Fixup : Fixups) { ------------------ | Branch (758:33): [True: 1.49k, False: 251] ------------------ 759| 1.49k| uint64_t FixedValue; 760| 1.49k| bool IsPCRel; 761| 1.49k| std::tie(FixedValue, IsPCRel) = handleFixup(Layout, *F, Fixup, KsError); 762| 1.49k| if (KsError) ------------------ | Branch (762:13): [True: 50, False: 1.44k] ------------------ 763| 50| return; 764| 1.44k| getBackend().applyFixup(Fixup, Contents.data(), 765| 1.44k| Contents.size(), FixedValue, IsPCRel, KsError); 766| 1.44k| if (KsError) ------------------ | Branch (766:13): [True: 0, False: 1.44k] ------------------ 767| 0| return; 768| 1.44k| } 769| 301| } 770| 315| } 771| 312|} _ZN7llvm_ks11MCAssembler6FinishERj: 773| 312|void MCAssembler::Finish(unsigned int &KsError) { 774| | // Create the layout object. 775| 312| MCAsmLayout Layout(*this); 776| 312| layout(Layout, KsError); 777| | 778| | // Write the object file. 779| 312| if (!KsError) { ------------------ | Branch (779:7): [True: 262, False: 50] ------------------ 780| 262| getWriter().writeObject(*this, Layout); 781| 262| KsError = getError(); 782| 262| } 783| 312|} _ZN7llvm_ks11MCAssembler17layoutSectionOnceERNS_11MCAsmLayoutERNS_9MCSectionE: 876| 316|{ 877| | // Holds the first fragment which needed relaxing during this layout. It will 878| | // remain NULL if none were relaxed. 879| | // When a fragment is relaxed, all the fragments following it should get 880| | // invalidated because their offset is going to change. 881| 316| MCFragment *FirstRelaxedFragment = nullptr; 882| | 883| | // Attempt to relax all the fragments in the section. 884| 2.20k| for (MCSection::iterator I = Sec.begin(), IE = Sec.end(); I != IE; ++I) { ------------------ | Branch (884:61): [True: 1.89k, False: 316] ------------------ 885| | // Check if this is a fragment that needs relaxation. 886| 1.89k| bool RelaxedFrag = false; 887| 1.89k| switch(I->getKind()) { 888| 1.89k| default: ------------------ | Branch (888:5): [True: 1.89k, False: 0] ------------------ 889| 1.89k| break; 890| 1.89k| case MCFragment::FT_Relaxable: ------------------ | Branch (890:5): [True: 0, False: 1.89k] ------------------ 891| 0| assert(!getRelaxAll() && ------------------ | Branch (891:7): [True: 0, False: 0] | Branch (891:7): [True: 0, Folded] | Branch (891:7): [True: 0, False: 0] ------------------ 892| 0| "Did not expect a MCRelaxableFragment in RelaxAll mode"); 893| 0| RelaxedFrag = relaxInstruction(Layout, *cast(I)); 894| 0| break; 895| 0| case MCFragment::FT_Dwarf: ------------------ | Branch (895:5): [True: 0, False: 1.89k] ------------------ 896| 0| RelaxedFrag = relaxDwarfLineAddr(Layout, 897| 0| *cast(I)); 898| 0| break; 899| 0| case MCFragment::FT_DwarfFrame: ------------------ | Branch (899:5): [True: 0, False: 1.89k] ------------------ 900| 0| RelaxedFrag = 901| 0| relaxDwarfCallFrameFragment(Layout, 902| 0| *cast(I)); 903| 0| break; 904| 0| case MCFragment::FT_LEB: ------------------ | Branch (904:5): [True: 0, False: 1.89k] ------------------ 905| 0| RelaxedFrag = relaxLEB(Layout, *cast(I)); 906| 0| break; 907| 1.89k| } 908| 1.89k| if (RelaxedFrag && !FirstRelaxedFragment) ------------------ | Branch (908:9): [True: 0, False: 1.89k] | Branch (908:24): [True: 0, False: 0] ------------------ 909| 0| FirstRelaxedFragment = &*I; 910| 1.89k| } 911| 316| if (FirstRelaxedFragment) { ------------------ | Branch (911:7): [True: 0, False: 316] ------------------ 912| 0| Layout.invalidateFragmentsFrom(FirstRelaxedFragment); 913| 0| return true; 914| 0| } 915| 316| return false; 916| 316|} _ZN7llvm_ks11MCAssembler10layoutOnceERNS_11MCAsmLayoutE: 919| 312|{ 920| 312| bool WasRelaxed = false; 921| 628| for (iterator it = begin(), ie = end(); it != ie; ++it) { ------------------ | Branch (921:43): [True: 316, False: 312] ------------------ 922| 316| MCSection &Sec = *it; 923| 316| while (layoutSectionOnce(Layout, Sec)) ------------------ | Branch (923:12): [True: 0, False: 316] ------------------ 924| 0| WasRelaxed = true; 925| 316| } 926| | 927| 312| return WasRelaxed; 928| 312|} _ZN7llvm_ks11MCAssembler12finishLayoutERNS_11MCAsmLayoutE: 930| 312|void MCAssembler::finishLayout(MCAsmLayout &Layout) { 931| | // The layout is done. Mark every fragment as valid. 932| 628| for (unsigned int i = 0, n = Layout.getSectionOrder().size(); i != n; ++i) { ------------------ | Branch (932:65): [True: 316, False: 312] ------------------ 933| 316| bool valid; 934| 316| Layout.getFragmentOffset(&*Layout.getSectionOrder()[i]->rbegin(), valid); 935| 316| } 936| 312|} MCAssembler.cpp:_ZL13writeFragmentRKN7llvm_ks11MCAssemblerERKNS_11MCAsmLayoutERKNS_10MCFragmentE: 475| 1.77k|{ 476| 1.77k| if (Asm.getError()) ------------------ | Branch (476:7): [True: 295, False: 1.47k] ------------------ 477| 295| return; 478| | 479| 1.47k| MCObjectWriter *OW = &Asm.getWriter(); 480| | 481| 1.47k| bool valid; 482| | // FIXME: Embed in fragments instead? 483| 1.47k| uint64_t FragmentSize = Asm.computeFragmentSize(Layout, F, valid); 484| 1.47k| if (!valid) { ------------------ | Branch (484:7): [True: 11, False: 1.46k] ------------------ 485| 11| Asm.setError(KS_ERR_ASM_FRAGMENT_INVALID); 486| 11| return; 487| 11| } 488| | 489| 1.46k| Asm.writeFragmentPadding(F, FragmentSize, OW); 490| | 491| | // This variable (and its dummy usage) is to participate in the assert at 492| | // the end of the function. 493| 1.46k| uint64_t Start = OW->getStream().tell(); 494| 1.46k| (void) Start; 495| | 496| 1.46k| switch (F.getKind()) { ------------------ | Branch (496:11): [True: 1.46k, False: 0] ------------------ 497| 255| case MCFragment::FT_Align: { ------------------ | Branch (497:3): [True: 255, False: 1.21k] ------------------ 498| 255| const MCAlignFragment &AF = cast(F); 499| 255| assert(AF.getValueSize() && "Invalid virtual align in concrete fragment!"); ------------------ | Branch (499:5): [True: 255, False: 0] | Branch (499:5): [True: 255, Folded] | Branch (499:5): [True: 255, False: 0] ------------------ 500| | 501| 255| uint64_t Count = FragmentSize / AF.getValueSize(); 502| | 503| | // FIXME: This error shouldn't actually occur (the front end should emit 504| | // multiple .align directives to enforce the semantics it wants), but is 505| | // severe enough that we want to report it. How to handle this? 506| 255| if (Count * AF.getValueSize() != FragmentSize) ------------------ | Branch (506:9): [True: 0, False: 255] ------------------ 507| 0| report_fatal_error("undefined .align directive, value size '" + 508| 0| Twine(AF.getValueSize()) + 509| 0| "' is not a divisor of padding size '" + 510| 0| Twine(FragmentSize) + "'"); 511| | 512| | // See if we are aligning with nops, and if so do that first to try to fill 513| | // the Count bytes. Then if that did not fill any bytes or there are any 514| | // bytes left to fill use the Value and ValueSize to fill the rest. 515| | // If we are aligning with nops, ask that target to emit the right data. 516| 255| if (AF.hasEmitNops()) { ------------------ | Branch (516:9): [True: 251, False: 4] ------------------ 517| 251| if (!Asm.getBackend().writeNopData(Count, OW)) ------------------ | Branch (517:11): [True: 0, False: 251] ------------------ 518| 0| report_fatal_error("unable to write nop sequence of " + 519| 0| Twine(Count) + " bytes"); 520| 251| break; 521| 251| } 522| | 523| | // Otherwise, write out in multiples of the value size. 524| 4| for (uint64_t i = 0; i != Count; ++i) { ------------------ | Branch (524:26): [True: 0, False: 4] ------------------ 525| 0| switch (AF.getValueSize()) { 526| 0| default: llvm_unreachable("Invalid size!"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ | Branch (526:7): [True: 0, False: 0] ------------------ 527| 0| case 1: OW->write8 (uint8_t (AF.getValue())); break; ------------------ | Branch (527:7): [True: 0, False: 0] ------------------ 528| 0| case 2: OW->write16(uint16_t(AF.getValue())); break; ------------------ | Branch (528:7): [True: 0, False: 0] ------------------ 529| 0| case 4: OW->write32(uint32_t(AF.getValue())); break; ------------------ | Branch (529:7): [True: 0, False: 0] ------------------ 530| 0| case 8: OW->write64(uint64_t(AF.getValue())); break; ------------------ | Branch (530:7): [True: 0, False: 0] ------------------ 531| 0| } 532| 0| } 533| 4| break; 534| 4| } 535| | 536| 245| case MCFragment::FT_Data: ------------------ | Branch (536:3): [True: 245, False: 1.22k] ------------------ 537| 245| OW->writeBytes(cast(F).getContents()); 538| 245| break; 539| | 540| 0| case MCFragment::FT_Relaxable: ------------------ | Branch (540:3): [True: 0, False: 1.46k] ------------------ 541| 0| OW->writeBytes(cast(F).getContents()); 542| 0| break; 543| | 544| 0| case MCFragment::FT_CompactEncodedInst: ------------------ | Branch (544:3): [True: 0, False: 1.46k] ------------------ 545| 0| OW->writeBytes(cast(F).getContents()); 546| 0| break; 547| | 548| 602| case MCFragment::FT_Fill: { ------------------ | Branch (548:3): [True: 602, False: 866] ------------------ 549| 602| const MCFillFragment &FF = cast(F); 550| 602| uint8_t V = FF.getValue(); 551| 602| const unsigned MaxChunkSize = 16; 552| 602| char Data[MaxChunkSize]; 553| 602| memcpy(Data, &V, 1); 554| 9.63k| for (unsigned I = 1; I < MaxChunkSize; ++I) ------------------ | Branch (554:26): [True: 9.03k, False: 602] ------------------ 555| 9.03k| Data[I] = Data[0]; 556| | 557| 602| uint64_t Size = FF.getSize(); 558| 3.61k| for (unsigned ChunkSize = MaxChunkSize; ChunkSize; ChunkSize /= 2) { ------------------ | Branch (558:45): [True: 3.01k, False: 602] ------------------ 559| 3.01k| StringRef Ref(Data, ChunkSize); 560| 16.5k| for (uint64_t I = 0, E = Size / ChunkSize; I != E; ++I) ------------------ | Branch (560:50): [True: 13.5k, False: 3.01k] ------------------ 561| 13.5k| OW->writeBytes(Ref); 562| 3.01k| Size = Size % ChunkSize; 563| 3.01k| } 564| 602| break; 565| 4| } 566| | 567| 0| case MCFragment::FT_LEB: { ------------------ | Branch (567:3): [True: 0, False: 1.46k] ------------------ 568| 0| const MCLEBFragment &LF = cast(F); 569| 0| OW->writeBytes(LF.getContents()); 570| 0| break; 571| 4| } 572| | 573| 0| case MCFragment::FT_SafeSEH: { ------------------ | Branch (573:3): [True: 0, False: 1.46k] ------------------ 574| 0| const MCSafeSEHFragment &SF = cast(F); 575| 0| OW->write32(SF.getSymbol()->getIndex()); 576| 0| break; 577| 4| } 578| | 579| 366| case MCFragment::FT_Org: { ------------------ | Branch (579:3): [True: 366, False: 1.10k] ------------------ 580| 366| const MCOrgFragment &OF = cast(F); 581| | 582| 367| for (uint64_t i = 0, e = FragmentSize; i != e; ++i) ------------------ | Branch (582:44): [True: 1, False: 366] ------------------ 583| 1| OW->write8(uint8_t(OF.getValue())); 584| | 585| 366| break; 586| 4| } 587| | 588| 0| case MCFragment::FT_Dwarf: { ------------------ | Branch (588:3): [True: 0, False: 1.46k] ------------------ 589| 0| const MCDwarfLineAddrFragment &OF = cast(F); 590| 0| OW->writeBytes(OF.getContents()); 591| 0| break; 592| 4| } 593| 0| case MCFragment::FT_DwarfFrame: { ------------------ | Branch (593:3): [True: 0, False: 1.46k] ------------------ 594| 0| const MCDwarfCallFrameFragment &CF = cast(F); 595| 0| OW->writeBytes(CF.getContents()); 596| 0| break; 597| 4| } 598| 0| case MCFragment::FT_Dummy: ------------------ | Branch (598:3): [True: 0, False: 1.46k] ------------------ 599| 0| llvm_unreachable("Should not have been added"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ 600| 1.46k| } 601| | 602| 1.46k| assert(OW->getStream().tell() - Start == FragmentSize && ------------------ | Branch (602:3): [True: 1.46k, False: 0] | Branch (602:3): [True: 1.46k, Folded] | Branch (602:3): [True: 1.46k, False: 0] ------------------ 603| 1.46k| "The stream should advance by fragment size"); 604| 1.46k|} _ZN7llvm_ks13MCCodeEmitterC2Ev: 14| 749|MCCodeEmitter::MCCodeEmitter() { 15| 749|} _ZN7llvm_ks13MCCodeEmitterD2Ev: 17| 749|MCCodeEmitter::~MCCodeEmitter() { 18| 749|} _ZN7llvm_ks9MCContextC2EPKNS_9MCAsmInfoEPKNS_14MCRegisterInfoEPKNS_16MCObjectFileInfoEPKNS_9SourceMgrEbm: 40| 749| : SrcMgr(mgr), MAI(mai), MRI(mri), MOFI(mofi), Allocator(), 41| 749| Symbols(Allocator), UsedNames(Allocator), 42| 749| CurrentDwarfLoc(0, 0, 0, DWARF2_FLAG_IS_STMT, 0, 0), DwarfLocSeen(false), ------------------ | | 68| 749|#define DWARF2_FLAG_IS_STMT (1 << 0) ------------------ 43| 749| GenDwarfForAssembly(false), GenDwarfFileNumber(0), DwarfVersion(4), 44| 749| AllowTemporaryLabels(true), DwarfCompileUnitID(0), 45| 749| AutoReset(DoAutoReset), HadError(false), BaseAddress(BaseAddr) { 46| | 47| 749| std::error_code EC = llvm_ks::sys::fs::current_path(CompilationDir); 48| 749| if (EC) ------------------ | Branch (48:7): [True: 0, False: 749] ------------------ 49| 0| CompilationDir.clear(); 50| | 51| 749| SecureLogFile = getenv("AS_SECURE_LOG_FILE"); 52| 749| SecureLog = nullptr; 53| 749| SecureLogUsed = false; 54| | 55| 749| if (SrcMgr && SrcMgr->getNumBuffers()) ------------------ | Branch (55:7): [True: 749, False: 0] | Branch (55:17): [True: 0, False: 749] ------------------ 56| 0| MainFileName = 57| 0| SrcMgr->getMemoryBuffer(SrcMgr->getMainFileID())->getBufferIdentifier(); 58| 749|} _ZN7llvm_ks9MCContextD2Ev: 60| 749|MCContext::~MCContext() { 61| 749| if (AutoReset) ------------------ | Branch (61:7): [True: 749, False: 0] ------------------ 62| 749| reset(); 63| | 64| | // NOTE: The symbols are all allocated out of a bump pointer allocator, 65| | // we don't need to free them here. 66| 749|} _ZN7llvm_ks9MCContext5resetEv: 72| 749|void MCContext::reset() { 73| | // Call the destructors so the fragments are freed 74| 749| COFFAllocator.DestroyAll(); 75| 749| ELFAllocator.DestroyAll(); 76| 749| MachOAllocator.DestroyAll(); 77| | 78| 749| MCSubtargetAllocator.DestroyAll(); 79| 749| UsedNames.clear(); 80| 749| Symbols.clear(); 81| 749| SectionSymbols.clear(); 82| 749| Allocator.Reset(); 83| 749| Instances.clear(); 84| 749| CompilationDir.clear(); 85| 749| MainFileName.clear(); 86| 749| MCDwarfLineTablesCUMap.clear(); 87| 749| SectionsForRanges.clear(); 88| 749| MCGenDwarfLabelEntries.clear(); 89| 749| DwarfDebugFlags = StringRef(); 90| 749| DwarfCompileUnitID = 0; 91| 749| CurrentDwarfLoc = MCDwarfLoc(0, 0, 0, DWARF2_FLAG_IS_STMT, 0, 0); ------------------ | | 68| 749|#define DWARF2_FLAG_IS_STMT (1 << 0) ------------------ 92| | 93| 749| MachOUniquingMap.clear(); 94| 749| ELFUniquingMap.clear(); 95| 749| COFFUniquingMap.clear(); 96| | 97| 749| NextID.clear(); 98| 749| AllowTemporaryLabels = true; 99| 749| DwarfLocSeen = false; 100| 749| GenDwarfForAssembly = false; 101| 749| GenDwarfFileNumber = 0; 102| | 103| 749| HadError = false; 104| 749|} _ZN7llvm_ks9MCContext17getOrCreateSymbolERKNS_5TwineE: 110| 13.9k|MCSymbol *MCContext::getOrCreateSymbol(const Twine &Name) { 111| 13.9k| SmallString<128> NameSV; 112| 13.9k| StringRef NameRef = Name.toStringRef(NameSV); 113| | 114| 13.9k| assert(!NameRef.empty() && "Normal symbols cannot be unnamed!"); ------------------ | Branch (114:3): [True: 13.9k, False: 0] | Branch (114:3): [True: 13.9k, Folded] | Branch (114:3): [True: 13.9k, False: 0] ------------------ 115| | 116| 13.9k| MCSymbol *&Sym = Symbols[NameRef]; 117| 13.9k| if (!Sym) ------------------ | Branch (117:7): [True: 1.78k, False: 12.2k] ------------------ 118| 1.78k| Sym = createSymbol(NameRef, false, false); 119| | 120| 13.9k| return Sym; 121| 13.9k|} _ZN7llvm_ks9MCContext24getOrCreateSectionSymbolERKNS_12MCSectionELFE: 123| 879|MCSymbolELF *MCContext::getOrCreateSectionSymbol(const MCSectionELF &Section) { 124| 879| MCSymbolELF *&Sym = SectionSymbols[&Section]; 125| 879| if (Sym) ------------------ | Branch (125:7): [True: 0, False: 879] ------------------ 126| 0| return Sym; 127| | 128| 879| StringRef Name = Section.getSectionName(); 129| | 130| 879| MCSymbol *&OldSym = Symbols[Name]; 131| 879| if (OldSym && OldSym->isUndefined()) { ------------------ | Branch (131:7): [True: 62, False: 817] | Branch (131:17): [True: 0, False: 62] ------------------ 132| 0| Sym = cast(OldSym); 133| 0| return Sym; 134| 0| } 135| | 136| 879| auto NameIter = UsedNames.insert(std::make_pair(Name, true)).first; 137| 879| Sym = new (&*NameIter, *this) MCSymbolELF(&*NameIter, /*isTemporary*/ false); 138| | 139| 879| if (!OldSym) ------------------ | Branch (139:7): [True: 817, False: 62] ------------------ 140| 817| OldSym = Sym; 141| | 142| 879| return Sym; 143| 879|} _ZN7llvm_ks9MCContext16createSymbolImplEPKNS_14StringMapEntryIbEEb: 162| 16.8k| bool IsTemporary) { 163| 16.8k| if (MOFI) { ------------------ | Branch (163:7): [True: 16.8k, False: 0] ------------------ 164| 16.8k| switch (MOFI->getObjectFileType()) { ------------------ | Branch (164:13): [True: 16.8k, False: 0] ------------------ 165| 0| case MCObjectFileInfo::IsCOFF: ------------------ | Branch (165:5): [True: 0, False: 16.8k] ------------------ 166| 0| return new (Name, *this) MCSymbolCOFF(Name, IsTemporary); 167| 16.8k| case MCObjectFileInfo::IsELF: ------------------ | Branch (167:5): [True: 16.8k, False: 0] ------------------ 168| 16.8k| return new (Name, *this) MCSymbolELF(Name, IsTemporary); 169| 0| case MCObjectFileInfo::IsMachO: ------------------ | Branch (169:5): [True: 0, False: 16.8k] ------------------ 170| 0| return new (Name, *this) MCSymbolMachO(Name, IsTemporary); 171| 16.8k| } 172| 16.8k| } 173| 0| return new (Name, *this) MCSymbol(MCSymbol::SymbolKindUnset, Name, 174| 0| IsTemporary); 175| 16.8k|} _ZN7llvm_ks9MCContext12createSymbolENS_9StringRefEbb: 178| 16.8k| bool CanBeUnnamed) { 179| 16.8k| if (CanBeUnnamed && !UseNamesOnTempLabels) ------------------ | Branch (179:7): [True: 15.0k, False: 1.78k] | Branch (179:23): [True: 0, False: 15.0k] ------------------ 180| 0| return createSymbolImpl(nullptr, true); 181| | 182| | // Determine whether this is an user writter assembler temporary or normal 183| | // label, if used. 184| 16.8k| bool IsTemporary = CanBeUnnamed; 185| 16.8k| if (AllowTemporaryLabels && !IsTemporary) ------------------ | Branch (185:7): [True: 16.8k, False: 0] | Branch (185:31): [True: 1.78k, False: 15.0k] ------------------ 186| 1.78k| IsTemporary = Name.startswith(MAI->getPrivateGlobalPrefix()); 187| | 188| 16.8k| SmallString<128> NewName = Name; 189| 16.8k| bool AddSuffix = AlwaysAddSuffix; 190| 16.8k| unsigned &NextUniqueID = NextID[Name]; 191| 16.8k| for (;;) { 192| 16.8k| if (AddSuffix) { ------------------ | Branch (192:9): [True: 7.60k, False: 9.27k] ------------------ 193| 7.60k| NewName.resize(Name.size()); 194| 7.60k| raw_svector_ostream(NewName) << NextUniqueID++; 195| 7.60k| } 196| 16.8k| auto NameEntry = UsedNames.insert(std::make_pair(NewName, true)); 197| 16.8k| if (NameEntry.second) { ------------------ | Branch (197:9): [True: 16.8k, False: 0] ------------------ 198| | // Ok, we found a name. Have the MCSymbol object itself refer to the copy 199| | // of the string that is embedded in the UsedNames entry. 200| 16.8k| return createSymbolImpl(&*NameEntry.first, IsTemporary); 201| 16.8k| } 202| 16.8k| assert(IsTemporary && "Cannot rename non-temporary symbols"); ------------------ | Branch (202:5): [True: 0, False: 0] | Branch (202:5): [True: 0, Folded] | Branch (202:5): [True: 0, False: 0] ------------------ 203| 0| AddSuffix = true; 204| 0| } 205| 0| llvm_unreachable("Infinite loop"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ 206| 16.8k|} _ZN7llvm_ks9MCContext16createTempSymbolERKNS_5TwineEbb: 209| 15.0k| bool CanBeUnnamed) { 210| 15.0k| SmallString<128> NameSV; 211| 15.0k| raw_svector_ostream(NameSV) << MAI->getPrivateGlobalPrefix() << Name; 212| 15.0k| return createSymbol(NameSV, AlwaysAddSuffix, CanBeUnnamed); 213| 15.0k|} _ZN7llvm_ks9MCContext16createTempSymbolEb: 221| 7.60k|MCSymbol *MCContext::createTempSymbol(bool CanBeUnnamed) { 222| 7.60k| return createTempSymbol("tmp", true, CanBeUnnamed); 223| 7.60k|} _ZN7llvm_ks9MCContext11GetInstanceEjRb: 238| 70|{ 239| 70| if (LocalLabelVal >= Instances.size()) { ------------------ | Branch (239:7): [True: 70, False: 0] ------------------ 240| 70| valid = false; 241| 70| return 0; 242| 70| } 243| 0| MCLabel *&Label = Instances[LocalLabelVal]; 244| 0| if (!Label) ------------------ | Branch (244:7): [True: 0, False: 0] ------------------ 245| 0| Label = new (*this) MCLabel(0); 246| 0| return Label->getInstance(); 247| 70|} _ZN7llvm_ks9MCContext25getDirectionalLocalSymbolEjbRb: 268| 70|{ 269| 70| valid = true; 270| 70| unsigned Instance = GetInstance(LocalLabelVal, valid); 271| 70| if (!valid) ------------------ | Branch (271:7): [True: 70, False: 0] ------------------ 272| 70| return nullptr; 273| 0| if (!Before) ------------------ | Branch (273:7): [True: 0, False: 0] ------------------ 274| 0| ++Instance; 275| 0| return getOrCreateDirectionalLocalSymbol(LocalLabelVal, Instance); 276| 70|} _ZNK7llvm_ks9MCContext12lookupSymbolERKNS_5TwineE: 278| 9.75k|MCSymbol *MCContext::lookupSymbol(const Twine &Name) const { 279| 9.75k| SmallString<128> NameSV; 280| 9.75k| StringRef NameRef = Name.toStringRef(NameSV); 281| 9.75k| return Symbols.lookup(NameRef); 282| 9.75k|} _ZN7llvm_ks9MCContext15getMachOSectionENS_9StringRefES1_jjNS_11SectionKindEPKc: 291| 5.74k| const char *BeginSymName) { 292| | 293| | // We unique sections by their segment/section pair. The returned section 294| | // may not have the same flags as the requested section, if so this should be 295| | // diagnosed by the client as an error. 296| | 297| | // Form the name to look up. 298| 5.74k| SmallString<64> Name; 299| 5.74k| Name += Segment; 300| 5.74k| Name.push_back(','); 301| 5.74k| Name += Section; 302| | 303| | // Do the lookup, if we have a hit, return it. 304| 5.74k| MCSectionMachO *&Entry = MachOUniquingMap[Name]; 305| 5.74k| if (Entry) ------------------ | Branch (305:7): [True: 5.61k, False: 130] ------------------ 306| 5.61k| return Entry; 307| | 308| 130| MCSymbol *Begin = nullptr; 309| 130| if (BeginSymName) ------------------ | Branch (309:7): [True: 0, False: 130] ------------------ 310| 0| Begin = createTempSymbol(BeginSymName, false); 311| | 312| | // Otherwise, return a new section. 313| 130| return Entry = new (MachOAllocator.Allocate()) MCSectionMachO( 314| 130| Segment, Section, TypeAndAttributes, Reserved2, Kind, Begin); 315| 5.74k|} _ZN7llvm_ks9MCContext19createELFRelSectionENS_9StringRefEjjjPKNS_11MCSymbolELFEPKNS_12MCSectionELFE: 336| 2| const MCSectionELF *Associated) { 337| 2| StringMap::iterator I; 338| 2| bool Inserted; 339| 2| std::tie(I, Inserted) = ELFRelSecNames.insert(std::make_pair(Name, true)); 340| | 341| 2| return new (ELFAllocator.Allocate()) 342| 2| MCSectionELF(I->getKey(), Type, Flags, SectionKind::getReadOnly(), 343| 2| EntrySize, Group, true, nullptr, Associated); 344| 2|} _ZN7llvm_ks9MCContext13getELFSectionENS_9StringRefEjjjS1_jPKc: 349| 32.4k| const char *BeginSymName) { 350| 32.4k| MCSymbolELF *GroupSym = nullptr; 351| 32.4k| if (!Group.empty()) ------------------ | Branch (351:7): [True: 0, False: 32.4k] ------------------ 352| 0| GroupSym = cast(getOrCreateSymbol(Group)); 353| | 354| 32.4k| return getELFSection(Section, Type, Flags, EntrySize, GroupSym, UniqueID, 355| 32.4k| BeginSymName, nullptr); 356| 32.4k|} _ZN7llvm_ks9MCContext13getELFSectionENS_9StringRefEjjjPKNS_11MCSymbolELFEjPKcPKNS_12MCSectionELFE: 363| 32.4k| const MCSectionELF *Associated) { 364| 32.4k| StringRef Group = ""; 365| 32.4k| if (GroupSym) ------------------ | Branch (365:7): [True: 0, False: 32.4k] ------------------ 366| 0| Group = GroupSym->getName(); 367| | // Do the lookup, if we have a hit, return it. 368| 32.4k| auto IterBool = ELFUniquingMap.insert( 369| 32.4k| std::make_pair(ELFSectionKey{Section, Group, UniqueID}, nullptr)); 370| 32.4k| auto &Entry = *IterBool.first; 371| 32.4k| if (!IterBool.second) ------------------ | Branch (371:7): [True: 0, False: 32.4k] ------------------ 372| 0| return Entry.second; 373| | 374| 32.4k| StringRef CachedName = Entry.first.SectionName; 375| | 376| 32.4k| SectionKind Kind; 377| 32.4k| if (Flags & ELF::SHF_EXECINSTR) ------------------ | Branch (377:7): [True: 749, False: 31.7k] ------------------ 378| 749| Kind = SectionKind::getText(); 379| 31.7k| else 380| 31.7k| Kind = SectionKind::getReadOnly(); 381| | 382| 32.4k| MCSymbol *Begin = nullptr; 383| 32.4k| if (BeginSymName) ------------------ | Branch (383:7): [True: 7.49k, False: 24.9k] ------------------ 384| 7.49k| Begin = createTempSymbol(BeginSymName, false); 385| | 386| 32.4k| MCSectionELF *Result = new (ELFAllocator.Allocate()) 387| 32.4k| MCSectionELF(CachedName, Type, Flags, Kind, EntrySize, GroupSym, UniqueID, 388| 32.4k| Begin, Associated); 389| 32.4k| Entry.second = Result; 390| 32.4k| return Result; 391| 32.4k|} _ZN7llvm_ks9MCContext16getSubtargetCopyERKNS_15MCSubtargetInfoE: 460| 6.97k|MCSubtargetInfo &MCContext::getSubtargetCopy(const MCSubtargetInfo &STI) { 461| 6.97k| return *new (MCSubtargetAllocator.Allocate()) MCSubtargetInfo(STI); 462| 6.97k|} _ZN7llvm_ks9MCContext11reportErrorENS_5SMLocERKNS_5TwineE: 506| 1.04k|void MCContext::reportError(SMLoc Loc, const Twine &Msg) { 507| 1.04k| HadError = true; 508| | 509| | // If we have a source manager use it. Otherwise just use the generic 510| | // report_fatal_error(). 511| 1.04k| if (!SrcMgr) ------------------ | Branch (511:7): [True: 0, False: 1.04k] ------------------ 512| 0| report_fatal_error(Msg, false); 513| | 514| | // Use the source manager to print the message. 515| 1.04k| SrcMgr->PrintMessage(Loc, SourceMgr::DK_Error, Msg); 516| 1.04k|} _ZN7llvm_ks23MCELFObjectTargetWriterC2Ebhtbb: 22| 749| : OSABI(OSABI_), EMachine(EMachine_), 23| 749| HasRelocationAddend(HasRelocationAddend_), Is64Bit(Is64Bit_), 24| 749| IsN64(IsN64_){ 25| 749|} _ZNK7llvm_ks13MCELFStreamer14isBundleLockedEv: 43| 7.38k|bool MCELFStreamer::isBundleLocked() const { 44| 7.38k| return getCurrentSectionOnly()->isBundleLocked(); 45| 7.38k|} _ZN7llvm_ks13MCELFStreamerD2Ev: 47| 749|MCELFStreamer::~MCELFStreamer() { 48| 749|} _ZN7llvm_ks13MCELFStreamer12InitSectionsEb: 91| 749|void MCELFStreamer::InitSections(bool NoExecStack) { 92| 749| MCContext &Ctx = getContext(); 93| 749| SwitchSection(Ctx.getObjectFileInfo()->getTextSection()); 94| | 95| 749| if (NoExecStack) ------------------ | Branch (95:7): [True: 0, False: 749] ------------------ 96| 0| SwitchSection(Ctx.getAsmInfo()->getNonexecutableStackSection(Ctx)); 97| 749|} _ZN7llvm_ks13MCELFStreamer9EmitLabelEPNS_8MCSymbolE: 99| 8.48k|void MCELFStreamer::EmitLabel(MCSymbol *S) { 100| 8.48k| auto *Symbol = cast(S); 101| 8.48k| assert(Symbol->isUndefined() && "Cannot define a symbol twice!"); ------------------ | Branch (101:3): [True: 8.48k, False: 0] | Branch (101:3): [True: 8.48k, Folded] | Branch (101:3): [True: 8.48k, False: 0] ------------------ 102| | 103| 8.48k| MCObjectStreamer::EmitLabel(Symbol); 104| | 105| 8.48k| const MCSectionELF &Section = 106| 8.48k| static_cast(*getCurrentSectionOnly()); 107| 8.48k| if (Section.getFlags() & ELF::SHF_TLS) ------------------ | Branch (107:7): [True: 0, False: 8.48k] ------------------ 108| 0| Symbol->setType(ELF::STT_TLS); 109| 8.48k|} _ZN7llvm_ks13MCELFStreamer13ChangeSectionEPNS_9MCSectionEPKNS_6MCExprE: 138| 4.66k| const MCExpr *Subsection) { 139| 4.66k| MCSection *CurSection = getCurrentSectionOnly(); 140| 4.66k| if (CurSection && isBundleLocked()) ------------------ | Branch (140:7): [True: 3.91k, False: 749] | Branch (140:21): [True: 0, False: 3.91k] ------------------ 141| 0| report_fatal_error("Unterminated .bundle_lock when changing a section"); 142| | 143| 4.66k| MCAssembler &Asm = getAssembler(); 144| | // Ensure the previous section gets aligned if necessary. 145| 4.66k| setSectionAlignmentForBundling(Asm, CurSection); 146| 4.66k| auto *SectionELF = static_cast(Section); 147| 4.66k| const MCSymbol *Grp = SectionELF->getGroup(); 148| 4.66k| if (Grp) ------------------ | Branch (148:7): [True: 0, False: 4.66k] ------------------ 149| 0| Asm.registerSymbol(*Grp); 150| | 151| 4.66k| this->MCObjectStreamer::ChangeSection(Section, Subsection); 152| 4.66k| MCContext &Ctx = getContext(); 153| 4.66k| auto *Begin = cast_or_null(Section->getBeginSymbol()); 154| 4.66k| if (!Begin) { ------------------ | Branch (154:7): [True: 879, False: 3.78k] ------------------ 155| 879| Begin = Ctx.getOrCreateSectionSymbol(*SectionELF); 156| 879| Section->setBeginSymbol(Begin); 157| 879| } 158| 4.66k| if (Begin->isUndefined()) { ------------------ | Branch (158:7): [True: 879, False: 3.78k] ------------------ 159| 879| Asm.registerSymbol(*Begin); 160| 879| Begin->setType(ELF::STT_SECTION); 161| 879| } 162| 4.66k|} _ZN7llvm_ks13MCELFStreamer16EmitCommonSymbolEPNS_8MCSymbolEmj: 297| 11| unsigned ByteAlignment) { 298| 11| auto *Symbol = cast(S); 299| 11| getAssembler().registerSymbol(*Symbol); 300| | 301| 11| if (!Symbol->isBindingSet()) { ------------------ | Branch (301:7): [True: 10, False: 1] ------------------ 302| 10| Symbol->setBinding(ELF::STB_GLOBAL); 303| 10| Symbol->setExternal(true); 304| 10| } 305| | 306| 11| Symbol->setType(ELF::STT_OBJECT); 307| | 308| 11| if (Symbol->getBinding() == ELF::STB_LOCAL) { ------------------ | Branch (308:7): [True: 0, False: 11] ------------------ 309| 0| MCSection &Section = *getAssembler().getContext().getELFSection( 310| 0| ".bss", ELF::SHT_NOBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 311| 0| MCSectionSubPair P = getCurrentSection(); 312| 0| SwitchSection(&Section); 313| | 314| 0| EmitValueToAlignment(ByteAlignment, 0, 1, 0); 315| 0| EmitLabel(Symbol); 316| 0| EmitZeros(Size); 317| | 318| | // Update the maximum alignment of the section if necessary. 319| 0| if (ByteAlignment > Section.getAlignment()) ------------------ | Branch (319:9): [True: 0, False: 0] ------------------ 320| 0| Section.setAlignment(ByteAlignment); 321| | 322| 0| SwitchSection(P.first, P.second); 323| 11| } else { 324| 11| if(Symbol->declareCommon(Size, ByteAlignment)) ------------------ | Branch (324:8): [True: 0, False: 11] ------------------ 325| 0| report_fatal_error("Symbol: " + Symbol->getName() + 326| 0| " redeclared as different type"); 327| 11| } 328| | 329| 11| cast(Symbol) 330| 11| ->setSize(MCConstantExpr::create(Size, getContext())); 331| 11|} _ZN7llvm_ks13MCELFStreamer13EmitValueImplEPKNS_6MCExprEjNS_5SMLocE: 348| 3.12k| SMLoc Loc) { 349| 3.12k| if (isBundleLocked()) ------------------ | Branch (349:7): [True: 0, False: 3.12k] ------------------ 350| 0| report_fatal_error("Emitting values inside a locked bundle is forbidden"); 351| 3.12k| fixSymbolsInTLSFixups(Value); 352| 3.12k| MCObjectStreamer::EmitValueImpl(Value, Size, Loc); 353| 3.12k|} _ZN7llvm_ks13MCELFStreamer20EmitValueToAlignmentEjljj: 358| 338| unsigned MaxBytesToEmit) { 359| 338| if (isBundleLocked()) ------------------ | Branch (359:7): [True: 0, False: 338] ------------------ 360| 0| report_fatal_error("Emitting values inside a locked bundle is forbidden"); 361| 338| MCObjectStreamer::EmitValueToAlignment(ByteAlignment, Value, 362| 338| ValueSize, MaxBytesToEmit); 363| 338|} _ZN7llvm_ks13MCELFStreamer17EmitFileDirectiveENS_9StringRefE: 368| 355|void MCELFStreamer::EmitFileDirective(StringRef Filename) { 369| 355| getAssembler().addFileName(Filename); 370| 355|} _ZN7llvm_ks13MCELFStreamer21fixSymbolsInTLSFixupsEPKNS_6MCExprE: 387| 36.3k|void MCELFStreamer::fixSymbolsInTLSFixups(const MCExpr *expr) { 388| 36.3k| switch (expr->getKind()) { ------------------ | Branch (388:11): [True: 36.3k, False: 0] ------------------ 389| 6| case MCExpr::Target: ------------------ | Branch (389:3): [True: 6, False: 36.3k] ------------------ 390| 6| cast(expr)->fixELFSymbolsInTLSFixups(getAssembler()); 391| 6| break; 392| 8.02k| case MCExpr::Constant: ------------------ | Branch (392:3): [True: 8.02k, False: 28.2k] ------------------ 393| 8.02k| break; 394| | 395| 13.3k| case MCExpr::Binary: { ------------------ | Branch (395:3): [True: 13.3k, False: 23.0k] ------------------ 396| 13.3k| const MCBinaryExpr *be = cast(expr); 397| 13.3k| fixSymbolsInTLSFixups(be->getLHS()); 398| 13.3k| fixSymbolsInTLSFixups(be->getRHS()); 399| 13.3k| break; 400| 0| } 401| | 402| 13.8k| case MCExpr::SymbolRef: { ------------------ | Branch (402:3): [True: 13.8k, False: 22.5k] ------------------ 403| 13.8k| const MCSymbolRefExpr &symRef = *cast(expr); 404| 13.8k| switch (symRef.getKind()) { 405| 11.7k| default: ------------------ | Branch (405:5): [True: 11.7k, False: 2.07k] ------------------ 406| 11.7k| return; 407| 11.7k| case MCSymbolRefExpr::VK_GOTTPOFF: ------------------ | Branch (407:5): [True: 0, False: 13.8k] ------------------ 408| 0| case MCSymbolRefExpr::VK_INDNTPOFF: ------------------ | Branch (408:5): [True: 0, False: 13.8k] ------------------ 409| 166| case MCSymbolRefExpr::VK_NTPOFF: ------------------ | Branch (409:5): [True: 166, False: 13.6k] ------------------ 410| 199| case MCSymbolRefExpr::VK_GOTNTPOFF: ------------------ | Branch (410:5): [True: 33, False: 13.7k] ------------------ 411| 199| case MCSymbolRefExpr::VK_TLSGD: ------------------ | Branch (411:5): [True: 0, False: 13.8k] ------------------ 412| 327| case MCSymbolRefExpr::VK_TLSLD: ------------------ | Branch (412:5): [True: 128, False: 13.6k] ------------------ 413| 651| case MCSymbolRefExpr::VK_TLSLDM: ------------------ | Branch (413:5): [True: 324, False: 13.4k] ------------------ 414| 749| case MCSymbolRefExpr::VK_TPOFF: ------------------ | Branch (414:5): [True: 98, False: 13.7k] ------------------ 415| 749| case MCSymbolRefExpr::VK_TPREL: ------------------ | Branch (415:5): [True: 0, False: 13.8k] ------------------ 416| 749| case MCSymbolRefExpr::VK_DTPOFF: ------------------ | Branch (416:5): [True: 0, False: 13.8k] ------------------ 417| 749| case MCSymbolRefExpr::VK_DTPREL: ------------------ | Branch (417:5): [True: 0, False: 13.8k] ------------------ 418| 749| case MCSymbolRefExpr::VK_Mips_TLSGD: ------------------ | Branch (418:5): [True: 0, False: 13.8k] ------------------ 419| 749| case MCSymbolRefExpr::VK_Mips_GOTTPREL: ------------------ | Branch (419:5): [True: 0, False: 13.8k] ------------------ 420| 749| case MCSymbolRefExpr::VK_Mips_TPREL_HI: ------------------ | Branch (420:5): [True: 0, False: 13.8k] ------------------ 421| 749| case MCSymbolRefExpr::VK_Mips_TPREL_LO: ------------------ | Branch (421:5): [True: 0, False: 13.8k] ------------------ 422| 749| case MCSymbolRefExpr::VK_PPC_DTPMOD: ------------------ | Branch (422:5): [True: 0, False: 13.8k] ------------------ 423| 912| case MCSymbolRefExpr::VK_PPC_TPREL_LO: ------------------ | Branch (423:5): [True: 163, False: 13.6k] ------------------ 424| 912| case MCSymbolRefExpr::VK_PPC_TPREL_HI: ------------------ | Branch (424:5): [True: 0, False: 13.8k] ------------------ 425| 912| case MCSymbolRefExpr::VK_PPC_TPREL_HA: ------------------ | Branch (425:5): [True: 0, False: 13.8k] ------------------ 426| 1.05k| case MCSymbolRefExpr::VK_PPC_TPREL_HIGHER: ------------------ | Branch (426:5): [True: 141, False: 13.6k] ------------------ 427| 1.05k| case MCSymbolRefExpr::VK_PPC_TPREL_HIGHERA: ------------------ | Branch (427:5): [True: 0, False: 13.8k] ------------------ 428| 1.05k| case MCSymbolRefExpr::VK_PPC_TPREL_HIGHEST: ------------------ | Branch (428:5): [True: 0, False: 13.8k] ------------------ 429| 1.11k| case MCSymbolRefExpr::VK_PPC_TPREL_HIGHESTA: ------------------ | Branch (429:5): [True: 59, False: 13.7k] ------------------ 430| 1.34k| case MCSymbolRefExpr::VK_PPC_DTPREL_LO: ------------------ | Branch (430:5): [True: 235, False: 13.5k] ------------------ 431| 1.36k| case MCSymbolRefExpr::VK_PPC_DTPREL_HI: ------------------ | Branch (431:5): [True: 15, False: 13.7k] ------------------ 432| 1.36k| case MCSymbolRefExpr::VK_PPC_DTPREL_HA: ------------------ | Branch (432:5): [True: 0, False: 13.8k] ------------------ 433| 1.36k| case MCSymbolRefExpr::VK_PPC_DTPREL_HIGHER: ------------------ | Branch (433:5): [True: 0, False: 13.8k] ------------------ 434| 1.36k| case MCSymbolRefExpr::VK_PPC_DTPREL_HIGHERA: ------------------ | Branch (434:5): [True: 0, False: 13.8k] ------------------ 435| 1.36k| case MCSymbolRefExpr::VK_PPC_DTPREL_HIGHEST: ------------------ | Branch (435:5): [True: 0, False: 13.8k] ------------------ 436| 1.36k| case MCSymbolRefExpr::VK_PPC_DTPREL_HIGHESTA: ------------------ | Branch (436:5): [True: 0, False: 13.8k] ------------------ 437| 1.36k| case MCSymbolRefExpr::VK_PPC_GOT_TPREL: ------------------ | Branch (437:5): [True: 0, False: 13.8k] ------------------ 438| 1.36k| case MCSymbolRefExpr::VK_PPC_GOT_TPREL_LO: ------------------ | Branch (438:5): [True: 0, False: 13.8k] ------------------ 439| 1.36k| case MCSymbolRefExpr::VK_PPC_GOT_TPREL_HI: ------------------ | Branch (439:5): [True: 0, False: 13.8k] ------------------ 440| 1.36k| case MCSymbolRefExpr::VK_PPC_GOT_TPREL_HA: ------------------ | Branch (440:5): [True: 0, False: 13.8k] ------------------ 441| 1.37k| case MCSymbolRefExpr::VK_PPC_GOT_DTPREL: ------------------ | Branch (441:5): [True: 17, False: 13.7k] ------------------ 442| 1.38k| case MCSymbolRefExpr::VK_PPC_GOT_DTPREL_LO: ------------------ | Branch (442:5): [True: 6, False: 13.8k] ------------------ 443| 1.38k| case MCSymbolRefExpr::VK_PPC_GOT_DTPREL_HI: ------------------ | Branch (443:5): [True: 0, False: 13.8k] ------------------ 444| 1.38k| case MCSymbolRefExpr::VK_PPC_GOT_DTPREL_HA: ------------------ | Branch (444:5): [True: 0, False: 13.8k] ------------------ 445| 1.50k| case MCSymbolRefExpr::VK_PPC_TLS: ------------------ | Branch (445:5): [True: 119, False: 13.6k] ------------------ 446| 1.56k| case MCSymbolRefExpr::VK_PPC_GOT_TLSGD: ------------------ | Branch (446:5): [True: 59, False: 13.7k] ------------------ 447| 1.56k| case MCSymbolRefExpr::VK_PPC_GOT_TLSGD_LO: ------------------ | Branch (447:5): [True: 0, False: 13.8k] ------------------ 448| 1.56k| case MCSymbolRefExpr::VK_PPC_GOT_TLSGD_HI: ------------------ | Branch (448:5): [True: 0, False: 13.8k] ------------------ 449| 1.71k| case MCSymbolRefExpr::VK_PPC_GOT_TLSGD_HA: ------------------ | Branch (449:5): [True: 148, False: 13.6k] ------------------ 450| 1.71k| case MCSymbolRefExpr::VK_PPC_TLSGD: ------------------ | Branch (450:5): [True: 0, False: 13.8k] ------------------ 451| 1.87k| case MCSymbolRefExpr::VK_PPC_GOT_TLSLD: ------------------ | Branch (451:5): [True: 165, False: 13.6k] ------------------ 452| 1.91k| case MCSymbolRefExpr::VK_PPC_GOT_TLSLD_LO: ------------------ | Branch (452:5): [True: 34, False: 13.7k] ------------------ 453| 2.07k| case MCSymbolRefExpr::VK_PPC_GOT_TLSLD_HI: ------------------ | Branch (453:5): [True: 164, False: 13.6k] ------------------ 454| 2.07k| case MCSymbolRefExpr::VK_PPC_GOT_TLSLD_HA: ------------------ | Branch (454:5): [True: 0, False: 13.8k] ------------------ 455| 2.07k| case MCSymbolRefExpr::VK_PPC_TLSLD: ------------------ | Branch (455:5): [True: 0, False: 13.8k] ------------------ 456| 2.07k| break; 457| 13.8k| } 458| 2.07k| getAssembler().registerSymbol(symRef.getSymbol()); 459| 2.07k| cast(symRef.getSymbol()).setType(ELF::STT_TLS); 460| 2.07k| break; 461| 13.8k| } 462| | 463| 1.18k| case MCExpr::Unary: ------------------ | Branch (463:3): [True: 1.18k, False: 35.1k] ------------------ 464| 1.18k| fixSymbolsInTLSFixups(cast(expr)->getSubExpr()); 465| 1.18k| break; 466| 36.3k| } 467| 36.3k|} _ZN7llvm_ks13MCELFStreamer14EmitInstToDataERNS_6MCInstERKNS_15MCSubtargetInfoERj: 481| 8.24k|{ 482| 8.24k| MCAssembler &Assembler = getAssembler(); 483| 8.24k| SmallVector Fixups; 484| 8.24k| SmallString<256> Code; 485| 8.24k| raw_svector_ostream VecOS(Code); 486| 8.24k| Assembler.getEmitter().encodeInstruction(Inst, VecOS, Fixups, STI, KsError); 487| 8.24k| if (KsError) ------------------ | Branch (487:7): [True: 0, False: 8.24k] ------------------ 488| 0| return; 489| | 490| 13.6k| for (unsigned i = 0, e = Fixups.size(); i != e; ++i) ------------------ | Branch (490:43): [True: 5.41k, False: 8.24k] ------------------ 491| 5.41k| fixSymbolsInTLSFixups(Fixups[i].getValue()); 492| | 493| | // There are several possibilities here: 494| | // 495| | // If bundling is disabled, append the encoded instruction to the current data 496| | // fragment (or create a new such fragment if the current fragment is not a 497| | // data fragment). 498| | // 499| | // If bundling is enabled: 500| | // - If we're not in a bundle-locked group, emit the instruction into a 501| | // fragment of its own. If there are no fixups registered for the 502| | // instruction, emit a MCCompactEncodedInstFragment. Otherwise, emit a 503| | // MCDataFragment. 504| | // - If we're in a bundle-locked group, append the instruction to the current 505| | // data fragment because we want all the instructions in a group to get into 506| | // the same fragment. Be careful not to do that for the first instruction in 507| | // the group, though. 508| 8.24k| MCDataFragment *DF; 509| | 510| 8.24k| if (Assembler.isBundlingEnabled()) { ------------------ | Branch (510:7): [True: 0, False: 8.24k] ------------------ 511| 0| MCSection &Sec = *getCurrentSectionOnly(); 512| 0| if (Assembler.getRelaxAll() && isBundleLocked()) ------------------ | Branch (512:9): [True: 0, False: 0] | Branch (512:36): [True: 0, False: 0] ------------------ 513| | // If the -mc-relax-all flag is used and we are bundle-locked, we re-use 514| | // the current bundle group. 515| 0| DF = BundleGroups.back(); 516| 0| else if (Assembler.getRelaxAll() && !isBundleLocked()) ------------------ | Branch (516:14): [True: 0, False: 0] | Branch (516:41): [True: 0, False: 0] ------------------ 517| | // When not in a bundle-locked group and the -mc-relax-all flag is used, 518| | // we create a new temporary fragment which will be later merged into 519| | // the current fragment. 520| 0| DF = new MCDataFragment(); 521| 0| else if (isBundleLocked() && !Sec.isBundleGroupBeforeFirstInst()) ------------------ | Branch (521:14): [True: 0, False: 0] | Branch (521:34): [True: 0, False: 0] ------------------ 522| | // If we are bundle-locked, we re-use the current fragment. 523| | // The bundle-locking directive ensures this is a new data fragment. 524| 0| DF = cast(getCurrentFragment()); 525| 0| else if (!isBundleLocked() && Fixups.size() == 0) { ------------------ | Branch (525:14): [True: 0, False: 0] | Branch (525:35): [True: 0, False: 0] ------------------ 526| | // Optimize memory usage by emitting the instruction to a 527| | // MCCompactEncodedInstFragment when not in a bundle-locked group and 528| | // there are no fixups registered. 529| 0| MCCompactEncodedInstFragment *CEIF = new MCCompactEncodedInstFragment(); 530| 0| insert(CEIF); 531| 0| CEIF->getContents().append(Code.begin(), Code.end()); 532| 0| return; 533| 0| } else { 534| 0| DF = new MCDataFragment(); 535| 0| insert(DF); 536| 0| } 537| 0| if (Sec.getBundleLockState() == MCSection::BundleLockedAlignToEnd) { ------------------ | Branch (537:9): [True: 0, False: 0] ------------------ 538| | // If this fragment is for a group marked "align_to_end", set a flag 539| | // in the fragment. This can happen after the fragment has already been 540| | // created if there are nested bundle_align groups and an inner one 541| | // is the one marked align_to_end. 542| 0| DF->setAlignToBundleEnd(true); 543| 0| } 544| | 545| | // We're now emitting an instruction in a bundle group, so this flag has 546| | // to be turned off. 547| 0| Sec.setBundleGroupBeforeFirstInst(false); 548| 8.24k| } else { 549| 8.24k| DF = getOrCreateDataFragment(); 550| 8.24k| } 551| | 552| | // Add the fixups and data. 553| 13.6k| for (unsigned i = 0, e = Fixups.size(); i != e; ++i) { ------------------ | Branch (553:43): [True: 5.41k, False: 8.24k] ------------------ 554| 5.41k| Fixups[i].setOffset(Fixups[i].getOffset() + DF->getContents().size()); 555| 5.41k| DF->getFixups().push_back(Fixups[i]); 556| 5.41k| } 557| 8.24k| DF->setHasInstructions(true); 558| 8.24k| DF->getContents().append(Code.begin(), Code.end()); 559| | 560| 8.24k| if (Assembler.isBundlingEnabled() && Assembler.getRelaxAll()) { ------------------ | Branch (560:7): [True: 0, False: 8.24k] | Branch (560:40): [True: 0, False: 0] ------------------ 561| 0| if (!isBundleLocked()) { ------------------ | Branch (561:9): [True: 0, False: 0] ------------------ 562| 0| mergeFragment(getOrCreateDataFragment(), DF); 563| 0| delete DF; 564| 0| } 565| 0| } 566| 8.24k|} _ZN7llvm_ks13MCELFStreamer10FinishImplEv: 634| 312|{ 635| | // Ensure the last section gets aligned if necessary. 636| 312| MCSection *CurSection = getCurrentSectionOnly(); 637| 312| setSectionAlignmentForBundling(getAssembler(), CurSection); 638| | 639| 312| EmitFrames(nullptr); 640| 312| return this->MCObjectStreamer::FinishImpl(); 641| 312|} _ZN7llvm_ks17createELFStreamerERNS_9MCContextERNS_12MCAsmBackendERNS_17raw_pwrite_streamEPNS_13MCCodeEmitterEb: 645| 749| bool RelaxAll) { 646| 749| MCELFStreamer *S = new MCELFStreamer(Context, MAB, OS, CE); 647| 749| if (RelaxAll) ------------------ | Branch (647:7): [True: 0, False: 749] ------------------ 648| 0| S->getAssembler().setRelaxAll(true); 649| 749| return S; 650| 749|} MCELFStreamer.cpp:_ZL30setSectionAlignmentForBundlingRKN7llvm_ks11MCAssemblerEPNS_9MCSectionE: 131| 4.98k| MCSection *Section) { 132| 4.98k| if (Section && Assembler.isBundlingEnabled() && Section->hasInstructions() && ------------------ | Branch (132:7): [True: 4.23k, False: 749] | Branch (132:18): [True: 0, False: 4.23k] | Branch (132:51): [True: 0, False: 0] ------------------ 133| 0| Section->getAlignment() < Assembler.getBundleAlignSize()) ------------------ | Branch (133:7): [True: 0, False: 0] ------------------ 134| 0| Section->setAlignment(Assembler.getBundleAlignSize()); 135| 4.98k|} _ZN7llvm_ks12MCBinaryExpr6createENS0_6OpcodeEPKNS_6MCExprES4_RNS_9MCContextE: 133| 24.9k| const MCExpr *RHS, MCContext &Ctx) { 134| 24.9k| return new (Ctx) MCBinaryExpr(Opc, LHS, RHS); 135| 24.9k|} _ZN7llvm_ks11MCUnaryExpr6createENS0_6OpcodeEPKNS_6MCExprERNS_9MCContextE: 138| 6.21k| MCContext &Ctx) { 139| 6.21k| return new (Ctx) MCUnaryExpr(Opc, Expr); 140| 6.21k|} _ZN7llvm_ks14MCConstantExpr6createElRNS_9MCContextE: 142| 31.9k|const MCConstantExpr *MCConstantExpr::create(int64_t Value, MCContext &Ctx) { 143| 31.9k| return new (Ctx) MCConstantExpr(Value); 144| 31.9k|} _ZN7llvm_ks15MCSymbolRefExprC2EPKNS_8MCSymbolENS0_11VariantKindEPKNS_9MCAsmInfoE: 150| 22.9k| : MCExpr(MCExpr::SymbolRef), Kind(Kind), 151| 22.9k| UseParensForSymbolVariant(MAI->useParensForSymbolVariant()), 152| 22.9k| HasSubsectionsViaSymbols(MAI->hasSubsectionsViaSymbols()), 153| 22.9k| Symbol(Symbol) { 154| | assert(Symbol); ------------------ | Branch (154:3): [True: 22.9k, False: 0] ------------------ 155| 22.9k|} _ZN7llvm_ks15MCSymbolRefExpr6createEPKNS_8MCSymbolENS0_11VariantKindERNS_9MCContextE: 159| 22.9k| MCContext &Ctx) { 160| 22.9k| return new (Ctx) MCSymbolRefExpr(Sym, Kind, Ctx.getAsmInfo()); 161| 22.9k|} _ZN7llvm_ks15MCSymbolRefExpr21getVariantKindForNameENS_9StringRefE: 303| 1.40k|MCSymbolRefExpr::getVariantKindForName(StringRef Name) { 304| 1.40k| return StringSwitch(Name.lower()) 305| 1.40k| .Case("got", VK_GOT) 306| 1.40k| .Case("gotoff", VK_GOTOFF) 307| 1.40k| .Case("gotpcrel", VK_GOTPCREL) 308| 1.40k| .Case("gottpoff", VK_GOTTPOFF) 309| 1.40k| .Case("indntpoff", VK_INDNTPOFF) 310| 1.40k| .Case("ntpoff", VK_NTPOFF) 311| 1.40k| .Case("gotntpoff", VK_GOTNTPOFF) 312| 1.40k| .Case("plt", VK_PLT) 313| 1.40k| .Case("tlsgd", VK_TLSGD) 314| 1.40k| .Case("tlsld", VK_TLSLD) 315| 1.40k| .Case("tlsldm", VK_TLSLDM) 316| 1.40k| .Case("tpoff", VK_TPOFF) 317| 1.40k| .Case("dtpoff", VK_DTPOFF) 318| 1.40k| .Case("tlvp", VK_TLVP) 319| 1.40k| .Case("tlvppage", VK_TLVPPAGE) 320| 1.40k| .Case("tlvppageoff", VK_TLVPPAGEOFF) 321| 1.40k| .Case("page", VK_PAGE) 322| 1.40k| .Case("pageoff", VK_PAGEOFF) 323| 1.40k| .Case("gotpage", VK_GOTPAGE) 324| 1.40k| .Case("gotpageoff", VK_GOTPAGEOFF) 325| 1.40k| .Case("imgrel", VK_COFF_IMGREL32) 326| 1.40k| .Case("secrel32", VK_SECREL) 327| 1.40k| .Case("size", VK_SIZE) 328| 1.40k| .Case("l", VK_PPC_LO) 329| 1.40k| .Case("h", VK_PPC_HI) 330| 1.40k| .Case("ha", VK_PPC_HA) 331| 1.40k| .Case("higher", VK_PPC_HIGHER) 332| 1.40k| .Case("highera", VK_PPC_HIGHERA) 333| 1.40k| .Case("highest", VK_PPC_HIGHEST) 334| 1.40k| .Case("highesta", VK_PPC_HIGHESTA) 335| 1.40k| .Case("got@l", VK_PPC_GOT_LO) 336| 1.40k| .Case("got@h", VK_PPC_GOT_HI) 337| 1.40k| .Case("got@ha", VK_PPC_GOT_HA) 338| 1.40k| .Case("local", VK_PPC_LOCAL) 339| 1.40k| .Case("tocbase", VK_PPC_TOCBASE) 340| 1.40k| .Case("toc", VK_PPC_TOC) 341| 1.40k| .Case("toc@l", VK_PPC_TOC_LO) 342| 1.40k| .Case("toc@h", VK_PPC_TOC_HI) 343| 1.40k| .Case("toc@ha", VK_PPC_TOC_HA) 344| 1.40k| .Case("tls", VK_PPC_TLS) 345| 1.40k| .Case("dtpmod", VK_PPC_DTPMOD) 346| 1.40k| .Case("tprel", VK_PPC_TPREL) 347| 1.40k| .Case("tprel@l", VK_PPC_TPREL_LO) 348| 1.40k| .Case("tprel@h", VK_PPC_TPREL_HI) 349| 1.40k| .Case("tprel@ha", VK_PPC_TPREL_HA) 350| 1.40k| .Case("tprel@higher", VK_PPC_TPREL_HIGHER) 351| 1.40k| .Case("tprel@highera", VK_PPC_TPREL_HIGHERA) 352| 1.40k| .Case("tprel@highest", VK_PPC_TPREL_HIGHEST) 353| 1.40k| .Case("tprel@highesta", VK_PPC_TPREL_HIGHESTA) 354| 1.40k| .Case("dtprel", VK_PPC_DTPREL) 355| 1.40k| .Case("dtprel@l", VK_PPC_DTPREL_LO) 356| 1.40k| .Case("dtprel@h", VK_PPC_DTPREL_HI) 357| 1.40k| .Case("dtprel@ha", VK_PPC_DTPREL_HA) 358| 1.40k| .Case("dtprel@higher", VK_PPC_DTPREL_HIGHER) 359| 1.40k| .Case("dtprel@highera", VK_PPC_DTPREL_HIGHERA) 360| 1.40k| .Case("dtprel@highest", VK_PPC_DTPREL_HIGHEST) 361| 1.40k| .Case("dtprel@highesta", VK_PPC_DTPREL_HIGHESTA) 362| 1.40k| .Case("got@tprel", VK_PPC_GOT_TPREL) 363| 1.40k| .Case("got@tprel@l", VK_PPC_GOT_TPREL_LO) 364| 1.40k| .Case("got@tprel@h", VK_PPC_GOT_TPREL_HI) 365| 1.40k| .Case("got@tprel@ha", VK_PPC_GOT_TPREL_HA) 366| 1.40k| .Case("got@dtprel", VK_PPC_GOT_DTPREL) 367| 1.40k| .Case("got@dtprel@l", VK_PPC_GOT_DTPREL_LO) 368| 1.40k| .Case("got@dtprel@h", VK_PPC_GOT_DTPREL_HI) 369| 1.40k| .Case("got@dtprel@ha", VK_PPC_GOT_DTPREL_HA) 370| 1.40k| .Case("got@tlsgd", VK_PPC_GOT_TLSGD) 371| 1.40k| .Case("got@tlsgd@l", VK_PPC_GOT_TLSGD_LO) 372| 1.40k| .Case("got@tlsgd@h", VK_PPC_GOT_TLSGD_HI) 373| 1.40k| .Case("got@tlsgd@ha", VK_PPC_GOT_TLSGD_HA) 374| 1.40k| .Case("got@tlsld", VK_PPC_GOT_TLSLD) 375| 1.40k| .Case("got@tlsld@l", VK_PPC_GOT_TLSLD_LO) 376| 1.40k| .Case("got@tlsld@h", VK_PPC_GOT_TLSLD_HI) 377| 1.40k| .Case("got@tlsld@ha", VK_PPC_GOT_TLSLD_HA) 378| 1.40k| .Case("gdgot", VK_Hexagon_GD_GOT) 379| 1.40k| .Case("gdplt", VK_Hexagon_GD_PLT) 380| 1.40k| .Case("iegot", VK_Hexagon_IE_GOT) 381| 1.40k| .Case("ie", VK_Hexagon_IE) 382| 1.40k| .Case("ldgot", VK_Hexagon_LD_GOT) 383| 1.40k| .Case("ldplt", VK_Hexagon_LD_PLT) 384| 1.40k| .Case("pcrel", VK_Hexagon_PCREL) 385| 1.40k| .Case("none", VK_ARM_NONE) 386| 1.40k| .Case("got_prel", VK_ARM_GOT_PREL) 387| 1.40k| .Case("target1", VK_ARM_TARGET1) 388| 1.40k| .Case("target2", VK_ARM_TARGET2) 389| 1.40k| .Case("prel31", VK_ARM_PREL31) 390| 1.40k| .Case("sbrel", VK_ARM_SBREL) 391| 1.40k| .Case("tlsldo", VK_ARM_TLSLDO) 392| 1.40k| .Case("tlscall", VK_ARM_TLSCALL) 393| 1.40k| .Case("tlsdesc", VK_ARM_TLSDESC) 394| 1.40k| .Default(VK_Invalid); 395| 1.40k|} _ZNK7llvm_ks6MCExpr18evaluateAsAbsoluteERl: 406| 32.5k|bool MCExpr::evaluateAsAbsolute(int64_t &Res) const { 407| 32.5k| return evaluateAsAbsolute(Res, nullptr, nullptr, nullptr); 408| 32.5k|} _ZNK7llvm_ks6MCExpr18evaluateAsAbsoluteERlRKNS_11MCAssemblerE: 421| 3.12k|bool MCExpr::evaluateAsAbsolute(int64_t &Res, const MCAssembler &Asm) const { 422| 3.12k| return evaluateAsAbsolute(Res, &Asm, nullptr, nullptr); 423| 3.12k|} _ZNK7llvm_ks6MCExpr18evaluateAsAbsoluteERlPKNS_11MCAssemblerEPKNS_11MCAsmLayoutEPKNS_8DenseMapIPKNS_9MCSectionEmNS_12DenseMapInfoISB_EENS_6detail12DenseMapPairISB_mEEEE: 433| 35.7k| const SectionAddrMap *Addrs) const { 434| | // FIXME: The use if InSet = Addrs is a hack. Setting InSet causes us 435| | // absolutize differences across sections and that is what the MachO writer 436| | // uses Addrs for. 437| 35.7k| return evaluateAsAbsolute(Res, Asm, Layout, Addrs, Addrs); 438| 35.7k|} _ZNK7llvm_ks6MCExpr18evaluateAsAbsoluteERlPKNS_11MCAssemblerEPKNS_11MCAsmLayoutEPKNS_8DenseMapIPKNS_9MCSectionEmNS_12DenseMapInfoISB_EENS_6detail12DenseMapPairISB_mEEEEb: 443| 35.7k|{ 444| 35.7k| MCValue Value; 445| | 446| | // Fast path constants. 447| 35.7k| if (const MCConstantExpr *CE = dyn_cast(this)) { ------------------ | Branch (447:29): [True: 15.7k, False: 19.9k] ------------------ 448| 15.7k| Res = CE->getValue(); 449| 15.7k| return true; 450| 15.7k| } 451| | 452| 19.9k| bool valid; 453| 19.9k| bool IsRelocatable = 454| 19.9k| evaluateAsRelocatableImpl(Value, Asm, Layout, nullptr, Addrs, InSet, valid); 455| | 456| | // Record the current value. 457| 19.9k| Res = Value.getConstant(); 458| | 459| 19.9k| return IsRelocatable && Value.isAbsolute(); ------------------ | Branch (459:10): [True: 16.3k, False: 3.65k] | Branch (459:27): [True: 3.03k, False: 13.2k] ------------------ 460| 35.7k|} _ZNK7llvm_ks6MCExpr21evaluateAsRelocatableERNS_7MCValueEPKNS_11MCAsmLayoutEPKNS_7MCFixupE: 606| 1.54k|{ 607| 1.54k| MCAssembler *Assembler = Layout ? &Layout->getAssembler() : nullptr; ------------------ | Branch (607:28): [True: 1.49k, False: 43] ------------------ 608| 1.54k| bool valid; 609| 1.54k| return evaluateAsRelocatableImpl(Res, Assembler, Layout, Fixup, nullptr, 610| 1.54k| false, valid); 611| 1.54k|} _ZNK7llvm_ks6MCExpr15evaluateAsValueERNS_7MCValueERKNS_11MCAsmLayoutE: 614| 1.02k|{ 615| 1.02k| MCAssembler *Assembler = &Layout.getAssembler(); 616| 1.02k| bool valid; 617| 1.02k| return evaluateAsRelocatableImpl(Res, Assembler, &Layout, nullptr, nullptr, 618| 1.02k| true, valid); 619| 1.02k|} _ZNK7llvm_ks6MCExpr25evaluateAsRelocatableImplERNS_7MCValueEPKNS_11MCAssemblerEPKNS_11MCAsmLayoutEPKNS_7MCFixupEPKNS_8DenseMapIPKNS_9MCSectionEmNS_12DenseMapInfoISF_EENS_6detail12DenseMapPairISF_mEEEEbRb: 639| 202k|{ 640| 202k| switch (getKind()) { ------------------ | Branch (640:11): [True: 202k, False: 0] ------------------ 641| 6| case Target: ------------------ | Branch (641:3): [True: 6, False: 202k] ------------------ 642| 6| return cast(this)->evaluateAsRelocatableImpl(Res, Layout, 643| 6| Fixup); 644| | 645| 21.0k| case Constant: ------------------ | Branch (645:3): [True: 21.0k, False: 181k] ------------------ 646| 21.0k| Res = MCValue::get(cast(this)->getValue()); 647| 21.0k| return true; 648| | 649| 28.8k| case SymbolRef: { ------------------ | Branch (649:3): [True: 28.8k, False: 174k] ------------------ 650| 28.8k| const MCSymbolRefExpr *SRE = cast(this); 651| 28.8k| const MCSymbol &Sym = SRE->getSymbol(); 652| | 653| | // Evaluate recursively if this is a variable. 654| 28.8k| if (Sym.isVariable() && SRE->getKind() == MCSymbolRefExpr::VK_None && ------------------ | Branch (654:9): [True: 1.30k, False: 27.5k] | Branch (654:29): [True: 1.28k, False: 16] ------------------ 655| 1.28k| canExpand(Sym, InSet)) { ------------------ | Branch (655:9): [True: 810, False: 476] ------------------ 656| 810| bool IsMachO = SRE->hasSubsectionsViaSymbols(); 657| 810| bool valid; 658| 810| if (Sym.getVariableValue()->evaluateAsRelocatableImpl( ------------------ | Branch (658:11): [True: 542, False: 268] ------------------ 659| 810| Res, Asm, Layout, Fixup, Addrs, InSet || IsMachO, valid)) { ------------------ | Branch (659:47): [True: 468, False: 342] | Branch (659:56): [True: 0, False: 342] ------------------ 660| 542| if (!IsMachO) ------------------ | Branch (660:13): [True: 542, False: 0] ------------------ 661| 542| return true; 662| | 663| 0| const MCSymbolRefExpr *A = Res.getSymA(); 664| 0| const MCSymbolRefExpr *B = Res.getSymB(); 665| | // FIXME: This is small hack. Given 666| | // a = b + 4 667| | // .long a 668| | // the OS X assembler will completely drop the 4. We should probably 669| | // include it in the relocation or produce an error if that is not 670| | // possible. 671| 0| if (!A && !B) ------------------ | Branch (671:13): [True: 0, False: 0] | Branch (671:19): [True: 0, False: 0] ------------------ 672| 0| return true; 673| 0| } 674| 810| } 675| | 676| 28.3k| Res = MCValue::get(SRE, nullptr, 0); 677| 28.3k| return true; 678| 28.8k| } 679| | 680| 8.69k| case Unary: { ------------------ | Branch (680:3): [True: 8.69k, False: 194k] ------------------ 681| 8.69k| const MCUnaryExpr *AUE = cast(this); 682| 8.69k| MCValue Value; 683| | 684| 8.69k| bool valid; 685| 8.69k| if (!AUE->getSubExpr()->evaluateAsRelocatableImpl(Value, Asm, Layout, Fixup, ------------------ | Branch (685:9): [True: 238, False: 8.45k] ------------------ 686| 8.69k| Addrs, InSet, valid)) 687| 238| return false; 688| | 689| 8.45k| switch (AUE->getOpcode()) { ------------------ | Branch (689:13): [True: 8.45k, False: 0] ------------------ 690| 686| case MCUnaryExpr::LNot: ------------------ | Branch (690:5): [True: 686, False: 7.77k] ------------------ 691| 686| if (!Value.isAbsolute()) ------------------ | Branch (691:11): [True: 4, False: 682] ------------------ 692| 4| return false; 693| 682| Res = MCValue::get(!Value.getConstant()); 694| 682| break; 695| 3.47k| case MCUnaryExpr::Minus: ------------------ | Branch (695:5): [True: 3.47k, False: 4.98k] ------------------ 696| | /// -(a - b + const) ==> (b - a - const) 697| 3.47k| if (Value.getSymA() && !Value.getSymB()) ------------------ | Branch (697:11): [True: 515, False: 2.95k] | Branch (697:30): [True: 387, False: 128] ------------------ 698| 387| return false; 699| 3.08k| Res = MCValue::get(Value.getSymB(), Value.getSymA(), 700| 3.08k| -Value.getConstant()); 701| 3.08k| break; 702| 20| case MCUnaryExpr::Not: ------------------ | Branch (702:5): [True: 20, False: 8.43k] ------------------ 703| 20| if (!Value.isAbsolute()) ------------------ | Branch (703:11): [True: 4, False: 16] ------------------ 704| 4| return false; 705| 16| Res = MCValue::get(~Value.getConstant()); 706| 16| break; 707| 4.28k| case MCUnaryExpr::Plus: ------------------ | Branch (707:5): [True: 4.28k, False: 4.17k] ------------------ 708| 4.28k| Res = Value; 709| 4.28k| break; 710| 8.45k| } 711| | 712| 8.06k| return true; 713| 8.45k| } 714| | 715| 144k| case Binary: { ------------------ | Branch (715:3): [True: 144k, False: 58.6k] ------------------ 716| 144k| const MCBinaryExpr *ABE = cast(this); 717| 144k| MCValue LHSValue, RHSValue; 718| 144k| bool valid; 719| | 720| 144k| if (!ABE->getLHS()->evaluateAsRelocatableImpl(LHSValue, Asm, Layout, Fixup, ------------------ | Branch (720:9): [True: 117k, False: 26.5k] ------------------ 721| 144k| Addrs, InSet, valid) || 722| 26.5k| !ABE->getRHS()->evaluateAsRelocatableImpl(RHSValue, Asm, Layout, Fixup, ------------------ | Branch (722:9): [True: 985, False: 25.6k] ------------------ 723| 26.5k| Addrs, InSet, valid)) 724| 118k| return false; 725| | 726| | // We only support a few operations on non-constant expressions, handle 727| | // those first. 728| 25.6k| if (!LHSValue.isAbsolute() || !RHSValue.isAbsolute()) { ------------------ | Branch (728:9): [True: 13.8k, False: 11.7k] | Branch (728:35): [True: 6.50k, False: 5.20k] ------------------ 729| 20.3k| switch (ABE->getOpcode()) { 730| 2.31k| default: ------------------ | Branch (730:7): [True: 2.31k, False: 18.0k] ------------------ 731| 2.31k| return false; 732| 13.3k| case MCBinaryExpr::Sub: ------------------ | Branch (732:7): [True: 13.3k, False: 6.99k] ------------------ 733| | // Negate RHS and add. 734| 13.3k| return EvaluateSymbolicAdd(Asm, Layout, Addrs, InSet, LHSValue, 735| 13.3k| RHSValue.getSymB(), RHSValue.getSymA(), 736| 13.3k| -RHSValue.getConstant(), Res, valid); 737| | 738| 4.68k| case MCBinaryExpr::Add: ------------------ | Branch (738:7): [True: 4.68k, False: 15.7k] ------------------ 739| 4.68k| return EvaluateSymbolicAdd(Asm, Layout, Addrs, InSet, LHSValue, 740| 4.68k| RHSValue.getSymA(), RHSValue.getSymB(), 741| 4.68k| RHSValue.getConstant(), Res, valid); 742| 20.3k| } 743| 20.3k| } 744| | 745| | // FIXME: We need target hooks for the evaluation. It may be limited in 746| | // width, and gas defines the result of comparisons differently from 747| | // Apple as. 748| 5.20k| int64_t LHS = LHSValue.getConstant(), RHS = RHSValue.getConstant(); 749| 5.20k| int64_t Result = 0; 750| 5.20k| switch (ABE->getOpcode()) { ------------------ | Branch (750:13): [True: 5.20k, False: 0] ------------------ 751| 0| case MCBinaryExpr::AShr: Result = LHS >> RHS; break; ------------------ | Branch (751:5): [True: 0, False: 5.20k] ------------------ 752| 1.64k| case MCBinaryExpr::Add: Result = LHS + RHS; break; ------------------ | Branch (752:5): [True: 1.64k, False: 3.56k] ------------------ 753| 57| case MCBinaryExpr::And: Result = LHS & RHS; break; ------------------ | Branch (753:5): [True: 57, False: 5.14k] ------------------ 754| 4| case MCBinaryExpr::Div: ------------------ | Branch (754:5): [True: 4, False: 5.20k] ------------------ 755| | // Handle division by zero. gas just emits a warning and keeps going, 756| | // we try to be stricter. 757| | // FIXME: Currently the caller of this function has no way to understand 758| | // we're bailing out because of 'division by zero'. Therefore, it will 759| | // emit a 'expected relocatable expression' error. It would be nice to 760| | // change this code to emit a better diagnostic. 761| 4| if (RHS == 0) ------------------ | Branch (761:11): [True: 0, False: 4] ------------------ 762| 0| return false; 763| 4| Result = LHS / RHS; 764| 4| break; 765| 137| case MCBinaryExpr::EQ: Result = LHS == RHS; break; ------------------ | Branch (765:5): [True: 137, False: 5.06k] ------------------ 766| 130| case MCBinaryExpr::GT: Result = LHS > RHS; break; ------------------ | Branch (766:5): [True: 130, False: 5.07k] ------------------ 767| 40| case MCBinaryExpr::GTE: Result = LHS >= RHS; break; ------------------ | Branch (767:5): [True: 40, False: 5.16k] ------------------ 768| 769| case MCBinaryExpr::LAnd: Result = LHS && RHS; break; ------------------ | Branch (768:5): [True: 769, False: 4.43k] | Branch (768:39): [True: 758, False: 11] | Branch (768:46): [True: 567, False: 191] ------------------ 769| 194| case MCBinaryExpr::LOr: Result = LHS || RHS; break; ------------------ | Branch (769:5): [True: 194, False: 5.01k] | Branch (769:39): [True: 0, False: 194] | Branch (769:46): [True: 194, False: 0] ------------------ 770| 0| case MCBinaryExpr::LShr: Result = uint64_t(LHS) >> uint64_t(RHS); break; ------------------ | Branch (770:5): [True: 0, False: 5.20k] ------------------ 771| 28| case MCBinaryExpr::LT: Result = LHS < RHS; break; ------------------ | Branch (771:5): [True: 28, False: 5.17k] ------------------ 772| 20| case MCBinaryExpr::LTE: Result = LHS <= RHS; break; ------------------ | Branch (772:5): [True: 20, False: 5.18k] ------------------ 773| 1| case MCBinaryExpr::Mod: ------------------ | Branch (773:5): [True: 1, False: 5.20k] ------------------ 774| | // Handle division by zero. gas just emits a warning and keeps going, 775| | // we try to be stricter. 776| | // FIXME: Currently the caller of this function has no way to understand 777| | // we're bailing out because of 'division by zero'. Therefore, it will 778| | // emit a 'expected relocatable expression' error. It would be nice to 779| | // change this code to emit a better diagnostic. 780| 1| if (RHS == 0) ------------------ | Branch (780:11): [True: 0, False: 1] ------------------ 781| 0| return false; 782| 1| Result = LHS % RHS; 783| 1| break; 784| 83| case MCBinaryExpr::Mul: Result = LHS * RHS; break; ------------------ | Branch (784:5): [True: 83, False: 5.12k] ------------------ 785| 0| case MCBinaryExpr::NE: Result = LHS != RHS; break; ------------------ | Branch (785:5): [True: 0, False: 5.20k] ------------------ 786| 0| case MCBinaryExpr::Or: Result = LHS | RHS; break; ------------------ | Branch (786:5): [True: 0, False: 5.20k] ------------------ 787| 1| case MCBinaryExpr::Shl: Result = uint64_t(LHS) << uint64_t(RHS); break; ------------------ | Branch (787:5): [True: 1, False: 5.20k] ------------------ 788| 2.09k| case MCBinaryExpr::Sub: Result = LHS - RHS; break; ------------------ | Branch (788:5): [True: 2.09k, False: 3.10k] ------------------ 789| 0| case MCBinaryExpr::Xor: Result = LHS ^ RHS; break; ------------------ | Branch (789:5): [True: 0, False: 5.20k] ------------------ 790| 5.20k| } 791| | 792| 5.20k| Res = MCValue::get(Result); 793| 5.20k| return true; 794| 5.20k| } 795| 202k| } 796| | 797| 0| llvm_unreachable("Invalid assembly expression kind!"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ 798| 202k|} _ZNK7llvm_ks6MCExpr22findAssociatedFragmentEv: 800| 7.05k|MCFragment *MCExpr::findAssociatedFragment() const { 801| 7.05k| switch (getKind()) { ------------------ | Branch (801:11): [True: 7.05k, False: 0] ------------------ 802| 0| case Target: ------------------ | Branch (802:3): [True: 0, False: 7.05k] ------------------ 803| | // We never look through target specific expressions. 804| 0| return cast(this)->findAssociatedFragment(); 805| | 806| 126| case Constant: ------------------ | Branch (806:3): [True: 126, False: 6.92k] ------------------ 807| 126| return MCSymbol::AbsolutePseudoFragment; 808| | 809| 3.62k| case SymbolRef: { ------------------ | Branch (809:3): [True: 3.62k, False: 3.42k] ------------------ 810| 3.62k| const MCSymbolRefExpr *SRE = cast(this); 811| 3.62k| const MCSymbol &Sym = SRE->getSymbol(); 812| 3.62k| return Sym.getFragment(); 813| 0| } 814| | 815| 553| case Unary: ------------------ | Branch (815:3): [True: 553, False: 6.49k] ------------------ 816| 553| return cast(this)->getSubExpr()->findAssociatedFragment(); 817| | 818| 2.74k| case Binary: { ------------------ | Branch (818:3): [True: 2.74k, False: 4.30k] ------------------ 819| 2.74k| const MCBinaryExpr *BE = cast(this); 820| 2.74k| MCFragment *LHS_F = BE->getLHS()->findAssociatedFragment(); 821| 2.74k| MCFragment *RHS_F = BE->getRHS()->findAssociatedFragment(); 822| | 823| | // If either is absolute, return the other. 824| 2.74k| if (LHS_F == MCSymbol::AbsolutePseudoFragment) ------------------ | Branch (824:9): [True: 877, False: 1.86k] ------------------ 825| 877| return RHS_F; 826| 1.86k| if (RHS_F == MCSymbol::AbsolutePseudoFragment) ------------------ | Branch (826:9): [True: 383, False: 1.48k] ------------------ 827| 383| return LHS_F; 828| | 829| | // Not always correct, but probably the best we can do without more context. 830| 1.48k| if (BE->getOpcode() == MCBinaryExpr::Sub) ------------------ | Branch (830:9): [True: 1.13k, False: 353] ------------------ 831| 1.13k| return MCSymbol::AbsolutePseudoFragment; 832| | 833| | // Otherwise, return the first non-null fragment. 834| 353| return LHS_F ? LHS_F : RHS_F; ------------------ | Branch (834:12): [True: 0, False: 353] ------------------ 835| 1.48k| } 836| 7.05k| } 837| | 838| 0| llvm_unreachable("Invalid assembly expression kind!"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ 839| 7.05k|} MCExpr.cpp:_ZL9canExpandRKN7llvm_ks8MCSymbolEb: 621| 1.28k|static bool canExpand(const MCSymbol &Sym, bool InSet) { 622| 1.28k| const MCExpr *Expr = Sym.getVariableValue(); 623| 1.28k| const auto *Inner = dyn_cast(Expr); 624| 1.28k| if (Inner) { ------------------ | Branch (624:7): [True: 681, False: 605] ------------------ 625| 681| if (Inner->getKind() == MCSymbolRefExpr::VK_WEAKREF) ------------------ | Branch (625:9): [True: 0, False: 681] ------------------ 626| 0| return false; 627| 681| } 628| | 629| 1.28k| if (InSet) ------------------ | Branch (629:7): [True: 468, False: 818] ------------------ 630| 468| return true; 631| 818| return !Sym.isInSection(); 632| 1.28k|} MCExpr.cpp:_ZL19EvaluateSymbolicAddPKN7llvm_ks11MCAssemblerEPKNS_11MCAsmLayoutEPKNS_8DenseMapIPKNS_9MCSectionEmNS_12DenseMapInfoIS9_EENS_6detail12DenseMapPairIS9_mEEEEbRKNS_7MCValueEPKNS_15MCSymbolRefExprESN_lRSI_Rb: 547| 18.0k|{ 548| | // FIXME: This routine (and other evaluation parts) are *incredibly* sloppy 549| | // about dealing with modifiers. This will ultimately bite us, one day. 550| 18.0k| const MCSymbolRefExpr *LHS_A = LHS.getSymA(); 551| 18.0k| const MCSymbolRefExpr *LHS_B = LHS.getSymB(); 552| 18.0k| int64_t LHS_Cst = LHS.getConstant(); 553| | 554| | // Fold the result constant immediately. 555| 18.0k| int64_t Result_Cst = LHS_Cst + RHS_Cst; 556| | 557| 18.0k| assert((!Layout || Asm) && ------------------ | Branch (557:3): [True: 11.6k, False: 6.47k] | Branch (557:3): [True: 6.47k, False: 0] | Branch (557:3): [True: 18.0k, Folded] | Branch (557:3): [True: 18.0k, False: 0] ------------------ 558| 18.0k| "Must have an assembler object if layout is given!"); 559| | 560| | // If we have a layout, we can fold resolved differences. 561| 18.0k| if (Asm) { ------------------ | Branch (561:7): [True: 11.3k, False: 6.70k] ------------------ 562| | // First, fold out any differences which are fully resolved. By 563| | // reassociating terms in 564| | // Result = (LHS_A - LHS_B + LHS_Cst) + (RHS_A - RHS_B + RHS_Cst). 565| | // we have the four possible differences: 566| | // (LHS_A - LHS_B), 567| | // (LHS_A - RHS_B), 568| | // (RHS_A - LHS_B), 569| | // (RHS_A - RHS_B). 570| | // Since we are attempting to be as aggressive as possible about folding, we 571| | // attempt to evaluate each possible alternative. 572| 11.3k| AttemptToFoldSymbolOffsetDifference(Asm, Layout, Addrs, InSet, LHS_A, LHS_B, 573| 11.3k| Result_Cst, valid); 574| 11.3k| if (!valid) ------------------ | Branch (574:9): [True: 0, False: 11.3k] ------------------ 575| 0| return false; 576| 11.3k| AttemptToFoldSymbolOffsetDifference(Asm, Layout, Addrs, InSet, LHS_A, RHS_B, 577| 11.3k| Result_Cst, valid); 578| 11.3k| if (!valid) ------------------ | Branch (578:9): [True: 0, False: 11.3k] ------------------ 579| 0| return false; 580| 11.3k| AttemptToFoldSymbolOffsetDifference(Asm, Layout, Addrs, InSet, RHS_A, LHS_B, 581| 11.3k| Result_Cst, valid); 582| 11.3k| if (!valid) ------------------ | Branch (582:9): [True: 0, False: 11.3k] ------------------ 583| 0| return false; 584| 11.3k| AttemptToFoldSymbolOffsetDifference(Asm, Layout, Addrs, InSet, RHS_A, RHS_B, 585| 11.3k| Result_Cst, valid); 586| 11.3k| if (!valid) ------------------ | Branch (586:9): [True: 0, False: 11.3k] ------------------ 587| 0| return false; 588| 11.3k| } 589| | 590| | // We can't represent the addition or subtraction of two symbols. 591| 18.0k| if ((LHS_A && RHS_A) || (LHS_B && RHS_B)) ------------------ | Branch (591:8): [True: 10.8k, False: 7.26k] | Branch (591:17): [True: 170, False: 10.6k] | Branch (591:28): [True: 1.58k, False: 16.3k] | Branch (591:37): [True: 1.14k, False: 439] ------------------ 592| 1.31k| return false; 593| | 594| | // At this point, we have at most one additive symbol and one subtractive 595| | // symbol -- find them. 596| 16.7k| const MCSymbolRefExpr *A = LHS_A ? LHS_A : RHS_A; ------------------ | Branch (596:30): [True: 9.51k, False: 7.25k] ------------------ 597| 16.7k| const MCSymbolRefExpr *B = LHS_B ? LHS_B : RHS_B; ------------------ | Branch (597:30): [True: 439, False: 16.3k] ------------------ 598| | 599| 16.7k| Res = MCValue::get(A, B, Result_Cst); 600| 16.7k| return true; 601| 18.0k|} MCExpr.cpp:_ZL35AttemptToFoldSymbolOffsetDifferencePKN7llvm_ks11MCAssemblerEPKNS_11MCAsmLayoutEPKNS_8DenseMapIPKNS_9MCSectionEmNS_12DenseMapInfoIS9_EENS_6detail12DenseMapPairIS9_mEEEEbRPKNS_15MCSymbolRefExprESL_RlRb: 466| 45.5k| const MCSymbolRefExpr *&B, int64_t &Addend, bool &valid) { 467| 45.5k| valid = true; 468| 45.5k| if (!A || !B) ------------------ | Branch (468:7): [True: 25.2k, False: 20.2k] | Branch (468:13): [True: 16.0k, False: 4.14k] ------------------ 469| 41.3k| return; 470| | 471| 4.14k| const MCSymbol &SA = A->getSymbol(); 472| 4.14k| const MCSymbol &SB = B->getSymbol(); 473| | 474| 4.14k| if (SA.isUndefined() || SB.isUndefined()) ------------------ | Branch (474:7): [True: 838, False: 3.31k] | Branch (474:27): [True: 1.50k, False: 1.80k] ------------------ 475| 2.34k| return; 476| | 477| 1.80k| if (!Asm->getWriter().isSymbolRefDifferenceFullyResolved(*Asm, A, B, InSet, valid)) ------------------ | Branch (477:7): [True: 24, False: 1.78k] ------------------ 478| 24| return; 479| 1.78k| if (!valid) ------------------ | Branch (479:7): [True: 0, False: 1.78k] ------------------ 480| 0| return; 481| | 482| 1.78k| if (SA.getFragment() == SB.getFragment() && !SA.isVariable() && ------------------ | Branch (482:7): [True: 1.11k, False: 667] | Branch (482:47): [True: 1.11k, False: 0] ------------------ 483| 1.11k| !SB.isVariable()) { ------------------ | Branch (483:7): [True: 1.11k, False: 0] ------------------ 484| 1.11k| Addend += (SA.getOffset() - SB.getOffset()); 485| | 486| | // Pointers to Thumb symbols need to have their low-bit set to allow 487| | // for interworking. 488| 1.11k| if (Asm->isThumbFunc(&SA)) ------------------ | Branch (488:9): [True: 0, False: 1.11k] ------------------ 489| 0| Addend |= 1; 490| | 491| | // Clear the symbol expr pointers to indicate we have folded these 492| | // operands. 493| 1.11k| A = B = nullptr; 494| 1.11k| return; 495| 1.11k| } 496| | 497| 667| if (!Layout) ------------------ | Branch (497:7): [True: 9, False: 658] ------------------ 498| 9| return; 499| | 500| 658| const MCSection &SecA = *SA.getFragment()->getParent(); 501| 658| const MCSection &SecB = *SB.getFragment()->getParent(); 502| | 503| 658| if ((&SecA != &SecB) && !Addrs) ------------------ | Branch (503:7): [True: 0, False: 658] | Branch (503:27): [True: 0, False: 0] ------------------ 504| 0| return; 505| | 506| | // Eagerly evaluate. 507| 658| bool valid1, valid2; 508| 658| Addend += Layout->getSymbolOffset(A->getSymbol(), valid1) - 509| 658| Layout->getSymbolOffset(B->getSymbol(), valid2); 510| 658| if (Addrs && (&SecA != &SecB)) ------------------ | Branch (510:7): [True: 0, False: 658] | Branch (510:16): [True: 0, False: 0] ------------------ 511| 0| Addend += (Addrs->lookup(&SecA) - Addrs->lookup(&SecB)); 512| | 513| | // Pointers to Thumb symbols need to have their low-bit set to allow 514| | // for interworking. 515| 658| if (Asm->isThumbFunc(&SA)) ------------------ | Branch (515:7): [True: 0, False: 658] ------------------ 516| 0| Addend |= 1; 517| | 518| | // Clear the symbol expr pointers to indicate we have folded these 519| | // operands. 520| 658| A = B = nullptr; 521| 658|} _ZN7llvm_ks11MCAsmLayoutC2ERNS_11MCAssemblerE: 32| 312| : Assembler(Asm), LastValidFragment() 33| 312| { 34| | // Compute the section layout order. Virtual sections must go last. 35| 312| for (MCSection &Sec : Asm) ------------------ | Branch (35:23): [True: 316, False: 312] ------------------ 36| 316| if (!Sec.isVirtualSection()) ------------------ | Branch (36:9): [True: 316, False: 0] ------------------ 37| 316| SectionOrder.push_back(&Sec); 38| 312| for (MCSection &Sec : Asm) ------------------ | Branch (38:23): [True: 316, False: 312] ------------------ 39| 316| if (Sec.isVirtualSection()) ------------------ | Branch (39:9): [True: 0, False: 316] ------------------ 40| 0| SectionOrder.push_back(&Sec); 41| 312|} _ZNK7llvm_ks11MCAsmLayout15isFragmentValidEPKNS_10MCFragmentE: 43| 10.6k|bool MCAsmLayout::isFragmentValid(const MCFragment *F) const { 44| 10.6k| const MCSection *Sec = F->getParent(); 45| 10.6k| const MCFragment *LastValid = LastValidFragment.lookup(Sec); 46| 10.6k| if (!LastValid) ------------------ | Branch (46:7): [True: 632, False: 9.97k] ------------------ 47| 632| return false; 48| 10.6k| assert(LastValid->getParent() == Sec); ------------------ | Branch (48:3): [True: 9.97k, False: 0] ------------------ 49| 9.97k| return F->getLayoutOrder() <= LastValid->getLayoutOrder(); 50| 9.97k|} _ZNK7llvm_ks11MCAsmLayout11ensureValidEPKNS_10MCFragmentE: 63| 6.01k|{ 64| 6.01k| MCSection *Sec = F->getParent(); 65| 6.01k| MCSection::iterator I; 66| 6.01k| if (MCFragment *Cur = LastValidFragment[Sec]) ------------------ | Branch (66:19): [True: 5.69k, False: 316] ------------------ 67| 5.69k| I = ++MCSection::iterator(Cur); 68| 316| else 69| 316| I = Sec->begin(); 70| | 71| | // Advance the layout position until the fragment is valid. 72| 7.63k| while (!isFragmentValid(F)) { ------------------ | Branch (72:10): [True: 1.64k, False: 5.98k] ------------------ 73| | //assert(I != Sec->end() && "Layout bookkeeping error"); 74| 1.64k| if (I == Sec->end()) ------------------ | Branch (74:9): [True: 2, False: 1.64k] ------------------ 75| 2| return false; 76| 1.64k| if (const_cast(this)->layoutFragment(&*I)) ------------------ | Branch (76:9): [True: 24, False: 1.62k] ------------------ 77| 24| return false; 78| 1.62k| ++I; 79| 1.62k| } 80| | 81| 5.98k| return true; 82| 6.01k|} _ZNK7llvm_ks11MCAsmLayout17getFragmentOffsetEPKNS_10MCFragmentERb: 85| 6.01k|{ 86| 6.01k| valid = true; 87| 6.01k| if (!ensureValid(F)) { ------------------ | Branch (87:7): [True: 26, False: 5.98k] ------------------ 88| 26| valid = false; 89| 26| return 0; 90| 26| } 91| | //assert(F->Offset != ~UINT64_C(0) && "Address not set!"); 92| 5.98k| if (F->Offset == ~UINT64_C(0)) { ------------------ | Branch (92:7): [True: 0, False: 5.98k] ------------------ 93| 0| valid = false; 94| 0| return 0; 95| 0| } 96| | 97| 5.98k| return F->Offset; 98| 5.98k|} _ZNK7llvm_ks11MCAsmLayout15getSymbolOffsetERKNS_8MCSymbolERmRb: 156| 218|{ 157| 218| return getSymbolOffsetImpl(*this, S, false, Val, valid); 158| 218|} _ZNK7llvm_ks11MCAsmLayout15getSymbolOffsetERKNS_8MCSymbolERb: 161| 2.80k|{ 162| 2.80k| uint64_t Val; 163| 2.80k| getSymbolOffsetImpl(*this, S, true, Val, valid); 164| 2.80k| return Val; 165| 2.80k|} _ZN7llvm_ks17ilist_node_traitsINS_10MCFragmentEE10deleteNodeEPS1_: 264| 3.05k|void ilist_node_traits::deleteNode(MCFragment *V) { 265| 3.05k| V->destroy(); 266| 3.05k|} _ZN7llvm_ks10MCFragmentC2Ev: 268| 879|MCFragment::MCFragment() : Kind(FragmentType(~0)), HasInstructions(false), 269| 879| AlignToBundleEnd(false), BundlePadding(0) { 270| 879|} _ZN7llvm_ks10MCFragmentD2Ev: 272| 36.5k|MCFragment::~MCFragment() { } _ZN7llvm_ks10MCFragmentC2ENS0_12FragmentTypeEbhPNS_9MCSectionE: 276| 35.6k| : Kind(Kind), HasInstructions(HasInstructions), AlignToBundleEnd(false), 277| 35.6k| BundlePadding(BundlePadding), Parent(Parent), Atom(nullptr), 278| 35.6k| Offset(~UINT64_C(0)) { 279| 35.6k| if (Parent && !isDummy()) ------------------ | Branch (279:7): [True: 32.6k, False: 3.05k] | Branch (279:17): [True: 0, False: 32.6k] ------------------ 280| 0| Parent->getFragmentList().push_back(this); 281| 35.6k|} _ZN7llvm_ks10MCFragment7destroyEv: 283| 3.05k|void MCFragment::destroy() { 284| | // First check if we are the sentinal. 285| 3.05k| if (Kind == FragmentType(~0)) { ------------------ | Branch (285:7): [True: 0, False: 3.05k] ------------------ 286| 0| delete this; 287| 0| return; 288| 0| } 289| | 290| 3.05k| switch (Kind) { ------------------ | Branch (290:11): [True: 3.05k, False: 0] ------------------ 291| 338| case FT_Align: ------------------ | Branch (291:5): [True: 338, False: 2.71k] ------------------ 292| 338| delete cast(this); 293| 338| return; 294| 888| case FT_Data: ------------------ | Branch (294:5): [True: 888, False: 2.16k] ------------------ 295| 888| delete cast(this); 296| 888| return; 297| 0| case FT_CompactEncodedInst: ------------------ | Branch (297:5): [True: 0, False: 3.05k] ------------------ 298| 0| delete cast(this); 299| 0| return; 300| 614| case FT_Fill: ------------------ | Branch (300:5): [True: 614, False: 2.43k] ------------------ 301| 614| delete cast(this); 302| 614| return; 303| 0| case FT_Relaxable: ------------------ | Branch (303:5): [True: 0, False: 3.05k] ------------------ 304| 0| delete cast(this); 305| 0| return; 306| 1.21k| case FT_Org: ------------------ | Branch (306:5): [True: 1.21k, False: 1.84k] ------------------ 307| 1.21k| delete cast(this); 308| 1.21k| return; 309| 0| case FT_Dwarf: ------------------ | Branch (309:5): [True: 0, False: 3.05k] ------------------ 310| 0| delete cast(this); 311| 0| return; 312| 0| case FT_DwarfFrame: ------------------ | Branch (312:5): [True: 0, False: 3.05k] ------------------ 313| 0| delete cast(this); 314| 0| return; 315| 0| case FT_LEB: ------------------ | Branch (315:5): [True: 0, False: 3.05k] ------------------ 316| 0| delete cast(this); 317| 0| return; 318| 0| case FT_SafeSEH: ------------------ | Branch (318:5): [True: 0, False: 3.05k] ------------------ 319| 0| delete cast(this); 320| 0| return; 321| 0| case FT_Dummy: ------------------ | Branch (321:5): [True: 0, False: 3.05k] ------------------ 322| 0| delete cast(this); 323| 0| return; 324| 3.05k| } 325| 3.05k|} MCFragment.cpp:_ZL19getSymbolOffsetImplRKN7llvm_ks11MCAsmLayoutERKNS_8MCSymbolEbRmRb: 119| 3.02k|{ 120| 3.02k| valid = true; 121| 3.02k| if (!S.isVariable()) ------------------ | Branch (121:7): [True: 2.76k, False: 258] ------------------ 122| 2.76k| return getLabelOffset(Layout, S, ReportError, Val); 123| | 124| | // If SD is a variable, evaluate it. 125| 258| MCValue Target; 126| 258| if (!S.getVariableValue()->evaluateAsValue(Target, Layout)) { ------------------ | Branch (126:7): [True: 69, False: 189] ------------------ 127| | //report_fatal_error("unable to evaluate offset for variable '" + 128| | // S.getName() + "'"); 129| 69| valid = false; 130| 69| return false; 131| 69| } 132| | 133| 189| uint64_t Offset = Target.getConstant(); 134| | 135| 189| const MCSymbolRefExpr *A = Target.getSymA(); 136| 189| if (A) { ------------------ | Branch (136:7): [True: 0, False: 189] ------------------ 137| 0| uint64_t ValA; 138| 0| if (!getLabelOffset(Layout, A->getSymbol(), ReportError, ValA)) ------------------ | Branch (138:9): [True: 0, False: 0] ------------------ 139| 0| return false; 140| 0| Offset += ValA; 141| 0| } 142| | 143| 189| const MCSymbolRefExpr *B = Target.getSymB(); 144| 189| if (B) { ------------------ | Branch (144:7): [True: 189, False: 0] ------------------ 145| 189| uint64_t ValB; 146| 189| if (!getLabelOffset(Layout, B->getSymbol(), ReportError, ValB)) ------------------ | Branch (146:9): [True: 0, False: 189] ------------------ 147| 0| return false; 148| 189| Offset -= ValB; 149| 189| } 150| | 151| 189| Val = Offset; 152| 189| return true; 153| 189|} MCFragment.cpp:_ZL14getLabelOffsetRKN7llvm_ks11MCAsmLayoutERKNS_8MCSymbolEbRm: 103| 2.95k|{ 104| 2.95k| if (!S.getFragment()) { ------------------ | Branch (104:7): [True: 2, False: 2.95k] ------------------ 105| 2| if (ReportError) ------------------ | Branch (105:9): [True: 0, False: 2] ------------------ 106| 0| report_fatal_error("unable to evaluate offset to undefined symbol '" + 107| 0| S.getName() + "'"); 108| 2| return false; 109| 2| } 110| | 111| 2.95k| bool valid; 112| 2.95k| Val = Layout.getFragmentOffset(S.getFragment(), valid) + S.getOffset(); 113| | 114| 2.95k| return valid; 115| 2.95k|} _ZN7llvm_ks16MCObjectFileInfo23initELFMCObjectFileInfoENS_6TripleE: 267| 749|void MCObjectFileInfo::initELFMCObjectFileInfo(Triple T) { 268| 749| switch (T.getArch()) { 269| 749| case Triple::mips: ------------------ | Branch (269:3): [True: 749, False: 0] ------------------ 270| 749| case Triple::mipsel: ------------------ | Branch (270:3): [True: 0, False: 749] ------------------ 271| 749| FDECFIEncoding = dwarf::DW_EH_PE_sdata4; 272| 749| break; 273| 0| case Triple::mips64: ------------------ | Branch (273:3): [True: 0, False: 749] ------------------ 274| 0| case Triple::mips64el: ------------------ | Branch (274:3): [True: 0, False: 749] ------------------ 275| 0| FDECFIEncoding = dwarf::DW_EH_PE_sdata8; 276| 0| break; 277| 0| case Triple::x86_64: ------------------ | Branch (277:3): [True: 0, False: 749] ------------------ 278| 0| break; 279| 0| default: ------------------ | Branch (279:3): [True: 0, False: 749] ------------------ 280| 0| FDECFIEncoding = dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_sdata4; 281| 0| break; 282| 749| } 283| | 284| 749| switch (T.getArch()) { 285| 0| case Triple::arm: ------------------ | Branch (285:3): [True: 0, False: 749] ------------------ 286| 0| case Triple::armeb: ------------------ | Branch (286:3): [True: 0, False: 749] ------------------ 287| 0| case Triple::thumb: ------------------ | Branch (287:3): [True: 0, False: 749] ------------------ 288| 0| case Triple::thumbeb: ------------------ | Branch (288:3): [True: 0, False: 749] ------------------ 289| 0| if (Ctx->getAsmInfo()->getExceptionHandlingType() == ExceptionHandling::ARM) ------------------ | Branch (289:9): [True: 0, False: 0] ------------------ 290| 0| break; 291| | // Fallthrough if not using EHABI 292| 0| case Triple::ppc: ------------------ | Branch (292:3): [True: 0, False: 749] ------------------ 293| 0| case Triple::x86: ------------------ | Branch (293:3): [True: 0, False: 749] ------------------ 294| 0| break; 295| 0| case Triple::x86_64: ------------------ | Branch (295:3): [True: 0, False: 749] ------------------ 296| 0| break; 297| 0| case Triple::aarch64: ------------------ | Branch (297:3): [True: 0, False: 749] ------------------ 298| 0| case Triple::aarch64_be: ------------------ | Branch (298:3): [True: 0, False: 749] ------------------ 299| | // The small model guarantees static code/data size < 4GB, but not where it 300| | // will be in memory. Most of these could end up >2GB away so even a signed 301| | // pc-relative 32-bit address is insufficient, theoretically. 302| 0| break; 303| 749| case Triple::mips: ------------------ | Branch (303:3): [True: 749, False: 0] ------------------ 304| 749| case Triple::mipsel: ------------------ | Branch (304:3): [True: 0, False: 749] ------------------ 305| 749| case Triple::mips64: ------------------ | Branch (305:3): [True: 0, False: 749] ------------------ 306| 749| case Triple::mips64el: ------------------ | Branch (306:3): [True: 0, False: 749] ------------------ 307| | // MIPS uses indirect pointer to refer personality functions and types, so 308| | // that the eh_frame section can be read-only. DW.ref.personality will be 309| | // generated for relocation. 310| 749| PersonalityEncoding = dwarf::DW_EH_PE_indirect; 311| | // FIXME: The N64 ABI probably ought to use DW_EH_PE_sdata8 but we can't 312| | // identify N64 from just a triple. 313| 749| TTypeEncoding = dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel | 314| 749| dwarf::DW_EH_PE_sdata4; 315| | // We don't support PC-relative LSDA references in GAS so we use the default 316| | // DW_EH_PE_absptr for those. 317| 749| break; 318| 0| case Triple::ppc64: ------------------ | Branch (318:3): [True: 0, False: 749] ------------------ 319| 0| case Triple::ppc64le: ------------------ | Branch (319:3): [True: 0, False: 749] ------------------ 320| 0| PersonalityEncoding = dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel | 321| 0| dwarf::DW_EH_PE_udata8; 322| 0| LSDAEncoding = dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_udata8; 323| 0| TTypeEncoding = dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel | 324| 0| dwarf::DW_EH_PE_udata8; 325| 0| break; 326| 0| case Triple::sparcel: ------------------ | Branch (326:3): [True: 0, False: 749] ------------------ 327| 0| case Triple::sparc: ------------------ | Branch (327:3): [True: 0, False: 749] ------------------ 328| 0| break; 329| 0| case Triple::sparcv9: ------------------ | Branch (329:3): [True: 0, False: 749] ------------------ 330| 0| LSDAEncoding = dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_sdata4; 331| 0| break; 332| 0| case Triple::systemz: ------------------ | Branch (332:3): [True: 0, False: 749] ------------------ 333| | // All currently-defined code models guarantee that 4-byte PC-relative 334| | // values will be in range. 335| 0| break; 336| 0| default: ------------------ | Branch (336:3): [True: 0, False: 749] ------------------ 337| 0| break; 338| 749| } 339| | 340| 749| unsigned EHSectionType = T.getArch() == Triple::x86_64 ------------------ | Branch (340:28): [True: 0, False: 749] ------------------ 341| 749| ? ELF::SHT_X86_64_UNWIND 342| 749| : ELF::SHT_PROGBITS; 343| | 344| | // Solaris requires different flags for .eh_frame to seemingly every other 345| | // platform. 346| 749| unsigned EHSectionFlags = ELF::SHF_ALLOC; 347| 749| if (T.isOSSolaris() && T.getArch() != Triple::x86_64) ------------------ | Branch (347:7): [True: 0, False: 749] | Branch (347:26): [True: 0, False: 0] ------------------ 348| 0| EHSectionFlags |= ELF::SHF_WRITE; 349| | 350| | // ELF 351| 749| BSSSection = Ctx->getELFSection(".bss", ELF::SHT_NOBITS, 352| 749| ELF::SHF_WRITE | ELF::SHF_ALLOC); 353| | 354| 749| TextSection = Ctx->getELFSection(".text", ELF::SHT_PROGBITS, 355| 749| ELF::SHF_EXECINSTR | ELF::SHF_ALLOC); 356| | 357| 749| DataSection = Ctx->getELFSection(".data", ELF::SHT_PROGBITS, 358| 749| ELF::SHF_WRITE | ELF::SHF_ALLOC); 359| | 360| 749| ReadOnlySection = 361| 749| Ctx->getELFSection(".rodata", ELF::SHT_PROGBITS, ELF::SHF_ALLOC); 362| | 363| 749| TLSDataSection = 364| 749| Ctx->getELFSection(".tdata", ELF::SHT_PROGBITS, 365| 749| ELF::SHF_ALLOC | ELF::SHF_TLS | ELF::SHF_WRITE); 366| | 367| 749| TLSBSSSection = Ctx->getELFSection( 368| 749| ".tbss", ELF::SHT_NOBITS, ELF::SHF_ALLOC | ELF::SHF_TLS | ELF::SHF_WRITE); 369| | 370| 749| DataRelROSection = Ctx->getELFSection(".data.rel.ro", ELF::SHT_PROGBITS, 371| 749| ELF::SHF_ALLOC | ELF::SHF_WRITE); 372| | 373| 749| MergeableConst4Section = 374| 749| Ctx->getELFSection(".rodata.cst4", ELF::SHT_PROGBITS, 375| 749| ELF::SHF_ALLOC | ELF::SHF_MERGE, 4, ""); 376| | 377| 749| MergeableConst8Section = 378| 749| Ctx->getELFSection(".rodata.cst8", ELF::SHT_PROGBITS, 379| 749| ELF::SHF_ALLOC | ELF::SHF_MERGE, 8, ""); 380| | 381| 749| MergeableConst16Section = 382| 749| Ctx->getELFSection(".rodata.cst16", ELF::SHT_PROGBITS, 383| 749| ELF::SHF_ALLOC | ELF::SHF_MERGE, 16, ""); 384| | 385| 749| StaticCtorSection = Ctx->getELFSection(".ctors", ELF::SHT_PROGBITS, 386| 749| ELF::SHF_ALLOC | ELF::SHF_WRITE); 387| | 388| 749| StaticDtorSection = Ctx->getELFSection(".dtors", ELF::SHT_PROGBITS, 389| 749| ELF::SHF_ALLOC | ELF::SHF_WRITE); 390| | 391| | // Exception Handling Sections. 392| | 393| | // FIXME: We're emitting LSDA info into a readonly section on ELF, even though 394| | // it contains relocatable pointers. In PIC mode, this is probably a big 395| | // runtime hit for C++ apps. Either the contents of the LSDA need to be 396| | // adjusted or this should be a data section. 397| 749| LSDASection = Ctx->getELFSection(".gcc_except_table", ELF::SHT_PROGBITS, 398| 749| ELF::SHF_ALLOC); 399| | 400| 749| COFFDebugSymbolsSection = nullptr; 401| 749| COFFDebugTypesSection = nullptr; 402| | 403| | // Debug Info Sections. 404| 749| DwarfAbbrevSection = Ctx->getELFSection(".debug_abbrev", ELF::SHT_PROGBITS, 0, 405| 749| "section_abbrev"); 406| 749| DwarfInfoSection = 407| 749| Ctx->getELFSection(".debug_info", ELF::SHT_PROGBITS, 0, "section_info"); 408| 749| DwarfLineSection = Ctx->getELFSection(".debug_line", ELF::SHT_PROGBITS, 0); 409| 749| DwarfFrameSection = Ctx->getELFSection(".debug_frame", ELF::SHT_PROGBITS, 0); 410| 749| DwarfPubNamesSection = 411| 749| Ctx->getELFSection(".debug_pubnames", ELF::SHT_PROGBITS, 0); 412| 749| DwarfPubTypesSection = 413| 749| Ctx->getELFSection(".debug_pubtypes", ELF::SHT_PROGBITS, 0); 414| 749| DwarfGnuPubNamesSection = 415| 749| Ctx->getELFSection(".debug_gnu_pubnames", ELF::SHT_PROGBITS, 0); 416| 749| DwarfGnuPubTypesSection = 417| 749| Ctx->getELFSection(".debug_gnu_pubtypes", ELF::SHT_PROGBITS, 0); 418| 749| DwarfStrSection = 419| 749| Ctx->getELFSection(".debug_str", ELF::SHT_PROGBITS, 420| 749| ELF::SHF_MERGE | ELF::SHF_STRINGS, 1, ""); 421| 749| DwarfLocSection = Ctx->getELFSection(".debug_loc", ELF::SHT_PROGBITS, 0); 422| 749| DwarfARangesSection = 423| 749| Ctx->getELFSection(".debug_aranges", ELF::SHT_PROGBITS, 0); 424| 749| DwarfRangesSection = 425| 749| Ctx->getELFSection(".debug_ranges", ELF::SHT_PROGBITS, 0, "debug_range"); 426| 749| DwarfMacinfoSection = Ctx->getELFSection(".debug_macinfo", ELF::SHT_PROGBITS, 427| 749| 0, "debug_macinfo"); 428| | 429| | // DWARF5 Experimental Debug Info 430| | 431| | // Accelerator Tables 432| 749| DwarfAccelNamesSection = 433| 749| Ctx->getELFSection(".apple_names", ELF::SHT_PROGBITS, 0, "names_begin"); 434| 749| DwarfAccelObjCSection = 435| 749| Ctx->getELFSection(".apple_objc", ELF::SHT_PROGBITS, 0, "objc_begin"); 436| 749| DwarfAccelNamespaceSection = Ctx->getELFSection( 437| 749| ".apple_namespaces", ELF::SHT_PROGBITS, 0, "namespac_begin"); 438| 749| DwarfAccelTypesSection = 439| 749| Ctx->getELFSection(".apple_types", ELF::SHT_PROGBITS, 0, "types_begin"); 440| | 441| | // Fission Sections 442| 749| DwarfInfoDWOSection = 443| 749| Ctx->getELFSection(".debug_info.dwo", ELF::SHT_PROGBITS, 0); 444| 749| DwarfTypesDWOSection = 445| 749| Ctx->getELFSection(".debug_types.dwo", ELF::SHT_PROGBITS, 0); 446| 749| DwarfAbbrevDWOSection = 447| 749| Ctx->getELFSection(".debug_abbrev.dwo", ELF::SHT_PROGBITS, 0); 448| 749| DwarfStrDWOSection = 449| 749| Ctx->getELFSection(".debug_str.dwo", ELF::SHT_PROGBITS, 450| 749| ELF::SHF_MERGE | ELF::SHF_STRINGS, 1, ""); 451| 749| DwarfLineDWOSection = 452| 749| Ctx->getELFSection(".debug_line.dwo", ELF::SHT_PROGBITS, 0); 453| 749| DwarfLocDWOSection = 454| 749| Ctx->getELFSection(".debug_loc.dwo", ELF::SHT_PROGBITS, 0, "skel_loc"); 455| 749| DwarfStrOffDWOSection = 456| 749| Ctx->getELFSection(".debug_str_offsets.dwo", ELF::SHT_PROGBITS, 0); 457| 749| DwarfAddrSection = 458| 749| Ctx->getELFSection(".debug_addr", ELF::SHT_PROGBITS, 0, "addr_sec"); 459| | 460| | // DWP Sections 461| 749| DwarfCUIndexSection = 462| 749| Ctx->getELFSection(".debug_cu_index", ELF::SHT_PROGBITS, 0); 463| 749| DwarfTUIndexSection = 464| 749| Ctx->getELFSection(".debug_tu_index", ELF::SHT_PROGBITS, 0); 465| | 466| 749| StackMapSection = 467| 749| Ctx->getELFSection(".llvm_stackmaps", ELF::SHT_PROGBITS, ELF::SHF_ALLOC); 468| | 469| 749| FaultMapSection = 470| 749| Ctx->getELFSection(".llvm_faultmaps", ELF::SHT_PROGBITS, ELF::SHF_ALLOC); 471| | 472| 749| EHFrameSection = 473| 749| Ctx->getELFSection(".eh_frame", EHSectionType, EHSectionFlags); 474| 749|} _ZN7llvm_ks16MCObjectFileInfo20InitMCObjectFileInfoERKNS_6TripleERNS_9MCContextE: 715| 749| MCContext &ctx) { 716| 749| Ctx = &ctx; 717| | 718| | // Common. 719| 749| CommDirectiveSupportsAlignment = true; 720| 749| SupportsWeakOmittedEHFrame = true; 721| 749| SupportsCompactUnwindWithoutEHFrame = false; 722| 749| OmitDwarfIfHaveCompactUnwind = false; 723| | 724| 749| PersonalityEncoding = LSDAEncoding = FDECFIEncoding = TTypeEncoding = 725| 749| dwarf::DW_EH_PE_absptr; 726| | 727| 749| CompactUnwindDwarfEHFrameOnly = 0; 728| | 729| 749| EHFrameSection = nullptr; // Created on demand. 730| 749| CompactUnwindSection = nullptr; // Used only by selected targets. 731| 749| DwarfAccelNamesSection = nullptr; // Used only by selected targets. 732| 749| DwarfAccelObjCSection = nullptr; // Used only by selected targets. 733| 749| DwarfAccelNamespaceSection = nullptr; // Used only by selected targets. 734| 749| DwarfAccelTypesSection = nullptr; // Used only by selected targets. 735| | 736| 749| TT = TheTriple; 737| | 738| 749| switch (TT.getObjectFormat()) { ------------------ | Branch (738:11): [True: 749, False: 0] ------------------ 739| 0| case Triple::MachO: ------------------ | Branch (739:3): [True: 0, False: 749] ------------------ 740| 0| Env = IsMachO; 741| 0| initMachOMCObjectFileInfo(TT); 742| 0| break; 743| 0| case Triple::COFF: ------------------ | Branch (743:3): [True: 0, False: 749] ------------------ 744| 0| if (!TT.isOSWindows()) ------------------ | Branch (744:9): [True: 0, False: 0] ------------------ 745| 0| report_fatal_error( 746| 0| "Cannot initialize MC for non-Windows COFF object files."); 747| | 748| 0| Env = IsCOFF; 749| 0| initCOFFMCObjectFileInfo(TT); 750| 0| break; 751| 749| case Triple::ELF: ------------------ | Branch (751:3): [True: 749, False: 0] ------------------ 752| 749| Env = IsELF; 753| 749| initELFMCObjectFileInfo(TT); 754| 749| break; 755| 0| case Triple::UnknownObjectFormat: ------------------ | Branch (755:3): [True: 0, False: 749] ------------------ 756| 0| report_fatal_error("Cannot initialize MC for unknown object file format."); 757| 0| break; 758| 749| } 759| 749|} _ZN7llvm_ks16MCObjectStreamerC2ERNS_9MCContextERNS_12MCAsmBackendERNS_17raw_pwrite_streamEPNS_13MCCodeEmitterE: 32| 749| : MCStreamer(Context), 33| 749| Assembler(new MCAssembler(Context, TAB, *Emitter_, 34| 749| *TAB.createObjectWriter(OS))), 35| 749| EmitEHFrame(true), EmitDebugFrame(false) {} _ZN7llvm_ks16MCObjectStreamerD2Ev: 37| 749|MCObjectStreamer::~MCObjectStreamer() { 38| 749| delete &Assembler->getWriter(); 39| 749| delete Assembler; 40| 749|} _ZN7llvm_ks16MCObjectStreamer18flushPendingLabelsEPNS_10MCFragmentEm: 42| 151k|void MCObjectStreamer::flushPendingLabels(MCFragment *F, uint64_t FOffset) { 43| 151k| if (PendingLabels.empty()) ------------------ | Branch (43:7): [True: 150k, False: 1.20k] ------------------ 44| 150k| return; 45| 1.20k| if (!F) { ------------------ | Branch (45:7): [True: 337, False: 872] ------------------ 46| 337| F = new MCDataFragment(); 47| 337| MCSection *CurSection = getCurrentSectionOnly(); 48| 337| CurSection->getFragmentList().insert(CurInsertionPoint, F); 49| 337| F->setParent(CurSection); 50| 337| } 51| 5.28k| for (MCSymbol *Sym : PendingLabels) { ------------------ | Branch (51:22): [True: 5.28k, False: 1.20k] ------------------ 52| 5.28k| Sym->setFragment(F); 53| 5.28k| Sym->setOffset(FOffset); 54| 5.28k| } 55| 1.20k| PendingLabels.clear(); 56| 1.20k|} _ZN7llvm_ks16MCObjectStreamer10EmitFramesEPNS_12MCAsmBackendE: 83| 312|void MCObjectStreamer::EmitFrames(MCAsmBackend *MAB) { 84| |#if 0 85| | if (!getNumFrameInfos()) 86| | return; 87| | 88| | if (EmitEHFrame) 89| | MCDwarfFrameEmitter::Emit(*this, MAB, true); 90| | 91| | if (EmitDebugFrame) 92| | MCDwarfFrameEmitter::Emit(*this, MAB, false); 93| |#endif 94| 312|} _ZNK7llvm_ks16MCObjectStreamer18getCurrentFragmentEv: 96| 257k|MCFragment *MCObjectStreamer::getCurrentFragment() const { 97| 257k| assert(getCurrentSectionOnly() && "No current section!"); ------------------ | Branch (97:3): [True: 257k, False: 0] | Branch (97:3): [True: 257k, Folded] | Branch (97:3): [True: 257k, False: 0] ------------------ 98| | 99| 257k| if (CurInsertionPoint != getCurrentSectionOnly()->getFragmentList().begin()) ------------------ | Branch (99:7): [True: 232k, False: 25.1k] ------------------ 100| 232k| return &*std::prev(CurInsertionPoint); 101| | 102| 25.1k| return nullptr; 103| 257k|} _ZN7llvm_ks16MCObjectStreamer23getOrCreateDataFragmentEv: 105| 152k|MCDataFragment *MCObjectStreamer::getOrCreateDataFragment() { 106| 152k| MCDataFragment *F = dyn_cast_or_null(getCurrentFragment()); 107| | // When bundling is enabled, we don't want to add data to a fragment that 108| | // already has instructions (see MCELFStreamer::EmitInstToData for details) 109| 152k| if (!F || (Assembler->isBundlingEnabled() && !Assembler->getRelaxAll() && ------------------ | Branch (109:7): [True: 551, False: 151k] | Branch (109:14): [True: 0, False: 151k] | Branch (109:48): [True: 0, False: 0] ------------------ 110| 551| F->hasInstructions())) { ------------------ | Branch (110:14): [True: 0, False: 0] ------------------ 111| 551| F = new MCDataFragment(); 112| 551| insert(F); 113| 551| } 114| 152k| return F; 115| 152k|} _ZN7llvm_ks16MCObjectStreamer15visitUsedSymbolERKNS_8MCSymbolE: 117| 14.9k|void MCObjectStreamer::visitUsedSymbol(const MCSymbol &Sym) { 118| 14.9k| Assembler->registerSymbol(Sym); 119| 14.9k|} _ZN7llvm_ks16MCObjectStreamer13EmitValueImplEPKNS_6MCExprEjNS_5SMLocE: 129| 3.12k|{ 130| 3.12k| MCStreamer::EmitValueImpl(Value, Size, Loc); 131| 3.12k| MCDataFragment *DF = getOrCreateDataFragment(); 132| 3.12k| flushPendingLabels(DF, DF->getContents().size()); 133| | 134| | // This makes the symbol's name (label) end up literally in the output stream 135| | //if (Value->getKind() == MCExpr::SymbolRef) { 136| | // // Keystone: record data in the same section 137| | // const MCSymbolRefExpr &SRE = cast(*Value); 138| | // const StringRef Sym = SRE.getSymbol().getName(); 139| | // DF->getContents().append(Sym.begin(), Sym.end()); 140| | // 141| | // return; 142| | //} 143| | 144| | //MCCVLineEntry::Make(this); 145| | //MCDwarfLineEntry::Make(this, getCurrentSection().first); 146| | 147| | // Avoid fixups when possible. 148| 3.12k| int64_t AbsValue; 149| 3.12k| bool Error; 150| 3.12k| if (Value->evaluateAsAbsolute(AbsValue, getAssembler())) { ------------------ | Branch (150:7): [True: 269, False: 2.86k] ------------------ 151| | // TODO: hande Error? 152| 269| EmitIntValue(AbsValue, Size, Error); 153| 269| return; 154| 269| } 155| 2.86k| DF->getFixups().push_back( 156| 2.86k| MCFixup::create(DF->getContents().size(), Value, 157| 2.86k| MCFixup::getKindForSize(Size, false), Loc)); 158| 2.86k| DF->getContents().resize(DF->getContents().size() + Size, 0); 159| 2.86k|} _ZN7llvm_ks16MCObjectStreamer9EmitLabelEPNS_8MCSymbolE: 172| 8.48k|void MCObjectStreamer::EmitLabel(MCSymbol *Symbol) { 173| 8.48k| MCStreamer::EmitLabel(Symbol); 174| | 175| 8.48k| getAssembler().registerSymbol(*Symbol); 176| | 177| | // If there is a current fragment, mark the symbol as pointing into it. 178| | // Otherwise queue the label and set its fragment pointer when we emit the 179| | // next fragment. 180| 8.48k| auto *F = dyn_cast_or_null(getCurrentFragment()); 181| 8.48k| if (F && !(getAssembler().isBundlingEnabled() && ------------------ | Branch (181:7): [True: 2.75k, False: 5.72k] | Branch (181:14): [True: 0, False: 2.75k] ------------------ 182| 2.75k| getAssembler().getRelaxAll())) { ------------------ | Branch (182:14): [True: 0, False: 0] ------------------ 183| 2.75k| Symbol->setFragment(F); 184| 2.75k| Symbol->setOffset(F->getContents().size()); 185| 5.72k| } else { 186| 5.72k| PendingLabels.push_back(Symbol); 187| 5.72k| } 188| 8.48k|} _ZN7llvm_ks16MCObjectStreamer13ChangeSectionEPNS_9MCSectionEPKNS_6MCExprE: 214| 4.66k| const MCExpr *Subsection) { 215| 4.66k| changeSectionImpl(Section, Subsection); 216| 4.66k|} _ZN7llvm_ks16MCObjectStreamer17changeSectionImplEPNS_9MCSectionEPKNS_6MCExprE: 219| 4.66k| const MCExpr *Subsection) { 220| 4.66k| assert(Section && "Cannot switch to a null section!"); ------------------ | Branch (220:3): [True: 4.66k, False: 0] | Branch (220:3): [True: 4.66k, Folded] | Branch (220:3): [True: 4.66k, False: 0] ------------------ 221| 4.66k| flushPendingLabels(nullptr); 222| | 223| 4.66k| bool Created = getAssembler().registerSection(*Section); 224| | 225| 4.66k| int64_t IntSubsection = 0; 226| 4.66k| if (Subsection && ------------------ | Branch (226:7): [True: 0, False: 4.66k] ------------------ 227| 0| !Subsection->evaluateAsAbsolute(IntSubsection, getAssembler())) ------------------ | Branch (227:7): [True: 0, False: 0] ------------------ 228| 0| report_fatal_error("Cannot evaluate subsection number"); 229| 4.66k| if (IntSubsection < 0 || IntSubsection > 8192) ------------------ | Branch (229:7): [True: 0, False: 4.66k] | Branch (229:28): [True: 0, False: 4.66k] ------------------ 230| 0| report_fatal_error("Subsection number out of range"); 231| 4.66k| CurInsertionPoint = 232| 4.66k| Section->getSubsectionInsertionPoint(unsigned(IntSubsection)); 233| 4.66k| return Created; 234| 4.66k|} _ZN7llvm_ks16MCObjectStreamer14EmitAssignmentEPNS_8MCSymbolEPKNS_6MCExprE: 236| 793|bool MCObjectStreamer::EmitAssignment(MCSymbol *Symbol, const MCExpr *Value) { 237| 793| getAssembler().registerSymbol(*Symbol); 238| 793| return MCStreamer::EmitAssignment(Symbol, Value); 239| 793|} _ZN7llvm_ks16MCObjectStreamer15EmitInstructionERNS_6MCInstERKNS_15MCSubtargetInfoERj: 248| 8.24k|{ 249| 8.24k| MCStreamer::EmitInstruction(Inst, STI, KsError); 250| | 251| 8.24k| MCSection *Sec = getCurrentSectionOnly(); 252| 8.24k| Sec->setHasInstructions(true); 253| | 254| | // Now that a machine instruction has been assembled into this section, make 255| | // a line entry for any .loc directive that has been seen. 256| | //MCCVLineEntry::Make(this); 257| | //MCDwarfLineEntry::Make(this, getCurrentSection().first); 258| | 259| | // If this instruction doesn't need relaxation, just emit it as data. 260| 8.24k| MCAssembler &Assembler = getAssembler(); 261| 8.24k| if (!Assembler.getBackend().mayNeedRelaxation(Inst)) { ------------------ | Branch (261:7): [True: 8.24k, False: 0] ------------------ 262| 8.24k| EmitInstToData(Inst, STI, KsError); 263| 8.24k| return; 264| 8.24k| } 265| | 266| | // Otherwise, relax and emit it as data if either: 267| | // - The RelaxAll flag was passed 268| | // - Bundling is enabled and this instruction is inside a bundle-locked 269| | // group. We want to emit all such instructions into the same data 270| | // fragment. 271| 0| if (Assembler.getRelaxAll() || ------------------ | Branch (271:7): [True: 0, False: 0] ------------------ 272| 0| (Assembler.isBundlingEnabled() && Sec->isBundleLocked())) { ------------------ | Branch (272:8): [True: 0, False: 0] | Branch (272:41): [True: 0, False: 0] ------------------ 273| 0| MCInst Relaxed(Inst.getAddress()); 274| 0| getAssembler().getBackend().relaxInstruction(Inst, Relaxed); 275| 0| while (getAssembler().getBackend().mayNeedRelaxation(Relaxed)) ------------------ | Branch (275:12): [True: 0, False: 0] ------------------ 276| 0| getAssembler().getBackend().relaxInstruction(Relaxed, Relaxed); 277| 0| EmitInstToData(Relaxed, STI, KsError); 278| 0| return; 279| 0| } 280| | 281| | // Otherwise emit to a separate fragment. 282| 0| EmitInstToFragment(Inst, STI); 283| 0|} _ZN7llvm_ks16MCObjectStreamer9EmitBytesENS_9StringRefE: 428| 140k|void MCObjectStreamer::EmitBytes(StringRef Data) { 429| | //MCCVLineEntry::Make(this); 430| | //MCDwarfLineEntry::Make(this, getCurrentSection().first); 431| 140k| MCDataFragment *DF = getOrCreateDataFragment(); 432| 140k| flushPendingLabels(DF, DF->getContents().size()); 433| 140k| DF->getContents().append(Data.begin(), Data.end()); 434| 140k|} _ZN7llvm_ks16MCObjectStreamer20EmitValueToAlignmentEjljj: 439| 338| unsigned MaxBytesToEmit) { 440| 338| if (MaxBytesToEmit == 0) ------------------ | Branch (440:7): [True: 338, False: 0] ------------------ 441| 338| MaxBytesToEmit = ByteAlignment; 442| 338| insert(new MCAlignFragment(ByteAlignment, Value, ValueSize, MaxBytesToEmit)); 443| | 444| | // Update the maximum alignment on the current section if necessary. 445| 338| MCSection *CurSec = getCurrentSection().first; 446| 338| if (ByteAlignment > CurSec->getAlignment()) ------------------ | Branch (446:7): [True: 2, False: 336] ------------------ 447| 2| CurSec->setAlignment(ByteAlignment); 448| 338|} _ZN7llvm_ks16MCObjectStreamer17EmitCodeAlignmentEjj: 451| 251| unsigned MaxBytesToEmit) { 452| 251| EmitValueToAlignment(ByteAlignment, 0, 1, MaxBytesToEmit); 453| 251| cast(getCurrentFragment())->setEmitNops(true); 454| 251|} _ZN7llvm_ks16MCObjectStreamer17emitValueToOffsetEPKNS_6MCExprEh: 457| 1.21k| unsigned char Value) { 458| 1.21k| insert(new MCOrgFragment(*Offset, Value)); 459| 1.21k|} _ZN7llvm_ks16MCObjectStreamer16EmitGPRel32ValueEPKNS_6MCExprE: 462| 50|void MCObjectStreamer::EmitGPRel32Value(const MCExpr *Value) { 463| 50| MCDataFragment *DF = getOrCreateDataFragment(); 464| 50| flushPendingLabels(DF, DF->getContents().size()); 465| | 466| 50| DF->getFixups().push_back(MCFixup::create(DF->getContents().size(), 467| 50| Value, FK_GPRel_4)); 468| 50| DF->getContents().resize(DF->getContents().size() + 4, 0); 469| 50|} _ZN7llvm_ks16MCObjectStreamer16EmitGPRel64ValueEPKNS_6MCExprE: 472| 30|void MCObjectStreamer::EmitGPRel64Value(const MCExpr *Value) { 473| 30| MCDataFragment *DF = getOrCreateDataFragment(); 474| 30| flushPendingLabels(DF, DF->getContents().size()); 475| | 476| 30| DF->getFixups().push_back(MCFixup::create(DF->getContents().size(), 477| 30| Value, FK_GPRel_4)); 478| 30| DF->getContents().resize(DF->getContents().size() + 8, 0); 479| 30|} _ZN7llvm_ks16MCObjectStreamer18EmitRelocDirectiveERKNS_6MCExprENS_9StringRefEPS2_NS_5SMLocE: 482| 37| const MCExpr *Expr, SMLoc Loc) { 483| 37| int64_t OffsetValue; 484| 37| if (!Offset.evaluateAsAbsolute(OffsetValue)) ------------------ | Branch (484:7): [True: 0, False: 37] ------------------ 485| 0| llvm_unreachable("Offset is not absolute"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ 486| | 487| 37| if (OffsetValue < 0) ------------------ | Branch (487:7): [True: 0, False: 37] ------------------ 488| 0| llvm_unreachable("Offset is negative"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ 489| | 490| 37| MCDataFragment *DF = getOrCreateDataFragment(); 491| 37| flushPendingLabels(DF, DF->getContents().size()); 492| | 493| 37| Optional MaybeKind = Assembler->getBackend().getFixupKind(Name); 494| 37| if (!MaybeKind.hasValue()) ------------------ | Branch (494:7): [True: 37, False: 0] ------------------ 495| 37| return true; 496| | 497| 0| MCFixupKind Kind = *MaybeKind; 498| | 499| 0| if (Expr == nullptr) ------------------ | Branch (499:7): [True: 0, False: 0] ------------------ 500| 0| Expr = 501| 0| MCSymbolRefExpr::create(getContext().createTempSymbol(), getContext()); 502| 0| DF->getFixups().push_back(MCFixup::create(OffsetValue, Expr, Kind, Loc)); 503| 0| return false; 504| 37|} _ZN7llvm_ks16MCObjectStreamer8EmitFillEmh: 506| 614|void MCObjectStreamer::EmitFill(uint64_t NumBytes, uint8_t FillValue) { 507| 614| const MCSection *Sec = getCurrentSection().first; 508| 614| (void)Sec; 509| 614| assert(Sec && "need a section"); ------------------ | Branch (509:3): [True: 614, False: 0] | Branch (509:3): [True: 614, Folded] | Branch (509:3): [True: 614, False: 0] ------------------ 510| 614| insert(new MCFillFragment(FillValue, NumBytes)); 511| 614|} _ZN7llvm_ks16MCObjectStreamer10FinishImplEv: 514| 312|{ 515| 312| unsigned int KsError = 0; 516| | // If we are generating dwarf for assembly source files dump out the sections. 517| | //if (getContext().getGenDwarfForAssembly()) 518| | // MCGenDwarfInfo::Emit(this); 519| | 520| | // Dump out the dwarf file & directory tables and line tables. 521| | //MCDwarfLineTable::Emit(this, getAssembler().getDWARFLinetableParams()); 522| | 523| 312| flushPendingLabels(nullptr); 524| 312| getAssembler().setSymResolver(getSymResolver()); 525| 312| getAssembler().Finish(KsError); 526| | 527| 312| return KsError; 528| 312|} _ZN7llvm_ks16MCObjectStreamer22getCurrentFragmentSizeEv: 530| 96.9k|uint64_t MCObjectStreamer::getCurrentFragmentSize() { 531| 96.9k| auto *F = dyn_cast_or_null(getCurrentFragment()); 532| 96.9k| if (nullptr != F) ------------------ | Branch (532:7): [True: 74.7k, False: 22.2k] ------------------ 533| 74.7k| return F->getContents().size(); 534| 22.2k| return 0; 535| 96.9k|} _ZN7llvm_ks14MCObjectWriterD2Ev: 17| 749|MCObjectWriter::~MCObjectWriter() { 18| 749|} _ZNK7llvm_ks14MCObjectWriter34isSymbolRefDifferenceFullyResolvedERKNS_11MCAssemblerEPKNS_15MCSymbolRefExprES6_bRb: 23| 1.80k|{ 24| 1.80k| valid = true; 25| | // Modified symbol references cannot be resolved. 26| 1.80k| if (A->getKind() != MCSymbolRefExpr::VK_None || ------------------ | Branch (26:7): [True: 24, False: 1.78k] ------------------ 27| 1.78k| B->getKind() != MCSymbolRefExpr::VK_None) ------------------ | Branch (27:7): [True: 0, False: 1.78k] ------------------ 28| 24| return false; 29| | 30| 1.78k| const MCSymbol &SA = A->getSymbol(); 31| 1.78k| const MCSymbol &SB = B->getSymbol(); 32| 1.78k| if (SA.isUndefined() || SB.isUndefined()) ------------------ | Branch (32:7): [True: 0, False: 1.78k] | Branch (32:27): [True: 0, False: 1.78k] ------------------ 33| 0| return false; 34| | 35| 1.78k| if (!SA.getFragment() || !SB.getFragment()) ------------------ | Branch (35:7): [True: 0, False: 1.78k] | Branch (35:28): [True: 0, False: 1.78k] ------------------ 36| 0| return false; 37| | 38| 1.78k| if (!SA.isInSection()) { ------------------ | Branch (38:7): [True: 0, False: 1.78k] ------------------ 39| 0| valid = false; 40| 0| return false; 41| 0| } 42| 1.78k| return isSymbolRefDifferenceFullyResolvedImpl(Asm, SA, SB, InSet); 43| 1.78k|} _ZNK7llvm_ks14MCObjectWriter38isSymbolRefDifferenceFullyResolvedImplERKNS_11MCAssemblerERKNS_8MCSymbolES6_b: 47| 1.78k| bool InSet) const { 48| 1.78k| return isSymbolRefDifferenceFullyResolvedImpl(Asm, A, *B.getFragment(), InSet, 49| 1.78k| false); 50| 1.78k|} _ZNK7llvm_ks14MCObjectWriter38isSymbolRefDifferenceFullyResolvedImplERKNS_11MCAssemblerERKNS_8MCSymbolERKNS_10MCFragmentEbb: 54| 1.78k| bool InSet, bool IsPCRel) const { 55| 1.78k| const MCSection &SecA = SymA.getSection(); 56| 1.78k| const MCSection &SecB = *FB.getParent(); 57| | // On ELF and COFF A - B is absolute if A and B are in the same section. 58| 1.78k| return &SecA == &SecB; 59| 1.78k|} _ZN7llvm_ks8AsmLexerC2ERKNS_9MCAsmInfoE: 24| 749|AsmLexer::AsmLexer(const MCAsmInfo &MAI) : MAI(MAI) { 25| 749| CurPtr = nullptr; 26| 749| isAtStartOfLine = true; 27| 749| AllowAtInIdentifier = !StringRef(MAI.getCommentString()).startswith("@"); 28| 749| defaultRadix = MAI.getRadix(); 29| 749|} _ZN7llvm_ks8AsmLexerD2Ev: 31| 749|AsmLexer::~AsmLexer() { 32| 749|} _ZN7llvm_ks8AsmLexer9setBufferENS_9StringRefEPKc: 34| 8.10k|void AsmLexer::setBuffer(StringRef Buf, const char *ptr) { 35| 8.10k| CurBuf = Buf; 36| | 37| 8.10k| if (ptr) ------------------ | Branch (37:7): [True: 368, False: 7.74k] ------------------ 38| 368| CurPtr = ptr; 39| 7.74k| else 40| 7.74k| CurPtr = CurBuf.begin(); 41| | 42| 8.10k| TokStart = nullptr; 43| 8.10k|} _ZN7llvm_ks8AsmLexer11ReturnErrorEPKcRKNSt3__112basic_stringIcNS3_11char_traitsIcEENS3_9allocatorIcEEEE: 48| 332k|{ 49| | //SetError(SMLoc::getFromPointer(Loc), Msg); 50| | 51| 332k| return AsmToken(AsmToken::Error, StringRef(Loc, 0)); 52| 332k|} _ZN7llvm_ks8AsmLexer11getNextCharEv: 54| 29.1M|int AsmLexer::getNextChar() { 55| 29.1M| char CurChar = *CurPtr++; 56| 29.1M| switch (CurChar) { 57| 29.1M| default: ------------------ | Branch (57:3): [True: 29.1M, False: 1.21k] ------------------ 58| 29.1M| return (unsigned char)CurChar; 59| 1.21k| case 0: ------------------ | Branch (59:3): [True: 1.21k, False: 29.1M] ------------------ 60| | // A nul character in the stream is either the end of the current buffer or 61| | // a random nul in the file. Disambiguate that here. 62| 1.21k| if (CurPtr - 1 != CurBuf.end()) ------------------ | Branch (62:9): [True: 0, False: 1.21k] ------------------ 63| 0| return 0; // Just whitespace. 64| | 65| | // Otherwise, return end of file. 66| 1.21k| --CurPtr; // Another call to lex will return EOF again. 67| | return EOF; 68| 29.1M| } 69| 29.1M|} _ZN7llvm_ks8AsmLexer15LexFloatLiteralEv: 76| 6.84k|AsmToken AsmLexer::LexFloatLiteral() { 77| | // Skip the fractional digit sequence. 78| 6.84k| while (isdigit(*CurPtr)) ------------------ | Branch (78:10): [True: 0, False: 6.84k] ------------------ 79| 0| ++CurPtr; 80| | 81| | // Check for exponent; we intentionally accept a slighlty wider set of 82| | // literals here and rely on the upstream client to reject invalid ones (e.g., 83| | // "1e+"). 84| 6.84k| if (*CurPtr == 'e' || *CurPtr == 'E') { ------------------ | Branch (84:7): [True: 315, False: 6.53k] | Branch (84:25): [True: 464, False: 6.06k] ------------------ 85| 779| ++CurPtr; 86| 779| if (*CurPtr == '-' || *CurPtr == '+') ------------------ | Branch (86:9): [True: 386, False: 393] | Branch (86:27): [True: 52, False: 341] ------------------ 87| 438| ++CurPtr; 88| 3.40k| while (isdigit(*CurPtr)) ------------------ | Branch (88:12): [True: 2.63k, False: 779] ------------------ 89| 2.63k| ++CurPtr; 90| 779| } 91| | 92| 6.84k| return AsmToken(AsmToken::Real, 93| 6.84k| StringRef(TokStart, CurPtr - TokStart)); 94| 6.84k|} _ZN7llvm_ks8AsmLexer18LexHexFloatLiteralEb: 103| 2.51k|{ 104| 2.51k| assert((*CurPtr == 'p' || *CurPtr == 'P' || *CurPtr == '.') && ------------------ | Branch (104:3): [True: 237, False: 2.27k] | Branch (104:3): [True: 433, False: 1.84k] | Branch (104:3): [True: 1.84k, False: 0] | Branch (104:3): [True: 2.51k, Folded] | Branch (104:3): [True: 2.51k, False: 0] ------------------ 105| 2.51k| "unexpected parse state in floating hex"); 106| 2.51k| bool NoFracDigits = true; 107| | 108| | // Skip the fractional part if there is one 109| 2.51k| if (*CurPtr == '.') { ------------------ | Branch (109:7): [True: 1.84k, False: 670] ------------------ 110| 1.84k| ++CurPtr; 111| | 112| 1.84k| const char *FracStart = CurPtr; 113| 16.2k| while (isxdigit(*CurPtr)) ------------------ | Branch (113:12): [True: 14.4k, False: 1.84k] ------------------ 114| 14.4k| ++CurPtr; 115| | 116| 1.84k| NoFracDigits = CurPtr == FracStart; 117| 1.84k| } 118| | 119| 2.51k| if (NoIntDigits && NoFracDigits) ------------------ | Branch (119:7): [True: 85, False: 2.42k] | Branch (119:22): [True: 65, False: 20] ------------------ 120| 65| return ReturnError(TokStart, "invalid hexadecimal floating-point constant: " 121| 65| "expected at least one significand digit"); 122| | 123| | // Make sure we do have some kind of proper exponent part 124| 2.44k| if (*CurPtr != 'p' && *CurPtr != 'P') ------------------ | Branch (124:7): [True: 2.17k, False: 267] | Branch (124:25): [True: 1.76k, False: 417] ------------------ 125| 1.76k| return ReturnError(TokStart, "invalid hexadecimal floating-point constant: " 126| 1.76k| "expected exponent part 'p'"); 127| 684| ++CurPtr; 128| | 129| 684| if (*CurPtr == '+' || *CurPtr == '-') ------------------ | Branch (129:7): [True: 276, False: 408] | Branch (129:25): [True: 10, False: 398] ------------------ 130| 286| ++CurPtr; 131| | 132| | // N.b. exponent digits are *not* hex 133| 684| const char *ExpStart = CurPtr; 134| 2.72k| while (isdigit(*CurPtr)) ------------------ | Branch (134:10): [True: 2.04k, False: 684] ------------------ 135| 2.04k| ++CurPtr; 136| | 137| 684| if (CurPtr == ExpStart) ------------------ | Branch (137:7): [True: 6, False: 678] ------------------ 138| 6| return ReturnError(TokStart, "invalid hexadecimal floating-point constant: " 139| 6| "expected at least one exponent digit"); 140| | 141| 678| return AsmToken(AsmToken::Real, StringRef(TokStart, CurPtr - TokStart)); 142| 684|} _ZN7llvm_ks8AsmLexer13LexIdentifierEv: 149| 11.0M|AsmToken AsmLexer::LexIdentifier() { 150| | // Check for floating point literals. 151| 11.0M| if (CurPtr[-1] == '.' && isdigit(*CurPtr)) { ------------------ | Branch (151:7): [True: 2.68M, False: 8.31M] | Branch (151:28): [True: 7.71k, False: 2.67M] ------------------ 152| | // Disambiguate a .1243foo identifier from a floating literal. 153| 77.5k| while (isdigit(*CurPtr)) ------------------ | Branch (153:12): [True: 69.8k, False: 7.71k] ------------------ 154| 69.8k| ++CurPtr; 155| 7.71k| if (*CurPtr == 'e' || *CurPtr == 'E' || ------------------ | Branch (155:9): [True: 315, False: 7.39k] | Branch (155:27): [True: 464, False: 6.93k] ------------------ 156| 6.93k| !IsIdentifierChar(*CurPtr, AllowAtInIdentifier)) ------------------ | Branch (156:9): [True: 6.06k, False: 868] ------------------ 157| 6.84k| return LexFloatLiteral(); 158| 7.71k| } 159| | 160| 28.8M| while (IsIdentifierChar(*CurPtr, AllowAtInIdentifier)) ------------------ | Branch (160:10): [True: 17.8M, False: 10.9M] ------------------ 161| 17.8M| ++CurPtr; 162| | 163| | // Handle . as a special case. 164| 10.9M| if (CurPtr == TokStart+1 && TokStart[0] == '.') ------------------ | Branch (164:7): [True: 3.12M, False: 7.86M] | Branch (164:31): [True: 17.6k, False: 3.10M] ------------------ 165| 17.6k| return AsmToken(AsmToken::Dot, StringRef(TokStart, 1)); 166| | 167| 10.9M| return AsmToken(AsmToken::Identifier, StringRef(TokStart, CurPtr - TokStart)); 168| 10.9M|} _ZN7llvm_ks8AsmLexer8LexSlashEv: 173| 9.99k|{ 174| 9.99k| switch (*CurPtr) { 175| 130| case '*': break; // C style comment. ------------------ | Branch (175:3): [True: 130, False: 9.86k] ------------------ 176| 1.92k| case '/': return ++CurPtr, LexLineComment(); ------------------ | Branch (176:3): [True: 1.92k, False: 8.06k] ------------------ 177| 7.93k| default: return AsmToken(AsmToken::Slash, StringRef(CurPtr-1, 1)); ------------------ | Branch (177:3): [True: 7.93k, False: 2.05k] ------------------ 178| 9.99k| } 179| | 180| | // C Style comment. 181| 130| ++CurPtr; // skip the star. 182| 1.18k| while (1) { ------------------ | Branch (182:10): [True: 1.18k, Folded] ------------------ 183| 1.18k| int CurChar = getNextChar(); 184| 1.18k| switch (CurChar) { ------------------ | Branch (184:13): [True: 296, False: 885] ------------------ 185| 1| case EOF: ------------------ | Branch (185:5): [True: 1, False: 1.18k] ------------------ 186| 1| return ReturnError(TokStart, "unterminated comment"); 187| 295| case '*': ------------------ | Branch (187:5): [True: 295, False: 886] ------------------ 188| | // End of the comment? 189| 295| if (CurPtr[0] != '/') break; ------------------ | Branch (189:11): [True: 166, False: 129] ------------------ 190| | 191| 129| ++CurPtr; // End the */. 192| 129| return LexToken(); 193| 1.18k| } 194| 1.18k| } 195| 130|} _ZN7llvm_ks8AsmLexer14LexLineCommentEv: 199| 34.7k|AsmToken AsmLexer::LexLineComment() { 200| | // FIXME: This is broken if we happen to a comment at the end of a file, which 201| | // was .included, and which doesn't end with a newline. 202| 34.7k| int CurChar = getNextChar(); 203| 528k| while (CurChar != '\n' && CurChar != '\r' && CurChar != EOF) ------------------ | Branch (203:10): [True: 505k, False: 23.0k] | Branch (203:29): [True: 493k, False: 11.7k] | Branch (203:48): [True: 493k, False: 5] ------------------ 204| 493k| CurChar = getNextChar(); 205| | 206| 34.7k| if (CurChar == EOF) ------------------ | Branch (206:7): [True: 5, False: 34.7k] ------------------ 207| 5| return AsmToken(AsmToken::Eof, StringRef(TokStart, 0)); 208| 34.7k| return AsmToken(AsmToken::EndOfStatement, StringRef(TokStart, 0)); 209| 34.7k|} _ZN7llvm_ks8AsmLexer8LexDigitEv: 259| 143k|{ 260| | // Decimal integer: [1-9][0-9]* 261| 143k| if (CurPtr[-1] != '0' || CurPtr[0] == '.') { ------------------ | Branch (261:7): [True: 106k, False: 36.5k] | Branch (261:28): [True: 218, False: 36.3k] ------------------ 262| 107k| unsigned Radix = doLookAhead(CurPtr, 10); 263| | 264| 107k| if (defaultRadix == 16) ------------------ | Branch (264:9): [True: 107k, False: 0] ------------------ 265| 107k| Radix = 16; 266| | 267| 107k| bool isHex = Radix == 16; 268| | // Check for floating point literals. 269| 107k| if (!isHex && (*CurPtr == '.' || *CurPtr == 'e')) { ------------------ | Branch (269:9): [True: 0, False: 107k] | Branch (269:20): [True: 0, False: 0] | Branch (269:38): [True: 0, False: 0] ------------------ 270| 0| ++CurPtr; 271| 0| return LexFloatLiteral(); 272| 0| } 273| | 274| 107k| StringRef Result(TokStart, CurPtr - TokStart); 275| | 276| 107k| APInt Value(128, 0, true); 277| 107k| if (Result.getAsInteger(Radix, Value)) ------------------ | Branch (277:9): [True: 0, False: 107k] ------------------ 278| 0| return ReturnError(TokStart, !isHex ? "invalid decimal number" : ------------------ | Branch (278:36): [True: 0, False: 0] ------------------ 279| 0| "invalid hexdecimal number"); 280| | 281| | // Consume the [bB][hH]. 282| 107k| if (defaultRadix != 16) { ------------------ | Branch (282:9): [True: 0, False: 107k] ------------------ 283| 0| if (Radix == 2 || Radix == 16) ------------------ | Branch (283:11): [True: 0, False: 0] | Branch (283:25): [True: 0, False: 0] ------------------ 284| 0| ++CurPtr; 285| 0| } 286| | 287| | // The darwin/x86 (and x86-64) assembler accepts and ignores type 288| | // suffices on integer literals. 289| 107k| SkipIgnoredIntegerSuffix(CurPtr); 290| | 291| 107k| return intToken(Result, Value); 292| 107k| } 293| | 294| 36.3k| if (*CurPtr == 'b') { ------------------ | Branch (294:7): [True: 299, False: 36.0k] ------------------ 295| 299| ++CurPtr; 296| | // See if we actually have "0b" as part of something like "jmp 0b\n" 297| 299| if (!isdigit(CurPtr[0])) { ------------------ | Branch (297:9): [True: 69, False: 230] ------------------ 298| 69| --CurPtr; 299| 69| StringRef Result(TokStart, CurPtr - TokStart); 300| 69| return AsmToken(AsmToken::Integer, Result, 0); 301| 69| } 302| 230| const char *NumStart = CurPtr; 303| 12.1k| while (CurPtr[0] == '0' || CurPtr[0] == '1') ------------------ | Branch (303:12): [True: 11.7k, False: 385] | Branch (303:32): [True: 155, False: 230] ------------------ 304| 11.9k| ++CurPtr; 305| | 306| | // Requires at least one binary digit. 307| 230| if (CurPtr == NumStart) ------------------ | Branch (307:9): [True: 0, False: 230] ------------------ 308| 0| return ReturnError(TokStart, "invalid binary number"); 309| | 310| 230| StringRef Result(TokStart, CurPtr - TokStart); 311| | 312| 230| APInt Value(128, 0, true); 313| 230| if (Result.substr(2).getAsInteger(2, Value)) ------------------ | Branch (313:9): [True: 0, False: 230] ------------------ 314| 0| return ReturnError(TokStart, "invalid binary number"); 315| | 316| | // The darwin/x86 (and x86-64) assembler accepts and ignores ULL and LL 317| | // suffixes on integer literals. 318| 230| SkipIgnoredIntegerSuffix(CurPtr); 319| | 320| 230| return intToken(Result, Value); 321| 230| } 322| | 323| 36.0k| if (*CurPtr == 'x' || *CurPtr == 'X') { ------------------ | Branch (323:7): [True: 850, False: 35.1k] | Branch (323:25): [True: 4.75k, False: 30.3k] ------------------ 324| 5.60k| ++CurPtr; 325| 5.60k| const char *NumStart = CurPtr; 326| 55.5k| while (isxdigit(CurPtr[0])) ------------------ | Branch (326:12): [True: 49.9k, False: 5.60k] ------------------ 327| 49.9k| ++CurPtr; 328| | 329| | // "0x.0p0" is valid, and "0x0p0" (but not "0xp0" for example, which will be 330| | // diagnosed by LexHexFloatLiteral). 331| 5.60k| if (CurPtr[0] == '.' || CurPtr[0] == 'p' || CurPtr[0] == 'P') ------------------ | Branch (331:9): [True: 1.84k, False: 3.76k] | Branch (331:29): [True: 237, False: 3.53k] | Branch (331:49): [True: 433, False: 3.09k] ------------------ 332| 2.51k| return LexHexFloatLiteral(NumStart == CurPtr); 333| | 334| | // Otherwise requires at least one hex digit. 335| 3.09k| if (CurPtr == NumStart) ------------------ | Branch (335:9): [True: 166, False: 2.93k] ------------------ 336| 166| return ReturnError(CurPtr-2, "invalid hexadecimal number"); 337| | 338| 2.93k| APInt Result(128, 0); 339| 2.93k| if (StringRef(TokStart, CurPtr - TokStart).getAsInteger(0, Result)) ------------------ | Branch (339:9): [True: 0, False: 2.93k] ------------------ 340| 0| return ReturnError(TokStart, "invalid hexadecimal number"); 341| | 342| | // Consume the optional [hH]. 343| 2.93k| if (*CurPtr == 'h' || *CurPtr == 'H') ------------------ | Branch (343:9): [True: 161, False: 2.77k] | Branch (343:27): [True: 497, False: 2.27k] ------------------ 344| 658| ++CurPtr; 345| | 346| | // The darwin/x86 (and x86-64) assembler accepts and ignores ULL and LL 347| | // suffixes on integer literals. 348| 2.93k| SkipIgnoredIntegerSuffix(CurPtr); 349| | 350| 2.93k| return intToken(StringRef(TokStart, CurPtr - TokStart), Result); 351| 2.93k| } 352| | 353| | // Either octal or hexadecimal. 354| 30.3k| APInt Value(128, 0, true); 355| 30.3k| unsigned Radix = doLookAhead(CurPtr, 8); 356| 30.3k| bool isHex = Radix == 16; 357| 30.3k| StringRef Result(TokStart, CurPtr - TokStart); 358| 30.3k| if (Result.getAsInteger(Radix, Value)) ------------------ | Branch (358:7): [True: 154, False: 30.2k] ------------------ 359| 154| return ReturnError(TokStart, !isHex ? "invalid octal number" : ------------------ | Branch (359:34): [True: 154, False: 0] ------------------ 360| 154| "invalid hexdecimal number"); 361| | 362| | // Consume the [hH]. 363| 30.2k| if (Radix == 16) ------------------ | Branch (363:7): [True: 1.10k, False: 29.1k] ------------------ 364| 1.10k| ++CurPtr; 365| | 366| | // The darwin/x86 (and x86-64) assembler accepts and ignores ULL and LL 367| | // suffixes on integer literals. 368| 30.2k| SkipIgnoredIntegerSuffix(CurPtr); 369| | 370| 30.2k| return intToken(Result, Value); 371| 30.3k|} _ZN7llvm_ks8AsmLexer14LexSingleQuoteEv: 375| 471|{ 376| 471| int CurChar = getNextChar(); 377| | 378| 471| if (CurChar == '\\') ------------------ | Branch (378:7): [True: 310, False: 161] ------------------ 379| 310| CurChar = getNextChar(); 380| | 381| 471| if (CurChar == EOF) ------------------ | Branch (381:7): [True: 0, False: 471] ------------------ 382| 0| return ReturnError(TokStart, "unterminated single quote"); 383| | 384| 471| CurChar = getNextChar(); 385| | 386| 471| if (CurChar != '\'') ------------------ | Branch (386:7): [True: 221, False: 250] ------------------ 387| 221| return ReturnError(TokStart, "single quote way too long"); 388| | 389| | // The idea here being that 'c' is basically just an integral 390| | // constant. 391| 250| StringRef Res = StringRef(TokStart,CurPtr - TokStart); 392| 250| long long Value; 393| | 394| 250| if (Res.startswith("\'\\")) { ------------------ | Branch (394:7): [True: 249, False: 1] ------------------ 395| 249| char theChar = Res[2]; 396| 249| switch (theChar) { 397| 46| default: Value = theChar; break; ------------------ | Branch (397:7): [True: 46, False: 203] ------------------ 398| 0| case '\'': Value = '\''; break; ------------------ | Branch (398:7): [True: 0, False: 249] ------------------ 399| 0| case 't': Value = '\t'; break; ------------------ | Branch (399:7): [True: 0, False: 249] ------------------ 400| 129| case 'n': Value = '\n'; break; ------------------ | Branch (400:7): [True: 129, False: 120] ------------------ 401| 74| case 'b': Value = '\b'; break; ------------------ | Branch (401:7): [True: 74, False: 175] ------------------ 402| 249| } 403| 249| } else 404| 1| Value = TokStart[1]; 405| | 406| 250| return AsmToken(AsmToken::Integer, Res, Value); 407| 250|} _ZN7llvm_ks8AsmLexer8LexQuoteEv: 412| 2.75k|{ 413| 2.75k| int CurChar = getNextChar(); 414| | // TODO: does gas allow multiline string constants? 415| 87.2k| while (CurChar != '"') { ------------------ | Branch (415:10): [True: 84.5k, False: 2.72k] ------------------ 416| 84.5k| if (CurChar == '\\') { ------------------ | Branch (416:9): [True: 3.68k, False: 80.8k] ------------------ 417| | // Allow \", etc. 418| 3.68k| CurChar = getNextChar(); 419| 3.68k| } 420| | 421| 84.5k| if (CurChar == EOF) ------------------ | Branch (421:9): [True: 25, False: 84.4k] ------------------ 422| 25| return ReturnError(TokStart, "unterminated string constant"); 423| | 424| 84.4k| CurChar = getNextChar(); 425| 84.4k| } 426| | 427| 2.72k| return AsmToken(AsmToken::String, StringRef(TokStart, CurPtr - TokStart)); 428| 2.75k|} _ZN7llvm_ks8AsmLexer22LexUntilEndOfStatementEv: 430| 5.52k|StringRef AsmLexer::LexUntilEndOfStatement() { 431| 5.52k| TokStart = CurPtr; 432| | 433| 180k| while (!isAtStartOfComment(CurPtr) && // Start of line comment. ------------------ | Branch (433:10): [True: 175k, False: 5.24k] ------------------ 434| 175k| !isAtStatementSeparator(CurPtr) && // End of statement marker. ------------------ | Branch (434:10): [True: 175k, False: 64] ------------------ 435| 175k| *CurPtr != '\n' && *CurPtr != '\r' && ------------------ | Branch (435:10): [True: 175k, False: 107] | Branch (435:29): [True: 175k, False: 101] ------------------ 436| 175k| (*CurPtr != 0 || CurPtr != CurBuf.end())) { ------------------ | Branch (436:11): [True: 175k, False: 11] | Branch (436:27): [True: 0, False: 11] ------------------ 437| 175k| ++CurPtr; 438| 175k| } 439| 5.52k| return StringRef(TokStart, CurPtr-TokStart); 440| 5.52k|} _ZN7llvm_ks8AsmLexer17LexUntilEndOfLineEv: 442| 11.9k|StringRef AsmLexer::LexUntilEndOfLine() { 443| 11.9k| TokStart = CurPtr; 444| | 445| 485k| while (*CurPtr != '\n' && *CurPtr != '\r' && ------------------ | Branch (445:10): [True: 475k, False: 9.82k] | Branch (445:29): [True: 473k, False: 2.10k] ------------------ 446| 473k| (*CurPtr != 0 || CurPtr != CurBuf.end())) { ------------------ | Branch (446:11): [True: 473k, False: 4] | Branch (446:27): [True: 0, False: 4] ------------------ 447| 473k| ++CurPtr; 448| 473k| } 449| 11.9k| return StringRef(TokStart, CurPtr-TokStart); 450| 11.9k|} _ZN7llvm_ks8AsmLexer10peekTokensENS_15MutableArrayRefINS_8AsmTokenEEEb: 454| 29.6k|{ 455| 29.6k| const char *SavedTokStart = TokStart; 456| 29.6k| const char *SavedCurPtr = CurPtr; 457| 29.6k| bool SavedAtStartOfLine = isAtStartOfLine; 458| 29.6k| bool SavedSkipSpace = SkipSpace; 459| | 460| 29.6k| std::string SavedErr = getErr(); 461| 29.6k| SMLoc SavedErrLoc = getErrLoc(); 462| | 463| 29.6k| SkipSpace = ShouldSkipSpace; 464| | 465| 29.6k| size_t ReadCount; 466| 59.3k| for (ReadCount = 0; ReadCount < Buf.size(); ++ReadCount) { ------------------ | Branch (466:23): [True: 29.6k, False: 29.6k] ------------------ 467| 29.6k| AsmToken Token = LexToken(); 468| | 469| 29.6k| Buf[ReadCount] = Token; 470| | 471| 29.6k| if (Token.is(AsmToken::Eof)) ------------------ | Branch (471:9): [True: 0, False: 29.6k] ------------------ 472| 0| break; 473| 29.6k| } 474| | 475| 29.6k| SetError(SavedErrLoc, SavedErr); 476| | 477| 29.6k| SkipSpace = SavedSkipSpace; 478| 29.6k| isAtStartOfLine = SavedAtStartOfLine; 479| 29.6k| CurPtr = SavedCurPtr; 480| 29.6k| TokStart = SavedTokStart; 481| | 482| 29.6k| return ReadCount; 483| 29.6k|} _ZN7llvm_ks8AsmLexer18isAtStartOfCommentEPKc: 485| 28.7M|bool AsmLexer::isAtStartOfComment(const char *Ptr) { 486| 28.7M| const char *CommentString = MAI.getCommentString(); 487| | 488| 28.7M| if (CommentString[1] == '\0') ------------------ | Branch (488:7): [True: 28.7M, False: 0] ------------------ 489| 28.7M| return CommentString[0] == Ptr[0]; 490| | 491| | // FIXME: special case for the bogus "##" comment string in X86MCAsmInfoDarwin 492| 0| if (CommentString[1] == '#') ------------------ | Branch (492:7): [True: 0, False: 0] ------------------ 493| 0| return CommentString[0] == Ptr[0]; 494| | 495| 0| return strncmp(Ptr, CommentString, strlen(CommentString)) == 0; 496| 0|} _ZN7llvm_ks8AsmLexer22isAtStatementSeparatorEPKc: 498| 28.6M|bool AsmLexer::isAtStatementSeparator(const char *Ptr) { 499| 28.6M| return strncmp(Ptr, MAI.getSeparatorString(), 500| 28.6M| strlen(MAI.getSeparatorString())) == 0; 501| 28.6M|} _ZN7llvm_ks8AsmLexer8LexTokenEv: 504| 28.5M|{ 505| 28.5M| TokStart = CurPtr; 506| | // This always consumes at least one character. 507| 28.5M| int CurChar = getNextChar(); 508| | 509| 28.5M| if (isAtStartOfComment(TokStart)) { ------------------ | Branch (509:7): [True: 57.5k, False: 28.5M] ------------------ 510| | // If this comment starts with a '#', then return the Hash token and let 511| | // the assembler parser see if it can be parsed as a cpp line filename 512| | // comment. We do this only if we are at the start of a line. 513| 57.5k| if (CurChar == '#' && isAtStartOfLine) ------------------ | Branch (513:9): [True: 57.5k, False: 0] | Branch (513:27): [True: 24.6k, False: 32.8k] ------------------ 514| 24.6k| return AsmToken(AsmToken::Hash, StringRef(TokStart, 1)); 515| 32.8k| isAtStartOfLine = true; 516| 32.8k| return LexLineComment(); 517| 57.5k| } 518| 28.5M| if (isAtStatementSeparator(TokStart)) { ------------------ | Branch (518:7): [True: 17.4k, False: 28.4M] ------------------ 519| 17.4k| CurPtr += strlen(MAI.getSeparatorString()) - 1; 520| 17.4k| return AsmToken(AsmToken::EndOfStatement, 521| 17.4k| StringRef(TokStart, strlen(MAI.getSeparatorString()))); 522| 17.4k| } 523| | 524| | // If we're missing a newline at EOF, make sure we still get an 525| | // EndOfStatement token before the Eof token. 526| 28.4M| if (CurChar == EOF && !isAtStartOfLine) { ------------------ | Branch (526:7): [True: 1.17k, False: 28.4M] | Branch (526:25): [True: 550, False: 629] ------------------ 527| 550| isAtStartOfLine = true; 528| 550| return AsmToken(AsmToken::EndOfStatement, StringRef(TokStart, 1)); 529| 550| } 530| | 531| 28.4M| isAtStartOfLine = false; 532| 28.4M| switch (CurChar) { 533| 11.3M| default: ------------------ | Branch (533:3): [True: 11.3M, False: 17.1M] ------------------ 534| | // Handle identifier: [a-zA-Z_.][a-zA-Z0-9_$.@]* 535| 11.3M| if (isalpha(CurChar) || CurChar == '_' || CurChar == '.') ------------------ | Branch (535:9): [True: 8.31M, False: 3.01M] | Branch (535:29): [True: 1.88k, False: 3.01M] | Branch (535:47): [True: 2.68M, False: 329k] ------------------ 536| 11.0M| return LexIdentifier(); 537| | 538| | // Unknown character, emit an error. 539| 329k| return ReturnError(TokStart, "invalid character in input"); 540| 629| case EOF: return AsmToken(AsmToken::Eof, StringRef(TokStart, 0)); ------------------ | Branch (540:3): [True: 629, False: 28.4M] ------------------ 541| 0| case 0: ------------------ | Branch (541:3): [True: 0, False: 28.4M] ------------------ 542| 2.65M| case ' ': ------------------ | Branch (542:3): [True: 2.65M, False: 25.8M] ------------------ 543| 3.20M| case '\t': ------------------ | Branch (543:3): [True: 553k, False: 27.9M] ------------------ 544| 3.20M| if (SkipSpace) { ------------------ | Branch (544:9): [True: 3.20M, False: 2] ------------------ 545| | // Ignore whitespace. 546| 3.20M| return LexToken(); 547| 3.20M| } else { 548| 2| int len = 1; 549| 2| while (*CurPtr==' ' || *CurPtr=='\t') { ------------------ | Branch (549:14): [True: 0, False: 2] | Branch (549:30): [True: 0, False: 2] ------------------ 550| 0| CurPtr++; 551| 0| len++; 552| 0| } 553| 2| return AsmToken(AsmToken::Space, StringRef(TokStart, len)); 554| 2| } 555| 2.62M| case '\n': // FALL THROUGH. ------------------ | Branch (555:3): [True: 2.62M, False: 25.8M] ------------------ 556| 2.65M| case '\r': ------------------ | Branch (556:3): [True: 31.4k, False: 28.4M] ------------------ 557| 2.65M| isAtStartOfLine = true; 558| 2.65M| return AsmToken(AsmToken::EndOfStatement, StringRef(TokStart, 1)); 559| 746| case ':': return AsmToken(AsmToken::Colon, StringRef(TokStart, 1)); ------------------ | Branch (559:3): [True: 746, False: 28.4M] ------------------ 560| 11.5k| case '+': return AsmToken(AsmToken::Plus, StringRef(TokStart, 1)); ------------------ | Branch (560:3): [True: 11.5k, False: 28.4M] ------------------ 561| 33.8k| case '-': return AsmToken(AsmToken::Minus, StringRef(TokStart, 1)); ------------------ | Branch (561:3): [True: 33.8k, False: 28.4M] ------------------ 562| 86| case '~': return AsmToken(AsmToken::Tilde, StringRef(TokStart, 1)); ------------------ | Branch (562:3): [True: 86, False: 28.4M] ------------------ 563| 74.5k| case '(': return AsmToken(AsmToken::LParen, StringRef(TokStart, 1)); ------------------ | Branch (563:3): [True: 74.5k, False: 28.4M] ------------------ 564| 468k| case ')': return AsmToken(AsmToken::RParen, StringRef(TokStart, 1)); ------------------ | Branch (564:3): [True: 468k, False: 28.0M] ------------------ 565| 407| case '[': return AsmToken(AsmToken::LBrac, StringRef(TokStart, 1)); ------------------ | Branch (565:3): [True: 407, False: 28.4M] ------------------ 566| 28| case ']': return AsmToken(AsmToken::RBrac, StringRef(TokStart, 1)); ------------------ | Branch (566:3): [True: 28, False: 28.4M] ------------------ 567| 683| case '{': return AsmToken(AsmToken::LCurly, StringRef(TokStart, 1)); ------------------ | Branch (567:3): [True: 683, False: 28.4M] ------------------ 568| 778| case '}': return AsmToken(AsmToken::RCurly, StringRef(TokStart, 1)); ------------------ | Branch (568:3): [True: 778, False: 28.4M] ------------------ 569| 4.12k| case '*': return AsmToken(AsmToken::Star, StringRef(TokStart, 1)); ------------------ | Branch (569:3): [True: 4.12k, False: 28.4M] ------------------ 570| 2.82M| case ',': return AsmToken(AsmToken::Comma, StringRef(TokStart, 1)); ------------------ | Branch (570:3): [True: 2.82M, False: 25.6M] ------------------ 571| 5.10M| case '$': return AsmToken(AsmToken::Dollar, StringRef(TokStart, 1)); ------------------ | Branch (571:3): [True: 5.10M, False: 23.3M] ------------------ 572| 2.59k| case '@': return AsmToken(AsmToken::At, StringRef(TokStart, 1)); ------------------ | Branch (572:3): [True: 2.59k, False: 28.4M] ------------------ 573| 23.5k| case '\\': return AsmToken(AsmToken::BackSlash, StringRef(TokStart, 1)); ------------------ | Branch (573:3): [True: 23.5k, False: 28.4M] ------------------ 574| 18.0k| case '=': ------------------ | Branch (574:3): [True: 18.0k, False: 28.4M] ------------------ 575| 18.0k| if (*CurPtr == '=') ------------------ | Branch (575:9): [True: 142, False: 17.9k] ------------------ 576| 142| return ++CurPtr, AsmToken(AsmToken::EqualEqual, StringRef(TokStart, 2)); 577| 17.9k| return AsmToken(AsmToken::Equal, StringRef(TokStart, 1)); 578| 767| case '|': ------------------ | Branch (578:3): [True: 767, False: 28.4M] ------------------ 579| 767| if (*CurPtr == '|') ------------------ | Branch (579:9): [True: 265, False: 502] ------------------ 580| 265| return ++CurPtr, AsmToken(AsmToken::PipePipe, StringRef(TokStart, 2)); 581| 502| return AsmToken(AsmToken::Pipe, StringRef(TokStart, 1)); 582| 4.17k| case '^': return AsmToken(AsmToken::Caret, StringRef(TokStart, 1)); ------------------ | Branch (582:3): [True: 4.17k, False: 28.4M] ------------------ 583| 10.5k| case '&': ------------------ | Branch (583:3): [True: 10.5k, False: 28.4M] ------------------ 584| 10.5k| if (*CurPtr == '&') ------------------ | Branch (584:9): [True: 834, False: 9.71k] ------------------ 585| 834| return ++CurPtr, AsmToken(AsmToken::AmpAmp, StringRef(TokStart, 2)); 586| 9.71k| return AsmToken(AsmToken::Amp, StringRef(TokStart, 1)); 587| 5.14k| case '!': ------------------ | Branch (587:3): [True: 5.14k, False: 28.4M] ------------------ 588| 5.14k| if (*CurPtr == '=') ------------------ | Branch (588:9): [True: 186, False: 4.96k] ------------------ 589| 186| return ++CurPtr, AsmToken(AsmToken::ExclaimEqual, StringRef(TokStart, 2)); 590| 4.96k| return AsmToken(AsmToken::Exclaim, StringRef(TokStart, 1)); 591| 1.41k| case '%': return AsmToken(AsmToken::Percent, StringRef(TokStart, 1)); ------------------ | Branch (591:3): [True: 1.41k, False: 28.4M] ------------------ 592| 9.99k| case '/': return LexSlash(); ------------------ | Branch (592:3): [True: 9.99k, False: 28.4M] ------------------ 593| 0| case '#': return AsmToken(AsmToken::Hash, StringRef(TokStart, 1)); ------------------ | Branch (593:3): [True: 0, False: 28.4M] ------------------ 594| 471| case '\'': return LexSingleQuote(); ------------------ | Branch (594:3): [True: 471, False: 28.4M] ------------------ 595| 2.75k| case '"': return LexQuote(); ------------------ | Branch (595:3): [True: 2.75k, False: 28.4M] ------------------ 596| 75.7k| case '0': case '1': case '2': case '3': case '4': ------------------ | Branch (596:3): [True: 36.5k, False: 28.4M] | Branch (596:13): [True: 11.6k, False: 28.4M] | Branch (596:23): [True: 15.5k, False: 28.4M] | Branch (596:33): [True: 7.10k, False: 28.4M] | Branch (596:43): [True: 4.86k, False: 28.4M] ------------------ 597| 143k| case '5': case '6': case '7': case '8': case '9': ------------------ | Branch (597:3): [True: 4.09k, False: 28.4M] | Branch (597:13): [True: 3.99k, False: 28.4M] | Branch (597:23): [True: 599, False: 28.4M] | Branch (597:33): [True: 2.38k, False: 28.4M] | Branch (597:43): [True: 56.5k, False: 28.4M] ------------------ 598| 143k| return LexDigit(); 599| 2.53M| case '<': ------------------ | Branch (599:3): [True: 2.53M, False: 25.9M] ------------------ 600| 2.53M| switch (*CurPtr) { 601| 587| case '<': return ++CurPtr, AsmToken(AsmToken::LessLess, ------------------ | Branch (601:5): [True: 587, False: 2.53M] ------------------ 602| 587| StringRef(TokStart, 2)); 603| 42| case '=': return ++CurPtr, AsmToken(AsmToken::LessEqual, ------------------ | Branch (603:5): [True: 42, False: 2.53M] ------------------ 604| 42| StringRef(TokStart, 2)); 605| 108| case '>': return ++CurPtr, AsmToken(AsmToken::LessGreater, ------------------ | Branch (605:5): [True: 108, False: 2.53M] ------------------ 606| 108| StringRef(TokStart, 2)); 607| 2.53M| default: return AsmToken(AsmToken::Less, StringRef(TokStart, 1)); ------------------ | Branch (607:5): [True: 2.53M, False: 737] ------------------ 608| 2.53M| } 609| 5.18k| case '>': ------------------ | Branch (609:3): [True: 5.18k, False: 28.4M] ------------------ 610| 5.18k| switch (*CurPtr) { 611| 1.68k| case '>': return ++CurPtr, AsmToken(AsmToken::GreaterGreater, ------------------ | Branch (611:5): [True: 1.68k, False: 3.50k] ------------------ 612| 1.68k| StringRef(TokStart, 2)); 613| 109| case '=': return ++CurPtr, AsmToken(AsmToken::GreaterEqual, ------------------ | Branch (613:5): [True: 109, False: 5.07k] ------------------ 614| 109| StringRef(TokStart, 2)); 615| 3.39k| default: return AsmToken(AsmToken::Greater, StringRef(TokStart, 1)); ------------------ | Branch (615:5): [True: 3.39k, False: 1.79k] ------------------ 616| 5.18k| } 617| | 618| | // TODO: Quoted identifiers (objc methods etc) 619| | // local labels: [0-9][:] 620| | // Forward/backward labels: [0-9][fb] 621| | // Integers, fp constants, character constants. 622| 28.4M| } 623| 28.4M|} AsmLexer.cpp:_ZL16IsIdentifierCharcb: 145| 28.8M|static bool IsIdentifierChar(char c, bool AllowAt) { 146| 28.8M| return isalnum(c) || c == '_' || c == '$' || c == '.' || ------------------ | Branch (146:10): [True: 17.8M, False: 11.0M] | Branch (146:24): [True: 14.1k, False: 11.0M] | Branch (146:36): [True: 10.9k, False: 11.0M] | Branch (146:48): [True: 14.0k, False: 11.0M] ------------------ 147| 11.0M| (c == '@' && AllowAt) || c == '?'; ------------------ | Branch (147:11): [True: 20.7k, False: 11.0M] | Branch (147:23): [True: 20.7k, False: 0] | Branch (147:35): [True: 855, False: 11.0M] ------------------ 148| 28.8M|} AsmLexer.cpp:_ZL11doLookAheadRPKcj: 223| 137k|static unsigned doLookAhead(const char *&CurPtr, unsigned DefaultRadix) { 224| 137k| const char *FirstHex = nullptr; 225| 137k| const char *LookAhead = CurPtr; 226| 303k| while (1) { ------------------ | Branch (226:10): [True: 303k, Folded] ------------------ 227| 303k| if (isdigit(*LookAhead)) { ------------------ | Branch (227:9): [True: 147k, False: 155k] ------------------ 228| 147k| ++LookAhead; 229| 155k| } else if (isxdigit(*LookAhead)) { ------------------ | Branch (229:16): [True: 18.2k, False: 137k] ------------------ 230| 18.2k| if (!FirstHex) ------------------ | Branch (230:11): [True: 11.9k, False: 6.32k] ------------------ 231| 11.9k| FirstHex = LookAhead; 232| 18.2k| ++LookAhead; 233| 137k| } else { 234| 137k| break; 235| 137k| } 236| 303k| } 237| 137k| bool isHex = *LookAhead == 'h' || *LookAhead == 'H'; ------------------ | Branch (237:16): [True: 98, False: 137k] | Branch (237:37): [True: 1.07k, False: 136k] ------------------ 238| 137k| CurPtr = isHex || !FirstHex ? LookAhead : FirstHex; ------------------ | Branch (238:12): [True: 1.17k, False: 136k] | Branch (238:21): [True: 125k, False: 10.8k] ------------------ 239| 137k| if (isHex) ------------------ | Branch (239:7): [True: 1.17k, False: 136k] ------------------ 240| 1.17k| return 16; 241| 136k| return DefaultRadix; 242| 137k|} AsmLexer.cpp:_ZL24SkipIgnoredIntegerSuffixRPKc: 211| 140k|static void SkipIgnoredIntegerSuffix(const char *&CurPtr) { 212| | // Skip ULL, UL, U, L and LL suffices. 213| 140k| if (CurPtr[0] == 'U') ------------------ | Branch (213:7): [True: 204, False: 140k] ------------------ 214| 204| ++CurPtr; 215| 140k| if (CurPtr[0] == 'L') ------------------ | Branch (215:7): [True: 174, False: 140k] ------------------ 216| 174| ++CurPtr; 217| 140k| if (CurPtr[0] == 'L') ------------------ | Branch (217:7): [True: 154, False: 140k] ------------------ 218| 154| ++CurPtr; 219| 140k|} AsmLexer.cpp:_ZL8intTokenN7llvm_ks9StringRefERNS_5APIntE: 245| 140k|{ 246| 140k| if (Value.isIntN(64)) ------------------ | Branch (246:7): [True: 140k, False: 295] ------------------ 247| 140k| return AsmToken(AsmToken::Integer, Ref, Value); 248| 295| return AsmToken(AsmToken::BigNum, Ref, Value); 249| 140k|} _ZN7llvm_ks13MCParserUtils25parseAssignmentExpressionENS_9StringRefEbRNS_11MCAsmParserERPNS_8MCSymbolERPKNS_6MCExprE: 6074| 3.47k|{ 6075| 3.47k| MCAsmLexer &Lexer = Parser.getLexer(); 6076| | 6077| | // FIXME: Use better location, we should use proper tokens. 6078| | //SMLoc EqualLoc = Lexer.getLoc(); 6079| | 6080| 3.47k| if (Parser.parseExpression(Value)) { ------------------ | Branch (6080:7): [True: 1.07k, False: 2.40k] ------------------ 6081| | //Parser.TokError("missing expression"); 6082| 1.07k| Parser.eatToEndOfStatement(); 6083| 1.07k| return true; 6084| 1.07k| } 6085| | 6086| | // Note: we don't count b as used in "a = b". This is to allow 6087| | // a = b 6088| | // b = c 6089| | 6090| 2.40k| if (Lexer.isNot(AsmToken::EndOfStatement)) ------------------ | Branch (6090:7): [True: 430, False: 1.97k] ------------------ 6091| | //return Parser.TokError("unexpected token in assignment"); 6092| 430| return true; 6093| | 6094| | // Eat the end of statement marker. 6095| 1.97k| Parser.Lex(); 6096| | 6097| | // Validate that the LHS is allowed to be a variable (either it has not been 6098| | // used as a symbol, or it is an absolute symbol). 6099| 1.97k| Sym = Parser.getContext().lookupSymbol(Name); 6100| 1.97k| if (Sym) { ------------------ | Branch (6100:7): [True: 729, False: 1.24k] ------------------ 6101| | // Diagnose assignment to a label. 6102| | // 6103| | // FIXME: Diagnostics. Note the location of the definition as a label. 6104| | // FIXME: Diagnose assignment to protected identifier (e.g., register name). 6105| 729| if (isSymbolUsedInExpression(Sym, Value)) ------------------ | Branch (6105:9): [True: 141, False: 588] ------------------ 6106| | //return Parser.Error(EqualLoc, "Recursive use of '" + Name + "'"); 6107| 141| return true; 6108| 588| else if (Sym->isUndefined(/*SetUsed*/ false) && !Sym->isUsed() && ------------------ | Branch (6108:14): [True: 494, False: 94] | Branch (6108:53): [True: 489, False: 5] ------------------ 6109| 489| !Sym->isVariable()) ------------------ | Branch (6109:14): [True: 4, False: 485] ------------------ 6110| 4| ; // Allow redefinitions of undefined symbols only used in directives. 6111| 584| else if (Sym->isVariable() && !Sym->isUsed() && allow_redef) ------------------ | Branch (6111:14): [True: 584, False: 0] | Branch (6111:35): [True: 560, False: 24] | Branch (6111:53): [True: 560, False: 0] ------------------ 6112| 560| ; // Allow redefinitions of variables that haven't yet been used. 6113| 24| else if (!Sym->isUndefined() && (!Sym->isVariable() || !allow_redef)) ------------------ | Branch (6113:14): [True: 19, False: 5] | Branch (6113:38): [True: 0, False: 19] | Branch (6113:60): [True: 0, False: 19] ------------------ 6114| | //return Parser.Error(EqualLoc, "redefinition of '" + Name + "'"); 6115| 0| return true; 6116| 24| else if (!Sym->isVariable()) ------------------ | Branch (6116:14): [True: 0, False: 24] ------------------ 6117| | //return Parser.Error(EqualLoc, "invalid assignment to '" + Name + "'"); 6118| 0| return true; 6119| 24| else if (!isa(Sym->getVariableValue())) ------------------ | Branch (6119:14): [True: 12, False: 12] ------------------ 6120| | //return Parser.Error(EqualLoc, 6121| | // "invalid reassignment of non-absolute variable '" + 6122| | // Name + "'"); 6123| 12| return true; 6124| 1.24k| } else if (Name == ".") { ------------------ | Branch (6124:14): [True: 1.01k, False: 225] ------------------ 6125| 1.01k| Parser.getStreamer().emitValueToOffset(Value, 0); 6126| 1.01k| return false; 6127| 1.01k| } else { 6128| 225| if (Name.empty()) { ------------------ | Branch (6128:9): [True: 8, False: 217] ------------------ 6129| 8| return true; 6130| 8| } 6131| 217| Sym = Parser.getContext().getOrCreateSymbol(Name); 6132| 217| } 6133| | 6134| 793| Sym->setRedefinable(allow_redef); 6135| | 6136| 793| return false; 6137| 1.97k|} _ZN7llvm_ks17createMCAsmParserERNS_9SourceMgrERNS_9MCContextERNS_10MCStreamerERKNS_9MCAsmInfoE: 6144| 749| MCStreamer &Out, const MCAsmInfo &MAI) { 6145| 749| return new AsmParser(SM, C, Out, MAI); 6146| 749|} AsmParser.cpp:_ZN7llvm_ks13MCParserUtilsL24isSymbolUsedInExpressionEPKNS_8MCSymbolEPKNS_6MCExprE: 6046| 1.27k|static bool isSymbolUsedInExpression(const MCSymbol *Sym, const MCExpr *Value) { 6047| 1.27k| switch (Value->getKind()) { ------------------ | Branch (6047:11): [True: 1.27k, False: 0] ------------------ 6048| 161| case MCExpr::Binary: { ------------------ | Branch (6048:3): [True: 161, False: 1.11k] ------------------ 6049| 161| const MCBinaryExpr *BE = static_cast(Value); 6050| 161| return isSymbolUsedInExpression(Sym, BE->getLHS()) || ------------------ | Branch (6050:12): [True: 0, False: 161] ------------------ 6051| 161| isSymbolUsedInExpression(Sym, BE->getRHS()); ------------------ | Branch (6051:12): [True: 1, False: 160] ------------------ 6052| 0| } 6053| 0| case MCExpr::Target: ------------------ | Branch (6053:3): [True: 0, False: 1.27k] ------------------ 6054| 65| case MCExpr::Constant: ------------------ | Branch (6054:3): [True: 65, False: 1.21k] ------------------ 6055| 65| return false; 6056| 918| case MCExpr::SymbolRef: { ------------------ | Branch (6056:3): [True: 918, False: 361] ------------------ 6057| 918| const MCSymbol &S = 6058| 918| static_cast(Value)->getSymbol(); 6059| 918| if (S.isVariable()) ------------------ | Branch (6059:9): [True: 93, False: 825] ------------------ 6060| 93| return isSymbolUsedInExpression(Sym, S.getVariableValue()); 6061| 825| return &S == Sym; 6062| 918| } 6063| 135| case MCExpr::Unary: ------------------ | Branch (6063:3): [True: 135, False: 1.14k] ------------------ 6064| 135| return isSymbolUsedInExpression( 6065| 135| Sym, static_cast(Value)->getSubExpr()); 6066| 1.27k| } 6067| | 6068| 0| llvm_unreachable("Unknown expr kind!"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ 6069| 1.27k|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParserC2ERN7llvm_ks9SourceMgrERNS1_9MCContextERNS1_10MCStreamerERKNS1_9MCAsmInfoE: 545| 749| : Lexer(MAI), Ctx(Ctx), Out(Out), MAI(MAI), SrcMgr(SM), 546| 749| PlatformParser(nullptr), CurBuffer(SM.getMainFileID()), 547| 749| MacrosEnabledFlag(true), HadError(false), CppHashLineNumber(0), 548| 749| AssemblerDialect(~0U), IsDarwin(false), ParsingInlineAsm(false), 549| 749| NasmDefaultRel(false) { 550| | // Save the old handler. 551| 749| SavedDiagHandler = SrcMgr.getDiagHandler(); 552| 749| SavedDiagContext = SrcMgr.getDiagContext(); 553| | // Set our own handler which calls the saved handler. 554| 749| SrcMgr.setDiagHandler(DiagHandler, this); 555| 749| Lexer.setBuffer(SrcMgr.getMemoryBuffer(CurBuffer)->getBuffer()); 556| | 557| | // Initialize the platform / file format parser. 558| 749| PlatformParser.reset(createDarwinAsmParser()); 559| 749| IsDarwin = true; 560| |#if 0 561| | switch (Ctx.getObjectFileInfo()->getObjectFileType()) { 562| | case MCObjectFileInfo::IsCOFF: 563| | PlatformParser.reset(createCOFFAsmParser()); 564| | break; 565| | case MCObjectFileInfo::IsMachO: 566| | PlatformParser.reset(createDarwinAsmParser()); 567| | IsDarwin = true; 568| | break; 569| | case MCObjectFileInfo::IsELF: 570| | PlatformParser.reset(createELFAsmParser()); 571| | break; 572| | } 573| |#endif 574| | 575| 749| PlatformParser->Initialize(*this); 576| 749| initializeDirectiveKindMap(0); 577| | 578| 749| NumOfMacroInstantiations = 0; 579| 749|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser11DiagHandlerERKN7llvm_ks12SMDiagnosticEPv: 2025| 45.9k|void AsmParser::DiagHandler(const SMDiagnostic &Diag, void *Context) { 2026| 45.9k| const AsmParser *Parser = static_cast(Context); 2027| 45.9k| raw_ostream &OS = errs(); 2028| | 2029| 45.9k| const SourceMgr &DiagSrcMgr = *Diag.getSourceMgr(); 2030| 45.9k| SMLoc DiagLoc = Diag.getLoc(); 2031| 45.9k| unsigned DiagBuf = DiagSrcMgr.FindBufferContainingLoc(DiagLoc); 2032| 45.9k| unsigned CppHashBuf = 2033| 45.9k| Parser->SrcMgr.FindBufferContainingLoc(Parser->CppHashLoc); 2034| | 2035| | // Like SourceMgr::printMessage() we need to print the include stack if any 2036| | // before printing the message. 2037| 45.9k| unsigned DiagCurBuffer = DiagSrcMgr.FindBufferContainingLoc(DiagLoc); 2038| 45.9k| if (!Parser->SavedDiagHandler && DiagCurBuffer && ------------------ | Branch (2038:7): [True: 45.9k, False: 0] | Branch (2038:36): [True: 44.9k, False: 1.02k] ------------------ 2039| 44.9k| DiagCurBuffer != DiagSrcMgr.getMainFileID()) { ------------------ | Branch (2039:7): [True: 21.3k, False: 23.6k] ------------------ 2040| 21.3k| SMLoc ParentIncludeLoc = DiagSrcMgr.getParentIncludeLoc(DiagCurBuffer); 2041| 21.3k| DiagSrcMgr.PrintIncludeStack(ParentIncludeLoc, OS); 2042| 21.3k| } 2043| | 2044| | // If we have not parsed a cpp hash line filename comment or the source 2045| | // manager changed or buffer changed (like in a nested include) then just 2046| | // print the normal diagnostic using its Filename and LineNo. 2047| 45.9k| if (!Parser->CppHashLineNumber || &DiagSrcMgr != &Parser->SrcMgr || ------------------ | Branch (2047:7): [True: 45.3k, False: 668] | Branch (2047:37): [True: 0, False: 668] ------------------ 2048| 45.6k| DiagBuf != CppHashBuf) { ------------------ | Branch (2048:7): [True: 325, False: 343] ------------------ 2049| 45.6k| if (Parser->SavedDiagHandler) ------------------ | Branch (2049:9): [True: 0, False: 45.6k] ------------------ 2050| 0| Parser->SavedDiagHandler(Diag, Parser->SavedDiagContext); 2051| 45.6k| else 2052| 45.6k| Diag.print(nullptr, OS); 2053| 45.6k| return; 2054| 45.6k| } 2055| | 2056| | // Use the CppHashFilename and calculate a line number based on the 2057| | // CppHashLoc and CppHashLineNumber relative to this Diag's SMLoc for 2058| | // the diagnostic. 2059| 343| const std::string &Filename = Parser->CppHashFilename; 2060| | 2061| 343| int DiagLocLineNo = DiagSrcMgr.FindLineNumber(DiagLoc, DiagBuf); 2062| 343| int CppHashLocLineNo = 2063| 343| Parser->SrcMgr.FindLineNumber(Parser->CppHashLoc, CppHashBuf); 2064| 343| int LineNo = 2065| 343| Parser->CppHashLineNumber - 1 + (DiagLocLineNo - CppHashLocLineNo); 2066| | 2067| 343| SMDiagnostic NewDiag(*Diag.getSourceMgr(), Diag.getLoc(), Filename, LineNo, 2068| 343| Diag.getColumnNo(), Diag.getKind(), Diag.getMessage(), 2069| 343| Diag.getLineContents(), Diag.getRanges()); 2070| | 2071| 343| if (Parser->SavedDiagHandler) ------------------ | Branch (2071:7): [True: 0, False: 343] ------------------ 2072| 0| Parser->SavedDiagHandler(NewDiag, Parser->SavedDiagContext); 2073| 343| else 2074| 343| NewDiag.print(nullptr, OS); 2075| 343|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParserD2Ev: 581| 749|AsmParser::~AsmParser() { 582| 749| assert((HadError || ActiveMacros.empty()) && ------------------ | Branch (582:3): [True: 186, False: 563] | Branch (582:3): [True: 563, False: 0] | Branch (582:3): [True: 749, Folded] | Branch (582:3): [True: 749, False: 0] ------------------ 583| 749| "Unexpected active macro instantiation!"); 584| | 585| | // Restore the saved diagnostics handler and context for use during 586| | // finalization 587| 749| SrcMgr.setDiagHandler(SavedDiagHandler, SavedDiagContext); 588| 749|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser19addDirectiveHandlerEN7llvm_ks9StringRefENSt3__14pairIPNS1_20MCAsmParserExtensionEPFbS6_S2_NS1_5SMLocEEEE: 197| 49.4k| ExtensionDirectiveHandler Handler) override { 198| 49.4k| ExtensionDirectiveMap[Directive] = Handler; 199| 49.4k| } AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser20addAliasForDirectiveEN7llvm_ks9StringRefES2_: 201| 749| void addAliasForDirective(StringRef Directive, StringRef Alias) override { 202| 749| DirectiveKindMap[Directive] = DirectiveKindMap[Alias]; 203| 749| } AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser8getLexerEv: 210| 8.49M| MCAsmLexer &getLexer() override { return Lexer; } AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser10getContextEv: 211| 126k| MCContext &getContext() override { return Ctx; } AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser11getStreamerEv: 212| 249k| MCStreamer &getStreamer() override { return Out; } AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser3RunEbmb: 675| 749|{ 676| | // count number of statement 677| 749| size_t count = 0; 678| | 679| | // Create the initial section, if requested. 680| 749| if (!NoInitialTextSection) ------------------ | Branch (680:7): [True: 749, False: 0] ------------------ 681| 749| Out.InitSections(false); 682| | 683| | // Prime the lexer. 684| 749| Lex(); 685| 749| if (!Lexer.isNot(AsmToken::Error)) { ------------------ | Branch (685:7): [True: 5, False: 744] ------------------ 686| 5| KsError = KS_ERR_ASM_TOKEN_INVALID; 687| 5| return 0; 688| 5| } 689| | 690| 744| HadError = false; 691| 744| AsmCond StartingCondState = TheCondState; 692| | 693| | // If we are generating dwarf for assembly source files save the initial text 694| | // section and generate a .file directive. 695| 744| if (getContext().getGenDwarfForAssembly()) { ------------------ | Branch (695:7): [True: 0, False: 744] ------------------ 696| 0| MCSection *Sec = getStreamer().getCurrentSection().first; 697| 0| if (!Sec->getBeginSymbol()) { ------------------ | Branch (697:9): [True: 0, False: 0] ------------------ 698| 0| MCSymbol *SectionStartSym = getContext().createTempSymbol(); 699| 0| getStreamer().EmitLabel(SectionStartSym); 700| 0| Sec->setBeginSymbol(SectionStartSym); 701| 0| } 702| 0| bool InsertResult = getContext().addGenDwarfSection(Sec); 703| 0| assert(InsertResult && ".text section should not have debug info yet"); ------------------ | Branch (703:5): [True: 0, False: 0] | Branch (703:5): [True: 0, Folded] | Branch (703:5): [True: 0, False: 0] ------------------ 704| 0| (void)InsertResult; 705| 0| getContext().setGenDwarfFileNumber(getStreamer().EmitDwarfFileDirective( 706| 0| 0, StringRef(), getContext().getMainFileName())); 707| 0| } 708| | 709| | // While we have input, parse each statement. 710| 151k| while (Lexer.isNot(AsmToken::Eof)) { ------------------ | Branch (710:10): [True: 150k, False: 471] ------------------ 711| 150k| ParseStatementInfo Info; 712| 150k| if (!parseStatement(Info, nullptr, Address)) { ------------------ | Branch (712:9): [True: 126k, False: 24.4k] ------------------ 713| 126k| count++; 714| 126k| continue; 715| 126k| } 716| | 717| | //printf(">> 222 error = %u\n", Info.KsError); 718| 24.4k| if (!KsError) { ------------------ | Branch (718:9): [True: 273, False: 24.2k] ------------------ 719| 273| KsError = Info.KsError; 720| 273| return 0; 721| 273| } 722| | 723| | // We had an error, validate that one was emitted and recover by skipping to 724| | // the next line. 725| | // assert(HadError && "Parse statement returned an error, but none emitted!"); 726| | 727| | //eatToEndOfStatement(); 728| 24.4k| } 729| | 730| 471| if (TheCondState.TheCond != StartingCondState.TheCond || ------------------ | Branch (730:7): [True: 42, False: 429] ------------------ 731| 429| TheCondState.Ignore != StartingCondState.Ignore) { ------------------ | Branch (731:7): [True: 0, False: 429] ------------------ 732| | //return TokError("unmatched .ifs or .elses"); 733| 42| KsError = KS_ERR_ASM_DIRECTIVE_TOKEN; 734| 42| return 0; 735| 42| } 736| | 737| | // Check to see that all assembler local symbols were actually defined. 738| | // Targets that don't do subsections via symbols may not want this, though, 739| | // so conservatively exclude them. Only do this if we're finalizing, though, 740| | // as otherwise we won't necessarilly have seen everything yet. 741| 429| if (!NoFinalize && MAI.hasSubsectionsViaSymbols()) { ------------------ | Branch (741:7): [True: 429, False: 0] | Branch (741:22): [True: 0, False: 429] ------------------ 742| 0| for (const auto &TableEntry : getContext().getSymbols()) { ------------------ | Branch (742:33): [True: 0, False: 0] ------------------ 743| 0| MCSymbol *Sym = TableEntry.getValue(); 744| | // Variable symbols may not be marked as defined, so check those 745| | // explicitly. If we know it's a variable, we have a definition for 746| | // the purposes of this check. 747| 0| if (Sym->isTemporary() && !Sym->isVariable() && !Sym->isDefined()) { ------------------ | Branch (747:11): [True: 0, False: 0] | Branch (747:33): [True: 0, False: 0] | Branch (747:55): [True: 0, False: 0] ------------------ 748| | // FIXME: We would really like to refer back to where the symbol was 749| | // first referenced for a source location. We need to add something 750| | // to track that. Currently, we just point to the end of the file. 751| | //return Error(getLexer().getLoc(), "assembler local symbol '" + 752| | // Sym->getName() + "' not defined"); // qq: set KsError, then return 0 753| 0| KsError = KS_ERR_ASM_SYMBOL_MISSING; 754| 0| return 0; 755| 0| } 756| 0| } 757| 0| } 758| | 759| | // Finalize the output stream if there are no errors and if the client wants 760| | // us to. 761| 429| if (!KsError) { ------------------ | Branch (761:7): [True: 301, False: 128] ------------------ 762| 301| if (!HadError && !NoFinalize) ------------------ | Branch (762:11): [True: 184, False: 117] | Branch (762:24): [True: 184, False: 0] ------------------ 763| 184| KsError = Out.Finish(); 764| 301| } else 765| 128| Out.Finish(); 766| | 767| | //return HadError || getContext().hadError(); 768| 429| return count; 769| 429|} AsmParser.cpp:_ZN12_GLOBAL__N_118ParseStatementInfoC2Ev: 114| 150k| ParseStatementInfo() : KsError(0), Opcode(~0U), ParseError(false), AsmRewrites(nullptr) {} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser14parseStatementERNS_18ParseStatementInfoEPN7llvm_ks23MCAsmParserSemaCallbackERm: 1449| 150k|{ 1450| 150k| KsError = 0; 1451| 150k| if (Lexer.is(AsmToken::EndOfStatement)) { ------------------ | Branch (1451:7): [True: 44.4k, False: 106k] ------------------ 1452| 44.4k| Out.AddBlankLine(); 1453| 44.4k| Lex(); 1454| 44.4k| return false; 1455| 44.4k| } 1456| | 1457| | // Statements always start with an identifier or are a full line comment. 1458| 106k| AsmToken ID = getTok(); 1459| | //printf(">>> parseStatement:ID = %s\n", ID.getString().str().c_str()); 1460| 106k| SMLoc IDLoc = ID.getLoc(); 1461| 106k| StringRef IDVal; 1462| 106k| int64_t LocalLabelVal = -1; 1463| | // A full line comment is a '#' as the first token. 1464| 106k| if (Lexer.is(AsmToken::Hash)) ------------------ | Branch (1464:7): [True: 15.6k, False: 90.7k] ------------------ 1465| 15.6k| return parseCppHashLineFilenameComment(IDLoc); 1466| | 1467| | // Allow an integer followed by a ':' as a directional local label. 1468| 90.7k| if (Lexer.is(AsmToken::Integer)) { ------------------ | Branch (1468:7): [True: 187, False: 90.5k] ------------------ 1469| 187| bool valid; 1470| 187| LocalLabelVal = getTok().getIntVal(valid); 1471| 187| if (!valid) { ------------------ | Branch (1471:9): [True: 0, False: 187] ------------------ 1472| 0| return true; 1473| 0| } 1474| 187| if (LocalLabelVal < 0) { ------------------ | Branch (1474:9): [True: 0, False: 187] ------------------ 1475| 0| if (!TheCondState.Ignore) { ------------------ | Branch (1475:11): [True: 0, False: 0] ------------------ 1476| | // return TokError("unexpected token at start of statement"); 1477| 0| Info.KsError = KS_ERR_ASM_STAT_TOKEN; 1478| 0| return true; 1479| 0| } 1480| 0| IDVal = ""; 1481| 187| } else { 1482| 187| IDVal = getTok().getString(); 1483| 187| Lex(); // Consume the integer token to be used as an identifier token. 1484| 187| if (Lexer.getKind() != AsmToken::Colon) { ------------------ | Branch (1484:11): [True: 116, False: 71] ------------------ 1485| 116| if (!TheCondState.Ignore) { ------------------ | Branch (1485:13): [True: 26, False: 90] ------------------ 1486| | // return TokError("unexpected token at start of statement"); 1487| 26| Info.KsError = KS_ERR_ASM_STAT_TOKEN; 1488| 26| return true; 1489| 26| } 1490| 116| } 1491| 187| } 1492| 90.5k| } else if (Lexer.is(AsmToken::Dot)) { ------------------ | Branch (1492:14): [True: 1.81k, False: 88.7k] ------------------ 1493| | // Treat '.' as a valid identifier in this context. 1494| 1.81k| Lex(); 1495| 1.81k| IDVal = "."; 1496| 88.7k| } else if (Lexer.is(AsmToken::LCurly)) { ------------------ | Branch (1496:14): [True: 4, False: 88.7k] ------------------ 1497| | // Treat '{' as a valid identifier in this context. 1498| 4| Lex(); 1499| 4| IDVal = "{"; 1500| 88.7k| } else if (Lexer.is(AsmToken::RCurly)) { ------------------ | Branch (1500:14): [True: 154, False: 88.5k] ------------------ 1501| | // Treat '}' as a valid identifier in this context. 1502| 154| Lex(); 1503| 154| IDVal = "}"; 1504| 88.5k| } else if (KsSyntax == KS_OPT_SYNTAX_NASM && Lexer.is(AsmToken::LBrac)) { ------------------ | Branch (1504:14): [True: 0, False: 88.5k] | Branch (1504:48): [True: 0, False: 0] ------------------ 1505| | // [bits xx] 1506| 0| Lex(); 1507| 0| ID = Lexer.getTok(); 1508| 0| if (ID.getString().lower() == "bits") { ------------------ | Branch (1508:9): [True: 0, False: 0] ------------------ 1509| 0| Lex(); 1510| 0| if (parseNasmDirectiveBits()) { ------------------ | Branch (1510:13): [True: 0, False: 0] ------------------ 1511| 0| Info.KsError = KS_ERR_ASM_DIRECTIVE_ID; 1512| 0| return true; 1513| 0| } else { 1514| 0| return false; 1515| 0| } 1516| 0| } else { 1517| 0| Info.KsError = KS_ERR_ASM_DIRECTIVE_ID; 1518| 0| return true; 1519| 0| } 1520| 88.5k| } else if (KsSyntax == KS_OPT_SYNTAX_NASM && isNasmDirective(ID.getString())) { ------------------ | Branch (1520:14): [True: 0, False: 88.5k] | Branch (1520:14): [True: 0, False: 88.5k] | Branch (1520:48): [True: 0, False: 0] ------------------ 1521| 0| Lex(); 1522| 0| IDVal = ID.getString(); 1523| 88.5k| } else if (parseIdentifier(IDVal)) { ------------------ | Branch (1523:14): [True: 598, False: 87.9k] ------------------ 1524| 598| if (!TheCondState.Ignore) { ------------------ | Branch (1524:9): [True: 52, False: 546] ------------------ 1525| | // return TokError("unexpected token at start of statement"); 1526| 52| Info.KsError = KS_ERR_ASM_STAT_TOKEN; 1527| 52| return true; 1528| 52| } 1529| 546| IDVal = ""; 1530| 546| } 1531| | 1532| | // Handle conditional assembly here before checking for skipping. We 1533| | // have to do this so that .endif isn't skipped in a ".if 0" block for 1534| | // example. 1535| | 1536| 90.6k| StringMap::const_iterator DirKindIt = 1537| 90.6k| DirectiveKindMap.find(IDVal.lower()); 1538| 90.6k| DirectiveKind DirKind = (DirKindIt == DirectiveKindMap.end()) ------------------ | Branch (1538:27): [True: 41.3k, False: 49.2k] ------------------ 1539| 90.6k| ? DK_NO_DIRECTIVE 1540| 90.6k| : DirKindIt->getValue(); 1541| 90.6k| switch (DirKind) { 1542| 85.6k| default: ------------------ | Branch (1542:3): [True: 85.6k, False: 5.03k] ------------------ 1543| 85.6k| break; 1544| 85.6k| case DK_IF: ------------------ | Branch (1544:3): [True: 23, False: 90.6k] ------------------ 1545| 23| case DK_IFEQ: ------------------ | Branch (1545:3): [True: 0, False: 90.6k] ------------------ 1546| 224| case DK_IFGE: ------------------ | Branch (1546:3): [True: 201, False: 90.4k] ------------------ 1547| 352| case DK_IFGT: ------------------ | Branch (1547:3): [True: 128, False: 90.5k] ------------------ 1548| 480| case DK_IFLE: ------------------ | Branch (1548:3): [True: 128, False: 90.5k] ------------------ 1549| 480| case DK_IFLT: ------------------ | Branch (1549:3): [True: 0, False: 90.6k] ------------------ 1550| 480| case DK_IFNE: ------------------ | Branch (1550:3): [True: 0, False: 90.6k] ------------------ 1551| 480| return parseDirectiveIf(IDLoc, DirKind); 1552| 1.60k| case DK_IFB: ------------------ | Branch (1552:3): [True: 1.60k, False: 89.0k] ------------------ 1553| 1.60k| return parseDirectiveIfb(IDLoc, true); 1554| 0| case DK_IFNB: ------------------ | Branch (1554:3): [True: 0, False: 90.6k] ------------------ 1555| 0| return parseDirectiveIfb(IDLoc, false); 1556| 206| case DK_IFC: ------------------ | Branch (1556:3): [True: 206, False: 90.4k] ------------------ 1557| 206| return parseDirectiveIfc(IDLoc, true); 1558| 0| case DK_IFEQS: ------------------ | Branch (1558:3): [True: 0, False: 90.6k] ------------------ 1559| 0| return parseDirectiveIfeqs(IDLoc, true); 1560| 312| case DK_IFNC: ------------------ | Branch (1560:3): [True: 312, False: 90.3k] ------------------ 1561| 312| return parseDirectiveIfc(IDLoc, false); 1562| 70| case DK_IFNES: ------------------ | Branch (1562:3): [True: 70, False: 90.5k] ------------------ 1563| 70| return parseDirectiveIfeqs(IDLoc, false); 1564| 232| case DK_IFDEF: ------------------ | Branch (1564:3): [True: 232, False: 90.4k] ------------------ 1565| 232| return parseDirectiveIfdef(IDLoc, true); 1566| 255| case DK_IFNDEF: ------------------ | Branch (1566:3): [True: 255, False: 90.3k] ------------------ 1567| 255| case DK_IFNOTDEF: ------------------ | Branch (1567:3): [True: 0, False: 90.6k] ------------------ 1568| 255| return parseDirectiveIfdef(IDLoc, false); 1569| 1.55k| case DK_ELSEIF: ------------------ | Branch (1569:3): [True: 1.55k, False: 89.0k] ------------------ 1570| 1.55k| return parseDirectiveElseIf(IDLoc); 1571| 152| case DK_ELSE: ------------------ | Branch (1571:3): [True: 152, False: 90.4k] ------------------ 1572| 152| return parseDirectiveElse(IDLoc); 1573| 162| case DK_ENDIF: ------------------ | Branch (1573:3): [True: 162, False: 90.4k] ------------------ 1574| 162| return parseDirectiveEndIf(IDLoc); 1575| 90.6k| } 1576| | 1577| | // Ignore the statement if in the middle of inactive conditional 1578| | // (e.g. ".if 0"). 1579| 85.6k| if (TheCondState.Ignore) { ------------------ | Branch (1579:7): [True: 7.02k, False: 78.5k] ------------------ 1580| 7.02k| eatToEndOfStatement(); 1581| 7.02k| return false; 1582| 7.02k| } 1583| | 1584| | // FIXME: Recurse on local labels? 1585| | 1586| | // See what kind of statement we have. 1587| 78.5k| switch (Lexer.getKind()) { 1588| 134| case AsmToken::Colon: { ------------------ | Branch (1588:3): [True: 134, False: 78.4k] ------------------ 1589| 134| bool valid; 1590| 134| if (!getTargetParser().isLabel(ID, valid)) ------------------ | Branch (1590:9): [True: 0, False: 134] ------------------ 1591| 0| break; 1592| 134| if (!valid) { ------------------ | Branch (1592:9): [True: 0, False: 134] ------------------ 1593| 0| Info.KsError = KS_ERR_ASM_LABEL_INVALID; 1594| 0| return true; 1595| 0| } 1596| 134| checkForValidSection(); 1597| | 1598| | // identifier ':' -> Label. 1599| 134| Lex(); 1600| | 1601| | // Diagnose attempt to use '.' as a label. 1602| 134| if (IDVal == ".") { ------------------ | Branch (1602:9): [True: 131, False: 3] ------------------ 1603| | //return Error(IDLoc, "invalid use of pseudo-symbol '.' as a label"); 1604| 131| KsError = KS_ERR_ASM_INVALIDOPERAND; 1605| 131| return true; 1606| 131| } 1607| | 1608| | // Diagnose attempt to use a variable as a label. 1609| | // 1610| | // FIXME: Diagnostics. Note the location of the definition as a label. 1611| | // FIXME: This doesn't diagnose assignment to a symbol which has been 1612| | // implicitly marked as external. 1613| 3| MCSymbol *Sym; 1614| 3| if (LocalLabelVal == -1) { ------------------ | Branch (1614:9): [True: 3, False: 0] ------------------ 1615| 3| if (ParsingInlineAsm && SI) { ------------------ | Branch (1615:11): [True: 0, False: 3] | Branch (1615:31): [True: 0, False: 0] ------------------ 1616| 0| StringRef RewrittenLabel = 1617| 0| SI->LookupInlineAsmLabel(IDVal, getSourceManager(), IDLoc, true); 1618| 0| assert(RewrittenLabel.size() && ------------------ | Branch (1618:9): [True: 0, False: 0] | Branch (1618:9): [True: 0, Folded] | Branch (1618:9): [True: 0, False: 0] ------------------ 1619| 0| "We should have an internal name here."); 1620| 0| Info.AsmRewrites->emplace_back(AOK_Label, IDLoc, IDVal.size(), 1621| 0| RewrittenLabel); 1622| 0| IDVal = RewrittenLabel; 1623| 0| } 1624| 3| if (IDVal.empty()) { ------------------ | Branch (1624:11): [True: 0, False: 3] ------------------ 1625| 0| return true; 1626| 0| } 1627| 3| Sym = getContext().getOrCreateSymbol(IDVal); 1628| 3| } else { 1629| 0| bool valid; 1630| 0| Sym = Ctx.createDirectionalLocalSymbol(LocalLabelVal, valid); 1631| 0| if (!valid) { ------------------ | Branch (1631:11): [True: 0, False: 0] ------------------ 1632| 0| Info.KsError = KS_ERR_ASM_LABEL_INVALID; 1633| 0| return true; 1634| 0| } 1635| 0| } 1636| | 1637| 3| Sym->redefineIfPossible(); 1638| | 1639| 3| if (!Sym->isUndefined() || Sym->isVariable()) { ------------------ | Branch (1639:9): [True: 0, False: 3] | Branch (1639:32): [True: 0, False: 3] ------------------ 1640| | //return Error(IDLoc, "invalid symbol redefinition"); 1641| 0| Info.KsError = KS_ERR_ASM_SYMBOL_REDEFINED; 1642| 0| return true; 1643| 0| } 1644| | 1645| | // Emit the label. 1646| 3| if (!ParsingInlineAsm) ------------------ | Branch (1646:9): [True: 3, False: 0] ------------------ 1647| 3| Out.EmitLabel(Sym); 1648| | 1649| 3| getTargetParser().onLabelParsed(Sym); 1650| | 1651| | // Consume any end of statement token, if present, to avoid spurious 1652| | // AddBlankLine calls(). 1653| 3| if (Lexer.is(AsmToken::EndOfStatement)) { ------------------ | Branch (1653:9): [True: 1, False: 2] ------------------ 1654| 1| Lex(); 1655| 1| if (Lexer.is(AsmToken::Eof)) ------------------ | Branch (1655:11): [True: 0, False: 1] ------------------ 1656| 0| return false; 1657| 1| } 1658| | 1659| 3| return false; 1660| 3| } 1661| | 1662| 3.47k| case AsmToken::Equal: ------------------ | Branch (1662:3): [True: 3.47k, False: 75.1k] ------------------ 1663| 3.47k| if (!getTargetParser().equalIsAsmAssignment()) ------------------ | Branch (1663:9): [True: 0, False: 3.47k] ------------------ 1664| 0| break; 1665| | // identifier '=' ... -> assignment statement 1666| 3.47k| Lex(); 1667| | 1668| 3.47k| if (parseAssignment(IDVal, true)) { ------------------ | Branch (1668:9): [True: 1.67k, False: 1.80k] ------------------ 1669| 1.67k| Info.KsError = KS_ERR_ASM_DIRECTIVE_EQU; 1670| 1.67k| return true; 1671| 1.67k| } 1672| 1.80k| return false; 1673| | 1674| 74.9k| default: // Normal instruction or directive. ------------------ | Branch (1674:3): [True: 74.9k, False: 3.60k] ------------------ 1675| 74.9k| break; 1676| 78.5k| } 1677| | 1678| | // If macros are enabled, check to see if this is a macro instantiation. 1679| 74.9k| if (areMacrosEnabled()) ------------------ | Branch (1679:7): [True: 74.9k, False: 0] ------------------ 1680| 74.9k| if (const MCAsmMacro *M = lookupMacro(IDVal)) { ------------------ | Branch (1680:27): [True: 289, False: 74.6k] ------------------ 1681| 289| return handleMacroEntry(M, IDLoc); 1682| 289| } 1683| | 1684| | // Otherwise, we have a normal instruction or directive. 1685| 74.6k| if (isDirective(IDVal)) { ------------------ | Branch (1685:7): [True: 66.1k, False: 8.58k] ------------------ 1686| | // There are several entities interested in parsing directives: 1687| | // 1688| | // 1. The target-specific assembly parser. Some directives are target 1689| | // specific or may potentially behave differently on certain targets. 1690| | // 2. Asm parser extensions. For example, platform-specific parsers 1691| | // (like the ELF parser) register themselves as extensions. 1692| | // 3. The generic directive parser implemented by this class. These are 1693| | // all the directives that behave in a target and platform independent 1694| | // manner, or at least have a default behavior that's shared between 1695| | // all targets and platforms. 1696| | 1697| | // First query the target-specific parser. It will return 'true' if it 1698| | // isn't interested in this directive. 1699| 66.1k| uint64_t BytesInFragment = getStreamer().getCurrentFragmentSize(); 1700| 66.1k| if (!getTargetParser().ParseDirective(ID)){ ------------------ | Branch (1700:11): [True: 30.8k, False: 35.2k] ------------------ 1701| | // increment the address for the next statement if the directive 1702| | // has emitted any value to the streamer. 1703| 30.8k| Address += getStreamer().getCurrentFragmentSize() - BytesInFragment; 1704| 30.8k| return false; 1705| 30.8k| } 1706| | 1707| | // Next, check the extension directive map to see if any extension has 1708| | // registered itself to parse this directive. 1709| 35.2k| std::pair Handler = 1710| 35.2k| ExtensionDirectiveMap.lookup(IDVal); 1711| 35.2k| if (Handler.first) ------------------ | Branch (1711:9): [True: 6.48k, False: 28.8k] ------------------ 1712| 6.48k| return (*Handler.second)(Handler.first, IDVal, IDLoc); 1713| | 1714| | // Finally, if no one else is interested in this directive, it must be 1715| | // generic and familiar to this class. 1716| 28.8k| switch (DirKind) { 1717| 6.67k| default: ------------------ | Branch (1717:5): [True: 6.67k, False: 22.1k] ------------------ 1718| 6.67k| break; 1719| 6.67k| case DK_SET: ------------------ | Branch (1719:5): [True: 3.60k, False: 25.2k] ------------------ 1720| 3.60k| case DK_EQU: ------------------ | Branch (1720:5): [True: 0, False: 28.8k] ------------------ 1721| 3.60k| return parseDirectiveSet(IDVal, true); 1722| 0| case DK_EQUIV: ------------------ | Branch (1722:5): [True: 0, False: 28.8k] ------------------ 1723| 0| return parseDirectiveSet(IDVal, false); 1724| 0| case DK_ASCII: ------------------ | Branch (1724:5): [True: 0, False: 28.8k] ------------------ 1725| 0| return parseDirectiveAscii(IDVal, false); 1726| 0| case DK_ASCIZ: ------------------ | Branch (1726:5): [True: 0, False: 28.8k] ------------------ 1727| 458| case DK_STRING: ------------------ | Branch (1727:5): [True: 458, False: 28.3k] ------------------ 1728| 458| return parseDirectiveAscii(IDVal, true); 1729| 0| case DK_BYTE: ------------------ | Branch (1729:5): [True: 0, False: 28.8k] ------------------ 1730| 0| return parseDirectiveValue(1, Info.KsError); 1731| 0| case DK_SHORT: ------------------ | Branch (1731:5): [True: 0, False: 28.8k] ------------------ 1732| 0| case DK_VALUE: ------------------ | Branch (1732:5): [True: 0, False: 28.8k] ------------------ 1733| 0| case DK_2BYTE: ------------------ | Branch (1733:5): [True: 0, False: 28.8k] ------------------ 1734| 0| return parseDirectiveValue(2, Info.KsError); 1735| 0| case DK_LONG: ------------------ | Branch (1735:5): [True: 0, False: 28.8k] ------------------ 1736| 211| case DK_INT: ------------------ | Branch (1736:5): [True: 211, False: 28.5k] ------------------ 1737| 218| case DK_4BYTE: ------------------ | Branch (1737:5): [True: 7, False: 28.7k] ------------------ 1738| 218| return parseDirectiveValue(4, Info.KsError); 1739| 0| case DK_QUAD: ------------------ | Branch (1739:5): [True: 0, False: 28.8k] ------------------ 1740| 0| case DK_8BYTE: ------------------ | Branch (1740:5): [True: 0, False: 28.8k] ------------------ 1741| 0| return parseDirectiveValue(8, Info.KsError); 1742| 10| case DK_OCTA: ------------------ | Branch (1742:5): [True: 10, False: 28.7k] ------------------ 1743| 10| return parseDirectiveOctaValue(Info.KsError); 1744| 0| case DK_SINGLE: ------------------ | Branch (1744:5): [True: 0, False: 28.8k] ------------------ 1745| 436| case DK_FLOAT: ------------------ | Branch (1745:5): [True: 436, False: 28.3k] ------------------ 1746| 436| return parseDirectiveRealValue(APFloat::IEEEsingle); 1747| 0| case DK_DOUBLE: ------------------ | Branch (1747:5): [True: 0, False: 28.8k] ------------------ 1748| 0| return parseDirectiveRealValue(APFloat::IEEEdouble); 1749| 249| case DK_ALIGN: { ------------------ | Branch (1749:5): [True: 249, False: 28.5k] ------------------ 1750| 249| bool IsPow2 = !getContext().getAsmInfo()->getAlignmentIsInBytes(); 1751| 249| return parseDirectiveAlign(IsPow2, /*ExprSize=*/1); 1752| 0| } 1753| 0| case DK_ALIGN32: { ------------------ | Branch (1753:5): [True: 0, False: 28.8k] ------------------ 1754| 0| bool IsPow2 = !getContext().getAsmInfo()->getAlignmentIsInBytes(); 1755| 0| return parseDirectiveAlign(IsPow2, /*ExprSize=*/4); 1756| 0| } 1757| 228| case DK_BALIGN: ------------------ | Branch (1757:5): [True: 228, False: 28.5k] ------------------ 1758| 228| return parseDirectiveAlign(/*IsPow2=*/false, /*ExprSize=*/1); 1759| 52| case DK_BALIGNW: ------------------ | Branch (1759:5): [True: 52, False: 28.7k] ------------------ 1760| 52| return parseDirectiveAlign(/*IsPow2=*/false, /*ExprSize=*/2); 1761| 69| case DK_BALIGNL: ------------------ | Branch (1761:5): [True: 69, False: 28.7k] ------------------ 1762| 69| return parseDirectiveAlign(/*IsPow2=*/false, /*ExprSize=*/4); 1763| 0| case DK_P2ALIGN: ------------------ | Branch (1763:5): [True: 0, False: 28.8k] ------------------ 1764| 0| return parseDirectiveAlign(/*IsPow2=*/true, /*ExprSize=*/1); 1765| 0| case DK_P2ALIGNW: ------------------ | Branch (1765:5): [True: 0, False: 28.8k] ------------------ 1766| 0| return parseDirectiveAlign(/*IsPow2=*/true, /*ExprSize=*/2); 1767| 0| case DK_P2ALIGNL: ------------------ | Branch (1767:5): [True: 0, False: 28.8k] ------------------ 1768| 0| return parseDirectiveAlign(/*IsPow2=*/true, /*ExprSize=*/4); 1769| 546| case DK_ORG: ------------------ | Branch (1769:5): [True: 546, False: 28.2k] ------------------ 1770| 546| return parseDirectiveOrg(); 1771| 1.12k| case DK_FILL: ------------------ | Branch (1771:5): [True: 1.12k, False: 27.6k] ------------------ 1772| 1.12k| return parseDirectiveFill(); 1773| 19| case DK_ZERO: ------------------ | Branch (1773:5): [True: 19, False: 28.7k] ------------------ 1774| 19| return parseDirectiveZero(); 1775| 0| case DK_EXTERN: ------------------ | Branch (1775:5): [True: 0, False: 28.8k] ------------------ 1776| 0| eatToEndOfStatement(); // .extern is the default, ignore it. 1777| 0| return false; 1778| 0| case DK_GLOBL: ------------------ | Branch (1778:5): [True: 0, False: 28.8k] ------------------ 1779| 0| case DK_GLOBAL: ------------------ | Branch (1779:5): [True: 0, False: 28.8k] ------------------ 1780| 0| return parseDirectiveSymbolAttribute(MCSA_Global); 1781| 0| case DK_LAZY_REFERENCE: ------------------ | Branch (1781:5): [True: 0, False: 28.8k] ------------------ 1782| 0| return parseDirectiveSymbolAttribute(MCSA_LazyReference); 1783| 0| case DK_NO_DEAD_STRIP: ------------------ | Branch (1783:5): [True: 0, False: 28.8k] ------------------ 1784| 0| return parseDirectiveSymbolAttribute(MCSA_NoDeadStrip); 1785| 0| case DK_SYMBOL_RESOLVER: ------------------ | Branch (1785:5): [True: 0, False: 28.8k] ------------------ 1786| 0| return parseDirectiveSymbolAttribute(MCSA_SymbolResolver); 1787| 0| case DK_PRIVATE_EXTERN: ------------------ | Branch (1787:5): [True: 0, False: 28.8k] ------------------ 1788| 0| return parseDirectiveSymbolAttribute(MCSA_PrivateExtern); 1789| 0| case DK_REFERENCE: ------------------ | Branch (1789:5): [True: 0, False: 28.8k] ------------------ 1790| 0| return parseDirectiveSymbolAttribute(MCSA_Reference); 1791| 0| case DK_WEAK_DEFINITION: ------------------ | Branch (1791:5): [True: 0, False: 28.8k] ------------------ 1792| 0| return parseDirectiveSymbolAttribute(MCSA_WeakDefinition); 1793| 0| case DK_WEAK_REFERENCE: ------------------ | Branch (1793:5): [True: 0, False: 28.8k] ------------------ 1794| 0| return parseDirectiveSymbolAttribute(MCSA_WeakReference); 1795| 0| case DK_WEAK_DEF_CAN_BE_HIDDEN: ------------------ | Branch (1795:5): [True: 0, False: 28.8k] ------------------ 1796| 0| return parseDirectiveSymbolAttribute(MCSA_WeakDefAutoPrivate); 1797| 14| case DK_COMM: ------------------ | Branch (1797:5): [True: 14, False: 28.7k] ------------------ 1798| 14| case DK_COMMON: ------------------ | Branch (1798:5): [True: 0, False: 28.8k] ------------------ 1799| 14| return parseDirectiveComm(/*IsLocal=*/false); 1800| 64| case DK_LCOMM: ------------------ | Branch (1800:5): [True: 64, False: 28.7k] ------------------ 1801| 64| return parseDirectiveComm(/*IsLocal=*/true); 1802| 0| case DK_ABORT: ------------------ | Branch (1802:5): [True: 0, False: 28.8k] ------------------ 1803| 0| return parseDirectiveAbort(); 1804| 92| case DK_INCLUDE: ------------------ | Branch (1804:5): [True: 92, False: 28.7k] ------------------ 1805| 92| return parseDirectiveInclude(); 1806| 0| case DK_INCBIN: ------------------ | Branch (1806:5): [True: 0, False: 28.8k] ------------------ 1807| 0| return parseDirectiveIncbin(); 1808| 0| case DK_CODE16: ------------------ | Branch (1808:5): [True: 0, False: 28.8k] ------------------ 1809| 0| case DK_CODE16GCC: ------------------ | Branch (1809:5): [True: 0, False: 28.8k] ------------------ 1810| | // return TokError(Twine(IDVal) + " not supported yet"); 1811| 0| Info.KsError = KS_ERR_ASM_UNSUPPORTED; 1812| 0| return true; 1813| 119| case DK_REPT: ------------------ | Branch (1813:5): [True: 119, False: 28.6k] ------------------ 1814| 119| return parseDirectiveRept(IDLoc, IDVal); 1815| 7.14k| case DK_IRP: ------------------ | Branch (1815:5): [True: 7.14k, False: 21.6k] ------------------ 1816| 7.14k| return parseDirectiveIrp(IDLoc); 1817| 121| case DK_IRPC: ------------------ | Branch (1817:5): [True: 121, False: 28.6k] ------------------ 1818| 121| return parseDirectiveIrpc(IDLoc); 1819| 353| case DK_ENDR: ------------------ | Branch (1819:5): [True: 353, False: 28.4k] ------------------ 1820| 353| return parseDirectiveEndr(IDLoc); 1821| 0| case DK_BUNDLE_ALIGN_MODE: ------------------ | Branch (1821:5): [True: 0, False: 28.8k] ------------------ 1822| 0| return parseDirectiveBundleAlignMode(); 1823| 0| case DK_BUNDLE_LOCK: ------------------ | Branch (1823:5): [True: 0, False: 28.8k] ------------------ 1824| 0| return parseDirectiveBundleLock(); 1825| 0| case DK_BUNDLE_UNLOCK: ------------------ | Branch (1825:5): [True: 0, False: 28.8k] ------------------ 1826| 0| return parseDirectiveBundleUnlock(); 1827| 0| case DK_SLEB128: ------------------ | Branch (1827:5): [True: 0, False: 28.8k] ------------------ 1828| 0| return parseDirectiveLEB128(true); 1829| 0| case DK_ULEB128: ------------------ | Branch (1829:5): [True: 0, False: 28.8k] ------------------ 1830| 0| return parseDirectiveLEB128(false); 1831| 150| case DK_SPACE: ------------------ | Branch (1831:5): [True: 150, False: 28.6k] ------------------ 1832| 1.05k| case DK_SKIP: ------------------ | Branch (1832:5): [True: 909, False: 27.8k] ------------------ 1833| 1.05k| return parseDirectiveSpace(IDVal); 1834| 527| case DK_FILE: ------------------ | Branch (1834:5): [True: 527, False: 28.2k] ------------------ 1835| 527| return parseDirectiveFile(IDLoc); 1836| 718| case DK_LINE: ------------------ | Branch (1836:5): [True: 718, False: 28.0k] ------------------ 1837| 718| return parseDirectiveLine(); 1838| 1| case DK_LOC: ------------------ | Branch (1838:5): [True: 1, False: 28.7k] ------------------ 1839| 1| return parseDirectiveLoc(); 1840| 0| case DK_STABS: ------------------ | Branch (1840:5): [True: 0, False: 28.8k] ------------------ 1841| 0| return parseDirectiveStabs(); 1842| 0| case DK_CV_FILE: ------------------ | Branch (1842:5): [True: 0, False: 28.8k] ------------------ 1843| 0| return parseDirectiveCVFile(); 1844| 0| case DK_CV_LOC: ------------------ | Branch (1844:5): [True: 0, False: 28.8k] ------------------ 1845| 0| return parseDirectiveCVLoc(); 1846| 0| case DK_CV_LINETABLE: ------------------ | Branch (1846:5): [True: 0, False: 28.8k] ------------------ 1847| 0| return parseDirectiveCVLinetable(); 1848| 0| case DK_CV_INLINE_LINETABLE: ------------------ | Branch (1848:5): [True: 0, False: 28.8k] ------------------ 1849| 0| return parseDirectiveCVInlineLinetable(); 1850| 0| case DK_CV_STRINGTABLE: ------------------ | Branch (1850:5): [True: 0, False: 28.8k] ------------------ 1851| 0| return parseDirectiveCVStringTable(); 1852| 0| case DK_CV_FILECHECKSUMS: ------------------ | Branch (1852:5): [True: 0, False: 28.8k] ------------------ 1853| 0| return parseDirectiveCVFileChecksums(); 1854| 0| case DK_CFI_SECTIONS: ------------------ | Branch (1854:5): [True: 0, False: 28.8k] ------------------ 1855| 0| return parseDirectiveCFISections(); 1856| 0| case DK_CFI_STARTPROC: ------------------ | Branch (1856:5): [True: 0, False: 28.8k] ------------------ 1857| 0| return parseDirectiveCFIStartProc(); 1858| 0| case DK_CFI_ENDPROC: ------------------ | Branch (1858:5): [True: 0, False: 28.8k] ------------------ 1859| 0| return parseDirectiveCFIEndProc(); 1860| 0| case DK_CFI_DEF_CFA: ------------------ | Branch (1860:5): [True: 0, False: 28.8k] ------------------ 1861| 0| return parseDirectiveCFIDefCfa(IDLoc); 1862| 0| case DK_CFI_DEF_CFA_OFFSET: ------------------ | Branch (1862:5): [True: 0, False: 28.8k] ------------------ 1863| 0| return parseDirectiveCFIDefCfaOffset(); 1864| 0| case DK_CFI_ADJUST_CFA_OFFSET: ------------------ | Branch (1864:5): [True: 0, False: 28.8k] ------------------ 1865| 0| return parseDirectiveCFIAdjustCfaOffset(); 1866| 0| case DK_CFI_DEF_CFA_REGISTER: ------------------ | Branch (1866:5): [True: 0, False: 28.8k] ------------------ 1867| 0| return parseDirectiveCFIDefCfaRegister(IDLoc); 1868| 0| case DK_CFI_OFFSET: ------------------ | Branch (1868:5): [True: 0, False: 28.8k] ------------------ 1869| 0| return parseDirectiveCFIOffset(IDLoc); 1870| 0| case DK_CFI_REL_OFFSET: ------------------ | Branch (1870:5): [True: 0, False: 28.8k] ------------------ 1871| 0| return parseDirectiveCFIRelOffset(IDLoc); 1872| 0| case DK_CFI_PERSONALITY: ------------------ | Branch (1872:5): [True: 0, False: 28.8k] ------------------ 1873| 0| return parseDirectiveCFIPersonalityOrLsda(true); 1874| 0| case DK_CFI_LSDA: ------------------ | Branch (1874:5): [True: 0, False: 28.8k] ------------------ 1875| 0| return parseDirectiveCFIPersonalityOrLsda(false); 1876| 0| case DK_CFI_REMEMBER_STATE: ------------------ | Branch (1876:5): [True: 0, False: 28.8k] ------------------ 1877| 0| return parseDirectiveCFIRememberState(); 1878| 0| case DK_CFI_RESTORE_STATE: ------------------ | Branch (1878:5): [True: 0, False: 28.8k] ------------------ 1879| 0| return parseDirectiveCFIRestoreState(); 1880| 0| case DK_CFI_SAME_VALUE: ------------------ | Branch (1880:5): [True: 0, False: 28.8k] ------------------ 1881| 0| return parseDirectiveCFISameValue(IDLoc); 1882| 0| case DK_CFI_RESTORE: ------------------ | Branch (1882:5): [True: 0, False: 28.8k] ------------------ 1883| 0| return parseDirectiveCFIRestore(IDLoc); 1884| 0| case DK_CFI_ESCAPE: ------------------ | Branch (1884:5): [True: 0, False: 28.8k] ------------------ 1885| 0| return parseDirectiveCFIEscape(); 1886| 0| case DK_CFI_SIGNAL_FRAME: ------------------ | Branch (1886:5): [True: 0, False: 28.8k] ------------------ 1887| 0| return parseDirectiveCFISignalFrame(); 1888| 0| case DK_CFI_UNDEFINED: ------------------ | Branch (1888:5): [True: 0, False: 28.8k] ------------------ 1889| 0| return parseDirectiveCFIUndefined(IDLoc); 1890| 0| case DK_CFI_REGISTER: ------------------ | Branch (1890:5): [True: 0, False: 28.8k] ------------------ 1891| 0| return parseDirectiveCFIRegister(IDLoc); 1892| 0| case DK_CFI_WINDOW_SAVE: ------------------ | Branch (1892:5): [True: 0, False: 28.8k] ------------------ 1893| 0| return parseDirectiveCFIWindowSave(); 1894| 0| case DK_MACROS_ON: ------------------ | Branch (1894:5): [True: 0, False: 28.8k] ------------------ 1895| 0| case DK_MACROS_OFF: ------------------ | Branch (1895:5): [True: 0, False: 28.8k] ------------------ 1896| 0| return parseDirectiveMacrosOnOff(IDVal); 1897| 319| case DK_MACRO: ------------------ | Branch (1897:5): [True: 319, False: 28.4k] ------------------ 1898| 319| return parseDirectiveMacro(IDLoc); 1899| 0| case DK_EXITM: ------------------ | Branch (1899:5): [True: 0, False: 28.8k] ------------------ 1900| 0| return parseDirectiveExitMacro(IDVal); 1901| 156| case DK_ENDM: ------------------ | Branch (1901:5): [True: 156, False: 28.6k] ------------------ 1902| 211| case DK_ENDMACRO: ------------------ | Branch (1902:5): [True: 55, False: 28.7k] ------------------ 1903| 211| return parseDirectiveEndMacro(IDVal); 1904| 0| case DK_PURGEM: ------------------ | Branch (1904:5): [True: 0, False: 28.8k] ------------------ 1905| 0| return parseDirectivePurgeMacro(IDLoc); 1906| 0| case DK_END: ------------------ | Branch (1906:5): [True: 0, False: 28.8k] ------------------ 1907| 0| return parseDirectiveEnd(IDLoc); 1908| 0| case DK_ERR: ------------------ | Branch (1908:5): [True: 0, False: 28.8k] ------------------ 1909| 0| return parseDirectiveError(IDLoc, false); 1910| 29| case DK_ERROR: ------------------ | Branch (1910:5): [True: 29, False: 28.7k] ------------------ 1911| 29| return parseDirectiveError(IDLoc, true); 1912| 4.06k| case DK_WARNING: ------------------ | Branch (1912:5): [True: 4.06k, False: 24.7k] ------------------ 1913| 4.06k| return parseDirectiveWarning(IDLoc); 1914| 288| case DK_RELOC: ------------------ | Branch (1914:5): [True: 288, False: 28.5k] ------------------ 1915| 288| return parseDirectiveReloc(IDLoc); 1916| 0| case DK_NASM_BITS: ------------------ | Branch (1916:5): [True: 0, False: 28.8k] ------------------ 1917| 0| if (parseNasmDirectiveBits()) { ------------------ | Branch (1917:11): [True: 0, False: 0] ------------------ 1918| 0| Info.KsError = KS_ERR_ASM_DIRECTIVE_ID; 1919| 0| return true; 1920| 0| } else { 1921| 0| return false; 1922| 0| } 1923| 0| case DK_NASM_USE32: ------------------ | Branch (1923:5): [True: 0, False: 28.8k] ------------------ 1924| 0| return parseNasmDirectiveUse32(); 1925| 0| case DK_NASM_DEFAULT: ------------------ | Branch (1925:5): [True: 0, False: 28.8k] ------------------ 1926| 0| if (parseNasmDirectiveDefault()) { ------------------ | Branch (1926:11): [True: 0, False: 0] ------------------ 1927| 0| Info.KsError = KS_ERR_ASM_DIRECTIVE_ID; 1928| 0| return true; 1929| 0| } else { 1930| 0| return false; 1931| 0| } 1932| 28.8k| } 1933| | 1934| | //return Error(IDLoc, "unknown directive"); 1935| 6.67k| KsError = KS_ERR_ASM_DIRECTIVE_UNKNOWN; 1936| 6.67k| return true; 1937| 28.8k| } 1938| | 1939| | // __asm _emit or __asm __emit 1940| 8.58k| if (ParsingInlineAsm && (IDVal == "_emit" || IDVal == "__emit" || ------------------ | Branch (1940:7): [True: 0, False: 8.58k] | Branch (1940:7): [True: 0, False: 8.58k] | Branch (1940:28): [True: 0, False: 0] | Branch (1940:48): [True: 0, False: 0] ------------------ 1941| 0| IDVal == "_EMIT" || IDVal == "__EMIT")) ------------------ | Branch (1941:28): [True: 0, False: 0] | Branch (1941:48): [True: 0, False: 0] ------------------ 1942| 0| return parseDirectiveMSEmit(IDLoc, Info, IDVal.size()); 1943| | 1944| | // __asm align 1945| 8.58k| if (ParsingInlineAsm && (IDVal == "align" || IDVal == "ALIGN")) ------------------ | Branch (1945:7): [True: 0, False: 8.58k] | Branch (1945:7): [True: 0, False: 8.58k] | Branch (1945:28): [True: 0, False: 0] | Branch (1945:48): [True: 0, False: 0] ------------------ 1946| 0| return parseDirectiveMSAlign(IDLoc, Info); 1947| | 1948| 8.58k| if (ParsingInlineAsm && (IDVal == "even")) ------------------ | Branch (1948:7): [True: 0, False: 8.58k] | Branch (1948:7): [True: 0, False: 8.58k] | Branch (1948:27): [True: 0, False: 0] ------------------ 1949| 0| Info.AsmRewrites->emplace_back(AOK_EVEN, IDLoc, 4); 1950| 8.58k| checkForValidSection(); 1951| | 1952| | // Canonicalize the opcode to lower case. 1953| 8.58k| std::string OpcodeStr = IDVal.lower(); 1954| 8.58k| ParseInstructionInfo IInfo(Info.AsmRewrites); 1955| | //printf(">> Going to ParseInstruction()\n"); 1956| 8.58k| bool HadError = getTargetParser().ParseInstruction(IInfo, OpcodeStr, ID, 1957| 8.58k| Info.ParsedOperands, Info.KsError); 1958| 8.58k| Info.ParseError = HadError; 1959| | 1960| | // If parsing succeeded, match the instruction. 1961| 8.58k| if (!HadError) { ------------------ | Branch (1961:7): [True: 4.27k, False: 4.30k] ------------------ 1962| 4.27k| uint64_t ErrorInfo; 1963| | //printf(">> Going to MatchAndEmitInstruction()\n"); 1964| 4.27k| return getTargetParser().MatchAndEmitInstruction(IDLoc, Info.Opcode, 1965| 4.27k| Info.ParsedOperands, Out, 1966| 4.27k| ErrorInfo, ParsingInlineAsm, 1967| 4.27k| Info.KsError, Address); 1968| 4.27k| } 1969| | 1970| 4.30k| return true; 1971| 8.58k|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser31parseCppHashLineFilenameCommentEN7llvm_ks5SMLocE: 1986| 15.6k|bool AsmParser::parseCppHashLineFilenameComment(SMLoc L) { 1987| 15.6k| Lex(); // Eat the hash token. 1988| | 1989| 15.6k| if (getLexer().isNot(AsmToken::Integer)) { ------------------ | Branch (1989:7): [True: 15.5k, False: 91] ------------------ 1990| | // Consume the line since in cases it is not a well-formed line directive, 1991| | // as if were simply a full line comment. 1992| 15.5k| eatToEndOfLine(); 1993| 15.5k| return false; 1994| 15.5k| } 1995| | 1996| 91| bool valid; 1997| 91| int64_t LineNumber = getTok().getIntVal(valid); 1998| 91| if (!valid) { ------------------ | Branch (1998:7): [True: 0, False: 91] ------------------ 1999| 0| return true; 2000| 0| } 2001| 91| Lex(); 2002| | 2003| 91| if (getLexer().isNot(AsmToken::String)) { ------------------ | Branch (2003:7): [True: 5, False: 86] ------------------ 2004| 5| eatToEndOfLine(); 2005| 5| return false; 2006| 5| } 2007| | 2008| 86| StringRef Filename = getTok().getString(); 2009| | // Get rid of the enclosing quotes. 2010| 86| Filename = Filename.substr(1, Filename.size() - 2); 2011| | 2012| | // Save the SMLoc, Filename and LineNumber for later use by diagnostics. 2013| 86| CppHashLoc = L; 2014| 86| CppHashFilename = Filename; 2015| 86| CppHashLineNumber = LineNumber; 2016| 86| CppHashBuf = CurBuffer; 2017| | 2018| | // Ignore any trailing characters, they're just comment. 2019| 86| eatToEndOfLine(); 2020| 86| return false; 2021| 91|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser14eatToEndOfLineEv: 1976| 15.6k|{ 1977| 15.6k| if (!Lexer.is(AsmToken::EndOfStatement)) ------------------ | Branch (1977:7): [True: 11.9k, False: 3.70k] ------------------ 1978| 11.9k| Lexer.LexUntilEndOfLine(); 1979| | // Eat EOL. 1980| 15.6k| Lex(); 1981| 15.6k|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser16parseDirectiveIfEN7llvm_ks5SMLocENS0_13DirectiveKindE: 4909| 480|{ 4910| 480| TheCondStack.push_back(TheCondState); 4911| 480| TheCondState.TheCond = AsmCond::IfCond; 4912| 480| if (TheCondState.Ignore) { ------------------ | Branch (4912:7): [True: 8, False: 472] ------------------ 4913| 8| eatToEndOfStatement(); 4914| 472| } else { 4915| 472| int64_t ExprValue; 4916| 472| if (parseAbsoluteExpression(ExprValue)) { ------------------ | Branch (4916:9): [True: 11, False: 461] ------------------ 4917| 11| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 4918| 11| return true; 4919| 11| } 4920| | 4921| 461| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (4921:9): [True: 15, False: 446] ------------------ 4922| | //return TokError("unexpected token in '.if' directive"); 4923| 15| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 4924| 15| return true; 4925| 15| } 4926| | 4927| 446| Lex(); 4928| | 4929| 446| switch (DirKind) { 4930| 0| default: ------------------ | Branch (4930:5): [True: 0, False: 446] ------------------ 4931| 0| llvm_unreachable("unsupported directive"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ 4932| 5| case DK_IF: ------------------ | Branch (4932:5): [True: 5, False: 441] ------------------ 4933| 5| case DK_IFNE: ------------------ | Branch (4933:5): [True: 0, False: 446] ------------------ 4934| 5| break; 4935| 0| case DK_IFEQ: ------------------ | Branch (4935:5): [True: 0, False: 446] ------------------ 4936| 0| ExprValue = ExprValue == 0; 4937| 0| break; 4938| 201| case DK_IFGE: ------------------ | Branch (4938:5): [True: 201, False: 245] ------------------ 4939| 201| ExprValue = ExprValue >= 0; 4940| 201| break; 4941| 128| case DK_IFGT: ------------------ | Branch (4941:5): [True: 128, False: 318] ------------------ 4942| 128| ExprValue = ExprValue > 0; 4943| 128| break; 4944| 112| case DK_IFLE: ------------------ | Branch (4944:5): [True: 112, False: 334] ------------------ 4945| 112| ExprValue = ExprValue <= 0; 4946| 112| break; 4947| 0| case DK_IFLT: ------------------ | Branch (4947:5): [True: 0, False: 446] ------------------ 4948| 0| ExprValue = ExprValue < 0; 4949| 0| break; 4950| 446| } 4951| | 4952| 446| TheCondState.CondMet = ExprValue; 4953| 446| TheCondState.Ignore = !TheCondState.CondMet; 4954| 446| } 4955| | 4956| 454| return false; 4957| 480|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser17parseDirectiveIfbEN7llvm_ks5SMLocEb: 4962| 1.60k|{ 4963| 1.60k| TheCondStack.push_back(TheCondState); 4964| 1.60k| TheCondState.TheCond = AsmCond::IfCond; 4965| | 4966| 1.60k| if (TheCondState.Ignore) { ------------------ | Branch (4966:7): [True: 1.47k, False: 134] ------------------ 4967| 1.47k| eatToEndOfStatement(); 4968| 1.47k| } else { 4969| 134| StringRef Str = parseStringToEndOfStatement(); 4970| | 4971| 134| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (4971:9): [True: 0, False: 134] ------------------ 4972| | //return TokError("unexpected token in '.ifb' directive"); 4973| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 4974| 0| return true; 4975| 0| } 4976| | 4977| 134| Lex(); 4978| | 4979| 134| TheCondState.CondMet = ExpectBlank == Str.empty(); 4980| 134| TheCondState.Ignore = !TheCondState.CondMet; 4981| 134| } 4982| | 4983| 1.60k| return false; 4984| 1.60k|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser17parseDirectiveIfcEN7llvm_ks5SMLocEb: 4990| 518|{ 4991| 518| TheCondStack.push_back(TheCondState); 4992| 518| TheCondState.TheCond = AsmCond::IfCond; 4993| | 4994| 518| if (TheCondState.Ignore) { ------------------ | Branch (4994:7): [True: 0, False: 518] ------------------ 4995| 0| eatToEndOfStatement(); 4996| 518| } else { 4997| 518| StringRef Str1 = parseStringToComma(); 4998| | 4999| 518| if (getLexer().isNot(AsmToken::Comma)) { ------------------ | Branch (4999:9): [True: 9, False: 509] ------------------ 5000| | //return TokError("unexpected token in '.ifc' directive"); 5001| 9| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 5002| 9| return true; 5003| 9| } 5004| | 5005| 509| Lex(); 5006| | 5007| 509| StringRef Str2 = parseStringToEndOfStatement(); 5008| | 5009| 509| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (5009:9): [True: 0, False: 509] ------------------ 5010| | //return TokError("unexpected token in '.ifc' directive"); 5011| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 5012| 0| return true; 5013| 0| } 5014| | 5015| 509| Lex(); 5016| | 5017| 509| TheCondState.CondMet = ExpectEqual == (Str1.trim() == Str2.trim()); 5018| 509| TheCondState.Ignore = !TheCondState.CondMet; 5019| 509| } 5020| | 5021| 509| return false; 5022| 518|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser18parseStringToCommaEv: 802| 518|StringRef AsmParser::parseStringToComma() { 803| 518| const char *Start = getTok().getLoc().getPointer(); 804| | 805| 3.13k| while (Lexer.isNot(AsmToken::EndOfStatement) && ------------------ | Branch (805:10): [True: 3.12k, False: 9] ------------------ 806| 3.12k| Lexer.isNot(AsmToken::Comma) && Lexer.isNot(AsmToken::Eof)) ------------------ | Branch (806:10): [True: 2.61k, False: 509] | Branch (806:42): [True: 2.61k, False: 0] ------------------ 807| 2.61k| Lex(); 808| | 809| 518| const char *End = getTok().getLoc().getPointer(); 810| 518| return StringRef(Start, End - Start); 811| 518|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser19parseDirectiveIfeqsEN7llvm_ks5SMLocEb: 5027| 70|{ 5028| 70| if (Lexer.isNot(AsmToken::String)) { ------------------ | Branch (5028:7): [True: 5, False: 65] ------------------ 5029| | //if (ExpectEqual) 5030| | // TokError("expected string parameter for '.ifeqs' directive"); 5031| | //else 5032| | // TokError("expected string parameter for '.ifnes' directive"); 5033| 5| eatToEndOfStatement(); 5034| 5| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 5035| 5| return true; 5036| 5| } 5037| | 5038| 65| bool valid; 5039| 65| StringRef String1 = getTok().getStringContents(valid); 5040| 65| if (!valid) { ------------------ | Branch (5040:7): [True: 0, False: 65] ------------------ 5041| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 5042| 0| return true; 5043| 0| } 5044| | 5045| 65| Lex(); 5046| | 5047| 65| if (Lexer.isNot(AsmToken::Comma)) { ------------------ | Branch (5047:7): [True: 1, False: 64] ------------------ 5048| | //if (ExpectEqual) 5049| | // TokError("expected comma after first string for '.ifeqs' directive"); 5050| | //else 5051| | // TokError("expected comma after first string for '.ifnes' directive"); 5052| 1| eatToEndOfStatement(); 5053| 1| return true; 5054| 1| } 5055| | 5056| 64| Lex(); 5057| | 5058| 64| if (Lexer.isNot(AsmToken::String)) { ------------------ | Branch (5058:7): [True: 0, False: 64] ------------------ 5059| | //if (ExpectEqual) 5060| | // TokError("expected string parameter for '.ifeqs' directive"); 5061| | //else 5062| | // TokError("expected string parameter for '.ifnes' directive"); 5063| 0| eatToEndOfStatement(); 5064| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 5065| 0| return true; 5066| 0| } 5067| | 5068| 64| StringRef String2 = getTok().getStringContents(valid); 5069| 64| if (!valid) { ------------------ | Branch (5069:7): [True: 0, False: 64] ------------------ 5070| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 5071| 0| return true; 5072| 0| } 5073| | 5074| 64| Lex(); 5075| | 5076| 64| TheCondStack.push_back(TheCondState); 5077| 64| TheCondState.TheCond = AsmCond::IfCond; 5078| 64| TheCondState.CondMet = ExpectEqual == (String1 == String2); 5079| 64| TheCondState.Ignore = !TheCondState.CondMet; 5080| | 5081| 64| return false; 5082| 64|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser19parseDirectiveIfdefEN7llvm_ks5SMLocEb: 5086| 487|bool AsmParser::parseDirectiveIfdef(SMLoc DirectiveLoc, bool expect_defined) { 5087| 487| StringRef Name; 5088| 487| TheCondStack.push_back(TheCondState); 5089| 487| TheCondState.TheCond = AsmCond::IfCond; 5090| | 5091| 487| if (TheCondState.Ignore) { ------------------ | Branch (5091:7): [True: 229, False: 258] ------------------ 5092| 229| eatToEndOfStatement(); 5093| 258| } else { 5094| 258| if (parseIdentifier(Name)) { ------------------ | Branch (5094:9): [True: 2, False: 256] ------------------ 5095| | //return TokError("expected identifier after '.ifdef'"); 5096| 2| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 5097| 2| return true; 5098| 2| } 5099| | 5100| 256| Lex(); 5101| | 5102| 256| MCSymbol *Sym = getContext().lookupSymbol(Name); 5103| | 5104| 256| if (expect_defined) ------------------ | Branch (5104:9): [True: 3, False: 253] ------------------ 5105| 3| TheCondState.CondMet = (Sym && !Sym->isUndefined()); ------------------ | Branch (5105:31): [True: 0, False: 3] | Branch (5105:38): [True: 0, False: 0] ------------------ 5106| 253| else 5107| 253| TheCondState.CondMet = (!Sym || Sym->isUndefined()); ------------------ | Branch (5107:31): [True: 192, False: 61] | Branch (5107:39): [True: 61, False: 0] ------------------ 5108| 256| TheCondState.Ignore = !TheCondState.CondMet; 5109| 256| } 5110| | 5111| 485| return false; 5112| 487|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser20parseDirectiveElseIfEN7llvm_ks5SMLocE: 5117| 1.55k|{ 5118| 1.55k| if (TheCondState.TheCond != AsmCond::IfCond && ------------------ | Branch (5118:7): [True: 66, False: 1.48k] ------------------ 5119| 66| TheCondState.TheCond != AsmCond::ElseIfCond) { ------------------ | Branch (5119:7): [True: 20, False: 46] ------------------ 5120| | //Error(DirectiveLoc, "Encountered a .elseif that doesn't follow a .if or " 5121| | // " an .elseif"); 5122| 20| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 5123| 20| return true; 5124| 20| } 5125| | 5126| 1.53k| TheCondState.TheCond = AsmCond::ElseIfCond; 5127| | 5128| 1.53k| bool LastIgnoreState = false; 5129| 1.53k| if (!TheCondStack.empty()) ------------------ | Branch (5129:7): [True: 1.53k, False: 0] ------------------ 5130| 1.53k| LastIgnoreState = TheCondStack.back().Ignore; 5131| 1.53k| if (LastIgnoreState || TheCondState.CondMet) { ------------------ | Branch (5131:7): [True: 1.48k, False: 50] | Branch (5131:26): [True: 42, False: 8] ------------------ 5132| 1.52k| TheCondState.Ignore = true; 5133| 1.52k| eatToEndOfStatement(); 5134| 1.52k| } else { 5135| 8| int64_t ExprValue; 5136| 8| if (parseAbsoluteExpression(ExprValue)) { ------------------ | Branch (5136:9): [True: 0, False: 8] ------------------ 5137| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 5138| 0| return true; 5139| 0| } 5140| | 5141| 8| if (getLexer().isNot(AsmToken::EndOfStatement)) ------------------ | Branch (5141:9): [True: 0, False: 8] ------------------ 5142| | //return TokError("unexpected token in '.elseif' directive"); 5143| 0| return true; 5144| | 5145| 8| Lex(); 5146| 8| TheCondState.CondMet = ExprValue; 5147| 8| TheCondState.Ignore = !TheCondState.CondMet; 5148| 8| } 5149| | 5150| 1.53k| return false; 5151| 1.53k|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser18parseDirectiveElseEN7llvm_ks5SMLocE: 5156| 152|{ 5157| 152| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (5157:7): [True: 7, False: 145] ------------------ 5158| | //return TokError("unexpected token in '.else' directive"); 5159| 7| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 5160| 7| return true; 5161| 7| } 5162| | 5163| 145| Lex(); 5164| | 5165| 145| if (TheCondState.TheCond != AsmCond::IfCond && ------------------ | Branch (5165:7): [True: 17, False: 128] ------------------ 5166| 17| TheCondState.TheCond != AsmCond::ElseIfCond) { ------------------ | Branch (5166:7): [True: 5, False: 12] ------------------ 5167| | //Error(DirectiveLoc, "Encountered a .else that doesn't follow a .if or an " 5168| | // ".elseif"); 5169| 5| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 5170| 5| return true; 5171| 5| } 5172| 140| TheCondState.TheCond = AsmCond::ElseCond; 5173| 140| bool LastIgnoreState = false; 5174| 140| if (!TheCondStack.empty()) ------------------ | Branch (5174:7): [True: 140, False: 0] ------------------ 5175| 140| LastIgnoreState = TheCondStack.back().Ignore; 5176| 140| if (LastIgnoreState || TheCondState.CondMet) ------------------ | Branch (5176:7): [True: 10, False: 130] | Branch (5176:26): [True: 2, False: 128] ------------------ 5177| 12| TheCondState.Ignore = true; 5178| 128| else 5179| 128| TheCondState.Ignore = false; 5180| | 5181| 140| return false; 5182| 145|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser19parseDirectiveEndIfEN7llvm_ks5SMLocE: 5332| 162|{ 5333| 162| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (5333:7): [True: 0, False: 162] ------------------ 5334| | //return TokError("unexpected token in '.endif' directive"); 5335| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 5336| 0| return true; 5337| 0| } 5338| | 5339| 162| Lex(); 5340| | 5341| 162| if ((TheCondState.TheCond == AsmCond::NoCond) || TheCondStack.empty()) { ------------------ | Branch (5341:7): [True: 160, False: 2] | Branch (5341:52): [True: 0, False: 2] ------------------ 5342| | //Error(DirectiveLoc, "Encountered a .endif that doesn't follow a .if or " 5343| | // ".else"); 5344| 160| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 5345| 160| return true; 5346| 160| } 5347| 2| if (!TheCondStack.empty()) { ------------------ | Branch (5347:7): [True: 2, False: 0] ------------------ 5348| 2| TheCondState = TheCondStack.back(); 5349| 2| TheCondStack.pop_back(); 5350| 2| } 5351| | 5352| 2| return false; 5353| 162|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser15parseAssignmentEN7llvm_ks9StringRefEbb: 2518| 3.47k| bool NoDeadStrip) { 2519| 3.47k| MCSymbol *Sym; 2520| 3.47k| const MCExpr *Value; 2521| 3.47k| if (MCParserUtils::parseAssignmentExpression(Name, allow_redef, *this, Sym, ------------------ | Branch (2521:7): [True: 1.66k, False: 1.81k] ------------------ 2522| 3.47k| Value)) { 2523| 1.66k| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 2524| 1.66k| return true; 2525| 1.66k| } 2526| | 2527| 1.81k| if (!Sym) { ------------------ | Branch (2527:7): [True: 1.01k, False: 793] ------------------ 2528| | // In the case where we parse an expression starting with a '.', we will 2529| | // not generate an error, nor will we create a symbol. In this case we 2530| | // should just return out. 2531| 1.01k| return false; 2532| 1.01k| } 2533| | 2534| | // Do the assignment. 2535| 793| if (!Out.EmitAssignment(Sym, Value)) { ------------------ | Branch (2535:7): [True: 12, False: 781] ------------------ 2536| 12| KsError = KS_ERR_ASM_DIRECTIVE_ID; 2537| 12| return true; 2538| 12| } 2539| 781| if (NoDeadStrip) ------------------ | Branch (2539:7): [True: 0, False: 781] ------------------ 2540| 0| Out.EmitSymbolAttribute(Sym, MCSA_NoDeadStrip); 2541| | 2542| 781| return false; 2543| 793|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser16areMacrosEnabledEv: 280| 74.9k| bool areMacrosEnabled() {return MacrosEnabledFlag;} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser11lookupMacroEN7llvm_ks9StringRefE: 2446| 75.2k|const MCAsmMacro *AsmParser::lookupMacro(StringRef Name) { 2447| 75.2k| StringMap::iterator I = MacroMap.find(Name); 2448| 75.2k| return (I == MacroMap.end()) ? nullptr : &I->getValue(); ------------------ | Branch (2448:10): [True: 74.7k, False: 501] ------------------ 2449| 75.2k|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser16handleMacroEntryEPKNS_10MCAsmMacroEN7llvm_ks5SMLocE: 2458| 289|{ 2459| | // Arbitrarily limit macro nesting depth, to match 'as'. We can eliminate 2460| | // this, although we should protect against infinite loops. 2461| 289| if (ActiveMacros.size() == 20) { ------------------ | Branch (2461:7): [True: 1, False: 288] ------------------ 2462| | // return TokError("macros cannot be nested more than 20 levels deep"); 2463| 1| KsError = KS_ERR_ASM_MACRO_LEVELS_EXCEED; 2464| 1| return true; 2465| 1| } 2466| | 2467| 288| MCAsmMacroArguments A; 2468| 288| if (parseMacroArguments(M, A)) { ------------------ | Branch (2468:7): [True: 226, False: 62] ------------------ 2469| 226| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 2470| 226| return true; 2471| 226| } 2472| | 2473| | // Macro instantiation is lexical, unfortunately. We construct a new buffer 2474| | // to hold the macro body with substitutions. 2475| 62| SmallString<256> Buf; 2476| 62| StringRef Body = M->Body; 2477| 62| raw_svector_ostream OS(Buf); 2478| | 2479| 62| if (expandMacro(OS, Body, M->Parameters, A, true, getTok().getLoc())) { ------------------ | Branch (2479:7): [True: 0, False: 62] ------------------ 2480| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 2481| 0| return true; 2482| 0| } 2483| | 2484| | // We include the .endmacro in the buffer as our cue to exit the macro 2485| | // instantiation. 2486| 62| OS << ".endmacro\n"; 2487| | 2488| 62| std::unique_ptr Instantiation = 2489| 62| MemoryBuffer::getMemBufferCopy(OS.str(), ""); 2490| | 2491| | // Create the macro instantiation object and add to the current macro 2492| | // instantiation stack. 2493| 62| MacroInstantiation *MI = new MacroInstantiation( 2494| 62| NameLoc, CurBuffer, getTok().getLoc(), TheCondStack.size()); 2495| 62| ActiveMacros.push_back(MI); 2496| | 2497| 62| ++NumOfMacroInstantiations; 2498| | 2499| | // Jump to the macro instantiation and prime the lexer. 2500| 62| CurBuffer = SrcMgr.AddNewSourceBuffer(std::move(Instantiation), SMLoc()); 2501| 62| Lexer.setBuffer(SrcMgr.getMemoryBuffer(CurBuffer)->getBuffer()); 2502| 62| Lex(); 2503| | 2504| 62| return false; 2505| 62|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser19parseMacroArgumentsEPKNS_10MCAsmMacroERNSt3__16vectorINS5_IN7llvm_ks8AsmTokenENS4_9allocatorIS7_EEEENS8_ISA_EEEE: 2337| 7.40k|{ 2338| 7.40k| const unsigned NParameters = M ? M->Parameters.size() : 0; ------------------ | Branch (2338:32): [True: 288, False: 7.11k] ------------------ 2339| 7.40k| bool NamedParametersFound = false; 2340| 7.40k| SmallVector FALocs; 2341| | 2342| 7.40k| A.resize(NParameters); 2343| 7.40k| FALocs.resize(NParameters); 2344| | 2345| | // Parse two kinds of macro invocations: 2346| | // - macros defined without any parameters accept an arbitrary number of them 2347| | // - macros defined with parameters accept at most that many of them 2348| 7.40k| bool HasVararg = NParameters ? M->Parameters.back().Vararg : false; ------------------ | Branch (2348:20): [True: 259, False: 7.14k] ------------------ 2349| 31.5k| for (unsigned Parameter = 0; !NParameters || Parameter < NParameters; ------------------ | Branch (2349:32): [True: 30.8k, False: 662] | Branch (2349:48): [True: 656, False: 6] ------------------ 2350| 31.5k| ++Parameter) { 2351| | //SMLoc IDLoc = Lexer.getLoc(); 2352| 31.5k| MCAsmMacroParameter FA; 2353| | 2354| 31.5k| if (Lexer.is(AsmToken::Identifier) && Lexer.peekTok().is(AsmToken::Equal)) { ------------------ | Branch (2354:9): [True: 2.62k, False: 28.9k] | Branch (2354:9): [True: 332, False: 31.1k] | Branch (2354:43): [True: 332, False: 2.29k] ------------------ 2355| 332| if (parseIdentifier(FA.Name)) { ------------------ | Branch (2355:11): [True: 0, False: 332] ------------------ 2356| | //Error(IDLoc, "invalid argument identifier for formal argument"); 2357| 0| eatToEndOfStatement(); 2358| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 2359| 0| return true; 2360| 0| } 2361| | 2362| 332| if (!Lexer.is(AsmToken::Equal)) { ------------------ | Branch (2362:11): [True: 0, False: 332] ------------------ 2363| | //TokError("expected '=' after formal parameter identifier"); 2364| 0| eatToEndOfStatement(); 2365| 0| KsError = KS_ERR_ASM_MACRO_EQU; 2366| 0| return true; 2367| 0| } 2368| 332| Lex(); 2369| | 2370| 332| NamedParametersFound = true; 2371| 332| } 2372| | 2373| 31.5k| if (NamedParametersFound && FA.Name.empty()) { ------------------ | Branch (2373:9): [True: 369, False: 31.1k] | Branch (2373:33): [True: 37, False: 332] ------------------ 2374| | //Error(IDLoc, "cannot mix positional and keyword arguments"); 2375| 37| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 2376| 37| eatToEndOfStatement(); 2377| 37| return true; 2378| 37| } 2379| | 2380| 31.4k| bool Vararg = HasVararg && Parameter == (NParameters - 1); ------------------ | Branch (2380:19): [True: 0, False: 31.4k] | Branch (2380:32): [True: 0, False: 0] ------------------ 2381| 31.4k| if (parseMacroArgument(FA.Value, Vararg)) { ------------------ | Branch (2381:9): [True: 154, False: 31.3k] ------------------ 2382| 154| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 2383| 154| return true; 2384| 154| } 2385| | 2386| 31.3k| unsigned PI = Parameter; 2387| 31.3k| if (!FA.Name.empty()) { ------------------ | Branch (2387:9): [True: 332, False: 31.0k] ------------------ 2388| 332| unsigned FAI = 0; 2389| 2.35k| for (FAI = 0; FAI < NParameters; ++FAI) ------------------ | Branch (2389:21): [True: 2.16k, False: 183] ------------------ 2390| 2.16k| if (M->Parameters[FAI].Name == FA.Name) ------------------ | Branch (2390:13): [True: 149, False: 2.01k] ------------------ 2391| 149| break; 2392| | 2393| 332| if (FAI >= NParameters) { ------------------ | Branch (2393:11): [True: 183, False: 149] ------------------ 2394| | //assert(M && "expected macro to be defined"); 2395| | //Error(IDLoc, 2396| | // "parameter named '" + FA.Name + "' does not exist for macro '" + 2397| | // M->Name + "'"); 2398| 183| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 2399| 183| return true; 2400| 183| } 2401| 149| PI = FAI; 2402| 149| } 2403| | 2404| 31.1k| if (!FA.Value.empty()) { ------------------ | Branch (2404:9): [True: 8.50k, False: 22.6k] ------------------ 2405| 8.50k| if (A.size() <= PI) ------------------ | Branch (2405:11): [True: 8.29k, False: 218] ------------------ 2406| 8.29k| A.resize(PI + 1); 2407| 8.50k| A[PI] = FA.Value; 2408| | 2409| 8.50k| if (FALocs.size() <= PI) ------------------ | Branch (2409:11): [True: 8.29k, False: 218] ------------------ 2410| 8.29k| FALocs.resize(PI + 1); 2411| | 2412| 8.50k| FALocs[PI] = Lexer.getLoc(); 2413| 8.50k| } 2414| | 2415| | // At the end of the statement, fill in remaining arguments that have 2416| | // default values. If there aren't any, then the next argument is 2417| | // required but missing 2418| 31.1k| if (Lexer.is(AsmToken::EndOfStatement)) { ------------------ | Branch (2418:9): [True: 7.02k, False: 24.1k] ------------------ 2419| 7.02k| bool Failure = false; 2420| 10.3k| for (unsigned FAI = 0; FAI < NParameters; ++FAI) { ------------------ | Branch (2420:30): [True: 3.35k, False: 7.02k] ------------------ 2421| 3.35k| if (A[FAI].empty()) { ------------------ | Branch (2421:13): [True: 3.32k, False: 31] ------------------ 2422| 3.32k| if (M->Parameters[FAI].Required) { ------------------ | Branch (2422:15): [True: 0, False: 3.32k] ------------------ 2423| | //Error(FALocs[FAI].isValid() ? FALocs[FAI] : Lexer.getLoc(), 2424| | // "missing value for required parameter " 2425| | // "'" + M->Parameters[FAI].Name + "' in macro '" + M->Name + "'"); 2426| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 2427| 0| Failure = true; 2428| 0| } 2429| | 2430| 3.32k| if (!M->Parameters[FAI].Value.empty()) ------------------ | Branch (2430:15): [True: 49, False: 3.27k] ------------------ 2431| 49| A[FAI] = M->Parameters[FAI].Value; 2432| 3.32k| } 2433| 3.35k| } 2434| 7.02k| return Failure; 2435| 7.02k| } 2436| | 2437| 24.1k| if (Lexer.is(AsmToken::Comma)) ------------------ | Branch (2437:9): [True: 24.1k, False: 0] ------------------ 2438| 24.1k| Lex(); 2439| 24.1k| } 2440| | 2441| | // return TokError("too many positional arguments"); 2442| 6| KsError = KS_ERR_ASM_MACRO_ARGS; 2443| 6| return true; 2444| 7.40k|} AsmParser.cpp:_ZN12_GLOBAL__N_119MCAsmMacroParameterC2Ev: 65| 42.9k| MCAsmMacroParameter() : Required(false), Vararg(false) {} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser18parseMacroArgumentERNSt3__16vectorIN7llvm_ks8AsmTokenENS1_9allocatorIS4_EEEEb: 2261| 31.7k|{ 2262| | 2263| 31.7k| if (Vararg) { ------------------ | Branch (2263:7): [True: 0, False: 31.7k] ------------------ 2264| 0| if (Lexer.isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (2264:9): [True: 0, False: 0] ------------------ 2265| 0| StringRef Str = parseStringToEndOfStatement(); 2266| 0| MA.emplace_back(AsmToken::String, Str); 2267| 0| } 2268| 0| return false; 2269| 0| } 2270| | 2271| 31.7k| unsigned ParenLevel = 0; 2272| 31.7k| unsigned AddTokens = 0; 2273| | 2274| | // Darwin doesn't use spaces to delmit arguments. 2275| 31.7k| AsmLexerSkipSpaceRAII ScopedSkipSpace(Lexer, IsDarwin); 2276| | 2277| 86.3k| for (;;) { 2278| 86.3k| if (Lexer.is(AsmToken::Eof) || Lexer.is(AsmToken::Equal)) { ------------------ | Branch (2278:9): [True: 2, False: 86.3k] | Branch (2278:36): [True: 0, False: 86.3k] ------------------ 2279| | // return TokError("unexpected token in macro instantiation"); 2280| 2| KsError = KS_ERR_ASM_MACRO_TOKEN; 2281| 2| return true; 2282| 2| } 2283| | 2284| 86.3k| if (ParenLevel == 0 && Lexer.is(AsmToken::Comma)) ------------------ | Branch (2284:9): [True: 82.8k, False: 3.47k] | Branch (2284:28): [True: 24.1k, False: 58.7k] ------------------ 2285| 24.1k| break; 2286| | 2287| 62.2k| if (Lexer.is(AsmToken::Space)) { ------------------ | Branch (2287:9): [True: 0, False: 62.2k] ------------------ 2288| 0| Lex(); // Eat spaces 2289| | 2290| | // Spaces can delimit parameters, but could also be part an expression. 2291| | // If the token after a space is an operator, add the token and the next 2292| | // one into this argument 2293| 0| if (!IsDarwin) { ------------------ | Branch (2293:11): [True: 0, False: 0] ------------------ 2294| 0| if (isOperator(Lexer.getKind())) { ------------------ | Branch (2294:13): [True: 0, False: 0] ------------------ 2295| | // Check to see whether the token is used as an operator, 2296| | // or part of an identifier 2297| 0| const char *NextChar = getTok().getEndLoc().getPointer(); 2298| 0| if (*NextChar == ' ') ------------------ | Branch (2298:15): [True: 0, False: 0] ------------------ 2299| 0| AddTokens = 2; 2300| 0| } 2301| | 2302| 0| if (!AddTokens && ParenLevel == 0) { ------------------ | Branch (2302:13): [True: 0, False: 0] | Branch (2302:27): [True: 0, False: 0] ------------------ 2303| 0| break; 2304| 0| } 2305| 0| } 2306| 0| } 2307| | 2308| | // handleMacroEntry relies on not advancing the lexer here 2309| | // to be able to fill in the remaining default parameter values 2310| 62.2k| if (Lexer.is(AsmToken::EndOfStatement)) ------------------ | Branch (2310:9): [True: 7.56k, False: 54.6k] ------------------ 2311| 7.56k| break; 2312| | 2313| | // Adjust the current parentheses level. 2314| 54.6k| if (Lexer.is(AsmToken::LParen)) ------------------ | Branch (2314:9): [True: 161, False: 54.4k] ------------------ 2315| 161| ++ParenLevel; 2316| 54.4k| else if (Lexer.is(AsmToken::RParen) && ParenLevel) ------------------ | Branch (2316:14): [True: 1.23k, False: 53.2k] | Branch (2316:44): [True: 0, False: 1.23k] ------------------ 2317| 0| --ParenLevel; 2318| | 2319| | // Append the token to the current argument list. 2320| 54.6k| MA.push_back(getTok()); 2321| 54.6k| if (AddTokens) ------------------ | Branch (2321:9): [True: 0, False: 54.6k] ------------------ 2322| 0| AddTokens--; 2323| 54.6k| Lex(); 2324| 54.6k| } 2325| | 2326| 31.7k| if (ParenLevel != 0) { ------------------ | Branch (2326:7): [True: 159, False: 31.5k] ------------------ 2327| | // return TokError("unbalanced parentheses in macro argument"); 2328| 159| KsError = KS_ERR_ASM_MACRO_PAREN; 2329| 159| return true; 2330| 159| } 2331| 31.5k| return false; 2332| 31.7k|} AsmParser.cpp:_ZN12_GLOBAL__N_121AsmLexerSkipSpaceRAIIC2ERN7llvm_ks8AsmLexerEb: 2247| 31.7k| AsmLexerSkipSpaceRAII(AsmLexer &Lexer, bool SkipSpace) : Lexer(Lexer) { 2248| 31.7k| Lexer.setSkipSpace(SkipSpace); 2249| 31.7k| } AsmParser.cpp:_ZN12_GLOBAL__N_121AsmLexerSkipSpaceRAIID2Ev: 2251| 31.7k| ~AsmLexerSkipSpaceRAII() { 2252| 31.7k| Lexer.setSkipSpace(true); 2253| 31.7k| } AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser11expandMacroERN7llvm_ks19raw_svector_ostreamENS1_9StringRefENS1_8ArrayRefINS_19MCAsmMacroParameterEEENS5_INSt3__16vectorINS1_8AsmTokenENS8_9allocatorISA_EEEEEEbNS1_5SMLocE: 2090| 13.2k|{ 2091| 13.2k| unsigned NParameters = Parameters.size(); 2092| 13.2k| bool HasVararg = NParameters ? Parameters.back().Vararg : false; ------------------ | Branch (2092:20): [True: 11.4k, False: 1.80k] ------------------ 2093| 13.2k| if ((!IsDarwin || NParameters != 0) && NParameters != A.size()) ------------------ | Branch (2093:8): [True: 0, False: 13.2k] | Branch (2093:21): [True: 11.4k, False: 1.80k] | Branch (2093:42): [True: 0, False: 11.4k] ------------------ 2094| | //return Error(L, "Wrong number of arguments"); 2095| 0| return true; 2096| | 2097| | // A macro without parameters is handled differently on Darwin: 2098| | // gas accepts no arguments and does no substitutions 2099| 829k| while (!Body.empty()) { ------------------ | Branch (2099:10): [True: 829k, False: 94] ------------------ 2100| | // Scan for the next substitution. 2101| 829k| std::size_t End = Body.size(), Pos = 0; 2102| 78.6M| for (; Pos != End; ++Pos) { ------------------ | Branch (2102:12): [True: 78.6M, False: 13.1k] ------------------ 2103| | // Check for a substitution or escape. 2104| 78.6M| if (IsDarwin && !NParameters) { ------------------ | Branch (2104:11): [True: 78.6M, False: 0] | Branch (2104:23): [True: 730k, False: 77.9M] ------------------ 2105| | // This macro has no parameters, look for $0, $1, etc. 2106| 730k| if (Body[Pos] != '$' || Pos + 1 == End) ------------------ | Branch (2106:13): [True: 720k, False: 10.1k] | Branch (2106:33): [True: 0, False: 10.1k] ------------------ 2107| 720k| continue; 2108| | 2109| 10.1k| char Next = Body[Pos + 1]; 2110| 10.1k| if (Next == '$' || Next == 'n' || ------------------ | Branch (2110:13): [True: 18, False: 10.1k] | Branch (2110:28): [True: 0, False: 10.1k] ------------------ 2111| 10.1k| isdigit(static_cast(Next))) ------------------ | Branch (2111:13): [True: 1.73k, False: 8.43k] ------------------ 2112| 1.75k| break; 2113| 77.9M| } else { 2114| | // This macro has parameters, look for \foo, \bar, etc. 2115| 77.9M| if (Body[Pos] == '\\' && Pos + 1 != End) ------------------ | Branch (2115:13): [True: 814k, False: 77.0M] | Branch (2115:34): [True: 814k, False: 0] ------------------ 2116| 814k| break; 2117| 77.9M| } 2118| 78.6M| } 2119| | 2120| | // Add the prefix. 2121| 829k| OS << Body.slice(0, Pos); 2122| | 2123| | // Check if we reached the end. 2124| 829k| if (Pos == End) ------------------ | Branch (2124:9): [True: 13.1k, False: 816k] ------------------ 2125| 13.1k| break; 2126| | 2127| 816k| if (IsDarwin && !NParameters) { ------------------ | Branch (2127:9): [True: 816k, False: 0] | Branch (2127:21): [True: 1.75k, False: 814k] ------------------ 2128| 1.75k| switch (Body[Pos + 1]) { 2129| | // $$ => $ 2130| 18| case '$': ------------------ | Branch (2130:7): [True: 18, False: 1.73k] ------------------ 2131| 18| OS << '$'; 2132| 18| break; 2133| | 2134| | // $n => number of arguments 2135| 0| case 'n': ------------------ | Branch (2135:7): [True: 0, False: 1.75k] ------------------ 2136| 0| OS << A.size(); 2137| 0| break; 2138| | 2139| | // $[0-9] => argument 2140| 1.73k| default: { ------------------ | Branch (2140:7): [True: 1.73k, False: 18] ------------------ 2141| | // Missing arguments are ignored. 2142| 1.73k| unsigned Index = Body[Pos + 1] - '0'; 2143| 1.73k| if (Index >= A.size()) ------------------ | Branch (2143:13): [True: 1.70k, False: 38] ------------------ 2144| 1.70k| break; 2145| | 2146| | // Otherwise substitute with the token values, with spaces eliminated. 2147| 38| for (const AsmToken &Token : A[Index]) ------------------ | Branch (2147:36): [True: 179, False: 38] ------------------ 2148| 179| OS << Token.getString(); 2149| 38| break; 2150| 1.73k| } 2151| 1.75k| } 2152| 1.75k| Pos += 2; 2153| 814k| } else { 2154| 814k| unsigned I = Pos + 1; 2155| | 2156| | // Check for the \@ pseudo-variable. 2157| 814k| if (EnableAtPseudoVariable && Body[I] == '@' && I + 1 != End) ------------------ | Branch (2157:11): [True: 814k, False: 0] | Branch (2157:37): [True: 3.87k, False: 810k] | Branch (2157:55): [True: 3.87k, False: 0] ------------------ 2158| 3.87k| ++I; 2159| 810k| else 2160| 815k| while (isIdentifierChar(Body[I]) && I + 1 != End) ------------------ | Branch (2160:16): [True: 4.61k, False: 810k] | Branch (2160:45): [True: 4.61k, False: 0] ------------------ 2161| 4.61k| ++I; 2162| | 2163| 814k| const char *Begin = Body.data() + Pos + 1; 2164| 814k| StringRef Argument(Begin, I - (Pos + 1)); 2165| 814k| unsigned Index = 0; 2166| | 2167| 814k| if (Argument == "@") { ------------------ | Branch (2167:11): [True: 3.87k, False: 810k] ------------------ 2168| 3.87k| OS << NumOfMacroInstantiations; 2169| 3.87k| Pos += 2; 2170| 810k| } else { 2171| 1.62M| for (; Index < NParameters; ++Index) ------------------ | Branch (2171:16): [True: 810k, False: 810k] ------------------ 2172| 810k| if (Parameters[Index].Name == Argument) ------------------ | Branch (2172:15): [True: 213, False: 810k] ------------------ 2173| 213| break; 2174| | 2175| 810k| if (Index == NParameters) { ------------------ | Branch (2175:13): [True: 810k, False: 213] ------------------ 2176| 810k| if (Body[Pos + 1] == '(' && Body[Pos + 2] == ')') ------------------ | Branch (2176:15): [True: 809k, False: 509] | Branch (2176:39): [True: 0, False: 809k] ------------------ 2177| 0| Pos += 3; 2178| 810k| else { 2179| 810k| OS << '\\' << Argument; 2180| 810k| Pos = I; 2181| 810k| } 2182| 810k| } else { 2183| 213| bool VarargParameter = HasVararg && Index == (NParameters - 1); ------------------ | Branch (2183:34): [True: 0, False: 213] | Branch (2183:47): [True: 0, False: 0] ------------------ 2184| 213| for (const AsmToken &Token : A[Index]) ------------------ | Branch (2184:38): [True: 731, False: 213] ------------------ 2185| | // We expect no quotes around the string's contents when 2186| | // parsing for varargs. 2187| 731| if (Token.getKind() != AsmToken::String || VarargParameter) ------------------ | Branch (2187:17): [True: 727, False: 4] | Branch (2187:56): [True: 0, False: 4] ------------------ 2188| 727| OS << Token.getString(); 2189| 4| else { 2190| 4| bool valid; 2191| 4| OS << Token.getStringContents(valid); 2192| 4| if (!valid) { ------------------ | Branch (2192:19): [True: 0, False: 4] ------------------ 2193| 0| return true; 2194| 0| } 2195| 4| } 2196| | 2197| 213| Pos += 1 + Argument.size(); 2198| 213| } 2199| 810k| } 2200| 814k| } 2201| | // Update the scan point. 2202| 816k| Body = Body.substr(Pos); 2203| 816k| } 2204| | 2205| 13.2k| return false; 2206| 13.2k|} AsmParser.cpp:_ZL16isIdentifierCharc: 2081| 816k|static bool isIdentifierChar(char c) { 2082| 816k| return isalnum(static_cast(c)) || c == '_' || c == '$' || ------------------ | Branch (2082:10): [True: 5.17k, False: 810k] | Branch (2082:52): [True: 44, False: 810k] | Branch (2082:64): [True: 12, False: 810k] ------------------ 2083| 810k| c == '.'; ------------------ | Branch (2083:10): [True: 19, False: 810k] ------------------ 2084| 816k|} AsmParser.cpp:_ZN12_GLOBAL__N_118MacroInstantiationC2EN7llvm_ks5SMLocEiS2_m: 2210| 6.99k| : InstantiationLoc(IL), ExitBuffer(EB), ExitLoc(EL), 2211| 6.99k| CondStackDepth(CondStackDepth) {} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser11isDirectiveEN7llvm_ks9StringRefE: 1435| 74.6k|{ 1436| 74.6k| if (KsSyntax == KS_OPT_SYNTAX_NASM) ------------------ | Branch (1436:9): [True: 0, False: 74.6k] ------------------ 1437| 0| return isNasmDirective(IDVal); 1438| 74.6k| else // Directives start with "." 1439| 74.6k| return (!IDVal.empty() && IDVal[0] == '.' && IDVal != "."); ------------------ | Branch (1439:17): [True: 74.6k, False: 2] | Branch (1439:35): [True: 66.1k, False: 8.56k] | Branch (1439:54): [True: 66.1k, False: 17] ------------------ 1440| 74.6k|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser17parseDirectiveSetEN7llvm_ks9StringRefEb: 2594| 3.60k|bool AsmParser::parseDirectiveSet(StringRef IDVal, bool allow_redef) { 2595| 3.60k| StringRef Name; 2596| | 2597| 3.60k| if (parseIdentifier(Name)) { ------------------ | Branch (2597:7): [True: 3.45k, False: 141] ------------------ 2598| | // return TokError("expected identifier after '" + Twine(IDVal) + "'"); 2599| 3.45k| KsError = KS_ERR_ASM_DIRECTIVE_ID; 2600| 3.45k| return true; 2601| 3.45k| } 2602| | 2603| 141| if (getLexer().isNot(AsmToken::Comma)) { ------------------ | Branch (2603:7): [True: 141, False: 0] ------------------ 2604| | // return TokError("unexpected token in '" + Twine(IDVal) + "'"); 2605| 141| KsError = KS_ERR_ASM_DIRECTIVE_TOKEN; 2606| 141| return true; 2607| 141| } 2608| 0| Lex(); 2609| | 2610| 0| return parseAssignment(Name, allow_redef, true); 2611| 141|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser19parseDirectiveAsciiEN7llvm_ks9StringRefEb: 2692| 458|{ 2693| 458| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (2693:7): [True: 207, False: 251] ------------------ 2694| 207| checkForValidSection(); 2695| | 2696| 431| for (;;) { 2697| 431| if (getLexer().isNot(AsmToken::String)) { ------------------ | Branch (2697:11): [True: 110, False: 321] ------------------ 2698| | // return TokError("expected string in '" + Twine(IDVal) + "' directive"); 2699| 110| KsError = KS_ERR_ASM_DIRECTIVE_STR; 2700| 110| return true; 2701| 110| } 2702| | 2703| 321| std::string Data; 2704| 321| if (parseEscapedString(Data)) { ------------------ | Branch (2704:11): [True: 2, False: 319] ------------------ 2705| 2| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 2706| 2| return true; 2707| 2| } 2708| | 2709| 319| getStreamer().EmitBytes(Data); 2710| 319| if (ZeroTerminated) ------------------ | Branch (2710:11): [True: 319, False: 0] ------------------ 2711| 319| getStreamer().EmitBytes(StringRef("\0", 1)); 2712| | 2713| 319| Lex(); 2714| | 2715| 319| if (getLexer().is(AsmToken::EndOfStatement)) ------------------ | Branch (2715:11): [True: 29, False: 290] ------------------ 2716| 29| break; 2717| | 2718| 290| if (getLexer().isNot(AsmToken::Comma)) { ------------------ | Branch (2718:11): [True: 66, False: 224] ------------------ 2719| | // return TokError("unexpected token in '" + Twine(IDVal) + "' directive"); 2720| 66| KsError = KS_ERR_ASM_DIRECTIVE_TOKEN; 2721| 66| return true; 2722| 66| } 2723| 224| Lex(); 2724| 224| } 2725| 207| } 2726| | 2727| 280| Lex(); 2728| 280| return false; 2729| 458|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser19parseDirectiveValueEjRj: 2808| 218|{ 2809| 218| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (2809:7): [True: 88, False: 130] ------------------ 2810| 88| checkForValidSection(); 2811| | 2812| 1.34k| for (;;) { 2813| 1.34k| const MCExpr *Value; 2814| 1.34k| SMLoc ExprLoc = getLexer().getLoc(); 2815| 1.34k| if (parseExpression(Value)) { ------------------ | Branch (2815:11): [True: 5, False: 1.34k] ------------------ 2816| 5| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 2817| 5| return true; 2818| 5| } 2819| | 2820| | // Special case constant expressions to match code generator. 2821| 1.34k| if (const MCConstantExpr *MCE = dyn_cast(Value)) { ------------------ | Branch (2821:33): [True: 121, False: 1.22k] ------------------ 2822| 121| assert(Size <= 8 && "Invalid size"); ------------------ | Branch (2822:9): [True: 121, False: 0] | Branch (2822:9): [True: 121, Folded] | Branch (2822:9): [True: 121, False: 0] ------------------ 2823| 121| uint64_t IntValue = MCE->getValue(); 2824| 121| if (!isUIntN(8 * Size, IntValue) && !isIntN(8 * Size, IntValue)) { ------------------ | Branch (2824:13): [True: 5, False: 116] | Branch (2824:45): [True: 3, False: 2] ------------------ 2825| | // return Error(ExprLoc, "literal value out of range for directive"); 2826| 3| KsError = KS_ERR_ASM_DIRECTIVE_VALUE_RANGE; 2827| 3| return true; 2828| 3| } 2829| 118| bool Error; 2830| 118| getStreamer().EmitIntValue(IntValue, Size, Error); 2831| 118| if (Error) { ------------------ | Branch (2831:13): [True: 0, False: 118] ------------------ 2832| 0| KsError = KS_ERR_ASM_DIRECTIVE_TOKEN; 2833| 0| return true; 2834| 0| } 2835| 118| } else 2836| 1.22k| getStreamer().EmitValue(Value, Size, ExprLoc); 2837| | 2838| 1.34k| if (getLexer().is(AsmToken::EndOfStatement)) ------------------ | Branch (2838:11): [True: 64, False: 1.27k] ------------------ 2839| 64| break; 2840| | 2841| | // FIXME: Improve diagnostic. 2842| 1.27k| if (getLexer().isNot(AsmToken::Comma)) { ------------------ | Branch (2842:11): [True: 16, False: 1.26k] ------------------ 2843| | // return TokError("unexpected token in directive"); 2844| 16| KsError = KS_ERR_ASM_DIRECTIVE_TOKEN; 2845| 16| return true; 2846| 16| } 2847| 1.26k| Lex(); 2848| 1.26k| } 2849| 88| } 2850| | 2851| 194| Lex(); 2852| 194| return false; 2853| 218|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser15parseExpressionERPKN7llvm_ks6MCExprE: 1076| 48.1k|bool AsmParser::parseExpression(const MCExpr *&Res) { 1077| 48.1k| SMLoc EndLoc; 1078| 48.1k| return parseExpression(Res, EndLoc); 1079| 48.1k|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser23parseDirectiveOctaValueERj: 2858| 10|{ 2859| 10| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (2859:7): [True: 4, False: 6] ------------------ 2860| 4| checkForValidSection(); 2861| | 2862| 248| for (;;) { 2863| 248| if (Lexer.getKind() == AsmToken::Error) { ------------------ | Branch (2863:11): [True: 0, False: 248] ------------------ 2864| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 2865| 0| return true; 2866| 0| } 2867| 248| if (Lexer.getKind() != AsmToken::Integer && ------------------ | Branch (2867:11): [True: 101, False: 147] ------------------ 2868| 101| Lexer.getKind() != AsmToken::BigNum) { ------------------ | Branch (2868:11): [True: 3, False: 98] ------------------ 2869| | // return TokError("unknown token in expression"); 2870| 3| KsError = KS_ERR_ASM_DIRECTIVE_TOKEN; 2871| 3| return true; 2872| 3| } 2873| | 2874| | // SMLoc ExprLoc = getLexer().getLoc(); 2875| 245| bool valid; 2876| 245| APInt IntValue = getTok().getAPIntVal(valid); 2877| 245| if (!valid) { ------------------ | Branch (2877:11): [True: 0, False: 245] ------------------ 2878| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 2879| 0| return true; 2880| 0| } 2881| 245| Lex(); 2882| | 2883| 245| uint64_t hi, lo; 2884| 245| if (IntValue.isIntN(64)) { ------------------ | Branch (2884:11): [True: 147, False: 98] ------------------ 2885| 147| hi = 0; 2886| 147| lo = IntValue.getZExtValue(); 2887| 147| } else if (IntValue.isIntN(128)) { ------------------ | Branch (2887:18): [True: 98, False: 0] ------------------ 2888| | // It might actually have more than 128 bits, but the top ones are zero. 2889| 98| hi = IntValue.getHiBits(IntValue.getBitWidth() - 64).getZExtValue(); 2890| 98| lo = IntValue.getLoBits(64).getZExtValue(); 2891| 98| } else { 2892| | // return Error(ExprLoc, "literal value out of range for directive"); 2893| 0| KsError = KS_ERR_ASM_DIRECTIVE_VALUE_RANGE; 2894| 0| return true; 2895| 0| } 2896| | 2897| 245| bool Error; 2898| 245| if (MAI.isLittleEndian()) { ------------------ | Branch (2898:11): [True: 0, False: 245] ------------------ 2899| 0| getStreamer().EmitIntValue(lo, 8, Error); 2900| 0| getStreamer().EmitIntValue(hi, 8, Error); 2901| 245| } else { 2902| 245| getStreamer().EmitIntValue(hi, 8, Error); 2903| 245| getStreamer().EmitIntValue(lo, 8, Error); 2904| 245| } 2905| | 2906| 245| if (getLexer().is(AsmToken::EndOfStatement)) ------------------ | Branch (2906:11): [True: 0, False: 245] ------------------ 2907| 0| break; 2908| | 2909| | // FIXME: Improve diagnostic. 2910| 245| if (getLexer().isNot(AsmToken::Comma)) { ------------------ | Branch (2910:11): [True: 1, False: 244] ------------------ 2911| | // return TokError("unexpected token in directive"); 2912| 1| KsError = KS_ERR_ASM_DIRECTIVE_TOKEN; 2913| 1| return true; 2914| 1| } 2915| 244| Lex(); 2916| 244| } 2917| 4| } 2918| | 2919| 6| Lex(); 2920| 6| return false; 2921| 10|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser23parseDirectiveRealValueERKN7llvm_ks12fltSemanticsE: 2926| 436|{ 2927| 436| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (2927:7): [True: 418, False: 18] ------------------ 2928| 418| checkForValidSection(); 2929| | 2930| 2.54k| for (;;) { 2931| | // We don't truly support arithmetic on floating point expressions, so we 2932| | // have to manually parse unary prefixes. 2933| 2.54k| bool IsNeg = false; 2934| 2.54k| if (getLexer().is(AsmToken::Minus)) { ------------------ | Branch (2934:11): [True: 875, False: 1.67k] ------------------ 2935| 875| Lex(); 2936| 875| IsNeg = true; 2937| 1.67k| } else if (getLexer().is(AsmToken::Plus)) ------------------ | Branch (2937:18): [True: 386, False: 1.28k] ------------------ 2938| 386| Lex(); 2939| | 2940| 2.54k| if (getLexer().isNot(AsmToken::Integer) && ------------------ | Branch (2940:11): [True: 1.24k, False: 1.30k] ------------------ 2941| 1.24k| getLexer().isNot(AsmToken::Real) && ------------------ | Branch (2941:11): [True: 802, False: 440] ------------------ 2942| 802| getLexer().isNot(AsmToken::Identifier)) { ------------------ | Branch (2942:11): [True: 8, False: 794] ------------------ 2943| | // return TokError("unexpected token in directive"); 2944| 8| KsError = KS_ERR_ASM_DIRECTIVE_TOKEN; 2945| 8| return true; 2946| 8| } 2947| | 2948| | // Convert to an APFloat. 2949| 2.54k| APFloat Value(Semantics); 2950| 2.54k| StringRef IDVal = getTok().getString(); 2951| 2.54k| if (getLexer().is(AsmToken::Identifier)) { ------------------ | Branch (2951:11): [True: 794, False: 1.74k] ------------------ 2952| 794| if (!IDVal.compare_lower("infinity") || !IDVal.compare_lower("inf")) ------------------ | Branch (2952:13): [True: 2, False: 792] | Branch (2952:13): [True: 235, False: 559] | Branch (2952:49): [True: 233, False: 559] ------------------ 2953| 235| Value = APFloat::getInf(Semantics); 2954| 559| else if (!IDVal.compare_lower("nan")) ------------------ | Branch (2954:18): [True: 329, False: 230] ------------------ 2955| 329| Value = APFloat::getNaN(Semantics, false, ~0); 2956| 230| else { 2957| | // return TokError("invalid floating point literal"); 2958| 230| KsError = KS_ERR_ASM_DIRECTIVE_FPOINT; 2959| 230| return true; 2960| 230| } 2961| 1.74k| } else if (Value.convertFromString(IDVal, APFloat::rmNearestTiesToEven) == ------------------ | Branch (2961:18): [True: 0, False: 1.74k] ------------------ 2962| 1.74k| APFloat::opInvalidOp) { 2963| | // return TokError("invalid floating point literal"); 2964| 0| KsError = KS_ERR_ASM_DIRECTIVE_FPOINT; 2965| 0| return true; 2966| 0| } 2967| 2.31k| if (IsNeg) ------------------ | Branch (2967:11): [True: 871, False: 1.43k] ------------------ 2968| 871| Value.changeSign(); 2969| | 2970| | // Consume the numeric token. 2971| 2.31k| Lex(); 2972| | 2973| | // Emit the value as an integer. 2974| 2.31k| APInt AsInt = Value.bitcastToAPInt(); 2975| 2.31k| bool Error; 2976| 2.31k| getStreamer().EmitIntValue(AsInt.getLimitedValue(), 2977| 2.31k| AsInt.getBitWidth() / 8, Error); 2978| 2.31k| if (Error) { ------------------ | Branch (2978:11): [True: 0, False: 2.31k] ------------------ 2979| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 2980| 0| return true; 2981| 0| } 2982| | 2983| 2.31k| if (getLexer().is(AsmToken::EndOfStatement)) ------------------ | Branch (2983:11): [True: 22, False: 2.28k] ------------------ 2984| 22| break; 2985| | 2986| 2.28k| if (getLexer().isNot(AsmToken::Comma)) { ------------------ | Branch (2986:11): [True: 158, False: 2.13k] ------------------ 2987| | // return TokError("unexpected token in directive"); 2988| 158| KsError = KS_ERR_ASM_DIRECTIVE_TOKEN; 2989| 158| return true; 2990| 158| } 2991| 2.13k| Lex(); 2992| 2.13k| } 2993| 418| } 2994| | 2995| 40| Lex(); 2996| 40| return false; 2997| 436|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser19parseDirectiveAlignEbj: 3170| 598|{ 3171| 598| checkForValidSection(); 3172| | 3173| | //SMLoc AlignmentLoc = getLexer().getLoc(); 3174| 598| int64_t Alignment; 3175| 598| if (parseAbsoluteExpression(Alignment)) { ------------------ | Branch (3175:7): [True: 4, False: 594] ------------------ 3176| 4| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 3177| 4| return true; 3178| 4| } 3179| | 3180| 594| SMLoc MaxBytesLoc; 3181| 594| bool HasFillExpr = false; 3182| 594| int64_t FillExpr = 0; 3183| 594| int64_t MaxBytesToFill = 0; 3184| 594| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (3184:7): [True: 343, False: 251] ------------------ 3185| 343| if (getLexer().isNot(AsmToken::Comma)) { ------------------ | Branch (3185:9): [True: 60, False: 283] ------------------ 3186| | // return TokError("unexpected token in directive"); 3187| 60| KsError = KS_ERR_ASM_DIRECTIVE_TOKEN; 3188| 60| return true; 3189| 60| } 3190| 283| Lex(); 3191| | 3192| | // The fill expression can be omitted while specifying a maximum number of 3193| | // alignment bytes, e.g: 3194| | // .align 3,,4 3195| 283| if (getLexer().isNot(AsmToken::Comma)) { ------------------ | Branch (3195:9): [True: 282, False: 1] ------------------ 3196| 282| HasFillExpr = true; 3197| 282| if (parseAbsoluteExpression(FillExpr)) { ------------------ | Branch (3197:11): [True: 1, False: 281] ------------------ 3198| 1| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 3199| 1| return true; 3200| 1| } 3201| 282| } 3202| | 3203| 282| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (3203:9): [True: 280, False: 2] ------------------ 3204| 280| if (getLexer().isNot(AsmToken::Comma)) { ------------------ | Branch (3204:11): [True: 188, False: 92] ------------------ 3205| | // return TokError("unexpected token in directive"); 3206| 188| KsError = KS_ERR_ASM_DIRECTIVE_TOKEN; 3207| 188| return true; 3208| 188| } 3209| 92| Lex(); 3210| | 3211| 92| MaxBytesLoc = getLexer().getLoc(); 3212| 92| if (parseAbsoluteExpression(MaxBytesToFill)) { ------------------ | Branch (3212:11): [True: 3, False: 89] ------------------ 3213| 3| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 3214| 3| return true; 3215| 3| } 3216| | 3217| 89| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (3217:11): [True: 4, False: 85] ------------------ 3218| | // return TokError("unexpected token in directive"); 3219| 4| KsError = KS_ERR_ASM_DIRECTIVE_TOKEN; 3220| 4| return true; 3221| 4| } 3222| 89| } 3223| 282| } 3224| | 3225| 338| Lex(); 3226| | 3227| 338| if (!HasFillExpr) ------------------ | Branch (3227:7): [True: 251, False: 87] ------------------ 3228| 251| FillExpr = 0; 3229| | 3230| | // Compute alignment in bytes. 3231| 338| if (IsPow2) { ------------------ | Branch (3231:7): [True: 71, False: 267] ------------------ 3232| | // FIXME: Diagnose overflow. 3233| 71| if (Alignment >= 32) { ------------------ | Branch (3233:9): [True: 65, False: 6] ------------------ 3234| | //Error(AlignmentLoc, "invalid alignment value"); 3235| 65| Alignment = 31; 3236| 65| } 3237| | 3238| 71| Alignment = 1ULL << Alignment; 3239| 267| } else { 3240| | // Reject alignments that aren't either a power of two or zero, 3241| | // for gas compatibility. Alignment of zero is silently rounded 3242| | // up to one. 3243| 267| if (Alignment == 0) ------------------ | Branch (3243:9): [True: 223, False: 44] ------------------ 3244| 223| Alignment = 1; 3245| 267| if (!isPowerOf2_64(Alignment)) { ------------------ | Branch (3245:9): [True: 0, False: 267] ------------------ 3246| | //Error(AlignmentLoc, "alignment must be a power of 2"); 3247| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 3248| 0| return true; 3249| 0| } 3250| 267| } 3251| | 3252| | // Diagnose non-sensical max bytes to align. 3253| 338| if (MaxBytesLoc.isValid()) { ------------------ | Branch (3253:7): [True: 85, False: 253] ------------------ 3254| 85| if (MaxBytesToFill < 1) { ------------------ | Branch (3254:9): [True: 33, False: 52] ------------------ 3255| | //Error(MaxBytesLoc, "alignment directive can never be satisfied in this " 3256| | // "many bytes, ignoring maximum bytes expression"); 3257| 33| MaxBytesToFill = 0; 3258| 33| } 3259| | 3260| 85| if (MaxBytesToFill >= Alignment) { ------------------ | Branch (3260:9): [True: 52, False: 33] ------------------ 3261| 52| Warning(MaxBytesLoc, "maximum bytes expression exceeds alignment and " 3262| 52| "has no effect"); 3263| 52| MaxBytesToFill = 0; 3264| 52| } 3265| 85| } 3266| | 3267| | // Check whether we should use optimal code alignment for this .align 3268| | // directive. 3269| 338| const MCSection *Section = getStreamer().getCurrentSection().first; 3270| 338| assert(Section && "must have section to emit alignment"); ------------------ | Branch (3270:3): [True: 338, False: 0] | Branch (3270:3): [True: 338, Folded] | Branch (3270:3): [True: 338, False: 0] ------------------ 3271| 338| bool UseCodeAlign = Section->UseCodeAlign(); 3272| 338| if ((!HasFillExpr || Lexer.getMAI().getTextAlignFillValue() == FillExpr) && ------------------ | Branch (3272:8): [True: 251, False: 87] | Branch (3272:24): [True: 32, False: 55] ------------------ 3273| 283| ValueSize == 1 && UseCodeAlign) { ------------------ | Branch (3273:7): [True: 283, False: 0] | Branch (3273:25): [True: 251, False: 32] ------------------ 3274| 251| getStreamer().EmitCodeAlignment(Alignment, MaxBytesToFill); 3275| 251| } else { 3276| | // FIXME: Target specific behavior about how the "extra" bytes are filled. 3277| 87| getStreamer().EmitValueToAlignment(Alignment, FillExpr, ValueSize, 3278| 87| MaxBytesToFill); 3279| 87| } 3280| | 3281| 338| return false; 3282| 338|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser17parseDirectiveOrgEv: 3131| 546|bool AsmParser::parseDirectiveOrg() { 3132| 546| checkForValidSection(); 3133| | 3134| 546| const MCExpr *Offset; 3135| 546| if (parseExpression(Offset)) { ------------------ | Branch (3135:7): [True: 306, False: 240] ------------------ 3136| 306| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 3137| 306| return true; 3138| 306| } 3139| | 3140| | // Parse optional fill expression. 3141| 240| int64_t FillExpr = 0; 3142| 240| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (3142:7): [True: 48, False: 192] ------------------ 3143| 48| if (getLexer().isNot(AsmToken::Comma)) { ------------------ | Branch (3143:9): [True: 48, False: 0] ------------------ 3144| | // return TokError("unexpected token in '.org' directive"); 3145| 48| KsError = KS_ERR_ASM_DIRECTIVE_TOKEN; 3146| 48| return true; 3147| 48| } 3148| 0| Lex(); 3149| | 3150| 0| if (parseAbsoluteExpression(FillExpr)) { ------------------ | Branch (3150:9): [True: 0, False: 0] ------------------ 3151| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 3152| 0| return true; 3153| 0| } 3154| | 3155| 0| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (3155:9): [True: 0, False: 0] ------------------ 3156| | // return TokError("unexpected token in '.org' directive"); 3157| 0| KsError = KS_ERR_ASM_DIRECTIVE_TOKEN; 3158| 0| return true; 3159| 0| } 3160| 0| } 3161| | 3162| 192| Lex(); 3163| 192| getStreamer().emitValueToOffset(Offset, FillExpr); 3164| 192| return false; 3165| 240|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser18parseDirectiveFillEv: 3036| 1.12k|{ 3037| 1.12k| checkForValidSection(); 3038| | 3039| 1.12k| SMLoc RepeatLoc = getLexer().getLoc(); 3040| 1.12k| int64_t NumValues; 3041| 1.12k| if (parseAbsoluteExpression(NumValues)) { ------------------ | Branch (3041:7): [True: 43, False: 1.08k] ------------------ 3042| 43| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 3043| 43| return true; 3044| 43| } 3045| | 3046| 1.08k| if (NumValues < 0) { ------------------ | Branch (3046:7): [True: 569, False: 512] ------------------ 3047| 569| Warning(RepeatLoc, 3048| 569| "'.fill' directive with negative repeat count has no effect"); 3049| 569| NumValues = 0; 3050| 569| } 3051| | 3052| 1.08k| int64_t FillSize = 1; 3053| 1.08k| int64_t FillExpr = 0; 3054| | 3055| 1.08k| SMLoc SizeLoc, ExprLoc; 3056| 1.08k| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (3056:7): [True: 861, False: 220] ------------------ 3057| 861| if (getLexer().isNot(AsmToken::Comma)) { ------------------ | Branch (3057:9): [True: 136, False: 725] ------------------ 3058| | // return TokError("unexpected token in '.fill' directive"); 3059| 136| KsError = KS_ERR_ASM_DIRECTIVE_TOKEN; 3060| 136| return true; 3061| 136| } 3062| 725| Lex(); 3063| | 3064| 725| SizeLoc = getLexer().getLoc(); 3065| 725| if (parseAbsoluteExpression(FillSize)) { ------------------ | Branch (3065:9): [True: 9, False: 716] ------------------ 3066| 9| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 3067| 9| return true; 3068| 9| } 3069| | 3070| 716| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (3070:9): [True: 193, False: 523] ------------------ 3071| 193| if (getLexer().isNot(AsmToken::Comma)) { ------------------ | Branch (3071:11): [True: 8, False: 185] ------------------ 3072| | // return TokError("unexpected token in '.fill' directive"); 3073| 8| KsError = KS_ERR_ASM_DIRECTIVE_TOKEN; 3074| 8| return true; 3075| 8| } 3076| 185| Lex(); 3077| | 3078| 185| ExprLoc = getLexer().getLoc(); 3079| 185| if (parseAbsoluteExpression(FillExpr)) { ------------------ | Branch (3079:11): [True: 0, False: 185] ------------------ 3080| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 3081| 0| return true; 3082| 0| } 3083| | 3084| 185| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (3084:11): [True: 33, False: 152] ------------------ 3085| | // return TokError("unexpected token in '.fill' directive"); 3086| 33| KsError = KS_ERR_ASM_DIRECTIVE_TOKEN; 3087| 33| return true; 3088| 33| } 3089| | 3090| 152| Lex(); 3091| 152| } 3092| 716| } 3093| | 3094| 895| if (FillSize < 0) { ------------------ | Branch (3094:7): [True: 255, False: 640] ------------------ 3095| 255| Warning(SizeLoc, "'.fill' directive with negative size has no effect"); 3096| 255| NumValues = 0; 3097| 255| } 3098| 895| if (FillSize > 8) { ------------------ | Branch (3098:7): [True: 365, False: 530] ------------------ 3099| 365| Warning(SizeLoc, "'.fill' directive with size greater than 8 has been truncated to 8"); 3100| 365| FillSize = 8; 3101| 365| } 3102| | 3103| 895| if (!isUInt<32>(FillExpr) && FillSize > 4) ------------------ | Branch (3103:7): [True: 151, False: 744] | Branch (3103:32): [True: 87, False: 64] ------------------ 3104| 87| Warning(ExprLoc, "'.fill' directive pattern has been truncated to 32-bits"); 3105| | 3106| 895| if (NumValues > 0) { ------------------ | Branch (3106:7): [True: 293, False: 602] ------------------ 3107| 293| int64_t NonZeroFillSize = FillSize > 4 ? 4 : FillSize; ------------------ | Branch (3107:31): [True: 110, False: 183] ------------------ 3108| 293| FillExpr &= ~0ULL >> (64 - NonZeroFillSize * 8); 3109| 293| bool Error; 3110| 69.5k| for (uint64_t i = 0, e = NumValues; i != e; ++i) { ------------------ | Branch (3110:41): [True: 69.2k, False: 277] ------------------ 3111| 69.2k| getStreamer().EmitIntValue(FillExpr, NonZeroFillSize, Error); 3112| 69.2k| if (Error) { ------------------ | Branch (3112:11): [True: 16, False: 69.2k] ------------------ 3113| 16| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 3114| 16| return true; 3115| 16| } 3116| 69.2k| if (NonZeroFillSize < FillSize) { ------------------ | Branch (3116:11): [True: 67.8k, False: 1.42k] ------------------ 3117| 67.8k| getStreamer().EmitIntValue(0, FillSize - NonZeroFillSize, Error); 3118| 67.8k| if (Error) { ------------------ | Branch (3118:13): [True: 0, False: 67.8k] ------------------ 3119| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 3120| 0| return true; 3121| 0| } 3122| 67.8k| } 3123| 69.2k| } 3124| 293| } 3125| | 3126| 879| return false; 3127| 895|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser18parseDirectiveZeroEv: 3002| 19|{ 3003| 19| checkForValidSection(); 3004| | 3005| 19| int64_t NumBytes; 3006| 19| if (parseAbsoluteExpression(NumBytes)) { ------------------ | Branch (3006:7): [True: 1, False: 18] ------------------ 3007| 1| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 3008| 1| return true; 3009| 1| } 3010| | 3011| 18| int64_t Val = 0; 3012| 18| if (getLexer().is(AsmToken::Comma)) { ------------------ | Branch (3012:7): [True: 0, False: 18] ------------------ 3013| 0| Lex(); 3014| 0| if (parseAbsoluteExpression(Val)) { ------------------ | Branch (3014:9): [True: 0, False: 0] ------------------ 3015| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 3016| 0| return true; 3017| 0| } 3018| 0| } 3019| | 3020| 18| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (3020:7): [True: 18, False: 0] ------------------ 3021| | // return TokError("unexpected token in '.zero' directive"); 3022| 18| KsError = KS_ERR_ASM_DIRECTIVE_TOKEN; 3023| 18| return true; 3024| 18| } 3025| | 3026| 0| Lex(); 3027| | 3028| 0| getStreamer().EmitFill(NumBytes, Val); 3029| | 3030| 0| return false; 3031| 18|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser18parseDirectiveCommEb: 4700| 78|{ 4701| 78| checkForValidSection(); 4702| | 4703| | //SMLoc IDLoc = getLexer().getLoc(); 4704| 78| StringRef Name; 4705| 78| if (parseIdentifier(Name)) { ------------------ | Branch (4705:7): [True: 0, False: 78] ------------------ 4706| | //return TokError("expected identifier in directive"); 4707| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 4708| 0| return true; 4709| 0| } 4710| | 4711| 78| if (Name.empty()) { ------------------ | Branch (4711:7): [True: 0, False: 78] ------------------ 4712| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 4713| 0| return true; 4714| 0| } 4715| | // Handle the identifier as the key symbol. 4716| 78| MCSymbol *Sym = getContext().getOrCreateSymbol(Name); 4717| | 4718| 78| if (getLexer().isNot(AsmToken::Comma)) { ------------------ | Branch (4718:7): [True: 65, False: 13] ------------------ 4719| | //return TokError("unexpected token in directive"); 4720| 65| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 4721| 65| return true; 4722| 65| } 4723| 13| Lex(); 4724| | 4725| 13| int64_t Size; 4726| | //SMLoc SizeLoc = getLexer().getLoc(); 4727| 13| if (parseAbsoluteExpression(Size)) { ------------------ | Branch (4727:7): [True: 2, False: 11] ------------------ 4728| 2| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 4729| 2| return true; 4730| 2| } 4731| | 4732| 11| int64_t Pow2Alignment = 0; 4733| 11| SMLoc Pow2AlignmentLoc; 4734| 11| if (getLexer().is(AsmToken::Comma)) { ------------------ | Branch (4734:7): [True: 0, False: 11] ------------------ 4735| 0| Lex(); 4736| 0| Pow2AlignmentLoc = getLexer().getLoc(); 4737| 0| if (parseAbsoluteExpression(Pow2Alignment)) { ------------------ | Branch (4737:9): [True: 0, False: 0] ------------------ 4738| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 4739| 0| return true; 4740| 0| } 4741| | 4742| 0| LCOMM::LCOMMType LCOMM = Lexer.getMAI().getLCOMMDirectiveAlignmentType(); 4743| 0| if (IsLocal && LCOMM == LCOMM::NoAlignment) { ------------------ | Branch (4743:9): [True: 0, False: 0] | Branch (4743:20): [True: 0, False: 0] ------------------ 4744| | //return Error(Pow2AlignmentLoc, "alignment not supported on this target"); 4745| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 4746| 0| return true; 4747| 0| } 4748| | 4749| | // If this target takes alignments in bytes (not log) validate and convert. 4750| 0| if ((!IsLocal && Lexer.getMAI().getCOMMDirectiveAlignmentIsInBytes()) || ------------------ | Branch (4750:10): [True: 0, False: 0] | Branch (4750:22): [True: 0, False: 0] ------------------ 4751| 0| (IsLocal && LCOMM == LCOMM::ByteAlignment)) { ------------------ | Branch (4751:10): [True: 0, False: 0] | Branch (4751:21): [True: 0, False: 0] ------------------ 4752| 0| if (!isPowerOf2_64(Pow2Alignment)) { ------------------ | Branch (4752:11): [True: 0, False: 0] ------------------ 4753| | //return Error(Pow2AlignmentLoc, "alignment must be a power of 2"); 4754| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 4755| 0| return true; 4756| 0| } 4757| 0| Pow2Alignment = Log2_64(Pow2Alignment); 4758| 0| } 4759| 0| } 4760| | 4761| 11| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (4761:7): [True: 0, False: 11] ------------------ 4762| | //return TokError("unexpected token in '.comm' or '.lcomm' directive"); 4763| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 4764| 0| return true; 4765| 0| } 4766| | 4767| 11| Lex(); 4768| | 4769| | // NOTE: a size of zero for a .comm should create a undefined symbol 4770| | // but a size of .lcomm creates a bss symbol of size zero. 4771| 11| if (Size < 0) { ------------------ | Branch (4771:7): [True: 0, False: 11] ------------------ 4772| | //return Error(SizeLoc, "invalid '.comm' or '.lcomm' directive size, can't " 4773| | // "be less than zero"); 4774| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 4775| 0| return true; 4776| 0| } 4777| | 4778| | // NOTE: The alignment in the directive is a power of 2 value, the assembler 4779| | // may internally end up wanting an alignment in bytes. 4780| | // FIXME: Diagnose overflow. 4781| 11| if (Pow2Alignment < 0) { ------------------ | Branch (4781:7): [True: 0, False: 11] ------------------ 4782| | //return Error(Pow2AlignmentLoc, "invalid '.comm' or '.lcomm' directive " 4783| | // "alignment, can't be less than zero"); 4784| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 4785| 0| return true; 4786| 0| } 4787| | 4788| 11| if (!Sym->isUndefined()) { ------------------ | Branch (4788:7): [True: 0, False: 11] ------------------ 4789| | //return Error(IDLoc, "invalid symbol redefinition"); 4790| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 4791| 0| return true; 4792| 0| } 4793| | 4794| | // Create the Symbol as a common or local common with Size and Pow2Alignment 4795| 11| if (IsLocal) { ------------------ | Branch (4795:7): [True: 0, False: 11] ------------------ 4796| 0| getStreamer().EmitLocalCommonSymbol(Sym, Size, 1 << Pow2Alignment); 4797| 0| return false; 4798| 0| } 4799| | 4800| 11| getStreamer().EmitCommonSymbol(Sym, Size, 1 << Pow2Alignment); 4801| 11| return false; 4802| 11|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser21parseDirectiveIncludeEv: 4838| 92|{ 4839| 92| if (getLexer().isNot(AsmToken::String)) { ------------------ | Branch (4839:7): [True: 32, False: 60] ------------------ 4840| | //return TokError("expected string in '.include' directive"); 4841| 32| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 4842| 32| return true; 4843| 32| } 4844| | 4845| | // Allow the strings to have escaped octal character sequence. 4846| 60| std::string Filename; 4847| 60| if (parseEscapedString(Filename)) { ------------------ | Branch (4847:7): [True: 0, False: 60] ------------------ 4848| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 4849| 0| return true; 4850| 0| } 4851| | //SMLoc IncludeLoc = getLexer().getLoc(); 4852| 60| Lex(); 4853| | 4854| 60| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (4854:7): [True: 60, False: 0] ------------------ 4855| | //return TokError("unexpected token in '.include' directive"); 4856| 60| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 4857| 60| return true; 4858| 60| } 4859| | 4860| | // Attempt to switch the lexer to the included file before consuming the end 4861| | // of statement to avoid losing it when we switch. 4862| 0| if (enterIncludeFile(Filename)) { ------------------ | Branch (4862:7): [True: 0, False: 0] ------------------ 4863| | //Error(IncludeLoc, "Could not find include file '" + Filename + "'"); 4864| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 4865| 0| return true; 4866| 0| } 4867| | 4868| 0| return false; 4869| 0|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser18parseDirectiveReptEN7llvm_ks5SMLocENS1_9StringRefE: 5563| 119|{ 5564| 119| const MCExpr *CountExpr; 5565| | //SMLoc CountLoc = getTok().getLoc(); 5566| 119| if (parseExpression(CountExpr)) { ------------------ | Branch (5566:7): [True: 18, False: 101] ------------------ 5567| 18| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 5568| 18| return true; 5569| 18| } 5570| | 5571| 101| int64_t Count; 5572| 101| if (!CountExpr->evaluateAsAbsolute(Count)) { ------------------ | Branch (5572:7): [True: 6, False: 95] ------------------ 5573| 6| eatToEndOfStatement(); 5574| | //return Error(CountLoc, "unexpected token in '" + Dir + "' directive"); 5575| 6| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 5576| 6| return true; 5577| 6| } 5578| | 5579| 95| if (Count < 0) { ------------------ | Branch (5579:7): [True: 0, False: 95] ------------------ 5580| | //return Error(CountLoc, "Count is negative"); 5581| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 5582| 0| return true; 5583| 0| } 5584| | 5585| 95| if (Lexer.isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (5585:7): [True: 0, False: 95] ------------------ 5586| | //return TokError("unexpected token in '" + Dir + "' directive"); 5587| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 5588| 0| return true; 5589| 0| } 5590| | 5591| | // Eat the end of statement. 5592| 95| Lex(); 5593| | 5594| | // Lex the rept definition. 5595| 95| MCAsmMacro *M = parseMacroLikeBody(DirectiveLoc); 5596| 95| if (!M) { ------------------ | Branch (5596:7): [True: 0, False: 95] ------------------ 5597| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 5598| 0| return true; 5599| 0| } 5600| | 5601| | // Macro instantiation is lexical, unfortunately. We construct a new buffer 5602| | // to hold the macro body with substitutions. 5603| 95| SmallString<256> Buf; 5604| 95| raw_svector_ostream OS(Buf); 5605| 1.86k| while (Count--) { ------------------ | Branch (5605:10): [True: 1.77k, False: 95] ------------------ 5606| | // Note that the AtPseudoVariable is disabled for instantiations of .rep(t). 5607| 1.77k| if (expandMacro(OS, M->Body, None, None, false, getTok().getLoc())) { ------------------ | Branch (5607:9): [True: 0, False: 1.77k] ------------------ 5608| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 5609| 0| return true; 5610| 0| } 5611| 1.77k| } 5612| 95| instantiateMacroLikeBody(M, DirectiveLoc, OS); 5613| | 5614| 95| return false; 5615| 95|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser18parseMacroLikeBodyEN7llvm_ks5SMLocE: 5498| 7.01k|MCAsmMacro *AsmParser::parseMacroLikeBody(SMLoc DirectiveLoc) { 5499| 7.01k| AsmToken EndToken, StartToken = getTok(); 5500| | 5501| 7.01k| unsigned NestLevel = 0; 5502| 2.59M| for (;;) { 5503| | // Check whether we have reached the end of the file. 5504| 2.59M| if (getLexer().is(AsmToken::Eof)) { ------------------ | Branch (5504:9): [True: 17, False: 2.59M] ------------------ 5505| | //Error(DirectiveLoc, "no matching '.endr' in definition"); 5506| 17| return nullptr; 5507| 17| } 5508| | 5509| 2.59M| if (Lexer.is(AsmToken::Identifier) && ------------------ | Branch (5509:9): [True: 2.57M, False: 12.4k] | Branch (5509:9): [True: 160, False: 2.59M] ------------------ 5510| 2.57M| (getTok().getIdentifier() == ".rept")) { ------------------ | Branch (5510:9): [True: 160, False: 2.57M] ------------------ 5511| 160| ++NestLevel; 5512| 160| } 5513| | 5514| | // Otherwise, check whether we have reached the .endr. 5515| 2.59M| if (Lexer.is(AsmToken::Identifier) && getTok().getIdentifier() == ".endr") { ------------------ | Branch (5515:9): [True: 2.57M, False: 12.4k] | Branch (5515:9): [True: 6.99k, False: 2.58M] | Branch (5515:43): [True: 6.99k, False: 2.57M] ------------------ 5516| 6.99k| if (NestLevel == 0) { ------------------ | Branch (5516:11): [True: 6.99k, False: 2] ------------------ 5517| 6.99k| EndToken = getTok(); 5518| 6.99k| Lex(); 5519| 6.99k| if (Lexer.isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (5519:13): [True: 63, False: 6.93k] ------------------ 5520| | //TokError("unexpected token in '.endr' directive"); 5521| 63| return nullptr; 5522| 63| } 5523| 6.93k| break; 5524| 6.99k| } 5525| 2| --NestLevel; 5526| 2| } 5527| | 5528| | // Otherwise, scan till the end of the statement. 5529| 2.58M| eatToEndOfStatement(); 5530| 2.58M| } 5531| | 5532| 6.93k| const char *BodyStart = StartToken.getLoc().getPointer(); 5533| 6.93k| const char *BodyEnd = EndToken.getLoc().getPointer(); 5534| 6.93k| StringRef Body = StringRef(BodyStart, BodyEnd - BodyStart); 5535| | 5536| | // We Are Anonymous. 5537| 6.93k| MacroLikeBodies.emplace_back(StringRef(), Body, MCAsmMacroParameters()); 5538| 6.93k| return &MacroLikeBodies.back(); 5539| 7.01k|} AsmParser.cpp:_ZN12_GLOBAL__N_110MCAsmMacroC2EN7llvm_ks9StringRefES2_NSt3__16vectorINS_19MCAsmMacroParameterENS3_9allocatorIS5_EEEE: 77| 6.98k| : Name(N), Body(B), Parameters(std::move(P)) {} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser24instantiateMacroLikeBodyEPNS_10MCAsmMacroEN7llvm_ks5SMLocERNS3_19raw_svector_ostreamE: 5542| 6.93k| raw_svector_ostream &OS) { 5543| 6.93k| OS << ".endr\n"; 5544| | 5545| 6.93k| std::unique_ptr Instantiation = 5546| 6.93k| MemoryBuffer::getMemBufferCopy(OS.str(), ""); 5547| | 5548| | // Create the macro instantiation object and add to the current macro 5549| | // instantiation stack. 5550| 6.93k| MacroInstantiation *MI = new MacroInstantiation( 5551| 6.93k| DirectiveLoc, CurBuffer, getTok().getLoc(), TheCondStack.size()); 5552| 6.93k| ActiveMacros.push_back(MI); 5553| | 5554| | // Jump to the macro instantiation and prime the lexer. 5555| 6.93k| CurBuffer = SrcMgr.AddNewSourceBuffer(std::move(Instantiation), SMLoc()); 5556| 6.93k| Lexer.setBuffer(SrcMgr.getMemoryBuffer(CurBuffer)->getBuffer()); 5557| 6.93k| Lex(); 5558| 6.93k|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser17parseDirectiveIrpEN7llvm_ks5SMLocE: 5620| 7.14k|{ 5621| 7.14k| MCAsmMacroParameter Parameter; 5622| | 5623| 7.14k| if (parseIdentifier(Parameter.Name)) { ------------------ | Branch (5623:7): [True: 1, False: 7.14k] ------------------ 5624| | //return TokError("expected identifier in '.irp' directive"); 5625| 1| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 5626| 1| return true; 5627| 1| } 5628| | 5629| 7.14k| if (Lexer.isNot(AsmToken::Comma)) { ------------------ | Branch (5629:7): [True: 147, False: 6.99k] ------------------ 5630| | //return TokError("expected comma in '.irp' directive"); 5631| 147| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 5632| 147| return true; 5633| 147| } 5634| | 5635| 6.99k| Lex(); 5636| | 5637| 6.99k| MCAsmMacroArguments A; 5638| 6.99k| if (parseMacroArguments(nullptr, A)) { ------------------ | Branch (5638:7): [True: 146, False: 6.84k] ------------------ 5639| 146| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 5640| 146| return true; 5641| 146| } 5642| | 5643| | // Eat the end of statement. 5644| 6.84k| Lex(); 5645| | 5646| | // Lex the irp definition. 5647| 6.84k| MCAsmMacro *M = parseMacroLikeBody(DirectiveLoc); 5648| 6.84k| if (!M) { ------------------ | Branch (5648:7): [True: 15, False: 6.83k] ------------------ 5649| 15| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 5650| 15| return true; 5651| 15| } 5652| | 5653| | // Macro instantiation is lexical, unfortunately. We construct a new buffer 5654| | // to hold the macro body with substitutions. 5655| 6.83k| SmallString<256> Buf; 5656| 6.83k| raw_svector_ostream OS(Buf); 5657| | 5658| 11.4k| for (const MCAsmMacroArgument &Arg : A) { ------------------ | Branch (5658:38): [True: 11.4k, False: 6.83k] ------------------ 5659| | // Note that the AtPseudoVariable is enabled for instantiations of .irp. 5660| | // This is undocumented, but GAS seems to support it. 5661| 11.4k| if (expandMacro(OS, M->Body, Parameter, Arg, true, getTok().getLoc())) { ------------------ | Branch (5661:9): [True: 0, False: 11.4k] ------------------ 5662| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 5663| 0| return true; 5664| 0| } 5665| 11.4k| } 5666| | 5667| 6.83k| instantiateMacroLikeBody(M, DirectiveLoc, OS); 5668| | 5669| 6.83k| return false; 5670| 6.83k|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser18parseDirectiveIrpcEN7llvm_ks5SMLocE: 5675| 121|{ 5676| 121| MCAsmMacroParameter Parameter; 5677| | 5678| 121| if (parseIdentifier(Parameter.Name)) { ------------------ | Branch (5678:7): [True: 0, False: 121] ------------------ 5679| | //return TokError("expected identifier in '.irpc' directive"); 5680| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 5681| 0| return true; 5682| 0| } 5683| | 5684| 121| if (Lexer.isNot(AsmToken::Comma)) { ------------------ | Branch (5684:7): [True: 2, False: 119] ------------------ 5685| | //return TokError("expected comma in '.irpc' directive"); 5686| 2| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 5687| 2| return true; 5688| 2| } 5689| | 5690| 119| Lex(); 5691| | 5692| 119| MCAsmMacroArguments A; 5693| 119| if (parseMacroArguments(nullptr, A)) { ------------------ | Branch (5693:7): [True: 8, False: 111] ------------------ 5694| 8| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 5695| 8| return true; 5696| 8| } 5697| | 5698| 111| if (A.size() != 1 || A.front().size() != 1) { ------------------ | Branch (5698:7): [True: 34, False: 77] | Branch (5698:24): [True: 11, False: 66] ------------------ 5699| | //return TokError("unexpected token in '.irpc' directive"); 5700| 45| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 5701| 45| return true; 5702| 45| } 5703| | 5704| | // Eat the end of statement. 5705| 66| Lex(); 5706| | 5707| | // Lex the irpc definition. 5708| 66| MCAsmMacro *M = parseMacroLikeBody(DirectiveLoc); 5709| 66| if (!M) { ------------------ | Branch (5709:7): [True: 65, False: 1] ------------------ 5710| 65| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 5711| 65| return true; 5712| 65| } 5713| | 5714| | // Macro instantiation is lexical, unfortunately. We construct a new buffer 5715| | // to hold the macro body with substitutions. 5716| 1| SmallString<256> Buf; 5717| 1| raw_svector_ostream OS(Buf); 5718| | 5719| 1| StringRef Values = A.front().front().getString(); 5720| 17| for (std::size_t I = 0, End = Values.size(); I != End; ++I) { ------------------ | Branch (5720:48): [True: 16, False: 1] ------------------ 5721| 16| MCAsmMacroArgument Arg; 5722| 16| Arg.emplace_back(AsmToken::Identifier, Values.slice(I, I + 1)); 5723| | 5724| | // Note that the AtPseudoVariable is enabled for instantiations of .irpc. 5725| | // This is undocumented, but GAS seems to support it. 5726| 16| if (expandMacro(OS, M->Body, Parameter, Arg, true, getTok().getLoc())) { ------------------ | Branch (5726:9): [True: 0, False: 16] ------------------ 5727| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 5728| 0| return true; 5729| 0| } 5730| 16| } 5731| | 5732| 1| instantiateMacroLikeBody(M, DirectiveLoc, OS); 5733| | 5734| 1| return false; 5735| 1|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser18parseDirectiveEndrEN7llvm_ks5SMLocE: 5738| 353|{ 5739| 353| if (ActiveMacros.empty()) { ------------------ | Branch (5739:7): [True: 46, False: 307] ------------------ 5740| | //return TokError("unmatched '.endr' directive"); 5741| 46| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 5742| 46| return true; 5743| 46| } 5744| | 5745| | // The only .repl that should get here are the ones created by 5746| | // instantiateMacroLikeBody. 5747| 353| assert(getLexer().is(AsmToken::EndOfStatement)); ------------------ | Branch (5747:3): [True: 307, False: 0] ------------------ 5748| | 5749| 307| handleMacroExit(); 5750| 307| return false; 5751| 307|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser15handleMacroExitEv: 2507| 368|void AsmParser::handleMacroExit() { 2508| | // Jump to the EndOfStatement we should return to, and consume it. 2509| 368| jumpToLoc(ActiveMacros.back()->ExitLoc, ActiveMacros.back()->ExitBuffer); 2510| 368| Lex(); 2511| | 2512| | // Pop the instantiation entry. 2513| 368| delete ActiveMacros.back(); 2514| 368| ActiveMacros.pop_back(); 2515| 368|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser9jumpToLocEN7llvm_ks5SMLocEj: 649| 368|void AsmParser::jumpToLoc(SMLoc Loc, unsigned InBuffer) { 650| 368| CurBuffer = InBuffer ? InBuffer : SrcMgr.FindBufferContainingLoc(Loc); ------------------ | Branch (650:15): [True: 368, False: 0] ------------------ 651| 368| Lexer.setBuffer(SrcMgr.getMemoryBuffer(CurBuffer)->getBuffer(), 652| 368| Loc.getPointer()); 653| 368|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser19parseDirectiveSpaceEN7llvm_ks9StringRefE: 4574| 1.05k|{ 4575| 1.05k| checkForValidSection(); 4576| | 4577| 1.05k| int64_t NumBytes; 4578| 1.05k| if (parseAbsoluteExpression(NumBytes)) { ------------------ | Branch (4578:7): [True: 4, False: 1.05k] ------------------ 4579| 4| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 4580| 4| return true; 4581| 4| } 4582| | 4583| 1.05k| int64_t FillExpr = 0; 4584| 1.05k| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (4584:7): [True: 188, False: 867] ------------------ 4585| 188| if (getLexer().isNot(AsmToken::Comma)) { ------------------ | Branch (4585:9): [True: 188, False: 0] ------------------ 4586| | //return TokError("unexpected token in '" + Twine(IDVal) + "' directive"); 4587| 188| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 4588| 188| return true; 4589| 188| } 4590| 0| Lex(); 4591| | 4592| 0| if (parseAbsoluteExpression(FillExpr)) ------------------ | Branch (4592:9): [True: 0, False: 0] ------------------ 4593| 0| return true; 4594| | 4595| 0| if (getLexer().isNot(AsmToken::EndOfStatement)) ------------------ | Branch (4595:9): [True: 0, False: 0] ------------------ 4596| | //return TokError("unexpected token in '" + Twine(IDVal) + "' directive"); 4597| 0| return true; 4598| 0| } 4599| | 4600| 867| Lex(); 4601| | 4602| 867| if (NumBytes <= 0) { ------------------ | Branch (4602:7): [True: 253, False: 614] ------------------ 4603| | //return TokError("invalid number of bytes in '" + Twine(IDVal) + 4604| | // "' directive"); 4605| 253| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 4606| 253| return true; 4607| 253| } 4608| | 4609| | // FIXME: Sometimes the fill expr is 'nop' if it isn't supplied, instead of 0. 4610| 614| getStreamer().EmitFill(NumBytes, FillExpr); 4611| | 4612| 614| return false; 4613| 867|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser18parseDirectiveFileEN7llvm_ks5SMLocE: 3288| 527|{ 3289| | // FIXME: I'm not sure what this is. 3290| 527| int64_t FileNumber = -1; 3291| | //SMLoc FileNumberLoc = getLexer().getLoc(); 3292| 527| if (getLexer().is(AsmToken::Integer)) { ------------------ | Branch (3292:7): [True: 145, False: 382] ------------------ 3293| 145| bool valid; 3294| 145| FileNumber = getTok().getIntVal(valid); 3295| 145| if (!valid) { ------------------ | Branch (3295:9): [True: 0, False: 145] ------------------ 3296| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 3297| 0| return true; 3298| 0| } 3299| 145| Lex(); 3300| | 3301| 145| if (FileNumber < 1) { ------------------ | Branch (3301:9): [True: 26, False: 119] ------------------ 3302| | //return TokError("file number less than one"); 3303| 26| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 3304| 26| return true; 3305| 26| } 3306| 145| } 3307| | 3308| 501| if (getLexer().isNot(AsmToken::String)) { ------------------ | Branch (3308:7): [True: 120, False: 381] ------------------ 3309| | //return TokError("unexpected token in '.file' directive"); 3310| 120| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 3311| 120| return true; 3312| 120| } 3313| | 3314| | // Usually the directory and filename together, otherwise just the directory. 3315| | // Allow the strings to have escaped octal character sequence. 3316| 381| std::string Path = getTok().getString(); 3317| 381| if (parseEscapedString(Path)) ------------------ | Branch (3317:7): [True: 6, False: 375] ------------------ 3318| 6| return true; 3319| 375| Lex(); 3320| | 3321| 375| StringRef Directory; 3322| 375| StringRef Filename; 3323| 375| std::string FilenameData; 3324| 375| if (getLexer().is(AsmToken::String)) { ------------------ | Branch (3324:7): [True: 8, False: 367] ------------------ 3325| 8| if (FileNumber == -1) ------------------ | Branch (3325:9): [True: 0, False: 8] ------------------ 3326| | //return TokError("explicit path specified, but no file number"); 3327| 0| return true; 3328| 8| if (parseEscapedString(FilenameData)) ------------------ | Branch (3328:9): [True: 4, False: 4] ------------------ 3329| 4| return true; 3330| 4| Filename = FilenameData; 3331| 4| Directory = Path; 3332| 4| Lex(); 3333| 367| } else { 3334| 367| Filename = Path; 3335| 367| } 3336| | 3337| 371| if (getLexer().isNot(AsmToken::EndOfStatement)) ------------------ | Branch (3337:7): [True: 16, False: 355] ------------------ 3338| | //return TokError("unexpected token in '.file' directive"); 3339| 16| return true; 3340| | 3341| 355| if (FileNumber == -1) ------------------ | Branch (3341:7): [True: 355, False: 0] ------------------ 3342| 355| getStreamer().EmitFileDirective(Filename); 3343| 0| else { 3344| 0| if (getContext().getGenDwarfForAssembly()) ------------------ | Branch (3344:9): [True: 0, False: 0] ------------------ 3345| | //Error(DirectiveLoc, 3346| | // "input can't have .file dwarf directives when -g is " 3347| | // "used to generate dwarf debug info for assembly code"); 3348| 0| return true; 3349| | 3350| 0| if (getStreamer().EmitDwarfFileDirective(FileNumber, Directory, Filename) == ------------------ | Branch (3350:9): [True: 0, False: 0] ------------------ 3351| 0| 0) 3352| | //Error(FileNumberLoc, "file number already allocated"); 3353| 0| return true; 3354| 0| } 3355| | 3356| 355| return false; 3357| 355|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser18parseDirectiveLineEv: 3362| 718|{ 3363| 718| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (3363:7): [True: 40, False: 678] ------------------ 3364| 40| if (getLexer().isNot(AsmToken::Integer)) { ------------------ | Branch (3364:9): [True: 12, False: 28] ------------------ 3365| | //return TokError("unexpected token in '.line' directive"); 3366| 12| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 3367| 12| return true; 3368| 12| } 3369| | 3370| 28| bool valid; 3371| 28| int64_t LineNumber = getTok().getIntVal(valid); 3372| 28| if (!valid) { ------------------ | Branch (3372:9): [True: 0, False: 28] ------------------ 3373| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 3374| 0| return true; 3375| 0| } 3376| 28| (void)LineNumber; 3377| 28| Lex(); 3378| | 3379| | // FIXME: Do something with the .line. 3380| 28| } 3381| | 3382| 706| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (3382:7): [True: 8, False: 698] ------------------ 3383| | //return TokError("unexpected token in '.line' directive"); 3384| 8| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 3385| 8| return true; 3386| 8| } 3387| | 3388| 698| return false; 3389| 706|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser17parseDirectiveLocEv: 3399| 1|{ 3400| 1| if (getLexer().isNot(AsmToken::Integer)) { ------------------ | Branch (3400:7): [True: 1, False: 0] ------------------ 3401| | //return TokError("unexpected token in '.loc' directive"); 3402| 1| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 3403| 1| return true; 3404| 1| } 3405| 0| bool valid; 3406| 0| int64_t FileNumber = getTok().getIntVal(valid); 3407| 0| if (!valid) { ------------------ | Branch (3407:7): [True: 0, False: 0] ------------------ 3408| 0| return true; 3409| 0| } 3410| 0| if (FileNumber < 1) { ------------------ | Branch (3410:7): [True: 0, False: 0] ------------------ 3411| | //return TokError("file number less than one in '.loc' directive"); 3412| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 3413| 0| return true; 3414| 0| } 3415| 0| if (!getContext().isValidDwarfFileNumber(FileNumber)) { ------------------ | Branch (3415:7): [True: 0, False: 0] ------------------ 3416| | //return TokError("unassigned file number in '.loc' directive"); 3417| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 3418| 0| return true; 3419| 0| } 3420| 0| Lex(); 3421| | 3422| 0| int64_t LineNumber = 0; 3423| 0| if (getLexer().is(AsmToken::Integer)) { ------------------ | Branch (3423:7): [True: 0, False: 0] ------------------ 3424| 0| bool valid; 3425| 0| LineNumber = getTok().getIntVal(valid); 3426| 0| if (!valid) { ------------------ | Branch (3426:9): [True: 0, False: 0] ------------------ 3427| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 3428| 0| return true; 3429| 0| } 3430| 0| if (LineNumber < 0) { ------------------ | Branch (3430:9): [True: 0, False: 0] ------------------ 3431| | //return TokError("line number less than zero in '.loc' directive"); 3432| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 3433| 0| return true; 3434| 0| } 3435| 0| Lex(); 3436| 0| } 3437| | 3438| 0| int64_t ColumnPos = 0; 3439| 0| if (getLexer().is(AsmToken::Integer)) { ------------------ | Branch (3439:7): [True: 0, False: 0] ------------------ 3440| 0| bool valid; 3441| 0| ColumnPos = getTok().getIntVal(valid); 3442| 0| if (!valid) { ------------------ | Branch (3442:9): [True: 0, False: 0] ------------------ 3443| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 3444| 0| return true; 3445| 0| } 3446| 0| if (ColumnPos < 0) { ------------------ | Branch (3446:9): [True: 0, False: 0] ------------------ 3447| | //return TokError("column position less than zero in '.loc' directive"); 3448| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 3449| 0| return true; 3450| 0| } 3451| 0| Lex(); 3452| 0| } 3453| | 3454| 0| unsigned Flags = DWARF2_LINE_DEFAULT_IS_STMT ? DWARF2_FLAG_IS_STMT : 0; ------------------ | | 66| 0|#define DWARF2_LINE_DEFAULT_IS_STMT 1 | | ------------------ | | | Branch (66:37): [True: 0, Folded] | | ------------------ ------------------ unsigned Flags = DWARF2_LINE_DEFAULT_IS_STMT ? DWARF2_FLAG_IS_STMT : 0; ------------------ | | 68| 0|#define DWARF2_FLAG_IS_STMT (1 << 0) ------------------ 3455| 0| unsigned Isa = 0; 3456| 0| int64_t Discriminator = 0; 3457| 0| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (3457:7): [True: 0, False: 0] ------------------ 3458| 0| for (;;) { 3459| 0| if (getLexer().is(AsmToken::EndOfStatement)) ------------------ | Branch (3459:11): [True: 0, False: 0] ------------------ 3460| 0| break; 3461| | 3462| 0| StringRef Name; 3463| 0| SMLoc Loc = getTok().getLoc(); 3464| 0| if (parseIdentifier(Name)) { ------------------ | Branch (3464:11): [True: 0, False: 0] ------------------ 3465| | //return TokError("unexpected token in '.loc' directive"); 3466| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 3467| 0| return true; 3468| 0| } 3469| | 3470| 0| if (Name == "basic_block") ------------------ | Branch (3470:11): [True: 0, False: 0] ------------------ 3471| 0| Flags |= DWARF2_FLAG_BASIC_BLOCK; ------------------ | | 69| 0|#define DWARF2_FLAG_BASIC_BLOCK (1 << 1) ------------------ 3472| 0| else if (Name == "prologue_end") ------------------ | Branch (3472:16): [True: 0, False: 0] ------------------ 3473| 0| Flags |= DWARF2_FLAG_PROLOGUE_END; ------------------ | | 70| 0|#define DWARF2_FLAG_PROLOGUE_END (1 << 2) ------------------ 3474| 0| else if (Name == "epilogue_begin") ------------------ | Branch (3474:16): [True: 0, False: 0] ------------------ 3475| 0| Flags |= DWARF2_FLAG_EPILOGUE_BEGIN; ------------------ | | 71| 0|#define DWARF2_FLAG_EPILOGUE_BEGIN (1 << 3) ------------------ 3476| 0| else if (Name == "is_stmt") { ------------------ | Branch (3476:16): [True: 0, False: 0] ------------------ 3477| 0| Loc = getTok().getLoc(); 3478| 0| const MCExpr *Value; 3479| 0| if (parseExpression(Value)) { ------------------ | Branch (3479:13): [True: 0, False: 0] ------------------ 3480| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 3481| 0| return true; 3482| 0| } 3483| | // The expression must be the constant 0 or 1. 3484| 0| if (const MCConstantExpr *MCE = dyn_cast(Value)) { ------------------ | Branch (3484:35): [True: 0, False: 0] ------------------ 3485| 0| int Value = MCE->getValue(); 3486| 0| if (Value == 0) ------------------ | Branch (3486:15): [True: 0, False: 0] ------------------ 3487| 0| Flags &= ~DWARF2_FLAG_IS_STMT; ------------------ | | 68| 0|#define DWARF2_FLAG_IS_STMT (1 << 0) ------------------ 3488| 0| else if (Value == 1) ------------------ | Branch (3488:20): [True: 0, False: 0] ------------------ 3489| 0| Flags |= DWARF2_FLAG_IS_STMT; ------------------ | | 68| 0|#define DWARF2_FLAG_IS_STMT (1 << 0) ------------------ 3490| 0| else { 3491| | //return Error(Loc, "is_stmt value not 0 or 1"); 3492| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 3493| 0| return true; 3494| 0| } 3495| 0| } else { 3496| | //return Error(Loc, "is_stmt value not the constant value of 0 or 1"); 3497| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 3498| 0| return true; 3499| 0| } 3500| 0| } else if (Name == "isa") { ------------------ | Branch (3500:18): [True: 0, False: 0] ------------------ 3501| 0| Loc = getTok().getLoc(); 3502| 0| const MCExpr *Value; 3503| 0| if (parseExpression(Value)) { ------------------ | Branch (3503:13): [True: 0, False: 0] ------------------ 3504| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 3505| 0| return true; 3506| 0| } 3507| | // The expression must be a constant greater or equal to 0. 3508| 0| if (const MCConstantExpr *MCE = dyn_cast(Value)) { ------------------ | Branch (3508:35): [True: 0, False: 0] ------------------ 3509| 0| int Value = MCE->getValue(); 3510| 0| if (Value < 0) { ------------------ | Branch (3510:15): [True: 0, False: 0] ------------------ 3511| | //return Error(Loc, "isa number less than zero"); 3512| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 3513| 0| return true; 3514| 0| } 3515| 0| Isa = Value; 3516| 0| } else { 3517| | //return Error(Loc, "isa number not a constant value"); 3518| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 3519| 0| return true; 3520| 0| } 3521| 0| } else if (Name == "discriminator") { ------------------ | Branch (3521:18): [True: 0, False: 0] ------------------ 3522| 0| if (parseAbsoluteExpression(Discriminator)) { ------------------ | Branch (3522:13): [True: 0, False: 0] ------------------ 3523| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 3524| 0| return true; 3525| 0| } 3526| 0| } else { 3527| | //return Error(Loc, "unknown sub-directive in '.loc' directive"); 3528| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 3529| 0| return true; 3530| 0| } 3531| | 3532| 0| if (getLexer().is(AsmToken::EndOfStatement)) ------------------ | Branch (3532:11): [True: 0, False: 0] ------------------ 3533| 0| break; 3534| 0| } 3535| 0| } 3536| | 3537| 0| getStreamer().EmitDwarfLocDirective(FileNumber, LineNumber, ColumnPos, Flags, 3538| 0| Isa, Discriminator, StringRef()); 3539| | 3540| 0| return false; 3541| 0|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser19parseDirectiveMacroEN7llvm_ks5SMLocE: 4166| 319|{ 4167| 319| StringRef Name; 4168| 319| if (parseIdentifier(Name)) { ------------------ | Branch (4168:7): [True: 1, False: 318] ------------------ 4169| | //return TokError("expected identifier in '.macro' directive"); 4170| 1| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 4171| 1| return true; 4172| 1| } 4173| | 4174| 318| if (getLexer().is(AsmToken::Comma)) ------------------ | Branch (4174:7): [True: 203, False: 115] ------------------ 4175| 203| Lex(); 4176| | 4177| 318| MCAsmMacroParameters Parameters; 4178| 4.46k| while (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (4178:10): [True: 4.18k, False: 277] ------------------ 4179| | 4180| 4.18k| if (!Parameters.empty() && Parameters.back().Vararg) { ------------------ | Branch (4180:9): [True: 3.92k, False: 263] | Branch (4180:32): [True: 0, False: 3.92k] ------------------ 4181| | //return Error(Lexer.getLoc(), 4182| | // "Vararg parameter '" + Parameters.back().Name + 4183| | // "' should be last one in the list of parameters."); 4184| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 4185| 0| return true; 4186| 0| } 4187| | 4188| 4.18k| MCAsmMacroParameter Parameter; 4189| 4.18k| if (parseIdentifier(Parameter.Name)) { ------------------ | Branch (4189:9): [True: 34, False: 4.15k] ------------------ 4190| | //return TokError("expected identifier in '.macro' directive"); 4191| 34| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 4192| 34| return true; 4193| 34| } 4194| | 4195| 4.15k| if (Lexer.is(AsmToken::Colon)) { ------------------ | Branch (4195:9): [True: 0, False: 4.15k] ------------------ 4196| 0| Lex(); // consume ':' 4197| | 4198| 0| SMLoc QualLoc; 4199| 0| StringRef Qualifier; 4200| | 4201| 0| QualLoc = Lexer.getLoc(); 4202| 0| if (parseIdentifier(Qualifier)) { ------------------ | Branch (4202:11): [True: 0, False: 0] ------------------ 4203| | //return Error(QualLoc, "missing parameter qualifier for " 4204| | // "'" + Parameter.Name + "' in macro '" + Name + "'"); 4205| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 4206| 0| return true; 4207| 0| } 4208| | 4209| 0| if (Qualifier == "req") ------------------ | Branch (4209:11): [True: 0, False: 0] ------------------ 4210| 0| Parameter.Required = true; 4211| 0| else if (Qualifier == "vararg") ------------------ | Branch (4211:16): [True: 0, False: 0] ------------------ 4212| 0| Parameter.Vararg = true; 4213| 0| else { 4214| | //return Error(QualLoc, Qualifier + " is not a valid parameter qualifier " 4215| | // "for '" + Parameter.Name + "' in macro '" + Name + "'"); 4216| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 4217| 0| return true; 4218| 0| } 4219| 0| } 4220| | 4221| 4.15k| if (getLexer().is(AsmToken::Equal)) { ------------------ | Branch (4221:9): [True: 239, False: 3.91k] ------------------ 4222| 239| Lex(); 4223| | 4224| 239| SMLoc ParamLoc; 4225| | 4226| 239| ParamLoc = Lexer.getLoc(); 4227| 239| if (parseMacroArgument(Parameter.Value, /*Vararg=*/false )) { ------------------ | Branch (4227:11): [True: 7, False: 232] ------------------ 4228| 7| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 4229| 7| return true; 4230| 7| } 4231| | 4232| 232| if (Parameter.Required) ------------------ | Branch (4232:11): [True: 0, False: 232] ------------------ 4233| 0| Warning(ParamLoc, "pointless default value for required parameter " 4234| 0| "'" + Parameter.Name + "' in macro '" + Name + "'"); 4235| 232| } 4236| | 4237| 4.14k| Parameters.push_back(std::move(Parameter)); 4238| | 4239| 4.14k| if (getLexer().is(AsmToken::Comma)) ------------------ | Branch (4239:9): [True: 1.65k, False: 2.48k] ------------------ 4240| 1.65k| Lex(); 4241| 4.14k| } 4242| | 4243| | // Eat the end of statement. 4244| 277| Lex(); 4245| | 4246| 277| AsmToken EndToken, StartToken = getTok(); 4247| 277| unsigned MacroDepth = 0; 4248| | 4249| | // Lex the macro definition. 4250| 691| for (;;) { 4251| | // Check whether we have reached the end of the file. 4252| 691| if (getLexer().is(AsmToken::Eof)) { ------------------ | Branch (4252:9): [True: 10, False: 681] ------------------ 4253| | //return Error(DirectiveLoc, "no matching '.endmacro' in definition"); 4254| 10| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 4255| 10| return true; 4256| 10| } 4257| | 4258| | // Otherwise, check whether we have reach the .endmacro. 4259| 681| if (getLexer().is(AsmToken::Identifier)) { ------------------ | Branch (4259:9): [True: 487, False: 194] ------------------ 4260| 487| if (getTok().getIdentifier() == ".endm" || ------------------ | Branch (4260:11): [True: 268, False: 219] | Branch (4260:11): [True: 269, False: 218] ------------------ 4261| 269| getTok().getIdentifier() == ".endmacro") { ------------------ | Branch (4261:11): [True: 1, False: 218] ------------------ 4262| 269| if (MacroDepth == 0) { // Outermost macro. ------------------ | Branch (4262:13): [True: 267, False: 2] ------------------ 4263| 267| EndToken = getTok(); 4264| 267| Lex(); 4265| 267| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (4265:15): [True: 1, False: 266] ------------------ 4266| | //return TokError("unexpected token in '" + EndToken.getIdentifier() + 4267| | // "' directive"); 4268| 1| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 4269| 1| return true; 4270| 1| } 4271| 266| break; 4272| 267| } else { 4273| | // Otherwise we just found the end of an inner macro. 4274| 2| --MacroDepth; 4275| 2| } 4276| 269| } else if (getTok().getIdentifier() == ".macro") { ------------------ | Branch (4276:18): [True: 3, False: 215] ------------------ 4277| | // We allow nested macros. Those aren't instantiated until the outermost 4278| | // macro is expanded so just ignore them for now. 4279| 3| ++MacroDepth; 4280| 3| } 4281| 487| } 4282| | 4283| | // Otherwise, scan til the end of the statement. 4284| 414| eatToEndOfStatement(); 4285| 414| } 4286| | 4287| 266| if (lookupMacro(Name)) { ------------------ | Branch (4287:7): [True: 212, False: 54] ------------------ 4288| | //return Error(DirectiveLoc, "macro '" + Name + "' is already defined"); 4289| 212| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 4290| 212| return true; 4291| 212| } 4292| | 4293| 54| const char *BodyStart = StartToken.getLoc().getPointer(); 4294| 54| const char *BodyEnd = EndToken.getLoc().getPointer(); 4295| 54| StringRef Body = StringRef(BodyStart, BodyEnd - BodyStart); 4296| 54| checkForBadMacro(DirectiveLoc, Name, Body, Parameters); 4297| 54| defineMacro(Name, MCAsmMacro(Name, Body, std::move(Parameters))); 4298| 54| return false; 4299| 266|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser16checkForBadMacroEN7llvm_ks5SMLocENS1_9StringRefES3_NS1_8ArrayRefINS_19MCAsmMacroParameterEEE: 4317| 54| ArrayRef Parameters) { 4318| | // If this macro is not defined with named parameters the warning we are 4319| | // checking for here doesn't apply. 4320| 54| unsigned NParameters = Parameters.size(); 4321| 54| if (NParameters == 0) ------------------ | Branch (4321:7): [True: 15, False: 39] ------------------ 4322| 15| return; 4323| | 4324| 39| bool NamedParametersFound = false; 4325| 39| bool PositionalParametersFound = false; 4326| | 4327| | // Look at the body of the macro for use of both the named parameters and what 4328| | // are likely to be positional parameters. This is what expandMacro() is 4329| | // doing when it finds the parameters in the body. 4330| 1.90k| while (!Body.empty()) { ------------------ | Branch (4330:10): [True: 1.88k, False: 19] ------------------ 4331| | // Scan for the next possible parameter. 4332| 1.88k| std::size_t End = Body.size(), Pos = 0; 4333| 10.3k| for (; Pos != End; ++Pos) { ------------------ | Branch (4333:12): [True: 10.3k, False: 20] ------------------ 4334| | // Check for a substitution or escape. 4335| | // This macro is defined with parameters, look for \foo, \bar, etc. 4336| 10.3k| if (Body[Pos] == '\\' && Pos + 1 != End) ------------------ | Branch (4336:11): [True: 285, False: 10.0k] | Branch (4336:32): [True: 285, False: 0] ------------------ 4337| 285| break; 4338| | 4339| | // This macro should have parameters, but look for $0, $1, ..., $n too. 4340| 10.0k| if (Body[Pos] != '$' || Pos + 1 == End) ------------------ | Branch (4340:11): [True: 7.97k, False: 2.05k] | Branch (4340:31): [True: 0, False: 2.05k] ------------------ 4341| 7.97k| continue; 4342| 2.05k| char Next = Body[Pos + 1]; 4343| 2.05k| if (Next == '$' || Next == 'n' || ------------------ | Branch (4343:11): [True: 1.18k, False: 862] | Branch (4343:26): [True: 70, False: 792] ------------------ 4344| 792| isdigit(static_cast(Next))) ------------------ | Branch (4344:11): [True: 321, False: 471] ------------------ 4345| 1.57k| break; 4346| 2.05k| } 4347| | 4348| | // Check if we reached the end. 4349| 1.88k| if (Pos == End) ------------------ | Branch (4349:9): [True: 20, False: 1.86k] ------------------ 4350| 20| break; 4351| | 4352| 1.86k| if (Body[Pos] == '$') { ------------------ | Branch (4352:9): [True: 1.57k, False: 285] ------------------ 4353| 1.57k| switch (Body[Pos + 1]) { 4354| | // $$ => $ 4355| 1.18k| case '$': ------------------ | Branch (4355:7): [True: 1.18k, False: 391] ------------------ 4356| 1.18k| break; 4357| | 4358| | // $n => number of arguments 4359| 70| case 'n': ------------------ | Branch (4359:7): [True: 70, False: 1.50k] ------------------ 4360| 70| PositionalParametersFound = true; 4361| 70| break; 4362| | 4363| | // $[0-9] => argument 4364| 321| default: { ------------------ | Branch (4364:7): [True: 321, False: 1.25k] ------------------ 4365| 321| PositionalParametersFound = true; 4366| 321| break; 4367| 0| } 4368| 1.57k| } 4369| 1.57k| Pos += 2; 4370| 1.57k| } else { 4371| 285| unsigned I = Pos + 1; 4372| 927| while (isIdentifierChar(Body[I]) && I + 1 != End) ------------------ | Branch (4372:14): [True: 642, False: 285] | Branch (4372:43): [True: 642, False: 0] ------------------ 4373| 642| ++I; 4374| | 4375| 285| const char *Begin = Body.data() + Pos + 1; 4376| 285| StringRef Argument(Begin, I - (Pos + 1)); 4377| 285| unsigned Index = 0; 4378| 1.02k| for (; Index < NParameters; ++Index) ------------------ | Branch (4378:14): [True: 741, False: 285] ------------------ 4379| 741| if (Parameters[Index].Name == Argument) ------------------ | Branch (4379:13): [True: 0, False: 741] ------------------ 4380| 0| break; 4381| | 4382| 285| if (Index == NParameters) { ------------------ | Branch (4382:11): [True: 285, False: 0] ------------------ 4383| 285| if (Body[Pos + 1] == '(' && Body[Pos + 2] == ')') ------------------ | Branch (4383:13): [True: 45, False: 240] | Branch (4383:37): [True: 43, False: 2] ------------------ 4384| 43| Pos += 3; 4385| 242| else { 4386| 242| Pos = I; 4387| 242| } 4388| 285| } else { 4389| 0| NamedParametersFound = true; 4390| 0| Pos += 1 + Argument.size(); 4391| 0| } 4392| 285| } 4393| | // Update the scan point. 4394| 1.86k| Body = Body.substr(Pos); 4395| 1.86k| } 4396| | 4397| 39| if (!NamedParametersFound && PositionalParametersFound) ------------------ | Branch (4397:7): [True: 39, False: 0] | Branch (4397:32): [True: 12, False: 27] ------------------ 4398| 12| Warning(DirectiveLoc, "macro defined with named parameters which are not " 4399| 12| "used in macro body, possible positional parameter " 4400| 12| "found in body which will have no effect"); 4401| 39|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser11defineMacroEN7llvm_ks9StringRefENS_10MCAsmMacroE: 2451| 54|void AsmParser::defineMacro(StringRef Name, MCAsmMacro Macro) { 2452| 54| MacroMap.insert(std::make_pair(Name, std::move(Macro))); 2453| 54|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser26isInsideMacroInstantiationEv: 297| 83| bool isInsideMacroInstantiation() {return !ActiveMacros.empty();} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser22parseDirectiveEndMacroEN7llvm_ks9StringRefE: 4434| 211|{ 4435| 211| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (4435:7): [True: 128, False: 83] ------------------ 4436| | //return TokError("unexpected token in '" + Directive + "' directive"); 4437| 128| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 4438| 128| return true; 4439| 128| } 4440| | 4441| | // If we are inside a macro instantiation, terminate the current 4442| | // instantiation. 4443| 83| if (isInsideMacroInstantiation()) { ------------------ | Branch (4443:7): [True: 61, False: 22] ------------------ 4444| 61| handleMacroExit(); 4445| 61| return false; 4446| 61| } 4447| | 4448| | // Otherwise, this .endmacro is a stray entry in the file; well formed 4449| | // .endmacro directives are handled during the macro definition parsing. 4450| | //return TokError("unexpected '" + Directive + "' in file, " 4451| | // "no current macro definition"); 4452| 22| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 4453| 22| return true; 4454| 83|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser19parseDirectiveErrorEN7llvm_ks5SMLocEb: 5206| 29|{ 5207| 29| if (!TheCondStack.empty()) { ------------------ | Branch (5207:7): [True: 27, False: 2] ------------------ 5208| 27| if (TheCondStack.back().Ignore) { ------------------ | Branch (5208:9): [True: 0, False: 27] ------------------ 5209| 0| eatToEndOfStatement(); 5210| 0| return false; 5211| 0| } 5212| 27| } 5213| | 5214| 29| if (!WithMessage) { ------------------ | Branch (5214:7): [True: 0, False: 29] ------------------ 5215| | //return Error(L, ".err encountered"); 5216| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 5217| 0| return true; 5218| 0| } 5219| | 5220| 29| StringRef Message = ".error directive invoked in source file"; 5221| 29| if (Lexer.isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (5221:7): [True: 29, False: 0] ------------------ 5222| 29| if (Lexer.isNot(AsmToken::String)) { ------------------ | Branch (5222:9): [True: 29, False: 0] ------------------ 5223| | //TokError(".error argument must be a string"); 5224| 29| eatToEndOfStatement(); 5225| 29| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 5226| 29| return true; 5227| 29| } 5228| | 5229| 0| bool valid; 5230| 0| Message = getTok().getStringContents(valid); 5231| 0| if (!valid) { ------------------ | Branch (5231:9): [True: 0, False: 0] ------------------ 5232| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 5233| 0| return true; 5234| 0| } 5235| 0| Lex(); 5236| 0| } 5237| | 5238| | //Error(L, Message); 5239| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 5240| 0| return true; 5241| 29|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser21parseDirectiveWarningEN7llvm_ks5SMLocE: 5246| 4.06k|{ 5247| 4.06k| if (!TheCondStack.empty()) { ------------------ | Branch (5247:7): [True: 0, False: 4.06k] ------------------ 5248| 0| if (TheCondStack.back().Ignore) { ------------------ | Branch (5248:9): [True: 0, False: 0] ------------------ 5249| 0| eatToEndOfStatement(); 5250| 0| return false; 5251| 0| } 5252| 0| } 5253| | 5254| 4.06k| StringRef Message = ".warning directive invoked in source file"; 5255| 4.06k| if (Lexer.isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (5255:7): [True: 3.93k, False: 128] ------------------ 5256| 3.93k| if (Lexer.isNot(AsmToken::String)) { ------------------ | Branch (5256:9): [True: 3.93k, False: 0] ------------------ 5257| | //TokError(".warning argument must be a string"); 5258| 3.93k| eatToEndOfStatement(); 5259| 3.93k| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 5260| 3.93k| return true; 5261| 3.93k| } 5262| | 5263| 0| bool valid; 5264| 0| Message = getTok().getStringContents(valid); 5265| 0| if (!valid) { ------------------ | Branch (5265:9): [True: 0, False: 0] ------------------ 5266| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 5267| 0| return true; 5268| 0| } 5269| 0| Lex(); 5270| 0| } 5271| | 5272| 128| Warning(L, Message); 5273| 128| return false; 5274| 4.06k|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser19parseDirectiveRelocEN7llvm_ks5SMLocE: 2734| 288|{ 2735| 288| const MCExpr *Offset; 2736| 288| const MCExpr *Expr = nullptr; 2737| | 2738| | //SMLoc OffsetLoc = Lexer.getTok().getLoc(); 2739| 288| if (parseExpression(Offset)) { ------------------ | Branch (2739:7): [True: 0, False: 288] ------------------ 2740| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 2741| 0| return true; 2742| 0| } 2743| | 2744| | // We can only deal with constant expressions at the moment. 2745| 288| int64_t OffsetValue; 2746| 288| if (!Offset->evaluateAsAbsolute(OffsetValue)) { ------------------ | Branch (2746:7): [True: 251, False: 37] ------------------ 2747| | //return Error(OffsetLoc, "expression is not a constant value"); 2748| 251| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 2749| 251| return true; 2750| 251| } 2751| | 2752| 37| if (OffsetValue < 0) { ------------------ | Branch (2752:7): [True: 0, False: 37] ------------------ 2753| | //return Error(OffsetLoc, "expression is negative"); 2754| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 2755| 0| return true; 2756| 0| } 2757| | 2758| 37| if (Lexer.isNot(AsmToken::Comma)) { ------------------ | Branch (2758:7): [True: 0, False: 37] ------------------ 2759| | // return TokError("expected comma"); 2760| 0| KsError = KS_ERR_ASM_DIRECTIVE_COMMA; 2761| 0| return true; 2762| 0| } 2763| 37| Lexer.Lex(); 2764| | 2765| 37| if (Lexer.isNot(AsmToken::Identifier)) { ------------------ | Branch (2765:7): [True: 0, False: 37] ------------------ 2766| | // return TokError("expected relocation name"); 2767| 0| KsError = KS_ERR_ASM_DIRECTIVE_RELOC_NAME; 2768| 0| return true; 2769| 0| } 2770| | //SMLoc NameLoc = Lexer.getTok().getLoc(); 2771| 37| StringRef Name = Lexer.getTok().getIdentifier(); 2772| 37| Lexer.Lex(); 2773| | 2774| 37| if (Lexer.is(AsmToken::Comma)) { ------------------ | Branch (2774:7): [True: 37, False: 0] ------------------ 2775| 37| Lexer.Lex(); 2776| | //SMLoc ExprLoc = Lexer.getLoc(); 2777| 37| if (parseExpression(Expr)) { ------------------ | Branch (2777:9): [True: 0, False: 37] ------------------ 2778| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 2779| 0| return true; 2780| 0| } 2781| | 2782| 37| MCValue Value; 2783| 37| if (!Expr->evaluateAsRelocatable(Value, nullptr, nullptr)) { ------------------ | Branch (2783:9): [True: 0, False: 37] ------------------ 2784| | //return Error(ExprLoc, "expression must be relocatable"); 2785| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 2786| 0| return true; 2787| 0| } 2788| 37| } 2789| | 2790| 37| if (Lexer.isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (2790:7): [True: 0, False: 37] ------------------ 2791| | // return TokError("unexpected token in .reloc directive"); 2792| 0| KsError = KS_ERR_ASM_DIRECTIVE_RELOC_TOKEN; 2793| 0| return true; 2794| 0| } 2795| | 2796| 37| if (getStreamer().EmitRelocDirective(*Offset, Name, Expr, DirectiveLoc)) { ------------------ | Branch (2796:7): [True: 37, False: 0] ------------------ 2797| | //return Error(NameLoc, "unknown relocation name"); 2798| 37| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 2799| 37| return true; 2800| 37| } 2801| | 2802| 0| return false; 2803| 37|} AsmParser.cpp:_ZNK12_GLOBAL__N_19AsmParser12printMessageEN7llvm_ks5SMLocENS1_9SourceMgr8DiagKindERKNS1_5TwineENS1_8ArrayRefINS1_7SMRangeEEE: 316| 44.9k| ArrayRef Ranges = None) const { 317| 44.9k| SrcMgr.PrintMessage(Loc, Kind, Msg, Ranges); 318| 44.9k| } AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser24printMacroInstantiationsEv: 590| 23.6k|void AsmParser::printMacroInstantiations() { 591| | // Print the active macro instantiation stack. 592| 23.6k| for (std::vector::const_reverse_iterator 593| 23.6k| it = ActiveMacros.rbegin(), 594| 23.6k| ie = ActiveMacros.rend(); 595| 44.9k| it != ie; ++it) ------------------ | Branch (595:8): [True: 21.3k, False: 23.6k] ------------------ 596| 21.3k| printMessage((*it)->InstantiationLoc, SourceMgr::DK_Note, 597| 21.3k| "while in macro instantiation"); 598| 23.6k|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser7WarningEN7llvm_ks5SMLocERKNS1_5TwineENS1_8ArrayRefINS1_7SMRangeEEE: 605| 1.98k|bool AsmParser::Warning(SMLoc L, const Twine &Msg, ArrayRef Ranges) { 606| 1.98k| if(getTargetParser().getTargetOptions().MCNoWarn) ------------------ | Branch (606:6): [True: 0, False: 1.98k] ------------------ 607| 0| return false; 608| 1.98k| if (getTargetParser().getTargetOptions().MCFatalWarnings) ------------------ | Branch (608:7): [True: 0, False: 1.98k] ------------------ 609| 0| return Error(L, Msg, Ranges); 610| 1.98k| printMessage(L, SourceMgr::DK_Warning, Msg, Ranges); 611| 1.98k| printMacroInstantiations(); 612| 1.98k| return false; 613| 1.98k|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser5ErrorEN7llvm_ks5SMLocERKNS1_5TwineENS1_8ArrayRefINS1_7SMRangeEEE: 615| 21.6k|bool AsmParser::Error(SMLoc L, const Twine &Msg, ArrayRef Ranges) { 616| 21.6k| HadError = true; 617| 21.6k| printMessage(L, SourceMgr::DK_Error, Msg, Ranges); 618| 21.6k| printMacroInstantiations(); 619| 21.6k| return true; 620| 21.6k|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser3LexEv: 655| 25.3M|const AsmToken &AsmParser::Lex() { 656| 25.3M| const AsmToken *tok = &Lexer.Lex(); 657| | 658| 25.3M| if (tok->is(AsmToken::Eof)) { ------------------ | Branch (658:7): [True: 634, False: 25.3M] ------------------ 659| | // If this is the end of an included file, pop the parent file off the 660| | // include stack. 661| 634| SMLoc ParentIncludeLoc = SrcMgr.getParentIncludeLoc(CurBuffer); 662| 634| if (ParentIncludeLoc != SMLoc()) { ------------------ | Branch (662:9): [True: 0, False: 634] ------------------ 663| 0| jumpToLoc(ParentIncludeLoc); 664| 0| tok = &Lexer.Lex(); // qq 665| 0| } 666| 634| } 667| | 668| | //if (tok->is(AsmToken::Error)) 669| | // Error(Lexer.getErrLoc(), Lexer.getErr()); 670| | 671| 25.3M| return *tok; 672| 25.3M|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser15parseIdentifierERN7llvm_ks9StringRefE: 2549| 136k|{ 2550| | // The assembler has relaxed rules for accepting identifiers, in particular we 2551| | // allow things like '.globl $foo' and '.def @feat.00', which would normally be 2552| | // separate tokens. At this level, we have already lexed so we cannot (currently) 2553| | // handle this as a context dependent token, instead we detect adjacent tokens 2554| | // and return the combined identifier. 2555| 136k| if (Lexer.is(AsmToken::Dollar) || Lexer.is(AsmToken::At)) { ------------------ | Branch (2555:7): [True: 4.24k, False: 132k] | Branch (2555:37): [True: 558, False: 131k] ------------------ 2556| 4.79k| SMLoc PrefixLoc = getLexer().getLoc(); 2557| | 2558| | // Consume the prefix character, and check for a following identifier. 2559| 4.79k| Lex(); 2560| 4.79k| if (Lexer.isNot(AsmToken::Identifier)) { ------------------ | Branch (2560:9): [True: 3.96k, False: 831] ------------------ 2561| 3.96k| KsError = KS_ERR_ASM_MACRO_INVALID; 2562| 3.96k| return true; 2563| 3.96k| } 2564| | 2565| | // We have a '$' or '@' followed by an identifier, make sure they are adjacent. 2566| 831| if (PrefixLoc.getPointer() + 1 != getTok().getLoc().getPointer()) { ------------------ | Branch (2566:9): [True: 295, False: 536] ------------------ 2567| 295| KsError = KS_ERR_ASM_MACRO_INVALID; 2568| 295| return true; 2569| 295| } 2570| | 2571| | // Construct the joined identifier and consume the token. 2572| 536| Res = 2573| 536| StringRef(PrefixLoc.getPointer(), getTok().getIdentifier().size() + 1); 2574| 536| Lex(); 2575| 536| return false; 2576| 831| } 2577| | 2578| 131k| if (Lexer.isNot(AsmToken::Identifier) && Lexer.isNot(AsmToken::String)) { ------------------ | Branch (2578:7): [True: 4.46k, False: 126k] | Branch (2578:44): [True: 3.82k, False: 643] ------------------ 2579| 3.82k| KsError = KS_ERR_ASM_MACRO_INVALID; 2580| 3.82k| return true; 2581| 3.82k| } 2582| | 2583| 127k| Res = getTok().getIdentifier(); 2584| | 2585| 127k| Lex(); // Consume the identifier token. 2586| | 2587| 127k| return false; 2588| 131k|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser27parseStringToEndOfStatementEv: 792| 643|StringRef AsmParser::parseStringToEndOfStatement() { 793| 643| const char *Start = getTok().getLoc().getPointer(); 794| | 795| 2.78k| while (Lexer.isNot(AsmToken::EndOfStatement) && Lexer.isNot(AsmToken::Eof)) ------------------ | Branch (795:10): [True: 2.13k, False: 643] | Branch (795:51): [True: 2.13k, False: 0] ------------------ 796| 2.13k| Lex(); 797| | 798| 643| const char *End = getTok().getLoc().getPointer(); 799| 643| return StringRef(Start, End - Start); 800| 643|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser18parseEscapedStringERNSt3__112basic_stringIcNS1_11char_traitsIcEENS1_9allocatorIcEEEE: 2614| 770|{ 2615| 770| if (!getLexer().is(AsmToken::String)) { ------------------ | Branch (2615:7): [True: 0, False: 770] ------------------ 2616| 0| KsError = KS_ERR_ASM_ESC_STR; 2617| 0| return true; 2618| 0| } 2619| | 2620| 770| Data = ""; 2621| 770| bool valid; 2622| 770| StringRef Str = getTok().getStringContents(valid); 2623| 770| if (!valid) { ------------------ | Branch (2623:7): [True: 0, False: 770] ------------------ 2624| 0| KsError = KS_ERR_ASM_DIRECTIVE_INVALID; 2625| 0| return true; 2626| 0| } 2627| | 2628| 31.2k| for (unsigned i = 0, e = Str.size(); i != e; ++i) { ------------------ | Branch (2628:40): [True: 30.5k, False: 758] ------------------ 2629| 30.5k| if (Str[i] != '\\') { ------------------ | Branch (2629:9): [True: 27.3k, False: 3.19k] ------------------ 2630| 27.3k| Data += Str[i]; 2631| 27.3k| continue; 2632| 27.3k| } 2633| | 2634| | // Recognize escaped characters. Note that this escape semantics currently 2635| | // loosely follows Darwin 'as'. Notably, it doesn't support hex escapes. 2636| 3.19k| ++i; 2637| 3.19k| if (i == e) { ------------------ | Branch (2637:9): [True: 0, False: 3.19k] ------------------ 2638| | // return TokError("unexpected backslash at end of string"); 2639| 0| KsError = KS_ERR_ASM_ESC_BACKSLASH; 2640| 0| return true; 2641| 0| } 2642| | 2643| | // Recognize octal sequences. 2644| 3.19k| if ((unsigned)(Str[i] - '0') <= 7) { ------------------ | Branch (2644:9): [True: 1.38k, False: 1.81k] ------------------ 2645| | // Consume up to three octal characters. 2646| 1.38k| unsigned Value = Str[i] - '0'; 2647| | 2648| 1.38k| if (i + 1 != e && ((unsigned)(Str[i + 1] - '0')) <= 7) { ------------------ | Branch (2648:11): [True: 1.38k, False: 0] | Branch (2648:25): [True: 610, False: 774] ------------------ 2649| 610| ++i; 2650| 610| Value = Value * 8 + (Str[i] - '0'); 2651| | 2652| 610| if (i + 1 != e && ((unsigned)(Str[i + 1] - '0')) <= 7) { ------------------ | Branch (2652:13): [True: 522, False: 88] | Branch (2652:27): [True: 172, False: 350] ------------------ 2653| 172| ++i; 2654| 172| Value = Value * 8 + (Str[i] - '0'); 2655| 172| } 2656| 610| } 2657| | 2658| 1.38k| if (Value > 255) { ------------------ | Branch (2658:11): [True: 0, False: 1.38k] ------------------ 2659| | // return TokError("invalid octal escape sequence (out of range)"); 2660| 0| KsError = KS_ERR_ASM_ESC_BACKSLASH; 2661| 0| return true; 2662| 0| } 2663| | 2664| 1.38k| Data += (unsigned char)Value; 2665| 1.38k| continue; 2666| 1.38k| } 2667| | 2668| | // Otherwise recognize individual escapes. 2669| 1.81k| switch (Str[i]) { 2670| 12| default: ------------------ | Branch (2670:5): [True: 12, False: 1.80k] ------------------ 2671| | // Just reject invalid escape sequences for now. 2672| | // return TokError("invalid escape sequence (unrecognized character)"); 2673| 12| KsError = KS_ERR_ASM_ESC_SEQUENCE; 2674| 12| return true; 2675| | 2676| 326| case 'b': Data += '\b'; break; ------------------ | Branch (2676:5): [True: 326, False: 1.48k] ------------------ 2677| 44| case 'f': Data += '\f'; break; ------------------ | Branch (2677:5): [True: 44, False: 1.76k] ------------------ 2678| 90| case 'n': Data += '\n'; break; ------------------ | Branch (2678:5): [True: 90, False: 1.72k] ------------------ 2679| 340| case 'r': Data += '\r'; break; ------------------ | Branch (2679:5): [True: 340, False: 1.47k] ------------------ 2680| 358| case 't': Data += '\t'; break; ------------------ | Branch (2680:5): [True: 358, False: 1.45k] ------------------ 2681| 256| case '"': Data += '"'; break; ------------------ | Branch (2681:5): [True: 256, False: 1.55k] ------------------ 2682| 386| case '\\': Data += '\\'; break; ------------------ | Branch (2682:5): [True: 386, False: 1.42k] ------------------ 2683| 1.81k| } 2684| 1.81k| } 2685| | 2686| 758| return false; 2687| 770|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser19eatToEndOfStatementEv: 783| 2.62M|{ 784| 24.8M| while (Lexer.isNot(AsmToken::EndOfStatement) && Lexer.isNot(AsmToken::Eof)) ------------------ | Branch (784:10): [True: 22.2M, False: 2.62M] | Branch (784:51): [True: 22.2M, False: 3] ------------------ 785| 22.2M| Lex(); 786| | 787| | // Eat EOL. 788| 2.62M| if (Lexer.is(AsmToken::EndOfStatement)) ------------------ | Branch (788:7): [True: 2.62M, False: 3] ------------------ 789| 2.62M| Lex(); 790| 2.62M|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser15parseExpressionERPKN7llvm_ks6MCExprERNS1_5SMLocE: 1145| 62.7k|bool AsmParser::parseExpression(const MCExpr *&Res, SMLoc &EndLoc) { 1146| | // Parse the expression. 1147| 62.7k| Res = nullptr; 1148| 62.7k| if (parsePrimaryExpr(Res, EndLoc) || parseBinOpRHS(1, Res, EndLoc)) ------------------ | Branch (1148:7): [True: 42.9k, False: 19.8k] | Branch (1148:40): [True: 670, False: 19.1k] ------------------ 1149| 43.5k| return true; 1150| | 1151| | // As a special case, we support 'a op b @ modifier' by rewriting the 1152| | // expression to include the modifier. This is inefficient, but in general we 1153| | // expect users to use 'a@modifier op b'. 1154| 19.1k| if (Lexer.getKind() == AsmToken::At) { ------------------ | Branch (1154:7): [True: 60, False: 19.1k] ------------------ 1155| 60| Lex(); 1156| | 1157| 60| if (Lexer.isNot(AsmToken::Identifier)) { ------------------ | Branch (1157:9): [True: 0, False: 60] ------------------ 1158| | // return TokError("unexpected symbol modifier following '@'"); 1159| 0| KsError = KS_ERR_ASM_SYMBOL_MODIFIER; 1160| 0| return true; 1161| 0| } 1162| | 1163| 60| MCSymbolRefExpr::VariantKind Variant = 1164| 60| MCSymbolRefExpr::getVariantKindForName(getTok().getIdentifier()); 1165| 60| if (Variant == MCSymbolRefExpr::VK_Invalid) { ------------------ | Branch (1165:9): [True: 13, False: 47] ------------------ 1166| | // return TokError("invalid variant '" + getTok().getIdentifier() + "'"); 1167| 13| KsError = KS_ERR_ASM_VARIANT_INVALID; 1168| 13| return true; 1169| 13| } 1170| | 1171| 47| const MCExpr *ModifiedRes = applyModifierToExpr(Res, Variant); 1172| 47| if (!ModifiedRes) { ------------------ | Branch (1172:9): [True: 0, False: 47] ------------------ 1173| | // return TokError("invalid modifier '" + getTok().getIdentifier() + 1174| | // "' (no symbols present)"); 1175| 0| KsError = KS_ERR_ASM_VARIANT_INVALID; 1176| 0| return true; 1177| 0| } 1178| | 1179| 47| Res = ModifiedRes; 1180| 47| Lex(); 1181| 47| } 1182| | 1183| | // Try to constant fold it up front, if possible. 1184| 19.1k| int64_t Value; 1185| 19.1k| if (Res->evaluateAsAbsolute(Value)) ------------------ | Branch (1185:7): [True: 9.57k, False: 9.59k] ------------------ 1186| 9.57k| Res = MCConstantExpr::create(Value, getContext()); 1187| | 1188| 19.1k| return false; 1189| 19.1k|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser13parseBinOpRHSEjRPKN7llvm_ks6MCExprERNS1_5SMLocE: 1400| 21.5k| SMLoc &EndLoc) { 1401| 41.0k| while (1) { ------------------ | Branch (1401:10): [True: 41.0k, Folded] ------------------ 1402| 41.0k| MCBinaryExpr::Opcode Kind = MCBinaryExpr::Add; 1403| 41.0k| unsigned TokPrec = getBinOpPrecedence(Lexer.getKind(), Kind); 1404| | 1405| | // If the next token is lower precedence than we are allowed to eat, return 1406| | // successfully with what we ate already. 1407| 41.0k| if (TokPrec < Precedence) ------------------ | Branch (1407:9): [True: 20.6k, False: 20.3k] ------------------ 1408| 20.6k| return false; 1409| | 1410| 20.3k| Lex(); 1411| | 1412| | // Eat the next primary expression. 1413| 20.3k| const MCExpr *RHS; 1414| 20.3k| if (parsePrimaryExpr(RHS, EndLoc)) ------------------ | Branch (1414:9): [True: 670, False: 19.6k] ------------------ 1415| 670| return true; 1416| | 1417| | // If BinOp binds less tightly with RHS than the operator after RHS, let 1418| | // the pending operator take RHS as its LHS. 1419| 19.6k| MCBinaryExpr::Opcode Dummy; 1420| 19.6k| unsigned NextTokPrec = getBinOpPrecedence(Lexer.getKind(), Dummy); 1421| 19.6k| if (TokPrec < NextTokPrec && parseBinOpRHS(TokPrec + 1, RHS, EndLoc)) ------------------ | Branch (1421:9): [True: 1.65k, False: 17.9k] | Branch (1421:34): [True: 169, False: 1.49k] ------------------ 1422| 169| return true; 1423| | 1424| | // Merge LHS and RHS according to operator. 1425| 19.4k| Res = MCBinaryExpr::create(Kind, Res, RHS, getContext()); 1426| 19.4k| } 1427| 21.5k|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser18getBinOpPrecedenceEN7llvm_ks8AsmToken9TokenKindERNS1_12MCBinaryExpr6OpcodeE: 1391| 60.6k| MCBinaryExpr::Opcode &Kind) { 1392| 60.6k| bool ShouldUseLogicalShr = MAI.shouldUseLogicalShr(); 1393| 60.6k| return IsDarwin ? getDarwinBinOpPrecedence(K, Kind, ShouldUseLogicalShr) ------------------ | Branch (1393:10): [True: 60.6k, False: 0] ------------------ 1394| 60.6k| : getGNUBinOpPrecedence(K, Kind, ShouldUseLogicalShr); 1395| 60.6k|} AsmParser.cpp:_ZL24getDarwinBinOpPrecedenceN7llvm_ks8AsmToken9TokenKindERNS_12MCBinaryExpr6OpcodeEb: 1238| 60.6k| bool ShouldUseLogicalShr) { 1239| 60.6k| switch (K) { 1240| 23.1k| default: ------------------ | Branch (1240:3): [True: 23.1k, False: 37.5k] ------------------ 1241| 23.1k| return 0; // not a binop. 1242| | 1243| | // Lowest Precedence: &&, || 1244| 1.53k| case AsmToken::AmpAmp: ------------------ | Branch (1244:3): [True: 1.53k, False: 59.1k] ------------------ 1245| 1.53k| Kind = MCBinaryExpr::LAnd; 1246| 1.53k| return 1; 1247| 391| case AsmToken::PipePipe: ------------------ | Branch (1247:3): [True: 391, False: 60.2k] ------------------ 1248| 391| Kind = MCBinaryExpr::LOr; 1249| 391| return 1; 1250| | 1251| | // Low Precedence: |, &, ^ 1252| | // 1253| | // FIXME: gas seems to support '!' as an infix operator? 1254| 573| case AsmToken::Pipe: ------------------ | Branch (1254:3): [True: 573, False: 60.0k] ------------------ 1255| 573| Kind = MCBinaryExpr::Or; 1256| 573| return 2; 1257| 723| case AsmToken::Caret: ------------------ | Branch (1257:3): [True: 723, False: 59.9k] ------------------ 1258| 723| Kind = MCBinaryExpr::Xor; 1259| 723| return 2; 1260| 466| case AsmToken::Amp: ------------------ | Branch (1260:3): [True: 466, False: 60.1k] ------------------ 1261| 466| Kind = MCBinaryExpr::And; 1262| 466| return 2; 1263| | 1264| | // Low Intermediate Precedence: ==, !=, <>, <, <=, >, >= 1265| 137| case AsmToken::EqualEqual: ------------------ | Branch (1265:3): [True: 137, False: 60.5k] ------------------ 1266| 137| Kind = MCBinaryExpr::EQ; 1267| 137| return 3; 1268| 0| case AsmToken::ExclaimEqual: ------------------ | Branch (1268:3): [True: 0, False: 60.6k] ------------------ 1269| 22| case AsmToken::LessGreater: ------------------ | Branch (1269:3): [True: 22, False: 60.6k] ------------------ 1270| 22| Kind = MCBinaryExpr::NE; 1271| 22| return 3; 1272| 2.49k| case AsmToken::Less: ------------------ | Branch (1272:3): [True: 2.49k, False: 58.1k] ------------------ 1273| 2.49k| Kind = MCBinaryExpr::LT; 1274| 2.49k| return 3; 1275| 80| case AsmToken::LessEqual: ------------------ | Branch (1275:3): [True: 80, False: 60.5k] ------------------ 1276| 80| Kind = MCBinaryExpr::LTE; 1277| 80| return 3; 1278| 1.10k| case AsmToken::Greater: ------------------ | Branch (1278:3): [True: 1.10k, False: 59.5k] ------------------ 1279| 1.10k| Kind = MCBinaryExpr::GT; 1280| 1.10k| return 3; 1281| 180| case AsmToken::GreaterEqual: ------------------ | Branch (1281:3): [True: 180, False: 60.4k] ------------------ 1282| 180| Kind = MCBinaryExpr::GTE; 1283| 180| return 3; 1284| | 1285| | // Intermediate Precedence: <<, >> 1286| 218| case AsmToken::LessLess: ------------------ | Branch (1286:3): [True: 218, False: 60.4k] ------------------ 1287| 218| Kind = MCBinaryExpr::Shl; 1288| 218| return 4; 1289| 10| case AsmToken::GreaterGreater: ------------------ | Branch (1289:3): [True: 10, False: 60.6k] ------------------ 1290| 10| Kind = ShouldUseLogicalShr ? MCBinaryExpr::LShr : MCBinaryExpr::AShr; ------------------ | Branch (1290:12): [True: 10, False: 0] ------------------ 1291| 10| return 4; 1292| | 1293| | // High Intermediate Precedence: +, - 1294| 7.67k| case AsmToken::Plus: ------------------ | Branch (1294:3): [True: 7.67k, False: 52.9k] ------------------ 1295| 7.67k| Kind = MCBinaryExpr::Add; 1296| 7.67k| return 5; 1297| 19.7k| case AsmToken::Minus: ------------------ | Branch (1297:3): [True: 19.7k, False: 40.9k] ------------------ 1298| 19.7k| Kind = MCBinaryExpr::Sub; 1299| 19.7k| return 5; 1300| | 1301| | // Highest Precedence: *, /, % 1302| 277| case AsmToken::Star: ------------------ | Branch (1302:3): [True: 277, False: 60.3k] ------------------ 1303| 277| Kind = MCBinaryExpr::Mul; 1304| 277| return 6; 1305| 164| case AsmToken::Slash: ------------------ | Branch (1305:3): [True: 164, False: 60.4k] ------------------ 1306| 164| Kind = MCBinaryExpr::Div; 1307| 164| return 6; 1308| 1.79k| case AsmToken::Percent: ------------------ | Branch (1308:3): [True: 1.79k, False: 58.8k] ------------------ 1309| 1.79k| Kind = MCBinaryExpr::Mod; 1310| 1.79k| return 6; 1311| 60.6k| } 1312| 60.6k|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser19applyModifierToExprEPKN7llvm_ks6MCExprENS1_15MCSymbolRefExpr11VariantKindE: 1083| 4.13k| MCSymbolRefExpr::VariantKind Variant) { 1084| | // Ask the target implementation about this expression first. 1085| 4.13k| const MCExpr *NewE = getTargetParser().applyModifierToExpr(E, Variant, Ctx); 1086| 4.13k| if (NewE) ------------------ | Branch (1086:7): [True: 0, False: 4.13k] ------------------ 1087| 0| return NewE; 1088| | // Recurse over the given expression, rebuilding it to apply the given variant 1089| | // if there is exactly one symbol. 1090| 4.13k| switch (E->getKind()) { ------------------ | Branch (1090:11): [True: 4.13k, False: 0] ------------------ 1091| 0| case MCExpr::Target: ------------------ | Branch (1091:3): [True: 0, False: 4.13k] ------------------ 1092| 55| case MCExpr::Constant: ------------------ | Branch (1092:3): [True: 55, False: 4.08k] ------------------ 1093| 55| return nullptr; 1094| | 1095| 1.68k| case MCExpr::SymbolRef: { ------------------ | Branch (1095:3): [True: 1.68k, False: 2.45k] ------------------ 1096| 1.68k| const MCSymbolRefExpr *SRE = cast(E); 1097| | 1098| 1.68k| if (SRE->getKind() != MCSymbolRefExpr::VK_None) { ------------------ | Branch (1098:9): [True: 43, False: 1.64k] ------------------ 1099| | //TokError("invalid variant on expression '" + getTok().getIdentifier() + 1100| | // "' (already modified)"); 1101| 43| return E; 1102| 43| } 1103| | 1104| 1.64k| return MCSymbolRefExpr::create(&SRE->getSymbol(), Variant, getContext()); 1105| 1.68k| } 1106| | 1107| 706| case MCExpr::Unary: { ------------------ | Branch (1107:3): [True: 706, False: 3.43k] ------------------ 1108| 706| const MCUnaryExpr *UE = cast(E); 1109| 706| const MCExpr *Sub = applyModifierToExpr(UE->getSubExpr(), Variant); 1110| 706| if (!Sub) ------------------ | Branch (1110:9): [True: 49, False: 657] ------------------ 1111| 49| return nullptr; 1112| 657| return MCUnaryExpr::create(UE->getOpcode(), Sub, getContext()); 1113| 706| } 1114| | 1115| 1.69k| case MCExpr::Binary: { ------------------ | Branch (1115:3): [True: 1.69k, False: 2.44k] ------------------ 1116| 1.69k| const MCBinaryExpr *BE = cast(E); 1117| 1.69k| const MCExpr *LHS = applyModifierToExpr(BE->getLHS(), Variant); 1118| 1.69k| const MCExpr *RHS = applyModifierToExpr(BE->getRHS(), Variant); 1119| | 1120| 1.69k| if (!LHS && !RHS) ------------------ | Branch (1120:9): [True: 6, False: 1.68k] | Branch (1120:17): [True: 1, False: 5] ------------------ 1121| 1| return nullptr; 1122| | 1123| 1.69k| if (!LHS) ------------------ | Branch (1123:9): [True: 5, False: 1.68k] ------------------ 1124| 5| LHS = BE->getLHS(); 1125| 1.69k| if (!RHS) ------------------ | Branch (1125:9): [True: 49, False: 1.64k] ------------------ 1126| 49| RHS = BE->getRHS(); 1127| | 1128| 1.69k| return MCBinaryExpr::create(BE->getOpcode(), LHS, RHS, getContext()); 1129| 1.69k| } 1130| 4.13k| } 1131| | 1132| 0| llvm_unreachable("Invalid expression kind!"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ 1133| 4.13k|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser16parsePrimaryExprERPKN7llvm_ks6MCExprERNS1_5SMLocE: 1072| 83.1k|{ 1073| 83.1k| return parsePrimaryExprAux(Res, EndLoc, 0); 1074| 83.1k|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser19parsePrimaryExprAuxERPKN7llvm_ks6MCExprERNS1_5SMLocEj: 848| 89.3k|{ 849| 89.3k| if (depth > 0x100) { ------------------ | Branch (849:7): [True: 0, False: 89.3k] ------------------ 850| 0| KsError = KS_ERR_ASM_EXPR_TOKEN; 851| 0| return true; 852| 0| } 853| 89.3k| SMLoc FirstTokenLoc = getLexer().getLoc(); 854| 89.3k| AsmToken::TokenKind FirstTokenKind = Lexer.getKind(); 855| 89.3k| switch (FirstTokenKind) { 856| 960| default: ------------------ | Branch (856:3): [True: 960, False: 88.3k] ------------------ 857| | //return TokError("unknown token in expression"); 858| 960| KsError = KS_ERR_ASM_EXPR_TOKEN; 859| 960| return true; 860| | // If we have an error assume that we've already handled it. 861| 308| case AsmToken::Error: ------------------ | Branch (861:3): [True: 308, False: 89.0k] ------------------ 862| 308| return true; 863| 855| case AsmToken::Exclaim: ------------------ | Branch (863:3): [True: 855, False: 88.4k] ------------------ 864| 855| Lex(); // Eat the operator. 865| 855| if (parsePrimaryExprAux(Res, EndLoc, depth+1)) ------------------ | Branch (865:9): [True: 145, False: 710] ------------------ 866| 145| return true; 867| 710| Res = MCUnaryExpr::createLNot(Res, getContext()); 868| 710| return false; 869| 418| case AsmToken::Dollar: ------------------ | Branch (869:3): [True: 418, False: 88.9k] ------------------ 870| 590| case AsmToken::At: ------------------ | Branch (870:3): [True: 172, False: 89.1k] ------------------ 871| 859| case AsmToken::String: ------------------ | Branch (871:3): [True: 269, False: 89.0k] ------------------ 872| 14.2k| case AsmToken::Identifier: { ------------------ | Branch (872:3): [True: 13.3k, False: 75.9k] ------------------ 873| 14.2k| StringRef Identifier; 874| 14.2k| if (parseIdentifier(Identifier)) { ------------------ | Branch (874:9): [True: 271, False: 13.9k] ------------------ 875| 271| if (FirstTokenKind == AsmToken::Dollar) { ------------------ | Branch (875:11): [True: 198, False: 73] ------------------ 876| 198| if (Lexer.getMAI().getDollarIsPC()) { ------------------ | Branch (876:13): [True: 0, False: 198] ------------------ 877| | // This is a '$' reference, which references the current PC. Emit a 878| | // temporary label to the streamer and refer to it. 879| 0| MCSymbol *Sym = Ctx.createTempSymbol(); 880| 0| Out.EmitLabel(Sym); 881| 0| Res = MCSymbolRefExpr::create(Sym, MCSymbolRefExpr::VK_None, 882| 0| getContext()); 883| 0| EndLoc = FirstTokenLoc; 884| 0| return false; 885| 0| } 886| | //return Error(FirstTokenLoc, "invalid token in expression"); 887| 198| KsError = KS_ERR_ASM_INVALIDOPERAND; 888| 198| return true; 889| 198| } 890| 271| } 891| | // Parse symbol variant 892| 14.0k| std::pair Split; 893| 14.0k| if (!MAI.useParensForSymbolVariant()) { ------------------ | Branch (893:9): [True: 14.0k, False: 0] ------------------ 894| 14.0k| if (FirstTokenKind == AsmToken::String) { ------------------ | Branch (894:11): [True: 269, False: 13.7k] ------------------ 895| 269| if (Lexer.is(AsmToken::At)) { ------------------ | Branch (895:13): [True: 3, False: 266] ------------------ 896| 3| Lexer.Lex(); // eat @ 897| | //SMLoc AtLoc = getLexer().getLoc(); 898| 3| StringRef VName; 899| 3| if (parseIdentifier(VName)) { ------------------ | Branch (899:15): [True: 0, False: 3] ------------------ 900| | //return Error(AtLoc, "expected symbol variant after '@'"); 901| 0| KsError = KS_ERR_ASM_INVALIDOPERAND; 902| 0| return true; 903| 0| } 904| | 905| 3| Split = std::make_pair(Identifier, VName); 906| 3| } 907| 13.7k| } else { 908| 13.7k| Split = Identifier.split('@'); 909| 13.7k| } 910| 14.0k| } else if (Lexer.is(AsmToken::LParen)) { ------------------ | Branch (910:16): [True: 0, False: 0] ------------------ 911| 0| Lexer.Lex(); // eat ( 912| 0| StringRef VName; 913| 0| parseIdentifier(VName); 914| 0| if (Lexer.isNot(AsmToken::RParen)) { ------------------ | Branch (914:11): [True: 0, False: 0] ------------------ 915| | //return Error(Lexer.getTok().getLoc(), 916| | // "unexpected token in variant, expected ')'"); 917| 0| KsError = KS_ERR_ASM_INVALIDOPERAND; 918| 0| return true; 919| 0| } 920| 0| Lexer.Lex(); // eat ) 921| 0| Split = std::make_pair(Identifier, VName); 922| 0| } 923| | 924| 14.0k| EndLoc = SMLoc::getFromPointer(Identifier.end()); 925| | 926| | // This is a symbol reference. 927| 14.0k| StringRef SymbolName = Identifier; 928| 14.0k| MCSymbolRefExpr::VariantKind Variant = MCSymbolRefExpr::VK_None; 929| | 930| | // Lookup the symbol variant if used. 931| 14.0k| if (Split.second.size()) { ------------------ | Branch (931:9): [True: 1.33k, False: 12.7k] ------------------ 932| 1.33k| Variant = MCSymbolRefExpr::getVariantKindForName(Split.second); 933| 1.33k| if (Variant != MCSymbolRefExpr::VK_Invalid) { ------------------ | Branch (933:11): [True: 909, False: 426] ------------------ 934| 909| SymbolName = Split.first; 935| 909| } else if (MAI.doesAllowAtInName() && !MAI.useParensForSymbolVariant()) { ------------------ | Branch (935:18): [True: 0, False: 426] | Branch (935:45): [True: 0, False: 0] ------------------ 936| 0| Variant = MCSymbolRefExpr::VK_None; 937| 426| } else { 938| | //return Error(SMLoc::getFromPointer(Split.second.begin()), 939| | // "invalid variant '" + Split.second + "'"); 940| 426| KsError = KS_ERR_ASM_INVALIDOPERAND; 941| 426| return true; 942| 426| } 943| 1.33k| } 944| | 945| 13.6k| if (SymbolName.empty()) { ------------------ | Branch (945:9): [True: 209, False: 13.4k] ------------------ 946| 209| return true; 947| 209| } 948| 13.4k| MCSymbol *Sym = getContext().getOrCreateSymbol(SymbolName); 949| | 950| | // If this is an absolute variable reference, substitute it now to preserve 951| | // semantics in the face of reassignment. 952| 13.4k| if (Sym->isVariable() && ------------------ | Branch (952:9): [True: 1.07k, False: 12.3k] | Branch (952:9): [True: 29, False: 13.3k] ------------------ 953| 1.07k| isa(Sym->getVariableValue(/*SetUsed*/ false))) { ------------------ | Branch (953:9): [True: 29, False: 1.05k] ------------------ 954| 29| if (Variant) { ------------------ | Branch (954:11): [True: 0, False: 29] ------------------ 955| | //return Error(EndLoc, "unexpected modifier on variable reference"); 956| 0| KsError = KS_ERR_ASM_INVALIDOPERAND; 957| 0| return true; 958| 0| } 959| | 960| 29| Res = Sym->getVariableValue(/*SetUsed*/ false); 961| 29| return false; 962| 29| } 963| | 964| | // Otherwise create a symbol ref. 965| 13.3k| Res = MCSymbolRefExpr::create(Sym, Variant, getContext()); 966| 13.3k| return false; 967| 13.4k| } 968| 56| case AsmToken::BigNum: ------------------ | Branch (968:3): [True: 56, False: 89.2k] ------------------ 969| | // return TokError("literal value out of range for directive"); 970| 56| KsError = KS_ERR_ASM_DIRECTIVE_VALUE_RANGE; 971| 56| return true; 972| 13.0k| case AsmToken::Integer: { ------------------ | Branch (972:3): [True: 13.0k, False: 76.2k] ------------------ 973| | //SMLoc Loc = getTok().getLoc(); 974| 13.0k| bool valid; 975| 13.0k| int64_t IntVal = getTok().getIntVal(valid); 976| 13.0k| if (!valid) { ------------------ | Branch (976:9): [True: 0, False: 13.0k] ------------------ 977| 0| return true; 978| 0| } 979| 13.0k| Res = MCConstantExpr::create(IntVal, getContext()); 980| 13.0k| EndLoc = Lexer.getTok().getEndLoc(); 981| 13.0k| Lex(); // Eat token. 982| | // Look for 'b' or 'f' following an Integer as a directional label 983| 13.0k| if (Lexer.getKind() == AsmToken::Identifier) { ------------------ | Branch (983:9): [True: 803, False: 12.2k] ------------------ 984| 803| StringRef IDVal = getTok().getString(); 985| | // Lookup the symbol variant if used. 986| 803| std::pair Split = IDVal.split('@'); 987| 803| MCSymbolRefExpr::VariantKind Variant = MCSymbolRefExpr::VK_None; 988| 803| if (Split.first.size() != IDVal.size()) { ------------------ | Branch (988:11): [True: 10, False: 793] ------------------ 989| 10| Variant = MCSymbolRefExpr::getVariantKindForName(Split.second); 990| 10| if (Variant == MCSymbolRefExpr::VK_Invalid) { ------------------ | Branch (990:13): [True: 3, False: 7] ------------------ 991| | // return TokError("invalid variant '" + Split.second + "'"); 992| 3| KsError = KS_ERR_ASM_VARIANT_INVALID; 993| 3| return true; 994| 3| } 995| 7| IDVal = Split.first; 996| 7| } 997| 800| if (IDVal == "f" || IDVal == "b") { ------------------ | Branch (997:11): [True: 0, False: 800] | Branch (997:11): [True: 70, False: 730] | Branch (997:27): [True: 70, False: 730] ------------------ 998| 70| bool valid; 999| 70| MCSymbol *Sym = 1000| 70| Ctx.getDirectionalLocalSymbol(IntVal, IDVal == "b", valid); 1001| 70| if (!valid) ------------------ | Branch (1001:13): [True: 70, False: 0] ------------------ 1002| 70| return true; 1003| 0| Res = MCSymbolRefExpr::create(Sym, Variant, getContext()); 1004| 0| if (IDVal == "b" && Sym->isUndefined()) { ------------------ | Branch (1004:13): [True: 0, False: 0] | Branch (1004:13): [True: 0, False: 0] | Branch (1004:29): [True: 0, False: 0] ------------------ 1005| | //return Error(Loc, "invalid reference to undefined symbol"); 1006| 0| KsError = KS_ERR_ASM_INVALIDOPERAND; 1007| 0| return true; 1008| 0| } 1009| 0| EndLoc = Lexer.getTok().getEndLoc(); 1010| 0| Lex(); // Eat identifier. 1011| 0| } 1012| 800| } 1013| 12.9k| return false; 1014| 13.0k| } 1015| 5.50k| case AsmToken::Real: { ------------------ | Branch (1015:3): [True: 5.50k, False: 83.8k] ------------------ 1016| 5.50k| APFloat RealVal(APFloat::IEEEdouble, getTok().getString()); 1017| 5.50k| uint64_t IntVal = RealVal.bitcastToAPInt().getZExtValue(); 1018| 5.50k| Res = MCConstantExpr::create(IntVal, getContext()); 1019| 5.50k| EndLoc = Lexer.getTok().getEndLoc(); 1020| 5.50k| Lex(); // Eat token. 1021| 5.50k| return false; 1022| 13.0k| } 1023| 7.60k| case AsmToken::Dot: { ------------------ | Branch (1023:3): [True: 7.60k, False: 81.7k] ------------------ 1024| | // This is a '.' reference, which references the current PC. Emit a 1025| | // temporary label to the streamer and refer to it. 1026| 7.60k| MCSymbol *Sym = Ctx.createTempSymbol(); 1027| 7.60k| Out.EmitLabel(Sym); 1028| 7.60k| Res = MCSymbolRefExpr::create(Sym, MCSymbolRefExpr::VK_None, getContext()); 1029| 7.60k| EndLoc = Lexer.getTok().getEndLoc(); 1030| 7.60k| Lex(); // Eat identifier. 1031| 7.60k| return false; 1032| 13.0k| } 1033| 41.2k| case AsmToken::LParen: ------------------ | Branch (1033:3): [True: 41.2k, False: 48.0k] ------------------ 1034| 41.2k| Lex(); // Eat the '('. 1035| 41.2k| return parseParenExpr(Res, EndLoc); 1036| 128| case AsmToken::LBrac: ------------------ | Branch (1036:3): [True: 128, False: 89.1k] ------------------ 1037| 128| if (!PlatformParser->HasBracketExpressions()) { ------------------ | Branch (1037:9): [True: 128, False: 0] ------------------ 1038| | // return TokError("brackets expression not supported on this target"); 1039| 128| KsError = KS_ERR_ASM_EXPR_BRACKET; 1040| 128| return true; 1041| 128| } 1042| 0| Lex(); // Eat the '['. 1043| 0| return parseBracketExpr(Res, EndLoc); 1044| 2.89k| case AsmToken::Minus: ------------------ | Branch (1044:3): [True: 2.89k, False: 86.4k] ------------------ 1045| 2.89k| Lex(); // Eat the operator. 1046| 2.89k| if (parsePrimaryExprAux(Res, EndLoc, depth+1)) ------------------ | Branch (1046:9): [True: 306, False: 2.59k] ------------------ 1047| 306| return true; 1048| 2.59k| Res = MCUnaryExpr::createMinus(Res, getContext()); 1049| 2.59k| return false; 1050| 2.42k| case AsmToken::Plus: ------------------ | Branch (1050:3): [True: 2.42k, False: 86.8k] ------------------ 1051| 2.42k| Lex(); // Eat the operator. 1052| 2.42k| if (parsePrimaryExprAux(Res, EndLoc, depth+1)) ------------------ | Branch (1052:9): [True: 280, False: 2.14k] ------------------ 1053| 280| return true; 1054| 2.14k| Res = MCUnaryExpr::createPlus(Res, getContext()); 1055| 2.14k| return false; 1056| 39| case AsmToken::Tilde: ------------------ | Branch (1056:3): [True: 39, False: 89.2k] ------------------ 1057| 39| Lex(); // Eat the operator. 1058| 39| if (parsePrimaryExprAux(Res, EndLoc, depth+1)) ------------------ | Branch (1058:9): [True: 25, False: 14] ------------------ 1059| 25| return true; 1060| 14| Res = MCUnaryExpr::createNot(Res, getContext()); 1061| 14| return false; 1062| 89.3k| } 1063| 89.3k|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser14parseParenExprERPKN7llvm_ks6MCExprERNS1_5SMLocE: 818| 41.2k|bool AsmParser::parseParenExpr(const MCExpr *&Res, SMLoc &EndLoc) { 819| 41.2k| if (parseExpression(Res)) ------------------ | Branch (819:7): [True: 41.2k, False: 7] ------------------ 820| 41.2k| return true; 821| 7| if (Lexer.isNot(AsmToken::RParen)) ------------------ | Branch (821:7): [True: 4, False: 3] ------------------ 822| | //return TokError("expected ')' in parentheses expression"); 823| 4| return true; 824| 3| EndLoc = Lexer.getTok().getEndLoc(); 825| 3| Lex(); 826| 3| return false; 827| 7|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser23parseAbsoluteExpressionERl: 1220| 4.60k|bool AsmParser::parseAbsoluteExpression(int64_t &Res) { 1221| 4.60k| const MCExpr *Expr; 1222| | 1223| | //SMLoc StartLoc = Lexer.getLoc(); 1224| 4.60k| if (parseExpression(Expr)) ------------------ | Branch (1224:7): [True: 99, False: 4.51k] ------------------ 1225| 99| return true; 1226| | 1227| 4.51k| if (!Expr->evaluateAsAbsolute(Res)) { ------------------ | Branch (1227:7): [True: 11, False: 4.49k] ------------------ 1228| | //return Error(StartLoc, "expected absolute expression"); 1229| 11| KsError = KS_ERR_ASM_INVALIDOPERAND; 1230| 11| return true; 1231| 11| } 1232| | 1233| 4.49k| return false; 1234| 4.51k|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser20checkForValidSectionEv: 772| 12.8k|{ 773| |#if 0 774| | if (!ParsingInlineAsm && !getStreamer().getCurrentSection().first) { 775| | TokError("expected section directive before assembly directive"); 776| | Out.InitSections(false); 777| | } 778| |#endif 779| 12.8k|} AsmParser.cpp:_ZN12_GLOBAL__N_19AsmParser26initializeDirectiveKindMapEi: 5356| 749|{ 5357| 749| KsSyntax = syntax; 5358| 749| if (syntax == KS_OPT_SYNTAX_NASM) { ------------------ | Branch (5358:9): [True: 0, False: 749] ------------------ 5359| | // NASM syntax 5360| 0| DirectiveKindMap.clear(); 5361| 0| DirectiveKindMap["db"] = DK_BYTE; 5362| 0| DirectiveKindMap["dw"] = DK_SHORT; 5363| 0| DirectiveKindMap["dd"] = DK_INT; 5364| 0| DirectiveKindMap["dq"] = DK_QUAD; 5365| 0| DirectiveKindMap["use16"] = DK_CODE16; 5366| 0| DirectiveKindMap["use32"] = DK_NASM_USE32; 5367| 0| DirectiveKindMap["global"] = DK_GLOBAL; 5368| 0| DirectiveKindMap["bits"] = DK_NASM_BITS; 5369| 0| DirectiveKindMap["default"] = DK_NASM_DEFAULT; 5370| 749| } else { 5371| | // default LLVM syntax 5372| 749| DirectiveKindMap.clear(); 5373| 749| DirectiveKindMap[".set"] = DK_SET; 5374| 749| DirectiveKindMap[".equ"] = DK_EQU; 5375| 749| DirectiveKindMap[".equiv"] = DK_EQUIV; 5376| 749| DirectiveKindMap[".ascii"] = DK_ASCII; 5377| 749| DirectiveKindMap[".asciz"] = DK_ASCIZ; 5378| 749| DirectiveKindMap[".string"] = DK_STRING; 5379| 749| DirectiveKindMap[".byte"] = DK_BYTE; 5380| 749| DirectiveKindMap[".short"] = DK_SHORT; 5381| 749| DirectiveKindMap[".value"] = DK_VALUE; 5382| 749| DirectiveKindMap[".2byte"] = DK_2BYTE; 5383| 749| DirectiveKindMap[".long"] = DK_LONG; 5384| 749| DirectiveKindMap[".int"] = DK_INT; 5385| 749| DirectiveKindMap[".4byte"] = DK_4BYTE; 5386| 749| DirectiveKindMap[".quad"] = DK_QUAD; 5387| 749| DirectiveKindMap[".8byte"] = DK_8BYTE; 5388| 749| DirectiveKindMap[".octa"] = DK_OCTA; 5389| 749| DirectiveKindMap[".single"] = DK_SINGLE; 5390| 749| DirectiveKindMap[".float"] = DK_FLOAT; 5391| 749| DirectiveKindMap[".double"] = DK_DOUBLE; 5392| 749| DirectiveKindMap[".align"] = DK_ALIGN; 5393| 749| DirectiveKindMap[".align32"] = DK_ALIGN32; 5394| 749| DirectiveKindMap[".balign"] = DK_BALIGN; 5395| 749| DirectiveKindMap[".balignw"] = DK_BALIGNW; 5396| 749| DirectiveKindMap[".balignl"] = DK_BALIGNL; 5397| 749| DirectiveKindMap[".p2align"] = DK_P2ALIGN; 5398| 749| DirectiveKindMap[".p2alignw"] = DK_P2ALIGNW; 5399| 749| DirectiveKindMap[".p2alignl"] = DK_P2ALIGNL; 5400| 749| DirectiveKindMap[".org"] = DK_ORG; 5401| 749| DirectiveKindMap[".fill"] = DK_FILL; 5402| 749| DirectiveKindMap[".zero"] = DK_ZERO; 5403| 749| DirectiveKindMap[".extern"] = DK_EXTERN; 5404| 749| DirectiveKindMap[".globl"] = DK_GLOBL; 5405| 749| DirectiveKindMap[".global"] = DK_GLOBAL; 5406| 749| DirectiveKindMap[".lazy_reference"] = DK_LAZY_REFERENCE; 5407| 749| DirectiveKindMap[".no_dead_strip"] = DK_NO_DEAD_STRIP; 5408| 749| DirectiveKindMap[".symbol_resolver"] = DK_SYMBOL_RESOLVER; 5409| 749| DirectiveKindMap[".private_extern"] = DK_PRIVATE_EXTERN; 5410| 749| DirectiveKindMap[".reference"] = DK_REFERENCE; 5411| 749| DirectiveKindMap[".weak_definition"] = DK_WEAK_DEFINITION; 5412| 749| DirectiveKindMap[".weak_reference"] = DK_WEAK_REFERENCE; 5413| 749| DirectiveKindMap[".weak_def_can_be_hidden"] = DK_WEAK_DEF_CAN_BE_HIDDEN; 5414| 749| DirectiveKindMap[".comm"] = DK_COMM; 5415| 749| DirectiveKindMap[".common"] = DK_COMMON; 5416| 749| DirectiveKindMap[".lcomm"] = DK_LCOMM; 5417| 749| DirectiveKindMap[".abort"] = DK_ABORT; 5418| 749| DirectiveKindMap[".include"] = DK_INCLUDE; 5419| 749| DirectiveKindMap[".incbin"] = DK_INCBIN; 5420| 749| DirectiveKindMap[".code16"] = DK_CODE16; 5421| 749| DirectiveKindMap[".code16gcc"] = DK_CODE16GCC; 5422| 749| DirectiveKindMap[".rept"] = DK_REPT; 5423| 749| DirectiveKindMap[".rep"] = DK_REPT; 5424| 749| DirectiveKindMap[".irp"] = DK_IRP; 5425| 749| DirectiveKindMap[".irpc"] = DK_IRPC; 5426| 749| DirectiveKindMap[".endr"] = DK_ENDR; 5427| 749| DirectiveKindMap[".bundle_align_mode"] = DK_BUNDLE_ALIGN_MODE; 5428| 749| DirectiveKindMap[".bundle_lock"] = DK_BUNDLE_LOCK; 5429| 749| DirectiveKindMap[".bundle_unlock"] = DK_BUNDLE_UNLOCK; 5430| 749| DirectiveKindMap[".if"] = DK_IF; 5431| 749| DirectiveKindMap[".ifeq"] = DK_IFEQ; 5432| 749| DirectiveKindMap[".ifge"] = DK_IFGE; 5433| 749| DirectiveKindMap[".ifgt"] = DK_IFGT; 5434| 749| DirectiveKindMap[".ifle"] = DK_IFLE; 5435| 749| DirectiveKindMap[".iflt"] = DK_IFLT; 5436| 749| DirectiveKindMap[".ifne"] = DK_IFNE; 5437| 749| DirectiveKindMap[".ifb"] = DK_IFB; 5438| 749| DirectiveKindMap[".ifnb"] = DK_IFNB; 5439| 749| DirectiveKindMap[".ifc"] = DK_IFC; 5440| 749| DirectiveKindMap[".ifeqs"] = DK_IFEQS; 5441| 749| DirectiveKindMap[".ifnc"] = DK_IFNC; 5442| 749| DirectiveKindMap[".ifnes"] = DK_IFNES; 5443| 749| DirectiveKindMap[".ifdef"] = DK_IFDEF; 5444| 749| DirectiveKindMap[".ifndef"] = DK_IFNDEF; 5445| 749| DirectiveKindMap[".ifnotdef"] = DK_IFNOTDEF; 5446| 749| DirectiveKindMap[".elseif"] = DK_ELSEIF; 5447| 749| DirectiveKindMap[".else"] = DK_ELSE; 5448| 749| DirectiveKindMap[".end"] = DK_END; 5449| 749| DirectiveKindMap[".endif"] = DK_ENDIF; 5450| 749| DirectiveKindMap[".skip"] = DK_SKIP; 5451| 749| DirectiveKindMap[".space"] = DK_SPACE; 5452| 749| DirectiveKindMap[".file"] = DK_FILE; 5453| 749| DirectiveKindMap[".line"] = DK_LINE; 5454| 749| DirectiveKindMap[".loc"] = DK_LOC; 5455| 749| DirectiveKindMap[".stabs"] = DK_STABS; 5456| 749| DirectiveKindMap[".cv_file"] = DK_CV_FILE; 5457| 749| DirectiveKindMap[".cv_loc"] = DK_CV_LOC; 5458| 749| DirectiveKindMap[".cv_linetable"] = DK_CV_LINETABLE; 5459| 749| DirectiveKindMap[".cv_inline_linetable"] = DK_CV_INLINE_LINETABLE; 5460| 749| DirectiveKindMap[".cv_stringtable"] = DK_CV_STRINGTABLE; 5461| 749| DirectiveKindMap[".cv_filechecksums"] = DK_CV_FILECHECKSUMS; 5462| 749| DirectiveKindMap[".sleb128"] = DK_SLEB128; 5463| 749| DirectiveKindMap[".uleb128"] = DK_ULEB128; 5464| 749| DirectiveKindMap[".cfi_sections"] = DK_CFI_SECTIONS; 5465| 749| DirectiveKindMap[".cfi_startproc"] = DK_CFI_STARTPROC; 5466| 749| DirectiveKindMap[".cfi_endproc"] = DK_CFI_ENDPROC; 5467| 749| DirectiveKindMap[".cfi_def_cfa"] = DK_CFI_DEF_CFA; 5468| 749| DirectiveKindMap[".cfi_def_cfa_offset"] = DK_CFI_DEF_CFA_OFFSET; 5469| 749| DirectiveKindMap[".cfi_adjust_cfa_offset"] = DK_CFI_ADJUST_CFA_OFFSET; 5470| 749| DirectiveKindMap[".cfi_def_cfa_register"] = DK_CFI_DEF_CFA_REGISTER; 5471| 749| DirectiveKindMap[".cfi_offset"] = DK_CFI_OFFSET; 5472| 749| DirectiveKindMap[".cfi_rel_offset"] = DK_CFI_REL_OFFSET; 5473| 749| DirectiveKindMap[".cfi_personality"] = DK_CFI_PERSONALITY; 5474| 749| DirectiveKindMap[".cfi_lsda"] = DK_CFI_LSDA; 5475| 749| DirectiveKindMap[".cfi_remember_state"] = DK_CFI_REMEMBER_STATE; 5476| 749| DirectiveKindMap[".cfi_restore_state"] = DK_CFI_RESTORE_STATE; 5477| 749| DirectiveKindMap[".cfi_same_value"] = DK_CFI_SAME_VALUE; 5478| 749| DirectiveKindMap[".cfi_restore"] = DK_CFI_RESTORE; 5479| 749| DirectiveKindMap[".cfi_escape"] = DK_CFI_ESCAPE; 5480| 749| DirectiveKindMap[".cfi_signal_frame"] = DK_CFI_SIGNAL_FRAME; 5481| 749| DirectiveKindMap[".cfi_undefined"] = DK_CFI_UNDEFINED; 5482| 749| DirectiveKindMap[".cfi_register"] = DK_CFI_REGISTER; 5483| 749| DirectiveKindMap[".cfi_window_save"] = DK_CFI_WINDOW_SAVE; 5484| 749| DirectiveKindMap[".macros_on"] = DK_MACROS_ON; 5485| 749| DirectiveKindMap[".macros_off"] = DK_MACROS_OFF; 5486| 749| DirectiveKindMap[".macro"] = DK_MACRO; 5487| 749| DirectiveKindMap[".exitm"] = DK_EXITM; 5488| 749| DirectiveKindMap[".endm"] = DK_ENDM; 5489| 749| DirectiveKindMap[".endmacro"] = DK_ENDMACRO; 5490| 749| DirectiveKindMap[".purgem"] = DK_PURGEM; 5491| 749| DirectiveKindMap[".err"] = DK_ERR; 5492| 749| DirectiveKindMap[".error"] = DK_ERROR; 5493| 749| DirectiveKindMap[".warning"] = DK_WARNING; 5494| 749| DirectiveKindMap[".reloc"] = DK_RELOC; 5495| 749| } 5496| 749|} _ZN7llvm_ks21createDarwinAsmParserEv: 964| 749|MCAsmParserExtension *createDarwinAsmParser() { 965| 749| return new DarwinAsmParser; 966| 749|} DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParserC2Ev: 47| 749| DarwinAsmParser() {} DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser10InitializeERN7llvm_ks11MCAsmParserE: 49| 749| void Initialize(MCAsmParser &Parser) override { 50| | // Call the base implementation. 51| 749| this->MCAsmParserExtension::Initialize(Parser); 52| | 53| 749| addDirectiveHandler<&DarwinAsmParser::parseDirectiveDesc>(".desc"); 54| 749| addDirectiveHandler<&DarwinAsmParser::parseDirectiveIndirectSymbol>( 55| 749| ".indirect_symbol"); 56| 749| addDirectiveHandler<&DarwinAsmParser::parseDirectiveLsym>(".lsym"); 57| 749| addDirectiveHandler<&DarwinAsmParser::parseDirectiveSubsectionsViaSymbols>( 58| 749| ".subsections_via_symbols"); 59| 749| addDirectiveHandler<&DarwinAsmParser::parseDirectiveDumpOrLoad>(".dump"); 60| 749| addDirectiveHandler<&DarwinAsmParser::parseDirectiveDumpOrLoad>(".load"); 61| 749| addDirectiveHandler<&DarwinAsmParser::parseDirectiveSection>(".section"); 62| 749| addDirectiveHandler<&DarwinAsmParser::parseDirectivePushSection>( 63| 749| ".pushsection"); 64| 749| addDirectiveHandler<&DarwinAsmParser::parseDirectivePopSection>( 65| 749| ".popsection"); 66| 749| addDirectiveHandler<&DarwinAsmParser::parseDirectivePrevious>(".previous"); 67| 749| addDirectiveHandler<&DarwinAsmParser::parseDirectiveSecureLogUnique>( 68| 749| ".secure_log_unique"); 69| 749| addDirectiveHandler<&DarwinAsmParser::parseDirectiveSecureLogReset>( 70| 749| ".secure_log_reset"); 71| 749| addDirectiveHandler<&DarwinAsmParser::parseDirectiveTBSS>(".tbss"); 72| 749| addDirectiveHandler<&DarwinAsmParser::parseDirectiveZerofill>(".zerofill"); 73| | 74| 749| addDirectiveHandler<&DarwinAsmParser::parseDirectiveDataRegion>( 75| 749| ".data_region"); 76| 749| addDirectiveHandler<&DarwinAsmParser::parseDirectiveDataRegionEnd>( 77| 749| ".end_data_region"); 78| | 79| | // Special section directives. 80| 749| addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveBss>(".bss"); 81| 749| addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveConst>(".const"); 82| 749| addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveConstData>( 83| 749| ".const_data"); 84| 749| addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveConstructor>( 85| 749| ".constructor"); 86| 749| addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveCString>( 87| 749| ".cstring"); 88| 749| addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveData>(".data"); 89| 749| addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveDestructor>( 90| 749| ".destructor"); 91| 749| addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveDyld>(".dyld"); 92| 749| addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveFVMLibInit0>( 93| 749| ".fvmlib_init0"); 94| 749| addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveFVMLibInit1>( 95| 749| ".fvmlib_init1"); 96| 749| addDirectiveHandler< 97| 749| &DarwinAsmParser::parseSectionDirectiveLazySymbolPointers>( 98| 749| ".lazy_symbol_pointer"); 99| 749| addDirectiveHandler<&DarwinAsmParser::parseDirectiveLinkerOption>( 100| 749| ".linker_option"); 101| 749| addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveLiteral16>( 102| 749| ".literal16"); 103| 749| addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveLiteral4>( 104| 749| ".literal4"); 105| 749| addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveLiteral8>( 106| 749| ".literal8"); 107| 749| addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveModInitFunc>( 108| 749| ".mod_init_func"); 109| 749| addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveModTermFunc>( 110| 749| ".mod_term_func"); 111| 749| addDirectiveHandler< 112| 749| &DarwinAsmParser::parseSectionDirectiveNonLazySymbolPointers>( 113| 749| ".non_lazy_symbol_pointer"); 114| 749| addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveObjCCatClsMeth>( 115| 749| ".objc_cat_cls_meth"); 116| 749| addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveObjCCatInstMeth>( 117| 749| ".objc_cat_inst_meth"); 118| 749| addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveObjCCategory>( 119| 749| ".objc_category"); 120| 749| addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveObjCClass>( 121| 749| ".objc_class"); 122| 749| addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveObjCClassNames>( 123| 749| ".objc_class_names"); 124| 749| addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveObjCClassVars>( 125| 749| ".objc_class_vars"); 126| 749| addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveObjCClsMeth>( 127| 749| ".objc_cls_meth"); 128| 749| addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveObjCClsRefs>( 129| 749| ".objc_cls_refs"); 130| 749| addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveObjCInstMeth>( 131| 749| ".objc_inst_meth"); 132| 749| addDirectiveHandler< 133| 749| &DarwinAsmParser::parseSectionDirectiveObjCInstanceVars>( 134| 749| ".objc_instance_vars"); 135| 749| addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveObjCMessageRefs>( 136| 749| ".objc_message_refs"); 137| 749| addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveObjCMetaClass>( 138| 749| ".objc_meta_class"); 139| 749| addDirectiveHandler< 140| 749| &DarwinAsmParser::parseSectionDirectiveObjCMethVarNames>( 141| 749| ".objc_meth_var_names"); 142| 749| addDirectiveHandler< 143| 749| &DarwinAsmParser::parseSectionDirectiveObjCMethVarTypes>( 144| 749| ".objc_meth_var_types"); 145| 749| addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveObjCModuleInfo>( 146| 749| ".objc_module_info"); 147| 749| addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveObjCProtocol>( 148| 749| ".objc_protocol"); 149| 749| addDirectiveHandler< 150| 749| &DarwinAsmParser::parseSectionDirectiveObjCSelectorStrs>( 151| 749| ".objc_selector_strs"); 152| 749| addDirectiveHandler< 153| 749| &DarwinAsmParser::parseSectionDirectiveObjCStringObject>( 154| 749| ".objc_string_object"); 155| 749| addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveObjCSymbols>( 156| 749| ".objc_symbols"); 157| 749| addDirectiveHandler<&DarwinAsmParser::parseSectionDirectivePICSymbolStub>( 158| 749| ".picsymbol_stub"); 159| 749| addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveStaticConst>( 160| 749| ".static_const"); 161| 749| addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveStaticData>( 162| 749| ".static_data"); 163| 749| addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveSymbolStub>( 164| 749| ".symbol_stub"); 165| 749| addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveTData>(".tdata"); 166| 749| addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveText>(".text"); 167| 749| addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveThreadInitFunc>( 168| 749| ".thread_init_func"); 169| 749| addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveTLV>(".tlv"); 170| | 171| 749| addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveIdent>(".ident"); 172| 749| addDirectiveHandler<&DarwinAsmParser::parseVersionMin>( 173| 749| ".watchos_version_min"); 174| 749| addDirectiveHandler<&DarwinAsmParser::parseVersionMin>(".tvos_version_min"); 175| 749| addDirectiveHandler<&DarwinAsmParser::parseVersionMin>(".ios_version_min"); 176| 749| addDirectiveHandler<&DarwinAsmParser::parseVersionMin>( 177| 749| ".macosx_version_min"); 178| | 179| 749| LastVersionMinDirective = SMLoc(); 180| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_18parseDirectiveDescEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser18parseDirectiveDescEN7llvm_ks9StringRefENS1_5SMLocE: 413| 32|bool DarwinAsmParser::parseDirectiveDesc(StringRef, SMLoc) { 414| 32| StringRef Name; 415| 32| if (getParser().parseIdentifier(Name)) ------------------ | Branch (415:7): [True: 0, False: 32] ------------------ 416| 0| return TokError("expected identifier in directive"); 417| | 418| | // Handle the identifier as the key symbol. 419| 32| MCSymbol *Sym = getContext().getOrCreateSymbol(Name); 420| | 421| 32| if (getLexer().isNot(AsmToken::Comma)) ------------------ | Branch (421:7): [True: 0, False: 32] ------------------ 422| 0| return TokError("unexpected token in '.desc' directive"); 423| 32| Lex(); 424| | 425| 32| int64_t DescValue; 426| 32| if (getParser().parseAbsoluteExpression(DescValue)) ------------------ | Branch (426:7): [True: 32, False: 0] ------------------ 427| 32| return true; 428| | 429| 0| if (getLexer().isNot(AsmToken::EndOfStatement)) ------------------ | Branch (429:7): [True: 0, False: 0] ------------------ 430| 0| return TokError("unexpected token in '.desc' directive"); 431| | 432| 0| Lex(); 433| | 434| | // Set the n_desc field of this Symbol to this DescValue 435| 0| getStreamer().EmitSymbolDesc(Sym, DescValue); 436| | 437| 0| return false; 438| 0|} DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_28parseDirectiveIndirectSymbolEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_18parseDirectiveLsymEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser18parseDirectiveLsymEN7llvm_ks9StringRefENS1_5SMLocE: 525| 16|bool DarwinAsmParser::parseDirectiveLsym(StringRef, SMLoc) { 526| 16| StringRef Name; 527| 16| if (getParser().parseIdentifier(Name)) ------------------ | Branch (527:7): [True: 16, False: 0] ------------------ 528| 16| return TokError("expected identifier in directive"); 529| | 530| | // Handle the identifier as the key symbol. 531| 0| MCSymbol *Sym = getContext().getOrCreateSymbol(Name); 532| | 533| 0| if (getLexer().isNot(AsmToken::Comma)) ------------------ | Branch (533:7): [True: 0, False: 0] ------------------ 534| 0| return TokError("unexpected token in '.lsym' directive"); 535| 0| Lex(); 536| | 537| 0| const MCExpr *Value; 538| 0| if (getParser().parseExpression(Value)) ------------------ | Branch (538:7): [True: 0, False: 0] ------------------ 539| 0| return true; 540| | 541| 0| if (getLexer().isNot(AsmToken::EndOfStatement)) ------------------ | Branch (541:7): [True: 0, False: 0] ------------------ 542| 0| return TokError("unexpected token in '.lsym' directive"); 543| | 544| 0| Lex(); 545| | 546| | // We don't currently support this directive. 547| | // 548| | // FIXME: Diagnostic location! 549| 0| (void) Sym; 550| 0| return TokError("directive '.lsym' is unsupported"); 551| 0|} DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_35parseDirectiveSubsectionsViaSymbolsEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_24parseDirectiveDumpOrLoadEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 1.49k| void addDirectiveHandler(StringRef Directive) { 35| 1.49k| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 1.49k| this, HandleDirective); 37| 1.49k| getParser().addDirectiveHandler(Directive, Handler); 38| 1.49k| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser24parseDirectiveDumpOrLoadEN7llvm_ks9StringRefENS1_5SMLocE: 476| 523| SMLoc IDLoc) { 477| 523| bool IsDump = Directive == ".dump"; 478| 523| if (getLexer().isNot(AsmToken::String)) ------------------ | Branch (478:7): [True: 1, False: 522] ------------------ 479| 1| return TokError("expected string in '.dump' or '.load' directive"); 480| | 481| 522| Lex(); 482| | 483| 522| if (getLexer().isNot(AsmToken::EndOfStatement)) ------------------ | Branch (483:7): [True: 3, False: 519] ------------------ 484| 3| return TokError("unexpected token in '.dump' or '.load' directive"); 485| | 486| 519| Lex(); 487| | 488| | // FIXME: If/when .dump and .load are implemented they will be done in the 489| | // the assembly parser and not have any need for an MCStreamer API. 490| 519| if (IsDump) ------------------ | Branch (490:7): [True: 376, False: 143] ------------------ 491| 376| return Warning(IDLoc, "ignoring directive .dump for now"); 492| 143| else 493| 143| return Warning(IDLoc, "ignoring directive .load for now"); 494| 519|} DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_21parseDirectiveSectionEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser21parseDirectiveSectionEN7llvm_ks9StringRefENS1_5SMLocE: 555| 5.55k|bool DarwinAsmParser::parseDirectiveSection(StringRef, SMLoc) { 556| 5.55k| SMLoc Loc = getLexer().getLoc(); 557| | 558| 5.55k| StringRef SectionName; 559| 5.55k| if (getParser().parseIdentifier(SectionName)) ------------------ | Branch (559:7): [True: 32, False: 5.52k] ------------------ 560| 32| return Error(Loc, "expected identifier after '.section' directive"); 561| | 562| | // Verify there is a following comma. 563| 5.52k| if (!getLexer().is(AsmToken::Comma)) ------------------ | Branch (563:7): [True: 0, False: 5.52k] ------------------ 564| 0| return TokError("unexpected token in '.section' directive"); 565| | 566| 5.52k| std::string SectionSpec = SectionName; 567| 5.52k| SectionSpec += ","; 568| | 569| | // Add all the tokens until the end of the line, ParseSectionSpecifier will 570| | // handle this. 571| 5.52k| StringRef EOL = getLexer().LexUntilEndOfStatement(); 572| 5.52k| SectionSpec.append(EOL.begin(), EOL.end()); 573| | 574| 5.52k| Lex(); 575| 5.52k| if (getLexer().isNot(AsmToken::EndOfStatement)) ------------------ | Branch (575:7): [True: 0, False: 5.52k] ------------------ 576| 0| return TokError("unexpected token in '.section' directive"); 577| 5.52k| Lex(); 578| | 579| | 580| 5.52k| StringRef Segment, Section; 581| 5.52k| unsigned StubSize; 582| 5.52k| unsigned TAA; 583| 5.52k| bool TAAParsed; 584| 5.52k| std::string ErrorStr = 585| 5.52k| MCSectionMachO::ParseSectionSpecifier(SectionSpec, Segment, Section, 586| 5.52k| TAA, TAAParsed, StubSize); 587| | 588| 5.52k| if (!ErrorStr.empty()) ------------------ | Branch (588:7): [True: 11, False: 5.51k] ------------------ 589| 11| return Error(Loc, ErrorStr.c_str()); 590| | 591| | // Issue a warning if the target is not powerpc and Section is a *coal* section. 592| 5.51k| Triple TT = getParser().getContext().getObjectFileInfo()->getTargetTriple(); 593| 5.51k| Triple::ArchType ArchTy = TT.getArch(); 594| | 595| 5.51k| if (ArchTy != Triple::ppc && ArchTy != Triple::ppc64) { ------------------ | Branch (595:7): [True: 5.51k, False: 0] | Branch (595:32): [True: 5.51k, False: 0] ------------------ 596| 5.51k| StringRef NonCoalSection = StringSwitch(Section) 597| 5.51k| .Case("__textcoal_nt", "__text") 598| 5.51k| .Case("__const_coal", "__const") 599| 5.51k| .Case("__datacoal_nt", "__data") 600| 5.51k| .Default(Section); 601| | 602| 5.51k| if (!Section.equals(NonCoalSection)) { ------------------ | Branch (602:9): [True: 0, False: 5.51k] ------------------ 603| 0| StringRef SectionVal(Loc.getPointer()); 604| 0| size_t B = SectionVal.find(',') + 1, E = SectionVal.find(',', B); 605| 0| SMLoc BLoc = SMLoc::getFromPointer(SectionVal.data() + B); 606| 0| SMLoc ELoc = SMLoc::getFromPointer(SectionVal.data() + E); 607| 0| getParser().Warning(Loc, "section \"" + Section + "\" is deprecated", 608| 0| SMRange(BLoc, ELoc)); 609| 0| getParser().Note(Loc, "change section name to \"" + NonCoalSection + 610| 0| "\"", SMRange(BLoc, ELoc)); 611| 0| } 612| 5.51k| } 613| | 614| | // FIXME: Arch specific. 615| 5.51k| bool isText = Segment == "__TEXT"; // FIXME: Hack. 616| 5.51k| getStreamer().SwitchSection(getContext().getMachOSection( 617| 5.51k| Segment, Section, TAA, StubSize, 618| 5.51k| isText ? SectionKind::getText() : SectionKind::getData())); ------------------ | Branch (618:7): [True: 0, False: 5.51k] ------------------ 619| 5.51k| return false; 620| 5.52k|} DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_25parseDirectivePushSectionEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_24parseDirectivePopSectionEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_22parseDirectivePreviousEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_29parseDirectiveSecureLogUniqueEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_28parseDirectiveSecureLogResetEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_18parseDirectiveTBSSEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser18parseDirectiveTBSSEN7llvm_ks9StringRefENS1_5SMLocE: 721| 1|bool DarwinAsmParser::parseDirectiveTBSS(StringRef, SMLoc) { 722| 1| SMLoc IDLoc = getLexer().getLoc(); 723| 1| StringRef Name; 724| 1| if (getParser().parseIdentifier(Name)) ------------------ | Branch (724:7): [True: 0, False: 1] ------------------ 725| 0| return TokError("expected identifier in directive"); 726| | 727| | // Handle the identifier as the key symbol. 728| 1| MCSymbol *Sym = getContext().getOrCreateSymbol(Name); 729| | 730| 1| if (getLexer().isNot(AsmToken::Comma)) ------------------ | Branch (730:7): [True: 1, False: 0] ------------------ 731| 1| return TokError("unexpected token in directive"); 732| 0| Lex(); 733| | 734| 0| int64_t Size; 735| 0| SMLoc SizeLoc = getLexer().getLoc(); 736| 0| if (getParser().parseAbsoluteExpression(Size)) ------------------ | Branch (736:7): [True: 0, False: 0] ------------------ 737| 0| return true; 738| | 739| 0| int64_t Pow2Alignment = 0; 740| 0| SMLoc Pow2AlignmentLoc; 741| 0| if (getLexer().is(AsmToken::Comma)) { ------------------ | Branch (741:7): [True: 0, False: 0] ------------------ 742| 0| Lex(); 743| 0| Pow2AlignmentLoc = getLexer().getLoc(); 744| 0| if (getParser().parseAbsoluteExpression(Pow2Alignment)) ------------------ | Branch (744:9): [True: 0, False: 0] ------------------ 745| 0| return true; 746| 0| } 747| | 748| 0| if (getLexer().isNot(AsmToken::EndOfStatement)) ------------------ | Branch (748:7): [True: 0, False: 0] ------------------ 749| 0| return TokError("unexpected token in '.tbss' directive"); 750| | 751| 0| Lex(); 752| | 753| 0| if (Size < 0) ------------------ | Branch (753:7): [True: 0, False: 0] ------------------ 754| 0| return Error(SizeLoc, "invalid '.tbss' directive size, can't be less than" 755| 0| "zero"); 756| | 757| | // FIXME: Diagnose overflow. 758| 0| if (Pow2Alignment < 0) ------------------ | Branch (758:7): [True: 0, False: 0] ------------------ 759| 0| return Error(Pow2AlignmentLoc, "invalid '.tbss' alignment, can't be less" 760| 0| "than zero"); 761| | 762| 0| if (!Sym->isUndefined()) ------------------ | Branch (762:7): [True: 0, False: 0] ------------------ 763| 0| return Error(IDLoc, "invalid symbol redefinition"); 764| | 765| 0| getStreamer().EmitTBSSSymbol(getContext().getMachOSection( 766| 0| "__DATA", "__thread_bss", 767| 0| MachO::S_THREAD_LOCAL_ZEROFILL, 768| 0| 0, SectionKind::getThreadBSS()), 769| 0| Sym, Size, 1 << Pow2Alignment); 770| | 771| 0| return false; 772| 0|} DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_22parseDirectiveZerofillEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_24parseDirectiveDataRegionEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_27parseDirectiveDataRegionEndEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_24parseSectionDirectiveBssEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser24parseSectionDirectiveBssEN7llvm_ks9StringRefENS1_5SMLocE: 200| 189| bool parseSectionDirectiveBss(StringRef, SMLoc) { 201| 189| return parseSectionSwitch("__DATA", "__bss"); 202| 189| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser18parseSectionSwitchEPKcS2_jjj: 386| 229| unsigned StubSize) { 387| 229| if (getLexer().isNot(AsmToken::EndOfStatement)) ------------------ | Branch (387:7): [True: 0, False: 229] ------------------ 388| 0| return TokError("unexpected token in section switching directive"); 389| 229| Lex(); 390| | 391| | // FIXME: Arch specific. 392| 229| bool isText = TAA & MachO::S_ATTR_PURE_INSTRUCTIONS; 393| 229| getStreamer().SwitchSection(getContext().getMachOSection( 394| 229| Segment, Section, TAA, StubSize, 395| 229| isText ? SectionKind::getText() : SectionKind::getData())); ------------------ | Branch (395:7): [True: 0, False: 229] ------------------ 396| | 397| | // Set the implicit alignment, if any. 398| | // 399| | // FIXME: This isn't really what 'as' does; I think it just uses the implicit 400| | // alignment on the section (e.g., if one manually inserts bytes into the 401| | // section, then just issuing the section switch directive will not realign 402| | // the section. However, this is arguably more reasonable behavior, and there 403| | // is no good reason for someone to intentionally emit incorrectly sized 404| | // values into the implicitly aligned sections. 405| 229| if (Align) ------------------ | Branch (405:7): [True: 0, False: 229] ------------------ 406| 0| getStreamer().EmitValueToAlignment(Align); 407| | 408| 229| return false; 409| 229|} DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_26parseSectionDirectiveConstEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_30parseSectionDirectiveConstDataEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_32parseSectionDirectiveConstructorEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_28parseSectionDirectiveCStringEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_25parseSectionDirectiveDataEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser25parseSectionDirectiveDataEN7llvm_ks9StringRefENS1_5SMLocE: 250| 40| bool parseSectionDirectiveData(StringRef, SMLoc) { 251| 40| return parseSectionSwitch("__DATA", "__data"); 252| 40| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_31parseSectionDirectiveDestructorEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_25parseSectionDirectiveDyldEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_32parseSectionDirectiveFVMLibInit0EN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_32parseSectionDirectiveFVMLibInit1EN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_39parseSectionDirectiveLazySymbolPointersEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_26parseDirectiveLinkerOptionEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_30parseSectionDirectiveLiteral16EN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_29parseSectionDirectiveLiteral4EN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_29parseSectionDirectiveLiteral8EN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_32parseSectionDirectiveModInitFuncEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_32parseSectionDirectiveModTermFuncEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_42parseSectionDirectiveNonLazySymbolPointersEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_35parseSectionDirectiveObjCCatClsMethEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_36parseSectionDirectiveObjCCatInstMethEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_33parseSectionDirectiveObjCCategoryEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_30parseSectionDirectiveObjCClassEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_35parseSectionDirectiveObjCClassNamesEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_34parseSectionDirectiveObjCClassVarsEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_32parseSectionDirectiveObjCClsMethEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_32parseSectionDirectiveObjCClsRefsEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_33parseSectionDirectiveObjCInstMethEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_37parseSectionDirectiveObjCInstanceVarsEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_36parseSectionDirectiveObjCMessageRefsEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_34parseSectionDirectiveObjCMetaClassEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_37parseSectionDirectiveObjCMethVarNamesEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_37parseSectionDirectiveObjCMethVarTypesEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_35parseSectionDirectiveObjCModuleInfoEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_33parseSectionDirectiveObjCProtocolEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_37parseSectionDirectiveObjCSelectorStrsEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_37parseSectionDirectiveObjCStringObjectEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_32parseSectionDirectiveObjCSymbolsEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_34parseSectionDirectivePICSymbolStubEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_32parseSectionDirectiveStaticConstEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_31parseSectionDirectiveStaticDataEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_31parseSectionDirectiveSymbolStubEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_26parseSectionDirectiveTDataEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_25parseSectionDirectiveTextEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_35parseSectionDirectiveThreadInitFuncEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_24parseSectionDirectiveTLVEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_26parseSectionDirectiveIdentEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 749| void addDirectiveHandler(StringRef Directive) { 35| 749| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 749| this, HandleDirective); 37| 749| getParser().addDirectiveHandler(Directive, Handler); 38| 749| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser26parseSectionDirectiveIdentEN7llvm_ks9StringRefENS1_5SMLocE: 368| 130| bool parseSectionDirectiveIdent(StringRef, SMLoc) { 369| | // Darwin silently ignores the .ident directive. 370| 130| getParser().eatToEndOfStatement(); 371| 130| return false; 372| 130| } DarwinAsmParser.cpp:_ZN12_GLOBAL__N_115DarwinAsmParser19addDirectiveHandlerIXadL_ZNS0_15parseVersionMinEN7llvm_ks9StringRefENS2_5SMLocEEEEEvS3_: 34| 2.99k| void addDirectiveHandler(StringRef Directive) { 35| 2.99k| MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( 36| 2.99k| this, HandleDirective); 37| 2.99k| getParser().addDirectiveHandler(Directive, Handler); 38| 2.99k| } _ZN7llvm_ks10MCAsmLexerC2Ev: 15| 749|MCAsmLexer::MCAsmLexer() : TokStart(nullptr), SkipSpace(true) { 16| 749| CurTok.emplace_back(AsmToken::Error, StringRef()); 17| 749|} _ZN7llvm_ks10MCAsmLexerD2Ev: 19| 749|MCAsmLexer::~MCAsmLexer() { 20| 749|} _ZNK7llvm_ks10MCAsmLexer6getLocEv: 22| 141k|SMLoc MCAsmLexer::getLoc() const { 23| 141k| return SMLoc::getFromPointer(TokStart); 24| 141k|} _ZNK7llvm_ks8AsmToken6getLocEv: 26| 203k|SMLoc AsmToken::getLoc() const { 27| 203k| return SMLoc::getFromPointer(Str.data()); 28| 203k|} _ZNK7llvm_ks8AsmToken9getEndLocEv: 30| 26.1k|SMLoc AsmToken::getEndLoc() const { 31| 26.1k| return SMLoc::getFromPointer(Str.data() + Str.size()); 32| 26.1k|} _ZN7llvm_ks11MCAsmParserC2Ev: 20| 749|MCAsmParser::MCAsmParser() : TargetParser(nullptr), KsError(0) { 21| 749|} _ZN7llvm_ks11MCAsmParserD2Ev: 23| 749|MCAsmParser::~MCAsmParser() { 24| 749|} _ZN7llvm_ks11MCAsmParser15setTargetParserERNS_17MCTargetAsmParserE: 26| 749|void MCAsmParser::setTargetParser(MCTargetAsmParser &P) { 27| 749| assert(!TargetParser && "Target parser is already initialized!"); ------------------ | Branch (27:3): [True: 749, False: 0] | Branch (27:3): [True: 749, Folded] | Branch (27:3): [True: 749, False: 0] ------------------ 28| 749| TargetParser = &P; 29| 749| TargetParser->Initialize(*this); 30| 749|} _ZNK7llvm_ks11MCAsmParser6getTokEv: 32| 5.59M|const AsmToken &MCAsmParser::getTok() const { 33| 5.59M| return getLexer().getTok(); 34| 5.59M|} _ZN7llvm_ks11MCAsmParser8TokErrorERKNS_5TwineENS_8ArrayRefINS_7SMRangeEEE: 36| 21|bool MCAsmParser::TokError(const Twine &Msg, ArrayRef Ranges) { 37| 21| Error(getLexer().getLoc(), Msg, Ranges); 38| 21| return true; 39| 21|} _ZN7llvm_ks11MCAsmParser15parseExpressionERPKNS_6MCExprE: 41| 14.5k|bool MCAsmParser::parseExpression(const MCExpr *&Res) { 42| 14.5k| SMLoc L; 43| 14.5k| return parseExpression(Res, L); 44| 14.5k|} _ZN7llvm_ks20MCAsmParserExtensionC2Ev: 14| 1.49k| BracketExpressionsSupported(false) { 15| 1.49k|} _ZN7llvm_ks20MCAsmParserExtensionD2Ev: 17| 1.49k|MCAsmParserExtension::~MCAsmParserExtension() { 18| 1.49k|} _ZN7llvm_ks20MCAsmParserExtension10InitializeERNS_11MCAsmParserE: 20| 2.24k|void MCAsmParserExtension::Initialize(MCAsmParser &Parser) { 21| 2.24k| this->Parser = &Parser; 22| 2.24k|} _ZN7llvm_ks17MCTargetAsmParserC2ERKNS_15MCTargetOptionsERKNS_15MCSubtargetInfoE: 16| 749| : AvailableFeatures(0),AvailableFeaturesFB(), ParsingInlineAsm(false), MCOptions(MCOptions), 17| 749| STI(&STI) 18| 749|{ 19| 749|} _ZN7llvm_ks17MCTargetAsmParserD2Ev: 21| 749|MCTargetAsmParser::~MCTargetAsmParser() { 22| 749|} _ZN7llvm_ks17MCTargetAsmParser7copySTIEv: 24| 6.97k|MCSubtargetInfo &MCTargetAsmParser::copySTI() { 25| 6.97k| MCSubtargetInfo &STICopy = getContext().getSubtargetCopy(getSTI()); 26| 6.97k| STI = &STICopy; 27| 6.97k| return STICopy; 28| 6.97k|} _ZNK7llvm_ks17MCTargetAsmParser6getSTIEv: 30| 41.2k|const MCSubtargetInfo &MCTargetAsmParser::getSTI() const { 31| 41.2k| return *STI; 32| 41.2k|} _ZNK7llvm_ks14MCRegisterInfo14getDwarfRegNumEjb: 61| 749|int MCRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const { 62| 749| const DwarfLLVMRegPair *M = isEH ? EHL2DwarfRegs : L2DwarfRegs; ------------------ | Branch (62:31): [True: 749, False: 0] ------------------ 63| 749| unsigned Size = isEH ? EHL2DwarfRegsSize : L2DwarfRegsSize; ------------------ | Branch (63:19): [True: 749, False: 0] ------------------ 64| | 65| 749| DwarfLLVMRegPair Key = { RegNum, 0 }; 66| 749| const DwarfLLVMRegPair *I = std::lower_bound(M, M+Size, Key); 67| 749| if (I == M+Size || I->FromReg != RegNum) ------------------ | Branch (67:7): [True: 0, False: 749] | Branch (67:22): [True: 0, False: 749] ------------------ 68| 0| return -1; 69| 749| return I->ToReg; 70| 749|} _ZN7llvm_ks9MCSectionC2ENS0_14SectionVariantENS_11SectionKindEPNS_8MCSymbolE: 23| 32.6k| : Begin(Begin), BundleGroupBeforeFirstInst(false), HasInstructions(false), 24| 32.6k| IsRegistered(false), DummyFragment(this), Variant(V), Kind(K) {} _ZNK7llvm_ks9MCSection8hasEndedEv: 32| 4.66k|bool MCSection::hasEnded() const { return End && End->isInSection(); } ------------------ | Branch (32:43): [True: 0, False: 4.66k] | Branch (32:50): [True: 0, False: 0] ------------------ _ZN7llvm_ks9MCSectionD2Ev: 34| 32.6k|MCSection::~MCSection() { 35| 32.6k|} _ZN7llvm_ks9MCSection27getSubsectionInsertionPointEj: 57| 4.66k|MCSection::getSubsectionInsertionPoint(unsigned Subsection) { 58| 4.66k| if (Subsection == 0 && SubsectionFragmentMap.empty()) ------------------ | Branch (58:7): [True: 4.66k, False: 0] | Branch (58:26): [True: 4.66k, False: 0] ------------------ 59| 4.66k| return end(); 60| | 61| 0| SmallVectorImpl>::iterator MI = 62| 0| std::lower_bound(SubsectionFragmentMap.begin(), 63| 0| SubsectionFragmentMap.end(), 64| 0| std::make_pair(Subsection, (MCFragment *)nullptr)); 65| 0| bool ExactMatch = false; 66| 0| if (MI != SubsectionFragmentMap.end()) { ------------------ | Branch (66:7): [True: 0, False: 0] ------------------ 67| 0| ExactMatch = MI->first == Subsection; 68| 0| if (ExactMatch) ------------------ | Branch (68:9): [True: 0, False: 0] ------------------ 69| 0| ++MI; 70| 0| } 71| 0| iterator IP; 72| 0| if (MI == SubsectionFragmentMap.end()) ------------------ | Branch (72:7): [True: 0, False: 0] ------------------ 73| 0| IP = end(); 74| 0| else 75| 0| IP = MI->second->getIterator(); 76| 0| if (!ExactMatch && Subsection != 0) { ------------------ | Branch (76:7): [True: 0, False: 0] | Branch (76:22): [True: 0, False: 0] ------------------ 77| | // The GNU as documentation claims that subsections have an alignment of 4, 78| | // although this appears not to be the case. 79| 0| MCFragment *F = new MCDataFragment(); 80| 0| SubsectionFragmentMap.insert(MI, std::make_pair(Subsection, F)); 81| 0| getFragmentList().insert(IP, F); 82| 0| F->setParent(this); 83| 0| } 84| | 85| 0| return IP; 86| 4.66k|} _ZN7llvm_ks9MCSection5beginEv: 103| 1.52k|MCSection::iterator MCSection::begin() { return Fragments.begin(); } _ZN7llvm_ks9MCSection3endEv: 105| 7.52k|MCSection::iterator MCSection::end() { return Fragments.end(); } _ZN7llvm_ks9MCSection6rbeginEv: 107| 316|MCSection::reverse_iterator MCSection::rbegin() { return Fragments.rbegin(); } _ZN7llvm_ks12MCSectionELFD2Ev: 20| 32.4k|MCSectionELF::~MCSectionELF() {} // anchor. _ZNK7llvm_ks12MCSectionELF12UseCodeAlignEv: 162| 306|bool MCSectionELF::UseCodeAlign() const { 163| 306| return getFlags() & ELF::SHF_EXECINSTR; 164| 306|} _ZNK7llvm_ks12MCSectionELF16isVirtualSectionEv: 166| 886|bool MCSectionELF::isVirtualSection() const { 167| 886| return getType() == ELF::SHT_NOBITS; 168| 886|} _ZN7llvm_ks14MCSectionMachOC2ENS_9StringRefES1_jjNS_11SectionKindEPNS_8MCSymbolE: 75| 130| : MCSection(SV_MachO, K, Begin), TypeAndAttributes(TAA), 76| 130| Reserved2(reserved2) { 77| 130| assert(Segment.size() <= 16 && Section.size() <= 16 && ------------------ | Branch (77:3): [True: 130, False: 0] | Branch (77:3): [True: 130, False: 0] | Branch (77:3): [True: 130, Folded] | Branch (77:3): [True: 130, False: 0] ------------------ 78| 130| "Segment or section string too long"); 79| 2.21k| for (unsigned i = 0; i != 16; ++i) { ------------------ | Branch (79:24): [True: 2.08k, False: 130] ------------------ 80| 2.08k| if (i < Segment.size()) ------------------ | Branch (80:9): [True: 146, False: 1.93k] ------------------ 81| 146| SegmentName[i] = Segment[i]; 82| 1.93k| else 83| 1.93k| SegmentName[i] = 0; 84| | 85| 2.08k| if (i < Section.size()) ------------------ | Branch (85:9): [True: 352, False: 1.72k] ------------------ 86| 352| SectionName[i] = Section[i]; 87| 1.72k| else 88| 1.72k| SectionName[i] = 0; 89| 2.08k| } 90| 130|} _ZNK7llvm_ks14MCSectionMachO12UseCodeAlignEv: 156| 32|bool MCSectionMachO::UseCodeAlign() const { 157| 32| return hasAttribute(MachO::S_ATTR_PURE_INSTRUCTIONS); 158| 32|} _ZNK7llvm_ks14MCSectionMachO16isVirtualSectionEv: 160| 10|bool MCSectionMachO::isVirtualSection() const { 161| 10| return (getType() == MachO::S_ZEROFILL || ------------------ | Branch (161:11): [True: 0, False: 10] ------------------ 162| 10| getType() == MachO::S_GB_ZEROFILL || ------------------ | Branch (162:11): [True: 0, False: 10] ------------------ 163| 10| getType() == MachO::S_THREAD_LOCAL_ZEROFILL); ------------------ | Branch (163:11): [True: 0, False: 10] ------------------ 164| 10|} _ZN7llvm_ks14MCSectionMachO21ParseSectionSpecifierENS_9StringRefERS1_S2_RjRbS3_: 176| 5.52k| unsigned &StubSize) { // Out. 177| 5.52k| TAAParsed = false; 178| | 179| 5.52k| SmallVector SplitSpec; 180| 5.52k| Spec.split(SplitSpec, ','); 181| | // Remove leading and trailing whitespace. 182| 5.52k| auto GetEmptyOrTrim = [&SplitSpec](size_t Idx) -> StringRef { 183| 5.52k| return SplitSpec.size() > Idx ? SplitSpec[Idx].trim() : StringRef(); 184| 5.52k| }; 185| 5.52k| Segment = GetEmptyOrTrim(0); 186| 5.52k| Section = GetEmptyOrTrim(1); 187| 5.52k| StringRef SectionType = GetEmptyOrTrim(2); 188| 5.52k| StringRef Attrs = GetEmptyOrTrim(3); 189| 5.52k| StringRef StubSizeStr = GetEmptyOrTrim(4); 190| | 191| | // Verify that the segment is present and not too long. 192| 5.52k| if (Segment.empty() || Segment.size() > 16) ------------------ | Branch (192:7): [True: 0, False: 5.52k] | Branch (192:26): [True: 0, False: 5.52k] ------------------ 193| 0| return "mach-o section specifier requires a segment whose length is " 194| 0| "between 1 and 16 characters"; 195| | 196| | // Verify that the section is present and not too long. 197| 5.52k| if (Section.empty()) ------------------ | Branch (197:7): [True: 0, False: 5.52k] ------------------ 198| 0| return "mach-o section specifier requires a segment and section " 199| 0| "separated by a comma"; 200| | 201| 5.52k| if (Section.size() > 16) ------------------ | Branch (201:7): [True: 3, False: 5.52k] ------------------ 202| 3| return "mach-o section specifier requires a section whose length is " 203| 3| "between 1 and 16 characters"; 204| | 205| | // If there is no comma after the section, we're done. 206| 5.52k| TAA = 0; 207| 5.52k| StubSize = 0; 208| 5.52k| if (SectionType.empty()) ------------------ | Branch (208:7): [True: 5.51k, False: 8] ------------------ 209| 5.51k| return ""; 210| | 211| | // Figure out which section type it is. 212| 8| auto TypeDescriptor = std::find_if( 213| 8| std::begin(SectionTypeDescriptors), std::end(SectionTypeDescriptors), 214| 8| [&](decltype(*SectionTypeDescriptors) &Descriptor) { 215| 8| return Descriptor.AssemblerName && 216| 8| SectionType == Descriptor.AssemblerName; 217| 8| }); 218| | 219| | // If we didn't find the section type, reject it. 220| 8| if (TypeDescriptor == std::end(SectionTypeDescriptors)) ------------------ | Branch (220:7): [True: 8, False: 0] ------------------ 221| 8| return "mach-o section specifier uses an unknown section type"; 222| | 223| | // Remember the TypeID. 224| 0| TAA = TypeDescriptor - std::begin(SectionTypeDescriptors); 225| 0| TAAParsed = true; 226| | 227| | // If we have no comma after the section type, there are no attributes. 228| 0| if (Attrs.empty()) { ------------------ | Branch (228:7): [True: 0, False: 0] ------------------ 229| | // S_SYMBOL_STUBS always require a symbol stub size specifier. 230| 0| if (TAA == MachO::S_SYMBOL_STUBS) ------------------ | Branch (230:9): [True: 0, False: 0] ------------------ 231| 0| return "mach-o section specifier of type 'symbol_stubs' requires a size " 232| 0| "specifier"; 233| 0| return ""; 234| 0| } 235| | 236| | // The attribute list is a '+' separated list of attributes. 237| 0| SmallVector SectionAttrs; 238| 0| Attrs.split(SectionAttrs, '+', /*MaxSplit=*/-1, /*KeepEmpty=*/false); 239| | 240| 0| for (StringRef &SectionAttr : SectionAttrs) { ------------------ | Branch (240:31): [True: 0, False: 0] ------------------ 241| 0| auto AttrDescriptorI = std::find_if( 242| 0| std::begin(SectionAttrDescriptors), std::end(SectionAttrDescriptors), 243| 0| [&](decltype(*SectionAttrDescriptors) &Descriptor) { 244| 0| return Descriptor.AssemblerName && 245| 0| SectionAttr.trim() == Descriptor.AssemblerName; 246| 0| }); 247| 0| if (AttrDescriptorI == std::end(SectionAttrDescriptors)) ------------------ | Branch (247:9): [True: 0, False: 0] ------------------ 248| 0| return "mach-o section specifier has invalid attribute"; 249| | 250| 0| TAA |= AttrDescriptorI->AttrFlag; 251| 0| } 252| | 253| | // Okay, we've parsed the section attributes, see if we have a stub size spec. 254| 0| if (StubSizeStr.empty()) { ------------------ | Branch (254:7): [True: 0, False: 0] ------------------ 255| | // S_SYMBOL_STUBS always require a symbol stub size specifier. 256| 0| if (TAA == MachO::S_SYMBOL_STUBS) ------------------ | Branch (256:9): [True: 0, False: 0] ------------------ 257| 0| return "mach-o section specifier of type 'symbol_stubs' requires a size " 258| 0| "specifier"; 259| 0| return ""; 260| 0| } 261| | 262| | // If we have a stub size spec, we must have a sectiontype of S_SYMBOL_STUBS. 263| 0| if ((TAA & MachO::SECTION_TYPE) != MachO::S_SYMBOL_STUBS) ------------------ | Branch (263:7): [True: 0, False: 0] ------------------ 264| 0| return "mach-o section specifier cannot have a stub size specified because " 265| 0| "it does not have type 'symbol_stubs'"; 266| | 267| | // Convert the stub size from a string to an integer. 268| 0| if (StubSizeStr.getAsInteger(0, StubSize)) ------------------ | Branch (268:7): [True: 0, False: 0] ------------------ 269| 0| return "mach-o section specifier has a malformed stub size"; 270| | 271| 0| return ""; 272| 0|} MCSectionMachO.cpp:_ZZN7llvm_ks14MCSectionMachO21ParseSectionSpecifierENS_9StringRefERS1_S2_RjRbS3_ENK3$_0clEm: 182| 27.6k| auto GetEmptyOrTrim = [&SplitSpec](size_t Idx) -> StringRef { 183| 27.6k| return SplitSpec.size() > Idx ? SplitSpec[Idx].trim() : StringRef(); ------------------ | Branch (183:12): [True: 27.3k, False: 223] ------------------ 184| 27.6k| }; MCSectionMachO.cpp:_ZZN7llvm_ks14MCSectionMachO21ParseSectionSpecifierENS_9StringRefERS1_S2_RjRbS3_ENK3$_1clERK3$_0: 214| 176| [&](decltype(*SectionTypeDescriptors) &Descriptor) { 215| 176| return Descriptor.AssemblerName && ------------------ | Branch (215:16): [True: 144, False: 32] ------------------ 216| 144| SectionType == Descriptor.AssemblerName; ------------------ | Branch (216:16): [True: 0, False: 144] ------------------ 217| 176| }); _ZN7llvm_ks10MCStreamerC2ERNS_9MCContextE: 46| 749| : Context(Ctx), CurrentWinFrameInfo(nullptr) { 47| 749| SectionStack.push_back(std::pair()); 48| 749|} _ZN7llvm_ks10MCStreamerD2Ev: 50| 749|MCStreamer::~MCStreamer() { 51| 749| for (unsigned i = 0; i < getNumWinFrameInfos(); ++i) ------------------ | Branch (51:24): [True: 0, False: 749] ------------------ 52| 0| delete WinFrameInfos[i]; 53| 749|} _ZN7llvm_ks10MCStreamer12EmitIntValueEmjRb: 82| 140k|{ 83| 140k| Error = false; 84| | //assert(1 <= Size && Size <= 8 && "Invalid size"); 85| 140k| if (1 > Size || Size > 8) { ------------------ | Branch (85:7): [True: 16, False: 140k] | Branch (85:19): [True: 0, False: 140k] ------------------ 86| 16| Error = true; 87| 16| return; 88| 16| } 89| | //assert((isUIntN(8 * Size, Value) || isIntN(8 * Size, Value)) && 90| | // "Invalid size"); 91| 140k| if (!isUIntN(8 * Size, Value) && !isIntN(8 * Size, Value)) { ------------------ | Branch (91:7): [True: 244, False: 140k] | Branch (91:36): [True: 235, False: 9] ------------------ 92| 235| Error = true; 93| 235| return; 94| 235| } 95| 140k| char buf[8]; 96| 140k| const bool isLittleEndian = Context.getAsmInfo()->isLittleEndian(); 97| 697k| for (unsigned i = 0; i != Size; ++i) { ------------------ | Branch (97:24): [True: 557k, False: 140k] ------------------ 98| 557k| unsigned index = isLittleEndian ? i : (Size - i - 1); ------------------ | Branch (98:22): [True: 0, False: 557k] ------------------ 99| 557k| buf[i] = uint8_t(Value >> (index * 8)); 100| 557k| } 101| 140k| EmitBytes(StringRef(buf, Size)); 102| 140k|} _ZN7llvm_ks10MCStreamer9EmitValueEPKNS_6MCExprEjNS_5SMLocE: 122| 3.12k|void MCStreamer::EmitValue(const MCExpr *Value, unsigned Size, SMLoc Loc) { 123| 3.12k| EmitValueImpl(Value, Size, Loc); 124| 3.12k|} _ZN7llvm_ks10MCStreamer9EmitLabelEPNS_8MCSymbolE: 232| 8.48k|void MCStreamer::EmitLabel(MCSymbol *Symbol) { 233| 8.48k| assert(!Symbol->isVariable() && "Cannot emit a variable symbol!"); ------------------ | Branch (233:3): [True: 8.48k, False: 0] | Branch (233:3): [True: 8.48k, Folded] | Branch (233:3): [True: 8.48k, False: 0] ------------------ 234| 8.48k| assert(getCurrentSection().first && "Cannot emit before setting section!"); ------------------ | Branch (234:3): [True: 8.48k, False: 0] | Branch (234:3): [True: 8.48k, Folded] | Branch (234:3): [True: 8.48k, False: 0] ------------------ 235| 8.48k| assert(!Symbol->getFragment() && "Unexpected fragment on symbol data!"); ------------------ | Branch (235:3): [True: 8.48k, False: 0] | Branch (235:3): [True: 8.48k, Folded] | Branch (235:3): [True: 8.48k, False: 0] ------------------ 236| 8.48k| Symbol->setFragment(&getCurrentSectionOnly()->getDummyFragment()); 237| | 238| 8.48k| MCTargetStreamer *TS = getTargetStreamer(); 239| 8.48k| if (TS) ------------------ | Branch (239:7): [True: 0, False: 8.48k] ------------------ 240| 0| TS->emitLabel(Symbol); 241| 8.48k|} _ZN7llvm_ks10MCStreamer6FinishEv: 625| 312|unsigned int MCStreamer::Finish() { 626| 312| if (!DwarfFrameInfos.empty() && !DwarfFrameInfos.back().End) ------------------ | Branch (626:7): [True: 0, False: 312] | Branch (626:35): [True: 0, False: 0] ------------------ 627| 0| report_fatal_error("Unfinished frame!"); 628| | 629| 312| MCTargetStreamer *TS = getTargetStreamer(); 630| 312| if (TS) ------------------ | Branch (630:7): [True: 0, False: 312] ------------------ 631| 0| TS->finish(); 632| | 633| 312| return FinishImpl(); 634| 312|} _ZN7llvm_ks10MCStreamer14EmitAssignmentEPNS_8MCSymbolEPKNS_6MCExprE: 636| 793|bool MCStreamer::EmitAssignment(MCSymbol *Symbol, const MCExpr *Value) { 637| 793| visitUsedExpr(*Value); 638| 793| bool valid; 639| 793| Symbol->setVariableValue(Value, valid); 640| 793| if (!valid) ------------------ | Branch (640:7): [True: 12, False: 781] ------------------ 641| 12| return false; 642| | 643| 781| MCTargetStreamer *TS = getTargetStreamer(); 644| 781| if (TS) ------------------ | Branch (644:7): [True: 0, False: 781] ------------------ 645| 0| TS->emitAssignment(Symbol, Value); 646| | 647| 781| return true; 648| 793|} _ZN7llvm_ks10MCStreamer13visitUsedExprERKNS_6MCExprE: 653| 33.4k|void MCStreamer::visitUsedExpr(const MCExpr &Expr) { 654| 33.4k| switch (Expr.getKind()) { ------------------ | Branch (654:11): [True: 33.4k, False: 0] ------------------ 655| 6| case MCExpr::Target: ------------------ | Branch (655:3): [True: 6, False: 33.4k] ------------------ 656| 6| cast(Expr).visitUsedExpr(*this); 657| 6| break; 658| | 659| 4.95k| case MCExpr::Constant: ------------------ | Branch (659:3): [True: 4.95k, False: 28.4k] ------------------ 660| 4.95k| break; 661| | 662| 11.8k| case MCExpr::Binary: { ------------------ | Branch (662:3): [True: 11.8k, False: 21.6k] ------------------ 663| 11.8k| const MCBinaryExpr &BE = cast(Expr); 664| 11.8k| visitUsedExpr(*BE.getLHS()); 665| 11.8k| visitUsedExpr(*BE.getRHS()); 666| 11.8k| break; 667| 0| } 668| | 669| 14.9k| case MCExpr::SymbolRef: ------------------ | Branch (669:3): [True: 14.9k, False: 18.4k] ------------------ 670| 14.9k| visitUsedSymbol(cast(Expr).getSymbol()); 671| 14.9k| break; 672| | 673| 1.71k| case MCExpr::Unary: ------------------ | Branch (673:3): [True: 1.71k, False: 31.7k] ------------------ 674| 1.71k| visitUsedExpr(*cast(Expr).getSubExpr()); 675| 1.71k| break; 676| 33.4k| } 677| 33.4k|} _ZN7llvm_ks10MCStreamer15EmitInstructionERNS_6MCInstERKNS_15MCSubtargetInfoERj: 681| 8.24k| unsigned int &KsError) { 682| | // Scan for values. 683| 32.6k| for (unsigned i = Inst.getNumOperands(); i--;) ------------------ | Branch (683:44): [True: 24.3k, False: 8.24k] ------------------ 684| 24.3k| if (Inst.getOperand(i).isExpr()) ------------------ | Branch (684:9): [True: 4.18k, False: 20.1k] ------------------ 685| 4.18k| visitUsedExpr(*Inst.getOperand(i).getExpr()); 686| 8.24k|} _ZN7llvm_ks10MCStreamer13EmitValueImplEPKNS_6MCExprEjNS_5SMLocE: 723| 3.12k|void MCStreamer::EmitValueImpl(const MCExpr *Value, unsigned Size, SMLoc Loc) { 724| 3.12k| visitUsedExpr(*Value); 725| 3.12k|} _ZN7llvm_ks10MCStreamer13SwitchSectionEPNS_9MCSectionEPKNS_6MCExprE: 739| 6.49k|void MCStreamer::SwitchSection(MCSection *Section, const MCExpr *Subsection) { 740| 6.49k| assert(Section && "Cannot switch to a null section!"); ------------------ | Branch (740:3): [True: 6.49k, False: 0] | Branch (740:3): [True: 6.49k, Folded] | Branch (740:3): [True: 6.49k, False: 0] ------------------ 741| 6.49k| MCSectionSubPair curSection = SectionStack.back().first; 742| 6.49k| SectionStack.back().second = curSection; 743| 6.49k| if (MCSectionSubPair(Section, Subsection) != curSection) { ------------------ | Branch (743:7): [True: 4.66k, False: 1.82k] ------------------ 744| 4.66k| ChangeSection(Section, Subsection); 745| 4.66k| SectionStack.back().first = MCSectionSubPair(Section, Subsection); 746| 4.66k| assert(!Section->hasEnded() && "Section already ended"); ------------------ | Branch (746:5): [True: 4.66k, False: 0] | Branch (746:5): [True: 4.66k, Folded] | Branch (746:5): [True: 4.66k, False: 0] ------------------ 747| 4.66k| MCSymbol *Sym = Section->getBeginSymbol(); 748| 4.66k| if (Sym && !Sym->isInSection()) ------------------ | Branch (748:9): [True: 4.66k, False: 0] | Branch (748:16): [True: 879, False: 3.78k] ------------------ 749| 879| EmitLabel(Sym); 750| 4.66k| } 751| 6.49k|} _ZN7llvm_ks15MCSubtargetInfo19InitMCProcessorInfoENS_9StringRefES1_: 26| 749|void MCSubtargetInfo::InitMCProcessorInfo(StringRef CPU, StringRef FS) { 27| 749| FeatureBits = getFeatures(CPU, FS, ProcDesc, ProcFeatures); 28| 749| if (!CPU.empty() && ProcSchedModels) ------------------ | Branch (28:7): [True: 749, False: 0] | Branch (28:23): [True: 0, False: 749] ------------------ 29| 0| CPUSchedModel = &getSchedModelForCPU(CPU); 30| 749|} _ZN7llvm_ks15MCSubtargetInfoC2ERKNS_6TripleENS_9StringRefES4_NS_8ArrayRefINS_18SubtargetFeatureKVEEES7_PKNS_15SubtargetInfoKVE: 40| 749| : TargetTriple(TT), CPU(C), ProcFeatures(PF), ProcDesc(PD), 41| 749| ProcSchedModels(ProcSched) { 42| 749| InitMCProcessorInfo(CPU, FS); 43| 749|} _ZN7llvm_ks15MCSubtargetInfo13ToggleFeatureENS_9StringRefE: 59| 6.97k|FeatureBitset MCSubtargetInfo::ToggleFeature(StringRef FS) { 60| 6.97k| SubtargetFeatures::ToggleFeature(FeatureBits, FS, ProcFeatures); 61| 6.97k| return FeatureBits; 62| 6.97k|} MCSubtargetInfo.cpp:_ZL11getFeaturesN7llvm_ks9StringRefES0_NS_8ArrayRefINS_18SubtargetFeatureKVEEES3_: 21| 749| ArrayRef ProcFeatures) { 22| 749| SubtargetFeatures Features(FS); 23| 749| return Features.getFeatureBits(CPU, ProcDesc, ProcFeatures); 24| 749|} _ZN7llvm_ks8MCSymbolnwEmPKNS_14StringMapEntryIbEERNS_9MCContextE: 26| 17.7k| MCContext &Ctx) { 27| | // We may need more space for a Name to account for alignment. So allocate 28| | // space for the storage type and not the name pointer. 29| 17.7k| size_t Size = s + (Name ? sizeof(NameEntryStorageTy) : 0); ------------------ | Branch (29:22): [True: 17.7k, False: 0] ------------------ 30| | 31| | // For safety, ensure that the alignment of a pointer is enough for an 32| | // MCSymbol. This also ensures we don't need padding between the name and 33| | // symbol. 34| 17.7k| static_assert((unsigned)AlignOf::Alignment <= 35| 17.7k| AlignOf::Alignment, 36| 17.7k| "Bad alignment of MCSymbol"); 37| 17.7k| void *Storage = Ctx.allocate(Size, alignOf()); 38| 17.7k| NameEntryStorageTy *Start = static_cast(Storage); 39| 17.7k| NameEntryStorageTy *End = Start + (Name ? 1 : 0); ------------------ | Branch (39:38): [True: 17.7k, False: 0] ------------------ 40| 17.7k| return End; 41| 17.7k|} _ZN7llvm_ks8MCSymbol16setVariableValueEPKNS_6MCExprERb: 43| 826|void MCSymbol::setVariableValue(const MCExpr *Value, bool &valid) { 44| 826| valid = true; 45| | //assert(!IsUsed && "Cannot set a variable that has already been used."); 46| | //assert(Value && "Invalid variable value!"); 47| | //assert((SymbolContents == SymContentsUnset || 48| | // SymbolContents == SymContentsVariable) && 49| | // "Cannot give common/offset symbol a variable value"); 50| 826| if (IsUsed || !Value || (SymbolContents != SymContentsUnset && ------------------ | Branch (50:7): [True: 12, False: 814] | Branch (50:17): [True: 0, False: 814] | Branch (50:28): [True: 591, False: 223] ------------------ 51| 591| SymbolContents != SymContentsVariable)) { ------------------ | Branch (51:15): [True: 0, False: 591] ------------------ 52| 12| valid = false; 53| 12| return; 54| 12| } 55| 814| this->Value = Value; 56| 814| SymbolContents = SymContentsVariable; 57| 814| setUndefined(); 58| 814|} _ZNK7llvm_ks11MCSymbolELF10setBindingEj: 43| 154|void MCSymbolELF::setBinding(unsigned Binding) const { 44| 154| setIsBindingSet(); 45| 154| unsigned Val; 46| 154| switch (Binding) { 47| 0| default: ------------------ | Branch (47:3): [True: 0, False: 154] ------------------ 48| 0| llvm_unreachable("Unsupported Binding"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ 49| 6| case ELF::STB_LOCAL: ------------------ | Branch (49:3): [True: 6, False: 148] ------------------ 50| 6| Val = 0; 51| 6| break; 52| 148| case ELF::STB_GLOBAL: ------------------ | Branch (52:3): [True: 148, False: 6] ------------------ 53| 148| Val = 1; 54| 148| break; 55| 0| case ELF::STB_WEAK: ------------------ | Branch (55:3): [True: 0, False: 154] ------------------ 56| 0| Val = 2; 57| 0| break; 58| 0| case ELF::STB_GNU_UNIQUE: ------------------ | Branch (58:3): [True: 0, False: 154] ------------------ 59| 0| Val = 3; 60| 0| break; 61| 154| } 62| 154| uint32_t OtherFlags = getFlags() & ~(0x3 << ELF_STB_Shift); 63| 154| setFlags(OtherFlags | (Val << ELF_STB_Shift)); 64| 154|} _ZNK7llvm_ks11MCSymbolELF10getBindingEv: 66| 553|unsigned MCSymbolELF::getBinding() const { 67| 553| if (isBindingSet()) { ------------------ | Branch (67:7): [True: 11, False: 542] ------------------ 68| 11| uint32_t Val = (getFlags() & (0x3 << ELF_STB_Shift)) >> ELF_STB_Shift; 69| 11| switch (Val) { 70| 0| default: ------------------ | Branch (70:5): [True: 0, False: 11] ------------------ 71| 0| llvm_unreachable("Invalid value"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ 72| 0| case 0: ------------------ | Branch (72:5): [True: 0, False: 11] ------------------ 73| 0| return ELF::STB_LOCAL; 74| 11| case 1: ------------------ | Branch (74:5): [True: 11, False: 0] ------------------ 75| 11| return ELF::STB_GLOBAL; 76| 0| case 2: ------------------ | Branch (76:5): [True: 0, False: 11] ------------------ 77| 0| return ELF::STB_WEAK; 78| 0| case 3: ------------------ | Branch (78:5): [True: 0, False: 11] ------------------ 79| 0| return ELF::STB_GNU_UNIQUE; 80| 11| } 81| 11| } 82| | 83| 542| if (isDefined()) ------------------ | Branch (83:7): [True: 404, False: 138] ------------------ 84| 404| return ELF::STB_LOCAL; 85| 138| if (isUsedInReloc()) ------------------ | Branch (85:7): [True: 0, False: 138] ------------------ 86| 0| return ELF::STB_GLOBAL; 87| 138| if (isWeakrefUsedInReloc()) ------------------ | Branch (87:7): [True: 0, False: 138] ------------------ 88| 0| return ELF::STB_WEAK; 89| 138| if (isSignature()) ------------------ | Branch (89:7): [True: 0, False: 138] ------------------ 90| 0| return ELF::STB_LOCAL; 91| 138| return ELF::STB_GLOBAL; 92| 138|} _ZNK7llvm_ks11MCSymbolELF7setTypeEj: 94| 2.96k|void MCSymbolELF::setType(unsigned Type) const { 95| 2.96k| unsigned Val; 96| 2.96k| switch (Type) { 97| 0| default: ------------------ | Branch (97:3): [True: 0, False: 2.96k] ------------------ 98| 0| llvm_unreachable("Unsupported Binding"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ 99| 0| case ELF::STT_NOTYPE: ------------------ | Branch (99:3): [True: 0, False: 2.96k] ------------------ 100| 0| Val = 0; 101| 0| break; 102| 11| case ELF::STT_OBJECT: ------------------ | Branch (102:3): [True: 11, False: 2.95k] ------------------ 103| 11| Val = 1; 104| 11| break; 105| 0| case ELF::STT_FUNC: ------------------ | Branch (105:3): [True: 0, False: 2.96k] ------------------ 106| 0| Val = 2; 107| 0| break; 108| 879| case ELF::STT_SECTION: ------------------ | Branch (108:3): [True: 879, False: 2.08k] ------------------ 109| 879| Val = 3; 110| 879| break; 111| 0| case ELF::STT_COMMON: ------------------ | Branch (111:3): [True: 0, False: 2.96k] ------------------ 112| 0| Val = 4; 113| 0| break; 114| 2.07k| case ELF::STT_TLS: ------------------ | Branch (114:3): [True: 2.07k, False: 890] ------------------ 115| 2.07k| Val = 5; 116| 2.07k| break; 117| 0| case ELF::STT_GNU_IFUNC: ------------------ | Branch (117:3): [True: 0, False: 2.96k] ------------------ 118| 0| Val = 6; 119| 0| break; 120| 2.96k| } 121| 2.96k| uint32_t OtherFlags = getFlags() & ~(0x7 << ELF_STT_Shift); 122| 2.96k| setFlags(OtherFlags | (Val << ELF_STT_Shift)); 123| 2.96k|} _ZNK7llvm_ks11MCSymbolELF8getOtherEv: 170| 398|unsigned MCSymbolELF::getOther() const { 171| 398| unsigned Other = (getFlags() & (0x7 << ELF_STO_Shift)) >> ELF_STO_Shift; 172| 398| return Other << 5; 173| 398|} _ZNK7llvm_ks11MCSymbolELF20isWeakrefUsedInRelocEv: 180| 138|bool MCSymbolELF::isWeakrefUsedInReloc() const { 181| 138| return getFlags() & (0x1 << ELF_WeakrefUsedInReloc_Shift); 182| 138|} _ZNK7llvm_ks11MCSymbolELF11isSignatureEv: 189| 138|bool MCSymbolELF::isSignature() const { 190| 138| return getFlags() & (0x1 << ELF_IsSignature_Shift); 191| 138|} _ZNK7llvm_ks11MCSymbolELF15setIsBindingSetEv: 193| 154|void MCSymbolELF::setIsBindingSet() const { 194| 154| uint32_t OtherFlags = getFlags() & ~(0x1 << ELF_BindingSet_Shift); 195| 154| setFlags(OtherFlags | (1 << ELF_BindingSet_Shift)); 196| 154|} _ZNK7llvm_ks11MCSymbolELF12isBindingSetEv: 198| 564|bool MCSymbolELF::isBindingSet() const { 199| 564| return getFlags() & (0x1 << ELF_BindingSet_Shift); 200| 564|} _ZN7llvm_ks15MCTargetOptionsC2Ev: 16| 1.49k| : MCRelaxAll(false), 17| 1.49k| MCFatalWarnings(false), MCNoWarn(false), 18| 1.49k| DwarfVersion(0), ABIName() {} _ZNK7llvm_ks15MCTargetOptions10getABINameEv: 20| 3.74k|StringRef MCTargetOptions::getABIName() const { 21| 3.74k| return ABIName; 22| 3.74k|} _ZN7llvm_ks18StringTableBuilderC2ENS0_4KindE: 19| 749|StringTableBuilder::StringTableBuilder(Kind K) : K(K) { 20| | // Account for leading bytes in table so that offsets returned from add are 21| | // correct. 22| 749| switch (K) { ------------------ | Branch (22:11): [True: 749, False: 0] ------------------ 23| 0| case RAW: ------------------ | Branch (23:3): [True: 0, False: 749] ------------------ 24| 0| Size = 0; 25| 0| break; 26| 0| case MachO: ------------------ | Branch (26:3): [True: 0, False: 749] ------------------ 27| 749| case ELF: ------------------ | Branch (27:3): [True: 749, False: 0] ------------------ 28| 749| Size = 1; 29| 749| break; 30| 0| case WinCOFF: ------------------ | Branch (30:3): [True: 0, False: 749] ------------------ 31| 0| Size = 4; 32| 0| break; 33| 749| } 34| 749|} _ZN7llvm_ks18StringTableBuilder3addENS_9StringRefE: 177| 517|size_t StringTableBuilder::add(StringRef S) { 178| 517| assert(!isFinalized()); ------------------ | Branch (178:3): [True: 517, False: 0] ------------------ 179| 517| auto P = StringIndexMap.insert(std::make_pair(S, Size)); 180| 517| if (P.second) ------------------ | Branch (180:7): [True: 517, False: 0] ------------------ 181| 517| Size += S.size() + (K != RAW); 182| 517| return P.first->second; 183| 517|} _ZN7llvm_ks17SubtargetFeaturesC2ENS_9StringRefE: 120| 749|SubtargetFeatures::SubtargetFeatures(StringRef Initial) { 121| | // Break up string into separate features 122| 749| Split(Features, Initial); 123| 749|} _ZN7llvm_ks17SubtargetFeatures13ToggleFeatureERNS_13FeatureBitsetENS_9StringRefENS_8ArrayRefINS_18SubtargetFeatureKVEEE: 166| 6.97k| ArrayRef FeatureTable) { 167| | 168| | // Find feature in table. 169| 6.97k| const SubtargetFeatureKV *FeatureEntry = 170| 6.97k| Find(StripFlag(Feature), FeatureTable); 171| | // If there is a match 172| 6.97k| if (FeatureEntry) { ------------------ | Branch (172:7): [True: 6.97k, False: 0] ------------------ 173| 6.97k| if ((Bits & FeatureEntry->Value) == FeatureEntry->Value) { ------------------ | Branch (173:9): [True: 3.43k, False: 3.54k] ------------------ 174| 3.43k| Bits &= ~FeatureEntry->Value; 175| | // For each feature that implies this, clear it. 176| 3.43k| ClearImpliedBits(Bits, FeatureEntry, FeatureTable); 177| 3.54k| } else { 178| 3.54k| Bits |= FeatureEntry->Value; 179| | 180| | // For each feature that this implies, set it. 181| 3.54k| SetImpliedBits(Bits, FeatureEntry, FeatureTable); 182| 3.54k| } 183| 6.97k| } else { 184| 0| errs() << "'" << Feature 185| 0| << "' is not a recognized feature for this target" 186| 0| << " (ignoring feature)\n"; 187| 0| } 188| 6.97k|} _ZN7llvm_ks17SubtargetFeatures14getFeatureBitsENS_9StringRefENS_8ArrayRefINS_18SubtargetFeatureKVEEES4_: 225| 749| ArrayRef FeatureTable) { 226| | 227| 749| if (CPUTable.empty() || FeatureTable.empty()) ------------------ | Branch (227:7): [True: 0, False: 749] | Branch (227:27): [True: 0, False: 749] ------------------ 228| 0| return FeatureBitset(); 229| | 230| 749|#ifndef NDEBUG 231| 749| assert(std::is_sorted(std::begin(CPUTable), std::end(CPUTable)) && ------------------ | Branch (231:3): [True: 749, False: 0] | Branch (231:3): [True: 749, Folded] | Branch (231:3): [True: 749, False: 0] ------------------ 232| 749| "CPU table is not sorted"); 233| 749| assert(std::is_sorted(std::begin(FeatureTable), std::end(FeatureTable)) && ------------------ | Branch (233:3): [True: 749, False: 0] | Branch (233:3): [True: 749, Folded] | Branch (233:3): [True: 749, False: 0] ------------------ 234| 749| "CPU features table is not sorted"); 235| 749|#endif 236| | // Resulting bits 237| 749| FeatureBitset Bits; 238| | 239| | // Check if help is needed 240| 749| if (CPU == "help") ------------------ | Branch (240:7): [True: 0, False: 749] ------------------ 241| 0| Help(CPUTable, FeatureTable); 242| | 243| | // Find CPU entry if CPU name is specified. 244| 749| else if (!CPU.empty()) { ------------------ | Branch (244:12): [True: 749, False: 0] ------------------ 245| 749| const SubtargetFeatureKV *CPUEntry = Find(CPU, CPUTable); 246| | 247| | // If there is a match 248| 749| if (CPUEntry) { ------------------ | Branch (248:9): [True: 749, False: 0] ------------------ 249| | // Set base feature bits 250| 749| Bits = CPUEntry->Value; 251| | 252| | // Set the feature implied by this CPU feature, if any. 253| 29.2k| for (auto &FE : FeatureTable) { ------------------ | Branch (253:21): [True: 29.2k, False: 749] ------------------ 254| 29.2k| if ((CPUEntry->Value & FE.Value).any()) ------------------ | Branch (254:13): [True: 749, False: 28.4k] ------------------ 255| 749| SetImpliedBits(Bits, &FE, FeatureTable); 256| 29.2k| } 257| 749| } else { 258| 0| errs() << "'" << CPU 259| 0| << "' is not a recognized processor for this target" 260| 0| << " (ignoring processor)\n"; 261| 0| } 262| 749| } 263| | 264| | // Iterate through each feature 265| 749| for (auto &Feature : Features) { ------------------ | Branch (265:22): [True: 0, False: 749] ------------------ 266| | // Check for help 267| 0| if (Feature == "+help") ------------------ | Branch (267:9): [True: 0, False: 0] ------------------ 268| 0| Help(CPUTable, FeatureTable); 269| | 270| 0| ApplyFeatureFlag(Bits, Feature, FeatureTable); 271| 0| } 272| | 273| 749| return Bits; 274| 749|} SubtargetFeature.cpp:_ZL7hasFlagN7llvm_ks9StringRefE: 31| 6.97k|static inline bool hasFlag(StringRef Feature) { 32| 6.97k| assert(!Feature.empty() && "Empty string"); ------------------ | Branch (32:3): [True: 6.97k, False: 0] | Branch (32:3): [True: 6.97k, Folded] | Branch (32:3): [True: 6.97k, False: 0] ------------------ 33| | // Get first character 34| 6.97k| char Ch = Feature[0]; 35| | // Check if first character is '+' or '-' flag 36| 6.97k| return Ch == '+' || Ch =='-'; ------------------ | Branch (36:10): [True: 0, False: 6.97k] | Branch (36:23): [True: 0, False: 6.97k] ------------------ 37| 6.97k|} SubtargetFeature.cpp:_ZL5SplitRNSt3__16vectorINS_12basic_stringIcNS_11char_traitsIcEENS_9allocatorIcEEEENS4_IS6_EEEEN7llvm_ks9StringRefE: 57| 749|static void Split(std::vector &V, StringRef S) { 58| 749| SmallVector Tmp; 59| 749| S.split(Tmp, ',', -1, false /* KeepEmpty */); 60| 749| V.assign(Tmp.begin(), Tmp.end()); 61| 749|} SubtargetFeature.cpp:_ZL4FindN7llvm_ks9StringRefENS_8ArrayRefINS_18SubtargetFeatureKVEEE: 74| 7.72k| ArrayRef A) { 75| | // Binary search the array 76| 7.72k| auto F = std::lower_bound(A.begin(), A.end(), S); 77| | // If not found then return NULL 78| 7.72k| if (F == A.end() || StringRef(F->Key) != S) return nullptr; ------------------ | Branch (78:7): [True: 0, False: 7.72k] | Branch (78:7): [True: 0, False: 7.72k] | Branch (78:23): [True: 0, False: 7.72k] ------------------ 79| | // Return the found array item 80| 7.72k| return F; 81| 7.72k|} SubtargetFeature.cpp:_ZL9StripFlagN7llvm_ks9StringRefE: 41| 6.97k|static inline std::string StripFlag(StringRef Feature) { 42| 6.97k| return hasFlag(Feature) ? Feature.substr(1) : Feature; ------------------ | Branch (42:10): [True: 0, False: 6.97k] ------------------ 43| 6.97k|} SubtargetFeature.cpp:_ZL16ClearImpliedBitsRN7llvm_ks13FeatureBitsetEPKNS_18SubtargetFeatureKVENS_8ArrayRefIS2_EE: 152| 3.48k| ArrayRef FeatureTable) { 153| 135k| for (auto &FE : FeatureTable) { ------------------ | Branch (153:17): [True: 135k, False: 3.48k] ------------------ 154| 135k| if (FeatureEntry->Value == FE.Value) continue; ------------------ | Branch (154:9): [True: 3.48k, False: 132k] ------------------ 155| | 156| 132k| if ((FE.Implies & FeatureEntry->Value).any()) { ------------------ | Branch (156:9): [True: 50, False: 132k] ------------------ 157| 50| Bits &= ~FE.Value; 158| 50| ClearImpliedBits(Bits, &FE, FeatureTable); 159| 50| } 160| 132k| } 161| 3.48k|} SubtargetFeature.cpp:_ZL14SetImpliedBitsRN7llvm_ks13FeatureBitsetEPKNS_18SubtargetFeatureKVENS_8ArrayRefIS2_EE: 135| 7.60k| ArrayRef FeatureTable) { 136| 296k| for (auto &FE : FeatureTable) { ------------------ | Branch (136:17): [True: 296k, False: 7.60k] ------------------ 137| 296k| if (FeatureEntry->Value == FE.Value) continue; ------------------ | Branch (137:9): [True: 7.60k, False: 289k] ------------------ 138| | 139| 289k| if ((FeatureEntry->Implies & FE.Value).any()) { ------------------ | Branch (139:9): [True: 3.31k, False: 285k] ------------------ 140| 3.31k| Bits |= FE.Value; 141| 3.31k| SetImpliedBits(Bits, &FE, FeatureTable); 142| 3.31k| } 143| 289k| } 144| 7.60k|} _Z16interpretDecimalPKcS0_P11decimalInfo: 277| 6.95k|{ 278| 6.95k| StringRef::iterator dot = end; 279| 6.95k| StringRef::iterator p = skipLeadingZeroesAndAnyDot (begin, end, &dot); 280| 6.95k| APFloat::opStatus fp; 281| | 282| 6.95k| D->firstSigDigit = p; 283| 6.95k| D->exponent = 0; 284| 6.95k| D->normalizedExponent = 0; 285| | 286| 59.7k| for (; p != end; ++p) { ------------------ | Branch (286:10): [True: 53.4k, False: 6.27k] ------------------ 287| 53.4k| if (*p == '.') { ------------------ | Branch (287:9): [True: 0, False: 53.4k] ------------------ 288| | //assert(dot == end && "String contains multiple dots"); 289| 0| if (dot != end) ------------------ | Branch (289:11): [True: 0, False: 0] ------------------ 290| 0| return APFloat::opInvalidOp; 291| 0| dot = p++; 292| 0| if (p == end) ------------------ | Branch (292:11): [True: 0, False: 0] ------------------ 293| 0| break; 294| 0| } 295| 53.4k| if (decDigitValue(*p) >= 10U) ------------------ | Branch (295:9): [True: 686, False: 52.7k] ------------------ 296| 686| break; 297| 53.4k| } 298| | 299| 6.95k| if (p != end) { ------------------ | Branch (299:7): [True: 686, False: 6.27k] ------------------ 300| | //assert((*p == 'e' || *p == 'E') && "Invalid character in significand"); 301| 686| if (*p != 'e' && *p != 'E') ------------------ | Branch (301:9): [True: 446, False: 240] | Branch (301:22): [True: 0, False: 446] ------------------ 302| 0| return APFloat::opInvalidOp; 303| | //assert(p != begin && "Significand has no digits"); 304| 686| if (p == begin) ------------------ | Branch (304:9): [True: 0, False: 686] ------------------ 305| 0| return APFloat::opInvalidOp; 306| | //assert((dot == end || p - begin != 1) && "Significand has no digits"); 307| 686| if (dot != end && p - begin == 1) ------------------ | Branch (307:9): [True: 686, False: 0] | Branch (307:23): [True: 0, False: 686] ------------------ 308| 0| return APFloat::opInvalidOp; 309| | 310| | /* p points to the first non-digit in the string */ 311| 686| D->exponent = readExponent(p + 1, end, fp); // qq 312| 686| if (fp) ------------------ | Branch (312:9): [True: 37, False: 649] ------------------ 313| 37| return fp; 314| | 315| | /* Implied decimal point? */ 316| 649| if (dot == end) ------------------ | Branch (316:9): [True: 0, False: 649] ------------------ 317| 0| dot = p; 318| 649| } 319| | 320| | /* If number is all zeroes accept any exponent. */ 321| 6.92k| if (p != D->firstSigDigit) { ------------------ | Branch (321:7): [True: 2.49k, False: 4.42k] ------------------ 322| | /* Drop insignificant trailing zeroes. */ 323| 2.49k| if (p != begin) { ------------------ | Branch (323:9): [True: 2.49k, False: 0] ------------------ 324| 2.49k| do 325| 2.49k| do 326| 4.25k| p--; 327| 4.25k| while (p != begin && *p == '0'); ------------------ | Branch (327:16): [True: 3.70k, False: 552] | Branch (327:30): [True: 1.75k, False: 1.94k] ------------------ 328| 2.49k| while (p != begin && *p == '.'); ------------------ | Branch (328:14): [True: 1.94k, False: 552] | Branch (328:28): [True: 0, False: 1.94k] ------------------ 329| 2.49k| } 330| | 331| | /* Adjust the exponents for any decimal point. */ 332| 2.49k| D->exponent += static_cast((dot - p) - (dot > p)); 333| 2.49k| D->normalizedExponent = (D->exponent + 334| 2.49k| static_cast((p - D->firstSigDigit) 335| 2.49k| - (dot > D->firstSigDigit && dot < p))); ------------------ | Branch (335:42): [True: 959, False: 1.53k] | Branch (335:68): [True: 0, False: 959] ------------------ 336| 2.49k| } 337| | 338| 6.92k| D->lastSigDigit = p; 339| | 340| 6.92k| return APFloat::opOK; 341| 6.95k|} _ZN7llvm_ks7APFloat10initializeEPKNS_12fltSemanticsE: 614| 13.6k|{ 615| 13.6k| unsigned int count; 616| | 617| 13.6k| semantics = ourSemantics; 618| 13.6k| count = partCount(); 619| 13.6k| if (count > 1) ------------------ | Branch (619:7): [True: 420, False: 13.2k] ------------------ 620| 420| significand.parts = new integerPart[count]; 621| 13.6k|} _ZN7llvm_ks7APFloat15freeSignificandEv: 625| 14.2k|{ 626| 14.2k| if (needsCleanup()) ------------------ | Branch (626:7): [True: 420, False: 13.8k] ------------------ 627| 420| delete [] significand.parts; 628| 14.2k|} _ZN7llvm_ks7APFloat7makeNaNEbbPKNS_5APIntE: 656| 329|{ 657| 329| category = fcNaN; 658| 329| sign = Negative; 659| | 660| 329| integerPart *significand = significandParts(); 661| 329| unsigned numParts = partCount(); 662| | 663| | // Set the significand bits to the fill. 664| 329| if (!fill || fill->getNumWords() < numParts) ------------------ | Branch (664:7): [True: 0, False: 329] | Branch (664:16): [True: 0, False: 329] ------------------ 665| 0| APInt::tcSet(significand, 0, numParts); 666| 329| if (fill) { ------------------ | Branch (666:7): [True: 329, False: 0] ------------------ 667| 329| APInt::tcAssign(significand, fill->getRawData(), 668| 329| std::min(fill->getNumWords(), numParts)); 669| | 670| | // Zero out the excess bits of the significand. 671| 329| unsigned bitsToPreserve = semantics->precision - 1; 672| 329| unsigned part = bitsToPreserve / 64; 673| 329| bitsToPreserve %= 64; 674| 329| significand[part] &= ((1ULL << bitsToPreserve) - 1); 675| 329| for (part++; part != numParts; ++part) ------------------ | Branch (675:18): [True: 0, False: 329] ------------------ 676| 0| significand[part] = 0; 677| 329| } 678| | 679| 329| unsigned QNaNBit = semantics->precision - 2; 680| | 681| 329| if (SNaN) { ------------------ | Branch (681:7): [True: 0, False: 329] ------------------ 682| | // We always have to clear the QNaN bit to make it an SNaN. 683| 0| APInt::tcClearBit(significand, QNaNBit); 684| | 685| | // If there are no bits set in the payload, we have to set 686| | // *something* to make it a NaN instead of an infinity; 687| | // conventionally, this is the next bit down from the QNaN bit. 688| 0| if (APInt::tcIsZero(significand, numParts)) ------------------ | Branch (688:9): [True: 0, False: 0] ------------------ 689| 0| APInt::tcSetBit(significand, QNaNBit - 1); 690| 329| } else { 691| | // We always have to set the QNaN bit to make it a QNaN. 692| 329| APInt::tcSetBit(significand, QNaNBit); 693| 329| } 694| | 695| | // For x87 extended precision, we want to make a NaN, not a 696| | // pseudo-NaN. Maybe we should expose the ability to make 697| | // pseudo-NaNs? 698| 329| if (semantics == &APFloat::x87DoubleExtended) ------------------ | Branch (698:7): [True: 0, False: 329] ------------------ 699| 0| APInt::tcSetBit(significand, QNaNBit + 1); 700| 329|} _ZN7llvm_ks7APFloat7makeNaNERKNS_12fltSemanticsEbbPKNS_5APIntE: 703| 329| const APInt *fill) { 704| 329| APFloat value(Sem, uninitialized); 705| 329| value.makeNaN(SNaN, Negative, fill); 706| 329| return value; 707| 329|} _ZN7llvm_ks7APFloataSEOS0_: 724| 564|APFloat::operator=(APFloat &&rhs) { 725| 564| freeSignificand(); 726| | 727| 564| semantics = rhs.semantics; 728| 564| significand = rhs.significand; 729| 564| exponent = rhs.exponent; 730| 564| category = rhs.category; 731| 564| sign = rhs.sign; 732| | 733| 564| rhs.semantics = &Bogus; 734| 564| return *this; 735| 564|} _ZN7llvm_ks7APFloatC2ERKNS_12fltSemanticsE: 842| 5.07k|APFloat::APFloat(const fltSemantics &ourSemantics) { 843| 5.07k| initialize(&ourSemantics); 844| 5.07k| category = fcZero; 845| 5.07k| sign = false; 846| 5.07k|} _ZN7llvm_ks7APFloatC2ERKNS_12fltSemanticsENS0_16uninitializedTagE: 848| 3.10k|APFloat::APFloat(const fltSemantics &ourSemantics, uninitializedTag tag) { 849| | // Allocates storage if necessary but does not initialize it. 850| 3.10k| initialize(&ourSemantics); 851| 3.10k|} _ZN7llvm_ks7APFloatC2ERKNS_12fltSemanticsENS_9StringRefE: 853| 5.50k|APFloat::APFloat(const fltSemantics &ourSemantics, StringRef text) { 854| 5.50k| initialize(&ourSemantics); 855| 5.50k| convertFromString(text, rmNearestTiesToEven); 856| 5.50k|} _ZN7llvm_ks7APFloatD2Ev: 868| 13.6k|{ 869| 13.6k| freeSignificand(); 870| 13.6k|} _ZNK7llvm_ks7APFloat9partCountEv: 879| 116k|{ 880| 116k| return partCountForBits(semantics->precision + 1); 881| 116k|} _ZNK7llvm_ks7APFloat16significandPartsEv: 906| 15.0k|{ 907| 15.0k| return const_cast(this)->significandParts(); 908| 15.0k|} _ZN7llvm_ks7APFloat16significandPartsEv: 912| 48.8k|{ 913| 48.8k| if (partCount() > 1) ------------------ | Branch (913:7): [True: 2.50k, False: 46.3k] ------------------ 914| 2.50k| return significand.parts; 915| 46.3k| else 916| 46.3k| return &significand.part; 917| 48.8k|} _ZN7llvm_ks7APFloat15zeroSignificandEv: 921| 423|{ 922| 423| APInt::tcSet(significandParts(), 0, partCount()); 923| 423|} _ZN7llvm_ks7APFloat20incrementSignificandEv: 928| 1.60k|{ 929| 1.60k| integerPart carry; 930| | 931| 1.60k| carry = APInt::tcIncrement(significandParts(), partCount()); 932| | 933| | /* Our callers should never cause us to overflow. */ 934| 1.60k| assert(carry == 0); ------------------ | Branch (934:3): [True: 1.60k, False: 0] ------------------ 935| 1.60k| (void)carry; 936| 1.60k|} _ZN7llvm_ks7APFloat19multiplySignificandERKS0_PS1_: 973| 1.11k|{ 974| 1.11k| unsigned int omsb; // One, not zero, based MSB. 975| 1.11k| unsigned int partsCount, newPartsCount, precision; 976| 1.11k| integerPart *lhsSignificand; 977| 1.11k| integerPart scratch[4]; 978| 1.11k| integerPart *fullSignificand; 979| 1.11k| lostFraction lost_fraction; 980| 1.11k| bool ignored; 981| | 982| 1.11k| assert(semantics == rhs.semantics); ------------------ | Branch (982:3): [True: 1.11k, False: 0] ------------------ 983| | 984| 1.11k| precision = semantics->precision; 985| | 986| | // Allocate space for twice as many bits as the original significand, plus one 987| | // extra bit for the addition to overflow into. 988| 1.11k| newPartsCount = partCountForBits(precision * 2 + 1); 989| | 990| 1.11k| if (newPartsCount > 4) ------------------ | Branch (990:7): [True: 0, False: 1.11k] ------------------ 991| 0| fullSignificand = new integerPart[newPartsCount]; 992| 1.11k| else 993| 1.11k| fullSignificand = scratch; 994| | 995| 1.11k| lhsSignificand = significandParts(); 996| 1.11k| partsCount = partCount(); 997| | 998| 1.11k| APInt::tcFullMultiply(fullSignificand, lhsSignificand, 999| 1.11k| rhs.significandParts(), partsCount, partsCount); 1000| | 1001| 1.11k| lost_fraction = lfExactlyZero; 1002| 1.11k| omsb = APInt::tcMSB(fullSignificand, newPartsCount) + 1; 1003| 1.11k| exponent += rhs.exponent; 1004| | 1005| | // Assume the operands involved in the multiplication are single-precision 1006| | // FP, and the two multiplicants are: 1007| | // *this = a23 . a22 ... a0 * 2^e1 1008| | // rhs = b23 . b22 ... b0 * 2^e2 1009| | // the result of multiplication is: 1010| | // *this = c48 c47 c46 . c45 ... c0 * 2^(e1+e2) 1011| | // Note that there are three significant bits at the left-hand side of the 1012| | // radix point: two for the multiplication, and an overflow bit for the 1013| | // addition (that will always be zero at this point). Move the radix point 1014| | // toward left by two bits, and adjust exponent accordingly. 1015| 1.11k| exponent += 2; 1016| | 1017| 1.11k| if (addend && addend->isNonZero()) { ------------------ | Branch (1017:7): [True: 0, False: 1.11k] | Branch (1017:17): [True: 0, False: 0] ------------------ 1018| | // The intermediate result of the multiplication has "2 * precision" 1019| | // signicant bit; adjust the addend to be consistent with mul result. 1020| | // 1021| 0| Significand savedSignificand = significand; 1022| 0| const fltSemantics *savedSemantics = semantics; 1023| 0| fltSemantics extendedSemantics; 1024| 0| opStatus status; 1025| 0| unsigned int extendedPrecision; 1026| | 1027| | // Normalize our MSB to one below the top bit to allow for overflow. 1028| 0| extendedPrecision = 2 * precision + 1; 1029| 0| if (omsb != extendedPrecision - 1) { ------------------ | Branch (1029:9): [True: 0, False: 0] ------------------ 1030| 0| assert(extendedPrecision > omsb); ------------------ | Branch (1030:7): [True: 0, False: 0] ------------------ 1031| 0| APInt::tcShiftLeft(fullSignificand, newPartsCount, 1032| 0| (extendedPrecision - 1) - omsb); 1033| 0| exponent -= (extendedPrecision - 1) - omsb; 1034| 0| } 1035| | 1036| | /* Create new semantics. */ 1037| 0| extendedSemantics = *semantics; 1038| 0| extendedSemantics.precision = extendedPrecision; 1039| | 1040| 0| if (newPartsCount == 1) ------------------ | Branch (1040:9): [True: 0, False: 0] ------------------ 1041| 0| significand.part = fullSignificand[0]; 1042| 0| else 1043| 0| significand.parts = fullSignificand; 1044| 0| semantics = &extendedSemantics; 1045| | 1046| 0| APFloat extendedAddend(*addend); 1047| 0| status = extendedAddend.convert(extendedSemantics, rmTowardZero, &ignored); 1048| 0| assert(status == opOK); ------------------ | Branch (1048:5): [True: 0, False: 0] ------------------ 1049| 0| (void)status; 1050| | 1051| | // Shift the significand of the addend right by one bit. This guarantees 1052| | // that the high bit of the significand is zero (same as fullSignificand), 1053| | // so the addition will overflow (if it does overflow at all) into the top bit. 1054| 0| lost_fraction = extendedAddend.shiftSignificandRight(1); 1055| 0| assert(lost_fraction == lfExactlyZero && ------------------ | Branch (1055:5): [True: 0, False: 0] | Branch (1055:5): [True: 0, Folded] | Branch (1055:5): [True: 0, False: 0] ------------------ 1056| 0| "Lost precision while shifting addend for fused-multiply-add."); 1057| | 1058| 0| lost_fraction = addOrSubtractSignificand(extendedAddend, false); 1059| | 1060| | /* Restore our state. */ 1061| 0| if (newPartsCount == 1) ------------------ | Branch (1061:9): [True: 0, False: 0] ------------------ 1062| 0| fullSignificand[0] = significand.part; 1063| 0| significand = savedSignificand; 1064| 0| semantics = savedSemantics; 1065| | 1066| 0| omsb = APInt::tcMSB(fullSignificand, newPartsCount) + 1; 1067| 0| } 1068| | 1069| | // Convert the result having "2 * precision" significant-bits back to the one 1070| | // having "precision" significant-bits. First, move the radix point from 1071| | // poision "2*precision - 1" to "precision - 1". The exponent need to be 1072| | // adjusted by "2*precision - 1" - "precision - 1" = "precision". 1073| 1.11k| exponent -= precision + 1; 1074| | 1075| | // In case MSB resides at the left-hand side of radix point, shift the 1076| | // mantissa right by some amount to make sure the MSB reside right before 1077| | // the radix point (i.e. "MSB . rest-significant-bits"). 1078| | // 1079| | // Note that the result is not normalized when "omsb < precision". So, the 1080| | // caller needs to call APFloat::normalize() if normalized value is expected. 1081| 1.11k| if (omsb > precision) { ------------------ | Branch (1081:7): [True: 1.11k, False: 0] ------------------ 1082| 1.11k| unsigned int bits, significantParts; 1083| 1.11k| lostFraction lf; 1084| | 1085| 1.11k| bits = omsb - precision; 1086| 1.11k| significantParts = partCountForBits(omsb); 1087| 1.11k| lf = shiftRight(fullSignificand, significantParts, bits); 1088| 1.11k| lost_fraction = combineLostFractions(lf, lost_fraction); 1089| 1.11k| exponent += bits; 1090| 1.11k| } 1091| | 1092| 1.11k| APInt::tcAssign(lhsSignificand, fullSignificand, partsCount); 1093| | 1094| 1.11k| if (newPartsCount > 4) ------------------ | Branch (1094:7): [True: 0, False: 1.11k] ------------------ 1095| 0| delete [] fullSignificand; 1096| | 1097| 1.11k| return lost_fraction; 1098| 1.11k|} _ZN7llvm_ks7APFloat17divideSignificandERKS0_: 1103| 1.42k|{ 1104| 1.42k| unsigned int bit, i, partsCount; 1105| 1.42k| const integerPart *rhsSignificand; 1106| 1.42k| integerPart *lhsSignificand, *dividend, *divisor; 1107| 1.42k| integerPart scratch[4]; 1108| 1.42k| lostFraction lost_fraction; 1109| | 1110| 1.42k| assert(semantics == rhs.semantics); ------------------ | Branch (1110:3): [True: 1.42k, False: 0] ------------------ 1111| | 1112| 1.42k| lhsSignificand = significandParts(); 1113| 1.42k| rhsSignificand = rhs.significandParts(); 1114| 1.42k| partsCount = partCount(); 1115| | 1116| 1.42k| if (partsCount > 2) ------------------ | Branch (1116:7): [True: 160, False: 1.26k] ------------------ 1117| 160| dividend = new integerPart[partsCount * 2]; 1118| 1.26k| else 1119| 1.26k| dividend = scratch; 1120| | 1121| 1.42k| divisor = dividend + partsCount; 1122| | 1123| | /* Copy the dividend and divisor as they will be modified in-place. */ 1124| 6.90k| for (i = 0; i < partsCount; i++) { ------------------ | Branch (1124:15): [True: 5.48k, False: 1.42k] ------------------ 1125| 5.48k| dividend[i] = lhsSignificand[i]; 1126| 5.48k| divisor[i] = rhsSignificand[i]; 1127| 5.48k| lhsSignificand[i] = 0; 1128| 5.48k| } 1129| | 1130| 1.42k| exponent -= rhs.exponent; 1131| | 1132| 1.42k| unsigned int precision = semantics->precision; 1133| | 1134| | /* Normalize the divisor. */ 1135| 1.42k| bit = precision - APInt::tcMSB(divisor, partsCount) - 1; 1136| 1.42k| if (bit) { ------------------ | Branch (1136:7): [True: 0, False: 1.42k] ------------------ 1137| 0| exponent += bit; 1138| 0| APInt::tcShiftLeft(divisor, partsCount, bit); 1139| 0| } 1140| | 1141| | /* Normalize the dividend. */ 1142| 1.42k| bit = precision - APInt::tcMSB(dividend, partsCount) - 1; 1143| 1.42k| if (bit) { ------------------ | Branch (1143:7): [True: 0, False: 1.42k] ------------------ 1144| 0| exponent -= bit; 1145| 0| APInt::tcShiftLeft(dividend, partsCount, bit); 1146| 0| } 1147| | 1148| | /* Ensure the dividend >= divisor initially for the loop below. 1149| | Incidentally, this means that the division loop below is 1150| | guaranteed to set the integer bit to one. */ 1151| 1.42k| if (APInt::tcCompare(dividend, divisor, partsCount) < 0) { ------------------ | Branch (1151:7): [True: 964, False: 459] ------------------ 1152| 964| exponent--; 1153| 964| APInt::tcShiftLeft(dividend, partsCount, 1); 1154| 964| assert(APInt::tcCompare(dividend, divisor, partsCount) >= 0); ------------------ | Branch (1154:5): [True: 964, False: 0] ------------------ 1155| 964| } 1156| | 1157| | /* Long division. */ 1158| 351k| for (bit = precision; bit; bit -= 1) { ------------------ | Branch (1158:25): [True: 349k, False: 1.42k] ------------------ 1159| 349k| if (APInt::tcCompare(dividend, divisor, partsCount) >= 0) { ------------------ | Branch (1159:9): [True: 188k, False: 161k] ------------------ 1160| 188k| APInt::tcSubtract(dividend, divisor, 0, partsCount); 1161| 188k| APInt::tcSetBit(lhsSignificand, bit - 1); 1162| 188k| } 1163| | 1164| 349k| APInt::tcShiftLeft(dividend, partsCount, 1); 1165| 349k| } 1166| | 1167| | /* Figure out the lost fraction. */ 1168| 1.42k| int cmp = APInt::tcCompare(dividend, divisor, partsCount); 1169| | 1170| 1.42k| if (cmp > 0) ------------------ | Branch (1170:7): [True: 425, False: 998] ------------------ 1171| 425| lost_fraction = lfMoreThanHalf; 1172| 998| else if (cmp == 0) ------------------ | Branch (1172:12): [True: 0, False: 998] ------------------ 1173| 0| lost_fraction = lfExactlyHalf; 1174| 998| else if (APInt::tcIsZero(dividend, partsCount)) ------------------ | Branch (1174:12): [True: 17, False: 981] ------------------ 1175| 17| lost_fraction = lfExactlyZero; 1176| 981| else 1177| 981| lost_fraction = lfLessThanHalf; 1178| | 1179| 1.42k| if (partsCount > 2) ------------------ | Branch (1179:7): [True: 160, False: 1.26k] ------------------ 1180| 160| delete [] dividend; 1181| | 1182| 1.42k| return lost_fraction; 1183| 1.42k|} _ZNK7llvm_ks7APFloat14significandMSBEv: 1187| 9.42k|{ 1188| 9.42k| return APInt::tcMSB(significandParts(), partCount()); 1189| 9.42k|} _ZN7llvm_ks7APFloat21shiftSignificandRightEj: 1200| 330|{ 1201| | /* Our exponent should not overflow. */ 1202| 330| assert((ExponentType) (exponent + bits) >= exponent); ------------------ | Branch (1202:3): [True: 330, False: 0] ------------------ 1203| | 1204| 330| exponent += bits; 1205| | 1206| 330| return shiftRight(significandParts(), partCount(), bits); 1207| 330|} _ZN7llvm_ks7APFloat20shiftSignificandLeftEj: 1212| 4.22k|{ 1213| 4.22k| assert(bits < semantics->precision); ------------------ | Branch (1213:3): [True: 4.22k, False: 0] ------------------ 1214| | 1215| 4.22k| if (bits) { ------------------ | Branch (1215:7): [True: 4.22k, False: 0] ------------------ 1216| 4.22k| unsigned int partsCount = partCount(); 1217| | 1218| 4.22k| APInt::tcShiftLeft(significandParts(), partsCount, bits); 1219| 4.22k| exponent -= bits; 1220| | 1221| | assert(!APInt::tcIsZero(significandParts(), partsCount)); ------------------ | Branch (1221:5): [True: 4.22k, False: 0] ------------------ 1222| 4.22k| } 1223| 4.22k|} _ZN7llvm_ks7APFloat14handleOverflowENS0_12roundingModeE: 1254| 69|{ 1255| | /* Infinity? */ 1256| 69| if (rounding_mode == rmNearestTiesToEven || ------------------ | Branch (1256:7): [True: 69, False: 0] ------------------ 1257| 0| rounding_mode == rmNearestTiesToAway || ------------------ | Branch (1257:7): [True: 0, False: 0] ------------------ 1258| 0| (rounding_mode == rmTowardPositive && !sign) || ------------------ | Branch (1258:8): [True: 0, False: 0] | Branch (1258:45): [True: 0, False: 0] ------------------ 1259| 69| (rounding_mode == rmTowardNegative && sign)) { ------------------ | Branch (1259:8): [True: 0, False: 0] | Branch (1259:45): [True: 0, False: 0] ------------------ 1260| 69| category = fcInfinity; 1261| 69| return (opStatus) (opOverflow | opInexact); 1262| 69| } 1263| | 1264| | /* Otherwise we become the largest finite number. */ 1265| 0| category = fcNormal; 1266| 0| exponent = semantics->maxExponent; 1267| 0| APInt::tcSetLeastSignificantBits(significandParts(), partCount(), 1268| 0| semantics->precision); 1269| | 1270| 0| return opInexact; 1271| 69|} _ZNK7llvm_ks7APFloat17roundAwayFromZeroENS0_12roundingModeENS_12lostFractionEj: 1282| 2.56k|{ 1283| | /* NaNs and infinities should not have lost fractions. */ 1284| 2.56k| assert(isFiniteNonZero() || category == fcZero); ------------------ | Branch (1284:3): [True: 2.56k, False: 0] | Branch (1284:3): [True: 0, False: 0] | Branch (1284:3): [True: 2.56k, False: 0] ------------------ 1285| | 1286| | /* Current callers never pass this so we don't handle it. */ 1287| 2.56k| assert(lost_fraction != lfExactlyZero); ------------------ | Branch (1287:3): [True: 2.56k, False: 0] ------------------ 1288| | 1289| 2.56k| switch (rounding_mode) { ------------------ | Branch (1289:11): [True: 2.56k, False: 0] ------------------ 1290| 0| case rmNearestTiesToAway: ------------------ | Branch (1290:3): [True: 0, False: 2.56k] ------------------ 1291| 0| return lost_fraction == lfExactlyHalf || lost_fraction == lfMoreThanHalf; ------------------ | Branch (1291:12): [True: 0, False: 0] | Branch (1291:46): [True: 0, False: 0] ------------------ 1292| | 1293| 2.56k| case rmNearestTiesToEven: ------------------ | Branch (1293:3): [True: 2.56k, False: 0] ------------------ 1294| 2.56k| if (lost_fraction == lfMoreThanHalf) ------------------ | Branch (1294:9): [True: 1.51k, False: 1.05k] ------------------ 1295| 1.51k| return true; 1296| | 1297| | /* Our zeroes don't have a significand to test. */ 1298| 1.05k| if (lost_fraction == lfExactlyHalf && category != fcZero) ------------------ | Branch (1298:9): [True: 97, False: 955] | Branch (1298:43): [True: 97, False: 0] ------------------ 1299| 97| return APInt::tcExtractBit(significandParts(), bit); 1300| | 1301| 955| return false; 1302| | 1303| 0| case rmTowardZero: ------------------ | Branch (1303:3): [True: 0, False: 2.56k] ------------------ 1304| 0| return false; 1305| | 1306| 0| case rmTowardPositive: ------------------ | Branch (1306:3): [True: 0, False: 2.56k] ------------------ 1307| 0| return !sign; 1308| | 1309| 0| case rmTowardNegative: ------------------ | Branch (1309:3): [True: 0, False: 2.56k] ------------------ 1310| 0| return sign; 1311| 2.56k| } 1312| 0| llvm_unreachable("Invalid rounding mode found"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ 1313| 2.56k|} _ZN7llvm_ks7APFloat9normalizeENS0_12roundingModeENS_12lostFractionE: 1318| 7.82k|{ 1319| 7.82k| unsigned int omsb; /* One, not zero, based MSB. */ 1320| 7.82k| int exponentChange; 1321| | 1322| 7.82k| if (!isFiniteNonZero()) ------------------ | Branch (1322:7): [True: 0, False: 7.82k] ------------------ 1323| 0| return opOK; 1324| | 1325| | /* Before rounding normalize the exponent of fcNormal numbers. */ 1326| 7.82k| omsb = significandMSB() + 1; 1327| | 1328| 7.82k| if (omsb) { ------------------ | Branch (1328:7): [True: 7.68k, False: 132] ------------------ 1329| | /* OMSB is numbered from 1. We want to place it in the integer 1330| | bit numbered PRECISION if possible, with a compensating change in 1331| | the exponent. */ 1332| 7.68k| exponentChange = omsb - semantics->precision; 1333| | 1334| | /* If the resulting exponent is too high, overflow according to 1335| | the rounding mode. */ 1336| 7.68k| if (exponent + exponentChange > semantics->maxExponent) ------------------ | Branch (1336:9): [True: 33, False: 7.65k] ------------------ 1337| 33| return handleOverflow(rounding_mode); 1338| | 1339| | /* Subnormal numbers have exponent minExponent, and their MSB 1340| | is forced based on that. */ 1341| 7.65k| if (exponent + exponentChange < semantics->minExponent) ------------------ | Branch (1341:9): [True: 10, False: 7.64k] ------------------ 1342| 10| exponentChange = semantics->minExponent - exponent; 1343| | 1344| | /* Shifting left is easy as we don't lose precision. */ 1345| 7.65k| if (exponentChange < 0) { ------------------ | Branch (1345:9): [True: 4.22k, False: 3.43k] ------------------ 1346| 4.22k| assert(lost_fraction == lfExactlyZero); ------------------ | Branch (1346:7): [True: 4.22k, False: 0] ------------------ 1347| | 1348| 4.22k| shiftSignificandLeft(-exponentChange); 1349| | 1350| 4.22k| return opOK; 1351| 4.22k| } 1352| | 1353| 3.43k| if (exponentChange > 0) { ------------------ | Branch (1353:9): [True: 258, False: 3.17k] ------------------ 1354| 258| lostFraction lf; 1355| | 1356| | /* Shift right and capture any new lost fraction. */ 1357| 258| lf = shiftSignificandRight(exponentChange); 1358| | 1359| 258| lost_fraction = combineLostFractions(lf, lost_fraction); 1360| | 1361| | /* Keep OMSB up-to-date. */ 1362| 258| if (omsb > (unsigned) exponentChange) ------------------ | Branch (1362:11): [True: 258, False: 0] ------------------ 1363| 258| omsb -= exponentChange; 1364| 0| else 1365| 0| omsb = 0; 1366| 258| } 1367| 3.43k| } 1368| | 1369| | /* Now round the number according to rounding_mode given the lost 1370| | fraction. */ 1371| | 1372| | /* As specified in IEEE 754, since we do not trap we do not report 1373| | underflow for exact results. */ 1374| 3.56k| if (lost_fraction == lfExactlyZero) { ------------------ | Branch (1374:7): [True: 999, False: 2.56k] ------------------ 1375| | /* Canonicalize zeroes. */ 1376| 999| if (omsb == 0) ------------------ | Branch (1376:9): [True: 1, False: 998] ------------------ 1377| 1| category = fcZero; 1378| | 1379| 999| return opOK; 1380| 999| } 1381| | 1382| | /* Increment the significand if we're rounding away from zero. */ 1383| 2.56k| if (roundAwayFromZero(rounding_mode, lost_fraction, 0)) { ------------------ | Branch (1383:7): [True: 1.60k, False: 960] ------------------ 1384| 1.60k| if (omsb == 0) ------------------ | Branch (1384:9): [True: 0, False: 1.60k] ------------------ 1385| 0| exponent = semantics->minExponent; 1386| | 1387| 1.60k| incrementSignificand(); 1388| 1.60k| omsb = significandMSB() + 1; 1389| | 1390| | /* Did the significand increment overflow? */ 1391| 1.60k| if (omsb == (unsigned) semantics->precision + 1) { ------------------ | Branch (1391:9): [True: 72, False: 1.53k] ------------------ 1392| | /* Renormalize by incrementing the exponent and shifting our 1393| | significand right one. However if we already have the 1394| | maximum exponent we overflow to infinity. */ 1395| 72| if (exponent == semantics->maxExponent) { ------------------ | Branch (1395:11): [True: 0, False: 72] ------------------ 1396| 0| category = fcInfinity; 1397| | 1398| 0| return (opStatus) (opOverflow | opInexact); 1399| 0| } 1400| | 1401| 72| shiftSignificandRight(1); 1402| | 1403| 72| return opInexact; 1404| 72| } 1405| 1.60k| } 1406| | 1407| | /* The normal case - we were and are not denormal, and any 1408| | significand increment above didn't overflow. */ 1409| 2.49k| if (omsb == semantics->precision) ------------------ | Branch (1409:7): [True: 2.35k, False: 141] ------------------ 1410| 2.35k| return opInexact; 1411| | 1412| | /* We have a non-zero denormal. */ 1413| 2.49k| assert(omsb < semantics->precision); ------------------ | Branch (1413:3): [True: 141, False: 0] ------------------ 1414| | 1415| | /* Canonicalize zeroes. */ 1416| 141| if (omsb == 0) ------------------ | Branch (1416:7): [True: 131, False: 10] ------------------ 1417| 131| category = fcZero; 1418| | 1419| | /* The fcZero case is a denormal that underflowed to zero. */ 1420| 141| return (opStatus) (opUnderflow | opInexact); 1421| 141|} _ZN7llvm_ks7APFloat10changeSignEv: 1677| 871|{ 1678| | /* Look mummy, this one's easy. */ 1679| 871| sign = !sign; 1680| 871|} _ZN7llvm_ks7APFloat24convertFromUnsignedPartsEPKmjNS0_12roundingModeE: 2297| 5.07k|{ 2298| 5.07k| unsigned int omsb, precision, dstCount; 2299| 5.07k| integerPart *dst; 2300| 5.07k| lostFraction lost_fraction; 2301| | 2302| 5.07k| category = fcNormal; 2303| 5.07k| omsb = APInt::tcMSB(src, srcCount) + 1; 2304| 5.07k| dst = significandParts(); 2305| 5.07k| dstCount = partCount(); 2306| 5.07k| precision = semantics->precision; 2307| | 2308| | /* We want the most significant PRECISION bits of SRC. There may not 2309| | be that many; extract what we can. */ 2310| 5.07k| if (precision <= omsb) { ------------------ | Branch (2310:7): [True: 848, False: 4.22k] ------------------ 2311| 848| exponent = omsb - 1; 2312| 848| lost_fraction = lostFractionThroughTruncation(src, srcCount, 2313| 848| omsb - precision); 2314| 848| APInt::tcExtract(dst, dstCount, src, precision, omsb - precision); 2315| 4.22k| } else { 2316| 4.22k| exponent = precision - 1; 2317| 4.22k| lost_fraction = lfExactlyZero; 2318| 4.22k| APInt::tcExtract(dst, dstCount, src, omsb, 0); 2319| 4.22k| } 2320| | 2321| 5.07k| return normalize(rounding_mode, lost_fraction); 2322| 5.07k|} _ZN7llvm_ks7APFloat28convertFromHexadecimalStringENS_9StringRefENS0_12roundingModeE: 2391| 292|{ 2392| 292| lostFraction lost_fraction = lfExactlyZero; 2393| | 2394| 292| category = fcNormal; 2395| 292| zeroSignificand(); 2396| 292| exponent = 0; 2397| | 2398| 292| integerPart *significand = significandParts(); 2399| 292| unsigned partsCount = partCount(); 2400| 292| unsigned bitPos = partsCount * integerPartWidth; 2401| 292| bool computedTrailingFraction = false; 2402| | 2403| | // Skip leading zeroes and any (hexa)decimal point. 2404| 292| StringRef::iterator begin = s.begin(); 2405| 292| StringRef::iterator end = s.end(); 2406| 292| StringRef::iterator dot; 2407| 292| StringRef::iterator p = skipLeadingZeroesAndAnyDot(begin, end, &dot); 2408| 292| StringRef::iterator firstSignificantDigit = p; 2409| | 2410| 6.89k| while (p != end) { ------------------ | Branch (2410:10): [True: 6.89k, False: 0] ------------------ 2411| 6.89k| integerPart hex_value; 2412| | 2413| 6.89k| if (*p == '.') { ------------------ | Branch (2413:9): [True: 50, False: 6.84k] ------------------ 2414| 50| assert(dot == end && "String contains multiple dots"); ------------------ | Branch (2414:7): [True: 50, False: 0] | Branch (2414:7): [True: 50, Folded] | Branch (2414:7): [True: 50, False: 0] ------------------ 2415| 50| dot = p++; 2416| 50| continue; 2417| 50| } 2418| | 2419| 6.84k| hex_value = hexDigitValue(*p); 2420| 6.84k| if (hex_value == -1U) ------------------ | Branch (2420:9): [True: 292, False: 6.55k] ------------------ 2421| 292| break; 2422| | 2423| 6.55k| p++; 2424| | 2425| | // Store the number while we have space. 2426| 6.55k| if (bitPos) { ------------------ | Branch (2426:9): [True: 3.86k, False: 2.68k] ------------------ 2427| 3.86k| bitPos -= 4; 2428| 3.86k| hex_value <<= bitPos % integerPartWidth; 2429| 3.86k| significand[bitPos / integerPartWidth] |= hex_value; 2430| 3.86k| } else if (!computedTrailingFraction) { ------------------ | Branch (2430:16): [True: 149, False: 2.53k] ------------------ 2431| 149| lost_fraction = trailingHexadecimalFraction(p, end, hex_value); 2432| 149| computedTrailingFraction = true; 2433| 149| } 2434| 6.55k| } 2435| | 2436| | /* Hex floats require an exponent but not a hexadecimal point. */ 2437| 292| assert(p != end && "Hex strings require an exponent"); ------------------ | Branch (2437:3): [True: 292, False: 0] | Branch (2437:3): [True: 292, Folded] | Branch (2437:3): [True: 292, False: 0] ------------------ 2438| 292| assert((*p == 'p' || *p == 'P') && "Invalid character in significand"); ------------------ | Branch (2438:3): [True: 138, False: 154] | Branch (2438:3): [True: 154, False: 0] | Branch (2438:3): [True: 292, Folded] | Branch (2438:3): [True: 292, False: 0] ------------------ 2439| 292| assert(p != begin && "Significand has no digits"); ------------------ | Branch (2439:3): [True: 292, False: 0] | Branch (2439:3): [True: 292, Folded] | Branch (2439:3): [True: 292, False: 0] ------------------ 2440| 292| assert((dot == end || p - begin != 1) && "Significand has no digits"); ------------------ | Branch (2440:3): [True: 216, False: 76] | Branch (2440:3): [True: 76, False: 0] | Branch (2440:3): [True: 292, Folded] | Branch (2440:3): [True: 292, False: 0] ------------------ 2441| | 2442| | /* Ignore the exponent if we are zero. */ 2443| 292| if (p != firstSignificantDigit) { ------------------ | Branch (2443:7): [True: 291, False: 1] ------------------ 2444| 291| int expAdjustment; 2445| | 2446| | /* Implicit hexadecimal point? */ 2447| 291| if (dot == end) ------------------ | Branch (2447:9): [True: 216, False: 75] ------------------ 2448| 216| dot = p; 2449| | 2450| | /* Calculate the exponent adjustment implicit in the number of 2451| | significant digits. */ 2452| 291| expAdjustment = static_cast(dot - firstSignificantDigit); 2453| 291| if (expAdjustment < 0) ------------------ | Branch (2453:9): [True: 25, False: 266] ------------------ 2454| 25| expAdjustment++; 2455| 291| expAdjustment = expAdjustment * 4 - 1; 2456| | 2457| | /* Adjust for writing the significand starting at the most 2458| | significant nibble. */ 2459| 291| expAdjustment += semantics->precision; 2460| 291| expAdjustment -= partsCount * integerPartWidth; 2461| | 2462| | /* Adjust for the given exponent. */ 2463| 291| exponent = totalExponent(p + 1, end, expAdjustment); 2464| 291| } 2465| | 2466| 292| return normalize(rounding_mode, lost_fraction); 2467| 292|} _ZN7llvm_ks7APFloat28roundSignificandWithExponentEPKmjiNS0_12roundingModeE: 2473| 2.32k|{ 2474| 2.32k| unsigned int parts, pow5PartCount; 2475| 2.32k| fltSemantics calcSemantics = { 32767, -32767, 0, 0 }; 2476| 2.32k| integerPart pow5Parts[maxPowerOfFiveParts]; 2477| 2.32k| bool isNearest; 2478| | 2479| 2.32k| isNearest = (rounding_mode == rmNearestTiesToEven || ------------------ | Branch (2479:16): [True: 2.32k, False: 0] ------------------ 2480| 0| rounding_mode == rmNearestTiesToAway); ------------------ | Branch (2480:16): [True: 0, False: 0] ------------------ 2481| | 2482| 2.32k| parts = partCountForBits(semantics->precision + 11); 2483| | 2484| | /* Calculate pow(5, abs(exp)). */ 2485| 2.32k| pow5PartCount = powerOf5(pow5Parts, exp >= 0 ? exp: -exp); ------------------ | Branch (2485:39): [True: 1.11k, False: 1.21k] ------------------ 2486| | 2487| 2.53k| for (;; parts *= 2) { 2488| 2.53k| opStatus sigStatus, powStatus; 2489| 2.53k| unsigned int excessPrecision, truncatedBits; 2490| | 2491| 2.53k| calcSemantics.precision = parts * integerPartWidth - 1; 2492| 2.53k| excessPrecision = calcSemantics.precision - semantics->precision; 2493| 2.53k| truncatedBits = excessPrecision; 2494| | 2495| 2.53k| APFloat decSig = APFloat::getZero(calcSemantics, sign); 2496| 2.53k| APFloat pow5(calcSemantics); 2497| | 2498| 2.53k| sigStatus = decSig.convertFromUnsignedParts(decSigParts, sigPartCount, 2499| 2.53k| rmNearestTiesToEven); 2500| 2.53k| powStatus = pow5.convertFromUnsignedParts(pow5Parts, pow5PartCount, 2501| 2.53k| rmNearestTiesToEven); 2502| | /* Add exp, as 10^n = 5^n * 2^n. */ 2503| 2.53k| decSig.exponent += exp; 2504| | 2505| 2.53k| lostFraction calcLostFraction; 2506| 2.53k| integerPart HUerr, HUdistance; 2507| 2.53k| unsigned int powHUerr; 2508| | 2509| 2.53k| if (exp >= 0) { ------------------ | Branch (2509:9): [True: 1.11k, False: 1.42k] ------------------ 2510| | /* multiplySignificand leaves the precision-th bit set to 1. */ 2511| 1.11k| calcLostFraction = decSig.multiplySignificand(pow5, nullptr); 2512| 1.11k| powHUerr = powStatus != opOK; 2513| 1.42k| } else { 2514| 1.42k| calcLostFraction = decSig.divideSignificand(pow5); 2515| | /* Denormal numbers have less precision. */ 2516| 1.42k| if (decSig.exponent < semantics->minExponent) { ------------------ | Branch (2516:11): [True: 10, False: 1.41k] ------------------ 2517| 10| excessPrecision += (semantics->minExponent - decSig.exponent); 2518| 10| truncatedBits = excessPrecision; 2519| 10| if (excessPrecision > calcSemantics.precision) ------------------ | Branch (2519:13): [True: 0, False: 10] ------------------ 2520| 0| excessPrecision = calcSemantics.precision; 2521| 10| } 2522| | /* Extra half-ulp lost in reciprocal of exponent. */ 2523| 1.42k| powHUerr = (powStatus == opOK && calcLostFraction == lfExactlyZero) ? 0:2; ------------------ | Branch (2523:19): [True: 986, False: 437] | Branch (2523:40): [True: 13, False: 973] ------------------ 2524| 1.42k| } 2525| | 2526| | /* Both multiplySignificand and divideSignificand return the 2527| | result with the integer bit set. */ 2528| 2.53k| assert(APInt::tcExtractBit ------------------ | Branch (2528:5): [True: 2.53k, False: 0] ------------------ 2529| 2.53k| (decSig.significandParts(), calcSemantics.precision - 1) == 1); 2530| | 2531| 2.53k| HUerr = HUerrBound(calcLostFraction != lfExactlyZero, sigStatus != opOK, 2532| 2.53k| powHUerr); 2533| 2.53k| HUdistance = 2 * ulpsFromBoundary(decSig.significandParts(), 2534| 2.53k| excessPrecision, isNearest); 2535| | 2536| | /* Are we guaranteed to round correctly if we truncate? */ 2537| 2.53k| if (HUdistance >= HUerr) { ------------------ | Branch (2537:9): [True: 2.32k, False: 210] ------------------ 2538| 2.32k| APInt::tcExtract(significandParts(), partCount(), decSig.significandParts(), 2539| 2.32k| calcSemantics.precision - excessPrecision, 2540| 2.32k| excessPrecision); 2541| | /* Take the exponent of decSig. If we tcExtract-ed less bits 2542| | above we must adjust our exponent to compensate for the 2543| | implicit right shift. */ 2544| 2.32k| exponent = (decSig.exponent + semantics->precision 2545| 2.32k| - (calcSemantics.precision - excessPrecision)); 2546| 2.32k| calcLostFraction = lostFractionThroughTruncation(decSig.significandParts(), 2547| 2.32k| decSig.partCount(), 2548| 2.32k| truncatedBits); 2549| 2.32k| return normalize(rounding_mode, calcLostFraction); 2550| 2.32k| } 2551| 2.53k| } 2552| 2.32k|} _ZN7llvm_ks7APFloat24convertFromDecimalStringENS_9StringRefENS0_12roundingModeE: 2556| 6.95k|{ 2557| 6.95k| decimalInfo D; 2558| 6.95k| opStatus fs; 2559| | 2560| | /* Scan the text. */ 2561| 6.95k| StringRef::iterator p = str.begin(); 2562| 6.95k| fs = interpretDecimal(p, str.end(), &D); 2563| 6.95k| if (fs != opOK) ------------------ | Branch (2563:7): [True: 37, False: 6.92k] ------------------ 2564| 37| return fs; 2565| | 2566| | /* Handle the quick cases. First the case of no significant digits, 2567| | i.e. zero, and then exponents that are obviously too large or too 2568| | small. Writing L for log 10 / log 2, a number d.ddddd*10^exp 2569| | definitely overflows if 2570| | 2571| | (exp - 1) * L >= maxExponent 2572| | 2573| | and definitely underflows to zero where 2574| | 2575| | (exp + 1) * L <= minExponent - precision 2576| | 2577| | With integer arithmetic the tightest bounds for L are 2578| | 2579| | 93/28 < L < 196/59 [ numerator <= 256 ] 2580| | 42039/12655 < L < 28738/8651 [ numerator <= 65536 ] 2581| | */ 2582| | 2583| | // Test if we have a zero number allowing for strings with no null terminators 2584| | // and zero decimals with non-zero exponents. 2585| | // 2586| | // We computed firstSigDigit by ignoring all zeros and dots. Thus if 2587| | // D->firstSigDigit equals str.end(), every digit must be a zero and there can 2588| | // be at most one dot. On the other hand, if we have a zero with a non-zero 2589| | // exponent, then we know that D.firstSigDigit will be non-numeric. 2590| 6.92k| if (D.firstSigDigit == str.end() || decDigitValue(*D.firstSigDigit) >= 10U) { ------------------ | Branch (2590:7): [True: 4.38k, False: 2.53k] | Branch (2590:39): [True: 40, False: 2.49k] ------------------ 2591| 4.42k| category = fcZero; 2592| 4.42k| fs = opOK; 2593| | 2594| | /* Check whether the normalized exponent is high enough to overflow 2595| | max during the log-rebasing in the max-exponent check below. */ 2596| 4.42k| } else if (D.normalizedExponent - 1 > INT_MAX / 42039) { ------------------ | Branch (2596:14): [True: 0, False: 2.49k] ------------------ 2597| 0| fs = handleOverflow(rounding_mode); 2598| | 2599| | /* If it wasn't, then it also wasn't high enough to overflow max 2600| | during the log-rebasing in the min-exponent check. Check that it 2601| | won't overflow min in either check, then perform the min-exponent 2602| | check. */ 2603| 2.49k| } else if (D.normalizedExponent - 1 < INT_MIN / 42039 || ------------------ | Branch (2603:14): [True: 1, False: 2.49k] ------------------ 2604| 2.49k| (D.normalizedExponent + 1) * 28738 <= ------------------ | Branch (2604:14): [True: 130, False: 2.36k] ------------------ 2605| 2.49k| 8651 * (semantics->minExponent - (int) semantics->precision)) { 2606| | /* Underflow to zero and round. */ 2607| 131| category = fcNormal; 2608| 131| zeroSignificand(); 2609| 131| fs = normalize(rounding_mode, lfLessThanHalf); 2610| | 2611| | /* We can finally safely perform the max-exponent check. */ 2612| 2.36k| } else if ((D.normalizedExponent - 1) * 42039 ------------------ | Branch (2612:14): [True: 36, False: 2.32k] ------------------ 2613| 2.36k| >= 12655 * semantics->maxExponent) { 2614| | /* Overflow and round. */ 2615| 36| fs = handleOverflow(rounding_mode); 2616| 2.32k| } else { 2617| 2.32k| integerPart *decSignificand; 2618| 2.32k| unsigned int partCount; 2619| | 2620| | /* A tight upper bound on number of bits required to hold an 2621| | N-digit decimal integer is N * 196 / 59. Allocate enough space 2622| | to hold the full significand, and an extra part required by 2623| | tcMultiplyPart. */ 2624| 2.32k| partCount = static_cast(D.lastSigDigit - D.firstSigDigit) + 1; 2625| 2.32k| partCount = partCountForBits(1 + 196 * partCount / 59); 2626| 2.32k| decSignificand = new integerPart[partCount + 1]; 2627| 2.32k| partCount = 0; 2628| | 2629| | /* Convert to binary efficiently - we do almost all multiplication 2630| | in an integerPart. When this would overflow do we do a single 2631| | bignum multiplication, and then revert again to multiplication 2632| | in an integerPart. */ 2633| 4.72k| do { 2634| 4.72k| integerPart decValue, val, multiplier; 2635| | 2636| 4.72k| val = 0; 2637| 4.72k| multiplier = 1; 2638| | 2639| 53.0k| do { 2640| 53.0k| if (*p == '.') { ------------------ | Branch (2640:13): [True: 1.36k, False: 51.7k] ------------------ 2641| 1.36k| p++; 2642| 1.36k| if (p == str.end()) { ------------------ | Branch (2642:15): [True: 0, False: 1.36k] ------------------ 2643| 0| break; 2644| 0| } 2645| 1.36k| } 2646| 53.0k| decValue = decDigitValue(*p++); 2647| 53.0k| assert(decValue < 10U && "Invalid character in significand"); ------------------ | Branch (2647:9): [True: 53.0k, False: 0] | Branch (2647:9): [True: 53.0k, Folded] | Branch (2647:9): [True: 53.0k, False: 0] ------------------ 2648| 53.0k| multiplier *= 10; 2649| 53.0k| val = val * 10 + decValue; 2650| | /* The maximum number that can be multiplied by ten with any 2651| | digit added without overflowing an integerPart. */ 2652| 53.0k| } while (p <= D.lastSigDigit && multiplier <= (~ (integerPart) 0 - 9) / 10); ------------------ | Branch (2652:16): [True: 50.7k, False: 2.32k] | Branch (2652:39): [True: 48.3k, False: 2.39k] ------------------ 2653| | 2654| | /* Multiply out the current part. */ 2655| 4.72k| APInt::tcMultiplyPart(decSignificand, decSignificand, multiplier, val, 2656| 4.72k| partCount, partCount + 1, false); 2657| | 2658| | /* If we used another part (likely but not guaranteed), increase 2659| | the count. */ 2660| 4.72k| if (decSignificand[partCount]) ------------------ | Branch (2660:11): [True: 4.63k, False: 85] ------------------ 2661| 4.63k| partCount++; 2662| 4.72k| } while (p <= D.lastSigDigit); ------------------ | Branch (2662:14): [True: 2.39k, False: 2.32k] ------------------ 2663| | 2664| 2.32k| category = fcNormal; 2665| 2.32k| fs = roundSignificandWithExponent(decSignificand, partCount, 2666| 2.32k| D.exponent, rounding_mode); 2667| | 2668| 2.32k| delete [] decSignificand; 2669| 2.32k| } 2670| | 2671| 6.92k| return fs; 2672| 6.92k|} _ZN7llvm_ks7APFloat25convertFromStringSpecialsENS_9StringRefE: 2675| 7.25k|APFloat::convertFromStringSpecials(StringRef str) { 2676| 7.25k| if (str.equals("inf") || str.equals("INFINITY")) { ------------------ | Branch (2676:7): [True: 0, False: 7.25k] | Branch (2676:7): [True: 0, False: 7.25k] | Branch (2676:28): [True: 0, False: 7.25k] ------------------ 2677| 0| makeInf(false); 2678| 0| return true; 2679| 0| } 2680| | 2681| 7.25k| if (str.equals("-inf") || str.equals("-INFINITY")) { ------------------ | Branch (2681:7): [True: 0, False: 7.25k] | Branch (2681:7): [True: 0, False: 7.25k] | Branch (2681:29): [True: 0, False: 7.25k] ------------------ 2682| 0| makeInf(true); 2683| 0| return true; 2684| 0| } 2685| | 2686| 7.25k| if (str.equals("nan") || str.equals("NaN")) { ------------------ | Branch (2686:7): [True: 0, False: 7.25k] | Branch (2686:7): [True: 0, False: 7.25k] | Branch (2686:28): [True: 0, False: 7.25k] ------------------ 2687| 0| makeNaN(false, false); 2688| 0| return true; 2689| 0| } 2690| | 2691| 7.25k| if (str.equals("-nan") || str.equals("-NaN")) { ------------------ | Branch (2691:7): [True: 0, False: 7.25k] | Branch (2691:7): [True: 0, False: 7.25k] | Branch (2691:29): [True: 0, False: 7.25k] ------------------ 2692| 0| makeNaN(false, true); 2693| 0| return true; 2694| 0| } 2695| | 2696| 7.25k| return false; 2697| 7.25k|} _ZN7llvm_ks7APFloat17convertFromStringENS_9StringRefENS0_12roundingModeE: 2701| 7.25k|{ 2702| 7.25k| assert(!str.empty() && "Invalid string length"); ------------------ | Branch (2702:3): [True: 7.25k, False: 0] | Branch (2702:3): [True: 7.25k, Folded] | Branch (2702:3): [True: 7.25k, False: 0] ------------------ 2703| | 2704| | // Handle special cases. 2705| 7.25k| if (convertFromStringSpecials(str)) ------------------ | Branch (2705:7): [True: 0, False: 7.25k] ------------------ 2706| 0| return opOK; 2707| | 2708| | /* Handle a leading minus sign. */ 2709| 7.25k| StringRef::iterator p = str.begin(); 2710| 7.25k| size_t slen = str.size(); 2711| 7.25k| sign = *p == '-' ? 1 : 0; ------------------ | Branch (2711:10): [True: 0, False: 7.25k] ------------------ 2712| 7.25k| if (*p == '-' || *p == '+') { ------------------ | Branch (2712:7): [True: 0, False: 7.25k] | Branch (2712:20): [True: 0, False: 7.25k] ------------------ 2713| 0| p++; 2714| 0| slen--; 2715| 0| assert(slen && "String has no digits"); ------------------ | Branch (2715:5): [True: 0, False: 0] | Branch (2715:5): [True: 0, Folded] | Branch (2715:5): [True: 0, False: 0] ------------------ 2716| 0| } 2717| | 2718| 7.25k| if (slen >= 2 && p[0] == '0' && (p[1] == 'x' || p[1] == 'X')) { ------------------ | Branch (2718:7): [True: 6.56k, False: 690] | Branch (2718:20): [True: 828, False: 5.73k] | Branch (2718:36): [True: 161, False: 667] | Branch (2718:51): [True: 131, False: 536] ------------------ 2719| 292| assert(slen - 2 && "Invalid string"); ------------------ | Branch (2719:5): [True: 292, False: 0] | Branch (2719:5): [True: 292, Folded] | Branch (2719:5): [True: 292, False: 0] ------------------ 2720| 292| return convertFromHexadecimalString(StringRef(p + 2, slen - 2), 2721| 292| rounding_mode); 2722| 292| } 2723| | 2724| 6.95k| return convertFromDecimalString(StringRef(p, slen), rounding_mode); 2725| 7.25k|} _ZNK7llvm_ks7APFloat27convertDoubleAPFloatToAPIntEv: 3048| 5.50k|{ 3049| 5.50k| assert(semantics == (const llvm_ks::fltSemantics*)&IEEEdouble); ------------------ | Branch (3049:3): [True: 5.50k, False: 0] ------------------ 3050| 5.50k| assert(partCount()==1); ------------------ | Branch (3050:3): [True: 5.50k, False: 0] ------------------ 3051| | 3052| 5.50k| uint64_t myexponent, mysignificand; 3053| | 3054| 5.50k| if (isFiniteNonZero()) { ------------------ | Branch (3054:7): [True: 1.43k, False: 4.07k] ------------------ 3055| 1.43k| myexponent = exponent+1023; //bias 3056| 1.43k| mysignificand = *significandParts(); 3057| 1.43k| if (myexponent==1 && !(mysignificand & 0x10000000000000LL)) ------------------ | Branch (3057:9): [True: 168, False: 1.26k] | Branch (3057:26): [True: 10, False: 158] ------------------ 3058| 10| myexponent = 0; // denormal 3059| 4.07k| } else if (category==fcZero) { ------------------ | Branch (3059:14): [True: 4.00k, False: 71] ------------------ 3060| 4.00k| myexponent = 0; 3061| 4.00k| mysignificand = 0; 3062| 4.00k| } else if (category==fcInfinity) { ------------------ | Branch (3062:14): [True: 71, False: 0] ------------------ 3063| 71| myexponent = 0x7ff; 3064| 71| mysignificand = 0; 3065| 71| } else { 3066| 0| assert(category == fcNaN && "Unknown category!"); ------------------ | Branch (3066:5): [True: 0, False: 0] | Branch (3066:5): [True: 0, Folded] | Branch (3066:5): [True: 0, False: 0] ------------------ 3067| 0| myexponent = 0x7ff; 3068| 0| mysignificand = *significandParts(); 3069| 0| } 3070| | 3071| 5.50k| return APInt(64, ((((uint64_t)(sign & 1) << 63) | 3072| 5.50k| ((myexponent & 0x7ff) << 52) | 3073| 5.50k| (mysignificand & 0xfffffffffffffLL)))); 3074| 5.50k|} _ZNK7llvm_ks7APFloat26convertFloatAPFloatToAPIntEv: 3078| 2.31k|{ 3079| 2.31k| assert(semantics == (const llvm_ks::fltSemantics*)&IEEEsingle); ------------------ | Branch (3079:3): [True: 2.31k, False: 0] ------------------ 3080| 2.31k| assert(partCount()==1); ------------------ | Branch (3080:3): [True: 2.31k, False: 0] ------------------ 3081| | 3082| 2.31k| uint32_t myexponent, mysignificand; 3083| | 3084| 2.31k| if (isFiniteNonZero()) { ------------------ | Branch (3084:7): [True: 1.18k, False: 1.12k] ------------------ 3085| 1.18k| myexponent = exponent+127; //bias 3086| 1.18k| mysignificand = (uint32_t)*significandParts(); 3087| 1.18k| if (myexponent == 1 && !(mysignificand & 0x800000)) ------------------ | Branch (3087:9): [True: 8, False: 1.18k] | Branch (3087:28): [True: 0, False: 8] ------------------ 3088| 0| myexponent = 0; // denormal 3089| 1.18k| } else if (category==fcZero) { ------------------ | Branch (3089:14): [True: 558, False: 564] ------------------ 3090| 558| myexponent = 0; 3091| 558| mysignificand = 0; 3092| 564| } else if (category==fcInfinity) { ------------------ | Branch (3092:14): [True: 235, False: 329] ------------------ 3093| 235| myexponent = 0xff; 3094| 235| mysignificand = 0; 3095| 329| } else { 3096| 329| assert(category == fcNaN && "Unknown category!"); ------------------ | Branch (3096:5): [True: 329, False: 0] | Branch (3096:5): [True: 329, Folded] | Branch (3096:5): [True: 329, False: 0] ------------------ 3097| 329| myexponent = 0xff; 3098| 329| mysignificand = (uint32_t)*significandParts(); 3099| 329| } 3100| | 3101| 2.31k| return APInt(32, (((sign&1) << 31) | ((myexponent&0xff) << 23) | 3102| 2.31k| (mysignificand & 0x7fffff))); 3103| 2.31k|} _ZNK7llvm_ks7APFloat14bitcastToAPIntEv: 3140| 7.81k|{ 3141| 7.81k| if (semantics == (const llvm_ks::fltSemantics*)&IEEEhalf) ------------------ | Branch (3141:7): [True: 0, False: 7.81k] ------------------ 3142| 0| return convertHalfAPFloatToAPInt(); 3143| | 3144| 7.81k| if (semantics == (const llvm_ks::fltSemantics*)&IEEEsingle) ------------------ | Branch (3144:7): [True: 2.31k, False: 5.50k] ------------------ 3145| 2.31k| return convertFloatAPFloatToAPInt(); 3146| | 3147| 5.50k| if (semantics == (const llvm_ks::fltSemantics*)&IEEEdouble) ------------------ | Branch (3147:7): [True: 5.50k, False: 0] ------------------ 3148| 5.50k| return convertDoubleAPFloatToAPInt(); 3149| | 3150| 0| if (semantics == (const llvm_ks::fltSemantics*)&IEEEquad) ------------------ | Branch (3150:7): [True: 0, False: 0] ------------------ 3151| 0| return convertQuadrupleAPFloatToAPInt(); 3152| | 3153| 0| if (semantics == (const llvm_ks::fltSemantics*)&PPCDoubleDouble) ------------------ | Branch (3153:7): [True: 0, False: 0] ------------------ 3154| 0| return convertPPCDoubleDoubleAPFloatToAPInt(); 3155| | 3156| 0| assert(semantics == (const llvm_ks::fltSemantics*)&x87DoubleExtended && ------------------ | Branch (3156:3): [True: 0, False: 0] | Branch (3156:3): [True: 0, Folded] | Branch (3156:3): [True: 0, False: 0] ------------------ 3157| 0| "unknown format!"); 3158| 0| return convertF80LongDoubleAPFloatToAPInt(); 3159| 0|} _ZN7llvm_ks7APFloat7makeInfEb: 3968| 235|APFloat::makeInf(bool Negative) { 3969| 235| category = fcInfinity; 3970| 235| sign = Negative; 3971| 235| exponent = semantics->maxExponent + 1; 3972| 235| APInt::tcSet(significandParts(), 0, partCount()); 3973| 235|} _ZN7llvm_ks7APFloat8makeZeroEb: 3976| 2.53k|APFloat::makeZero(bool Negative) { 3977| 2.53k| category = fcZero; 3978| 2.53k| sign = Negative; 3979| 2.53k| exponent = semantics->minExponent-1; 3980| 2.53k| APInt::tcSet(significandParts(), 0, partCount()); 3981| 2.53k|} APFloat.cpp:_ZL26skipLeadingZeroesAndAnyDotPKcS0_PS0_: 236| 7.25k|{ 237| 7.25k| StringRef::iterator p = begin; 238| 7.25k| *dot = end; 239| 8.89k| while (p != end && *p == '0') ------------------ | Branch (239:10): [True: 8.54k, False: 347] | Branch (239:22): [True: 1.64k, False: 6.90k] ------------------ 240| 1.64k| p++; 241| | 242| 7.25k| if (p != end && *p == '.') { ------------------ | Branch (242:7): [True: 6.90k, False: 347] | Branch (242:19): [True: 5.67k, False: 1.22k] ------------------ 243| 5.67k| *dot = p++; 244| | 245| 5.67k| assert(end - begin != 1 && "Significand has no digits"); ------------------ | Branch (245:5): [True: 5.67k, False: 0] | Branch (245:5): [True: 5.67k, Folded] | Branch (245:5): [True: 5.67k, False: 0] ------------------ 246| | 247| 11.6k| while (p != end && *p == '0') ------------------ | Branch (247:12): [True: 7.57k, False: 4.04k] | Branch (247:24): [True: 5.93k, False: 1.63k] ------------------ 248| 5.93k| p++; 249| 5.67k| } 250| | 251| 7.25k| return p; 252| 7.25k|} APFloat.cpp:_ZL13decDigitValuej: 109| 112k|{ 110| 112k| return c - '0'; 111| 112k|} APFloat.cpp:_ZL12readExponentPKcS0_RN7llvm_ks7APFloat8opStatusE: 120| 686|{ 121| 686| bool isNegative; 122| 686| unsigned int absExponent; 123| 686| const unsigned int overlargeExponent = 24000; /* FIXME. */ 124| 686| StringRef::iterator p = begin; 125| | 126| 686| fp = APFloat::opOK; 127| | 128| | //assert(p != end && "Exponent has no digits"); // qq 129| 686| if (p == end) { ------------------ | Branch (129:7): [True: 33, False: 653] ------------------ 130| 33| fp = APFloat::opInvalidOp; 131| 33| return 0; 132| 33| } 133| | 134| 653| isNegative = (*p == '-'); 135| 653| if (*p == '-' || *p == '+') { ------------------ | Branch (135:7): [True: 377, False: 276] | Branch (135:20): [True: 0, False: 276] ------------------ 136| 377| p++; 137| | //assert(p != end && "Exponent has no digits"); 138| 377| if (p == end) { ------------------ | Branch (138:9): [True: 4, False: 373] ------------------ 139| 4| fp = APFloat::opInvalidOp; 140| 4| return 0; 141| 4| } 142| 377| } 143| | 144| 649| absExponent = decDigitValue(*p++); 145| | //assert(absExponent < 10U && "Invalid character in exponent"); 146| 649| if (absExponent >= 10U) { ------------------ | Branch (146:7): [True: 0, False: 649] ------------------ 147| 0| fp = APFloat::opInvalidOp; 148| 0| return 0; 149| 0| } 150| | 151| 2.35k| for (; p != end; ++p) { ------------------ | Branch (151:10): [True: 1.87k, False: 484] ------------------ 152| 1.87k| unsigned int value; 153| | 154| 1.87k| value = decDigitValue(*p); 155| | //assert(value < 10U && "Invalid character in exponent"); 156| 1.87k| if (value >= 10U) { ------------------ | Branch (156:9): [True: 0, False: 1.87k] ------------------ 157| 0| fp = APFloat::opInvalidOp; 158| 0| return 0; 159| 0| } 160| | 161| 1.87k| value += absExponent * 10; 162| 1.87k| if (absExponent >= overlargeExponent) { ------------------ | Branch (162:9): [True: 165, False: 1.70k] ------------------ 163| 165| absExponent = overlargeExponent; 164| 165| p = end; /* outwit assert below */ 165| 165| break; 166| 165| } 167| 1.70k| absExponent = value; 168| 1.70k| } 169| | 170| | //assert(p == end && "Invalid exponent in exponent"); 171| 649| if (p != end) { ------------------ | Branch (171:7): [True: 0, False: 649] ------------------ 172| 0| fp = APFloat::opInvalidOp; 173| 0| return 0; 174| 0| } 175| | 176| 649| if (isNegative) ------------------ | Branch (176:7): [True: 373, False: 276] ------------------ 177| 373| return -(int) absExponent; 178| 276| else 179| 276| return (int) absExponent; 180| 649|} APFloat.cpp:_ZL16partCountForBitsj: 102| 123k|{ 103| 123k| return ((bits) + integerPartWidth - 1) / integerPartWidth; 104| 123k|} APFloat.cpp:_ZL10shiftRightPmjj: 401| 1.44k|{ 402| 1.44k| lostFraction lost_fraction; 403| | 404| 1.44k| lost_fraction = lostFractionThroughTruncation(dst, parts, bits); 405| | 406| 1.44k| APInt::tcShiftRight(dst, parts, bits); 407| | 408| 1.44k| return lost_fraction; 409| 1.44k|} APFloat.cpp:_ZL20combineLostFractionsN7llvm_ks12lostFractionES0_: 415| 1.37k|{ 416| 1.37k| if (lessSignificant != lfExactlyZero) { ------------------ | Branch (416:7): [True: 83, False: 1.28k] ------------------ 417| 83| if (moreSignificant == lfExactlyZero) ------------------ | Branch (417:9): [True: 16, False: 67] ------------------ 418| 16| moreSignificant = lfLessThanHalf; 419| 67| else if (moreSignificant == lfExactlyHalf) ------------------ | Branch (419:14): [True: 0, False: 67] ------------------ 420| 0| moreSignificant = lfMoreThanHalf; 421| 83| } 422| | 423| 1.37k| return moreSignificant; 424| 1.37k|} APFloat.cpp:_ZL29lostFractionThroughTruncationPKmjj: 381| 4.61k|{ 382| 4.61k| unsigned int lsb; 383| | 384| 4.61k| lsb = APInt::tcLSB(parts, partCount); 385| | 386| | /* Note this is guaranteed true if bits == 0, or LSB == -1U. */ 387| 4.61k| if (bits <= lsb) ------------------ | Branch (387:7): [True: 2.06k, False: 2.55k] ------------------ 388| 2.06k| return lfExactlyZero; 389| 2.55k| if (bits == lsb + 1) ------------------ | Branch (389:7): [True: 97, False: 2.45k] ------------------ 390| 97| return lfExactlyHalf; 391| 2.45k| if (bits <= partCount * integerPartWidth && ------------------ | Branch (391:7): [True: 2.45k, False: 0] ------------------ 392| 2.45k| APInt::tcExtractBit(parts, bits - 1)) ------------------ | Branch (392:7): [True: 1.60k, False: 848] ------------------ 393| 1.60k| return lfMoreThanHalf; 394| | 395| 848| return lfLessThanHalf; 396| 2.45k|} APFloat.cpp:_ZL27trailingHexadecimalFractionPKcS0_j: 349| 149|{ 350| 149| unsigned int hexDigit; 351| | 352| | /* If the first trailing digit isn't 0 or 8 we can work out the 353| | fraction immediately. */ 354| 149| if (digitValue > 8) ------------------ | Branch (354:7): [True: 8, False: 141] ------------------ 355| 8| return lfMoreThanHalf; 356| 141| else if (digitValue < 8 && digitValue > 0) ------------------ | Branch (356:12): [True: 78, False: 63] | Branch (356:30): [True: 13, False: 65] ------------------ 357| 13| return lfLessThanHalf; 358| | 359| | // Otherwise we need to find the first non-zero digit. 360| 600| while (p != end && (*p == '0' || *p == '.')) ------------------ | Branch (360:10): [True: 600, False: 0] | Branch (360:23): [True: 457, False: 143] | Branch (360:36): [True: 15, False: 128] ------------------ 361| 472| p++; 362| | 363| 128| assert(p != end && "Invalid trailing hexadecimal fraction!"); ------------------ | Branch (363:3): [True: 128, False: 0] | Branch (363:3): [True: 128, Folded] | Branch (363:3): [True: 128, False: 0] ------------------ 364| | 365| 128| hexDigit = hexDigitValue(*p); 366| | 367| | /* If we ran off the end it is exactly zero or one-half, otherwise 368| | a little more. */ 369| 128| if (hexDigit == -1U) ------------------ | Branch (369:7): [True: 53, False: 75] ------------------ 370| 53| return digitValue == 0 ? lfExactlyZero: lfExactlyHalf; ------------------ | Branch (370:12): [True: 48, False: 5] ------------------ 371| 75| else 372| 75| return digitValue == 0 ? lfLessThanHalf: lfMoreThanHalf; ------------------ | Branch (372:12): [True: 17, False: 58] ------------------ 373| 128|} APFloat.cpp:_ZL13totalExponentPKcS0_i: 187| 291|{ 188| 291| int unsignedExponent; 189| 291| bool negative, overflow; 190| 291| int exponent = 0; 191| | 192| 291| assert(p != end && "Exponent has no digits"); ------------------ | Branch (192:3): [True: 291, False: 0] | Branch (192:3): [True: 291, Folded] | Branch (192:3): [True: 291, False: 0] ------------------ 193| | 194| 291| negative = *p == '-'; 195| 291| if (*p == '-' || *p == '+') { ------------------ | Branch (195:7): [True: 10, False: 281] | Branch (195:20): [True: 18, False: 263] ------------------ 196| 28| p++; 197| 28| assert(p != end && "Exponent has no digits"); ------------------ | Branch (197:5): [True: 28, False: 0] | Branch (197:5): [True: 28, Folded] | Branch (197:5): [True: 28, False: 0] ------------------ 198| 28| } 199| | 200| 291| unsignedExponent = 0; 201| 291| overflow = false; 202| 854| for (; p != end; ++p) { ------------------ | Branch (202:10): [True: 594, False: 260] ------------------ 203| 594| unsigned int value; 204| | 205| 594| value = decDigitValue(*p); 206| 594| assert(value < 10U && "Invalid character in exponent"); ------------------ | Branch (206:5): [True: 594, False: 0] | Branch (206:5): [True: 594, Folded] | Branch (206:5): [True: 594, False: 0] ------------------ 207| | 208| 594| unsignedExponent = unsignedExponent * 10 + value; 209| 594| if (unsignedExponent > 32767) { ------------------ | Branch (209:9): [True: 31, False: 563] ------------------ 210| 31| overflow = true; 211| 31| break; 212| 31| } 213| 594| } 214| | 215| 291| if (exponentAdjustment > 32767 || exponentAdjustment < -32768) ------------------ | Branch (215:7): [True: 0, False: 291] | Branch (215:37): [True: 0, False: 291] ------------------ 216| 0| overflow = true; 217| | 218| 291| if (!overflow) { ------------------ | Branch (218:7): [True: 260, False: 31] ------------------ 219| 260| exponent = unsignedExponent; 220| 260| if (negative) ------------------ | Branch (220:9): [True: 10, False: 250] ------------------ 221| 10| exponent = -exponent; 222| 260| exponent += exponentAdjustment; 223| 260| if (exponent > 32767 || exponent < -32768) ------------------ | Branch (223:9): [True: 0, False: 260] | Branch (223:29): [True: 0, False: 260] ------------------ 224| 0| overflow = true; 225| 260| } 226| | 227| 291| if (overflow) ------------------ | Branch (227:7): [True: 31, False: 260] ------------------ 228| 31| exponent = negative ? -32768: 32767; ------------------ | Branch (228:16): [True: 0, False: 31] ------------------ 229| | 230| 291| return exponent; 231| 291|} APFloat.cpp:_ZL8powerOf5Pmj: 494| 2.32k|{ 495| 2.32k| static const integerPart firstEightPowers[] = { 1, 5, 25, 125, 625, 3125, 496| 2.32k| 15625, 78125 }; 497| 2.32k| integerPart pow5s[maxPowerOfFiveParts * 2 + 5]; 498| 2.32k| pow5s[0] = 78125 * 5; 499| | 500| 2.32k| unsigned int partsCount[16] = { 1 }; 501| 2.32k| integerPart scratch[maxPowerOfFiveParts], *p1, *p2, *pow5; 502| 2.32k| unsigned int result; 503| 2.32k| assert(power <= maxExponent); ------------------ | Branch (503:3): [True: 2.32k, False: 0] ------------------ 504| | 505| 2.32k| p1 = dst; 506| 2.32k| p2 = scratch; 507| | 508| 2.32k| *p1 = firstEightPowers[power & 7]; 509| 2.32k| power >>= 3; 510| | 511| 2.32k| result = 1; 512| 2.32k| pow5 = pow5s; 513| | 514| 4.86k| for (unsigned int n = 0; power; power >>= 1, n++) { ------------------ | Branch (514:28): [True: 2.54k, False: 2.32k] ------------------ 515| 2.54k| unsigned int pc; 516| | 517| 2.54k| pc = partsCount[n]; 518| | 519| | /* Calculate pow(5,pow(2,n+3)) if we haven't yet. */ 520| 2.54k| if (pc == 0) { ------------------ | Branch (520:9): [True: 1.97k, False: 562] ------------------ 521| 1.97k| pc = partsCount[n - 1]; 522| 1.97k| APInt::tcFullMultiply(pow5, pow5 - pc, pow5 - pc, pc, pc); 523| 1.97k| pc *= 2; 524| 1.97k| if (pow5[pc - 1] == 0) ------------------ | Branch (524:11): [True: 1.27k, False: 700] ------------------ 525| 1.27k| pc--; 526| 1.97k| partsCount[n] = pc; 527| 1.97k| } 528| | 529| 2.54k| if (power & 1) { ------------------ | Branch (529:9): [True: 1.41k, False: 1.12k] ------------------ 530| 1.41k| integerPart *tmp; 531| | 532| 1.41k| APInt::tcFullMultiply(p2, p1, pow5, result, pc); 533| 1.41k| result += pc; 534| 1.41k| if (p2[result - 1] == 0) ------------------ | Branch (534:11): [True: 1.03k, False: 382] ------------------ 535| 1.03k| result--; 536| | 537| | /* Now result is in p1 with partsCount parts and p2 is scratch 538| | space. */ 539| 1.41k| tmp = p1, p1 = p2, p2 = tmp; 540| 1.41k| } 541| | 542| 2.54k| pow5 += pc; 543| 2.54k| } 544| | 545| 2.32k| if (p1 != dst) ------------------ | Branch (545:7): [True: 490, False: 1.83k] ------------------ 546| 490| APInt::tcAssign(dst, p1, result); 547| | 548| 2.32k| return result; 549| 2.32k|} APFloat.cpp:_ZL10HUerrBoundbjj: 435| 2.53k|{ 436| 2.53k| assert(HUerr1 < 2 || HUerr2 < 2 || (HUerr1 + HUerr2 < 8)); ------------------ | Branch (436:3): [True: 2.53k, False: 0] | Branch (436:3): [True: 0, False: 0] | Branch (436:3): [True: 0, False: 0] | Branch (436:3): [True: 2.53k, False: 0] ------------------ 437| | 438| 2.53k| if (HUerr1 + HUerr2 == 0) ------------------ | Branch (438:7): [True: 964, False: 1.57k] ------------------ 439| 964| return inexactMultiply * 2; /* <= inexactMultiply half-ulps. */ 440| 1.57k| else 441| 1.57k| return inexactMultiply + 2 * (HUerr1 + HUerr2); 442| 2.53k|} APFloat.cpp:_ZL16ulpsFromBoundaryPKmjb: 449| 2.53k|{ 450| 2.53k| unsigned int count, partBits; 451| 2.53k| integerPart part, boundary; 452| | 453| 2.53k| assert(bits != 0); ------------------ | Branch (453:3): [True: 2.53k, False: 0] ------------------ 454| | 455| 2.53k| bits--; 456| 2.53k| count = bits / integerPartWidth; 457| 2.53k| partBits = bits % integerPartWidth + 1; 458| | 459| 2.53k| part = parts[count] & (~(integerPart) 0 >> (integerPartWidth - partBits)); 460| | 461| 2.53k| if (isNearest) ------------------ | Branch (461:7): [True: 2.53k, False: 0] ------------------ 462| 2.53k| boundary = (integerPart) 1 << (partBits - 1); 463| 0| else 464| 0| boundary = 0; 465| | 466| 2.53k| if (count == 0) { ------------------ | Branch (466:7): [True: 2.32k, False: 210] ------------------ 467| 2.32k| if (part - boundary <= boundary - part) ------------------ | Branch (467:9): [True: 1.03k, False: 1.29k] ------------------ 468| 1.03k| return part - boundary; 469| 1.29k| else 470| 1.29k| return boundary - part; 471| 2.32k| } 472| | 473| 210| if (part == boundary) { ------------------ | Branch (473:7): [True: 94, False: 116] ------------------ 474| 1.46k| while (--count) ------------------ | Branch (474:12): [True: 1.37k, False: 91] ------------------ 475| 1.37k| if (parts[count]) ------------------ | Branch (475:11): [True: 3, False: 1.37k] ------------------ 476| 3| return ~(integerPart) 0; /* A lot. */ 477| | 478| 91| return parts[0]; 479| 116| } else if (part == boundary - 1) { ------------------ | Branch (479:14): [True: 113, False: 3] ------------------ 480| 1.81k| while (--count) ------------------ | Branch (480:12): [True: 1.73k, False: 85] ------------------ 481| 1.73k| if (~parts[count]) ------------------ | Branch (481:11): [True: 28, False: 1.70k] ------------------ 482| 28| return ~(integerPart) 0; /* A lot. */ 483| | 484| 85| return -parts[0]; 485| 113| } 486| | 487| 3| return ~(integerPart) 0; /* A lot. */ 488| 210|} _ZN7llvm_ks5APInt12initSlowCaseEjmb: 77| 140k|void APInt::initSlowCase(unsigned numBits, uint64_t val, bool isSigned) { 78| 140k| pVal = getClearedMemory(getNumWords()); 79| 140k| pVal[0] = val; 80| 140k| if (isSigned && int64_t(val) < 0) ------------------ | Branch (80:7): [True: 137k, False: 2.93k] | Branch (80:19): [True: 0, False: 137k] ------------------ 81| 0| for (unsigned i = 1; i < getNumWords(); ++i) ------------------ | Branch (81:26): [True: 0, False: 0] ------------------ 82| 0| pVal[i] = -1ULL; 83| 140k|} _ZN7llvm_ks5APInt12initSlowCaseERKS0_: 85| 233k|void APInt::initSlowCase(const APInt& that) { 86| 233k| pVal = getMemory(getNumWords()); 87| 233k| memcpy(pVal, that.pVal, getNumWords() * APINT_WORD_SIZE); 88| 233k|} _ZN7llvm_ks5APInt14AssignSlowCaseERKS0_: 123| 1.18k|APInt& APInt::AssignSlowCase(const APInt& RHS) { 124| | // Don't do anything for X = X 125| 1.18k| if (this == &RHS) ------------------ | Branch (125:7): [True: 0, False: 1.18k] ------------------ 126| 0| return *this; 127| | 128| 1.18k| if (BitWidth == RHS.getBitWidth()) { ------------------ | Branch (128:7): [True: 82, False: 1.09k] ------------------ 129| | // assume same bit-width single-word case is already handled 130| 82| assert(!isSingleWord()); ------------------ | Branch (130:5): [True: 82, False: 0] ------------------ 131| 82| memcpy(pVal, RHS.pVal, getNumWords() * APINT_WORD_SIZE); 132| 82| return *this; 133| 82| } 134| | 135| 1.09k| if (isSingleWord()) { ------------------ | Branch (135:7): [True: 961, False: 137] ------------------ 136| | // assume case where both are single words is already handled 137| 961| assert(!RHS.isSingleWord()); ------------------ | Branch (137:5): [True: 961, False: 0] ------------------ 138| 961| VAL = 0; 139| 961| pVal = getMemory(RHS.getNumWords()); 140| 961| memcpy(pVal, RHS.pVal, RHS.getNumWords() * APINT_WORD_SIZE); 141| 961| } else if (getNumWords() == RHS.getNumWords()) ------------------ | Branch (141:14): [True: 0, False: 137] ------------------ 142| 0| memcpy(pVal, RHS.pVal, RHS.getNumWords() * APINT_WORD_SIZE); 143| 137| else if (RHS.isSingleWord()) { ------------------ | Branch (143:12): [True: 120, False: 17] ------------------ 144| 120| delete [] pVal; 145| 120| VAL = RHS.VAL; 146| 120| } else { 147| 17| delete [] pVal; 148| 17| pVal = getMemory(RHS.getNumWords()); 149| 17| memcpy(pVal, RHS.pVal, RHS.getNumWords() * APINT_WORD_SIZE); 150| 17| } 151| 1.09k| BitWidth = RHS.BitWidth; 152| 1.09k| return clearUnusedBits(); 153| 1.09k|} _ZN7llvm_ks5APIntaSEm: 155| 115k|APInt& APInt::operator=(uint64_t RHS) { 156| 115k| if (isSingleWord()) ------------------ | Branch (156:7): [True: 0, False: 115k] ------------------ 157| 0| VAL = RHS; 158| 115k| else { 159| 115k| pVal[0] = RHS; 160| 115k| memset(pVal+1, 0, (getNumWords() - 1) * APINT_WORD_SIZE); 161| 115k| } 162| 115k| return clearUnusedBits(); 163| 115k|} _ZNK7llvm_ks5APInt9getHiBitsEj: 686| 98|APInt APInt::getHiBits(unsigned numBits) const { 687| 98| return APIntOps::lshr(*this, BitWidth - numBits); 688| 98|} _ZNK7llvm_ks5APInt9getLoBitsEj: 691| 98|APInt APInt::getLoBits(unsigned numBits) const { 692| 98| return APIntOps::lshr(APIntOps::shl(*this, BitWidth - numBits), 693| 98| BitWidth - numBits); 694| 98|} _ZNK7llvm_ks5APInt25countLeadingZerosSlowCaseEv: 696| 126k|unsigned APInt::countLeadingZerosSlowCase() const { 697| | // Treat the most significand word differently because it might have 698| | // meaningless bits set beyond the precision. 699| 126k| unsigned BitsInMSW = BitWidth % APINT_BITS_PER_WORD; 700| 126k| integerPart MSWMask; 701| 126k| if (BitsInMSW) MSWMask = (integerPart(1) << BitsInMSW) - 1; ------------------ | Branch (701:7): [True: 98, False: 126k] ------------------ 702| 126k| else { 703| 126k| MSWMask = ~integerPart(0); 704| 126k| BitsInMSW = APINT_BITS_PER_WORD; 705| 126k| } 706| | 707| 126k| unsigned i = getNumWords(); 708| 126k| integerPart MSW = pVal[i-1] & MSWMask; 709| 126k| if (MSW) ------------------ | Branch (709:7): [True: 491, False: 126k] ------------------ 710| 491| return llvm_ks::countLeadingZeros(MSW) - (APINT_BITS_PER_WORD - BitsInMSW); 711| | 712| 126k| unsigned Count = BitsInMSW; 713| 126k| for (--i; i > 0u; --i) { ------------------ | Branch (713:13): [True: 126k, False: 94] ------------------ 714| 126k| if (pVal[i-1] == 0) ------------------ | Branch (714:9): [True: 94, False: 126k] ------------------ 715| 94| Count += APINT_BITS_PER_WORD; 716| 126k| else { 717| 126k| Count += llvm_ks::countLeadingZeros(pVal[i-1]); 718| 126k| break; 719| 126k| } 720| 126k| } 721| 126k| return Count; 722| 126k|} _ZNK7llvm_ks5APInt4zextEj: 998| 104|APInt APInt::zext(unsigned width) const { 999| 104| assert(width > BitWidth && "Invalid APInt ZeroExtend request"); ------------------ | Branch (999:3): [True: 104, False: 0] | Branch (999:3): [True: 104, Folded] | Branch (999:3): [True: 104, False: 0] ------------------ 1000| | 1001| 104| if (width <= APINT_BITS_PER_WORD) ------------------ | Branch (1001:7): [True: 0, False: 104] ------------------ 1002| 0| return APInt(width, VAL); 1003| | 1004| 104| APInt Result(getMemory(getNumWords(width)), width); 1005| | 1006| | // Copy words. 1007| 104| unsigned i; 1008| 312| for (i = 0; i != getNumWords(); i++) ------------------ | Branch (1008:15): [True: 208, False: 104] ------------------ 1009| 208| Result.pVal[i] = getRawData()[i]; 1010| | 1011| | // Zero remaining words. 1012| 104| memset(&Result.pVal[i], 0, (Result.getNumWords() - i) * APINT_WORD_SIZE); 1013| | 1014| 104| return Result; 1015| 104|} _ZNK7llvm_ks5APInt4lshrEj: 1144| 196|APInt APInt::lshr(unsigned shiftAmt) const { 1145| 196| if (isSingleWord()) { ------------------ | Branch (1145:7): [True: 0, False: 196] ------------------ 1146| 0| if (shiftAmt >= BitWidth) ------------------ | Branch (1146:9): [True: 0, False: 0] ------------------ 1147| 0| return APInt(BitWidth, 0); 1148| 0| else 1149| 0| return APInt(BitWidth, this->VAL >> shiftAmt); 1150| 0| } 1151| | 1152| | // If all the bits were shifted out, the result is 0. This avoids issues 1153| | // with shifting by the size of the integer type, which produces undefined 1154| | // results. We define these "undefined results" to always be 0. 1155| 196| if (shiftAmt >= BitWidth) ------------------ | Branch (1155:7): [True: 0, False: 196] ------------------ 1156| 0| return APInt(BitWidth, 0); 1157| | 1158| | // If none of the bits are shifted out, the result is *this. This avoids 1159| | // issues with shifting by the size of the integer type, which produces 1160| | // undefined results in the code below. This is also an optimization. 1161| 196| if (shiftAmt == 0) ------------------ | Branch (1161:7): [True: 0, False: 196] ------------------ 1162| 0| return *this; 1163| | 1164| | // Create some space for the result. 1165| 196| uint64_t * val = new uint64_t[getNumWords()]; 1166| | 1167| | // If we are shifting less than a word, compute the shift with a simple carry 1168| 196| if (shiftAmt < APINT_BITS_PER_WORD) { ------------------ | Branch (1168:7): [True: 0, False: 196] ------------------ 1169| 0| lshrNear(val, pVal, getNumWords(), shiftAmt); 1170| 0| APInt Result(val, BitWidth); 1171| 0| Result.clearUnusedBits(); 1172| 0| return Result; 1173| 0| } 1174| | 1175| | // Compute some values needed by the remaining shift algorithms 1176| 196| unsigned wordShift = shiftAmt % APINT_BITS_PER_WORD; 1177| 196| unsigned offset = shiftAmt / APINT_BITS_PER_WORD; 1178| | 1179| | // If we are shifting whole words, just move whole words 1180| 196| if (wordShift == 0) { ------------------ | Branch (1180:7): [True: 196, False: 0] ------------------ 1181| 392| for (unsigned i = 0; i < getNumWords() - offset; ++i) ------------------ | Branch (1181:26): [True: 196, False: 196] ------------------ 1182| 196| val[i] = pVal[i+offset]; 1183| 392| for (unsigned i = getNumWords()-offset; i < getNumWords(); i++) ------------------ | Branch (1183:45): [True: 196, False: 196] ------------------ 1184| 196| val[i] = 0; 1185| 196| APInt Result(val, BitWidth); 1186| 196| Result.clearUnusedBits(); 1187| 196| return Result; 1188| 196| } 1189| | 1190| | // Shift the low order words 1191| 0| unsigned breakWord = getNumWords() - offset -1; 1192| 0| for (unsigned i = 0; i < breakWord; ++i) ------------------ | Branch (1192:24): [True: 0, False: 0] ------------------ 1193| 0| val[i] = (pVal[i+offset] >> wordShift) | 1194| 0| (pVal[i+offset+1] << (APINT_BITS_PER_WORD - wordShift)); 1195| | // Shift the break word. 1196| 0| val[breakWord] = pVal[breakWord+offset] >> wordShift; 1197| | 1198| | // Remaining words are 0 1199| 0| for (unsigned i = breakWord+1; i < getNumWords(); ++i) ------------------ | Branch (1199:34): [True: 0, False: 0] ------------------ 1200| 0| val[i] = 0; 1201| 0| APInt Result(val, BitWidth); 1202| 0| Result.clearUnusedBits(); 1203| 0| return Result; 1204| 196|} _ZNK7llvm_ks5APInt11shlSlowCaseEj: 1213| 257k|APInt APInt::shlSlowCase(unsigned shiftAmt) const { 1214| | // If all the bits were shifted out, the result is 0. This avoids issues 1215| | // with shifting by the size of the integer type, which produces undefined 1216| | // results. We define these "undefined results" to always be 0. 1217| 257k| if (shiftAmt == BitWidth) ------------------ | Branch (1217:7): [True: 0, False: 257k] ------------------ 1218| 0| return APInt(BitWidth, 0); 1219| | 1220| | // If none of the bits are shifted out, the result is *this. This avoids a 1221| | // lshr by the words size in the loop below which can produce incorrect 1222| | // results. It also avoids the expensive computation below for a common case. 1223| 257k| if (shiftAmt == 0) ------------------ | Branch (1223:7): [True: 0, False: 257k] ------------------ 1224| 0| return *this; 1225| | 1226| | // Create some space for the result. 1227| 257k| uint64_t * val = new uint64_t[getNumWords()]; 1228| | 1229| | // If we are shifting less than a word, do it the easy way 1230| 257k| if (shiftAmt < APINT_BITS_PER_WORD) { ------------------ | Branch (1230:7): [True: 257k, False: 98] ------------------ 1231| 257k| uint64_t carry = 0; 1232| 8.37M| for (unsigned i = 0; i < getNumWords(); i++) { ------------------ | Branch (1232:26): [True: 8.11M, False: 257k] ------------------ 1233| 8.11M| val[i] = pVal[i] << shiftAmt | carry; 1234| 8.11M| carry = pVal[i] >> (APINT_BITS_PER_WORD - shiftAmt); 1235| 8.11M| } 1236| 257k| APInt Result(val, BitWidth); 1237| 257k| Result.clearUnusedBits(); 1238| 257k| return Result; 1239| 257k| } 1240| | 1241| | // Compute some values needed by the remaining shift algorithms 1242| 98| unsigned wordShift = shiftAmt % APINT_BITS_PER_WORD; 1243| 98| unsigned offset = shiftAmt / APINT_BITS_PER_WORD; 1244| | 1245| | // If we are shifting whole words, just move whole words 1246| 98| if (wordShift == 0) { ------------------ | Branch (1246:7): [True: 98, False: 0] ------------------ 1247| 196| for (unsigned i = 0; i < offset; i++) ------------------ | Branch (1247:26): [True: 98, False: 98] ------------------ 1248| 98| val[i] = 0; 1249| 196| for (unsigned i = offset; i < getNumWords(); i++) ------------------ | Branch (1249:31): [True: 98, False: 98] ------------------ 1250| 98| val[i] = pVal[i-offset]; 1251| 98| APInt Result(val, BitWidth); 1252| 98| Result.clearUnusedBits(); 1253| 98| return Result; 1254| 98| } 1255| | 1256| | // Copy whole words from this to Result. 1257| 0| unsigned i = getNumWords() - 1; 1258| 0| for (; i > offset; --i) ------------------ | Branch (1258:10): [True: 0, False: 0] ------------------ 1259| 0| val[i] = pVal[i-offset] << wordShift | 1260| 0| pVal[i-offset-1] >> (APINT_BITS_PER_WORD - wordShift); 1261| 0| val[offset] = pVal[0] << wordShift; 1262| 0| for (i = 0; i < offset; ++i) ------------------ | Branch (1262:15): [True: 0, False: 0] ------------------ 1263| 0| val[i] = 0; 1264| 0| APInt Result(val, BitWidth); 1265| 0| Result.clearUnusedBits(); 1266| 0| return Result; 1267| 98|} _ZN7llvm_ks5APInt5tcSetEPmmj: 2307| 7.70k|{ 2308| 7.70k| unsigned int i; 2309| | 2310| 7.70k| assert(parts > 0); ------------------ | Branch (2310:3): [True: 7.70k, False: 0] ------------------ 2311| | 2312| 7.70k| dst[0] = part; 2313| 18.6k| for (i = 1; i < parts; i++) ------------------ | Branch (2313:15): [True: 10.9k, False: 7.70k] ------------------ 2314| 10.9k| dst[i] = 0; 2315| 7.70k|} _ZN7llvm_ks5APInt8tcAssignEPmPKmj: 2320| 9.33k|{ 2321| 9.33k| unsigned int i; 2322| | 2323| 28.5k| for (i = 0; i < parts; i++) ------------------ | Branch (2323:15): [True: 19.2k, False: 9.33k] ------------------ 2324| 19.2k| dst[i] = src[i]; 2325| 9.33k|} _ZN7llvm_ks5APInt8tcIsZeroEPKmj: 2330| 5.22k|{ 2331| 5.22k| unsigned int i; 2332| | 2333| 8.86k| for (i = 0; i < parts; i++) ------------------ | Branch (2333:15): [True: 8.84k, False: 17] ------------------ 2334| 8.84k| if (src[i]) ------------------ | Branch (2334:9): [True: 5.20k, False: 3.63k] ------------------ 2335| 5.20k| return false; 2336| | 2337| 17| return true; 2338| 5.22k|} _ZN7llvm_ks5APInt12tcExtractBitEPKmj: 2343| 5.09k|{ 2344| 5.09k| return (parts[bit / integerPartWidth] & 2345| 5.09k| ((integerPart) 1 << bit % integerPartWidth)) != 0; 2346| 5.09k|} _ZN7llvm_ks5APInt8tcSetBitEPmj: 2351| 188k|{ 2352| 188k| parts[bit / integerPartWidth] |= (integerPart) 1 << (bit % integerPartWidth); 2353| 188k|} _ZN7llvm_ks5APInt5tcLSBEPKmj: 2367| 4.61k|{ 2368| 4.61k| unsigned int i, lsb; 2369| | 2370| 5.59k| for (i = 0; i < n; i++) { ------------------ | Branch (2370:15): [True: 5.59k, False: 0] ------------------ 2371| 5.59k| if (parts[i] != 0) { ------------------ | Branch (2371:11): [True: 4.61k, False: 978] ------------------ 2372| 4.61k| lsb = partLSB(parts[i]); 2373| | 2374| 4.61k| return lsb + i * integerPartWidth; 2375| 4.61k| } 2376| 5.59k| } 2377| | 2378| 0| return -1U; 2379| 4.61k|} _ZN7llvm_ks5APInt5tcMSBEPKmj: 2385| 18.4k|{ 2386| 18.4k| unsigned int msb; 2387| | 2388| 20.2k| do { 2389| 20.2k| --n; 2390| | 2391| 20.2k| if (parts[n] != 0) { ------------------ | Branch (2391:9): [True: 18.3k, False: 1.90k] ------------------ 2392| 18.3k| msb = partMSB(parts[n]); 2393| | 2394| 18.3k| return msb + n * integerPartWidth; 2395| 18.3k| } 2396| 20.2k| } while (n); ------------------ | Branch (2396:12): [True: 1.77k, False: 132] ------------------ 2397| | 2398| 132| return -1U; 2399| 18.4k|} _ZN7llvm_ks5APInt9tcExtractEPmjPKmjj: 2408| 7.39k|{ 2409| 7.39k| unsigned int firstSrcPart, dstParts, shift, n; 2410| | 2411| 7.39k| dstParts = (srcBits + integerPartWidth - 1) / integerPartWidth; 2412| 7.39k| assert(dstParts <= dstCount); ------------------ | Branch (2412:3): [True: 7.39k, False: 0] ------------------ 2413| | 2414| 7.39k| firstSrcPart = srcLSB / integerPartWidth; 2415| 7.39k| tcAssign (dst, src + firstSrcPart, dstParts); 2416| | 2417| 7.39k| shift = srcLSB % integerPartWidth; 2418| 7.39k| tcShiftRight (dst, dstParts, shift); 2419| | 2420| | /* We now have (dstParts * integerPartWidth - shift) bits from SRC 2421| | in DST. If this is less that srcBits, append the rest, else 2422| | clear the high bits. */ 2423| 7.39k| n = dstParts * integerPartWidth - shift; 2424| 7.39k| if (n < srcBits) { ------------------ | Branch (2424:7): [True: 786, False: 6.61k] ------------------ 2425| 786| integerPart mask = lowBitMask (srcBits - n); 2426| 786| dst[dstParts - 1] |= ((src[firstSrcPart + dstParts] & mask) 2427| 786| << n % integerPartWidth); 2428| 6.61k| } else if (n > srcBits) { ------------------ | Branch (2428:14): [True: 6.56k, False: 50] ------------------ 2429| 6.56k| if (srcBits % integerPartWidth) ------------------ | Branch (2429:9): [True: 6.56k, False: 0] ------------------ 2430| 6.56k| dst[dstParts - 1] &= lowBitMask (srcBits % integerPartWidth); 2431| 6.56k| } 2432| | 2433| | /* Clear high parts. */ 2434| 9.16k| while (dstParts < dstCount) ------------------ | Branch (2434:10): [True: 1.77k, False: 7.39k] ------------------ 2435| 1.77k| dst[dstParts++] = 0; 2436| 7.39k|} _ZN7llvm_ks5APInt10tcSubtractEPmPKmmj: 2467| 188k|{ 2468| 188k| unsigned int i; 2469| | 2470| 188k| assert(c <= 1); ------------------ | Branch (2470:3): [True: 188k, False: 0] ------------------ 2471| | 2472| 12.1M| for (i = 0; i < parts; i++) { ------------------ | Branch (2472:15): [True: 11.9M, False: 188k] ------------------ 2473| 11.9M| integerPart l; 2474| | 2475| 11.9M| l = dst[i]; 2476| 11.9M| if (c) { ------------------ | Branch (2476:9): [True: 2.87M, False: 9.09M] ------------------ 2477| 2.87M| dst[i] -= rhs[i] + 1; 2478| 2.87M| c = (dst[i] >= l); 2479| 9.09M| } else { 2480| 9.09M| dst[i] -= rhs[i]; 2481| 9.09M| c = (dst[i] > l); 2482| 9.09M| } 2483| 11.9M| } 2484| | 2485| 188k| return c; 2486| 188k|} _ZN7llvm_ks5APInt14tcMultiplyPartEPmPKmmmjjb: 2512| 12.9k|{ 2513| 12.9k| unsigned int i, n; 2514| | 2515| | /* Otherwise our writes of DST kill our later reads of SRC. */ 2516| 12.9k| assert(dst <= src || dst >= src + srcParts); ------------------ | Branch (2516:3): [True: 6.64k, False: 6.34k] | Branch (2516:3): [True: 6.34k, False: 0] | Branch (2516:3): [True: 12.9k, False: 0] ------------------ 2517| 12.9k| assert(dstParts <= srcParts + 1); ------------------ | Branch (2517:3): [True: 12.9k, False: 0] ------------------ 2518| | 2519| | /* N loops; minimum of dstParts and srcParts. */ 2520| 12.9k| n = dstParts < srcParts ? dstParts: srcParts; ------------------ | Branch (2520:7): [True: 0, False: 12.9k] ------------------ 2521| | 2522| 130k| for (i = 0; i < n; i++) { ------------------ | Branch (2522:15): [True: 117k, False: 12.9k] ------------------ 2523| 117k| integerPart low, mid, high, srcPart; 2524| | 2525| | /* [ LOW, HIGH ] = MULTIPLIER * SRC[i] + DST[i] + CARRY. 2526| | 2527| | This cannot overflow, because 2528| | 2529| | (n - 1) * (n - 1) + 2 (n - 1) = (n - 1) * (n + 1) 2530| | 2531| | which is less than n^2. */ 2532| | 2533| 117k| srcPart = src[i]; 2534| | 2535| 117k| if (multiplier == 0 || srcPart == 0) { ------------------ | Branch (2535:9): [True: 0, False: 117k] | Branch (2535:28): [True: 3.60k, False: 113k] ------------------ 2536| 3.60k| low = carry; 2537| 3.60k| high = 0; 2538| 113k| } else { 2539| 113k| low = lowHalf(srcPart) * lowHalf(multiplier); 2540| 113k| high = highHalf(srcPart) * highHalf(multiplier); 2541| | 2542| 113k| mid = lowHalf(srcPart) * highHalf(multiplier); 2543| 113k| high += highHalf(mid); 2544| 113k| mid <<= integerPartWidth / 2; 2545| 113k| if (low + mid < low) ------------------ | Branch (2545:11): [True: 23.8k, False: 90.1k] ------------------ 2546| 23.8k| high++; 2547| 113k| low += mid; 2548| | 2549| 113k| mid = highHalf(srcPart) * lowHalf(multiplier); 2550| 113k| high += highHalf(mid); 2551| 113k| mid <<= integerPartWidth / 2; 2552| 113k| if (low + mid < low) ------------------ | Branch (2552:11): [True: 59.3k, False: 54.5k] ------------------ 2553| 59.3k| high++; 2554| 113k| low += mid; 2555| | 2556| | /* Now add carry. */ 2557| 113k| if (low + carry < low) ------------------ | Branch (2557:11): [True: 22.5k, False: 91.3k] ------------------ 2558| 22.5k| high++; 2559| 113k| low += carry; 2560| 113k| } 2561| | 2562| 117k| if (add) { ------------------ | Branch (2562:9): [True: 45.9k, False: 71.6k] ------------------ 2563| | /* And now DST[i], and store the new low part there. */ 2564| 45.9k| if (low + dst[i] < low) ------------------ | Branch (2564:11): [True: 15.8k, False: 30.0k] ------------------ 2565| 15.8k| high++; 2566| 45.9k| dst[i] += low; 2567| 45.9k| } else 2568| 71.6k| dst[i] = low; 2569| | 2570| 117k| carry = high; 2571| 117k| } 2572| | 2573| 12.9k| if (i < dstParts) { ------------------ | Branch (2573:7): [True: 12.9k, False: 0] ------------------ 2574| | /* Full multiplication, there is no overflow. */ 2575| 12.9k| assert(i + 1 == dstParts); ------------------ | Branch (2575:5): [True: 12.9k, False: 0] ------------------ 2576| 12.9k| dst[i] = carry; 2577| 12.9k| return 0; 2578| 12.9k| } else { 2579| | /* We overflowed if there is carry. */ 2580| 0| if (carry) ------------------ | Branch (2580:9): [True: 0, False: 0] ------------------ 2581| 0| return 1; 2582| | 2583| | /* We would overflow if any significant unwritten parts would be 2584| | non-zero. This is true if any remaining src parts are non-zero 2585| | and the multiplier is non-zero. */ 2586| 0| if (multiplier) ------------------ | Branch (2586:9): [True: 0, False: 0] ------------------ 2587| 0| for (; i < srcParts; i++) ------------------ | Branch (2587:14): [True: 0, False: 0] ------------------ 2588| 0| if (src[i]) ------------------ | Branch (2588:13): [True: 0, False: 0] ------------------ 2589| 0| return 1; 2590| | 2591| | /* We fitted in the narrow destination. */ 2592| 0| return 0; 2593| 0| } 2594| 12.9k|} _ZN7llvm_ks5APInt14tcFullMultiplyEPmPKmS3_jj: 2627| 4.50k|{ 2628| | /* Put the narrower number on the LHS for less loops below. */ 2629| 4.50k| if (lhsParts > rhsParts) { ------------------ | Branch (2629:7): [True: 0, False: 4.50k] ------------------ 2630| 0| return tcFullMultiply (dst, rhs, lhs, rhsParts, lhsParts); 2631| 4.50k| } else { 2632| 4.50k| unsigned int n; 2633| | 2634| 4.50k| assert(dst != lhs && dst != rhs); ------------------ | Branch (2634:5): [True: 4.50k, False: 0] | Branch (2634:5): [True: 4.50k, False: 0] | Branch (2634:5): [True: 4.50k, False: 0] ------------------ 2635| | 2636| 4.50k| tcSet(dst, 0, rhsParts); 2637| | 2638| 12.7k| for (n = 0; n < lhsParts; n++) ------------------ | Branch (2638:17): [True: 8.26k, False: 4.50k] ------------------ 2639| 8.26k| tcMultiplyPart(&dst[n], rhs, lhs[n], 0, rhsParts, rhsParts + 1, true); 2640| | 2641| 4.50k| n = lhsParts + rhsParts; 2642| | 2643| 4.50k| return n - (dst[n - 1] == 0); 2644| 4.50k| } 2645| 4.50k|} _ZN7llvm_ks5APInt11tcShiftLeftEPmjj: 2706| 354k|{ 2707| 354k| if (count) { ------------------ | Branch (2707:7): [True: 354k, False: 0] ------------------ 2708| 354k| unsigned int jump, shift; 2709| | 2710| | /* Jump is the inter-part jump; shift is is intra-part shift. */ 2711| 354k| jump = count / integerPartWidth; 2712| 354k| shift = count % integerPartWidth; 2713| | 2714| 19.8M| while (parts > jump) { ------------------ | Branch (2714:12): [True: 19.5M, False: 354k] ------------------ 2715| 19.5M| integerPart part; 2716| | 2717| 19.5M| parts--; 2718| | 2719| | /* dst[i] comes from the two parts src[i - jump] and, if we have 2720| | an intra-part shift, src[i - jump - 1]. */ 2721| 19.5M| part = dst[parts - jump]; 2722| 19.5M| if (shift) { ------------------ | Branch (2722:11): [True: 19.5M, False: 161] ------------------ 2723| 19.5M| part <<= shift; 2724| 19.5M| if (parts >= jump + 1) ------------------ | Branch (2724:13): [True: 19.1M, False: 354k] ------------------ 2725| 19.1M| part |= dst[parts - jump - 1] >> (integerPartWidth - shift); 2726| 19.5M| } 2727| | 2728| 19.5M| dst[parts] = part; 2729| 19.5M| } 2730| | 2731| 356k| while (parts > 0) ------------------ | Branch (2731:12): [True: 1.75k, False: 354k] ------------------ 2732| 1.75k| dst[--parts] = 0; 2733| 354k| } 2734| 354k|} _ZN7llvm_ks5APInt12tcShiftRightEPmjj: 2740| 8.84k|{ 2741| 8.84k| if (count) { ------------------ | Branch (2741:7): [True: 4.59k, False: 4.24k] ------------------ 2742| 4.59k| unsigned int i, jump, shift; 2743| | 2744| | /* Jump is the inter-part jump; shift is is intra-part shift. */ 2745| 4.59k| jump = count / integerPartWidth; 2746| 4.59k| shift = count % integerPartWidth; 2747| | 2748| | /* Perform the shift. This leaves the most significant COUNT bits 2749| | of the result at zero. */ 2750| 13.8k| for (i = 0; i < parts; i++) { ------------------ | Branch (2750:17): [True: 9.28k, False: 4.59k] ------------------ 2751| 9.28k| integerPart part; 2752| | 2753| 9.28k| if (i + jump >= parts) { ------------------ | Branch (2753:11): [True: 0, False: 9.28k] ------------------ 2754| 0| part = 0; 2755| 9.28k| } else { 2756| 9.28k| part = dst[i + jump]; 2757| 9.28k| if (shift) { ------------------ | Branch (2757:13): [True: 9.28k, False: 0] ------------------ 2758| 9.28k| part >>= shift; 2759| 9.28k| if (i + jump + 1 < parts) ------------------ | Branch (2759:15): [True: 4.68k, False: 4.59k] ------------------ 2760| 4.68k| part |= dst[i + jump + 1] << (integerPartWidth - shift); 2761| 9.28k| } 2762| 9.28k| } 2763| | 2764| 9.28k| dst[i] = part; 2765| 9.28k| } 2766| 4.59k| } 2767| 8.84k|} _ZN7llvm_ks5APInt9tcCompareEPKmS2_j: 2813| 353k|{ 2814| 356k| while (parts) { ------------------ | Branch (2814:10): [True: 356k, False: 24] ------------------ 2815| 356k| parts--; 2816| 356k| if (lhs[parts] == rhs[parts]) ------------------ | Branch (2816:11): [True: 2.99k, False: 353k] ------------------ 2817| 2.99k| continue; 2818| | 2819| 353k| if (lhs[parts] > rhs[parts]) ------------------ | Branch (2819:11): [True: 190k, False: 163k] ------------------ 2820| 190k| return 1; 2821| 163k| else 2822| 163k| return -1; 2823| 353k| } 2824| | 2825| 24| return 0; 2826| 353k|} _ZN7llvm_ks5APInt11tcIncrementEPmj: 2831| 1.60k|{ 2832| 1.60k| unsigned int i; 2833| | 2834| 1.71k| for (i = 0; i < parts; i++) ------------------ | Branch (2834:15): [True: 1.71k, False: 0] ------------------ 2835| 1.71k| if (++dst[i] != 0) ------------------ | Branch (2835:9): [True: 1.60k, False: 110] ------------------ 2836| 1.60k| break; 2837| | 2838| 1.60k| return i == parts; 2839| 1.60k|} APInt.cpp:_ZL16getClearedMemoryj: 34| 140k|inline static uint64_t* getClearedMemory(unsigned numWords) { 35| 140k| uint64_t * result = new uint64_t[numWords]; 36| 140k| assert(result && "APInt memory allocation fails!"); ------------------ | Branch (36:3): [True: 140k, False: 0] | Branch (36:3): [True: 140k, Folded] | Branch (36:3): [True: 140k, False: 0] ------------------ 37| 140k| memset(result, 0, numWords * sizeof(uint64_t)); 38| 140k| return result; 39| 140k|} APInt.cpp:_ZL9getMemoryj: 43| 234k|inline static uint64_t* getMemory(unsigned numWords) { 44| 234k| uint64_t * result = new uint64_t[numWords]; 45| 234k| assert(result && "APInt memory allocation fails!"); ------------------ | Branch (45:3): [True: 234k, False: 0] | Branch (45:3): [True: 234k, Folded] | Branch (45:3): [True: 234k, False: 0] ------------------ 46| 234k| return result; 47| 234k|} APInt.cpp:_ZN12_GLOBAL__N_17partLSBEm: 2298| 4.61k| { 2299| 4.61k| return findFirstSet(value, ZB_Max); 2300| 4.61k| } APInt.cpp:_ZN12_GLOBAL__N_17partMSBEm: 2290| 18.3k| { 2291| 18.3k| return findLastSet(value, ZB_Max); 2292| 18.3k| } APInt.cpp:_ZN12_GLOBAL__N_110lowBitMaskEj: 2266| 463k| { 2267| 463k| assert(bits != 0 && bits <= integerPartWidth); ------------------ | Branch (2267:5): [True: 463k, False: 0] | Branch (2267:5): [True: 463k, False: 0] | Branch (2267:5): [True: 463k, False: 0] ------------------ 2268| | 2269| 463k| return ~(integerPart) 0 >> (integerPartWidth - bits); 2270| 463k| } APInt.cpp:_ZN12_GLOBAL__N_17lowHalfEm: 2275| 455k| { 2276| 455k| return part & lowBitMask(integerPartWidth / 2); 2277| 455k| } APInt.cpp:_ZN12_GLOBAL__N_18highHalfEm: 2282| 683k| { 2283| 683k| return part >> (integerPartWidth / 2); 2284| 683k| } _ZN7llvm_ks12MemoryBufferD2Ev: 39| 7.74k|MemoryBuffer::~MemoryBuffer() { } _ZN7llvm_ks12MemoryBuffer4initEPKcS2_b: 44| 7.74k| bool RequiresNullTerminator) { 45| 7.74k| assert((!RequiresNullTerminator || BufEnd[0] == 0) && ------------------ | Branch (45:3): [True: 0, False: 7.74k] | Branch (45:3): [True: 7.74k, False: 0] | Branch (45:3): [True: 7.74k, Folded] | Branch (45:3): [True: 7.74k, False: 0] ------------------ 46| 7.74k| "Buffer is not null terminated!"); 47| 7.74k| BufferStart = BufStart; 48| 7.74k| BufferEnd = BufEnd; 49| 7.74k|} _ZN7llvm_ks12MemoryBuffer12getMemBufferENS_9StringRefES1_b: 104| 749| bool RequiresNullTerminator) { 105| 749| auto *Ret = new (NamedBufferAlloc(BufferName)) 106| 749| MemoryBufferMem(InputData, RequiresNullTerminator); 107| 749| return std::unique_ptr(Ret); 108| 749|} _ZN7llvm_ks12MemoryBuffer16getMemBufferCopyENS_9StringRefERKNS_5TwineE: 117| 6.99k|MemoryBuffer::getMemBufferCopy(StringRef InputData, const Twine &BufferName) { 118| 6.99k| std::unique_ptr Buf = 119| 6.99k| getNewUninitMemBuffer(InputData.size(), BufferName); 120| 6.99k| if (!Buf) ------------------ | Branch (120:7): [True: 0, False: 6.99k] ------------------ 121| 0| return nullptr; 122| 6.99k| memcpy(const_cast(Buf->getBufferStart()), InputData.data(), 123| 6.99k| InputData.size()); 124| 6.99k| return Buf; 125| 6.99k|} _ZN7llvm_ks12MemoryBuffer21getNewUninitMemBufferEmRKNS_5TwineE: 128| 6.99k|MemoryBuffer::getNewUninitMemBuffer(size_t Size, const Twine &BufferName) { 129| | // Allocate space for the MemoryBuffer, the data and the name. It is important 130| | // that MemoryBuffer and data are aligned so PointerIntPair works with them. 131| | // TODO: Is 16-byte alignment enough? We copy small object files with large 132| | // alignment expectations into this buffer. 133| 6.99k| SmallString<256> NameBuf; 134| 6.99k| StringRef NameRef = BufferName.toStringRef(NameBuf); 135| 6.99k| size_t AlignedStringLen = 136| 6.99k| alignTo(sizeof(MemoryBufferMem) + NameRef.size() + 1, 16); 137| 6.99k| size_t RealLen = AlignedStringLen + Size + 1; 138| 6.99k| char *Mem = static_cast(operator new(RealLen, std::nothrow)); 139| 6.99k| if (!Mem) ------------------ | Branch (139:7): [True: 0, False: 6.99k] ------------------ 140| 0| return nullptr; 141| | 142| | // The name is stored after the class itself. 143| 6.99k| CopyStringRef(Mem + sizeof(MemoryBufferMem), NameRef); 144| | 145| | // The buffer begins after the name and must be aligned. 146| 6.99k| char *Buf = Mem + AlignedStringLen; 147| 6.99k| Buf[Size] = 0; // Null terminate buffer. 148| | 149| 6.99k| auto *Ret = new (Mem) MemoryBufferMem(StringRef(Buf, Size), true); 150| 6.99k| return std::unique_ptr(Ret); 151| 6.99k|} MemoryBuffer.cpp:_ZN12_GLOBAL__N_116NamedBufferAllocC2ERKN7llvm_ks5TwineE: 66| 749| NamedBufferAlloc(const Twine &Name) : Name(Name) {} MemoryBuffer.cpp:_ZnwmRKN12_GLOBAL__N_116NamedBufferAllocE: 70| 749|void *operator new(size_t N, const NamedBufferAlloc &Alloc) { 71| 749| SmallString<256> NameBuf; 72| 749| StringRef NameRef = Alloc.Name.toStringRef(NameBuf); 73| | 74| 749| char *Mem = static_cast(operator new(N + NameRef.size() + 1)); 75| 749| CopyStringRef(Mem + N, NameRef); 76| 749| return Mem; 77| 749|} MemoryBuffer.cpp:_ZN12_GLOBAL__N_115MemoryBufferMemC2EN7llvm_ks9StringRefEb: 83| 7.74k| MemoryBufferMem(StringRef InputData, bool RequiresNullTerminator) { 84| 7.74k| init(InputData.begin(), InputData.end(), RequiresNullTerminator); 85| 7.74k| } MemoryBuffer.cpp:_ZNK12_GLOBAL__N_115MemoryBufferMem19getBufferIdentifierEv: 87| 44.9k| const char *getBufferIdentifier() const override { 88| | // The name is stored after the class itself. 89| 44.9k| return reinterpret_cast(this + 1); 90| 44.9k| } MemoryBuffer.cpp:_ZL13CopyStringRefPcN7llvm_ks9StringRefE: 57| 7.74k|static void CopyStringRef(char *Memory, StringRef Data) { 58| 7.74k| if (!Data.empty()) ------------------ | Branch (58:7): [True: 6.99k, False: 749] ------------------ 59| 6.99k| memcpy(Memory, Data.data(), Data.size()); 60| 7.74k| Memory[Data.size()] = 0; // Null terminate string. 61| 7.74k|} _ZN7llvm_ks3sys4path5beginENS_9StringRefE: 232| 749|const_iterator begin(StringRef path) { 233| 749| const_iterator i; 234| 749| i.Path = path; 235| 749| i.Component = find_first_component(path); 236| 749| i.Position = 0; 237| 749| return i; 238| 749|} _ZN7llvm_ks3sys4path3endENS_9StringRefE: 240| 749|const_iterator end(StringRef path) { 241| 749| const_iterator i; 242| 749| i.Path = path; 243| 749| i.Position = path.size(); 244| 749| return i; 245| 749|} _ZNK7llvm_ks3sys4path14const_iteratoreqERKS2_: 300| 749|bool const_iterator::operator==(const const_iterator &RHS) const { 301| 749| return Path.begin() == RHS.Path.begin() && Position == RHS.Position; ------------------ | Branch (301:10): [True: 749, False: 0] | Branch (301:46): [True: 0, False: 749] ------------------ 302| 749|} _ZN7llvm_ks3sys4path14root_directoryENS_9StringRefE: 409| 749|StringRef root_directory(StringRef path) { 410| 749| const_iterator b = begin(path), 411| 749| pos = b, 412| 749| e = end(path); 413| 749| if (b != e) { ------------------ | Branch (413:7): [True: 749, False: 0] ------------------ 414| 749| bool has_net = b->size() > 2 && is_separator((*b)[0]) && (*b)[1] == (*b)[0]; ------------------ | Branch (414:20): [True: 0, False: 749] | Branch (414:37): [True: 0, False: 0] | Branch (414:62): [True: 0, False: 0] ------------------ 415| 749| bool has_drive = 416| |#ifdef LLVM_ON_WIN32 417| | b->endswith(":"); 418| |#else 419| 749| false; 420| 749|#endif 421| | 422| 749| if ((has_net || has_drive) && ------------------ | Branch (422:10): [True: 0, False: 749] | Branch (422:21): [True: 0, False: 749] ------------------ 423| | // {C:,//net}, skip to the next component. 424| 0| (++pos != e) && is_separator((*pos)[0])) { ------------------ | Branch (424:9): [True: 0, False: 0] | Branch (424:25): [True: 0, False: 0] ------------------ 425| 0| return *pos; 426| 0| } 427| | 428| | // POSIX style root directory. 429| 749| if (!has_net && is_separator((*b)[0])) { ------------------ | Branch (429:9): [True: 749, False: 0] | Branch (429:21): [True: 749, False: 0] ------------------ 430| 749| return *b; 431| 749| } 432| 749| } 433| | 434| | // No path or no root. 435| 0| return StringRef(); 436| 749|} _ZN7llvm_ks3sys4path12is_separatorEc: 576| 2.24k|bool is_separator(char value) { 577| 2.24k| switch(value) { 578| |#ifdef LLVM_ON_WIN32 579| | case '\\': // fall through 580| |#endif 581| 2.24k| case '/': return true; ------------------ | Branch (581:5): [True: 2.24k, False: 0] ------------------ 582| 0| default: return false; ------------------ | Branch (582:5): [True: 0, False: 2.24k] ------------------ 583| 2.24k| } 584| 2.24k|} _ZN7llvm_ks3sys4path18has_root_directoryERKNS_5TwineE: 599| 749|bool has_root_directory(const Twine &path) { 600| 749| SmallString<128> path_storage; 601| 749| StringRef p = path.toStringRef(path_storage); 602| | 603| 749| return !root_directory(p).empty(); 604| 749|} _ZN7llvm_ks3sys4path11is_absoluteERKNS_5TwineE: 648| 749|bool is_absolute(const Twine &path) { 649| 749| SmallString<128> path_storage; 650| 749| StringRef p = path.toStringRef(path_storage); 651| | 652| 749| bool rootDir = has_root_directory(p), 653| |#ifdef LLVM_ON_WIN32 654| | rootName = has_root_name(p); 655| |#else 656| 749| rootName = true; 657| 749|#endif 658| | 659| 749| return rootDir && rootName; ------------------ | Branch (659:10): [True: 749, False: 0] | Branch (659:21): [True: 749, False: 0] ------------------ 660| 749|} Path.cpp:_ZN12_GLOBAL__N_120find_first_componentEN7llvm_ks9StringRefE: 45| 749| StringRef find_first_component(StringRef path) { 46| | // Look for this first component in the following order. 47| | // * empty (in this case we return an empty string) 48| | // * either C: or {//,\\}net. 49| | // * {/,\} 50| | // * {file,directory}name 51| | 52| 749| if (path.empty()) ------------------ | Branch (52:9): [True: 0, False: 749] ------------------ 53| 0| return path; 54| | 55| |#ifdef LLVM_ON_WIN32 56| | // C: 57| | if (path.size() >= 2 && std::isalpha(static_cast(path[0])) && 58| | path[1] == ':') 59| | return path.substr(0, 2); 60| |#endif 61| | 62| | // //net 63| 749| if ((path.size() > 2) && ------------------ | Branch (63:9): [True: 749, False: 0] ------------------ 64| 749| is_separator(path[0]) && ------------------ | Branch (64:9): [True: 749, False: 0] ------------------ 65| 749| path[0] == path[1] && ------------------ | Branch (65:9): [True: 0, False: 749] ------------------ 66| 0| !is_separator(path[2])) { ------------------ | Branch (66:9): [True: 0, False: 0] ------------------ 67| | // Find the next directory separator. 68| 0| size_t end = path.find_first_of(separators, 2); 69| 0| return path.substr(0, end); 70| 0| } 71| | 72| | // {/,\} 73| 749| if (is_separator(path[0])) ------------------ | Branch (73:9): [True: 749, False: 0] ------------------ 74| 749| return path.substr(0, 1); 75| | 76| | // * {file,directory}name 77| 0| size_t end = path.find_first_of(separators); 78| 0| return path.substr(0, end); 79| 749| } _ZN7llvm_ks15SmallVectorBase8grow_podEPvmm: 20| 27.6k| size_t TSize) { 21| 27.6k| size_t CurSizeBytes = size_in_bytes(); 22| 27.6k| size_t NewCapacityInBytes = 2 * capacity_in_bytes() + TSize; // Always grow. 23| 27.6k| if (NewCapacityInBytes < MinSizeInBytes) ------------------ | Branch (23:7): [True: 6.57k, False: 21.1k] ------------------ 24| 6.57k| NewCapacityInBytes = MinSizeInBytes; 25| | 26| 27.6k| void *NewElts; 27| 27.6k| if (BeginX == FirstEl) { ------------------ | Branch (27:7): [True: 12.7k, False: 14.9k] ------------------ 28| 12.7k| NewElts = malloc(NewCapacityInBytes); 29| | 30| | // Copy the elements over. No need to run dtors on PODs. 31| 12.7k| memcpy(NewElts, this->BeginX, CurSizeBytes); 32| 14.9k| } else { 33| | // If this wasn't grown from the inline copy, grow the allocated space. 34| 14.9k| NewElts = realloc(this->BeginX, NewCapacityInBytes); 35| 14.9k| } 36| 27.6k| assert(NewElts && "Out of memory"); ------------------ | Branch (36:3): [True: 27.6k, False: 0] | Branch (36:3): [True: 27.6k, Folded] | Branch (36:3): [True: 27.6k, False: 0] ------------------ 37| | 38| 27.6k| this->EndX = (char*)NewElts+CurSizeBytes; 39| 27.6k| this->BeginX = NewElts; 40| 27.6k| this->CapacityX = (char*)this->BeginX + NewCapacityInBytes; 41| 27.6k|} _ZN7llvm_ks9SourceMgrD2Ev: 38| 749|SourceMgr::~SourceMgr() { 39| | // Delete the line # cache if allocated. 40| 749| if (LineNoCacheTy *Cache = getCache(LineNoCache)) ------------------ | Branch (40:22): [True: 222, False: 527] ------------------ 41| 222| delete Cache; 42| 749|} _ZNK7llvm_ks9SourceMgr23FindBufferContainingLocENS_5SMLocE: 65| 182k|unsigned SourceMgr::FindBufferContainingLoc(SMLoc Loc) const { 66| 367k| for (unsigned i = 0, e = Buffers.size(); i != e; ++i) ------------------ | Branch (66:44): [True: 320k, False: 47.3k] ------------------ 67| 320k| if (Loc.getPointer() >= Buffers[i].Buffer->getBufferStart() && ------------------ | Branch (67:9): [True: 147k, False: 172k] ------------------ 68| | // Use <= here so that a pointer to the null at the end of the buffer 69| | // is included as part of the buffer. 70| 147k| Loc.getPointer() <= Buffers[i].Buffer->getBufferEnd()) ------------------ | Branch (70:9): [True: 135k, False: 12.0k] ------------------ 71| 135k| return i + 1; 72| 47.3k| return 0; 73| 182k|} _ZNK7llvm_ks9SourceMgr16getLineAndColumnENS_5SMLocEj: 76| 45.6k|SourceMgr::getLineAndColumn(SMLoc Loc, unsigned BufferID) const { 77| 45.6k| if (!BufferID) ------------------ | Branch (77:7): [True: 0, False: 45.6k] ------------------ 78| 0| BufferID = FindBufferContainingLoc(Loc); 79| 45.6k| assert(BufferID && "Invalid Location!"); ------------------ | Branch (79:3): [True: 45.6k, False: 0] | Branch (79:3): [True: 45.6k, Folded] | Branch (79:3): [True: 45.6k, False: 0] ------------------ 80| | 81| 45.6k| const MemoryBuffer *Buff = getMemoryBuffer(BufferID); 82| | 83| | // Count the number of \n's between the start of the file and the specified 84| | // location. 85| 45.6k| unsigned LineNo = 1; 86| | 87| 45.6k| const char *BufStart = Buff->getBufferStart(); 88| 45.6k| const char *Ptr = BufStart; 89| | 90| | // If we have a line number cache, and if the query is to a later point in the 91| | // same file, start searching from the last query location. This optimizes 92| | // for the case when multiple diagnostics come out of one file in order. 93| 45.6k| if (LineNoCacheTy *Cache = getCache(LineNoCache)) ------------------ | Branch (93:22): [True: 45.4k, False: 222] ------------------ 94| 45.4k| if (Cache->LastQueryBufferID == BufferID && ------------------ | Branch (94:9): [True: 3.25k, False: 42.1k] ------------------ 95| 3.25k| Cache->LastQuery <= Loc.getPointer()) { ------------------ | Branch (95:9): [True: 2.91k, False: 342] ------------------ 96| 2.91k| Ptr = Cache->LastQuery; 97| 2.91k| LineNo = Cache->LineNoOfQuery; 98| 2.91k| } 99| | 100| | // Scan for the location being queried, keeping track of the number of lines 101| | // we see. 102| 357M| for (; SMLoc::getFromPointer(Ptr) != Loc; ++Ptr) ------------------ | Branch (102:10): [True: 357M, False: 45.6k] ------------------ 103| 357M| if (*Ptr == '\n') ++LineNo; ------------------ | Branch (103:9): [True: 9.24M, False: 347M] ------------------ 104| | 105| | // Allocate the line number cache if it doesn't exist. 106| 45.6k| if (!LineNoCache) ------------------ | Branch (106:7): [True: 222, False: 45.4k] ------------------ 107| 222| LineNoCache = new LineNoCacheTy(); 108| | 109| | // Update the line # cache. 110| 45.6k| LineNoCacheTy &Cache = *getCache(LineNoCache); 111| 45.6k| Cache.LastQueryBufferID = BufferID; 112| 45.6k| Cache.LastQuery = Ptr; 113| 45.6k| Cache.LineNoOfQuery = LineNo; 114| | 115| 45.6k| size_t NewlineOffs = StringRef(BufStart, Ptr-BufStart).find_last_of("\n\r"); 116| 45.6k| if (NewlineOffs == StringRef::npos) NewlineOffs = ~(size_t)0; ------------------ | Branch (116:7): [True: 892, False: 44.7k] ------------------ 117| 45.6k| return std::make_pair(LineNo, Ptr-BufStart-NewlineOffs); 118| 45.6k|} _ZNK7llvm_ks9SourceMgr17PrintIncludeStackENS_5SMLocERNS_11raw_ostreamE: 120| 21.3k|void SourceMgr::PrintIncludeStack(SMLoc IncludeLoc, raw_ostream &OS) const { 121| 21.3k| if (IncludeLoc == SMLoc()) return; // Top of stack. ------------------ | Branch (121:7): [True: 21.3k, False: 0] ------------------ 122| | 123| 0| unsigned CurBuf = FindBufferContainingLoc(IncludeLoc); 124| 0| assert(CurBuf && "Invalid or unspecified location!"); ------------------ | Branch (124:3): [True: 0, False: 0] | Branch (124:3): [True: 0, Folded] | Branch (124:3): [True: 0, False: 0] ------------------ 125| | 126| 0| PrintIncludeStack(getBufferInfo(CurBuf).IncludeLoc, OS); 127| | 128| 0| OS << "Included from " 129| 0| << getBufferInfo(CurBuf).Buffer->getBufferIdentifier() 130| 0| << ":" << FindLineNumber(IncludeLoc, CurBuf) << ":\n"; 131| 0|} _ZNK7llvm_ks9SourceMgr10GetMessageENS_5SMLocENS0_8DiagKindERKNS_5TwineENS_8ArrayRefINS_7SMRangeEEENS6_INS_7SMFixItEEE: 137| 45.9k| ArrayRef FixIts) const { 138| | 139| | // First thing to do: find the current buffer containing the specified 140| | // location to pull out the source line. 141| 45.9k| SmallVector, 4> ColRanges; 142| 45.9k| std::pair LineAndCol; 143| 45.9k| const char *BufferID = ""; 144| 45.9k| std::string LineStr; 145| | 146| 45.9k| if (Loc.isValid()) { ------------------ | Branch (146:7): [True: 44.9k, False: 1.02k] ------------------ 147| 44.9k| unsigned CurBuf = FindBufferContainingLoc(Loc); 148| 44.9k| assert(CurBuf && "Invalid or unspecified location!"); ------------------ | Branch (148:5): [True: 44.9k, False: 0] | Branch (148:5): [True: 44.9k, Folded] | Branch (148:5): [True: 44.9k, False: 0] ------------------ 149| | 150| 44.9k| const MemoryBuffer *CurMB = getMemoryBuffer(CurBuf); 151| 44.9k| BufferID = CurMB->getBufferIdentifier(); 152| | 153| | // Scan backward to find the start of the line. 154| 44.9k| const char *LineStart = Loc.getPointer(); 155| 44.9k| const char *BufStart = CurMB->getBufferStart(); 156| 406k| while (LineStart != BufStart && LineStart[-1] != '\n' && ------------------ | Branch (156:12): [True: 405k, False: 892] | Branch (156:37): [True: 390k, False: 15.0k] ------------------ 157| 390k| LineStart[-1] != '\r') ------------------ | Branch (157:12): [True: 361k, False: 29.0k] ------------------ 158| 361k| --LineStart; 159| | 160| | // Get the end of the line. 161| 44.9k| const char *LineEnd = Loc.getPointer(); 162| 44.9k| const char *BufEnd = CurMB->getBufferEnd(); 163| 3.23M| while (LineEnd != BufEnd && LineEnd[0] != '\n' && LineEnd[0] != '\r') ------------------ | Branch (163:12): [True: 3.23M, False: 268] | Branch (163:33): [True: 3.21M, False: 20.3k] | Branch (163:55): [True: 3.18M, False: 24.3k] ------------------ 164| 3.18M| ++LineEnd; 165| 44.9k| LineStr = std::string(LineStart, LineEnd); 166| | 167| | // Convert any ranges to column ranges that only intersect the line of the 168| | // location. 169| 44.9k| for (unsigned i = 0, e = Ranges.size(); i != e; ++i) { ------------------ | Branch (169:45): [True: 0, False: 44.9k] ------------------ 170| 0| SMRange R = Ranges[i]; 171| 0| if (!R.isValid()) continue; ------------------ | Branch (171:11): [True: 0, False: 0] ------------------ 172| | 173| | // If the line doesn't contain any part of the range, then ignore it. 174| 0| if (R.Start.getPointer() > LineEnd || R.End.getPointer() < LineStart) ------------------ | Branch (174:11): [True: 0, False: 0] | Branch (174:45): [True: 0, False: 0] ------------------ 175| 0| continue; 176| | 177| | // Ignore pieces of the range that go onto other lines. 178| 0| if (R.Start.getPointer() < LineStart) ------------------ | Branch (178:11): [True: 0, False: 0] ------------------ 179| 0| R.Start = SMLoc::getFromPointer(LineStart); 180| 0| if (R.End.getPointer() > LineEnd) ------------------ | Branch (180:11): [True: 0, False: 0] ------------------ 181| 0| R.End = SMLoc::getFromPointer(LineEnd); 182| | 183| | // Translate from SMLoc ranges to column ranges. 184| | // FIXME: Handle multibyte characters. 185| 0| ColRanges.push_back(std::make_pair(R.Start.getPointer()-LineStart, 186| 0| R.End.getPointer()-LineStart)); 187| 0| } 188| | 189| 44.9k| LineAndCol = getLineAndColumn(Loc, CurBuf); 190| 44.9k| } 191| | 192| 45.9k| return SMDiagnostic(*this, Loc, BufferID, LineAndCol.first, 193| 45.9k| LineAndCol.second-1, Kind, Msg.str(), 194| 45.9k| LineStr, ColRanges, FixIts); 195| 45.9k|} _ZNK7llvm_ks9SourceMgr12PrintMessageERNS_11raw_ostreamERKNS_12SMDiagnosticEb: 198| 45.9k| bool ShowColors) const { 199| | // Report the message with the diagnostic handler if present. 200| 45.9k| if (DiagHandler) { ------------------ | Branch (200:7): [True: 45.9k, False: 0] ------------------ 201| 45.9k| DiagHandler(Diagnostic, DiagContext); 202| 45.9k| return; 203| 45.9k| } 204| | 205| 0| if (Diagnostic.getLoc().isValid()) { ------------------ | Branch (205:7): [True: 0, False: 0] ------------------ 206| 0| unsigned CurBuf = FindBufferContainingLoc(Diagnostic.getLoc()); 207| 0| assert(CurBuf && "Invalid or unspecified location!"); ------------------ | Branch (207:5): [True: 0, False: 0] | Branch (207:5): [True: 0, Folded] | Branch (207:5): [True: 0, False: 0] ------------------ 208| 0| PrintIncludeStack(getBufferInfo(CurBuf).IncludeLoc, OS); 209| 0| } 210| | 211| 0| Diagnostic.print(nullptr, OS, ShowColors); 212| 0|} _ZNK7llvm_ks9SourceMgr12PrintMessageERNS_11raw_ostreamENS_5SMLocENS0_8DiagKindERKNS_5TwineENS_8ArrayRefINS_7SMRangeEEENS8_INS_7SMFixItEEEb: 217| 45.9k| ArrayRef FixIts, bool ShowColors) const { 218| 45.9k| PrintMessage(OS, GetMessage(Loc, Kind, Msg, Ranges, FixIts), ShowColors); 219| 45.9k|} _ZNK7llvm_ks9SourceMgr12PrintMessageENS_5SMLocENS0_8DiagKindERKNS_5TwineENS_8ArrayRefINS_7SMRangeEEENS6_INS_7SMFixItEEEb: 223| 45.9k| ArrayRef FixIts, bool ShowColors) const { 224| 45.9k| PrintMessage(llvm_ks::errs(), Loc, Kind, Msg, Ranges, FixIts, ShowColors); 225| 45.9k|} _ZN7llvm_ks12SMDiagnosticC2ERKNS_9SourceMgrENS_5SMLocENS_9StringRefEiiNS1_8DiagKindES5_S5_NS_8ArrayRefINSt3__14pairIjjEEEENS7_INS_7SMFixItEEE: 236| 46.3k| : SM(&sm), Loc(L), Filename(FN), LineNo(Line), ColumnNo(Col), Kind(Kind), 237| 46.3k| Message(Msg), LineContents(LineStr), Ranges(Ranges.vec()), 238| 46.3k| FixIts(Hints.begin(), Hints.end()) { 239| 46.3k| std::sort(FixIts.begin(), FixIts.end()); 240| 46.3k|} _ZNK7llvm_ks12SMDiagnostic5printEPKcRNS_11raw_ostreamEbb: 329| 45.9k| bool ShowKindLabel) const { 330| | // Display colors only if OS supports colors. 331| 45.9k| ShowColors &= S.has_colors(); 332| | 333| 45.9k| if (ShowColors) ------------------ | Branch (333:7): [True: 45.9k, False: 0] ------------------ 334| 45.9k| S.changeColor(raw_ostream::SAVEDCOLOR, true); 335| | 336| 45.9k| if (ProgName && ProgName[0]) ------------------ | Branch (336:7): [True: 0, False: 45.9k] | Branch (336:19): [True: 0, False: 0] ------------------ 337| 0| S << ProgName << ": "; 338| | 339| 45.9k| if (!Filename.empty()) { ------------------ | Branch (339:7): [True: 22.3k, False: 23.6k] ------------------ 340| 22.3k| if (Filename == "-") ------------------ | Branch (340:9): [True: 0, False: 22.3k] ------------------ 341| 0| S << ""; 342| 22.3k| else 343| 22.3k| S << Filename; 344| | 345| 22.3k| if (LineNo != -1) { ------------------ | Branch (345:9): [True: 22.3k, False: 0] ------------------ 346| 22.3k| S << ':' << LineNo; 347| 22.3k| if (ColumnNo != -1) ------------------ | Branch (347:11): [True: 21.2k, False: 1.02k] ------------------ 348| 21.2k| S << ':' << (ColumnNo+1); 349| 22.3k| } 350| 22.3k| S << ": "; 351| 22.3k| } 352| | 353| 45.9k| if (ShowKindLabel) { ------------------ | Branch (353:7): [True: 45.9k, False: 0] ------------------ 354| 45.9k| switch (Kind) { ------------------ | Branch (354:13): [True: 45.9k, False: 0] ------------------ 355| 22.6k| case SourceMgr::DK_Error: ------------------ | Branch (355:5): [True: 22.6k, False: 23.3k] ------------------ 356| 22.6k| if (ShowColors) ------------------ | Branch (356:11): [True: 22.6k, False: 0] ------------------ 357| 22.6k| S.changeColor(raw_ostream::RED, true); 358| 22.6k| S << "error: "; 359| 22.6k| break; 360| 1.98k| case SourceMgr::DK_Warning: ------------------ | Branch (360:5): [True: 1.98k, False: 44.0k] ------------------ 361| 1.98k| if (ShowColors) ------------------ | Branch (361:11): [True: 1.98k, False: 0] ------------------ 362| 1.98k| S.changeColor(raw_ostream::MAGENTA, true); 363| 1.98k| S << "warning: "; 364| 1.98k| break; 365| 21.3k| case SourceMgr::DK_Note: ------------------ | Branch (365:5): [True: 21.3k, False: 24.6k] ------------------ 366| 21.3k| if (ShowColors) ------------------ | Branch (366:11): [True: 21.3k, False: 0] ------------------ 367| 21.3k| S.changeColor(raw_ostream::BLACK, true); 368| 21.3k| S << "note: "; 369| 21.3k| break; 370| 45.9k| } 371| | 372| 45.9k| if (ShowColors) { ------------------ | Branch (372:9): [True: 45.9k, False: 0] ------------------ 373| 45.9k| S.resetColor(); 374| 45.9k| S.changeColor(raw_ostream::SAVEDCOLOR, true); 375| 45.9k| } 376| 45.9k| } 377| | 378| 45.9k| S << Message << '\n'; 379| | 380| 45.9k| if (ShowColors) ------------------ | Branch (380:7): [True: 45.9k, False: 0] ------------------ 381| 45.9k| S.resetColor(); 382| | 383| 45.9k| if (LineNo == -1 || ColumnNo == -1) ------------------ | Branch (383:7): [True: 0, False: 45.9k] | Branch (383:23): [True: 1.02k, False: 44.9k] ------------------ 384| 1.02k| return; 385| | 386| | // FIXME: If there are multibyte or multi-column characters in the source, all 387| | // our ranges will be wrong. To do this properly, we'll need a byte-to-column 388| | // map like Clang's TextDiagnostic. For now, we'll just handle tabs by 389| | // expanding them later, and bail out rather than show incorrect ranges and 390| | // misaligned fixits for any other odd characters. 391| 44.9k| if (std::find_if(LineContents.begin(), LineContents.end(), isNonASCII) != ------------------ | Branch (391:7): [True: 34.1k, False: 10.7k] ------------------ 392| 44.9k| LineContents.end()) { 393| 34.1k| printSourceLine(S, LineContents); 394| 34.1k| return; 395| 34.1k| } 396| 10.7k| size_t NumColumns = LineContents.size(); 397| | 398| | // Build the line with the caret and ranges. 399| 10.7k| std::string CaretLine(NumColumns+1, ' '); 400| | 401| | // Expand any ranges. 402| 10.7k| for (unsigned r = 0, e = Ranges.size(); r != e; ++r) { ------------------ | Branch (402:43): [True: 0, False: 10.7k] ------------------ 403| 0| std::pair R = Ranges[r]; 404| 0| std::fill(&CaretLine[R.first], 405| 0| &CaretLine[std::min((size_t)R.second, CaretLine.size())], 406| 0| '~'); 407| 0| } 408| | 409| | // Add any fix-its. 410| | // FIXME: Find the beginning of the line properly for multibyte characters. 411| 10.7k| std::string FixItInsertionLine; 412| 10.7k| buildFixItLine(CaretLine, FixItInsertionLine, FixIts, 413| 10.7k| makeArrayRef(Loc.getPointer() - ColumnNo, 414| 10.7k| LineContents.size())); 415| | 416| | // Finally, plop on the caret. 417| 10.7k| if (unsigned(ColumnNo) <= NumColumns) ------------------ | Branch (417:7): [True: 10.7k, False: 0] ------------------ 418| 10.7k| CaretLine[ColumnNo] = '^'; 419| 0| else 420| 0| CaretLine[NumColumns] = '^'; 421| | 422| | // ... and remove trailing whitespace so the output doesn't wrap for it. We 423| | // know that the line isn't completely empty because it has the caret in it at 424| | // least. 425| 10.7k| CaretLine.erase(CaretLine.find_last_not_of(' ')+1); 426| | 427| 10.7k| printSourceLine(S, LineContents); 428| | 429| 10.7k| if (ShowColors) ------------------ | Branch (429:7): [True: 10.7k, False: 0] ------------------ 430| 10.7k| S.changeColor(raw_ostream::GREEN, true); 431| | 432| | // Print out the caret line, matching tabs in the source line. 433| 241k| for (unsigned i = 0, e = CaretLine.size(), OutCol = 0; i != e; ++i) { ------------------ | Branch (433:58): [True: 230k, False: 10.7k] ------------------ 434| 230k| if (i >= LineContents.size() || LineContents[i] != '\t') { ------------------ | Branch (434:9): [True: 448, False: 230k] | Branch (434:37): [True: 223k, False: 7.24k] ------------------ 435| 223k| S << CaretLine[i]; 436| 223k| ++OutCol; 437| 223k| continue; 438| 223k| } 439| | 440| | // Okay, we have a tab. Insert the appropriate number of characters. 441| 26.5k| do { 442| 26.5k| S << CaretLine[i]; 443| 26.5k| ++OutCol; 444| 26.5k| } while ((OutCol % TabStop) != 0); ------------------ | Branch (444:14): [True: 19.2k, False: 7.24k] ------------------ 445| 7.24k| } 446| 10.7k| S << '\n'; 447| | 448| 10.7k| if (ShowColors) ------------------ | Branch (448:7): [True: 10.7k, False: 0] ------------------ 449| 10.7k| S.resetColor(); 450| | 451| | // Print out the replacement line, matching tabs in the source line. 452| 10.7k| if (FixItInsertionLine.empty()) ------------------ | Branch (452:7): [True: 10.7k, False: 0] ------------------ 453| 10.7k| return; 454| | 455| 0| for (size_t i = 0, e = FixItInsertionLine.size(), OutCol = 0; i < e; ++i) { ------------------ | Branch (455:65): [True: 0, False: 0] ------------------ 456| 0| if (i >= LineContents.size() || LineContents[i] != '\t') { ------------------ | Branch (456:9): [True: 0, False: 0] | Branch (456:37): [True: 0, False: 0] ------------------ 457| 0| S << FixItInsertionLine[i]; 458| 0| ++OutCol; 459| 0| continue; 460| 0| } 461| | 462| | // Okay, we have a tab. Insert the appropriate number of characters. 463| 0| do { 464| 0| S << FixItInsertionLine[i]; 465| | // FIXME: This is trying not to break up replacements, but then to re-sync 466| | // with the tabs between replacements. This will fail, though, if two 467| | // fix-it replacements are exactly adjacent, or if a fix-it contains a 468| | // space. Really we should be precomputing column widths, which we'll 469| | // need anyway for multibyte chars. 470| 0| if (FixItInsertionLine[i] != ' ') ------------------ | Branch (470:11): [True: 0, False: 0] ------------------ 471| 0| ++i; 472| 0| ++OutCol; 473| 0| } while (((OutCol % TabStop) != 0) && i != e); ------------------ | Branch (473:14): [True: 0, False: 0] | Branch (473:43): [True: 0, False: 0] ------------------ 474| 0| } 475| 0| S << '\n'; 476| 0|} SourceMgr.cpp:_ZL8getCachePv: 33| 92.0k|static LineNoCacheTy *getCache(void *Ptr) { 34| 92.0k| return (LineNoCacheTy*)Ptr; 35| 92.0k|} SourceMgr.cpp:_ZL10isNonASCIIc: 324| 2.70M|static bool isNonASCII(char c) { 325| 2.70M| return c & 0x80; 326| 2.70M|} SourceMgr.cpp:_ZL15printSourceLineRN7llvm_ks11raw_ostreamENS_9StringRefE: 306| 44.9k|static void printSourceLine(raw_ostream &S, StringRef LineContents) { 307| | // Print out the source line one character at a time, so we can expand tabs. 308| 3.59M| for (unsigned i = 0, e = LineContents.size(), OutCol = 0; i != e; ++i) { ------------------ | Branch (308:61): [True: 3.54M, False: 44.9k] ------------------ 309| 3.54M| if (LineContents[i] != '\t') { ------------------ | Branch (309:9): [True: 3.52M, False: 17.7k] ------------------ 310| 3.52M| S << LineContents[i]; 311| 3.52M| ++OutCol; 312| 3.52M| continue; 313| 3.52M| } 314| | 315| | // If we have a tab, emit at least one space, then round up to 8 columns. 316| 65.2k| do { 317| 65.2k| S << ' '; 318| 65.2k| ++OutCol; 319| 65.2k| } while ((OutCol % TabStop) != 0); ------------------ | Branch (319:14): [True: 47.5k, False: 17.7k] ------------------ 320| 17.7k| } 321| 44.9k| S << '\n'; 322| 44.9k|} SourceMgr.cpp:_ZL14buildFixItLineRNSt3__112basic_stringIcNS_11char_traitsIcEENS_9allocatorIcEEEES6_N7llvm_ks8ArrayRefINS7_7SMFixItEEENS8_IcEE: 243| 10.7k| ArrayRef FixIts, ArrayRef SourceLine){ 244| 10.7k| if (FixIts.empty()) ------------------ | Branch (244:7): [True: 10.7k, False: 0] ------------------ 245| 10.7k| return; 246| | 247| 0| const char *LineStart = SourceLine.begin(); 248| 0| const char *LineEnd = SourceLine.end(); 249| | 250| 0| size_t PrevHintEndCol = 0; 251| | 252| 0| for (ArrayRef::iterator I = FixIts.begin(), E = FixIts.end(); 253| 0| I != E; ++I) { ------------------ | Branch (253:8): [True: 0, False: 0] ------------------ 254| | // If the fixit contains a newline or tab, ignore it. 255| 0| if (I->getText().find_first_of("\n\r\t") != StringRef::npos) ------------------ | Branch (255:9): [True: 0, False: 0] ------------------ 256| 0| continue; 257| | 258| 0| SMRange R = I->getRange(); 259| | 260| | // If the line doesn't contain any part of the range, then ignore it. 261| 0| if (R.Start.getPointer() > LineEnd || R.End.getPointer() < LineStart) ------------------ | Branch (261:9): [True: 0, False: 0] | Branch (261:43): [True: 0, False: 0] ------------------ 262| 0| continue; 263| | 264| | // Translate from SMLoc to column. 265| | // Ignore pieces of the range that go onto other lines. 266| | // FIXME: Handle multibyte characters in the source line. 267| 0| unsigned FirstCol; 268| 0| if (R.Start.getPointer() < LineStart) ------------------ | Branch (268:9): [True: 0, False: 0] ------------------ 269| 0| FirstCol = 0; 270| 0| else 271| 0| FirstCol = R.Start.getPointer() - LineStart; 272| | 273| | // If we inserted a long previous hint, push this one forwards, and add 274| | // an extra space to show that this is not part of the previous 275| | // completion. This is sort of the best we can do when two hints appear 276| | // to overlap. 277| | // 278| | // Note that if this hint is located immediately after the previous 279| | // hint, no space will be added, since the location is more important. 280| 0| unsigned HintCol = FirstCol; 281| 0| if (HintCol < PrevHintEndCol) ------------------ | Branch (281:9): [True: 0, False: 0] ------------------ 282| 0| HintCol = PrevHintEndCol + 1; 283| | 284| | // This relies on one byte per column in our fixit hints. 285| 0| unsigned LastColumnModified = HintCol + I->getText().size(); 286| 0| if (LastColumnModified > FixItLine.size()) ------------------ | Branch (286:9): [True: 0, False: 0] ------------------ 287| 0| FixItLine.resize(LastColumnModified, ' '); 288| | 289| 0| std::copy(I->getText().begin(), I->getText().end(), 290| 0| FixItLine.begin() + HintCol); 291| | 292| 0| PrevHintEndCol = LastColumnModified; 293| | 294| | // For replacements, mark the removal range with '~'. 295| | // FIXME: Handle multibyte characters in the source line. 296| 0| unsigned LastCol; 297| 0| if (R.End.getPointer() >= LineEnd) ------------------ | Branch (297:9): [True: 0, False: 0] ------------------ 298| 0| LastCol = LineEnd - LineStart; 299| 0| else 300| 0| LastCol = R.End.getPointer() - LineStart; 301| | 302| 0| std::fill(&CaretLine[FirstCol], &CaretLine[LastCol], '~'); 303| 0| } 304| 0|} _ZN7llvm_ks13StringMapImpl4initEj: 36| 3.85k|void StringMapImpl::init(unsigned InitSize) { 37| 3.85k| assert((InitSize & (InitSize-1)) == 0 && ------------------ | Branch (37:3): [True: 3.85k, False: 0] | Branch (37:3): [True: 3.85k, Folded] | Branch (37:3): [True: 3.85k, False: 0] ------------------ 38| 3.85k| "Init Size must be a power of 2 or zero!"); 39| 3.85k| NumBuckets = InitSize ? InitSize : 16; ------------------ | Branch (39:16): [True: 3.85k, False: 0] ------------------ 40| 3.85k| NumItems = 0; 41| 3.85k| NumTombstones = 0; 42| | 43| 3.85k| TheTable = (StringMapEntryBase **)calloc(NumBuckets+1, 44| 3.85k| sizeof(StringMapEntryBase **) + 45| 3.85k| sizeof(unsigned)); 46| | 47| | // Allocate one extra bucket, set it to look filled so the iterators stop at 48| | // end. 49| 3.85k| TheTable[NumBuckets] = (StringMapEntryBase*)2; 50| 3.85k|} _ZN7llvm_ks13StringMapImpl15LookupBucketForENS_9StringRefE: 58| 197k|unsigned StringMapImpl::LookupBucketFor(StringRef Name) { 59| 197k| unsigned HTSize = NumBuckets; 60| 197k| if (HTSize == 0) { // Hash table unallocated so far? ------------------ | Branch (60:7): [True: 3.85k, False: 193k] ------------------ 61| 3.85k| init(16); 62| 3.85k| HTSize = NumBuckets; 63| 3.85k| } 64| 197k| unsigned FullHashValue = HashString(Name); 65| 197k| unsigned BucketNo = FullHashValue & (HTSize-1); 66| 197k| unsigned *HashTable = (unsigned *)(TheTable + NumBuckets + 1); 67| | 68| 197k| unsigned ProbeAmt = 1; 69| 197k| int FirstTombstone = -1; 70| 457k| while (1) { ------------------ | Branch (70:10): [True: 457k, Folded] ------------------ 71| 457k| StringMapEntryBase *BucketItem = TheTable[BucketNo]; 72| | // If we found an empty bucket, this key isn't in the table yet, return it. 73| 457k| if (LLVM_LIKELY(!BucketItem)) { ------------------ | | 170| 457k|#define LLVM_LIKELY(EXPR) __builtin_expect((bool)(EXPR), true) | | ------------------ | | | Branch (170:27): [True: 171k, False: 285k] | | ------------------ ------------------ 74| | // If we found a tombstone, we want to reuse the tombstone instead of an 75| | // empty bucket. This reduces probing. 76| 171k| if (FirstTombstone != -1) { ------------------ | Branch (76:11): [True: 0, False: 171k] ------------------ 77| 0| HashTable[FirstTombstone] = FullHashValue; 78| 0| return FirstTombstone; 79| 0| } 80| | 81| 171k| HashTable[BucketNo] = FullHashValue; 82| 171k| return BucketNo; 83| 171k| } 84| | 85| 285k| if (BucketItem == getTombstoneVal()) { ------------------ | Branch (85:9): [True: 0, False: 285k] ------------------ 86| | // Skip over tombstones. However, remember the first one we see. 87| 0| if (FirstTombstone == -1) FirstTombstone = BucketNo; ------------------ | Branch (87:11): [True: 0, False: 0] ------------------ 88| 285k| } else if (LLVM_LIKELY(HashTable[BucketNo] == FullHashValue)) { ------------------ | | 170| 285k|#define LLVM_LIKELY(EXPR) __builtin_expect((bool)(EXPR), true) | | ------------------ | | | Branch (170:27): [True: 26.8k, False: 258k] | | ------------------ ------------------ 89| | // If the full hash value matches, check deeply for a match. The common 90| | // case here is that we are only looking at the buckets (for item info 91| | // being non-null and for the full hash value) not at the items. This 92| | // is important for cache locality. 93| | 94| | // Do the comparison like this because Name isn't necessarily 95| | // null-terminated! 96| 26.8k| char *ItemStr = (char*)BucketItem+ItemSize; 97| 26.8k| if (Name == StringRef(ItemStr, BucketItem->getKeyLength())) { ------------------ | Branch (97:11): [True: 26.1k, False: 663] ------------------ 98| | // We found a match! 99| 26.1k| return BucketNo; 100| 26.1k| } 101| 26.8k| } 102| | 103| | // Okay, we didn't find the item. Probe to the next bucket. 104| 259k| BucketNo = (BucketNo+ProbeAmt) & (HTSize-1); 105| | 106| | // Use quadratic probing, it has fewer clumping artifacts than linear 107| | // probing and has good cache behavior in the common case. 108| 259k| ++ProbeAmt; 109| 259k| } 110| 197k|} _ZNK7llvm_ks13StringMapImpl7FindKeyENS_9StringRefE: 116| 210k|int StringMapImpl::FindKey(StringRef Key) const { 117| 210k| unsigned HTSize = NumBuckets; 118| 210k| if (HTSize == 0) return -1; // Really empty table? ------------------ | Branch (118:7): [True: 74.4k, False: 136k] ------------------ 119| 136k| unsigned FullHashValue = HashString(Key); 120| 136k| unsigned BucketNo = FullHashValue & (HTSize-1); 121| 136k| unsigned *HashTable = (unsigned *)(TheTable + NumBuckets + 1); 122| | 123| 136k| unsigned ProbeAmt = 1; 124| 262k| while (1) { ------------------ | Branch (124:10): [True: 262k, Folded] ------------------ 125| 262k| StringMapEntryBase *BucketItem = TheTable[BucketNo]; 126| | // If we found an empty bucket, this key isn't in the table yet, return. 127| 262k| if (LLVM_LIKELY(!BucketItem)) ------------------ | | 170| 262k|#define LLVM_LIKELY(EXPR) __builtin_expect((bool)(EXPR), true) | | ------------------ | | | Branch (170:27): [True: 75.6k, False: 187k] | | ------------------ ------------------ 128| 75.6k| return -1; 129| | 130| 187k| if (BucketItem == getTombstoneVal()) { ------------------ | Branch (130:9): [True: 0, False: 187k] ------------------ 131| | // Ignore tombstones. 132| 187k| } else if (LLVM_LIKELY(HashTable[BucketNo] == FullHashValue)) { ------------------ | | 170| 187k|#define LLVM_LIKELY(EXPR) __builtin_expect((bool)(EXPR), true) | | ------------------ | | | Branch (170:27): [True: 61.0k, False: 126k] | | ------------------ ------------------ 133| | // If the full hash value matches, check deeply for a match. The common 134| | // case here is that we are only looking at the buckets (for item info 135| | // being non-null and for the full hash value) not at the items. This 136| | // is important for cache locality. 137| | 138| | // Do the comparison like this because NameStart isn't necessarily 139| | // null-terminated! 140| 61.0k| char *ItemStr = (char*)BucketItem+ItemSize; 141| 61.0k| if (Key == StringRef(ItemStr, BucketItem->getKeyLength())) { ------------------ | Branch (141:11): [True: 60.9k, False: 128] ------------------ 142| | // We found a match! 143| 60.9k| return BucketNo; 144| 60.9k| } 145| 61.0k| } 146| | 147| | // Okay, we didn't find the item. Probe to the next bucket. 148| 126k| BucketNo = (BucketNo+ProbeAmt) & (HTSize-1); 149| | 150| | // Use quadratic probing, it has fewer clumping artifacts than linear 151| | // probing and has good cache behavior in the common case. 152| 126k| ++ProbeAmt; 153| 126k| } 154| 136k|} _ZN7llvm_ks13StringMapImpl11RehashTableEj: 184| 171k|unsigned StringMapImpl::RehashTable(unsigned BucketNo) { 185| 171k| unsigned NewSize; 186| 171k| unsigned *HashTable = (unsigned *)(TheTable + NumBuckets + 1); 187| | 188| | // If the hash table is now more than 3/4 full, or if fewer than 1/8 of 189| | // the buckets are empty (meaning that many are filled with tombstones), 190| | // grow/rehash the table. 191| 171k| if (LLVM_UNLIKELY(NumItems * 4 > NumBuckets * 3)) { ------------------ | | 171| 171k|#define LLVM_UNLIKELY(EXPR) __builtin_expect((bool)(EXPR), false) | | ------------------ | | | Branch (171:29): [True: 5.89k, False: 165k] | | ------------------ ------------------ 192| 5.89k| NewSize = NumBuckets*2; 193| 165k| } else if (LLVM_UNLIKELY(NumBuckets - (NumItems + NumTombstones) <= ------------------ | | 171| 165k|#define LLVM_UNLIKELY(EXPR) __builtin_expect((bool)(EXPR), false) | | ------------------ | | | Branch (171:29): [True: 0, False: 165k] | | ------------------ ------------------ 194| 165k| NumBuckets / 8)) { 195| 0| NewSize = NumBuckets; 196| 165k| } else { 197| 165k| return BucketNo; 198| 165k| } 199| | 200| 5.89k| unsigned NewBucketNo = BucketNo; 201| | // Allocate one extra bucket which will always be non-empty. This allows the 202| | // iterators to stop at end. 203| 5.89k| StringMapEntryBase **NewTableArray = 204| 5.89k| (StringMapEntryBase **)calloc(NewSize+1, sizeof(StringMapEntryBase *) + 205| 5.89k| sizeof(unsigned)); 206| 5.89k| unsigned *NewHashArray = (unsigned *)(NewTableArray + NewSize + 1); 207| 5.89k| NewTableArray[NewSize] = (StringMapEntryBase*)2; 208| | 209| | // Rehash all the items into their new buckets. Luckily :) we already have 210| | // the hash values available, so we don't have to rehash any strings. 211| 296k| for (unsigned I = 0, E = NumBuckets; I != E; ++I) { ------------------ | Branch (211:40): [True: 290k, False: 5.89k] ------------------ 212| 290k| StringMapEntryBase *Bucket = TheTable[I]; 213| 290k| if (Bucket && Bucket != getTombstoneVal()) { ------------------ | Branch (213:9): [True: 224k, False: 66.8k] | Branch (213:19): [True: 224k, False: 0] ------------------ 214| | // Fast case, bucket available. 215| 224k| unsigned FullHash = HashTable[I]; 216| 224k| unsigned NewBucket = FullHash & (NewSize-1); 217| 224k| if (!NewTableArray[NewBucket]) { ------------------ | Branch (217:11): [True: 175k, False: 48.7k] ------------------ 218| 175k| NewTableArray[FullHash & (NewSize-1)] = Bucket; 219| 175k| NewHashArray[FullHash & (NewSize-1)] = FullHash; 220| 175k| if (I == BucketNo) ------------------ | Branch (220:13): [True: 4.91k, False: 170k] ------------------ 221| 4.91k| NewBucketNo = NewBucket; 222| 175k| continue; 223| 175k| } 224| | 225| | // Otherwise probe for a spot. 226| 48.7k| unsigned ProbeSize = 1; 227| 71.9k| do { 228| 71.9k| NewBucket = (NewBucket + ProbeSize++) & (NewSize-1); 229| 71.9k| } while (NewTableArray[NewBucket]); ------------------ | Branch (229:16): [True: 23.2k, False: 48.7k] ------------------ 230| | 231| | // Finally found a slot. Fill it in. 232| 48.7k| NewTableArray[NewBucket] = Bucket; 233| 48.7k| NewHashArray[NewBucket] = FullHash; 234| 48.7k| if (I == BucketNo) ------------------ | Branch (234:11): [True: 980, False: 47.7k] ------------------ 235| 980| NewBucketNo = NewBucket; 236| 48.7k| } 237| 290k| } 238| | 239| 5.89k| free(TheTable); 240| | 241| 5.89k| TheTable = NewTableArray; 242| 5.89k| NumBuckets = NewSize; 243| 5.89k| NumTombstones = 0; 244| 5.89k| return NewBucketNo; 245| 171k|} _ZNK7llvm_ks9StringRef13compare_lowerES0_: 52| 2.14k|int StringRef::compare_lower(StringRef RHS) const { 53| 2.14k| if (int Res = ascii_strncasecmp(Data, RHS.Data, std::min(Length, RHS.Length))) ------------------ | Branch (53:11): [True: 1.33k, False: 806] ------------------ 54| 1.33k| return Res; 55| 806| if (Length == RHS.Length) ------------------ | Branch (55:7): [True: 564, False: 242] ------------------ 56| 564| return 0; 57| 242| return Length < RHS.Length ? -1 : 1; ------------------ | Branch (57:10): [True: 234, False: 8] ------------------ 58| 806|} _ZNK7llvm_ks9StringRef5lowerEv: 117| 100k|std::string StringRef::lower() const { 118| 100k| std::string Result(size(), char()); 119| 714k| for (size_type i = 0, e = size(); i != e; ++i) { ------------------ | Branch (119:37): [True: 614k, False: 100k] ------------------ 120| 614k| Result[i] = ascii_tolower(Data[i]); 121| 614k| } 122| 100k| return Result; 123| 100k|} _ZNK7llvm_ks9StringRef17find_first_not_ofES0_m: 231| 28.4k| size_t From) const { 232| 28.4k| std::bitset<1 << CHAR_BIT> CharBits; 233| 198k| for (size_type i = 0; i != Chars.size(); ++i) ------------------ | Branch (233:25): [True: 170k, False: 28.4k] ------------------ 234| 170k| CharBits.set((unsigned char)Chars[i]); 235| | 236| 28.8k| for (size_type i = std::min(From, Length), e = Length; i != e; ++i) ------------------ | Branch (236:58): [True: 20.9k, False: 7.86k] ------------------ 237| 20.9k| if (!CharBits.test((unsigned char)Data[i])) ------------------ | Branch (237:9): [True: 20.5k, False: 442] ------------------ 238| 20.5k| return i; 239| 7.86k| return npos; 240| 28.4k|} _ZNK7llvm_ks9StringRef12find_last_ofES0_m: 247| 45.6k| size_t From) const { 248| 45.6k| std::bitset<1 << CHAR_BIT> CharBits; 249| 136k| for (size_type i = 0; i != Chars.size(); ++i) ------------------ | Branch (249:25): [True: 91.2k, False: 45.6k] ------------------ 250| 91.2k| CharBits.set((unsigned char)Chars[i]); 251| | 252| 409k| for (size_type i = std::min(From, Length) - 1, e = -1; i != e; --i) ------------------ | Branch (252:58): [True: 408k, False: 892] ------------------ 253| 408k| if (CharBits.test((unsigned char)Data[i])) ------------------ | Branch (253:9): [True: 44.7k, False: 364k] ------------------ 254| 44.7k| return i; 255| 892| return npos; 256| 45.6k|} _ZNK7llvm_ks9StringRef16find_last_not_ofES0_m: 272| 28.4k| size_t From) const { 273| 28.4k| std::bitset<1 << CHAR_BIT> CharBits; 274| 198k| for (size_type i = 0, e = Chars.size(); i != e; ++i) ------------------ | Branch (274:43): [True: 170k, False: 28.4k] ------------------ 275| 170k| CharBits.set((unsigned char)Chars[i]); 276| | 277| 28.4k| for (size_type i = std::min(From, Length) - 1, e = -1; i != e; --i) ------------------ | Branch (277:58): [True: 20.5k, False: 7.86k] ------------------ 278| 20.5k| if (!CharBits.test((unsigned char)Data[i])) ------------------ | Branch (278:9): [True: 20.5k, False: 0] ------------------ 279| 20.5k| return i; 280| 7.86k| return npos; 281| 28.4k|} _ZNK7llvm_ks9StringRef5splitERNS_15SmallVectorImplIS0_EEcib: 311| 13.7k| int MaxSplit, bool KeepEmpty) const { 312| 13.7k| StringRef S = *this; 313| | 314| | // Count down from MaxSplit. When MaxSplit is -1, this will just split 315| | // "forever". This doesn't support splitting more than 2^31 times 316| | // intentionally; if we ever want that we can make MaxSplit a 64-bit integer 317| | // but that seems unlikely to be useful. 318| 108k| while (MaxSplit-- != 0) { ------------------ | Branch (318:10): [True: 108k, False: 0] ------------------ 319| 108k| size_t Idx = S.find(Separator); 320| 108k| if (Idx == npos) ------------------ | Branch (320:9): [True: 13.7k, False: 94.4k] ------------------ 321| 13.7k| break; 322| | 323| | // Push this split. 324| 94.4k| if (KeepEmpty || Idx > 0) ------------------ | Branch (324:9): [True: 94.4k, False: 0] | Branch (324:22): [True: 0, False: 0] ------------------ 325| 94.4k| A.push_back(S.slice(0, Idx)); 326| | 327| | // Jump forward. 328| 94.4k| S = S.slice(Idx + 1, npos); 329| 94.4k| } 330| | 331| | // Push the tail. 332| 13.7k| if (KeepEmpty || !S.empty()) ------------------ | Branch (332:7): [True: 13.0k, False: 749] | Branch (332:20): [True: 0, False: 749] ------------------ 333| 13.0k| A.push_back(S); 334| 13.7k|} _ZN7llvm_ks20getAsUnsignedIntegerENS_9StringRefEjRy: 379| 315| unsigned long long &Result) { 380| | // Autosense radix if not specified. 381| 315| if (Radix == 0) ------------------ | Branch (381:7): [True: 0, False: 315] ------------------ 382| 0| Radix = GetAutoSenseRadix(Str); 383| | 384| | // Empty strings (after the radix autosense) are invalid. 385| 315| if (Str.empty()) return true; ------------------ | Branch (385:7): [True: 13, False: 302] ------------------ 386| | 387| | // Parse all the bytes of the string given this radix. Watch for overflow. 388| 302| Result = 0; 389| 8.44k| while (!Str.empty()) { ------------------ | Branch (389:10): [True: 8.33k, False: 109] ------------------ 390| 8.33k| unsigned CharVal; 391| 8.33k| if (Str[0] >= '0' && Str[0] <= '9') ------------------ | Branch (391:9): [True: 8.31k, False: 23] | Branch (391:26): [True: 8.15k, False: 159] ------------------ 392| 8.15k| CharVal = Str[0]-'0'; 393| 182| else if (Str[0] >= 'a' && Str[0] <= 'z') ------------------ | Branch (393:14): [True: 122, False: 60] | Branch (393:31): [True: 122, False: 0] ------------------ 394| 122| CharVal = Str[0]-'a'+10; 395| 60| else if (Str[0] >= 'A' && Str[0] <= 'Z') ------------------ | Branch (395:14): [True: 35, False: 25] | Branch (395:31): [True: 35, False: 0] ------------------ 396| 35| CharVal = Str[0]-'A'+10; 397| 25| else 398| 25| return true; 399| | 400| | // If the parsed value is larger than the integer radix, the string is 401| | // invalid. 402| 8.31k| if (CharVal >= Radix) ------------------ | Branch (402:9): [True: 157, False: 8.15k] ------------------ 403| 157| return true; 404| | 405| | // Add in this character. 406| 8.15k| unsigned long long PrevResult = Result; 407| 8.15k| Result = Result*Radix+CharVal; 408| | 409| | // Check for overflow by shifting back and seeing if bits were lost. 410| 8.15k| if (Result/Radix < PrevResult) ------------------ | Branch (410:9): [True: 11, False: 8.14k] ------------------ 411| 11| return true; 412| | 413| 8.14k| Str = Str.substr(1); 414| 8.14k| } 415| | 416| 109| return false; 417| 302|} _ZNK7llvm_ks9StringRef12getAsIntegerEjRNS_5APIntE: 445| 140k|bool StringRef::getAsInteger(unsigned Radix, APInt &Result) const { 446| 140k| StringRef Str = *this; 447| | 448| | // Autosense radix if not specified. 449| 140k| if (Radix == 0) ------------------ | Branch (449:7): [True: 2.93k, False: 137k] ------------------ 450| 2.93k| Radix = GetAutoSenseRadix(Str); 451| | 452| 140k| assert(Radix > 1 && Radix <= 36); ------------------ | Branch (452:3): [True: 140k, False: 0] | Branch (452:3): [True: 140k, False: 0] | Branch (452:3): [True: 140k, False: 0] ------------------ 453| | 454| | // Empty strings (after the radix autosense) are invalid. 455| 140k| if (Str.empty()) return true; ------------------ | Branch (455:7): [True: 0, False: 140k] ------------------ 456| | 457| | // Skip leading zeroes. This can be a significant improvement if 458| | // it means we don't need > 64 bits. 459| 207k| while (!Str.empty() && Str.front() == '0') ------------------ | Branch (459:10): [True: 181k, False: 25.4k] | Branch (459:26): [True: 66.6k, False: 115k] ------------------ 460| 66.6k| Str = Str.substr(1); 461| | 462| | // If it was nothing but zeroes.... 463| 140k| if (Str.empty()) { ------------------ | Branch (463:7): [True: 25.4k, False: 115k] ------------------ 464| 25.4k| Result = APInt(64, 0); 465| 25.4k| return false; 466| 25.4k| } 467| | 468| | // (Over-)estimate the required number of bits. 469| 115k| unsigned Log2Radix = 0; 470| 570k| while ((1U << Log2Radix) < Radix) Log2Radix++; ------------------ | Branch (470:10): [True: 455k, False: 115k] ------------------ 471| 115k| bool IsPowerOf2Radix = ((1U << Log2Radix) == Radix); 472| | 473| 115k| unsigned BitWidth = Log2Radix * Str.size(); 474| 115k| if (BitWidth < Result.getBitWidth()) ------------------ | Branch (474:7): [True: 114k, False: 138] ------------------ 475| 114k| BitWidth = Result.getBitWidth(); // don't shrink the result 476| 138| else if (BitWidth > Result.getBitWidth()) ------------------ | Branch (476:12): [True: 104, False: 34] ------------------ 477| 104| Result = Result.zext(BitWidth); 478| | 479| 115k| APInt RadixAP, CharAP; // unused unless !IsPowerOf2Radix 480| 115k| if (!IsPowerOf2Radix) { ------------------ | Branch (480:7): [True: 0, False: 115k] ------------------ 481| | // These must have the same bit-width as Result. 482| 0| RadixAP = APInt(BitWidth, Radix); 483| 0| CharAP = APInt(BitWidth, 0); 484| 0| } 485| | 486| | // Parse all the bytes of the string given this radix. 487| 115k| Result = 0; 488| 372k| while (!Str.empty()) { ------------------ | Branch (488:10): [True: 257k, False: 114k] ------------------ 489| 257k| unsigned CharVal; 490| 257k| if (Str[0] >= '0' && Str[0] <= '9') ------------------ | Branch (490:9): [True: 257k, False: 0] | Branch (490:26): [True: 221k, False: 36.2k] ------------------ 491| 221k| CharVal = Str[0]-'0'; 492| 36.2k| else if (Str[0] >= 'a' && Str[0] <= 'z') ------------------ | Branch (492:14): [True: 33.3k, False: 2.98k] | Branch (492:31): [True: 33.3k, False: 0] ------------------ 493| 33.3k| CharVal = Str[0]-'a'+10; 494| 2.98k| else if (Str[0] >= 'A' && Str[0] <= 'Z') ------------------ | Branch (494:14): [True: 2.98k, False: 0] | Branch (494:31): [True: 2.98k, False: 0] ------------------ 495| 2.98k| CharVal = Str[0]-'A'+10; 496| 0| else 497| 0| return true; 498| | 499| | // If the parsed value is larger than the integer radix, the string is 500| | // invalid. 501| 257k| if (CharVal >= Radix) ------------------ | Branch (501:9): [True: 154, False: 257k] ------------------ 502| 154| return true; 503| | 504| | // Add in this character. 505| 257k| if (IsPowerOf2Radix) { ------------------ | Branch (505:9): [True: 257k, False: 0] ------------------ 506| 257k| Result <<= Log2Radix; 507| 257k| Result |= CharVal; 508| 257k| } else { 509| 0| Result *= RadixAP; 510| 0| CharAP = CharVal; 511| 0| Result += CharAP; 512| 0| } 513| | 514| 257k| Str = Str.substr(1); 515| 257k| } 516| | 517| 114k| return false; 518| 115k|} _ZN7llvm_ks10hash_valueENS_9StringRefE: 522| 517|hash_code llvm_ks::hash_value(StringRef S) { 523| 517| return hash_combine_range(S.begin(), S.end()); 524| 517|} StringRef.cpp:_ZL17ascii_strncasecmpPKcS0_m: 41| 2.14k|static int ascii_strncasecmp(const char *LHS, const char *RHS, size_t Length) { 42| 4.59k| for (size_t I = 0; I < Length; ++I) { ------------------ | Branch (42:22): [True: 3.79k, False: 806] ------------------ 43| 3.79k| unsigned char LHC = ascii_tolower(LHS[I]); 44| 3.79k| unsigned char RHC = ascii_tolower(RHS[I]); 45| 3.79k| if (LHC != RHC) ------------------ | Branch (45:9): [True: 1.33k, False: 2.45k] ------------------ 46| 1.33k| return LHC < RHC ? -1 : 1; ------------------ | Branch (46:14): [True: 672, False: 667] ------------------ 47| 3.79k| } 48| 806| return 0; 49| 2.14k|} StringRef.cpp:_ZL13ascii_tolowerc: 23| 621k|static char ascii_tolower(char x) { 24| 621k| if (x >= 'A' && x <= 'Z') ------------------ | Branch (24:7): [True: 489k, False: 132k] | Branch (24:19): [True: 48.0k, False: 441k] ------------------ 25| 48.0k| return x - 'A' + 'a'; 26| 573k| return x; 27| 621k|} StringRef.cpp:_ZL17GetAutoSenseRadixRN7llvm_ks9StringRefE: 353| 2.93k|static unsigned GetAutoSenseRadix(StringRef &Str) { 354| 2.93k| if (Str.startswith("0x") || Str.startswith("0X")) { ------------------ | Branch (354:7): [True: 229, False: 2.70k] | Branch (354:7): [True: 2.93k, False: 0] | Branch (354:31): [True: 2.70k, False: 0] ------------------ 355| 2.93k| Str = Str.substr(2); 356| 2.93k| return 16; 357| 2.93k| } 358| | 359| 0| if (Str.startswith("0b")) { ------------------ | Branch (359:7): [True: 0, False: 0] ------------------ 360| 0| Str = Str.substr(2); 361| 0| return 2; 362| 0| } 363| | 364| 0| if (Str.startswith("0o")) { ------------------ | Branch (364:7): [True: 0, False: 0] ------------------ 365| 0| Str = Str.substr(2); 366| 0| return 8; 367| 0| } 368| | 369| 0| if (Str.startswith("0")) ------------------ | Branch (369:7): [True: 0, False: 0] ------------------ 370| 0| return 8; 371| | 372| 0| return 10; 373| 0|} _ZN7llvm_ks3ARM20getCanonicalArchNameENS_9StringRefE: 423| 13.4k|StringRef llvm_ks::ARM::getCanonicalArchName(StringRef Arch) { 424| 13.4k| size_t offset = StringRef::npos; 425| 13.4k| StringRef A = Arch; 426| 13.4k| StringRef Error = ""; 427| | 428| | // Begins with "arm" / "thumb", move past it. 429| 13.4k| if (A.startswith("arm64")) ------------------ | Branch (429:7): [True: 0, False: 13.4k] ------------------ 430| 0| offset = 5; 431| 13.4k| else if (A.startswith("arm")) ------------------ | Branch (431:12): [True: 0, False: 13.4k] ------------------ 432| 0| offset = 3; 433| 13.4k| else if (A.startswith("thumb")) ------------------ | Branch (433:12): [True: 0, False: 13.4k] ------------------ 434| 0| offset = 5; 435| 13.4k| else if (A.startswith("aarch64")) { ------------------ | Branch (435:12): [True: 0, False: 13.4k] ------------------ 436| 0| offset = 7; 437| | // AArch64 uses "_be", not "eb" suffix. 438| 0| if (A.find("eb") != StringRef::npos) ------------------ | Branch (438:9): [True: 0, False: 0] ------------------ 439| 0| return Error; 440| 0| if (A.substr(offset, 3) == "_be") ------------------ | Branch (440:9): [True: 0, False: 0] ------------------ 441| 0| offset += 3; 442| 0| } 443| | 444| | // Ex. "armebv7", move past the "eb". 445| 13.4k| if (offset != StringRef::npos && A.substr(offset, 2) == "eb") ------------------ | Branch (445:7): [True: 0, False: 13.4k] | Branch (445:7): [True: 0, False: 13.4k] | Branch (445:36): [True: 0, False: 0] ------------------ 446| 0| offset += 2; 447| | // Or, if it ends with eb ("armv7eb"), chop it off. 448| 13.4k| else if (A.endswith("eb")) ------------------ | Branch (448:12): [True: 0, False: 13.4k] ------------------ 449| 0| A = A.substr(0, A.size() - 2); 450| | // Trim the head 451| 13.4k| if (offset != StringRef::npos) ------------------ | Branch (451:7): [True: 0, False: 13.4k] ------------------ 452| 0| A = A.substr(offset); 453| | 454| | // Empty string means offset reached the end, which means it's valid. 455| 13.4k| if (A.empty()) ------------------ | Branch (455:7): [True: 0, False: 13.4k] ------------------ 456| 0| return Arch; 457| | 458| | // Only match non-marketing names 459| 13.4k| if (offset != StringRef::npos) { ------------------ | Branch (459:7): [True: 0, False: 13.4k] ------------------ 460| | // Must start with 'vN'. 461| 0| if (A[0] != 'v' || !std::isdigit(A[1])) ------------------ | Branch (461:9): [True: 0, False: 0] | Branch (461:24): [True: 0, False: 0] ------------------ 462| 0| return Error; 463| | // Can't have an extra 'eb'. 464| 0| if (A.find("eb") != StringRef::npos) ------------------ | Branch (464:9): [True: 0, False: 0] ------------------ 465| 0| return Error; 466| 0| } 467| | 468| | // Arch will either be a 'v' name (v7a) or a marketing name (xscale). 469| 13.4k| return A; 470| 13.4k|} _ZN7llvm_ks3ARM9parseArchENS_9StringRefE: 491| 6.74k|unsigned llvm_ks::ARM::parseArch(StringRef Arch) { 492| 6.74k| Arch = getCanonicalArchName(Arch); 493| 6.74k| StringRef Syn = getArchSynonym(Arch); 494| 195k| for (const auto A : ARCHNames) { ------------------ | Branch (494:21): [True: 195k, False: 6.74k] ------------------ 495| 195k| if (A.getName().endswith(Syn)) ------------------ | Branch (495:9): [True: 0, False: 195k] ------------------ 496| 0| return A.ID; 497| 195k| } 498| 6.74k| return ARM::AK_INVALID; 499| 6.74k|} TargetParser.cpp:_ZNK12_GLOBAL__N_13$_17getNameEv: 66| 195k| StringRef getName() const { return StringRef(NameCStr, NameLength); } TargetParser.cpp:_ZL14getArchSynonymN7llvm_ks9StringRefE: 399| 6.74k|static StringRef getArchSynonym(StringRef Arch) { 400| 6.74k| return StringSwitch(Arch) 401| 6.74k| .Case("v5", "v5t") 402| 6.74k| .Case("v5e", "v5te") 403| 6.74k| .Case("v6j", "v6") 404| 6.74k| .Case("v6hl", "v6k") 405| 6.74k| .Cases("v6m", "v6sm", "v6s-m", "v6-m") 406| 6.74k| .Cases("v6z", "v6zk", "v6kz") 407| 6.74k| .Cases("v7", "v7a", "v7hl", "v7l", "v7-a") 408| 6.74k| .Case("v7r", "v7-r") 409| 6.74k| .Case("v7m", "v7-m") 410| 6.74k| .Case("v7em", "v7e-m") 411| 6.74k| .Cases("v8", "v8a", "aarch64", "arm64", "v8-a") 412| 6.74k| .Case("v8.1a", "v8.1-a") 413| 6.74k| .Case("v8.2a", "v8.2-a") 414| 6.74k| .Case("v8m.base", "v8-m.base") 415| 6.74k| .Case("v8m.main", "v8-m.main") 416| 6.74k| .Default(Arch); 417| 6.74k|} _ZN7llvm_ks14TargetRegistry7targetsEv: 21| 5.24k|iterator_range TargetRegistry::targets() { 22| 5.24k| return make_range(iterator(FirstTarget), iterator()); 23| 5.24k|} _ZN7llvm_ks14TargetRegistry12lookupTargetERKNSt3__112basic_stringIcNS1_11char_traitsIcEENS1_9allocatorIcEEEERNS_6TripleERS7_: 27| 749| std::string &Error) { 28| | // Allocate target machine. First, check whether the user has explicitly 29| | // specified an architecture to compile for. If so we have to look it up by 30| | // name, because it might be a backend that has no mapping to a target triple. 31| 749| const Target *TheTarget = nullptr; 32| 749| if (!ArchName.empty()) { ------------------ | Branch (32:7): [True: 0, False: 749] ------------------ 33| 0| auto I = 34| 0| std::find_if(targets().begin(), targets().end(), 35| 0| [&](const Target &T) { return ArchName == T.getName(); }); 36| | 37| 0| if (I == targets().end()) { ------------------ | Branch (37:9): [True: 0, False: 0] ------------------ 38| 0| Error = "error: invalid target '" + ArchName + "'.\n"; 39| 0| return nullptr; 40| 0| } 41| | 42| 0| TheTarget = &*I; 43| | 44| | // Adjust the triple to match (if known), otherwise stick with the 45| | // given triple. 46| 0| Triple::ArchType Type = Triple::getArchTypeForLLVMName(ArchName); 47| 0| if (Type != Triple::UnknownArch) ------------------ | Branch (47:9): [True: 0, False: 0] ------------------ 48| 0| TheTriple.setArch(Type); 49| 749| } else { 50| | // Get the target specific parser. 51| 749| std::string TempError; 52| 749| TheTarget = TargetRegistry::lookupTarget(TheTriple.getTriple(), TempError); 53| 749| if (!TheTarget) { ------------------ | Branch (53:9): [True: 0, False: 749] ------------------ 54| 0| Error = ": error: unable to get target for '" 55| 0| + TheTriple.getTriple() 56| 0| + "', see --version and --triple.\n"; 57| 0| return nullptr; 58| 0| } 59| 749| } 60| | 61| 749| return TheTarget; 62| 749|} _ZN7llvm_ks14TargetRegistry12lookupTargetERKNSt3__112basic_stringIcNS1_11char_traitsIcEENS1_9allocatorIcEEEERS7_: 65| 749| std::string &Error) { 66| | // Provide special warning when no targets are initialized. 67| 749| if (targets().begin() == targets().end()) { ------------------ | Branch (67:7): [True: 0, False: 749] ------------------ 68| 0| Error = "Unable to find target for this triple (no targets are registered)"; 69| 0| return nullptr; 70| 0| } 71| 749| Triple::ArchType Arch = Triple(TT).getArch(); 72| 749| auto ArchMatch = [&](const Target &T) { return T.ArchMatchFn(Arch); }; 73| 749| auto I = std::find_if(targets().begin(), targets().end(), ArchMatch); 74| | 75| 749| if (I == targets().end()) { ------------------ | Branch (75:7): [True: 0, False: 749] ------------------ 76| 0| Error = "No available targets are compatible with this triple."; 77| 0| return nullptr; 78| 0| } 79| | 80| 749| auto J = std::find_if(std::next(I), targets().end(), ArchMatch); 81| 749| if (J != targets().end()) { ------------------ | Branch (81:7): [True: 0, False: 749] ------------------ 82| 0| Error = std::string("Cannot choose between targets \"") + I->Name + 83| 0| "\" and \"" + J->Name + "\""; 84| 0| return nullptr; 85| 0| } 86| | 87| 749| return &*I; 88| 749|} _ZN7llvm_ks14TargetRegistry14RegisterTargetERNS_6TargetEPKcS4_PFbNS_6Triple8ArchTypeEE: 93| 23| Target::ArchMatchFnTy ArchMatchFn) { 94| 23| assert(Name && ShortDesc && ArchMatchFn && ------------------ | Branch (94:3): [True: 23, False: 0] | Branch (94:3): [True: 23, False: 0] | Branch (94:3): [True: 23, False: 0] | Branch (94:3): [True: 23, Folded] | Branch (94:3): [True: 23, False: 0] ------------------ 95| 23| "Missing required target information!"); 96| | 97| | // Check if this target has already been initialized, we allow this as a 98| | // convenience to some clients. 99| 23| if (T.Name) ------------------ | Branch (99:7): [True: 0, False: 23] ------------------ 100| 0| return; 101| | 102| | // Add to the list of targets. 103| 23| T.Next = FirstTarget; 104| 23| FirstTarget = &T; 105| | 106| 23| T.Name = Name; 107| 23| T.ShortDesc = ShortDesc; 108| 23| T.ArchMatchFn = ArchMatchFn; 109| 23|} TargetRegistry.cpp:_ZZN7llvm_ks14TargetRegistry12lookupTargetERKNSt3__112basic_stringIcNS1_11char_traitsIcEENS1_9allocatorIcEEEERS7_ENK3$_0clERKNS_6TargetE: 72| 17.2k| auto ArchMatch = [&](const Target &T) { return T.ArchMatchFn(Arch); }; _ZN7llvm_ks6TripleC2ERKNS_5TwineE: 618| 6.74k| : Data(Str.str()), Arch(UnknownArch), SubArch(NoSubArch), 619| 6.74k| Vendor(UnknownVendor), OS(UnknownOS), Environment(UnknownEnvironment), 620| 6.74k| ObjectFormat(UnknownObjectFormat) { 621| | // Do minimal parsing by hand here. 622| 6.74k| SmallVector Components; 623| 6.74k| StringRef(Data).split(Components, '-', /*MaxSplit*/ 3); 624| 6.74k| if (Components.size() > 0) { ------------------ | Branch (624:7): [True: 6.74k, False: 0] ------------------ 625| 6.74k| Arch = parseArch(Components[0]); 626| 6.74k| SubArch = parseSubArch(Components[0]); 627| 6.74k| if (Components.size() > 1) { ------------------ | Branch (627:9): [True: 0, False: 6.74k] ------------------ 628| 0| Vendor = parseVendor(Components[1]); 629| 0| if (Components.size() > 2) { ------------------ | Branch (629:11): [True: 0, False: 0] ------------------ 630| 0| OS = parseOS(Components[2]); 631| 0| if (Components.size() > 3) { ------------------ | Branch (631:13): [True: 0, False: 0] ------------------ 632| 0| Environment = parseEnvironment(Components[3]); 633| 0| ObjectFormat = parseFormat(Components[3]); 634| 0| } 635| 0| } 636| 0| } 637| 6.74k| } 638| 6.74k| if (ObjectFormat == UnknownObjectFormat) ------------------ | Branch (638:7): [True: 6.74k, False: 0] ------------------ 639| 6.74k| ObjectFormat = getDefaultFormat(*this); 640| 6.74k|} _ZN7llvm_ks6Triple9normalizeENS_9StringRefE: 677| 749|std::string Triple::normalize(StringRef Str) { 678| 749| bool IsMinGW32 = false; 679| 749| bool IsCygwin = false; 680| | 681| | // Parse into components. 682| 749| SmallVector Components; 683| 749| Str.split(Components, '-'); 684| | 685| | // If the first component corresponds to a known architecture, preferentially 686| | // use it for the architecture. If the second component corresponds to a 687| | // known vendor, preferentially use it for the vendor, etc. This avoids silly 688| | // component movement when a component parses as (eg) both a valid arch and a 689| | // valid os. 690| 749| ArchType Arch = UnknownArch; 691| 749| if (Components.size() > 0) ------------------ | Branch (691:7): [True: 749, False: 0] ------------------ 692| 749| Arch = parseArch(Components[0]); 693| 749| VendorType Vendor = UnknownVendor; 694| 749| if (Components.size() > 1) ------------------ | Branch (694:7): [True: 0, False: 749] ------------------ 695| 0| Vendor = parseVendor(Components[1]); 696| 749| OSType OS = UnknownOS; 697| 749| if (Components.size() > 2) { ------------------ | Branch (697:7): [True: 0, False: 749] ------------------ 698| 0| OS = parseOS(Components[2]); 699| 0| IsCygwin = Components[2].startswith("cygwin"); 700| 0| IsMinGW32 = Components[2].startswith("mingw"); 701| 0| } 702| 749| EnvironmentType Environment = UnknownEnvironment; 703| 749| if (Components.size() > 3) ------------------ | Branch (703:7): [True: 0, False: 749] ------------------ 704| 0| Environment = parseEnvironment(Components[3]); 705| 749| ObjectFormatType ObjectFormat = UnknownObjectFormat; 706| 749| if (Components.size() > 4) ------------------ | Branch (706:7): [True: 0, False: 749] ------------------ 707| 0| ObjectFormat = parseFormat(Components[4]); 708| | 709| | // Note which components are already in their final position. These will not 710| | // be moved. 711| 749| bool Found[4]; 712| 749| Found[0] = Arch != UnknownArch; 713| 749| Found[1] = Vendor != UnknownVendor; 714| 749| Found[2] = OS != UnknownOS; 715| 749| Found[3] = Environment != UnknownEnvironment; 716| | 717| | // If they are not there already, permute the components into their canonical 718| | // positions by seeing if they parse as a valid architecture, and if so moving 719| | // the component to the architecture position etc. 720| 3.74k| for (unsigned Pos = 0; Pos != array_lengthof(Found); ++Pos) { ------------------ | Branch (720:26): [True: 2.99k, False: 749] ------------------ 721| 2.99k| if (Found[Pos]) ------------------ | Branch (721:9): [True: 749, False: 2.24k] ------------------ 722| 749| continue; // Already in the canonical position. 723| | 724| 4.49k| for (unsigned Idx = 0; Idx != Components.size(); ++Idx) { ------------------ | Branch (724:28): [True: 2.24k, False: 2.24k] ------------------ 725| | // Do not reparse any components that already matched. 726| 2.24k| if (Idx < array_lengthof(Found) && Found[Idx]) ------------------ | Branch (726:11): [True: 2.24k, False: 0] | Branch (726:42): [True: 2.24k, False: 0] ------------------ 727| 2.24k| continue; 728| | 729| | // Does this component parse as valid for the target position? 730| 0| bool Valid = false; 731| 0| StringRef Comp = Components[Idx]; 732| 0| switch (Pos) { 733| 0| default: llvm_unreachable("unexpected component type!"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ | Branch (733:7): [True: 0, False: 0] ------------------ 734| 0| case 0: ------------------ | Branch (734:7): [True: 0, False: 0] ------------------ 735| 0| Arch = parseArch(Comp); 736| 0| Valid = Arch != UnknownArch; 737| 0| break; 738| 0| case 1: ------------------ | Branch (738:7): [True: 0, False: 0] ------------------ 739| 0| Vendor = parseVendor(Comp); 740| 0| Valid = Vendor != UnknownVendor; 741| 0| break; 742| 0| case 2: ------------------ | Branch (742:7): [True: 0, False: 0] ------------------ 743| 0| OS = parseOS(Comp); 744| 0| IsCygwin = Comp.startswith("cygwin"); 745| 0| IsMinGW32 = Comp.startswith("mingw"); 746| 0| Valid = OS != UnknownOS || IsCygwin || IsMinGW32; ------------------ | Branch (746:17): [True: 0, False: 0] | Branch (746:36): [True: 0, False: 0] | Branch (746:48): [True: 0, False: 0] ------------------ 747| 0| break; 748| 0| case 3: ------------------ | Branch (748:7): [True: 0, False: 0] ------------------ 749| 0| Environment = parseEnvironment(Comp); 750| 0| Valid = Environment != UnknownEnvironment; 751| 0| if (!Valid) { ------------------ | Branch (751:13): [True: 0, False: 0] ------------------ 752| 0| ObjectFormat = parseFormat(Comp); 753| 0| Valid = ObjectFormat != UnknownObjectFormat; 754| 0| } 755| 0| break; 756| 0| } 757| 0| if (!Valid) ------------------ | Branch (757:11): [True: 0, False: 0] ------------------ 758| 0| continue; // Nope, try the next component. 759| | 760| | // Move the component to the target position, pushing any non-fixed 761| | // components that are in the way to the right. This tends to give 762| | // good results in the common cases of a forgotten vendor component 763| | // or a wrongly positioned environment. 764| 0| if (Pos < Idx) { ------------------ | Branch (764:11): [True: 0, False: 0] ------------------ 765| | // Insert left, pushing the existing components to the right. For 766| | // example, a-b-i386 -> i386-a-b when moving i386 to the front. 767| 0| StringRef CurrentComponent(""); // The empty component. 768| | // Replace the component we are moving with an empty component. 769| 0| std::swap(CurrentComponent, Components[Idx]); 770| | // Insert the component being moved at Pos, displacing any existing 771| | // components to the right. 772| 0| for (unsigned i = Pos; !CurrentComponent.empty(); ++i) { ------------------ | Branch (772:32): [True: 0, False: 0] ------------------ 773| | // Skip over any fixed components. 774| 0| while (i < array_lengthof(Found) && Found[i]) ------------------ | Branch (774:18): [True: 0, False: 0] | Branch (774:47): [True: 0, False: 0] ------------------ 775| 0| ++i; 776| | // Place the component at the new position, getting the component 777| | // that was at this position - it will be moved right. 778| 0| std::swap(CurrentComponent, Components[i]); 779| 0| } 780| 0| } else if (Pos > Idx) { ------------------ | Branch (780:18): [True: 0, False: 0] ------------------ 781| | // Push right by inserting empty components until the component at Idx 782| | // reaches the target position Pos. For example, pc-a -> -pc-a when 783| | // moving pc to the second position. 784| 0| do { 785| | // Insert one empty component at Idx. 786| 0| StringRef CurrentComponent(""); // The empty component. 787| 0| for (unsigned i = Idx; i < Components.size();) { ------------------ | Branch (787:34): [True: 0, False: 0] ------------------ 788| | // Place the component at the new position, getting the component 789| | // that was at this position - it will be moved right. 790| 0| std::swap(CurrentComponent, Components[i]); 791| | // If it was placed on top of an empty component then we are done. 792| 0| if (CurrentComponent.empty()) ------------------ | Branch (792:17): [True: 0, False: 0] ------------------ 793| 0| break; 794| | // Advance to the next component, skipping any fixed components. 795| 0| while (++i < array_lengthof(Found) && Found[i]) ------------------ | Branch (795:20): [True: 0, False: 0] | Branch (795:51): [True: 0, False: 0] ------------------ 796| 0| ; 797| 0| } 798| | // The last component was pushed off the end - append it. 799| 0| if (!CurrentComponent.empty()) ------------------ | Branch (799:15): [True: 0, False: 0] ------------------ 800| 0| Components.push_back(CurrentComponent); 801| | 802| | // Advance Idx to the component's new position. 803| 0| while (++Idx < array_lengthof(Found) && Found[Idx]) ------------------ | Branch (803:18): [True: 0, False: 0] | Branch (803:51): [True: 0, False: 0] ------------------ 804| 0| ; 805| 0| } while (Idx < Pos); // Add more until the final position is reached. ------------------ | Branch (805:18): [True: 0, False: 0] ------------------ 806| 0| } 807| 0| assert(Pos < Components.size() && Components[Pos] == Comp && ------------------ | Branch (807:7): [True: 0, False: 0] | Branch (807:7): [True: 0, False: 0] | Branch (807:7): [True: 0, Folded] | Branch (807:7): [True: 0, False: 0] ------------------ 808| 0| "Component moved wrong!"); 809| 0| Found[Pos] = true; 810| 0| break; 811| 0| } 812| 2.24k| } 813| | 814| | // Special case logic goes here. At this point Arch, Vendor and OS have the 815| | // correct values for the computed components. 816| 749| std::string NormalizedEnvironment; 817| 749| if (Environment == Triple::Android && Components[3].startswith("androideabi")) { ------------------ | Branch (817:7): [True: 0, False: 749] | Branch (817:7): [True: 0, False: 749] | Branch (817:41): [True: 0, False: 0] ------------------ 818| 0| StringRef AndroidVersion = Components[3].drop_front(strlen("androideabi")); 819| 0| if (AndroidVersion.empty()) { ------------------ | Branch (819:9): [True: 0, False: 0] ------------------ 820| 0| Components[3] = "android"; 821| 0| } else { 822| 0| NormalizedEnvironment = Twine("android", AndroidVersion).str(); 823| 0| Components[3] = NormalizedEnvironment; 824| 0| } 825| 0| } 826| | 827| 749| if (OS == Triple::Win32) { ------------------ | Branch (827:7): [True: 0, False: 749] ------------------ 828| 0| Components.resize(4); 829| 0| Components[2] = "windows"; 830| 0| if (Environment == UnknownEnvironment) { ------------------ | Branch (830:9): [True: 0, False: 0] ------------------ 831| 0| if (ObjectFormat == UnknownObjectFormat || ObjectFormat == Triple::COFF) ------------------ | Branch (831:11): [True: 0, False: 0] | Branch (831:50): [True: 0, False: 0] ------------------ 832| 0| Components[3] = "msvc"; 833| 0| else 834| 0| Components[3] = getObjectFormatTypeName(ObjectFormat); 835| 0| } 836| 749| } else if (IsMinGW32) { ------------------ | Branch (836:14): [True: 0, False: 749] ------------------ 837| 0| Components.resize(4); 838| 0| Components[2] = "windows"; 839| 0| Components[3] = "gnu"; 840| 749| } else if (IsCygwin) { ------------------ | Branch (840:14): [True: 0, False: 749] ------------------ 841| 0| Components.resize(4); 842| 0| Components[2] = "windows"; 843| 0| Components[3] = "cygnus"; 844| 0| } 845| 749| if (IsMinGW32 || IsCygwin || ------------------ | Branch (845:7): [True: 0, False: 749] | Branch (845:20): [True: 0, False: 749] ------------------ 846| 749| (OS == Triple::Win32 && Environment != UnknownEnvironment)) { ------------------ | Branch (846:8): [True: 0, False: 749] | Branch (846:31): [True: 0, False: 0] ------------------ 847| 0| if (ObjectFormat != UnknownObjectFormat && ObjectFormat != Triple::COFF) { ------------------ | Branch (847:9): [True: 0, False: 0] | Branch (847:48): [True: 0, False: 0] ------------------ 848| 0| Components.resize(5); 849| 0| Components[4] = getObjectFormatTypeName(ObjectFormat); 850| 0| } 851| 0| } 852| | 853| | // Stick the corrected components back together to form the normalized string. 854| 749| std::string Normalized; 855| 1.49k| for (unsigned i = 0, e = Components.size(); i != e; ++i) { ------------------ | Branch (855:47): [True: 749, False: 749] ------------------ 856| 749| if (i) Normalized += '-'; ------------------ | Branch (856:9): [True: 0, False: 749] ------------------ 857| 749| Normalized += Components[i]; 858| 749| } 859| 749| return Normalized; 860| 749|} Triple.cpp:_ZL9parseArchN7llvm_ks9StringRefE: 341| 7.49k|static Triple::ArchType parseArch(StringRef ArchName) { 342| 7.49k| auto AT = StringSwitch(ArchName) 343| 7.49k| .Cases("i386", "i486", "i586", "i686", Triple::x86) 344| | // FIXME: Do we need to support these? 345| 7.49k| .Cases("i786", "i886", "i986", Triple::x86) 346| 7.49k| .Cases("amd64", "x86_64", "x86_64h", Triple::x86_64) 347| 7.49k| .Cases("powerpc", "ppc32", Triple::ppc) 348| 7.49k| .Cases("powerpc64", "ppu", "ppc64", Triple::ppc64) 349| 7.49k| .Cases("powerpc64le", "ppc64le", Triple::ppc64le) 350| 7.49k| .Case("xscale", Triple::arm) 351| 7.49k| .Case("xscaleeb", Triple::armeb) 352| 7.49k| .Case("aarch64", Triple::aarch64) 353| 7.49k| .Case("aarch64_be", Triple::aarch64_be) 354| 7.49k| .Case("arm64", Triple::aarch64) 355| 7.49k| .Case("arm", Triple::arm) 356| 7.49k| .Case("armeb", Triple::armeb) 357| 7.49k| .Case("thumb", Triple::thumb) 358| 7.49k| .Case("thumbeb", Triple::thumbeb) 359| 7.49k| .Case("avr", Triple::avr) 360| 7.49k| .Case("msp430", Triple::msp430) 361| 7.49k| .Cases("mips", "mipseb", "mipsallegrex", Triple::mips) 362| 7.49k| .Cases("mipsel", "mipsallegrexel", Triple::mipsel) 363| 7.49k| .Cases("mips64", "mips64eb", Triple::mips64) 364| 7.49k| .Case("mips64el", Triple::mips64el) 365| 7.49k| .Case("r600", Triple::r600) 366| 7.49k| .Case("amdgcn", Triple::amdgcn) 367| 7.49k| .Case("riscv32", Triple::riscv32) 368| 7.49k| .Case("riscv64", Triple::riscv64) 369| 7.49k| .Case("hexagon", Triple::hexagon) 370| 7.49k| .Cases("s390x", "systemz", Triple::systemz) 371| 7.49k| .Case("sparc", Triple::sparc) 372| 7.49k| .Case("sparcel", Triple::sparcel) 373| 7.49k| .Cases("sparcv9", "sparc64", Triple::sparcv9) 374| 7.49k| .Case("tce", Triple::tce) 375| 7.49k| .Case("xcore", Triple::xcore) 376| 7.49k| .Case("nvptx", Triple::nvptx) 377| 7.49k| .Case("nvptx64", Triple::nvptx64) 378| 7.49k| .Case("le32", Triple::le32) 379| 7.49k| .Case("le64", Triple::le64) 380| 7.49k| .Case("amdil", Triple::amdil) 381| 7.49k| .Case("amdil64", Triple::amdil64) 382| 7.49k| .Case("hsail", Triple::hsail) 383| 7.49k| .Case("hsail64", Triple::hsail64) 384| 7.49k| .Case("spir", Triple::spir) 385| 7.49k| .Case("spir64", Triple::spir64) 386| 7.49k| .StartsWith("kalimba", Triple::kalimba) 387| 7.49k| .Case("shave", Triple::shave) 388| 7.49k| .Case("wasm32", Triple::wasm32) 389| 7.49k| .Case("wasm64", Triple::wasm64) 390| 7.49k| .Default(Triple::UnknownArch); 391| | 392| | // Some architectures require special parsing logic just to compute the 393| | // ArchType result. 394| 7.49k| if (AT == Triple::UnknownArch) { ------------------ | Branch (394:7): [True: 0, False: 7.49k] ------------------ 395| 0| if (ArchName.startswith("arm") || ArchName.startswith("thumb") || ------------------ | Branch (395:9): [True: 0, False: 0] | Branch (395:9): [True: 0, False: 0] | Branch (395:39): [True: 0, False: 0] ------------------ 396| 0| ArchName.startswith("aarch64")) ------------------ | Branch (396:9): [True: 0, False: 0] ------------------ 397| 0| return parseARMArch(ArchName); 398| 0| if (ArchName.startswith("bpf")) ------------------ | Branch (398:9): [True: 0, False: 0] ------------------ 399| 0| return parseBPFArch(ArchName); 400| 0| } 401| | 402| 7.49k| return AT; 403| 7.49k|} Triple.cpp:_ZL12parseSubArchN7llvm_ks9StringRefE: 481| 6.74k|static Triple::SubArchType parseSubArch(StringRef SubArchName) { 482| 6.74k| StringRef ARMSubArch = ARM::getCanonicalArchName(SubArchName); 483| | 484| | // For now, this is the small part. Early return. 485| 6.74k| if (ARMSubArch.empty()) ------------------ | Branch (485:7): [True: 0, False: 6.74k] ------------------ 486| 0| return StringSwitch(SubArchName) 487| 0| .EndsWith("kalimba3", Triple::KalimbaSubArch_v3) 488| 0| .EndsWith("kalimba4", Triple::KalimbaSubArch_v4) 489| 0| .EndsWith("kalimba5", Triple::KalimbaSubArch_v5) 490| 0| .Default(Triple::NoSubArch); 491| | 492| | // ARM sub arch. 493| 6.74k| switch(ARM::parseArch(ARMSubArch)) { 494| 0| case ARM::AK_ARMV4: ------------------ | Branch (494:3): [True: 0, False: 6.74k] ------------------ 495| 0| return Triple::NoSubArch; 496| 0| case ARM::AK_ARMV4T: ------------------ | Branch (496:3): [True: 0, False: 6.74k] ------------------ 497| 0| return Triple::ARMSubArch_v4t; 498| 0| case ARM::AK_ARMV5T: ------------------ | Branch (498:3): [True: 0, False: 6.74k] ------------------ 499| 0| return Triple::ARMSubArch_v5; 500| 0| case ARM::AK_ARMV5TE: ------------------ | Branch (500:3): [True: 0, False: 6.74k] ------------------ 501| 0| case ARM::AK_IWMMXT: ------------------ | Branch (501:3): [True: 0, False: 6.74k] ------------------ 502| 0| case ARM::AK_IWMMXT2: ------------------ | Branch (502:3): [True: 0, False: 6.74k] ------------------ 503| 0| case ARM::AK_XSCALE: ------------------ | Branch (503:3): [True: 0, False: 6.74k] ------------------ 504| 0| case ARM::AK_ARMV5TEJ: ------------------ | Branch (504:3): [True: 0, False: 6.74k] ------------------ 505| 0| return Triple::ARMSubArch_v5te; 506| 0| case ARM::AK_ARMV6: ------------------ | Branch (506:3): [True: 0, False: 6.74k] ------------------ 507| 0| return Triple::ARMSubArch_v6; 508| 0| case ARM::AK_ARMV6K: ------------------ | Branch (508:3): [True: 0, False: 6.74k] ------------------ 509| 0| case ARM::AK_ARMV6KZ: ------------------ | Branch (509:3): [True: 0, False: 6.74k] ------------------ 510| 0| return Triple::ARMSubArch_v6k; 511| 0| case ARM::AK_ARMV6T2: ------------------ | Branch (511:3): [True: 0, False: 6.74k] ------------------ 512| 0| return Triple::ARMSubArch_v6t2; 513| 0| case ARM::AK_ARMV6M: ------------------ | Branch (513:3): [True: 0, False: 6.74k] ------------------ 514| 0| return Triple::ARMSubArch_v6m; 515| 0| case ARM::AK_ARMV7A: ------------------ | Branch (515:3): [True: 0, False: 6.74k] ------------------ 516| 0| case ARM::AK_ARMV7R: ------------------ | Branch (516:3): [True: 0, False: 6.74k] ------------------ 517| 0| return Triple::ARMSubArch_v7; 518| 0| case ARM::AK_ARMV7K: ------------------ | Branch (518:3): [True: 0, False: 6.74k] ------------------ 519| 0| return Triple::ARMSubArch_v7k; 520| 0| case ARM::AK_ARMV7M: ------------------ | Branch (520:3): [True: 0, False: 6.74k] ------------------ 521| 0| return Triple::ARMSubArch_v7m; 522| 0| case ARM::AK_ARMV7S: ------------------ | Branch (522:3): [True: 0, False: 6.74k] ------------------ 523| 0| return Triple::ARMSubArch_v7s; 524| 0| case ARM::AK_ARMV7EM: ------------------ | Branch (524:3): [True: 0, False: 6.74k] ------------------ 525| 0| return Triple::ARMSubArch_v7em; 526| 0| case ARM::AK_ARMV8A: ------------------ | Branch (526:3): [True: 0, False: 6.74k] ------------------ 527| 0| return Triple::ARMSubArch_v8; 528| 0| case ARM::AK_ARMV8_1A: ------------------ | Branch (528:3): [True: 0, False: 6.74k] ------------------ 529| 0| return Triple::ARMSubArch_v8_1a; 530| 0| case ARM::AK_ARMV8_2A: ------------------ | Branch (530:3): [True: 0, False: 6.74k] ------------------ 531| 0| return Triple::ARMSubArch_v8_2a; 532| 0| case ARM::AK_ARMV8MBaseline: ------------------ | Branch (532:3): [True: 0, False: 6.74k] ------------------ 533| 0| return Triple::ARMSubArch_v8m_baseline; 534| 0| case ARM::AK_ARMV8MMainline: ------------------ | Branch (534:3): [True: 0, False: 6.74k] ------------------ 535| 0| return Triple::ARMSubArch_v8m_mainline; 536| 6.74k| default: ------------------ | Branch (536:3): [True: 6.74k, False: 0] ------------------ 537| 6.74k| return Triple::NoSubArch; 538| 6.74k| } 539| 6.74k|} Triple.cpp:_ZL16getDefaultFormatRKN7llvm_ks6TripleE: 551| 6.74k|static Triple::ObjectFormatType getDefaultFormat(const Triple &T) { 552| 6.74k| switch (T.getArch()) { ------------------ | Branch (552:11): [True: 6.74k, False: 0] ------------------ 553| 0| case Triple::UnknownArch: ------------------ | Branch (553:3): [True: 0, False: 6.74k] ------------------ 554| 0| case Triple::aarch64: ------------------ | Branch (554:3): [True: 0, False: 6.74k] ------------------ 555| 0| case Triple::arm: ------------------ | Branch (555:3): [True: 0, False: 6.74k] ------------------ 556| 0| case Triple::thumb: ------------------ | Branch (556:3): [True: 0, False: 6.74k] ------------------ 557| 0| case Triple::x86: ------------------ | Branch (557:3): [True: 0, False: 6.74k] ------------------ 558| 0| case Triple::x86_64: ------------------ | Branch (558:3): [True: 0, False: 6.74k] ------------------ 559| 0| if (T.isOSDarwin()) ------------------ | Branch (559:9): [True: 0, False: 0] ------------------ 560| 0| return Triple::MachO; 561| 0| else if (T.isOSWindows()) ------------------ | Branch (561:14): [True: 0, False: 0] ------------------ 562| 0| return Triple::COFF; 563| 0| return Triple::ELF; 564| | 565| 0| case Triple::aarch64_be: ------------------ | Branch (565:3): [True: 0, False: 6.74k] ------------------ 566| 0| case Triple::amdgcn: ------------------ | Branch (566:3): [True: 0, False: 6.74k] ------------------ 567| 0| case Triple::amdil: ------------------ | Branch (567:3): [True: 0, False: 6.74k] ------------------ 568| 0| case Triple::amdil64: ------------------ | Branch (568:3): [True: 0, False: 6.74k] ------------------ 569| 0| case Triple::armeb: ------------------ | Branch (569:3): [True: 0, False: 6.74k] ------------------ 570| 0| case Triple::avr: ------------------ | Branch (570:3): [True: 0, False: 6.74k] ------------------ 571| 0| case Triple::bpfeb: ------------------ | Branch (571:3): [True: 0, False: 6.74k] ------------------ 572| 0| case Triple::bpfel: ------------------ | Branch (572:3): [True: 0, False: 6.74k] ------------------ 573| 0| case Triple::hexagon: ------------------ | Branch (573:3): [True: 0, False: 6.74k] ------------------ 574| 0| case Triple::hsail: ------------------ | Branch (574:3): [True: 0, False: 6.74k] ------------------ 575| 0| case Triple::hsail64: ------------------ | Branch (575:3): [True: 0, False: 6.74k] ------------------ 576| 0| case Triple::kalimba: ------------------ | Branch (576:3): [True: 0, False: 6.74k] ------------------ 577| 0| case Triple::le32: ------------------ | Branch (577:3): [True: 0, False: 6.74k] ------------------ 578| 0| case Triple::le64: ------------------ | Branch (578:3): [True: 0, False: 6.74k] ------------------ 579| 6.74k| case Triple::mips: ------------------ | Branch (579:3): [True: 6.74k, False: 0] ------------------ 580| 6.74k| case Triple::mips64: ------------------ | Branch (580:3): [True: 0, False: 6.74k] ------------------ 581| 6.74k| case Triple::mips64el: ------------------ | Branch (581:3): [True: 0, False: 6.74k] ------------------ 582| 6.74k| case Triple::mipsel: ------------------ | Branch (582:3): [True: 0, False: 6.74k] ------------------ 583| 6.74k| case Triple::msp430: ------------------ | Branch (583:3): [True: 0, False: 6.74k] ------------------ 584| 6.74k| case Triple::nvptx: ------------------ | Branch (584:3): [True: 0, False: 6.74k] ------------------ 585| 6.74k| case Triple::nvptx64: ------------------ | Branch (585:3): [True: 0, False: 6.74k] ------------------ 586| 6.74k| case Triple::ppc64le: ------------------ | Branch (586:3): [True: 0, False: 6.74k] ------------------ 587| 6.74k| case Triple::r600: ------------------ | Branch (587:3): [True: 0, False: 6.74k] ------------------ 588| 6.74k| case Triple::riscv32: ------------------ | Branch (588:3): [True: 0, False: 6.74k] ------------------ 589| 6.74k| case Triple::riscv64: ------------------ | Branch (589:3): [True: 0, False: 6.74k] ------------------ 590| 6.74k| case Triple::shave: ------------------ | Branch (590:3): [True: 0, False: 6.74k] ------------------ 591| 6.74k| case Triple::sparc: ------------------ | Branch (591:3): [True: 0, False: 6.74k] ------------------ 592| 6.74k| case Triple::sparcel: ------------------ | Branch (592:3): [True: 0, False: 6.74k] ------------------ 593| 6.74k| case Triple::sparcv9: ------------------ | Branch (593:3): [True: 0, False: 6.74k] ------------------ 594| 6.74k| case Triple::spir: ------------------ | Branch (594:3): [True: 0, False: 6.74k] ------------------ 595| 6.74k| case Triple::spir64: ------------------ | Branch (595:3): [True: 0, False: 6.74k] ------------------ 596| 6.74k| case Triple::systemz: ------------------ | Branch (596:3): [True: 0, False: 6.74k] ------------------ 597| 6.74k| case Triple::tce: ------------------ | Branch (597:3): [True: 0, False: 6.74k] ------------------ 598| 6.74k| case Triple::thumbeb: ------------------ | Branch (598:3): [True: 0, False: 6.74k] ------------------ 599| 6.74k| case Triple::wasm32: ------------------ | Branch (599:3): [True: 0, False: 6.74k] ------------------ 600| 6.74k| case Triple::wasm64: ------------------ | Branch (600:3): [True: 0, False: 6.74k] ------------------ 601| 6.74k| case Triple::xcore: ------------------ | Branch (601:3): [True: 0, False: 6.74k] ------------------ 602| 6.74k| return Triple::ELF; 603| | 604| 0| case Triple::ppc: ------------------ | Branch (604:3): [True: 0, False: 6.74k] ------------------ 605| 0| case Triple::ppc64: ------------------ | Branch (605:3): [True: 0, False: 6.74k] ------------------ 606| 0| if (T.isOSDarwin()) ------------------ | Branch (606:9): [True: 0, False: 0] ------------------ 607| 0| return Triple::MachO; 608| 0| return Triple::ELF; 609| 6.74k| } 610| 0| llvm_unreachable("unknown architecture"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ 611| 6.74k|} _ZNK7llvm_ks5Twine3strEv: 16| 52.7k|std::string Twine::str() const { 17| | // If we're storing only a std::string, just return it. 18| 52.7k| if (LHSKind == StdStringKind && RHSKind == EmptyKind) ------------------ | Branch (18:7): [True: 3.74k, False: 48.9k] | Branch (18:35): [True: 3.74k, False: 0] ------------------ 19| 3.74k| return *LHS.stdString; 20| | 21| | // Otherwise, flatten and copy the contents first. 22| 48.9k| SmallString<256> Vec; 23| 48.9k| return toStringRef(Vec).str(); 24| 52.7k|} _ZNK7llvm_ks5Twine8toVectorERNS_15SmallVectorImplIcEE: 26| 1.26k|void Twine::toVector(SmallVectorImpl &Out) const { 27| 1.26k| raw_svector_ostream OS(Out); 28| 1.26k| print(OS); 29| 1.26k|} _ZNK7llvm_ks5Twine25toNullTerminatedStringRefERNS_15SmallVectorImplIcEE: 31| 1.49k|StringRef Twine::toNullTerminatedStringRef(SmallVectorImpl &Out) const { 32| 1.49k| if (isUnary()) { ------------------ | Branch (32:7): [True: 1.49k, False: 0] ------------------ 33| 1.49k| switch (getLHSKind()) { 34| 1.49k| case CStringKind: ------------------ | Branch (34:5): [True: 1.49k, False: 0] ------------------ 35| | // Already null terminated, yay! 36| 1.49k| return StringRef(LHS.cString); 37| 0| case StdStringKind: { ------------------ | Branch (37:5): [True: 0, False: 1.49k] ------------------ 38| 0| const std::string *str = LHS.stdString; 39| 0| return StringRef(str->c_str(), str->size()); 40| 0| } 41| 0| default: ------------------ | Branch (41:5): [True: 0, False: 1.49k] ------------------ 42| 0| break; 43| 1.49k| } 44| 1.49k| } 45| 0| toVector(Out); 46| 0| Out.push_back(0); 47| 0| Out.pop_back(); 48| 0| return StringRef(Out.data(), Out.size()); 49| 1.49k|} _ZNK7llvm_ks5Twine13printOneChildERNS_11raw_ostreamENS0_5ChildENS0_8NodeKindE: 52| 34.8k| NodeKind Kind) const { 53| 34.8k| switch (Kind) { ------------------ | Branch (53:11): [True: 34.8k, False: 0] ------------------ 54| 0| case Twine::NullKind: break; ------------------ | Branch (54:3): [True: 0, False: 34.8k] ------------------ 55| 15.0k| case Twine::EmptyKind: break; ------------------ | Branch (55:3): [True: 15.0k, False: 19.7k] ------------------ 56| 1.05k| case Twine::TwineKind: ------------------ | Branch (56:3): [True: 1.05k, False: 33.7k] ------------------ 57| 1.05k| Ptr.twine->print(OS); 58| 1.05k| break; 59| 17.4k| case Twine::CStringKind: ------------------ | Branch (59:3): [True: 17.4k, False: 17.4k] ------------------ 60| 17.4k| OS << Ptr.cString; 61| 17.4k| break; 62| 0| case Twine::StdStringKind: ------------------ | Branch (62:3): [True: 0, False: 34.8k] ------------------ 63| 0| OS << *Ptr.stdString; 64| 0| break; 65| 1.26k| case Twine::StringRefKind: ------------------ | Branch (65:3): [True: 1.26k, False: 33.5k] ------------------ 66| 1.26k| OS << *Ptr.stringRef; 67| 1.26k| break; 68| 0| case Twine::SmallStringKind: ------------------ | Branch (68:3): [True: 0, False: 34.8k] ------------------ 69| 0| OS << *Ptr.smallString; 70| 0| break; 71| 0| case Twine::CharKind: ------------------ | Branch (71:3): [True: 0, False: 34.8k] ------------------ 72| 0| OS << Ptr.character; 73| 0| break; 74| 0| case Twine::DecUIKind: ------------------ | Branch (74:3): [True: 0, False: 34.8k] ------------------ 75| 0| OS << Ptr.decUI; 76| 0| break; 77| 0| case Twine::DecIKind: ------------------ | Branch (77:3): [True: 0, False: 34.8k] ------------------ 78| 0| OS << Ptr.decI; 79| 0| break; 80| 0| case Twine::DecULKind: ------------------ | Branch (80:3): [True: 0, False: 34.8k] ------------------ 81| 0| OS << *Ptr.decUL; 82| 0| break; 83| 0| case Twine::DecLKind: ------------------ | Branch (83:3): [True: 0, False: 34.8k] ------------------ 84| 0| OS << *Ptr.decL; 85| 0| break; 86| 0| case Twine::DecULLKind: ------------------ | Branch (86:3): [True: 0, False: 34.8k] ------------------ 87| 0| OS << *Ptr.decULL; 88| 0| break; 89| 0| case Twine::DecLLKind: ------------------ | Branch (89:3): [True: 0, False: 34.8k] ------------------ 90| 0| OS << *Ptr.decLL; 91| 0| break; 92| 0| case Twine::UHexKind: ------------------ | Branch (92:3): [True: 0, False: 34.8k] ------------------ 93| 0| OS.write_hex(*Ptr.uHex); 94| 0| break; 95| 34.8k| } 96| 34.8k|} _ZNK7llvm_ks5Twine5printERNS_11raw_ostreamE: 151| 17.4k|void Twine::print(raw_ostream &OS) const { 152| 17.4k| printOneChild(OS, LHS, getLHSKind()); 153| 17.4k| printOneChild(OS, RHS, getRHSKind()); 154| 17.4k|} _ZNK7llvm_ks3sys2fs11file_status11getUniqueIDEv: 177| 1.49k|UniqueID file_status::getUniqueID() const { 178| 1.49k| return UniqueID(fs_st_dev, fs_st_ino); 179| 1.49k|} _ZN7llvm_ks3sys2fs12current_pathERNS_15SmallVectorImplIcEE: 181| 749|std::error_code current_path(SmallVectorImpl &result) { 182| 749| result.clear(); 183| | 184| 749| const char *pwd = ::getenv("PWD"); 185| 749| llvm_ks::sys::fs::file_status PWDStatus, DotStatus; 186| 749| if (pwd && llvm_ks::sys::path::is_absolute(pwd) && ------------------ | Branch (186:7): [True: 749, False: 0] | Branch (186:7): [True: 749, False: 0] | Branch (186:14): [True: 749, False: 0] ------------------ 187| 749| !llvm_ks::sys::fs::status(pwd, PWDStatus) && ------------------ | Branch (187:7): [True: 749, False: 0] ------------------ 188| 749| !llvm_ks::sys::fs::status(".", DotStatus) && ------------------ | Branch (188:7): [True: 749, False: 0] ------------------ 189| 749| PWDStatus.getUniqueID() == DotStatus.getUniqueID()) { ------------------ | Branch (189:7): [True: 749, False: 0] ------------------ 190| 749| result.append(pwd, pwd + strlen(pwd)); 191| 749| return std::error_code(); 192| 749| } 193| | 194| 0|#ifdef MAXPATHLEN 195| 0| result.reserve(MAXPATHLEN); 196| |#else 197| |// For GNU Hurd 198| | result.reserve(1024); 199| |#endif 200| | 201| 0| while (true) { ------------------ | Branch (201:10): [True: 0, Folded] ------------------ 202| 0| if (::getcwd(result.data(), result.capacity()) == nullptr) { ------------------ | Branch (202:9): [True: 0, False: 0] ------------------ 203| | // See if there was a real error. 204| 0| if (errno != ENOMEM) ------------------ | Branch (204:11): [True: 0, False: 0] ------------------ 205| 0| return std::error_code(errno, std::generic_category()); 206| | // Otherwise there just wasn't enough space. 207| 0| result.reserve(result.capacity() * 2); 208| 0| } else 209| 0| break; 210| 0| } 211| | 212| 0| result.set_size(strlen(result.data())); 213| 0| return std::error_code(); 214| 0|} _ZN7llvm_ks3sys2fs6statusERKNS_5TwineERNS1_11file_statusE: 376| 1.49k|std::error_code status(const Twine &Path, file_status &Result) { 377| 1.49k| SmallString<128> PathStorage; 378| 1.49k| StringRef P = Path.toNullTerminatedStringRef(PathStorage); 379| | 380| 1.49k| struct stat Status; 381| 1.49k| int StatRet = ::stat(P.begin(), &Status); 382| 1.49k| return fillStatus(StatRet, Status, Result); 383| 1.49k|} Path.cpp:_ZN7llvm_ks3sys2fsL10fillStatusEiRK4statRNS1_11file_statusE: 343| 1.49k| file_status &Result) { 344| 1.49k| if (StatRet != 0) { ------------------ | Branch (344:7): [True: 0, False: 1.49k] ------------------ 345| 0| std::error_code ec(errno, std::generic_category()); 346| 0| if (ec == errc::no_such_file_or_directory) ------------------ | Branch (346:9): [True: 0, False: 0] ------------------ 347| 0| Result = file_status(file_type::file_not_found); 348| 0| else 349| 0| Result = file_status(file_type::status_error); 350| 0| return ec; 351| 0| } 352| | 353| 1.49k| file_type Type = file_type::type_unknown; 354| | 355| 1.49k| if (S_ISDIR(Status.st_mode)) ------------------ | Branch (355:7): [True: 1.49k, False: 0] ------------------ 356| 1.49k| Type = file_type::directory_file; 357| 0| else if (S_ISREG(Status.st_mode)) ------------------ | Branch (357:12): [True: 0, False: 0] ------------------ 358| 0| Type = file_type::regular_file; 359| 0| else if (S_ISBLK(Status.st_mode)) ------------------ | Branch (359:12): [True: 0, False: 0] ------------------ 360| 0| Type = file_type::block_file; 361| 0| else if (S_ISCHR(Status.st_mode)) ------------------ | Branch (361:12): [True: 0, False: 0] ------------------ 362| 0| Type = file_type::character_file; 363| 0| else if (S_ISFIFO(Status.st_mode)) ------------------ | Branch (363:12): [True: 0, False: 0] ------------------ 364| 0| Type = file_type::fifo_file; 365| 0| else if (S_ISSOCK(Status.st_mode)) ------------------ | Branch (365:12): [True: 0, False: 0] ------------------ 366| 0| Type = file_type::socket_file; 367| | 368| 1.49k| perms Perms = static_cast(Status.st_mode); 369| 1.49k| Result = 370| 1.49k| file_status(Type, Perms, Status.st_dev, Status.st_ino, Status.st_mtime, 371| 1.49k| Status.st_uid, Status.st_gid, Status.st_size); 372| | 373| 1.49k| return std::error_code(); 374| 1.49k|} _ZN7llvm_ks11raw_ostreamD2Ev: 64| 39.9k|raw_ostream::~raw_ostream() { 65| | // raw_ostream's subclasses should take care to flush the buffer 66| | // in their destructors. 67| 39.9k| assert(OutBufCur == OutBufStart && ------------------ | Branch (67:3): [True: 39.9k, False: 0] | Branch (67:3): [True: 39.9k, Folded] | Branch (67:3): [True: 39.9k, False: 0] ------------------ 68| 39.9k| "raw_ostream destructor called with non-empty buffer!"); 69| | 70| 39.9k| if (BufferMode == InternalBuffer) ------------------ | Branch (70:7): [True: 0, False: 39.9k] ------------------ 71| 0| delete [] OutBufStart; 72| 39.9k|} _ZN7llvm_ks11raw_ostream16SetBufferAndModeEPcmNS0_10BufferKindE: 92| 39.9k| BufferKind Mode) { 93| 39.9k| assert(((Mode == Unbuffered && !BufferStart && Size == 0) || ------------------ | Branch (93:3): [True: 39.9k, False: 0] | Branch (93:3): [True: 39.9k, False: 0] | Branch (93:3): [True: 39.9k, False: 0] | Branch (93:3): [True: 0, False: 0] | Branch (93:3): [True: 0, False: 0] | Branch (93:3): [True: 0, False: 0] | Branch (93:3): [True: 39.9k, Folded] | Branch (93:3): [True: 39.9k, False: 0] ------------------ 94| 39.9k| (Mode != Unbuffered && BufferStart && Size != 0)) && 95| 39.9k| "stream must be unbuffered or have at least one byte"); 96| | // Make sure the current buffer is free of content (we can't flush here; the 97| | // child buffer management logic will be in write_impl). 98| 39.9k| assert(GetNumBytesInBuffer() == 0 && "Current buffer is non-empty!"); ------------------ | Branch (98:3): [True: 39.9k, False: 0] | Branch (98:3): [True: 39.9k, Folded] | Branch (98:3): [True: 39.9k, False: 0] ------------------ 99| | 100| 39.9k| if (BufferMode == InternalBuffer) ------------------ | Branch (100:7): [True: 39.9k, False: 0] ------------------ 101| 39.9k| delete [] OutBufStart; 102| 39.9k| OutBufStart = BufferStart; 103| 39.9k| OutBufEnd = OutBufStart+Size; 104| 39.9k| OutBufCur = OutBufStart; 105| 39.9k| BufferMode = Mode; 106| | 107| | assert(OutBufStart <= OutBufEnd && "Invalid size!"); ------------------ | Branch (107:3): [True: 39.9k, False: 0] | Branch (107:3): [True: 39.9k, Folded] | Branch (107:3): [True: 39.9k, False: 0] ------------------ 108| 39.9k|} _ZN7llvm_ks11raw_ostreamlsEm: 110| 55.0k|raw_ostream &raw_ostream::operator<<(unsigned long N) { 111| | // Zero is a special case. 112| 55.0k| if (N == 0) ------------------ | Branch (112:7): [True: 5.04k, False: 50.0k] ------------------ 113| 5.04k| return *this << '0'; 114| | 115| 50.0k| char NumberBuffer[20]; 116| 50.0k| char *EndPtr = NumberBuffer+sizeof(NumberBuffer); 117| 50.0k| char *CurPtr = EndPtr; 118| | 119| 162k| while (N) { ------------------ | Branch (119:10): [True: 112k, False: 50.0k] ------------------ 120| 112k| *--CurPtr = '0' + char(N % 10); 121| 112k| N /= 10; 122| 112k| } 123| 50.0k| return write(CurPtr, EndPtr-CurPtr); 124| 55.0k|} _ZN7llvm_ks11raw_ostreamlsEl: 126| 43.6k|raw_ostream &raw_ostream::operator<<(long N) { 127| 43.6k| if (N < 0) { ------------------ | Branch (127:7): [True: 18, False: 43.5k] ------------------ 128| 18| *this << '-'; 129| | // Avoid undefined behavior on LONG_MIN with a cast. 130| 18| N = -(unsigned long)N; 131| 18| } 132| | 133| 43.6k| return this->operator<<(static_cast(N)); 134| 43.6k|} _ZN7llvm_ks11raw_ostream5writeEh: 278| 4.83M|raw_ostream &raw_ostream::write(unsigned char C) { 279| | // Group exceptional cases into a single branch. 280| 4.83M| if (LLVM_UNLIKELY(OutBufCur >= OutBufEnd)) { ------------------ | | 171| 4.83M|#define LLVM_UNLIKELY(EXPR) __builtin_expect((bool)(EXPR), false) | | ------------------ | | | Branch (171:29): [True: 4.83M, False: 0] | | ------------------ ------------------ 281| 4.83M| if (LLVM_UNLIKELY(!OutBufStart)) { ------------------ | | 171| 4.83M|#define LLVM_UNLIKELY(EXPR) __builtin_expect((bool)(EXPR), false) | | ------------------ | | | Branch (171:29): [True: 4.83M, False: 0] | | ------------------ ------------------ 282| 4.83M| if (BufferMode == Unbuffered) { ------------------ | Branch (282:11): [True: 4.83M, False: 0] ------------------ 283| 4.83M| write_impl(reinterpret_cast(&C), 1); 284| 4.83M| return *this; 285| 4.83M| } 286| | // Set up a buffer and start over. 287| 0| SetBuffered(); 288| 0| return write(C); 289| 4.83M| } 290| | 291| 0| flush_nonempty(); 292| 0| } 293| | 294| 0| *OutBufCur++ = C; 295| 0| return *this; 296| 4.83M|} _ZN7llvm_ks11raw_ostream5writeEPKcm: 298| 1.07M|raw_ostream &raw_ostream::write(const char *Ptr, size_t Size) { 299| | // Group exceptional cases into a single branch. 300| 1.07M| if (LLVM_UNLIKELY(size_t(OutBufEnd - OutBufCur) < Size)) { ------------------ | | 171| 1.07M|#define LLVM_UNLIKELY(EXPR) __builtin_expect((bool)(EXPR), false) | | ------------------ | | | Branch (171:29): [True: 1.07M, False: 0] | | ------------------ ------------------ 301| 1.07M| if (LLVM_UNLIKELY(!OutBufStart)) { ------------------ | | 171| 1.07M|#define LLVM_UNLIKELY(EXPR) __builtin_expect((bool)(EXPR), false) | | ------------------ | | | Branch (171:29): [True: 1.07M, False: 0] | | ------------------ ------------------ 302| 1.07M| if (BufferMode == Unbuffered) { ------------------ | Branch (302:11): [True: 1.07M, False: 0] ------------------ 303| 1.07M| write_impl(Ptr, Size); 304| 1.07M| return *this; 305| 1.07M| } 306| | // Set up a buffer and start over. 307| 0| SetBuffered(); 308| 0| return write(Ptr, Size); 309| 1.07M| } 310| | 311| 0| size_t NumBytes = OutBufEnd - OutBufCur; 312| | 313| | // If the buffer is empty at this point we have a string that is larger 314| | // than the buffer. Directly write the chunk that is a multiple of the 315| | // preferred buffer size and put the remainder in the buffer. 316| 0| if (LLVM_UNLIKELY(OutBufCur == OutBufStart)) { ------------------ | | 171| 0|#define LLVM_UNLIKELY(EXPR) __builtin_expect((bool)(EXPR), false) | | ------------------ | | | Branch (171:29): [True: 0, False: 0] | | ------------------ ------------------ 317| 0| assert(NumBytes != 0 && "undefined behavior"); ------------------ | Branch (317:7): [True: 0, False: 0] | Branch (317:7): [True: 0, Folded] | Branch (317:7): [True: 0, False: 0] ------------------ 318| 0| size_t BytesToWrite = Size - (Size % NumBytes); 319| 0| write_impl(Ptr, BytesToWrite); 320| 0| size_t BytesRemaining = Size - BytesToWrite; 321| 0| if (BytesRemaining > size_t(OutBufEnd - OutBufCur)) { ------------------ | Branch (321:11): [True: 0, False: 0] ------------------ 322| | // Too much left over to copy into our buffer. 323| 0| return write(Ptr + BytesToWrite, BytesRemaining); 324| 0| } 325| 0| copy_to_buffer(Ptr + BytesToWrite, BytesRemaining); 326| 0| return *this; 327| 0| } 328| | 329| | // We don't have enough space in the buffer to fit the string in. Insert as 330| | // much as possible, flush and start over with the remainder. 331| 0| copy_to_buffer(Ptr, NumBytes); 332| 0| flush_nonempty(); 333| 0| return write(Ptr + NumBytes, Size - NumBytes); 334| 0| } 335| | 336| 0| copy_to_buffer(Ptr, Size); 337| | 338| 0| return *this; 339| 1.07M|} _ZN7llvm_ks14raw_fd_ostreamC2Eibb: 517| 1| : raw_pwrite_stream(unbuffered), FD(fd), ShouldClose(shouldClose), 518| 1| Error(false) { 519| 1| if (FD < 0 ) { ------------------ | Branch (519:7): [True: 0, False: 1] ------------------ 520| 0| ShouldClose = false; 521| 0| return; 522| 0| } 523| | 524| | // Get the starting position. 525| 1| off_t loc = ::lseek(FD, 0, SEEK_CUR); 526| |#ifdef LLVM_ON_WIN32 527| | // MSVCRT's _lseek(SEEK_CUR) doesn't return -1 for pipes. 528| | sys::fs::file_status Status; 529| | std::error_code EC = status(FD, Status); 530| | SupportsSeeking = !EC && Status.type() == sys::fs::file_type::regular_file; 531| |#else 532| 1| SupportsSeeking = loc != (off_t)-1; 533| 1|#endif 534| 1| if (!SupportsSeeking) ------------------ | Branch (534:7): [True: 0, False: 1] ------------------ 535| 0| pos = 0; 536| 1| else 537| 1| pos = static_cast(loc); 538| 1|} _ZN7llvm_ks14raw_fd_ostreamD2Ev: 540| 1|raw_fd_ostream::~raw_fd_ostream() { 541| 1| if (FD >= 0) { ------------------ | Branch (541:7): [True: 1, False: 0] ------------------ 542| 1| flush(); 543| 1| } 544| | 545| |#ifdef __MINGW32__ 546| | // On mingw, global dtors should not call exit(). 547| | // report_fatal_error() invokes exit(). We know report_fatal_error() 548| | // might not write messages to stderr when any errors were detected 549| | // on FD == 2. 550| | if (FD == 2) return; 551| |#endif 552| | 553| | // If there are any pending errors, report them now. Clients wishing 554| | // to avoid report_fatal_error calls should check for errors with 555| | // has_error() and clear the error flag with clear_error() before 556| | // destructing raw_ostream objects which may have errors. 557| 1| if (has_error()) ------------------ | Branch (557:7): [True: 0, False: 1] ------------------ 558| 0| report_fatal_error("IO failure on output stream.", /*GenCrashDiag=*/false); 559| 1|} _ZN7llvm_ks14raw_fd_ostream10write_implEPKcm: 562| 4.17M|void raw_fd_ostream::write_impl(const char *Ptr, size_t Size) { 563| 4.17M| assert(FD >= 0 && "File already closed."); ------------------ | Branch (563:3): [True: 4.17M, False: 0] | Branch (563:3): [True: 4.17M, Folded] | Branch (563:3): [True: 4.17M, False: 0] ------------------ 564| 4.17M| pos += Size; 565| | 566| 4.17M|#ifndef LLVM_ON_WIN32 567| 4.17M| bool ShouldWriteInChunks = false; 568| |#else 569| | // Writing a large size of output to Windows console returns ENOMEM. It seems 570| | // that, prior to Windows 8, WriteFile() is redirecting to WriteConsole(), and 571| | // the latter has a size limit (66000 bytes or less, depending on heap usage). 572| | bool ShouldWriteInChunks = !!::_isatty(FD) && !RunningWindows8OrGreater(); 573| |#endif 574| | 575| 4.17M| do { 576| 4.17M| size_t ChunkSize = Size; 577| 4.17M| if (ChunkSize > 32767 && ShouldWriteInChunks) ------------------ | Branch (577:9): [True: 0, False: 4.17M] | Branch (577:30): [True: 0, False: 0] ------------------ 578| 0| ChunkSize = 32767; 579| | 580| 4.17M| ssize_t ret = ::write(FD, Ptr, ChunkSize); 581| | 582| 4.17M| if (ret < 0) { ------------------ | Branch (582:9): [True: 0, False: 4.17M] ------------------ 583| | // If it's a recoverable error, swallow it and retry the write. 584| | // 585| | // Ideally we wouldn't ever see EAGAIN or EWOULDBLOCK here, since 586| | // raw_ostream isn't designed to do non-blocking I/O. However, some 587| | // programs, such as old versions of bjam, have mistakenly used 588| | // O_NONBLOCK. For compatibility, emulate blocking semantics by 589| | // spinning until the write succeeds. If you don't want spinning, 590| | // don't use O_NONBLOCK file descriptors with raw_ostream. 591| 0| if (errno == EINTR || errno == EAGAIN ------------------ | Branch (591:11): [True: 0, False: 0] | Branch (591:29): [True: 0, False: 0] ------------------ 592| 0|#ifdef EWOULDBLOCK 593| 0| || errno == EWOULDBLOCK ------------------ | Branch (593:14): [True: 0, False: 0] ------------------ 594| 0|#endif 595| 0| ) 596| 0| continue; 597| | 598| | // Otherwise it's a non-recoverable error. Note it and quit. 599| 0| error_detected(); 600| 0| break; 601| 0| } 602| | 603| | // The write may have written some or all of the data. Update the 604| | // size and buffer pointer to reflect the remainder that needs 605| | // to be written. If there are no bytes left, we're done. 606| 4.17M| Ptr += ret; 607| 4.17M| Size -= ret; 608| 4.17M| } while (Size > 0); ------------------ | Branch (608:12): [True: 0, False: 4.17M] ------------------ 609| 4.17M|} _ZN7llvm_ks14raw_fd_ostream11changeColorENS_11raw_ostream6ColorsEbb: 655| 148k| bool bg) { 656| 148k| return *this; 657| 148k|} _ZN7llvm_ks14raw_fd_ostream10resetColorEv: 659| 102k|raw_ostream &raw_fd_ostream::resetColor() { 660| 102k| return *this; 661| 102k|} _ZNK7llvm_ks14raw_fd_ostream10has_colorsEv: 671| 45.9k|bool raw_fd_ostream::has_colors() const { 672| 45.9k| return true; 673| 45.9k|} _ZN7llvm_ks4errsEv: 693| 91.9k|raw_ostream &llvm_ks::errs() { 694| | // Set standard error to be unbuffered by default. 695| | static raw_fd_ostream S(STDERR_FILENO, false, true); 696| 91.9k| return S; 697| 91.9k|} _ZNK7llvm_ks19raw_svector_ostream11current_posEv: 722| 3.98k|uint64_t raw_svector_ostream::current_pos() const { return OS.size(); } _ZN7llvm_ks19raw_svector_ostream10write_implEPKcm: 724| 1.73M|void raw_svector_ostream::write_impl(const char *Ptr, size_t Size) { 725| 1.73M| OS.append(Ptr, Ptr + Size); 726| 1.73M|} LLVMInitializeAArch64AsmParser: 4658| 1|extern "C" void LLVMInitializeAArch64AsmParser() { 4659| 1| RegisterMCAsmParser X(TheAArch64leTarget); 4660| 1| RegisterMCAsmParser Y(TheAArch64beTarget); 4661| 1| RegisterMCAsmParser Z(TheARM64Target); 4662| 1|} LLVMInitializeAArch64TargetMC: 75| 1|extern "C" void LLVMInitializeAArch64TargetMC() { 76| 1| for (Target *T : ------------------ | Branch (76:18): [True: 3, False: 1] ------------------ 77| 3| {&TheAArch64leTarget, &TheAArch64beTarget, &TheARM64Target}) { 78| | // Register the MC asm info. 79| 3| RegisterMCAsmInfoFn X(*T, createAArch64MCAsmInfo); 80| | 81| | // Register the MC instruction info. 82| 3| TargetRegistry::RegisterMCInstrInfo(*T, createAArch64MCInstrInfo); 83| | 84| | // Register the MC register info. 85| 3| TargetRegistry::RegisterMCRegInfo(*T, createAArch64MCRegisterInfo); 86| | 87| | // Register the MC subtarget info. 88| 3| TargetRegistry::RegisterMCSubtargetInfo(*T, createAArch64MCSubtargetInfo); 89| | 90| | // Register the MC Code Emitter 91| 3| TargetRegistry::RegisterMCCodeEmitter(*T, createAArch64MCCodeEmitter); 92| 3| } 93| | 94| | // Register the asm backend. 95| 1| for (Target *T : {&TheAArch64leTarget, &TheARM64Target}) ------------------ | Branch (95:18): [True: 2, False: 1] ------------------ 96| 2| TargetRegistry::RegisterMCAsmBackend(*T, createAArch64leAsmBackend); 97| 1| TargetRegistry::RegisterMCAsmBackend(TheAArch64beTarget, 98| 1| createAArch64beAsmBackend); 99| 1|} LLVMInitializeAArch64TargetInfo: 20| 1|extern "C" void LLVMInitializeAArch64TargetInfo() { 21| | // Now register the "arm64" name for use with "-march". We don't want it to 22| | // take possession of the Triple::aarch64 tag though. 23| 1| TargetRegistry::RegisterTarget(TheARM64Target, "arm64", 24| 1| "ARM64 (little endian)", 25| 1| [](Triple::ArchType) { return false; }); 26| | 27| 1| RegisterTarget Z( 28| 1| TheAArch64leTarget, "aarch64", "AArch64 (little endian)"); 29| 1| RegisterTarget W( 30| 1| TheAArch64beTarget, "aarch64_be", "AArch64 (big endian)"); 31| | 32| 1|} AArch64TargetInfo.cpp:_ZZ31LLVMInitializeAArch64TargetInfoENK3$_0clEN7llvm_ks6Triple8ArchTypeE: 25| 749| [](Triple::ArchType) { return false; }); LLVMInitializeARMAsmParser: 10210| 1|extern "C" void LLVMInitializeARMAsmParser() { 10211| 1| RegisterMCAsmParser X(TheARMLETarget); 10212| 1| RegisterMCAsmParser Y(TheARMBETarget); 10213| 1| RegisterMCAsmParser A(TheThumbLETarget); 10214| 1| RegisterMCAsmParser B(TheThumbBETarget); 10215| 1|} LLVMInitializeARMTargetMC: 199| 1|extern "C" void LLVMInitializeARMTargetMC() { 200| 1| for (Target *T : {&TheARMLETarget, &TheARMBETarget, &TheThumbLETarget, ------------------ | Branch (200:18): [True: 4, False: 1] ------------------ 201| 4| &TheThumbBETarget}) { 202| | // Register the MC asm info. 203| 4| RegisterMCAsmInfoFn X(*T, createARMMCAsmInfo); 204| | 205| | // Register the MC instruction info. 206| 4| TargetRegistry::RegisterMCInstrInfo(*T, createARMMCInstrInfo); 207| | 208| | // Register the MC register info. 209| 4| TargetRegistry::RegisterMCRegInfo(*T, createARMMCRegisterInfo); 210| | 211| | // Register the MC subtarget info. 212| 4| TargetRegistry::RegisterMCSubtargetInfo(*T, 213| 4| ARM_MC::createARMMCSubtargetInfo); 214| 4| } 215| | 216| | // Register the MC Code Emitter 217| 1| for (Target *T : {&TheARMLETarget, &TheThumbLETarget}) ------------------ | Branch (217:18): [True: 2, False: 1] ------------------ 218| 2| TargetRegistry::RegisterMCCodeEmitter(*T, createARMLEMCCodeEmitter); 219| 1| for (Target *T : {&TheARMBETarget, &TheThumbBETarget}) ------------------ | Branch (219:18): [True: 2, False: 1] ------------------ 220| 2| TargetRegistry::RegisterMCCodeEmitter(*T, createARMBEMCCodeEmitter); 221| | 222| | // Register the asm backend. 223| 1| TargetRegistry::RegisterMCAsmBackend(TheARMLETarget, createARMLEAsmBackend); 224| 1| TargetRegistry::RegisterMCAsmBackend(TheARMBETarget, createARMBEAsmBackend); 225| 1| TargetRegistry::RegisterMCAsmBackend(TheThumbLETarget, 226| 1| createThumbLEAsmBackend); 227| 1| TargetRegistry::RegisterMCAsmBackend(TheThumbBETarget, 228| 1| createThumbBEAsmBackend); 229| 1|} LLVMInitializeARMTargetInfo: 17| 1|extern "C" void LLVMInitializeARMTargetInfo() { 18| 1| RegisterTarget 19| 1| X(TheARMLETarget, "arm", "ARM"); 20| 1| RegisterTarget 21| 1| Y(TheARMBETarget, "armeb", "ARM (big endian)"); 22| | 23| 1| RegisterTarget 24| 1| A(TheThumbLETarget, "thumb", "Thumb"); 25| 1| RegisterTarget 26| 1| B(TheThumbBETarget, "thumbeb", "Thumb (big endian)"); 27| 1|} LLVMInitializeHexagonAsmParser: 1104| 1|extern "C" void LLVMInitializeHexagonAsmParser() { 1105| 1| RegisterMCAsmParser X(TheHexagonTarget); 1106| 1|} LLVMInitializeHexagonTargetMC: 118| 1|extern "C" void LLVMInitializeHexagonTargetMC() { 119| | // Register the MC asm info. 120| 1| RegisterMCAsmInfoFn X(TheHexagonTarget, createHexagonMCAsmInfo); 121| | 122| | // Register the MC instruction info. 123| 1| TargetRegistry::RegisterMCInstrInfo(TheHexagonTarget, 124| 1| createHexagonMCInstrInfo); 125| | 126| | // Register the MC register info. 127| 1| TargetRegistry::RegisterMCRegInfo(TheHexagonTarget, 128| 1| createHexagonMCRegisterInfo); 129| | 130| | // Register the MC subtarget info. 131| 1| TargetRegistry::RegisterMCSubtargetInfo(TheHexagonTarget, 132| 1| createHexagonMCSubtargetInfo); 133| | 134| | // Register the MC Code Emitter 135| 1| TargetRegistry::RegisterMCCodeEmitter(TheHexagonTarget, 136| 1| createHexagonMCCodeEmitter); 137| | 138| | // Register the asm backend 139| 1| TargetRegistry::RegisterMCAsmBackend(TheHexagonTarget, 140| 1| createHexagonAsmBackend); 141| 1|} LLVMInitializeHexagonTargetInfo: 16| 1|extern "C" void LLVMInitializeHexagonTargetInfo() { 17| 1| RegisterTarget X(TheHexagonTarget, "hexagon", "Hexagon"); 18| 1|} LLVMInitializeMipsAsmParser: 6345| 1|extern "C" void LLVMInitializeMipsAsmParser() { 6346| 1| RegisterMCAsmParser X(TheMipsTarget); 6347| 1| RegisterMCAsmParser Y(TheMipselTarget); 6348| 1| RegisterMCAsmParser A(TheMips64Target); 6349| 1| RegisterMCAsmParser B(TheMips64elTarget); 6350| 1|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParserC2ERKN7llvm_ks15MCSubtargetInfoERNS1_11MCAsmParserERKNS1_11MCInstrInfoERKNS1_15MCTargetOptionsE: 406| 749| : MCTargetAsmParser(Options, sti), 407| 749| ABI(MipsABIInfo::computeTargetABI(Triple(sti.getTargetTriple()), 408| 749| sti.getCPU(), Options)) { 409| 749| MCAsmParserExtension::Initialize(parser); 410| | 411| 749| parser.addAliasForDirective(".asciiz", ".asciz"); 412| | 413| | // Initialize the set of available features. 414| 749| setAvailableFeatures(ComputeAvailableFeatures(getSTI().getFeatureBits())); 415| | 416| | // Remember the initial assembler options. The user can not modify these. 417| 749| AssemblerOptions.push_back( 418| 749| llvm_ks::make_unique(getSTI().getFeatureBits())); 419| | 420| | // Create an assembler options environment for the user to modify. 421| 749| AssemblerOptions.push_back( 422| 749| llvm_ks::make_unique(getSTI().getFeatureBits())); 423| | 424| | //getTargetStreamer().updateABIInfo(*this); 425| | 426| | //if (!isABI_O32() && !useOddSPReg() != 0) 427| | // report_fatal_error("-mno-odd-spreg requires the O32 ABI"); 428| | 429| 749| CurrentFn = nullptr; 430| | 431| | //IsPicEnabled = 432| | // (getContext().getObjectFileInfo()->getRelocM() == Reloc::PIC_); 433| | 434| 749| IsCpRestoreSet = false; 435| 749| CpRestoreOffset = -1; 436| | 437| 749| Triple TheTriple(sti.getTargetTriple()); 438| 749| if ((TheTriple.getArch() == Triple::mips) || ------------------ | Branch (438:9): [True: 749, False: 0] ------------------ 439| 0| (TheTriple.getArch() == Triple::mips64)) ------------------ | Branch (439:9): [True: 0, False: 0] ------------------ 440| 749| IsLittleEndian = false; 441| 0| else 442| 0| IsLittleEndian = true; 443| 749| } MipsAsmParser.cpp:_ZN12_GLOBAL__N_120MipsAssemblerOptionsC2ERKN7llvm_ks13FeatureBitsetE: 50| 1.49k| ATReg(1), Reorder(true), Macro(true), Features(Features_) {} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser16parseAnyRegisterERN7llvm_ks15SmallVectorImplINSt3__110unique_ptrINS1_18MCParsedAsmOperandENS3_14default_deleteIS5_EEEEEE: 4503| 36.0k|MipsAsmParser::parseAnyRegister(OperandVector &Operands) { 4504| 36.0k| MCAsmParser &Parser = getParser(); 4505| 36.0k| DEBUG(dbgs() << "parseAnyRegister\n"); 4506| | 4507| 36.0k| auto Token = Parser.getTok(); 4508| | 4509| 36.0k| SMLoc S = Token.getLoc(); 4510| | 4511| 36.0k| if (Token.isNot(AsmToken::Dollar)) { ------------------ | Branch (4511:7): [True: 9.00k, False: 27.0k] ------------------ 4512| 9.00k| DEBUG(dbgs() << ".. !$ -> try sym aliasing\n"); 4513| 9.00k| if (Token.is(AsmToken::Identifier)) { ------------------ | Branch (4513:9): [True: 7.52k, False: 1.47k] ------------------ 4514| 7.52k| if (searchSymbolAlias(Operands)) ------------------ | Branch (4514:11): [True: 9, False: 7.51k] ------------------ 4515| 9| return MatchOperand_Success; 4516| 7.52k| } 4517| 8.99k| DEBUG(dbgs() << ".. !symalias -> NoMatch\n"); 4518| 8.99k| return MatchOperand_NoMatch; 4519| 9.00k| } 4520| 27.0k| DEBUG(dbgs() << ".. $\n"); 4521| | 4522| 27.0k| OperandMatchResultTy ResTy = matchAnyRegisterWithoutDollar(Operands, S); 4523| 27.0k| if (ResTy == MatchOperand_Success) { ------------------ | Branch (4523:7): [True: 4.85k, False: 22.1k] ------------------ 4524| 4.85k| Parser.Lex(); // $ 4525| 4.85k| Parser.Lex(); // identifier 4526| 4.85k| } 4527| 27.0k| return ResTy; 4528| 36.0k|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser17searchSymbolAliasERN7llvm_ks15SmallVectorImplINSt3__110unique_ptrINS1_18MCParsedAsmOperandENS3_14default_deleteIS5_EEEEEE: 4383| 7.52k|bool MipsAsmParser::searchSymbolAlias(OperandVector &Operands) { 4384| 7.52k| MCAsmParser &Parser = getParser(); 4385| 7.52k| MCSymbol *Sym = getContext().lookupSymbol(Parser.getTok().getIdentifier()); 4386| 7.52k| if (Sym) { ------------------ | Branch (4386:7): [True: 3.87k, False: 3.65k] ------------------ 4387| 3.87k| SMLoc S = Parser.getTok().getLoc(); 4388| 3.87k| const MCExpr *Expr; 4389| 3.87k| if (Sym->isVariable()) ------------------ | Branch (4389:9): [True: 9, False: 3.86k] ------------------ 4390| 9| Expr = Sym->getVariableValue(); 4391| 3.86k| else 4392| 3.86k| return false; 4393| 9| if (Expr->getKind() == MCExpr::SymbolRef) { ------------------ | Branch (4393:9): [True: 0, False: 9] ------------------ 4394| 0| const MCSymbolRefExpr *Ref = static_cast(Expr); 4395| 0| StringRef DefSymbol = Ref->getSymbol().getName(); 4396| 0| if (DefSymbol.startswith("$")) { ------------------ | Branch (4396:11): [True: 0, False: 0] ------------------ 4397| 0| OperandMatchResultTy ResTy = 4398| 0| matchAnyRegisterNameWithoutDollar(Operands, DefSymbol.substr(1), S); 4399| 0| if (ResTy == MatchOperand_Success) { ------------------ | Branch (4399:13): [True: 0, False: 0] ------------------ 4400| 0| Parser.Lex(); 4401| 0| return true; 4402| 0| } else if (ResTy == MatchOperand_ParseFail) ------------------ | Branch (4402:20): [True: 0, False: 0] ------------------ 4403| 0| llvm_unreachable("Should never ParseFail"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ 4404| 0| return false; 4405| 0| } 4406| 9| } else if (Expr->getKind() == MCExpr::Constant) { ------------------ | Branch (4406:16): [True: 9, False: 0] ------------------ 4407| 9| Parser.Lex(); 4408| 9| const MCConstantExpr *Const = static_cast(Expr); 4409| 9| Operands.push_back( 4410| 9| MipsOperand::CreateImm(Const, S, Parser.getTok().getLoc(), *this)); 4411| 9| return true; 4412| 9| } 4413| 9| } 4414| 3.65k| return false; 4415| 7.52k|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser33matchAnyRegisterNameWithoutDollarERN7llvm_ks15SmallVectorImplINSt3__110unique_ptrINS1_18MCParsedAsmOperandENS3_14default_deleteIS5_EEEEEENS1_9StringRefENS1_5SMLocE: 4420| 955| SMLoc S) { 4421| 955| int Index = matchCPURegisterName(Identifier); 4422| 955| if (Index != -1) { ------------------ | Branch (4422:7): [True: 33, False: 922] ------------------ 4423| 33| Operands.push_back(MipsOperand::createGPRReg( 4424| 33| Index, getContext().getRegisterInfo(), S, getLexer().getLoc(), *this)); 4425| 33| return MatchOperand_Success; 4426| 33| } 4427| | 4428| 922| Index = matchHWRegsRegisterName(Identifier); 4429| 922| if (Index != -1) { ------------------ | Branch (4429:7): [True: 0, False: 922] ------------------ 4430| 0| Operands.push_back(MipsOperand::createHWRegsReg( 4431| 0| Index, getContext().getRegisterInfo(), S, getLexer().getLoc(), *this)); 4432| 0| return MatchOperand_Success; 4433| 0| } 4434| | 4435| 922| Index = matchFPURegisterName(Identifier); 4436| 922| if (Index != -1) { ------------------ | Branch (4436:7): [True: 44, False: 878] ------------------ 4437| 44| Operands.push_back(MipsOperand::createFGRReg( 4438| 44| Index, getContext().getRegisterInfo(), S, getLexer().getLoc(), *this)); 4439| 44| return MatchOperand_Success; 4440| 44| } 4441| | 4442| 878| Index = matchFCCRegisterName(Identifier); 4443| 878| if (Index != -1) { ------------------ | Branch (4443:7): [True: 0, False: 878] ------------------ 4444| 0| Operands.push_back(MipsOperand::createFCCReg( 4445| 0| Index, getContext().getRegisterInfo(), S, getLexer().getLoc(), *this)); 4446| 0| return MatchOperand_Success; 4447| 0| } 4448| | 4449| 878| Index = matchACRegisterName(Identifier); 4450| 878| if (Index != -1) { ------------------ | Branch (4450:7): [True: 21, False: 857] ------------------ 4451| 21| Operands.push_back(MipsOperand::createACCReg( 4452| 21| Index, getContext().getRegisterInfo(), S, getLexer().getLoc(), *this)); 4453| 21| return MatchOperand_Success; 4454| 21| } 4455| | 4456| 857| Index = matchMSA128RegisterName(Identifier); 4457| 857| if (Index != -1) { ------------------ | Branch (4457:7): [True: 0, False: 857] ------------------ 4458| 0| Operands.push_back(MipsOperand::createMSA128Reg( 4459| 0| Index, getContext().getRegisterInfo(), S, getLexer().getLoc(), *this)); 4460| 0| return MatchOperand_Success; 4461| 0| } 4462| | 4463| 857| Index = matchMSA128CtrlRegisterName(Identifier); 4464| 857| if (Index != -1) { ------------------ | Branch (4464:7): [True: 21, False: 836] ------------------ 4465| 21| Operands.push_back(MipsOperand::createMSACtrlReg( 4466| 21| Index, getContext().getRegisterInfo(), S, getLexer().getLoc(), *this)); 4467| 21| return MatchOperand_Success; 4468| 21| } 4469| | 4470| 836| return MatchOperand_NoMatch; 4471| 857|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser20matchCPURegisterNameEN7llvm_ks9StringRefE: 3861| 971|int MipsAsmParser::matchCPURegisterName(StringRef Name) { 3862| 971| int CC; 3863| | 3864| 971| CC = StringSwitch(Name) 3865| 971| .Case("zero", 0) 3866| 971| .Case("at", 1) 3867| 971| .Case("a0", 4) 3868| 971| .Case("a1", 5) 3869| 971| .Case("a2", 6) 3870| 971| .Case("a3", 7) 3871| 971| .Case("v0", 2) 3872| 971| .Case("v1", 3) 3873| 971| .Case("s0", 16) 3874| 971| .Case("s1", 17) 3875| 971| .Case("s2", 18) 3876| 971| .Case("s3", 19) 3877| 971| .Case("s4", 20) 3878| 971| .Case("s5", 21) 3879| 971| .Case("s6", 22) 3880| 971| .Case("s7", 23) 3881| 971| .Case("k0", 26) 3882| 971| .Case("k1", 27) 3883| 971| .Case("gp", 28) 3884| 971| .Case("sp", 29) 3885| 971| .Case("fp", 30) 3886| 971| .Case("s8", 30) 3887| 971| .Case("ra", 31) 3888| 971| .Case("t0", 8) 3889| 971| .Case("t1", 9) 3890| 971| .Case("t2", 10) 3891| 971| .Case("t3", 11) 3892| 971| .Case("t4", 12) 3893| 971| .Case("t5", 13) 3894| 971| .Case("t6", 14) 3895| 971| .Case("t7", 15) 3896| 971| .Case("t8", 24) 3897| 971| .Case("t9", 25) 3898| 971| .Default(-1); 3899| | 3900| 971| if (!(isABI_N32() || isABI_N64())) ------------------ | Branch (3900:9): [True: 0, False: 971] | Branch (3900:24): [True: 0, False: 971] ------------------ 3901| 971| return CC; 3902| | 3903| 0| if (12 <= CC && CC <= 15) { ------------------ | Branch (3903:7): [True: 0, False: 0] | Branch (3903:19): [True: 0, False: 0] ------------------ 3904| | // Name is one of t4-t7 3905| 0| AsmToken RegTok = getLexer().peekTok(); 3906| 0| SMRange RegRange = RegTok.getLocRange(); 3907| | 3908| 0| StringRef FixedName = StringSwitch(Name) 3909| 0| .Case("t4", "t0") 3910| 0| .Case("t5", "t1") 3911| 0| .Case("t6", "t2") 3912| 0| .Case("t7", "t3") 3913| 0| .Default(""); 3914| 0| assert(FixedName != "" && "Register name is not one of t4-t7."); ------------------ | Branch (3914:5): [True: 0, False: 0] | Branch (3914:5): [True: 0, Folded] | Branch (3914:5): [True: 0, False: 0] ------------------ 3915| | 3916| 0| printWarningWithFixIt("register names $t4-$t7 are only available in O32.", 3917| 0| "Did you mean $" + FixedName + "?", RegRange); 3918| 0| } 3919| | 3920| | // Although SGI documentation just cuts out t0-t3 for n32/n64, 3921| | // GNU pushes the values of t0-t3 to override the o32/o64 values for t4-t7 3922| | // We are supporting both cases, so for t0-t3 we'll just push them to t4-t7. 3923| 0| if (8 <= CC && CC <= 11) ------------------ | Branch (3923:7): [True: 0, False: 0] | Branch (3923:18): [True: 0, False: 0] ------------------ 3924| 0| CC += 4; 3925| | 3926| 0| if (CC == -1) ------------------ | Branch (3926:7): [True: 0, False: 0] ------------------ 3927| 0| CC = StringSwitch(Name) 3928| 0| .Case("a4", 8) 3929| 0| .Case("a5", 9) 3930| 0| .Case("a6", 10) 3931| 0| .Case("a7", 11) 3932| 0| .Case("kt0", 26) 3933| 0| .Case("kt1", 27) 3934| 0| .Default(-1); 3935| | 3936| 0| return CC; 3937| 0|} MipsAsmParser.cpp:_ZNK12_GLOBAL__N_113MipsAsmParser9isABI_N32Ev: 455| 971| bool isABI_N32() const { return ABI.IsN32(); } MipsAsmParser.cpp:_ZNK12_GLOBAL__N_113MipsAsmParser9isABI_N64Ev: 456| 971| bool isABI_N64() const { return ABI.IsN64(); } MipsAsmParser.cpp:_ZN12_GLOBAL__N_111MipsOperand12createGPRRegEjPKN7llvm_ks14MCRegisterInfoENS1_5SMLocES5_RNS_13MipsAsmParserE: 1188| 177| MipsAsmParser &Parser) { 1189| 177| return CreateReg(Index, RegKind_GPR, RegInfo, S, E, Parser); 1190| 177| } MipsAsmParser.cpp:_ZN12_GLOBAL__N_111MipsOperand9CreateRegEjNS0_7RegKindEPKN7llvm_ks14MCRegisterInfoENS2_5SMLocES6_RNS_13MipsAsmParserE: 646| 5.00k| MipsAsmParser &Parser) { 647| 5.00k| auto Op = make_unique(k_RegisterIndex, Parser); 648| 5.00k| Op->RegIdx.Index = Index; 649| 5.00k| Op->RegIdx.RegInfo = RegInfo; 650| 5.00k| Op->RegIdx.Kind = RegKind; 651| 5.00k| Op->StartLoc = S; 652| 5.00k| Op->EndLoc = E; 653| 5.00k| return Op; 654| 5.00k| } MipsAsmParser.cpp:_ZN12_GLOBAL__N_111MipsOperandC2ENS0_6KindTyERNS_13MipsAsmParserE: 597| 18.0k| : MCParsedAsmOperand(), Kind(K), AsmParser(Parser) {} MipsAsmParser.cpp:_ZN12_GLOBAL__N_111MipsOperandD2Ev: 1344| 18.0k| virtual ~MipsOperand() { 1345| 18.0k| switch (Kind) { ------------------ | Branch (1345:13): [True: 18.0k, False: 0] ------------------ 1346| 4.36k| case k_Immediate: ------------------ | Branch (1346:5): [True: 4.36k, False: 13.6k] ------------------ 1347| 4.36k| break; 1348| 144| case k_Memory: ------------------ | Branch (1348:5): [True: 144, False: 17.8k] ------------------ 1349| 144| delete Mem.Base; 1350| 144| break; 1351| 0| case k_RegList: ------------------ | Branch (1351:5): [True: 0, False: 18.0k] ------------------ 1352| 0| delete RegList.List; 1353| 0| case k_PhysRegister: ------------------ | Branch (1353:5): [True: 0, False: 18.0k] ------------------ 1354| 5.00k| case k_RegisterIndex: ------------------ | Branch (1354:5): [True: 5.00k, False: 12.9k] ------------------ 1355| 13.4k| case k_Token: ------------------ | Branch (1355:5): [True: 8.49k, False: 9.51k] ------------------ 1356| 13.4k| case k_RegPair: ------------------ | Branch (1356:5): [True: 0, False: 18.0k] ------------------ 1357| 13.4k| break; 1358| 18.0k| } 1359| 18.0k| } MipsAsmParser.cpp:_ZNK12_GLOBAL__N_111MipsOperand7isTokenEv: 1028| 14.5k| bool isToken() const override { 1029| | // Note: It's not possible to pretend that other operand kinds are tokens. 1030| | // The matcher emitter checks tokens first. 1031| 14.5k| return Kind == k_Token; 1032| 14.5k| } MipsAsmParser.cpp:_ZNK12_GLOBAL__N_111MipsOperand5isImmEv: 1007| 11.6k| bool isImm() const override { return Kind == k_Immediate; } MipsAsmParser.cpp:_ZNK12_GLOBAL__N_111MipsOperand5isRegEv: 998| 1.35k| bool isReg() const override { 999| | // As a special case until we sort out the definition of div/divu, pretend 1000| | // that $0/$zero are k_PhysRegister so that MCK_ZERO works correctly. 1001| 1.35k| if (isGPRAsmReg() && RegIdx.Index == 0) ------------------ | Branch (1001:9): [True: 274, False: 1.08k] | Branch (1001:26): [True: 5, False: 269] ------------------ 1002| 5| return true; 1003| | 1004| 1.35k| return Kind == k_PhysRegister; 1005| 1.35k| } MipsAsmParser.cpp:_ZNK12_GLOBAL__N_111MipsOperand6getRegEv: 1120| 5| unsigned getReg() const override { 1121| | // As a special case until we sort out the definition of div/divu, pretend 1122| | // that $0/$zero are k_PhysRegister so that MCK_ZERO works correctly. 1123| 5| if (Kind == k_RegisterIndex && RegIdx.Index == 0 && ------------------ | Branch (1123:9): [True: 5, False: 0] | Branch (1123:36): [True: 5, False: 0] ------------------ 1124| 5| RegIdx.Kind & RegKind_GPR) ------------------ | Branch (1124:9): [True: 5, False: 0] ------------------ 1125| 5| return getGPR32Reg(); // FIXME: GPR64 too 1126| | 1127| 5| assert(Kind == k_PhysRegister && "Invalid access!"); ------------------ | Branch (1127:5): [True: 0, False: 0] | Branch (1127:5): [True: 0, Folded] | Branch (1127:5): [True: 0, False: 0] ------------------ 1128| 0| return PhysReg.Num; 1129| 0| } MipsAsmParser.cpp:_ZNK12_GLOBAL__N_111MipsOperand5isMemEv: 1033| 578| bool isMem() const override { return Kind == k_Memory; } MipsAsmParser.cpp:_ZNK12_GLOBAL__N_111MipsOperand11getStartLocEv: 1340| 103| SMLoc getStartLoc() const override { return StartLoc; } MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser23matchHWRegsRegisterNameEN7llvm_ks9StringRefE: 3939| 922|int MipsAsmParser::matchHWRegsRegisterName(StringRef Name) { 3940| 922| int CC; 3941| | 3942| 922| CC = StringSwitch(Name) 3943| 922| .Case("hwr_cpunum", 0) 3944| 922| .Case("hwr_synci_step", 1) 3945| 922| .Case("hwr_cc", 2) 3946| 922| .Case("hwr_ccres", 3) 3947| 922| .Case("hwr_ulr", 29) 3948| 922| .Default(-1); 3949| | 3950| 922| return CC; 3951| 922|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser20matchFPURegisterNameEN7llvm_ks9StringRefE: 3953| 922|int MipsAsmParser::matchFPURegisterName(StringRef Name) { 3954| | 3955| 922| if (Name[0] == 'f') { ------------------ | Branch (3955:7): [True: 150, False: 772] ------------------ 3956| 150| StringRef NumString = Name.substr(1); 3957| 150| unsigned IntVal; 3958| 150| if (NumString.getAsInteger(10, IntVal)) ------------------ | Branch (3958:9): [True: 106, False: 44] ------------------ 3959| 106| return -1; // This is not an integer. 3960| 44| if (IntVal > 31) // Maximum index for fpu register. ------------------ | Branch (3960:9): [True: 0, False: 44] ------------------ 3961| 0| return -1; 3962| 44| return IntVal; 3963| 44| } 3964| 772| return -1; 3965| 922|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_111MipsOperand12createFGRRegEjPKN7llvm_ks14MCRegisterInfoENS1_5SMLocES5_RNS_13MipsAsmParserE: 1196| 44| MipsAsmParser &Parser) { 1197| 44| return CreateReg(Index, RegKind_FGR, RegInfo, S, E, Parser); 1198| 44| } MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser20matchFCCRegisterNameEN7llvm_ks9StringRefE: 3967| 878|int MipsAsmParser::matchFCCRegisterName(StringRef Name) { 3968| | 3969| 878| if (Name.startswith("fcc")) { ------------------ | Branch (3969:7): [True: 50, False: 828] ------------------ 3970| 50| StringRef NumString = Name.substr(3); 3971| 50| unsigned IntVal; 3972| 50| if (NumString.getAsInteger(10, IntVal)) ------------------ | Branch (3972:9): [True: 50, False: 0] ------------------ 3973| 50| return -1; // This is not an integer. 3974| 0| if (IntVal > 7) // There are only 8 fcc registers. ------------------ | Branch (3974:9): [True: 0, False: 0] ------------------ 3975| 0| return -1; 3976| 0| return IntVal; 3977| 0| } 3978| 828| return -1; 3979| 878|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser19matchACRegisterNameEN7llvm_ks9StringRefE: 3981| 878|int MipsAsmParser::matchACRegisterName(StringRef Name) { 3982| | 3983| 878| if (Name.startswith("ac")) { ------------------ | Branch (3983:7): [True: 102, False: 776] ------------------ 3984| 102| StringRef NumString = Name.substr(2); 3985| 102| unsigned IntVal; 3986| 102| if (NumString.getAsInteger(10, IntVal)) ------------------ | Branch (3986:9): [True: 37, False: 65] ------------------ 3987| 37| return -1; // This is not an integer. 3988| 65| if (IntVal > 3) // There are only 3 acc registers. ------------------ | Branch (3988:9): [True: 44, False: 21] ------------------ 3989| 44| return -1; 3990| 21| return IntVal; 3991| 65| } 3992| 776| return -1; 3993| 878|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_111MipsOperand12createACCRegEjPKN7llvm_ks14MCRegisterInfoENS1_5SMLocES5_RNS_13MipsAsmParserE: 1220| 21| MipsAsmParser &Parser) { 1221| 21| return CreateReg(Index, RegKind_ACC, RegInfo, S, E, Parser); 1222| 21| } MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser23matchMSA128RegisterNameEN7llvm_ks9StringRefE: 3995| 857|int MipsAsmParser::matchMSA128RegisterName(StringRef Name) { 3996| 857| unsigned IntVal; 3997| | 3998| 857| if (Name.front() != 'w' || Name.drop_front(1).getAsInteger(10, IntVal)) ------------------ | Branch (3998:7): [True: 844, False: 13] | Branch (3998:7): [True: 857, False: 0] | Branch (3998:30): [True: 13, False: 0] ------------------ 3999| 857| return -1; 4000| | 4001| 0| if (IntVal > 31) ------------------ | Branch (4001:7): [True: 0, False: 0] ------------------ 4002| 0| return -1; 4003| | 4004| 0| return IntVal; 4005| 0|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser27matchMSA128CtrlRegisterNameEN7llvm_ks9StringRefE: 4007| 857|int MipsAsmParser::matchMSA128CtrlRegisterName(StringRef Name) { 4008| 857| int CC; 4009| | 4010| 857| CC = StringSwitch(Name) 4011| 857| .Case("msair", 0) 4012| 857| .Case("msacsr", 1) 4013| 857| .Case("msaaccess", 2) 4014| 857| .Case("msasave", 3) 4015| 857| .Case("msamodify", 4) 4016| 857| .Case("msarequest", 5) 4017| 857| .Case("msamap", 6) 4018| 857| .Case("msaunmap", 7) 4019| 857| .Default(-1); 4020| | 4021| 857| return CC; 4022| 857|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_111MipsOperand16createMSACtrlRegEjPKN7llvm_ks14MCRegisterInfoENS1_5SMLocES5_RNS_13MipsAsmParserE: 1236| 21| SMLoc E, MipsAsmParser &Parser) { 1237| 21| return CreateReg(Index, RegKind_MSACtrl, RegInfo, S, E, Parser); 1238| 21| } MipsAsmParser.cpp:_ZN12_GLOBAL__N_111MipsOperand9CreateImmEPKN7llvm_ks6MCExprENS1_5SMLocES5_RNS_13MipsAsmParserE: 1241| 4.36k| CreateImm(const MCExpr *Val, SMLoc S, SMLoc E, MipsAsmParser &Parser) { 1242| 4.36k| auto Op = make_unique(k_Immediate, Parser); 1243| 4.36k| Op->Imm.Val = Val; 1244| 4.36k| Op->StartLoc = S; 1245| 4.36k| Op->EndLoc = E; 1246| 4.36k| return Op; 1247| 4.36k| } MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser29matchAnyRegisterWithoutDollarERN7llvm_ks15SmallVectorImplINSt3__110unique_ptrINS1_18MCParsedAsmOperandENS3_14default_deleteIS5_EEEEEENS1_5SMLocE: 4475| 27.0k|{ 4476| 27.0k| MCAsmParser &Parser = getParser(); 4477| 27.0k| auto Token = Parser.getLexer().peekTok(false); 4478| | 4479| 27.0k| if (Token.is(AsmToken::Identifier)) { ------------------ | Branch (4479:7): [True: 955, False: 26.0k] ------------------ 4480| 955| DEBUG(dbgs() << ".. identifier\n"); 4481| 955| StringRef Identifier = Token.getIdentifier(); 4482| 955| OperandMatchResultTy ResTy = 4483| 955| matchAnyRegisterNameWithoutDollar(Operands, Identifier, S); 4484| 955| return ResTy; 4485| 26.0k| } else if (Token.is(AsmToken::Integer)) { ------------------ | Branch (4485:14): [True: 4.73k, False: 21.3k] ------------------ 4486| 4.73k| DEBUG(dbgs() << ".. integer\n"); 4487| 4.73k| bool valid; 4488| 4.73k| unsigned Value = Token.getIntVal(valid); 4489| 4.73k| if (!valid) ------------------ | Branch (4489:9): [True: 0, False: 4.73k] ------------------ 4490| 0| return MatchOperand_NoMatch; 4491| 4.73k| Operands.push_back(MipsOperand::createNumericReg( 4492| 4.73k| Value, getContext().getRegisterInfo(), S, Token.getLoc(), 4493| 4.73k| *this)); 4494| 4.73k| return MatchOperand_Success; 4495| 4.73k| } 4496| | 4497| 21.3k| DEBUG(dbgs() << Parser.getTok().getKind() << "\n"); 4498| | 4499| 21.3k| return MatchOperand_NoMatch; 4500| 27.0k|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_111MipsOperand16createNumericRegEjPKN7llvm_ks14MCRegisterInfoENS1_5SMLocES5_RNS_13MipsAsmParserE: 1179| 4.73k| SMLoc E, MipsAsmParser &Parser) { 1180| 4.73k| DEBUG(dbgs() << "createNumericReg(" << Index << ", ...)\n"); 1181| 4.73k| return CreateReg(Index, RegKind_Numeric, RegInfo, S, E, Parser); 1182| 4.73k| } MipsAsmParser.cpp:_ZNK12_GLOBAL__N_111MipsOperand11isGPRAsmRegEv: 1281| 7.82k| bool isGPRAsmReg() const { 1282| 7.82k| return isRegIdx() && RegIdx.Kind & RegKind_GPR && RegIdx.Index <= 31; ------------------ | Branch (1282:12): [True: 5.88k, False: 1.94k] | Branch (1282:26): [True: 5.85k, False: 27] | Branch (1282:55): [True: 5.79k, False: 66] ------------------ 1283| 7.82k| } MipsAsmParser.cpp:_ZNK12_GLOBAL__N_111MipsOperand8isRegIdxEv: 1006| 8.93k| bool isRegIdx() const { return Kind == k_RegisterIndex; } MipsAsmParser.cpp:_ZNK12_GLOBAL__N_113MipsAsmParser9isGP64bitEv: 448| 31| bool isGP64bit() const { 449| 31| return getSTI().getFeatureBits()[Mips::FeatureGP64Bit]; 450| 31| } MipsAsmParser.cpp:_ZNK12_GLOBAL__N_111MipsOperand11getGPR32RegEv: 659| 919| unsigned getGPR32Reg() const { 660| 919| assert(isRegIdx() && (RegIdx.Kind & RegKind_GPR) && "Invalid access!"); ------------------ | Branch (660:5): [True: 919, False: 0] | Branch (660:5): [True: 919, False: 0] | Branch (660:5): [True: 919, Folded] | Branch (660:5): [True: 919, False: 0] ------------------ 661| 919| AsmParser.warnIfRegIndexIsAT(RegIdx.Index, StartLoc); 662| 919| unsigned ClassID = Mips::GPR32RegClassID; 663| 919| return RegIdx.RegInfo->getRegClass(ClassID).getRegister(RegIdx.Index); 664| 919| } MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser18warnIfRegIndexIsATEjN7llvm_ks5SMLocE: 3840| 919|void MipsAsmParser::warnIfRegIndexIsAT(unsigned RegIndex, SMLoc Loc) { 3841| 919| if (RegIndex != 0 && AssemblerOptions.back()->getATRegIndex() == RegIndex) { ------------------ | Branch (3841:7): [True: 656, False: 263] | Branch (3841:24): [True: 565, False: 91] ------------------ 3842| | // Warning(Loc, "used $at (currently $" + Twine(RegIndex) + 3843| | // ") without \".set noat\""); 3844| 565| } 3845| 919|} MipsAsmParser.cpp:_ZNK12_GLOBAL__N_120MipsAssemblerOptions13getATRegIndexEv: 59| 687| unsigned getATRegIndex() const { return ATReg; } MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser16ParseInstructionERN7llvm_ks20ParseInstructionInfoENS1_9StringRefENS1_5SMLocERNS1_15SmallVectorImplINSt3__110unique_ptrINS1_18MCParsedAsmOperandENS7_14default_deleteIS9_EEEEEERj: 4844| 8.58k|{ 4845| 8.58k| MCAsmParser &Parser = getParser(); 4846| 8.58k| DEBUG(dbgs() << "ParseInstruction\n"); 4847| | 4848| | // We have reached first instruction, module directive are now forbidden. 4849| | //getTargetStreamer().forbidModuleDirective(); 4850| | 4851| | // Check if we have valid mnemonic 4852| 8.58k| if (!mnemonicIsValid(Name, 0)) { ------------------ | Branch (4852:7): [True: 98, False: 8.48k] ------------------ 4853| 98| Parser.eatToEndOfStatement(); 4854| | // return Error(NameLoc, "unknown instruction"); 4855| 98| ErrorCode = KS_ERR_ASM_MIPS_MNEMONICFAIL; 4856| 98| return true; 4857| 98| } 4858| | // First operand in MCInst is instruction mnemonic. 4859| 8.48k| Operands.push_back(MipsOperand::CreateToken(Name, NameLoc, *this)); 4860| | 4861| | // Read the remaining operands. 4862| 8.48k| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (4862:7): [True: 8.48k, False: 4] ------------------ 4863| | // Read the first operand. 4864| 8.48k| if (parseOperand(Operands, Name, ErrorCode)) { ------------------ | Branch (4864:9): [True: 4.07k, False: 4.40k] ------------------ 4865| | // SMLoc Loc = getLexer().getLoc(); 4866| 4.07k| Parser.eatToEndOfStatement(); 4867| | // return Error(Loc, "unexpected token in argument list"); 4868| | // ErrorCode = KS_ERR_ASM_MIPS_INVALIDOPERAND; 4869| 4.07k| return true; 4870| 4.07k| } 4871| 4.40k| if (getLexer().is(AsmToken::LBrac) && parseBracketSuffix(Name, Operands, ErrorCode)) ------------------ | Branch (4871:9): [True: 2, False: 4.40k] | Branch (4871:43): [True: 2, False: 0] ------------------ 4872| 2| return true; 4873| | // AFAIK, parenthesis suffixes are never on the first operand 4874| | 4875| 5.08k| while (getLexer().is(AsmToken::Comma)) { ------------------ | Branch (4875:12): [True: 753, False: 4.33k] ------------------ 4876| 753| Parser.Lex(); // Eat the comma. 4877| | // Parse and remember the operand. 4878| 753| if (parseOperand(Operands, Name, ErrorCode)) { ------------------ | Branch (4878:11): [True: 72, False: 681] ------------------ 4879| | // SMLoc Loc = getLexer().getLoc(); 4880| 72| Parser.eatToEndOfStatement(); 4881| | // return Error(Loc, "unexpected token in argument list"); 4882| 72| return true; 4883| 72| } 4884| | // Parse bracket and parenthesis suffixes before we iterate 4885| 681| if (getLexer().is(AsmToken::LBrac)) { ------------------ | Branch (4885:11): [True: 0, False: 681] ------------------ 4886| 0| if (parseBracketSuffix(Name, Operands, ErrorCode)) ------------------ | Branch (4886:13): [True: 0, False: 0] ------------------ 4887| 0| return true; 4888| 681| } else if (getLexer().is(AsmToken::LParen) && ------------------ | Branch (4888:18): [True: 0, False: 681] ------------------ 4889| 0| parseParenSuffix(Name, Operands, ErrorCode)) ------------------ | Branch (4889:18): [True: 0, False: 0] ------------------ 4890| 0| return true; 4891| 681| } 4892| 4.40k| } 4893| 4.33k| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (4893:7): [True: 57, False: 4.27k] ------------------ 4894| | // SMLoc Loc = getLexer().getLoc(); 4895| 57| Parser.eatToEndOfStatement(); 4896| | // return Error(Loc, "unexpected token in argument list"); 4897| 57| ErrorCode = KS_ERR_ASM_MIPS_INVALIDOPERAND; 4898| 57| return true; 4899| 57| } 4900| 4.27k| Parser.Lex(); // Consume the EndOfStatement. 4901| 4.27k| return false; 4902| 4.33k|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_111MipsOperand11CreateTokenEN7llvm_ks9StringRefENS1_5SMLocERNS_13MipsAsmParserE: 1166| 8.49k| MipsAsmParser &Parser) { 1167| 8.49k| auto Op = make_unique(k_Token, Parser); 1168| 8.49k| Op->Tok.Data = Str.data(); 1169| 8.49k| Op->Tok.Length = Str.size(); 1170| 8.49k| Op->StartLoc = S; 1171| 8.49k| Op->EndLoc = S; 1172| 8.49k| return Op; 1173| 8.49k| } MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser12parseOperandERN7llvm_ks15SmallVectorImplINSt3__110unique_ptrINS1_18MCParsedAsmOperandENS3_14default_deleteIS5_EEEEEENS1_9StringRefERj: 4041| 9.23k|{ 4042| 9.23k| MCAsmParser &Parser = getParser(); 4043| 9.23k| DEBUG(dbgs() << "parseOperand\n"); 4044| | 4045| | // Check if the current operand has a custom associated parser, if so, try to 4046| | // custom parse the operand, or fallback to the general approach. 4047| 9.23k| OperandMatchResultTy ResTy = MatchOperandParserImpl(Operands, Mnemonic); 4048| 9.23k| if (ResTy == MatchOperand_Success) ------------------ | Branch (4048:7): [True: 4.57k, False: 4.66k] ------------------ 4049| 4.57k| return false; 4050| | // If there wasn't a custom match, try the generic matcher below. Otherwise, 4051| | // there was a match, but an error occurred, in which case, just return that 4052| | // the operand parsing failed. 4053| 4.66k| if (ResTy == MatchOperand_ParseFail) ------------------ | Branch (4053:7): [True: 591, False: 4.07k] ------------------ 4054| 591| return true; 4055| | 4056| 4.07k| DEBUG(dbgs() << ".. Generic Parser\n"); 4057| | 4058| 4.07k| switch (getLexer().getKind()) { 4059| 6| default: ------------------ | Branch (4059:3): [True: 6, False: 4.07k] ------------------ 4060| | // Error(Parser.getTok().getLoc(), "unexpected token in operand"); 4061| 6| ErrorCode = KS_ERR_ASM_MIPS_INVALIDOPERAND; 4062| 6| return true; 4063| 3.78k| case AsmToken::Dollar: { ------------------ | Branch (4063:3): [True: 3.78k, False: 294] ------------------ 4064| | // Parse the register. 4065| 3.78k| SMLoc S = Parser.getTok().getLoc(); 4066| | 4067| | // Almost all registers have been parsed by custom parsers. There is only 4068| | // one exception to this. $zero (and it's alias $0) will reach this point 4069| | // for div, divu, and similar instructions because it is not an operand 4070| | // to the instruction definition but an explicit register. Special case 4071| | // this situation for now. 4072| 3.78k| if (parseAnyRegister(Operands) != MatchOperand_NoMatch) ------------------ | Branch (4072:9): [True: 57, False: 3.72k] ------------------ 4073| 57| return false; 4074| | 4075| | // Maybe it is a symbol reference. 4076| 3.72k| StringRef Identifier; 4077| 3.72k| if (Parser.parseIdentifier(Identifier)) ------------------ | Branch (4077:9): [True: 3.52k, False: 206] ------------------ 4078| 3.52k| return true; 4079| | 4080| 206| SMLoc E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1); 4081| 206| MCSymbol *Sym = getContext().getOrCreateSymbol("$" + Identifier); 4082| | // Otherwise create a symbol reference. 4083| 206| const MCExpr *Res = 4084| 206| MCSymbolRefExpr::create(Sym, MCSymbolRefExpr::VK_None, getContext()); 4085| | 4086| 206| Operands.push_back(MipsOperand::CreateImm(Res, S, E, *this)); 4087| 206| return false; 4088| 3.72k| } 4089| | // Else drop to expression parsing. 4090| 0| case AsmToken::LParen: ------------------ | Branch (4090:3): [True: 0, False: 4.07k] ------------------ 4091| 40| case AsmToken::Minus: ------------------ | Branch (4091:3): [True: 40, False: 4.03k] ------------------ 4092| 40| case AsmToken::Plus: ------------------ | Branch (4092:3): [True: 0, False: 4.07k] ------------------ 4093| 283| case AsmToken::Integer: ------------------ | Branch (4093:3): [True: 243, False: 3.83k] ------------------ 4094| 287| case AsmToken::Tilde: ------------------ | Branch (4094:3): [True: 4, False: 4.07k] ------------------ 4095| 287| case AsmToken::String: { ------------------ | Branch (4095:3): [True: 0, False: 4.07k] ------------------ 4096| 287| DEBUG(dbgs() << ".. generic integer\n"); 4097| 287| OperandMatchResultTy ResTy = parseImm(Operands); 4098| 287| return ResTy != MatchOperand_Success; 4099| 287| } 4100| 1| case AsmToken::Percent: { ------------------ | Branch (4100:3): [True: 1, False: 4.07k] ------------------ 4101| | // It is a symbol reference or constant expression. 4102| 1| const MCExpr *IdVal; 4103| 1| SMLoc S = Parser.getTok().getLoc(); // Start location of the operand. 4104| 1| if (parseRelocOperand(IdVal)) ------------------ | Branch (4104:9): [True: 1, False: 0] ------------------ 4105| 1| return true; 4106| | 4107| 0| SMLoc E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1); 4108| | 4109| 0| Operands.push_back(MipsOperand::CreateImm(IdVal, S, E, *this)); 4110| 0| return false; 4111| 1| } // case AsmToken::Percent 4112| 4.07k| } // switch(getLexer().getKind()) 4113| 0| return true; 4114| 4.07k|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser15parseMemOperandERN7llvm_ks15SmallVectorImplINSt3__110unique_ptrINS1_18MCParsedAsmOperandENS3_14default_deleteIS5_EEEEEE: 4300| 215|MipsAsmParser::parseMemOperand(OperandVector &Operands) { 4301| 215| MCAsmParser &Parser = getParser(); 4302| 215| DEBUG(dbgs() << "parseMemOperand\n"); 4303| 215| const MCExpr *IdVal = nullptr; 4304| 215| SMLoc S; 4305| 215| bool isParenExpr = false; 4306| 215| MipsAsmParser::OperandMatchResultTy Res = MatchOperand_NoMatch; 4307| | // First operand is the offset. 4308| 215| S = Parser.getTok().getLoc(); 4309| | 4310| 215| if (getLexer().getKind() == AsmToken::LParen) { ------------------ | Branch (4310:7): [True: 0, False: 215] ------------------ 4311| 0| Parser.Lex(); 4312| 0| isParenExpr = true; 4313| 0| } 4314| | 4315| 215| if (getLexer().getKind() != AsmToken::Dollar) { ------------------ | Branch (4315:7): [True: 179, False: 36] ------------------ 4316| 179| if (parseMemOffset(IdVal, isParenExpr)) ------------------ | Branch (4316:9): [True: 32, False: 147] ------------------ 4317| 32| return MatchOperand_ParseFail; 4318| | 4319| 147| const AsmToken &Tok = Parser.getTok(); // Get the next token. 4320| 147| if (Tok.isNot(AsmToken::LParen)) { ------------------ | Branch (4320:9): [True: 146, False: 1] ------------------ 4321| 146| MipsOperand &Mnemonic = static_cast(*Operands[0]); 4322| 146| if (Mnemonic.getToken() == "la" || Mnemonic.getToken() == "dla") { ------------------ | Branch (4322:11): [True: 0, False: 146] | Branch (4322:11): [True: 0, False: 146] | Branch (4322:42): [True: 0, False: 146] ------------------ 4323| 0| SMLoc E = 4324| 0| SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1); 4325| 0| Operands.push_back(MipsOperand::CreateImm(IdVal, S, E, *this)); 4326| 0| return MatchOperand_Success; 4327| 0| } 4328| 146| if (Tok.is(AsmToken::EndOfStatement)) { ------------------ | Branch (4328:11): [True: 144, False: 2] ------------------ 4329| 144| SMLoc E = 4330| 144| SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1); 4331| | 4332| | // Zero register assumed, add a memory operand with ZERO as its base. 4333| | // "Base" will be managed by k_Memory. 4334| 144| auto Base = MipsOperand::createGPRReg(0, getContext().getRegisterInfo(), 4335| 144| S, E, *this); 4336| 144| Operands.push_back( 4337| 144| MipsOperand::CreateMem(std::move(Base), IdVal, S, E, *this)); 4338| 144| return MatchOperand_Success; 4339| 144| } 4340| 2| Error(Parser.getTok().getLoc(), "'(' expected"); 4341| 2| return MatchOperand_ParseFail; 4342| 146| } 4343| | 4344| 1| Parser.Lex(); // Eat the '(' token. 4345| 1| } 4346| | 4347| 37| Res = parseAnyRegister(Operands); 4348| 37| if (Res != MatchOperand_Success) ------------------ | Branch (4348:7): [True: 37, False: 0] ------------------ 4349| 37| return Res; 4350| | 4351| 0| if (Parser.getTok().isNot(AsmToken::RParen)) { ------------------ | Branch (4351:7): [True: 0, False: 0] ------------------ 4352| 0| Error(Parser.getTok().getLoc(), "')' expected"); 4353| 0| return MatchOperand_ParseFail; 4354| 0| } 4355| | 4356| 0| SMLoc E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1); 4357| | 4358| 0| Parser.Lex(); // Eat the ')' token. 4359| | 4360| 0| if (!IdVal) ------------------ | Branch (4360:7): [True: 0, False: 0] ------------------ 4361| 0| IdVal = MCConstantExpr::create(0, getContext()); 4362| | 4363| | // Replace the register operand with the memory operand. 4364| 0| std::unique_ptr op( 4365| 0| static_cast(Operands.back().release())); 4366| | // Remove the register from the operands. 4367| | // "op" will be managed by k_Memory. 4368| 0| Operands.pop_back(); 4369| | // Add the memory operand. 4370| 0| if (const MCBinaryExpr *BE = dyn_cast(IdVal)) { ------------------ | Branch (4370:27): [True: 0, False: 0] ------------------ 4371| 0| int64_t Imm; 4372| 0| if (IdVal->evaluateAsAbsolute(Imm)) ------------------ | Branch (4372:9): [True: 0, False: 0] ------------------ 4373| 0| IdVal = MCConstantExpr::create(Imm, getContext()); 4374| 0| else if (BE->getLHS()->getKind() != MCExpr::SymbolRef) ------------------ | Branch (4374:14): [True: 0, False: 0] ------------------ 4375| 0| IdVal = MCBinaryExpr::create(BE->getOpcode(), BE->getRHS(), BE->getLHS(), 4376| 0| getContext()); 4377| 0| } 4378| | 4379| 0| Operands.push_back(MipsOperand::CreateMem(std::move(op), IdVal, S, E, *this)); 4380| 0| return MatchOperand_Success; 4381| 0|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser14parseMemOffsetERPKN7llvm_ks6MCExprEb: 4267| 179|bool MipsAsmParser::parseMemOffset(const MCExpr *&Res, bool isParenExpr) { 4268| 179| MCAsmParser &Parser = getParser(); 4269| 179| SMLoc S; 4270| 179| bool Result = true; 4271| 179| unsigned NumOfLParen = 0; 4272| | 4273| 179| while (getLexer().getKind() == AsmToken::LParen) { ------------------ | Branch (4273:10): [True: 0, False: 179] ------------------ 4274| 0| Parser.Lex(); 4275| 0| ++NumOfLParen; 4276| 0| } 4277| | 4278| 179| switch (getLexer().getKind()) { 4279| 0| default: ------------------ | Branch (4279:3): [True: 0, False: 179] ------------------ 4280| 0| return true; 4281| 57| case AsmToken::Identifier: ------------------ | Branch (4281:3): [True: 57, False: 122] ------------------ 4282| 57| case AsmToken::LParen: ------------------ | Branch (4282:3): [True: 0, False: 179] ------------------ 4283| 134| case AsmToken::Integer: ------------------ | Branch (4283:3): [True: 77, False: 102] ------------------ 4284| 147| case AsmToken::Minus: ------------------ | Branch (4284:3): [True: 13, False: 166] ------------------ 4285| 179| case AsmToken::Plus: ------------------ | Branch (4285:3): [True: 32, False: 147] ------------------ 4286| 179| if (isParenExpr) ------------------ | Branch (4286:9): [True: 0, False: 179] ------------------ 4287| 0| Result = getParser().parseParenExprOfDepth(NumOfLParen, Res, S); 4288| 179| else 4289| 179| Result = (getParser().parseExpression(Res)); 4290| 364| while (getLexer().getKind() == AsmToken::RParen) ------------------ | Branch (4290:12): [True: 185, False: 179] ------------------ 4291| 185| Parser.Lex(); 4292| 179| break; 4293| 0| case AsmToken::Percent: ------------------ | Branch (4293:3): [True: 0, False: 179] ------------------ 4294| 0| Result = parseRelocOperand(Res); 4295| 179| } 4296| 179| return Result; 4297| 179|} MipsAsmParser.cpp:_ZNK12_GLOBAL__N_111MipsOperand8getTokenEv: 1114| 4.57k| StringRef getToken() const { 1115| 4.57k| assert(Kind == k_Token && "Invalid access!"); ------------------ | Branch (1115:5): [True: 4.57k, False: 0] | Branch (1115:5): [True: 4.57k, Folded] | Branch (1115:5): [True: 4.57k, False: 0] ------------------ 1116| 4.57k| return StringRef(Tok.Data, Tok.Length); 1117| 4.57k| } MipsAsmParser.cpp:_ZN12_GLOBAL__N_111MipsOperand9CreateMemENSt3__110unique_ptrIS0_NS1_14default_deleteIS0_EEEEPKN7llvm_ks6MCExprENS6_5SMLocESA_RNS_13MipsAsmParserE: 1251| 144| SMLoc E, MipsAsmParser &Parser) { 1252| 144| auto Op = make_unique(k_Memory, Parser); 1253| 144| Op->Mem.Base = Base.release(); 1254| 144| Op->Mem.Off = Off; 1255| 144| Op->StartLoc = S; 1256| 144| Op->EndLoc = E; 1257| 144| return Op; 1258| 144| } MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser15parseJumpTargetERN7llvm_ks15SmallVectorImplINSt3__110unique_ptrINS1_18MCParsedAsmOperandENS3_14default_deleteIS5_EEEEEE: 4556| 4.45k|MipsAsmParser::parseJumpTarget(OperandVector &Operands) { 4557| 4.45k| MCAsmParser &Parser = getParser(); 4558| 4.45k| DEBUG(dbgs() << "parseJumpTarget\n"); 4559| | 4560| 4.45k| SMLoc S = getLexer().getLoc(); 4561| | 4562| | // Integers and expressions are acceptable 4563| 4.45k| OperandMatchResultTy ResTy = parseImm(Operands); 4564| 4.45k| if (ResTy != MatchOperand_NoMatch) ------------------ | Branch (4564:7): [True: 117, False: 4.33k] ------------------ 4565| 117| return ResTy; 4566| | 4567| | // Registers are a valid target and have priority over symbols. 4568| 4.33k| ResTy = parseAnyRegister(Operands); 4569| 4.33k| if (ResTy != MatchOperand_NoMatch) ------------------ | Branch (4569:7): [True: 1, False: 4.33k] ------------------ 4570| 1| return ResTy; 4571| | 4572| 4.33k| const MCExpr *Expr = nullptr; 4573| 4.33k| if (Parser.parseExpression(Expr)) { ------------------ | Branch (4573:7): [True: 529, False: 3.80k] ------------------ 4574| | // We have no way of knowing if a symbol was consumed so we must ParseFail 4575| 529| return MatchOperand_ParseFail; 4576| 529| } 4577| 3.80k| Operands.push_back( 4578| 3.80k| MipsOperand::CreateImm(Expr, S, getLexer().getLoc(), *this)); 4579| 3.80k| return MatchOperand_Success; 4580| 4.33k|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser8parseImmERN7llvm_ks15SmallVectorImplINSt3__110unique_ptrINS1_18MCParsedAsmOperandENS3_14default_deleteIS5_EEEEEE: 4531| 4.74k|MipsAsmParser::parseImm(OperandVector &Operands) { 4532| 4.74k| MCAsmParser &Parser = getParser(); 4533| 4.74k| switch (getLexer().getKind()) { 4534| 4.33k| default: ------------------ | Branch (4534:3): [True: 4.33k, False: 404] ------------------ 4535| 4.33k| return MatchOperand_NoMatch; 4536| 9| case AsmToken::LParen: ------------------ | Branch (4536:3): [True: 9, False: 4.73k] ------------------ 4537| 135| case AsmToken::Minus: ------------------ | Branch (4537:3): [True: 126, False: 4.61k] ------------------ 4538| 145| case AsmToken::Plus: ------------------ | Branch (4538:3): [True: 10, False: 4.73k] ------------------ 4539| 400| case AsmToken::Integer: ------------------ | Branch (4539:3): [True: 255, False: 4.48k] ------------------ 4540| 404| case AsmToken::Tilde: ------------------ | Branch (4540:3): [True: 4, False: 4.73k] ------------------ 4541| 404| case AsmToken::String: ------------------ | Branch (4541:3): [True: 0, False: 4.74k] ------------------ 4542| 404| break; 4543| 4.74k| } 4544| | 4545| 404| const MCExpr *IdVal; 4546| 404| SMLoc S = Parser.getTok().getLoc(); 4547| 404| if (getParser().parseExpression(IdVal)) ------------------ | Branch (4547:7): [True: 61, False: 343] ------------------ 4548| 61| return MatchOperand_ParseFail; 4549| | 4550| 343| SMLoc E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1); 4551| 343| Operands.push_back(MipsOperand::CreateImm(IdVal, S, E, *this)); 4552| 343| return MatchOperand_Success; 4553| 404|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser17parseRelocOperandERPKN7llvm_ks6MCExprE: 4198| 1|bool MipsAsmParser::parseRelocOperand(const MCExpr *&Res) { 4199| 1| MCAsmParser &Parser = getParser(); 4200| 1| Parser.Lex(); // Eat the % token. 4201| 1| const AsmToken &Tok = Parser.getTok(); // Get next token, operation. 4202| 1| if (Tok.isNot(AsmToken::Identifier)) ------------------ | Branch (4202:7): [True: 0, False: 1] ------------------ 4203| 0| return true; 4204| | 4205| 1| std::string Str = Tok.getIdentifier(); 4206| | 4207| 1| Parser.Lex(); // Eat the identifier. 4208| | // Now make an expression from the rest of the operand. 4209| 1| const MCExpr *IdVal; 4210| 1| SMLoc EndLoc; 4211| | 4212| 1| if (getLexer().getKind() == AsmToken::LParen) { ------------------ | Branch (4212:7): [True: 0, False: 1] ------------------ 4213| 0| while (1) { ------------------ | Branch (4213:12): [True: 0, Folded] ------------------ 4214| 0| Parser.Lex(); // Eat the '(' token. 4215| 0| if (getLexer().getKind() == AsmToken::Percent) { ------------------ | Branch (4215:11): [True: 0, False: 0] ------------------ 4216| 0| Parser.Lex(); // Eat the % token. 4217| 0| const AsmToken &nextTok = Parser.getTok(); 4218| 0| if (nextTok.isNot(AsmToken::Identifier)) ------------------ | Branch (4218:13): [True: 0, False: 0] ------------------ 4219| 0| return true; 4220| 0| Str += "(%"; 4221| 0| Str += nextTok.getIdentifier(); 4222| 0| Parser.Lex(); // Eat the identifier. 4223| 0| if (getLexer().getKind() != AsmToken::LParen) ------------------ | Branch (4223:13): [True: 0, False: 0] ------------------ 4224| 0| return true; 4225| 0| } else 4226| 0| break; 4227| 0| } 4228| 0| if (getParser().parseParenExpression(IdVal, EndLoc)) ------------------ | Branch (4228:9): [True: 0, False: 0] ------------------ 4229| 0| return true; 4230| | 4231| 0| while (getLexer().getKind() == AsmToken::RParen) ------------------ | Branch (4231:12): [True: 0, False: 0] ------------------ 4232| 0| Parser.Lex(); // Eat the ')' token. 4233| | 4234| 0| } else 4235| 1| return true; // Parenthesis must follow the relocation operand. 4236| | 4237| 0| Res = evaluateRelocExpr(IdVal, Str); 4238| 0| return false; 4239| 1|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser17evaluateRelocExprEPKN7llvm_ks6MCExprENS1_9StringRefE: 4117| 376| StringRef RelocStr) { 4118| 376| const MCExpr *Res; 4119| | // Check the type of the expression. 4120| 376| if (const MCConstantExpr *MCE = dyn_cast(Expr)) { ------------------ | Branch (4120:29): [True: 64, False: 312] ------------------ 4121| | // It's a constant, evaluate reloc value. 4122| 64| int16_t Val; 4123| 64| switch (getVariantKind(RelocStr)) { 4124| 32| case MCSymbolRefExpr::VK_Mips_ABS_LO: ------------------ | Branch (4124:5): [True: 32, False: 32] ------------------ 4125| | // Get the 1st 16-bits. 4126| 32| Val = MCE->getValue() & 0xffff; 4127| 32| break; 4128| 32| case MCSymbolRefExpr::VK_Mips_ABS_HI: ------------------ | Branch (4128:5): [True: 32, False: 32] ------------------ 4129| | // Get the 2nd 16-bits. Also add 1 if bit 15 is 1, to compensate for low 4130| | // 16 bits being negative. 4131| 32| Val = ((MCE->getValue() + 0x8000) >> 16) & 0xffff; 4132| 32| break; 4133| 0| case MCSymbolRefExpr::VK_Mips_HIGHER: ------------------ | Branch (4133:5): [True: 0, False: 64] ------------------ 4134| | // Get the 3rd 16-bits. 4135| 0| Val = ((MCE->getValue() + 0x80008000LL) >> 32) & 0xffff; 4136| 0| break; 4137| 0| case MCSymbolRefExpr::VK_Mips_HIGHEST: ------------------ | Branch (4137:5): [True: 0, False: 64] ------------------ 4138| | // Get the 4th 16-bits. 4139| 0| Val = ((MCE->getValue() + 0x800080008000LL) >> 48) & 0xffff; 4140| 0| break; 4141| 0| default: ------------------ | Branch (4141:5): [True: 0, False: 64] ------------------ 4142| 0| report_fatal_error("unsupported reloc value"); 4143| 64| } 4144| 64| return MCConstantExpr::create(Val, getContext()); 4145| 64| } 4146| | 4147| 312| if (const MCSymbolRefExpr *MSRE = dyn_cast(Expr)) { ------------------ | Branch (4147:30): [True: 130, False: 182] ------------------ 4148| | // It's a symbol, create a symbolic expression from the symbol. 4149| 130| const MCSymbol *Symbol = &MSRE->getSymbol(); 4150| 130| MCSymbolRefExpr::VariantKind VK = getVariantKind(RelocStr); 4151| 130| Res = MCSymbolRefExpr::create(Symbol, VK, getContext()); 4152| 130| return Res; 4153| 130| } 4154| | 4155| 182| if (const MCBinaryExpr *BE = dyn_cast(Expr)) { ------------------ | Branch (4155:27): [True: 84, False: 98] ------------------ 4156| 84| MCSymbolRefExpr::VariantKind VK = getVariantKind(RelocStr); 4157| | 4158| | // Try to create target expression. 4159| 84| if (MipsMCExpr::isSupportedBinaryExpr(VK, BE)) ------------------ | Branch (4159:9): [True: 6, False: 78] ------------------ 4160| 6| return MipsMCExpr::create(VK, Expr, getContext()); 4161| | 4162| 78| const MCExpr *LExp = evaluateRelocExpr(BE->getLHS(), RelocStr); 4163| 78| const MCExpr *RExp = evaluateRelocExpr(BE->getRHS(), RelocStr); 4164| 78| Res = MCBinaryExpr::create(BE->getOpcode(), LExp, RExp, getContext()); 4165| 78| return Res; 4166| 84| } 4167| | 4168| 98| if (const MCUnaryExpr *UN = dyn_cast(Expr)) { ------------------ | Branch (4168:26): [True: 98, False: 0] ------------------ 4169| 98| const MCExpr *UnExp = evaluateRelocExpr(UN->getSubExpr(), RelocStr); 4170| 98| Res = MCUnaryExpr::create(UN->getOpcode(), UnExp, getContext()); 4171| 98| return Res; 4172| 98| } 4173| | // Just return the original expression. 4174| 0| return Expr; 4175| 98|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser14getVariantKindEN7llvm_ks9StringRefE: 4742| 278|MCSymbolRefExpr::VariantKind MipsAsmParser::getVariantKind(StringRef Symbol) { 4743| | 4744| 278| MCSymbolRefExpr::VariantKind VK = 4745| 278| StringSwitch(Symbol) 4746| 278| .Case("hi", MCSymbolRefExpr::VK_Mips_ABS_HI) 4747| 278| .Case("lo", MCSymbolRefExpr::VK_Mips_ABS_LO) 4748| 278| .Case("gp_rel", MCSymbolRefExpr::VK_Mips_GPREL) 4749| 278| .Case("call16", MCSymbolRefExpr::VK_Mips_GOT_CALL) 4750| 278| .Case("got", MCSymbolRefExpr::VK_Mips_GOT) 4751| 278| .Case("tlsgd", MCSymbolRefExpr::VK_Mips_TLSGD) 4752| 278| .Case("tlsldm", MCSymbolRefExpr::VK_Mips_TLSLDM) 4753| 278| .Case("dtprel_hi", MCSymbolRefExpr::VK_Mips_DTPREL_HI) 4754| 278| .Case("dtprel_lo", MCSymbolRefExpr::VK_Mips_DTPREL_LO) 4755| 278| .Case("gottprel", MCSymbolRefExpr::VK_Mips_GOTTPREL) 4756| 278| .Case("tprel_hi", MCSymbolRefExpr::VK_Mips_TPREL_HI) 4757| 278| .Case("tprel_lo", MCSymbolRefExpr::VK_Mips_TPREL_LO) 4758| 278| .Case("got_disp", MCSymbolRefExpr::VK_Mips_GOT_DISP) 4759| 278| .Case("got_page", MCSymbolRefExpr::VK_Mips_GOT_PAGE) 4760| 278| .Case("got_ofst", MCSymbolRefExpr::VK_Mips_GOT_OFST) 4761| 278| .Case("hi(%neg(%gp_rel", MCSymbolRefExpr::VK_Mips_GPOFF_HI) 4762| 278| .Case("lo(%neg(%gp_rel", MCSymbolRefExpr::VK_Mips_GPOFF_LO) 4763| 278| .Case("got_hi", MCSymbolRefExpr::VK_Mips_GOT_HI16) 4764| 278| .Case("got_lo", MCSymbolRefExpr::VK_Mips_GOT_LO16) 4765| 278| .Case("call_hi", MCSymbolRefExpr::VK_Mips_CALL_HI16) 4766| 278| .Case("call_lo", MCSymbolRefExpr::VK_Mips_CALL_LO16) 4767| 278| .Case("higher", MCSymbolRefExpr::VK_Mips_HIGHER) 4768| 278| .Case("highest", MCSymbolRefExpr::VK_Mips_HIGHEST) 4769| 278| .Case("pcrel_hi", MCSymbolRefExpr::VK_Mips_PCREL_HI16) 4770| 278| .Case("pcrel_lo", MCSymbolRefExpr::VK_Mips_PCREL_LO16) 4771| 278| .Default(MCSymbolRefExpr::VK_None); 4772| | 4773| 278| assert(VK != MCSymbolRefExpr::VK_None); ------------------ | Branch (4773:3): [True: 278, False: 0] ------------------ 4774| | 4775| 278| return VK; 4776| 278|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser18parseBracketSuffixEN7llvm_ks9StringRefERNS1_15SmallVectorImplINSt3__110unique_ptrINS1_18MCParsedAsmOperandENS4_14default_deleteIS6_EEEEEERj: 4816| 2| OperandVector &Operands, unsigned int &ErrorCode) { 4817| 2| MCAsmParser &Parser = getParser(); 4818| 2| if (getLexer().is(AsmToken::LBrac)) { ------------------ | Branch (4818:7): [True: 2, False: 0] ------------------ 4819| 2| Operands.push_back( 4820| 2| MipsOperand::CreateToken("[", getLexer().getLoc(), *this)); 4821| 2| Parser.Lex(); 4822| 2| if (parseOperand(Operands, Name, ErrorCode)) { ------------------ | Branch (4822:9): [True: 1, False: 1] ------------------ 4823| | // SMLoc Loc = getLexer().getLoc(); 4824| 1| Parser.eatToEndOfStatement(); 4825| | //return Error(Loc, "unexpected token in argument list"); 4826| 1| return true; 4827| 1| } 4828| 1| if (Parser.getTok().isNot(AsmToken::RBrac)) { ------------------ | Branch (4828:9): [True: 1, False: 0] ------------------ 4829| | // SMLoc Loc = getLexer().getLoc(); 4830| 1| Parser.eatToEndOfStatement(); 4831| | //return Error(Loc, "unexpected token, expected ']'"); 4832| 1| ErrorCode = KS_ERR_ASM_MIPS_INVALIDOPERAND; 4833| 1| return true; 4834| 1| } 4835| 0| Operands.push_back( 4836| 0| MipsOperand::CreateToken("]", getLexer().getLoc(), *this)); 4837| 0| Parser.Lex(); 4838| 0| } 4839| 0| return false; 4840| 2|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser14ParseDirectiveEN7llvm_ks8AsmTokenE: 6055| 66.1k|bool MipsAsmParser::ParseDirective(AsmToken DirectiveID) { 6056| 66.1k| MCAsmParser &Parser = getParser(); 6057| 66.1k| StringRef IDVal = DirectiveID.getString(); 6058| | 6059| 66.1k| if (IDVal == ".cpload") ------------------ | Branch (6059:7): [True: 42, False: 66.0k] ------------------ 6060| 42| return parseDirectiveCpLoad(DirectiveID.getLoc()); 6061| 66.0k| if (IDVal == ".cprestore") ------------------ | Branch (6061:7): [True: 2, False: 66.0k] ------------------ 6062| 2| return parseDirectiveCpRestore(DirectiveID.getLoc()); 6063| 66.0k| if (IDVal == ".dword") { ------------------ | Branch (6063:7): [True: 0, False: 66.0k] ------------------ 6064| 0| parseDataDirective(8, DirectiveID.getLoc()); 6065| 0| return false; 6066| 0| } 6067| 66.0k| if (IDVal == ".ent") { ------------------ | Branch (6067:7): [True: 68, False: 65.9k] ------------------ 6068| 68| StringRef SymbolName; 6069| | 6070| 68| if (Parser.parseIdentifier(SymbolName)) { ------------------ | Branch (6070:9): [True: 0, False: 68] ------------------ 6071| 0| reportParseError("expected identifier after .ent"); 6072| 0| return false; 6073| 0| } 6074| | 6075| | // There's an undocumented extension that allows an integer to 6076| | // follow the name of the procedure which AFAICS is ignored by GAS. 6077| | // Example: .ent foo,2 6078| 68| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (6078:9): [True: 68, False: 0] ------------------ 6079| 68| if (getLexer().isNot(AsmToken::Comma)) { ------------------ | Branch (6079:11): [True: 18, False: 50] ------------------ 6080| | // Even though we accept this undocumented extension for compatibility 6081| | // reasons, the additional integer argument does not actually change 6082| | // the behaviour of the '.ent' directive, so we would like to discourage 6083| | // its use. We do this by not referring to the extended version in 6084| | // error messages which are not directly related to its use. 6085| 18| reportParseError("unexpected token, expected end of statement"); 6086| 18| return false; 6087| 18| } 6088| 50| Parser.Lex(); // Eat the comma. 6089| 50| const MCExpr *DummyNumber; 6090| 50| int64_t DummyNumberVal; 6091| | // If the user was explicitly trying to use the extended version, 6092| | // we still give helpful extension-related error messages. 6093| 50| if (Parser.parseExpression(DummyNumber)) { ------------------ | Branch (6093:11): [True: 18, False: 32] ------------------ 6094| 18| reportParseError("expected number after comma"); 6095| 18| return false; 6096| 18| } 6097| 32| if (!DummyNumber->evaluateAsAbsolute(DummyNumberVal)) { ------------------ | Branch (6097:11): [True: 0, False: 32] ------------------ 6098| 0| reportParseError("expected an absolute expression after comma"); 6099| 0| return false; 6100| 0| } 6101| 32| } 6102| | 6103| | // If this is not the end of the statement, report an error. 6104| 32| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (6104:9): [True: 32, False: 0] ------------------ 6105| 32| reportParseError("unexpected token, expected end of statement"); 6106| 32| return false; 6107| 32| } 6108| | 6109| 0| MCSymbol *Sym = getContext().getOrCreateSymbol(SymbolName); 6110| | 6111| | //getTargetStreamer().emitDirectiveEnt(*Sym); 6112| 0| CurrentFn = Sym; 6113| 0| IsCpRestoreSet = false; 6114| 0| return false; 6115| 32| } 6116| | 6117| 65.9k| if (IDVal == ".end") { ------------------ | Branch (6117:7): [True: 4, False: 65.9k] ------------------ 6118| 4| StringRef SymbolName; 6119| | 6120| 4| if (Parser.parseIdentifier(SymbolName)) { ------------------ | Branch (6120:9): [True: 2, False: 2] ------------------ 6121| 2| reportParseError("expected identifier after .end"); 6122| 2| return false; 6123| 2| } 6124| | 6125| 2| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (6125:9): [True: 2, False: 0] ------------------ 6126| 2| reportParseError("unexpected token, expected end of statement"); 6127| 2| return false; 6128| 2| } 6129| | 6130| 0| if (CurrentFn == nullptr) { ------------------ | Branch (6130:9): [True: 0, False: 0] ------------------ 6131| 0| reportParseError(".end used without .ent"); 6132| 0| return false; 6133| 0| } 6134| | 6135| 0| if ((SymbolName != CurrentFn->getName())) { ------------------ | Branch (6135:9): [True: 0, False: 0] ------------------ 6136| 0| reportParseError(".end symbol does not match .ent symbol"); 6137| 0| return false; 6138| 0| } 6139| | 6140| | //getTargetStreamer().emitDirectiveEnd(SymbolName); 6141| 0| CurrentFn = nullptr; 6142| 0| IsCpRestoreSet = false; 6143| 0| return false; 6144| 0| } 6145| | 6146| 65.9k| if (IDVal == ".frame") { ------------------ | Branch (6146:7): [True: 8.36k, False: 57.6k] ------------------ 6147| | // .frame $stack_reg, frame_size_in_bytes, $return_reg 6148| 8.36k| SmallVector, 1> TmpReg; 6149| 8.36k| OperandMatchResultTy ResTy = parseAnyRegister(TmpReg); 6150| 8.36k| if (ResTy == MatchOperand_NoMatch || ResTy == MatchOperand_ParseFail) { ------------------ | Branch (6150:9): [True: 4.19k, False: 4.16k] | Branch (6150:42): [True: 0, False: 4.16k] ------------------ 6151| 4.19k| reportParseError("expected stack register"); 6152| 4.19k| return false; 6153| 4.19k| } 6154| | 6155| 4.16k| MipsOperand &StackRegOpnd = static_cast(*TmpReg[0]); 6156| 4.16k| if (!StackRegOpnd.isGPRAsmReg()) { ------------------ | Branch (6156:9): [True: 32, False: 4.13k] ------------------ 6157| 32| reportParseError(StackRegOpnd.getStartLoc(), 6158| 32| "expected general purpose register"); 6159| 32| return false; 6160| 32| } 6161| | //unsigned StackReg = StackRegOpnd.getGPR32Reg(); 6162| | 6163| 4.13k| if (Parser.getTok().is(AsmToken::Comma)) ------------------ | Branch (6163:9): [True: 4.01k, False: 122] ------------------ 6164| 4.01k| Parser.Lex(); 6165| 122| else { 6166| 122| reportParseError("unexpected token, expected comma"); 6167| 122| return false; 6168| 122| } 6169| | 6170| | // Parse the frame size. 6171| 4.01k| const MCExpr *FrameSize; 6172| 4.01k| int64_t FrameSizeVal; 6173| | 6174| 4.01k| if (Parser.parseExpression(FrameSize)) { ------------------ | Branch (6174:9): [True: 164, False: 3.85k] ------------------ 6175| 164| reportParseError("expected frame size value"); 6176| 164| return false; 6177| 164| } 6178| | 6179| 3.85k| if (!FrameSize->evaluateAsAbsolute(FrameSizeVal)) { ------------------ | Branch (6179:9): [True: 203, False: 3.64k] ------------------ 6180| 203| reportParseError("frame size not an absolute expression"); 6181| 203| return false; 6182| 203| } 6183| | 6184| 3.64k| if (Parser.getTok().is(AsmToken::Comma)) ------------------ | Branch (6184:9): [True: 3.55k, False: 94] ------------------ 6185| 3.55k| Parser.Lex(); 6186| 94| else { 6187| 94| reportParseError("unexpected token, expected comma"); 6188| 94| return false; 6189| 94| } 6190| | 6191| | // Parse the return register. 6192| 3.55k| TmpReg.clear(); 6193| 3.55k| ResTy = parseAnyRegister(TmpReg); 6194| 3.55k| if (ResTy == MatchOperand_NoMatch || ResTy == MatchOperand_ParseFail) { ------------------ | Branch (6194:9): [True: 3.53k, False: 15] | Branch (6194:42): [True: 0, False: 15] ------------------ 6195| 3.53k| reportParseError("expected return register"); 6196| 3.53k| return false; 6197| 3.53k| } 6198| | 6199| 15| MipsOperand &ReturnRegOpnd = static_cast(*TmpReg[0]); 6200| 15| if (!ReturnRegOpnd.isGPRAsmReg()) { ------------------ | Branch (6200:9): [True: 15, False: 0] ------------------ 6201| 15| reportParseError(ReturnRegOpnd.getStartLoc(), 6202| 15| "expected general purpose register"); 6203| 15| return false; 6204| 15| } 6205| | 6206| | // If this is not the end of the statement, report an error. 6207| 0| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (6207:9): [True: 0, False: 0] ------------------ 6208| 0| reportParseError("unexpected token, expected end of statement"); 6209| 0| return false; 6210| 0| } 6211| | 6212| | //getTargetStreamer().emitFrame(StackReg, FrameSizeVal, 6213| | // ReturnRegOpnd.getGPR32Reg()); 6214| 0| IsCpRestoreSet = false; 6215| 0| return false; 6216| 0| } 6217| | 6218| 57.6k| if (IDVal == ".set") { ------------------ | Branch (6218:7): [True: 23.2k, False: 34.3k] ------------------ 6219| 23.2k| return parseDirectiveSet(); 6220| 23.2k| } 6221| | 6222| 34.3k| if (IDVal == ".mask" || IDVal == ".fmask") { ------------------ | Branch (6222:7): [True: 0, False: 34.3k] | Branch (6222:7): [True: 32, False: 34.3k] | Branch (6222:27): [True: 32, False: 34.3k] ------------------ 6223| | // .mask bitmask, frame_offset 6224| | // bitmask: One bit for each register used. 6225| | // frame_offset: Offset from Canonical Frame Address ($sp on entry) where 6226| | // first register is expected to be saved. 6227| | // Examples: 6228| | // .mask 0x80000000, -4 6229| | // .fmask 0x80000000, -4 6230| | // 6231| | 6232| | // Parse the bitmask 6233| 32| const MCExpr *BitMask; 6234| 32| int64_t BitMaskVal; 6235| | 6236| 32| if (Parser.parseExpression(BitMask)) { ------------------ | Branch (6236:9): [True: 0, False: 32] ------------------ 6237| 0| reportParseError("expected bitmask value"); 6238| 0| return false; 6239| 0| } 6240| | 6241| 32| if (!BitMask->evaluateAsAbsolute(BitMaskVal)) { ------------------ | Branch (6241:9): [True: 0, False: 32] ------------------ 6242| 0| reportParseError("bitmask not an absolute expression"); 6243| 0| return false; 6244| 0| } 6245| | 6246| 32| if (Parser.getTok().is(AsmToken::Comma)) ------------------ | Branch (6246:9): [True: 32, False: 0] ------------------ 6247| 32| Parser.Lex(); 6248| 0| else { 6249| 0| reportParseError("unexpected token, expected comma"); 6250| 0| return false; 6251| 0| } 6252| | 6253| | // Parse the frame_offset 6254| 32| const MCExpr *FrameOffset; 6255| 32| int64_t FrameOffsetVal; 6256| | 6257| 32| if (Parser.parseExpression(FrameOffset)) { ------------------ | Branch (6257:9): [True: 32, False: 0] ------------------ 6258| 32| reportParseError("expected frame offset value"); 6259| 32| return false; 6260| 32| } 6261| | 6262| 0| if (!FrameOffset->evaluateAsAbsolute(FrameOffsetVal)) { ------------------ | Branch (6262:9): [True: 0, False: 0] ------------------ 6263| 0| reportParseError("frame offset not an absolute expression"); 6264| 0| return false; 6265| 0| } 6266| | 6267| | // If this is not the end of the statement, report an error. 6268| 0| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (6268:9): [True: 0, False: 0] ------------------ 6269| 0| reportParseError("unexpected token, expected end of statement"); 6270| 0| return false; 6271| 0| } 6272| | 6273| |#if 0 6274| | if (IDVal == ".mask") 6275| | getTargetStreamer().emitMask(BitMaskVal, FrameOffsetVal); 6276| | else 6277| | getTargetStreamer().emitFMask(BitMaskVal, FrameOffsetVal); 6278| |#endif 6279| 0| return false; 6280| 0| } 6281| | 6282| 34.3k| if (IDVal == ".nan") ------------------ | Branch (6282:7): [True: 524, False: 33.8k] ------------------ 6283| 524| return parseDirectiveNaN(); 6284| | 6285| 33.8k| if (IDVal == ".gpword") { ------------------ | Branch (6285:7): [True: 50, False: 33.7k] ------------------ 6286| 50| parseDirectiveGpWord(); 6287| 50| return false; 6288| 50| } 6289| | 6290| 33.7k| if (IDVal == ".gpdword") { ------------------ | Branch (6290:7): [True: 30, False: 33.7k] ------------------ 6291| 30| parseDirectiveGpDWord(); 6292| 30| return false; 6293| 30| } 6294| | 6295| 33.7k| if (IDVal == ".word") { ------------------ | Branch (6295:7): [True: 1.72k, False: 32.0k] ------------------ 6296| 1.72k| parseDataDirective(4, DirectiveID.getLoc()); 6297| 1.72k| return false; 6298| 1.72k| } 6299| | 6300| 32.0k| if (IDVal == ".option") ------------------ | Branch (6300:7): [True: 162, False: 31.8k] ------------------ 6301| 162| return parseDirectiveOption(); 6302| | 6303| 31.8k| if (IDVal == ".abicalls") { ------------------ | Branch (6303:7): [True: 0, False: 31.8k] ------------------ 6304| | //getTargetStreamer().emitDirectiveAbiCalls(); 6305| 0| if (Parser.getTok().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (6305:9): [True: 0, False: 0] ------------------ 6306| 0| Error(Parser.getTok().getLoc(), 6307| 0| "unexpected token, expected end of statement"); 6308| | // Clear line 6309| 0| Parser.eatToEndOfStatement(); 6310| 0| } 6311| 0| return false; 6312| 0| } 6313| | 6314| 31.8k| if (IDVal == ".cpsetup") ------------------ | Branch (6314:7): [True: 80, False: 31.7k] ------------------ 6315| 80| return parseDirectiveCPSetup(); 6316| | 6317| 31.7k| if (IDVal == ".cpreturn") ------------------ | Branch (6317:7): [True: 0, False: 31.7k] ------------------ 6318| 0| return parseDirectiveCPReturn(); 6319| | 6320| 31.7k| if (IDVal == ".module") ------------------ | Branch (6320:7): [True: 16, False: 31.7k] ------------------ 6321| 16| return parseDirectiveModule(); 6322| | 6323| 31.7k| if (IDVal == ".llvm_internal_mips_reallow_module_directive") ------------------ | Branch (6323:7): [True: 0, False: 31.7k] ------------------ 6324| 0| return parseInternalDirectiveReallowModule(); 6325| | 6326| 31.7k| if (IDVal == ".insn") ------------------ | Branch (6326:7): [True: 92, False: 31.6k] ------------------ 6327| 92| return parseInsnDirective(); 6328| | 6329| 31.6k| return true; 6330| 31.7k|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser20parseDirectiveCpLoadEN7llvm_ks5SMLocE: 5430| 42|bool MipsAsmParser::parseDirectiveCpLoad(SMLoc Loc) { 5431| 42| if (AssemblerOptions.back()->isReorder()) { ------------------ | Branch (5431:7): [True: 42, False: 0] ------------------ 5432| | // Warning(Loc, ".cpload should be inside a noreorder section"); 5433| 42| } 5434| | 5435| 42| if (inMips16Mode()) { ------------------ | Branch (5435:7): [True: 0, False: 42] ------------------ 5436| 0| reportParseError(".cpload is not supported in Mips16 mode"); 5437| 0| return false; 5438| 0| } 5439| | 5440| 42| SmallVector, 1> Reg; 5441| 42| OperandMatchResultTy ResTy = parseAnyRegister(Reg); 5442| 42| if (ResTy == MatchOperand_NoMatch || ResTy == MatchOperand_ParseFail) { ------------------ | Branch (5442:7): [True: 1, False: 41] | Branch (5442:40): [True: 0, False: 41] ------------------ 5443| 1| reportParseError("expected register containing function address"); 5444| 1| return false; 5445| 1| } 5446| | 5447| 41| MipsOperand &RegOpnd = static_cast(*Reg[0]); 5448| 41| if (!RegOpnd.isGPRAsmReg()) { ------------------ | Branch (5448:7): [True: 32, False: 9] ------------------ 5449| 32| reportParseError(RegOpnd.getStartLoc(), "invalid register"); 5450| 32| return false; 5451| 32| } 5452| | 5453| | // If this is not the end of the statement, report an error. 5454| 9| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (5454:7): [True: 8, False: 1] ------------------ 5455| 8| reportParseError("unexpected token, expected end of statement"); 5456| 8| return false; 5457| 8| } 5458| | 5459| | //getTargetStreamer().emitDirectiveCpLoad(RegOpnd.getGPR32Reg()); 5460| 1| return false; 5461| 9|} MipsAsmParser.cpp:_ZNK12_GLOBAL__N_120MipsAssemblerOptions9isReorderEv: 68| 3.88k| bool isReorder() const { return Reorder; } MipsAsmParser.cpp:_ZNK12_GLOBAL__N_113MipsAsmParser12inMips16ModeEv: 535| 44| bool inMips16Mode() const { 536| 44| return getSTI().getFeatureBits()[Mips::FeatureMips16]; 537| 44| } MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser23parseDirectiveCpRestoreEN7llvm_ks5SMLocE: 5463| 2|bool MipsAsmParser::parseDirectiveCpRestore(SMLoc Loc) { 5464| 2| MCAsmParser &Parser = getParser(); 5465| | 5466| | // Note that .cprestore is ignored if used with the N32 and N64 ABIs or if it 5467| | // is used in non-PIC mode. 5468| | 5469| 2| if (inMips16Mode()) { ------------------ | Branch (5469:7): [True: 0, False: 2] ------------------ 5470| 0| reportParseError(".cprestore is not supported in Mips16 mode"); 5471| 0| return false; 5472| 0| } 5473| | 5474| | // Get the stack offset value. 5475| 2| const MCExpr *StackOffset; 5476| 2| int64_t StackOffsetVal; 5477| 2| if (Parser.parseExpression(StackOffset)) { ------------------ | Branch (5477:7): [True: 1, False: 1] ------------------ 5478| 1| reportParseError("expected stack offset value"); 5479| 1| return false; 5480| 1| } 5481| | 5482| 1| if (!StackOffset->evaluateAsAbsolute(StackOffsetVal)) { ------------------ | Branch (5482:7): [True: 0, False: 1] ------------------ 5483| 0| reportParseError("stack offset is not an absolute expression"); 5484| 0| return false; 5485| 0| } 5486| | 5487| 1| if (StackOffsetVal < 0) { ------------------ | Branch (5487:7): [True: 0, False: 1] ------------------ 5488| | // Warning(Loc, ".cprestore with negative stack offset has no effect"); 5489| 0| IsCpRestoreSet = false; 5490| 1| } else { 5491| 1| IsCpRestoreSet = true; 5492| 1| CpRestoreOffset = StackOffsetVal; 5493| 1| } 5494| | 5495| | // If this is not the end of the statement, report an error. 5496| 1| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (5496:7): [True: 1, False: 0] ------------------ 5497| 1| reportParseError("unexpected token, expected end of statement"); 5498| 1| return false; 5499| 1| } 5500| | 5501| | // Store the $gp on the stack. 5502| 0| SmallVector StoreInsts; 5503| 0| createCpRestoreMemOp(false /*IsLoad*/, CpRestoreOffset /*StackOffset*/, Loc, 5504| 0| StoreInsts); 5505| | 5506| | //getTargetStreamer().emitDirectiveCpRestore(StoreInsts, CpRestoreOffset); 5507| 0| Parser.Lex(); // Consume the EndOfStatement. 5508| 0| return false; 5509| 1|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser13expandMemInstERN7llvm_ks6MCInstENS1_5SMLocERNS1_15SmallVectorImplIS2_EEbb: 2691| 68| bool isLoad, bool isImmOpnd) { 2692| 68| unsigned ImmOffset, HiOffset, LoOffset; 2693| 68| const MCExpr *ExprOffset; 2694| 68| unsigned TmpRegNum; 2695| | // 1st operand is either the source or destination register. 2696| 68| assert(Inst.getOperand(0).isReg() && "expected register operand kind"); ------------------ | Branch (2696:3): [True: 68, False: 0] | Branch (2696:3): [True: 68, Folded] | Branch (2696:3): [True: 68, False: 0] ------------------ 2697| 68| unsigned RegOpNum = Inst.getOperand(0).getReg(); 2698| | // 2nd operand is the base register. 2699| 68| assert(Inst.getOperand(1).isReg() && "expected register operand kind"); ------------------ | Branch (2699:3): [True: 68, False: 0] | Branch (2699:3): [True: 68, Folded] | Branch (2699:3): [True: 68, False: 0] ------------------ 2700| 68| unsigned BaseRegNum = Inst.getOperand(1).getReg(); 2701| | // 3rd operand is either an immediate or expression. 2702| 68| if (isImmOpnd) { ------------------ | Branch (2702:7): [True: 7, False: 61] ------------------ 2703| 7| assert(Inst.getOperand(2).isImm() && "expected immediate operand kind"); ------------------ | Branch (2703:5): [True: 7, False: 0] | Branch (2703:5): [True: 7, Folded] | Branch (2703:5): [True: 7, False: 0] ------------------ 2704| 7| ImmOffset = Inst.getOperand(2).getImm(); 2705| 7| LoOffset = ImmOffset & 0x0000ffff; 2706| 7| HiOffset = (ImmOffset & 0xffff0000) >> 16; 2707| | // If msb of LoOffset is 1(negative number) we must increment HiOffset. 2708| 7| if (LoOffset & 0x8000) ------------------ | Branch (2708:9): [True: 0, False: 7] ------------------ 2709| 0| HiOffset++; 2710| 7| } else 2711| 61| ExprOffset = Inst.getOperand(2).getExpr(); 2712| | // These are some of the types of expansions we perform here: 2713| | // 1) lw $8, sym => lui $8, %hi(sym) 2714| | // lw $8, %lo(sym)($8) 2715| | // 2) lw $8, offset($9) => lui $8, %hi(offset) 2716| | // add $8, $8, $9 2717| | // lw $8, %lo(offset)($9) 2718| | // 3) lw $8, offset($8) => lui $at, %hi(offset) 2719| | // add $at, $at, $8 2720| | // lw $8, %lo(offset)($at) 2721| | // 4) sw $8, sym => lui $at, %hi(sym) 2722| | // sw $8, %lo(sym)($at) 2723| | // 5) sw $8, offset($8) => lui $at, %hi(offset) 2724| | // add $at, $at, $8 2725| | // sw $8, %lo(offset)($at) 2726| | // 6) ldc1 $f0, sym => lui $at, %hi(sym) 2727| | // ldc1 $f0, %lo(sym)($at) 2728| | // 2729| | // For load instructions we can use the destination register as a temporary 2730| | // if base and dst are different (examples 1 and 2) and if the base register 2731| | // is general purpose otherwise we must use $at (example 6) and error if it's 2732| | // not available. For stores we must use $at (examples 4 and 5) because we 2733| | // must not clobber the source register setting up the offset. 2734| 68| const MCInstrDesc &Desc = getInstDesc(Inst.getOpcode()); 2735| 68| int16_t RegClassOp0 = Desc.OpInfo[0].RegClass; 2736| 68| unsigned RegClassIDOp0 = 2737| 68| getContext().getRegisterInfo()->getRegClass(RegClassOp0).getID(); 2738| 68| bool IsGPR = (RegClassIDOp0 == Mips::GPR32RegClassID) || ------------------ | Branch (2738:16): [True: 40, False: 28] ------------------ 2739| 28| (RegClassIDOp0 == Mips::GPR64RegClassID); ------------------ | Branch (2739:16): [True: 0, False: 28] ------------------ 2740| 68| if (isLoad && IsGPR && (BaseRegNum != RegOpNum)) ------------------ | Branch (2740:7): [True: 37, False: 31] | Branch (2740:17): [True: 37, False: 0] | Branch (2740:26): [True: 37, False: 0] ------------------ 2741| 37| TmpRegNum = RegOpNum; 2742| 31| else { 2743| | // At this point we need AT to perform the expansions and we exit if it is 2744| | // not available. 2745| 31| TmpRegNum = getATReg(IDLoc); 2746| 31| if (!TmpRegNum) ------------------ | Branch (2746:9): [True: 0, False: 31] ------------------ 2747| 0| return; 2748| 31| } 2749| | 2750| 68| emitRX(Mips::LUi, TmpRegNum, 2751| 68| isImmOpnd ? MCOperand::createImm(HiOffset) ------------------ | Branch (2751:10): [True: 7, False: 61] ------------------ 2752| 68| : MCOperand::createExpr(evaluateRelocExpr(ExprOffset, "hi")), 2753| 68| IDLoc, Instructions); 2754| | // Add temp register to base. 2755| 68| if (BaseRegNum != Mips::ZERO) ------------------ | Branch (2755:7): [True: 0, False: 68] ------------------ 2756| 0| emitRRR(Mips::ADDu, TmpRegNum, TmpRegNum, BaseRegNum, IDLoc, Instructions); 2757| | // And finally, create original instruction with low part 2758| | // of offset and new base. 2759| 68| emitRRX(Inst.getOpcode(), RegOpNum, TmpRegNum, 2760| 68| isImmOpnd ------------------ | Branch (2760:11): [True: 7, False: 61] ------------------ 2761| 68| ? MCOperand::createImm(LoOffset) 2762| 68| : MCOperand::createExpr(evaluateRelocExpr(ExprOffset, "lo")), 2763| 68| IDLoc, Instructions); 2764| 68|} MipsAsmParser.cpp:_ZL11getInstDescj: 1401| 4.33k|static const MCInstrDesc &getInstDesc(unsigned Opcode) { 1402| 4.33k| return MipsInsts[Opcode]; 1403| 4.33k|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser8getATRegEN7llvm_ks5SMLocE: 4024| 31|unsigned MipsAsmParser::getATReg(SMLoc Loc) { 4025| 31| unsigned ATIndex = AssemblerOptions.back()->getATRegIndex(); 4026| 31| if (ATIndex == 0) { ------------------ | Branch (4026:7): [True: 0, False: 31] ------------------ 4027| 0| reportParseError(Loc, 4028| 0| "pseudo-instruction requires $at, which is not available"); 4029| 0| return 0; 4030| 0| } 4031| 31| unsigned AT = getReg( 4032| 31| (isGP64bit()) ? Mips::GPR64RegClassID : Mips::GPR32RegClassID, ATIndex); ------------------ | Branch (4032:7): [True: 0, False: 31] ------------------ 4033| 31| return AT; 4034| 31|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser6getRegEii: 4036| 31|unsigned MipsAsmParser::getReg(int RC, int RegNo) { 4037| 31| return *(getContext().getRegisterInfo()->getRegClass(RC).begin() + RegNo); 4038| 31|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_16emitRXEjjN7llvm_ks9MCOperandENS0_5SMLocERNS0_15SmallVectorImplINS0_6MCInstEEE: 1458| 100| SmallVectorImpl &Instructions) { 1459| 100| MCInst tmpInst; 1460| 100| tmpInst.setOpcode(Opcode); 1461| 100| tmpInst.addOperand(MCOperand::createReg(Reg0)); 1462| 100| tmpInst.addOperand(Op1); 1463| 100| tmpInst.setLoc(IDLoc); 1464| 100| Instructions.push_back(tmpInst); 1465| 100|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_17emitRRREjjjjN7llvm_ks5SMLocERNS0_15SmallVectorImplINS0_6MCInstEEE: 1508| 64| SMLoc IDLoc, SmallVectorImpl &Instructions) { 1509| 64| emitRRX(Opcode, Reg0, Reg1, MCOperand::createReg(Reg2), IDLoc, 1510| 64| Instructions); 1511| 64|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_17emitRRXEjjjN7llvm_ks9MCOperandENS0_5SMLocERNS0_15SmallVectorImplINS0_6MCInstEEE: 1497| 3.97k| SMLoc IDLoc, SmallVectorImpl &Instructions) { 1498| 3.97k| MCInst tmpInst; 1499| 3.97k| tmpInst.setOpcode(Opcode); 1500| 3.97k| tmpInst.addOperand(MCOperand::createReg(Reg0)); 1501| 3.97k| tmpInst.addOperand(MCOperand::createReg(Reg1)); 1502| 3.97k| tmpInst.addOperand(Op2); 1503| 3.97k| tmpInst.setLoc(IDLoc); 1504| 3.97k| Instructions.push_back(tmpInst); 1505| 3.97k|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_17emitRRIEjjjsN7llvm_ks5SMLocERNS0_15SmallVectorImplINS0_6MCInstEEE: 1514| 3.84k| SMLoc IDLoc, SmallVectorImpl &Instructions) { 1515| 3.84k| emitRRX(Opcode, Reg0, Reg1, MCOperand::createImm(Imm), IDLoc, 1516| 3.84k| Instructions); 1517| 3.84k|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser18parseDataDirectiveEjN7llvm_ks5SMLocE: 5707| 1.72k|bool MipsAsmParser::parseDataDirective(unsigned Size, SMLoc L) { 5708| 1.72k| MCAsmParser &Parser = getParser(); 5709| 1.72k| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (5709:7): [True: 1.72k, False: 0] ------------------ 5710| 1.92k| for (;;) { 5711| 1.92k| const MCExpr *Value; 5712| 1.92k| if (getParser().parseExpression(Value)) ------------------ | Branch (5712:11): [True: 20, False: 1.90k] ------------------ 5713| 20| return true; 5714| | 5715| 1.90k| getParser().getStreamer().EmitValue(Value, Size); 5716| | 5717| 1.90k| if (getLexer().is(AsmToken::EndOfStatement)) ------------------ | Branch (5717:11): [True: 1.62k, False: 283] ------------------ 5718| 1.62k| break; 5719| | 5720| 283| if (getLexer().isNot(AsmToken::Comma)) ------------------ | Branch (5720:11): [True: 86, False: 197] ------------------ 5721| 86| return Error(L, "unexpected token, expected comma"); 5722| 197| Parser.Lex(); 5723| 197| } 5724| 1.72k| } 5725| | 5726| 1.62k| Parser.Lex(); 5727| 1.62k| return false; 5728| 1.72k|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser16reportParseErrorEN7llvm_ks5TwineE: 4904| 21.2k|bool MipsAsmParser::reportParseError(Twine ErrorMsg) { 4905| 21.2k| MCAsmParser &Parser = getParser(); 4906| 21.2k| SMLoc Loc = getLexer().getLoc(); 4907| 21.2k| Parser.eatToEndOfStatement(); 4908| 21.2k| return Error(Loc, ErrorMsg); 4909| 21.2k|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser16reportParseErrorEN7llvm_ks5SMLocENS1_5TwineE: 4911| 107|bool MipsAsmParser::reportParseError(SMLoc Loc, Twine ErrorMsg) { 4912| 107| return Error(Loc, ErrorMsg); 4913| 107|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser17parseDirectiveSetEv: 5613| 23.2k|bool MipsAsmParser::parseDirectiveSet() { 5614| 23.2k| MCAsmParser &Parser = getParser(); 5615| | // Get the next token. 5616| 23.2k| const AsmToken &Tok = Parser.getTok(); 5617| | 5618| 23.2k| if (Tok.getString() == "noat") { ------------------ | Branch (5618:7): [True: 52, False: 23.1k] ------------------ 5619| 52| return parseSetNoAtDirective(); 5620| 23.1k| } else if (Tok.getString() == "at") { ------------------ | Branch (5620:14): [True: 330, False: 22.8k] ------------------ 5621| 330| return parseSetAtDirective(); 5622| 22.8k| } else if (Tok.getString() == "arch") { ------------------ | Branch (5622:14): [True: 67, False: 22.7k] ------------------ 5623| 67| return parseSetArchDirective(); 5624| 22.7k| } else if (Tok.getString() == "fp") { ------------------ | Branch (5624:14): [True: 229, False: 22.5k] ------------------ 5625| 229| return parseSetFpDirective(); 5626| 22.5k| } else if (Tok.getString() == "oddspreg") { ------------------ | Branch (5626:14): [True: 0, False: 22.5k] ------------------ 5627| 0| return parseSetOddSPRegDirective(); 5628| 22.5k| } else if (Tok.getString() == "nooddspreg") { ------------------ | Branch (5628:14): [True: 0, False: 22.5k] ------------------ 5629| 0| return parseSetNoOddSPRegDirective(); 5630| 22.5k| } else if (Tok.getString() == "pop") { ------------------ | Branch (5630:14): [True: 33, False: 22.5k] ------------------ 5631| 33| return parseSetPopDirective(); 5632| 22.5k| } else if (Tok.getString() == "push") { ------------------ | Branch (5632:14): [True: 45, False: 22.4k] ------------------ 5633| 45| return parseSetPushDirective(); 5634| 22.4k| } else if (Tok.getString() == "reorder") { ------------------ | Branch (5634:14): [True: 32, False: 22.4k] ------------------ 5635| 32| return parseSetReorderDirective(); 5636| 22.4k| } else if (Tok.getString() == "noreorder") { ------------------ | Branch (5636:14): [True: 0, False: 22.4k] ------------------ 5637| 0| return parseSetNoReorderDirective(); 5638| 22.4k| } else if (Tok.getString() == "macro") { ------------------ | Branch (5638:14): [True: 8, False: 22.4k] ------------------ 5639| 8| return parseSetMacroDirective(); 5640| 22.4k| } else if (Tok.getString() == "nomacro") { ------------------ | Branch (5640:14): [True: 0, False: 22.4k] ------------------ 5641| 0| return parseSetNoMacroDirective(); 5642| 22.4k| } else if (Tok.getString() == "mips16") { ------------------ | Branch (5642:14): [True: 30, False: 22.4k] ------------------ 5643| 30| return parseSetMips16Directive(); 5644| 22.4k| } else if (Tok.getString() == "nomips16") { ------------------ | Branch (5644:14): [True: 0, False: 22.4k] ------------------ 5645| 0| return parseSetNoMips16Directive(); 5646| 22.4k| } else if (Tok.getString() == "nomicromips") { ------------------ | Branch (5646:14): [True: 0, False: 22.4k] ------------------ 5647| | //getTargetStreamer().emitDirectiveSetNoMicroMips(); 5648| 0| Parser.eatToEndOfStatement(); 5649| 0| return false; 5650| 22.4k| } else if (Tok.getString() == "micromips") { ------------------ | Branch (5650:14): [True: 0, False: 22.4k] ------------------ 5651| 0| return parseSetFeature(Mips::FeatureMicroMips); 5652| 22.4k| } else if (Tok.getString() == "mips0") { ------------------ | Branch (5652:14): [True: 4, False: 22.4k] ------------------ 5653| 4| return parseSetMips0Directive(); 5654| 22.4k| } else if (Tok.getString() == "mips1") { ------------------ | Branch (5654:14): [True: 9, False: 22.3k] ------------------ 5655| 9| return parseSetFeature(Mips::FeatureMips1); 5656| 22.3k| } else if (Tok.getString() == "mips2") { ------------------ | Branch (5656:14): [True: 32, False: 22.3k] ------------------ 5657| 32| return parseSetFeature(Mips::FeatureMips2); 5658| 22.3k| } else if (Tok.getString() == "mips3") { ------------------ | Branch (5658:14): [True: 34, False: 22.3k] ------------------ 5659| 34| return parseSetFeature(Mips::FeatureMips3); 5660| 22.3k| } else if (Tok.getString() == "mips4") { ------------------ | Branch (5660:14): [True: 3.35k, False: 18.9k] ------------------ 5661| 3.35k| return parseSetFeature(Mips::FeatureMips4); 5662| 18.9k| } else if (Tok.getString() == "mips5") { ------------------ | Branch (5662:14): [True: 0, False: 18.9k] ------------------ 5663| 0| return parseSetFeature(Mips::FeatureMips5); 5664| 18.9k| } else if (Tok.getString() == "mips32") { ------------------ | Branch (5664:14): [True: 0, False: 18.9k] ------------------ 5665| 0| return parseSetFeature(Mips::FeatureMips32); 5666| 18.9k| } else if (Tok.getString() == "mips32r2") { ------------------ | Branch (5666:14): [True: 0, False: 18.9k] ------------------ 5667| 0| return parseSetFeature(Mips::FeatureMips32r2); 5668| 18.9k| } else if (Tok.getString() == "mips32r3") { ------------------ | Branch (5668:14): [True: 0, False: 18.9k] ------------------ 5669| 0| return parseSetFeature(Mips::FeatureMips32r3); 5670| 18.9k| } else if (Tok.getString() == "mips32r5") { ------------------ | Branch (5670:14): [True: 0, False: 18.9k] ------------------ 5671| 0| return parseSetFeature(Mips::FeatureMips32r5); 5672| 18.9k| } else if (Tok.getString() == "mips32r6") { ------------------ | Branch (5672:14): [True: 0, False: 18.9k] ------------------ 5673| 0| return parseSetFeature(Mips::FeatureMips32r6); 5674| 18.9k| } else if (Tok.getString() == "mips64") { ------------------ | Branch (5674:14): [True: 0, False: 18.9k] ------------------ 5675| 0| return parseSetFeature(Mips::FeatureMips64); 5676| 18.9k| } else if (Tok.getString() == "mips64r2") { ------------------ | Branch (5676:14): [True: 0, False: 18.9k] ------------------ 5677| 0| return parseSetFeature(Mips::FeatureMips64r2); 5678| 18.9k| } else if (Tok.getString() == "mips64r3") { ------------------ | Branch (5678:14): [True: 0, False: 18.9k] ------------------ 5679| 0| return parseSetFeature(Mips::FeatureMips64r3); 5680| 18.9k| } else if (Tok.getString() == "mips64r5") { ------------------ | Branch (5680:14): [True: 0, False: 18.9k] ------------------ 5681| 0| return parseSetFeature(Mips::FeatureMips64r5); 5682| 18.9k| } else if (Tok.getString() == "mips64r6") { ------------------ | Branch (5682:14): [True: 0, False: 18.9k] ------------------ 5683| 0| return parseSetFeature(Mips::FeatureMips64r6); 5684| 18.9k| } else if (Tok.getString() == "dsp") { ------------------ | Branch (5684:14): [True: 2, False: 18.9k] ------------------ 5685| 2| return parseSetFeature(Mips::FeatureDSP); 5686| 18.9k| } else if (Tok.getString() == "nodsp") { ------------------ | Branch (5686:14): [True: 2, False: 18.9k] ------------------ 5687| 2| return parseSetNoDspDirective(); 5688| 18.9k| } else if (Tok.getString() == "msa") { ------------------ | Branch (5688:14): [True: 3.59k, False: 15.3k] ------------------ 5689| 3.59k| return parseSetMsaDirective(); 5690| 15.3k| } else if (Tok.getString() == "nomsa") { ------------------ | Branch (5690:14): [True: 7.48k, False: 7.90k] ------------------ 5691| 7.48k| return parseSetNoMsaDirective(); 5692| 7.90k| } else if (Tok.getString() == "softfloat") { ------------------ | Branch (5692:14): [True: 0, False: 7.90k] ------------------ 5693| 0| return parseSetSoftFloatDirective(); 5694| 7.90k| } else if (Tok.getString() == "hardfloat") { ------------------ | Branch (5694:14): [True: 0, False: 7.90k] ------------------ 5695| 0| return parseSetHardFloatDirective(); 5696| 7.90k| } else { 5697| | // It is just an identifier, look for an assignment. 5698| 7.90k| parseSetAssignment(); 5699| 7.90k| return false; 5700| 7.90k| } 5701| | 5702| 0| return true; 5703| 23.2k|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser21parseSetNoAtDirectiveEv: 4915| 52|bool MipsAsmParser::parseSetNoAtDirective() { 4916| 52| MCAsmParser &Parser = getParser(); 4917| | // Line should look like: ".set noat". 4918| | 4919| | // Set the $at register to $0. 4920| 52| AssemblerOptions.back()->setATRegIndex(0); 4921| | 4922| 52| Parser.Lex(); // Eat "noat". 4923| | 4924| | // If this is not the end of the statement, report an error. 4925| 52| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (4925:7): [True: 52, False: 0] ------------------ 4926| 52| reportParseError("unexpected token, expected end of statement"); 4927| 52| return false; 4928| 52| } 4929| | 4930| | //getTargetStreamer().emitDirectiveSetNoAt(); 4931| 0| Parser.Lex(); // Consume the EndOfStatement. 4932| 0| return false; 4933| 52|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_120MipsAssemblerOptions13setATRegIndexEj: 60| 68| bool setATRegIndex(unsigned Reg) { 61| 68| if (Reg > 31) ------------------ | Branch (61:9): [True: 16, False: 52] ------------------ 62| 16| return false; 63| | 64| 52| ATReg = Reg; 65| 52| return true; 66| 68| } MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser19parseSetAtDirectiveEv: 4936| 330|{ 4937| | // Line can be: ".set at", which sets $at to $1 4938| | // or ".set at=$reg", which sets $at to $reg. 4939| 330| MCAsmParser &Parser = getParser(); 4940| 330| Parser.Lex(); // Eat "at". 4941| | 4942| 330| if (getLexer().is(AsmToken::EndOfStatement)) { ------------------ | Branch (4942:7): [True: 0, False: 330] ------------------ 4943| | // No register was specified, so we set $at to $1. 4944| 0| AssemblerOptions.back()->setATRegIndex(1); 4945| | 4946| | //getTargetStreamer().emitDirectiveSetAt(); 4947| 0| Parser.Lex(); // Consume the EndOfStatement. 4948| 0| return false; 4949| 0| } 4950| | 4951| 330| if (getLexer().isNot(AsmToken::Equal)) { ------------------ | Branch (4951:7): [True: 0, False: 330] ------------------ 4952| 0| reportParseError("unexpected token, expected equals sign"); 4953| 0| return false; 4954| 0| } 4955| 330| Parser.Lex(); // Eat "=". 4956| | 4957| 330| if (getLexer().isNot(AsmToken::Dollar)) { ------------------ | Branch (4957:7): [True: 283, False: 47] ------------------ 4958| 283| if (getLexer().is(AsmToken::EndOfStatement)) { ------------------ | Branch (4958:9): [True: 119, False: 164] ------------------ 4959| 119| reportParseError("no register specified"); 4960| 119| return false; 4961| 164| } else { 4962| 164| reportParseError("unexpected token, expected dollar sign '$'"); 4963| 164| return false; 4964| 164| } 4965| 283| } 4966| 47| Parser.Lex(); // Eat "$". 4967| | 4968| | // Find out what "reg" is. 4969| 47| unsigned AtRegNo; 4970| 47| const AsmToken &Reg = Parser.getTok(); 4971| 47| if (Reg.is(AsmToken::Identifier)) { ------------------ | Branch (4971:7): [True: 16, False: 31] ------------------ 4972| 16| AtRegNo = matchCPURegisterName(Reg.getIdentifier()); 4973| 31| } else if (Reg.is(AsmToken::Integer)) { ------------------ | Branch (4973:14): [True: 0, False: 31] ------------------ 4974| 0| bool valid; 4975| 0| AtRegNo = Reg.getIntVal(valid); 4976| 0| if (!valid) ------------------ | Branch (4976:9): [True: 0, False: 0] ------------------ 4977| 0| return true; 4978| 31| } else { 4979| 31| reportParseError("unexpected token, expected identifier or integer"); 4980| 31| return false; 4981| 31| } 4982| | 4983| | // Check if $reg is a valid register. If it is, set $at to $reg. 4984| 16| if (!AssemblerOptions.back()->setATRegIndex(AtRegNo)) { ------------------ | Branch (4984:7): [True: 16, False: 0] ------------------ 4985| 16| reportParseError("invalid register"); 4986| 16| return false; 4987| 16| } 4988| 0| Parser.Lex(); // Eat "reg". 4989| | 4990| | // If this is not the end of the statement, report an error. 4991| 0| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (4991:7): [True: 0, False: 0] ------------------ 4992| 0| reportParseError("unexpected token, expected end of statement"); 4993| 0| return false; 4994| 0| } 4995| | 4996| | //getTargetStreamer().emitDirectiveSetAtWithArg(AtRegNo); 4997| | 4998| 0| Parser.Lex(); // Consume the EndOfStatement. 4999| 0| return false; 5000| 0|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser21parseSetArchDirectiveEv: 5290| 67|bool MipsAsmParser::parseSetArchDirective() { 5291| 67| MCAsmParser &Parser = getParser(); 5292| 67| Parser.Lex(); 5293| 67| if (getLexer().isNot(AsmToken::Equal)) ------------------ | Branch (5293:7): [True: 0, False: 67] ------------------ 5294| 0| return reportParseError("unexpected token, expected equals sign"); 5295| | 5296| 67| Parser.Lex(); 5297| 67| StringRef Arch; 5298| 67| if (Parser.parseIdentifier(Arch)) ------------------ | Branch (5298:7): [True: 2, False: 65] ------------------ 5299| 2| return reportParseError("expected arch identifier"); 5300| | 5301| 65| StringRef ArchFeatureName = 5302| 65| StringSwitch(Arch) 5303| 65| .Case("mips1", "mips1") 5304| 65| .Case("mips2", "mips2") 5305| 65| .Case("mips3", "mips3") 5306| 65| .Case("mips4", "mips4") 5307| 65| .Case("mips5", "mips5") 5308| 65| .Case("mips32", "mips32") 5309| 65| .Case("mips32r2", "mips32r2") 5310| 65| .Case("mips32r3", "mips32r3") 5311| 65| .Case("mips32r5", "mips32r5") 5312| 65| .Case("mips32r6", "mips32r6") 5313| 65| .Case("mips64", "mips64") 5314| 65| .Case("mips64r2", "mips64r2") 5315| 65| .Case("mips64r3", "mips64r3") 5316| 65| .Case("mips64r5", "mips64r5") 5317| 65| .Case("mips64r6", "mips64r6") 5318| 65| .Case("cnmips", "cnmips") 5319| 65| .Case("r4000", "mips3") // This is an implementation of Mips3. 5320| 65| .Default(""); 5321| | 5322| 65| if (ArchFeatureName.empty()) ------------------ | Branch (5322:7): [True: 61, False: 4] ------------------ 5323| 61| return reportParseError("unsupported architecture"); 5324| | 5325| 4| selectArch(ArchFeatureName); 5326| | //getTargetStreamer().emitDirectiveSetArch(Arch); 5327| 4| return false; 5328| 65|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser10selectArchEN7llvm_ks9StringRefE: 358| 46| void selectArch(StringRef ArchFeature) { 359| 46| MCSubtargetInfo &STI = copySTI(); 360| 46| FeatureBitset FeatureBits = STI.getFeatureBits(); 361| 46| FeatureBits &= ~MipsAssemblerOptions::AllArchRelatedMask; 362| 46| STI.setFeatureBits(FeatureBits); 363| 46| setAvailableFeatures( 364| 46| ComputeAvailableFeatures(STI.ToggleFeature(ArchFeature))); 365| 46| AssemblerOptions.back()->setFeatures(STI.getFeatureBits()); 366| 46| } MipsAsmParser.cpp:_ZN12_GLOBAL__N_120MipsAssemblerOptions11setFeaturesERKN7llvm_ks13FeatureBitsetE: 77| 6.97k| void setFeatures(const FeatureBitset &Features_) { Features = Features_; } MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser19parseSetFpDirectiveEv: 5135| 229|bool MipsAsmParser::parseSetFpDirective() { 5136| 229| MCAsmParser &Parser = getParser(); 5137| 229| MipsABIFlagsSection::FpABIKind FpAbiVal; 5138| | // Line can be: .set fp=32 5139| | // .set fp=xx 5140| | // .set fp=64 5141| 229| Parser.Lex(); // Eat fp token 5142| 229| AsmToken Tok = Parser.getTok(); 5143| 229| if (Tok.isNot(AsmToken::Equal)) { ------------------ | Branch (5143:7): [True: 0, False: 229] ------------------ 5144| 0| reportParseError("unexpected token, expected equals sign '='"); 5145| 0| return false; 5146| 0| } 5147| 229| Parser.Lex(); // Eat '=' token. 5148| 229| Tok = Parser.getTok(); 5149| | 5150| 229| if (!parseFpABIValue(FpAbiVal, ".set")) ------------------ | Branch (5150:7): [True: 218, False: 11] ------------------ 5151| 218| return false; 5152| | 5153| 11| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (5153:7): [True: 11, False: 0] ------------------ 5154| 11| reportParseError("unexpected token, expected end of statement"); 5155| 11| return false; 5156| 11| } 5157| | //getTargetStreamer().emitDirectiveSetFp(FpAbiVal); 5158| 0| Parser.Lex(); // Consume the EndOfStatement. 5159| 0| return false; 5160| 11|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser15parseFpABIValueERN7llvm_ks19MipsABIFlagsSection9FpABIKindENS1_9StringRefE: 5982| 229|{ 5983| 229| MCAsmParser &Parser = getParser(); 5984| 229| MCAsmLexer &Lexer = getLexer(); 5985| 229| bool ModuleLevelOptions = Directive == ".module"; 5986| | 5987| 229| if (Lexer.is(AsmToken::Identifier)) { ------------------ | Branch (5987:7): [True: 49, False: 180] ------------------ 5988| 49| StringRef Value = Parser.getTok().getString(); 5989| 49| Parser.Lex(); 5990| | 5991| 49| if (Value != "xx") { ------------------ | Branch (5991:9): [True: 49, False: 0] ------------------ 5992| 49| reportParseError("unsupported value, expected 'xx', '32' or '64'"); 5993| 49| return false; 5994| 49| } 5995| | 5996| 0| if (!isABI_O32()) { ------------------ | Branch (5996:9): [True: 0, False: 0] ------------------ 5997| 0| reportParseError("'" + Directive + " fp=xx' requires the O32 ABI"); 5998| 0| return false; 5999| 0| } 6000| | 6001| 0| FpABI = MipsABIFlagsSection::FpABIKind::XX; 6002| 0| if (ModuleLevelOptions) { ------------------ | Branch (6002:9): [True: 0, False: 0] ------------------ 6003| 0| setModuleFeatureBits(Mips::FeatureFPXX, "fpxx"); 6004| 0| clearModuleFeatureBits(Mips::FeatureFP64Bit, "fp64"); 6005| 0| } else { 6006| 0| setFeatureBits(Mips::FeatureFPXX, "fpxx"); 6007| 0| clearFeatureBits(Mips::FeatureFP64Bit, "fp64"); 6008| 0| } 6009| 0| return true; 6010| 0| } 6011| | 6012| 180| if (Lexer.is(AsmToken::Integer)) { ------------------ | Branch (6012:7): [True: 132, False: 48] ------------------ 6013| 132| bool valid; 6014| 132| unsigned Value = Parser.getTok().getIntVal(valid); 6015| 132| if (!valid) ------------------ | Branch (6015:9): [True: 0, False: 132] ------------------ 6016| 0| return true; 6017| 132| Parser.Lex(); 6018| | 6019| 132| if (Value != 32 && Value != 64) { ------------------ | Branch (6019:9): [True: 125, False: 7] | Branch (6019:24): [True: 121, False: 4] ------------------ 6020| 121| reportParseError("unsupported value, expected 'xx', '32' or '64'"); 6021| 121| return false; 6022| 121| } 6023| | 6024| 11| if (Value == 32) { ------------------ | Branch (6024:9): [True: 7, False: 4] ------------------ 6025| 7| if (!isABI_O32()) { ------------------ | Branch (6025:11): [True: 0, False: 7] ------------------ 6026| 0| reportParseError("'" + Directive + " fp=32' requires the O32 ABI"); 6027| 0| return false; 6028| 0| } 6029| | 6030| 7| FpABI = MipsABIFlagsSection::FpABIKind::S32; 6031| 7| if (ModuleLevelOptions) { ------------------ | Branch (6031:11): [True: 0, False: 7] ------------------ 6032| 0| clearModuleFeatureBits(Mips::FeatureFPXX, "fpxx"); 6033| 0| clearModuleFeatureBits(Mips::FeatureFP64Bit, "fp64"); 6034| 7| } else { 6035| 7| clearFeatureBits(Mips::FeatureFPXX, "fpxx"); 6036| 7| clearFeatureBits(Mips::FeatureFP64Bit, "fp64"); 6037| 7| } 6038| 7| } else { 6039| 4| FpABI = MipsABIFlagsSection::FpABIKind::S64; 6040| 4| if (ModuleLevelOptions) { ------------------ | Branch (6040:11): [True: 0, False: 4] ------------------ 6041| 0| clearModuleFeatureBits(Mips::FeatureFPXX, "fpxx"); 6042| 0| setModuleFeatureBits(Mips::FeatureFP64Bit, "fp64"); 6043| 4| } else { 6044| 4| clearFeatureBits(Mips::FeatureFPXX, "fpxx"); 6045| 4| setFeatureBits(Mips::FeatureFP64Bit, "fp64"); 6046| 4| } 6047| 4| } 6048| | 6049| 11| return true; 6050| 11| } 6051| | 6052| 48| return false; 6053| 180|} MipsAsmParser.cpp:_ZNK12_GLOBAL__N_113MipsAsmParser9isABI_O32Ev: 457| 7| bool isABI_O32() const { return ABI.IsO32(); } MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser14setFeatureBitsEmN7llvm_ks9StringRefE: 368| 3.56k| void setFeatureBits(uint64_t Feature, StringRef FeatureString) { 369| 3.56k| if (!(getSTI().getFeatureBits()[Feature])) { ------------------ | Branch (369:9): [True: 3.49k, False: 67] ------------------ 370| 3.49k| MCSubtargetInfo &STI = copySTI(); 371| 3.49k| setAvailableFeatures( 372| 3.49k| ComputeAvailableFeatures(STI.ToggleFeature(FeatureString))); 373| 3.49k| AssemblerOptions.back()->setFeatures(STI.getFeatureBits()); 374| 3.49k| } 375| 3.56k| } MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser16clearFeatureBitsEmN7llvm_ks9StringRefE: 377| 7.46k| void clearFeatureBits(uint64_t Feature, StringRef FeatureString) { 378| 7.46k| if (getSTI().getFeatureBits()[Feature]) { ------------------ | Branch (378:9): [True: 3.43k, False: 4.03k] ------------------ 379| 3.43k| MCSubtargetInfo &STI = copySTI(); 380| 3.43k| setAvailableFeatures( 381| 3.43k| ComputeAvailableFeatures(STI.ToggleFeature(FeatureString))); 382| 3.43k| AssemblerOptions.back()->setFeatures(STI.getFeatureBits()); 383| 3.43k| } 384| 7.46k| } MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser20parseSetPopDirectiveEv: 5190| 33|bool MipsAsmParser::parseSetPopDirective() { 5191| 33| MCAsmParser &Parser = getParser(); 5192| 33| SMLoc Loc = getLexer().getLoc(); 5193| | 5194| 33| Parser.Lex(); 5195| 33| if (getLexer().isNot(AsmToken::EndOfStatement)) ------------------ | Branch (5195:7): [True: 33, False: 0] ------------------ 5196| 33| return reportParseError("unexpected token, expected end of statement"); 5197| | 5198| | // Always keep an element on the options "stack" to prevent the user 5199| | // from changing the initial options. This is how we remember them. 5200| 0| if (AssemblerOptions.size() == 2) ------------------ | Branch (5200:7): [True: 0, False: 0] ------------------ 5201| 0| return reportParseError(Loc, ".set pop with no .set push"); 5202| | 5203| 0| MCSubtargetInfo &STI = copySTI(); 5204| 0| AssemblerOptions.pop_back(); 5205| 0| setAvailableFeatures( 5206| 0| ComputeAvailableFeatures(AssemblerOptions.back()->getFeatures())); 5207| 0| STI.setFeatureBits(AssemblerOptions.back()->getFeatures()); 5208| | 5209| | //getTargetStreamer().emitDirectiveSetPop(); 5210| 0| return false; 5211| 0|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser21parseSetPushDirectiveEv: 5213| 45|bool MipsAsmParser::parseSetPushDirective() { 5214| 45| MCAsmParser &Parser = getParser(); 5215| 45| Parser.Lex(); 5216| 45| if (getLexer().isNot(AsmToken::EndOfStatement)) ------------------ | Branch (5216:7): [True: 45, False: 0] ------------------ 5217| 45| return reportParseError("unexpected token, expected end of statement"); 5218| | 5219| | // Create a copy of the current assembler options environment and push it. 5220| 0| AssemblerOptions.push_back( 5221| 0| make_unique(AssemblerOptions.back().get())); 5222| | 5223| | //getTargetStreamer().emitDirectiveSetPush(); 5224| 0| return false; 5225| 45|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser24parseSetReorderDirectiveEv: 5002| 32|bool MipsAsmParser::parseSetReorderDirective() { 5003| 32| MCAsmParser &Parser = getParser(); 5004| 32| Parser.Lex(); 5005| | // If this is not the end of the statement, report an error. 5006| 32| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (5006:7): [True: 0, False: 32] ------------------ 5007| 0| reportParseError("unexpected token, expected end of statement"); 5008| 0| return false; 5009| 0| } 5010| 32| AssemblerOptions.back()->setReorder(); 5011| | //getTargetStreamer().emitDirectiveSetReorder(); 5012| 32| Parser.Lex(); // Consume the EndOfStatement. 5013| 32| return false; 5014| 32|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_120MipsAssemblerOptions10setReorderEv: 69| 32| void setReorder() { Reorder = true; } MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser22parseSetMacroDirectiveEv: 5030| 8|bool MipsAsmParser::parseSetMacroDirective() { 5031| 8| MCAsmParser &Parser = getParser(); 5032| 8| Parser.Lex(); 5033| | // If this is not the end of the statement, report an error. 5034| 8| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (5034:7): [True: 0, False: 8] ------------------ 5035| 0| reportParseError("unexpected token, expected end of statement"); 5036| 0| return false; 5037| 0| } 5038| 8| AssemblerOptions.back()->setMacro(); 5039| | //getTargetStreamer().emitDirectiveSetMacro(); 5040| 8| Parser.Lex(); // Consume the EndOfStatement. 5041| 8| return false; 5042| 8|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_120MipsAssemblerOptions8setMacroEv: 73| 8| void setMacro() { Macro = true; } MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser23parseSetMips16DirectiveEv: 5103| 30|bool MipsAsmParser::parseSetMips16Directive() { 5104| 30| MCAsmParser &Parser = getParser(); 5105| 30| Parser.Lex(); // Eat "mips16". 5106| | 5107| | // If this is not the end of the statement, report an error. 5108| 30| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (5108:7): [True: 30, False: 0] ------------------ 5109| 30| reportParseError("unexpected token, expected end of statement"); 5110| 30| return false; 5111| 30| } 5112| | 5113| 0| setFeatureBits(Mips::FeatureMips16, "mips16"); 5114| | //getTargetStreamer().emitDirectiveSetMips16(); 5115| 0| Parser.Lex(); // Consume the EndOfStatement. 5116| 0| return false; 5117| 30|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser15parseSetFeatureEm: 5330| 3.43k|bool MipsAsmParser::parseSetFeature(uint64_t Feature) { 5331| 3.43k| MCAsmParser &Parser = getParser(); 5332| 3.43k| Parser.Lex(); 5333| 3.43k| if (getLexer().isNot(AsmToken::EndOfStatement)) ------------------ | Branch (5333:7): [True: 3.38k, False: 44] ------------------ 5334| 3.38k| return reportParseError("unexpected token, expected end of statement"); 5335| | 5336| 44| switch (Feature) { 5337| 0| default: ------------------ | Branch (5337:3): [True: 0, False: 44] ------------------ 5338| 0| llvm_unreachable("Unimplemented feature"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ 5339| 2| case Mips::FeatureDSP: ------------------ | Branch (5339:3): [True: 2, False: 42] ------------------ 5340| 2| setFeatureBits(Mips::FeatureDSP, "dsp"); 5341| | //getTargetStreamer().emitDirectiveSetDsp(); 5342| 2| break; 5343| 0| case Mips::FeatureMicroMips: ------------------ | Branch (5343:3): [True: 0, False: 44] ------------------ 5344| | //getTargetStreamer().emitDirectiveSetMicroMips(); 5345| 0| break; 5346| 9| case Mips::FeatureMips1: ------------------ | Branch (5346:3): [True: 9, False: 35] ------------------ 5347| 9| selectArch("mips1"); 5348| | //getTargetStreamer().emitDirectiveSetMips1(); 5349| 9| break; 5350| 0| case Mips::FeatureMips2: ------------------ | Branch (5350:3): [True: 0, False: 44] ------------------ 5351| 0| selectArch("mips2"); 5352| | //getTargetStreamer().emitDirectiveSetMips2(); 5353| 0| break; 5354| 1| case Mips::FeatureMips3: ------------------ | Branch (5354:3): [True: 1, False: 43] ------------------ 5355| 1| selectArch("mips3"); 5356| | //getTargetStreamer().emitDirectiveSetMips3(); 5357| 1| break; 5358| 32| case Mips::FeatureMips4: ------------------ | Branch (5358:3): [True: 32, False: 12] ------------------ 5359| 32| selectArch("mips4"); 5360| | //getTargetStreamer().emitDirectiveSetMips4(); 5361| 32| break; 5362| 0| case Mips::FeatureMips5: ------------------ | Branch (5362:3): [True: 0, False: 44] ------------------ 5363| 0| selectArch("mips5"); 5364| | //getTargetStreamer().emitDirectiveSetMips5(); 5365| 0| break; 5366| 0| case Mips::FeatureMips32: ------------------ | Branch (5366:3): [True: 0, False: 44] ------------------ 5367| 0| selectArch("mips32"); 5368| | //getTargetStreamer().emitDirectiveSetMips32(); 5369| 0| break; 5370| 0| case Mips::FeatureMips32r2: ------------------ | Branch (5370:3): [True: 0, False: 44] ------------------ 5371| 0| selectArch("mips32r2"); 5372| | //getTargetStreamer().emitDirectiveSetMips32R2(); 5373| 0| break; 5374| 0| case Mips::FeatureMips32r3: ------------------ | Branch (5374:3): [True: 0, False: 44] ------------------ 5375| 0| selectArch("mips32r3"); 5376| | //getTargetStreamer().emitDirectiveSetMips32R3(); 5377| 0| break; 5378| 0| case Mips::FeatureMips32r5: ------------------ | Branch (5378:3): [True: 0, False: 44] ------------------ 5379| 0| selectArch("mips32r5"); 5380| | //getTargetStreamer().emitDirectiveSetMips32R5(); 5381| 0| break; 5382| 0| case Mips::FeatureMips32r6: ------------------ | Branch (5382:3): [True: 0, False: 44] ------------------ 5383| 0| selectArch("mips32r6"); 5384| | //getTargetStreamer().emitDirectiveSetMips32R6(); 5385| 0| break; 5386| 0| case Mips::FeatureMips64: ------------------ | Branch (5386:3): [True: 0, False: 44] ------------------ 5387| 0| selectArch("mips64"); 5388| | //getTargetStreamer().emitDirectiveSetMips64(); 5389| 0| break; 5390| 0| case Mips::FeatureMips64r2: ------------------ | Branch (5390:3): [True: 0, False: 44] ------------------ 5391| 0| selectArch("mips64r2"); 5392| | //getTargetStreamer().emitDirectiveSetMips64R2(); 5393| 0| break; 5394| 0| case Mips::FeatureMips64r3: ------------------ | Branch (5394:3): [True: 0, False: 44] ------------------ 5395| 0| selectArch("mips64r3"); 5396| | //getTargetStreamer().emitDirectiveSetMips64R3(); 5397| 0| break; 5398| 0| case Mips::FeatureMips64r5: ------------------ | Branch (5398:3): [True: 0, False: 44] ------------------ 5399| 0| selectArch("mips64r5"); 5400| | //getTargetStreamer().emitDirectiveSetMips64R5(); 5401| 0| break; 5402| 0| case Mips::FeatureMips64r6: ------------------ | Branch (5402:3): [True: 0, False: 44] ------------------ 5403| 0| selectArch("mips64r6"); 5404| | //getTargetStreamer().emitDirectiveSetMips64R6(); 5405| 0| break; 5406| 44| } 5407| 44| return false; 5408| 44|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser22parseSetMips0DirectiveEv: 5273| 4|bool MipsAsmParser::parseSetMips0Directive() { 5274| 4| MCAsmParser &Parser = getParser(); 5275| 4| Parser.Lex(); 5276| 4| if (getLexer().isNot(AsmToken::EndOfStatement)) ------------------ | Branch (5276:7): [True: 4, False: 0] ------------------ 5277| 4| return reportParseError("unexpected token, expected end of statement"); 5278| | 5279| | // Reset assembler options to their initial values. 5280| 0| MCSubtargetInfo &STI = copySTI(); 5281| 0| setAvailableFeatures( 5282| 0| ComputeAvailableFeatures(AssemblerOptions.front()->getFeatures())); 5283| 0| STI.setFeatureBits(AssemblerOptions.front()->getFeatures()); 5284| 0| AssemblerOptions.back()->setFeatures(AssemblerOptions.front()->getFeatures()); 5285| | 5286| | //getTargetStreamer().emitDirectiveSetMips0(); 5287| 0| return false; 5288| 4|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser22parseSetNoDspDirectiveEv: 5088| 2|bool MipsAsmParser::parseSetNoDspDirective() { 5089| 2| MCAsmParser &Parser = getParser(); 5090| 2| Parser.Lex(); // Eat "nodsp". 5091| | 5092| | // If this is not the end of the statement, report an error. 5093| 2| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (5093:7): [True: 0, False: 2] ------------------ 5094| 0| reportParseError("unexpected token, expected end of statement"); 5095| 0| return false; 5096| 0| } 5097| | 5098| 2| clearFeatureBits(Mips::FeatureDSP, "dsp"); 5099| | //getTargetStreamer().emitDirectiveSetNoDsp(); 5100| 2| return false; 5101| 2|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser20parseSetMsaDirectiveEv: 5062| 3.59k|bool MipsAsmParser::parseSetMsaDirective() { 5063| 3.59k| MCAsmParser &Parser = getParser(); 5064| 3.59k| Parser.Lex(); 5065| | 5066| | // If this is not the end of the statement, report an error. 5067| 3.59k| if (getLexer().isNot(AsmToken::EndOfStatement)) ------------------ | Branch (5067:7): [True: 32, False: 3.55k] ------------------ 5068| 32| return reportParseError("unexpected token, expected end of statement"); 5069| | 5070| 3.55k| setFeatureBits(Mips::FeatureMSA, "msa"); 5071| | //getTargetStreamer().emitDirectiveSetMsa(); 5072| 3.55k| return false; 5073| 3.59k|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser22parseSetNoMsaDirectiveEv: 5075| 7.48k|bool MipsAsmParser::parseSetNoMsaDirective() { 5076| 7.48k| MCAsmParser &Parser = getParser(); 5077| 7.48k| Parser.Lex(); 5078| | 5079| | // If this is not the end of the statement, report an error. 5080| 7.48k| if (getLexer().isNot(AsmToken::EndOfStatement)) ------------------ | Branch (5080:7): [True: 37, False: 7.44k] ------------------ 5081| 37| return reportParseError("unexpected token, expected end of statement"); 5082| | 5083| 7.44k| clearFeatureBits(Mips::FeatureMSA, "msa"); 5084| | //getTargetStreamer().emitDirectiveSetNoMsa(); 5085| 7.44k| return false; 5086| 7.48k|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser18parseSetAssignmentEv: 5249| 7.90k|bool MipsAsmParser::parseSetAssignment() { 5250| 7.90k| StringRef Name; 5251| 7.90k| const MCExpr *Value; 5252| 7.90k| MCAsmParser &Parser = getParser(); 5253| | 5254| 7.90k| if (Parser.parseIdentifier(Name)) ------------------ | Branch (5254:7): [True: 140, False: 7.76k] ------------------ 5255| 140| reportParseError("expected identifier after .set"); 5256| | 5257| 7.90k| if (getLexer().isNot(AsmToken::Comma)) ------------------ | Branch (5257:7): [True: 7.86k, False: 37] ------------------ 5258| 7.86k| return reportParseError("unexpected token, expected comma"); 5259| 37| Lex(); // Eat comma 5260| | 5261| 37| if (Parser.parseExpression(Value)) ------------------ | Branch (5261:7): [True: 4, False: 33] ------------------ 5262| 4| return reportParseError("expected valid expression after comma"); 5263| | 5264| 33| MCSymbol *Sym = getContext().getOrCreateSymbol(Name); 5265| 33| bool valid; 5266| 33| Sym->setVariableValue(Value, valid); 5267| 33| if (!valid) ------------------ | Branch (5267:7): [True: 0, False: 33] ------------------ 5268| 0| return true; 5269| | 5270| 33| return false; 5271| 33|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser17parseDirectiveNaNEv: 5592| 524|bool MipsAsmParser::parseDirectiveNaN() { 5593| 524| MCAsmParser &Parser = getParser(); 5594| 524| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (5594:7): [True: 360, False: 164] ------------------ 5595| 360| const AsmToken &Tok = Parser.getTok(); 5596| | 5597| 360| if (Tok.getString() == "2008") { ------------------ | Branch (5597:9): [True: 0, False: 360] ------------------ 5598| 0| Parser.Lex(); 5599| | //getTargetStreamer().emitDirectiveNaN2008(); 5600| 0| return false; 5601| 360| } else if (Tok.getString() == "legacy") { ------------------ | Branch (5601:16): [True: 0, False: 360] ------------------ 5602| 0| Parser.Lex(); 5603| | //getTargetStreamer().emitDirectiveNaNLegacy(); 5604| 0| return false; 5605| 0| } 5606| 360| } 5607| | // If we don't recognize the option passed to the .nan 5608| | // directive (e.g. no option or unknown option), emit an error. 5609| 524| reportParseError("invalid option in .nan directive"); 5610| 524| return false; 5611| 524|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser20parseDirectiveGpWordEv: 5732| 50|bool MipsAsmParser::parseDirectiveGpWord() { 5733| 50| MCAsmParser &Parser = getParser(); 5734| 50| const MCExpr *Value; 5735| | // EmitGPRel32Value requires an expression, so we are using base class 5736| | // method to evaluate the expression. 5737| 50| if (getParser().parseExpression(Value)) ------------------ | Branch (5737:7): [True: 0, False: 50] ------------------ 5738| 0| return true; 5739| 50| getParser().getStreamer().EmitGPRel32Value(Value); 5740| | 5741| 50| if (getLexer().isNot(AsmToken::EndOfStatement)) ------------------ | Branch (5741:7): [True: 50, False: 0] ------------------ 5742| 50| return Error(getLexer().getLoc(), 5743| 50| "unexpected token, expected end of statement"); 5744| 0| Parser.Lex(); // Eat EndOfStatement token. 5745| 0| return false; 5746| 50|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser21parseDirectiveGpDWordEv: 5750| 30|bool MipsAsmParser::parseDirectiveGpDWord() { 5751| 30| MCAsmParser &Parser = getParser(); 5752| 30| const MCExpr *Value; 5753| | // EmitGPRel64Value requires an expression, so we are using base class 5754| | // method to evaluate the expression. 5755| 30| if (getParser().parseExpression(Value)) ------------------ | Branch (5755:7): [True: 0, False: 30] ------------------ 5756| 0| return true; 5757| 30| getParser().getStreamer().EmitGPRel64Value(Value); 5758| | 5759| 30| if (getLexer().isNot(AsmToken::EndOfStatement)) ------------------ | Branch (5759:7): [True: 0, False: 30] ------------------ 5760| 0| return Error(getLexer().getLoc(), 5761| 0| "unexpected token, expected end of statement"); 5762| 30| Parser.Lex(); // Eat EndOfStatement token. 5763| 30| return false; 5764| 30|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser20parseDirectiveOptionEv: 5766| 162|bool MipsAsmParser::parseDirectiveOption() { 5767| 162| MCAsmParser &Parser = getParser(); 5768| | // Get the option token. 5769| 162| AsmToken Tok = Parser.getTok(); 5770| | // At the moment only identifiers are supported. 5771| 162| if (Tok.isNot(AsmToken::Identifier)) { ------------------ | Branch (5771:7): [True: 34, False: 128] ------------------ 5772| 34| Error(Parser.getTok().getLoc(), "unexpected token, expected identifier"); 5773| 34| Parser.eatToEndOfStatement(); 5774| 34| return false; 5775| 34| } 5776| | 5777| 128| StringRef Option = Tok.getIdentifier(); 5778| | 5779| 128| if (Option == "pic0") { ------------------ | Branch (5779:7): [True: 35, False: 93] ------------------ 5780| | // MipsAsmParser needs to know if the current PIC mode changes. 5781| 35| IsPicEnabled = false; 5782| | 5783| | //getTargetStreamer().emitDirectiveOptionPic0(); 5784| 35| Parser.Lex(); 5785| 35| if (Parser.getTok().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (5785:9): [True: 3, False: 32] ------------------ 5786| 3| Error(Parser.getTok().getLoc(), 5787| 3| "unexpected token, expected end of statement"); 5788| 3| Parser.eatToEndOfStatement(); 5789| 3| } 5790| 35| return false; 5791| 35| } 5792| | 5793| 93| if (Option == "pic2") { ------------------ | Branch (5793:7): [True: 0, False: 93] ------------------ 5794| | // MipsAsmParser needs to know if the current PIC mode changes. 5795| 0| IsPicEnabled = true; 5796| | 5797| | //getTargetStreamer().emitDirectiveOptionPic2(); 5798| 0| Parser.Lex(); 5799| 0| if (Parser.getTok().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (5799:9): [True: 0, False: 0] ------------------ 5800| 0| Error(Parser.getTok().getLoc(), 5801| 0| "unexpected token, expected end of statement"); 5802| 0| Parser.eatToEndOfStatement(); 5803| 0| } 5804| 0| return false; 5805| 0| } 5806| | 5807| | // Unknown option. 5808| | // Warning(Parser.getTok().getLoc(), 5809| | // "unknown option, expected 'pic0' or 'pic2'"); 5810| 93| Parser.eatToEndOfStatement(); 5811| 93| return false; 5812| 93|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser21parseDirectiveCPSetupEv: 5511| 80|bool MipsAsmParser::parseDirectiveCPSetup() { 5512| 80| MCAsmParser &Parser = getParser(); 5513| | //unsigned FuncReg; 5514| 80| unsigned Save; 5515| 80| bool SaveIsReg = true; 5516| | 5517| 80| SmallVector, 1> TmpReg; 5518| 80| OperandMatchResultTy ResTy = parseAnyRegister(TmpReg); 5519| 80| if (ResTy == MatchOperand_NoMatch) { ------------------ | Branch (5519:7): [True: 38, False: 42] ------------------ 5520| 38| reportParseError("expected register containing function address"); 5521| 38| Parser.eatToEndOfStatement(); 5522| 38| return false; 5523| 38| } 5524| | 5525| 42| MipsOperand &FuncRegOpnd = static_cast(*TmpReg[0]); 5526| 42| if (!FuncRegOpnd.isGPRAsmReg()) { ------------------ | Branch (5526:7): [True: 14, False: 28] ------------------ 5527| 14| reportParseError(FuncRegOpnd.getStartLoc(), "invalid register"); 5528| 14| Parser.eatToEndOfStatement(); 5529| 14| return false; 5530| 14| } 5531| | 5532| | //FuncReg = FuncRegOpnd.getGPR32Reg(); 5533| 28| TmpReg.clear(); 5534| | 5535| 28| if (!eatComma("unexpected token, expected comma")) ------------------ | Branch (5535:7): [True: 0, False: 28] ------------------ 5536| 0| return true; 5537| | 5538| 28| ResTy = parseAnyRegister(TmpReg); 5539| 28| if (ResTy == MatchOperand_NoMatch) { ------------------ | Branch (5539:7): [True: 14, False: 14] ------------------ 5540| 14| const MCExpr *OffsetExpr; 5541| 14| int64_t OffsetVal; 5542| 14| SMLoc ExprLoc = getLexer().getLoc(); 5543| | 5544| 14| if (Parser.parseExpression(OffsetExpr) || ------------------ | Branch (5544:9): [True: 14, False: 0] ------------------ 5545| 14| !OffsetExpr->evaluateAsAbsolute(OffsetVal)) { ------------------ | Branch (5545:9): [True: 0, False: 0] ------------------ 5546| 14| reportParseError(ExprLoc, "expected save register or stack offset"); 5547| 14| Parser.eatToEndOfStatement(); 5548| 14| return false; 5549| 14| } 5550| | 5551| 0| Save = OffsetVal; 5552| 0| SaveIsReg = false; 5553| 14| } else { 5554| 14| MipsOperand &SaveOpnd = static_cast(*TmpReg[0]); 5555| 14| if (!SaveOpnd.isGPRAsmReg()) { ------------------ | Branch (5555:9): [True: 0, False: 14] ------------------ 5556| 0| reportParseError(SaveOpnd.getStartLoc(), "invalid register"); 5557| 0| Parser.eatToEndOfStatement(); 5558| 0| return false; 5559| 0| } 5560| 14| Save = SaveOpnd.getGPR32Reg(); 5561| 14| } 5562| | 5563| 14| if (!eatComma("unexpected token, expected comma")) ------------------ | Branch (5563:7): [True: 0, False: 14] ------------------ 5564| 0| return true; 5565| | 5566| 14| const MCExpr *Expr; 5567| 14| if (Parser.parseExpression(Expr)) { ------------------ | Branch (5567:7): [True: 0, False: 14] ------------------ 5568| 0| reportParseError("expected expression"); 5569| 0| return false; 5570| 0| } 5571| | 5572| 14| if (Expr->getKind() != MCExpr::SymbolRef) { ------------------ | Branch (5572:7): [True: 0, False: 14] ------------------ 5573| 0| reportParseError("expected symbol"); 5574| 0| return false; 5575| 0| } 5576| | //const MCSymbolRefExpr *Ref = static_cast(Expr); 5577| | 5578| 14| CpSaveLocation = Save; 5579| 14| CpSaveLocationIsRegister = SaveIsReg; 5580| | 5581| | //getTargetStreamer().emitDirectiveCpsetup(FuncReg, Save, Ref->getSymbol(), 5582| | // SaveIsReg); 5583| 14| return false; 5584| 14|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser8eatCommaEN7llvm_ks9StringRefE: 5410| 42|bool MipsAsmParser::eatComma(StringRef ErrorStr) { 5411| 42| MCAsmParser &Parser = getParser(); 5412| 42| if (getLexer().isNot(AsmToken::Comma)) { ------------------ | Branch (5412:7): [True: 42, False: 0] ------------------ 5413| 42| SMLoc Loc = getLexer().getLoc(); 5414| 42| Parser.eatToEndOfStatement(); 5415| 42| return Error(Loc, ErrorStr); 5416| 42| } 5417| | 5418| 0| Parser.Lex(); // Eat the comma. 5419| 0| return true; 5420| 42|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser20parseDirectiveModuleEv: 5837| 16|bool MipsAsmParser::parseDirectiveModule() { 5838| 16| MCAsmParser &Parser = getParser(); 5839| 16| MCAsmLexer &Lexer = getLexer(); 5840| 16| SMLoc L = Lexer.getLoc(); 5841| | 5842| |#if 0 5843| | if (!getTargetStreamer().isModuleDirectiveAllowed()) { 5844| | // TODO : get a better message. 5845| | reportParseError(".module directive must appear before any code"); 5846| | return false; 5847| | } 5848| |#endif 5849| | 5850| 16| StringRef Option; 5851| 16| if (Parser.parseIdentifier(Option)) { ------------------ | Branch (5851:7): [True: 8, False: 8] ------------------ 5852| 8| reportParseError("expected .module option identifier"); 5853| 8| return false; 5854| 8| } 5855| | 5856| 8| if (Option == "oddspreg") { ------------------ | Branch (5856:7): [True: 0, False: 8] ------------------ 5857| 0| clearModuleFeatureBits(Mips::FeatureNoOddSPReg, "nooddspreg"); 5858| | 5859| | // Synchronize the abiflags information with the FeatureBits information we 5860| | // changed above. 5861| | //getTargetStreamer().updateABIInfo(*this); 5862| | 5863| | // If printing assembly, use the recently updated abiflags information. 5864| | // If generating ELF, don't do anything (the .MIPS.abiflags section gets 5865| | // emitted at the end). 5866| | //getTargetStreamer().emitDirectiveModuleOddSPReg(); 5867| | 5868| | // If this is not the end of the statement, report an error. 5869| 0| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (5869:9): [True: 0, False: 0] ------------------ 5870| 0| reportParseError("unexpected token, expected end of statement"); 5871| 0| return false; 5872| 0| } 5873| | 5874| 0| return false; // parseDirectiveModule has finished successfully. 5875| 8| } else if (Option == "nooddspreg") { ------------------ | Branch (5875:14): [True: 0, False: 8] ------------------ 5876| 0| if (!isABI_O32()) { ------------------ | Branch (5876:9): [True: 0, False: 0] ------------------ 5877| 0| Error(L, "'.module nooddspreg' requires the O32 ABI"); 5878| 0| return false; 5879| 0| } 5880| | 5881| 0| setModuleFeatureBits(Mips::FeatureNoOddSPReg, "nooddspreg"); 5882| | 5883| | // Synchronize the abiflags information with the FeatureBits information we 5884| | // changed above. 5885| | //getTargetStreamer().updateABIInfo(*this); 5886| | 5887| | // If printing assembly, use the recently updated abiflags information. 5888| | // If generating ELF, don't do anything (the .MIPS.abiflags section gets 5889| | // emitted at the end). 5890| | //getTargetStreamer().emitDirectiveModuleOddSPReg(); 5891| | 5892| | // If this is not the end of the statement, report an error. 5893| 0| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (5893:9): [True: 0, False: 0] ------------------ 5894| 0| reportParseError("unexpected token, expected end of statement"); 5895| 0| return false; 5896| 0| } 5897| | 5898| 0| return false; // parseDirectiveModule has finished successfully. 5899| 8| } else if (Option == "fp") { ------------------ | Branch (5899:14): [True: 0, False: 8] ------------------ 5900| 0| return parseDirectiveModuleFP(); 5901| 8| } else if (Option == "softfloat") { ------------------ | Branch (5901:14): [True: 0, False: 8] ------------------ 5902| 0| setModuleFeatureBits(Mips::FeatureSoftFloat, "soft-float"); 5903| | 5904| | // Synchronize the ABI Flags information with the FeatureBits information we 5905| | // updated above. 5906| | //getTargetStreamer().updateABIInfo(*this); 5907| | 5908| | // If printing assembly, use the recently updated ABI Flags information. 5909| | // If generating ELF, don't do anything (the .MIPS.abiflags section gets 5910| | // emitted later). 5911| | //getTargetStreamer().emitDirectiveModuleSoftFloat(); 5912| | 5913| | // If this is not the end of the statement, report an error. 5914| 0| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (5914:9): [True: 0, False: 0] ------------------ 5915| 0| reportParseError("unexpected token, expected end of statement"); 5916| 0| return false; 5917| 0| } 5918| | 5919| 0| return false; // parseDirectiveModule has finished successfully. 5920| 8| } else if (Option == "hardfloat") { ------------------ | Branch (5920:14): [True: 0, False: 8] ------------------ 5921| 0| clearModuleFeatureBits(Mips::FeatureSoftFloat, "soft-float"); 5922| | 5923| | // Synchronize the ABI Flags information with the FeatureBits information we 5924| | // updated above. 5925| | //getTargetStreamer().updateABIInfo(*this); 5926| | 5927| | // If printing assembly, use the recently updated ABI Flags information. 5928| | // If generating ELF, don't do anything (the .MIPS.abiflags section gets 5929| | // emitted later). 5930| | //getTargetStreamer().emitDirectiveModuleHardFloat(); 5931| | 5932| | // If this is not the end of the statement, report an error. 5933| 0| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (5933:9): [True: 0, False: 0] ------------------ 5934| 0| reportParseError("unexpected token, expected end of statement"); 5935| 0| return false; 5936| 0| } 5937| | 5938| 0| return false; // parseDirectiveModule has finished successfully. 5939| 8| } else { 5940| 8| return Error(L, "'" + Twine(Option) + "' is not a valid .module option."); 5941| 8| } 5942| 8|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser18parseInsnDirectiveEv: 5816| 92|bool MipsAsmParser::parseInsnDirective() { 5817| | // If this is not the end of the statement, report an error. 5818| 92| if (getLexer().isNot(AsmToken::EndOfStatement)) { ------------------ | Branch (5818:7): [True: 10, False: 82] ------------------ 5819| 10| reportParseError("unexpected token, expected end of statement"); 5820| 10| return false; 5821| 10| } 5822| | 5823| | // The actual label marking happens in 5824| | // MipsELFStreamer::createPendingLabelRelocs(). 5825| | //getTargetStreamer().emitDirectiveInsn(); 5826| | 5827| 82| getParser().Lex(); // Eat EndOfStatement token. 5828| 82| return false; 5829| 92|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser23MatchAndEmitInstructionEN7llvm_ks5SMLocERjRNS1_15SmallVectorImplINSt3__110unique_ptrINS1_18MCParsedAsmOperandENS5_14default_deleteIS7_EEEEEERNS1_10MCStreamerERmbS3_SF_: 3740| 4.27k|{ 3741| 4.27k| MCInst Inst(Address); 3742| 4.27k| SmallVector Instructions; 3743| 4.27k| unsigned MatchResult = 3744| 4.27k| MatchInstructionImpl(Operands, Inst, ErrorInfo, MatchingInlineAsm); 3745| | 3746| 4.27k| switch (MatchResult) { ------------------ | Branch (3746:11): [True: 4.27k, False: 0] ------------------ 3747| 4.26k| case Match_Success: { ------------------ | Branch (3747:3): [True: 4.26k, False: 14] ------------------ 3748| 4.26k| if (processInstruction(Inst, IDLoc, Instructions, ErrorCode)) ------------------ | Branch (3748:9): [True: 1, False: 4.26k] ------------------ 3749| 1| return true; 3750| 12.5k| for (unsigned i = 0; i < Instructions.size(); i++) ------------------ | Branch (3750:26): [True: 8.24k, False: 4.26k] ------------------ 3751| 8.24k| Out.EmitInstruction(Instructions[i], getSTI(), ErrorCode); 3752| 4.26k| if (ErrorCode == 0) { ------------------ | Branch (3752:9): [True: 4.26k, False: 0] ------------------ 3753| 4.26k| Address = Inst.getAddress(); // Keystone update address 3754| 4.26k| return false; 3755| 4.26k| } else 3756| 0| return true; 3757| | 3758| 4.26k| } 3759| 0| case Match_MissingFeature: ------------------ | Branch (3759:3): [True: 0, False: 4.27k] ------------------ 3760| 0| Error(IDLoc, "instruction requires a CPU feature not currently enabled"); 3761| 0| return true; 3762| 14| case Match_InvalidOperand: { ------------------ | Branch (3762:3): [True: 14, False: 4.26k] ------------------ 3763| 14| SMLoc ErrorLoc = IDLoc; 3764| 14| if (ErrorInfo != ~0ULL) { ------------------ | Branch (3764:9): [True: 14, False: 0] ------------------ 3765| 14| if (ErrorInfo >= Operands.size()) ------------------ | Branch (3765:11): [True: 4, False: 10] ------------------ 3766| 4| return Error(IDLoc, "too few operands for instruction"); 3767| | 3768| 10| ErrorLoc = Operands[ErrorInfo]->getStartLoc(); 3769| 10| if (ErrorLoc == SMLoc()) ------------------ | Branch (3769:11): [True: 0, False: 10] ------------------ 3770| 0| ErrorLoc = IDLoc; 3771| 10| } 3772| | 3773| 10| return Error(ErrorLoc, "invalid operand for instruction"); 3774| 14| } 3775| 0| case Match_MnemonicFail: ------------------ | Branch (3775:3): [True: 0, False: 4.27k] ------------------ 3776| 0| return Error(IDLoc, "invalid instruction"); 3777| 0| case Match_RequiresDifferentSrcAndDst: ------------------ | Branch (3777:3): [True: 0, False: 4.27k] ------------------ 3778| 0| return Error(IDLoc, "source and destination must be different"); 3779| 0| case Match_Immz: ------------------ | Branch (3779:3): [True: 0, False: 4.27k] ------------------ 3780| 0| return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo), "expected '0'"); 3781| 0| case Match_UImm1_0: ------------------ | Branch (3781:3): [True: 0, False: 4.27k] ------------------ 3782| 0| return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo), 3783| 0| "expected 1-bit unsigned immediate"); 3784| 0| case Match_UImm2_0: ------------------ | Branch (3784:3): [True: 0, False: 4.27k] ------------------ 3785| 0| return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo), 3786| 0| "expected 2-bit unsigned immediate"); 3787| 0| case Match_UImm2_1: ------------------ | Branch (3787:3): [True: 0, False: 4.27k] ------------------ 3788| 0| return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo), 3789| 0| "expected immediate in range 1 .. 4"); 3790| 0| case Match_UImm3_0: ------------------ | Branch (3790:3): [True: 0, False: 4.27k] ------------------ 3791| 0| return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo), 3792| 0| "expected 3-bit unsigned immediate"); 3793| 0| case Match_UImm4_0: ------------------ | Branch (3793:3): [True: 0, False: 4.27k] ------------------ 3794| 0| return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo), 3795| 0| "expected 4-bit unsigned immediate"); 3796| 0| case Match_UImm5_0: ------------------ | Branch (3796:3): [True: 0, False: 4.27k] ------------------ 3797| 0| return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo), 3798| 0| "expected 5-bit unsigned immediate"); 3799| 0| case Match_UImm5_1: ------------------ | Branch (3799:3): [True: 0, False: 4.27k] ------------------ 3800| 0| return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo), 3801| 0| "expected immediate in range 1 .. 32"); 3802| 0| case Match_UImm5_32: ------------------ | Branch (3802:3): [True: 0, False: 4.27k] ------------------ 3803| 0| return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo), 3804| 0| "expected immediate in range 32 .. 63"); 3805| 0| case Match_UImm5_33: ------------------ | Branch (3805:3): [True: 0, False: 4.27k] ------------------ 3806| 0| return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo), 3807| 0| "expected immediate in range 33 .. 64"); 3808| 0| case Match_UImm5_0_Report_UImm6: ------------------ | Branch (3808:3): [True: 0, False: 4.27k] ------------------ 3809| | // This is used on UImm5 operands that have a corresponding UImm5_32 3810| | // operand to avoid confusing the user. 3811| 0| return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo), 3812| 0| "expected 6-bit unsigned immediate"); 3813| 0| case Match_UImm5_Lsl2: ------------------ | Branch (3813:3): [True: 0, False: 4.27k] ------------------ 3814| 0| return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo), 3815| 0| "expected both 7-bit unsigned immediate and multiple of 4"); 3816| 0| case Match_UImm6_0: ------------------ | Branch (3816:3): [True: 0, False: 4.27k] ------------------ 3817| 0| return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo), 3818| 0| "expected 6-bit unsigned immediate"); 3819| 0| case Match_SImm6: ------------------ | Branch (3819:3): [True: 0, False: 4.27k] ------------------ 3820| 0| return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo), 3821| 0| "expected 6-bit signed immediate"); 3822| 0| case Match_UImm7_0: ------------------ | Branch (3822:3): [True: 0, False: 4.27k] ------------------ 3823| 0| return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo), 3824| 0| "expected 7-bit unsigned immediate"); 3825| 0| case Match_UImm8_0: ------------------ | Branch (3825:3): [True: 0, False: 4.27k] ------------------ 3826| 0| return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo), 3827| 0| "expected 8-bit unsigned immediate"); 3828| 0| case Match_UImm10_0: ------------------ | Branch (3828:3): [True: 0, False: 4.27k] ------------------ 3829| 0| return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo), 3830| 0| "expected 10-bit unsigned immediate"); 3831| 0| case Match_UImm16: ------------------ | Branch (3831:3): [True: 0, False: 4.27k] ------------------ 3832| 0| case Match_UImm16_Relaxed: ------------------ | Branch (3832:3): [True: 0, False: 4.27k] ------------------ 3833| 0| return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo), 3834| 0| "expected 16-bit unsigned immediate"); 3835| 4.27k| } 3836| | 3837| 0| llvm_unreachable("Implement any new match types added!"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ 3838| 4.27k|} MipsAsmParser.cpp:_ZNK12_GLOBAL__N_111MipsOperand12isCOP2AsmRegEv: 1326| 64| bool isCOP2AsmReg() const { 1327| 64| return isRegIdx() && RegIdx.Kind & RegKind_COP2 && RegIdx.Index <= 31; ------------------ | Branch (1327:12): [True: 64, False: 0] | Branch (1327:26): [True: 64, False: 0] | Branch (1327:56): [True: 64, False: 0] ------------------ 1328| 64| } MipsAsmParser.cpp:_ZNK12_GLOBAL__N_111MipsOperand10getMemBaseEv: 1141| 336| MipsOperand *getMemBase() const { 1142| 336| assert((Kind == k_Memory) && "Invalid access!"); ------------------ | Branch (1142:5): [True: 336, False: 0] | Branch (1142:5): [True: 336, Folded] | Branch (1142:5): [True: 336, False: 0] ------------------ 1143| 336| return Mem.Base; 1144| 336| } MipsAsmParser.cpp:_ZNK12_GLOBAL__N_111MipsOperand32isMemWithUimmWordAlignedOffsetSPILj7EEEbv: 1052| 180| template bool isMemWithUimmWordAlignedOffsetSP() const { 1053| 180| return isMem() && isConstantMemOff() && isUInt(getConstantMemOff()) ------------------ | Branch (1053:12): [True: 180, False: 0] | Branch (1053:23): [True: 148, False: 32] | Branch (1053:45): [True: 118, False: 30] ------------------ 1054| 118| && (getConstantMemOff() % 4 == 0) && getMemBase()->isRegIdx() ------------------ | Branch (1054:10): [True: 96, False: 22] | Branch (1054:44): [True: 96, False: 0] ------------------ 1055| 96| && (getMemBase()->getGPR32Reg() == Mips::SP); ------------------ | Branch (1055:10): [True: 0, False: 96] ------------------ 1056| 180| } MipsAsmParser.cpp:_ZNK12_GLOBAL__N_111MipsOperand16isConstantMemOffEv: 1034| 217| bool isConstantMemOff() const { 1035| 217| return isMem() && isa(getMemOff()); ------------------ | Branch (1035:12): [True: 217, False: 0] | Branch (1035:23): [True: 157, False: 60] ------------------ 1036| 217| } MipsAsmParser.cpp:_ZNK12_GLOBAL__N_111MipsOperand9getMemOffEv: 1146| 636| const MCExpr *getMemOff() const { 1147| 636| assert((Kind == k_Memory) && "Invalid access!"); ------------------ | Branch (1147:5): [True: 636, False: 0] | Branch (1147:5): [True: 636, Folded] | Branch (1147:5): [True: 636, False: 0] ------------------ 1148| 636| return Mem.Off; 1149| 636| } MipsAsmParser.cpp:_ZNK12_GLOBAL__N_111MipsOperand17getConstantMemOffEv: 1151| 275| int64_t getConstantMemOff() const { 1152| 275| return static_cast(getMemOff())->getValue(); 1153| 275| } MipsAsmParser.cpp:_ZNK12_GLOBAL__N_111MipsOperand19isMemWithSimmOffsetILj11EEEbv: 1037| 32| template bool isMemWithSimmOffset() const { 1038| 32| return isMem() && isConstantMemOff() && isInt(getConstantMemOff()) ------------------ | Branch (1038:12): [True: 32, False: 0] | Branch (1038:23): [True: 8, False: 24] | Branch (1038:45): [True: 0, False: 8] ------------------ 1039| 0| && getMemBase()->isGPRAsmReg(); ------------------ | Branch (1039:10): [True: 0, False: 0] ------------------ 1040| 32| } MipsAsmParser.cpp:_ZNK12_GLOBAL__N_111MipsOperand19isMemWithSimmOffsetILj9EEEbv: 1037| 5| template bool isMemWithSimmOffset() const { 1038| 5| return isMem() && isConstantMemOff() && isInt(getConstantMemOff()) ------------------ | Branch (1038:12): [True: 5, False: 0] | Branch (1038:23): [True: 1, False: 4] | Branch (1038:45): [True: 0, False: 1] ------------------ 1039| 0| && getMemBase()->isGPRAsmReg(); ------------------ | Branch (1039:10): [True: 0, False: 0] ------------------ 1040| 5| } MipsAsmParser.cpp:_ZNK12_GLOBAL__N_111MipsOperand6getImmEv: 1131| 4.08k| const MCExpr *getImm() const { 1132| 4.08k| assert((Kind == k_Immediate) && "Invalid access!"); ------------------ | Branch (1132:5): [True: 4.08k, False: 0] | Branch (1132:5): [True: 4.08k, Folded] | Branch (1132:5): [True: 4.08k, False: 0] ------------------ 1133| 4.08k| return Imm.Val; 1134| 4.08k| } MipsAsmParser.cpp:_ZNK12_GLOBAL__N_111MipsOperand22addGPR32AsmRegOperandsERN7llvm_ks6MCInstEj: 826| 660| void addGPR32AsmRegOperands(MCInst &Inst, unsigned N) const { 827| 660| assert(N == 1 && "Invalid number of operands!"); ------------------ | Branch (827:5): [True: 660, False: 0] | Branch (827:5): [True: 660, Folded] | Branch (827:5): [True: 660, False: 0] ------------------ 828| 660| Inst.addOperand(MCOperand::createReg(getGPR32Reg())); 829| 660| } MipsAsmParser.cpp:_ZNK12_GLOBAL__N_111MipsOperand14addImmOperandsERN7llvm_ks6MCInstEj: 952| 4.08k| void addImmOperands(MCInst &Inst, unsigned N) const { 953| 4.08k| assert(N == 1 && "Invalid number of operands!"); ------------------ | Branch (953:5): [True: 4.08k, False: 0] | Branch (953:5): [True: 4.08k, Folded] | Branch (953:5): [True: 4.08k, False: 0] ------------------ 954| 4.08k| const MCExpr *Expr = getImm(); 955| 4.08k| addExpr(Inst, Expr); 956| 4.08k| } MipsAsmParser.cpp:_ZNK12_GLOBAL__N_111MipsOperand7addExprERN7llvm_ks6MCInstEPKNS1_6MCExprE: 809| 4.23k| void addExpr(MCInst &Inst, const MCExpr *Expr) const { 810| | // Add as immediate when possible. Null MCExpr = 0. 811| 4.23k| if (!Expr) ------------------ | Branch (811:9): [True: 0, False: 4.23k] ------------------ 812| 0| Inst.addOperand(MCOperand::createImm(0)); 813| 4.23k| else if (const MCConstantExpr *CE = dyn_cast(Expr)) ------------------ | Branch (813:36): [True: 106, False: 4.12k] ------------------ 814| 106| Inst.addOperand(MCOperand::createImm(CE->getValue())); 815| 4.12k| else 816| 4.12k| Inst.addOperand(MCOperand::createExpr(Expr)); 817| 4.23k| } MipsAsmParser.cpp:_ZNK12_GLOBAL__N_111MipsOperand21addCOP2AsmRegOperandsERN7llvm_ks6MCInstEj: 898| 32| void addCOP2AsmRegOperands(MCInst &Inst, unsigned N) const { 899| 32| assert(N == 1 && "Invalid number of operands!"); ------------------ | Branch (899:5): [True: 32, False: 0] | Branch (899:5): [True: 32, Folded] | Branch (899:5): [True: 32, False: 0] ------------------ 900| 32| Inst.addOperand(MCOperand::createReg(getCOP2Reg())); 901| 32| } MipsAsmParser.cpp:_ZNK12_GLOBAL__N_111MipsOperand10getCOP2RegEv: 754| 32| unsigned getCOP2Reg() const { 755| 32| assert(isRegIdx() && (RegIdx.Kind & RegKind_COP2) && "Invalid access!"); ------------------ | Branch (755:5): [True: 32, False: 0] | Branch (755:5): [True: 32, False: 0] | Branch (755:5): [True: 32, Folded] | Branch (755:5): [True: 32, False: 0] ------------------ 756| 32| unsigned ClassID = Mips::COP2RegClassID; 757| 32| return RegIdx.RegInfo->getRegClass(ClassID).getRegister(RegIdx.Index); 758| 32| } MipsAsmParser.cpp:_ZNK12_GLOBAL__N_111MipsOperand14addMemOperandsERN7llvm_ks6MCInstEj: 958| 144| void addMemOperands(MCInst &Inst, unsigned N) const { 959| 144| assert(N == 2 && "Invalid number of operands!"); ------------------ | Branch (959:5): [True: 144, False: 0] | Branch (959:5): [True: 144, Folded] | Branch (959:5): [True: 144, False: 0] ------------------ 960| | 961| 144| Inst.addOperand(MCOperand::createReg(AsmParser.getABI().ArePtrs64bit() ------------------ | Branch (961:42): [True: 0, False: 144] ------------------ 962| 144| ? getMemBase()->getGPR64Reg() 963| 144| : getMemBase()->getGPR32Reg())); 964| | 965| 144| const MCExpr *Expr = getMemOff(); 966| 144| addExpr(Inst, Expr); 967| 144| } MipsAsmParser.cpp:_ZNK12_GLOBAL__N_113MipsAsmParser6getABIEv: 454| 144| const MipsABIInfo &getABI() const { return ABI; } MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser18processInstructionERN7llvm_ks6MCInstENS1_5SMLocERNS1_15SmallVectorImplIS2_EERj: 1535| 4.26k|{ 1536| 4.26k| const MCInstrDesc &MCID = getInstDesc(Inst.getOpcode()); 1537| 4.26k| bool ExpandedJalSym = false; 1538| | 1539| 4.26k| Inst.setLoc(IDLoc); 1540| | 1541| 4.26k| if (MCID.isBranch() || MCID.isCall()) { ------------------ | Branch (1541:7): [True: 3.84k, False: 420] | Branch (1541:26): [True: 2, False: 418] ------------------ 1542| 3.84k| const unsigned Opcode = Inst.getOpcode(); 1543| 3.84k| MCOperand Offset; 1544| | 1545| 3.84k| switch (Opcode) { 1546| 128| default: ------------------ | Branch (1546:5): [True: 128, False: 3.71k] ------------------ 1547| 128| break; 1548| 128| case Mips::BBIT0: ------------------ | Branch (1548:5): [True: 0, False: 3.84k] ------------------ 1549| 0| case Mips::BBIT032: ------------------ | Branch (1549:5): [True: 0, False: 3.84k] ------------------ 1550| 0| case Mips::BBIT1: ------------------ | Branch (1550:5): [True: 0, False: 3.84k] ------------------ 1551| 0| case Mips::BBIT132: ------------------ | Branch (1551:5): [True: 0, False: 3.84k] ------------------ 1552| 0| assert(hasCnMips() && "instruction only valid for octeon cpus"); ------------------ | Branch (1552:7): [True: 0, False: 0] | Branch (1552:7): [True: 0, Folded] | Branch (1552:7): [True: 0, False: 0] ------------------ 1553| | // Fall through 1554| | 1555| 3.71k| case Mips::BEQ: ------------------ | Branch (1555:5): [True: 3.71k, False: 128] ------------------ 1556| 3.71k| case Mips::BNE: ------------------ | Branch (1556:5): [True: 0, False: 3.84k] ------------------ 1557| 3.71k| case Mips::BEQ_MM: ------------------ | Branch (1557:5): [True: 0, False: 3.84k] ------------------ 1558| 3.71k| case Mips::BNE_MM: ------------------ | Branch (1558:5): [True: 0, False: 3.84k] ------------------ 1559| 3.71k| assert(MCID.getNumOperands() == 3 && "unexpected number of operands"); ------------------ | Branch (1559:7): [True: 3.71k, False: 0] | Branch (1559:7): [True: 3.71k, Folded] | Branch (1559:7): [True: 3.71k, False: 0] ------------------ 1560| 3.71k| Offset = Inst.getOperand(2); 1561| 3.71k| if (!Offset.isImm()) ------------------ | Branch (1561:11): [True: 3.71k, False: 1] ------------------ 1562| 3.71k| break; // We'll deal with this situation later on when applying fixups. 1563| 1| if (!isIntN(inMicroMipsMode() ? 17 : 18, Offset.getImm())) { ------------------ | Branch (1563:11): [True: 1, False: 0] | Branch (1563:19): [True: 0, False: 1] ------------------ 1564| 1| KsError = KS_ERR_ASM_INVALIDOPERAND; 1565| 1| return true; 1566| | //return Error(IDLoc, "branch target out of range"); 1567| 1| } 1568| 0| if (OffsetToAlignment(Offset.getImm(), ------------------ | Branch (1568:11): [True: 0, False: 0] ------------------ 1569| 0| 1LL << (inMicroMipsMode() ? 1 : 2))) { ------------------ | Branch (1569:37): [True: 0, False: 0] ------------------ 1570| 0| KsError = KS_ERR_ASM_INVALIDOPERAND; 1571| 0| return true; 1572| | //return Error(IDLoc, "branch to misaligned address"); 1573| 0| } 1574| 0| break; 1575| 0| case Mips::BGEZ: ------------------ | Branch (1575:5): [True: 0, False: 3.84k] ------------------ 1576| 0| case Mips::BGTZ: ------------------ | Branch (1576:5): [True: 0, False: 3.84k] ------------------ 1577| 0| case Mips::BLEZ: ------------------ | Branch (1577:5): [True: 0, False: 3.84k] ------------------ 1578| 0| case Mips::BLTZ: ------------------ | Branch (1578:5): [True: 0, False: 3.84k] ------------------ 1579| 0| case Mips::BGEZAL: ------------------ | Branch (1579:5): [True: 0, False: 3.84k] ------------------ 1580| 0| case Mips::BLTZAL: ------------------ | Branch (1580:5): [True: 0, False: 3.84k] ------------------ 1581| 0| case Mips::BC1F: ------------------ | Branch (1581:5): [True: 0, False: 3.84k] ------------------ 1582| 0| case Mips::BC1T: ------------------ | Branch (1582:5): [True: 0, False: 3.84k] ------------------ 1583| 0| case Mips::BGEZ_MM: ------------------ | Branch (1583:5): [True: 0, False: 3.84k] ------------------ 1584| 0| case Mips::BGTZ_MM: ------------------ | Branch (1584:5): [True: 0, False: 3.84k] ------------------ 1585| 0| case Mips::BLEZ_MM: ------------------ | Branch (1585:5): [True: 0, False: 3.84k] ------------------ 1586| 0| case Mips::BLTZ_MM: ------------------ | Branch (1586:5): [True: 0, False: 3.84k] ------------------ 1587| 0| case Mips::BGEZAL_MM: ------------------ | Branch (1587:5): [True: 0, False: 3.84k] ------------------ 1588| 0| case Mips::BLTZAL_MM: ------------------ | Branch (1588:5): [True: 0, False: 3.84k] ------------------ 1589| 0| case Mips::BC1F_MM: ------------------ | Branch (1589:5): [True: 0, False: 3.84k] ------------------ 1590| 0| case Mips::BC1T_MM: ------------------ | Branch (1590:5): [True: 0, False: 3.84k] ------------------ 1591| 0| assert(MCID.getNumOperands() == 2 && "unexpected number of operands"); ------------------ | Branch (1591:7): [True: 0, False: 0] | Branch (1591:7): [True: 0, Folded] | Branch (1591:7): [True: 0, False: 0] ------------------ 1592| 0| Offset = Inst.getOperand(1); 1593| 0| if (!Offset.isImm()) ------------------ | Branch (1593:11): [True: 0, False: 0] ------------------ 1594| 0| break; // We'll deal with this situation later on when applying fixups. 1595| 0| if (!isIntN(inMicroMipsMode() ? 17 : 18, Offset.getImm())) { ------------------ | Branch (1595:11): [True: 0, False: 0] | Branch (1595:19): [True: 0, False: 0] ------------------ 1596| 0| KsError = KS_ERR_ASM_INVALIDOPERAND; 1597| 0| return true; 1598| | //return Error(IDLoc, "branch target out of range"); 1599| 0| } 1600| 0| if (OffsetToAlignment(Offset.getImm(), ------------------ | Branch (1600:11): [True: 0, False: 0] ------------------ 1601| 0| 1LL << (inMicroMipsMode() ? 1 : 2))) { ------------------ | Branch (1601:37): [True: 0, False: 0] ------------------ 1602| 0| KsError = KS_ERR_ASM_INVALIDOPERAND; 1603| 0| return true; 1604| | //return Error(IDLoc, "branch to misaligned address"); 1605| 0| } 1606| 0| break; 1607| 0| case Mips::BEQZ16_MM: ------------------ | Branch (1607:5): [True: 0, False: 3.84k] ------------------ 1608| 0| case Mips::BEQZC16_MMR6: ------------------ | Branch (1608:5): [True: 0, False: 3.84k] ------------------ 1609| 0| case Mips::BNEZ16_MM: ------------------ | Branch (1609:5): [True: 0, False: 3.84k] ------------------ 1610| 0| case Mips::BNEZC16_MMR6: ------------------ | Branch (1610:5): [True: 0, False: 3.84k] ------------------ 1611| 0| assert(MCID.getNumOperands() == 2 && "unexpected number of operands"); ------------------ | Branch (1611:7): [True: 0, False: 0] | Branch (1611:7): [True: 0, Folded] | Branch (1611:7): [True: 0, False: 0] ------------------ 1612| 0| Offset = Inst.getOperand(1); 1613| 0| if (!Offset.isImm()) ------------------ | Branch (1613:11): [True: 0, False: 0] ------------------ 1614| 0| break; // We'll deal with this situation later on when applying fixups. 1615| 0| if (!isInt<8>(Offset.getImm())) { ------------------ | Branch (1615:11): [True: 0, False: 0] ------------------ 1616| 0| KsError = KS_ERR_ASM_INVALIDOPERAND; 1617| 0| return true; 1618| | //return Error(IDLoc, "branch target out of range"); 1619| 0| } 1620| 0| if (OffsetToAlignment(Offset.getImm(), 2LL)) { ------------------ | Branch (1620:11): [True: 0, False: 0] ------------------ 1621| 0| KsError = KS_ERR_ASM_INVALIDOPERAND; 1622| 0| return true; 1623| | //return Error(IDLoc, "branch to misaligned address"); 1624| 0| } 1625| 0| break; 1626| 3.84k| } 1627| 3.84k| } 1628| | 1629| | // SSNOP is deprecated on MIPS32r6/MIPS64r6 1630| | // We still accept it but it is a normal nop. 1631| 4.26k| if (hasMips32r6() && Inst.getOpcode() == Mips::SSNOP) { ------------------ | Branch (1631:7): [True: 0, False: 4.26k] | Branch (1631:24): [True: 0, False: 0] ------------------ 1632| | // std::string ISA = hasMips64r6() ? "MIPS64r6" : "MIPS32r6"; 1633| | // Warning(IDLoc, "ssnop is deprecated for " + ISA + " and is equivalent to a " 1634| | // "nop instruction"); 1635| 0| } 1636| | 1637| 4.26k| if (hasCnMips()) { ------------------ | Branch (1637:7): [True: 0, False: 4.26k] ------------------ 1638| 0| const unsigned Opcode = Inst.getOpcode(); 1639| 0| MCOperand Opnd; 1640| 0| int Imm; 1641| | 1642| 0| switch (Opcode) { 1643| 0| default: ------------------ | Branch (1643:7): [True: 0, False: 0] ------------------ 1644| 0| break; 1645| | 1646| 0| case Mips::BBIT0: ------------------ | Branch (1646:7): [True: 0, False: 0] ------------------ 1647| 0| case Mips::BBIT032: ------------------ | Branch (1647:7): [True: 0, False: 0] ------------------ 1648| 0| case Mips::BBIT1: ------------------ | Branch (1648:7): [True: 0, False: 0] ------------------ 1649| 0| case Mips::BBIT132: ------------------ | Branch (1649:7): [True: 0, False: 0] ------------------ 1650| 0| assert(MCID.getNumOperands() == 3 && "unexpected number of operands"); ------------------ | Branch (1650:9): [True: 0, False: 0] | Branch (1650:9): [True: 0, Folded] | Branch (1650:9): [True: 0, False: 0] ------------------ 1651| | // The offset is handled above 1652| 0| Opnd = Inst.getOperand(1); 1653| 0| if (!Opnd.isImm()) { ------------------ | Branch (1653:13): [True: 0, False: 0] ------------------ 1654| 0| KsError = KS_ERR_ASM_INVALIDOPERAND; 1655| 0| return true; 1656| | //return Error(IDLoc, "expected immediate operand kind"); 1657| 0| } 1658| 0| Imm = Opnd.getImm(); 1659| 0| if (Imm < 0 || Imm > (Opcode == Mips::BBIT0 || ------------------ | Branch (1659:13): [True: 0, False: 0] | Branch (1659:24): [True: 0, False: 0] | Branch (1659:31): [True: 0, False: 0] ------------------ 1660| 0| Opcode == Mips::BBIT1 ? 63 : 31)) { ------------------ | Branch (1660:31): [True: 0, False: 0] ------------------ 1661| 0| KsError = KS_ERR_ASM_INVALIDOPERAND; 1662| 0| return true; 1663| | //return Error(IDLoc, "immediate operand value out of range"); 1664| 0| } 1665| 0| if (Imm > 31) { ------------------ | Branch (1665:13): [True: 0, False: 0] ------------------ 1666| 0| Inst.setOpcode(Opcode == Mips::BBIT0 ? Mips::BBIT032 ------------------ | Branch (1666:26): [True: 0, False: 0] ------------------ 1667| 0| : Mips::BBIT132); 1668| 0| Inst.getOperand(1).setImm(Imm - 32); 1669| 0| } 1670| 0| break; 1671| | 1672| 0| case Mips::SEQi: ------------------ | Branch (1672:7): [True: 0, False: 0] ------------------ 1673| 0| case Mips::SNEi: ------------------ | Branch (1673:7): [True: 0, False: 0] ------------------ 1674| 0| assert(MCID.getNumOperands() == 3 && "unexpected number of operands"); ------------------ | Branch (1674:9): [True: 0, False: 0] | Branch (1674:9): [True: 0, Folded] | Branch (1674:9): [True: 0, False: 0] ------------------ 1675| 0| Opnd = Inst.getOperand(2); 1676| 0| if (!Opnd.isImm()) { ------------------ | Branch (1676:13): [True: 0, False: 0] ------------------ 1677| 0| KsError = KS_ERR_ASM_INVALIDOPERAND; 1678| 0| return true; 1679| | //return Error(IDLoc, "expected immediate operand kind"); 1680| 0| } 1681| 0| Imm = Opnd.getImm(); 1682| 0| if (!isInt<10>(Imm)) { ------------------ | Branch (1682:13): [True: 0, False: 0] ------------------ 1683| 0| KsError = KS_ERR_ASM_INVALIDOPERAND; 1684| 0| return true; 1685| | //return Error(IDLoc, "immediate operand value out of range"); 1686| 0| } 1687| 0| break; 1688| 0| } 1689| 0| } 1690| | 1691| | // This expansion is not in a function called by tryExpandInstruction() 1692| | // because the pseudo-instruction doesn't have a distinct opcode. 1693| 4.26k| if ((Inst.getOpcode() == Mips::JAL || Inst.getOpcode() == Mips::JAL_MM) && ------------------ | Branch (1693:8): [True: 2, False: 4.26k] | Branch (1693:41): [True: 0, False: 4.26k] ------------------ 1694| 2| inPicMode() && Inst.getOperand(0).isExpr()) { ------------------ | Branch (1694:7): [True: 0, False: 2] | Branch (1694:22): [True: 0, False: 0] ------------------ 1695| 0| warnIfNoMacro(IDLoc); 1696| | 1697| 0| const MCExpr *JalExpr = Inst.getOperand(0).getExpr(); 1698| | 1699| | // We can do this expansion if there's only 1 symbol in the argument 1700| | // expression. 1701| 0| if (countMCSymbolRefExpr(JalExpr) > 1) { ------------------ | Branch (1701:9): [True: 0, False: 0] ------------------ 1702| 0| KsError = KS_ERR_ASM_INVALIDOPERAND; 1703| 0| return true; 1704| | //return Error(IDLoc, "jal doesn't support multiple symbols in PIC mode"); 1705| 0| } 1706| | 1707| | // FIXME: This is checking the expression can be handled by the later stages 1708| | // of the assembler. We ought to leave it to those later stages but 1709| | // we can't do that until we stop evaluateRelocExpr() rewriting the 1710| | // expressions into non-equivalent forms. 1711| 0| const MCSymbol *JalSym = getSingleMCSymbol(JalExpr); 1712| | 1713| | // FIXME: Add support for label+offset operands (currently causes an error). 1714| | // FIXME: Add support for forward-declared local symbols. 1715| | // FIXME: Add expansion for when the LargeGOT option is enabled. 1716| 0| if (JalSym->isInSection() || JalSym->isTemporary()) { ------------------ | Branch (1716:9): [True: 0, False: 0] | Branch (1716:34): [True: 0, False: 0] ------------------ 1717| 0| if (isABI_O32()) { ------------------ | Branch (1717:11): [True: 0, False: 0] ------------------ 1718| | // If it's a local symbol and the O32 ABI is being used, we expand to: 1719| | // lw $25, 0($gp) 1720| | // R_(MICRO)MIPS_GOT16 label 1721| | // addiu $25, $25, 0 1722| | // R_(MICRO)MIPS_LO16 label 1723| | // jalr $25 1724| 0| const MCExpr *Got16RelocExpr = evaluateRelocExpr(JalExpr, "got"); 1725| 0| const MCExpr *Lo16RelocExpr = evaluateRelocExpr(JalExpr, "lo"); 1726| | 1727| 0| emitRRX(Mips::LW, Mips::T9, Mips::GP, 1728| 0| MCOperand::createExpr(Got16RelocExpr), IDLoc, Instructions); 1729| 0| emitRRX(Mips::ADDiu, Mips::T9, Mips::T9, 1730| 0| MCOperand::createExpr(Lo16RelocExpr), IDLoc, Instructions); 1731| 0| } else if (isABI_N32() || isABI_N64()) { ------------------ | Branch (1731:18): [True: 0, False: 0] | Branch (1731:33): [True: 0, False: 0] ------------------ 1732| | // If it's a local symbol and the N32/N64 ABIs are being used, 1733| | // we expand to: 1734| | // lw/ld $25, 0($gp) 1735| | // R_(MICRO)MIPS_GOT_DISP label 1736| | // jalr $25 1737| 0| const MCExpr *GotDispRelocExpr = evaluateRelocExpr(JalExpr, "got_disp"); 1738| | 1739| 0| emitRRX(ABI.ArePtrs64bit() ? Mips::LD : Mips::LW, Mips::T9, Mips::GP, ------------------ | Branch (1739:17): [True: 0, False: 0] ------------------ 1740| 0| MCOperand::createExpr(GotDispRelocExpr), IDLoc, Instructions); 1741| 0| } 1742| 0| } else { 1743| | // If it's an external/weak symbol, we expand to: 1744| | // lw/ld $25, 0($gp) 1745| | // R_(MICRO)MIPS_CALL16 label 1746| | // jalr $25 1747| 0| const MCExpr *Call16RelocExpr = evaluateRelocExpr(JalExpr, "call16"); 1748| | 1749| 0| emitRRX(ABI.ArePtrs64bit() ? Mips::LD : Mips::LW, Mips::T9, Mips::GP, ------------------ | Branch (1749:15): [True: 0, False: 0] ------------------ 1750| 0| MCOperand::createExpr(Call16RelocExpr), IDLoc, Instructions); 1751| 0| } 1752| | 1753| 0| MCInst JalrInst; 1754| 0| if (IsCpRestoreSet && inMicroMipsMode()) ------------------ | Branch (1754:9): [True: 0, False: 0] | Branch (1754:27): [True: 0, False: 0] ------------------ 1755| 0| JalrInst.setOpcode(Mips::JALRS_MM); 1756| 0| else 1757| 0| JalrInst.setOpcode(inMicroMipsMode() ? Mips::JALR_MM : Mips::JALR); ------------------ | Branch (1757:26): [True: 0, False: 0] ------------------ 1758| 0| JalrInst.addOperand(MCOperand::createReg(Mips::RA)); 1759| 0| JalrInst.addOperand(MCOperand::createReg(Mips::T9)); 1760| | 1761| | // FIXME: Add an R_(MICRO)MIPS_JALR relocation after the JALR. 1762| | // This relocation is supposed to be an optimization hint for the linker 1763| | // and is not necessary for correctness. 1764| | 1765| 0| Inst = JalrInst; 1766| 0| ExpandedJalSym = true; 1767| 0| } 1768| | 1769| 4.26k| if (MCID.mayLoad() || MCID.mayStore()) { ------------------ | Branch (1769:7): [True: 37, False: 4.22k] | Branch (1769:25): [True: 107, False: 4.11k] ------------------ 1770| | // Check the offset of memory operand, if it is a symbol 1771| | // reference or immediate we may have to expand instructions. 1772| 508| for (unsigned i = 0; i < MCID.getNumOperands(); i++) { ------------------ | Branch (1772:26): [True: 432, False: 76] ------------------ 1773| 432| const MCOperandInfo &OpInfo = MCID.OpInfo[i]; 1774| 432| if ((OpInfo.OperandType == MCOI::OPERAND_MEMORY) || ------------------ | Branch (1774:11): [True: 288, False: 144] ------------------ 1775| 288| (OpInfo.OperandType == MCOI::OPERAND_UNKNOWN)) { ------------------ | Branch (1775:11): [True: 0, False: 144] ------------------ 1776| 288| MCOperand &Op = Inst.getOperand(i); 1777| 288| if (Op.isImm()) { ------------------ | Branch (1777:13): [True: 83, False: 205] ------------------ 1778| 83| int MemOffset = Op.getImm(); 1779| 83| if (MemOffset < -32768 || MemOffset > 32767) { ------------------ | Branch (1779:15): [True: 1, False: 82] | Branch (1779:37): [True: 6, False: 76] ------------------ 1780| | // Offset can't exceed 16bit value. 1781| 7| expandMemInst(Inst, IDLoc, Instructions, MCID.mayLoad(), true); 1782| 7| return false; 1783| 7| } 1784| 205| } else if (Op.isExpr()) { ------------------ | Branch (1784:20): [True: 61, False: 144] ------------------ 1785| 61| const MCExpr *Expr = Op.getExpr(); 1786| 61| if (Expr->getKind() == MCExpr::SymbolRef) { ------------------ | Branch (1786:15): [True: 51, False: 10] ------------------ 1787| 51| const MCSymbolRefExpr *SR = 1788| 51| static_cast(Expr); 1789| 51| if (SR->getKind() == MCSymbolRefExpr::VK_None) { ------------------ | Branch (1789:17): [True: 51, False: 0] ------------------ 1790| | // Expand symbol. 1791| 51| expandMemInst(Inst, IDLoc, Instructions, MCID.mayLoad(), false); 1792| 51| return false; 1793| 51| } 1794| 51| } else if (!isEvaluated(Expr)) { ------------------ | Branch (1794:22): [True: 10, False: 0] ------------------ 1795| 10| expandMemInst(Inst, IDLoc, Instructions, MCID.mayLoad(), false); 1796| 10| return false; 1797| 10| } 1798| 61| } 1799| 288| } 1800| 432| } // for 1801| 144| } // if load/store 1802| | 1803| 4.19k| if (inMicroMipsMode()) { ------------------ | Branch (1803:7): [True: 0, False: 4.19k] ------------------ 1804| 0| if (MCID.mayLoad()) { ------------------ | Branch (1804:9): [True: 0, False: 0] ------------------ 1805| | // Try to create 16-bit GP relative load instruction. 1806| 0| for (unsigned i = 0; i < MCID.getNumOperands(); i++) { ------------------ | Branch (1806:28): [True: 0, False: 0] ------------------ 1807| 0| const MCOperandInfo &OpInfo = MCID.OpInfo[i]; 1808| 0| if ((OpInfo.OperandType == MCOI::OPERAND_MEMORY) || ------------------ | Branch (1808:13): [True: 0, False: 0] ------------------ 1809| 0| (OpInfo.OperandType == MCOI::OPERAND_UNKNOWN)) { ------------------ | Branch (1809:13): [True: 0, False: 0] ------------------ 1810| 0| MCOperand &Op = Inst.getOperand(i); 1811| 0| if (Op.isImm()) { ------------------ | Branch (1811:15): [True: 0, False: 0] ------------------ 1812| 0| int MemOffset = Op.getImm(); 1813| 0| MCOperand &DstReg = Inst.getOperand(0); 1814| 0| MCOperand &BaseReg = Inst.getOperand(1); 1815| 0| if (isInt<9>(MemOffset) && (MemOffset % 4 == 0) && ------------------ | Branch (1815:17): [True: 0, False: 0] | Branch (1815:40): [True: 0, False: 0] ------------------ 1816| 0| getContext().getRegisterInfo()->getRegClass( ------------------ | Branch (1816:17): [True: 0, False: 0] ------------------ 1817| 0| Mips::GPRMM16RegClassID).contains(DstReg.getReg()) && 1818| 0| (BaseReg.getReg() == Mips::GP || ------------------ | Branch (1818:18): [True: 0, False: 0] ------------------ 1819| 0| BaseReg.getReg() == Mips::GP_64)) { ------------------ | Branch (1819:17): [True: 0, False: 0] ------------------ 1820| | 1821| 0| emitRRI(Mips::LWGP_MM, DstReg.getReg(), Mips::GP, MemOffset, 1822| 0| IDLoc, Instructions); 1823| 0| return false; 1824| 0| } 1825| 0| } 1826| 0| } 1827| 0| } // for 1828| 0| } // if load 1829| | 1830| | // TODO: Handle this with the AsmOperandClass.PredicateMethod. 1831| | 1832| 0| MCOperand Opnd; 1833| 0| int Imm; 1834| | 1835| 0| switch (Inst.getOpcode()) { 1836| 0| default: ------------------ | Branch (1836:7): [True: 0, False: 0] ------------------ 1837| 0| break; 1838| 0| case Mips::ADDIUS5_MM: ------------------ | Branch (1838:7): [True: 0, False: 0] ------------------ 1839| 0| Opnd = Inst.getOperand(2); 1840| 0| if (!Opnd.isImm()) { ------------------ | Branch (1840:13): [True: 0, False: 0] ------------------ 1841| 0| KsError = KS_ERR_ASM_INVALIDOPERAND; 1842| 0| return true; 1843| | //return Error(IDLoc, "expected immediate operand kind"); 1844| 0| } 1845| 0| Imm = Opnd.getImm(); 1846| 0| if (Imm < -8 || Imm > 7) { ------------------ | Branch (1846:13): [True: 0, False: 0] | Branch (1846:25): [True: 0, False: 0] ------------------ 1847| 0| KsError = KS_ERR_ASM_INVALIDOPERAND; 1848| 0| return true; 1849| | //return Error(IDLoc, "immediate operand value out of range"); 1850| 0| } 1851| 0| break; 1852| 0| case Mips::ADDIUSP_MM: ------------------ | Branch (1852:7): [True: 0, False: 0] ------------------ 1853| 0| Opnd = Inst.getOperand(0); 1854| 0| if (!Opnd.isImm()) { ------------------ | Branch (1854:13): [True: 0, False: 0] ------------------ 1855| 0| KsError = KS_ERR_ASM_INVALIDOPERAND; 1856| 0| return true; 1857| | //return Error(IDLoc, "expected immediate operand kind"); 1858| 0| } 1859| 0| Imm = Opnd.getImm(); 1860| 0| if (Imm < -1032 || Imm > 1028 || (Imm < 8 && Imm > -12) || ------------------ | Branch (1860:13): [True: 0, False: 0] | Branch (1860:28): [True: 0, False: 0] | Branch (1860:43): [True: 0, False: 0] | Branch (1860:54): [True: 0, False: 0] ------------------ 1861| 0| Imm % 4 != 0) { ------------------ | Branch (1861:13): [True: 0, False: 0] ------------------ 1862| 0| KsError = KS_ERR_ASM_INVALIDOPERAND; 1863| 0| return true; 1864| | //return Error(IDLoc, "immediate operand value out of range"); 1865| 0| } 1866| 0| break; 1867| 0| case Mips::SLL16_MM: ------------------ | Branch (1867:7): [True: 0, False: 0] ------------------ 1868| 0| case Mips::SRL16_MM: ------------------ | Branch (1868:7): [True: 0, False: 0] ------------------ 1869| 0| Opnd = Inst.getOperand(2); 1870| 0| if (!Opnd.isImm()) { ------------------ | Branch (1870:13): [True: 0, False: 0] ------------------ 1871| 0| KsError = KS_ERR_ASM_INVALIDOPERAND; 1872| 0| return true; 1873| | //return Error(IDLoc, "expected immediate operand kind"); 1874| 0| } 1875| 0| Imm = Opnd.getImm(); 1876| 0| if (Imm < 1 || Imm > 8) { ------------------ | Branch (1876:13): [True: 0, False: 0] | Branch (1876:24): [True: 0, False: 0] ------------------ 1877| 0| KsError = KS_ERR_ASM_INVALIDOPERAND; 1878| 0| return true; 1879| | //return Error(IDLoc, "immediate operand value out of range"); 1880| 0| } 1881| 0| break; 1882| 0| case Mips::LI16_MM: ------------------ | Branch (1882:7): [True: 0, False: 0] ------------------ 1883| 0| Opnd = Inst.getOperand(1); 1884| 0| if (!Opnd.isImm()) { ------------------ | Branch (1884:13): [True: 0, False: 0] ------------------ 1885| 0| KsError = KS_ERR_ASM_INVALIDOPERAND; 1886| 0| return true; 1887| | //return Error(IDLoc, "expected immediate operand kind"); 1888| 0| } 1889| 0| Imm = Opnd.getImm(); 1890| 0| if (Imm < -1 || Imm > 126) { ------------------ | Branch (1890:13): [True: 0, False: 0] | Branch (1890:25): [True: 0, False: 0] ------------------ 1891| 0| KsError = KS_ERR_ASM_INVALIDOPERAND; 1892| 0| return true; 1893| | //return Error(IDLoc, "immediate operand value out of range"); 1894| 0| } 1895| 0| break; 1896| 0| case Mips::ADDIUR2_MM: ------------------ | Branch (1896:7): [True: 0, False: 0] ------------------ 1897| 0| Opnd = Inst.getOperand(2); 1898| 0| if (!Opnd.isImm()) { ------------------ | Branch (1898:13): [True: 0, False: 0] ------------------ 1899| 0| KsError = KS_ERR_ASM_INVALIDOPERAND; 1900| 0| return true; 1901| | //return Error(IDLoc, "expected immediate operand kind"); 1902| 0| } 1903| 0| Imm = Opnd.getImm(); 1904| 0| if (!(Imm == 1 || Imm == -1 || ------------------ | Branch (1904:15): [True: 0, False: 0] | Branch (1904:27): [True: 0, False: 0] ------------------ 1905| 0| ((Imm % 4 == 0) && Imm < 28 && Imm > 0))) { ------------------ | Branch (1905:16): [True: 0, False: 0] | Branch (1905:34): [True: 0, False: 0] | Branch (1905:46): [True: 0, False: 0] ------------------ 1906| 0| KsError = KS_ERR_ASM_INVALIDOPERAND; 1907| 0| return true; 1908| | //return Error(IDLoc, "immediate operand value out of range"); 1909| 0| } 1910| 0| break; 1911| 0| case Mips::ADDIUR1SP_MM: ------------------ | Branch (1911:7): [True: 0, False: 0] ------------------ 1912| 0| Opnd = Inst.getOperand(1); 1913| 0| if (!Opnd.isImm()) { ------------------ | Branch (1913:13): [True: 0, False: 0] ------------------ 1914| 0| KsError = KS_ERR_ASM_INVALIDOPERAND; 1915| 0| return true; 1916| | //return Error(IDLoc, "expected immediate operand kind"); 1917| 0| } 1918| 0| Imm = Opnd.getImm(); 1919| 0| if (OffsetToAlignment(Imm, 4LL)) { ------------------ | Branch (1919:13): [True: 0, False: 0] ------------------ 1920| 0| KsError = KS_ERR_ASM_INVALIDOPERAND; 1921| 0| return true; 1922| | //return Error(IDLoc, "misaligned immediate operand value"); 1923| 0| } 1924| 0| if (Imm < 0 || Imm > 255) { ------------------ | Branch (1924:13): [True: 0, False: 0] | Branch (1924:24): [True: 0, False: 0] ------------------ 1925| 0| KsError = KS_ERR_ASM_INVALIDOPERAND; 1926| 0| return true; 1927| | //return Error(IDLoc, "immediate operand value out of range"); 1928| 0| } 1929| 0| break; 1930| 0| case Mips::ANDI16_MM: ------------------ | Branch (1930:7): [True: 0, False: 0] ------------------ 1931| 0| Opnd = Inst.getOperand(2); 1932| 0| if (!Opnd.isImm()) { ------------------ | Branch (1932:13): [True: 0, False: 0] ------------------ 1933| 0| KsError = KS_ERR_ASM_INVALIDOPERAND; 1934| 0| return true; 1935| | //return Error(IDLoc, "expected immediate operand kind"); 1936| 0| } 1937| 0| Imm = Opnd.getImm(); 1938| 0| if (!(Imm == 128 || (Imm >= 1 && Imm <= 4) || Imm == 7 || Imm == 8 || ------------------ | Branch (1938:15): [True: 0, False: 0] | Branch (1938:30): [True: 0, False: 0] | Branch (1938:42): [True: 0, False: 0] | Branch (1938:55): [True: 0, False: 0] | Branch (1938:67): [True: 0, False: 0] ------------------ 1939| 0| Imm == 15 || Imm == 16 || Imm == 31 || Imm == 32 || Imm == 63 || ------------------ | Branch (1939:15): [True: 0, False: 0] | Branch (1939:28): [True: 0, False: 0] | Branch (1939:41): [True: 0, False: 0] | Branch (1939:54): [True: 0, False: 0] | Branch (1939:67): [True: 0, False: 0] ------------------ 1940| 0| Imm == 64 || Imm == 255 || Imm == 32768 || Imm == 65535)) { ------------------ | Branch (1940:15): [True: 0, False: 0] | Branch (1940:28): [True: 0, False: 0] | Branch (1940:42): [True: 0, False: 0] | Branch (1940:58): [True: 0, False: 0] ------------------ 1941| 0| KsError = KS_ERR_ASM_INVALIDOPERAND; 1942| 0| return true; 1943| | //return Error(IDLoc, "immediate operand value out of range"); 1944| 0| } 1945| 0| break; 1946| 0| case Mips::LBU16_MM: ------------------ | Branch (1946:7): [True: 0, False: 0] ------------------ 1947| 0| Opnd = Inst.getOperand(2); 1948| 0| if (!Opnd.isImm()) { ------------------ | Branch (1948:13): [True: 0, False: 0] ------------------ 1949| 0| KsError = KS_ERR_ASM_INVALIDOPERAND; 1950| 0| return true; 1951| | //return Error(IDLoc, "expected immediate operand kind"); 1952| 0| } 1953| 0| Imm = Opnd.getImm(); 1954| 0| if (Imm < -1 || Imm > 14) { ------------------ | Branch (1954:13): [True: 0, False: 0] | Branch (1954:25): [True: 0, False: 0] ------------------ 1955| 0| KsError = KS_ERR_ASM_INVALIDOPERAND; 1956| 0| return true; 1957| | //return Error(IDLoc, "immediate operand value out of range"); 1958| 0| } 1959| 0| break; 1960| 0| case Mips::SB16_MM: ------------------ | Branch (1960:7): [True: 0, False: 0] ------------------ 1961| 0| case Mips::SB16_MMR6: ------------------ | Branch (1961:7): [True: 0, False: 0] ------------------ 1962| 0| Opnd = Inst.getOperand(2); 1963| 0| if (!Opnd.isImm()) { ------------------ | Branch (1963:13): [True: 0, False: 0] ------------------ 1964| 0| KsError = KS_ERR_ASM_INVALIDOPERAND; 1965| 0| return true; 1966| | //return Error(IDLoc, "expected immediate operand kind"); 1967| 0| } 1968| 0| Imm = Opnd.getImm(); 1969| 0| if (Imm < 0 || Imm > 15) { ------------------ | Branch (1969:13): [True: 0, False: 0] | Branch (1969:24): [True: 0, False: 0] ------------------ 1970| 0| KsError = KS_ERR_ASM_INVALIDOPERAND; 1971| 0| return true; 1972| | //return Error(IDLoc, "immediate operand value out of range"); 1973| 0| } 1974| 0| break; 1975| 0| case Mips::LHU16_MM: ------------------ | Branch (1975:7): [True: 0, False: 0] ------------------ 1976| 0| case Mips::SH16_MM: ------------------ | Branch (1976:7): [True: 0, False: 0] ------------------ 1977| 0| case Mips::SH16_MMR6: ------------------ | Branch (1977:7): [True: 0, False: 0] ------------------ 1978| 0| Opnd = Inst.getOperand(2); 1979| 0| if (!Opnd.isImm()) { ------------------ | Branch (1979:13): [True: 0, False: 0] ------------------ 1980| 0| KsError = KS_ERR_ASM_INVALIDOPERAND; 1981| 0| return true; 1982| | //return Error(IDLoc, "expected immediate operand kind"); 1983| 0| } 1984| 0| Imm = Opnd.getImm(); 1985| 0| if (Imm < 0 || Imm > 30 || (Imm % 2 != 0)) { ------------------ | Branch (1985:13): [True: 0, False: 0] | Branch (1985:24): [True: 0, False: 0] | Branch (1985:36): [True: 0, False: 0] ------------------ 1986| 0| KsError = KS_ERR_ASM_INVALIDOPERAND; 1987| 0| return true; 1988| | //return Error(IDLoc, "immediate operand value out of range"); 1989| 0| } 1990| 0| break; 1991| 0| case Mips::LW16_MM: ------------------ | Branch (1991:7): [True: 0, False: 0] ------------------ 1992| 0| case Mips::SW16_MM: ------------------ | Branch (1992:7): [True: 0, False: 0] ------------------ 1993| 0| case Mips::SW16_MMR6: ------------------ | Branch (1993:7): [True: 0, False: 0] ------------------ 1994| 0| Opnd = Inst.getOperand(2); 1995| 0| if (!Opnd.isImm()) { ------------------ | Branch (1995:13): [True: 0, False: 0] ------------------ 1996| 0| KsError = KS_ERR_ASM_INVALIDOPERAND; 1997| 0| return true; 1998| | //return Error(IDLoc, "expected immediate operand kind"); 1999| 0| } 2000| 0| Imm = Opnd.getImm(); 2001| 0| if (Imm < 0 || Imm > 60 || (Imm % 4 != 0)) { ------------------ | Branch (2001:13): [True: 0, False: 0] | Branch (2001:24): [True: 0, False: 0] | Branch (2001:36): [True: 0, False: 0] ------------------ 2002| 0| KsError = KS_ERR_ASM_INVALIDOPERAND; 2003| 0| return true; 2004| | //return Error(IDLoc, "immediate operand value out of range"); 2005| 0| } 2006| 0| break; 2007| 0| case Mips::ADDIUPC_MM: ------------------ | Branch (2007:7): [True: 0, False: 0] ------------------ 2008| 0| MCOperand Opnd = Inst.getOperand(1); 2009| 0| if (!Opnd.isImm()) { ------------------ | Branch (2009:13): [True: 0, False: 0] ------------------ 2010| 0| KsError = KS_ERR_ASM_INVALIDOPERAND; 2011| 0| return true; 2012| | //return Error(IDLoc, "expected immediate operand kind"); 2013| 0| } 2014| 0| int Imm = Opnd.getImm(); 2015| 0| if ((Imm % 4 != 0) || !isInt<25>(Imm)) { ------------------ | Branch (2015:13): [True: 0, False: 0] | Branch (2015:31): [True: 0, False: 0] ------------------ 2016| 0| KsError = KS_ERR_ASM_INVALIDOPERAND; 2017| 0| return true; 2018| | //return Error(IDLoc, "immediate operand value out of range"); 2019| 0| } 2020| 0| break; 2021| 0| } 2022| 0| } 2023| | 2024| 4.19k| MacroExpanderResultTy ExpandResult = 2025| 4.19k| tryExpandInstruction(Inst, IDLoc, Instructions); 2026| 4.19k| switch (ExpandResult) { ------------------ | Branch (2026:11): [True: 4.19k, False: 0] ------------------ 2027| 4.16k| case MER_NotAMacro: ------------------ | Branch (2027:3): [True: 4.16k, False: 32] ------------------ 2028| 4.16k| Instructions.push_back(Inst); 2029| 4.16k| break; 2030| 32| case MER_Success: ------------------ | Branch (2030:3): [True: 32, False: 4.16k] ------------------ 2031| 32| break; 2032| 0| case MER_Fail: ------------------ | Branch (2032:3): [True: 0, False: 4.19k] ------------------ 2033| 0| return true; 2034| 4.19k| } 2035| | 2036| | // If this instruction has a delay slot and .set reorder is active, 2037| | // emit a NOP after it. 2038| 4.19k| if (MCID.hasDelaySlot() && AssemblerOptions.back()->isReorder()) ------------------ | Branch (2038:7): [True: 3.84k, False: 350] | Branch (2038:30): [True: 3.84k, False: 0] ------------------ 2039| 3.84k| createNop(hasShortDelaySlot(Inst.getOpcode()), IDLoc, Instructions); 2040| | 2041| 4.19k| if ((Inst.getOpcode() == Mips::JalOneReg || ------------------ | Branch (2041:8): [True: 0, False: 4.19k] ------------------ 2042| 4.19k| Inst.getOpcode() == Mips::JalTwoReg || ExpandedJalSym) && ------------------ | Branch (2042:8): [True: 0, False: 4.19k] | Branch (2042:47): [True: 0, False: 4.19k] ------------------ 2043| 0| isPicAndNotNxxAbi()) { ------------------ | Branch (2043:7): [True: 0, False: 0] ------------------ 2044| 0| if (IsCpRestoreSet) { ------------------ | Branch (2044:9): [True: 0, False: 0] ------------------ 2045| | // We need a NOP between the JALR and the LW: 2046| | // If .set reorder has been used, we've already emitted a NOP. 2047| | // If .set noreorder has been used, we need to emit a NOP at this point. 2048| 0| if (!AssemblerOptions.back()->isReorder()) ------------------ | Branch (2048:11): [True: 0, False: 0] ------------------ 2049| 0| createNop(hasShortDelaySlot(Inst.getOpcode()), IDLoc, Instructions); 2050| | 2051| | // Load the $gp from the stack. 2052| 0| SmallVector LoadInsts; 2053| 0| createCpRestoreMemOp(true /*IsLoad*/, CpRestoreOffset /*StackOffset*/, 2054| 0| IDLoc, LoadInsts); 2055| | 2056| 0| for (const MCInst &Inst : LoadInsts) ------------------ | Branch (2056:31): [True: 0, False: 0] ------------------ 2057| 0| Instructions.push_back(Inst); 2058| | 2059| 0| } else { 2060| | // Warning(IDLoc, "no .cprestore used in PIC mode"); 2061| 0| } 2062| 0| } 2063| | 2064| 4.19k| return false; 2065| 4.19k|} MipsAsmParser.cpp:_ZNK12_GLOBAL__N_113MipsAsmParser9hasCnMipsEv: 527| 4.26k| bool hasCnMips() const { 528| 4.26k| return (getSTI().getFeatureBits()[Mips::FeatureCnMips]); 529| 4.26k| } MipsAsmParser.cpp:_ZNK12_GLOBAL__N_113MipsAsmParser15inMicroMipsModeEv: 466| 4.19k| bool inMicroMipsMode() const { 467| 4.19k| return getSTI().getFeatureBits()[Mips::FeatureMicroMips]; 468| 4.19k| } MipsAsmParser.cpp:_ZNK12_GLOBAL__N_113MipsAsmParser11hasMips32r6Ev: 508| 4.26k| bool hasMips32r6() const { 509| 4.26k| return getSTI().getFeatureBits()[Mips::FeatureMips32r6]; 510| 4.26k| } MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser9inPicModeEv: 531| 2| bool inPicMode() { 532| 2| return IsPicEnabled; 533| 2| } MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser11isEvaluatedEPKN7llvm_ks6MCExprE: 4177| 60|bool MipsAsmParser::isEvaluated(const MCExpr *Expr) { 4178| | 4179| 60| switch (Expr->getKind()) { ------------------ | Branch (4179:11): [True: 60, False: 0] ------------------ 4180| 1| case MCExpr::Constant: ------------------ | Branch (4180:3): [True: 1, False: 59] ------------------ 4181| 1| return true; 4182| 10| case MCExpr::SymbolRef: ------------------ | Branch (4182:3): [True: 10, False: 50] ------------------ 4183| 10| return (cast(Expr)->getKind() != MCSymbolRefExpr::VK_None); 4184| 42| case MCExpr::Binary: ------------------ | Branch (4184:3): [True: 42, False: 18] ------------------ 4185| 42| if (const MCBinaryExpr *BE = dyn_cast(Expr)) { ------------------ | Branch (4185:29): [True: 42, False: 0] ------------------ 4186| 42| if (!isEvaluated(BE->getLHS())) ------------------ | Branch (4186:11): [True: 41, False: 1] ------------------ 4187| 41| return false; 4188| 1| return isEvaluated(BE->getRHS()); 4189| 42| } 4190| 7| case MCExpr::Unary: ------------------ | Branch (4190:3): [True: 7, False: 53] ------------------ 4191| 7| return isEvaluated(cast(Expr)->getSubExpr()); 4192| 0| case MCExpr::Target: ------------------ | Branch (4192:3): [True: 0, False: 60] ------------------ 4193| 0| return true; 4194| 60| } 4195| 0| return false; 4196| 60|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser20tryExpandInstructionERN7llvm_ks6MCInstENS1_5SMLocERNS1_15SmallVectorImplIS2_EE: 2069| 4.19k| SmallVectorImpl &Instructions) { 2070| 4.19k| switch (Inst.getOpcode()) { 2071| 3.92k| default: ------------------ | Branch (2071:3): [True: 3.92k, False: 274] ------------------ 2072| 3.92k| return MER_NotAMacro; 2073| 0| case Mips::LoadImm32: ------------------ | Branch (2073:3): [True: 0, False: 4.19k] ------------------ 2074| 0| return expandLoadImm(Inst, true, IDLoc, Instructions) ? MER_Fail ------------------ | Branch (2074:12): [True: 0, False: 0] ------------------ 2075| 0| : MER_Success; 2076| 0| case Mips::LoadImm64: ------------------ | Branch (2076:3): [True: 0, False: 4.19k] ------------------ 2077| 0| return expandLoadImm(Inst, false, IDLoc, Instructions) ? MER_Fail ------------------ | Branch (2077:12): [True: 0, False: 0] ------------------ 2078| 0| : MER_Success; 2079| 0| case Mips::LoadAddrImm32: ------------------ | Branch (2079:3): [True: 0, False: 4.19k] ------------------ 2080| 0| case Mips::LoadAddrImm64: ------------------ | Branch (2080:3): [True: 0, False: 4.19k] ------------------ 2081| 0| assert(Inst.getOperand(0).isReg() && "expected register operand kind"); ------------------ | Branch (2081:5): [True: 0, False: 0] | Branch (2081:5): [True: 0, Folded] | Branch (2081:5): [True: 0, False: 0] ------------------ 2082| 0| assert((Inst.getOperand(1).isImm() || Inst.getOperand(1).isExpr()) && ------------------ | Branch (2082:5): [True: 0, False: 0] | Branch (2082:5): [True: 0, False: 0] | Branch (2082:5): [True: 0, Folded] | Branch (2082:5): [True: 0, False: 0] ------------------ 2083| 0| "expected immediate operand kind"); 2084| | 2085| 0| return expandLoadAddress(Inst.getOperand(0).getReg(), Mips::NoRegister, ------------------ | Branch (2085:12): [True: 0, False: 0] ------------------ 2086| 0| Inst.getOperand(1), 2087| 0| Inst.getOpcode() == Mips::LoadAddrImm32, IDLoc, 2088| 0| Instructions) 2089| 0| ? MER_Fail 2090| 0| : MER_Success; 2091| 0| case Mips::LoadAddrReg32: ------------------ | Branch (2091:3): [True: 0, False: 4.19k] ------------------ 2092| 0| case Mips::LoadAddrReg64: ------------------ | Branch (2092:3): [True: 0, False: 4.19k] ------------------ 2093| 0| assert(Inst.getOperand(0).isReg() && "expected register operand kind"); ------------------ | Branch (2093:5): [True: 0, False: 0] | Branch (2093:5): [True: 0, Folded] | Branch (2093:5): [True: 0, False: 0] ------------------ 2094| 0| assert(Inst.getOperand(1).isReg() && "expected register operand kind"); ------------------ | Branch (2094:5): [True: 0, False: 0] | Branch (2094:5): [True: 0, Folded] | Branch (2094:5): [True: 0, False: 0] ------------------ 2095| 0| assert((Inst.getOperand(2).isImm() || Inst.getOperand(2).isExpr()) && ------------------ | Branch (2095:5): [True: 0, False: 0] | Branch (2095:5): [True: 0, False: 0] | Branch (2095:5): [True: 0, Folded] | Branch (2095:5): [True: 0, False: 0] ------------------ 2096| 0| "expected immediate operand kind"); 2097| | 2098| 0| return expandLoadAddress(Inst.getOperand(0).getReg(), ------------------ | Branch (2098:12): [True: 0, False: 0] ------------------ 2099| 0| Inst.getOperand(1).getReg(), Inst.getOperand(2), 2100| 0| Inst.getOpcode() == Mips::LoadAddrReg32, IDLoc, 2101| 0| Instructions) 2102| 0| ? MER_Fail 2103| 0| : MER_Success; 2104| 0| case Mips::B_MM_Pseudo: ------------------ | Branch (2104:3): [True: 0, False: 4.19k] ------------------ 2105| 0| case Mips::B_MMR6_Pseudo: ------------------ | Branch (2105:3): [True: 0, False: 4.19k] ------------------ 2106| 0| return expandUncondBranchMMPseudo(Inst, IDLoc, Instructions) ? MER_Fail ------------------ | Branch (2106:12): [True: 0, False: 0] ------------------ 2107| 0| : MER_Success; 2108| 0| case Mips::SWM_MM: ------------------ | Branch (2108:3): [True: 0, False: 4.19k] ------------------ 2109| 0| case Mips::LWM_MM: ------------------ | Branch (2109:3): [True: 0, False: 4.19k] ------------------ 2110| 0| return expandLoadStoreMultiple(Inst, IDLoc, Instructions) ? MER_Fail ------------------ | Branch (2110:12): [True: 0, False: 0] ------------------ 2111| 0| : MER_Success; 2112| 0| case Mips::JalOneReg: ------------------ | Branch (2112:3): [True: 0, False: 4.19k] ------------------ 2113| 0| case Mips::JalTwoReg: ------------------ | Branch (2113:3): [True: 0, False: 4.19k] ------------------ 2114| 0| return expandJalWithRegs(Inst, IDLoc, Instructions) ? MER_Fail ------------------ | Branch (2114:12): [True: 0, False: 0] ------------------ 2115| 0| : MER_Success; 2116| 0| case Mips::BneImm: ------------------ | Branch (2116:3): [True: 0, False: 4.19k] ------------------ 2117| 0| case Mips::BeqImm: ------------------ | Branch (2117:3): [True: 0, False: 4.19k] ------------------ 2118| 0| return expandBranchImm(Inst, IDLoc, Instructions) ? MER_Fail : MER_Success; ------------------ | Branch (2118:12): [True: 0, False: 0] ------------------ 2119| 0| case Mips::BLT: ------------------ | Branch (2119:3): [True: 0, False: 4.19k] ------------------ 2120| 0| case Mips::BLE: ------------------ | Branch (2120:3): [True: 0, False: 4.19k] ------------------ 2121| 0| case Mips::BGE: ------------------ | Branch (2121:3): [True: 0, False: 4.19k] ------------------ 2122| 0| case Mips::BGT: ------------------ | Branch (2122:3): [True: 0, False: 4.19k] ------------------ 2123| 0| case Mips::BLTU: ------------------ | Branch (2123:3): [True: 0, False: 4.19k] ------------------ 2124| 0| case Mips::BLEU: ------------------ | Branch (2124:3): [True: 0, False: 4.19k] ------------------ 2125| 0| case Mips::BGEU: ------------------ | Branch (2125:3): [True: 0, False: 4.19k] ------------------ 2126| 0| case Mips::BGTU: ------------------ | Branch (2126:3): [True: 0, False: 4.19k] ------------------ 2127| 0| case Mips::BLTL: ------------------ | Branch (2127:3): [True: 0, False: 4.19k] ------------------ 2128| 0| case Mips::BLEL: ------------------ | Branch (2128:3): [True: 0, False: 4.19k] ------------------ 2129| 0| case Mips::BGEL: ------------------ | Branch (2129:3): [True: 0, False: 4.19k] ------------------ 2130| 0| case Mips::BGTL: ------------------ | Branch (2130:3): [True: 0, False: 4.19k] ------------------ 2131| 0| case Mips::BLTUL: ------------------ | Branch (2131:3): [True: 0, False: 4.19k] ------------------ 2132| 0| case Mips::BLEUL: ------------------ | Branch (2132:3): [True: 0, False: 4.19k] ------------------ 2133| 0| case Mips::BGEUL: ------------------ | Branch (2133:3): [True: 0, False: 4.19k] ------------------ 2134| 0| case Mips::BGTUL: ------------------ | Branch (2134:3): [True: 0, False: 4.19k] ------------------ 2135| 0| case Mips::BLTImmMacro: ------------------ | Branch (2135:3): [True: 0, False: 4.19k] ------------------ 2136| 0| case Mips::BLEImmMacro: ------------------ | Branch (2136:3): [True: 0, False: 4.19k] ------------------ 2137| 0| case Mips::BGEImmMacro: ------------------ | Branch (2137:3): [True: 0, False: 4.19k] ------------------ 2138| 0| case Mips::BGTImmMacro: ------------------ | Branch (2138:3): [True: 0, False: 4.19k] ------------------ 2139| 0| case Mips::BLTUImmMacro: ------------------ | Branch (2139:3): [True: 0, False: 4.19k] ------------------ 2140| 0| case Mips::BLEUImmMacro: ------------------ | Branch (2140:3): [True: 0, False: 4.19k] ------------------ 2141| 0| case Mips::BGEUImmMacro: ------------------ | Branch (2141:3): [True: 0, False: 4.19k] ------------------ 2142| 0| case Mips::BGTUImmMacro: ------------------ | Branch (2142:3): [True: 0, False: 4.19k] ------------------ 2143| 0| case Mips::BLTLImmMacro: ------------------ | Branch (2143:3): [True: 0, False: 4.19k] ------------------ 2144| 0| case Mips::BLELImmMacro: ------------------ | Branch (2144:3): [True: 0, False: 4.19k] ------------------ 2145| 0| case Mips::BGELImmMacro: ------------------ | Branch (2145:3): [True: 0, False: 4.19k] ------------------ 2146| 0| case Mips::BGTLImmMacro: ------------------ | Branch (2146:3): [True: 0, False: 4.19k] ------------------ 2147| 0| case Mips::BLTULImmMacro: ------------------ | Branch (2147:3): [True: 0, False: 4.19k] ------------------ 2148| 0| case Mips::BLEULImmMacro: ------------------ | Branch (2148:3): [True: 0, False: 4.19k] ------------------ 2149| 0| case Mips::BGEULImmMacro: ------------------ | Branch (2149:3): [True: 0, False: 4.19k] ------------------ 2150| 0| case Mips::BGTULImmMacro: ------------------ | Branch (2150:3): [True: 0, False: 4.19k] ------------------ 2151| 0| return expandCondBranches(Inst, IDLoc, Instructions) ? MER_Fail ------------------ | Branch (2151:12): [True: 0, False: 0] ------------------ 2152| 0| : MER_Success; 2153| 0| case Mips::SDivMacro: ------------------ | Branch (2153:3): [True: 0, False: 4.19k] ------------------ 2154| 0| return expandDiv(Inst, IDLoc, Instructions, false, true) ? MER_Fail ------------------ | Branch (2154:12): [True: 0, False: 0] ------------------ 2155| 0| : MER_Success; 2156| 0| case Mips::DSDivMacro: ------------------ | Branch (2156:3): [True: 0, False: 4.19k] ------------------ 2157| 0| return expandDiv(Inst, IDLoc, Instructions, true, true) ? MER_Fail ------------------ | Branch (2157:12): [True: 0, False: 0] ------------------ 2158| 0| : MER_Success; 2159| 0| case Mips::UDivMacro: ------------------ | Branch (2159:3): [True: 0, False: 4.19k] ------------------ 2160| 0| return expandDiv(Inst, IDLoc, Instructions, false, false) ? MER_Fail ------------------ | Branch (2160:12): [True: 0, False: 0] ------------------ 2161| 0| : MER_Success; 2162| 0| case Mips::DUDivMacro: ------------------ | Branch (2162:3): [True: 0, False: 4.19k] ------------------ 2163| 0| return expandDiv(Inst, IDLoc, Instructions, true, false) ? MER_Fail ------------------ | Branch (2163:12): [True: 0, False: 0] ------------------ 2164| 0| : MER_Success; 2165| 0| case Mips::Ulh: ------------------ | Branch (2165:3): [True: 0, False: 4.19k] ------------------ 2166| 0| return expandUlh(Inst, true, IDLoc, Instructions) ? MER_Fail : MER_Success; ------------------ | Branch (2166:12): [True: 0, False: 0] ------------------ 2167| 0| case Mips::Ulhu: ------------------ | Branch (2167:3): [True: 0, False: 4.19k] ------------------ 2168| 0| return expandUlh(Inst, false, IDLoc, Instructions) ? MER_Fail : MER_Success; ------------------ | Branch (2168:12): [True: 0, False: 0] ------------------ 2169| 0| case Mips::Ulw: ------------------ | Branch (2169:3): [True: 0, False: 4.19k] ------------------ 2170| 0| return expandUlw(Inst, IDLoc, Instructions) ? MER_Fail : MER_Success; ------------------ | Branch (2170:12): [True: 0, False: 0] ------------------ 2171| 0| case Mips::NORImm: ------------------ | Branch (2171:3): [True: 0, False: 4.19k] ------------------ 2172| 0| return expandAliasImmediate(Inst, IDLoc, Instructions) ? MER_Fail ------------------ | Branch (2172:12): [True: 0, False: 0] ------------------ 2173| 0| : MER_Success; 2174| 0| case Mips::ADDi: ------------------ | Branch (2174:3): [True: 0, False: 4.19k] ------------------ 2175| 0| case Mips::ADDiu: ------------------ | Branch (2175:3): [True: 0, False: 4.19k] ------------------ 2176| 0| case Mips::SLTi: ------------------ | Branch (2176:3): [True: 0, False: 4.19k] ------------------ 2177| 0| case Mips::SLTiu: ------------------ | Branch (2177:3): [True: 0, False: 4.19k] ------------------ 2178| 0| if ((Inst.getNumOperands() == 3) && Inst.getOperand(0).isReg() && ------------------ | Branch (2178:9): [True: 0, False: 0] | Branch (2178:41): [True: 0, False: 0] ------------------ 2179| 0| Inst.getOperand(1).isReg() && Inst.getOperand(2).isImm()) { ------------------ | Branch (2179:9): [True: 0, False: 0] | Branch (2179:39): [True: 0, False: 0] ------------------ 2180| 0| int64_t ImmValue = Inst.getOperand(2).getImm(); 2181| 0| if (isInt<16>(ImmValue)) ------------------ | Branch (2181:11): [True: 0, False: 0] ------------------ 2182| 0| return MER_NotAMacro; 2183| 0| return expandAliasImmediate(Inst, IDLoc, Instructions) ? MER_Fail ------------------ | Branch (2183:14): [True: 0, False: 0] ------------------ 2184| 0| : MER_Success; 2185| 0| } 2186| 0| return MER_NotAMacro; 2187| 1| case Mips::ANDi: ------------------ | Branch (2187:3): [True: 1, False: 4.19k] ------------------ 2188| 242| case Mips::ORi: ------------------ | Branch (2188:3): [True: 241, False: 3.95k] ------------------ 2189| 242| case Mips::XORi: ------------------ | Branch (2189:3): [True: 0, False: 4.19k] ------------------ 2190| 242| if ((Inst.getNumOperands() == 3) && Inst.getOperand(0).isReg() && ------------------ | Branch (2190:9): [True: 242, False: 0] | Branch (2190:41): [True: 242, False: 0] ------------------ 2191| 242| Inst.getOperand(1).isReg() && Inst.getOperand(2).isImm()) { ------------------ | Branch (2191:9): [True: 242, False: 0] | Branch (2191:39): [True: 1, False: 241] ------------------ 2192| 1| int64_t ImmValue = Inst.getOperand(2).getImm(); 2193| 1| if (isUInt<16>(ImmValue)) ------------------ | Branch (2193:11): [True: 1, False: 0] ------------------ 2194| 1| return MER_NotAMacro; 2195| 0| return expandAliasImmediate(Inst, IDLoc, Instructions) ? MER_Fail ------------------ | Branch (2195:14): [True: 0, False: 0] ------------------ 2196| 0| : MER_Success; 2197| 1| } 2198| 241| return MER_NotAMacro; 2199| 0| case Mips::ROL: ------------------ | Branch (2199:3): [True: 0, False: 4.19k] ------------------ 2200| 0| case Mips::ROR: ------------------ | Branch (2200:3): [True: 0, False: 4.19k] ------------------ 2201| 0| return expandRotation(Inst, IDLoc, Instructions) ? MER_Fail ------------------ | Branch (2201:12): [True: 0, False: 0] ------------------ 2202| 0| : MER_Success; 2203| 0| case Mips::ROLImm: ------------------ | Branch (2203:3): [True: 0, False: 4.19k] ------------------ 2204| 0| case Mips::RORImm: ------------------ | Branch (2204:3): [True: 0, False: 4.19k] ------------------ 2205| 0| return expandRotationImm(Inst, IDLoc, Instructions) ? MER_Fail ------------------ | Branch (2205:12): [True: 0, False: 0] ------------------ 2206| 0| : MER_Success; 2207| 0| case Mips::DROL: ------------------ | Branch (2207:3): [True: 0, False: 4.19k] ------------------ 2208| 0| case Mips::DROR: ------------------ | Branch (2208:3): [True: 0, False: 4.19k] ------------------ 2209| 0| return expandDRotation(Inst, IDLoc, Instructions) ? MER_Fail ------------------ | Branch (2209:12): [True: 0, False: 0] ------------------ 2210| 0| : MER_Success; 2211| 0| case Mips::DROLImm: ------------------ | Branch (2211:3): [True: 0, False: 4.19k] ------------------ 2212| 0| case Mips::DRORImm: ------------------ | Branch (2212:3): [True: 0, False: 4.19k] ------------------ 2213| 0| return expandDRotationImm(Inst, IDLoc, Instructions) ? MER_Fail ------------------ | Branch (2213:12): [True: 0, False: 0] ------------------ 2214| 0| : MER_Success; 2215| 32| case Mips::ABSMacro: ------------------ | Branch (2215:3): [True: 32, False: 4.16k] ------------------ 2216| 32| return expandAbs(Inst, IDLoc, Instructions) ? MER_Fail ------------------ | Branch (2216:12): [True: 0, False: 32] ------------------ 2217| 32| : MER_Success; 2218| 4.19k| } 2219| 4.19k|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_16emitRIEjjiN7llvm_ks5SMLocERNS0_15SmallVectorImplINS0_6MCInstEEE: 1468| 32| SmallVectorImpl &Instructions) { 1469| 32| emitRX(Opcode, Reg0, MCOperand::createImm(Imm), IDLoc, Instructions); 1470| 32|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser9expandAbsERN7llvm_ks6MCInstENS1_5SMLocERNS1_15SmallVectorImplIS2_EE: 3664| 32| SmallVectorImpl &Instructions) { 3665| | 3666| 32| unsigned FirstRegOp = Inst.getOperand(0).getReg(); 3667| 32| unsigned SecondRegOp = Inst.getOperand(1).getReg(); 3668| | 3669| 32| emitRI(Mips::BGEZ, SecondRegOp, 8, IDLoc, Instructions); 3670| 32| if (FirstRegOp != SecondRegOp) ------------------ | Branch (3670:7): [True: 32, False: 0] ------------------ 3671| 32| emitRRR(Mips::ADDu, FirstRegOp, SecondRegOp, Mips::ZERO, IDLoc, Instructions); 3672| 0| else 3673| 0| createNop(false, IDLoc, Instructions); 3674| 32| emitRRR(Mips::SUB, FirstRegOp, Mips::ZERO, SecondRegOp, IDLoc, Instructions); 3675| | 3676| 32| return false; 3677| 32|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser9createNopEbN7llvm_ks5SMLocERNS1_15SmallVectorImplINS1_6MCInstEEE: 3680| 3.84k| SmallVectorImpl &Instructions) { 3681| 3.84k| if (hasShortDelaySlot) ------------------ | Branch (3681:7): [True: 0, False: 3.84k] ------------------ 3682| 0| emitRR(Mips::MOVE16_MM, Mips::ZERO, Mips::ZERO, IDLoc, Instructions); 3683| 3.84k| else 3684| 3.84k| emitRRI(Mips::SLL, Mips::ZERO, Mips::ZERO, 0, IDLoc, Instructions); 3685| 3.84k|} MipsAsmParser.cpp:_ZL17hasShortDelaySlotj: 1405| 3.84k|static bool hasShortDelaySlot(unsigned Opcode) { 1406| 3.84k| switch (Opcode) { 1407| 0| case Mips::JALS_MM: ------------------ | Branch (1407:5): [True: 0, False: 3.84k] ------------------ 1408| 0| case Mips::JALRS_MM: ------------------ | Branch (1408:5): [True: 0, False: 3.84k] ------------------ 1409| 0| case Mips::JALRS16_MM: ------------------ | Branch (1409:5): [True: 0, False: 3.84k] ------------------ 1410| 0| case Mips::BGEZALS_MM: ------------------ | Branch (1410:5): [True: 0, False: 3.84k] ------------------ 1411| 0| case Mips::BLTZALS_MM: ------------------ | Branch (1411:5): [True: 0, False: 3.84k] ------------------ 1412| 0| return true; 1413| 3.84k| default: ------------------ | Branch (1413:5): [True: 3.84k, False: 0] ------------------ 1414| 3.84k| return false; 1415| 3.84k| } 1416| 3.84k|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser25checkTargetMatchPredicateERN7llvm_ks6MCInstE: 3712| 4.26k|unsigned MipsAsmParser::checkTargetMatchPredicate(MCInst &Inst) { 3713| | // As described by the Mips32r2 spec, the registers Rd and Rs for 3714| | // jalr.hb must be different. 3715| 4.26k| unsigned Opcode = Inst.getOpcode(); 3716| | 3717| 4.26k| if (Opcode == Mips::JALR_HB && ------------------ | Branch (3717:7): [True: 0, False: 4.26k] ------------------ 3718| 0| (Inst.getOperand(0).getReg() == Inst.getOperand(1).getReg())) ------------------ | Branch (3718:7): [True: 0, False: 0] ------------------ 3719| 0| return Match_RequiresDifferentSrcAndDst; 3720| | 3721| 4.26k| return Match_Success; 3722| 4.26k|} _ZN7llvm_ks11MipsABIInfo16computeTargetABIERKNS_6TripleENS_9StringRefERKNS_15MCTargetOptionsE: 43| 749| const MCTargetOptions &Options) { 44| 749| if (Options.getABIName().startswith("o32")) ------------------ | Branch (44:7): [True: 0, False: 749] ------------------ 45| 0| return MipsABIInfo::O32(); 46| 749| else if (Options.getABIName().startswith("n32")) ------------------ | Branch (46:12): [True: 0, False: 749] ------------------ 47| 0| return MipsABIInfo::N32(); 48| 749| else if (Options.getABIName().startswith("n64")) ------------------ | Branch (48:12): [True: 0, False: 749] ------------------ 49| 0| return MipsABIInfo::N64(); 50| 749| else if (Options.getABIName().startswith("eabi")) ------------------ | Branch (50:12): [True: 0, False: 749] ------------------ 51| 0| return MipsABIInfo::EABI(); 52| 749| else if (!Options.getABIName().empty()) ------------------ | Branch (52:12): [True: 0, False: 749] ------------------ 53| 0| llvm_unreachable("Unknown ABI option for MIPS"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ 54| | 55| | // FIXME: This shares code with the selectMipsCPU routine that's 56| | // used and not shared in a couple of other places. This needs unifying 57| | // at some level. 58| 749| if (CPU.empty() || CPU == "generic") { ------------------ | Branch (58:7): [True: 0, False: 749] | Branch (58:7): [True: 0, False: 749] | Branch (58:22): [True: 0, False: 749] ------------------ 59| 0| if (TT.getArch() == Triple::mips || TT.getArch() == Triple::mipsel) ------------------ | Branch (59:9): [True: 0, False: 0] | Branch (59:41): [True: 0, False: 0] ------------------ 60| 0| CPU = "mips32"; 61| 0| else 62| 0| CPU = "mips64"; 63| 0| } 64| | 65| 749| return StringSwitch(CPU) 66| 749| .Case("mips1", MipsABIInfo::O32()) 67| 749| .Case("mips2", MipsABIInfo::O32()) 68| 749| .Case("mips32", MipsABIInfo::O32()) 69| 749| .Case("mips32r2", MipsABIInfo::O32()) 70| 749| .Case("mips32r3", MipsABIInfo::O32()) 71| 749| .Case("mips32r5", MipsABIInfo::O32()) 72| 749| .Case("mips32r6", MipsABIInfo::O32()) 73| 749| .Case("mips3", MipsABIInfo::N64()) 74| 749| .Case("mips4", MipsABIInfo::N64()) 75| 749| .Case("mips5", MipsABIInfo::N64()) 76| 749| .Case("mips64", MipsABIInfo::N64()) 77| 749| .Case("mips64r2", MipsABIInfo::N64()) 78| 749| .Case("mips64r3", MipsABIInfo::N64()) 79| 749| .Case("mips64r5", MipsABIInfo::N64()) 80| 749| .Case("mips64r6", MipsABIInfo::N64()) 81| 749| .Case("octeon", MipsABIInfo::N64()) 82| 749| .Default(MipsABIInfo::Unknown()); 83| 749|} _ZNK7llvm_ks11MipsABIInfo5IsN32Ev: 43| 971| bool IsN32() const { return ThisABI == ABI::N32; } _ZNK7llvm_ks11MipsABIInfo5IsN64Ev: 44| 1.11k| bool IsN64() const { return ThisABI == ABI::N64; } _ZNK7llvm_ks11MipsABIInfo5IsO32Ev: 42| 7| bool IsO32() const { return ThisABI == ABI::O32; } _ZNK7llvm_ks11MipsABIInfo12ArePtrs64bitEv: 69| 144| inline bool ArePtrs64bit() const { return IsN64(); } _ZN7llvm_ks11MipsABIInfoC2ENS0_3ABIE: 31| 12.7k| MipsABIInfo(ABI ThisABI) : ThisABI(ThisABI) {} _ZN7llvm_ks11MipsABIInfo7UnknownEv: 33| 749| static MipsABIInfo Unknown() { return MipsABIInfo(ABI::Unknown); } _ZN7llvm_ks11MipsABIInfo3O32Ev: 34| 5.24k| static MipsABIInfo O32() { return MipsABIInfo(ABI::O32); } _ZN7llvm_ks11MipsABIInfo3N64Ev: 36| 6.74k| static MipsABIInfo N64() { return MipsABIInfo(ABI::N64); } _ZNK7llvm_ks14MipsAsmBackend18createObjectWriterERNS_17raw_pwrite_streamE: 169| 749|MipsAsmBackend::createObjectWriter(raw_pwrite_stream &OS) const { 170| 749| return createMipsELFObjectWriter(OS, 171| 749| MCELFObjectTargetWriter::getOSABI(OSType), IsLittle, Is64Bit); 172| 749|} _ZNK7llvm_ks14MipsAsmBackend10applyFixupERKNS_7MCFixupEPcjmbRj: 196| 1.44k| bool IsPCRel, unsigned int &KsError) const { 197| 1.44k| MCFixupKind Kind = Fixup.getKind(); 198| 1.44k| Value = adjustFixupValue(Fixup, Value); 199| | 200| 1.44k| if (!Value) ------------------ | Branch (200:7): [True: 67, False: 1.38k] ------------------ 201| 67| return; // Doesn't change encoding. 202| | 203| | // Where do we start in the object 204| 1.38k| unsigned Offset = Fixup.getOffset(); 205| | // Number of bytes we need to fixup 206| 1.38k| unsigned NumBytes = (getFixupKindInfo(Kind).TargetSize + 7) / 8; 207| | // Used to point to big endian bytes 208| 1.38k| unsigned FullSize; 209| | 210| 1.38k| switch ((unsigned)Kind) { 211| 0| case FK_Data_2: ------------------ | Branch (211:3): [True: 0, False: 1.38k] ------------------ 212| 0| case Mips::fixup_Mips_16: ------------------ | Branch (212:3): [True: 0, False: 1.38k] ------------------ 213| 0| case Mips::fixup_MICROMIPS_PC10_S1: ------------------ | Branch (213:3): [True: 0, False: 1.38k] ------------------ 214| 0| FullSize = 2; 215| 0| break; 216| 0| case FK_Data_8: ------------------ | Branch (216:3): [True: 0, False: 1.38k] ------------------ 217| 0| case Mips::fixup_Mips_64: ------------------ | Branch (217:3): [True: 0, False: 1.38k] ------------------ 218| 0| FullSize = 8; 219| 0| break; 220| 1.37k| case FK_Data_4: ------------------ | Branch (220:3): [True: 1.37k, False: 5] ------------------ 221| 1.38k| default: ------------------ | Branch (221:3): [True: 5, False: 1.37k] ------------------ 222| 1.38k| FullSize = 4; 223| 1.38k| break; 224| 1.38k| } 225| | 226| | // Grab current value, if any, from bits. 227| 1.38k| uint64_t CurVal = 0; 228| | 229| 1.38k| bool microMipsLEByteOrder = needsMMLEByteOrder((unsigned) Kind); 230| | 231| 6.90k| for (unsigned i = 0; i != NumBytes; ++i) { ------------------ | Branch (231:24): [True: 5.52k, False: 1.38k] ------------------ 232| 5.52k| unsigned Idx = IsLittle ? (microMipsLEByteOrder ? calculateMMLEIndex(i) ------------------ | Branch (232:20): [True: 0, False: 5.52k] | Branch (232:32): [True: 0, False: 0] ------------------ 233| 0| : i) 234| 5.52k| : (FullSize - 1 - i); 235| 5.52k| CurVal |= (uint64_t)((uint8_t)Data[Offset + Idx]) << (i*8); 236| 5.52k| } 237| | 238| 1.38k| uint64_t Mask = ((uint64_t)(-1) >> 239| 1.38k| (64 - getFixupKindInfo(Kind).TargetSize)); 240| 1.38k| CurVal |= Value & Mask; 241| | 242| | // Write out the fixed up bytes back to the code/data bits. 243| 6.90k| for (unsigned i = 0; i != NumBytes; ++i) { ------------------ | Branch (243:24): [True: 5.52k, False: 1.38k] ------------------ 244| 5.52k| unsigned Idx = IsLittle ? (microMipsLEByteOrder ? calculateMMLEIndex(i) ------------------ | Branch (244:20): [True: 0, False: 5.52k] | Branch (244:32): [True: 0, False: 0] ------------------ 245| 0| : i) 246| 5.52k| : (FullSize - 1 - i); 247| 5.52k| Data[Offset + Idx] = (uint8_t)((CurVal >> (i*8)) & 0xff); 248| 5.52k| } 249| 1.38k|} _ZNK7llvm_ks14MipsAsmBackend12getFixupKindENS_9StringRefE: 251| 37|Optional MipsAsmBackend::getFixupKind(StringRef Name) const { 252| 37| return StringSwitch>(Name) 253| 37| .Case("R_MIPS_NONE", (MCFixupKind)Mips::fixup_Mips_NONE) 254| 37| .Case("R_MIPS_32", FK_Data_4) 255| 37| .Default(MCAsmBackend::getFixupKind(Name)); 256| 37|} _ZNK7llvm_ks14MipsAsmBackend16getFixupKindInfoENS_11MCFixupKindE: 259| 7.18k|getFixupKindInfo(MCFixupKind Kind) const { 260| 7.18k| const static MCFixupKindInfo LittleEndianInfos[Mips::NumTargetFixupKinds] = { 261| | // This table *must* be in same the order of fixup_* kinds in 262| | // MipsFixupKinds.h. 263| | // 264| | // name offset bits flags 265| 7.18k| { "fixup_Mips_NONE", 0, 0, 0 }, 266| 7.18k| { "fixup_Mips_16", 0, 16, 0 }, 267| 7.18k| { "fixup_Mips_32", 0, 32, 0 }, 268| 7.18k| { "fixup_Mips_REL32", 0, 32, 0 }, 269| 7.18k| { "fixup_Mips_26", 0, 26, 0 }, 270| 7.18k| { "fixup_Mips_HI16", 0, 16, 0 }, 271| 7.18k| { "fixup_Mips_LO16", 0, 16, 0 }, 272| 7.18k| { "fixup_Mips_GPREL16", 0, 16, 0 }, 273| 7.18k| { "fixup_Mips_LITERAL", 0, 16, 0 }, 274| 7.18k| { "fixup_Mips_GOT_Global", 0, 16, 0 }, 275| 7.18k| { "fixup_Mips_GOT_Local", 0, 16, 0 }, 276| 7.18k| { "fixup_Mips_PC16", 0, 16, MCFixupKindInfo::FKF_IsPCRel }, 277| 7.18k| { "fixup_Mips_CALL16", 0, 16, 0 }, 278| 7.18k| { "fixup_Mips_GPREL32", 0, 32, 0 }, 279| 7.18k| { "fixup_Mips_SHIFT5", 6, 5, 0 }, 280| 7.18k| { "fixup_Mips_SHIFT6", 6, 5, 0 }, 281| 7.18k| { "fixup_Mips_64", 0, 64, 0 }, 282| 7.18k| { "fixup_Mips_TLSGD", 0, 16, 0 }, 283| 7.18k| { "fixup_Mips_GOTTPREL", 0, 16, 0 }, 284| 7.18k| { "fixup_Mips_TPREL_HI", 0, 16, 0 }, 285| 7.18k| { "fixup_Mips_TPREL_LO", 0, 16, 0 }, 286| 7.18k| { "fixup_Mips_TLSLDM", 0, 16, 0 }, 287| 7.18k| { "fixup_Mips_DTPREL_HI", 0, 16, 0 }, 288| 7.18k| { "fixup_Mips_DTPREL_LO", 0, 16, 0 }, 289| 7.18k| { "fixup_Mips_Branch_PCRel", 0, 16, MCFixupKindInfo::FKF_IsPCRel }, 290| 7.18k| { "fixup_Mips_GPOFF_HI", 0, 16, 0 }, 291| 7.18k| { "fixup_Mips_GPOFF_LO", 0, 16, 0 }, 292| 7.18k| { "fixup_Mips_GOT_PAGE", 0, 16, 0 }, 293| 7.18k| { "fixup_Mips_GOT_OFST", 0, 16, 0 }, 294| 7.18k| { "fixup_Mips_GOT_DISP", 0, 16, 0 }, 295| 7.18k| { "fixup_Mips_HIGHER", 0, 16, 0 }, 296| 7.18k| { "fixup_Mips_HIGHEST", 0, 16, 0 }, 297| 7.18k| { "fixup_Mips_GOT_HI16", 0, 16, 0 }, 298| 7.18k| { "fixup_Mips_GOT_LO16", 0, 16, 0 }, 299| 7.18k| { "fixup_Mips_CALL_HI16", 0, 16, 0 }, 300| 7.18k| { "fixup_Mips_CALL_LO16", 0, 16, 0 }, 301| 7.18k| { "fixup_Mips_PC18_S3", 0, 18, MCFixupKindInfo::FKF_IsPCRel }, 302| 7.18k| { "fixup_MIPS_PC19_S2", 0, 19, MCFixupKindInfo::FKF_IsPCRel }, 303| 7.18k| { "fixup_MIPS_PC21_S2", 0, 21, MCFixupKindInfo::FKF_IsPCRel }, 304| 7.18k| { "fixup_MIPS_PC26_S2", 0, 26, MCFixupKindInfo::FKF_IsPCRel }, 305| 7.18k| { "fixup_MIPS_PCHI16", 0, 16, MCFixupKindInfo::FKF_IsPCRel }, 306| 7.18k| { "fixup_MIPS_PCLO16", 0, 16, MCFixupKindInfo::FKF_IsPCRel }, 307| 7.18k| { "fixup_MICROMIPS_26_S1", 0, 26, 0 }, 308| 7.18k| { "fixup_MICROMIPS_HI16", 0, 16, 0 }, 309| 7.18k| { "fixup_MICROMIPS_LO16", 0, 16, 0 }, 310| 7.18k| { "fixup_MICROMIPS_GOT16", 0, 16, 0 }, 311| 7.18k| { "fixup_MICROMIPS_PC7_S1", 0, 7, MCFixupKindInfo::FKF_IsPCRel }, 312| 7.18k| { "fixup_MICROMIPS_PC10_S1", 0, 10, MCFixupKindInfo::FKF_IsPCRel }, 313| 7.18k| { "fixup_MICROMIPS_PC16_S1", 0, 16, MCFixupKindInfo::FKF_IsPCRel }, 314| 7.18k| { "fixup_MICROMIPS_CALL16", 0, 16, 0 }, 315| 7.18k| { "fixup_MICROMIPS_GOT_DISP", 0, 16, 0 }, 316| 7.18k| { "fixup_MICROMIPS_GOT_PAGE", 0, 16, 0 }, 317| 7.18k| { "fixup_MICROMIPS_GOT_OFST", 0, 16, 0 }, 318| 7.18k| { "fixup_MICROMIPS_TLS_GD", 0, 16, 0 }, 319| 7.18k| { "fixup_MICROMIPS_TLS_LDM", 0, 16, 0 }, 320| 7.18k| { "fixup_MICROMIPS_TLS_DTPREL_HI16", 0, 16, 0 }, 321| 7.18k| { "fixup_MICROMIPS_TLS_DTPREL_LO16", 0, 16, 0 }, 322| 7.18k| { "fixup_MICROMIPS_TLS_TPREL_HI16", 0, 16, 0 }, 323| 7.18k| { "fixup_MICROMIPS_TLS_TPREL_LO16", 0, 16, 0 } 324| 7.18k| }; 325| | 326| 7.18k| const static MCFixupKindInfo BigEndianInfos[Mips::NumTargetFixupKinds] = { 327| | // This table *must* be in same the order of fixup_* kinds in 328| | // MipsFixupKinds.h. 329| | // 330| | // name offset bits flags 331| 7.18k| { "fixup_Mips_NONE", 0, 0, 0 }, 332| 7.18k| { "fixup_Mips_16", 16, 16, 0 }, 333| 7.18k| { "fixup_Mips_32", 0, 32, 0 }, 334| 7.18k| { "fixup_Mips_REL32", 0, 32, 0 }, 335| 7.18k| { "fixup_Mips_26", 6, 26, 0 }, 336| 7.18k| { "fixup_Mips_HI16", 16, 16, 0 }, 337| 7.18k| { "fixup_Mips_LO16", 16, 16, 0 }, 338| 7.18k| { "fixup_Mips_GPREL16", 16, 16, 0 }, 339| 7.18k| { "fixup_Mips_LITERAL", 16, 16, 0 }, 340| 7.18k| { "fixup_Mips_GOT_Global", 16, 16, 0 }, 341| 7.18k| { "fixup_Mips_GOT_Local", 16, 16, 0 }, 342| 7.18k| { "fixup_Mips_PC16", 16, 16, MCFixupKindInfo::FKF_IsPCRel }, 343| 7.18k| { "fixup_Mips_CALL16", 16, 16, 0 }, 344| 7.18k| { "fixup_Mips_GPREL32", 0, 32, 0 }, 345| 7.18k| { "fixup_Mips_SHIFT5", 21, 5, 0 }, 346| 7.18k| { "fixup_Mips_SHIFT6", 21, 5, 0 }, 347| 7.18k| { "fixup_Mips_64", 0, 64, 0 }, 348| 7.18k| { "fixup_Mips_TLSGD", 16, 16, 0 }, 349| 7.18k| { "fixup_Mips_GOTTPREL", 16, 16, 0 }, 350| 7.18k| { "fixup_Mips_TPREL_HI", 16, 16, 0 }, 351| 7.18k| { "fixup_Mips_TPREL_LO", 16, 16, 0 }, 352| 7.18k| { "fixup_Mips_TLSLDM", 16, 16, 0 }, 353| 7.18k| { "fixup_Mips_DTPREL_HI", 16, 16, 0 }, 354| 7.18k| { "fixup_Mips_DTPREL_LO", 16, 16, 0 }, 355| 7.18k| { "fixup_Mips_Branch_PCRel",16, 16, MCFixupKindInfo::FKF_IsPCRel }, 356| 7.18k| { "fixup_Mips_GPOFF_HI", 16, 16, 0 }, 357| 7.18k| { "fixup_Mips_GPOFF_LO", 16, 16, 0 }, 358| 7.18k| { "fixup_Mips_GOT_PAGE", 16, 16, 0 }, 359| 7.18k| { "fixup_Mips_GOT_OFST", 16, 16, 0 }, 360| 7.18k| { "fixup_Mips_GOT_DISP", 16, 16, 0 }, 361| 7.18k| { "fixup_Mips_HIGHER", 16, 16, 0 }, 362| 7.18k| { "fixup_Mips_HIGHEST", 16, 16, 0 }, 363| 7.18k| { "fixup_Mips_GOT_HI16", 16, 16, 0 }, 364| 7.18k| { "fixup_Mips_GOT_LO16", 16, 16, 0 }, 365| 7.18k| { "fixup_Mips_CALL_HI16", 16, 16, 0 }, 366| 7.18k| { "fixup_Mips_CALL_LO16", 16, 16, 0 }, 367| 7.18k| { "fixup_Mips_PC18_S3", 14, 18, MCFixupKindInfo::FKF_IsPCRel }, 368| 7.18k| { "fixup_MIPS_PC19_S2", 13, 19, MCFixupKindInfo::FKF_IsPCRel }, 369| 7.18k| { "fixup_MIPS_PC21_S2", 11, 21, MCFixupKindInfo::FKF_IsPCRel }, 370| 7.18k| { "fixup_MIPS_PC26_S2", 6, 26, MCFixupKindInfo::FKF_IsPCRel }, 371| 7.18k| { "fixup_MIPS_PCHI16", 16, 16, MCFixupKindInfo::FKF_IsPCRel }, 372| 7.18k| { "fixup_MIPS_PCLO16", 16, 16, MCFixupKindInfo::FKF_IsPCRel }, 373| 7.18k| { "fixup_MICROMIPS_26_S1", 6, 26, 0 }, 374| 7.18k| { "fixup_MICROMIPS_HI16", 16, 16, 0 }, 375| 7.18k| { "fixup_MICROMIPS_LO16", 16, 16, 0 }, 376| 7.18k| { "fixup_MICROMIPS_GOT16", 16, 16, 0 }, 377| 7.18k| { "fixup_MICROMIPS_PC7_S1", 9, 7, MCFixupKindInfo::FKF_IsPCRel }, 378| 7.18k| { "fixup_MICROMIPS_PC10_S1", 6, 10, MCFixupKindInfo::FKF_IsPCRel }, 379| 7.18k| { "fixup_MICROMIPS_PC16_S1",16, 16, MCFixupKindInfo::FKF_IsPCRel }, 380| 7.18k| { "fixup_MICROMIPS_CALL16", 16, 16, 0 }, 381| 7.18k| { "fixup_MICROMIPS_GOT_DISP", 16, 16, 0 }, 382| 7.18k| { "fixup_MICROMIPS_GOT_PAGE", 16, 16, 0 }, 383| 7.18k| { "fixup_MICROMIPS_GOT_OFST", 16, 16, 0 }, 384| 7.18k| { "fixup_MICROMIPS_TLS_GD", 16, 16, 0 }, 385| 7.18k| { "fixup_MICROMIPS_TLS_LDM", 16, 16, 0 }, 386| 7.18k| { "fixup_MICROMIPS_TLS_DTPREL_HI16", 16, 16, 0 }, 387| 7.18k| { "fixup_MICROMIPS_TLS_DTPREL_LO16", 16, 16, 0 }, 388| 7.18k| { "fixup_MICROMIPS_TLS_TPREL_HI16", 16, 16, 0 }, 389| 7.18k| { "fixup_MICROMIPS_TLS_TPREL_LO16", 16, 16, 0 } 390| 7.18k| }; 391| | 392| 7.18k| if (Kind < FirstTargetFixupKind) ------------------ | Branch (392:7): [True: 6.90k, False: 274] ------------------ 393| 6.90k| return MCAsmBackend::getFixupKindInfo(Kind); 394| | 395| 7.18k| assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() && ------------------ | Branch (395:3): [True: 274, False: 0] | Branch (395:3): [True: 274, Folded] | Branch (395:3): [True: 274, False: 0] ------------------ 396| 274| "Invalid kind!"); 397| | 398| 274| if (IsLittle) ------------------ | Branch (398:7): [True: 0, False: 274] ------------------ 399| 0| return LittleEndianInfos[Kind - FirstTargetFixupKind]; 400| 274| return BigEndianInfos[Kind - FirstTargetFixupKind]; 401| 274|} _ZNK7llvm_ks14MipsAsmBackend12writeNopDataEmPNS_14MCObjectWriterE: 408| 251|bool MipsAsmBackend::writeNopData(uint64_t Count, MCObjectWriter *OW) const { 409| | // Check for a less than instruction size number of bytes 410| | // FIXME: 16 bit instructions are not handled yet here. 411| | // We shouldn't be using a hard coded number for instruction size. 412| | 413| | // If the count is not 4-byte aligned, we must be writing data into the text 414| | // section (otherwise we have unaligned instructions, and thus have far 415| | // bigger problems), so just write zeros instead. 416| 251| OW->WriteZeros(Count); 417| 251| return true; 418| 251|} _ZN7llvm_ks14MipsAsmBackend17processFixupValueERKNS_11MCAssemblerERKNS_11MCAsmLayoutERKNS_7MCFixupEPKNS_10MCFragmentERKNS_7MCValueERmRb: 428| 1.44k| bool &IsResolved) { 429| | // At this point we'll ignore the value returned by adjustFixupValue as 430| | // we are only checking if the fixup can be applied correctly. We have 431| | // access to MCContext from here which allows us to report a fatal error 432| | // with *possibly* a source code location. 433| 1.44k| (void)adjustFixupValue(Fixup, Value, &Asm.getContext()); 434| 1.44k|} _ZN7llvm_ks24createMipsAsmBackendEB32ERKNS_6TargetERKNS_14MCRegisterInfoERKNS_6TripleENS_9StringRefE: 446| 749| const Triple &TT, StringRef CPU) { 447| 749| return new MipsAsmBackend(T, TT.getOS(), /*IsLittle*/ false, 448| 749| /*Is64Bit*/ false); 449| 749|} MipsAsmBackend.cpp:_ZL16adjustFixupValueRKN7llvm_ks7MCFixupEmPNS_9MCContextE: 34| 2.89k| MCContext *Ctx = nullptr) { 35| | 36| 2.89k| unsigned Kind = Fixup.getKind(); 37| | 38| | // Add/subtract and shift 39| 2.89k| switch (Kind) { 40| 118| default: ------------------ | Branch (40:3): [True: 118, False: 2.77k] ------------------ 41| 118| return 0; 42| 0| case FK_Data_2: ------------------ | Branch (42:3): [True: 0, False: 2.89k] ------------------ 43| 0| case FK_GPRel_4: ------------------ | Branch (43:3): [True: 0, False: 2.89k] ------------------ 44| 2.75k| case FK_Data_4: ------------------ | Branch (44:3): [True: 2.75k, False: 138] ------------------ 45| 2.75k| case FK_Data_8: ------------------ | Branch (45:3): [True: 0, False: 2.89k] ------------------ 46| 2.75k| case Mips::fixup_Mips_LO16: ------------------ | Branch (46:3): [True: 0, False: 2.89k] ------------------ 47| 2.75k| case Mips::fixup_Mips_GPREL16: ------------------ | Branch (47:3): [True: 0, False: 2.89k] ------------------ 48| 2.75k| case Mips::fixup_Mips_GPOFF_HI: ------------------ | Branch (48:3): [True: 0, False: 2.89k] ------------------ 49| 2.75k| case Mips::fixup_Mips_GPOFF_LO: ------------------ | Branch (49:3): [True: 0, False: 2.89k] ------------------ 50| 2.75k| case Mips::fixup_Mips_GOT_PAGE: ------------------ | Branch (50:3): [True: 0, False: 2.89k] ------------------ 51| 2.75k| case Mips::fixup_Mips_GOT_OFST: ------------------ | Branch (51:3): [True: 0, False: 2.89k] ------------------ 52| 2.75k| case Mips::fixup_Mips_GOT_DISP: ------------------ | Branch (52:3): [True: 0, False: 2.89k] ------------------ 53| 2.75k| case Mips::fixup_Mips_GOT_LO16: ------------------ | Branch (53:3): [True: 0, False: 2.89k] ------------------ 54| 2.75k| case Mips::fixup_Mips_CALL_LO16: ------------------ | Branch (54:3): [True: 0, False: 2.89k] ------------------ 55| 2.75k| case Mips::fixup_MICROMIPS_LO16: ------------------ | Branch (55:3): [True: 0, False: 2.89k] ------------------ 56| 2.75k| case Mips::fixup_MICROMIPS_GOT_PAGE: ------------------ | Branch (56:3): [True: 0, False: 2.89k] ------------------ 57| 2.75k| case Mips::fixup_MICROMIPS_GOT_OFST: ------------------ | Branch (57:3): [True: 0, False: 2.89k] ------------------ 58| 2.75k| case Mips::fixup_MICROMIPS_GOT_DISP: ------------------ | Branch (58:3): [True: 0, False: 2.89k] ------------------ 59| 2.75k| case Mips::fixup_MIPS_PCLO16: ------------------ | Branch (59:3): [True: 0, False: 2.89k] ------------------ 60| 2.75k| break; 61| 0| case Mips::fixup_Mips_PC16: ------------------ | Branch (61:3): [True: 0, False: 2.89k] ------------------ 62| | // The displacement is then divided by 4 to give us an 18 bit 63| | // address range. Forcing a signed division because Value can be negative. 64| 0| Value = (int64_t)Value / 4; 65| | // We now check if Value can be encoded as a 16-bit signed immediate. 66| 0| if (!isInt<16>(Value) && Ctx) { ------------------ | Branch (66:9): [True: 0, False: 0] | Branch (66:30): [True: 0, False: 0] ------------------ 67| 0| Ctx->reportError(Fixup.getLoc(), "out of range PC16 fixup"); 68| 0| return 0; 69| 0| } 70| 0| break; 71| 0| case Mips::fixup_MIPS_PC19_S2: ------------------ | Branch (71:3): [True: 0, False: 2.89k] ------------------ 72| | // Forcing a signed division because Value can be negative. 73| 0| Value = (int64_t)Value / 4; 74| | // We now check if Value can be encoded as a 19-bit signed immediate. 75| 0| if (!isInt<19>(Value) && Ctx) { ------------------ | Branch (75:9): [True: 0, False: 0] | Branch (75:30): [True: 0, False: 0] ------------------ 76| 0| Ctx->reportError(Fixup.getLoc(), "out of range PC19 fixup"); 77| 0| return 0; 78| 0| } 79| 0| break; 80| 20| case Mips::fixup_Mips_26: ------------------ | Branch (80:3): [True: 20, False: 2.87k] ------------------ 81| | // So far we are only using this type for jumps. 82| | // The displacement is then divided by 4 to give us an 28 bit 83| | // address range. 84| 20| Value >>= 2; 85| 20| break; 86| 0| case Mips::fixup_Mips_HI16: ------------------ | Branch (86:3): [True: 0, False: 2.89k] ------------------ 87| 0| case Mips::fixup_Mips_GOT_Local: ------------------ | Branch (87:3): [True: 0, False: 2.89k] ------------------ 88| 0| case Mips::fixup_Mips_GOT_HI16: ------------------ | Branch (88:3): [True: 0, False: 2.89k] ------------------ 89| 0| case Mips::fixup_Mips_CALL_HI16: ------------------ | Branch (89:3): [True: 0, False: 2.89k] ------------------ 90| 0| case Mips::fixup_MICROMIPS_HI16: ------------------ | Branch (90:3): [True: 0, False: 2.89k] ------------------ 91| 0| case Mips::fixup_MIPS_PCHI16: ------------------ | Branch (91:3): [True: 0, False: 2.89k] ------------------ 92| | // Get the 2nd 16-bits. Also add 1 if bit 15 is 1. 93| 0| Value = ((Value + 0x8000) >> 16) & 0xffff; 94| 0| break; 95| 0| case Mips::fixup_Mips_HIGHER: ------------------ | Branch (95:3): [True: 0, False: 2.89k] ------------------ 96| | // Get the 3rd 16-bits. 97| 0| Value = ((Value + 0x80008000LL) >> 32) & 0xffff; 98| 0| break; 99| 0| case Mips::fixup_Mips_HIGHEST: ------------------ | Branch (99:3): [True: 0, False: 2.89k] ------------------ 100| | // Get the 4th 16-bits. 101| 0| Value = ((Value + 0x800080008000LL) >> 48) & 0xffff; 102| 0| break; 103| 0| case Mips::fixup_MICROMIPS_26_S1: ------------------ | Branch (103:3): [True: 0, False: 2.89k] ------------------ 104| 0| Value >>= 1; 105| 0| break; 106| 0| case Mips::fixup_MICROMIPS_PC7_S1: ------------------ | Branch (106:3): [True: 0, False: 2.89k] ------------------ 107| 0| Value -= 4; 108| | // Forcing a signed division because Value can be negative. 109| 0| Value = (int64_t) Value / 2; 110| | // We now check if Value can be encoded as a 7-bit signed immediate. 111| 0| if (!isInt<7>(Value) && Ctx) { ------------------ | Branch (111:9): [True: 0, False: 0] | Branch (111:29): [True: 0, False: 0] ------------------ 112| 0| Ctx->reportError(Fixup.getLoc(), "out of range PC7 fixup"); 113| 0| return 0; 114| 0| } 115| 0| break; 116| 0| case Mips::fixup_MICROMIPS_PC10_S1: ------------------ | Branch (116:3): [True: 0, False: 2.89k] ------------------ 117| 0| Value -= 2; 118| | // Forcing a signed division because Value can be negative. 119| 0| Value = (int64_t) Value / 2; 120| | // We now check if Value can be encoded as a 10-bit signed immediate. 121| 0| if (!isInt<10>(Value) && Ctx) { ------------------ | Branch (121:9): [True: 0, False: 0] | Branch (121:30): [True: 0, False: 0] ------------------ 122| 0| Ctx->reportError(Fixup.getLoc(), "out of range PC10 fixup"); 123| 0| return 0; 124| 0| } 125| 0| break; 126| 0| case Mips::fixup_MICROMIPS_PC16_S1: ------------------ | Branch (126:3): [True: 0, False: 2.89k] ------------------ 127| 0| Value -= 4; 128| | // Forcing a signed division because Value can be negative. 129| 0| Value = (int64_t)Value / 2; 130| | // We now check if Value can be encoded as a 16-bit signed immediate. 131| 0| if (!isInt<16>(Value) && Ctx) { ------------------ | Branch (131:9): [True: 0, False: 0] | Branch (131:30): [True: 0, False: 0] ------------------ 132| 0| Ctx->reportError(Fixup.getLoc(), "out of range PC16 fixup"); 133| 0| return 0; 134| 0| } 135| 0| break; 136| 0| case Mips::fixup_MIPS_PC18_S3: ------------------ | Branch (136:3): [True: 0, False: 2.89k] ------------------ 137| | // Forcing a signed division because Value can be negative. 138| 0| Value = (int64_t)Value / 8; 139| | // We now check if Value can be encoded as a 18-bit signed immediate. 140| 0| if (!isInt<18>(Value) && Ctx) { ------------------ | Branch (140:9): [True: 0, False: 0] | Branch (140:30): [True: 0, False: 0] ------------------ 141| 0| Ctx->reportError(Fixup.getLoc(), "out of range PC18 fixup"); 142| 0| return 0; 143| 0| } 144| 0| break; 145| 0| case Mips::fixup_MIPS_PC21_S2: ------------------ | Branch (145:3): [True: 0, False: 2.89k] ------------------ 146| | // Forcing a signed division because Value can be negative. 147| 0| Value = (int64_t) Value / 4; 148| | // We now check if Value can be encoded as a 21-bit signed immediate. 149| 0| if (!isInt<21>(Value) && Ctx) { ------------------ | Branch (149:9): [True: 0, False: 0] | Branch (149:30): [True: 0, False: 0] ------------------ 150| 0| Ctx->reportError(Fixup.getLoc(), "out of range PC21 fixup"); 151| 0| return 0; 152| 0| } 153| 0| break; 154| 0| case Mips::fixup_MIPS_PC26_S2: ------------------ | Branch (154:3): [True: 0, False: 2.89k] ------------------ 155| | // Forcing a signed division because Value can be negative. 156| 0| Value = (int64_t) Value / 4; 157| | // We now check if Value can be encoded as a 26-bit signed immediate. 158| 0| if (!isInt<26>(Value) && Ctx) { ------------------ | Branch (158:9): [True: 0, False: 0] | Branch (158:30): [True: 0, False: 0] ------------------ 159| 0| Ctx->reportError(Fixup.getLoc(), "out of range PC26 fixup"); 160| 0| return 0; 161| 0| } 162| 0| break; 163| 2.89k| } 164| | 165| 2.77k| return Value; 166| 2.89k|} MipsAsmBackend.cpp:_ZL18needsMMLEByteOrderj: 178| 1.38k|static bool needsMMLEByteOrder(unsigned Kind) { 179| 1.38k| return Kind != Mips::fixup_MICROMIPS_PC10_S1 && ------------------ | Branch (179:10): [True: 1.38k, False: 0] ------------------ 180| 1.38k| Kind >= Mips::fixup_MICROMIPS_26_S1 && ------------------ | Branch (180:10): [True: 0, False: 1.38k] ------------------ 181| 0| Kind < Mips::LastTargetFixupKind; ------------------ | Branch (181:10): [True: 0, False: 0] ------------------ 182| 1.38k|} _ZN7llvm_ks14MipsAsmBackendC2ERKNS_6TargetENS_6Triple6OSTypeEbb: 37| 749| : MCAsmBackend(), OSType(OSType), IsLittle(IsLittle), Is64Bit(Is64Bit) {} _ZNK7llvm_ks14MipsAsmBackend16getNumFixupKindsEv: 47| 274| unsigned getNumFixupKinds() const override { 48| 274| return Mips::NumTargetFixupKinds; 49| 274| } _ZNK7llvm_ks14MipsAsmBackend17mayNeedRelaxationERKNS_6MCInstE: 58| 8.24k| bool mayNeedRelaxation(const MCInst &Inst) const override { 59| 8.24k| return false; 60| 8.24k| } _ZN7llvm_ks25createMipsELFObjectWriterERNS_17raw_pwrite_streamEhbb: 429| 749| bool Is64Bit) { 430| 749| MCELFObjectTargetWriter *MOTW = 431| 749| new MipsELFObjectWriter(Is64Bit, OSABI, Is64Bit, IsLittleEndian); 432| 749| return createELFObjectWriter(MOTW, OS, IsLittleEndian); 433| 749|} MipsELFObjectWriter.cpp:_ZN12_GLOBAL__N_119MipsELFObjectWriterC2Ebhbb: 58| 749| : MCELFObjectTargetWriter(_is64Bit, OSABI, ELF::EM_MIPS, 59| 749| /*HasRelocationAddend*/ _isN64, 60| 749| /*IsN64*/ _isN64) {} MipsELFObjectWriter.cpp:_ZNK12_GLOBAL__N_119MipsELFObjectWriter12getRelocTypeERN7llvm_ks9MCContextERKNS1_7MCValueERKNS1_7MCFixupEb: 67| 399| bool IsPCRel) const { 68| | // Determine the type of the relocation. 69| 399| unsigned Kind = (unsigned)Fixup.getKind(); 70| | 71| 399| switch (Kind) { ------------------ | Branch (71:11): [True: 399, False: 0] ------------------ 72| 0| case Mips::fixup_Mips_NONE: ------------------ | Branch (72:3): [True: 0, False: 399] ------------------ 73| 0| return ELF::R_MIPS_NONE; 74| 0| case Mips::fixup_Mips_16: ------------------ | Branch (74:3): [True: 0, False: 399] ------------------ 75| 0| case FK_Data_2: ------------------ | Branch (75:3): [True: 0, False: 399] ------------------ 76| 0| return IsPCRel ? ELF::R_MIPS_PC16 : ELF::R_MIPS_16; ------------------ | Branch (76:12): [True: 0, False: 0] ------------------ 77| 59| case Mips::fixup_Mips_32: ------------------ | Branch (77:3): [True: 59, False: 340] ------------------ 78| 399| case FK_Data_4: ------------------ | Branch (78:3): [True: 340, False: 59] ------------------ 79| 399| return IsPCRel ? ELF::R_MIPS_PC32 : ELF::R_MIPS_32; ------------------ | Branch (79:12): [True: 1, False: 398] ------------------ 80| 399| } 81| | 82| 0| if (IsPCRel) { ------------------ | Branch (82:7): [True: 0, False: 0] ------------------ 83| 0| switch (Kind) { ------------------ | Branch (83:13): [True: 0, False: 0] ------------------ 84| 0| case Mips::fixup_Mips_Branch_PCRel: ------------------ | Branch (84:5): [True: 0, False: 0] ------------------ 85| 0| case Mips::fixup_Mips_PC16: ------------------ | Branch (85:5): [True: 0, False: 0] ------------------ 86| 0| return ELF::R_MIPS_PC16; 87| 0| case Mips::fixup_MICROMIPS_PC7_S1: ------------------ | Branch (87:5): [True: 0, False: 0] ------------------ 88| 0| return ELF::R_MICROMIPS_PC7_S1; 89| 0| case Mips::fixup_MICROMIPS_PC10_S1: ------------------ | Branch (89:5): [True: 0, False: 0] ------------------ 90| 0| return ELF::R_MICROMIPS_PC10_S1; 91| 0| case Mips::fixup_MICROMIPS_PC16_S1: ------------------ | Branch (91:5): [True: 0, False: 0] ------------------ 92| 0| return ELF::R_MICROMIPS_PC16_S1; 93| 0| case Mips::fixup_MIPS_PC19_S2: ------------------ | Branch (93:5): [True: 0, False: 0] ------------------ 94| 0| return ELF::R_MIPS_PC19_S2; 95| 0| case Mips::fixup_MIPS_PC18_S3: ------------------ | Branch (95:5): [True: 0, False: 0] ------------------ 96| 0| return ELF::R_MIPS_PC18_S3; 97| 0| case Mips::fixup_MIPS_PC21_S2: ------------------ | Branch (97:5): [True: 0, False: 0] ------------------ 98| 0| return ELF::R_MIPS_PC21_S2; 99| 0| case Mips::fixup_MIPS_PC26_S2: ------------------ | Branch (99:5): [True: 0, False: 0] ------------------ 100| 0| return ELF::R_MIPS_PC26_S2; 101| 0| case Mips::fixup_MIPS_PCHI16: ------------------ | Branch (101:5): [True: 0, False: 0] ------------------ 102| 0| return ELF::R_MIPS_PCHI16; 103| 0| case Mips::fixup_MIPS_PCLO16: ------------------ | Branch (103:5): [True: 0, False: 0] ------------------ 104| 0| return ELF::R_MIPS_PCLO16; 105| 0| } 106| | 107| 0| llvm_unreachable("invalid PC-relative fixup kind!"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ 108| 0| } 109| | 110| 0| switch (Kind) { ------------------ | Branch (110:11): [True: 0, False: 0] ------------------ 111| 0| case Mips::fixup_Mips_64: ------------------ | Branch (111:3): [True: 0, False: 0] ------------------ 112| 0| case FK_Data_8: ------------------ | Branch (112:3): [True: 0, False: 0] ------------------ 113| 0| return ELF::R_MIPS_64; 114| 0| case FK_GPRel_4: ------------------ | Branch (114:3): [True: 0, False: 0] ------------------ 115| 0| if (isN64()) { ------------------ | Branch (115:9): [True: 0, False: 0] ------------------ 116| 0| unsigned Type = (unsigned)ELF::R_MIPS_NONE; 117| 0| Type = setRType((unsigned)ELF::R_MIPS_GPREL32, Type); 118| 0| Type = setRType2((unsigned)ELF::R_MIPS_64, Type); 119| 0| Type = setRType3((unsigned)ELF::R_MIPS_NONE, Type); 120| 0| return Type; 121| 0| } 122| 0| return ELF::R_MIPS_GPREL32; 123| 0| case Mips::fixup_Mips_GPREL16: ------------------ | Branch (123:3): [True: 0, False: 0] ------------------ 124| 0| return ELF::R_MIPS_GPREL16; 125| 0| case Mips::fixup_Mips_26: ------------------ | Branch (125:3): [True: 0, False: 0] ------------------ 126| 0| return ELF::R_MIPS_26; 127| 0| case Mips::fixup_Mips_CALL16: ------------------ | Branch (127:3): [True: 0, False: 0] ------------------ 128| 0| return ELF::R_MIPS_CALL16; 129| 0| case Mips::fixup_Mips_GOT_Global: ------------------ | Branch (129:3): [True: 0, False: 0] ------------------ 130| 0| case Mips::fixup_Mips_GOT_Local: ------------------ | Branch (130:3): [True: 0, False: 0] ------------------ 131| 0| return ELF::R_MIPS_GOT16; 132| 0| case Mips::fixup_Mips_HI16: ------------------ | Branch (132:3): [True: 0, False: 0] ------------------ 133| 0| return ELF::R_MIPS_HI16; 134| 0| case Mips::fixup_Mips_LO16: ------------------ | Branch (134:3): [True: 0, False: 0] ------------------ 135| 0| return ELF::R_MIPS_LO16; 136| 0| case Mips::fixup_Mips_TLSGD: ------------------ | Branch (136:3): [True: 0, False: 0] ------------------ 137| 0| return ELF::R_MIPS_TLS_GD; 138| 0| case Mips::fixup_Mips_GOTTPREL: ------------------ | Branch (138:3): [True: 0, False: 0] ------------------ 139| 0| return ELF::R_MIPS_TLS_GOTTPREL; 140| 0| case Mips::fixup_Mips_TPREL_HI: ------------------ | Branch (140:3): [True: 0, False: 0] ------------------ 141| 0| return ELF::R_MIPS_TLS_TPREL_HI16; 142| 0| case Mips::fixup_Mips_TPREL_LO: ------------------ | Branch (142:3): [True: 0, False: 0] ------------------ 143| 0| return ELF::R_MIPS_TLS_TPREL_LO16; 144| 0| case Mips::fixup_Mips_TLSLDM: ------------------ | Branch (144:3): [True: 0, False: 0] ------------------ 145| 0| return ELF::R_MIPS_TLS_LDM; 146| 0| case Mips::fixup_Mips_DTPREL_HI: ------------------ | Branch (146:3): [True: 0, False: 0] ------------------ 147| 0| return ELF::R_MIPS_TLS_DTPREL_HI16; 148| 0| case Mips::fixup_Mips_DTPREL_LO: ------------------ | Branch (148:3): [True: 0, False: 0] ------------------ 149| 0| return ELF::R_MIPS_TLS_DTPREL_LO16; 150| 0| case Mips::fixup_Mips_GOT_PAGE: ------------------ | Branch (150:3): [True: 0, False: 0] ------------------ 151| 0| return ELF::R_MIPS_GOT_PAGE; 152| 0| case Mips::fixup_Mips_GOT_OFST: ------------------ | Branch (152:3): [True: 0, False: 0] ------------------ 153| 0| return ELF::R_MIPS_GOT_OFST; 154| 0| case Mips::fixup_Mips_GOT_DISP: ------------------ | Branch (154:3): [True: 0, False: 0] ------------------ 155| 0| return ELF::R_MIPS_GOT_DISP; 156| 0| case Mips::fixup_Mips_GPOFF_HI: { ------------------ | Branch (156:3): [True: 0, False: 0] ------------------ 157| 0| unsigned Type = (unsigned)ELF::R_MIPS_NONE; 158| 0| Type = setRType((unsigned)ELF::R_MIPS_GPREL16, Type); 159| 0| Type = setRType2((unsigned)ELF::R_MIPS_SUB, Type); 160| 0| Type = setRType3((unsigned)ELF::R_MIPS_HI16, Type); 161| 0| return Type; 162| 0| } 163| 0| case Mips::fixup_Mips_GPOFF_LO: { ------------------ | Branch (163:3): [True: 0, False: 0] ------------------ 164| 0| unsigned Type = (unsigned)ELF::R_MIPS_NONE; 165| 0| Type = setRType((unsigned)ELF::R_MIPS_GPREL16, Type); 166| 0| Type = setRType2((unsigned)ELF::R_MIPS_SUB, Type); 167| 0| Type = setRType3((unsigned)ELF::R_MIPS_LO16, Type); 168| 0| return Type; 169| 0| } 170| 0| case Mips::fixup_Mips_HIGHER: ------------------ | Branch (170:3): [True: 0, False: 0] ------------------ 171| 0| return ELF::R_MIPS_HIGHER; 172| 0| case Mips::fixup_Mips_HIGHEST: ------------------ | Branch (172:3): [True: 0, False: 0] ------------------ 173| 0| return ELF::R_MIPS_HIGHEST; 174| 0| case Mips::fixup_Mips_GOT_HI16: ------------------ | Branch (174:3): [True: 0, False: 0] ------------------ 175| 0| return ELF::R_MIPS_GOT_HI16; 176| 0| case Mips::fixup_Mips_GOT_LO16: ------------------ | Branch (176:3): [True: 0, False: 0] ------------------ 177| 0| return ELF::R_MIPS_GOT_LO16; 178| 0| case Mips::fixup_Mips_CALL_HI16: ------------------ | Branch (178:3): [True: 0, False: 0] ------------------ 179| 0| return ELF::R_MIPS_CALL_HI16; 180| 0| case Mips::fixup_Mips_CALL_LO16: ------------------ | Branch (180:3): [True: 0, False: 0] ------------------ 181| 0| return ELF::R_MIPS_CALL_LO16; 182| 0| case Mips::fixup_MICROMIPS_26_S1: ------------------ | Branch (182:3): [True: 0, False: 0] ------------------ 183| 0| return ELF::R_MICROMIPS_26_S1; 184| 0| case Mips::fixup_MICROMIPS_HI16: ------------------ | Branch (184:3): [True: 0, False: 0] ------------------ 185| 0| return ELF::R_MICROMIPS_HI16; 186| 0| case Mips::fixup_MICROMIPS_LO16: ------------------ | Branch (186:3): [True: 0, False: 0] ------------------ 187| 0| return ELF::R_MICROMIPS_LO16; 188| 0| case Mips::fixup_MICROMIPS_GOT16: ------------------ | Branch (188:3): [True: 0, False: 0] ------------------ 189| 0| return ELF::R_MICROMIPS_GOT16; 190| 0| case Mips::fixup_MICROMIPS_CALL16: ------------------ | Branch (190:3): [True: 0, False: 0] ------------------ 191| 0| return ELF::R_MICROMIPS_CALL16; 192| 0| case Mips::fixup_MICROMIPS_GOT_DISP: ------------------ | Branch (192:3): [True: 0, False: 0] ------------------ 193| 0| return ELF::R_MICROMIPS_GOT_DISP; 194| 0| case Mips::fixup_MICROMIPS_GOT_PAGE: ------------------ | Branch (194:3): [True: 0, False: 0] ------------------ 195| 0| return ELF::R_MICROMIPS_GOT_PAGE; 196| 0| case Mips::fixup_MICROMIPS_GOT_OFST: ------------------ | Branch (196:3): [True: 0, False: 0] ------------------ 197| 0| return ELF::R_MICROMIPS_GOT_OFST; 198| 0| case Mips::fixup_MICROMIPS_TLS_GD: ------------------ | Branch (198:3): [True: 0, False: 0] ------------------ 199| 0| return ELF::R_MICROMIPS_TLS_GD; 200| 0| case Mips::fixup_MICROMIPS_TLS_LDM: ------------------ | Branch (200:3): [True: 0, False: 0] ------------------ 201| 0| return ELF::R_MICROMIPS_TLS_LDM; 202| 0| case Mips::fixup_MICROMIPS_TLS_DTPREL_HI16: ------------------ | Branch (202:3): [True: 0, False: 0] ------------------ 203| 0| return ELF::R_MICROMIPS_TLS_DTPREL_HI16; 204| 0| case Mips::fixup_MICROMIPS_TLS_DTPREL_LO16: ------------------ | Branch (204:3): [True: 0, False: 0] ------------------ 205| 0| return ELF::R_MICROMIPS_TLS_DTPREL_LO16; 206| 0| case Mips::fixup_MICROMIPS_TLS_TPREL_HI16: ------------------ | Branch (206:3): [True: 0, False: 0] ------------------ 207| 0| return ELF::R_MICROMIPS_TLS_TPREL_HI16; 208| 0| case Mips::fixup_MICROMIPS_TLS_TPREL_LO16: ------------------ | Branch (208:3): [True: 0, False: 0] ------------------ 209| 0| return ELF::R_MICROMIPS_TLS_TPREL_LO16; 210| 0| } 211| | 212| 0| llvm_unreachable("invalid fixup kind!"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ 213| 0|} MipsELFObjectWriter.cpp:_ZNK12_GLOBAL__N_119MipsELFObjectWriter23needsRelocateWithSymbolERKN7llvm_ks8MCSymbolEj: 389| 398| unsigned Type) const { 390| | // FIXME: This is extremely conservative. This really needs to use a 391| | // whitelist with a clear explanation for why each realocation needs to 392| | // point to the symbol, not to the section. 393| 398| switch (Type) { 394| 0| default: ------------------ | Branch (394:3): [True: 0, False: 398] ------------------ 395| 0| return true; 396| | 397| 0| case ELF::R_MIPS_GOT16: ------------------ | Branch (397:3): [True: 0, False: 398] ------------------ 398| 0| case ELF::R_MIPS16_GOT16: ------------------ | Branch (398:3): [True: 0, False: 398] ------------------ 399| 0| case ELF::R_MICROMIPS_GOT16: ------------------ | Branch (399:3): [True: 0, False: 398] ------------------ 400| 0| llvm_unreachable("Should have been handled already"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ 401| | 402| | // These relocations might be paired with another relocation. The pairing is 403| | // done by the static linker by matching the symbol. Since we only see one 404| | // relocation at a time, we have to force them to relocate with a symbol to 405| | // avoid ending up with a pair where one points to a section and another 406| | // points to a symbol. 407| 0| case ELF::R_MIPS_HI16: ------------------ | Branch (407:3): [True: 0, False: 398] ------------------ 408| 0| case ELF::R_MIPS16_HI16: ------------------ | Branch (408:3): [True: 0, False: 398] ------------------ 409| 0| case ELF::R_MICROMIPS_HI16: ------------------ | Branch (409:3): [True: 0, False: 398] ------------------ 410| 0| case ELF::R_MIPS_LO16: ------------------ | Branch (410:3): [True: 0, False: 398] ------------------ 411| 0| case ELF::R_MIPS16_LO16: ------------------ | Branch (411:3): [True: 0, False: 398] ------------------ 412| 0| case ELF::R_MICROMIPS_LO16: ------------------ | Branch (412:3): [True: 0, False: 398] ------------------ 413| 0| return true; 414| | 415| 398| case ELF::R_MIPS_32: ------------------ | Branch (415:3): [True: 398, False: 0] ------------------ 416| 398| if (cast(Sym).getOther() & ELF::STO_MIPS_MICROMIPS) ------------------ | Branch (416:9): [True: 0, False: 398] ------------------ 417| 0| return true; 418| | // falltrough 419| 398| case ELF::R_MIPS_26: ------------------ | Branch (419:3): [True: 0, False: 398] ------------------ 420| 398| case ELF::R_MIPS_64: ------------------ | Branch (420:3): [True: 0, False: 398] ------------------ 421| 398| case ELF::R_MIPS_GPREL16: ------------------ | Branch (421:3): [True: 0, False: 398] ------------------ 422| 398| return false; 423| 398| } 424| 398|} _ZN7llvm_ks13MipsMCAsmInfoC2ERKNS_6TripleE: 19| 749|MipsMCAsmInfo::MipsMCAsmInfo(const Triple &TheTriple) { 20| 749| if ((TheTriple.getArch() == Triple::mips) || ------------------ | Branch (20:7): [True: 749, False: 0] ------------------ 21| 0| (TheTriple.getArch() == Triple::mips64)) ------------------ | Branch (21:7): [True: 0, False: 0] ------------------ 22| 749| IsLittleEndian = false; 23| | 24| 749| if ((TheTriple.getArch() == Triple::mips64el) || ------------------ | Branch (24:7): [True: 0, False: 749] ------------------ 25| 749| (TheTriple.getArch() == Triple::mips64)) { ------------------ | Branch (25:7): [True: 0, False: 749] ------------------ 26| 0| PointerSize = CalleeSaveStackSlotSize = 8; 27| 0| } 28| | 29| 749| AlignmentIsInBytes = false; 30| 749| Data16bitsDirective = "\t.2byte\t"; 31| 749| Data32bitsDirective = "\t.4byte\t"; 32| 749| Data64bitsDirective = "\t.8byte\t"; 33| 749| PrivateGlobalPrefix = "$"; 34| 749| PrivateLabelPrefix = "$"; 35| 749| CommentString = "#"; 36| 749| ZeroDirective = "\t.space\t"; 37| 749| GPRel32Directive = "\t.gpword\t"; 38| 749| GPRel64Directive = "\t.gpdword\t"; 39| 749| UseAssignmentForEHBegin = true; 40| 749| SupportsDebugInformation = true; 41| 749| ExceptionsType = ExceptionHandling::DwarfCFI; 42| 749| DwarfRegNumForCFI = true; 43| 749|} _ZN7llvm_ks25createMipsMCCodeEmitterEBERKNS_11MCInstrInfoERKNS_14MCRegisterInfoERNS_9MCContextE: 39| 749| MCContext &Ctx) { 40| 749| return new MipsMCCodeEmitter(MCII, Ctx, false); 41| 749|} _ZNK7llvm_ks17MipsMCCodeEmitter11isMicroMipsERKNS_15MCSubtargetInfoE: 115| 8.35k|bool MipsMCCodeEmitter::isMicroMips(const MCSubtargetInfo &STI) const { 116| 8.35k| return STI.getFeatureBits()[Mips::FeatureMicroMips]; 117| 8.35k|} _ZNK7llvm_ks17MipsMCCodeEmitter8EmitByteEhRNS_11raw_ostreamE: 123| 32.9k|void MipsMCCodeEmitter::EmitByte(unsigned char C, raw_ostream &OS) const { 124| 32.9k| OS << (char)C; 125| 32.9k|} _ZNK7llvm_ks17MipsMCCodeEmitter15EmitInstructionEmjRKNS_15MCSubtargetInfoERNS_11raw_ostreamE: 129| 8.24k| raw_ostream &OS) const { 130| | // Output the instruction encoding in little endian byte order. 131| | // Little-endian byte ordering: 132| | // mips32r2: 4 | 3 | 2 | 1 133| | // microMIPS: 2 | 1 | 4 | 3 134| 8.24k| if (IsLittleEndian && Size == 4 && isMicroMips(STI)) { ------------------ | Branch (134:7): [True: 0, False: 8.24k] | Branch (134:25): [True: 0, False: 0] | Branch (134:38): [True: 0, False: 0] ------------------ 135| 0| EmitInstruction(Val >> 16, 2, STI, OS); 136| 0| EmitInstruction(Val, 2, STI, OS); 137| 8.24k| } else { 138| 41.2k| for (unsigned i = 0; i < Size; ++i) { ------------------ | Branch (138:26): [True: 32.9k, False: 8.24k] ------------------ 139| 32.9k| unsigned Shift = IsLittleEndian ? i * 8 : (Size - 1 - i) * 8; ------------------ | Branch (139:24): [True: 0, False: 32.9k] ------------------ 140| 32.9k| EmitByte((Val >> Shift) & 0xff, OS); 141| 32.9k| } 142| 8.24k| } 143| 8.24k|} _ZNK7llvm_ks17MipsMCCodeEmitter17encodeInstructionERNS_6MCInstERNS_11raw_ostreamERNS_15SmallVectorImplINS_7MCFixupEEERKNS_15MCSubtargetInfoERj: 152| 8.24k|{ 153| 8.24k| KsError = 0; 154| | // Non-pseudo instructions that get changed for direct object 155| | // only based on operand values. 156| | // If this list of instructions get much longer we will move 157| | // the check to a function call. Until then, this is more efficient. 158| 8.24k| MCInst TmpInst = MI; 159| 8.24k| switch (MI.getOpcode()) { ------------------ | Branch (159:11): [True: 0, False: 8.24k] ------------------ 160| | // If shift amount is >= 32 it the inst needs to be lowered further 161| 0| case Mips::DSLL: ------------------ | Branch (161:3): [True: 0, False: 8.24k] ------------------ 162| 0| case Mips::DSRL: ------------------ | Branch (162:3): [True: 0, False: 8.24k] ------------------ 163| 0| case Mips::DSRA: ------------------ | Branch (163:3): [True: 0, False: 8.24k] ------------------ 164| 0| case Mips::DROTR: ------------------ | Branch (164:3): [True: 0, False: 8.24k] ------------------ 165| 0| LowerLargeShift(TmpInst); 166| 0| break; 167| | // Double extract instruction is chosen by pos and size operands 168| 0| case Mips::DEXT: ------------------ | Branch (168:3): [True: 0, False: 8.24k] ------------------ 169| 0| case Mips::DINS: ------------------ | Branch (169:3): [True: 0, False: 8.24k] ------------------ 170| 0| LowerDextDins(TmpInst); 171| 8.24k| } 172| | 173| 8.24k| unsigned long N = Fixups.size(); 174| 8.24k| uint32_t Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI); 175| | 176| | // Check for unimplemented opcodes. 177| | // Unfortunately in MIPS both NOP and SLL will come in with Binary == 0 178| | // so we have to special check for them. 179| 8.24k| unsigned Opcode = TmpInst.getOpcode(); 180| 8.24k| if ((Opcode != Mips::NOP) && (Opcode != Mips::SLL) && ------------------ | Branch (180:7): [True: 8.24k, False: 0] | Branch (180:32): [True: 4.39k, False: 3.84k] ------------------ 181| 4.39k| (Opcode != Mips::SLL_MM) && !Binary) ------------------ | Branch (181:7): [True: 4.39k, False: 0] | Branch (181:35): [True: 0, False: 4.39k] ------------------ 182| 0| llvm_unreachable("unimplemented opcode in encodeInstruction()"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ 183| | 184| 8.24k| int NewOpcode = -1; 185| 8.24k| if (isMicroMips(STI)) { ------------------ | Branch (185:7): [True: 0, False: 8.24k] ------------------ 186| 0| if (isMips32r6(STI)) { ------------------ | Branch (186:9): [True: 0, False: 0] ------------------ 187| 0| NewOpcode = Mips::MipsR62MicroMipsR6(Opcode, Mips::Arch_micromipsr6); 188| 0| if (NewOpcode == -1) ------------------ | Branch (188:11): [True: 0, False: 0] ------------------ 189| 0| NewOpcode = Mips::Std2MicroMipsR6(Opcode, Mips::Arch_micromipsr6); 190| 0| } 191| 0| else 192| 0| NewOpcode = Mips::Std2MicroMips(Opcode, Mips::Arch_micromips); 193| | 194| | // Check whether it is Dsp instruction. 195| 0| if (NewOpcode == -1) ------------------ | Branch (195:9): [True: 0, False: 0] ------------------ 196| 0| NewOpcode = Mips::Dsp2MicroMips(Opcode, Mips::Arch_mmdsp); 197| | 198| 0| if (NewOpcode != -1) { ------------------ | Branch (198:9): [True: 0, False: 0] ------------------ 199| 0| if (Fixups.size() > N) ------------------ | Branch (199:11): [True: 0, False: 0] ------------------ 200| 0| Fixups.pop_back(); 201| | 202| 0| Opcode = NewOpcode; 203| 0| TmpInst.setOpcode (NewOpcode); 204| 0| Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI); 205| 0| } 206| 0| } 207| | 208| 8.24k| const MCInstrDesc &Desc = MCII.get(TmpInst.getOpcode()); 209| | 210| | // Get byte count of instruction 211| 8.24k| unsigned Size = Desc.getSize(); 212| 8.24k| if (!Size) ------------------ | Branch (212:7): [True: 0, False: 8.24k] ------------------ 213| 0| llvm_unreachable("Desc.getSize() returns 0"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ 214| | 215| 8.24k| EmitInstruction(Binary, Size, STI, OS); 216| | 217| | // Keystone: update Inst.Address to point to the next instruction 218| 8.24k| MI.setAddress(MI.getAddress() + Size); 219| 8.24k|} _ZNK7llvm_ks17MipsMCCodeEmitter22getBranchTargetOpValueERKNS_6MCInstEjRNS_15SmallVectorImplINS_7MCFixupEEERKNS_15MCSubtargetInfoE: 227| 3.74k| const MCSubtargetInfo &STI) const { 228| | 229| 3.74k| const MCOperand &MO = MI.getOperand(OpNo); 230| | 231| | // If the destination is an immediate, divide by 4. 232| 3.74k| if (MO.isImm()) return (MO.getImm() - MI.getAddress() - 4) >> 2; ------------------ | Branch (232:7): [True: 32, False: 3.71k] ------------------ 233| | 234| 3.74k| assert(MO.isExpr() && ------------------ | Branch (234:3): [True: 3.71k, False: 0] | Branch (234:3): [True: 3.71k, Folded] | Branch (234:3): [True: 3.71k, False: 0] ------------------ 235| 3.71k| "getBranchTargetOpValue expects only expressions or immediates"); 236| | 237| 3.71k| const MCExpr *FixupExpression = MCBinaryExpr::createAdd( 238| 3.71k| MO.getExpr(), MCConstantExpr::create(-4, Ctx), Ctx); 239| 3.71k| Fixups.push_back(MCFixup::create(0, FixupExpression, 240| 3.71k| MCFixupKind(Mips::fixup_Mips_PC16))); 241| 3.71k| return 0; 242| 3.71k|} _ZNK7llvm_ks17MipsMCCodeEmitter20getJumpTargetOpValueERKNS_6MCInstEjRNS_15SmallVectorImplINS_7MCFixupEEERKNS_15MCSubtargetInfoE: 399| 128| const MCSubtargetInfo &STI) const { 400| | 401| 128| const MCOperand &MO = MI.getOperand(OpNo); 402| | // If the destination is an immediate, divide by 4. 403| 128| if (MO.isImm()) return MO.getImm()>>2; ------------------ | Branch (403:7): [True: 21, False: 107] ------------------ 404| | 405| 128| assert(MO.isExpr() && ------------------ | Branch (405:3): [True: 107, False: 0] | Branch (405:3): [True: 107, Folded] | Branch (405:3): [True: 107, False: 0] ------------------ 406| 107| "getJumpTargetOpValue expects only expressions or an immediate"); 407| | 408| 107| const MCExpr *Expr = MO.getExpr(); 409| 107| Fixups.push_back(MCFixup::create(0, Expr, 410| 107| MCFixupKind(Mips::fixup_Mips_26))); 411| 107| return 0; 412| 107|} _ZNK7llvm_ks17MipsMCCodeEmitter14getExprOpValueEPKNS_6MCExprERNS_15SmallVectorImplINS_7MCFixupEEERKNS_15MCSubtargetInfoE: 495| 4.55k| const MCSubtargetInfo &STI) const { 496| 4.55k| int64_t Res; 497| | 498| 4.55k| if (Expr->evaluateAsAbsolute(Res)) ------------------ | Branch (498:7): [True: 562, False: 3.99k] ------------------ 499| 562| return Res; 500| | 501| 3.99k| MCExpr::ExprKind Kind = Expr->getKind(); 502| 3.99k| if (Kind == MCExpr::Constant) { ------------------ | Branch (502:7): [True: 0, False: 3.99k] ------------------ 503| 0| return cast(Expr)->getValue(); 504| 0| } 505| | 506| 3.99k| if (Kind == MCExpr::Binary) { ------------------ | Branch (506:7): [True: 2.09k, False: 1.89k] ------------------ 507| 2.09k| unsigned Res = getExprOpValue(cast(Expr)->getLHS(), Fixups, STI); 508| 2.09k| Res += getExprOpValue(cast(Expr)->getRHS(), Fixups, STI); 509| 2.09k| return Res; 510| 2.09k| } 511| | 512| 1.89k| if (Kind == MCExpr::Target) { ------------------ | Branch (512:7): [True: 6, False: 1.89k] ------------------ 513| 6| const MipsMCExpr *MipsExpr = cast(Expr); 514| | 515| 6| Mips::Fixups FixupKind = Mips::Fixups(0); 516| 6| switch (MipsExpr->getKind()) { 517| 0| default: llvm_unreachable("Unsupported fixup kind for target expression!"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ | Branch (517:5): [True: 0, False: 6] ------------------ 518| 0| case MipsMCExpr::VK_Mips_HIGHEST: ------------------ | Branch (518:5): [True: 0, False: 6] ------------------ 519| 0| FixupKind = Mips::fixup_Mips_HIGHEST; 520| 0| break; 521| 0| case MipsMCExpr::VK_Mips_HIGHER: ------------------ | Branch (521:5): [True: 0, False: 6] ------------------ 522| 0| FixupKind = Mips::fixup_Mips_HIGHER; 523| 0| break; 524| 3| case MipsMCExpr::VK_Mips_HI: ------------------ | Branch (524:5): [True: 3, False: 3] ------------------ 525| 3| FixupKind = isMicroMips(STI) ? Mips::fixup_MICROMIPS_HI16 ------------------ | Branch (525:19): [True: 0, False: 3] ------------------ 526| 3| : Mips::fixup_Mips_HI16; 527| 3| break; 528| 3| case MipsMCExpr::VK_Mips_LO: ------------------ | Branch (528:5): [True: 3, False: 3] ------------------ 529| 3| FixupKind = isMicroMips(STI) ? Mips::fixup_MICROMIPS_LO16 ------------------ | Branch (529:19): [True: 0, False: 3] ------------------ 530| 3| : Mips::fixup_Mips_LO16; 531| 3| break; 532| 6| } 533| 6| Fixups.push_back(MCFixup::create(0, MipsExpr, MCFixupKind(FixupKind))); 534| 6| return 0; 535| 6| } 536| | 537| 1.89k| if (Kind == MCExpr::SymbolRef) { ------------------ | Branch (537:7): [True: 1.58k, False: 311] ------------------ 538| 1.58k| Mips::Fixups FixupKind = Mips::Fixups(0); 539| | 540| 1.58k| switch(cast(Expr)->getKind()) { 541| 0| default: llvm_unreachable("Unknown fixup kind!"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ | Branch (541:5): [True: 0, False: 1.58k] ------------------ 542| 0| break; 543| 1.47k| case MCSymbolRefExpr::VK_None: ------------------ | Branch (543:5): [True: 1.47k, False: 110] ------------------ 544| 1.47k| FixupKind = Mips::fixup_Mips_32; // FIXME: This is ok for O32/N32 but not N64. 545| 1.47k| break; 546| 0| case MCSymbolRefExpr::VK_Mips_GPOFF_HI : ------------------ | Branch (546:5): [True: 0, False: 1.58k] ------------------ 547| 0| FixupKind = Mips::fixup_Mips_GPOFF_HI; 548| 0| break; 549| 0| case MCSymbolRefExpr::VK_Mips_GPOFF_LO : ------------------ | Branch (549:5): [True: 0, False: 1.58k] ------------------ 550| 0| FixupKind = Mips::fixup_Mips_GPOFF_LO; 551| 0| break; 552| 0| case MCSymbolRefExpr::VK_Mips_GOT_PAGE : ------------------ | Branch (552:5): [True: 0, False: 1.58k] ------------------ 553| 0| FixupKind = isMicroMips(STI) ? Mips::fixup_MICROMIPS_GOT_PAGE ------------------ | Branch (553:19): [True: 0, False: 0] ------------------ 554| 0| : Mips::fixup_Mips_GOT_PAGE; 555| 0| break; 556| 0| case MCSymbolRefExpr::VK_Mips_GOT_OFST : ------------------ | Branch (556:5): [True: 0, False: 1.58k] ------------------ 557| 0| FixupKind = isMicroMips(STI) ? Mips::fixup_MICROMIPS_GOT_OFST ------------------ | Branch (557:19): [True: 0, False: 0] ------------------ 558| 0| : Mips::fixup_Mips_GOT_OFST; 559| 0| break; 560| 0| case MCSymbolRefExpr::VK_Mips_GOT_DISP : ------------------ | Branch (560:5): [True: 0, False: 1.58k] ------------------ 561| 0| FixupKind = isMicroMips(STI) ? Mips::fixup_MICROMIPS_GOT_DISP ------------------ | Branch (561:19): [True: 0, False: 0] ------------------ 562| 0| : Mips::fixup_Mips_GOT_DISP; 563| 0| break; 564| 0| case MCSymbolRefExpr::VK_Mips_GPREL: ------------------ | Branch (564:5): [True: 0, False: 1.58k] ------------------ 565| 0| FixupKind = Mips::fixup_Mips_GPREL16; 566| 0| break; 567| 0| case MCSymbolRefExpr::VK_Mips_GOT_CALL: ------------------ | Branch (567:5): [True: 0, False: 1.58k] ------------------ 568| 0| FixupKind = isMicroMips(STI) ? Mips::fixup_MICROMIPS_CALL16 ------------------ | Branch (568:19): [True: 0, False: 0] ------------------ 569| 0| : Mips::fixup_Mips_CALL16; 570| 0| break; 571| 0| case MCSymbolRefExpr::VK_Mips_GOT16: ------------------ | Branch (571:5): [True: 0, False: 1.58k] ------------------ 572| 0| FixupKind = isMicroMips(STI) ? Mips::fixup_MICROMIPS_GOT16 ------------------ | Branch (572:19): [True: 0, False: 0] ------------------ 573| 0| : Mips::fixup_Mips_GOT_Global; 574| 0| break; 575| 0| case MCSymbolRefExpr::VK_Mips_GOT: ------------------ | Branch (575:5): [True: 0, False: 1.58k] ------------------ 576| 0| FixupKind = isMicroMips(STI) ? Mips::fixup_MICROMIPS_GOT16 ------------------ | Branch (576:19): [True: 0, False: 0] ------------------ 577| 0| : Mips::fixup_Mips_GOT_Local; 578| 0| break; 579| 55| case MCSymbolRefExpr::VK_Mips_ABS_HI: ------------------ | Branch (579:5): [True: 55, False: 1.52k] ------------------ 580| 55| FixupKind = isMicroMips(STI) ? Mips::fixup_MICROMIPS_HI16 ------------------ | Branch (580:19): [True: 0, False: 55] ------------------ 581| 55| : Mips::fixup_Mips_HI16; 582| 55| break; 583| 55| case MCSymbolRefExpr::VK_Mips_ABS_LO: ------------------ | Branch (583:5): [True: 55, False: 1.52k] ------------------ 584| 55| FixupKind = isMicroMips(STI) ? Mips::fixup_MICROMIPS_LO16 ------------------ | Branch (584:19): [True: 0, False: 55] ------------------ 585| 55| : Mips::fixup_Mips_LO16; 586| 55| break; 587| 0| case MCSymbolRefExpr::VK_Mips_TLSGD: ------------------ | Branch (587:5): [True: 0, False: 1.58k] ------------------ 588| 0| FixupKind = isMicroMips(STI) ? Mips::fixup_MICROMIPS_TLS_GD ------------------ | Branch (588:19): [True: 0, False: 0] ------------------ 589| 0| : Mips::fixup_Mips_TLSGD; 590| 0| break; 591| 0| case MCSymbolRefExpr::VK_Mips_TLSLDM: ------------------ | Branch (591:5): [True: 0, False: 1.58k] ------------------ 592| 0| FixupKind = isMicroMips(STI) ? Mips::fixup_MICROMIPS_TLS_LDM ------------------ | Branch (592:19): [True: 0, False: 0] ------------------ 593| 0| : Mips::fixup_Mips_TLSLDM; 594| 0| break; 595| 0| case MCSymbolRefExpr::VK_Mips_DTPREL_HI: ------------------ | Branch (595:5): [True: 0, False: 1.58k] ------------------ 596| 0| FixupKind = isMicroMips(STI) ? Mips::fixup_MICROMIPS_TLS_DTPREL_HI16 ------------------ | Branch (596:19): [True: 0, False: 0] ------------------ 597| 0| : Mips::fixup_Mips_DTPREL_HI; 598| 0| break; 599| 0| case MCSymbolRefExpr::VK_Mips_DTPREL_LO: ------------------ | Branch (599:5): [True: 0, False: 1.58k] ------------------ 600| 0| FixupKind = isMicroMips(STI) ? Mips::fixup_MICROMIPS_TLS_DTPREL_LO16 ------------------ | Branch (600:19): [True: 0, False: 0] ------------------ 601| 0| : Mips::fixup_Mips_DTPREL_LO; 602| 0| break; 603| 0| case MCSymbolRefExpr::VK_Mips_GOTTPREL: ------------------ | Branch (603:5): [True: 0, False: 1.58k] ------------------ 604| 0| FixupKind = Mips::fixup_Mips_GOTTPREL; 605| 0| break; 606| 0| case MCSymbolRefExpr::VK_Mips_TPREL_HI: ------------------ | Branch (606:5): [True: 0, False: 1.58k] ------------------ 607| 0| FixupKind = isMicroMips(STI) ? Mips::fixup_MICROMIPS_TLS_TPREL_HI16 ------------------ | Branch (607:19): [True: 0, False: 0] ------------------ 608| 0| : Mips::fixup_Mips_TPREL_HI; 609| 0| break; 610| 0| case MCSymbolRefExpr::VK_Mips_TPREL_LO: ------------------ | Branch (610:5): [True: 0, False: 1.58k] ------------------ 611| 0| FixupKind = isMicroMips(STI) ? Mips::fixup_MICROMIPS_TLS_TPREL_LO16 ------------------ | Branch (611:19): [True: 0, False: 0] ------------------ 612| 0| : Mips::fixup_Mips_TPREL_LO; 613| 0| break; 614| 0| case MCSymbolRefExpr::VK_Mips_HIGHER: ------------------ | Branch (614:5): [True: 0, False: 1.58k] ------------------ 615| 0| FixupKind = Mips::fixup_Mips_HIGHER; 616| 0| break; 617| 0| case MCSymbolRefExpr::VK_Mips_HIGHEST: ------------------ | Branch (617:5): [True: 0, False: 1.58k] ------------------ 618| 0| FixupKind = Mips::fixup_Mips_HIGHEST; 619| 0| break; 620| 0| case MCSymbolRefExpr::VK_Mips_GOT_HI16: ------------------ | Branch (620:5): [True: 0, False: 1.58k] ------------------ 621| 0| FixupKind = Mips::fixup_Mips_GOT_HI16; 622| 0| break; 623| 0| case MCSymbolRefExpr::VK_Mips_GOT_LO16: ------------------ | Branch (623:5): [True: 0, False: 1.58k] ------------------ 624| 0| FixupKind = Mips::fixup_Mips_GOT_LO16; 625| 0| break; 626| 0| case MCSymbolRefExpr::VK_Mips_CALL_HI16: ------------------ | Branch (626:5): [True: 0, False: 1.58k] ------------------ 627| 0| FixupKind = Mips::fixup_Mips_CALL_HI16; 628| 0| break; 629| 0| case MCSymbolRefExpr::VK_Mips_CALL_LO16: ------------------ | Branch (629:5): [True: 0, False: 1.58k] ------------------ 630| 0| FixupKind = Mips::fixup_Mips_CALL_LO16; 631| 0| break; 632| 0| case MCSymbolRefExpr::VK_Mips_PCREL_HI16: ------------------ | Branch (632:5): [True: 0, False: 1.58k] ------------------ 633| 0| FixupKind = Mips::fixup_MIPS_PCHI16; 634| 0| break; 635| 0| case MCSymbolRefExpr::VK_Mips_PCREL_LO16: ------------------ | Branch (635:5): [True: 0, False: 1.58k] ------------------ 636| 0| FixupKind = Mips::fixup_MIPS_PCLO16; 637| 0| break; 638| 1.58k| } // switch 639| | 640| 1.58k| Fixups.push_back(MCFixup::create(0, Expr, MCFixupKind(FixupKind))); 641| 1.58k| return 0; 642| 1.58k| } 643| 311| return 0; 644| 1.89k|} _ZNK7llvm_ks17MipsMCCodeEmitter17getMachineOpValueERKNS_6MCInstERKNS_9MCOperandERNS_15SmallVectorImplINS_7MCFixupEEERKNS_15MCSubtargetInfoE: 651| 20.4k| const MCSubtargetInfo &STI) const { 652| 20.4k| if (MO.isReg()) { ------------------ | Branch (652:7): [True: 16.1k, False: 4.29k] ------------------ 653| 16.1k| unsigned Reg = MO.getReg(); 654| 16.1k| unsigned RegNo = Ctx.getRegisterInfo()->getEncodingValue(Reg); 655| 16.1k| return RegNo; 656| 16.1k| } else if (MO.isImm()) { ------------------ | Branch (656:14): [True: 3.93k, False: 363] ------------------ 657| 3.93k| return static_cast(MO.getImm()); 658| 3.93k| } else if (MO.isFPImm()) { ------------------ | Branch (658:14): [True: 0, False: 363] ------------------ 659| 0| return static_cast(APFloat(MO.getFPImm()) 660| 0| .bitcastToAPInt().getHiBits(32).getLimitedValue()); 661| 0| } 662| | // MO must be an Expr. 663| 20.4k| assert(MO.isExpr()); ------------------ | Branch (663:3): [True: 363, False: 0] ------------------ 664| 363| return getExprOpValue(MO.getExpr(),Fixups, STI); 665| 363|} _ZNK7llvm_ks17MipsMCCodeEmitter14getMemEncodingERKNS_6MCInstEjRNS_15SmallVectorImplINS_7MCFixupEEERKNS_15MCSubtargetInfoE: 716| 144| const MCSubtargetInfo &STI) const { 717| | // Base register is encoded in bits 20-16, offset is encoded in bits 15-0. 718| 144| assert(MI.getOperand(OpNo).isReg()); ------------------ | Branch (718:3): [True: 144, False: 0] ------------------ 719| 144| unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo),Fixups, STI) << 16; 720| 144| unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI); 721| | 722| 144| return (OffBits & 0xFFFF) | RegBits; 723| 144|} _ZN7llvm_ks17MipsMCCodeEmitterC2ERKNS_11MCInstrInfoERNS_9MCContextEb: 45| 749| : MCII(mcii), Ctx(Ctx_), IsLittleEndian(IsLittle) {} _ZN7llvm_ks10MipsMCExpr21isSupportedBinaryExprENS_15MCSymbolRefExpr11VariantKindEPKNS_12MCBinaryExprE: 21| 84| const MCBinaryExpr *BE) { 22| 84| switch (VK) { 23| 42| case MCSymbolRefExpr::VK_Mips_ABS_LO: ------------------ | Branch (23:3): [True: 42, False: 42] ------------------ 24| 84| case MCSymbolRefExpr::VK_Mips_ABS_HI: ------------------ | Branch (24:3): [True: 42, False: 42] ------------------ 25| 84| case MCSymbolRefExpr::VK_Mips_HIGHER: ------------------ | Branch (25:3): [True: 0, False: 84] ------------------ 26| 84| case MCSymbolRefExpr::VK_Mips_HIGHEST: ------------------ | Branch (26:3): [True: 0, False: 84] ------------------ 27| 84| break; 28| 0| default: ------------------ | Branch (28:3): [True: 0, False: 84] ------------------ 29| 0| return false; 30| 84| } 31| | 32| | // We support expressions of the form "(sym1 binop1 sym2) binop2 const", 33| | // where "binop2 const" is optional. 34| 84| if (isa(BE->getLHS())) { ------------------ | Branch (34:7): [True: 70, False: 14] ------------------ 35| 70| if (!isa(BE->getRHS())) ------------------ | Branch (35:9): [True: 44, False: 26] ------------------ 36| 44| return false; 37| 26| BE = cast(BE->getLHS()); 38| 26| } 39| 40| return (isa(BE->getLHS()) ------------------ | Branch (39:11): [True: 14, False: 26] ------------------ 40| 14| && isa(BE->getRHS())); ------------------ | Branch (40:14): [True: 6, False: 8] ------------------ 41| 84|} _ZN7llvm_ks10MipsMCExpr6createENS_15MCSymbolRefExpr11VariantKindEPKNS_6MCExprERNS_9MCContextE: 45| 6| MCContext &Ctx) { 46| 6| VariantKind Kind; 47| 6| switch (VK) { 48| 3| case MCSymbolRefExpr::VK_Mips_ABS_LO: ------------------ | Branch (48:3): [True: 3, False: 3] ------------------ 49| 3| Kind = VK_Mips_LO; 50| 3| break; 51| 3| case MCSymbolRefExpr::VK_Mips_ABS_HI: ------------------ | Branch (51:3): [True: 3, False: 3] ------------------ 52| 3| Kind = VK_Mips_HI; 53| 3| break; 54| 0| case MCSymbolRefExpr::VK_Mips_HIGHER: ------------------ | Branch (54:3): [True: 0, False: 6] ------------------ 55| 0| Kind = VK_Mips_HIGHER; 56| 0| break; 57| 0| case MCSymbolRefExpr::VK_Mips_HIGHEST: ------------------ | Branch (57:3): [True: 0, False: 6] ------------------ 58| 0| Kind = VK_Mips_HIGHEST; 59| 0| break; 60| 0| default: ------------------ | Branch (60:3): [True: 0, False: 6] ------------------ 61| 0| llvm_unreachable("Invalid kind!"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ 62| 6| } 63| | 64| 6| return new (Ctx) MipsMCExpr(Kind, Expr); 65| 6|} _ZNK7llvm_ks10MipsMCExpr25evaluateAsRelocatableImplERNS_7MCValueEPKNS_11MCAsmLayoutEPKNS_7MCFixupE: 84| 6| const MCFixup *Fixup) const { 85| 6| return getSubExpr()->evaluateAsRelocatable(Res, Layout, Fixup); 86| 6|} _ZNK7llvm_ks10MipsMCExpr13visitUsedExprERNS_10MCStreamerE: 88| 6|void MipsMCExpr::visitUsedExpr(MCStreamer &Streamer) const { 89| 6| Streamer.visitUsedExpr(*getSubExpr()); 90| 6|} _ZN7llvm_ks10MipsMCExprC2ENS0_11VariantKindEPKNS_6MCExprE: 34| 6| : Kind(Kind), Expr(Expr) {} _ZNK7llvm_ks10MipsMCExpr7getKindEv: 44| 6| VariantKind getKind() const { return Kind; } _ZNK7llvm_ks10MipsMCExpr10getSubExprEv: 47| 12| const MCExpr *getSubExpr() const { return Expr; } _ZNK7llvm_ks10MipsMCExpr24fixELFSymbolsInTLSFixupsERNS_11MCAssemblerE: 59| 6| void fixELFSymbolsInTLSFixups(MCAssembler &Asm) const override {} _ZN7llvm_ks10MipsMCExpr7classofEPKNS_6MCExprE: 61| 6| static bool classof(const MCExpr *E) { 62| 6| return E->getKind() == MCExpr::Target; 63| 6| } _ZN7llvm_ks7MIPS_MC13selectMipsCPUERKNS_6TripleENS_9StringRefE: 44| 749|StringRef MIPS_MC::selectMipsCPU(const Triple &TT, StringRef CPU) { 45| 749| if (CPU.empty() || CPU == "generic") { ------------------ | Branch (45:7): [True: 749, False: 0] | Branch (45:7): [True: 749, False: 0] | Branch (45:22): [True: 0, False: 0] ------------------ 46| 749| if (TT.getArch() == Triple::mips || TT.getArch() == Triple::mipsel) ------------------ | Branch (46:9): [True: 749, False: 0] | Branch (46:41): [True: 0, False: 0] ------------------ 47| 749| CPU = "mips32"; 48| 0| else 49| 0| CPU = "mips64"; 50| 749| } 51| 749| return CPU; 52| 749|} LLVMInitializeMipsTargetMC: 83| 1|extern "C" void LLVMInitializeMipsTargetMC() { 84| 1| for (Target *T : {&TheMipsTarget, &TheMipselTarget, &TheMips64Target, ------------------ | Branch (84:18): [True: 4, False: 1] ------------------ 85| 4| &TheMips64elTarget}) { 86| | // Register the MC asm info. 87| 4| RegisterMCAsmInfoFn X(*T, createMipsMCAsmInfo); 88| | 89| | // Register the MC instruction info. 90| 4| TargetRegistry::RegisterMCInstrInfo(*T, createMipsMCInstrInfo); 91| | 92| | // Register the MC register info. 93| 4| TargetRegistry::RegisterMCRegInfo(*T, createMipsMCRegisterInfo); 94| | 95| | // Register the MC subtarget info. 96| 4| TargetRegistry::RegisterMCSubtargetInfo(*T, createMipsMCSubtargetInfo); 97| 4| } 98| | 99| | // Register the MC Code Emitter 100| 1| for (Target *T : {&TheMipsTarget, &TheMips64Target}) ------------------ | Branch (100:18): [True: 2, False: 1] ------------------ 101| 2| TargetRegistry::RegisterMCCodeEmitter(*T, createMipsMCCodeEmitterEB); 102| | 103| 1| for (Target *T : {&TheMipselTarget, &TheMips64elTarget}) ------------------ | Branch (103:18): [True: 2, False: 1] ------------------ 104| 2| TargetRegistry::RegisterMCCodeEmitter(*T, createMipsMCCodeEmitterEL); 105| | 106| | // Register the asm backend. 107| 1| TargetRegistry::RegisterMCAsmBackend(TheMipsTarget, 108| 1| createMipsAsmBackendEB32); 109| 1| TargetRegistry::RegisterMCAsmBackend(TheMipselTarget, 110| 1| createMipsAsmBackendEL32); 111| 1| TargetRegistry::RegisterMCAsmBackend(TheMips64Target, 112| 1| createMipsAsmBackendEB64); 113| 1| TargetRegistry::RegisterMCAsmBackend(TheMips64elTarget, 114| 1| createMipsAsmBackendEL64); 115| | 116| 1|} MipsMCTargetDesc.cpp:_ZL19createMipsMCAsmInfoRKN7llvm_ks14MCRegisterInfoERKNS_6TripleE: 73| 749| const Triple &TT) { 74| 749| MCAsmInfo *MAI = new MipsMCAsmInfo(TT); 75| | 76| 749| unsigned SP = MRI.getDwarfRegNum(Mips::SP, true); 77| 749| MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, SP, 0); 78| 749| MAI->addInitialFrameState(Inst); 79| | 80| 749| return MAI; 81| 749|} MipsMCTargetDesc.cpp:_ZL21createMipsMCInstrInfov: 54| 749|static MCInstrInfo *createMipsMCInstrInfo() { 55| 749| MCInstrInfo *X = new MCInstrInfo(); 56| 749| InitMipsMCInstrInfo(X); 57| 749| return X; 58| 749|} MipsMCTargetDesc.cpp:_ZL24createMipsMCRegisterInfoRKN7llvm_ks6TripleE: 60| 749|static MCRegisterInfo *createMipsMCRegisterInfo(const Triple &TT) { 61| 749| MCRegisterInfo *X = new MCRegisterInfo(); 62| 749| InitMipsMCRegisterInfo(X, Mips::RA); 63| 749| return X; 64| 749|} MipsMCTargetDesc.cpp:_ZL25createMipsMCSubtargetInfoRKN7llvm_ks6TripleENS_9StringRefES3_: 67| 749| StringRef CPU, StringRef FS) { 68| 749| CPU = MIPS_MC::selectMipsCPU(TT, CPU); 69| 749| return createMipsMCSubtargetInfoImpl(TT, CPU, FS); 70| 749|} MipsAsmParser.cpp:_ZNK12_GLOBAL__N_113MipsAsmParser24ComputeAvailableFeaturesERKN7llvm_ks13FeatureBitsetE: 2854| 7.72k|ComputeAvailableFeatures(const FeatureBitset& FB) const { 2855| 7.72k| uint64_t Features = 0; 2856| 7.72k| if ((FB[Mips::FeatureMips2])) ------------------ | Branch (2856:7): [True: 7.71k, False: 9] ------------------ 2857| 7.71k| Features |= Feature_HasMips2; 2858| 7.72k| if ((FB[Mips::FeatureMips3_32])) ------------------ | Branch (2858:7): [True: 7.71k, False: 11] ------------------ 2859| 7.71k| Features |= Feature_HasMips3_32; 2860| 7.72k| if ((FB[Mips::FeatureMips3_32r2])) ------------------ | Branch (2860:7): [True: 162, False: 7.56k] ------------------ 2861| 162| Features |= Feature_HasMips3_32r2; 2862| 7.72k| if ((FB[Mips::FeatureMips3])) ------------------ | Branch (2862:7): [True: 162, False: 7.56k] ------------------ 2863| 162| Features |= Feature_HasMips3; 2864| 7.72k| if ((FB[Mips::FeatureMips4_32])) ------------------ | Branch (2864:7): [True: 7.71k, False: 13] ------------------ 2865| 7.71k| Features |= Feature_HasMips4_32; 2866| 7.72k| if ((!FB[Mips::FeatureMips4_32])) ------------------ | Branch (2866:7): [True: 13, False: 7.71k] ------------------ 2867| 13| Features |= Feature_NotMips4_32; 2868| 7.72k| if ((FB[Mips::FeatureMips4_32r2])) ------------------ | Branch (2868:7): [True: 160, False: 7.56k] ------------------ 2869| 160| Features |= Feature_HasMips4_32r2; 2870| 7.72k| if ((FB[Mips::FeatureMips5_32r2])) ------------------ | Branch (2870:7): [True: 1, False: 7.72k] ------------------ 2871| 1| Features |= Feature_HasMips5_32r2; 2872| 7.72k| if ((FB[Mips::FeatureMips32])) ------------------ | Branch (2872:7): [True: 7.55k, False: 172] ------------------ 2873| 7.55k| Features |= Feature_HasMips32; 2874| 7.72k| if ((FB[Mips::FeatureMips32r2])) ------------------ | Branch (2874:7): [True: 0, False: 7.72k] ------------------ 2875| 0| Features |= Feature_HasMips32r2; 2876| 7.72k| if ((FB[Mips::FeatureMips32r5])) ------------------ | Branch (2876:7): [True: 0, False: 7.72k] ------------------ 2877| 0| Features |= Feature_HasMips32r5; 2878| 7.72k| if ((FB[Mips::FeatureMips32r6])) ------------------ | Branch (2878:7): [True: 0, False: 7.72k] ------------------ 2879| 0| Features |= Feature_HasMips32r6; 2880| 7.72k| if ((!FB[Mips::FeatureMips32r6])) ------------------ | Branch (2880:7): [True: 7.72k, False: 0] ------------------ 2881| 7.72k| Features |= Feature_NotMips32r6; 2882| 7.72k| if ((FB[Mips::FeatureGP64Bit])) ------------------ | Branch (2882:7): [True: 162, False: 7.56k] ------------------ 2883| 162| Features |= Feature_IsGP64bit; 2884| 7.72k| if ((!FB[Mips::FeatureGP64Bit])) ------------------ | Branch (2884:7): [True: 7.56k, False: 162] ------------------ 2885| 7.56k| Features |= Feature_IsGP32bit; 2886| 7.72k| if ((FB[Mips::FeatureMips64])) ------------------ | Branch (2886:7): [True: 1, False: 7.72k] ------------------ 2887| 1| Features |= Feature_HasMips64; 2888| 7.72k| if ((!FB[Mips::FeatureMips64])) ------------------ | Branch (2888:7): [True: 7.72k, False: 1] ------------------ 2889| 7.72k| Features |= Feature_NotMips64; 2890| 7.72k| if ((FB[Mips::FeatureMips64r2])) ------------------ | Branch (2890:7): [True: 0, False: 7.72k] ------------------ 2891| 0| Features |= Feature_HasMips64r2; 2892| 7.72k| if ((FB[Mips::FeatureMips64r6])) ------------------ | Branch (2892:7): [True: 0, False: 7.72k] ------------------ 2893| 0| Features |= Feature_HasMips64r6; 2894| 7.72k| if ((!FB[Mips::FeatureMips64r6])) ------------------ | Branch (2894:7): [True: 7.72k, False: 0] ------------------ 2895| 7.72k| Features |= Feature_NotMips64r6; 2896| 7.72k| if ((FB[Mips::FeatureMicroMips]) && (FB[Mips::FeatureMips32r6])) ------------------ | Branch (2896:7): [True: 0, False: 7.72k] | Branch (2896:7): [True: 0, False: 7.72k] | Branch (2896:39): [True: 0, False: 0] ------------------ 2897| 0| Features |= Feature_HasMicroMips32r6; 2898| 7.72k| if ((FB[Mips::FeatureMicroMips]) && (FB[Mips::FeatureMips64r6])) ------------------ | Branch (2898:7): [True: 0, False: 7.72k] | Branch (2898:7): [True: 0, False: 7.72k] | Branch (2898:39): [True: 0, False: 0] ------------------ 2899| 0| Features |= Feature_HasMicroMips64r6; 2900| 7.72k| if ((FB[Mips::FeatureMips16])) ------------------ | Branch (2900:7): [True: 0, False: 7.72k] ------------------ 2901| 0| Features |= Feature_InMips16Mode; 2902| 7.72k| if ((FB[Mips::FeatureCnMips])) ------------------ | Branch (2902:7): [True: 0, False: 7.72k] ------------------ 2903| 0| Features |= Feature_HasCnMips; 2904| 7.72k| if ((!FB[Mips::FeatureMips16])) ------------------ | Branch (2904:7): [True: 7.72k, False: 0] ------------------ 2905| 7.72k| Features |= Feature_HasStdEnc; 2906| 7.72k| if ((FB[Mips::FeatureMicroMips])) ------------------ | Branch (2906:7): [True: 0, False: 7.72k] ------------------ 2907| 0| Features |= Feature_InMicroMips; 2908| 7.72k| if ((!FB[Mips::FeatureMicroMips])) ------------------ | Branch (2908:7): [True: 7.72k, False: 0] ------------------ 2909| 7.72k| Features |= Feature_NotInMicroMips; 2910| 7.72k| if ((FB[Mips::FeatureEVA]) && (FB[Mips::FeatureMips32r2])) ------------------ | Branch (2910:7): [True: 0, False: 7.72k] | Branch (2910:7): [True: 0, False: 7.72k] | Branch (2910:33): [True: 0, False: 0] ------------------ 2911| 0| Features |= Feature_HasEVA; 2912| 7.72k| if ((FB[Mips::FeatureMSA])) ------------------ | Branch (2912:7): [True: 3.49k, False: 4.23k] ------------------ 2913| 3.49k| Features |= Feature_HasMSA; 2914| 7.72k| if ((FB[Mips::FeatureFP64Bit])) ------------------ | Branch (2914:7): [True: 166, False: 7.56k] ------------------ 2915| 166| Features |= Feature_IsFP64bit; 2916| 7.72k| if ((!FB[Mips::FeatureFP64Bit])) ------------------ | Branch (2916:7): [True: 7.56k, False: 166] ------------------ 2917| 7.56k| Features |= Feature_NotFP64bit; 2918| 7.72k| if ((FB[Mips::FeatureSingleFloat])) ------------------ | Branch (2918:7): [True: 0, False: 7.72k] ------------------ 2919| 0| Features |= Feature_IsSingleFloat; 2920| 7.72k| if ((!FB[Mips::FeatureSingleFloat])) ------------------ | Branch (2920:7): [True: 7.72k, False: 0] ------------------ 2921| 7.72k| Features |= Feature_IsNotSingleFloat; 2922| 7.72k| if ((!FB[Mips::FeatureSoftFloat])) ------------------ | Branch (2922:7): [True: 7.72k, False: 0] ------------------ 2923| 7.72k| Features |= Feature_IsNotSoftFloat; 2924| 7.72k| if ((FB[Mips::FeatureDSP])) ------------------ | Branch (2924:7): [True: 2, False: 7.72k] ------------------ 2925| 2| Features |= Feature_HasDSP; 2926| 7.72k| if ((FB[Mips::FeatureDSPR2])) ------------------ | Branch (2926:7): [True: 0, False: 7.72k] ------------------ 2927| 0| Features |= Feature_HasDSPR2; 2928| 7.72k| if ((FB[Mips::FeatureDSPR3])) ------------------ | Branch (2928:7): [True: 0, False: 7.72k] ------------------ 2929| 0| Features |= Feature_HasDSPR3; 2930| 7.72k| return Features; 2931| 7.72k|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser15mnemonicIsValidEN7llvm_ks9StringRefEj: 5215| 8.58k|mnemonicIsValid(StringRef Mnemonic, unsigned VariantID) { 5216| | // Find the appropriate table for this asm variant. 5217| 8.58k| const MatchEntry *Start, *End; 5218| 8.58k| switch (VariantID) { 5219| 0| default: llvm_unreachable("invalid variant!"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ | Branch (5219:3): [True: 0, False: 8.58k] ------------------ 5220| 8.58k| case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break; ------------------ | Branch (5220:3): [True: 8.58k, False: 0] ------------------ 5221| 8.58k| } 5222| | // Search the table. 5223| 8.58k| auto MnemonicRange = std::equal_range(Start, End, Mnemonic, LessOpcode()); 5224| 8.58k| return MnemonicRange.first != MnemonicRange.second; 5225| 8.58k|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_110LessOpcodeclERKNS_10MatchEntryEN7llvm_ks9StringRefE: 3125| 141k| bool operator()(const MatchEntry &LHS, StringRef RHS) { 3126| 141k| return LHS.getMnemonic() < RHS; 3127| 141k| } MipsAsmParser.cpp:_ZNK12_GLOBAL__N_110MatchEntry11getMnemonicEv: 3117| 259k| StringRef getMnemonic() const { 3118| 259k| return StringRef(MnemonicTable + Mnemonic + 1, 3119| 259k| MnemonicTable[Mnemonic]); 3120| 259k| } MipsAsmParser.cpp:_ZN12_GLOBAL__N_110LessOpcodeclEN7llvm_ks9StringRefERKNS_10MatchEntryE: 3128| 104k| bool operator()(StringRef LHS, const MatchEntry &RHS) { 3129| 104k| return LHS < RHS.getMnemonic(); 3130| 104k| } MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser22MatchOperandParserImplERN7llvm_ks15SmallVectorImplINSt3__110unique_ptrINS1_18MCParsedAsmOperandENS3_14default_deleteIS5_EEEEEENS1_9StringRefE: 7928| 9.23k| StringRef Mnemonic) { 7929| | // Get the current feature set. 7930| 9.23k| uint64_t AvailableFeatures = getAvailableFeatures(); 7931| | 7932| | // Get the next operand index. 7933| 9.23k| unsigned NextOpNum = Operands.size() - 1; 7934| | // Search the table. 7935| 9.23k| auto MnemonicRange = 7936| 9.23k| std::equal_range(std::begin(OperandMatchTable), std::end(OperandMatchTable), 7937| 9.23k| Mnemonic, LessOpcodeOperand()); 7938| | 7939| 9.23k| if (MnemonicRange.first == MnemonicRange.second) ------------------ | Branch (7939:7): [True: 0, False: 9.23k] ------------------ 7940| 0| return MatchOperand_NoMatch; 7941| | 7942| 9.23k| for (const OperandMatchEntry *it = MnemonicRange.first, 7943| 49.7k| *ie = MnemonicRange.second; it != ie; ++it) { ------------------ | Branch (7943:36): [True: 45.6k, False: 4.07k] ------------------ 7944| | // equal_range guarantees that instruction mnemonic matches. 7945| 45.6k| assert(Mnemonic == it->getMnemonic()); ------------------ | Branch (7945:5): [True: 45.6k, False: 0] ------------------ 7946| | 7947| | // check if the available features match 7948| 45.6k| if ((AvailableFeatures & it->RequiredFeatures) != it->RequiredFeatures) { ------------------ | Branch (7948:9): [True: 24.1k, False: 21.5k] ------------------ 7949| 24.1k| continue; 7950| 24.1k| } 7951| | 7952| | // check if the operand in question has a custom parser. 7953| 21.5k| if (!(it->OperandMask & (1 << NextOpNum))) ------------------ | Branch (7953:9): [True: 1.10k, False: 20.4k] ------------------ 7954| 1.10k| continue; 7955| | 7956| | // call custom parse method to handle the operand 7957| 20.4k| OperandMatchResultTy Result = tryCustomParseOperand(Operands, it->Class); 7958| 20.4k| if (Result != MatchOperand_NoMatch) ------------------ | Branch (7958:9): [True: 5.16k, False: 15.3k] ------------------ 7959| 5.16k| return Result; 7960| 20.4k| } 7961| | 7962| | // Okay, we had no match. 7963| 4.07k| return MatchOperand_NoMatch; 7964| 9.23k|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_117LessOpcodeOperandclERKNS_17OperandMatchEntryEN7llvm_ks9StringRefE: 5362| 105k| bool operator()(const OperandMatchEntry &LHS, StringRef RHS) { 5363| 105k| return LHS.getMnemonic() < RHS; 5364| 105k| } MipsAsmParser.cpp:_ZN12_GLOBAL__N_117LessOpcodeOperandclEN7llvm_ks9StringRefERKNS_17OperandMatchEntryE: 5365| 78.6k| bool operator()(StringRef LHS, const OperandMatchEntry &RHS) { 5366| 78.6k| return LHS < RHS.getMnemonic(); 5367| 78.6k| } MipsAsmParser.cpp:_ZNK12_GLOBAL__N_117OperandMatchEntry11getMnemonicEv: 5354| 230k| StringRef getMnemonic() const { 5355| 230k| return StringRef(MnemonicTable + Mnemonic + 1, 5356| 230k| MnemonicTable[Mnemonic]); 5357| 230k| } MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser21tryCustomParseOperandERN7llvm_ks15SmallVectorImplINSt3__110unique_ptrINS1_18MCParsedAsmOperandENS3_14default_deleteIS5_EEEEEEj: 7849| 20.4k| unsigned MCK) { 7850| | 7851| 20.4k| switch(MCK) { 7852| 0| case MCK_ACC64DSPAsmReg: ------------------ | Branch (7852:3): [True: 0, False: 20.4k] ------------------ 7853| 0| return parseAnyRegister(Operands); 7854| 0| case MCK_AFGR64AsmReg: ------------------ | Branch (7854:3): [True: 0, False: 20.4k] ------------------ 7855| 0| return parseAnyRegister(Operands); 7856| 0| case MCK_CCRAsmReg: ------------------ | Branch (7856:3): [True: 0, False: 20.4k] ------------------ 7857| 0| return parseAnyRegister(Operands); 7858| 0| case MCK_COP0AsmReg: ------------------ | Branch (7858:3): [True: 0, False: 20.4k] ------------------ 7859| 0| return parseAnyRegister(Operands); 7860| 65| case MCK_COP2AsmReg: ------------------ | Branch (7860:3): [True: 65, False: 20.4k] ------------------ 7861| 65| return parseAnyRegister(Operands); 7862| 0| case MCK_COP3AsmReg: ------------------ | Branch (7862:3): [True: 0, False: 20.4k] ------------------ 7863| 0| return parseAnyRegister(Operands); 7864| 0| case MCK_FCCAsmReg: ------------------ | Branch (7864:3): [True: 0, False: 20.4k] ------------------ 7865| 0| return parseAnyRegister(Operands); 7866| 32| case MCK_FGR32AsmReg: ------------------ | Branch (7866:3): [True: 32, False: 20.4k] ------------------ 7867| 32| return parseAnyRegister(Operands); 7868| 0| case MCK_FGR64AsmReg: ------------------ | Branch (7868:3): [True: 0, False: 20.4k] ------------------ 7869| 0| return parseAnyRegister(Operands); 7870| 0| case MCK_FGRH32AsmReg: ------------------ | Branch (7870:3): [True: 0, False: 20.4k] ------------------ 7871| 0| return parseAnyRegister(Operands); 7872| 15.7k| case MCK_GPR32AsmReg: ------------------ | Branch (7872:3): [True: 15.7k, False: 4.76k] ------------------ 7873| 15.7k| return parseAnyRegister(Operands); 7874| 0| case MCK_GPR64AsmReg: ------------------ | Branch (7874:3): [True: 0, False: 20.4k] ------------------ 7875| 0| return parseAnyRegister(Operands); 7876| 0| case MCK_GPRMM16AsmReg: ------------------ | Branch (7876:3): [True: 0, False: 20.4k] ------------------ 7877| 0| return parseAnyRegister(Operands); 7878| 0| case MCK_GPRMM16AsmRegMoveP: ------------------ | Branch (7878:3): [True: 0, False: 20.4k] ------------------ 7879| 0| return parseAnyRegister(Operands); 7880| 0| case MCK_GPRMM16AsmRegZero: ------------------ | Branch (7880:3): [True: 0, False: 20.4k] ------------------ 7881| 0| return parseAnyRegister(Operands); 7882| 0| case MCK_HI32DSPAsmReg: ------------------ | Branch (7882:3): [True: 0, False: 20.4k] ------------------ 7883| 0| return parseAnyRegister(Operands); 7884| 0| case MCK_HWRegsAsmReg: ------------------ | Branch (7884:3): [True: 0, False: 20.4k] ------------------ 7885| 0| return parseAnyRegister(Operands); 7886| 0| case MCK_LO32DSPAsmReg: ------------------ | Branch (7886:3): [True: 0, False: 20.4k] ------------------ 7887| 0| return parseAnyRegister(Operands); 7888| 0| case MCK_MSA128AsmReg: ------------------ | Branch (7888:3): [True: 0, False: 20.4k] ------------------ 7889| 0| return parseAnyRegister(Operands); 7890| 0| case MCK_MSACtrlAsmReg: ------------------ | Branch (7890:3): [True: 0, False: 20.4k] ------------------ 7891| 0| return parseAnyRegister(Operands); 7892| 0| case MCK_MicroMipsMem: ------------------ | Branch (7892:3): [True: 0, False: 20.4k] ------------------ 7893| 0| return parseMemOperand(Operands); 7894| 0| case MCK_MicroMipsMemSP: ------------------ | Branch (7894:3): [True: 0, False: 20.4k] ------------------ 7895| 0| return parseMemOperand(Operands); 7896| 0| case MCK_InvNum: ------------------ | Branch (7896:3): [True: 0, False: 20.4k] ------------------ 7897| 0| return parseInvNum(Operands); 7898| 4.45k| case MCK_JumpTarget: ------------------ | Branch (7898:3): [True: 4.45k, False: 16.0k] ------------------ 7899| 4.45k| return parseJumpTarget(Operands); 7900| 0| case MCK_MemOffsetSimm11: ------------------ | Branch (7900:3): [True: 0, False: 20.4k] ------------------ 7901| 0| return parseMemOperand(Operands); 7902| 0| case MCK_MemOffsetSimm16: ------------------ | Branch (7902:3): [True: 0, False: 20.4k] ------------------ 7903| 0| return parseMemOperand(Operands); 7904| 0| case MCK_MemOffsetSimm9: ------------------ | Branch (7904:3): [True: 0, False: 20.4k] ------------------ 7905| 0| return parseMemOperand(Operands); 7906| 0| case MCK_MemOffsetSimm9GPR: ------------------ | Branch (7906:3): [True: 0, False: 20.4k] ------------------ 7907| 0| return parseMemOperand(Operands); 7908| 0| case MCK_MemOffsetUimm4: ------------------ | Branch (7908:3): [True: 0, False: 20.4k] ------------------ 7909| 0| return parseMemOperand(Operands); 7910| 215| case MCK_Mem: ------------------ | Branch (7910:3): [True: 215, False: 20.2k] ------------------ 7911| 215| return parseMemOperand(Operands); 7912| 0| case MCK_MovePRegPair: ------------------ | Branch (7912:3): [True: 0, False: 20.4k] ------------------ 7913| 0| return parseMovePRegPair(Operands); 7914| 0| case MCK_RegList16: ------------------ | Branch (7914:3): [True: 0, False: 20.4k] ------------------ 7915| 0| return parseRegisterList(Operands); 7916| 0| case MCK_RegList: ------------------ | Branch (7916:3): [True: 0, False: 20.4k] ------------------ 7917| 0| return parseRegisterList(Operands); 7918| 0| case MCK_RegPair: ------------------ | Branch (7918:3): [True: 0, False: 20.4k] ------------------ 7919| 0| return parseRegisterPair(Operands); 7920| 0| default: ------------------ | Branch (7920:3): [True: 0, False: 20.4k] ------------------ 7921| 0| return MatchOperand_NoMatch; 7922| 20.4k| } 7923| 0| return MatchOperand_NoMatch; 7924| 20.4k|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser20MatchInstructionImplERKN7llvm_ks15SmallVectorImplINSt3__110unique_ptrINS1_18MCParsedAsmOperandENS3_14default_deleteIS5_EEEEEERNS1_6MCInstERmbj: 5230| 4.27k| bool matchingInlineAsm, unsigned VariantID) { 5231| | // Eliminate obvious mismatches. 5232| 4.27k| if (Operands.size() > 9) { ------------------ | Branch (5232:7): [True: 0, False: 4.27k] ------------------ 5233| 0| ErrorInfo = 9; 5234| 0| return Match_InvalidOperand; 5235| 0| } 5236| | 5237| | // Get the current feature set. 5238| 4.27k| uint64_t AvailableFeatures = getAvailableFeatures(); 5239| | 5240| | // Get the instruction mnemonic, which is the first token. 5241| 4.27k| StringRef Mnemonic = ((MipsOperand&)*Operands[0]).getToken(); 5242| | 5243| | // Some state to try to produce better error messages. 5244| 4.27k| bool HadMatchOtherThanFeatures = false; 5245| 4.27k| bool HadMatchOtherThanPredicate = false; 5246| 4.27k| unsigned RetCode = Match_InvalidOperand; 5247| 4.27k| uint64_t MissingFeatures = ~0ULL; 5248| | // Set ErrorInfo to the operand that mismatches if it is 5249| | // wrong for all instances of the instruction. 5250| 4.27k| ErrorInfo = ~0ULL; 5251| | // Find the appropriate table for this asm variant. 5252| 4.27k| const MatchEntry *Start, *End; 5253| 4.27k| switch (VariantID) { 5254| 0| default: llvm_unreachable("invalid variant!"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ | Branch (5254:3): [True: 0, False: 4.27k] ------------------ 5255| 4.27k| case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break; ------------------ | Branch (5255:3): [True: 4.27k, False: 0] ------------------ 5256| 4.27k| } 5257| | // Search the table. 5258| 4.27k| auto MnemonicRange = std::equal_range(Start, End, Mnemonic, LessOpcode()); 5259| | 5260| | // Return a more specific error code if no mnemonics match. 5261| 4.27k| if (MnemonicRange.first == MnemonicRange.second) ------------------ | Branch (5261:7): [True: 0, False: 4.27k] ------------------ 5262| 0| return Match_MnemonicFail; 5263| | 5264| 4.27k| for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second; 5265| 13.2k| it != ie; ++it) { ------------------ | Branch (5265:8): [True: 13.1k, False: 14] ------------------ 5266| | // equal_range guarantees that instruction mnemonic matches. 5267| 13.1k| assert(Mnemonic == it->getMnemonic()); ------------------ | Branch (5267:5): [True: 13.1k, False: 0] ------------------ 5268| 13.1k| bool OperandsValid = true; 5269| 26.3k| for (unsigned i = 0; i != 8; ++i) { ------------------ | Branch (5269:26): [True: 26.3k, False: 0] ------------------ 5270| 26.3k| auto Formal = static_cast(it->Classes[i]); 5271| 26.3k| if (i+1 >= Operands.size()) { ------------------ | Branch (5271:11): [True: 11.8k, False: 14.5k] ------------------ 5272| 11.8k| OperandsValid = (Formal == InvalidMatchClass); 5273| 11.8k| if (!OperandsValid) ErrorInfo = i+1; ------------------ | Branch (5273:13): [True: 11, False: 11.8k] ------------------ 5274| 11.8k| break; 5275| 11.8k| } 5276| 14.5k| MCParsedAsmOperand &Actual = *Operands[i+1]; 5277| 14.5k| unsigned Diag = validateOperandClass(Actual, Formal); 5278| 14.5k| if (Diag == Match_Success) ------------------ | Branch (5278:11): [True: 13.1k, False: 1.35k] ------------------ 5279| 13.1k| continue; 5280| | // If the generic handler indicates an invalid operand 5281| | // failure, check for a special case. 5282| 1.35k| if (Diag == Match_InvalidOperand) { ------------------ | Branch (5282:11): [True: 1.35k, False: 0] ------------------ 5283| 1.35k| Diag = validateTargetOperandClass(Actual, Formal); 5284| 1.35k| if (Diag == Match_Success) ------------------ | Branch (5284:13): [True: 0, False: 1.35k] ------------------ 5285| 0| continue; 5286| 1.35k| } 5287| | // If this operand is broken for all of the instances of this 5288| | // mnemonic, keep track of it so we can report loc info. 5289| | // If we already had a match that only failed due to a 5290| | // target predicate, that diagnostic is preferred. 5291| 1.35k| if (!HadMatchOtherThanPredicate && ------------------ | Branch (5291:11): [True: 1.35k, False: 0] ------------------ 5292| 1.35k| (it == MnemonicRange.first || ErrorInfo <= i+1)) { ------------------ | Branch (5292:12): [True: 523, False: 834] | Branch (5292:41): [True: 834, False: 0] ------------------ 5293| 1.35k| ErrorInfo = i+1; 5294| | // InvalidOperand is the default. Prefer specificity. 5295| 1.35k| if (Diag != Match_InvalidOperand) ------------------ | Branch (5295:13): [True: 0, False: 1.35k] ------------------ 5296| 0| RetCode = Diag; 5297| 1.35k| } 5298| | // Otherwise, just reject this instance of the mnemonic. 5299| 1.35k| OperandsValid = false; 5300| 1.35k| break; 5301| 1.35k| } 5302| | 5303| 13.1k| if (!OperandsValid) continue; ------------------ | Branch (5303:9): [True: 1.36k, False: 11.8k] ------------------ 5304| 11.8k| if ((AvailableFeatures & it->RequiredFeatures) != it->RequiredFeatures) { ------------------ | Branch (5304:9): [True: 7.56k, False: 4.26k] ------------------ 5305| 7.56k| HadMatchOtherThanFeatures = true; 5306| 7.56k| uint64_t NewMissingFeatures = it->RequiredFeatures & ~AvailableFeatures; 5307| 7.56k| if (countPopulation(NewMissingFeatures) <= ------------------ | Branch (5307:11): [True: 7.56k, False: 0] ------------------ 5308| 7.56k| countPopulation(MissingFeatures)) 5309| 7.56k| MissingFeatures = NewMissingFeatures; 5310| 7.56k| continue; 5311| 7.56k| } 5312| | 5313| 4.26k| Inst.clear(); 5314| | 5315| 4.26k| if (matchingInlineAsm) { ------------------ | Branch (5315:9): [True: 0, False: 4.26k] ------------------ 5316| 0| Inst.setOpcode(it->Opcode); 5317| 0| convertToMapAndConstraints(it->ConvertFn, Operands); 5318| 0| return Match_Success; 5319| 0| } 5320| | 5321| | // We have selected a definite instruction, convert the parsed 5322| | // operands into the appropriate MCInst. 5323| 4.26k| convertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands); 5324| | 5325| | // We have a potential match. Check the target predicate to 5326| | // handle any context sensitive constraints. 5327| 4.26k| unsigned MatchResult; 5328| 4.26k| if ((MatchResult = checkTargetMatchPredicate(Inst)) != Match_Success) { ------------------ | Branch (5328:9): [True: 0, False: 4.26k] ------------------ 5329| 0| Inst.clear(); 5330| 0| RetCode = MatchResult; 5331| 0| HadMatchOtherThanPredicate = true; 5332| 0| continue; 5333| 0| } 5334| | 5335| 4.26k| return Match_Success; 5336| 4.26k| } 5337| | 5338| | // Okay, we had no match. Try to return a useful error code. 5339| 14| if (HadMatchOtherThanPredicate || !HadMatchOtherThanFeatures) ------------------ | Branch (5339:7): [True: 0, False: 14] | Branch (5339:37): [True: 14, False: 0] ------------------ 5340| 14| return RetCode; 5341| | 5342| | // Missing feature matches return which features were missing 5343| 0| ErrorInfo = MissingFeatures; 5344| 0| return Match_MissingFeature; 5345| 14|} MipsAsmParser.cpp:_ZL20validateOperandClassRN7llvm_ks18MCParsedAsmOperandEN12_GLOBAL__N_114MatchClassKindE: 2074| 14.5k|static unsigned validateOperandClass(MCParsedAsmOperand &GOp, MatchClassKind Kind) { 2075| 14.5k| MipsOperand &Operand = (MipsOperand&)GOp; 2076| 14.5k| if (Kind == InvalidMatchClass) ------------------ | Branch (2076:7): [True: 2, False: 14.5k] ------------------ 2077| 2| return MCTargetAsmParser::Match_InvalidOperand; 2078| | 2079| 14.5k| if (Operand.isToken()) ------------------ | Branch (2079:7): [True: 0, False: 14.5k] ------------------ 2080| 0| return isSubclass(matchTokenString(Operand.getToken()), Kind) ? ------------------ | Branch (2080:12): [True: 0, False: 0] ------------------ 2081| 0| MCTargetAsmParser::Match_Success : 2082| 0| MCTargetAsmParser::Match_InvalidOperand; 2083| | 2084| | // 'ACC64DSPAsmReg' class 2085| 14.5k| if (Kind == MCK_ACC64DSPAsmReg) { ------------------ | Branch (2085:7): [True: 0, False: 14.5k] ------------------ 2086| 0| if (Operand.isACCAsmReg()) ------------------ | Branch (2086:9): [True: 0, False: 0] ------------------ 2087| 0| return MCTargetAsmParser::Match_Success; 2088| 0| } 2089| | 2090| | // 'AFGR64AsmReg' class 2091| 14.5k| if (Kind == MCK_AFGR64AsmReg) { ------------------ | Branch (2091:7): [True: 0, False: 14.5k] ------------------ 2092| 0| if (Operand.isFGRAsmReg()) ------------------ | Branch (2092:9): [True: 0, False: 0] ------------------ 2093| 0| return MCTargetAsmParser::Match_Success; 2094| 0| } 2095| | 2096| | // 'CCRAsmReg' class 2097| 14.5k| if (Kind == MCK_CCRAsmReg) { ------------------ | Branch (2097:7): [True: 0, False: 14.5k] ------------------ 2098| 0| if (Operand.isCCRAsmReg()) ------------------ | Branch (2098:9): [True: 0, False: 0] ------------------ 2099| 0| return MCTargetAsmParser::Match_Success; 2100| 0| } 2101| | 2102| | // 'COP0AsmReg' class 2103| 14.5k| if (Kind == MCK_COP0AsmReg) { ------------------ | Branch (2103:7): [True: 0, False: 14.5k] ------------------ 2104| 0| if (Operand.isCOP0AsmReg()) ------------------ | Branch (2104:9): [True: 0, False: 0] ------------------ 2105| 0| return MCTargetAsmParser::Match_Success; 2106| 0| } 2107| | 2108| | // 'COP2AsmReg' class 2109| 14.5k| if (Kind == MCK_COP2AsmReg) { ------------------ | Branch (2109:7): [True: 64, False: 14.4k] ------------------ 2110| 64| if (Operand.isCOP2AsmReg()) ------------------ | Branch (2110:9): [True: 64, False: 0] ------------------ 2111| 64| return MCTargetAsmParser::Match_Success; 2112| 64| } 2113| | 2114| | // 'COP3AsmReg' class 2115| 14.4k| if (Kind == MCK_COP3AsmReg) { ------------------ | Branch (2115:7): [True: 0, False: 14.4k] ------------------ 2116| 0| if (Operand.isCOP3AsmReg()) ------------------ | Branch (2116:9): [True: 0, False: 0] ------------------ 2117| 0| return MCTargetAsmParser::Match_Success; 2118| 0| } 2119| | 2120| | // 'FCCAsmReg' class 2121| 14.4k| if (Kind == MCK_FCCAsmReg) { ------------------ | Branch (2121:7): [True: 0, False: 14.4k] ------------------ 2122| 0| if (Operand.isFCCAsmReg()) ------------------ | Branch (2122:9): [True: 0, False: 0] ------------------ 2123| 0| return MCTargetAsmParser::Match_Success; 2124| 0| } 2125| | 2126| | // 'FGR32AsmReg' class 2127| 14.4k| if (Kind == MCK_FGR32AsmReg) { ------------------ | Branch (2127:7): [True: 0, False: 14.4k] ------------------ 2128| 0| if (Operand.isFGRAsmReg()) ------------------ | Branch (2128:9): [True: 0, False: 0] ------------------ 2129| 0| return MCTargetAsmParser::Match_Success; 2130| 0| } 2131| | 2132| | // 'FGR64AsmReg' class 2133| 14.4k| if (Kind == MCK_FGR64AsmReg) { ------------------ | Branch (2133:7): [True: 0, False: 14.4k] ------------------ 2134| 0| if (Operand.isFGRAsmReg()) ------------------ | Branch (2134:9): [True: 0, False: 0] ------------------ 2135| 0| return MCTargetAsmParser::Match_Success; 2136| 0| } 2137| | 2138| | // 'FGRH32AsmReg' class 2139| 14.4k| if (Kind == MCK_FGRH32AsmReg) { ------------------ | Branch (2139:7): [True: 0, False: 14.4k] ------------------ 2140| 0| if (Operand.isFGRAsmReg()) ------------------ | Branch (2140:9): [True: 0, False: 0] ------------------ 2141| 0| return MCTargetAsmParser::Match_Success; 2142| 0| } 2143| | 2144| | // 'GPR32AsmReg' class 2145| 14.4k| if (Kind == MCK_GPR32AsmReg) { ------------------ | Branch (2145:7): [True: 2.18k, False: 12.2k] ------------------ 2146| 2.18k| if (Operand.isGPRAsmReg()) ------------------ | Branch (2146:9): [True: 1.32k, False: 855] ------------------ 2147| 1.32k| return MCTargetAsmParser::Match_Success; 2148| 2.18k| } 2149| | 2150| | // 'GPR64AsmReg' class 2151| 13.1k| if (Kind == MCK_GPR64AsmReg) { ------------------ | Branch (2151:7): [True: 9, False: 13.1k] ------------------ 2152| 9| if (Operand.isGPRAsmReg()) ------------------ | Branch (2152:9): [True: 0, False: 9] ------------------ 2153| 0| return MCTargetAsmParser::Match_Success; 2154| 9| } 2155| | 2156| | // 'GPRMM16AsmReg' class 2157| 13.1k| if (Kind == MCK_GPRMM16AsmReg) { ------------------ | Branch (2157:7): [True: 0, False: 13.1k] ------------------ 2158| 0| if (Operand.isMM16AsmReg()) ------------------ | Branch (2158:9): [True: 0, False: 0] ------------------ 2159| 0| return MCTargetAsmParser::Match_Success; 2160| 0| } 2161| | 2162| | // 'GPRMM16AsmRegMoveP' class 2163| 13.1k| if (Kind == MCK_GPRMM16AsmRegMoveP) { ------------------ | Branch (2163:7): [True: 0, False: 13.1k] ------------------ 2164| 0| if (Operand.isMM16AsmRegMoveP()) ------------------ | Branch (2164:9): [True: 0, False: 0] ------------------ 2165| 0| return MCTargetAsmParser::Match_Success; 2166| 0| } 2167| | 2168| | // 'GPRMM16AsmRegZero' class 2169| 13.1k| if (Kind == MCK_GPRMM16AsmRegZero) { ------------------ | Branch (2169:7): [True: 0, False: 13.1k] ------------------ 2170| 0| if (Operand.isMM16AsmRegZero()) ------------------ | Branch (2170:9): [True: 0, False: 0] ------------------ 2171| 0| return MCTargetAsmParser::Match_Success; 2172| 0| } 2173| | 2174| | // 'HI32DSPAsmReg' class 2175| 13.1k| if (Kind == MCK_HI32DSPAsmReg) { ------------------ | Branch (2175:7): [True: 0, False: 13.1k] ------------------ 2176| 0| if (Operand.isACCAsmReg()) ------------------ | Branch (2176:9): [True: 0, False: 0] ------------------ 2177| 0| return MCTargetAsmParser::Match_Success; 2178| 0| } 2179| | 2180| | // 'HWRegsAsmReg' class 2181| 13.1k| if (Kind == MCK_HWRegsAsmReg) { ------------------ | Branch (2181:7): [True: 0, False: 13.1k] ------------------ 2182| 0| if (Operand.isHWRegsAsmReg()) ------------------ | Branch (2182:9): [True: 0, False: 0] ------------------ 2183| 0| return MCTargetAsmParser::Match_Success; 2184| 0| } 2185| | 2186| | // 'Imm' class 2187| 13.1k| if (Kind == MCK_Imm) { ------------------ | Branch (2187:7): [True: 371, False: 12.7k] ------------------ 2188| 371| if (Operand.isImm()) ------------------ | Branch (2188:9): [True: 371, False: 0] ------------------ 2189| 371| return MCTargetAsmParser::Match_Success; 2190| 371| } 2191| | 2192| | // 'LO32DSPAsmReg' class 2193| 12.7k| if (Kind == MCK_LO32DSPAsmReg) { ------------------ | Branch (2193:7): [True: 0, False: 12.7k] ------------------ 2194| 0| if (Operand.isACCAsmReg()) ------------------ | Branch (2194:9): [True: 0, False: 0] ------------------ 2195| 0| return MCTargetAsmParser::Match_Success; 2196| 0| } 2197| | 2198| | // 'MSA128AsmReg' class 2199| 12.7k| if (Kind == MCK_MSA128AsmReg) { ------------------ | Branch (2199:7): [True: 0, False: 12.7k] ------------------ 2200| 0| if (Operand.isMSA128AsmReg()) ------------------ | Branch (2200:9): [True: 0, False: 0] ------------------ 2201| 0| return MCTargetAsmParser::Match_Success; 2202| 0| } 2203| | 2204| | // 'MSACtrlAsmReg' class 2205| 12.7k| if (Kind == MCK_MSACtrlAsmReg) { ------------------ | Branch (2205:7): [True: 0, False: 12.7k] ------------------ 2206| 0| if (Operand.isMSACtrlAsmReg()) ------------------ | Branch (2206:9): [True: 0, False: 0] ------------------ 2207| 0| return MCTargetAsmParser::Match_Success; 2208| 0| } 2209| | 2210| | // 'MicroMipsMem' class 2211| 12.7k| if (Kind == MCK_MicroMipsMem) { ------------------ | Branch (2211:7): [True: 0, False: 12.7k] ------------------ 2212| 0| if (Operand.isMemWithGRPMM16Base()) ------------------ | Branch (2212:9): [True: 0, False: 0] ------------------ 2213| 0| return MCTargetAsmParser::Match_Success; 2214| 0| } 2215| | 2216| | // 'MicroMipsMemSP' class 2217| 12.7k| if (Kind == MCK_MicroMipsMemSP) { ------------------ | Branch (2217:7): [True: 180, False: 12.6k] ------------------ 2218| 180| if (Operand.isMemWithUimmWordAlignedOffsetSP<7>()) ------------------ | Branch (2218:9): [True: 0, False: 180] ------------------ 2219| 0| return MCTargetAsmParser::Match_Success; 2220| 180| } 2221| | 2222| | // 'InvNum' class 2223| 12.7k| if (Kind == MCK_InvNum) { ------------------ | Branch (2223:7): [True: 0, False: 12.7k] ------------------ 2224| 0| if (Operand.isInvNum()) ------------------ | Branch (2224:9): [True: 0, False: 0] ------------------ 2225| 0| return MCTargetAsmParser::Match_Success; 2226| 0| } 2227| | 2228| | // 'JumpTarget' class 2229| 12.7k| if (Kind == MCK_JumpTarget) { ------------------ | Branch (2229:7): [True: 11.2k, False: 1.49k] ------------------ 2230| 11.2k| if (Operand.isImm()) ------------------ | Branch (2230:9): [True: 11.2k, False: 0] ------------------ 2231| 11.2k| return MCTargetAsmParser::Match_Success; 2232| 11.2k| } 2233| | 2234| | // 'MemOffsetSimm11' class 2235| 1.49k| if (Kind == MCK_MemOffsetSimm11) { ------------------ | Branch (2235:7): [True: 32, False: 1.46k] ------------------ 2236| 32| if (Operand.isMemWithSimmOffset<11>()) ------------------ | Branch (2236:9): [True: 0, False: 32] ------------------ 2237| 0| return MCTargetAsmParser::Match_Success; 2238| 32| } 2239| | 2240| | // 'MemOffsetSimm16' class 2241| 1.49k| if (Kind == MCK_MemOffsetSimm16) { ------------------ | Branch (2241:7): [True: 0, False: 1.49k] ------------------ 2242| 0| if (Operand.isMemWithSimmOffset<16>()) ------------------ | Branch (2242:9): [True: 0, False: 0] ------------------ 2243| 0| return MCTargetAsmParser::Match_Success; 2244| 0| } 2245| | 2246| | // 'MemOffsetSimm9' class 2247| 1.49k| if (Kind == MCK_MemOffsetSimm9) { ------------------ | Branch (2247:7): [True: 5, False: 1.49k] ------------------ 2248| 5| if (Operand.isMemWithSimmOffset<9>()) ------------------ | Branch (2248:9): [True: 0, False: 5] ------------------ 2249| 0| return MCTargetAsmParser::Match_Success; 2250| 5| } 2251| | 2252| | // 'MemOffsetSimm9GPR' class 2253| 1.49k| if (Kind == MCK_MemOffsetSimm9GPR) { ------------------ | Branch (2253:7): [True: 0, False: 1.49k] ------------------ 2254| 0| if (Operand.isMemWithSimmOffsetGPR<9>()) ------------------ | Branch (2254:9): [True: 0, False: 0] ------------------ 2255| 0| return MCTargetAsmParser::Match_Success; 2256| 0| } 2257| | 2258| | // 'MemOffsetUimm4' class 2259| 1.49k| if (Kind == MCK_MemOffsetUimm4) { ------------------ | Branch (2259:7): [True: 0, False: 1.49k] ------------------ 2260| 0| if (Operand.isMemWithUimmOffsetSP<6>()) ------------------ | Branch (2260:9): [True: 0, False: 0] ------------------ 2261| 0| return MCTargetAsmParser::Match_Success; 2262| 0| } 2263| | 2264| | // 'Mem' class 2265| 1.49k| if (Kind == MCK_Mem) { ------------------ | Branch (2265:7): [True: 144, False: 1.35k] ------------------ 2266| 144| if (Operand.isMem()) ------------------ | Branch (2266:9): [True: 144, False: 0] ------------------ 2267| 144| return MCTargetAsmParser::Match_Success; 2268| 144| } 2269| | 2270| | // 'MovePRegPair' class 2271| 1.35k| if (Kind == MCK_MovePRegPair) { ------------------ | Branch (2271:7): [True: 0, False: 1.35k] ------------------ 2272| 0| if (Operand.isMovePRegPair()) ------------------ | Branch (2272:9): [True: 0, False: 0] ------------------ 2273| 0| return MCTargetAsmParser::Match_Success; 2274| 0| } 2275| | 2276| | // 'RegList16' class 2277| 1.35k| if (Kind == MCK_RegList16) { ------------------ | Branch (2277:7): [True: 0, False: 1.35k] ------------------ 2278| 0| if (Operand.isRegList16()) ------------------ | Branch (2278:9): [True: 0, False: 0] ------------------ 2279| 0| return MCTargetAsmParser::Match_Success; 2280| 0| } 2281| | 2282| | // 'RegList' class 2283| 1.35k| if (Kind == MCK_RegList) { ------------------ | Branch (2283:7): [True: 0, False: 1.35k] ------------------ 2284| 0| if (Operand.isRegList()) ------------------ | Branch (2284:9): [True: 0, False: 0] ------------------ 2285| 0| return MCTargetAsmParser::Match_Success; 2286| 0| } 2287| | 2288| | // 'RegPair' class 2289| 1.35k| if (Kind == MCK_RegPair) { ------------------ | Branch (2289:7): [True: 0, False: 1.35k] ------------------ 2290| 0| if (Operand.isRegPair()) ------------------ | Branch (2290:9): [True: 0, False: 0] ------------------ 2291| 0| return MCTargetAsmParser::Match_Success; 2292| 0| } 2293| | 2294| | // 'ConstantImmz' class 2295| 1.35k| if (Kind == MCK_ConstantImmz) { ------------------ | Branch (2295:7): [True: 0, False: 1.35k] ------------------ 2296| 0| if (Operand.isConstantImmz()) ------------------ | Branch (2296:9): [True: 0, False: 0] ------------------ 2297| 0| return MCTargetAsmParser::Match_Success; 2298| 0| return MipsAsmParser::Match_Immz; 2299| 0| } 2300| | 2301| | // 'ConstantUImm1_0' class 2302| 1.35k| if (Kind == MCK_ConstantUImm1_0) { ------------------ | Branch (2302:7): [True: 0, False: 1.35k] ------------------ 2303| 0| if (Operand.isConstantUImm<1, 0>()) ------------------ | Branch (2303:9): [True: 0, False: 0] ------------------ 2304| 0| return MCTargetAsmParser::Match_Success; 2305| 0| return MipsAsmParser::Match_UImm1_0; 2306| 0| } 2307| | 2308| | // 'ConstantUImm2_0' class 2309| 1.35k| if (Kind == MCK_ConstantUImm2_0) { ------------------ | Branch (2309:7): [True: 0, False: 1.35k] ------------------ 2310| 0| if (Operand.isConstantUImm<2, 0>()) ------------------ | Branch (2310:9): [True: 0, False: 0] ------------------ 2311| 0| return MCTargetAsmParser::Match_Success; 2312| 0| return MipsAsmParser::Match_UImm2_0; 2313| 0| } 2314| | 2315| | // 'ConstantUImm2_1' class 2316| 1.35k| if (Kind == MCK_ConstantUImm2_1) { ------------------ | Branch (2316:7): [True: 0, False: 1.35k] ------------------ 2317| 0| if (Operand.isConstantUImm<2, 1>()) ------------------ | Branch (2317:9): [True: 0, False: 0] ------------------ 2318| 0| return MCTargetAsmParser::Match_Success; 2319| 0| return MipsAsmParser::Match_UImm2_1; 2320| 0| } 2321| | 2322| | // 'ConstantUImm3_0' class 2323| 1.35k| if (Kind == MCK_ConstantUImm3_0) { ------------------ | Branch (2323:7): [True: 0, False: 1.35k] ------------------ 2324| 0| if (Operand.isConstantUImm<3, 0>()) ------------------ | Branch (2324:9): [True: 0, False: 0] ------------------ 2325| 0| return MCTargetAsmParser::Match_Success; 2326| 0| return MipsAsmParser::Match_UImm3_0; 2327| 0| } 2328| | 2329| | // 'ConstantUImm4_0' class 2330| 1.35k| if (Kind == MCK_ConstantUImm4_0) { ------------------ | Branch (2330:7): [True: 0, False: 1.35k] ------------------ 2331| 0| if (Operand.isConstantUImm<4, 0>()) ------------------ | Branch (2331:9): [True: 0, False: 0] ------------------ 2332| 0| return MCTargetAsmParser::Match_Success; 2333| 0| return MipsAsmParser::Match_UImm4_0; 2334| 0| } 2335| | 2336| | // 'ConstantUImm5_0' class 2337| 1.35k| if (Kind == MCK_ConstantUImm5_0) { ------------------ | Branch (2337:7): [True: 0, False: 1.35k] ------------------ 2338| 0| if (Operand.isConstantUImm<5, 0>()) ------------------ | Branch (2338:9): [True: 0, False: 0] ------------------ 2339| 0| return MCTargetAsmParser::Match_Success; 2340| 0| return MipsAsmParser::Match_UImm5_0; 2341| 0| } 2342| | 2343| | // 'UImm5Lsl2' class 2344| 1.35k| if (Kind == MCK_UImm5Lsl2) { ------------------ | Branch (2344:7): [True: 0, False: 1.35k] ------------------ 2345| 0| if (Operand.isScaledUImm<5, 2>()) ------------------ | Branch (2345:9): [True: 0, False: 0] ------------------ 2346| 0| return MCTargetAsmParser::Match_Success; 2347| 0| return MipsAsmParser::Match_UImm5_Lsl2; 2348| 0| } 2349| | 2350| | // 'ConstantUImm5_1' class 2351| 1.35k| if (Kind == MCK_ConstantUImm5_1) { ------------------ | Branch (2351:7): [True: 0, False: 1.35k] ------------------ 2352| 0| if (Operand.isConstantUImm<5, 1>()) ------------------ | Branch (2352:9): [True: 0, False: 0] ------------------ 2353| 0| return MCTargetAsmParser::Match_Success; 2354| 0| return MipsAsmParser::Match_UImm5_1; 2355| 0| } 2356| | 2357| | // 'ConstantUImm5_32' class 2358| 1.35k| if (Kind == MCK_ConstantUImm5_32) { ------------------ | Branch (2358:7): [True: 0, False: 1.35k] ------------------ 2359| 0| if (Operand.isConstantUImm<5, 32>()) ------------------ | Branch (2359:9): [True: 0, False: 0] ------------------ 2360| 0| return MCTargetAsmParser::Match_Success; 2361| 0| return MipsAsmParser::Match_UImm5_32; 2362| 0| } 2363| | 2364| | // 'ConstantUImm5_32_Norm' class 2365| 1.35k| if (Kind == MCK_ConstantUImm5_32_Norm) { ------------------ | Branch (2365:7): [True: 0, False: 1.35k] ------------------ 2366| 0| if (Operand.isConstantUImm<5, 32>()) ------------------ | Branch (2366:9): [True: 0, False: 0] ------------------ 2367| 0| return MCTargetAsmParser::Match_Success; 2368| 0| return MipsAsmParser::Match_UImm5_32; 2369| 0| } 2370| | 2371| | // 'ConstantUImm5_33' class 2372| 1.35k| if (Kind == MCK_ConstantUImm5_33) { ------------------ | Branch (2372:7): [True: 0, False: 1.35k] ------------------ 2373| 0| if (Operand.isConstantUImm<5, 33>()) ------------------ | Branch (2373:9): [True: 0, False: 0] ------------------ 2374| 0| return MCTargetAsmParser::Match_Success; 2375| 0| return MipsAsmParser::Match_UImm5_33; 2376| 0| } 2377| | 2378| | // 'ConstantUImm5_0_Report_UImm6' class 2379| 1.35k| if (Kind == MCK_ConstantUImm5_0_Report_UImm6) { ------------------ | Branch (2379:7): [True: 0, False: 1.35k] ------------------ 2380| 0| if (Operand.isConstantUImm<5, 0>()) ------------------ | Branch (2380:9): [True: 0, False: 0] ------------------ 2381| 0| return MCTargetAsmParser::Match_Success; 2382| 0| return MipsAsmParser::Match_UImm5_0_Report_UImm6; 2383| 0| } 2384| | 2385| | // 'ConstantSImm6' class 2386| 1.35k| if (Kind == MCK_ConstantSImm6) { ------------------ | Branch (2386:7): [True: 0, False: 1.35k] ------------------ 2387| 0| if (Operand.isConstantSImm<6>()) ------------------ | Branch (2387:9): [True: 0, False: 0] ------------------ 2388| 0| return MCTargetAsmParser::Match_Success; 2389| 0| return MipsAsmParser::Match_SImm6; 2390| 0| } 2391| | 2392| | // 'ConstantUImm6_0' class 2393| 1.35k| if (Kind == MCK_ConstantUImm6_0) { ------------------ | Branch (2393:7): [True: 0, False: 1.35k] ------------------ 2394| 0| if (Operand.isConstantUImm<6, 0>()) ------------------ | Branch (2394:9): [True: 0, False: 0] ------------------ 2395| 0| return MCTargetAsmParser::Match_Success; 2396| 0| return MipsAsmParser::Match_UImm6_0; 2397| 0| } 2398| | 2399| | // 'ConstantUImm7_0' class 2400| 1.35k| if (Kind == MCK_ConstantUImm7_0) { ------------------ | Branch (2400:7): [True: 0, False: 1.35k] ------------------ 2401| 0| if (Operand.isConstantUImm<7, 0>()) ------------------ | Branch (2401:9): [True: 0, False: 0] ------------------ 2402| 0| return MCTargetAsmParser::Match_Success; 2403| 0| return MipsAsmParser::Match_UImm7_0; 2404| 0| } 2405| | 2406| | // 'ConstantUImm8_0' class 2407| 1.35k| if (Kind == MCK_ConstantUImm8_0) { ------------------ | Branch (2407:7): [True: 0, False: 1.35k] ------------------ 2408| 0| if (Operand.isConstantUImm<8, 0>()) ------------------ | Branch (2408:9): [True: 0, False: 0] ------------------ 2409| 0| return MCTargetAsmParser::Match_Success; 2410| 0| return MipsAsmParser::Match_UImm8_0; 2411| 0| } 2412| | 2413| | // 'ConstantUImm10_0' class 2414| 1.35k| if (Kind == MCK_ConstantUImm10_0) { ------------------ | Branch (2414:7): [True: 0, False: 1.35k] ------------------ 2415| 0| if (Operand.isConstantUImm<10, 0>()) ------------------ | Branch (2415:9): [True: 0, False: 0] ------------------ 2416| 0| return MCTargetAsmParser::Match_Success; 2417| 0| return MipsAsmParser::Match_UImm10_0; 2418| 0| } 2419| | 2420| | // 'UImm16' class 2421| 1.35k| if (Kind == MCK_UImm16) { ------------------ | Branch (2421:7): [True: 0, False: 1.35k] ------------------ 2422| 0| if (Operand.isUImm<16>()) ------------------ | Branch (2422:9): [True: 0, False: 0] ------------------ 2423| 0| return MCTargetAsmParser::Match_Success; 2424| 0| return MipsAsmParser::Match_UImm16; 2425| 0| } 2426| | 2427| | // 'UImm16_Relaxed' class 2428| 1.35k| if (Kind == MCK_UImm16_Relaxed) { ------------------ | Branch (2428:7): [True: 0, False: 1.35k] ------------------ 2429| 0| if (Operand.isAnyImm<16>()) ------------------ | Branch (2429:9): [True: 0, False: 0] ------------------ 2430| 0| return MCTargetAsmParser::Match_Success; 2431| 0| return MipsAsmParser::Match_UImm16_Relaxed; 2432| 0| } 2433| | 2434| 1.35k| if (Operand.isReg()) { ------------------ | Branch (2434:7): [True: 5, False: 1.35k] ------------------ 2435| 5| MatchClassKind OpKind; 2436| 5| switch (Operand.getReg()) { 2437| 0| default: OpKind = InvalidMatchClass; break; ------------------ | Branch (2437:5): [True: 0, False: 5] ------------------ 2438| 5| case Mips::ZERO: OpKind = MCK_ZERO; break; ------------------ | Branch (2438:5): [True: 5, False: 0] ------------------ 2439| 0| case Mips::AT: OpKind = MCK_DSPR; break; ------------------ | Branch (2439:5): [True: 0, False: 5] ------------------ 2440| 0| case Mips::V0: OpKind = MCK_Reg9; break; ------------------ | Branch (2440:5): [True: 0, False: 5] ------------------ 2441| 0| case Mips::V1: OpKind = MCK_Reg9; break; ------------------ | Branch (2441:5): [True: 0, False: 5] ------------------ 2442| 0| case Mips::A0: OpKind = MCK_Reg7; break; ------------------ | Branch (2442:5): [True: 0, False: 5] ------------------ 2443| 0| case Mips::A1: OpKind = MCK_Reg7; break; ------------------ | Branch (2443:5): [True: 0, False: 5] ------------------ 2444| 0| case Mips::A2: OpKind = MCK_Reg7; break; ------------------ | Branch (2444:5): [True: 0, False: 5] ------------------ 2445| 0| case Mips::A3: OpKind = MCK_Reg7; break; ------------------ | Branch (2445:5): [True: 0, False: 5] ------------------ 2446| 0| case Mips::T0: OpKind = MCK_DSPR; break; ------------------ | Branch (2446:5): [True: 0, False: 5] ------------------ 2447| 0| case Mips::T1: OpKind = MCK_DSPR; break; ------------------ | Branch (2447:5): [True: 0, False: 5] ------------------ 2448| 0| case Mips::T2: OpKind = MCK_DSPR; break; ------------------ | Branch (2448:5): [True: 0, False: 5] ------------------ 2449| 0| case Mips::T3: OpKind = MCK_DSPR; break; ------------------ | Branch (2449:5): [True: 0, False: 5] ------------------ 2450| 0| case Mips::T4: OpKind = MCK_DSPR; break; ------------------ | Branch (2450:5): [True: 0, False: 5] ------------------ 2451| 0| case Mips::T5: OpKind = MCK_DSPR; break; ------------------ | Branch (2451:5): [True: 0, False: 5] ------------------ 2452| 0| case Mips::T6: OpKind = MCK_DSPR; break; ------------------ | Branch (2452:5): [True: 0, False: 5] ------------------ 2453| 0| case Mips::T7: OpKind = MCK_DSPR; break; ------------------ | Branch (2453:5): [True: 0, False: 5] ------------------ 2454| 0| case Mips::S0: OpKind = MCK_Reg8; break; ------------------ | Branch (2454:5): [True: 0, False: 5] ------------------ 2455| 0| case Mips::S1: OpKind = MCK_Reg9; break; ------------------ | Branch (2455:5): [True: 0, False: 5] ------------------ 2456| 0| case Mips::S2: OpKind = MCK_GPRMM16MoveP; break; ------------------ | Branch (2456:5): [True: 0, False: 5] ------------------ 2457| 0| case Mips::S3: OpKind = MCK_GPRMM16MoveP; break; ------------------ | Branch (2457:5): [True: 0, False: 5] ------------------ 2458| 0| case Mips::S4: OpKind = MCK_GPRMM16MoveP; break; ------------------ | Branch (2458:5): [True: 0, False: 5] ------------------ 2459| 0| case Mips::S5: OpKind = MCK_DSPR; break; ------------------ | Branch (2459:5): [True: 0, False: 5] ------------------ 2460| 0| case Mips::S6: OpKind = MCK_DSPR; break; ------------------ | Branch (2460:5): [True: 0, False: 5] ------------------ 2461| 0| case Mips::S7: OpKind = MCK_DSPR; break; ------------------ | Branch (2461:5): [True: 0, False: 5] ------------------ 2462| 0| case Mips::T8: OpKind = MCK_DSPR; break; ------------------ | Branch (2462:5): [True: 0, False: 5] ------------------ 2463| 0| case Mips::T9: OpKind = MCK_DSPR; break; ------------------ | Branch (2463:5): [True: 0, False: 5] ------------------ 2464| 0| case Mips::K0: OpKind = MCK_DSPR; break; ------------------ | Branch (2464:5): [True: 0, False: 5] ------------------ 2465| 0| case Mips::K1: OpKind = MCK_DSPR; break; ------------------ | Branch (2465:5): [True: 0, False: 5] ------------------ 2466| 0| case Mips::GP: OpKind = MCK_DSPR; break; ------------------ | Branch (2466:5): [True: 0, False: 5] ------------------ 2467| 0| case Mips::SP: OpKind = MCK_CPUSPReg; break; ------------------ | Branch (2467:5): [True: 0, False: 5] ------------------ 2468| 0| case Mips::FP: OpKind = MCK_DSPR; break; ------------------ | Branch (2468:5): [True: 0, False: 5] ------------------ 2469| 0| case Mips::RA: OpKind = MCK_CPURAReg; break; ------------------ | Branch (2469:5): [True: 0, False: 5] ------------------ 2470| 0| case Mips::ZERO_64: OpKind = MCK_Reg15; break; ------------------ | Branch (2470:5): [True: 0, False: 5] ------------------ 2471| 0| case Mips::AT_64: OpKind = MCK_GPR64; break; ------------------ | Branch (2471:5): [True: 0, False: 5] ------------------ 2472| 0| case Mips::V0_64: OpKind = MCK_Reg20; break; ------------------ | Branch (2472:5): [True: 0, False: 5] ------------------ 2473| 0| case Mips::V1_64: OpKind = MCK_Reg20; break; ------------------ | Branch (2473:5): [True: 0, False: 5] ------------------ 2474| 0| case Mips::A0_64: OpKind = MCK_Reg18; break; ------------------ | Branch (2474:5): [True: 0, False: 5] ------------------ 2475| 0| case Mips::A1_64: OpKind = MCK_Reg18; break; ------------------ | Branch (2475:5): [True: 0, False: 5] ------------------ 2476| 0| case Mips::A2_64: OpKind = MCK_Reg18; break; ------------------ | Branch (2476:5): [True: 0, False: 5] ------------------ 2477| 0| case Mips::A3_64: OpKind = MCK_Reg18; break; ------------------ | Branch (2477:5): [True: 0, False: 5] ------------------ 2478| 0| case Mips::T0_64: OpKind = MCK_GPR64; break; ------------------ | Branch (2478:5): [True: 0, False: 5] ------------------ 2479| 0| case Mips::T1_64: OpKind = MCK_GPR64; break; ------------------ | Branch (2479:5): [True: 0, False: 5] ------------------ 2480| 0| case Mips::T2_64: OpKind = MCK_GPR64; break; ------------------ | Branch (2480:5): [True: 0, False: 5] ------------------ 2481| 0| case Mips::T3_64: OpKind = MCK_GPR64; break; ------------------ | Branch (2481:5): [True: 0, False: 5] ------------------ 2482| 0| case Mips::T4_64: OpKind = MCK_GPR64; break; ------------------ | Branch (2482:5): [True: 0, False: 5] ------------------ 2483| 0| case Mips::T5_64: OpKind = MCK_GPR64; break; ------------------ | Branch (2483:5): [True: 0, False: 5] ------------------ 2484| 0| case Mips::T6_64: OpKind = MCK_GPR64; break; ------------------ | Branch (2484:5): [True: 0, False: 5] ------------------ 2485| 0| case Mips::T7_64: OpKind = MCK_GPR64; break; ------------------ | Branch (2485:5): [True: 0, False: 5] ------------------ 2486| 0| case Mips::S0_64: OpKind = MCK_Reg19; break; ------------------ | Branch (2486:5): [True: 0, False: 5] ------------------ 2487| 0| case Mips::S1_64: OpKind = MCK_Reg20; break; ------------------ | Branch (2487:5): [True: 0, False: 5] ------------------ 2488| 0| case Mips::S2_64: OpKind = MCK_Reg14; break; ------------------ | Branch (2488:5): [True: 0, False: 5] ------------------ 2489| 0| case Mips::S3_64: OpKind = MCK_Reg14; break; ------------------ | Branch (2489:5): [True: 0, False: 5] ------------------ 2490| 0| case Mips::S4_64: OpKind = MCK_Reg14; break; ------------------ | Branch (2490:5): [True: 0, False: 5] ------------------ 2491| 0| case Mips::S5_64: OpKind = MCK_GPR64; break; ------------------ | Branch (2491:5): [True: 0, False: 5] ------------------ 2492| 0| case Mips::S6_64: OpKind = MCK_GPR64; break; ------------------ | Branch (2492:5): [True: 0, False: 5] ------------------ 2493| 0| case Mips::S7_64: OpKind = MCK_GPR64; break; ------------------ | Branch (2493:5): [True: 0, False: 5] ------------------ 2494| 0| case Mips::T8_64: OpKind = MCK_GPR64; break; ------------------ | Branch (2494:5): [True: 0, False: 5] ------------------ 2495| 0| case Mips::T9_64: OpKind = MCK_GPR64; break; ------------------ | Branch (2495:5): [True: 0, False: 5] ------------------ 2496| 0| case Mips::K0_64: OpKind = MCK_GPR64; break; ------------------ | Branch (2496:5): [True: 0, False: 5] ------------------ 2497| 0| case Mips::K1_64: OpKind = MCK_GPR64; break; ------------------ | Branch (2497:5): [True: 0, False: 5] ------------------ 2498| 0| case Mips::GP_64: OpKind = MCK_GPR64; break; ------------------ | Branch (2498:5): [True: 0, False: 5] ------------------ 2499| 0| case Mips::SP_64: OpKind = MCK_Reg21; break; ------------------ | Branch (2499:5): [True: 0, False: 5] ------------------ 2500| 0| case Mips::FP_64: OpKind = MCK_GPR64; break; ------------------ | Branch (2500:5): [True: 0, False: 5] ------------------ 2501| 0| case Mips::RA_64: OpKind = MCK_Reg22; break; ------------------ | Branch (2501:5): [True: 0, False: 5] ------------------ 2502| 0| case Mips::F0: OpKind = MCK_FGR32; break; ------------------ | Branch (2502:5): [True: 0, False: 5] ------------------ 2503| 0| case Mips::F1: OpKind = MCK_Reg24; break; ------------------ | Branch (2503:5): [True: 0, False: 5] ------------------ 2504| 0| case Mips::F2: OpKind = MCK_FGR32; break; ------------------ | Branch (2504:5): [True: 0, False: 5] ------------------ 2505| 0| case Mips::F3: OpKind = MCK_Reg24; break; ------------------ | Branch (2505:5): [True: 0, False: 5] ------------------ 2506| 0| case Mips::F4: OpKind = MCK_FGR32; break; ------------------ | Branch (2506:5): [True: 0, False: 5] ------------------ 2507| 0| case Mips::F5: OpKind = MCK_Reg24; break; ------------------ | Branch (2507:5): [True: 0, False: 5] ------------------ 2508| 0| case Mips::F6: OpKind = MCK_FGR32; break; ------------------ | Branch (2508:5): [True: 0, False: 5] ------------------ 2509| 0| case Mips::F7: OpKind = MCK_Reg24; break; ------------------ | Branch (2509:5): [True: 0, False: 5] ------------------ 2510| 0| case Mips::F8: OpKind = MCK_FGR32; break; ------------------ | Branch (2510:5): [True: 0, False: 5] ------------------ 2511| 0| case Mips::F9: OpKind = MCK_Reg24; break; ------------------ | Branch (2511:5): [True: 0, False: 5] ------------------ 2512| 0| case Mips::F10: OpKind = MCK_FGR32; break; ------------------ | Branch (2512:5): [True: 0, False: 5] ------------------ 2513| 0| case Mips::F11: OpKind = MCK_Reg24; break; ------------------ | Branch (2513:5): [True: 0, False: 5] ------------------ 2514| 0| case Mips::F12: OpKind = MCK_FGR32; break; ------------------ | Branch (2514:5): [True: 0, False: 5] ------------------ 2515| 0| case Mips::F13: OpKind = MCK_Reg24; break; ------------------ | Branch (2515:5): [True: 0, False: 5] ------------------ 2516| 0| case Mips::F14: OpKind = MCK_FGR32; break; ------------------ | Branch (2516:5): [True: 0, False: 5] ------------------ 2517| 0| case Mips::F15: OpKind = MCK_Reg24; break; ------------------ | Branch (2517:5): [True: 0, False: 5] ------------------ 2518| 0| case Mips::F16: OpKind = MCK_FGR32; break; ------------------ | Branch (2518:5): [True: 0, False: 5] ------------------ 2519| 0| case Mips::F17: OpKind = MCK_Reg24; break; ------------------ | Branch (2519:5): [True: 0, False: 5] ------------------ 2520| 0| case Mips::F18: OpKind = MCK_FGR32; break; ------------------ | Branch (2520:5): [True: 0, False: 5] ------------------ 2521| 0| case Mips::F19: OpKind = MCK_Reg24; break; ------------------ | Branch (2521:5): [True: 0, False: 5] ------------------ 2522| 0| case Mips::F20: OpKind = MCK_FGR32; break; ------------------ | Branch (2522:5): [True: 0, False: 5] ------------------ 2523| 0| case Mips::F21: OpKind = MCK_Reg24; break; ------------------ | Branch (2523:5): [True: 0, False: 5] ------------------ 2524| 0| case Mips::F22: OpKind = MCK_FGR32; break; ------------------ | Branch (2524:5): [True: 0, False: 5] ------------------ 2525| 0| case Mips::F23: OpKind = MCK_Reg24; break; ------------------ | Branch (2525:5): [True: 0, False: 5] ------------------ 2526| 0| case Mips::F24: OpKind = MCK_FGR32; break; ------------------ | Branch (2526:5): [True: 0, False: 5] ------------------ 2527| 0| case Mips::F25: OpKind = MCK_Reg24; break; ------------------ | Branch (2527:5): [True: 0, False: 5] ------------------ 2528| 0| case Mips::F26: OpKind = MCK_FGR32; break; ------------------ | Branch (2528:5): [True: 0, False: 5] ------------------ 2529| 0| case Mips::F27: OpKind = MCK_Reg24; break; ------------------ | Branch (2529:5): [True: 0, False: 5] ------------------ 2530| 0| case Mips::F28: OpKind = MCK_FGR32; break; ------------------ | Branch (2530:5): [True: 0, False: 5] ------------------ 2531| 0| case Mips::F29: OpKind = MCK_Reg24; break; ------------------ | Branch (2531:5): [True: 0, False: 5] ------------------ 2532| 0| case Mips::F30: OpKind = MCK_FGR32; break; ------------------ | Branch (2532:5): [True: 0, False: 5] ------------------ 2533| 0| case Mips::F31: OpKind = MCK_Reg24; break; ------------------ | Branch (2533:5): [True: 0, False: 5] ------------------ 2534| 0| case Mips::F_HI0: OpKind = MCK_FGRH32; break; ------------------ | Branch (2534:5): [True: 0, False: 5] ------------------ 2535| 0| case Mips::F_HI1: OpKind = MCK_Reg27; break; ------------------ | Branch (2535:5): [True: 0, False: 5] ------------------ 2536| 0| case Mips::F_HI2: OpKind = MCK_FGRH32; break; ------------------ | Branch (2536:5): [True: 0, False: 5] ------------------ 2537| 0| case Mips::F_HI3: OpKind = MCK_Reg27; break; ------------------ | Branch (2537:5): [True: 0, False: 5] ------------------ 2538| 0| case Mips::F_HI4: OpKind = MCK_FGRH32; break; ------------------ | Branch (2538:5): [True: 0, False: 5] ------------------ 2539| 0| case Mips::F_HI5: OpKind = MCK_Reg27; break; ------------------ | Branch (2539:5): [True: 0, False: 5] ------------------ 2540| 0| case Mips::F_HI6: OpKind = MCK_FGRH32; break; ------------------ | Branch (2540:5): [True: 0, False: 5] ------------------ 2541| 0| case Mips::F_HI7: OpKind = MCK_Reg27; break; ------------------ | Branch (2541:5): [True: 0, False: 5] ------------------ 2542| 0| case Mips::F_HI8: OpKind = MCK_FGRH32; break; ------------------ | Branch (2542:5): [True: 0, False: 5] ------------------ 2543| 0| case Mips::F_HI9: OpKind = MCK_Reg27; break; ------------------ | Branch (2543:5): [True: 0, False: 5] ------------------ 2544| 0| case Mips::F_HI10: OpKind = MCK_FGRH32; break; ------------------ | Branch (2544:5): [True: 0, False: 5] ------------------ 2545| 0| case Mips::F_HI11: OpKind = MCK_Reg27; break; ------------------ | Branch (2545:5): [True: 0, False: 5] ------------------ 2546| 0| case Mips::F_HI12: OpKind = MCK_FGRH32; break; ------------------ | Branch (2546:5): [True: 0, False: 5] ------------------ 2547| 0| case Mips::F_HI13: OpKind = MCK_Reg27; break; ------------------ | Branch (2547:5): [True: 0, False: 5] ------------------ 2548| 0| case Mips::F_HI14: OpKind = MCK_FGRH32; break; ------------------ | Branch (2548:5): [True: 0, False: 5] ------------------ 2549| 0| case Mips::F_HI15: OpKind = MCK_Reg27; break; ------------------ | Branch (2549:5): [True: 0, False: 5] ------------------ 2550| 0| case Mips::F_HI16: OpKind = MCK_FGRH32; break; ------------------ | Branch (2550:5): [True: 0, False: 5] ------------------ 2551| 0| case Mips::F_HI17: OpKind = MCK_Reg27; break; ------------------ | Branch (2551:5): [True: 0, False: 5] ------------------ 2552| 0| case Mips::F_HI18: OpKind = MCK_FGRH32; break; ------------------ | Branch (2552:5): [True: 0, False: 5] ------------------ 2553| 0| case Mips::F_HI19: OpKind = MCK_Reg27; break; ------------------ | Branch (2553:5): [True: 0, False: 5] ------------------ 2554| 0| case Mips::F_HI20: OpKind = MCK_FGRH32; break; ------------------ | Branch (2554:5): [True: 0, False: 5] ------------------ 2555| 0| case Mips::F_HI21: OpKind = MCK_Reg27; break; ------------------ | Branch (2555:5): [True: 0, False: 5] ------------------ 2556| 0| case Mips::F_HI22: OpKind = MCK_FGRH32; break; ------------------ | Branch (2556:5): [True: 0, False: 5] ------------------ 2557| 0| case Mips::F_HI23: OpKind = MCK_Reg27; break; ------------------ | Branch (2557:5): [True: 0, False: 5] ------------------ 2558| 0| case Mips::F_HI24: OpKind = MCK_FGRH32; break; ------------------ | Branch (2558:5): [True: 0, False: 5] ------------------ 2559| 0| case Mips::F_HI25: OpKind = MCK_Reg27; break; ------------------ | Branch (2559:5): [True: 0, False: 5] ------------------ 2560| 0| case Mips::F_HI26: OpKind = MCK_FGRH32; break; ------------------ | Branch (2560:5): [True: 0, False: 5] ------------------ 2561| 0| case Mips::F_HI27: OpKind = MCK_Reg27; break; ------------------ | Branch (2561:5): [True: 0, False: 5] ------------------ 2562| 0| case Mips::F_HI28: OpKind = MCK_FGRH32; break; ------------------ | Branch (2562:5): [True: 0, False: 5] ------------------ 2563| 0| case Mips::F_HI29: OpKind = MCK_Reg27; break; ------------------ | Branch (2563:5): [True: 0, False: 5] ------------------ 2564| 0| case Mips::F_HI30: OpKind = MCK_FGRH32; break; ------------------ | Branch (2564:5): [True: 0, False: 5] ------------------ 2565| 0| case Mips::F_HI31: OpKind = MCK_Reg27; break; ------------------ | Branch (2565:5): [True: 0, False: 5] ------------------ 2566| 0| case Mips::D0: OpKind = MCK_AFGR64; break; ------------------ | Branch (2566:5): [True: 0, False: 5] ------------------ 2567| 0| case Mips::D1: OpKind = MCK_Reg29; break; ------------------ | Branch (2567:5): [True: 0, False: 5] ------------------ 2568| 0| case Mips::D2: OpKind = MCK_AFGR64; break; ------------------ | Branch (2568:5): [True: 0, False: 5] ------------------ 2569| 0| case Mips::D3: OpKind = MCK_Reg29; break; ------------------ | Branch (2569:5): [True: 0, False: 5] ------------------ 2570| 0| case Mips::D4: OpKind = MCK_AFGR64; break; ------------------ | Branch (2570:5): [True: 0, False: 5] ------------------ 2571| 0| case Mips::D5: OpKind = MCK_Reg29; break; ------------------ | Branch (2571:5): [True: 0, False: 5] ------------------ 2572| 0| case Mips::D6: OpKind = MCK_AFGR64; break; ------------------ | Branch (2572:5): [True: 0, False: 5] ------------------ 2573| 0| case Mips::D7: OpKind = MCK_Reg29; break; ------------------ | Branch (2573:5): [True: 0, False: 5] ------------------ 2574| 0| case Mips::D8: OpKind = MCK_AFGR64; break; ------------------ | Branch (2574:5): [True: 0, False: 5] ------------------ 2575| 0| case Mips::D9: OpKind = MCK_Reg29; break; ------------------ | Branch (2575:5): [True: 0, False: 5] ------------------ 2576| 0| case Mips::D10: OpKind = MCK_AFGR64; break; ------------------ | Branch (2576:5): [True: 0, False: 5] ------------------ 2577| 0| case Mips::D11: OpKind = MCK_Reg29; break; ------------------ | Branch (2577:5): [True: 0, False: 5] ------------------ 2578| 0| case Mips::D12: OpKind = MCK_AFGR64; break; ------------------ | Branch (2578:5): [True: 0, False: 5] ------------------ 2579| 0| case Mips::D13: OpKind = MCK_Reg29; break; ------------------ | Branch (2579:5): [True: 0, False: 5] ------------------ 2580| 0| case Mips::D14: OpKind = MCK_AFGR64; break; ------------------ | Branch (2580:5): [True: 0, False: 5] ------------------ 2581| 0| case Mips::D15: OpKind = MCK_Reg29; break; ------------------ | Branch (2581:5): [True: 0, False: 5] ------------------ 2582| 0| case Mips::D0_64: OpKind = MCK_FGR64; break; ------------------ | Branch (2582:5): [True: 0, False: 5] ------------------ 2583| 0| case Mips::D1_64: OpKind = MCK_Reg32; break; ------------------ | Branch (2583:5): [True: 0, False: 5] ------------------ 2584| 0| case Mips::D2_64: OpKind = MCK_FGR64; break; ------------------ | Branch (2584:5): [True: 0, False: 5] ------------------ 2585| 0| case Mips::D3_64: OpKind = MCK_Reg32; break; ------------------ | Branch (2585:5): [True: 0, False: 5] ------------------ 2586| 0| case Mips::D4_64: OpKind = MCK_FGR64; break; ------------------ | Branch (2586:5): [True: 0, False: 5] ------------------ 2587| 0| case Mips::D5_64: OpKind = MCK_Reg32; break; ------------------ | Branch (2587:5): [True: 0, False: 5] ------------------ 2588| 0| case Mips::D6_64: OpKind = MCK_FGR64; break; ------------------ | Branch (2588:5): [True: 0, False: 5] ------------------ 2589| 0| case Mips::D7_64: OpKind = MCK_Reg32; break; ------------------ | Branch (2589:5): [True: 0, False: 5] ------------------ 2590| 0| case Mips::D8_64: OpKind = MCK_FGR64; break; ------------------ | Branch (2590:5): [True: 0, False: 5] ------------------ 2591| 0| case Mips::D9_64: OpKind = MCK_Reg32; break; ------------------ | Branch (2591:5): [True: 0, False: 5] ------------------ 2592| 0| case Mips::D10_64: OpKind = MCK_FGR64; break; ------------------ | Branch (2592:5): [True: 0, False: 5] ------------------ 2593| 0| case Mips::D11_64: OpKind = MCK_Reg32; break; ------------------ | Branch (2593:5): [True: 0, False: 5] ------------------ 2594| 0| case Mips::D12_64: OpKind = MCK_FGR64; break; ------------------ | Branch (2594:5): [True: 0, False: 5] ------------------ 2595| 0| case Mips::D13_64: OpKind = MCK_Reg32; break; ------------------ | Branch (2595:5): [True: 0, False: 5] ------------------ 2596| 0| case Mips::D14_64: OpKind = MCK_FGR64; break; ------------------ | Branch (2596:5): [True: 0, False: 5] ------------------ 2597| 0| case Mips::D15_64: OpKind = MCK_Reg32; break; ------------------ | Branch (2597:5): [True: 0, False: 5] ------------------ 2598| 0| case Mips::D16_64: OpKind = MCK_FGR64; break; ------------------ | Branch (2598:5): [True: 0, False: 5] ------------------ 2599| 0| case Mips::D17_64: OpKind = MCK_Reg32; break; ------------------ | Branch (2599:5): [True: 0, False: 5] ------------------ 2600| 0| case Mips::D18_64: OpKind = MCK_FGR64; break; ------------------ | Branch (2600:5): [True: 0, False: 5] ------------------ 2601| 0| case Mips::D19_64: OpKind = MCK_Reg32; break; ------------------ | Branch (2601:5): [True: 0, False: 5] ------------------ 2602| 0| case Mips::D20_64: OpKind = MCK_FGR64; break; ------------------ | Branch (2602:5): [True: 0, False: 5] ------------------ 2603| 0| case Mips::D21_64: OpKind = MCK_Reg32; break; ------------------ | Branch (2603:5): [True: 0, False: 5] ------------------ 2604| 0| case Mips::D22_64: OpKind = MCK_FGR64; break; ------------------ | Branch (2604:5): [True: 0, False: 5] ------------------ 2605| 0| case Mips::D23_64: OpKind = MCK_Reg32; break; ------------------ | Branch (2605:5): [True: 0, False: 5] ------------------ 2606| 0| case Mips::D24_64: OpKind = MCK_FGR64; break; ------------------ | Branch (2606:5): [True: 0, False: 5] ------------------ 2607| 0| case Mips::D25_64: OpKind = MCK_Reg32; break; ------------------ | Branch (2607:5): [True: 0, False: 5] ------------------ 2608| 0| case Mips::D26_64: OpKind = MCK_FGR64; break; ------------------ | Branch (2608:5): [True: 0, False: 5] ------------------ 2609| 0| case Mips::D27_64: OpKind = MCK_Reg32; break; ------------------ | Branch (2609:5): [True: 0, False: 5] ------------------ 2610| 0| case Mips::D28_64: OpKind = MCK_FGR64; break; ------------------ | Branch (2610:5): [True: 0, False: 5] ------------------ 2611| 0| case Mips::D29_64: OpKind = MCK_Reg32; break; ------------------ | Branch (2611:5): [True: 0, False: 5] ------------------ 2612| 0| case Mips::D30_64: OpKind = MCK_FGR64; break; ------------------ | Branch (2612:5): [True: 0, False: 5] ------------------ 2613| 0| case Mips::D31_64: OpKind = MCK_Reg32; break; ------------------ | Branch (2613:5): [True: 0, False: 5] ------------------ 2614| 0| case Mips::W0: OpKind = MCK_MSA128WEvens; break; ------------------ | Branch (2614:5): [True: 0, False: 5] ------------------ 2615| 0| case Mips::W1: OpKind = MCK_Reg35; break; ------------------ | Branch (2615:5): [True: 0, False: 5] ------------------ 2616| 0| case Mips::W2: OpKind = MCK_MSA128WEvens; break; ------------------ | Branch (2616:5): [True: 0, False: 5] ------------------ 2617| 0| case Mips::W3: OpKind = MCK_Reg35; break; ------------------ | Branch (2617:5): [True: 0, False: 5] ------------------ 2618| 0| case Mips::W4: OpKind = MCK_MSA128WEvens; break; ------------------ | Branch (2618:5): [True: 0, False: 5] ------------------ 2619| 0| case Mips::W5: OpKind = MCK_Reg35; break; ------------------ | Branch (2619:5): [True: 0, False: 5] ------------------ 2620| 0| case Mips::W6: OpKind = MCK_MSA128WEvens; break; ------------------ | Branch (2620:5): [True: 0, False: 5] ------------------ 2621| 0| case Mips::W7: OpKind = MCK_Reg35; break; ------------------ | Branch (2621:5): [True: 0, False: 5] ------------------ 2622| 0| case Mips::W8: OpKind = MCK_MSA128WEvens; break; ------------------ | Branch (2622:5): [True: 0, False: 5] ------------------ 2623| 0| case Mips::W9: OpKind = MCK_Reg35; break; ------------------ | Branch (2623:5): [True: 0, False: 5] ------------------ 2624| 0| case Mips::W10: OpKind = MCK_MSA128WEvens; break; ------------------ | Branch (2624:5): [True: 0, False: 5] ------------------ 2625| 0| case Mips::W11: OpKind = MCK_Reg35; break; ------------------ | Branch (2625:5): [True: 0, False: 5] ------------------ 2626| 0| case Mips::W12: OpKind = MCK_MSA128WEvens; break; ------------------ | Branch (2626:5): [True: 0, False: 5] ------------------ 2627| 0| case Mips::W13: OpKind = MCK_Reg35; break; ------------------ | Branch (2627:5): [True: 0, False: 5] ------------------ 2628| 0| case Mips::W14: OpKind = MCK_MSA128WEvens; break; ------------------ | Branch (2628:5): [True: 0, False: 5] ------------------ 2629| 0| case Mips::W15: OpKind = MCK_Reg35; break; ------------------ | Branch (2629:5): [True: 0, False: 5] ------------------ 2630| 0| case Mips::W16: OpKind = MCK_MSA128WEvens; break; ------------------ | Branch (2630:5): [True: 0, False: 5] ------------------ 2631| 0| case Mips::W17: OpKind = MCK_Reg35; break; ------------------ | Branch (2631:5): [True: 0, False: 5] ------------------ 2632| 0| case Mips::W18: OpKind = MCK_MSA128WEvens; break; ------------------ | Branch (2632:5): [True: 0, False: 5] ------------------ 2633| 0| case Mips::W19: OpKind = MCK_Reg35; break; ------------------ | Branch (2633:5): [True: 0, False: 5] ------------------ 2634| 0| case Mips::W20: OpKind = MCK_MSA128WEvens; break; ------------------ | Branch (2634:5): [True: 0, False: 5] ------------------ 2635| 0| case Mips::W21: OpKind = MCK_Reg35; break; ------------------ | Branch (2635:5): [True: 0, False: 5] ------------------ 2636| 0| case Mips::W22: OpKind = MCK_MSA128WEvens; break; ------------------ | Branch (2636:5): [True: 0, False: 5] ------------------ 2637| 0| case Mips::W23: OpKind = MCK_Reg35; break; ------------------ | Branch (2637:5): [True: 0, False: 5] ------------------ 2638| 0| case Mips::W24: OpKind = MCK_MSA128WEvens; break; ------------------ | Branch (2638:5): [True: 0, False: 5] ------------------ 2639| 0| case Mips::W25: OpKind = MCK_Reg35; break; ------------------ | Branch (2639:5): [True: 0, False: 5] ------------------ 2640| 0| case Mips::W26: OpKind = MCK_MSA128WEvens; break; ------------------ | Branch (2640:5): [True: 0, False: 5] ------------------ 2641| 0| case Mips::W27: OpKind = MCK_Reg35; break; ------------------ | Branch (2641:5): [True: 0, False: 5] ------------------ 2642| 0| case Mips::W28: OpKind = MCK_MSA128WEvens; break; ------------------ | Branch (2642:5): [True: 0, False: 5] ------------------ 2643| 0| case Mips::W29: OpKind = MCK_Reg35; break; ------------------ | Branch (2643:5): [True: 0, False: 5] ------------------ 2644| 0| case Mips::W30: OpKind = MCK_MSA128WEvens; break; ------------------ | Branch (2644:5): [True: 0, False: 5] ------------------ 2645| 0| case Mips::W31: OpKind = MCK_Reg35; break; ------------------ | Branch (2645:5): [True: 0, False: 5] ------------------ 2646| 0| case Mips::HI0: OpKind = MCK_HI32; break; ------------------ | Branch (2646:5): [True: 0, False: 5] ------------------ 2647| 0| case Mips::HI1: OpKind = MCK_HI32DSP; break; ------------------ | Branch (2647:5): [True: 0, False: 5] ------------------ 2648| 0| case Mips::HI2: OpKind = MCK_HI32DSP; break; ------------------ | Branch (2648:5): [True: 0, False: 5] ------------------ 2649| 0| case Mips::HI3: OpKind = MCK_HI32DSP; break; ------------------ | Branch (2649:5): [True: 0, False: 5] ------------------ 2650| 0| case Mips::LO0: OpKind = MCK_LO32; break; ------------------ | Branch (2650:5): [True: 0, False: 5] ------------------ 2651| 0| case Mips::LO1: OpKind = MCK_LO32DSP; break; ------------------ | Branch (2651:5): [True: 0, False: 5] ------------------ 2652| 0| case Mips::LO2: OpKind = MCK_LO32DSP; break; ------------------ | Branch (2652:5): [True: 0, False: 5] ------------------ 2653| 0| case Mips::LO3: OpKind = MCK_LO32DSP; break; ------------------ | Branch (2653:5): [True: 0, False: 5] ------------------ 2654| 0| case Mips::HI0_64: OpKind = MCK_HI64; break; ------------------ | Branch (2654:5): [True: 0, False: 5] ------------------ 2655| 0| case Mips::LO0_64: OpKind = MCK_LO64; break; ------------------ | Branch (2655:5): [True: 0, False: 5] ------------------ 2656| 0| case Mips::FCR0: OpKind = MCK_CCR; break; ------------------ | Branch (2656:5): [True: 0, False: 5] ------------------ 2657| 0| case Mips::FCR1: OpKind = MCK_CCR; break; ------------------ | Branch (2657:5): [True: 0, False: 5] ------------------ 2658| 0| case Mips::FCR2: OpKind = MCK_CCR; break; ------------------ | Branch (2658:5): [True: 0, False: 5] ------------------ 2659| 0| case Mips::FCR3: OpKind = MCK_CCR; break; ------------------ | Branch (2659:5): [True: 0, False: 5] ------------------ 2660| 0| case Mips::FCR4: OpKind = MCK_CCR; break; ------------------ | Branch (2660:5): [True: 0, False: 5] ------------------ 2661| 0| case Mips::FCR5: OpKind = MCK_CCR; break; ------------------ | Branch (2661:5): [True: 0, False: 5] ------------------ 2662| 0| case Mips::FCR6: OpKind = MCK_CCR; break; ------------------ | Branch (2662:5): [True: 0, False: 5] ------------------ 2663| 0| case Mips::FCR7: OpKind = MCK_CCR; break; ------------------ | Branch (2663:5): [True: 0, False: 5] ------------------ 2664| 0| case Mips::FCR8: OpKind = MCK_CCR; break; ------------------ | Branch (2664:5): [True: 0, False: 5] ------------------ 2665| 0| case Mips::FCR9: OpKind = MCK_CCR; break; ------------------ | Branch (2665:5): [True: 0, False: 5] ------------------ 2666| 0| case Mips::FCR10: OpKind = MCK_CCR; break; ------------------ | Branch (2666:5): [True: 0, False: 5] ------------------ 2667| 0| case Mips::FCR11: OpKind = MCK_CCR; break; ------------------ | Branch (2667:5): [True: 0, False: 5] ------------------ 2668| 0| case Mips::FCR12: OpKind = MCK_CCR; break; ------------------ | Branch (2668:5): [True: 0, False: 5] ------------------ 2669| 0| case Mips::FCR13: OpKind = MCK_CCR; break; ------------------ | Branch (2669:5): [True: 0, False: 5] ------------------ 2670| 0| case Mips::FCR14: OpKind = MCK_CCR; break; ------------------ | Branch (2670:5): [True: 0, False: 5] ------------------ 2671| 0| case Mips::FCR15: OpKind = MCK_CCR; break; ------------------ | Branch (2671:5): [True: 0, False: 5] ------------------ 2672| 0| case Mips::FCR16: OpKind = MCK_CCR; break; ------------------ | Branch (2672:5): [True: 0, False: 5] ------------------ 2673| 0| case Mips::FCR17: OpKind = MCK_CCR; break; ------------------ | Branch (2673:5): [True: 0, False: 5] ------------------ 2674| 0| case Mips::FCR18: OpKind = MCK_CCR; break; ------------------ | Branch (2674:5): [True: 0, False: 5] ------------------ 2675| 0| case Mips::FCR19: OpKind = MCK_CCR; break; ------------------ | Branch (2675:5): [True: 0, False: 5] ------------------ 2676| 0| case Mips::FCR20: OpKind = MCK_CCR; break; ------------------ | Branch (2676:5): [True: 0, False: 5] ------------------ 2677| 0| case Mips::FCR21: OpKind = MCK_CCR; break; ------------------ | Branch (2677:5): [True: 0, False: 5] ------------------ 2678| 0| case Mips::FCR22: OpKind = MCK_CCR; break; ------------------ | Branch (2678:5): [True: 0, False: 5] ------------------ 2679| 0| case Mips::FCR23: OpKind = MCK_CCR; break; ------------------ | Branch (2679:5): [True: 0, False: 5] ------------------ 2680| 0| case Mips::FCR24: OpKind = MCK_CCR; break; ------------------ | Branch (2680:5): [True: 0, False: 5] ------------------ 2681| 0| case Mips::FCR25: OpKind = MCK_CCR; break; ------------------ | Branch (2681:5): [True: 0, False: 5] ------------------ 2682| 0| case Mips::FCR26: OpKind = MCK_CCR; break; ------------------ | Branch (2682:5): [True: 0, False: 5] ------------------ 2683| 0| case Mips::FCR27: OpKind = MCK_CCR; break; ------------------ | Branch (2683:5): [True: 0, False: 5] ------------------ 2684| 0| case Mips::FCR28: OpKind = MCK_CCR; break; ------------------ | Branch (2684:5): [True: 0, False: 5] ------------------ 2685| 0| case Mips::FCR29: OpKind = MCK_CCR; break; ------------------ | Branch (2685:5): [True: 0, False: 5] ------------------ 2686| 0| case Mips::FCR30: OpKind = MCK_CCR; break; ------------------ | Branch (2686:5): [True: 0, False: 5] ------------------ 2687| 0| case Mips::FCR31: OpKind = MCK_CCR; break; ------------------ | Branch (2687:5): [True: 0, False: 5] ------------------ 2688| 0| case Mips::FCC0: OpKind = MCK_FCC; break; ------------------ | Branch (2688:5): [True: 0, False: 5] ------------------ 2689| 0| case Mips::FCC1: OpKind = MCK_FCC; break; ------------------ | Branch (2689:5): [True: 0, False: 5] ------------------ 2690| 0| case Mips::FCC2: OpKind = MCK_FCC; break; ------------------ | Branch (2690:5): [True: 0, False: 5] ------------------ 2691| 0| case Mips::FCC3: OpKind = MCK_FCC; break; ------------------ | Branch (2691:5): [True: 0, False: 5] ------------------ 2692| 0| case Mips::FCC4: OpKind = MCK_FCC; break; ------------------ | Branch (2692:5): [True: 0, False: 5] ------------------ 2693| 0| case Mips::FCC5: OpKind = MCK_FCC; break; ------------------ | Branch (2693:5): [True: 0, False: 5] ------------------ 2694| 0| case Mips::FCC6: OpKind = MCK_FCC; break; ------------------ | Branch (2694:5): [True: 0, False: 5] ------------------ 2695| 0| case Mips::FCC7: OpKind = MCK_FCC; break; ------------------ | Branch (2695:5): [True: 0, False: 5] ------------------ 2696| 0| case Mips::COP00: OpKind = MCK_COP0; break; ------------------ | Branch (2696:5): [True: 0, False: 5] ------------------ 2697| 0| case Mips::COP01: OpKind = MCK_COP0; break; ------------------ | Branch (2697:5): [True: 0, False: 5] ------------------ 2698| 0| case Mips::COP02: OpKind = MCK_COP0; break; ------------------ | Branch (2698:5): [True: 0, False: 5] ------------------ 2699| 0| case Mips::COP03: OpKind = MCK_COP0; break; ------------------ | Branch (2699:5): [True: 0, False: 5] ------------------ 2700| 0| case Mips::COP04: OpKind = MCK_COP0; break; ------------------ | Branch (2700:5): [True: 0, False: 5] ------------------ 2701| 0| case Mips::COP05: OpKind = MCK_COP0; break; ------------------ | Branch (2701:5): [True: 0, False: 5] ------------------ 2702| 0| case Mips::COP06: OpKind = MCK_COP0; break; ------------------ | Branch (2702:5): [True: 0, False: 5] ------------------ 2703| 0| case Mips::COP07: OpKind = MCK_COP0; break; ------------------ | Branch (2703:5): [True: 0, False: 5] ------------------ 2704| 0| case Mips::COP08: OpKind = MCK_COP0; break; ------------------ | Branch (2704:5): [True: 0, False: 5] ------------------ 2705| 0| case Mips::COP09: OpKind = MCK_COP0; break; ------------------ | Branch (2705:5): [True: 0, False: 5] ------------------ 2706| 0| case Mips::COP010: OpKind = MCK_COP0; break; ------------------ | Branch (2706:5): [True: 0, False: 5] ------------------ 2707| 0| case Mips::COP011: OpKind = MCK_COP0; break; ------------------ | Branch (2707:5): [True: 0, False: 5] ------------------ 2708| 0| case Mips::COP012: OpKind = MCK_COP0; break; ------------------ | Branch (2708:5): [True: 0, False: 5] ------------------ 2709| 0| case Mips::COP013: OpKind = MCK_COP0; break; ------------------ | Branch (2709:5): [True: 0, False: 5] ------------------ 2710| 0| case Mips::COP014: OpKind = MCK_COP0; break; ------------------ | Branch (2710:5): [True: 0, False: 5] ------------------ 2711| 0| case Mips::COP015: OpKind = MCK_COP0; break; ------------------ | Branch (2711:5): [True: 0, False: 5] ------------------ 2712| 0| case Mips::COP016: OpKind = MCK_COP0; break; ------------------ | Branch (2712:5): [True: 0, False: 5] ------------------ 2713| 0| case Mips::COP017: OpKind = MCK_COP0; break; ------------------ | Branch (2713:5): [True: 0, False: 5] ------------------ 2714| 0| case Mips::COP018: OpKind = MCK_COP0; break; ------------------ | Branch (2714:5): [True: 0, False: 5] ------------------ 2715| 0| case Mips::COP019: OpKind = MCK_COP0; break; ------------------ | Branch (2715:5): [True: 0, False: 5] ------------------ 2716| 0| case Mips::COP020: OpKind = MCK_COP0; break; ------------------ | Branch (2716:5): [True: 0, False: 5] ------------------ 2717| 0| case Mips::COP021: OpKind = MCK_COP0; break; ------------------ | Branch (2717:5): [True: 0, False: 5] ------------------ 2718| 0| case Mips::COP022: OpKind = MCK_COP0; break; ------------------ | Branch (2718:5): [True: 0, False: 5] ------------------ 2719| 0| case Mips::COP023: OpKind = MCK_COP0; break; ------------------ | Branch (2719:5): [True: 0, False: 5] ------------------ 2720| 0| case Mips::COP024: OpKind = MCK_COP0; break; ------------------ | Branch (2720:5): [True: 0, False: 5] ------------------ 2721| 0| case Mips::COP025: OpKind = MCK_COP0; break; ------------------ | Branch (2721:5): [True: 0, False: 5] ------------------ 2722| 0| case Mips::COP026: OpKind = MCK_COP0; break; ------------------ | Branch (2722:5): [True: 0, False: 5] ------------------ 2723| 0| case Mips::COP027: OpKind = MCK_COP0; break; ------------------ | Branch (2723:5): [True: 0, False: 5] ------------------ 2724| 0| case Mips::COP028: OpKind = MCK_COP0; break; ------------------ | Branch (2724:5): [True: 0, False: 5] ------------------ 2725| 0| case Mips::COP029: OpKind = MCK_COP0; break; ------------------ | Branch (2725:5): [True: 0, False: 5] ------------------ 2726| 0| case Mips::COP030: OpKind = MCK_COP0; break; ------------------ | Branch (2726:5): [True: 0, False: 5] ------------------ 2727| 0| case Mips::COP031: OpKind = MCK_COP0; break; ------------------ | Branch (2727:5): [True: 0, False: 5] ------------------ 2728| 0| case Mips::COP20: OpKind = MCK_COP2; break; ------------------ | Branch (2728:5): [True: 0, False: 5] ------------------ 2729| 0| case Mips::COP21: OpKind = MCK_COP2; break; ------------------ | Branch (2729:5): [True: 0, False: 5] ------------------ 2730| 0| case Mips::COP22: OpKind = MCK_COP2; break; ------------------ | Branch (2730:5): [True: 0, False: 5] ------------------ 2731| 0| case Mips::COP23: OpKind = MCK_COP2; break; ------------------ | Branch (2731:5): [True: 0, False: 5] ------------------ 2732| 0| case Mips::COP24: OpKind = MCK_COP2; break; ------------------ | Branch (2732:5): [True: 0, False: 5] ------------------ 2733| 0| case Mips::COP25: OpKind = MCK_COP2; break; ------------------ | Branch (2733:5): [True: 0, False: 5] ------------------ 2734| 0| case Mips::COP26: OpKind = MCK_COP2; break; ------------------ | Branch (2734:5): [True: 0, False: 5] ------------------ 2735| 0| case Mips::COP27: OpKind = MCK_COP2; break; ------------------ | Branch (2735:5): [True: 0, False: 5] ------------------ 2736| 0| case Mips::COP28: OpKind = MCK_COP2; break; ------------------ | Branch (2736:5): [True: 0, False: 5] ------------------ 2737| 0| case Mips::COP29: OpKind = MCK_COP2; break; ------------------ | Branch (2737:5): [True: 0, False: 5] ------------------ 2738| 0| case Mips::COP210: OpKind = MCK_COP2; break; ------------------ | Branch (2738:5): [True: 0, False: 5] ------------------ 2739| 0| case Mips::COP211: OpKind = MCK_COP2; break; ------------------ | Branch (2739:5): [True: 0, False: 5] ------------------ 2740| 0| case Mips::COP212: OpKind = MCK_COP2; break; ------------------ | Branch (2740:5): [True: 0, False: 5] ------------------ 2741| 0| case Mips::COP213: OpKind = MCK_COP2; break; ------------------ | Branch (2741:5): [True: 0, False: 5] ------------------ 2742| 0| case Mips::COP214: OpKind = MCK_COP2; break; ------------------ | Branch (2742:5): [True: 0, False: 5] ------------------ 2743| 0| case Mips::COP215: OpKind = MCK_COP2; break; ------------------ | Branch (2743:5): [True: 0, False: 5] ------------------ 2744| 0| case Mips::COP216: OpKind = MCK_COP2; break; ------------------ | Branch (2744:5): [True: 0, False: 5] ------------------ 2745| 0| case Mips::COP217: OpKind = MCK_COP2; break; ------------------ | Branch (2745:5): [True: 0, False: 5] ------------------ 2746| 0| case Mips::COP218: OpKind = MCK_COP2; break; ------------------ | Branch (2746:5): [True: 0, False: 5] ------------------ 2747| 0| case Mips::COP219: OpKind = MCK_COP2; break; ------------------ | Branch (2747:5): [True: 0, False: 5] ------------------ 2748| 0| case Mips::COP220: OpKind = MCK_COP2; break; ------------------ | Branch (2748:5): [True: 0, False: 5] ------------------ 2749| 0| case Mips::COP221: OpKind = MCK_COP2; break; ------------------ | Branch (2749:5): [True: 0, False: 5] ------------------ 2750| 0| case Mips::COP222: OpKind = MCK_COP2; break; ------------------ | Branch (2750:5): [True: 0, False: 5] ------------------ 2751| 0| case Mips::COP223: OpKind = MCK_COP2; break; ------------------ | Branch (2751:5): [True: 0, False: 5] ------------------ 2752| 0| case Mips::COP224: OpKind = MCK_COP2; break; ------------------ | Branch (2752:5): [True: 0, False: 5] ------------------ 2753| 0| case Mips::COP225: OpKind = MCK_COP2; break; ------------------ | Branch (2753:5): [True: 0, False: 5] ------------------ 2754| 0| case Mips::COP226: OpKind = MCK_COP2; break; ------------------ | Branch (2754:5): [True: 0, False: 5] ------------------ 2755| 0| case Mips::COP227: OpKind = MCK_COP2; break; ------------------ | Branch (2755:5): [True: 0, False: 5] ------------------ 2756| 0| case Mips::COP228: OpKind = MCK_COP2; break; ------------------ | Branch (2756:5): [True: 0, False: 5] ------------------ 2757| 0| case Mips::COP229: OpKind = MCK_COP2; break; ------------------ | Branch (2757:5): [True: 0, False: 5] ------------------ 2758| 0| case Mips::COP230: OpKind = MCK_COP2; break; ------------------ | Branch (2758:5): [True: 0, False: 5] ------------------ 2759| 0| case Mips::COP231: OpKind = MCK_COP2; break; ------------------ | Branch (2759:5): [True: 0, False: 5] ------------------ 2760| 0| case Mips::COP30: OpKind = MCK_COP3; break; ------------------ | Branch (2760:5): [True: 0, False: 5] ------------------ 2761| 0| case Mips::COP31: OpKind = MCK_COP3; break; ------------------ | Branch (2761:5): [True: 0, False: 5] ------------------ 2762| 0| case Mips::COP32: OpKind = MCK_COP3; break; ------------------ | Branch (2762:5): [True: 0, False: 5] ------------------ 2763| 0| case Mips::COP33: OpKind = MCK_COP3; break; ------------------ | Branch (2763:5): [True: 0, False: 5] ------------------ 2764| 0| case Mips::COP34: OpKind = MCK_COP3; break; ------------------ | Branch (2764:5): [True: 0, False: 5] ------------------ 2765| 0| case Mips::COP35: OpKind = MCK_COP3; break; ------------------ | Branch (2765:5): [True: 0, False: 5] ------------------ 2766| 0| case Mips::COP36: OpKind = MCK_COP3; break; ------------------ | Branch (2766:5): [True: 0, False: 5] ------------------ 2767| 0| case Mips::COP37: OpKind = MCK_COP3; break; ------------------ | Branch (2767:5): [True: 0, False: 5] ------------------ 2768| 0| case Mips::COP38: OpKind = MCK_COP3; break; ------------------ | Branch (2768:5): [True: 0, False: 5] ------------------ 2769| 0| case Mips::COP39: OpKind = MCK_COP3; break; ------------------ | Branch (2769:5): [True: 0, False: 5] ------------------ 2770| 0| case Mips::COP310: OpKind = MCK_COP3; break; ------------------ | Branch (2770:5): [True: 0, False: 5] ------------------ 2771| 0| case Mips::COP311: OpKind = MCK_COP3; break; ------------------ | Branch (2771:5): [True: 0, False: 5] ------------------ 2772| 0| case Mips::COP312: OpKind = MCK_COP3; break; ------------------ | Branch (2772:5): [True: 0, False: 5] ------------------ 2773| 0| case Mips::COP313: OpKind = MCK_COP3; break; ------------------ | Branch (2773:5): [True: 0, False: 5] ------------------ 2774| 0| case Mips::COP314: OpKind = MCK_COP3; break; ------------------ | Branch (2774:5): [True: 0, False: 5] ------------------ 2775| 0| case Mips::COP315: OpKind = MCK_COP3; break; ------------------ | Branch (2775:5): [True: 0, False: 5] ------------------ 2776| 0| case Mips::COP316: OpKind = MCK_COP3; break; ------------------ | Branch (2776:5): [True: 0, False: 5] ------------------ 2777| 0| case Mips::COP317: OpKind = MCK_COP3; break; ------------------ | Branch (2777:5): [True: 0, False: 5] ------------------ 2778| 0| case Mips::COP318: OpKind = MCK_COP3; break; ------------------ | Branch (2778:5): [True: 0, False: 5] ------------------ 2779| 0| case Mips::COP319: OpKind = MCK_COP3; break; ------------------ | Branch (2779:5): [True: 0, False: 5] ------------------ 2780| 0| case Mips::COP320: OpKind = MCK_COP3; break; ------------------ | Branch (2780:5): [True: 0, False: 5] ------------------ 2781| 0| case Mips::COP321: OpKind = MCK_COP3; break; ------------------ | Branch (2781:5): [True: 0, False: 5] ------------------ 2782| 0| case Mips::COP322: OpKind = MCK_COP3; break; ------------------ | Branch (2782:5): [True: 0, False: 5] ------------------ 2783| 0| case Mips::COP323: OpKind = MCK_COP3; break; ------------------ | Branch (2783:5): [True: 0, False: 5] ------------------ 2784| 0| case Mips::COP324: OpKind = MCK_COP3; break; ------------------ | Branch (2784:5): [True: 0, False: 5] ------------------ 2785| 0| case Mips::COP325: OpKind = MCK_COP3; break; ------------------ | Branch (2785:5): [True: 0, False: 5] ------------------ 2786| 0| case Mips::COP326: OpKind = MCK_COP3; break; ------------------ | Branch (2786:5): [True: 0, False: 5] ------------------ 2787| 0| case Mips::COP327: OpKind = MCK_COP3; break; ------------------ | Branch (2787:5): [True: 0, False: 5] ------------------ 2788| 0| case Mips::COP328: OpKind = MCK_COP3; break; ------------------ | Branch (2788:5): [True: 0, False: 5] ------------------ 2789| 0| case Mips::COP329: OpKind = MCK_COP3; break; ------------------ | Branch (2789:5): [True: 0, False: 5] ------------------ 2790| 0| case Mips::COP330: OpKind = MCK_COP3; break; ------------------ | Branch (2790:5): [True: 0, False: 5] ------------------ 2791| 0| case Mips::COP331: OpKind = MCK_COP3; break; ------------------ | Branch (2791:5): [True: 0, False: 5] ------------------ 2792| 0| case Mips::PC: OpKind = MCK_PC; break; ------------------ | Branch (2792:5): [True: 0, False: 5] ------------------ 2793| 0| case Mips::HWR0: OpKind = MCK_HWRegs; break; ------------------ | Branch (2793:5): [True: 0, False: 5] ------------------ 2794| 0| case Mips::HWR1: OpKind = MCK_HWRegs; break; ------------------ | Branch (2794:5): [True: 0, False: 5] ------------------ 2795| 0| case Mips::HWR2: OpKind = MCK_HWRegs; break; ------------------ | Branch (2795:5): [True: 0, False: 5] ------------------ 2796| 0| case Mips::HWR3: OpKind = MCK_HWRegs; break; ------------------ | Branch (2796:5): [True: 0, False: 5] ------------------ 2797| 0| case Mips::HWR4: OpKind = MCK_HWRegs; break; ------------------ | Branch (2797:5): [True: 0, False: 5] ------------------ 2798| 0| case Mips::HWR5: OpKind = MCK_HWRegs; break; ------------------ | Branch (2798:5): [True: 0, False: 5] ------------------ 2799| 0| case Mips::HWR6: OpKind = MCK_HWRegs; break; ------------------ | Branch (2799:5): [True: 0, False: 5] ------------------ 2800| 0| case Mips::HWR7: OpKind = MCK_HWRegs; break; ------------------ | Branch (2800:5): [True: 0, False: 5] ------------------ 2801| 0| case Mips::HWR8: OpKind = MCK_HWRegs; break; ------------------ | Branch (2801:5): [True: 0, False: 5] ------------------ 2802| 0| case Mips::HWR9: OpKind = MCK_HWRegs; break; ------------------ | Branch (2802:5): [True: 0, False: 5] ------------------ 2803| 0| case Mips::HWR10: OpKind = MCK_HWRegs; break; ------------------ | Branch (2803:5): [True: 0, False: 5] ------------------ 2804| 0| case Mips::HWR11: OpKind = MCK_HWRegs; break; ------------------ | Branch (2804:5): [True: 0, False: 5] ------------------ 2805| 0| case Mips::HWR12: OpKind = MCK_HWRegs; break; ------------------ | Branch (2805:5): [True: 0, False: 5] ------------------ 2806| 0| case Mips::HWR13: OpKind = MCK_HWRegs; break; ------------------ | Branch (2806:5): [True: 0, False: 5] ------------------ 2807| 0| case Mips::HWR14: OpKind = MCK_HWRegs; break; ------------------ | Branch (2807:5): [True: 0, False: 5] ------------------ 2808| 0| case Mips::HWR15: OpKind = MCK_HWRegs; break; ------------------ | Branch (2808:5): [True: 0, False: 5] ------------------ 2809| 0| case Mips::HWR16: OpKind = MCK_HWRegs; break; ------------------ | Branch (2809:5): [True: 0, False: 5] ------------------ 2810| 0| case Mips::HWR17: OpKind = MCK_HWRegs; break; ------------------ | Branch (2810:5): [True: 0, False: 5] ------------------ 2811| 0| case Mips::HWR18: OpKind = MCK_HWRegs; break; ------------------ | Branch (2811:5): [True: 0, False: 5] ------------------ 2812| 0| case Mips::HWR19: OpKind = MCK_HWRegs; break; ------------------ | Branch (2812:5): [True: 0, False: 5] ------------------ 2813| 0| case Mips::HWR20: OpKind = MCK_HWRegs; break; ------------------ | Branch (2813:5): [True: 0, False: 5] ------------------ 2814| 0| case Mips::HWR21: OpKind = MCK_HWRegs; break; ------------------ | Branch (2814:5): [True: 0, False: 5] ------------------ 2815| 0| case Mips::HWR22: OpKind = MCK_HWRegs; break; ------------------ | Branch (2815:5): [True: 0, False: 5] ------------------ 2816| 0| case Mips::HWR23: OpKind = MCK_HWRegs; break; ------------------ | Branch (2816:5): [True: 0, False: 5] ------------------ 2817| 0| case Mips::HWR24: OpKind = MCK_HWRegs; break; ------------------ | Branch (2817:5): [True: 0, False: 5] ------------------ 2818| 0| case Mips::HWR25: OpKind = MCK_HWRegs; break; ------------------ | Branch (2818:5): [True: 0, False: 5] ------------------ 2819| 0| case Mips::HWR26: OpKind = MCK_HWRegs; break; ------------------ | Branch (2819:5): [True: 0, False: 5] ------------------ 2820| 0| case Mips::HWR27: OpKind = MCK_HWRegs; break; ------------------ | Branch (2820:5): [True: 0, False: 5] ------------------ 2821| 0| case Mips::HWR28: OpKind = MCK_HWRegs; break; ------------------ | Branch (2821:5): [True: 0, False: 5] ------------------ 2822| 0| case Mips::HWR29: OpKind = MCK_HWRegs; break; ------------------ | Branch (2822:5): [True: 0, False: 5] ------------------ 2823| 0| case Mips::HWR30: OpKind = MCK_HWRegs; break; ------------------ | Branch (2823:5): [True: 0, False: 5] ------------------ 2824| 0| case Mips::HWR31: OpKind = MCK_HWRegs; break; ------------------ | Branch (2824:5): [True: 0, False: 5] ------------------ 2825| 0| case Mips::AC0: OpKind = MCK_ACC64; break; ------------------ | Branch (2825:5): [True: 0, False: 5] ------------------ 2826| 0| case Mips::AC1: OpKind = MCK_ACC64DSP; break; ------------------ | Branch (2826:5): [True: 0, False: 5] ------------------ 2827| 0| case Mips::AC2: OpKind = MCK_ACC64DSP; break; ------------------ | Branch (2827:5): [True: 0, False: 5] ------------------ 2828| 0| case Mips::AC3: OpKind = MCK_ACC64DSP; break; ------------------ | Branch (2828:5): [True: 0, False: 5] ------------------ 2829| 0| case Mips::AC0_64: OpKind = MCK_ACC128; break; ------------------ | Branch (2829:5): [True: 0, False: 5] ------------------ 2830| 0| case Mips::DSPCCond: OpKind = MCK_DSPCC; break; ------------------ | Branch (2830:5): [True: 0, False: 5] ------------------ 2831| 0| case Mips::MSAIR: OpKind = MCK_MSACtrl; break; ------------------ | Branch (2831:5): [True: 0, False: 5] ------------------ 2832| 0| case Mips::MSACSR: OpKind = MCK_MSACtrl; break; ------------------ | Branch (2832:5): [True: 0, False: 5] ------------------ 2833| 0| case Mips::MSAAccess: OpKind = MCK_MSACtrl; break; ------------------ | Branch (2833:5): [True: 0, False: 5] ------------------ 2834| 0| case Mips::MSASave: OpKind = MCK_MSACtrl; break; ------------------ | Branch (2834:5): [True: 0, False: 5] ------------------ 2835| 0| case Mips::MSAModify: OpKind = MCK_MSACtrl; break; ------------------ | Branch (2835:5): [True: 0, False: 5] ------------------ 2836| 0| case Mips::MSARequest: OpKind = MCK_MSACtrl; break; ------------------ | Branch (2836:5): [True: 0, False: 5] ------------------ 2837| 0| case Mips::MSAMap: OpKind = MCK_MSACtrl; break; ------------------ | Branch (2837:5): [True: 0, False: 5] ------------------ 2838| 0| case Mips::MSAUnmap: OpKind = MCK_MSACtrl; break; ------------------ | Branch (2838:5): [True: 0, False: 5] ------------------ 2839| 0| case Mips::MPL0: OpKind = MCK_OCTEON_MPL; break; ------------------ | Branch (2839:5): [True: 0, False: 5] ------------------ 2840| 0| case Mips::MPL1: OpKind = MCK_OCTEON_MPL; break; ------------------ | Branch (2840:5): [True: 0, False: 5] ------------------ 2841| 0| case Mips::MPL2: OpKind = MCK_OCTEON_MPL; break; ------------------ | Branch (2841:5): [True: 0, False: 5] ------------------ 2842| 0| case Mips::P0: OpKind = MCK_OCTEON_P; break; ------------------ | Branch (2842:5): [True: 0, False: 5] ------------------ 2843| 0| case Mips::P1: OpKind = MCK_OCTEON_P; break; ------------------ | Branch (2843:5): [True: 0, False: 5] ------------------ 2844| 0| case Mips::P2: OpKind = MCK_OCTEON_P; break; ------------------ | Branch (2844:5): [True: 0, False: 5] ------------------ 2845| 5| } 2846| 5| return isSubclass(OpKind, Kind) ? MCTargetAsmParser::Match_Success : ------------------ | Branch (2846:12): [True: 0, False: 5] ------------------ 2847| 5| MCTargetAsmParser::Match_InvalidOperand; 2848| 5| } 2849| | 2850| 1.35k| return MCTargetAsmParser::Match_InvalidOperand; 2851| 1.35k|} MipsAsmParser.cpp:_ZL10isSubclassN12_GLOBAL__N_114MatchClassKindES0_: 1642| 5|static bool isSubclass(MatchClassKind A, MatchClassKind B) { 1643| 5| if (A == B) ------------------ | Branch (1643:7): [True: 0, False: 5] ------------------ 1644| 0| return true; 1645| | 1646| 5| switch (A) { 1647| 0| default: ------------------ | Branch (1647:3): [True: 0, False: 5] ------------------ 1648| 0| return false; 1649| | 1650| 0| case MCK_Reg22: ------------------ | Branch (1650:3): [True: 0, False: 5] ------------------ 1651| 0| return B == MCK_GPR64; 1652| | 1653| 0| case MCK_Reg21: ------------------ | Branch (1653:3): [True: 0, False: 5] ------------------ 1654| 0| switch (B) { 1655| 0| default: return false; ------------------ | Branch (1655:5): [True: 0, False: 0] ------------------ 1656| 0| case MCK_Reg17: return true; ------------------ | Branch (1656:5): [True: 0, False: 0] ------------------ 1657| 0| case MCK_GPR64: return true; ------------------ | Branch (1657:5): [True: 0, False: 0] ------------------ 1658| 0| } 1659| | 1660| 0| case MCK_ACC64: ------------------ | Branch (1660:3): [True: 0, False: 5] ------------------ 1661| 0| return B == MCK_ACC64DSP; 1662| | 1663| 0| case MCK_CPURAReg: ------------------ | Branch (1663:3): [True: 0, False: 5] ------------------ 1664| 0| return B == MCK_DSPR; 1665| | 1666| 0| case MCK_CPUSPReg: ------------------ | Branch (1666:3): [True: 0, False: 5] ------------------ 1667| 0| switch (B) { 1668| 0| default: return false; ------------------ | Branch (1668:5): [True: 0, False: 0] ------------------ 1669| 0| case MCK_CPU16RegsPlusSP: return true; ------------------ | Branch (1669:5): [True: 0, False: 0] ------------------ 1670| 0| case MCK_DSPR: return true; ------------------ | Branch (1670:5): [True: 0, False: 0] ------------------ 1671| 0| } 1672| | 1673| 0| case MCK_HI32: ------------------ | Branch (1673:3): [True: 0, False: 5] ------------------ 1674| 0| return B == MCK_HI32DSP; 1675| | 1676| 0| case MCK_LO32: ------------------ | Branch (1676:3): [True: 0, False: 5] ------------------ 1677| 0| return B == MCK_LO32DSP; 1678| | 1679| 5| case MCK_ZERO: ------------------ | Branch (1679:3): [True: 5, False: 0] ------------------ 1680| 5| switch (B) { 1681| 5| default: return false; ------------------ | Branch (1681:5): [True: 5, False: 0] ------------------ 1682| 0| case MCK_Reg4: return true; ------------------ | Branch (1682:5): [True: 0, False: 5] ------------------ 1683| 0| case MCK_GPRMM16MoveP: return true; ------------------ | Branch (1683:5): [True: 0, False: 5] ------------------ 1684| 0| case MCK_GPRMM16Zero: return true; ------------------ | Branch (1684:5): [True: 0, False: 5] ------------------ 1685| 0| case MCK_DSPR: return true; ------------------ | Branch (1685:5): [True: 0, False: 5] ------------------ 1686| 5| } 1687| | 1688| 0| case MCK_Reg20: ------------------ | Branch (1688:3): [True: 0, False: 5] ------------------ 1689| 0| switch (B) { 1690| 0| default: return false; ------------------ | Branch (1690:5): [True: 0, False: 0] ------------------ 1691| 0| case MCK_Reg19: return true; ------------------ | Branch (1691:5): [True: 0, False: 0] ------------------ 1692| 0| case MCK_Reg15: return true; ------------------ | Branch (1692:5): [True: 0, False: 0] ------------------ 1693| 0| case MCK_Reg18: return true; ------------------ | Branch (1693:5): [True: 0, False: 0] ------------------ 1694| 0| case MCK_Reg16: return true; ------------------ | Branch (1694:5): [True: 0, False: 0] ------------------ 1695| 0| case MCK_Reg14: return true; ------------------ | Branch (1695:5): [True: 0, False: 0] ------------------ 1696| 0| case MCK_Reg13: return true; ------------------ | Branch (1696:5): [True: 0, False: 0] ------------------ 1697| 0| case MCK_Reg17: return true; ------------------ | Branch (1697:5): [True: 0, False: 0] ------------------ 1698| 0| case MCK_GPR64: return true; ------------------ | Branch (1698:5): [True: 0, False: 0] ------------------ 1699| 0| } 1700| | 1701| 0| case MCK_Reg9: ------------------ | Branch (1701:3): [True: 0, False: 5] ------------------ 1702| 0| switch (B) { 1703| 0| default: return false; ------------------ | Branch (1703:5): [True: 0, False: 0] ------------------ 1704| 0| case MCK_Reg8: return true; ------------------ | Branch (1704:5): [True: 0, False: 0] ------------------ 1705| 0| case MCK_Reg4: return true; ------------------ | Branch (1705:5): [True: 0, False: 0] ------------------ 1706| 0| case MCK_Reg7: return true; ------------------ | Branch (1706:5): [True: 0, False: 0] ------------------ 1707| 0| case MCK_CPU16Regs: return true; ------------------ | Branch (1707:5): [True: 0, False: 0] ------------------ 1708| 0| case MCK_GPRMM16MoveP: return true; ------------------ | Branch (1708:5): [True: 0, False: 0] ------------------ 1709| 0| case MCK_GPRMM16Zero: return true; ------------------ | Branch (1709:5): [True: 0, False: 0] ------------------ 1710| 0| case MCK_CPU16RegsPlusSP: return true; ------------------ | Branch (1710:5): [True: 0, False: 0] ------------------ 1711| 0| case MCK_DSPR: return true; ------------------ | Branch (1711:5): [True: 0, False: 0] ------------------ 1712| 0| } 1713| | 1714| 0| case MCK_Reg19: ------------------ | Branch (1714:3): [True: 0, False: 5] ------------------ 1715| 0| switch (B) { 1716| 0| default: return false; ------------------ | Branch (1716:5): [True: 0, False: 0] ------------------ 1717| 0| case MCK_Reg16: return true; ------------------ | Branch (1717:5): [True: 0, False: 0] ------------------ 1718| 0| case MCK_Reg14: return true; ------------------ | Branch (1718:5): [True: 0, False: 0] ------------------ 1719| 0| case MCK_Reg17: return true; ------------------ | Branch (1719:5): [True: 0, False: 0] ------------------ 1720| 0| case MCK_GPR64: return true; ------------------ | Branch (1720:5): [True: 0, False: 0] ------------------ 1721| 0| } 1722| | 1723| 0| case MCK_Reg15: ------------------ | Branch (1723:3): [True: 0, False: 5] ------------------ 1724| 0| switch (B) { 1725| 0| default: return false; ------------------ | Branch (1725:5): [True: 0, False: 0] ------------------ 1726| 0| case MCK_Reg14: return true; ------------------ | Branch (1726:5): [True: 0, False: 0] ------------------ 1727| 0| case MCK_Reg13: return true; ------------------ | Branch (1727:5): [True: 0, False: 0] ------------------ 1728| 0| case MCK_GPR64: return true; ------------------ | Branch (1728:5): [True: 0, False: 0] ------------------ 1729| 0| } 1730| | 1731| 0| case MCK_Reg8: ------------------ | Branch (1731:3): [True: 0, False: 5] ------------------ 1732| 0| switch (B) { 1733| 0| default: return false; ------------------ | Branch (1733:5): [True: 0, False: 0] ------------------ 1734| 0| case MCK_CPU16Regs: return true; ------------------ | Branch (1734:5): [True: 0, False: 0] ------------------ 1735| 0| case MCK_GPRMM16MoveP: return true; ------------------ | Branch (1735:5): [True: 0, False: 0] ------------------ 1736| 0| case MCK_CPU16RegsPlusSP: return true; ------------------ | Branch (1736:5): [True: 0, False: 0] ------------------ 1737| 0| case MCK_DSPR: return true; ------------------ | Branch (1737:5): [True: 0, False: 0] ------------------ 1738| 0| } 1739| | 1740| 0| case MCK_Reg4: ------------------ | Branch (1740:3): [True: 0, False: 5] ------------------ 1741| 0| switch (B) { 1742| 0| default: return false; ------------------ | Branch (1742:5): [True: 0, False: 0] ------------------ 1743| 0| case MCK_GPRMM16MoveP: return true; ------------------ | Branch (1743:5): [True: 0, False: 0] ------------------ 1744| 0| case MCK_GPRMM16Zero: return true; ------------------ | Branch (1744:5): [True: 0, False: 0] ------------------ 1745| 0| case MCK_DSPR: return true; ------------------ | Branch (1745:5): [True: 0, False: 0] ------------------ 1746| 0| } 1747| | 1748| 0| case MCK_Reg18: ------------------ | Branch (1748:3): [True: 0, False: 5] ------------------ 1749| 0| switch (B) { 1750| 0| default: return false; ------------------ | Branch (1750:5): [True: 0, False: 0] ------------------ 1751| 0| case MCK_Reg16: return true; ------------------ | Branch (1751:5): [True: 0, False: 0] ------------------ 1752| 0| case MCK_Reg13: return true; ------------------ | Branch (1752:5): [True: 0, False: 0] ------------------ 1753| 0| case MCK_Reg17: return true; ------------------ | Branch (1753:5): [True: 0, False: 0] ------------------ 1754| 0| case MCK_GPR64: return true; ------------------ | Branch (1754:5): [True: 0, False: 0] ------------------ 1755| 0| } 1756| | 1757| 0| case MCK_Reg7: ------------------ | Branch (1757:3): [True: 0, False: 5] ------------------ 1758| 0| switch (B) { 1759| 0| default: return false; ------------------ | Branch (1759:5): [True: 0, False: 0] ------------------ 1760| 0| case MCK_CPU16Regs: return true; ------------------ | Branch (1760:5): [True: 0, False: 0] ------------------ 1761| 0| case MCK_GPRMM16Zero: return true; ------------------ | Branch (1761:5): [True: 0, False: 0] ------------------ 1762| 0| case MCK_CPU16RegsPlusSP: return true; ------------------ | Branch (1762:5): [True: 0, False: 0] ------------------ 1763| 0| case MCK_DSPR: return true; ------------------ | Branch (1763:5): [True: 0, False: 0] ------------------ 1764| 0| } 1765| | 1766| 0| case MCK_Reg29: ------------------ | Branch (1766:3): [True: 0, False: 5] ------------------ 1767| 0| switch (B) { 1768| 0| default: return false; ------------------ | Branch (1768:5): [True: 0, False: 0] ------------------ 1769| 0| case MCK_AFGR64: return true; ------------------ | Branch (1769:5): [True: 0, False: 0] ------------------ 1770| 0| case MCK_Reg30: return true; ------------------ | Branch (1770:5): [True: 0, False: 0] ------------------ 1771| 0| case MCK_OddSP: return true; ------------------ | Branch (1771:5): [True: 0, False: 0] ------------------ 1772| 0| } 1773| | 1774| 0| case MCK_Reg16: ------------------ | Branch (1774:3): [True: 0, False: 5] ------------------ 1775| 0| switch (B) { 1776| 0| default: return false; ------------------ | Branch (1776:5): [True: 0, False: 0] ------------------ 1777| 0| case MCK_Reg17: return true; ------------------ | Branch (1777:5): [True: 0, False: 0] ------------------ 1778| 0| case MCK_GPR64: return true; ------------------ | Branch (1778:5): [True: 0, False: 0] ------------------ 1779| 0| } 1780| | 1781| 0| case MCK_Reg14: ------------------ | Branch (1781:3): [True: 0, False: 5] ------------------ 1782| 0| return B == MCK_GPR64; 1783| | 1784| 0| case MCK_Reg13: ------------------ | Branch (1784:3): [True: 0, False: 5] ------------------ 1785| 0| return B == MCK_GPR64; 1786| | 1787| 0| case MCK_CPU16Regs: ------------------ | Branch (1787:3): [True: 0, False: 5] ------------------ 1788| 0| switch (B) { 1789| 0| default: return false; ------------------ | Branch (1789:5): [True: 0, False: 0] ------------------ 1790| 0| case MCK_CPU16RegsPlusSP: return true; ------------------ | Branch (1790:5): [True: 0, False: 0] ------------------ 1791| 0| case MCK_DSPR: return true; ------------------ | Branch (1791:5): [True: 0, False: 0] ------------------ 1792| 0| } 1793| | 1794| 0| case MCK_GPRMM16MoveP: ------------------ | Branch (1794:3): [True: 0, False: 5] ------------------ 1795| 0| return B == MCK_DSPR; 1796| | 1797| 0| case MCK_GPRMM16Zero: ------------------ | Branch (1797:3): [True: 0, False: 5] ------------------ 1798| 0| return B == MCK_DSPR; 1799| | 1800| 0| case MCK_Reg17: ------------------ | Branch (1800:3): [True: 0, False: 5] ------------------ 1801| 0| return B == MCK_GPR64; 1802| | 1803| 0| case MCK_CPU16RegsPlusSP: ------------------ | Branch (1803:3): [True: 0, False: 5] ------------------ 1804| 0| return B == MCK_DSPR; 1805| | 1806| 0| case MCK_Reg35: ------------------ | Branch (1806:3): [True: 0, False: 5] ------------------ 1807| 0| return B == MCK_MSA128B; 1808| | 1809| 0| case MCK_Reg32: ------------------ | Branch (1809:3): [True: 0, False: 5] ------------------ 1810| 0| switch (B) { 1811| 0| default: return false; ------------------ | Branch (1811:5): [True: 0, False: 0] ------------------ 1812| 0| case MCK_Reg30: return true; ------------------ | Branch (1812:5): [True: 0, False: 0] ------------------ 1813| 0| case MCK_FGR64: return true; ------------------ | Branch (1813:5): [True: 0, False: 0] ------------------ 1814| 0| case MCK_OddSP: return true; ------------------ | Branch (1814:5): [True: 0, False: 0] ------------------ 1815| 0| } 1816| | 1817| 0| case MCK_Reg27: ------------------ | Branch (1817:3): [True: 0, False: 5] ------------------ 1818| 0| switch (B) { 1819| 0| default: return false; ------------------ | Branch (1819:5): [True: 0, False: 0] ------------------ 1820| 0| case MCK_FGRH32: return true; ------------------ | Branch (1820:5): [True: 0, False: 0] ------------------ 1821| 0| case MCK_OddSP: return true; ------------------ | Branch (1821:5): [True: 0, False: 0] ------------------ 1822| 0| } 1823| | 1824| 0| case MCK_Reg24: ------------------ | Branch (1824:3): [True: 0, False: 5] ------------------ 1825| 0| switch (B) { 1826| 0| default: return false; ------------------ | Branch (1826:5): [True: 0, False: 0] ------------------ 1827| 0| case MCK_FGR32: return true; ------------------ | Branch (1827:5): [True: 0, False: 0] ------------------ 1828| 0| case MCK_OddSP: return true; ------------------ | Branch (1828:5): [True: 0, False: 0] ------------------ 1829| 0| } 1830| | 1831| 0| case MCK_MSA128WEvens: ------------------ | Branch (1831:3): [True: 0, False: 5] ------------------ 1832| 0| return B == MCK_MSA128B; 1833| | 1834| 0| case MCK_Reg30: ------------------ | Branch (1834:3): [True: 0, False: 5] ------------------ 1835| 0| return B == MCK_OddSP; 1836| | 1837| 0| case MCK_MemOffsetSimm11: ------------------ | Branch (1837:3): [True: 0, False: 5] ------------------ 1838| 0| return B == MCK_Mem; 1839| | 1840| 0| case MCK_MemOffsetSimm16: ------------------ | Branch (1840:3): [True: 0, False: 5] ------------------ 1841| 0| return B == MCK_Mem; 1842| | 1843| 0| case MCK_MemOffsetSimm9: ------------------ | Branch (1843:3): [True: 0, False: 5] ------------------ 1844| 0| return B == MCK_Mem; 1845| | 1846| 0| case MCK_MemOffsetSimm9GPR: ------------------ | Branch (1846:3): [True: 0, False: 5] ------------------ 1847| 0| return B == MCK_Mem; 1848| | 1849| 0| case MCK_MemOffsetUimm4: ------------------ | Branch (1849:3): [True: 0, False: 5] ------------------ 1850| 0| return B == MCK_Mem; 1851| | 1852| 0| case MCK_ConstantImmz: ------------------ | Branch (1852:3): [True: 0, False: 5] ------------------ 1853| 0| switch (B) { 1854| 0| default: return false; ------------------ | Branch (1854:5): [True: 0, False: 0] ------------------ 1855| 0| case MCK_ConstantUImm1_0: return true; ------------------ | Branch (1855:5): [True: 0, False: 0] ------------------ 1856| 0| case MCK_ConstantUImm2_0: return true; ------------------ | Branch (1856:5): [True: 0, False: 0] ------------------ 1857| 0| case MCK_ConstantUImm3_0: return true; ------------------ | Branch (1857:5): [True: 0, False: 0] ------------------ 1858| 0| case MCK_ConstantUImm4_0: return true; ------------------ | Branch (1858:5): [True: 0, False: 0] ------------------ 1859| 0| case MCK_ConstantUImm5_0: return true; ------------------ | Branch (1859:5): [True: 0, False: 0] ------------------ 1860| 0| case MCK_ConstantUImm5_32: return true; ------------------ | Branch (1860:5): [True: 0, False: 0] ------------------ 1861| 0| case MCK_ConstantUImm5_32_Norm: return true; ------------------ | Branch (1861:5): [True: 0, False: 0] ------------------ 1862| 0| case MCK_ConstantUImm6_0: return true; ------------------ | Branch (1862:5): [True: 0, False: 0] ------------------ 1863| 0| case MCK_ConstantUImm7_0: return true; ------------------ | Branch (1863:5): [True: 0, False: 0] ------------------ 1864| 0| case MCK_ConstantUImm8_0: return true; ------------------ | Branch (1864:5): [True: 0, False: 0] ------------------ 1865| 0| case MCK_ConstantUImm10_0: return true; ------------------ | Branch (1865:5): [True: 0, False: 0] ------------------ 1866| 0| case MCK_UImm16: return true; ------------------ | Branch (1866:5): [True: 0, False: 0] ------------------ 1867| 0| case MCK_UImm16_Relaxed: return true; ------------------ | Branch (1867:5): [True: 0, False: 0] ------------------ 1868| 0| } 1869| | 1870| 0| case MCK_ConstantUImm1_0: ------------------ | Branch (1870:3): [True: 0, False: 5] ------------------ 1871| 0| switch (B) { 1872| 0| default: return false; ------------------ | Branch (1872:5): [True: 0, False: 0] ------------------ 1873| 0| case MCK_ConstantUImm2_0: return true; ------------------ | Branch (1873:5): [True: 0, False: 0] ------------------ 1874| 0| case MCK_ConstantUImm3_0: return true; ------------------ | Branch (1874:5): [True: 0, False: 0] ------------------ 1875| 0| case MCK_ConstantUImm4_0: return true; ------------------ | Branch (1875:5): [True: 0, False: 0] ------------------ 1876| 0| case MCK_ConstantUImm5_0: return true; ------------------ | Branch (1876:5): [True: 0, False: 0] ------------------ 1877| 0| case MCK_ConstantUImm5_32: return true; ------------------ | Branch (1877:5): [True: 0, False: 0] ------------------ 1878| 0| case MCK_ConstantUImm5_32_Norm: return true; ------------------ | Branch (1878:5): [True: 0, False: 0] ------------------ 1879| 0| case MCK_ConstantUImm6_0: return true; ------------------ | Branch (1879:5): [True: 0, False: 0] ------------------ 1880| 0| case MCK_ConstantUImm7_0: return true; ------------------ | Branch (1880:5): [True: 0, False: 0] ------------------ 1881| 0| case MCK_ConstantUImm8_0: return true; ------------------ | Branch (1881:5): [True: 0, False: 0] ------------------ 1882| 0| case MCK_ConstantUImm10_0: return true; ------------------ | Branch (1882:5): [True: 0, False: 0] ------------------ 1883| 0| case MCK_UImm16: return true; ------------------ | Branch (1883:5): [True: 0, False: 0] ------------------ 1884| 0| case MCK_UImm16_Relaxed: return true; ------------------ | Branch (1884:5): [True: 0, False: 0] ------------------ 1885| 0| } 1886| | 1887| 0| case MCK_ConstantUImm2_0: ------------------ | Branch (1887:3): [True: 0, False: 5] ------------------ 1888| 0| switch (B) { 1889| 0| default: return false; ------------------ | Branch (1889:5): [True: 0, False: 0] ------------------ 1890| 0| case MCK_ConstantUImm3_0: return true; ------------------ | Branch (1890:5): [True: 0, False: 0] ------------------ 1891| 0| case MCK_ConstantUImm4_0: return true; ------------------ | Branch (1891:5): [True: 0, False: 0] ------------------ 1892| 0| case MCK_ConstantUImm5_0: return true; ------------------ | Branch (1892:5): [True: 0, False: 0] ------------------ 1893| 0| case MCK_ConstantUImm5_32: return true; ------------------ | Branch (1893:5): [True: 0, False: 0] ------------------ 1894| 0| case MCK_ConstantUImm5_32_Norm: return true; ------------------ | Branch (1894:5): [True: 0, False: 0] ------------------ 1895| 0| case MCK_ConstantUImm6_0: return true; ------------------ | Branch (1895:5): [True: 0, False: 0] ------------------ 1896| 0| case MCK_ConstantUImm7_0: return true; ------------------ | Branch (1896:5): [True: 0, False: 0] ------------------ 1897| 0| case MCK_ConstantUImm8_0: return true; ------------------ | Branch (1897:5): [True: 0, False: 0] ------------------ 1898| 0| case MCK_ConstantUImm10_0: return true; ------------------ | Branch (1898:5): [True: 0, False: 0] ------------------ 1899| 0| case MCK_UImm16: return true; ------------------ | Branch (1899:5): [True: 0, False: 0] ------------------ 1900| 0| case MCK_UImm16_Relaxed: return true; ------------------ | Branch (1900:5): [True: 0, False: 0] ------------------ 1901| 0| } 1902| | 1903| 0| case MCK_ConstantUImm2_1: ------------------ | Branch (1903:3): [True: 0, False: 5] ------------------ 1904| 0| switch (B) { 1905| 0| default: return false; ------------------ | Branch (1905:5): [True: 0, False: 0] ------------------ 1906| 0| case MCK_ConstantUImm3_0: return true; ------------------ | Branch (1906:5): [True: 0, False: 0] ------------------ 1907| 0| case MCK_ConstantUImm4_0: return true; ------------------ | Branch (1907:5): [True: 0, False: 0] ------------------ 1908| 0| case MCK_ConstantUImm5_0: return true; ------------------ | Branch (1908:5): [True: 0, False: 0] ------------------ 1909| 0| case MCK_ConstantUImm5_32: return true; ------------------ | Branch (1909:5): [True: 0, False: 0] ------------------ 1910| 0| case MCK_ConstantUImm5_32_Norm: return true; ------------------ | Branch (1910:5): [True: 0, False: 0] ------------------ 1911| 0| case MCK_ConstantUImm6_0: return true; ------------------ | Branch (1911:5): [True: 0, False: 0] ------------------ 1912| 0| case MCK_ConstantUImm7_0: return true; ------------------ | Branch (1912:5): [True: 0, False: 0] ------------------ 1913| 0| case MCK_ConstantUImm8_0: return true; ------------------ | Branch (1913:5): [True: 0, False: 0] ------------------ 1914| 0| case MCK_ConstantUImm10_0: return true; ------------------ | Branch (1914:5): [True: 0, False: 0] ------------------ 1915| 0| case MCK_UImm16: return true; ------------------ | Branch (1915:5): [True: 0, False: 0] ------------------ 1916| 0| case MCK_UImm16_Relaxed: return true; ------------------ | Branch (1916:5): [True: 0, False: 0] ------------------ 1917| 0| } 1918| | 1919| 0| case MCK_ConstantUImm3_0: ------------------ | Branch (1919:3): [True: 0, False: 5] ------------------ 1920| 0| switch (B) { 1921| 0| default: return false; ------------------ | Branch (1921:5): [True: 0, False: 0] ------------------ 1922| 0| case MCK_ConstantUImm4_0: return true; ------------------ | Branch (1922:5): [True: 0, False: 0] ------------------ 1923| 0| case MCK_ConstantUImm5_0: return true; ------------------ | Branch (1923:5): [True: 0, False: 0] ------------------ 1924| 0| case MCK_ConstantUImm5_32: return true; ------------------ | Branch (1924:5): [True: 0, False: 0] ------------------ 1925| 0| case MCK_ConstantUImm5_32_Norm: return true; ------------------ | Branch (1925:5): [True: 0, False: 0] ------------------ 1926| 0| case MCK_ConstantUImm6_0: return true; ------------------ | Branch (1926:5): [True: 0, False: 0] ------------------ 1927| 0| case MCK_ConstantUImm7_0: return true; ------------------ | Branch (1927:5): [True: 0, False: 0] ------------------ 1928| 0| case MCK_ConstantUImm8_0: return true; ------------------ | Branch (1928:5): [True: 0, False: 0] ------------------ 1929| 0| case MCK_ConstantUImm10_0: return true; ------------------ | Branch (1929:5): [True: 0, False: 0] ------------------ 1930| 0| case MCK_UImm16: return true; ------------------ | Branch (1930:5): [True: 0, False: 0] ------------------ 1931| 0| case MCK_UImm16_Relaxed: return true; ------------------ | Branch (1931:5): [True: 0, False: 0] ------------------ 1932| 0| } 1933| | 1934| 0| case MCK_ConstantUImm4_0: ------------------ | Branch (1934:3): [True: 0, False: 5] ------------------ 1935| 0| switch (B) { 1936| 0| default: return false; ------------------ | Branch (1936:5): [True: 0, False: 0] ------------------ 1937| 0| case MCK_ConstantUImm5_0: return true; ------------------ | Branch (1937:5): [True: 0, False: 0] ------------------ 1938| 0| case MCK_ConstantUImm5_32: return true; ------------------ | Branch (1938:5): [True: 0, False: 0] ------------------ 1939| 0| case MCK_ConstantUImm5_32_Norm: return true; ------------------ | Branch (1939:5): [True: 0, False: 0] ------------------ 1940| 0| case MCK_ConstantUImm6_0: return true; ------------------ | Branch (1940:5): [True: 0, False: 0] ------------------ 1941| 0| case MCK_ConstantUImm7_0: return true; ------------------ | Branch (1941:5): [True: 0, False: 0] ------------------ 1942| 0| case MCK_ConstantUImm8_0: return true; ------------------ | Branch (1942:5): [True: 0, False: 0] ------------------ 1943| 0| case MCK_ConstantUImm10_0: return true; ------------------ | Branch (1943:5): [True: 0, False: 0] ------------------ 1944| 0| case MCK_UImm16: return true; ------------------ | Branch (1944:5): [True: 0, False: 0] ------------------ 1945| 0| case MCK_UImm16_Relaxed: return true; ------------------ | Branch (1945:5): [True: 0, False: 0] ------------------ 1946| 0| } 1947| | 1948| 0| case MCK_ConstantUImm5_0: ------------------ | Branch (1948:3): [True: 0, False: 5] ------------------ 1949| 0| switch (B) { 1950| 0| default: return false; ------------------ | Branch (1950:5): [True: 0, False: 0] ------------------ 1951| 0| case MCK_ConstantUImm6_0: return true; ------------------ | Branch (1951:5): [True: 0, False: 0] ------------------ 1952| 0| case MCK_ConstantUImm7_0: return true; ------------------ | Branch (1952:5): [True: 0, False: 0] ------------------ 1953| 0| case MCK_ConstantUImm8_0: return true; ------------------ | Branch (1953:5): [True: 0, False: 0] ------------------ 1954| 0| case MCK_ConstantUImm10_0: return true; ------------------ | Branch (1954:5): [True: 0, False: 0] ------------------ 1955| 0| case MCK_UImm16: return true; ------------------ | Branch (1955:5): [True: 0, False: 0] ------------------ 1956| 0| case MCK_UImm16_Relaxed: return true; ------------------ | Branch (1956:5): [True: 0, False: 0] ------------------ 1957| 0| } 1958| | 1959| 0| case MCK_UImm5Lsl2: ------------------ | Branch (1959:3): [True: 0, False: 5] ------------------ 1960| 0| switch (B) { 1961| 0| default: return false; ------------------ | Branch (1961:5): [True: 0, False: 0] ------------------ 1962| 0| case MCK_ConstantUImm6_0: return true; ------------------ | Branch (1962:5): [True: 0, False: 0] ------------------ 1963| 0| case MCK_ConstantUImm7_0: return true; ------------------ | Branch (1963:5): [True: 0, False: 0] ------------------ 1964| 0| case MCK_ConstantUImm8_0: return true; ------------------ | Branch (1964:5): [True: 0, False: 0] ------------------ 1965| 0| case MCK_ConstantUImm10_0: return true; ------------------ | Branch (1965:5): [True: 0, False: 0] ------------------ 1966| 0| case MCK_UImm16: return true; ------------------ | Branch (1966:5): [True: 0, False: 0] ------------------ 1967| 0| case MCK_UImm16_Relaxed: return true; ------------------ | Branch (1967:5): [True: 0, False: 0] ------------------ 1968| 0| } 1969| | 1970| 0| case MCK_ConstantUImm5_1: ------------------ | Branch (1970:3): [True: 0, False: 5] ------------------ 1971| 0| switch (B) { 1972| 0| default: return false; ------------------ | Branch (1972:5): [True: 0, False: 0] ------------------ 1973| 0| case MCK_ConstantUImm6_0: return true; ------------------ | Branch (1973:5): [True: 0, False: 0] ------------------ 1974| 0| case MCK_ConstantUImm7_0: return true; ------------------ | Branch (1974:5): [True: 0, False: 0] ------------------ 1975| 0| case MCK_ConstantUImm8_0: return true; ------------------ | Branch (1975:5): [True: 0, False: 0] ------------------ 1976| 0| case MCK_ConstantUImm10_0: return true; ------------------ | Branch (1976:5): [True: 0, False: 0] ------------------ 1977| 0| case MCK_UImm16: return true; ------------------ | Branch (1977:5): [True: 0, False: 0] ------------------ 1978| 0| case MCK_UImm16_Relaxed: return true; ------------------ | Branch (1978:5): [True: 0, False: 0] ------------------ 1979| 0| } 1980| | 1981| 0| case MCK_ConstantUImm5_32: ------------------ | Branch (1981:3): [True: 0, False: 5] ------------------ 1982| 0| switch (B) { 1983| 0| default: return false; ------------------ | Branch (1983:5): [True: 0, False: 0] ------------------ 1984| 0| case MCK_ConstantUImm6_0: return true; ------------------ | Branch (1984:5): [True: 0, False: 0] ------------------ 1985| 0| case MCK_ConstantUImm7_0: return true; ------------------ | Branch (1985:5): [True: 0, False: 0] ------------------ 1986| 0| case MCK_ConstantUImm8_0: return true; ------------------ | Branch (1986:5): [True: 0, False: 0] ------------------ 1987| 0| case MCK_ConstantUImm10_0: return true; ------------------ | Branch (1987:5): [True: 0, False: 0] ------------------ 1988| 0| case MCK_UImm16: return true; ------------------ | Branch (1988:5): [True: 0, False: 0] ------------------ 1989| 0| case MCK_UImm16_Relaxed: return true; ------------------ | Branch (1989:5): [True: 0, False: 0] ------------------ 1990| 0| } 1991| | 1992| 0| case MCK_ConstantUImm5_32_Norm: ------------------ | Branch (1992:3): [True: 0, False: 5] ------------------ 1993| 0| switch (B) { 1994| 0| default: return false; ------------------ | Branch (1994:5): [True: 0, False: 0] ------------------ 1995| 0| case MCK_ConstantUImm6_0: return true; ------------------ | Branch (1995:5): [True: 0, False: 0] ------------------ 1996| 0| case MCK_ConstantUImm7_0: return true; ------------------ | Branch (1996:5): [True: 0, False: 0] ------------------ 1997| 0| case MCK_ConstantUImm8_0: return true; ------------------ | Branch (1997:5): [True: 0, False: 0] ------------------ 1998| 0| case MCK_ConstantUImm10_0: return true; ------------------ | Branch (1998:5): [True: 0, False: 0] ------------------ 1999| 0| case MCK_UImm16: return true; ------------------ | Branch (1999:5): [True: 0, False: 0] ------------------ 2000| 0| case MCK_UImm16_Relaxed: return true; ------------------ | Branch (2000:5): [True: 0, False: 0] ------------------ 2001| 0| } 2002| | 2003| 0| case MCK_ConstantUImm5_33: ------------------ | Branch (2003:3): [True: 0, False: 5] ------------------ 2004| 0| switch (B) { 2005| 0| default: return false; ------------------ | Branch (2005:5): [True: 0, False: 0] ------------------ 2006| 0| case MCK_ConstantUImm6_0: return true; ------------------ | Branch (2006:5): [True: 0, False: 0] ------------------ 2007| 0| case MCK_ConstantUImm7_0: return true; ------------------ | Branch (2007:5): [True: 0, False: 0] ------------------ 2008| 0| case MCK_ConstantUImm8_0: return true; ------------------ | Branch (2008:5): [True: 0, False: 0] ------------------ 2009| 0| case MCK_ConstantUImm10_0: return true; ------------------ | Branch (2009:5): [True: 0, False: 0] ------------------ 2010| 0| case MCK_UImm16: return true; ------------------ | Branch (2010:5): [True: 0, False: 0] ------------------ 2011| 0| case MCK_UImm16_Relaxed: return true; ------------------ | Branch (2011:5): [True: 0, False: 0] ------------------ 2012| 0| } 2013| | 2014| 0| case MCK_ConstantUImm5_0_Report_UImm6: ------------------ | Branch (2014:3): [True: 0, False: 5] ------------------ 2015| 0| switch (B) { 2016| 0| default: return false; ------------------ | Branch (2016:5): [True: 0, False: 0] ------------------ 2017| 0| case MCK_ConstantUImm6_0: return true; ------------------ | Branch (2017:5): [True: 0, False: 0] ------------------ 2018| 0| case MCK_ConstantUImm7_0: return true; ------------------ | Branch (2018:5): [True: 0, False: 0] ------------------ 2019| 0| case MCK_ConstantUImm8_0: return true; ------------------ | Branch (2019:5): [True: 0, False: 0] ------------------ 2020| 0| case MCK_ConstantUImm10_0: return true; ------------------ | Branch (2020:5): [True: 0, False: 0] ------------------ 2021| 0| case MCK_UImm16: return true; ------------------ | Branch (2021:5): [True: 0, False: 0] ------------------ 2022| 0| case MCK_UImm16_Relaxed: return true; ------------------ | Branch (2022:5): [True: 0, False: 0] ------------------ 2023| 0| } 2024| | 2025| 0| case MCK_ConstantSImm6: ------------------ | Branch (2025:3): [True: 0, False: 5] ------------------ 2026| 0| switch (B) { 2027| 0| default: return false; ------------------ | Branch (2027:5): [True: 0, False: 0] ------------------ 2028| 0| case MCK_ConstantUImm7_0: return true; ------------------ | Branch (2028:5): [True: 0, False: 0] ------------------ 2029| 0| case MCK_ConstantUImm8_0: return true; ------------------ | Branch (2029:5): [True: 0, False: 0] ------------------ 2030| 0| case MCK_ConstantUImm10_0: return true; ------------------ | Branch (2030:5): [True: 0, False: 0] ------------------ 2031| 0| case MCK_UImm16: return true; ------------------ | Branch (2031:5): [True: 0, False: 0] ------------------ 2032| 0| case MCK_UImm16_Relaxed: return true; ------------------ | Branch (2032:5): [True: 0, False: 0] ------------------ 2033| 0| } 2034| | 2035| 0| case MCK_ConstantUImm6_0: ------------------ | Branch (2035:3): [True: 0, False: 5] ------------------ 2036| 0| switch (B) { 2037| 0| default: return false; ------------------ | Branch (2037:5): [True: 0, False: 0] ------------------ 2038| 0| case MCK_ConstantUImm7_0: return true; ------------------ | Branch (2038:5): [True: 0, False: 0] ------------------ 2039| 0| case MCK_ConstantUImm8_0: return true; ------------------ | Branch (2039:5): [True: 0, False: 0] ------------------ 2040| 0| case MCK_ConstantUImm10_0: return true; ------------------ | Branch (2040:5): [True: 0, False: 0] ------------------ 2041| 0| case MCK_UImm16: return true; ------------------ | Branch (2041:5): [True: 0, False: 0] ------------------ 2042| 0| case MCK_UImm16_Relaxed: return true; ------------------ | Branch (2042:5): [True: 0, False: 0] ------------------ 2043| 0| } 2044| | 2045| 0| case MCK_ConstantUImm7_0: ------------------ | Branch (2045:3): [True: 0, False: 5] ------------------ 2046| 0| switch (B) { 2047| 0| default: return false; ------------------ | Branch (2047:5): [True: 0, False: 0] ------------------ 2048| 0| case MCK_ConstantUImm8_0: return true; ------------------ | Branch (2048:5): [True: 0, False: 0] ------------------ 2049| 0| case MCK_ConstantUImm10_0: return true; ------------------ | Branch (2049:5): [True: 0, False: 0] ------------------ 2050| 0| case MCK_UImm16: return true; ------------------ | Branch (2050:5): [True: 0, False: 0] ------------------ 2051| 0| case MCK_UImm16_Relaxed: return true; ------------------ | Branch (2051:5): [True: 0, False: 0] ------------------ 2052| 0| } 2053| | 2054| 0| case MCK_ConstantUImm8_0: ------------------ | Branch (2054:3): [True: 0, False: 5] ------------------ 2055| 0| switch (B) { 2056| 0| default: return false; ------------------ | Branch (2056:5): [True: 0, False: 0] ------------------ 2057| 0| case MCK_ConstantUImm10_0: return true; ------------------ | Branch (2057:5): [True: 0, False: 0] ------------------ 2058| 0| case MCK_UImm16: return true; ------------------ | Branch (2058:5): [True: 0, False: 0] ------------------ 2059| 0| case MCK_UImm16_Relaxed: return true; ------------------ | Branch (2059:5): [True: 0, False: 0] ------------------ 2060| 0| } 2061| | 2062| 0| case MCK_ConstantUImm10_0: ------------------ | Branch (2062:3): [True: 0, False: 5] ------------------ 2063| 0| switch (B) { 2064| 0| default: return false; ------------------ | Branch (2064:5): [True: 0, False: 0] ------------------ 2065| 0| case MCK_UImm16: return true; ------------------ | Branch (2065:5): [True: 0, False: 0] ------------------ 2066| 0| case MCK_UImm16_Relaxed: return true; ------------------ | Branch (2066:5): [True: 0, False: 0] ------------------ 2067| 0| } 2068| | 2069| 0| case MCK_UImm16: ------------------ | Branch (2069:3): [True: 0, False: 5] ------------------ 2070| 0| return B == MCK_UImm16_Relaxed; 2071| 5| } 2072| 5|} MipsAsmParser.cpp:_ZN12_GLOBAL__N_113MipsAsmParser15convertToMCInstEjRN7llvm_ks6MCInstEjRKNS1_15SmallVectorImplINSt3__110unique_ptrINS1_18MCParsedAsmOperandENS5_14default_deleteIS7_EEEEEE: 1010| 4.26k| const OperandVector &Operands) { 1011| 4.26k| assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!"); ------------------ | Branch (1011:3): [True: 4.26k, False: 0] | Branch (1011:3): [True: 4.26k, Folded] | Branch (1011:3): [True: 4.26k, False: 0] ------------------ 1012| 4.26k| const uint8_t *Converter = ConversionTable[Kind]; 1013| 4.26k| Inst.setOpcode(Opcode); 1014| 16.6k| for (const uint8_t *p = Converter; *p; p+= 2) { ------------------ | Branch (1014:38): [True: 12.3k, False: 4.26k] ------------------ 1015| 12.3k| switch (*p) { 1016| 0| default: llvm_unreachable("invalid conversion entry!"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ | Branch (1016:5): [True: 0, False: 12.3k] ------------------ 1017| 0| case CVT_Reg: ------------------ | Branch (1017:5): [True: 0, False: 12.3k] ------------------ 1018| 0| static_cast(*Operands[*(p + 1)]).addRegOperands(Inst, 1); 1019| 0| break; 1020| 0| case CVT_Tied: ------------------ | Branch (1020:5): [True: 0, False: 12.3k] ------------------ 1021| 0| Inst.addOperand(Inst.getOperand(*(p + 1))); 1022| 0| break; 1023| 660| case CVT_95_addGPR32AsmRegOperands: ------------------ | Branch (1023:5): [True: 660, False: 11.7k] ------------------ 1024| 660| static_cast(*Operands[*(p + 1)]).addGPR32AsmRegOperands(Inst, 1); 1025| 660| break; 1026| 0| case CVT_95_addAFGR64AsmRegOperands: ------------------ | Branch (1026:5): [True: 0, False: 12.3k] ------------------ 1027| 0| static_cast(*Operands[*(p + 1)]).addAFGR64AsmRegOperands(Inst, 1); 1028| 0| break; 1029| 0| case CVT_95_addFGR64AsmRegOperands: ------------------ | Branch (1029:5): [True: 0, False: 12.3k] ------------------ 1030| 0| static_cast(*Operands[*(p + 1)]).addFGR64AsmRegOperands(Inst, 1); 1031| 0| break; 1032| 0| case CVT_95_addFGR32AsmRegOperands: ------------------ | Branch (1032:5): [True: 0, False: 12.3k] ------------------ 1033| 0| static_cast(*Operands[*(p + 1)]).addFGR32AsmRegOperands(Inst, 1); 1034| 0| break; 1035| 4.08k| case CVT_95_addImmOperands: ------------------ | Branch (1035:5): [True: 4.08k, False: 8.27k] ------------------ 1036| 4.08k| static_cast(*Operands[*(p + 1)]).addImmOperands(Inst, 1); 1037| 4.08k| break; 1038| 0| case CVT_95_addMSA128AsmRegOperands: ------------------ | Branch (1038:5): [True: 0, False: 12.3k] ------------------ 1039| 0| static_cast(*Operands[*(p + 1)]).addMSA128AsmRegOperands(Inst, 1); 1040| 0| break; 1041| 0| case CVT_95_Reg: ------------------ | Branch (1041:5): [True: 0, False: 12.3k] ------------------ 1042| 0| static_cast(*Operands[*(p + 1)]).addRegOperands(Inst, 1); 1043| 0| break; 1044| 0| case CVT_95_addGPRMM16AsmRegOperands: ------------------ | Branch (1044:5): [True: 0, False: 12.3k] ------------------ 1045| 0| static_cast(*Operands[*(p + 1)]).addGPRMM16AsmRegOperands(Inst, 1); 1046| 0| break; 1047| 0| case CVT_95_addConstantUImmOperands_LT_2_44__32_0_GT_: ------------------ | Branch (1047:5): [True: 0, False: 12.3k] ------------------ 1048| 0| static_cast(*Operands[*(p + 1)]).addConstantUImmOperands<2, 0>(Inst, 1); 1049| 0| break; 1050| 0| case CVT_95_addUImmOperands_LT_16_GT_: ------------------ | Branch (1050:5): [True: 0, False: 12.3k] ------------------ 1051| 0| static_cast(*Operands[*(p + 1)]).addUImmOperands<16>(Inst, 1); 1052| 0| break; 1053| 0| case CVT_95_addConstantUImmOperands_LT_5_44__32_0_GT_: ------------------ | Branch (1053:5): [True: 0, False: 12.3k] ------------------ 1054| 0| static_cast(*Operands[*(p + 1)]).addConstantUImmOperands<5, 0>(Inst, 1); 1055| 0| break; 1056| 7.43k| case CVT_regZERO: ------------------ | Branch (1056:5): [True: 7.43k, False: 4.92k] ------------------ 1057| 7.43k| Inst.addOperand(MCOperand::createReg(Mips::ZERO)); 1058| 7.43k| break; 1059| 0| case CVT_95_addGPR64AsmRegOperands: ------------------ | Branch (1059:5): [True: 0, False: 12.3k] ------------------ 1060| 0| static_cast(*Operands[*(p + 1)]).addGPR64AsmRegOperands(Inst, 1); 1061| 0| break; 1062| 0| case CVT_95_addConstantUImmOperands_LT_5_44__32_32_44__32__MINUS_32_GT_: ------------------ | Branch (1062:5): [True: 0, False: 12.3k] ------------------ 1063| 0| static_cast(*Operands[*(p + 1)]).addConstantUImmOperands<5, 32, -32>(Inst, 1); 1064| 0| break; 1065| 0| case CVT_regFCC0: ------------------ | Branch (1065:5): [True: 0, False: 12.3k] ------------------ 1066| 0| Inst.addOperand(MCOperand::createReg(Mips::FCC0)); 1067| 0| break; 1068| 0| case CVT_95_addFCCAsmRegOperands: ------------------ | Branch (1068:5): [True: 0, False: 12.3k] ------------------ 1069| 0| static_cast(*Operands[*(p + 1)]).addFCCAsmRegOperands(Inst, 1); 1070| 0| break; 1071| 32| case CVT_95_addCOP2AsmRegOperands: ------------------ | Branch (1071:5): [True: 32, False: 12.3k] ------------------ 1072| 32| static_cast(*Operands[*(p + 1)]).addCOP2AsmRegOperands(Inst, 1); 1073| 32| break; 1074| 0| case CVT_imm_95_0: ------------------ | Branch (1074:5): [True: 0, False: 12.3k] ------------------ 1075| 0| Inst.addOperand(MCOperand::createImm(0)); 1076| 0| break; 1077| 0| case CVT_95_addConstantUImmOperands_LT_10_44__32_0_GT_: ------------------ | Branch (1077:5): [True: 0, False: 12.3k] ------------------ 1078| 0| static_cast(*Operands[*(p + 1)]).addConstantUImmOperands<10, 0>(Inst, 1); 1079| 0| break; 1080| 0| case CVT_95_addConstantUImmOperands_LT_4_44__32_0_GT_: ------------------ | Branch (1080:5): [True: 0, False: 12.3k] ------------------ 1081| 0| static_cast(*Operands[*(p + 1)]).addConstantUImmOperands<4, 0>(Inst, 1); 1082| 0| break; 1083| 144| case CVT_95_addMemOperands: ------------------ | Branch (1083:5): [True: 144, False: 12.2k] ------------------ 1084| 144| static_cast(*Operands[*(p + 1)]).addMemOperands(Inst, 2); 1085| 144| break; 1086| 0| case CVT_95_addCCRAsmRegOperands: ------------------ | Branch (1086:5): [True: 0, False: 12.3k] ------------------ 1087| 0| static_cast(*Operands[*(p + 1)]).addCCRAsmRegOperands(Inst, 1); 1088| 0| break; 1089| 0| case CVT_95_addMSACtrlAsmRegOperands: ------------------ | Branch (1089:5): [True: 0, False: 12.3k] ------------------ 1090| 0| static_cast(*Operands[*(p + 1)]).addMSACtrlAsmRegOperands(Inst, 1); 1091| 0| break; 1092| 0| case CVT_95_addConstantUImmOperands_LT_3_44__32_0_GT_: ------------------ | Branch (1092:5): [True: 0, False: 12.3k] ------------------ 1093| 0| static_cast(*Operands[*(p + 1)]).addConstantUImmOperands<3, 0>(Inst, 1); 1094| 0| break; 1095| 0| case CVT_95_addConstantUImmOperands_LT_5_44__32_1_GT_: ------------------ | Branch (1095:5): [True: 0, False: 12.3k] ------------------ 1096| 0| static_cast(*Operands[*(p + 1)]).addConstantUImmOperands<5, 1>(Inst, 1); 1097| 0| break; 1098| 0| case CVT_95_addConstantUImmOperands_LT_5_44__32_33_GT_: ------------------ | Branch (1098:5): [True: 0, False: 12.3k] ------------------ 1099| 0| static_cast(*Operands[*(p + 1)]).addConstantUImmOperands<5, 33>(Inst, 1); 1100| 0| break; 1101| 0| case CVT_95_addConstantUImmOperands_LT_5_44__32_32_GT_: ------------------ | Branch (1101:5): [True: 0, False: 12.3k] ------------------ 1102| 0| static_cast(*Operands[*(p + 1)]).addConstantUImmOperands<5, 32>(Inst, 1); 1103| 0| break; 1104| 0| case CVT_95_addConstantUImmOperands_LT_6_44__32_0_GT_: ------------------ | Branch (1104:5): [True: 0, False: 12.3k] ------------------ 1105| 0| static_cast(*Operands[*(p + 1)]).addConstantUImmOperands<6, 0>(Inst, 1); 1106| 0| break; 1107| 0| case CVT_95_addConstantUImmOperands_LT_2_44__32_1_GT_: ------------------ | Branch (1107:5): [True: 0, False: 12.3k] ------------------ 1108| 0| static_cast(*Operands[*(p + 1)]).addConstantUImmOperands<2, 1>(Inst, 1); 1109| 0| break; 1110| 0| case CVT_95_addCOP0AsmRegOperands: ------------------ | Branch (1110:5): [True: 0, False: 12.3k] ------------------ 1111| 0| static_cast(*Operands[*(p + 1)]).addCOP0AsmRegOperands(Inst, 1); 1112| 0| break; 1113| 0| case CVT_regZERO_64: ------------------ | Branch (1113:5): [True: 0, False: 12.3k] ------------------ 1114| 0| Inst.addOperand(MCOperand::createReg(Mips::ZERO_64)); 1115| 0| break; 1116| 0| case CVT_95_addACC64DSPAsmRegOperands: ------------------ | Branch (1116:5): [True: 0, False: 12.3k] ------------------ 1117| 0| static_cast(*Operands[*(p + 1)]).addACC64DSPAsmRegOperands(Inst, 1); 1118| 0| break; 1119| 0| case CVT_95_addConstantUImmOperands_LT_1_GT_: ------------------ | Branch (1119:5): [True: 0, False: 12.3k] ------------------ 1120| 0| static_cast(*Operands[*(p + 1)]).addConstantUImmOperands<1>(Inst, 1); 1121| 0| break; 1122| 0| case CVT_95_addConstantUImmOperands_LT_1_44__32_0_GT_: ------------------ | Branch (1122:5): [True: 0, False: 12.3k] ------------------ 1123| 0| static_cast(*Operands[*(p + 1)]).addConstantUImmOperands<1, 0>(Inst, 1); 1124| 0| break; 1125| 0| case CVT_regRA: ------------------ | Branch (1125:5): [True: 0, False: 12.3k] ------------------ 1126| 0| Inst.addOperand(MCOperand::createReg(Mips::RA)); 1127| 0| break; 1128| 0| case CVT_95_addMicroMipsMemOperands: ------------------ | Branch (1128:5): [True: 0, False: 12.3k] ------------------ 1129| 0| static_cast(*Operands[*(p + 1)]).addMicroMipsMemOperands(Inst, 2); 1130| 0| break; 1131| 0| case CVT_95_addCOP3AsmRegOperands: ------------------ | Branch (1131:5): [True: 0, False: 12.3k] ------------------ 1132| 0| static_cast(*Operands[*(p + 1)]).addCOP3AsmRegOperands(Inst, 1); 1133| 0| break; 1134| 0| case CVT_95_addRegListOperands: ------------------ | Branch (1134:5): [True: 0, False: 12.3k] ------------------ 1135| 0| static_cast(*Operands[*(p + 1)]).addRegListOperands(Inst, 1); 1136| 0| break; 1137| 0| case CVT_95_addRegPairOperands: ------------------ | Branch (1137:5): [True: 0, False: 12.3k] ------------------ 1138| 0| static_cast(*Operands[*(p + 1)]).addRegPairOperands(Inst, 2); 1139| 0| break; 1140| 0| case CVT_95_addMovePRegPairOperands: ------------------ | Branch (1140:5): [True: 0, False: 12.3k] ------------------ 1141| 0| static_cast(*Operands[*(p + 1)]).addMovePRegPairOperands(Inst, 2); 1142| 0| break; 1143| 0| case CVT_95_addGPRMM16AsmRegMovePOperands: ------------------ | Branch (1143:5): [True: 0, False: 12.3k] ------------------ 1144| 0| static_cast(*Operands[*(p + 1)]).addGPRMM16AsmRegMovePOperands(Inst, 1); 1145| 0| break; 1146| 0| case CVT_95_addHI32DSPAsmRegOperands: ------------------ | Branch (1146:5): [True: 0, False: 12.3k] ------------------ 1147| 0| static_cast(*Operands[*(p + 1)]).addHI32DSPAsmRegOperands(Inst, 1); 1148| 0| break; 1149| 0| case CVT_95_addLO32DSPAsmRegOperands: ------------------ | Branch (1149:5): [True: 0, False: 12.3k] ------------------ 1150| 0| static_cast(*Operands[*(p + 1)]).addLO32DSPAsmRegOperands(Inst, 1); 1151| 0| break; 1152| 0| case CVT_95_addConstantUImmOperands_LT_7_44__32_0_GT_: ------------------ | Branch (1152:5): [True: 0, False: 12.3k] ------------------ 1153| 0| static_cast(*Operands[*(p + 1)]).addConstantUImmOperands<7, 0>(Inst, 1); 1154| 0| break; 1155| 0| case CVT_95_addHWRegsAsmRegOperands: ------------------ | Branch (1155:5): [True: 0, False: 12.3k] ------------------ 1156| 0| static_cast(*Operands[*(p + 1)]).addHWRegsAsmRegOperands(Inst, 1); 1157| 0| break; 1158| 0| case CVT_95_addConstantUImmOperands_LT_8_44__32_0_GT_: ------------------ | Branch (1158:5): [True: 0, False: 12.3k] ------------------ 1159| 0| static_cast(*Operands[*(p + 1)]).addConstantUImmOperands<8, 0>(Inst, 1); 1160| 0| break; 1161| 0| case CVT_95_addGPRMM16AsmRegZeroOperands: ------------------ | Branch (1161:5): [True: 0, False: 12.3k] ------------------ 1162| 0| static_cast(*Operands[*(p + 1)]).addGPRMM16AsmRegZeroOperands(Inst, 1); 1163| 0| break; 1164| 0| case CVT_imm_95_2: ------------------ | Branch (1164:5): [True: 0, False: 12.3k] ------------------ 1165| 0| Inst.addOperand(MCOperand::createImm(2)); 1166| 0| break; 1167| 0| case CVT_imm_95_6: ------------------ | Branch (1167:5): [True: 0, False: 12.3k] ------------------ 1168| 0| Inst.addOperand(MCOperand::createImm(6)); 1169| 0| break; 1170| 0| case CVT_imm_95_4: ------------------ | Branch (1170:5): [True: 0, False: 12.3k] ------------------ 1171| 0| Inst.addOperand(MCOperand::createImm(4)); 1172| 0| break; 1173| 0| case CVT_imm_95_5: ------------------ | Branch (1173:5): [True: 0, False: 12.3k] ------------------ 1174| 0| Inst.addOperand(MCOperand::createImm(5)); 1175| 0| break; 1176| 0| case CVT_imm_95_31: ------------------ | Branch (1176:5): [True: 0, False: 12.3k] ------------------ 1177| 0| Inst.addOperand(MCOperand::createImm(31)); 1178| 0| break; 1179| 12.3k| } 1180| 12.3k| } 1181| 4.26k|} MipsMCTargetDesc.cpp:_ZN7llvm_ksL19InitMipsMCInstrInfoEPNS_11MCInstrInfoE: 5018| 749|static inline void InitMipsMCInstrInfo(MCInstrInfo *II) { 5019| 749| II->InitMCInstrInfo(MipsInsts, NULL, NULL, 2230); 5020| 749|} _ZNK7llvm_ks17MipsMCCodeEmitter21getBinaryCodeForInstrERKNS_6MCInstERNS_15SmallVectorImplINS_7MCFixupEEERKNS_15MCSubtargetInfoE: 11| 8.24k| const MCSubtargetInfo &STI) const { 12| 8.24k| static const uint64_t InstBits[] = { 13| 8.24k| UINT64_C(0), 14| 8.24k| UINT64_C(0), 15| 8.24k| UINT64_C(0), 16| 8.24k| UINT64_C(0), 17| 8.24k| UINT64_C(0), 18| 8.24k| UINT64_C(0), 19| 8.24k| UINT64_C(0), 20| 8.24k| UINT64_C(0), 21| 8.24k| UINT64_C(0), 22| 8.24k| UINT64_C(0), 23| 8.24k| UINT64_C(0), 24| 8.24k| UINT64_C(0), 25| 8.24k| UINT64_C(0), 26| 8.24k| UINT64_C(0), 27| 8.24k| UINT64_C(0), 28| 8.24k| UINT64_C(0), 29| 8.24k| UINT64_C(0), 30| 8.24k| UINT64_C(0), 31| 8.24k| UINT64_C(0), 32| 8.24k| UINT64_C(0), 33| 8.24k| UINT64_C(0), 34| 8.24k| UINT64_C(0), 35| 8.24k| UINT64_C(0), 36| 8.24k| UINT64_C(0), 37| 8.24k| UINT64_C(0), 38| 8.24k| UINT64_C(2080375378), // ABSQ_S_PH 39| 8.24k| UINT64_C(4412), // ABSQ_S_PH_MM 40| 8.24k| UINT64_C(2080374866), // ABSQ_S_QB 41| 8.24k| UINT64_C(316), // ABSQ_S_QB_MMR2 42| 8.24k| UINT64_C(2080375890), // ABSQ_S_W 43| 8.24k| UINT64_C(8508), // ABSQ_S_W_MM 44| 8.24k| UINT64_C(1409295227), // ABS_D_MMR6 45| 8.24k| UINT64_C(1409287035), // ABS_S_MMR6 46| 8.24k| UINT64_C(32), // ADD 47| 8.24k| UINT64_C(3959422976), // ADDIUPC 48| 8.24k| UINT64_C(2013265920), // ADDIUPC_MM 49| 8.24k| UINT64_C(2013265920), // ADDIUPC_MMR6 50| 8.24k| UINT64_C(27649), // ADDIUR1SP_MM 51| 8.24k| UINT64_C(27648), // ADDIUR2_MM 52| 8.24k| UINT64_C(19456), // ADDIUS5_MM 53| 8.24k| UINT64_C(19457), // ADDIUSP_MM 54| 8.24k| UINT64_C(805306368), // ADDIU_MMR6 55| 8.24k| UINT64_C(2080375320), // ADDQH_PH 56| 8.24k| UINT64_C(77), // ADDQH_PH_MMR2 57| 8.24k| UINT64_C(2080375448), // ADDQH_R_PH 58| 8.24k| UINT64_C(1101), // ADDQH_R_PH_MMR2 59| 8.24k| UINT64_C(2080375960), // ADDQH_R_W 60| 8.24k| UINT64_C(1165), // ADDQH_R_W_MMR2 61| 8.24k| UINT64_C(2080375832), // ADDQH_W 62| 8.24k| UINT64_C(141), // ADDQH_W_MMR2 63| 8.24k| UINT64_C(2080375440), // ADDQ_PH 64| 8.24k| UINT64_C(13), // ADDQ_PH_MM 65| 8.24k| UINT64_C(2080375696), // ADDQ_S_PH 66| 8.24k| UINT64_C(1037), // ADDQ_S_PH_MM 67| 8.24k| UINT64_C(2080376208), // ADDQ_S_W 68| 8.24k| UINT64_C(773), // ADDQ_S_W_MM 69| 8.24k| UINT64_C(2080375824), // ADDSC 70| 8.24k| UINT64_C(901), // ADDSC_MM 71| 8.24k| UINT64_C(2021654544), // ADDS_A_B 72| 8.24k| UINT64_C(2027946000), // ADDS_A_D 73| 8.24k| UINT64_C(2023751696), // ADDS_A_H 74| 8.24k| UINT64_C(2025848848), // ADDS_A_W 75| 8.24k| UINT64_C(2030043152), // ADDS_S_B 76| 8.24k| UINT64_C(2036334608), // ADDS_S_D 77| 8.24k| UINT64_C(2032140304), // ADDS_S_H 78| 8.24k| UINT64_C(2034237456), // ADDS_S_W 79| 8.24k| UINT64_C(2038431760), // ADDS_U_B 80| 8.24k| UINT64_C(2044723216), // ADDS_U_D 81| 8.24k| UINT64_C(2040528912), // ADDS_U_H 82| 8.24k| UINT64_C(2042626064), // ADDS_U_W 83| 8.24k| UINT64_C(1024), // ADDU16_MM 84| 8.24k| UINT64_C(1024), // ADDU16_MMR6 85| 8.24k| UINT64_C(2080374808), // ADDUH_QB 86| 8.24k| UINT64_C(333), // ADDUH_QB_MMR2 87| 8.24k| UINT64_C(2080374936), // ADDUH_R_QB 88| 8.24k| UINT64_C(1357), // ADDUH_R_QB_MMR2 89| 8.24k| UINT64_C(336), // ADDU_MMR6 90| 8.24k| UINT64_C(2080375312), // ADDU_PH 91| 8.24k| UINT64_C(269), // ADDU_PH_MMR2 92| 8.24k| UINT64_C(2080374800), // ADDU_QB 93| 8.24k| UINT64_C(205), // ADDU_QB_MM 94| 8.24k| UINT64_C(2080375568), // ADDU_S_PH 95| 8.24k| UINT64_C(1293), // ADDU_S_PH_MMR2 96| 8.24k| UINT64_C(2080375056), // ADDU_S_QB 97| 8.24k| UINT64_C(1229), // ADDU_S_QB_MM 98| 8.24k| UINT64_C(2013265926), // ADDVI_B 99| 8.24k| UINT64_C(2019557382), // ADDVI_D 100| 8.24k| UINT64_C(2015363078), // ADDVI_H 101| 8.24k| UINT64_C(2017460230), // ADDVI_W 102| 8.24k| UINT64_C(2013265934), // ADDV_B 103| 8.24k| UINT64_C(2019557390), // ADDV_D 104| 8.24k| UINT64_C(2015363086), // ADDV_H 105| 8.24k| UINT64_C(2017460238), // ADDV_W 106| 8.24k| UINT64_C(2080375888), // ADDWC 107| 8.24k| UINT64_C(965), // ADDWC_MM 108| 8.24k| UINT64_C(2013265936), // ADD_A_B 109| 8.24k| UINT64_C(2019557392), // ADD_A_D 110| 8.24k| UINT64_C(2015363088), // ADD_A_H 111| 8.24k| UINT64_C(2017460240), // ADD_A_W 112| 8.24k| UINT64_C(272), // ADD_MM 113| 8.24k| UINT64_C(272), // ADD_MMR6 114| 8.24k| UINT64_C(536870912), // ADDi 115| 8.24k| UINT64_C(268435456), // ADDi_MM 116| 8.24k| UINT64_C(603979776), // ADDiu 117| 8.24k| UINT64_C(805306368), // ADDiu_MM 118| 8.24k| UINT64_C(33), // ADDu 119| 8.24k| UINT64_C(336), // ADDu_MM 120| 8.24k| UINT64_C(0), 121| 8.24k| UINT64_C(0), 122| 8.24k| UINT64_C(2080375328), // ALIGN 123| 8.24k| UINT64_C(31), // ALIGN_MMR6 124| 8.24k| UINT64_C(3961454592), // ALUIPC 125| 8.24k| UINT64_C(2015297536), // ALUIPC_MMR6 126| 8.24k| UINT64_C(36), // AND 127| 8.24k| UINT64_C(17536), // AND16_MM 128| 8.24k| UINT64_C(17409), // AND16_MMR6 129| 8.24k| UINT64_C(36), // AND64 130| 8.24k| UINT64_C(11264), // ANDI16_MM 131| 8.24k| UINT64_C(11264), // ANDI16_MMR6 132| 8.24k| UINT64_C(2013265920), // ANDI_B 133| 8.24k| UINT64_C(3489660928), // ANDI_MMR6 134| 8.24k| UINT64_C(592), // AND_MM 135| 8.24k| UINT64_C(592), // AND_MMR6 136| 8.24k| UINT64_C(2013265950), // AND_V 137| 8.24k| UINT64_C(0), 138| 8.24k| UINT64_C(0), 139| 8.24k| UINT64_C(0), 140| 8.24k| UINT64_C(805306368), // ANDi 141| 8.24k| UINT64_C(805306368), // ANDi64 142| 8.24k| UINT64_C(3489660928), // ANDi_MM 143| 8.24k| UINT64_C(2080374833), // APPEND 144| 8.24k| UINT64_C(2046820369), // ASUB_S_B 145| 8.24k| UINT64_C(2053111825), // ASUB_S_D 146| 8.24k| UINT64_C(2048917521), // ASUB_S_H 147| 8.24k| UINT64_C(2051014673), // ASUB_S_W 148| 8.24k| UINT64_C(2055208977), // ASUB_U_B 149| 8.24k| UINT64_C(2061500433), // ASUB_U_D 150| 8.24k| UINT64_C(2057306129), // ASUB_U_H 151| 8.24k| UINT64_C(2059403281), // ASUB_U_W 152| 8.24k| UINT64_C(0), 153| 8.24k| UINT64_C(0), 154| 8.24k| UINT64_C(0), 155| 8.24k| UINT64_C(0), 156| 8.24k| UINT64_C(0), 157| 8.24k| UINT64_C(0), 158| 8.24k| UINT64_C(0), 159| 8.24k| UINT64_C(0), 160| 8.24k| UINT64_C(0), 161| 8.24k| UINT64_C(0), 162| 8.24k| UINT64_C(0), 163| 8.24k| UINT64_C(0), 164| 8.24k| UINT64_C(0), 165| 8.24k| UINT64_C(0), 166| 8.24k| UINT64_C(0), 167| 8.24k| UINT64_C(0), 168| 8.24k| UINT64_C(0), 169| 8.24k| UINT64_C(0), 170| 8.24k| UINT64_C(0), 171| 8.24k| UINT64_C(0), 172| 8.24k| UINT64_C(0), 173| 8.24k| UINT64_C(0), 174| 8.24k| UINT64_C(0), 175| 8.24k| UINT64_C(0), 176| 8.24k| UINT64_C(0), 177| 8.24k| UINT64_C(0), 178| 8.24k| UINT64_C(0), 179| 8.24k| UINT64_C(0), 180| 8.24k| UINT64_C(0), 181| 8.24k| UINT64_C(0), 182| 8.24k| UINT64_C(0), 183| 8.24k| UINT64_C(0), 184| 8.24k| UINT64_C(1006632960), // AUI 185| 8.24k| UINT64_C(3961389056), // AUIPC 186| 8.24k| UINT64_C(2015232000), // AUIPC_MMR6 187| 8.24k| UINT64_C(268435456), // AUI_MMR6 188| 8.24k| UINT64_C(2063597584), // AVER_S_B 189| 8.24k| UINT64_C(2069889040), // AVER_S_D 190| 8.24k| UINT64_C(2065694736), // AVER_S_H 191| 8.24k| UINT64_C(2067791888), // AVER_S_W 192| 8.24k| UINT64_C(2071986192), // AVER_U_B 193| 8.24k| UINT64_C(2078277648), // AVER_U_D 194| 8.24k| UINT64_C(2074083344), // AVER_U_H 195| 8.24k| UINT64_C(2076180496), // AVER_U_W 196| 8.24k| UINT64_C(2046820368), // AVE_S_B 197| 8.24k| UINT64_C(2053111824), // AVE_S_D 198| 8.24k| UINT64_C(2048917520), // AVE_S_H 199| 8.24k| UINT64_C(2051014672), // AVE_S_W 200| 8.24k| UINT64_C(2055208976), // AVE_U_B 201| 8.24k| UINT64_C(2061500432), // AVE_U_D 202| 8.24k| UINT64_C(2057306128), // AVE_U_H 203| 8.24k| UINT64_C(2059403280), // AVE_U_W 204| 8.24k| UINT64_C(4026550272), // AddiuRxImmX16 205| 8.24k| UINT64_C(4026533888), // AddiuRxPcImmX16 206| 8.24k| UINT64_C(18432), // AddiuRxRxImm16 207| 8.24k| UINT64_C(4026550272), // AddiuRxRxImmX16 208| 8.24k| UINT64_C(4026548224), // AddiuRxRyOffMemX16 209| 8.24k| UINT64_C(25344), // AddiuSpImm16 210| 8.24k| UINT64_C(4026544896), // AddiuSpImmX16 211| 8.24k| UINT64_C(57345), // AdduRxRyRz16 212| 8.24k| UINT64_C(59404), // AndRxRxRy16 213| 8.24k| UINT64_C(0), 214| 8.24k| UINT64_C(52224), // B16_MM 215| 8.24k| UINT64_C(1879048232), // BADDu 216| 8.24k| UINT64_C(68222976), // BAL 217| 8.24k| UINT64_C(3892314112), // BALC 218| 8.24k| UINT64_C(3019898880), // BALC_MMR6 219| 8.24k| UINT64_C(2080375857), // BALIGN 220| 8.24k| UINT64_C(0), 221| 8.24k| UINT64_C(3355443200), // BBIT0 222| 8.24k| UINT64_C(3623878656), // BBIT032 223| 8.24k| UINT64_C(3892314112), // BBIT1 224| 8.24k| UINT64_C(4160749568), // BBIT132 225| 8.24k| UINT64_C(3355443200), // BC 226| 8.24k| UINT64_C(52224), // BC16_MMR6 227| 8.24k| UINT64_C(1159725056), // BC1EQZ 228| 8.24k| UINT64_C(1157627904), // BC1F 229| 8.24k| UINT64_C(1157758976), // BC1FL 230| 8.24k| UINT64_C(1132462080), // BC1F_MM 231| 8.24k| UINT64_C(1168113664), // BC1NEZ 232| 8.24k| UINT64_C(1157693440), // BC1T 233| 8.24k| UINT64_C(1157824512), // BC1TL 234| 8.24k| UINT64_C(1134559232), // BC1T_MM 235| 8.24k| UINT64_C(1226833920), // BC2EQZ 236| 8.24k| UINT64_C(1235222528), // BC2NEZ 237| 8.24k| UINT64_C(2045771785), // BCLRI_B 238| 8.24k| UINT64_C(2038431753), // BCLRI_D 239| 8.24k| UINT64_C(2044723209), // BCLRI_H 240| 8.24k| UINT64_C(2042626057), // BCLRI_W 241| 8.24k| UINT64_C(2038431757), // BCLR_B 242| 8.24k| UINT64_C(2044723213), // BCLR_D 243| 8.24k| UINT64_C(2040528909), // BCLR_H 244| 8.24k| UINT64_C(2042626061), // BCLR_W 245| 8.24k| UINT64_C(2483027968), // BC_MMR6 246| 8.24k| UINT64_C(268435456), // BEQ 247| 8.24k| UINT64_C(268435456), // BEQ64 248| 8.24k| UINT64_C(536870912), // BEQC 249| 8.24k| UINT64_C(1342177280), // BEQL 250| 8.24k| UINT64_C(35840), // BEQZ16_MM 251| 8.24k| UINT64_C(536870912), // BEQZALC 252| 8.24k| UINT64_C(1946157056), // BEQZALC_MMR6 253| 8.24k| UINT64_C(3623878656), // BEQZC 254| 8.24k| UINT64_C(35840), // BEQZC16_MMR6 255| 8.24k| UINT64_C(1088421888), // BEQZC_MM 256| 8.24k| UINT64_C(2483027968), // BEQ_MM 257| 8.24k| UINT64_C(0), 258| 8.24k| UINT64_C(1476395008), // BGEC 259| 8.24k| UINT64_C(0), 260| 8.24k| UINT64_C(0), 261| 8.24k| UINT64_C(0), 262| 8.24k| UINT64_C(0), 263| 8.24k| UINT64_C(402653184), // BGEUC 264| 8.24k| UINT64_C(0), 265| 8.24k| UINT64_C(0), 266| 8.24k| UINT64_C(0), 267| 8.24k| UINT64_C(67174400), // BGEZ 268| 8.24k| UINT64_C(67174400), // BGEZ64 269| 8.24k| UINT64_C(68222976), // BGEZAL 270| 8.24k| UINT64_C(402653184), // BGEZALC 271| 8.24k| UINT64_C(3221225472), // BGEZALC_MMR6 272| 8.24k| UINT64_C(68354048), // BGEZALL 273| 8.24k| UINT64_C(1113587712), // BGEZALS_MM 274| 8.24k| UINT64_C(1080033280), // BGEZAL_MM 275| 8.24k| UINT64_C(1476395008), // BGEZC 276| 8.24k| UINT64_C(67305472), // BGEZL 277| 8.24k| UINT64_C(1077936128), // BGEZ_MM 278| 8.24k| UINT64_C(0), 279| 8.24k| UINT64_C(0), 280| 8.24k| UINT64_C(0), 281| 8.24k| UINT64_C(0), 282| 8.24k| UINT64_C(0), 283| 8.24k| UINT64_C(0), 284| 8.24k| UINT64_C(0), 285| 8.24k| UINT64_C(0), 286| 8.24k| UINT64_C(469762048), // BGTZ 287| 8.24k| UINT64_C(469762048), // BGTZ64 288| 8.24k| UINT64_C(469762048), // BGTZALC 289| 8.24k| UINT64_C(3758096384), // BGTZALC_MMR6 290| 8.24k| UINT64_C(1543503872), // BGTZC 291| 8.24k| UINT64_C(1543503872), // BGTZL 292| 8.24k| UINT64_C(1086324736), // BGTZ_MM 293| 8.24k| UINT64_C(2070937609), // BINSLI_B 294| 8.24k| UINT64_C(2063597577), // BINSLI_D 295| 8.24k| UINT64_C(2069889033), // BINSLI_H 296| 8.24k| UINT64_C(2067791881), // BINSLI_W 297| 8.24k| UINT64_C(2063597581), // BINSL_B 298| 8.24k| UINT64_C(2069889037), // BINSL_D 299| 8.24k| UINT64_C(2065694733), // BINSL_H 300| 8.24k| UINT64_C(2067791885), // BINSL_W 301| 8.24k| UINT64_C(2079326217), // BINSRI_B 302| 8.24k| UINT64_C(2071986185), // BINSRI_D 303| 8.24k| UINT64_C(2078277641), // BINSRI_H 304| 8.24k| UINT64_C(2076180489), // BINSRI_W 305| 8.24k| UINT64_C(2071986189), // BINSR_B 306| 8.24k| UINT64_C(2078277645), // BINSR_D 307| 8.24k| UINT64_C(2074083341), // BINSR_H 308| 8.24k| UINT64_C(2076180493), // BINSR_W 309| 8.24k| UINT64_C(2080376530), // BITREV 310| 8.24k| UINT64_C(2080374816), // BITSWAP 311| 8.24k| UINT64_C(2876), // BITSWAP_MMR6 312| 8.24k| UINT64_C(0), 313| 8.24k| UINT64_C(0), 314| 8.24k| UINT64_C(0), 315| 8.24k| UINT64_C(0), 316| 8.24k| UINT64_C(0), 317| 8.24k| UINT64_C(0), 318| 8.24k| UINT64_C(0), 319| 8.24k| UINT64_C(0), 320| 8.24k| UINT64_C(402653184), // BLEZ 321| 8.24k| UINT64_C(402653184), // BLEZ64 322| 8.24k| UINT64_C(402653184), // BLEZALC 323| 8.24k| UINT64_C(3221225472), // BLEZALC_MMR6 324| 8.24k| UINT64_C(1476395008), // BLEZC 325| 8.24k| UINT64_C(1476395008), // BLEZL 326| 8.24k| UINT64_C(1082130432), // BLEZ_MM 327| 8.24k| UINT64_C(0), 328| 8.24k| UINT64_C(1543503872), // BLTC 329| 8.24k| UINT64_C(0), 330| 8.24k| UINT64_C(0), 331| 8.24k| UINT64_C(0), 332| 8.24k| UINT64_C(0), 333| 8.24k| UINT64_C(469762048), // BLTUC 334| 8.24k| UINT64_C(0), 335| 8.24k| UINT64_C(0), 336| 8.24k| UINT64_C(0), 337| 8.24k| UINT64_C(67108864), // BLTZ 338| 8.24k| UINT64_C(67108864), // BLTZ64 339| 8.24k| UINT64_C(68157440), // BLTZAL 340| 8.24k| UINT64_C(469762048), // BLTZALC 341| 8.24k| UINT64_C(3758096384), // BLTZALC_MMR6 342| 8.24k| UINT64_C(68288512), // BLTZALL 343| 8.24k| UINT64_C(1109393408), // BLTZALS_MM 344| 8.24k| UINT64_C(1075838976), // BLTZAL_MM 345| 8.24k| UINT64_C(1543503872), // BLTZC 346| 8.24k| UINT64_C(67239936), // BLTZL 347| 8.24k| UINT64_C(1073741824), // BLTZ_MM 348| 8.24k| UINT64_C(2013265921), // BMNZI_B 349| 8.24k| UINT64_C(2021654558), // BMNZ_V 350| 8.24k| UINT64_C(2030043137), // BMZI_B 351| 8.24k| UINT64_C(2023751710), // BMZ_V 352| 8.24k| UINT64_C(335544320), // BNE 353| 8.24k| UINT64_C(335544320), // BNE64 354| 8.24k| UINT64_C(1610612736), // BNEC 355| 8.24k| UINT64_C(2062549001), // BNEGI_B 356| 8.24k| UINT64_C(2055208969), // BNEGI_D 357| 8.24k| UINT64_C(2061500425), // BNEGI_H 358| 8.24k| UINT64_C(2059403273), // BNEGI_W 359| 8.24k| UINT64_C(2055208973), // BNEG_B 360| 8.24k| UINT64_C(2061500429), // BNEG_D 361| 8.24k| UINT64_C(2057306125), // BNEG_H 362| 8.24k| UINT64_C(2059403277), // BNEG_W 363| 8.24k| UINT64_C(1409286144), // BNEL 364| 8.24k| UINT64_C(44032), // BNEZ16_MM 365| 8.24k| UINT64_C(1610612736), // BNEZALC 366| 8.24k| UINT64_C(2080374784), // BNEZALC_MMR6 367| 8.24k| UINT64_C(4160749568), // BNEZC 368| 8.24k| UINT64_C(44032), // BNEZC16_MMR6 369| 8.24k| UINT64_C(1084227584), // BNEZC_MM 370| 8.24k| UINT64_C(3019898880), // BNE_MM 371| 8.24k| UINT64_C(1610612736), // BNVC 372| 8.24k| UINT64_C(1199570944), // BNZ_B 373| 8.24k| UINT64_C(1205862400), // BNZ_D 374| 8.24k| UINT64_C(1201668096), // BNZ_H 375| 8.24k| UINT64_C(1172307968), // BNZ_V 376| 8.24k| UINT64_C(1203765248), // BNZ_W 377| 8.24k| UINT64_C(536870912), // BOVC 378| 8.24k| UINT64_C(68943872), // BPOSGE32 379| 8.24k| UINT64_C(0), 380| 8.24k| UINT64_C(13), // BREAK 381| 8.24k| UINT64_C(18048), // BREAK16_MM 382| 8.24k| UINT64_C(17435), // BREAK16_MMR6 383| 8.24k| UINT64_C(7), // BREAK_MM 384| 8.24k| UINT64_C(7), // BREAK_MMR6 385| 8.24k| UINT64_C(2046820353), // BSELI_B 386| 8.24k| UINT64_C(0), 387| 8.24k| UINT64_C(0), 388| 8.24k| UINT64_C(0), 389| 8.24k| UINT64_C(0), 390| 8.24k| UINT64_C(2025848862), // BSEL_V 391| 8.24k| UINT64_C(0), 392| 8.24k| UINT64_C(2054160393), // BSETI_B 393| 8.24k| UINT64_C(2046820361), // BSETI_D 394| 8.24k| UINT64_C(2053111817), // BSETI_H 395| 8.24k| UINT64_C(2051014665), // BSETI_W 396| 8.24k| UINT64_C(2046820365), // BSET_B 397| 8.24k| UINT64_C(2053111821), // BSET_D 398| 8.24k| UINT64_C(2048917517), // BSET_H 399| 8.24k| UINT64_C(2051014669), // BSET_W 400| 8.24k| UINT64_C(1191182336), // BZ_B 401| 8.24k| UINT64_C(1197473792), // BZ_D 402| 8.24k| UINT64_C(1193279488), // BZ_H 403| 8.24k| UINT64_C(1163919360), // BZ_V 404| 8.24k| UINT64_C(1195376640), // BZ_W 405| 8.24k| UINT64_C(0), 406| 8.24k| UINT64_C(0), 407| 8.24k| UINT64_C(0), 408| 8.24k| UINT64_C(8192), // BeqzRxImm16 409| 8.24k| UINT64_C(4026540032), // BeqzRxImmX16 410| 8.24k| UINT64_C(4096), // Bimm16 411| 8.24k| UINT64_C(4026535936), // BimmX16 412| 8.24k| UINT64_C(0), 413| 8.24k| UINT64_C(10240), // BnezRxImm16 414| 8.24k| UINT64_C(4026542080), // BnezRxImmX16 415| 8.24k| UINT64_C(59397), // Break16 416| 8.24k| UINT64_C(24576), // Bteqz16 417| 8.24k| UINT64_C(0), 418| 8.24k| UINT64_C(0), 419| 8.24k| UINT64_C(0), 420| 8.24k| UINT64_C(0), 421| 8.24k| UINT64_C(0), 422| 8.24k| UINT64_C(0), 423| 8.24k| UINT64_C(4026544128), // BteqzX16 424| 8.24k| UINT64_C(24832), // Btnez16 425| 8.24k| UINT64_C(0), 426| 8.24k| UINT64_C(0), 427| 8.24k| UINT64_C(0), 428| 8.24k| UINT64_C(0), 429| 8.24k| UINT64_C(0), 430| 8.24k| UINT64_C(0), 431| 8.24k| UINT64_C(4026544384), // BtnezX16 432| 8.24k| UINT64_C(0), 433| 8.24k| UINT64_C(0), 434| 8.24k| UINT64_C(3154116608), // CACHE 435| 8.24k| UINT64_C(2080374811), // CACHEE 436| 8.24k| UINT64_C(1610655232), // CACHEE_MM 437| 8.24k| UINT64_C(1610655232), // CACHEE_MMR6 438| 8.24k| UINT64_C(536895488), // CACHE_MM 439| 8.24k| UINT64_C(536895488), // CACHE_MMR6 440| 8.24k| UINT64_C(2080374821), // CACHE_R6 441| 8.24k| UINT64_C(1176502282), // CEIL_L_D64 442| 8.24k| UINT64_C(1409307451), // CEIL_L_D_MMR6 443| 8.24k| UINT64_C(1174405130), // CEIL_L_S 444| 8.24k| UINT64_C(1409291067), // CEIL_L_S_MMR6 445| 8.24k| UINT64_C(1176502286), // CEIL_W_D32 446| 8.24k| UINT64_C(1176502286), // CEIL_W_D64 447| 8.24k| UINT64_C(1409309499), // CEIL_W_D_MMR6 448| 8.24k| UINT64_C(1409309499), // CEIL_W_MM 449| 8.24k| UINT64_C(1174405134), // CEIL_W_S 450| 8.24k| UINT64_C(1409293115), // CEIL_W_S_MM 451| 8.24k| UINT64_C(1409293115), // CEIL_W_S_MMR6 452| 8.24k| UINT64_C(2013265927), // CEQI_B 453| 8.24k| UINT64_C(2019557383), // CEQI_D 454| 8.24k| UINT64_C(2015363079), // CEQI_H 455| 8.24k| UINT64_C(2017460231), // CEQI_W 456| 8.24k| UINT64_C(2013265935), // CEQ_B 457| 8.24k| UINT64_C(2019557391), // CEQ_D 458| 8.24k| UINT64_C(2015363087), // CEQ_H 459| 8.24k| UINT64_C(2017460239), // CEQ_W 460| 8.24k| UINT64_C(1145044992), // CFC1 461| 8.24k| UINT64_C(1409290299), // CFC1_MM 462| 8.24k| UINT64_C(2021523481), // CFCMSA 463| 8.24k| UINT64_C(1879048242), // CINS 464| 8.24k| UINT64_C(1879048243), // CINS32 465| 8.24k| UINT64_C(1176502299), // CLASS_D 466| 8.24k| UINT64_C(1409286752), // CLASS_D_MMR6 467| 8.24k| UINT64_C(1174405147), // CLASS_S 468| 8.24k| UINT64_C(1409286240), // CLASS_S_MMR6 469| 8.24k| UINT64_C(2046820359), // CLEI_S_B 470| 8.24k| UINT64_C(2053111815), // CLEI_S_D 471| 8.24k| UINT64_C(2048917511), // CLEI_S_H 472| 8.24k| UINT64_C(2051014663), // CLEI_S_W 473| 8.24k| UINT64_C(2055208967), // CLEI_U_B 474| 8.24k| UINT64_C(2061500423), // CLEI_U_D 475| 8.24k| UINT64_C(2057306119), // CLEI_U_H 476| 8.24k| UINT64_C(2059403271), // CLEI_U_W 477| 8.24k| UINT64_C(2046820367), // CLE_S_B 478| 8.24k| UINT64_C(2053111823), // CLE_S_D 479| 8.24k| UINT64_C(2048917519), // CLE_S_H 480| 8.24k| UINT64_C(2051014671), // CLE_S_W 481| 8.24k| UINT64_C(2055208975), // CLE_U_B 482| 8.24k| UINT64_C(2061500431), // CLE_U_D 483| 8.24k| UINT64_C(2057306127), // CLE_U_H 484| 8.24k| UINT64_C(2059403279), // CLE_U_W 485| 8.24k| UINT64_C(1879048225), // CLO 486| 8.24k| UINT64_C(19260), // CLO_MM 487| 8.24k| UINT64_C(19260), // CLO_MMR6 488| 8.24k| UINT64_C(81), // CLO_R6 489| 8.24k| UINT64_C(2030043143), // CLTI_S_B 490| 8.24k| UINT64_C(2036334599), // CLTI_S_D 491| 8.24k| UINT64_C(2032140295), // CLTI_S_H 492| 8.24k| UINT64_C(2034237447), // CLTI_S_W 493| 8.24k| UINT64_C(2038431751), // CLTI_U_B 494| 8.24k| UINT64_C(2044723207), // CLTI_U_D 495| 8.24k| UINT64_C(2040528903), // CLTI_U_H 496| 8.24k| UINT64_C(2042626055), // CLTI_U_W 497| 8.24k| UINT64_C(2030043151), // CLT_S_B 498| 8.24k| UINT64_C(2036334607), // CLT_S_D 499| 8.24k| UINT64_C(2032140303), // CLT_S_H 500| 8.24k| UINT64_C(2034237455), // CLT_S_W 501| 8.24k| UINT64_C(2038431759), // CLT_U_B 502| 8.24k| UINT64_C(2044723215), // CLT_U_D 503| 8.24k| UINT64_C(2040528911), // CLT_U_H 504| 8.24k| UINT64_C(2042626063), // CLT_U_W 505| 8.24k| UINT64_C(1879048224), // CLZ 506| 8.24k| UINT64_C(23356), // CLZ_MM 507| 8.24k| UINT64_C(80), // CLZ_MMR6 508| 8.24k| UINT64_C(80), // CLZ_R6 509| 8.24k| UINT64_C(2080376337), // CMPGDU_EQ_QB 510| 8.24k| UINT64_C(2080376465), // CMPGDU_LE_QB 511| 8.24k| UINT64_C(2080376401), // CMPGDU_LT_QB 512| 8.24k| UINT64_C(2080375057), // CMPGU_EQ_QB 513| 8.24k| UINT64_C(2080375185), // CMPGU_LE_QB 514| 8.24k| UINT64_C(2080375121), // CMPGU_LT_QB 515| 8.24k| UINT64_C(2080374801), // CMPU_EQ_QB 516| 8.24k| UINT64_C(2080374929), // CMPU_LE_QB 517| 8.24k| UINT64_C(2080374865), // CMPU_LT_QB 518| 8.24k| UINT64_C(1409286165), // CMP_AF_D_MMR6 519| 8.24k| UINT64_C(1409286149), // CMP_AF_S_MMR6 520| 8.24k| UINT64_C(1184890882), // CMP_EQ_D 521| 8.24k| UINT64_C(1409286293), // CMP_EQ_D_MMR6 522| 8.24k| UINT64_C(2080375313), // CMP_EQ_PH 523| 8.24k| UINT64_C(1182793730), // CMP_EQ_S 524| 8.24k| UINT64_C(1409286277), // CMP_EQ_S_MMR6 525| 8.24k| UINT64_C(1184890880), // CMP_F_D 526| 8.24k| UINT64_C(1182793728), // CMP_F_S 527| 8.24k| UINT64_C(1184890886), // CMP_LE_D 528| 8.24k| UINT64_C(1409286549), // CMP_LE_D_MMR6 529| 8.24k| UINT64_C(2080375441), // CMP_LE_PH 530| 8.24k| UINT64_C(1182793734), // CMP_LE_S 531| 8.24k| UINT64_C(1409286533), // CMP_LE_S_MMR6 532| 8.24k| UINT64_C(1184890884), // CMP_LT_D 533| 8.24k| UINT64_C(1409286421), // CMP_LT_D_MMR6 534| 8.24k| UINT64_C(2080375377), // CMP_LT_PH 535| 8.24k| UINT64_C(1182793732), // CMP_LT_S 536| 8.24k| UINT64_C(1409286405), // CMP_LT_S_MMR6 537| 8.24k| UINT64_C(1184890888), // CMP_SAF_D 538| 8.24k| UINT64_C(1409286677), // CMP_SAF_D_MMR6 539| 8.24k| UINT64_C(1182793736), // CMP_SAF_S 540| 8.24k| UINT64_C(1409286661), // CMP_SAF_S_MMR6 541| 8.24k| UINT64_C(1184890890), // CMP_SEQ_D 542| 8.24k| UINT64_C(1409286805), // CMP_SEQ_D_MMR6 543| 8.24k| UINT64_C(1182793738), // CMP_SEQ_S 544| 8.24k| UINT64_C(1409286789), // CMP_SEQ_S_MMR6 545| 8.24k| UINT64_C(1184890894), // CMP_SLE_D 546| 8.24k| UINT64_C(1409287061), // CMP_SLE_D_MMR6 547| 8.24k| UINT64_C(1182793742), // CMP_SLE_S 548| 8.24k| UINT64_C(1409287045), // CMP_SLE_S_MMR6 549| 8.24k| UINT64_C(1184890892), // CMP_SLT_D 550| 8.24k| UINT64_C(1409286933), // CMP_SLT_D_MMR6 551| 8.24k| UINT64_C(1182793740), // CMP_SLT_S 552| 8.24k| UINT64_C(1409286917), // CMP_SLT_S_MMR6 553| 8.24k| UINT64_C(1184890891), // CMP_SUEQ_D 554| 8.24k| UINT64_C(1409286869), // CMP_SUEQ_D_MMR6 555| 8.24k| UINT64_C(1182793739), // CMP_SUEQ_S 556| 8.24k| UINT64_C(1409286853), // CMP_SUEQ_S_MMR6 557| 8.24k| UINT64_C(1184890895), // CMP_SULE_D 558| 8.24k| UINT64_C(1409287125), // CMP_SULE_D_MMR6 559| 8.24k| UINT64_C(1182793743), // CMP_SULE_S 560| 8.24k| UINT64_C(1409287109), // CMP_SULE_S_MMR6 561| 8.24k| UINT64_C(1184890893), // CMP_SULT_D 562| 8.24k| UINT64_C(1409286997), // CMP_SULT_D_MMR6 563| 8.24k| UINT64_C(1182793741), // CMP_SULT_S 564| 8.24k| UINT64_C(1409286981), // CMP_SULT_S_MMR6 565| 8.24k| UINT64_C(1184890889), // CMP_SUN_D 566| 8.24k| UINT64_C(1409286741), // CMP_SUN_D_MMR6 567| 8.24k| UINT64_C(1182793737), // CMP_SUN_S 568| 8.24k| UINT64_C(1409286725), // CMP_SUN_S_MMR6 569| 8.24k| UINT64_C(1184890883), // CMP_UEQ_D 570| 8.24k| UINT64_C(1409286357), // CMP_UEQ_D_MMR6 571| 8.24k| UINT64_C(1182793731), // CMP_UEQ_S 572| 8.24k| UINT64_C(1409286341), // CMP_UEQ_S_MMR6 573| 8.24k| UINT64_C(1184890887), // CMP_ULE_D 574| 8.24k| UINT64_C(1409286613), // CMP_ULE_D_MMR6 575| 8.24k| UINT64_C(1182793735), // CMP_ULE_S 576| 8.24k| UINT64_C(1409286597), // CMP_ULE_S_MMR6 577| 8.24k| UINT64_C(1184890885), // CMP_ULT_D 578| 8.24k| UINT64_C(1409286485), // CMP_ULT_D_MMR6 579| 8.24k| UINT64_C(1182793733), // CMP_ULT_S 580| 8.24k| UINT64_C(1409286469), // CMP_ULT_S_MMR6 581| 8.24k| UINT64_C(1184890881), // CMP_UN_D 582| 8.24k| UINT64_C(1409286229), // CMP_UN_D_MMR6 583| 8.24k| UINT64_C(1182793729), // CMP_UN_S 584| 8.24k| UINT64_C(1409286213), // CMP_UN_S_MMR6 585| 8.24k| UINT64_C(0), 586| 8.24k| UINT64_C(0), 587| 8.24k| UINT64_C(0), 588| 8.24k| UINT64_C(2021654553), // COPY_S_B 589| 8.24k| UINT64_C(2025324569), // COPY_S_D 590| 8.24k| UINT64_C(2023751705), // COPY_S_H 591| 8.24k| UINT64_C(2024800281), // COPY_S_W 592| 8.24k| UINT64_C(2025848857), // COPY_U_B 593| 8.24k| UINT64_C(2027946009), // COPY_U_H 594| 8.24k| UINT64_C(2028994585), // COPY_U_W 595| 8.24k| UINT64_C(1153433600), // CTC1 596| 8.24k| UINT64_C(1409292347), // CTC1_MM 597| 8.24k| UINT64_C(2017329177), // CTCMSA 598| 8.24k| UINT64_C(1174405153), // CVT_D32_S 599| 8.24k| UINT64_C(1182793761), // CVT_D32_W 600| 8.24k| UINT64_C(1409299323), // CVT_D32_W_MM 601| 8.24k| UINT64_C(1184890913), // CVT_D64_L 602| 8.24k| UINT64_C(1174405153), // CVT_D64_S 603| 8.24k| UINT64_C(1182793761), // CVT_D64_W 604| 8.24k| UINT64_C(1409307515), // CVT_D_L_MMR6 605| 8.24k| UINT64_C(1409291131), // CVT_D_S_MM 606| 8.24k| UINT64_C(1409291131), // CVT_D_S_MMR6 607| 8.24k| UINT64_C(1409299323), // CVT_D_W_MMR6 608| 8.24k| UINT64_C(1176502309), // CVT_L_D64 609| 8.24k| UINT64_C(1409302843), // CVT_L_D64_MM 610| 8.24k| UINT64_C(1409302843), // CVT_L_D_MMR6 611| 8.24k| UINT64_C(1174405157), // CVT_L_S 612| 8.24k| UINT64_C(1409286459), // CVT_L_S_MM 613| 8.24k| UINT64_C(1409286459), // CVT_L_S_MMR6 614| 8.24k| UINT64_C(1176502304), // CVT_S_D32 615| 8.24k| UINT64_C(1409293179), // CVT_S_D32_MM 616| 8.24k| UINT64_C(1176502304), // CVT_S_D64 617| 8.24k| UINT64_C(1409293179), // CVT_S_D_MMR6 618| 8.24k| UINT64_C(1184890912), // CVT_S_L 619| 8.24k| UINT64_C(1409309563), // CVT_S_L_MMR6 620| 8.24k| UINT64_C(1182793760), // CVT_S_W 621| 8.24k| UINT64_C(1409301371), // CVT_S_W_MM 622| 8.24k| UINT64_C(1409301371), // CVT_S_W_MMR6 623| 8.24k| UINT64_C(1176502308), // CVT_W_D32 624| 8.24k| UINT64_C(1176502308), // CVT_W_D64 625| 8.24k| UINT64_C(1409304891), // CVT_W_D_MMR6 626| 8.24k| UINT64_C(1409304891), // CVT_W_MM 627| 8.24k| UINT64_C(1174405156), // CVT_W_S 628| 8.24k| UINT64_C(1409288507), // CVT_W_S_MM 629| 8.24k| UINT64_C(1409288507), // CVT_W_S_MMR6 630| 8.24k| UINT64_C(1176502322), // C_EQ_D32 631| 8.24k| UINT64_C(1176502322), // C_EQ_D64 632| 8.24k| UINT64_C(1174405170), // C_EQ_S 633| 8.24k| UINT64_C(1176502320), // C_F_D32 634| 8.24k| UINT64_C(1176502320), // C_F_D64 635| 8.24k| UINT64_C(1174405168), // C_F_S 636| 8.24k| UINT64_C(1176502334), // C_LE_D32 637| 8.24k| UINT64_C(1176502334), // C_LE_D64 638| 8.24k| UINT64_C(1174405182), // C_LE_S 639| 8.24k| UINT64_C(1176502332), // C_LT_D32 640| 8.24k| UINT64_C(1176502332), // C_LT_D64 641| 8.24k| UINT64_C(1174405180), // C_LT_S 642| 8.24k| UINT64_C(1176502333), // C_NGE_D32 643| 8.24k| UINT64_C(1176502333), // C_NGE_D64 644| 8.24k| UINT64_C(1174405181), // C_NGE_S 645| 8.24k| UINT64_C(1176502329), // C_NGLE_D32 646| 8.24k| UINT64_C(1176502329), // C_NGLE_D64 647| 8.24k| UINT64_C(1174405177), // C_NGLE_S 648| 8.24k| UINT64_C(1176502331), // C_NGL_D32 649| 8.24k| UINT64_C(1176502331), // C_NGL_D64 650| 8.24k| UINT64_C(1174405179), // C_NGL_S 651| 8.24k| UINT64_C(1176502335), // C_NGT_D32 652| 8.24k| UINT64_C(1176502335), // C_NGT_D64 653| 8.24k| UINT64_C(1174405183), // C_NGT_S 654| 8.24k| UINT64_C(1176502326), // C_OLE_D32 655| 8.24k| UINT64_C(1176502326), // C_OLE_D64 656| 8.24k| UINT64_C(1174405174), // C_OLE_S 657| 8.24k| UINT64_C(1176502324), // C_OLT_D32 658| 8.24k| UINT64_C(1176502324), // C_OLT_D64 659| 8.24k| UINT64_C(1174405172), // C_OLT_S 660| 8.24k| UINT64_C(1176502330), // C_SEQ_D32 661| 8.24k| UINT64_C(1176502330), // C_SEQ_D64 662| 8.24k| UINT64_C(1174405178), // C_SEQ_S 663| 8.24k| UINT64_C(1176502328), // C_SF_D32 664| 8.24k| UINT64_C(1176502328), // C_SF_D64 665| 8.24k| UINT64_C(1174405176), // C_SF_S 666| 8.24k| UINT64_C(1176502323), // C_UEQ_D32 667| 8.24k| UINT64_C(1176502323), // C_UEQ_D64 668| 8.24k| UINT64_C(1174405171), // C_UEQ_S 669| 8.24k| UINT64_C(1176502327), // C_ULE_D32 670| 8.24k| UINT64_C(1176502327), // C_ULE_D64 671| 8.24k| UINT64_C(1174405175), // C_ULE_S 672| 8.24k| UINT64_C(1176502325), // C_ULT_D32 673| 8.24k| UINT64_C(1176502325), // C_ULT_D64 674| 8.24k| UINT64_C(1174405173), // C_ULT_S 675| 8.24k| UINT64_C(1176502321), // C_UN_D32 676| 8.24k| UINT64_C(1176502321), // C_UN_D64 677| 8.24k| UINT64_C(1174405169), // C_UN_S 678| 8.24k| UINT64_C(59402), // CmpRxRy16 679| 8.24k| UINT64_C(28672), // CmpiRxImm16 680| 8.24k| UINT64_C(4026560512), // CmpiRxImmX16 681| 8.24k| UINT64_C(0), 682| 8.24k| UINT64_C(44), // DADD 683| 8.24k| UINT64_C(1610612736), // DADDi 684| 8.24k| UINT64_C(1677721600), // DADDiu 685| 8.24k| UINT64_C(45), // DADDu 686| 8.24k| UINT64_C(67502080), // DAHI 687| 8.24k| UINT64_C(1109393408), // DAHI_MM64R6 688| 8.24k| UINT64_C(2080375332), // DALIGN 689| 8.24k| UINT64_C(1476395036), // DALIGN_MM64R6 690| 8.24k| UINT64_C(69074944), // DATI 691| 8.24k| UINT64_C(1107296256), // DATI_MM64R6 692| 8.24k| UINT64_C(1946157056), // DAUI 693| 8.24k| UINT64_C(4026531840), // DAUI_MM64R6 694| 8.24k| UINT64_C(2080374820), // DBITSWAP 695| 8.24k| UINT64_C(1879048229), // DCLO 696| 8.24k| UINT64_C(83), // DCLO_R6 697| 8.24k| UINT64_C(1879048228), // DCLZ 698| 8.24k| UINT64_C(82), // DCLZ_R6 699| 8.24k| UINT64_C(158), // DDIV 700| 8.24k| UINT64_C(159), // DDIVU 701| 8.24k| UINT64_C(1476395416), // DDIVU_MM64R6 702| 8.24k| UINT64_C(1476395288), // DDIV_MM64R6 703| 8.24k| UINT64_C(1107296287), // DERET 704| 8.24k| UINT64_C(58236), // DERET_MM 705| 8.24k| UINT64_C(58236), // DERET_MMR6 706| 8.24k| UINT64_C(2080374787), // DEXT 707| 8.24k| UINT64_C(2080374785), // DEXTM 708| 8.24k| UINT64_C(1476395044), // DEXTM_MM64R6 709| 8.24k| UINT64_C(2080374786), // DEXTU 710| 8.24k| UINT64_C(1476395028), // DEXTU_MM64R6 711| 8.24k| UINT64_C(1476395052), // DEXT_MM64R6 712| 8.24k| UINT64_C(1096835072), // DI 713| 8.24k| UINT64_C(2080374791), // DINS 714| 8.24k| UINT64_C(2080374789), // DINSM 715| 8.24k| UINT64_C(2080374790), // DINSU 716| 8.24k| UINT64_C(154), // DIV 717| 8.24k| UINT64_C(155), // DIVU 718| 8.24k| UINT64_C(408), // DIVU_MMR6 719| 8.24k| UINT64_C(280), // DIV_MMR6 720| 8.24k| UINT64_C(2046820370), // DIV_S_B 721| 8.24k| UINT64_C(2053111826), // DIV_S_D 722| 8.24k| UINT64_C(2048917522), // DIV_S_H 723| 8.24k| UINT64_C(2051014674), // DIV_S_W 724| 8.24k| UINT64_C(2055208978), // DIV_U_B 725| 8.24k| UINT64_C(2061500434), // DIV_U_D 726| 8.24k| UINT64_C(2057306130), // DIV_U_H 727| 8.24k| UINT64_C(2059403282), // DIV_U_W 728| 8.24k| UINT64_C(18300), // DI_MM 729| 8.24k| UINT64_C(18300), // DI_MMR6 730| 8.24k| UINT64_C(21), // DLSA 731| 8.24k| UINT64_C(21), // DLSA_R6 732| 8.24k| UINT64_C(1075838976), // DMFC0 733| 8.24k| UINT64_C(1142947840), // DMFC1 734| 8.24k| UINT64_C(1210056704), // DMFC2 735| 8.24k| UINT64_C(1210056704), // DMFC2_OCTEON 736| 8.24k| UINT64_C(222), // DMOD 737| 8.24k| UINT64_C(223), // DMODU 738| 8.24k| UINT64_C(1476395480), // DMODU_MM64R6 739| 8.24k| UINT64_C(1476395352), // DMOD_MM64R6 740| 8.24k| UINT64_C(1084227584), // DMTC0 741| 8.24k| UINT64_C(1151336448), // DMTC1 742| 8.24k| UINT64_C(1218445312), // DMTC2 743| 8.24k| UINT64_C(1218445312), // DMTC2_OCTEON 744| 8.24k| UINT64_C(220), // DMUH 745| 8.24k| UINT64_C(221), // DMUHU 746| 8.24k| UINT64_C(1879048195), // DMUL 747| 8.24k| UINT64_C(28), // DMULT 748| 8.24k| UINT64_C(29), // DMULTu 749| 8.24k| UINT64_C(157), // DMULU 750| 8.24k| UINT64_C(156), // DMUL_R6 751| 8.24k| UINT64_C(2019557395), // DOTP_S_D 752| 8.24k| UINT64_C(2015363091), // DOTP_S_H 753| 8.24k| UINT64_C(2017460243), // DOTP_S_W 754| 8.24k| UINT64_C(2027946003), // DOTP_U_D 755| 8.24k| UINT64_C(2023751699), // DOTP_U_H 756| 8.24k| UINT64_C(2025848851), // DOTP_U_W 757| 8.24k| UINT64_C(2036334611), // DPADD_S_D 758| 8.24k| UINT64_C(2032140307), // DPADD_S_H 759| 8.24k| UINT64_C(2034237459), // DPADD_S_W 760| 8.24k| UINT64_C(2044723219), // DPADD_U_D 761| 8.24k| UINT64_C(2040528915), // DPADD_U_H 762| 8.24k| UINT64_C(2042626067), // DPADD_U_W 763| 8.24k| UINT64_C(2080376496), // DPAQX_SA_W_PH 764| 8.24k| UINT64_C(12988), // DPAQX_SA_W_PH_MMR2 765| 8.24k| UINT64_C(2080376368), // DPAQX_S_W_PH 766| 8.24k| UINT64_C(8892), // DPAQX_S_W_PH_MMR2 767| 8.24k| UINT64_C(2080375600), // DPAQ_SA_L_W 768| 8.24k| UINT64_C(4796), // DPAQ_SA_L_W_MM 769| 8.24k| UINT64_C(2080375088), // DPAQ_S_W_PH 770| 8.24k| UINT64_C(700), // DPAQ_S_W_PH_MM 771| 8.24k| UINT64_C(2080375024), // DPAU_H_QBL 772| 8.24k| UINT64_C(8380), // DPAU_H_QBL_MM 773| 8.24k| UINT64_C(2080375280), // DPAU_H_QBR 774| 8.24k| UINT64_C(12476), // DPAU_H_QBR_MM 775| 8.24k| UINT64_C(2080375344), // DPAX_W_PH 776| 8.24k| UINT64_C(4284), // DPAX_W_PH_MMR2 777| 8.24k| UINT64_C(2080374832), // DPA_W_PH 778| 8.24k| UINT64_C(188), // DPA_W_PH_MMR2 779| 8.24k| UINT64_C(1879048237), // DPOP 780| 8.24k| UINT64_C(2080376560), // DPSQX_SA_W_PH 781| 8.24k| UINT64_C(14012), // DPSQX_SA_W_PH_MMR2 782| 8.24k| UINT64_C(2080376432), // DPSQX_S_W_PH 783| 8.24k| UINT64_C(9916), // DPSQX_S_W_PH_MMR2 784| 8.24k| UINT64_C(2080375664), // DPSQ_SA_L_W 785| 8.24k| UINT64_C(5820), // DPSQ_SA_L_W_MM 786| 8.24k| UINT64_C(2080375152), // DPSQ_S_W_PH 787| 8.24k| UINT64_C(1724), // DPSQ_S_W_PH_MM 788| 8.24k| UINT64_C(2053111827), // DPSUB_S_D 789| 8.24k| UINT64_C(2048917523), // DPSUB_S_H 790| 8.24k| UINT64_C(2051014675), // DPSUB_S_W 791| 8.24k| UINT64_C(2061500435), // DPSUB_U_D 792| 8.24k| UINT64_C(2057306131), // DPSUB_U_H 793| 8.24k| UINT64_C(2059403283), // DPSUB_U_W 794| 8.24k| UINT64_C(2080375536), // DPSU_H_QBL 795| 8.24k| UINT64_C(9404), // DPSU_H_QBL_MM 796| 8.24k| UINT64_C(2080375792), // DPSU_H_QBR 797| 8.24k| UINT64_C(13500), // DPSU_H_QBR_MM 798| 8.24k| UINT64_C(2080375408), // DPSX_W_PH 799| 8.24k| UINT64_C(5308), // DPSX_W_PH_MMR2 800| 8.24k| UINT64_C(2080374896), // DPS_W_PH 801| 8.24k| UINT64_C(1212), // DPS_W_PH_MMR2 802| 8.24k| UINT64_C(0), 803| 8.24k| UINT64_C(0), 804| 8.24k| UINT64_C(0), 805| 8.24k| UINT64_C(0), 806| 8.24k| UINT64_C(2097210), // DROTR 807| 8.24k| UINT64_C(2097214), // DROTR32 808| 8.24k| UINT64_C(86), // DROTRV 809| 8.24k| UINT64_C(2080374948), // DSBH 810| 8.24k| UINT64_C(30), // DSDIV 811| 8.24k| UINT64_C(0), 812| 8.24k| UINT64_C(2080375140), // DSHD 813| 8.24k| UINT64_C(56), // DSLL 814| 8.24k| UINT64_C(60), // DSLL32 815| 8.24k| UINT64_C(60), // DSLL64_32 816| 8.24k| UINT64_C(20), // DSLLV 817| 8.24k| UINT64_C(59), // DSRA 818| 8.24k| UINT64_C(63), // DSRA32 819| 8.24k| UINT64_C(23), // DSRAV 820| 8.24k| UINT64_C(58), // DSRL 821| 8.24k| UINT64_C(62), // DSRL32 822| 8.24k| UINT64_C(22), // DSRLV 823| 8.24k| UINT64_C(46), // DSUB 824| 8.24k| UINT64_C(47), // DSUBu 825| 8.24k| UINT64_C(31), // DUDIV 826| 8.24k| UINT64_C(0), 827| 8.24k| UINT64_C(59418), // DivRxRy16 828| 8.24k| UINT64_C(59419), // DivuRxRy16 829| 8.24k| UINT64_C(192), // EHB 830| 8.24k| UINT64_C(6144), // EHB_MM 831| 8.24k| UINT64_C(6144), // EHB_MMR6 832| 8.24k| UINT64_C(1096835104), // EI 833| 8.24k| UINT64_C(22396), // EI_MM 834| 8.24k| UINT64_C(22396), // EI_MMR6 835| 8.24k| UINT64_C(1107296280), // ERET 836| 8.24k| UINT64_C(1107296344), // ERETNC 837| 8.24k| UINT64_C(127868), // ERETNC_MMR6 838| 8.24k| UINT64_C(62332), // ERET_MM 839| 8.24k| UINT64_C(62332), // ERET_MMR6 840| 8.24k| UINT64_C(0), 841| 8.24k| UINT64_C(2080374784), // EXT 842| 8.24k| UINT64_C(2080374968), // EXTP 843| 8.24k| UINT64_C(2080375480), // EXTPDP 844| 8.24k| UINT64_C(2080375544), // EXTPDPV 845| 8.24k| UINT64_C(14524), // EXTPDPV_MM 846| 8.24k| UINT64_C(13948), // EXTPDP_MM 847| 8.24k| UINT64_C(2080375032), // EXTPV 848| 8.24k| UINT64_C(10428), // EXTPV_MM 849| 8.24k| UINT64_C(9852), // EXTP_MM 850| 8.24k| UINT64_C(2080375288), // EXTRV_RS_W 851| 8.24k| UINT64_C(11964), // EXTRV_RS_W_MM 852| 8.24k| UINT64_C(2080375160), // EXTRV_R_W 853| 8.24k| UINT64_C(7868), // EXTRV_R_W_MM 854| 8.24k| UINT64_C(2080375800), // EXTRV_S_H 855| 8.24k| UINT64_C(16060), // EXTRV_S_H_MM 856| 8.24k| UINT64_C(2080374904), // EXTRV_W 857| 8.24k| UINT64_C(3772), // EXTRV_W_MM 858| 8.24k| UINT64_C(2080375224), // EXTR_RS_W 859| 8.24k| UINT64_C(11900), // EXTR_RS_W_MM 860| 8.24k| UINT64_C(2080375096), // EXTR_R_W 861| 8.24k| UINT64_C(7804), // EXTR_R_W_MM 862| 8.24k| UINT64_C(2080375736), // EXTR_S_H 863| 8.24k| UINT64_C(15996), // EXTR_S_H_MM 864| 8.24k| UINT64_C(2080374840), // EXTR_W 865| 8.24k| UINT64_C(3708), // EXTR_W_MM 866| 8.24k| UINT64_C(1879048250), // EXTS 867| 8.24k| UINT64_C(1879048251), // EXTS32 868| 8.24k| UINT64_C(44), // EXT_MM 869| 8.24k| UINT64_C(0), 870| 8.24k| UINT64_C(0), 871| 8.24k| UINT64_C(0), 872| 8.24k| UINT64_C(1176502277), // FABS_D32 873| 8.24k| UINT64_C(1176502277), // FABS_D64 874| 8.24k| UINT64_C(1409295227), // FABS_MM 875| 8.24k| UINT64_C(1174405125), // FABS_S 876| 8.24k| UINT64_C(1409287035), // FABS_S_MM 877| 8.24k| UINT64_C(0), 878| 8.24k| UINT64_C(2015363099), // FADD_D 879| 8.24k| UINT64_C(1176502272), // FADD_D32 880| 8.24k| UINT64_C(1176502272), // FADD_D64 881| 8.24k| UINT64_C(1409286448), // FADD_D_MMR6 882| 8.24k| UINT64_C(1409286448), // FADD_MM 883| 8.24k| UINT64_C(1174405120), // FADD_S 884| 8.24k| UINT64_C(1409286192), // FADD_S_MM 885| 8.24k| UINT64_C(1409286192), // FADD_S_MMR6 886| 8.24k| UINT64_C(2013265947), // FADD_W 887| 8.24k| UINT64_C(2015363098), // FCAF_D 888| 8.24k| UINT64_C(2013265946), // FCAF_W 889| 8.24k| UINT64_C(2023751706), // FCEQ_D 890| 8.24k| UINT64_C(2021654554), // FCEQ_W 891| 8.24k| UINT64_C(2065760286), // FCLASS_D 892| 8.24k| UINT64_C(2065694750), // FCLASS_W 893| 8.24k| UINT64_C(2040528922), // FCLE_D 894| 8.24k| UINT64_C(2038431770), // FCLE_W 895| 8.24k| UINT64_C(2032140314), // FCLT_D 896| 8.24k| UINT64_C(2030043162), // FCLT_W 897| 8.24k| UINT64_C(1176502320), // FCMP_D32 898| 8.24k| UINT64_C(1409287228), // FCMP_D32_MM 899| 8.24k| UINT64_C(1176502320), // FCMP_D64 900| 8.24k| UINT64_C(1174405168), // FCMP_S32 901| 8.24k| UINT64_C(1409286204), // FCMP_S32_MM 902| 8.24k| UINT64_C(2027946012), // FCNE_D 903| 8.24k| UINT64_C(2025848860), // FCNE_W 904| 8.24k| UINT64_C(2019557404), // FCOR_D 905| 8.24k| UINT64_C(2017460252), // FCOR_W 906| 8.24k| UINT64_C(2027946010), // FCUEQ_D 907| 8.24k| UINT64_C(2025848858), // FCUEQ_W 908| 8.24k| UINT64_C(2044723226), // FCULE_D 909| 8.24k| UINT64_C(2042626074), // FCULE_W 910| 8.24k| UINT64_C(2036334618), // FCULT_D 911| 8.24k| UINT64_C(2034237466), // FCULT_W 912| 8.24k| UINT64_C(2023751708), // FCUNE_D 913| 8.24k| UINT64_C(2021654556), // FCUNE_W 914| 8.24k| UINT64_C(2019557402), // FCUN_D 915| 8.24k| UINT64_C(2017460250), // FCUN_W 916| 8.24k| UINT64_C(2027946011), // FDIV_D 917| 8.24k| UINT64_C(1176502275), // FDIV_D32 918| 8.24k| UINT64_C(1176502275), // FDIV_D64 919| 8.24k| UINT64_C(1409286640), // FDIV_D_MMR6 920| 8.24k| UINT64_C(1409286640), // FDIV_MM 921| 8.24k| UINT64_C(1174405123), // FDIV_S 922| 8.24k| UINT64_C(1409286384), // FDIV_S_MM 923| 8.24k| UINT64_C(1409286384), // FDIV_S_MMR6 924| 8.24k| UINT64_C(2025848859), // FDIV_W 925| 8.24k| UINT64_C(2046820379), // FEXDO_H 926| 8.24k| UINT64_C(2048917531), // FEXDO_W 927| 8.24k| UINT64_C(2044723227), // FEXP2_D 928| 8.24k| UINT64_C(0), 929| 8.24k| UINT64_C(2042626075), // FEXP2_W 930| 8.24k| UINT64_C(0), 931| 8.24k| UINT64_C(2066808862), // FEXUPL_D 932| 8.24k| UINT64_C(2066743326), // FEXUPL_W 933| 8.24k| UINT64_C(2066939934), // FEXUPR_D 934| 8.24k| UINT64_C(2066874398), // FEXUPR_W 935| 8.24k| UINT64_C(2067595294), // FFINT_S_D 936| 8.24k| UINT64_C(2067529758), // FFINT_S_W 937| 8.24k| UINT64_C(2067726366), // FFINT_U_D 938| 8.24k| UINT64_C(2067660830), // FFINT_U_W 939| 8.24k| UINT64_C(2067071006), // FFQL_D 940| 8.24k| UINT64_C(2067005470), // FFQL_W 941| 8.24k| UINT64_C(2067202078), // FFQR_D 942| 8.24k| UINT64_C(2067136542), // FFQR_W 943| 8.24k| UINT64_C(2063597598), // FILL_B 944| 8.24k| UINT64_C(2063794206), // FILL_D 945| 8.24k| UINT64_C(0), 946| 8.24k| UINT64_C(0), 947| 8.24k| UINT64_C(2063663134), // FILL_H 948| 8.24k| UINT64_C(2063728670), // FILL_W 949| 8.24k| UINT64_C(2066677790), // FLOG2_D 950| 8.24k| UINT64_C(2066612254), // FLOG2_W 951| 8.24k| UINT64_C(1176502283), // FLOOR_L_D64 952| 8.24k| UINT64_C(1409303355), // FLOOR_L_D_MMR6 953| 8.24k| UINT64_C(1174405131), // FLOOR_L_S 954| 8.24k| UINT64_C(1409286971), // FLOOR_L_S_MMR6 955| 8.24k| UINT64_C(1176502287), // FLOOR_W_D32 956| 8.24k| UINT64_C(1176502287), // FLOOR_W_D64 957| 8.24k| UINT64_C(1409305403), // FLOOR_W_D_MMR6 958| 8.24k| UINT64_C(1409305403), // FLOOR_W_MM 959| 8.24k| UINT64_C(1174405135), // FLOOR_W_S 960| 8.24k| UINT64_C(1409289019), // FLOOR_W_S_MM 961| 8.24k| UINT64_C(1409289019), // FLOOR_W_S_MMR6 962| 8.24k| UINT64_C(2032140315), // FMADD_D 963| 8.24k| UINT64_C(2030043163), // FMADD_W 964| 8.24k| UINT64_C(2078277659), // FMAX_A_D 965| 8.24k| UINT64_C(2076180507), // FMAX_A_W 966| 8.24k| UINT64_C(2074083355), // FMAX_D 967| 8.24k| UINT64_C(2071986203), // FMAX_W 968| 8.24k| UINT64_C(2069889051), // FMIN_A_D 969| 8.24k| UINT64_C(2067791899), // FMIN_A_W 970| 8.24k| UINT64_C(2065694747), // FMIN_D 971| 8.24k| UINT64_C(2063597595), // FMIN_W 972| 8.24k| UINT64_C(1176502278), // FMOV_D32 973| 8.24k| UINT64_C(1409294459), // FMOV_D32_MM 974| 8.24k| UINT64_C(1176502278), // FMOV_D64 975| 8.24k| UINT64_C(1409294459), // FMOV_D_MMR6 976| 8.24k| UINT64_C(1174405126), // FMOV_S 977| 8.24k| UINT64_C(1409286267), // FMOV_S_MM 978| 8.24k| UINT64_C(1409286267), // FMOV_S_MMR6 979| 8.24k| UINT64_C(2036334619), // FMSUB_D 980| 8.24k| UINT64_C(2034237467), // FMSUB_W 981| 8.24k| UINT64_C(2023751707), // FMUL_D 982| 8.24k| UINT64_C(1176502274), // FMUL_D32 983| 8.24k| UINT64_C(1176502274), // FMUL_D64 984| 8.24k| UINT64_C(1409286576), // FMUL_D_MMR6 985| 8.24k| UINT64_C(1409286576), // FMUL_MM 986| 8.24k| UINT64_C(1174405122), // FMUL_S 987| 8.24k| UINT64_C(1409286320), // FMUL_S_MM 988| 8.24k| UINT64_C(1409286320), // FMUL_S_MMR6 989| 8.24k| UINT64_C(2021654555), // FMUL_W 990| 8.24k| UINT64_C(1176502279), // FNEG_D32 991| 8.24k| UINT64_C(1176502279), // FNEG_D64 992| 8.24k| UINT64_C(1409297275), // FNEG_D_MMR6 993| 8.24k| UINT64_C(1409297275), // FNEG_MM 994| 8.24k| UINT64_C(1174405127), // FNEG_S 995| 8.24k| UINT64_C(1409289083), // FNEG_S_MM 996| 8.24k| UINT64_C(1409289083), // FNEG_S_MMR6 997| 8.24k| UINT64_C(2066415646), // FRCP_D 998| 8.24k| UINT64_C(2066350110), // FRCP_W 999| 8.24k| UINT64_C(2066546718), // FRINT_D 1000| 8.24k| UINT64_C(2066481182), // FRINT_W 1001| 8.24k| UINT64_C(2066284574), // FRSQRT_D 1002| 8.24k| UINT64_C(2066219038), // FRSQRT_W 1003| 8.24k| UINT64_C(2048917530), // FSAF_D 1004| 8.24k| UINT64_C(2046820378), // FSAF_W 1005| 8.24k| UINT64_C(2057306138), // FSEQ_D 1006| 8.24k| UINT64_C(2055208986), // FSEQ_W 1007| 8.24k| UINT64_C(2074083354), // FSLE_D 1008| 8.24k| UINT64_C(2071986202), // FSLE_W 1009| 8.24k| UINT64_C(2065694746), // FSLT_D 1010| 8.24k| UINT64_C(2063597594), // FSLT_W 1011| 8.24k| UINT64_C(2061500444), // FSNE_D 1012| 8.24k| UINT64_C(2059403292), // FSNE_W 1013| 8.24k| UINT64_C(2053111836), // FSOR_D 1014| 8.24k| UINT64_C(2051014684), // FSOR_W 1015| 8.24k| UINT64_C(2066153502), // FSQRT_D 1016| 8.24k| UINT64_C(1176502276), // FSQRT_D32 1017| 8.24k| UINT64_C(1176502276), // FSQRT_D64 1018| 8.24k| UINT64_C(1409305147), // FSQRT_MM 1019| 8.24k| UINT64_C(1174405124), // FSQRT_S 1020| 8.24k| UINT64_C(1409288763), // FSQRT_S_MM 1021| 8.24k| UINT64_C(2066087966), // FSQRT_W 1022| 8.24k| UINT64_C(2019557403), // FSUB_D 1023| 8.24k| UINT64_C(1176502273), // FSUB_D32 1024| 8.24k| UINT64_C(1176502273), // FSUB_D64 1025| 8.24k| UINT64_C(1409286512), // FSUB_D_MMR6 1026| 8.24k| UINT64_C(1409286512), // FSUB_MM 1027| 8.24k| UINT64_C(1174405121), // FSUB_S 1028| 8.24k| UINT64_C(1409286256), // FSUB_S_MM 1029| 8.24k| UINT64_C(1409286256), // FSUB_S_MMR6 1030| 8.24k| UINT64_C(2017460251), // FSUB_W 1031| 8.24k| UINT64_C(2061500442), // FSUEQ_D 1032| 8.24k| UINT64_C(2059403290), // FSUEQ_W 1033| 8.24k| UINT64_C(2078277658), // FSULE_D 1034| 8.24k| UINT64_C(2076180506), // FSULE_W 1035| 8.24k| UINT64_C(2069889050), // FSULT_D 1036| 8.24k| UINT64_C(2067791898), // FSULT_W 1037| 8.24k| UINT64_C(2057306140), // FSUNE_D 1038| 8.24k| UINT64_C(2055208988), // FSUNE_W 1039| 8.24k| UINT64_C(2053111834), // FSUN_D 1040| 8.24k| UINT64_C(2051014682), // FSUN_W 1041| 8.24k| UINT64_C(2067333150), // FTINT_S_D 1042| 8.24k| UINT64_C(2067267614), // FTINT_S_W 1043| 8.24k| UINT64_C(2067464222), // FTINT_U_D 1044| 8.24k| UINT64_C(2067398686), // FTINT_U_W 1045| 8.24k| UINT64_C(2055208987), // FTQ_H 1046| 8.24k| UINT64_C(2057306139), // FTQ_W 1047| 8.24k| UINT64_C(2065891358), // FTRUNC_S_D 1048| 8.24k| UINT64_C(2065825822), // FTRUNC_S_W 1049| 8.24k| UINT64_C(2066022430), // FTRUNC_U_D 1050| 8.24k| UINT64_C(2065956894), // FTRUNC_U_W 1051| 8.24k| UINT64_C(0), 1052| 8.24k| UINT64_C(2053111829), // HADD_S_D 1053| 8.24k| UINT64_C(2048917525), // HADD_S_H 1054| 8.24k| UINT64_C(2051014677), // HADD_S_W 1055| 8.24k| UINT64_C(2061500437), // HADD_U_D 1056| 8.24k| UINT64_C(2057306133), // HADD_U_H 1057| 8.24k| UINT64_C(2059403285), // HADD_U_W 1058| 8.24k| UINT64_C(2069889045), // HSUB_S_D 1059| 8.24k| UINT64_C(2065694741), // HSUB_S_H 1060| 8.24k| UINT64_C(2067791893), // HSUB_S_W 1061| 8.24k| UINT64_C(2078277653), // HSUB_U_D 1062| 8.24k| UINT64_C(2074083349), // HSUB_U_H 1063| 8.24k| UINT64_C(2076180501), // HSUB_U_W 1064| 8.24k| UINT64_C(2063597588), // ILVEV_B 1065| 8.24k| UINT64_C(2069889044), // ILVEV_D 1066| 8.24k| UINT64_C(2065694740), // ILVEV_H 1067| 8.24k| UINT64_C(2067791892), // ILVEV_W 1068| 8.24k| UINT64_C(2046820372), // ILVL_B 1069| 8.24k| UINT64_C(2053111828), // ILVL_D 1070| 8.24k| UINT64_C(2048917524), // ILVL_H 1071| 8.24k| UINT64_C(2051014676), // ILVL_W 1072| 8.24k| UINT64_C(2071986196), // ILVOD_B 1073| 8.24k| UINT64_C(2078277652), // ILVOD_D 1074| 8.24k| UINT64_C(2074083348), // ILVOD_H 1075| 8.24k| UINT64_C(2076180500), // ILVOD_W 1076| 8.24k| UINT64_C(2055208980), // ILVR_B 1077| 8.24k| UINT64_C(2061500436), // ILVR_D 1078| 8.24k| UINT64_C(2057306132), // ILVR_H 1079| 8.24k| UINT64_C(2059403284), // ILVR_W 1080| 8.24k| UINT64_C(2080374788), // INS 1081| 8.24k| UINT64_C(2030043161), // INSERT_B 1082| 8.24k| UINT64_C(0), 1083| 8.24k| UINT64_C(0), 1084| 8.24k| UINT64_C(2033713177), // INSERT_D 1085| 8.24k| UINT64_C(0), 1086| 8.24k| UINT64_C(0), 1087| 8.24k| UINT64_C(0), 1088| 8.24k| UINT64_C(0), 1089| 8.24k| UINT64_C(0), 1090| 8.24k| UINT64_C(0), 1091| 8.24k| UINT64_C(0), 1092| 8.24k| UINT64_C(0), 1093| 8.24k| UINT64_C(2032140313), // INSERT_H 1094| 8.24k| UINT64_C(0), 1095| 8.24k| UINT64_C(0), 1096| 8.24k| UINT64_C(2033188889), // INSERT_W 1097| 8.24k| UINT64_C(0), 1098| 8.24k| UINT64_C(0), 1099| 8.24k| UINT64_C(2080374796), // INSV 1100| 8.24k| UINT64_C(2034237465), // INSVE_B 1101| 8.24k| UINT64_C(2037907481), // INSVE_D 1102| 8.24k| UINT64_C(2036334617), // INSVE_H 1103| 8.24k| UINT64_C(2037383193), // INSVE_W 1104| 8.24k| UINT64_C(16700), // INSV_MM 1105| 8.24k| UINT64_C(12), // INS_MM 1106| 8.24k| UINT64_C(134217728), // J 1107| 8.24k| UINT64_C(201326592), // JAL 1108| 8.24k| UINT64_C(9), // JALR 1109| 8.24k| UINT64_C(17856), // JALR16_MM 1110| 8.24k| UINT64_C(9), // JALR64 1111| 8.24k| UINT64_C(0), 1112| 8.24k| UINT64_C(17419), // JALRC16_MMR6 1113| 8.24k| UINT64_C(0), 1114| 8.24k| UINT64_C(17888), // JALRS16_MM 1115| 8.24k| UINT64_C(20284), // JALRS_MM 1116| 8.24k| UINT64_C(1033), // JALR_HB 1117| 8.24k| UINT64_C(3900), // JALR_MM 1118| 8.24k| UINT64_C(1946157056), // JALS_MM 1119| 8.24k| UINT64_C(1946157056), // JALX 1120| 8.24k| UINT64_C(4026531840), // JALX_MM 1121| 8.24k| UINT64_C(4093640704), // JAL_MM 1122| 8.24k| UINT64_C(4160749568), // JIALC 1123| 8.24k| UINT64_C(2147483648), // JIALC_MMR6 1124| 8.24k| UINT64_C(3623878656), // JIC 1125| 8.24k| UINT64_C(2684354560), // JIC_MMR6 1126| 8.24k| UINT64_C(8), // JR 1127| 8.24k| UINT64_C(17792), // JR16_MM 1128| 8.24k| UINT64_C(8), // JR64 1129| 8.24k| UINT64_C(18176), // JRADDIUSP 1130| 8.24k| UINT64_C(17824), // JRC16_MM 1131| 8.24k| UINT64_C(17411), // JRC16_MMR6 1132| 8.24k| UINT64_C(17427), // JRCADDIUSP_MMR6 1133| 8.24k| UINT64_C(1032), // JR_HB 1134| 8.24k| UINT64_C(1033), // JR_HB_R6 1135| 8.24k| UINT64_C(3900), // JR_MM 1136| 8.24k| UINT64_C(3556769792), // J_MM 1137| 8.24k| UINT64_C(402653184), // Jal16 1138| 8.24k| UINT64_C(402653184), // JalB16 1139| 8.24k| UINT64_C(0), 1140| 8.24k| UINT64_C(0), 1141| 8.24k| UINT64_C(59424), // JrRa16 1142| 8.24k| UINT64_C(59616), // JrcRa16 1143| 8.24k| UINT64_C(59584), // JrcRx16 1144| 8.24k| UINT64_C(59392), // JumpLinkReg16 1145| 8.24k| UINT64_C(2147483648), // LB 1146| 8.24k| UINT64_C(2147483648), // LB64 1147| 8.24k| UINT64_C(2080374828), // LBE 1148| 8.24k| UINT64_C(1610639360), // LBE_MM 1149| 8.24k| UINT64_C(1610639360), // LBE_MMR6 1150| 8.24k| UINT64_C(2048), // LBU16_MM 1151| 8.24k| UINT64_C(1610637312), // LBUE_MMR6 1152| 8.24k| UINT64_C(2080375178), // LBUX 1153| 8.24k| UINT64_C(549), // LBUX_MM 1154| 8.24k| UINT64_C(335544320), // LBU_MMR6 1155| 8.24k| UINT64_C(469762048), // LB_MM 1156| 8.24k| UINT64_C(469762048), // LB_MMR6 1157| 8.24k| UINT64_C(2415919104), // LBu 1158| 8.24k| UINT64_C(2415919104), // LBu64 1159| 8.24k| UINT64_C(2080374824), // LBuE 1160| 8.24k| UINT64_C(1610637312), // LBuE_MM 1161| 8.24k| UINT64_C(335544320), // LBu_MM 1162| 8.24k| UINT64_C(3690987520), // LD 1163| 8.24k| UINT64_C(3556769792), // LDC1 1164| 8.24k| UINT64_C(3556769792), // LDC164 1165| 8.24k| UINT64_C(3154116608), // LDC1_MM 1166| 8.24k| UINT64_C(3623878656), // LDC2 1167| 8.24k| UINT64_C(1237319680), // LDC2_R6 1168| 8.24k| UINT64_C(3690987520), // LDC3 1169| 8.24k| UINT64_C(2063597575), // LDI_B 1170| 8.24k| UINT64_C(2069889031), // LDI_D 1171| 8.24k| UINT64_C(2065694727), // LDI_H 1172| 8.24k| UINT64_C(2067791879), // LDI_W 1173| 8.24k| UINT64_C(1744830464), // LDL 1174| 8.24k| UINT64_C(3960995840), // LDPC 1175| 8.24k| UINT64_C(1811939328), // LDR 1176| 8.24k| UINT64_C(1275068417), // LDXC1 1177| 8.24k| UINT64_C(1275068417), // LDXC164 1178| 8.24k| UINT64_C(2013265952), // LD_B 1179| 8.24k| UINT64_C(2013265955), // LD_D 1180| 8.24k| UINT64_C(2013265953), // LD_H 1181| 8.24k| UINT64_C(2013265954), // LD_W 1182| 8.24k| UINT64_C(603979776), // LEA_ADDiu 1183| 8.24k| UINT64_C(1677721600), // LEA_ADDiu64 1184| 8.24k| UINT64_C(805306368), // LEA_ADDiu_MM 1185| 8.24k| UINT64_C(2214592512), // LH 1186| 8.24k| UINT64_C(2214592512), // LH64 1187| 8.24k| UINT64_C(2080374829), // LHE 1188| 8.24k| UINT64_C(1610639872), // LHE_MM 1189| 8.24k| UINT64_C(10240), // LHU16_MM 1190| 8.24k| UINT64_C(2080375050), // LHX 1191| 8.24k| UINT64_C(357), // LHX_MM 1192| 8.24k| UINT64_C(1006632960), // LH_MM 1193| 8.24k| UINT64_C(2483027968), // LHu 1194| 8.24k| UINT64_C(2483027968), // LHu64 1195| 8.24k| UINT64_C(2080374825), // LHuE 1196| 8.24k| UINT64_C(1610637824), // LHuE_MM 1197| 8.24k| UINT64_C(872415232), // LHu_MM 1198| 8.24k| UINT64_C(60416), // LI16_MM 1199| 8.24k| UINT64_C(60416), // LI16_MMR6 1200| 8.24k| UINT64_C(3221225472), // LL 1201| 8.24k| UINT64_C(3489660928), // LLD 1202| 8.24k| UINT64_C(2080374839), // LLD_R6 1203| 8.24k| UINT64_C(2080374830), // LLE 1204| 8.24k| UINT64_C(1610640384), // LLE_MM 1205| 8.24k| UINT64_C(1610640384), // LLE_MMR6 1206| 8.24k| UINT64_C(1610625024), // LL_MM 1207| 8.24k| UINT64_C(2080374838), // LL_R6 1208| 8.24k| UINT64_C(0), 1209| 8.24k| UINT64_C(0), 1210| 8.24k| UINT64_C(0), 1211| 8.24k| UINT64_C(0), 1212| 8.24k| UINT64_C(0), 1213| 8.24k| UINT64_C(0), 1214| 8.24k| UINT64_C(0), 1215| 8.24k| UINT64_C(5), // LSA 1216| 8.24k| UINT64_C(15), // LSA_MMR6 1217| 8.24k| UINT64_C(5), // LSA_R6 1218| 8.24k| UINT64_C(268435456), // LUI_MMR6 1219| 8.24k| UINT64_C(1275068421), // LUXC1 1220| 8.24k| UINT64_C(1275068421), // LUXC164 1221| 8.24k| UINT64_C(1409286472), // LUXC1_MM 1222| 8.24k| UINT64_C(1006632960), // LUi 1223| 8.24k| UINT64_C(1006632960), // LUi64 1224| 8.24k| UINT64_C(1101004800), // LUi_MM 1225| 8.24k| UINT64_C(2348810240), // LW 1226| 8.24k| UINT64_C(26624), // LW16_MM 1227| 8.24k| UINT64_C(2348810240), // LW64 1228| 8.24k| UINT64_C(3288334336), // LWC1 1229| 8.24k| UINT64_C(2617245696), // LWC1_MM 1230| 8.24k| UINT64_C(3355443200), // LWC2 1231| 8.24k| UINT64_C(1228931072), // LWC2_R6 1232| 8.24k| UINT64_C(3422552064), // LWC3 1233| 8.24k| UINT64_C(2080374831), // LWE 1234| 8.24k| UINT64_C(1610640896), // LWE_MM 1235| 8.24k| UINT64_C(1610640896), // LWE_MMR6 1236| 8.24k| UINT64_C(25600), // LWGP_MM 1237| 8.24k| UINT64_C(2281701376), // LWL 1238| 8.24k| UINT64_C(2281701376), // LWL64 1239| 8.24k| UINT64_C(2080374809), // LWLE 1240| 8.24k| UINT64_C(1610638336), // LWLE_MM 1241| 8.24k| UINT64_C(1610612736), // LWL_MM 1242| 8.24k| UINT64_C(17664), // LWM16_MM 1243| 8.24k| UINT64_C(17410), // LWM16_MMR6 1244| 8.24k| UINT64_C(536891392), // LWM32_MM 1245| 8.24k| UINT64_C(0), 1246| 8.24k| UINT64_C(3959947264), // LWPC 1247| 8.24k| UINT64_C(2013790208), // LWPC_MMR6 1248| 8.24k| UINT64_C(536875008), // LWP_MM 1249| 8.24k| UINT64_C(2550136832), // LWR 1250| 8.24k| UINT64_C(2550136832), // LWR64 1251| 8.24k| UINT64_C(2080374810), // LWRE 1252| 8.24k| UINT64_C(1610638848), // LWRE_MM 1253| 8.24k| UINT64_C(1610616832), // LWR_MM 1254| 8.24k| UINT64_C(18432), // LWSP_MM 1255| 8.24k| UINT64_C(3960471552), // LWUPC 1256| 8.24k| UINT64_C(1610670080), // LWU_MM 1257| 8.24k| UINT64_C(2080374794), // LWX 1258| 8.24k| UINT64_C(1275068416), // LWXC1 1259| 8.24k| UINT64_C(1409286216), // LWXC1_MM 1260| 8.24k| UINT64_C(280), // LWXS_MM 1261| 8.24k| UINT64_C(421), // LWX_MM 1262| 8.24k| UINT64_C(4227858432), // LW_MM 1263| 8.24k| UINT64_C(4227858432), // LW_MMR6 1264| 8.24k| UINT64_C(2617245696), // LWu 1265| 8.24k| UINT64_C(4026570752), // LbRxRyOffMemX16 1266| 8.24k| UINT64_C(4026572800), // LbuRxRyOffMemX16 1267| 8.24k| UINT64_C(4026572800), // LhRxRyOffMemX16 1268| 8.24k| UINT64_C(4026572800), // LhuRxRyOffMemX16 1269| 8.24k| UINT64_C(26624), // LiRxImm16 1270| 8.24k| UINT64_C(4026558464), // LiRxImmAlignX16 1271| 8.24k| UINT64_C(4026558464), // LiRxImmX16 1272| 8.24k| UINT64_C(0), 1273| 8.24k| UINT64_C(0), 1274| 8.24k| UINT64_C(0), 1275| 8.24k| UINT64_C(0), 1276| 8.24k| UINT64_C(0), 1277| 8.24k| UINT64_C(0), 1278| 8.24k| UINT64_C(0), 1279| 8.24k| UINT64_C(45056), // LwRxPcTcp16 1280| 8.24k| UINT64_C(4026576896), // LwRxPcTcpX16 1281| 8.24k| UINT64_C(4026570752), // LwRxRyOffMemX16 1282| 8.24k| UINT64_C(4026568704), // LwRxSpImmX16 1283| 8.24k| UINT64_C(1879048192), // MADD 1284| 8.24k| UINT64_C(1176502296), // MADDF_D 1285| 8.24k| UINT64_C(1409287096), // MADDF_D_MMR6 1286| 8.24k| UINT64_C(1174405144), // MADDF_S 1287| 8.24k| UINT64_C(1409286584), // MADDF_S_MMR6 1288| 8.24k| UINT64_C(2067791900), // MADDR_Q_H 1289| 8.24k| UINT64_C(2069889052), // MADDR_Q_W 1290| 8.24k| UINT64_C(1879048193), // MADDU 1291| 8.24k| UINT64_C(1879048193), // MADDU_DSP 1292| 8.24k| UINT64_C(6844), // MADDU_DSP_MM 1293| 8.24k| UINT64_C(56124), // MADDU_MM 1294| 8.24k| UINT64_C(2021654546), // MADDV_B 1295| 8.24k| UINT64_C(2027946002), // MADDV_D 1296| 8.24k| UINT64_C(2023751698), // MADDV_H 1297| 8.24k| UINT64_C(2025848850), // MADDV_W 1298| 8.24k| UINT64_C(1275068449), // MADD_D32 1299| 8.24k| UINT64_C(1409286153), // MADD_D32_MM 1300| 8.24k| UINT64_C(1275068449), // MADD_D64 1301| 8.24k| UINT64_C(1879048192), // MADD_DSP 1302| 8.24k| UINT64_C(2748), // MADD_DSP_MM 1303| 8.24k| UINT64_C(52028), // MADD_MM 1304| 8.24k| UINT64_C(2034237468), // MADD_Q_H 1305| 8.24k| UINT64_C(2036334620), // MADD_Q_W 1306| 8.24k| UINT64_C(1275068448), // MADD_S 1307| 8.24k| UINT64_C(1409286145), // MADD_S_MM 1308| 8.24k| UINT64_C(2080375856), // MAQ_SA_W_PHL 1309| 8.24k| UINT64_C(14972), // MAQ_SA_W_PHL_MM 1310| 8.24k| UINT64_C(2080375984), // MAQ_SA_W_PHR 1311| 8.24k| UINT64_C(10876), // MAQ_SA_W_PHR_MM 1312| 8.24k| UINT64_C(2080376112), // MAQ_S_W_PHL 1313| 8.24k| UINT64_C(6780), // MAQ_S_W_PHL_MM 1314| 8.24k| UINT64_C(2080376240), // MAQ_S_W_PHR 1315| 8.24k| UINT64_C(2684), // MAQ_S_W_PHR_MM 1316| 8.24k| UINT64_C(1176502303), // MAXA_D 1317| 8.24k| UINT64_C(1409286699), // MAXA_D_MMR6 1318| 8.24k| UINT64_C(1174405151), // MAXA_S 1319| 8.24k| UINT64_C(1409286187), // MAXA_S_MMR6 1320| 8.24k| UINT64_C(2030043142), // MAXI_S_B 1321| 8.24k| UINT64_C(2036334598), // MAXI_S_D 1322| 8.24k| UINT64_C(2032140294), // MAXI_S_H 1323| 8.24k| UINT64_C(2034237446), // MAXI_S_W 1324| 8.24k| UINT64_C(2038431750), // MAXI_U_B 1325| 8.24k| UINT64_C(2044723206), // MAXI_U_D 1326| 8.24k| UINT64_C(2040528902), // MAXI_U_H 1327| 8.24k| UINT64_C(2042626054), // MAXI_U_W 1328| 8.24k| UINT64_C(2063597582), // MAX_A_B 1329| 8.24k| UINT64_C(2069889038), // MAX_A_D 1330| 8.24k| UINT64_C(2065694734), // MAX_A_H 1331| 8.24k| UINT64_C(2067791886), // MAX_A_W 1332| 8.24k| UINT64_C(1176502301), // MAX_D 1333| 8.24k| UINT64_C(1409286667), // MAX_D_MMR6 1334| 8.24k| UINT64_C(1174405149), // MAX_S 1335| 8.24k| UINT64_C(2030043150), // MAX_S_B 1336| 8.24k| UINT64_C(2036334606), // MAX_S_D 1337| 8.24k| UINT64_C(2032140302), // MAX_S_H 1338| 8.24k| UINT64_C(1409286155), // MAX_S_MMR6 1339| 8.24k| UINT64_C(2034237454), // MAX_S_W 1340| 8.24k| UINT64_C(2038431758), // MAX_U_B 1341| 8.24k| UINT64_C(2044723214), // MAX_U_D 1342| 8.24k| UINT64_C(2040528910), // MAX_U_H 1343| 8.24k| UINT64_C(2042626062), // MAX_U_W 1344| 8.24k| UINT64_C(1073741824), // MFC0 1345| 8.24k| UINT64_C(1140850688), // MFC1 1346| 8.24k| UINT64_C(1409294395), // MFC1_MM 1347| 8.24k| UINT64_C(1207959552), // MFC2 1348| 8.24k| UINT64_C(1147142144), // MFHC1_D32 1349| 8.24k| UINT64_C(1147142144), // MFHC1_D64 1350| 8.24k| UINT64_C(1409298491), // MFHC1_MM 1351| 8.24k| UINT64_C(16), // MFHI 1352| 8.24k| UINT64_C(17920), // MFHI16_MM 1353| 8.24k| UINT64_C(16), // MFHI64 1354| 8.24k| UINT64_C(16), // MFHI_DSP 1355| 8.24k| UINT64_C(124), // MFHI_DSP_MM 1356| 8.24k| UINT64_C(3452), // MFHI_MM 1357| 8.24k| UINT64_C(18), // MFLO 1358| 8.24k| UINT64_C(17984), // MFLO16_MM 1359| 8.24k| UINT64_C(18), // MFLO64 1360| 8.24k| UINT64_C(18), // MFLO_DSP 1361| 8.24k| UINT64_C(4220), // MFLO_DSP_MM 1362| 8.24k| UINT64_C(7548), // MFLO_MM 1363| 8.24k| UINT64_C(1176502302), // MINA_D 1364| 8.24k| UINT64_C(1409286691), // MINA_D_MMR6 1365| 8.24k| UINT64_C(1174405150), // MINA_S 1366| 8.24k| UINT64_C(1409286179), // MINA_S_MMR6 1367| 8.24k| UINT64_C(2046820358), // MINI_S_B 1368| 8.24k| UINT64_C(2053111814), // MINI_S_D 1369| 8.24k| UINT64_C(2048917510), // MINI_S_H 1370| 8.24k| UINT64_C(2051014662), // MINI_S_W 1371| 8.24k| UINT64_C(2055208966), // MINI_U_B 1372| 8.24k| UINT64_C(2061500422), // MINI_U_D 1373| 8.24k| UINT64_C(2057306118), // MINI_U_H 1374| 8.24k| UINT64_C(2059403270), // MINI_U_W 1375| 8.24k| UINT64_C(2071986190), // MIN_A_B 1376| 8.24k| UINT64_C(2078277646), // MIN_A_D 1377| 8.24k| UINT64_C(2074083342), // MIN_A_H 1378| 8.24k| UINT64_C(2076180494), // MIN_A_W 1379| 8.24k| UINT64_C(1176502300), // MIN_D 1380| 8.24k| UINT64_C(1409286659), // MIN_D_MMR6 1381| 8.24k| UINT64_C(1174405148), // MIN_S 1382| 8.24k| UINT64_C(2046820366), // MIN_S_B 1383| 8.24k| UINT64_C(2053111822), // MIN_S_D 1384| 8.24k| UINT64_C(2048917518), // MIN_S_H 1385| 8.24k| UINT64_C(1409286147), // MIN_S_MMR6 1386| 8.24k| UINT64_C(2051014670), // MIN_S_W 1387| 8.24k| UINT64_C(2055208974), // MIN_U_B 1388| 8.24k| UINT64_C(2061500430), // MIN_U_D 1389| 8.24k| UINT64_C(2057306126), // MIN_U_H 1390| 8.24k| UINT64_C(2059403278), // MIN_U_W 1391| 8.24k| UINT64_C(0), 1392| 8.24k| UINT64_C(0), 1393| 8.24k| UINT64_C(218), // MOD 1394| 8.24k| UINT64_C(2080375952), // MODSUB 1395| 8.24k| UINT64_C(219), // MODU 1396| 8.24k| UINT64_C(472), // MODU_MMR6 1397| 8.24k| UINT64_C(344), // MOD_MMR6 1398| 8.24k| UINT64_C(2063597586), // MOD_S_B 1399| 8.24k| UINT64_C(2069889042), // MOD_S_D 1400| 8.24k| UINT64_C(2065694738), // MOD_S_H 1401| 8.24k| UINT64_C(2067791890), // MOD_S_W 1402| 8.24k| UINT64_C(2071986194), // MOD_U_B 1403| 8.24k| UINT64_C(2078277650), // MOD_U_D 1404| 8.24k| UINT64_C(2074083346), // MOD_U_H 1405| 8.24k| UINT64_C(2076180498), // MOD_U_W 1406| 8.24k| UINT64_C(3072), // MOVE16_MM 1407| 8.24k| UINT64_C(3072), // MOVE16_MMR6 1408| 8.24k| UINT64_C(33792), // MOVEP_MM 1409| 8.24k| UINT64_C(2025717785), // MOVE_V 1410| 8.24k| UINT64_C(1176502289), // MOVF_D32 1411| 8.24k| UINT64_C(1409286688), // MOVF_D32_MM 1412| 8.24k| UINT64_C(1176502289), // MOVF_D64 1413| 8.24k| UINT64_C(1), // MOVF_I 1414| 8.24k| UINT64_C(1), // MOVF_I64 1415| 8.24k| UINT64_C(1409286523), // MOVF_I_MM 1416| 8.24k| UINT64_C(1174405137), // MOVF_S 1417| 8.24k| UINT64_C(1409286176), // MOVF_S_MM 1418| 8.24k| UINT64_C(1176502291), // MOVN_I64_D64 1419| 8.24k| UINT64_C(11), // MOVN_I64_I 1420| 8.24k| UINT64_C(11), // MOVN_I64_I64 1421| 8.24k| UINT64_C(1174405139), // MOVN_I64_S 1422| 8.24k| UINT64_C(1176502291), // MOVN_I_D32 1423| 8.24k| UINT64_C(1409286456), // MOVN_I_D32_MM 1424| 8.24k| UINT64_C(1176502291), // MOVN_I_D64 1425| 8.24k| UINT64_C(11), // MOVN_I_I 1426| 8.24k| UINT64_C(11), // MOVN_I_I64 1427| 8.24k| UINT64_C(24), // MOVN_I_MM 1428| 8.24k| UINT64_C(1174405139), // MOVN_I_S 1429| 8.24k| UINT64_C(1409286200), // MOVN_I_S_MM 1430| 8.24k| UINT64_C(1176567825), // MOVT_D32 1431| 8.24k| UINT64_C(1409286752), // MOVT_D32_MM 1432| 8.24k| UINT64_C(1176567825), // MOVT_D64 1433| 8.24k| UINT64_C(65537), // MOVT_I 1434| 8.24k| UINT64_C(65537), // MOVT_I64 1435| 8.24k| UINT64_C(1409288571), // MOVT_I_MM 1436| 8.24k| UINT64_C(1174470673), // MOVT_S 1437| 8.24k| UINT64_C(1409286240), // MOVT_S_MM 1438| 8.24k| UINT64_C(1176502290), // MOVZ_I64_D64 1439| 8.24k| UINT64_C(10), // MOVZ_I64_I 1440| 8.24k| UINT64_C(10), // MOVZ_I64_I64 1441| 8.24k| UINT64_C(1174405138), // MOVZ_I64_S 1442| 8.24k| UINT64_C(1176502290), // MOVZ_I_D32 1443| 8.24k| UINT64_C(1409286520), // MOVZ_I_D32_MM 1444| 8.24k| UINT64_C(1176502290), // MOVZ_I_D64 1445| 8.24k| UINT64_C(10), // MOVZ_I_I 1446| 8.24k| UINT64_C(10), // MOVZ_I_I64 1447| 8.24k| UINT64_C(88), // MOVZ_I_MM 1448| 8.24k| UINT64_C(1174405138), // MOVZ_I_S 1449| 8.24k| UINT64_C(1409286264), // MOVZ_I_S_MM 1450| 8.24k| UINT64_C(1879048196), // MSUB 1451| 8.24k| UINT64_C(1176502297), // MSUBF_D 1452| 8.24k| UINT64_C(1409287160), // MSUBF_D_MMR6 1453| 8.24k| UINT64_C(1174405145), // MSUBF_S 1454| 8.24k| UINT64_C(1409286648), // MSUBF_S_MMR6 1455| 8.24k| UINT64_C(2071986204), // MSUBR_Q_H 1456| 8.24k| UINT64_C(2074083356), // MSUBR_Q_W 1457| 8.24k| UINT64_C(1879048197), // MSUBU 1458| 8.24k| UINT64_C(1879048197), // MSUBU_DSP 1459| 8.24k| UINT64_C(15036), // MSUBU_DSP_MM 1460| 8.24k| UINT64_C(64316), // MSUBU_MM 1461| 8.24k| UINT64_C(2030043154), // MSUBV_B 1462| 8.24k| UINT64_C(2036334610), // MSUBV_D 1463| 8.24k| UINT64_C(2032140306), // MSUBV_H 1464| 8.24k| UINT64_C(2034237458), // MSUBV_W 1465| 8.24k| UINT64_C(1275068457), // MSUB_D32 1466| 8.24k| UINT64_C(1409286185), // MSUB_D32_MM 1467| 8.24k| UINT64_C(1275068457), // MSUB_D64 1468| 8.24k| UINT64_C(1879048196), // MSUB_DSP 1469| 8.24k| UINT64_C(10940), // MSUB_DSP_MM 1470| 8.24k| UINT64_C(60220), // MSUB_MM 1471| 8.24k| UINT64_C(2038431772), // MSUB_Q_H 1472| 8.24k| UINT64_C(2040528924), // MSUB_Q_W 1473| 8.24k| UINT64_C(1275068456), // MSUB_S 1474| 8.24k| UINT64_C(1409286177), // MSUB_S_MM 1475| 8.24k| UINT64_C(1082130432), // MTC0 1476| 8.24k| UINT64_C(1149239296), // MTC1 1477| 8.24k| UINT64_C(1409296443), // MTC1_MM 1478| 8.24k| UINT64_C(1216348160), // MTC2 1479| 8.24k| UINT64_C(1155530752), // MTHC1_D32 1480| 8.24k| UINT64_C(1155530752), // MTHC1_D64 1481| 8.24k| UINT64_C(1409300539), // MTHC1_MM 1482| 8.24k| UINT64_C(17), // MTHI 1483| 8.24k| UINT64_C(17), // MTHI64 1484| 8.24k| UINT64_C(17), // MTHI_DSP 1485| 8.24k| UINT64_C(8316), // MTHI_DSP_MM 1486| 8.24k| UINT64_C(11644), // MTHI_MM 1487| 8.24k| UINT64_C(2080376824), // MTHLIP 1488| 8.24k| UINT64_C(636), // MTHLIP_MM 1489| 8.24k| UINT64_C(19), // MTLO 1490| 8.24k| UINT64_C(19), // MTLO64 1491| 8.24k| UINT64_C(19), // MTLO_DSP 1492| 8.24k| UINT64_C(12412), // MTLO_DSP_MM 1493| 8.24k| UINT64_C(15740), // MTLO_MM 1494| 8.24k| UINT64_C(1879048200), // MTM0 1495| 8.24k| UINT64_C(1879048204), // MTM1 1496| 8.24k| UINT64_C(1879048205), // MTM2 1497| 8.24k| UINT64_C(1879048201), // MTP0 1498| 8.24k| UINT64_C(1879048202), // MTP1 1499| 8.24k| UINT64_C(1879048203), // MTP2 1500| 8.24k| UINT64_C(216), // MUH 1501| 8.24k| UINT64_C(217), // MUHU 1502| 8.24k| UINT64_C(216), // MUHU_MMR6 1503| 8.24k| UINT64_C(88), // MUH_MMR6 1504| 8.24k| UINT64_C(1879048194), // MUL 1505| 8.24k| UINT64_C(2080376592), // MULEQ_S_W_PHL 1506| 8.24k| UINT64_C(37), // MULEQ_S_W_PHL_MM 1507| 8.24k| UINT64_C(2080376656), // MULEQ_S_W_PHR 1508| 8.24k| UINT64_C(101), // MULEQ_S_W_PHR_MM 1509| 8.24k| UINT64_C(2080375184), // MULEU_S_PH_QBL 1510| 8.24k| UINT64_C(149), // MULEU_S_PH_QBL_MM 1511| 8.24k| UINT64_C(2080375248), // MULEU_S_PH_QBR 1512| 8.24k| UINT64_C(213), // MULEU_S_PH_QBR_MM 1513| 8.24k| UINT64_C(2080376784), // MULQ_RS_PH 1514| 8.24k| UINT64_C(277), // MULQ_RS_PH_MM 1515| 8.24k| UINT64_C(2080376280), // MULQ_RS_W 1516| 8.24k| UINT64_C(405), // MULQ_RS_W_MMR2 1517| 8.24k| UINT64_C(2080376720), // MULQ_S_PH 1518| 8.24k| UINT64_C(341), // MULQ_S_PH_MMR2 1519| 8.24k| UINT64_C(2080376216), // MULQ_S_W 1520| 8.24k| UINT64_C(469), // MULQ_S_W_MMR2 1521| 8.24k| UINT64_C(2063597596), // MULR_Q_H 1522| 8.24k| UINT64_C(2065694748), // MULR_Q_W 1523| 8.24k| UINT64_C(2080375216), // MULSAQ_S_W_PH 1524| 8.24k| UINT64_C(2080374960), // MULSA_W_PH 1525| 8.24k| UINT64_C(24), // MULT 1526| 8.24k| UINT64_C(25), // MULTU_DSP 1527| 8.24k| UINT64_C(7356), // MULTU_DSP_MM 1528| 8.24k| UINT64_C(24), // MULT_DSP 1529| 8.24k| UINT64_C(3260), // MULT_DSP_MM 1530| 8.24k| UINT64_C(35644), // MULT_MM 1531| 8.24k| UINT64_C(25), // MULTu 1532| 8.24k| UINT64_C(39740), // MULTu_MM 1533| 8.24k| UINT64_C(153), // MULU 1534| 8.24k| UINT64_C(152), // MULU_MMR6 1535| 8.24k| UINT64_C(2013265938), // MULV_B 1536| 8.24k| UINT64_C(2019557394), // MULV_D 1537| 8.24k| UINT64_C(2015363090), // MULV_H 1538| 8.24k| UINT64_C(2017460242), // MULV_W 1539| 8.24k| UINT64_C(528), // MUL_MM 1540| 8.24k| UINT64_C(24), // MUL_MMR6 1541| 8.24k| UINT64_C(2080375576), // MUL_PH 1542| 8.24k| UINT64_C(45), // MUL_PH_MMR2 1543| 8.24k| UINT64_C(2030043164), // MUL_Q_H 1544| 8.24k| UINT64_C(2032140316), // MUL_Q_W 1545| 8.24k| UINT64_C(152), // MUL_R6 1546| 8.24k| UINT64_C(2080375704), // MUL_S_PH 1547| 8.24k| UINT64_C(1069), // MUL_S_PH_MMR2 1548| 8.24k| UINT64_C(59408), // Mfhi16 1549| 8.24k| UINT64_C(59410), // Mflo16 1550| 8.24k| UINT64_C(25856), // Move32R16 1551| 8.24k| UINT64_C(26368), // MoveR3216 1552| 8.24k| UINT64_C(0), 1553| 8.24k| UINT64_C(0), 1554| 8.24k| UINT64_C(0), 1555| 8.24k| UINT64_C(0), 1556| 8.24k| UINT64_C(2064121886), // NLOC_B 1557| 8.24k| UINT64_C(2064318494), // NLOC_D 1558| 8.24k| UINT64_C(2064187422), // NLOC_H 1559| 8.24k| UINT64_C(2064252958), // NLOC_W 1560| 8.24k| UINT64_C(2064384030), // NLZC_B 1561| 8.24k| UINT64_C(2064580638), // NLZC_D 1562| 8.24k| UINT64_C(2064449566), // NLZC_H 1563| 8.24k| UINT64_C(2064515102), // NLZC_W 1564| 8.24k| UINT64_C(1275068465), // NMADD_D32 1565| 8.24k| UINT64_C(1409286154), // NMADD_D32_MM 1566| 8.24k| UINT64_C(1275068465), // NMADD_D64 1567| 8.24k| UINT64_C(1275068464), // NMADD_S 1568| 8.24k| UINT64_C(1409286146), // NMADD_S_MM 1569| 8.24k| UINT64_C(1275068473), // NMSUB_D32 1570| 8.24k| UINT64_C(1409286186), // NMSUB_D32_MM 1571| 8.24k| UINT64_C(1275068473), // NMSUB_D64 1572| 8.24k| UINT64_C(1275068472), // NMSUB_S 1573| 8.24k| UINT64_C(1409286178), // NMSUB_S_MM 1574| 8.24k| UINT64_C(0), 1575| 8.24k| UINT64_C(39), // NOR 1576| 8.24k| UINT64_C(39), // NOR64 1577| 8.24k| UINT64_C(2046820352), // NORI_B 1578| 8.24k| UINT64_C(0), 1579| 8.24k| UINT64_C(720), // NOR_MM 1580| 8.24k| UINT64_C(720), // NOR_MMR6 1581| 8.24k| UINT64_C(2017460254), // NOR_V 1582| 8.24k| UINT64_C(0), 1583| 8.24k| UINT64_C(0), 1584| 8.24k| UINT64_C(0), 1585| 8.24k| UINT64_C(17408), // NOT16_MM 1586| 8.24k| UINT64_C(17408), // NOT16_MMR6 1587| 8.24k| UINT64_C(59421), // NegRxRy16 1588| 8.24k| UINT64_C(59407), // NotRxRy16 1589| 8.24k| UINT64_C(37), // OR 1590| 8.24k| UINT64_C(17600), // OR16_MM 1591| 8.24k| UINT64_C(17417), // OR16_MMR6 1592| 8.24k| UINT64_C(37), // OR64 1593| 8.24k| UINT64_C(2030043136), // ORI_B 1594| 8.24k| UINT64_C(1342177280), // ORI_MMR6 1595| 8.24k| UINT64_C(656), // OR_MM 1596| 8.24k| UINT64_C(656), // OR_MMR6 1597| 8.24k| UINT64_C(2015363102), // OR_V 1598| 8.24k| UINT64_C(0), 1599| 8.24k| UINT64_C(0), 1600| 8.24k| UINT64_C(0), 1601| 8.24k| UINT64_C(872415232), // ORi 1602| 8.24k| UINT64_C(872415232), // ORi64 1603| 8.24k| UINT64_C(1342177280), // ORi_MM 1604| 8.24k| UINT64_C(59405), // OrRxRxRy16 1605| 8.24k| UINT64_C(2080375697), // PACKRL_PH 1606| 8.24k| UINT64_C(429), // PACKRL_PH_MM 1607| 8.24k| UINT64_C(320), // PAUSE 1608| 8.24k| UINT64_C(10240), // PAUSE_MM 1609| 8.24k| UINT64_C(10240), // PAUSE_MMR6 1610| 8.24k| UINT64_C(2030043156), // PCKEV_B 1611| 8.24k| UINT64_C(2036334612), // PCKEV_D 1612| 8.24k| UINT64_C(2032140308), // PCKEV_H 1613| 8.24k| UINT64_C(2034237460), // PCKEV_W 1614| 8.24k| UINT64_C(2038431764), // PCKOD_B 1615| 8.24k| UINT64_C(2044723220), // PCKOD_D 1616| 8.24k| UINT64_C(2040528916), // PCKOD_H 1617| 8.24k| UINT64_C(2042626068), // PCKOD_W 1618| 8.24k| UINT64_C(2063859742), // PCNT_B 1619| 8.24k| UINT64_C(2064056350), // PCNT_D 1620| 8.24k| UINT64_C(2063925278), // PCNT_H 1621| 8.24k| UINT64_C(2063990814), // PCNT_W 1622| 8.24k| UINT64_C(2080375505), // PICK_PH 1623| 8.24k| UINT64_C(557), // PICK_PH_MM 1624| 8.24k| UINT64_C(2080374993), // PICK_QB 1625| 8.24k| UINT64_C(493), // PICK_QB_MM 1626| 8.24k| UINT64_C(1879048236), // POP 1627| 8.24k| UINT64_C(2080375058), // PRECEQU_PH_QBL 1628| 8.24k| UINT64_C(2080375186), // PRECEQU_PH_QBLA 1629| 8.24k| UINT64_C(29500), // PRECEQU_PH_QBLA_MM 1630| 8.24k| UINT64_C(28988), // PRECEQU_PH_QBL_MM 1631| 8.24k| UINT64_C(2080375122), // PRECEQU_PH_QBR 1632| 8.24k| UINT64_C(2080375250), // PRECEQU_PH_QBRA 1633| 8.24k| UINT64_C(37692), // PRECEQU_PH_QBRA_MM 1634| 8.24k| UINT64_C(37180), // PRECEQU_PH_QBR_MM 1635| 8.24k| UINT64_C(2080375570), // PRECEQ_W_PHL 1636| 8.24k| UINT64_C(20796), // PRECEQ_W_PHL_MM 1637| 8.24k| UINT64_C(2080375634), // PRECEQ_W_PHR 1638| 8.24k| UINT64_C(24892), // PRECEQ_W_PHR_MM 1639| 8.24k| UINT64_C(2080376594), // PRECEU_PH_QBL 1640| 8.24k| UINT64_C(2080376722), // PRECEU_PH_QBLA 1641| 8.24k| UINT64_C(45884), // PRECEU_PH_QBLA_MM 1642| 8.24k| UINT64_C(45372), // PRECEU_PH_QBL_MM 1643| 8.24k| UINT64_C(2080376658), // PRECEU_PH_QBR 1644| 8.24k| UINT64_C(2080376786), // PRECEU_PH_QBRA 1645| 8.24k| UINT64_C(54076), // PRECEU_PH_QBRA_MM 1646| 8.24k| UINT64_C(53564), // PRECEU_PH_QBR_MM 1647| 8.24k| UINT64_C(2080375761), // PRECRQU_S_QB_PH 1648| 8.24k| UINT64_C(365), // PRECRQU_S_QB_PH_MM 1649| 8.24k| UINT64_C(2080376081), // PRECRQ_PH_W 1650| 8.24k| UINT64_C(237), // PRECRQ_PH_W_MM 1651| 8.24k| UINT64_C(2080375569), // PRECRQ_QB_PH 1652| 8.24k| UINT64_C(173), // PRECRQ_QB_PH_MM 1653| 8.24k| UINT64_C(2080376145), // PRECRQ_RS_PH_W 1654| 8.24k| UINT64_C(301), // PRECRQ_RS_PH_W_MM 1655| 8.24k| UINT64_C(2080375633), // PRECR_QB_PH 1656| 8.24k| UINT64_C(109), // PRECR_QB_PH_MMR2 1657| 8.24k| UINT64_C(2080376721), // PRECR_SRA_PH_W 1658| 8.24k| UINT64_C(973), // PRECR_SRA_PH_W_MMR2 1659| 8.24k| UINT64_C(2080376785), // PRECR_SRA_R_PH_W 1660| 8.24k| UINT64_C(1997), // PRECR_SRA_R_PH_W_MMR2 1661| 8.24k| UINT64_C(3422552064), // PREF 1662| 8.24k| UINT64_C(2080374819), // PREFE 1663| 8.24k| UINT64_C(1610654720), // PREFE_MM 1664| 8.24k| UINT64_C(1610654720), // PREFE_MMR6 1665| 8.24k| UINT64_C(1409286560), // PREFX_MM 1666| 8.24k| UINT64_C(1610620928), // PREF_MM 1667| 8.24k| UINT64_C(1610620928), // PREF_MMR6 1668| 8.24k| UINT64_C(2080374837), // PREF_R6 1669| 8.24k| UINT64_C(2080374897), // PREPEND 1670| 8.24k| UINT64_C(597), // PREPEND_MMR2 1671| 8.24k| UINT64_C(0), 1672| 8.24k| UINT64_C(0), 1673| 8.24k| UINT64_C(0), 1674| 8.24k| UINT64_C(0), 1675| 8.24k| UINT64_C(0), 1676| 8.24k| UINT64_C(0), 1677| 8.24k| UINT64_C(0), 1678| 8.24k| UINT64_C(0), 1679| 8.24k| UINT64_C(0), 1680| 8.24k| UINT64_C(0), 1681| 8.24k| UINT64_C(0), 1682| 8.24k| UINT64_C(0), 1683| 8.24k| UINT64_C(0), 1684| 8.24k| UINT64_C(0), 1685| 8.24k| UINT64_C(0), 1686| 8.24k| UINT64_C(0), 1687| 8.24k| UINT64_C(0), 1688| 8.24k| UINT64_C(0), 1689| 8.24k| UINT64_C(0), 1690| 8.24k| UINT64_C(0), 1691| 8.24k| UINT64_C(0), 1692| 8.24k| UINT64_C(0), 1693| 8.24k| UINT64_C(0), 1694| 8.24k| UINT64_C(0), 1695| 8.24k| UINT64_C(0), 1696| 8.24k| UINT64_C(0), 1697| 8.24k| UINT64_C(0), 1698| 8.24k| UINT64_C(0), 1699| 8.24k| UINT64_C(0), 1700| 8.24k| UINT64_C(0), 1701| 8.24k| UINT64_C(0), 1702| 8.24k| UINT64_C(0), 1703| 8.24k| UINT64_C(0), 1704| 8.24k| UINT64_C(0), 1705| 8.24k| UINT64_C(0), 1706| 8.24k| UINT64_C(0), 1707| 8.24k| UINT64_C(0), 1708| 8.24k| UINT64_C(0), 1709| 8.24k| UINT64_C(0), 1710| 8.24k| UINT64_C(0), 1711| 8.24k| UINT64_C(0), 1712| 8.24k| UINT64_C(0), 1713| 8.24k| UINT64_C(0), 1714| 8.24k| UINT64_C(0), 1715| 8.24k| UINT64_C(0), 1716| 8.24k| UINT64_C(0), 1717| 8.24k| UINT64_C(0), 1718| 8.24k| UINT64_C(0), 1719| 8.24k| UINT64_C(0), 1720| 8.24k| UINT64_C(0), 1721| 8.24k| UINT64_C(0), 1722| 8.24k| UINT64_C(2080376080), // RADDU_W_QB 1723| 8.24k| UINT64_C(61756), // RADDU_W_QB_MM 1724| 8.24k| UINT64_C(2080375992), // RDDSP 1725| 8.24k| UINT64_C(1660), // RDDSP_MM 1726| 8.24k| UINT64_C(2080374843), // RDHWR 1727| 8.24k| UINT64_C(2080374843), // RDHWR64 1728| 8.24k| UINT64_C(27452), // RDHWR_MM 1729| 8.24k| UINT64_C(448), // RDHWR_MMR6 1730| 8.24k| UINT64_C(57724), // RDPGPR_MMR6 1731| 8.24k| UINT64_C(1409307195), // RECIP_D_MMR6 1732| 8.24k| UINT64_C(1409290811), // RECIP_S_MMR6 1733| 8.24k| UINT64_C(2080375506), // REPLV_PH 1734| 8.24k| UINT64_C(828), // REPLV_PH_MM 1735| 8.24k| UINT64_C(2080374994), // REPLV_QB 1736| 8.24k| UINT64_C(4924), // REPLV_QB_MM 1737| 8.24k| UINT64_C(2080375442), // REPL_PH 1738| 8.24k| UINT64_C(61), // REPL_PH_MM 1739| 8.24k| UINT64_C(2080374930), // REPL_QB 1740| 8.24k| UINT64_C(1532), // REPL_QB_MM 1741| 8.24k| UINT64_C(1176502298), // RINT_D 1742| 8.24k| UINT64_C(1409286688), // RINT_D_MMR6 1743| 8.24k| UINT64_C(1174405146), // RINT_S 1744| 8.24k| UINT64_C(1409286176), // RINT_S_MMR6 1745| 8.24k| UINT64_C(0), 1746| 8.24k| UINT64_C(0), 1747| 8.24k| UINT64_C(0), 1748| 8.24k| UINT64_C(0), 1749| 8.24k| UINT64_C(2097154), // ROTR 1750| 8.24k| UINT64_C(70), // ROTRV 1751| 8.24k| UINT64_C(208), // ROTRV_MM 1752| 8.24k| UINT64_C(192), // ROTR_MM 1753| 8.24k| UINT64_C(1176502280), // ROUND_L_D64 1754| 8.24k| UINT64_C(1409315643), // ROUND_L_D_MMR6 1755| 8.24k| UINT64_C(1174405128), // ROUND_L_S 1756| 8.24k| UINT64_C(1409299259), // ROUND_L_S_MMR6 1757| 8.24k| UINT64_C(1176502284), // ROUND_W_D32 1758| 8.24k| UINT64_C(1176502284), // ROUND_W_D64 1759| 8.24k| UINT64_C(1409317691), // ROUND_W_D_MMR6 1760| 8.24k| UINT64_C(1409317691), // ROUND_W_MM 1761| 8.24k| UINT64_C(1174405132), // ROUND_W_S 1762| 8.24k| UINT64_C(1409301307), // ROUND_W_S_MM 1763| 8.24k| UINT64_C(1409301307), // ROUND_W_S_MMR6 1764| 8.24k| UINT64_C(1409303099), // RSQRT_D_MMR6 1765| 8.24k| UINT64_C(1409286715), // RSQRT_S_MMR6 1766| 8.24k| UINT64_C(25728), // Restore16 1767| 8.24k| UINT64_C(25728), // RestoreX16 1768| 8.24k| UINT64_C(0), 1769| 8.24k| UINT64_C(0), 1770| 8.24k| UINT64_C(2020605962), // SAT_S_B 1771| 8.24k| UINT64_C(2013265930), // SAT_S_D 1772| 8.24k| UINT64_C(2019557386), // SAT_S_H 1773| 8.24k| UINT64_C(2017460234), // SAT_S_W 1774| 8.24k| UINT64_C(2028994570), // SAT_U_B 1775| 8.24k| UINT64_C(2021654538), // SAT_U_D 1776| 8.24k| UINT64_C(2027945994), // SAT_U_H 1777| 8.24k| UINT64_C(2025848842), // SAT_U_W 1778| 8.24k| UINT64_C(2684354560), // SB 1779| 8.24k| UINT64_C(34816), // SB16_MM 1780| 8.24k| UINT64_C(34816), // SB16_MMR6 1781| 8.24k| UINT64_C(2684354560), // SB64 1782| 8.24k| UINT64_C(2080374812), // SBE 1783| 8.24k| UINT64_C(1610655744), // SBE_MM 1784| 8.24k| UINT64_C(1610655744), // SBE_MMR6 1785| 8.24k| UINT64_C(402653184), // SB_MM 1786| 8.24k| UINT64_C(402653184), // SB_MMR6 1787| 8.24k| UINT64_C(3758096384), // SC 1788| 8.24k| UINT64_C(4026531840), // SCD 1789| 8.24k| UINT64_C(2080374823), // SCD_R6 1790| 8.24k| UINT64_C(2080374814), // SCE 1791| 8.24k| UINT64_C(1610656768), // SCE_MM 1792| 8.24k| UINT64_C(1610656768), // SCE_MMR6 1793| 8.24k| UINT64_C(1610657792), // SC_MM 1794| 8.24k| UINT64_C(2080374822), // SC_R6 1795| 8.24k| UINT64_C(4227858432), // SD 1796| 8.24k| UINT64_C(1879048255), // SDBBP 1797| 8.24k| UINT64_C(18112), // SDBBP16_MM 1798| 8.24k| UINT64_C(17467), // SDBBP16_MMR6 1799| 8.24k| UINT64_C(56188), // SDBBP_MM 1800| 8.24k| UINT64_C(56188), // SDBBP_MMR6 1801| 8.24k| UINT64_C(14), // SDBBP_R6 1802| 8.24k| UINT64_C(4093640704), // SDC1 1803| 8.24k| UINT64_C(4093640704), // SDC164 1804| 8.24k| UINT64_C(3087007744), // SDC1_MM 1805| 8.24k| UINT64_C(4160749568), // SDC2 1806| 8.24k| UINT64_C(1239416832), // SDC2_R6 1807| 8.24k| UINT64_C(4227858432), // SDC3 1808| 8.24k| UINT64_C(26), // SDIV 1809| 8.24k| UINT64_C(43836), // SDIV_MM 1810| 8.24k| UINT64_C(2952790016), // SDL 1811| 8.24k| UINT64_C(3019898880), // SDR 1812| 8.24k| UINT64_C(1275068425), // SDXC1 1813| 8.24k| UINT64_C(1275068425), // SDXC164 1814| 8.24k| UINT64_C(0), 1815| 8.24k| UINT64_C(2080375840), // SEB 1816| 8.24k| UINT64_C(2080375840), // SEB64 1817| 8.24k| UINT64_C(11068), // SEB_MM 1818| 8.24k| UINT64_C(11068), // SEB_MMR6 1819| 8.24k| UINT64_C(2080376352), // SEH 1820| 8.24k| UINT64_C(2080376352), // SEH64 1821| 8.24k| UINT64_C(15164), // SEH_MM 1822| 8.24k| UINT64_C(15164), // SEH_MMR6 1823| 8.24k| UINT64_C(1409286776), // SELENZ_D_MMR6 1824| 8.24k| UINT64_C(1409286264), // SELENZ_S_MMR6 1825| 8.24k| UINT64_C(53), // SELEQZ 1826| 8.24k| UINT64_C(53), // SELEQZ64 1827| 8.24k| UINT64_C(1176502292), // SELEQZ_D 1828| 8.24k| UINT64_C(1409286712), // SELEQZ_D_MMR6 1829| 8.24k| UINT64_C(320), // SELEQZ_MMR6 1830| 8.24k| UINT64_C(1174405140), // SELEQZ_S 1831| 8.24k| UINT64_C(1409286200), // SELEQZ_S_MMR6 1832| 8.24k| UINT64_C(55), // SELNEZ 1833| 8.24k| UINT64_C(55), // SELNEZ64 1834| 8.24k| UINT64_C(1176502295), // SELNEZ_D 1835| 8.24k| UINT64_C(384), // SELNEZ_MMR6 1836| 8.24k| UINT64_C(1174405143), // SELNEZ_S 1837| 8.24k| UINT64_C(1176502288), // SEL_D 1838| 8.24k| UINT64_C(1409286840), // SEL_D_MMR6 1839| 8.24k| UINT64_C(1174405136), // SEL_S 1840| 8.24k| UINT64_C(1409286328), // SEL_S_MMR6 1841| 8.24k| UINT64_C(1879048234), // SEQ 1842| 8.24k| UINT64_C(1879048238), // SEQi 1843| 8.24k| UINT64_C(2751463424), // SH 1844| 8.24k| UINT64_C(43008), // SH16_MM 1845| 8.24k| UINT64_C(43008), // SH16_MMR6 1846| 8.24k| UINT64_C(2751463424), // SH64 1847| 8.24k| UINT64_C(2080374813), // SHE 1848| 8.24k| UINT64_C(1610656256), // SHE_MM 1849| 8.24k| UINT64_C(1610656256), // SHE_MMR6 1850| 8.24k| UINT64_C(2013265922), // SHF_B 1851| 8.24k| UINT64_C(2030043138), // SHF_H 1852| 8.24k| UINT64_C(2046820354), // SHF_W 1853| 8.24k| UINT64_C(2080376504), // SHILO 1854| 8.24k| UINT64_C(2080376568), // SHILOV 1855| 8.24k| UINT64_C(4732), // SHILOV_MM 1856| 8.24k| UINT64_C(29), // SHILO_MM 1857| 8.24k| UINT64_C(2080375443), // SHLLV_PH 1858| 8.24k| UINT64_C(14), // SHLLV_PH_MM 1859| 8.24k| UINT64_C(2080374931), // SHLLV_QB 1860| 8.24k| UINT64_C(917), // SHLLV_QB_MM 1861| 8.24k| UINT64_C(2080375699), // SHLLV_S_PH 1862| 8.24k| UINT64_C(1038), // SHLLV_S_PH_MM 1863| 8.24k| UINT64_C(2080376211), // SHLLV_S_W 1864| 8.24k| UINT64_C(981), // SHLLV_S_W_MM 1865| 8.24k| UINT64_C(2080375315), // SHLL_PH 1866| 8.24k| UINT64_C(949), // SHLL_PH_MM 1867| 8.24k| UINT64_C(2080374803), // SHLL_QB 1868| 8.24k| UINT64_C(2172), // SHLL_QB_MM 1869| 8.24k| UINT64_C(2080375571), // SHLL_S_PH 1870| 8.24k| UINT64_C(2997), // SHLL_S_PH_MM 1871| 8.24k| UINT64_C(2080376083), // SHLL_S_W 1872| 8.24k| UINT64_C(1013), // SHLL_S_W_MM 1873| 8.24k| UINT64_C(2080375507), // SHRAV_PH 1874| 8.24k| UINT64_C(397), // SHRAV_PH_MM 1875| 8.24k| UINT64_C(2080375187), // SHRAV_QB 1876| 8.24k| UINT64_C(461), // SHRAV_QB_MMR2 1877| 8.24k| UINT64_C(2080375763), // SHRAV_R_PH 1878| 8.24k| UINT64_C(1421), // SHRAV_R_PH_MM 1879| 8.24k| UINT64_C(2080375251), // SHRAV_R_QB 1880| 8.24k| UINT64_C(1485), // SHRAV_R_QB_MMR2 1881| 8.24k| UINT64_C(2080376275), // SHRAV_R_W 1882| 8.24k| UINT64_C(725), // SHRAV_R_W_MM 1883| 8.24k| UINT64_C(2080375379), // SHRA_PH 1884| 8.24k| UINT64_C(821), // SHRA_PH_MM 1885| 8.24k| UINT64_C(2080375059), // SHRA_QB 1886| 8.24k| UINT64_C(508), // SHRA_QB_MMR2 1887| 8.24k| UINT64_C(2080375635), // SHRA_R_PH 1888| 8.24k| UINT64_C(1845), // SHRA_R_PH_MM 1889| 8.24k| UINT64_C(2080375123), // SHRA_R_QB 1890| 8.24k| UINT64_C(4604), // SHRA_R_QB_MMR2 1891| 8.24k| UINT64_C(2080376147), // SHRA_R_W 1892| 8.24k| UINT64_C(757), // SHRA_R_W_MM 1893| 8.24k| UINT64_C(2080376531), // SHRLV_PH 1894| 8.24k| UINT64_C(789), // SHRLV_PH_MMR2 1895| 8.24k| UINT64_C(2080374995), // SHRLV_QB 1896| 8.24k| UINT64_C(853), // SHRLV_QB_MM 1897| 8.24k| UINT64_C(2080376403), // SHRL_PH 1898| 8.24k| UINT64_C(1020), // SHRL_PH_MMR2 1899| 8.24k| UINT64_C(2080374867), // SHRL_QB 1900| 8.24k| UINT64_C(6268), // SHRL_QB_MM 1901| 8.24k| UINT64_C(939524096), // SH_MM 1902| 8.24k| UINT64_C(939524096), // SH_MMR6 1903| 8.24k| UINT64_C(2013265945), // SLDI_B 1904| 8.24k| UINT64_C(2016935961), // SLDI_D 1905| 8.24k| UINT64_C(2015363097), // SLDI_H 1906| 8.24k| UINT64_C(2016411673), // SLDI_W 1907| 8.24k| UINT64_C(2013265940), // SLD_B 1908| 8.24k| UINT64_C(2019557396), // SLD_D 1909| 8.24k| UINT64_C(2015363092), // SLD_H 1910| 8.24k| UINT64_C(2017460244), // SLD_W 1911| 8.24k| UINT64_C(0), // SLL 1912| 8.24k| UINT64_C(9216), // SLL16_MM 1913| 8.24k| UINT64_C(9216), // SLL16_MMR6 1914| 8.24k| UINT64_C(0), // SLL64_32 1915| 8.24k| UINT64_C(0), // SLL64_64 1916| 8.24k| UINT64_C(2020605961), // SLLI_B 1917| 8.24k| UINT64_C(2013265929), // SLLI_D 1918| 8.24k| UINT64_C(2019557385), // SLLI_H 1919| 8.24k| UINT64_C(2017460233), // SLLI_W 1920| 8.24k| UINT64_C(4), // SLLV 1921| 8.24k| UINT64_C(16), // SLLV_MM 1922| 8.24k| UINT64_C(2013265933), // SLL_B 1923| 8.24k| UINT64_C(2019557389), // SLL_D 1924| 8.24k| UINT64_C(2015363085), // SLL_H 1925| 8.24k| UINT64_C(0), // SLL_MM 1926| 8.24k| UINT64_C(0), // SLL_MMR6 1927| 8.24k| UINT64_C(2017460237), // SLL_W 1928| 8.24k| UINT64_C(42), // SLT 1929| 8.24k| UINT64_C(42), // SLT64 1930| 8.24k| UINT64_C(848), // SLT_MM 1931| 8.24k| UINT64_C(671088640), // SLTi 1932| 8.24k| UINT64_C(671088640), // SLTi64 1933| 8.24k| UINT64_C(2415919104), // SLTi_MM 1934| 8.24k| UINT64_C(738197504), // SLTiu 1935| 8.24k| UINT64_C(738197504), // SLTiu64 1936| 8.24k| UINT64_C(2952790016), // SLTiu_MM 1937| 8.24k| UINT64_C(43), // SLTu 1938| 8.24k| UINT64_C(43), // SLTu64 1939| 8.24k| UINT64_C(912), // SLTu_MM 1940| 8.24k| UINT64_C(1879048235), // SNE 1941| 8.24k| UINT64_C(1879048239), // SNEi 1942| 8.24k| UINT64_C(0), 1943| 8.24k| UINT64_C(0), 1944| 8.24k| UINT64_C(0), 1945| 8.24k| UINT64_C(0), 1946| 8.24k| UINT64_C(0), 1947| 8.24k| UINT64_C(2017460249), // SPLATI_B 1948| 8.24k| UINT64_C(2021130265), // SPLATI_D 1949| 8.24k| UINT64_C(2019557401), // SPLATI_H 1950| 8.24k| UINT64_C(2020605977), // SPLATI_W 1951| 8.24k| UINT64_C(2021654548), // SPLAT_B 1952| 8.24k| UINT64_C(2027946004), // SPLAT_D 1953| 8.24k| UINT64_C(2023751700), // SPLAT_H 1954| 8.24k| UINT64_C(2025848852), // SPLAT_W 1955| 8.24k| UINT64_C(1409305147), // SQRT_D_MMR6 1956| 8.24k| UINT64_C(1409288763), // SQRT_S_MMR6 1957| 8.24k| UINT64_C(3), // SRA 1958| 8.24k| UINT64_C(2028994569), // SRAI_B 1959| 8.24k| UINT64_C(2021654537), // SRAI_D 1960| 8.24k| UINT64_C(2027945993), // SRAI_H 1961| 8.24k| UINT64_C(2025848841), // SRAI_W 1962| 8.24k| UINT64_C(2037383178), // SRARI_B 1963| 8.24k| UINT64_C(2030043146), // SRARI_D 1964| 8.24k| UINT64_C(2036334602), // SRARI_H 1965| 8.24k| UINT64_C(2034237450), // SRARI_W 1966| 8.24k| UINT64_C(2021654549), // SRAR_B 1967| 8.24k| UINT64_C(2027946005), // SRAR_D 1968| 8.24k| UINT64_C(2023751701), // SRAR_H 1969| 8.24k| UINT64_C(2025848853), // SRAR_W 1970| 8.24k| UINT64_C(7), // SRAV 1971| 8.24k| UINT64_C(144), // SRAV_MM 1972| 8.24k| UINT64_C(2021654541), // SRA_B 1973| 8.24k| UINT64_C(2027945997), // SRA_D 1974| 8.24k| UINT64_C(2023751693), // SRA_H 1975| 8.24k| UINT64_C(128), // SRA_MM 1976| 8.24k| UINT64_C(2025848845), // SRA_W 1977| 8.24k| UINT64_C(2), // SRL 1978| 8.24k| UINT64_C(9217), // SRL16_MM 1979| 8.24k| UINT64_C(9217), // SRL16_MMR6 1980| 8.24k| UINT64_C(2037383177), // SRLI_B 1981| 8.24k| UINT64_C(2030043145), // SRLI_D 1982| 8.24k| UINT64_C(2036334601), // SRLI_H 1983| 8.24k| UINT64_C(2034237449), // SRLI_W 1984| 8.24k| UINT64_C(2045771786), // SRLRI_B 1985| 8.24k| UINT64_C(2038431754), // SRLRI_D 1986| 8.24k| UINT64_C(2044723210), // SRLRI_H 1987| 8.24k| UINT64_C(2042626058), // SRLRI_W 1988| 8.24k| UINT64_C(2030043157), // SRLR_B 1989| 8.24k| UINT64_C(2036334613), // SRLR_D 1990| 8.24k| UINT64_C(2032140309), // SRLR_H 1991| 8.24k| UINT64_C(2034237461), // SRLR_W 1992| 8.24k| UINT64_C(6), // SRLV 1993| 8.24k| UINT64_C(80), // SRLV_MM 1994| 8.24k| UINT64_C(2030043149), // SRL_B 1995| 8.24k| UINT64_C(2036334605), // SRL_D 1996| 8.24k| UINT64_C(2032140301), // SRL_H 1997| 8.24k| UINT64_C(64), // SRL_MM 1998| 8.24k| UINT64_C(2034237453), // SRL_W 1999| 8.24k| UINT64_C(64), // SSNOP 2000| 8.24k| UINT64_C(2048), // SSNOP_MM 2001| 8.24k| UINT64_C(2048), // SSNOP_MMR6 2002| 8.24k| UINT64_C(0), 2003| 8.24k| UINT64_C(0), 2004| 8.24k| UINT64_C(0), 2005| 8.24k| UINT64_C(0), 2006| 8.24k| UINT64_C(2013265956), // ST_B 2007| 8.24k| UINT64_C(2013265959), // ST_D 2008| 8.24k| UINT64_C(2013265957), // ST_H 2009| 8.24k| UINT64_C(2013265958), // ST_W 2010| 8.24k| UINT64_C(34), // SUB 2011| 8.24k| UINT64_C(2080375384), // SUBQH_PH 2012| 8.24k| UINT64_C(589), // SUBQH_PH_MMR2 2013| 8.24k| UINT64_C(2080375512), // SUBQH_R_PH 2014| 8.24k| UINT64_C(1613), // SUBQH_R_PH_MMR2 2015| 8.24k| UINT64_C(2080376024), // SUBQH_R_W 2016| 8.24k| UINT64_C(1677), // SUBQH_R_W_MMR2 2017| 8.24k| UINT64_C(2080375896), // SUBQH_W 2018| 8.24k| UINT64_C(653), // SUBQH_W_MMR2 2019| 8.24k| UINT64_C(2080375504), // SUBQ_PH 2020| 8.24k| UINT64_C(525), // SUBQ_PH_MM 2021| 8.24k| UINT64_C(2080375760), // SUBQ_S_PH 2022| 8.24k| UINT64_C(1549), // SUBQ_S_PH_MM 2023| 8.24k| UINT64_C(2080376272), // SUBQ_S_W 2024| 8.24k| UINT64_C(837), // SUBQ_S_W_MM 2025| 8.24k| UINT64_C(2030043153), // SUBSUS_U_B 2026| 8.24k| UINT64_C(2036334609), // SUBSUS_U_D 2027| 8.24k| UINT64_C(2032140305), // SUBSUS_U_H 2028| 8.24k| UINT64_C(2034237457), // SUBSUS_U_W 2029| 8.24k| UINT64_C(2038431761), // SUBSUU_S_B 2030| 8.24k| UINT64_C(2044723217), // SUBSUU_S_D 2031| 8.24k| UINT64_C(2040528913), // SUBSUU_S_H 2032| 8.24k| UINT64_C(2042626065), // SUBSUU_S_W 2033| 8.24k| UINT64_C(2013265937), // SUBS_S_B 2034| 8.24k| UINT64_C(2019557393), // SUBS_S_D 2035| 8.24k| UINT64_C(2015363089), // SUBS_S_H 2036| 8.24k| UINT64_C(2017460241), // SUBS_S_W 2037| 8.24k| UINT64_C(2021654545), // SUBS_U_B 2038| 8.24k| UINT64_C(2027946001), // SUBS_U_D 2039| 8.24k| UINT64_C(2023751697), // SUBS_U_H 2040| 8.24k| UINT64_C(2025848849), // SUBS_U_W 2041| 8.24k| UINT64_C(1025), // SUBU16_MM 2042| 8.24k| UINT64_C(1025), // SUBU16_MMR6 2043| 8.24k| UINT64_C(2080374872), // SUBUH_QB 2044| 8.24k| UINT64_C(845), // SUBUH_QB_MMR2 2045| 8.24k| UINT64_C(2080375000), // SUBUH_R_QB 2046| 8.24k| UINT64_C(1869), // SUBUH_R_QB_MMR2 2047| 8.24k| UINT64_C(464), // SUBU_MMR6 2048| 8.24k| UINT64_C(2080375376), // SUBU_PH 2049| 8.24k| UINT64_C(781), // SUBU_PH_MMR2 2050| 8.24k| UINT64_C(2080374864), // SUBU_QB 2051| 8.24k| UINT64_C(717), // SUBU_QB_MM 2052| 8.24k| UINT64_C(2080375632), // SUBU_S_PH 2053| 8.24k| UINT64_C(1805), // SUBU_S_PH_MMR2 2054| 8.24k| UINT64_C(2080375120), // SUBU_S_QB 2055| 8.24k| UINT64_C(1741), // SUBU_S_QB_MM 2056| 8.24k| UINT64_C(2021654534), // SUBVI_B 2057| 8.24k| UINT64_C(2027945990), // SUBVI_D 2058| 8.24k| UINT64_C(2023751686), // SUBVI_H 2059| 8.24k| UINT64_C(2025848838), // SUBVI_W 2060| 8.24k| UINT64_C(2021654542), // SUBV_B 2061| 8.24k| UINT64_C(2027945998), // SUBV_D 2062| 8.24k| UINT64_C(2023751694), // SUBV_H 2063| 8.24k| UINT64_C(2025848846), // SUBV_W 2064| 8.24k| UINT64_C(400), // SUB_MM 2065| 8.24k| UINT64_C(400), // SUB_MMR6 2066| 8.24k| UINT64_C(35), // SUBu 2067| 8.24k| UINT64_C(464), // SUBu_MM 2068| 8.24k| UINT64_C(1275068429), // SUXC1 2069| 8.24k| UINT64_C(1275068429), // SUXC164 2070| 8.24k| UINT64_C(1409286536), // SUXC1_MM 2071| 8.24k| UINT64_C(2885681152), // SW 2072| 8.24k| UINT64_C(59392), // SW16_MM 2073| 8.24k| UINT64_C(59392), // SW16_MMR6 2074| 8.24k| UINT64_C(2885681152), // SW64 2075| 8.24k| UINT64_C(3825205248), // SWC1 2076| 8.24k| UINT64_C(2550136832), // SWC1_MM 2077| 8.24k| UINT64_C(3892314112), // SWC2 2078| 8.24k| UINT64_C(1231028224), // SWC2_R6 2079| 8.24k| UINT64_C(3959422976), // SWC3 2080| 8.24k| UINT64_C(2080374815), // SWE 2081| 8.24k| UINT64_C(1610657280), // SWE_MM 2082| 8.24k| UINT64_C(1610657280), // SWE_MMR6 2083| 8.24k| UINT64_C(2818572288), // SWL 2084| 8.24k| UINT64_C(2818572288), // SWL64 2085| 8.24k| UINT64_C(2080374817), // SWLE 2086| 8.24k| UINT64_C(1610653696), // SWLE_MM 2087| 8.24k| UINT64_C(1610645504), // SWL_MM 2088| 8.24k| UINT64_C(17728), // SWM16_MM 2089| 8.24k| UINT64_C(17418), // SWM16_MMR6 2090| 8.24k| UINT64_C(536924160), // SWM32_MM 2091| 8.24k| UINT64_C(0), 2092| 8.24k| UINT64_C(536907776), // SWP_MM 2093| 8.24k| UINT64_C(3087007744), // SWR 2094| 8.24k| UINT64_C(3087007744), // SWR64 2095| 8.24k| UINT64_C(2080374818), // SWRE 2096| 8.24k| UINT64_C(1610654208), // SWRE_MM 2097| 8.24k| UINT64_C(1610649600), // SWR_MM 2098| 8.24k| UINT64_C(51200), // SWSP_MM 2099| 8.24k| UINT64_C(51200), // SWSP_MMR6 2100| 8.24k| UINT64_C(1275068424), // SWXC1 2101| 8.24k| UINT64_C(1409286280), // SWXC1_MM 2102| 8.24k| UINT64_C(4160749568), // SW_MM 2103| 8.24k| UINT64_C(4160749568), // SW_MMR6 2104| 8.24k| UINT64_C(15), // SYNC 2105| 8.24k| UINT64_C(69140480), // SYNCI 2106| 8.24k| UINT64_C(1098907648), // SYNCI_MMR6 2107| 8.24k| UINT64_C(27516), // SYNC_MM 2108| 8.24k| UINT64_C(27516), // SYNC_MMR6 2109| 8.24k| UINT64_C(12), // SYSCALL 2110| 8.24k| UINT64_C(35708), // SYSCALL_MM 2111| 8.24k| UINT64_C(0), 2112| 8.24k| UINT64_C(0), 2113| 8.24k| UINT64_C(0), 2114| 8.24k| UINT64_C(0), 2115| 8.24k| UINT64_C(0), 2116| 8.24k| UINT64_C(25728), // Save16 2117| 8.24k| UINT64_C(25728), // SaveX16 2118| 8.24k| UINT64_C(4026580992), // SbRxRyOffMemX16 2119| 8.24k| UINT64_C(59537), // SebRx16 2120| 8.24k| UINT64_C(59569), // SehRx16 2121| 8.24k| UINT64_C(0), 2122| 8.24k| UINT64_C(0), 2123| 8.24k| UINT64_C(0), 2124| 8.24k| UINT64_C(0), 2125| 8.24k| UINT64_C(0), 2126| 8.24k| UINT64_C(0), 2127| 8.24k| UINT64_C(0), 2128| 8.24k| UINT64_C(0), 2129| 8.24k| UINT64_C(0), 2130| 8.24k| UINT64_C(0), 2131| 8.24k| UINT64_C(0), 2132| 8.24k| UINT64_C(0), 2133| 8.24k| UINT64_C(0), 2134| 8.24k| UINT64_C(0), 2135| 8.24k| UINT64_C(4026583040), // ShRxRyOffMemX16 2136| 8.24k| UINT64_C(4026544128), // SllX16 2137| 8.24k| UINT64_C(59396), // SllvRxRy16 2138| 8.24k| UINT64_C(0), 2139| 8.24k| UINT64_C(59394), // SltRxRy16 2140| 8.24k| UINT64_C(0), 2141| 8.24k| UINT64_C(20480), // SltiRxImm16 2142| 8.24k| UINT64_C(4026552320), // SltiRxImmX16 2143| 8.24k| UINT64_C(0), 2144| 8.24k| UINT64_C(22528), // SltiuRxImm16 2145| 8.24k| UINT64_C(4026554368), // SltiuRxImmX16 2146| 8.24k| UINT64_C(0), 2147| 8.24k| UINT64_C(59395), // SltuRxRy16 2148| 8.24k| UINT64_C(0), 2149| 8.24k| UINT64_C(4026544131), // SraX16 2150| 8.24k| UINT64_C(59399), // SravRxRy16 2151| 8.24k| UINT64_C(4026544130), // SrlX16 2152| 8.24k| UINT64_C(59398), // SrlvRxRy16 2153| 8.24k| UINT64_C(57347), // SubuRxRyRz16 2154| 8.24k| UINT64_C(4026587136), // SwRxRyOffMemX16 2155| 8.24k| UINT64_C(4026585088), // SwRxSpImmX16 2156| 8.24k| UINT64_C(0), 2157| 8.24k| UINT64_C(0), 2158| 8.24k| UINT64_C(0), 2159| 8.24k| UINT64_C(52), // TEQ 2160| 8.24k| UINT64_C(67895296), // TEQI 2161| 8.24k| UINT64_C(1103101952), // TEQI_MM 2162| 8.24k| UINT64_C(60), // TEQ_MM 2163| 8.24k| UINT64_C(48), // TGE 2164| 8.24k| UINT64_C(67633152), // TGEI 2165| 8.24k| UINT64_C(67698688), // TGEIU 2166| 8.24k| UINT64_C(1096810496), // TGEIU_MM 2167| 8.24k| UINT64_C(1092616192), // TGEI_MM 2168| 8.24k| UINT64_C(49), // TGEU 2169| 8.24k| UINT64_C(1084), // TGEU_MM 2170| 8.24k| UINT64_C(572), // TGE_MM 2171| 8.24k| UINT64_C(1107296259), // TLBINV 2172| 8.24k| UINT64_C(1107296260), // TLBINVF 2173| 8.24k| UINT64_C(1107296264), // TLBP 2174| 8.24k| UINT64_C(892), // TLBP_MM 2175| 8.24k| UINT64_C(1107296257), // TLBR 2176| 8.24k| UINT64_C(4988), // TLBR_MM 2177| 8.24k| UINT64_C(1107296258), // TLBWI 2178| 8.24k| UINT64_C(9084), // TLBWI_MM 2179| 8.24k| UINT64_C(1107296262), // TLBWR 2180| 8.24k| UINT64_C(13180), // TLBWR_MM 2181| 8.24k| UINT64_C(50), // TLT 2182| 8.24k| UINT64_C(67764224), // TLTI 2183| 8.24k| UINT64_C(1094713344), // TLTIU_MM 2184| 8.24k| UINT64_C(1090519040), // TLTI_MM 2185| 8.24k| UINT64_C(51), // TLTU 2186| 8.24k| UINT64_C(2620), // TLTU_MM 2187| 8.24k| UINT64_C(2108), // TLT_MM 2188| 8.24k| UINT64_C(54), // TNE 2189| 8.24k| UINT64_C(68026368), // TNEI 2190| 8.24k| UINT64_C(1098907648), // TNEI_MM 2191| 8.24k| UINT64_C(3132), // TNE_MM 2192| 8.24k| UINT64_C(0), 2193| 8.24k| UINT64_C(1176502281), // TRUNC_L_D64 2194| 8.24k| UINT64_C(1409311547), // TRUNC_L_D_MMR6 2195| 8.24k| UINT64_C(1174405129), // TRUNC_L_S 2196| 8.24k| UINT64_C(1409295163), // TRUNC_L_S_MMR6 2197| 8.24k| UINT64_C(1176502285), // TRUNC_W_D32 2198| 8.24k| UINT64_C(1176502285), // TRUNC_W_D64 2199| 8.24k| UINT64_C(1409313595), // TRUNC_W_D_MMR6 2200| 8.24k| UINT64_C(1409313595), // TRUNC_W_MM 2201| 8.24k| UINT64_C(1174405133), // TRUNC_W_S 2202| 8.24k| UINT64_C(1409297211), // TRUNC_W_S_MM 2203| 8.24k| UINT64_C(1409297211), // TRUNC_W_S_MMR6 2204| 8.24k| UINT64_C(67829760), // TTLTIU 2205| 8.24k| UINT64_C(27), // UDIV 2206| 8.24k| UINT64_C(47932), // UDIV_MM 2207| 8.24k| UINT64_C(0), 2208| 8.24k| UINT64_C(0), 2209| 8.24k| UINT64_C(0), 2210| 8.24k| UINT64_C(0), 2211| 8.24k| UINT64_C(1879048209), // V3MULU 2212| 8.24k| UINT64_C(1879048208), // VMM0 2213| 8.24k| UINT64_C(1879048207), // VMULU 2214| 8.24k| UINT64_C(2013265941), // VSHF_B 2215| 8.24k| UINT64_C(2019557397), // VSHF_D 2216| 8.24k| UINT64_C(2015363093), // VSHF_H 2217| 8.24k| UINT64_C(2017460245), // VSHF_W 2218| 8.24k| UINT64_C(1107296288), // WAIT 2219| 8.24k| UINT64_C(37756), // WAIT_MM 2220| 8.24k| UINT64_C(37756), // WAIT_MMR6 2221| 8.24k| UINT64_C(2080376056), // WRDSP 2222| 8.24k| UINT64_C(5756), // WRDSP_MM 2223| 8.24k| UINT64_C(61820), // WRPGPR_MMR6 2224| 8.24k| UINT64_C(2080374944), // WSBH 2225| 8.24k| UINT64_C(31548), // WSBH_MM 2226| 8.24k| UINT64_C(31548), // WSBH_MMR6 2227| 8.24k| UINT64_C(38), // XOR 2228| 8.24k| UINT64_C(17472), // XOR16_MM 2229| 8.24k| UINT64_C(17416), // XOR16_MMR6 2230| 8.24k| UINT64_C(38), // XOR64 2231| 8.24k| UINT64_C(2063597568), // XORI_B 2232| 8.24k| UINT64_C(1879048192), // XORI_MMR6 2233| 8.24k| UINT64_C(784), // XOR_MM 2234| 8.24k| UINT64_C(784), // XOR_MMR6 2235| 8.24k| UINT64_C(2019557406), // XOR_V 2236| 8.24k| UINT64_C(0), 2237| 8.24k| UINT64_C(0), 2238| 8.24k| UINT64_C(0), 2239| 8.24k| UINT64_C(939524096), // XORi 2240| 8.24k| UINT64_C(939524096), // XORi64 2241| 8.24k| UINT64_C(1879048192), // XORi_MM 2242| 8.24k| UINT64_C(59406), // XorRxRxRy16 2243| 8.24k| UINT64_C(0) 2244| 8.24k| }; 2245| 8.24k| const unsigned opcode = MI.getOpcode(); 2246| 8.24k| uint64_t Value = InstBits[opcode]; 2247| 8.24k| uint64_t op = 0; 2248| 8.24k| (void)op; // suppress warning 2249| 8.24k| switch (opcode) { 2250| 0| case Mips::Break16: ------------------ | Branch (2250:5): [True: 0, False: 8.24k] ------------------ 2251| 0| case Mips::DERET: ------------------ | Branch (2251:5): [True: 0, False: 8.24k] ------------------ 2252| 0| case Mips::DERET_MM: ------------------ | Branch (2252:5): [True: 0, False: 8.24k] ------------------ 2253| 0| case Mips::DERET_MMR6: ------------------ | Branch (2253:5): [True: 0, False: 8.24k] ------------------ 2254| 0| case Mips::EHB: ------------------ | Branch (2254:5): [True: 0, False: 8.24k] ------------------ 2255| 0| case Mips::EHB_MM: ------------------ | Branch (2255:5): [True: 0, False: 8.24k] ------------------ 2256| 0| case Mips::EHB_MMR6: ------------------ | Branch (2256:5): [True: 0, False: 8.24k] ------------------ 2257| 0| case Mips::ERET: ------------------ | Branch (2257:5): [True: 0, False: 8.24k] ------------------ 2258| 0| case Mips::ERETNC: ------------------ | Branch (2258:5): [True: 0, False: 8.24k] ------------------ 2259| 0| case Mips::ERETNC_MMR6: ------------------ | Branch (2259:5): [True: 0, False: 8.24k] ------------------ 2260| 0| case Mips::ERET_MM: ------------------ | Branch (2260:5): [True: 0, False: 8.24k] ------------------ 2261| 0| case Mips::ERET_MMR6: ------------------ | Branch (2261:5): [True: 0, False: 8.24k] ------------------ 2262| 0| case Mips::JrRa16: ------------------ | Branch (2262:5): [True: 0, False: 8.24k] ------------------ 2263| 0| case Mips::JrcRa16: ------------------ | Branch (2263:5): [True: 0, False: 8.24k] ------------------ 2264| 0| case Mips::PAUSE: ------------------ | Branch (2264:5): [True: 0, False: 8.24k] ------------------ 2265| 0| case Mips::PAUSE_MM: ------------------ | Branch (2265:5): [True: 0, False: 8.24k] ------------------ 2266| 0| case Mips::PAUSE_MMR6: ------------------ | Branch (2266:5): [True: 0, False: 8.24k] ------------------ 2267| 0| case Mips::Restore16: ------------------ | Branch (2267:5): [True: 0, False: 8.24k] ------------------ 2268| 0| case Mips::RestoreX16: ------------------ | Branch (2268:5): [True: 0, False: 8.24k] ------------------ 2269| 0| case Mips::SSNOP: ------------------ | Branch (2269:5): [True: 0, False: 8.24k] ------------------ 2270| 0| case Mips::SSNOP_MM: ------------------ | Branch (2270:5): [True: 0, False: 8.24k] ------------------ 2271| 0| case Mips::SSNOP_MMR6: ------------------ | Branch (2271:5): [True: 0, False: 8.24k] ------------------ 2272| 0| case Mips::Save16: ------------------ | Branch (2272:5): [True: 0, False: 8.24k] ------------------ 2273| 0| case Mips::SaveX16: ------------------ | Branch (2273:5): [True: 0, False: 8.24k] ------------------ 2274| 0| case Mips::TLBINV: ------------------ | Branch (2274:5): [True: 0, False: 8.24k] ------------------ 2275| 0| case Mips::TLBINVF: ------------------ | Branch (2275:5): [True: 0, False: 8.24k] ------------------ 2276| 0| case Mips::TLBP: ------------------ | Branch (2276:5): [True: 0, False: 8.24k] ------------------ 2277| 0| case Mips::TLBP_MM: ------------------ | Branch (2277:5): [True: 0, False: 8.24k] ------------------ 2278| 0| case Mips::TLBR: ------------------ | Branch (2278:5): [True: 0, False: 8.24k] ------------------ 2279| 0| case Mips::TLBR_MM: ------------------ | Branch (2279:5): [True: 0, False: 8.24k] ------------------ 2280| 0| case Mips::TLBWI: ------------------ | Branch (2280:5): [True: 0, False: 8.24k] ------------------ 2281| 0| case Mips::TLBWI_MM: ------------------ | Branch (2281:5): [True: 0, False: 8.24k] ------------------ 2282| 0| case Mips::TLBWR: ------------------ | Branch (2282:5): [True: 0, False: 8.24k] ------------------ 2283| 0| case Mips::TLBWR_MM: ------------------ | Branch (2283:5): [True: 0, False: 8.24k] ------------------ 2284| 0| case Mips::WAIT: { ------------------ | Branch (2284:5): [True: 0, False: 8.24k] ------------------ 2285| 0| break; 2286| 0| } 2287| 0| case Mips::MTHLIP: ------------------ | Branch (2287:5): [True: 0, False: 8.24k] ------------------ 2288| 0| case Mips::SHILOV: { ------------------ | Branch (2288:5): [True: 0, False: 8.24k] ------------------ 2289| | // op: ac 2290| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2291| 0| Value |= (op & UINT64_C(3)) << 11; 2292| | // op: rs 2293| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 2294| 0| Value |= (op & UINT64_C(31)) << 21; 2295| 0| break; 2296| 0| } 2297| 0| case Mips::DPAQX_SA_W_PH: ------------------ | Branch (2297:5): [True: 0, False: 8.24k] ------------------ 2298| 0| case Mips::DPAQX_S_W_PH: ------------------ | Branch (2298:5): [True: 0, False: 8.24k] ------------------ 2299| 0| case Mips::DPAQ_SA_L_W: ------------------ | Branch (2299:5): [True: 0, False: 8.24k] ------------------ 2300| 0| case Mips::DPAQ_S_W_PH: ------------------ | Branch (2300:5): [True: 0, False: 8.24k] ------------------ 2301| 0| case Mips::DPAU_H_QBL: ------------------ | Branch (2301:5): [True: 0, False: 8.24k] ------------------ 2302| 0| case Mips::DPAU_H_QBR: ------------------ | Branch (2302:5): [True: 0, False: 8.24k] ------------------ 2303| 0| case Mips::DPAX_W_PH: ------------------ | Branch (2303:5): [True: 0, False: 8.24k] ------------------ 2304| 0| case Mips::DPA_W_PH: ------------------ | Branch (2304:5): [True: 0, False: 8.24k] ------------------ 2305| 0| case Mips::DPSQX_SA_W_PH: ------------------ | Branch (2305:5): [True: 0, False: 8.24k] ------------------ 2306| 0| case Mips::DPSQX_S_W_PH: ------------------ | Branch (2306:5): [True: 0, False: 8.24k] ------------------ 2307| 0| case Mips::DPSQ_SA_L_W: ------------------ | Branch (2307:5): [True: 0, False: 8.24k] ------------------ 2308| 0| case Mips::DPSQ_S_W_PH: ------------------ | Branch (2308:5): [True: 0, False: 8.24k] ------------------ 2309| 0| case Mips::DPSU_H_QBL: ------------------ | Branch (2309:5): [True: 0, False: 8.24k] ------------------ 2310| 0| case Mips::DPSU_H_QBR: ------------------ | Branch (2310:5): [True: 0, False: 8.24k] ------------------ 2311| 0| case Mips::DPSX_W_PH: ------------------ | Branch (2311:5): [True: 0, False: 8.24k] ------------------ 2312| 0| case Mips::DPS_W_PH: ------------------ | Branch (2312:5): [True: 0, False: 8.24k] ------------------ 2313| 0| case Mips::MADDU_DSP: ------------------ | Branch (2313:5): [True: 0, False: 8.24k] ------------------ 2314| 0| case Mips::MADD_DSP: ------------------ | Branch (2314:5): [True: 0, False: 8.24k] ------------------ 2315| 0| case Mips::MAQ_SA_W_PHL: ------------------ | Branch (2315:5): [True: 0, False: 8.24k] ------------------ 2316| 0| case Mips::MAQ_SA_W_PHR: ------------------ | Branch (2316:5): [True: 0, False: 8.24k] ------------------ 2317| 0| case Mips::MAQ_S_W_PHL: ------------------ | Branch (2317:5): [True: 0, False: 8.24k] ------------------ 2318| 0| case Mips::MAQ_S_W_PHR: ------------------ | Branch (2318:5): [True: 0, False: 8.24k] ------------------ 2319| 0| case Mips::MSUBU_DSP: ------------------ | Branch (2319:5): [True: 0, False: 8.24k] ------------------ 2320| 0| case Mips::MSUB_DSP: ------------------ | Branch (2320:5): [True: 0, False: 8.24k] ------------------ 2321| 0| case Mips::MULSAQ_S_W_PH: ------------------ | Branch (2321:5): [True: 0, False: 8.24k] ------------------ 2322| 0| case Mips::MULSA_W_PH: ------------------ | Branch (2322:5): [True: 0, False: 8.24k] ------------------ 2323| 0| case Mips::MULTU_DSP: ------------------ | Branch (2323:5): [True: 0, False: 8.24k] ------------------ 2324| 0| case Mips::MULT_DSP: { ------------------ | Branch (2324:5): [True: 0, False: 8.24k] ------------------ 2325| | // op: ac 2326| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2327| 0| Value |= (op & UINT64_C(3)) << 11; 2328| | // op: rs 2329| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 2330| 0| Value |= (op & UINT64_C(31)) << 21; 2331| | // op: rt 2332| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 2333| 0| Value |= (op & UINT64_C(31)) << 16; 2334| 0| break; 2335| 0| } 2336| 0| case Mips::SHILO: { ------------------ | Branch (2336:5): [True: 0, False: 8.24k] ------------------ 2337| | // op: ac 2338| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2339| 0| Value |= (op & UINT64_C(3)) << 11; 2340| | // op: shift 2341| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 2342| 0| Value |= (op & UINT64_C(63)) << 20; 2343| 0| break; 2344| 0| } 2345| 0| case Mips::LD_B: ------------------ | Branch (2345:5): [True: 0, False: 8.24k] ------------------ 2346| 0| case Mips::LD_D: ------------------ | Branch (2346:5): [True: 0, False: 8.24k] ------------------ 2347| 0| case Mips::LD_H: ------------------ | Branch (2347:5): [True: 0, False: 8.24k] ------------------ 2348| 0| case Mips::LD_W: ------------------ | Branch (2348:5): [True: 0, False: 8.24k] ------------------ 2349| 0| case Mips::ST_B: ------------------ | Branch (2349:5): [True: 0, False: 8.24k] ------------------ 2350| 0| case Mips::ST_D: ------------------ | Branch (2350:5): [True: 0, False: 8.24k] ------------------ 2351| 0| case Mips::ST_H: ------------------ | Branch (2351:5): [True: 0, False: 8.24k] ------------------ 2352| 0| case Mips::ST_W: { ------------------ | Branch (2352:5): [True: 0, False: 8.24k] ------------------ 2353| | // op: addr 2354| 0| op = getMSAMemEncoding(MI, 1, Fixups, STI); 2355| 0| Value |= (op & UINT64_C(1023)) << 16; 2356| 0| Value |= (op & UINT64_C(2031616)) >> 5; 2357| | // op: wd 2358| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2359| 0| Value |= (op & UINT64_C(31)) << 6; 2360| 0| break; 2361| 0| } 2362| 0| case Mips::CACHEE: ------------------ | Branch (2362:5): [True: 0, False: 8.24k] ------------------ 2363| 0| case Mips::CACHE_R6: ------------------ | Branch (2363:5): [True: 0, False: 8.24k] ------------------ 2364| 0| case Mips::PREFE: ------------------ | Branch (2364:5): [True: 0, False: 8.24k] ------------------ 2365| 0| case Mips::PREF_R6: { ------------------ | Branch (2365:5): [True: 0, False: 8.24k] ------------------ 2366| | // op: addr 2367| 0| op = getMemEncoding(MI, 0, Fixups, STI); 2368| 0| Value |= (op & UINT64_C(2031616)) << 5; 2369| 0| Value |= (op & UINT64_C(511)) << 7; 2370| | // op: hint 2371| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 2372| 0| Value |= (op & UINT64_C(31)) << 16; 2373| 0| break; 2374| 0| } 2375| 0| case Mips::SYNCI: { ------------------ | Branch (2375:5): [True: 0, False: 8.24k] ------------------ 2376| | // op: addr 2377| 0| op = getMemEncoding(MI, 0, Fixups, STI); 2378| 0| Value |= (op & UINT64_C(2031616)) << 5; 2379| 0| Value |= op & UINT64_C(65535); 2380| 0| break; 2381| 0| } 2382| 0| case Mips::CACHE: ------------------ | Branch (2382:5): [True: 0, False: 8.24k] ------------------ 2383| 0| case Mips::PREF: { ------------------ | Branch (2383:5): [True: 0, False: 8.24k] ------------------ 2384| | // op: addr 2385| 0| op = getMemEncoding(MI, 0, Fixups, STI); 2386| 0| Value |= (op & UINT64_C(2031616)) << 5; 2387| 0| Value |= op & UINT64_C(65535); 2388| | // op: hint 2389| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 2390| 0| Value |= (op & UINT64_C(31)) << 16; 2391| 0| break; 2392| 0| } 2393| 0| case Mips::SYNCI_MMR6: { ------------------ | Branch (2393:5): [True: 0, False: 8.24k] ------------------ 2394| | // op: addr 2395| 0| op = getMemEncoding(MI, 0, Fixups, STI); 2396| 0| Value |= op & UINT64_C(2097151); 2397| 0| break; 2398| 0| } 2399| 0| case Mips::LBE: ------------------ | Branch (2399:5): [True: 0, False: 8.24k] ------------------ 2400| 0| case Mips::LBuE: ------------------ | Branch (2400:5): [True: 0, False: 8.24k] ------------------ 2401| 0| case Mips::LHE: ------------------ | Branch (2401:5): [True: 0, False: 8.24k] ------------------ 2402| 0| case Mips::LHuE: ------------------ | Branch (2402:5): [True: 0, False: 8.24k] ------------------ 2403| 0| case Mips::LLE: ------------------ | Branch (2403:5): [True: 0, False: 8.24k] ------------------ 2404| 0| case Mips::LWE: ------------------ | Branch (2404:5): [True: 0, False: 8.24k] ------------------ 2405| 0| case Mips::LWLE: ------------------ | Branch (2405:5): [True: 0, False: 8.24k] ------------------ 2406| 0| case Mips::LWRE: ------------------ | Branch (2406:5): [True: 0, False: 8.24k] ------------------ 2407| 0| case Mips::SBE: ------------------ | Branch (2407:5): [True: 0, False: 8.24k] ------------------ 2408| 0| case Mips::SHE: ------------------ | Branch (2408:5): [True: 0, False: 8.24k] ------------------ 2409| 0| case Mips::SWE: ------------------ | Branch (2409:5): [True: 0, False: 8.24k] ------------------ 2410| 0| case Mips::SWLE: ------------------ | Branch (2410:5): [True: 0, False: 8.24k] ------------------ 2411| 0| case Mips::SWRE: { ------------------ | Branch (2411:5): [True: 0, False: 8.24k] ------------------ 2412| | // op: addr 2413| 0| op = getMemEncoding(MI, 1, Fixups, STI); 2414| 0| Value |= (op & UINT64_C(2031616)) << 5; 2415| 0| Value |= (op & UINT64_C(511)) << 7; 2416| | // op: hint 2417| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2418| 0| Value |= (op & UINT64_C(31)) << 16; 2419| 0| break; 2420| 0| } 2421| 0| case Mips::SCE: { ------------------ | Branch (2421:5): [True: 0, False: 8.24k] ------------------ 2422| | // op: addr 2423| 0| op = getMemEncoding(MI, 2, Fixups, STI); 2424| 0| Value |= (op & UINT64_C(2031616)) << 5; 2425| 0| Value |= (op & UINT64_C(511)) << 7; 2426| | // op: hint 2427| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2428| 0| Value |= (op & UINT64_C(31)) << 16; 2429| 0| break; 2430| 0| } 2431| 0| case Mips::CACHE_MM: ------------------ | Branch (2431:5): [True: 0, False: 8.24k] ------------------ 2432| 0| case Mips::CACHE_MMR6: ------------------ | Branch (2432:5): [True: 0, False: 8.24k] ------------------ 2433| 0| case Mips::PREF_MM: ------------------ | Branch (2433:5): [True: 0, False: 8.24k] ------------------ 2434| 0| case Mips::PREF_MMR6: { ------------------ | Branch (2434:5): [True: 0, False: 8.24k] ------------------ 2435| | // op: addr 2436| 0| op = getMemEncodingMMImm12(MI, 0, Fixups, STI); 2437| 0| Value |= op & UINT64_C(2031616); 2438| 0| Value |= op & UINT64_C(4095); 2439| | // op: hint 2440| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 2441| 0| Value |= (op & UINT64_C(31)) << 21; 2442| 0| break; 2443| 0| } 2444| 0| case Mips::LBU_MMR6: ------------------ | Branch (2444:5): [True: 0, False: 8.24k] ------------------ 2445| 0| case Mips::LB_MMR6: { ------------------ | Branch (2445:5): [True: 0, False: 8.24k] ------------------ 2446| | // op: addr 2447| 0| op = getMemEncodingMMImm16(MI, 1, Fixups, STI); 2448| 0| Value |= op & UINT64_C(2097151); 2449| | // op: rt 2450| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2451| 0| Value |= (op & UINT64_C(31)) << 21; 2452| 0| break; 2453| 0| } 2454| 0| case Mips::CACHEE_MM: ------------------ | Branch (2454:5): [True: 0, False: 8.24k] ------------------ 2455| 0| case Mips::CACHEE_MMR6: ------------------ | Branch (2455:5): [True: 0, False: 8.24k] ------------------ 2456| 0| case Mips::PREFE_MM: ------------------ | Branch (2456:5): [True: 0, False: 8.24k] ------------------ 2457| 0| case Mips::PREFE_MMR6: { ------------------ | Branch (2457:5): [True: 0, False: 8.24k] ------------------ 2458| | // op: addr 2459| 0| op = getMemEncodingMMImm9(MI, 0, Fixups, STI); 2460| 0| Value |= op & UINT64_C(2031616); 2461| 0| Value |= op & UINT64_C(511); 2462| | // op: hint 2463| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 2464| 0| Value |= (op & UINT64_C(31)) << 21; 2465| 0| break; 2466| 0| } 2467| 0| case Mips::LBE_MMR6: ------------------ | Branch (2467:5): [True: 0, False: 8.24k] ------------------ 2468| 0| case Mips::LBUE_MMR6: { ------------------ | Branch (2468:5): [True: 0, False: 8.24k] ------------------ 2469| | // op: addr 2470| 0| op = getMemEncodingMMImm9(MI, 1, Fixups, STI); 2471| 0| Value |= op & UINT64_C(2031616); 2472| 0| Value |= op & UINT64_C(511); 2473| | // op: rt 2474| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2475| 0| Value |= (op & UINT64_C(31)) << 21; 2476| 0| break; 2477| 0| } 2478| 0| case Mips::SDBBP_MM: ------------------ | Branch (2478:5): [True: 0, False: 8.24k] ------------------ 2479| 0| case Mips::SDBBP_MMR6: ------------------ | Branch (2479:5): [True: 0, False: 8.24k] ------------------ 2480| 0| case Mips::SYSCALL_MM: ------------------ | Branch (2480:5): [True: 0, False: 8.24k] ------------------ 2481| 0| case Mips::WAIT_MM: ------------------ | Branch (2481:5): [True: 0, False: 8.24k] ------------------ 2482| 0| case Mips::WAIT_MMR6: { ------------------ | Branch (2482:5): [True: 0, False: 8.24k] ------------------ 2483| | // op: code_ 2484| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2485| 0| Value |= (op & UINT64_C(1023)) << 16; 2486| 0| break; 2487| 0| } 2488| 0| case Mips::SDBBP: ------------------ | Branch (2488:5): [True: 0, False: 8.24k] ------------------ 2489| 0| case Mips::SDBBP_R6: ------------------ | Branch (2489:5): [True: 0, False: 8.24k] ------------------ 2490| 0| case Mips::SYSCALL: { ------------------ | Branch (2490:5): [True: 0, False: 8.24k] ------------------ 2491| | // op: code_ 2492| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2493| 0| Value |= (op & UINT64_C(1048575)) << 6; 2494| 0| break; 2495| 0| } 2496| 0| case Mips::BREAK16_MMR6: ------------------ | Branch (2496:5): [True: 0, False: 8.24k] ------------------ 2497| 0| case Mips::SDBBP16_MMR6: { ------------------ | Branch (2497:5): [True: 0, False: 8.24k] ------------------ 2498| | // op: code_ 2499| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2500| 0| Value |= (op & UINT64_C(15)) << 6; 2501| 0| break; 2502| 0| } 2503| 0| case Mips::BREAK16_MM: ------------------ | Branch (2503:5): [True: 0, False: 8.24k] ------------------ 2504| 0| case Mips::SDBBP16_MM: { ------------------ | Branch (2504:5): [True: 0, False: 8.24k] ------------------ 2505| | // op: code_ 2506| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2507| 0| Value |= op & UINT64_C(15); 2508| 0| break; 2509| 0| } 2510| 0| case Mips::BREAK: ------------------ | Branch (2510:5): [True: 0, False: 8.24k] ------------------ 2511| 0| case Mips::BREAK_MM: ------------------ | Branch (2511:5): [True: 0, False: 8.24k] ------------------ 2512| 0| case Mips::BREAK_MMR6: { ------------------ | Branch (2512:5): [True: 0, False: 8.24k] ------------------ 2513| | // op: code_1 2514| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2515| 0| Value |= (op & UINT64_C(1023)) << 16; 2516| | // op: code_2 2517| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 2518| 0| Value |= (op & UINT64_C(1023)) << 6; 2519| 0| break; 2520| 0| } 2521| 0| case Mips::BC2EQZ: ------------------ | Branch (2521:5): [True: 0, False: 8.24k] ------------------ 2522| 0| case Mips::BC2NEZ: { ------------------ | Branch (2522:5): [True: 0, False: 8.24k] ------------------ 2523| | // op: ct 2524| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2525| 0| Value |= (op & UINT64_C(31)) << 16; 2526| | // op: offset 2527| 0| op = getBranchTargetOpValue(MI, 1, Fixups, STI); 2528| 0| Value |= op & UINT64_C(65535); 2529| 0| break; 2530| 0| } 2531| 0| case Mips::MOVEP_MM: { ------------------ | Branch (2531:5): [True: 0, False: 8.24k] ------------------ 2532| | // op: dst_regs 2533| 0| op = getMovePRegPairOpValue(MI, 0, Fixups, STI); 2534| 0| Value |= (op & UINT64_C(7)) << 7; 2535| | // op: rt 2536| 0| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 2537| 0| Value |= (op & UINT64_C(7)) << 4; 2538| | // op: rs 2539| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 2540| 0| Value |= (op & UINT64_C(7)) << 1; 2541| 0| break; 2542| 0| } 2543| 0| case Mips::BC1F: ------------------ | Branch (2543:5): [True: 0, False: 8.24k] ------------------ 2544| 0| case Mips::BC1FL: ------------------ | Branch (2544:5): [True: 0, False: 8.24k] ------------------ 2545| 0| case Mips::BC1T: ------------------ | Branch (2545:5): [True: 0, False: 8.24k] ------------------ 2546| 0| case Mips::BC1TL: { ------------------ | Branch (2546:5): [True: 0, False: 8.24k] ------------------ 2547| | // op: fcc 2548| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2549| 0| Value |= (op & UINT64_C(7)) << 18; 2550| | // op: offset 2551| 0| op = getBranchTargetOpValue(MI, 1, Fixups, STI); 2552| 0| Value |= op & UINT64_C(65535); 2553| 0| break; 2554| 0| } 2555| 0| case Mips::LUXC1_MM: ------------------ | Branch (2555:5): [True: 0, False: 8.24k] ------------------ 2556| 0| case Mips::LWXC1_MM: { ------------------ | Branch (2556:5): [True: 0, False: 8.24k] ------------------ 2557| | // op: fd 2558| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2559| 0| Value |= (op & UINT64_C(31)) << 11; 2560| | // op: base 2561| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 2562| 0| Value |= (op & UINT64_C(31)) << 16; 2563| | // op: index 2564| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 2565| 0| Value |= (op & UINT64_C(31)) << 21; 2566| 0| break; 2567| 0| } 2568| 0| case Mips::MOVN_I_D32_MM: ------------------ | Branch (2568:5): [True: 0, False: 8.24k] ------------------ 2569| 0| case Mips::MOVN_I_S_MM: ------------------ | Branch (2569:5): [True: 0, False: 8.24k] ------------------ 2570| 0| case Mips::MOVZ_I_D32_MM: ------------------ | Branch (2570:5): [True: 0, False: 8.24k] ------------------ 2571| 0| case Mips::MOVZ_I_S_MM: { ------------------ | Branch (2571:5): [True: 0, False: 8.24k] ------------------ 2572| | // op: fd 2573| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2574| 0| Value |= (op & UINT64_C(31)) << 11; 2575| | // op: fs 2576| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 2577| 0| Value |= (op & UINT64_C(31)) << 16; 2578| | // op: rt 2579| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 2580| 0| Value |= (op & UINT64_C(31)) << 21; 2581| 0| break; 2582| 0| } 2583| 0| case Mips::CEIL_W_MM: ------------------ | Branch (2583:5): [True: 0, False: 8.24k] ------------------ 2584| 0| case Mips::CEIL_W_S_MM: ------------------ | Branch (2584:5): [True: 0, False: 8.24k] ------------------ 2585| 0| case Mips::CVT_D32_W_MM: ------------------ | Branch (2585:5): [True: 0, False: 8.24k] ------------------ 2586| 0| case Mips::CVT_D_S_MM: ------------------ | Branch (2586:5): [True: 0, False: 8.24k] ------------------ 2587| 0| case Mips::CVT_L_D64_MM: ------------------ | Branch (2587:5): [True: 0, False: 8.24k] ------------------ 2588| 0| case Mips::CVT_L_S_MM: ------------------ | Branch (2588:5): [True: 0, False: 8.24k] ------------------ 2589| 0| case Mips::CVT_S_D32_MM: ------------------ | Branch (2589:5): [True: 0, False: 8.24k] ------------------ 2590| 0| case Mips::CVT_S_W_MM: ------------------ | Branch (2590:5): [True: 0, False: 8.24k] ------------------ 2591| 0| case Mips::CVT_W_MM: ------------------ | Branch (2591:5): [True: 0, False: 8.24k] ------------------ 2592| 0| case Mips::CVT_W_S_MM: ------------------ | Branch (2592:5): [True: 0, False: 8.24k] ------------------ 2593| 0| case Mips::FABS_MM: ------------------ | Branch (2593:5): [True: 0, False: 8.24k] ------------------ 2594| 0| case Mips::FABS_S_MM: ------------------ | Branch (2594:5): [True: 0, False: 8.24k] ------------------ 2595| 0| case Mips::FLOOR_W_MM: ------------------ | Branch (2595:5): [True: 0, False: 8.24k] ------------------ 2596| 0| case Mips::FLOOR_W_S_MM: ------------------ | Branch (2596:5): [True: 0, False: 8.24k] ------------------ 2597| 0| case Mips::FMOV_D32_MM: ------------------ | Branch (2597:5): [True: 0, False: 8.24k] ------------------ 2598| 0| case Mips::FMOV_S_MM: ------------------ | Branch (2598:5): [True: 0, False: 8.24k] ------------------ 2599| 0| case Mips::FNEG_MM: ------------------ | Branch (2599:5): [True: 0, False: 8.24k] ------------------ 2600| 0| case Mips::FNEG_S_MM: ------------------ | Branch (2600:5): [True: 0, False: 8.24k] ------------------ 2601| 0| case Mips::FSQRT_MM: ------------------ | Branch (2601:5): [True: 0, False: 8.24k] ------------------ 2602| 0| case Mips::FSQRT_S_MM: ------------------ | Branch (2602:5): [True: 0, False: 8.24k] ------------------ 2603| 0| case Mips::MOVF_D32_MM: ------------------ | Branch (2603:5): [True: 0, False: 8.24k] ------------------ 2604| 0| case Mips::MOVF_S_MM: ------------------ | Branch (2604:5): [True: 0, False: 8.24k] ------------------ 2605| 0| case Mips::MOVT_D32_MM: ------------------ | Branch (2605:5): [True: 0, False: 8.24k] ------------------ 2606| 0| case Mips::MOVT_S_MM: ------------------ | Branch (2606:5): [True: 0, False: 8.24k] ------------------ 2607| 0| case Mips::ROUND_W_MM: ------------------ | Branch (2607:5): [True: 0, False: 8.24k] ------------------ 2608| 0| case Mips::ROUND_W_S_MM: ------------------ | Branch (2608:5): [True: 0, False: 8.24k] ------------------ 2609| 0| case Mips::TRUNC_W_MM: ------------------ | Branch (2609:5): [True: 0, False: 8.24k] ------------------ 2610| 0| case Mips::TRUNC_W_S_MM: { ------------------ | Branch (2610:5): [True: 0, False: 8.24k] ------------------ 2611| | // op: fd 2612| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2613| 0| Value |= (op & UINT64_C(31)) << 21; 2614| | // op: fs 2615| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 2616| 0| Value |= (op & UINT64_C(31)) << 16; 2617| 0| break; 2618| 0| } 2619| 0| case Mips::LDXC1: ------------------ | Branch (2619:5): [True: 0, False: 8.24k] ------------------ 2620| 0| case Mips::LDXC164: ------------------ | Branch (2620:5): [True: 0, False: 8.24k] ------------------ 2621| 0| case Mips::LUXC1: ------------------ | Branch (2621:5): [True: 0, False: 8.24k] ------------------ 2622| 0| case Mips::LUXC164: ------------------ | Branch (2622:5): [True: 0, False: 8.24k] ------------------ 2623| 0| case Mips::LWXC1: { ------------------ | Branch (2623:5): [True: 0, False: 8.24k] ------------------ 2624| | // op: fd 2625| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2626| 0| Value |= (op & UINT64_C(31)) << 6; 2627| | // op: base 2628| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 2629| 0| Value |= (op & UINT64_C(31)) << 21; 2630| | // op: index 2631| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 2632| 0| Value |= (op & UINT64_C(31)) << 16; 2633| 0| break; 2634| 0| } 2635| 0| case Mips::MADD_D32: ------------------ | Branch (2635:5): [True: 0, False: 8.24k] ------------------ 2636| 0| case Mips::MADD_D64: ------------------ | Branch (2636:5): [True: 0, False: 8.24k] ------------------ 2637| 0| case Mips::MADD_S: ------------------ | Branch (2637:5): [True: 0, False: 8.24k] ------------------ 2638| 0| case Mips::MSUB_D32: ------------------ | Branch (2638:5): [True: 0, False: 8.24k] ------------------ 2639| 0| case Mips::MSUB_D64: ------------------ | Branch (2639:5): [True: 0, False: 8.24k] ------------------ 2640| 0| case Mips::MSUB_S: ------------------ | Branch (2640:5): [True: 0, False: 8.24k] ------------------ 2641| 0| case Mips::NMADD_D32: ------------------ | Branch (2641:5): [True: 0, False: 8.24k] ------------------ 2642| 0| case Mips::NMADD_D64: ------------------ | Branch (2642:5): [True: 0, False: 8.24k] ------------------ 2643| 0| case Mips::NMADD_S: ------------------ | Branch (2643:5): [True: 0, False: 8.24k] ------------------ 2644| 0| case Mips::NMSUB_D32: ------------------ | Branch (2644:5): [True: 0, False: 8.24k] ------------------ 2645| 0| case Mips::NMSUB_D64: ------------------ | Branch (2645:5): [True: 0, False: 8.24k] ------------------ 2646| 0| case Mips::NMSUB_S: { ------------------ | Branch (2646:5): [True: 0, False: 8.24k] ------------------ 2647| | // op: fd 2648| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2649| 0| Value |= (op & UINT64_C(31)) << 6; 2650| | // op: fr 2651| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 2652| 0| Value |= (op & UINT64_C(31)) << 21; 2653| | // op: fs 2654| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 2655| 0| Value |= (op & UINT64_C(31)) << 11; 2656| | // op: ft 2657| 0| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 2658| 0| Value |= (op & UINT64_C(31)) << 16; 2659| 0| break; 2660| 0| } 2661| 0| case Mips::CEIL_L_D64: ------------------ | Branch (2661:5): [True: 0, False: 8.24k] ------------------ 2662| 0| case Mips::CEIL_L_S: ------------------ | Branch (2662:5): [True: 0, False: 8.24k] ------------------ 2663| 0| case Mips::CEIL_W_D32: ------------------ | Branch (2663:5): [True: 0, False: 8.24k] ------------------ 2664| 0| case Mips::CEIL_W_D64: ------------------ | Branch (2664:5): [True: 0, False: 8.24k] ------------------ 2665| 0| case Mips::CEIL_W_S: ------------------ | Branch (2665:5): [True: 0, False: 8.24k] ------------------ 2666| 0| case Mips::CVT_D32_S: ------------------ | Branch (2666:5): [True: 0, False: 8.24k] ------------------ 2667| 0| case Mips::CVT_D32_W: ------------------ | Branch (2667:5): [True: 0, False: 8.24k] ------------------ 2668| 0| case Mips::CVT_D64_L: ------------------ | Branch (2668:5): [True: 0, False: 8.24k] ------------------ 2669| 0| case Mips::CVT_D64_S: ------------------ | Branch (2669:5): [True: 0, False: 8.24k] ------------------ 2670| 0| case Mips::CVT_D64_W: ------------------ | Branch (2670:5): [True: 0, False: 8.24k] ------------------ 2671| 0| case Mips::CVT_L_D64: ------------------ | Branch (2671:5): [True: 0, False: 8.24k] ------------------ 2672| 0| case Mips::CVT_L_S: ------------------ | Branch (2672:5): [True: 0, False: 8.24k] ------------------ 2673| 0| case Mips::CVT_S_D32: ------------------ | Branch (2673:5): [True: 0, False: 8.24k] ------------------ 2674| 0| case Mips::CVT_S_D64: ------------------ | Branch (2674:5): [True: 0, False: 8.24k] ------------------ 2675| 0| case Mips::CVT_S_L: ------------------ | Branch (2675:5): [True: 0, False: 8.24k] ------------------ 2676| 0| case Mips::CVT_S_W: ------------------ | Branch (2676:5): [True: 0, False: 8.24k] ------------------ 2677| 0| case Mips::CVT_W_D32: ------------------ | Branch (2677:5): [True: 0, False: 8.24k] ------------------ 2678| 0| case Mips::CVT_W_D64: ------------------ | Branch (2678:5): [True: 0, False: 8.24k] ------------------ 2679| 0| case Mips::CVT_W_S: ------------------ | Branch (2679:5): [True: 0, False: 8.24k] ------------------ 2680| 0| case Mips::FABS_D32: ------------------ | Branch (2680:5): [True: 0, False: 8.24k] ------------------ 2681| 0| case Mips::FABS_D64: ------------------ | Branch (2681:5): [True: 0, False: 8.24k] ------------------ 2682| 0| case Mips::FABS_S: ------------------ | Branch (2682:5): [True: 0, False: 8.24k] ------------------ 2683| 0| case Mips::FLOOR_L_D64: ------------------ | Branch (2683:5): [True: 0, False: 8.24k] ------------------ 2684| 0| case Mips::FLOOR_L_S: ------------------ | Branch (2684:5): [True: 0, False: 8.24k] ------------------ 2685| 0| case Mips::FLOOR_W_D32: ------------------ | Branch (2685:5): [True: 0, False: 8.24k] ------------------ 2686| 0| case Mips::FLOOR_W_D64: ------------------ | Branch (2686:5): [True: 0, False: 8.24k] ------------------ 2687| 0| case Mips::FLOOR_W_S: ------------------ | Branch (2687:5): [True: 0, False: 8.24k] ------------------ 2688| 0| case Mips::FMOV_D32: ------------------ | Branch (2688:5): [True: 0, False: 8.24k] ------------------ 2689| 0| case Mips::FMOV_D64: ------------------ | Branch (2689:5): [True: 0, False: 8.24k] ------------------ 2690| 0| case Mips::FMOV_S: ------------------ | Branch (2690:5): [True: 0, False: 8.24k] ------------------ 2691| 0| case Mips::FNEG_D32: ------------------ | Branch (2691:5): [True: 0, False: 8.24k] ------------------ 2692| 0| case Mips::FNEG_D64: ------------------ | Branch (2692:5): [True: 0, False: 8.24k] ------------------ 2693| 0| case Mips::FNEG_S: ------------------ | Branch (2693:5): [True: 0, False: 8.24k] ------------------ 2694| 0| case Mips::FSQRT_D32: ------------------ | Branch (2694:5): [True: 0, False: 8.24k] ------------------ 2695| 0| case Mips::FSQRT_D64: ------------------ | Branch (2695:5): [True: 0, False: 8.24k] ------------------ 2696| 0| case Mips::FSQRT_S: ------------------ | Branch (2696:5): [True: 0, False: 8.24k] ------------------ 2697| 0| case Mips::ROUND_L_D64: ------------------ | Branch (2697:5): [True: 0, False: 8.24k] ------------------ 2698| 0| case Mips::ROUND_L_S: ------------------ | Branch (2698:5): [True: 0, False: 8.24k] ------------------ 2699| 0| case Mips::ROUND_W_D32: ------------------ | Branch (2699:5): [True: 0, False: 8.24k] ------------------ 2700| 0| case Mips::ROUND_W_D64: ------------------ | Branch (2700:5): [True: 0, False: 8.24k] ------------------ 2701| 0| case Mips::ROUND_W_S: ------------------ | Branch (2701:5): [True: 0, False: 8.24k] ------------------ 2702| 0| case Mips::TRUNC_L_D64: ------------------ | Branch (2702:5): [True: 0, False: 8.24k] ------------------ 2703| 0| case Mips::TRUNC_L_S: ------------------ | Branch (2703:5): [True: 0, False: 8.24k] ------------------ 2704| 0| case Mips::TRUNC_W_D32: ------------------ | Branch (2704:5): [True: 0, False: 8.24k] ------------------ 2705| 0| case Mips::TRUNC_W_D64: ------------------ | Branch (2705:5): [True: 0, False: 8.24k] ------------------ 2706| 0| case Mips::TRUNC_W_S: { ------------------ | Branch (2706:5): [True: 0, False: 8.24k] ------------------ 2707| | // op: fd 2708| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2709| 0| Value |= (op & UINT64_C(31)) << 6; 2710| | // op: fs 2711| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 2712| 0| Value |= (op & UINT64_C(31)) << 11; 2713| 0| break; 2714| 0| } 2715| 0| case Mips::MOVF_D32: ------------------ | Branch (2715:5): [True: 0, False: 8.24k] ------------------ 2716| 0| case Mips::MOVF_D64: ------------------ | Branch (2716:5): [True: 0, False: 8.24k] ------------------ 2717| 0| case Mips::MOVF_S: ------------------ | Branch (2717:5): [True: 0, False: 8.24k] ------------------ 2718| 0| case Mips::MOVT_D32: ------------------ | Branch (2718:5): [True: 0, False: 8.24k] ------------------ 2719| 0| case Mips::MOVT_D64: ------------------ | Branch (2719:5): [True: 0, False: 8.24k] ------------------ 2720| 0| case Mips::MOVT_S: { ------------------ | Branch (2720:5): [True: 0, False: 8.24k] ------------------ 2721| | // op: fd 2722| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2723| 0| Value |= (op & UINT64_C(31)) << 6; 2724| | // op: fs 2725| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 2726| 0| Value |= (op & UINT64_C(31)) << 11; 2727| | // op: fcc 2728| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 2729| 0| Value |= (op & UINT64_C(7)) << 18; 2730| 0| break; 2731| 0| } 2732| 0| case Mips::CMP_EQ_D: ------------------ | Branch (2732:5): [True: 0, False: 8.24k] ------------------ 2733| 0| case Mips::CMP_EQ_S: ------------------ | Branch (2733:5): [True: 0, False: 8.24k] ------------------ 2734| 0| case Mips::CMP_F_D: ------------------ | Branch (2734:5): [True: 0, False: 8.24k] ------------------ 2735| 0| case Mips::CMP_F_S: ------------------ | Branch (2735:5): [True: 0, False: 8.24k] ------------------ 2736| 0| case Mips::CMP_LE_D: ------------------ | Branch (2736:5): [True: 0, False: 8.24k] ------------------ 2737| 0| case Mips::CMP_LE_S: ------------------ | Branch (2737:5): [True: 0, False: 8.24k] ------------------ 2738| 0| case Mips::CMP_LT_D: ------------------ | Branch (2738:5): [True: 0, False: 8.24k] ------------------ 2739| 0| case Mips::CMP_LT_S: ------------------ | Branch (2739:5): [True: 0, False: 8.24k] ------------------ 2740| 0| case Mips::CMP_SAF_D: ------------------ | Branch (2740:5): [True: 0, False: 8.24k] ------------------ 2741| 0| case Mips::CMP_SAF_S: ------------------ | Branch (2741:5): [True: 0, False: 8.24k] ------------------ 2742| 0| case Mips::CMP_SEQ_D: ------------------ | Branch (2742:5): [True: 0, False: 8.24k] ------------------ 2743| 0| case Mips::CMP_SEQ_S: ------------------ | Branch (2743:5): [True: 0, False: 8.24k] ------------------ 2744| 0| case Mips::CMP_SLE_D: ------------------ | Branch (2744:5): [True: 0, False: 8.24k] ------------------ 2745| 0| case Mips::CMP_SLE_S: ------------------ | Branch (2745:5): [True: 0, False: 8.24k] ------------------ 2746| 0| case Mips::CMP_SLT_D: ------------------ | Branch (2746:5): [True: 0, False: 8.24k] ------------------ 2747| 0| case Mips::CMP_SLT_S: ------------------ | Branch (2747:5): [True: 0, False: 8.24k] ------------------ 2748| 0| case Mips::CMP_SUEQ_D: ------------------ | Branch (2748:5): [True: 0, False: 8.24k] ------------------ 2749| 0| case Mips::CMP_SUEQ_S: ------------------ | Branch (2749:5): [True: 0, False: 8.24k] ------------------ 2750| 0| case Mips::CMP_SULE_D: ------------------ | Branch (2750:5): [True: 0, False: 8.24k] ------------------ 2751| 0| case Mips::CMP_SULE_S: ------------------ | Branch (2751:5): [True: 0, False: 8.24k] ------------------ 2752| 0| case Mips::CMP_SULT_D: ------------------ | Branch (2752:5): [True: 0, False: 8.24k] ------------------ 2753| 0| case Mips::CMP_SULT_S: ------------------ | Branch (2753:5): [True: 0, False: 8.24k] ------------------ 2754| 0| case Mips::CMP_SUN_D: ------------------ | Branch (2754:5): [True: 0, False: 8.24k] ------------------ 2755| 0| case Mips::CMP_SUN_S: ------------------ | Branch (2755:5): [True: 0, False: 8.24k] ------------------ 2756| 0| case Mips::CMP_UEQ_D: ------------------ | Branch (2756:5): [True: 0, False: 8.24k] ------------------ 2757| 0| case Mips::CMP_UEQ_S: ------------------ | Branch (2757:5): [True: 0, False: 8.24k] ------------------ 2758| 0| case Mips::CMP_ULE_D: ------------------ | Branch (2758:5): [True: 0, False: 8.24k] ------------------ 2759| 0| case Mips::CMP_ULE_S: ------------------ | Branch (2759:5): [True: 0, False: 8.24k] ------------------ 2760| 0| case Mips::CMP_ULT_D: ------------------ | Branch (2760:5): [True: 0, False: 8.24k] ------------------ 2761| 0| case Mips::CMP_ULT_S: ------------------ | Branch (2761:5): [True: 0, False: 8.24k] ------------------ 2762| 0| case Mips::CMP_UN_D: ------------------ | Branch (2762:5): [True: 0, False: 8.24k] ------------------ 2763| 0| case Mips::CMP_UN_S: ------------------ | Branch (2763:5): [True: 0, False: 8.24k] ------------------ 2764| 0| case Mips::FADD_D32: ------------------ | Branch (2764:5): [True: 0, False: 8.24k] ------------------ 2765| 0| case Mips::FADD_D64: ------------------ | Branch (2765:5): [True: 0, False: 8.24k] ------------------ 2766| 0| case Mips::FADD_S: ------------------ | Branch (2766:5): [True: 0, False: 8.24k] ------------------ 2767| 0| case Mips::FDIV_D32: ------------------ | Branch (2767:5): [True: 0, False: 8.24k] ------------------ 2768| 0| case Mips::FDIV_D64: ------------------ | Branch (2768:5): [True: 0, False: 8.24k] ------------------ 2769| 0| case Mips::FDIV_S: ------------------ | Branch (2769:5): [True: 0, False: 8.24k] ------------------ 2770| 0| case Mips::FMUL_D32: ------------------ | Branch (2770:5): [True: 0, False: 8.24k] ------------------ 2771| 0| case Mips::FMUL_D64: ------------------ | Branch (2771:5): [True: 0, False: 8.24k] ------------------ 2772| 0| case Mips::FMUL_S: ------------------ | Branch (2772:5): [True: 0, False: 8.24k] ------------------ 2773| 0| case Mips::FSUB_D32: ------------------ | Branch (2773:5): [True: 0, False: 8.24k] ------------------ 2774| 0| case Mips::FSUB_D64: ------------------ | Branch (2774:5): [True: 0, False: 8.24k] ------------------ 2775| 0| case Mips::FSUB_S: { ------------------ | Branch (2775:5): [True: 0, False: 8.24k] ------------------ 2776| | // op: fd 2777| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2778| 0| Value |= (op & UINT64_C(31)) << 6; 2779| | // op: fs 2780| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 2781| 0| Value |= (op & UINT64_C(31)) << 11; 2782| | // op: ft 2783| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 2784| 0| Value |= (op & UINT64_C(31)) << 16; 2785| 0| break; 2786| 0| } 2787| 0| case Mips::MOVN_I64_D64: ------------------ | Branch (2787:5): [True: 0, False: 8.24k] ------------------ 2788| 0| case Mips::MOVN_I64_S: ------------------ | Branch (2788:5): [True: 0, False: 8.24k] ------------------ 2789| 0| case Mips::MOVN_I_D32: ------------------ | Branch (2789:5): [True: 0, False: 8.24k] ------------------ 2790| 0| case Mips::MOVN_I_D64: ------------------ | Branch (2790:5): [True: 0, False: 8.24k] ------------------ 2791| 0| case Mips::MOVN_I_S: ------------------ | Branch (2791:5): [True: 0, False: 8.24k] ------------------ 2792| 0| case Mips::MOVZ_I64_D64: ------------------ | Branch (2792:5): [True: 0, False: 8.24k] ------------------ 2793| 0| case Mips::MOVZ_I64_S: ------------------ | Branch (2793:5): [True: 0, False: 8.24k] ------------------ 2794| 0| case Mips::MOVZ_I_D32: ------------------ | Branch (2794:5): [True: 0, False: 8.24k] ------------------ 2795| 0| case Mips::MOVZ_I_D64: ------------------ | Branch (2795:5): [True: 0, False: 8.24k] ------------------ 2796| 0| case Mips::MOVZ_I_S: { ------------------ | Branch (2796:5): [True: 0, False: 8.24k] ------------------ 2797| | // op: fd 2798| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2799| 0| Value |= (op & UINT64_C(31)) << 6; 2800| | // op: fs 2801| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 2802| 0| Value |= (op & UINT64_C(31)) << 11; 2803| | // op: rt 2804| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 2805| 0| Value |= (op & UINT64_C(31)) << 16; 2806| 0| break; 2807| 0| } 2808| 0| case Mips::SUXC1_MM: ------------------ | Branch (2808:5): [True: 0, False: 8.24k] ------------------ 2809| 0| case Mips::SWXC1_MM: { ------------------ | Branch (2809:5): [True: 0, False: 8.24k] ------------------ 2810| | // op: fs 2811| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2812| 0| Value |= (op & UINT64_C(31)) << 11; 2813| | // op: base 2814| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 2815| 0| Value |= (op & UINT64_C(31)) << 16; 2816| | // op: index 2817| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 2818| 0| Value |= (op & UINT64_C(31)) << 21; 2819| 0| break; 2820| 0| } 2821| 0| case Mips::SDXC1: ------------------ | Branch (2821:5): [True: 0, False: 8.24k] ------------------ 2822| 0| case Mips::SDXC164: ------------------ | Branch (2822:5): [True: 0, False: 8.24k] ------------------ 2823| 0| case Mips::SUXC1: ------------------ | Branch (2823:5): [True: 0, False: 8.24k] ------------------ 2824| 0| case Mips::SUXC164: ------------------ | Branch (2824:5): [True: 0, False: 8.24k] ------------------ 2825| 0| case Mips::SWXC1: { ------------------ | Branch (2825:5): [True: 0, False: 8.24k] ------------------ 2826| | // op: fs 2827| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2828| 0| Value |= (op & UINT64_C(31)) << 11; 2829| | // op: base 2830| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 2831| 0| Value |= (op & UINT64_C(31)) << 21; 2832| | // op: index 2833| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 2834| 0| Value |= (op & UINT64_C(31)) << 16; 2835| 0| break; 2836| 0| } 2837| 0| case Mips::C_EQ_D32: ------------------ | Branch (2837:5): [True: 0, False: 8.24k] ------------------ 2838| 0| case Mips::C_EQ_D64: ------------------ | Branch (2838:5): [True: 0, False: 8.24k] ------------------ 2839| 0| case Mips::C_EQ_S: ------------------ | Branch (2839:5): [True: 0, False: 8.24k] ------------------ 2840| 0| case Mips::C_F_D32: ------------------ | Branch (2840:5): [True: 0, False: 8.24k] ------------------ 2841| 0| case Mips::C_F_D64: ------------------ | Branch (2841:5): [True: 0, False: 8.24k] ------------------ 2842| 0| case Mips::C_F_S: ------------------ | Branch (2842:5): [True: 0, False: 8.24k] ------------------ 2843| 0| case Mips::C_LE_D32: ------------------ | Branch (2843:5): [True: 0, False: 8.24k] ------------------ 2844| 0| case Mips::C_LE_D64: ------------------ | Branch (2844:5): [True: 0, False: 8.24k] ------------------ 2845| 0| case Mips::C_LE_S: ------------------ | Branch (2845:5): [True: 0, False: 8.24k] ------------------ 2846| 0| case Mips::C_LT_D32: ------------------ | Branch (2846:5): [True: 0, False: 8.24k] ------------------ 2847| 0| case Mips::C_LT_D64: ------------------ | Branch (2847:5): [True: 0, False: 8.24k] ------------------ 2848| 0| case Mips::C_LT_S: ------------------ | Branch (2848:5): [True: 0, False: 8.24k] ------------------ 2849| 0| case Mips::C_NGE_D32: ------------------ | Branch (2849:5): [True: 0, False: 8.24k] ------------------ 2850| 0| case Mips::C_NGE_D64: ------------------ | Branch (2850:5): [True: 0, False: 8.24k] ------------------ 2851| 0| case Mips::C_NGE_S: ------------------ | Branch (2851:5): [True: 0, False: 8.24k] ------------------ 2852| 0| case Mips::C_NGLE_D32: ------------------ | Branch (2852:5): [True: 0, False: 8.24k] ------------------ 2853| 0| case Mips::C_NGLE_D64: ------------------ | Branch (2853:5): [True: 0, False: 8.24k] ------------------ 2854| 0| case Mips::C_NGLE_S: ------------------ | Branch (2854:5): [True: 0, False: 8.24k] ------------------ 2855| 0| case Mips::C_NGL_D32: ------------------ | Branch (2855:5): [True: 0, False: 8.24k] ------------------ 2856| 0| case Mips::C_NGL_D64: ------------------ | Branch (2856:5): [True: 0, False: 8.24k] ------------------ 2857| 0| case Mips::C_NGL_S: ------------------ | Branch (2857:5): [True: 0, False: 8.24k] ------------------ 2858| 0| case Mips::C_NGT_D32: ------------------ | Branch (2858:5): [True: 0, False: 8.24k] ------------------ 2859| 0| case Mips::C_NGT_D64: ------------------ | Branch (2859:5): [True: 0, False: 8.24k] ------------------ 2860| 0| case Mips::C_NGT_S: ------------------ | Branch (2860:5): [True: 0, False: 8.24k] ------------------ 2861| 0| case Mips::C_OLE_D32: ------------------ | Branch (2861:5): [True: 0, False: 8.24k] ------------------ 2862| 0| case Mips::C_OLE_D64: ------------------ | Branch (2862:5): [True: 0, False: 8.24k] ------------------ 2863| 0| case Mips::C_OLE_S: ------------------ | Branch (2863:5): [True: 0, False: 8.24k] ------------------ 2864| 0| case Mips::C_OLT_D32: ------------------ | Branch (2864:5): [True: 0, False: 8.24k] ------------------ 2865| 0| case Mips::C_OLT_D64: ------------------ | Branch (2865:5): [True: 0, False: 8.24k] ------------------ 2866| 0| case Mips::C_OLT_S: ------------------ | Branch (2866:5): [True: 0, False: 8.24k] ------------------ 2867| 0| case Mips::C_SEQ_D32: ------------------ | Branch (2867:5): [True: 0, False: 8.24k] ------------------ 2868| 0| case Mips::C_SEQ_D64: ------------------ | Branch (2868:5): [True: 0, False: 8.24k] ------------------ 2869| 0| case Mips::C_SEQ_S: ------------------ | Branch (2869:5): [True: 0, False: 8.24k] ------------------ 2870| 0| case Mips::C_SF_D32: ------------------ | Branch (2870:5): [True: 0, False: 8.24k] ------------------ 2871| 0| case Mips::C_SF_D64: ------------------ | Branch (2871:5): [True: 0, False: 8.24k] ------------------ 2872| 0| case Mips::C_SF_S: ------------------ | Branch (2872:5): [True: 0, False: 8.24k] ------------------ 2873| 0| case Mips::C_UEQ_D32: ------------------ | Branch (2873:5): [True: 0, False: 8.24k] ------------------ 2874| 0| case Mips::C_UEQ_D64: ------------------ | Branch (2874:5): [True: 0, False: 8.24k] ------------------ 2875| 0| case Mips::C_UEQ_S: ------------------ | Branch (2875:5): [True: 0, False: 8.24k] ------------------ 2876| 0| case Mips::C_ULE_D32: ------------------ | Branch (2876:5): [True: 0, False: 8.24k] ------------------ 2877| 0| case Mips::C_ULE_D64: ------------------ | Branch (2877:5): [True: 0, False: 8.24k] ------------------ 2878| 0| case Mips::C_ULE_S: ------------------ | Branch (2878:5): [True: 0, False: 8.24k] ------------------ 2879| 0| case Mips::C_ULT_D32: ------------------ | Branch (2879:5): [True: 0, False: 8.24k] ------------------ 2880| 0| case Mips::C_ULT_D64: ------------------ | Branch (2880:5): [True: 0, False: 8.24k] ------------------ 2881| 0| case Mips::C_ULT_S: ------------------ | Branch (2881:5): [True: 0, False: 8.24k] ------------------ 2882| 0| case Mips::C_UN_D32: ------------------ | Branch (2882:5): [True: 0, False: 8.24k] ------------------ 2883| 0| case Mips::C_UN_D64: ------------------ | Branch (2883:5): [True: 0, False: 8.24k] ------------------ 2884| 0| case Mips::C_UN_S: { ------------------ | Branch (2884:5): [True: 0, False: 8.24k] ------------------ 2885| | // op: fs 2886| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2887| 0| Value |= (op & UINT64_C(31)) << 11; 2888| | // op: ft 2889| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 2890| 0| Value |= (op & UINT64_C(31)) << 16; 2891| 0| break; 2892| 0| } 2893| 0| case Mips::FCMP_D32: ------------------ | Branch (2893:5): [True: 0, False: 8.24k] ------------------ 2894| 0| case Mips::FCMP_D64: ------------------ | Branch (2894:5): [True: 0, False: 8.24k] ------------------ 2895| 0| case Mips::FCMP_S32: { ------------------ | Branch (2895:5): [True: 0, False: 8.24k] ------------------ 2896| | // op: fs 2897| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2898| 0| Value |= (op & UINT64_C(31)) << 11; 2899| | // op: ft 2900| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 2901| 0| Value |= (op & UINT64_C(31)) << 16; 2902| | // op: cond 2903| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 2904| 0| Value |= op & UINT64_C(15); 2905| 0| break; 2906| 0| } 2907| 0| case Mips::FCMP_D32_MM: ------------------ | Branch (2907:5): [True: 0, False: 8.24k] ------------------ 2908| 0| case Mips::FCMP_S32_MM: { ------------------ | Branch (2908:5): [True: 0, False: 8.24k] ------------------ 2909| | // op: fs 2910| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2911| 0| Value |= (op & UINT64_C(31)) << 16; 2912| | // op: ft 2913| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 2914| 0| Value |= (op & UINT64_C(31)) << 21; 2915| | // op: cond 2916| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 2917| 0| Value |= (op & UINT64_C(15)) << 6; 2918| 0| break; 2919| 0| } 2920| 0| case Mips::CLASS_D: ------------------ | Branch (2920:5): [True: 0, False: 8.24k] ------------------ 2921| 0| case Mips::CLASS_S: ------------------ | Branch (2921:5): [True: 0, False: 8.24k] ------------------ 2922| 0| case Mips::RINT_D: ------------------ | Branch (2922:5): [True: 0, False: 8.24k] ------------------ 2923| 0| case Mips::RINT_S: { ------------------ | Branch (2923:5): [True: 0, False: 8.24k] ------------------ 2924| | // op: fs 2925| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 2926| 0| Value |= (op & UINT64_C(31)) << 11; 2927| | // op: fd 2928| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2929| 0| Value |= (op & UINT64_C(31)) << 6; 2930| 0| break; 2931| 0| } 2932| 0| case Mips::CLASS_D_MMR6: ------------------ | Branch (2932:5): [True: 0, False: 8.24k] ------------------ 2933| 0| case Mips::CLASS_S_MMR6: ------------------ | Branch (2933:5): [True: 0, False: 8.24k] ------------------ 2934| 0| case Mips::RINT_D_MMR6: ------------------ | Branch (2934:5): [True: 0, False: 8.24k] ------------------ 2935| 0| case Mips::RINT_S_MMR6: { ------------------ | Branch (2935:5): [True: 0, False: 8.24k] ------------------ 2936| | // op: fs 2937| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 2938| 0| Value |= (op & UINT64_C(31)) << 21; 2939| | // op: fd 2940| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2941| 0| Value |= (op & UINT64_C(31)) << 16; 2942| 0| break; 2943| 0| } 2944| 0| case Mips::BC1EQZ: ------------------ | Branch (2944:5): [True: 0, False: 8.24k] ------------------ 2945| 0| case Mips::BC1NEZ: { ------------------ | Branch (2945:5): [True: 0, False: 8.24k] ------------------ 2946| | // op: ft 2947| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2948| 0| Value |= (op & UINT64_C(31)) << 16; 2949| | // op: offset 2950| 0| op = getBranchTargetOpValue(MI, 1, Fixups, STI); 2951| 0| Value |= op & UINT64_C(65535); 2952| 0| break; 2953| 0| } 2954| 0| case Mips::ABS_D_MMR6: ------------------ | Branch (2954:5): [True: 0, False: 8.24k] ------------------ 2955| 0| case Mips::ABS_S_MMR6: ------------------ | Branch (2955:5): [True: 0, False: 8.24k] ------------------ 2956| 0| case Mips::CEIL_L_D_MMR6: ------------------ | Branch (2956:5): [True: 0, False: 8.24k] ------------------ 2957| 0| case Mips::CEIL_L_S_MMR6: ------------------ | Branch (2957:5): [True: 0, False: 8.24k] ------------------ 2958| 0| case Mips::CEIL_W_D_MMR6: ------------------ | Branch (2958:5): [True: 0, False: 8.24k] ------------------ 2959| 0| case Mips::CEIL_W_S_MMR6: ------------------ | Branch (2959:5): [True: 0, False: 8.24k] ------------------ 2960| 0| case Mips::CVT_D_L_MMR6: ------------------ | Branch (2960:5): [True: 0, False: 8.24k] ------------------ 2961| 0| case Mips::CVT_D_S_MMR6: ------------------ | Branch (2961:5): [True: 0, False: 8.24k] ------------------ 2962| 0| case Mips::CVT_D_W_MMR6: ------------------ | Branch (2962:5): [True: 0, False: 8.24k] ------------------ 2963| 0| case Mips::CVT_L_D_MMR6: ------------------ | Branch (2963:5): [True: 0, False: 8.24k] ------------------ 2964| 0| case Mips::CVT_L_S_MMR6: ------------------ | Branch (2964:5): [True: 0, False: 8.24k] ------------------ 2965| 0| case Mips::CVT_S_D_MMR6: ------------------ | Branch (2965:5): [True: 0, False: 8.24k] ------------------ 2966| 0| case Mips::CVT_S_L_MMR6: ------------------ | Branch (2966:5): [True: 0, False: 8.24k] ------------------ 2967| 0| case Mips::CVT_S_W_MMR6: ------------------ | Branch (2967:5): [True: 0, False: 8.24k] ------------------ 2968| 0| case Mips::CVT_W_D_MMR6: ------------------ | Branch (2968:5): [True: 0, False: 8.24k] ------------------ 2969| 0| case Mips::CVT_W_S_MMR6: ------------------ | Branch (2969:5): [True: 0, False: 8.24k] ------------------ 2970| 0| case Mips::FLOOR_L_D_MMR6: ------------------ | Branch (2970:5): [True: 0, False: 8.24k] ------------------ 2971| 0| case Mips::FLOOR_L_S_MMR6: ------------------ | Branch (2971:5): [True: 0, False: 8.24k] ------------------ 2972| 0| case Mips::FLOOR_W_D_MMR6: ------------------ | Branch (2972:5): [True: 0, False: 8.24k] ------------------ 2973| 0| case Mips::FLOOR_W_S_MMR6: ------------------ | Branch (2973:5): [True: 0, False: 8.24k] ------------------ 2974| 0| case Mips::FMOV_D_MMR6: ------------------ | Branch (2974:5): [True: 0, False: 8.24k] ------------------ 2975| 0| case Mips::FMOV_S_MMR6: ------------------ | Branch (2975:5): [True: 0, False: 8.24k] ------------------ 2976| 0| case Mips::FNEG_D_MMR6: ------------------ | Branch (2976:5): [True: 0, False: 8.24k] ------------------ 2977| 0| case Mips::FNEG_S_MMR6: ------------------ | Branch (2977:5): [True: 0, False: 8.24k] ------------------ 2978| 0| case Mips::RECIP_D_MMR6: ------------------ | Branch (2978:5): [True: 0, False: 8.24k] ------------------ 2979| 0| case Mips::RECIP_S_MMR6: ------------------ | Branch (2979:5): [True: 0, False: 8.24k] ------------------ 2980| 0| case Mips::ROUND_L_D_MMR6: ------------------ | Branch (2980:5): [True: 0, False: 8.24k] ------------------ 2981| 0| case Mips::ROUND_L_S_MMR6: ------------------ | Branch (2981:5): [True: 0, False: 8.24k] ------------------ 2982| 0| case Mips::ROUND_W_D_MMR6: ------------------ | Branch (2982:5): [True: 0, False: 8.24k] ------------------ 2983| 0| case Mips::ROUND_W_S_MMR6: ------------------ | Branch (2983:5): [True: 0, False: 8.24k] ------------------ 2984| 0| case Mips::RSQRT_D_MMR6: ------------------ | Branch (2984:5): [True: 0, False: 8.24k] ------------------ 2985| 0| case Mips::RSQRT_S_MMR6: ------------------ | Branch (2985:5): [True: 0, False: 8.24k] ------------------ 2986| 0| case Mips::SQRT_D_MMR6: ------------------ | Branch (2986:5): [True: 0, False: 8.24k] ------------------ 2987| 0| case Mips::SQRT_S_MMR6: ------------------ | Branch (2987:5): [True: 0, False: 8.24k] ------------------ 2988| 0| case Mips::TRUNC_L_D_MMR6: ------------------ | Branch (2988:5): [True: 0, False: 8.24k] ------------------ 2989| 0| case Mips::TRUNC_L_S_MMR6: ------------------ | Branch (2989:5): [True: 0, False: 8.24k] ------------------ 2990| 0| case Mips::TRUNC_W_D_MMR6: ------------------ | Branch (2990:5): [True: 0, False: 8.24k] ------------------ 2991| 0| case Mips::TRUNC_W_S_MMR6: { ------------------ | Branch (2991:5): [True: 0, False: 8.24k] ------------------ 2992| | // op: ft 2993| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2994| 0| Value |= (op & UINT64_C(31)) << 21; 2995| | // op: fs 2996| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 2997| 0| Value |= (op & UINT64_C(31)) << 16; 2998| 0| break; 2999| 0| } 3000| 0| case Mips::FADD_D_MMR6: ------------------ | Branch (3000:5): [True: 0, False: 8.24k] ------------------ 3001| 0| case Mips::FADD_S_MMR6: ------------------ | Branch (3001:5): [True: 0, False: 8.24k] ------------------ 3002| 0| case Mips::FDIV_D_MMR6: ------------------ | Branch (3002:5): [True: 0, False: 8.24k] ------------------ 3003| 0| case Mips::FDIV_S_MMR6: ------------------ | Branch (3003:5): [True: 0, False: 8.24k] ------------------ 3004| 0| case Mips::FMUL_D_MMR6: ------------------ | Branch (3004:5): [True: 0, False: 8.24k] ------------------ 3005| 0| case Mips::FMUL_S_MMR6: ------------------ | Branch (3005:5): [True: 0, False: 8.24k] ------------------ 3006| 0| case Mips::FSUB_D_MMR6: ------------------ | Branch (3006:5): [True: 0, False: 8.24k] ------------------ 3007| 0| case Mips::FSUB_S_MMR6: { ------------------ | Branch (3007:5): [True: 0, False: 8.24k] ------------------ 3008| | // op: ft 3009| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3010| 0| Value |= (op & UINT64_C(31)) << 21; 3011| | // op: fs 3012| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3013| 0| Value |= (op & UINT64_C(31)) << 16; 3014| | // op: fd 3015| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3016| 0| Value |= (op & UINT64_C(31)) << 11; 3017| 0| break; 3018| 0| } 3019| 0| case Mips::MAXA_D: ------------------ | Branch (3019:5): [True: 0, False: 8.24k] ------------------ 3020| 0| case Mips::MAXA_S: ------------------ | Branch (3020:5): [True: 0, False: 8.24k] ------------------ 3021| 0| case Mips::MAX_D: ------------------ | Branch (3021:5): [True: 0, False: 8.24k] ------------------ 3022| 0| case Mips::MAX_S: ------------------ | Branch (3022:5): [True: 0, False: 8.24k] ------------------ 3023| 0| case Mips::MINA_D: ------------------ | Branch (3023:5): [True: 0, False: 8.24k] ------------------ 3024| 0| case Mips::MINA_S: ------------------ | Branch (3024:5): [True: 0, False: 8.24k] ------------------ 3025| 0| case Mips::MIN_D: ------------------ | Branch (3025:5): [True: 0, False: 8.24k] ------------------ 3026| 0| case Mips::MIN_S: ------------------ | Branch (3026:5): [True: 0, False: 8.24k] ------------------ 3027| 0| case Mips::SELEQZ_D: ------------------ | Branch (3027:5): [True: 0, False: 8.24k] ------------------ 3028| 0| case Mips::SELEQZ_S: ------------------ | Branch (3028:5): [True: 0, False: 8.24k] ------------------ 3029| 0| case Mips::SELNEZ_D: ------------------ | Branch (3029:5): [True: 0, False: 8.24k] ------------------ 3030| 0| case Mips::SELNEZ_S: { ------------------ | Branch (3030:5): [True: 0, False: 8.24k] ------------------ 3031| | // op: ft 3032| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3033| 0| Value |= (op & UINT64_C(31)) << 16; 3034| | // op: fs 3035| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3036| 0| Value |= (op & UINT64_C(31)) << 11; 3037| | // op: fd 3038| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3039| 0| Value |= (op & UINT64_C(31)) << 6; 3040| 0| break; 3041| 0| } 3042| 0| case Mips::CMP_AF_D_MMR6: ------------------ | Branch (3042:5): [True: 0, False: 8.24k] ------------------ 3043| 0| case Mips::CMP_AF_S_MMR6: ------------------ | Branch (3043:5): [True: 0, False: 8.24k] ------------------ 3044| 0| case Mips::CMP_EQ_D_MMR6: ------------------ | Branch (3044:5): [True: 0, False: 8.24k] ------------------ 3045| 0| case Mips::CMP_EQ_S_MMR6: ------------------ | Branch (3045:5): [True: 0, False: 8.24k] ------------------ 3046| 0| case Mips::CMP_LE_D_MMR6: ------------------ | Branch (3046:5): [True: 0, False: 8.24k] ------------------ 3047| 0| case Mips::CMP_LE_S_MMR6: ------------------ | Branch (3047:5): [True: 0, False: 8.24k] ------------------ 3048| 0| case Mips::CMP_LT_D_MMR6: ------------------ | Branch (3048:5): [True: 0, False: 8.24k] ------------------ 3049| 0| case Mips::CMP_LT_S_MMR6: ------------------ | Branch (3049:5): [True: 0, False: 8.24k] ------------------ 3050| 0| case Mips::CMP_SAF_D_MMR6: ------------------ | Branch (3050:5): [True: 0, False: 8.24k] ------------------ 3051| 0| case Mips::CMP_SAF_S_MMR6: ------------------ | Branch (3051:5): [True: 0, False: 8.24k] ------------------ 3052| 0| case Mips::CMP_SEQ_D_MMR6: ------------------ | Branch (3052:5): [True: 0, False: 8.24k] ------------------ 3053| 0| case Mips::CMP_SEQ_S_MMR6: ------------------ | Branch (3053:5): [True: 0, False: 8.24k] ------------------ 3054| 0| case Mips::CMP_SLE_D_MMR6: ------------------ | Branch (3054:5): [True: 0, False: 8.24k] ------------------ 3055| 0| case Mips::CMP_SLE_S_MMR6: ------------------ | Branch (3055:5): [True: 0, False: 8.24k] ------------------ 3056| 0| case Mips::CMP_SLT_D_MMR6: ------------------ | Branch (3056:5): [True: 0, False: 8.24k] ------------------ 3057| 0| case Mips::CMP_SLT_S_MMR6: ------------------ | Branch (3057:5): [True: 0, False: 8.24k] ------------------ 3058| 0| case Mips::CMP_SUEQ_D_MMR6: ------------------ | Branch (3058:5): [True: 0, False: 8.24k] ------------------ 3059| 0| case Mips::CMP_SUEQ_S_MMR6: ------------------ | Branch (3059:5): [True: 0, False: 8.24k] ------------------ 3060| 0| case Mips::CMP_SULE_D_MMR6: ------------------ | Branch (3060:5): [True: 0, False: 8.24k] ------------------ 3061| 0| case Mips::CMP_SULE_S_MMR6: ------------------ | Branch (3061:5): [True: 0, False: 8.24k] ------------------ 3062| 0| case Mips::CMP_SULT_D_MMR6: ------------------ | Branch (3062:5): [True: 0, False: 8.24k] ------------------ 3063| 0| case Mips::CMP_SULT_S_MMR6: ------------------ | Branch (3063:5): [True: 0, False: 8.24k] ------------------ 3064| 0| case Mips::CMP_SUN_D_MMR6: ------------------ | Branch (3064:5): [True: 0, False: 8.24k] ------------------ 3065| 0| case Mips::CMP_SUN_S_MMR6: ------------------ | Branch (3065:5): [True: 0, False: 8.24k] ------------------ 3066| 0| case Mips::CMP_UEQ_D_MMR6: ------------------ | Branch (3066:5): [True: 0, False: 8.24k] ------------------ 3067| 0| case Mips::CMP_UEQ_S_MMR6: ------------------ | Branch (3067:5): [True: 0, False: 8.24k] ------------------ 3068| 0| case Mips::CMP_ULE_D_MMR6: ------------------ | Branch (3068:5): [True: 0, False: 8.24k] ------------------ 3069| 0| case Mips::CMP_ULE_S_MMR6: ------------------ | Branch (3069:5): [True: 0, False: 8.24k] ------------------ 3070| 0| case Mips::CMP_ULT_D_MMR6: ------------------ | Branch (3070:5): [True: 0, False: 8.24k] ------------------ 3071| 0| case Mips::CMP_ULT_S_MMR6: ------------------ | Branch (3071:5): [True: 0, False: 8.24k] ------------------ 3072| 0| case Mips::CMP_UN_D_MMR6: ------------------ | Branch (3072:5): [True: 0, False: 8.24k] ------------------ 3073| 0| case Mips::CMP_UN_S_MMR6: ------------------ | Branch (3073:5): [True: 0, False: 8.24k] ------------------ 3074| 0| case Mips::FADD_MM: ------------------ | Branch (3074:5): [True: 0, False: 8.24k] ------------------ 3075| 0| case Mips::FADD_S_MM: ------------------ | Branch (3075:5): [True: 0, False: 8.24k] ------------------ 3076| 0| case Mips::FDIV_MM: ------------------ | Branch (3076:5): [True: 0, False: 8.24k] ------------------ 3077| 0| case Mips::FDIV_S_MM: ------------------ | Branch (3077:5): [True: 0, False: 8.24k] ------------------ 3078| 0| case Mips::FMUL_MM: ------------------ | Branch (3078:5): [True: 0, False: 8.24k] ------------------ 3079| 0| case Mips::FMUL_S_MM: ------------------ | Branch (3079:5): [True: 0, False: 8.24k] ------------------ 3080| 0| case Mips::FSUB_MM: ------------------ | Branch (3080:5): [True: 0, False: 8.24k] ------------------ 3081| 0| case Mips::FSUB_S_MM: ------------------ | Branch (3081:5): [True: 0, False: 8.24k] ------------------ 3082| 0| case Mips::MAXA_D_MMR6: ------------------ | Branch (3082:5): [True: 0, False: 8.24k] ------------------ 3083| 0| case Mips::MAXA_S_MMR6: ------------------ | Branch (3083:5): [True: 0, False: 8.24k] ------------------ 3084| 0| case Mips::MAX_D_MMR6: ------------------ | Branch (3084:5): [True: 0, False: 8.24k] ------------------ 3085| 0| case Mips::MAX_S_MMR6: ------------------ | Branch (3085:5): [True: 0, False: 8.24k] ------------------ 3086| 0| case Mips::MINA_D_MMR6: ------------------ | Branch (3086:5): [True: 0, False: 8.24k] ------------------ 3087| 0| case Mips::MINA_S_MMR6: ------------------ | Branch (3087:5): [True: 0, False: 8.24k] ------------------ 3088| 0| case Mips::MIN_D_MMR6: ------------------ | Branch (3088:5): [True: 0, False: 8.24k] ------------------ 3089| 0| case Mips::MIN_S_MMR6: ------------------ | Branch (3089:5): [True: 0, False: 8.24k] ------------------ 3090| 0| case Mips::SELENZ_D_MMR6: ------------------ | Branch (3090:5): [True: 0, False: 8.24k] ------------------ 3091| 0| case Mips::SELENZ_S_MMR6: ------------------ | Branch (3091:5): [True: 0, False: 8.24k] ------------------ 3092| 0| case Mips::SELEQZ_D_MMR6: ------------------ | Branch (3092:5): [True: 0, False: 8.24k] ------------------ 3093| 0| case Mips::SELEQZ_S_MMR6: { ------------------ | Branch (3093:5): [True: 0, False: 8.24k] ------------------ 3094| | // op: ft 3095| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3096| 0| Value |= (op & UINT64_C(31)) << 21; 3097| | // op: fs 3098| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3099| 0| Value |= (op & UINT64_C(31)) << 16; 3100| | // op: fd 3101| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3102| 0| Value |= (op & UINT64_C(31)) << 11; 3103| 0| break; 3104| 0| } 3105| 0| case Mips::MADDF_D: ------------------ | Branch (3105:5): [True: 0, False: 8.24k] ------------------ 3106| 0| case Mips::MADDF_S: ------------------ | Branch (3106:5): [True: 0, False: 8.24k] ------------------ 3107| 0| case Mips::MSUBF_D: ------------------ | Branch (3107:5): [True: 0, False: 8.24k] ------------------ 3108| 0| case Mips::MSUBF_S: ------------------ | Branch (3108:5): [True: 0, False: 8.24k] ------------------ 3109| 0| case Mips::SEL_D: ------------------ | Branch (3109:5): [True: 0, False: 8.24k] ------------------ 3110| 0| case Mips::SEL_S: { ------------------ | Branch (3110:5): [True: 0, False: 8.24k] ------------------ 3111| | // op: ft 3112| 0| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 3113| 0| Value |= (op & UINT64_C(31)) << 16; 3114| | // op: fs 3115| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3116| 0| Value |= (op & UINT64_C(31)) << 11; 3117| | // op: fd 3118| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3119| 0| Value |= (op & UINT64_C(31)) << 6; 3120| 0| break; 3121| 0| } 3122| 0| case Mips::MADDF_D_MMR6: ------------------ | Branch (3122:5): [True: 0, False: 8.24k] ------------------ 3123| 0| case Mips::MADDF_S_MMR6: ------------------ | Branch (3123:5): [True: 0, False: 8.24k] ------------------ 3124| 0| case Mips::MSUBF_D_MMR6: ------------------ | Branch (3124:5): [True: 0, False: 8.24k] ------------------ 3125| 0| case Mips::MSUBF_S_MMR6: ------------------ | Branch (3125:5): [True: 0, False: 8.24k] ------------------ 3126| 0| case Mips::SEL_D_MMR6: ------------------ | Branch (3126:5): [True: 0, False: 8.24k] ------------------ 3127| 0| case Mips::SEL_S_MMR6: { ------------------ | Branch (3127:5): [True: 0, False: 8.24k] ------------------ 3128| | // op: ft 3129| 0| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 3130| 0| Value |= (op & UINT64_C(31)) << 21; 3131| | // op: fs 3132| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3133| 0| Value |= (op & UINT64_C(31)) << 16; 3134| | // op: fd 3135| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3136| 0| Value |= (op & UINT64_C(31)) << 11; 3137| 0| break; 3138| 0| } 3139| 0| case Mips::MADD_D32_MM: ------------------ | Branch (3139:5): [True: 0, False: 8.24k] ------------------ 3140| 0| case Mips::MADD_S_MM: ------------------ | Branch (3140:5): [True: 0, False: 8.24k] ------------------ 3141| 0| case Mips::MSUB_D32_MM: ------------------ | Branch (3141:5): [True: 0, False: 8.24k] ------------------ 3142| 0| case Mips::MSUB_S_MM: ------------------ | Branch (3142:5): [True: 0, False: 8.24k] ------------------ 3143| 0| case Mips::NMADD_D32_MM: ------------------ | Branch (3143:5): [True: 0, False: 8.24k] ------------------ 3144| 0| case Mips::NMADD_S_MM: ------------------ | Branch (3144:5): [True: 0, False: 8.24k] ------------------ 3145| 0| case Mips::NMSUB_D32_MM: ------------------ | Branch (3145:5): [True: 0, False: 8.24k] ------------------ 3146| 0| case Mips::NMSUB_S_MM: { ------------------ | Branch (3146:5): [True: 0, False: 8.24k] ------------------ 3147| | // op: ft 3148| 0| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 3149| 0| Value |= (op & UINT64_C(31)) << 21; 3150| | // op: fs 3151| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3152| 0| Value |= (op & UINT64_C(31)) << 16; 3153| | // op: fd 3154| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3155| 0| Value |= (op & UINT64_C(31)) << 11; 3156| | // op: fr 3157| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3158| 0| Value |= (op & UINT64_C(31)) << 6; 3159| 0| break; 3160| 0| } 3161| 0| case Mips::ADDVI_B: ------------------ | Branch (3161:5): [True: 0, False: 8.24k] ------------------ 3162| 0| case Mips::ADDVI_D: ------------------ | Branch (3162:5): [True: 0, False: 8.24k] ------------------ 3163| 0| case Mips::ADDVI_H: ------------------ | Branch (3163:5): [True: 0, False: 8.24k] ------------------ 3164| 0| case Mips::ADDVI_W: ------------------ | Branch (3164:5): [True: 0, False: 8.24k] ------------------ 3165| 0| case Mips::CEQI_B: ------------------ | Branch (3165:5): [True: 0, False: 8.24k] ------------------ 3166| 0| case Mips::CEQI_D: ------------------ | Branch (3166:5): [True: 0, False: 8.24k] ------------------ 3167| 0| case Mips::CEQI_H: ------------------ | Branch (3167:5): [True: 0, False: 8.24k] ------------------ 3168| 0| case Mips::CEQI_W: ------------------ | Branch (3168:5): [True: 0, False: 8.24k] ------------------ 3169| 0| case Mips::CLEI_S_B: ------------------ | Branch (3169:5): [True: 0, False: 8.24k] ------------------ 3170| 0| case Mips::CLEI_S_D: ------------------ | Branch (3170:5): [True: 0, False: 8.24k] ------------------ 3171| 0| case Mips::CLEI_S_H: ------------------ | Branch (3171:5): [True: 0, False: 8.24k] ------------------ 3172| 0| case Mips::CLEI_S_W: ------------------ | Branch (3172:5): [True: 0, False: 8.24k] ------------------ 3173| 0| case Mips::CLEI_U_B: ------------------ | Branch (3173:5): [True: 0, False: 8.24k] ------------------ 3174| 0| case Mips::CLEI_U_D: ------------------ | Branch (3174:5): [True: 0, False: 8.24k] ------------------ 3175| 0| case Mips::CLEI_U_H: ------------------ | Branch (3175:5): [True: 0, False: 8.24k] ------------------ 3176| 0| case Mips::CLEI_U_W: ------------------ | Branch (3176:5): [True: 0, False: 8.24k] ------------------ 3177| 0| case Mips::CLTI_S_B: ------------------ | Branch (3177:5): [True: 0, False: 8.24k] ------------------ 3178| 0| case Mips::CLTI_S_D: ------------------ | Branch (3178:5): [True: 0, False: 8.24k] ------------------ 3179| 0| case Mips::CLTI_S_H: ------------------ | Branch (3179:5): [True: 0, False: 8.24k] ------------------ 3180| 0| case Mips::CLTI_S_W: ------------------ | Branch (3180:5): [True: 0, False: 8.24k] ------------------ 3181| 0| case Mips::CLTI_U_B: ------------------ | Branch (3181:5): [True: 0, False: 8.24k] ------------------ 3182| 0| case Mips::CLTI_U_D: ------------------ | Branch (3182:5): [True: 0, False: 8.24k] ------------------ 3183| 0| case Mips::CLTI_U_H: ------------------ | Branch (3183:5): [True: 0, False: 8.24k] ------------------ 3184| 0| case Mips::CLTI_U_W: ------------------ | Branch (3184:5): [True: 0, False: 8.24k] ------------------ 3185| 0| case Mips::MAXI_S_B: ------------------ | Branch (3185:5): [True: 0, False: 8.24k] ------------------ 3186| 0| case Mips::MAXI_S_D: ------------------ | Branch (3186:5): [True: 0, False: 8.24k] ------------------ 3187| 0| case Mips::MAXI_S_H: ------------------ | Branch (3187:5): [True: 0, False: 8.24k] ------------------ 3188| 0| case Mips::MAXI_S_W: ------------------ | Branch (3188:5): [True: 0, False: 8.24k] ------------------ 3189| 0| case Mips::MAXI_U_B: ------------------ | Branch (3189:5): [True: 0, False: 8.24k] ------------------ 3190| 0| case Mips::MAXI_U_D: ------------------ | Branch (3190:5): [True: 0, False: 8.24k] ------------------ 3191| 0| case Mips::MAXI_U_H: ------------------ | Branch (3191:5): [True: 0, False: 8.24k] ------------------ 3192| 0| case Mips::MAXI_U_W: ------------------ | Branch (3192:5): [True: 0, False: 8.24k] ------------------ 3193| 0| case Mips::MINI_S_B: ------------------ | Branch (3193:5): [True: 0, False: 8.24k] ------------------ 3194| 0| case Mips::MINI_S_D: ------------------ | Branch (3194:5): [True: 0, False: 8.24k] ------------------ 3195| 0| case Mips::MINI_S_H: ------------------ | Branch (3195:5): [True: 0, False: 8.24k] ------------------ 3196| 0| case Mips::MINI_S_W: ------------------ | Branch (3196:5): [True: 0, False: 8.24k] ------------------ 3197| 0| case Mips::MINI_U_B: ------------------ | Branch (3197:5): [True: 0, False: 8.24k] ------------------ 3198| 0| case Mips::MINI_U_D: ------------------ | Branch (3198:5): [True: 0, False: 8.24k] ------------------ 3199| 0| case Mips::MINI_U_H: ------------------ | Branch (3199:5): [True: 0, False: 8.24k] ------------------ 3200| 0| case Mips::MINI_U_W: ------------------ | Branch (3200:5): [True: 0, False: 8.24k] ------------------ 3201| 0| case Mips::SUBVI_B: ------------------ | Branch (3201:5): [True: 0, False: 8.24k] ------------------ 3202| 0| case Mips::SUBVI_D: ------------------ | Branch (3202:5): [True: 0, False: 8.24k] ------------------ 3203| 0| case Mips::SUBVI_H: ------------------ | Branch (3203:5): [True: 0, False: 8.24k] ------------------ 3204| 0| case Mips::SUBVI_W: { ------------------ | Branch (3204:5): [True: 0, False: 8.24k] ------------------ 3205| | // op: imm 3206| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3207| 0| Value |= (op & UINT64_C(31)) << 16; 3208| | // op: ws 3209| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3210| 0| Value |= (op & UINT64_C(31)) << 11; 3211| | // op: wd 3212| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3213| 0| Value |= (op & UINT64_C(31)) << 6; 3214| 0| break; 3215| 0| } 3216| 0| case Mips::ADDIUSP_MM: { ------------------ | Branch (3216:5): [True: 0, False: 8.24k] ------------------ 3217| | // op: imm 3218| 0| op = getSImm9AddiuspValue(MI, 0, Fixups, STI); 3219| 0| Value |= (op & UINT64_C(511)) << 1; 3220| 0| break; 3221| 0| } 3222| 0| case Mips::JRCADDIUSP_MMR6: { ------------------ | Branch (3222:5): [True: 0, False: 8.24k] ------------------ 3223| | // op: imm 3224| 0| op = getUImm5Lsl2Encoding(MI, 0, Fixups, STI); 3225| 0| Value |= (op & UINT64_C(31)) << 5; 3226| 0| break; 3227| 0| } 3228| 0| case Mips::JRADDIUSP: { ------------------ | Branch (3228:5): [True: 0, False: 8.24k] ------------------ 3229| | // op: imm 3230| 0| op = getUImm5Lsl2Encoding(MI, 0, Fixups, STI); 3231| 0| Value |= op & UINT64_C(31); 3232| 0| break; 3233| 0| } 3234| 0| case Mips::Bimm16: { ------------------ | Branch (3234:5): [True: 0, False: 8.24k] ------------------ 3235| | // op: imm11 3236| 0| op = getBranchTargetOpValue(MI, 0, Fixups, STI); 3237| 0| Value |= op & UINT64_C(2047); 3238| 0| break; 3239| 0| } 3240| 0| case Mips::AddiuRxRyOffMemX16: { ------------------ | Branch (3240:5): [True: 0, False: 8.24k] ------------------ 3241| | // op: imm15 3242| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3243| 0| Value |= (op & UINT64_C(2032)) << 16; 3244| 0| Value |= (op & UINT64_C(30720)) << 5; 3245| 0| Value |= op & UINT64_C(15); 3246| | // op: rx 3247| 0| op = getMemEncoding(MI, 1, Fixups, STI); 3248| 0| Value |= (op & UINT64_C(7)) << 8; 3249| | // op: ry 3250| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3251| 0| Value |= (op & UINT64_C(7)) << 5; 3252| 0| break; 3253| 0| } 3254| 0| case Mips::BimmX16: { ------------------ | Branch (3254:5): [True: 0, False: 8.24k] ------------------ 3255| | // op: imm16 3256| 0| op = getBranchTargetOpValue(MI, 0, Fixups, STI); 3257| 0| Value |= (op & UINT64_C(2016)) << 16; 3258| 0| Value |= (op & UINT64_C(63488)) << 5; 3259| 0| Value |= op & UINT64_C(31); 3260| 0| break; 3261| 0| } 3262| 0| case Mips::AddiuSpImmX16: ------------------ | Branch (3262:5): [True: 0, False: 8.24k] ------------------ 3263| 0| case Mips::BteqzX16: ------------------ | Branch (3263:5): [True: 0, False: 8.24k] ------------------ 3264| 0| case Mips::BtnezX16: { ------------------ | Branch (3264:5): [True: 0, False: 8.24k] ------------------ 3265| | // op: imm16 3266| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3267| 0| Value |= (op & UINT64_C(2016)) << 16; 3268| 0| Value |= (op & UINT64_C(63488)) << 5; 3269| 0| Value |= op & UINT64_C(31); 3270| 0| break; 3271| 0| } 3272| 0| case Mips::AddiuRxImmX16: ------------------ | Branch (3272:5): [True: 0, False: 8.24k] ------------------ 3273| 0| case Mips::AddiuRxPcImmX16: ------------------ | Branch (3273:5): [True: 0, False: 8.24k] ------------------ 3274| 0| case Mips::AddiuRxRxImmX16: ------------------ | Branch (3274:5): [True: 0, False: 8.24k] ------------------ 3275| 0| case Mips::BeqzRxImmX16: ------------------ | Branch (3275:5): [True: 0, False: 8.24k] ------------------ 3276| 0| case Mips::BnezRxImmX16: ------------------ | Branch (3276:5): [True: 0, False: 8.24k] ------------------ 3277| 0| case Mips::CmpiRxImmX16: ------------------ | Branch (3277:5): [True: 0, False: 8.24k] ------------------ 3278| 0| case Mips::LiRxImmAlignX16: ------------------ | Branch (3278:5): [True: 0, False: 8.24k] ------------------ 3279| 0| case Mips::LiRxImmX16: ------------------ | Branch (3279:5): [True: 0, False: 8.24k] ------------------ 3280| 0| case Mips::LwRxPcTcpX16: ------------------ | Branch (3280:5): [True: 0, False: 8.24k] ------------------ 3281| 0| case Mips::LwRxSpImmX16: ------------------ | Branch (3281:5): [True: 0, False: 8.24k] ------------------ 3282| 0| case Mips::SltiRxImmX16: ------------------ | Branch (3282:5): [True: 0, False: 8.24k] ------------------ 3283| 0| case Mips::SltiuRxImmX16: ------------------ | Branch (3283:5): [True: 0, False: 8.24k] ------------------ 3284| 0| case Mips::SwRxSpImmX16: { ------------------ | Branch (3284:5): [True: 0, False: 8.24k] ------------------ 3285| | // op: imm16 3286| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3287| 0| Value |= (op & UINT64_C(2016)) << 16; 3288| 0| Value |= (op & UINT64_C(63488)) << 5; 3289| 0| Value |= op & UINT64_C(31); 3290| | // op: rx 3291| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3292| 0| Value |= (op & UINT64_C(7)) << 8; 3293| 0| break; 3294| 0| } 3295| 0| case Mips::LbRxRyOffMemX16: ------------------ | Branch (3295:5): [True: 0, False: 8.24k] ------------------ 3296| 0| case Mips::LbuRxRyOffMemX16: ------------------ | Branch (3296:5): [True: 0, False: 8.24k] ------------------ 3297| 0| case Mips::LhRxRyOffMemX16: ------------------ | Branch (3297:5): [True: 0, False: 8.24k] ------------------ 3298| 0| case Mips::LhuRxRyOffMemX16: ------------------ | Branch (3298:5): [True: 0, False: 8.24k] ------------------ 3299| 0| case Mips::LwRxRyOffMemX16: ------------------ | Branch (3299:5): [True: 0, False: 8.24k] ------------------ 3300| 0| case Mips::SbRxRyOffMemX16: ------------------ | Branch (3300:5): [True: 0, False: 8.24k] ------------------ 3301| 0| case Mips::ShRxRyOffMemX16: ------------------ | Branch (3301:5): [True: 0, False: 8.24k] ------------------ 3302| 0| case Mips::SwRxRyOffMemX16: { ------------------ | Branch (3302:5): [True: 0, False: 8.24k] ------------------ 3303| | // op: imm16 3304| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3305| 0| Value |= (op & UINT64_C(2016)) << 16; 3306| 0| Value |= (op & UINT64_C(63488)) << 5; 3307| 0| Value |= op & UINT64_C(31); 3308| | // op: rx 3309| 0| op = getMemEncoding(MI, 1, Fixups, STI); 3310| 0| Value |= (op & UINT64_C(7)) << 8; 3311| | // op: ry 3312| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3313| 0| Value |= (op & UINT64_C(7)) << 5; 3314| 0| break; 3315| 0| } 3316| 0| case Mips::Jal16: ------------------ | Branch (3316:5): [True: 0, False: 8.24k] ------------------ 3317| 0| case Mips::JalB16: { ------------------ | Branch (3317:5): [True: 0, False: 8.24k] ------------------ 3318| | // op: imm26 3319| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3320| 0| Value |= (op & UINT64_C(2031616)) << 5; 3321| 0| Value |= (op & UINT64_C(65011712)) >> 5; 3322| 0| Value |= op & UINT64_C(65535); 3323| 0| break; 3324| 0| } 3325| 0| case Mips::AddiuSpImm16: ------------------ | Branch (3325:5): [True: 0, False: 8.24k] ------------------ 3326| 0| case Mips::Bteqz16: ------------------ | Branch (3326:5): [True: 0, False: 8.24k] ------------------ 3327| 0| case Mips::Btnez16: { ------------------ | Branch (3327:5): [True: 0, False: 8.24k] ------------------ 3328| | // op: imm8 3329| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3330| 0| Value |= op & UINT64_C(255); 3331| 0| break; 3332| 0| } 3333| 0| case Mips::PREFX_MM: { ------------------ | Branch (3333:5): [True: 0, False: 8.24k] ------------------ 3334| | // op: index 3335| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3336| 0| Value |= (op & UINT64_C(31)) << 21; 3337| | // op: base 3338| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3339| 0| Value |= (op & UINT64_C(31)) << 16; 3340| | // op: hint 3341| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3342| 0| Value |= (op & UINT64_C(31)) << 11; 3343| 0| break; 3344| 0| } 3345| 0| case Mips::LBUX_MM: ------------------ | Branch (3345:5): [True: 0, False: 8.24k] ------------------ 3346| 0| case Mips::LHX_MM: ------------------ | Branch (3346:5): [True: 0, False: 8.24k] ------------------ 3347| 0| case Mips::LWX_MM: { ------------------ | Branch (3347:5): [True: 0, False: 8.24k] ------------------ 3348| | // op: index 3349| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3350| 0| Value |= (op & UINT64_C(31)) << 21; 3351| | // op: base 3352| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3353| 0| Value |= (op & UINT64_C(31)) << 16; 3354| | // op: rd 3355| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3356| 0| Value |= (op & UINT64_C(31)) << 11; 3357| 0| break; 3358| 0| } 3359| 0| case Mips::COPY_S_D: { ------------------ | Branch (3359:5): [True: 0, False: 8.24k] ------------------ 3360| | // op: n 3361| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3362| 0| Value |= (op & UINT64_C(1)) << 16; 3363| | // op: ws 3364| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3365| 0| Value |= (op & UINT64_C(31)) << 11; 3366| | // op: rd 3367| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3368| 0| Value |= (op & UINT64_C(31)) << 6; 3369| 0| break; 3370| 0| } 3371| 0| case Mips::SPLATI_D: { ------------------ | Branch (3371:5): [True: 0, False: 8.24k] ------------------ 3372| | // op: n 3373| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3374| 0| Value |= (op & UINT64_C(1)) << 16; 3375| | // op: ws 3376| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3377| 0| Value |= (op & UINT64_C(31)) << 11; 3378| | // op: wd 3379| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3380| 0| Value |= (op & UINT64_C(31)) << 6; 3381| 0| break; 3382| 0| } 3383| 0| case Mips::INSVE_D: { ------------------ | Branch (3383:5): [True: 0, False: 8.24k] ------------------ 3384| | // op: n 3385| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3386| 0| Value |= (op & UINT64_C(1)) << 16; 3387| | // op: ws 3388| 0| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 3389| 0| Value |= (op & UINT64_C(31)) << 11; 3390| | // op: wd 3391| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3392| 0| Value |= (op & UINT64_C(31)) << 6; 3393| 0| break; 3394| 0| } 3395| 0| case Mips::COPY_S_B: ------------------ | Branch (3395:5): [True: 0, False: 8.24k] ------------------ 3396| 0| case Mips::COPY_U_B: { ------------------ | Branch (3396:5): [True: 0, False: 8.24k] ------------------ 3397| | // op: n 3398| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3399| 0| Value |= (op & UINT64_C(15)) << 16; 3400| | // op: ws 3401| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3402| 0| Value |= (op & UINT64_C(31)) << 11; 3403| | // op: rd 3404| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3405| 0| Value |= (op & UINT64_C(31)) << 6; 3406| 0| break; 3407| 0| } 3408| 0| case Mips::SPLATI_B: { ------------------ | Branch (3408:5): [True: 0, False: 8.24k] ------------------ 3409| | // op: n 3410| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3411| 0| Value |= (op & UINT64_C(15)) << 16; 3412| | // op: ws 3413| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3414| 0| Value |= (op & UINT64_C(31)) << 11; 3415| | // op: wd 3416| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3417| 0| Value |= (op & UINT64_C(31)) << 6; 3418| 0| break; 3419| 0| } 3420| 0| case Mips::INSVE_B: { ------------------ | Branch (3420:5): [True: 0, False: 8.24k] ------------------ 3421| | // op: n 3422| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3423| 0| Value |= (op & UINT64_C(15)) << 16; 3424| | // op: ws 3425| 0| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 3426| 0| Value |= (op & UINT64_C(31)) << 11; 3427| | // op: wd 3428| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3429| 0| Value |= (op & UINT64_C(31)) << 6; 3430| 0| break; 3431| 0| } 3432| 0| case Mips::COPY_S_W: ------------------ | Branch (3432:5): [True: 0, False: 8.24k] ------------------ 3433| 0| case Mips::COPY_U_W: { ------------------ | Branch (3433:5): [True: 0, False: 8.24k] ------------------ 3434| | // op: n 3435| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3436| 0| Value |= (op & UINT64_C(3)) << 16; 3437| | // op: ws 3438| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3439| 0| Value |= (op & UINT64_C(31)) << 11; 3440| | // op: rd 3441| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3442| 0| Value |= (op & UINT64_C(31)) << 6; 3443| 0| break; 3444| 0| } 3445| 0| case Mips::SPLATI_W: { ------------------ | Branch (3445:5): [True: 0, False: 8.24k] ------------------ 3446| | // op: n 3447| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3448| 0| Value |= (op & UINT64_C(3)) << 16; 3449| | // op: ws 3450| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3451| 0| Value |= (op & UINT64_C(31)) << 11; 3452| | // op: wd 3453| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3454| 0| Value |= (op & UINT64_C(31)) << 6; 3455| 0| break; 3456| 0| } 3457| 0| case Mips::INSVE_W: { ------------------ | Branch (3457:5): [True: 0, False: 8.24k] ------------------ 3458| | // op: n 3459| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3460| 0| Value |= (op & UINT64_C(3)) << 16; 3461| | // op: ws 3462| 0| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 3463| 0| Value |= (op & UINT64_C(31)) << 11; 3464| | // op: wd 3465| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3466| 0| Value |= (op & UINT64_C(31)) << 6; 3467| 0| break; 3468| 0| } 3469| 0| case Mips::COPY_S_H: ------------------ | Branch (3469:5): [True: 0, False: 8.24k] ------------------ 3470| 0| case Mips::COPY_U_H: { ------------------ | Branch (3470:5): [True: 0, False: 8.24k] ------------------ 3471| | // op: n 3472| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3473| 0| Value |= (op & UINT64_C(7)) << 16; 3474| | // op: ws 3475| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3476| 0| Value |= (op & UINT64_C(31)) << 11; 3477| | // op: rd 3478| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3479| 0| Value |= (op & UINT64_C(31)) << 6; 3480| 0| break; 3481| 0| } 3482| 0| case Mips::SPLATI_H: { ------------------ | Branch (3482:5): [True: 0, False: 8.24k] ------------------ 3483| | // op: n 3484| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3485| 0| Value |= (op & UINT64_C(7)) << 16; 3486| | // op: ws 3487| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3488| 0| Value |= (op & UINT64_C(31)) << 11; 3489| | // op: wd 3490| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3491| 0| Value |= (op & UINT64_C(31)) << 6; 3492| 0| break; 3493| 0| } 3494| 0| case Mips::INSVE_H: { ------------------ | Branch (3494:5): [True: 0, False: 8.24k] ------------------ 3495| | // op: n 3496| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3497| 0| Value |= (op & UINT64_C(7)) << 16; 3498| | // op: ws 3499| 0| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 3500| 0| Value |= (op & UINT64_C(31)) << 11; 3501| | // op: wd 3502| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3503| 0| Value |= (op & UINT64_C(31)) << 6; 3504| 0| break; 3505| 0| } 3506| 0| case Mips::INSERT_D: { ------------------ | Branch (3506:5): [True: 0, False: 8.24k] ------------------ 3507| | // op: n 3508| 0| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 3509| 0| Value |= (op & UINT64_C(1)) << 16; 3510| | // op: rs 3511| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3512| 0| Value |= (op & UINT64_C(31)) << 11; 3513| | // op: wd 3514| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3515| 0| Value |= (op & UINT64_C(31)) << 6; 3516| 0| break; 3517| 0| } 3518| 0| case Mips::SLDI_D: { ------------------ | Branch (3518:5): [True: 0, False: 8.24k] ------------------ 3519| | // op: n 3520| 0| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 3521| 0| Value |= (op & UINT64_C(1)) << 16; 3522| | // op: ws 3523| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3524| 0| Value |= (op & UINT64_C(31)) << 11; 3525| | // op: wd 3526| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3527| 0| Value |= (op & UINT64_C(31)) << 6; 3528| 0| break; 3529| 0| } 3530| 0| case Mips::INSERT_B: { ------------------ | Branch (3530:5): [True: 0, False: 8.24k] ------------------ 3531| | // op: n 3532| 0| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 3533| 0| Value |= (op & UINT64_C(15)) << 16; 3534| | // op: rs 3535| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3536| 0| Value |= (op & UINT64_C(31)) << 11; 3537| | // op: wd 3538| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3539| 0| Value |= (op & UINT64_C(31)) << 6; 3540| 0| break; 3541| 0| } 3542| 0| case Mips::SLDI_B: { ------------------ | Branch (3542:5): [True: 0, False: 8.24k] ------------------ 3543| | // op: n 3544| 0| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 3545| 0| Value |= (op & UINT64_C(15)) << 16; 3546| | // op: ws 3547| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3548| 0| Value |= (op & UINT64_C(31)) << 11; 3549| | // op: wd 3550| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3551| 0| Value |= (op & UINT64_C(31)) << 6; 3552| 0| break; 3553| 0| } 3554| 0| case Mips::INSERT_W: { ------------------ | Branch (3554:5): [True: 0, False: 8.24k] ------------------ 3555| | // op: n 3556| 0| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 3557| 0| Value |= (op & UINT64_C(3)) << 16; 3558| | // op: rs 3559| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3560| 0| Value |= (op & UINT64_C(31)) << 11; 3561| | // op: wd 3562| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3563| 0| Value |= (op & UINT64_C(31)) << 6; 3564| 0| break; 3565| 0| } 3566| 0| case Mips::SLDI_W: { ------------------ | Branch (3566:5): [True: 0, False: 8.24k] ------------------ 3567| | // op: n 3568| 0| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 3569| 0| Value |= (op & UINT64_C(3)) << 16; 3570| | // op: ws 3571| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3572| 0| Value |= (op & UINT64_C(31)) << 11; 3573| | // op: wd 3574| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3575| 0| Value |= (op & UINT64_C(31)) << 6; 3576| 0| break; 3577| 0| } 3578| 0| case Mips::INSERT_H: { ------------------ | Branch (3578:5): [True: 0, False: 8.24k] ------------------ 3579| | // op: n 3580| 0| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 3581| 0| Value |= (op & UINT64_C(7)) << 16; 3582| | // op: rs 3583| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3584| 0| Value |= (op & UINT64_C(31)) << 11; 3585| | // op: wd 3586| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3587| 0| Value |= (op & UINT64_C(31)) << 6; 3588| 0| break; 3589| 0| } 3590| 0| case Mips::SLDI_H: { ------------------ | Branch (3590:5): [True: 0, False: 8.24k] ------------------ 3591| | // op: n 3592| 0| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 3593| 0| Value |= (op & UINT64_C(7)) << 16; 3594| | // op: ws 3595| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3596| 0| Value |= (op & UINT64_C(31)) << 11; 3597| | // op: wd 3598| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3599| 0| Value |= (op & UINT64_C(31)) << 6; 3600| 0| break; 3601| 0| } 3602| 0| case Mips::BALC: ------------------ | Branch (3602:5): [True: 0, False: 8.24k] ------------------ 3603| 0| case Mips::BC: { ------------------ | Branch (3603:5): [True: 0, False: 8.24k] ------------------ 3604| | // op: offset 3605| 0| op = getBranchTarget26OpValue(MI, 0, Fixups, STI); 3606| 0| Value |= op & UINT64_C(67108863); 3607| 0| break; 3608| 0| } 3609| 0| case Mips::BALC_MMR6: ------------------ | Branch (3609:5): [True: 0, False: 8.24k] ------------------ 3610| 0| case Mips::BC_MMR6: { ------------------ | Branch (3610:5): [True: 0, False: 8.24k] ------------------ 3611| | // op: offset 3612| 0| op = getBranchTarget26OpValueMM(MI, 0, Fixups, STI); 3613| 0| Value |= op & UINT64_C(67108863); 3614| 0| break; 3615| 0| } 3616| 0| case Mips::BAL: ------------------ | Branch (3616:5): [True: 0, False: 8.24k] ------------------ 3617| 0| case Mips::BPOSGE32: { ------------------ | Branch (3617:5): [True: 0, False: 8.24k] ------------------ 3618| | // op: offset 3619| 0| op = getBranchTargetOpValue(MI, 0, Fixups, STI); 3620| 0| Value |= op & UINT64_C(65535); 3621| 0| break; 3622| 0| } 3623| 0| case Mips::BNZ_B: ------------------ | Branch (3623:5): [True: 0, False: 8.24k] ------------------ 3624| 0| case Mips::BNZ_D: ------------------ | Branch (3624:5): [True: 0, False: 8.24k] ------------------ 3625| 0| case Mips::BNZ_H: ------------------ | Branch (3625:5): [True: 0, False: 8.24k] ------------------ 3626| 0| case Mips::BNZ_V: ------------------ | Branch (3626:5): [True: 0, False: 8.24k] ------------------ 3627| 0| case Mips::BNZ_W: ------------------ | Branch (3627:5): [True: 0, False: 8.24k] ------------------ 3628| 0| case Mips::BZ_B: ------------------ | Branch (3628:5): [True: 0, False: 8.24k] ------------------ 3629| 0| case Mips::BZ_D: ------------------ | Branch (3629:5): [True: 0, False: 8.24k] ------------------ 3630| 0| case Mips::BZ_H: ------------------ | Branch (3630:5): [True: 0, False: 8.24k] ------------------ 3631| 0| case Mips::BZ_V: ------------------ | Branch (3631:5): [True: 0, False: 8.24k] ------------------ 3632| 0| case Mips::BZ_W: { ------------------ | Branch (3632:5): [True: 0, False: 8.24k] ------------------ 3633| | // op: offset 3634| 0| op = getBranchTargetOpValue(MI, 1, Fixups, STI); 3635| 0| Value |= op & UINT64_C(65535); 3636| | // op: wt 3637| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3638| 0| Value |= (op & UINT64_C(31)) << 16; 3639| 0| break; 3640| 0| } 3641| 0| case Mips::BC1F_MM: ------------------ | Branch (3641:5): [True: 0, False: 8.24k] ------------------ 3642| 0| case Mips::BC1T_MM: { ------------------ | Branch (3642:5): [True: 0, False: 8.24k] ------------------ 3643| | // op: offset 3644| 0| op = getBranchTargetOpValueMM(MI, 1, Fixups, STI); 3645| 0| Value |= op & UINT64_C(65535); 3646| 0| break; 3647| 0| } 3648| 0| case Mips::B16_MM: ------------------ | Branch (3648:5): [True: 0, False: 8.24k] ------------------ 3649| 0| case Mips::BC16_MMR6: { ------------------ | Branch (3649:5): [True: 0, False: 8.24k] ------------------ 3650| | // op: offset 3651| 0| op = getBranchTargetOpValueMMPC10(MI, 0, Fixups, STI); 3652| 0| Value |= op & UINT64_C(1023); 3653| 0| break; 3654| 0| } 3655| 0| case Mips::Move32R16: { ------------------ | Branch (3655:5): [True: 0, False: 8.24k] ------------------ 3656| | // op: r32 3657| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3658| 0| Value |= (op & UINT64_C(7)) << 5; 3659| 0| Value |= op & UINT64_C(24); 3660| | // op: rz 3661| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3662| 0| Value |= op & UINT64_C(7); 3663| 0| break; 3664| 0| } 3665| 0| case Mips::MFHI: ------------------ | Branch (3665:5): [True: 0, False: 8.24k] ------------------ 3666| 0| case Mips::MFHI64: ------------------ | Branch (3666:5): [True: 0, False: 8.24k] ------------------ 3667| 0| case Mips::MFLO: ------------------ | Branch (3667:5): [True: 0, False: 8.24k] ------------------ 3668| 0| case Mips::MFLO64: { ------------------ | Branch (3668:5): [True: 0, False: 8.24k] ------------------ 3669| | // op: rd 3670| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3671| 0| Value |= (op & UINT64_C(31)) << 11; 3672| 0| break; 3673| 0| } 3674| 0| case Mips::MFHI_DSP: ------------------ | Branch (3674:5): [True: 0, False: 8.24k] ------------------ 3675| 0| case Mips::MFLO_DSP: { ------------------ | Branch (3675:5): [True: 0, False: 8.24k] ------------------ 3676| | // op: rd 3677| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3678| 0| Value |= (op & UINT64_C(31)) << 11; 3679| | // op: ac 3680| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3681| 0| Value |= (op & UINT64_C(3)) << 21; 3682| 0| break; 3683| 0| } 3684| 0| case Mips::LWXS_MM: { ------------------ | Branch (3684:5): [True: 0, False: 8.24k] ------------------ 3685| | // op: rd 3686| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3687| 0| Value |= (op & UINT64_C(31)) << 11; 3688| | // op: base 3689| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3690| 0| Value |= (op & UINT64_C(31)) << 16; 3691| | // op: index 3692| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3693| 0| Value |= (op & UINT64_C(31)) << 21; 3694| 0| break; 3695| 0| } 3696| 0| case Mips::LBUX: ------------------ | Branch (3696:5): [True: 0, False: 8.24k] ------------------ 3697| 0| case Mips::LHX: ------------------ | Branch (3697:5): [True: 0, False: 8.24k] ------------------ 3698| 0| case Mips::LWX: { ------------------ | Branch (3698:5): [True: 0, False: 8.24k] ------------------ 3699| | // op: rd 3700| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3701| 0| Value |= (op & UINT64_C(31)) << 11; 3702| | // op: base 3703| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3704| 0| Value |= (op & UINT64_C(31)) << 21; 3705| | // op: index 3706| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3707| 0| Value |= (op & UINT64_C(31)) << 16; 3708| 0| break; 3709| 0| } 3710| 0| case Mips::REPL_PH: ------------------ | Branch (3710:5): [True: 0, False: 8.24k] ------------------ 3711| 0| case Mips::REPL_PH_MM: ------------------ | Branch (3711:5): [True: 0, False: 8.24k] ------------------ 3712| 0| case Mips::REPL_QB: { ------------------ | Branch (3712:5): [True: 0, False: 8.24k] ------------------ 3713| | // op: rd 3714| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3715| 0| Value |= (op & UINT64_C(31)) << 11; 3716| | // op: imm 3717| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3718| 0| Value |= (op & UINT64_C(1023)) << 16; 3719| 0| break; 3720| 0| } 3721| 0| case Mips::RDDSP: { ------------------ | Branch (3721:5): [True: 0, False: 8.24k] ------------------ 3722| | // op: rd 3723| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3724| 0| Value |= (op & UINT64_C(31)) << 11; 3725| | // op: mask 3726| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3727| 0| Value |= (op & UINT64_C(1023)) << 16; 3728| 0| break; 3729| 0| } 3730| 0| case Mips::ADDQH_PH_MMR2: ------------------ | Branch (3730:5): [True: 0, False: 8.24k] ------------------ 3731| 0| case Mips::ADDQH_R_PH_MMR2: ------------------ | Branch (3731:5): [True: 0, False: 8.24k] ------------------ 3732| 0| case Mips::ADDQH_R_W_MMR2: ------------------ | Branch (3732:5): [True: 0, False: 8.24k] ------------------ 3733| 0| case Mips::ADDQH_W_MMR2: ------------------ | Branch (3733:5): [True: 0, False: 8.24k] ------------------ 3734| 0| case Mips::ADDQ_PH_MM: ------------------ | Branch (3734:5): [True: 0, False: 8.24k] ------------------ 3735| 0| case Mips::ADDQ_S_PH_MM: ------------------ | Branch (3735:5): [True: 0, False: 8.24k] ------------------ 3736| 0| case Mips::ADDQ_S_W_MM: ------------------ | Branch (3736:5): [True: 0, False: 8.24k] ------------------ 3737| 0| case Mips::ADDSC_MM: ------------------ | Branch (3737:5): [True: 0, False: 8.24k] ------------------ 3738| 0| case Mips::ADDUH_QB_MMR2: ------------------ | Branch (3738:5): [True: 0, False: 8.24k] ------------------ 3739| 0| case Mips::ADDUH_R_QB_MMR2: ------------------ | Branch (3739:5): [True: 0, False: 8.24k] ------------------ 3740| 0| case Mips::ADDU_PH_MMR2: ------------------ | Branch (3740:5): [True: 0, False: 8.24k] ------------------ 3741| 0| case Mips::ADDU_QB_MM: ------------------ | Branch (3741:5): [True: 0, False: 8.24k] ------------------ 3742| 0| case Mips::ADDU_S_PH_MMR2: ------------------ | Branch (3742:5): [True: 0, False: 8.24k] ------------------ 3743| 0| case Mips::ADDU_S_QB_MM: ------------------ | Branch (3743:5): [True: 0, False: 8.24k] ------------------ 3744| 0| case Mips::ADDWC_MM: ------------------ | Branch (3744:5): [True: 0, False: 8.24k] ------------------ 3745| 0| case Mips::MULEQ_S_W_PHL_MM: ------------------ | Branch (3745:5): [True: 0, False: 8.24k] ------------------ 3746| 0| case Mips::MULEQ_S_W_PHR_MM: ------------------ | Branch (3746:5): [True: 0, False: 8.24k] ------------------ 3747| 0| case Mips::MULEU_S_PH_QBL_MM: ------------------ | Branch (3747:5): [True: 0, False: 8.24k] ------------------ 3748| 0| case Mips::MULEU_S_PH_QBR_MM: ------------------ | Branch (3748:5): [True: 0, False: 8.24k] ------------------ 3749| 0| case Mips::MULQ_RS_PH_MM: ------------------ | Branch (3749:5): [True: 0, False: 8.24k] ------------------ 3750| 0| case Mips::MULQ_RS_W_MMR2: ------------------ | Branch (3750:5): [True: 0, False: 8.24k] ------------------ 3751| 0| case Mips::MULQ_S_PH_MMR2: ------------------ | Branch (3751:5): [True: 0, False: 8.24k] ------------------ 3752| 0| case Mips::MULQ_S_W_MMR2: ------------------ | Branch (3752:5): [True: 0, False: 8.24k] ------------------ 3753| 0| case Mips::MUL_PH_MMR2: ------------------ | Branch (3753:5): [True: 0, False: 8.24k] ------------------ 3754| 0| case Mips::MUL_S_PH_MMR2: ------------------ | Branch (3754:5): [True: 0, False: 8.24k] ------------------ 3755| 0| case Mips::PACKRL_PH_MM: ------------------ | Branch (3755:5): [True: 0, False: 8.24k] ------------------ 3756| 0| case Mips::PICK_PH_MM: ------------------ | Branch (3756:5): [True: 0, False: 8.24k] ------------------ 3757| 0| case Mips::PICK_QB_MM: ------------------ | Branch (3757:5): [True: 0, False: 8.24k] ------------------ 3758| 0| case Mips::PRECRQU_S_QB_PH_MM: ------------------ | Branch (3758:5): [True: 0, False: 8.24k] ------------------ 3759| 0| case Mips::PRECRQ_PH_W_MM: ------------------ | Branch (3759:5): [True: 0, False: 8.24k] ------------------ 3760| 0| case Mips::PRECRQ_QB_PH_MM: ------------------ | Branch (3760:5): [True: 0, False: 8.24k] ------------------ 3761| 0| case Mips::PRECRQ_RS_PH_W_MM: ------------------ | Branch (3761:5): [True: 0, False: 8.24k] ------------------ 3762| 0| case Mips::PRECR_QB_PH_MMR2: ------------------ | Branch (3762:5): [True: 0, False: 8.24k] ------------------ 3763| 0| case Mips::SELEQZ_MMR6: ------------------ | Branch (3763:5): [True: 0, False: 8.24k] ------------------ 3764| 0| case Mips::SELNEZ_MMR6: ------------------ | Branch (3764:5): [True: 0, False: 8.24k] ------------------ 3765| 0| case Mips::SUBQH_PH_MMR2: ------------------ | Branch (3765:5): [True: 0, False: 8.24k] ------------------ 3766| 0| case Mips::SUBQH_R_PH_MMR2: ------------------ | Branch (3766:5): [True: 0, False: 8.24k] ------------------ 3767| 0| case Mips::SUBQH_R_W_MMR2: ------------------ | Branch (3767:5): [True: 0, False: 8.24k] ------------------ 3768| 0| case Mips::SUBQH_W_MMR2: ------------------ | Branch (3768:5): [True: 0, False: 8.24k] ------------------ 3769| 0| case Mips::SUBQ_PH_MM: ------------------ | Branch (3769:5): [True: 0, False: 8.24k] ------------------ 3770| 0| case Mips::SUBQ_S_PH_MM: ------------------ | Branch (3770:5): [True: 0, False: 8.24k] ------------------ 3771| 0| case Mips::SUBQ_S_W_MM: ------------------ | Branch (3771:5): [True: 0, False: 8.24k] ------------------ 3772| 0| case Mips::SUBUH_QB_MMR2: ------------------ | Branch (3772:5): [True: 0, False: 8.24k] ------------------ 3773| 0| case Mips::SUBUH_R_QB_MMR2: ------------------ | Branch (3773:5): [True: 0, False: 8.24k] ------------------ 3774| 0| case Mips::SUBU_PH_MMR2: ------------------ | Branch (3774:5): [True: 0, False: 8.24k] ------------------ 3775| 0| case Mips::SUBU_QB_MM: ------------------ | Branch (3775:5): [True: 0, False: 8.24k] ------------------ 3776| 0| case Mips::SUBU_S_PH_MMR2: ------------------ | Branch (3776:5): [True: 0, False: 8.24k] ------------------ 3777| 0| case Mips::SUBU_S_QB_MM: { ------------------ | Branch (3777:5): [True: 0, False: 8.24k] ------------------ 3778| | // op: rd 3779| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3780| 0| Value |= (op & UINT64_C(31)) << 11; 3781| | // op: rs 3782| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3783| 0| Value |= (op & UINT64_C(31)) << 16; 3784| | // op: rt 3785| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3786| 0| Value |= (op & UINT64_C(31)) << 21; 3787| 0| break; 3788| 0| } 3789| 0| case Mips::LSA_MMR6: { ------------------ | Branch (3789:5): [True: 0, False: 8.24k] ------------------ 3790| | // op: rd 3791| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3792| 0| Value |= (op & UINT64_C(31)) << 11; 3793| | // op: rs 3794| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3795| 0| Value |= (op & UINT64_C(31)) << 16; 3796| | // op: rt 3797| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3798| 0| Value |= (op & UINT64_C(31)) << 21; 3799| | // op: imm2 3800| 0| op = getUImmWithOffsetEncoding<2, 1>(MI, 3, Fixups, STI); 3801| 0| Value |= (op & UINT64_C(3)) << 9; 3802| 0| break; 3803| 0| } 3804| 0| case Mips::CLO_R6: ------------------ | Branch (3804:5): [True: 0, False: 8.24k] ------------------ 3805| 0| case Mips::CLZ_R6: ------------------ | Branch (3805:5): [True: 0, False: 8.24k] ------------------ 3806| 0| case Mips::DCLO_R6: ------------------ | Branch (3806:5): [True: 0, False: 8.24k] ------------------ 3807| 0| case Mips::DCLZ_R6: ------------------ | Branch (3807:5): [True: 0, False: 8.24k] ------------------ 3808| 0| case Mips::DPOP: ------------------ | Branch (3808:5): [True: 0, False: 8.24k] ------------------ 3809| 0| case Mips::JALR: ------------------ | Branch (3809:5): [True: 0, False: 8.24k] ------------------ 3810| 0| case Mips::JALR64: ------------------ | Branch (3810:5): [True: 0, False: 8.24k] ------------------ 3811| 0| case Mips::JALR_HB: ------------------ | Branch (3811:5): [True: 0, False: 8.24k] ------------------ 3812| 0| case Mips::POP: ------------------ | Branch (3812:5): [True: 0, False: 8.24k] ------------------ 3813| 0| case Mips::RADDU_W_QB: { ------------------ | Branch (3813:5): [True: 0, False: 8.24k] ------------------ 3814| | // op: rd 3815| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3816| 0| Value |= (op & UINT64_C(31)) << 11; 3817| | // op: rs 3818| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3819| 0| Value |= (op & UINT64_C(31)) << 21; 3820| 0| break; 3821| 0| } 3822| 0| case Mips::MOVF_I: ------------------ | Branch (3822:5): [True: 0, False: 8.24k] ------------------ 3823| 0| case Mips::MOVF_I64: ------------------ | Branch (3823:5): [True: 0, False: 8.24k] ------------------ 3824| 0| case Mips::MOVT_I: ------------------ | Branch (3824:5): [True: 0, False: 8.24k] ------------------ 3825| 0| case Mips::MOVT_I64: { ------------------ | Branch (3825:5): [True: 0, False: 8.24k] ------------------ 3826| | // op: rd 3827| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3828| 0| Value |= (op & UINT64_C(31)) << 11; 3829| | // op: rs 3830| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3831| 0| Value |= (op & UINT64_C(31)) << 21; 3832| | // op: fcc 3833| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3834| 0| Value |= (op & UINT64_C(7)) << 18; 3835| 0| break; 3836| 0| } 3837| 0| case Mips::ADD: ------------------ | Branch (3837:5): [True: 0, False: 8.24k] ------------------ 3838| 0| case Mips::ADDQH_PH: ------------------ | Branch (3838:5): [True: 0, False: 8.24k] ------------------ 3839| 0| case Mips::ADDQH_R_PH: ------------------ | Branch (3839:5): [True: 0, False: 8.24k] ------------------ 3840| 0| case Mips::ADDQH_R_W: ------------------ | Branch (3840:5): [True: 0, False: 8.24k] ------------------ 3841| 0| case Mips::ADDQH_W: ------------------ | Branch (3841:5): [True: 0, False: 8.24k] ------------------ 3842| 0| case Mips::ADDQ_PH: ------------------ | Branch (3842:5): [True: 0, False: 8.24k] ------------------ 3843| 0| case Mips::ADDQ_S_PH: ------------------ | Branch (3843:5): [True: 0, False: 8.24k] ------------------ 3844| 0| case Mips::ADDQ_S_W: ------------------ | Branch (3844:5): [True: 0, False: 8.24k] ------------------ 3845| 0| case Mips::ADDSC: ------------------ | Branch (3845:5): [True: 0, False: 8.24k] ------------------ 3846| 0| case Mips::ADDUH_QB: ------------------ | Branch (3846:5): [True: 0, False: 8.24k] ------------------ 3847| 0| case Mips::ADDUH_R_QB: ------------------ | Branch (3847:5): [True: 0, False: 8.24k] ------------------ 3848| 0| case Mips::ADDU_PH: ------------------ | Branch (3848:5): [True: 0, False: 8.24k] ------------------ 3849| 0| case Mips::ADDU_QB: ------------------ | Branch (3849:5): [True: 0, False: 8.24k] ------------------ 3850| 0| case Mips::ADDU_S_PH: ------------------ | Branch (3850:5): [True: 0, False: 8.24k] ------------------ 3851| 0| case Mips::ADDU_S_QB: ------------------ | Branch (3851:5): [True: 0, False: 8.24k] ------------------ 3852| 0| case Mips::ADDWC: ------------------ | Branch (3852:5): [True: 0, False: 8.24k] ------------------ 3853| 32| case Mips::ADDu: ------------------ | Branch (3853:5): [True: 32, False: 8.20k] ------------------ 3854| 32| case Mips::AND: ------------------ | Branch (3854:5): [True: 0, False: 8.24k] ------------------ 3855| 32| case Mips::AND64: ------------------ | Branch (3855:5): [True: 0, False: 8.24k] ------------------ 3856| 32| case Mips::BADDu: ------------------ | Branch (3856:5): [True: 0, False: 8.24k] ------------------ 3857| 32| case Mips::DADD: ------------------ | Branch (3857:5): [True: 0, False: 8.24k] ------------------ 3858| 32| case Mips::DADDu: ------------------ | Branch (3858:5): [True: 0, False: 8.24k] ------------------ 3859| 32| case Mips::DDIV: ------------------ | Branch (3859:5): [True: 0, False: 8.24k] ------------------ 3860| 32| case Mips::DDIVU: ------------------ | Branch (3860:5): [True: 0, False: 8.24k] ------------------ 3861| 32| case Mips::DIV: ------------------ | Branch (3861:5): [True: 0, False: 8.24k] ------------------ 3862| 32| case Mips::DIVU: ------------------ | Branch (3862:5): [True: 0, False: 8.24k] ------------------ 3863| 32| case Mips::DMOD: ------------------ | Branch (3863:5): [True: 0, False: 8.24k] ------------------ 3864| 32| case Mips::DMODU: ------------------ | Branch (3864:5): [True: 0, False: 8.24k] ------------------ 3865| 32| case Mips::DMUH: ------------------ | Branch (3865:5): [True: 0, False: 8.24k] ------------------ 3866| 32| case Mips::DMUHU: ------------------ | Branch (3866:5): [True: 0, False: 8.24k] ------------------ 3867| 32| case Mips::DMUL: ------------------ | Branch (3867:5): [True: 0, False: 8.24k] ------------------ 3868| 32| case Mips::DMULU: ------------------ | Branch (3868:5): [True: 0, False: 8.24k] ------------------ 3869| 32| case Mips::DMUL_R6: ------------------ | Branch (3869:5): [True: 0, False: 8.24k] ------------------ 3870| 32| case Mips::DSUB: ------------------ | Branch (3870:5): [True: 0, False: 8.24k] ------------------ 3871| 32| case Mips::DSUBu: ------------------ | Branch (3871:5): [True: 0, False: 8.24k] ------------------ 3872| 32| case Mips::MOD: ------------------ | Branch (3872:5): [True: 0, False: 8.24k] ------------------ 3873| 32| case Mips::MODSUB: ------------------ | Branch (3873:5): [True: 0, False: 8.24k] ------------------ 3874| 32| case Mips::MODU: ------------------ | Branch (3874:5): [True: 0, False: 8.24k] ------------------ 3875| 32| case Mips::MOVN_I64_I: ------------------ | Branch (3875:5): [True: 0, False: 8.24k] ------------------ 3876| 32| case Mips::MOVN_I64_I64: ------------------ | Branch (3876:5): [True: 0, False: 8.24k] ------------------ 3877| 32| case Mips::MOVN_I_I: ------------------ | Branch (3877:5): [True: 0, False: 8.24k] ------------------ 3878| 32| case Mips::MOVN_I_I64: ------------------ | Branch (3878:5): [True: 0, False: 8.24k] ------------------ 3879| 32| case Mips::MOVZ_I64_I: ------------------ | Branch (3879:5): [True: 0, False: 8.24k] ------------------ 3880| 32| case Mips::MOVZ_I64_I64: ------------------ | Branch (3880:5): [True: 0, False: 8.24k] ------------------ 3881| 32| case Mips::MOVZ_I_I: ------------------ | Branch (3881:5): [True: 0, False: 8.24k] ------------------ 3882| 32| case Mips::MOVZ_I_I64: ------------------ | Branch (3882:5): [True: 0, False: 8.24k] ------------------ 3883| 32| case Mips::MUH: ------------------ | Branch (3883:5): [True: 0, False: 8.24k] ------------------ 3884| 32| case Mips::MUHU: ------------------ | Branch (3884:5): [True: 0, False: 8.24k] ------------------ 3885| 32| case Mips::MUL: ------------------ | Branch (3885:5): [True: 0, False: 8.24k] ------------------ 3886| 32| case Mips::MULEQ_S_W_PHL: ------------------ | Branch (3886:5): [True: 0, False: 8.24k] ------------------ 3887| 32| case Mips::MULEQ_S_W_PHR: ------------------ | Branch (3887:5): [True: 0, False: 8.24k] ------------------ 3888| 32| case Mips::MULEU_S_PH_QBL: ------------------ | Branch (3888:5): [True: 0, False: 8.24k] ------------------ 3889| 32| case Mips::MULEU_S_PH_QBR: ------------------ | Branch (3889:5): [True: 0, False: 8.24k] ------------------ 3890| 32| case Mips::MULQ_RS_PH: ------------------ | Branch (3890:5): [True: 0, False: 8.24k] ------------------ 3891| 32| case Mips::MULQ_RS_W: ------------------ | Branch (3891:5): [True: 0, False: 8.24k] ------------------ 3892| 32| case Mips::MULQ_S_PH: ------------------ | Branch (3892:5): [True: 0, False: 8.24k] ------------------ 3893| 32| case Mips::MULQ_S_W: ------------------ | Branch (3893:5): [True: 0, False: 8.24k] ------------------ 3894| 32| case Mips::MULU: ------------------ | Branch (3894:5): [True: 0, False: 8.24k] ------------------ 3895| 32| case Mips::MUL_PH: ------------------ | Branch (3895:5): [True: 0, False: 8.24k] ------------------ 3896| 32| case Mips::MUL_R6: ------------------ | Branch (3896:5): [True: 0, False: 8.24k] ------------------ 3897| 32| case Mips::MUL_S_PH: ------------------ | Branch (3897:5): [True: 0, False: 8.24k] ------------------ 3898| 32| case Mips::NOR: ------------------ | Branch (3898:5): [True: 0, False: 8.24k] ------------------ 3899| 32| case Mips::NOR64: ------------------ | Branch (3899:5): [True: 0, False: 8.24k] ------------------ 3900| 32| case Mips::OR: ------------------ | Branch (3900:5): [True: 0, False: 8.24k] ------------------ 3901| 32| case Mips::OR64: ------------------ | Branch (3901:5): [True: 0, False: 8.24k] ------------------ 3902| 32| case Mips::SELEQZ: ------------------ | Branch (3902:5): [True: 0, False: 8.24k] ------------------ 3903| 32| case Mips::SELEQZ64: ------------------ | Branch (3903:5): [True: 0, False: 8.24k] ------------------ 3904| 32| case Mips::SELNEZ: ------------------ | Branch (3904:5): [True: 0, False: 8.24k] ------------------ 3905| 32| case Mips::SELNEZ64: ------------------ | Branch (3905:5): [True: 0, False: 8.24k] ------------------ 3906| 32| case Mips::SEQ: ------------------ | Branch (3906:5): [True: 0, False: 8.24k] ------------------ 3907| 32| case Mips::SLT: ------------------ | Branch (3907:5): [True: 0, False: 8.24k] ------------------ 3908| 32| case Mips::SLT64: ------------------ | Branch (3908:5): [True: 0, False: 8.24k] ------------------ 3909| 32| case Mips::SLTu: ------------------ | Branch (3909:5): [True: 0, False: 8.24k] ------------------ 3910| 32| case Mips::SLTu64: ------------------ | Branch (3910:5): [True: 0, False: 8.24k] ------------------ 3911| 32| case Mips::SNE: ------------------ | Branch (3911:5): [True: 0, False: 8.24k] ------------------ 3912| 64| case Mips::SUB: ------------------ | Branch (3912:5): [True: 32, False: 8.20k] ------------------ 3913| 64| case Mips::SUBQH_PH: ------------------ | Branch (3913:5): [True: 0, False: 8.24k] ------------------ 3914| 64| case Mips::SUBQH_R_PH: ------------------ | Branch (3914:5): [True: 0, False: 8.24k] ------------------ 3915| 64| case Mips::SUBQH_R_W: ------------------ | Branch (3915:5): [True: 0, False: 8.24k] ------------------ 3916| 64| case Mips::SUBQH_W: ------------------ | Branch (3916:5): [True: 0, False: 8.24k] ------------------ 3917| 64| case Mips::SUBQ_PH: ------------------ | Branch (3917:5): [True: 0, False: 8.24k] ------------------ 3918| 64| case Mips::SUBQ_S_PH: ------------------ | Branch (3918:5): [True: 0, False: 8.24k] ------------------ 3919| 64| case Mips::SUBQ_S_W: ------------------ | Branch (3919:5): [True: 0, False: 8.24k] ------------------ 3920| 64| case Mips::SUBUH_QB: ------------------ | Branch (3920:5): [True: 0, False: 8.24k] ------------------ 3921| 64| case Mips::SUBUH_R_QB: ------------------ | Branch (3921:5): [True: 0, False: 8.24k] ------------------ 3922| 64| case Mips::SUBU_PH: ------------------ | Branch (3922:5): [True: 0, False: 8.24k] ------------------ 3923| 64| case Mips::SUBU_QB: ------------------ | Branch (3923:5): [True: 0, False: 8.24k] ------------------ 3924| 64| case Mips::SUBU_S_PH: ------------------ | Branch (3924:5): [True: 0, False: 8.24k] ------------------ 3925| 64| case Mips::SUBU_S_QB: ------------------ | Branch (3925:5): [True: 0, False: 8.24k] ------------------ 3926| 64| case Mips::SUBu: ------------------ | Branch (3926:5): [True: 0, False: 8.24k] ------------------ 3927| 64| case Mips::V3MULU: ------------------ | Branch (3927:5): [True: 0, False: 8.24k] ------------------ 3928| 64| case Mips::VMM0: ------------------ | Branch (3928:5): [True: 0, False: 8.24k] ------------------ 3929| 64| case Mips::VMULU: ------------------ | Branch (3929:5): [True: 0, False: 8.24k] ------------------ 3930| 64| case Mips::XOR: ------------------ | Branch (3930:5): [True: 0, False: 8.24k] ------------------ 3931| 64| case Mips::XOR64: { ------------------ | Branch (3931:5): [True: 0, False: 8.24k] ------------------ 3932| | // op: rd 3933| 64| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3934| 64| Value |= (op & UINT64_C(31)) << 11; 3935| | // op: rs 3936| 64| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3937| 64| Value |= (op & UINT64_C(31)) << 21; 3938| | // op: rt 3939| 64| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3940| 64| Value |= (op & UINT64_C(31)) << 16; 3941| 64| break; 3942| 64| } 3943| 0| case Mips::ALIGN: { ------------------ | Branch (3943:5): [True: 0, False: 8.24k] ------------------ 3944| | // op: rd 3945| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3946| 0| Value |= (op & UINT64_C(31)) << 11; 3947| | // op: rs 3948| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3949| 0| Value |= (op & UINT64_C(31)) << 21; 3950| | // op: rt 3951| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3952| 0| Value |= (op & UINT64_C(31)) << 16; 3953| | // op: bp 3954| 0| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 3955| 0| Value |= (op & UINT64_C(3)) << 6; 3956| 0| break; 3957| 64| } 3958| 0| case Mips::ALIGN_MMR6: { ------------------ | Branch (3958:5): [True: 0, False: 8.24k] ------------------ 3959| | // op: rd 3960| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3961| 0| Value |= (op & UINT64_C(31)) << 11; 3962| | // op: rs 3963| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3964| 0| Value |= (op & UINT64_C(31)) << 21; 3965| | // op: rt 3966| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3967| 0| Value |= (op & UINT64_C(31)) << 16; 3968| | // op: bp 3969| 0| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 3970| 0| Value |= (op & UINT64_C(3)) << 9; 3971| 0| break; 3972| 64| } 3973| 0| case Mips::DALIGN: { ------------------ | Branch (3973:5): [True: 0, False: 8.24k] ------------------ 3974| | // op: rd 3975| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3976| 0| Value |= (op & UINT64_C(31)) << 11; 3977| | // op: rs 3978| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3979| 0| Value |= (op & UINT64_C(31)) << 21; 3980| | // op: rt 3981| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3982| 0| Value |= (op & UINT64_C(31)) << 16; 3983| | // op: bp 3984| 0| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 3985| 0| Value |= (op & UINT64_C(7)) << 6; 3986| 0| break; 3987| 64| } 3988| 0| case Mips::DLSA_R6: ------------------ | Branch (3988:5): [True: 0, False: 8.24k] ------------------ 3989| 0| case Mips::LSA_R6: { ------------------ | Branch (3989:5): [True: 0, False: 8.24k] ------------------ 3990| | // op: rd 3991| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3992| 0| Value |= (op & UINT64_C(31)) << 11; 3993| | // op: rs 3994| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3995| 0| Value |= (op & UINT64_C(31)) << 21; 3996| | // op: rt 3997| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3998| 0| Value |= (op & UINT64_C(31)) << 16; 3999| | // op: imm2 4000| 0| op = getUImmWithOffsetEncoding<2, 1>(MI, 3, Fixups, STI); 4001| 0| Value |= (op & UINT64_C(3)) << 6; 4002| 0| break; 4003| 0| } 4004| 0| case Mips::SHLLV_PH_MM: ------------------ | Branch (4004:5): [True: 0, False: 8.24k] ------------------ 4005| 0| case Mips::SHLLV_QB_MM: ------------------ | Branch (4005:5): [True: 0, False: 8.24k] ------------------ 4006| 0| case Mips::SHLLV_S_PH_MM: ------------------ | Branch (4006:5): [True: 0, False: 8.24k] ------------------ 4007| 0| case Mips::SHLLV_S_W_MM: ------------------ | Branch (4007:5): [True: 0, False: 8.24k] ------------------ 4008| 0| case Mips::SHRAV_PH_MM: ------------------ | Branch (4008:5): [True: 0, False: 8.24k] ------------------ 4009| 0| case Mips::SHRAV_QB_MMR2: ------------------ | Branch (4009:5): [True: 0, False: 8.24k] ------------------ 4010| 0| case Mips::SHRAV_R_PH_MM: ------------------ | Branch (4010:5): [True: 0, False: 8.24k] ------------------ 4011| 0| case Mips::SHRAV_R_QB_MMR2: ------------------ | Branch (4011:5): [True: 0, False: 8.24k] ------------------ 4012| 0| case Mips::SHRAV_R_W_MM: ------------------ | Branch (4012:5): [True: 0, False: 8.24k] ------------------ 4013| 0| case Mips::SHRLV_PH_MMR2: ------------------ | Branch (4013:5): [True: 0, False: 8.24k] ------------------ 4014| 0| case Mips::SHRLV_QB_MM: { ------------------ | Branch (4014:5): [True: 0, False: 8.24k] ------------------ 4015| | // op: rd 4016| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4017| 0| Value |= (op & UINT64_C(31)) << 11; 4018| | // op: rs 4019| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4020| 0| Value |= (op & UINT64_C(31)) << 16; 4021| | // op: rt 4022| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4023| 0| Value |= (op & UINT64_C(31)) << 21; 4024| 0| break; 4025| 0| } 4026| 0| case Mips::ABSQ_S_PH: ------------------ | Branch (4026:5): [True: 0, False: 8.24k] ------------------ 4027| 0| case Mips::ABSQ_S_QB: ------------------ | Branch (4027:5): [True: 0, False: 8.24k] ------------------ 4028| 0| case Mips::ABSQ_S_W: ------------------ | Branch (4028:5): [True: 0, False: 8.24k] ------------------ 4029| 0| case Mips::BITREV: ------------------ | Branch (4029:5): [True: 0, False: 8.24k] ------------------ 4030| 0| case Mips::BITSWAP: ------------------ | Branch (4030:5): [True: 0, False: 8.24k] ------------------ 4031| 0| case Mips::DBITSWAP: ------------------ | Branch (4031:5): [True: 0, False: 8.24k] ------------------ 4032| 0| case Mips::DSBH: ------------------ | Branch (4032:5): [True: 0, False: 8.24k] ------------------ 4033| 0| case Mips::DSHD: ------------------ | Branch (4033:5): [True: 0, False: 8.24k] ------------------ 4034| 0| case Mips::DSLL64_32: ------------------ | Branch (4034:5): [True: 0, False: 8.24k] ------------------ 4035| 0| case Mips::PRECEQU_PH_QBL: ------------------ | Branch (4035:5): [True: 0, False: 8.24k] ------------------ 4036| 0| case Mips::PRECEQU_PH_QBLA: ------------------ | Branch (4036:5): [True: 0, False: 8.24k] ------------------ 4037| 0| case Mips::PRECEQU_PH_QBR: ------------------ | Branch (4037:5): [True: 0, False: 8.24k] ------------------ 4038| 0| case Mips::PRECEQU_PH_QBRA: ------------------ | Branch (4038:5): [True: 0, False: 8.24k] ------------------ 4039| 0| case Mips::PRECEQ_W_PHL: ------------------ | Branch (4039:5): [True: 0, False: 8.24k] ------------------ 4040| 0| case Mips::PRECEQ_W_PHR: ------------------ | Branch (4040:5): [True: 0, False: 8.24k] ------------------ 4041| 0| case Mips::PRECEU_PH_QBL: ------------------ | Branch (4041:5): [True: 0, False: 8.24k] ------------------ 4042| 0| case Mips::PRECEU_PH_QBLA: ------------------ | Branch (4042:5): [True: 0, False: 8.24k] ------------------ 4043| 0| case Mips::PRECEU_PH_QBR: ------------------ | Branch (4043:5): [True: 0, False: 8.24k] ------------------ 4044| 0| case Mips::PRECEU_PH_QBRA: ------------------ | Branch (4044:5): [True: 0, False: 8.24k] ------------------ 4045| 0| case Mips::REPLV_PH: ------------------ | Branch (4045:5): [True: 0, False: 8.24k] ------------------ 4046| 0| case Mips::REPLV_QB: ------------------ | Branch (4046:5): [True: 0, False: 8.24k] ------------------ 4047| 0| case Mips::SEB: ------------------ | Branch (4047:5): [True: 0, False: 8.24k] ------------------ 4048| 0| case Mips::SEB64: ------------------ | Branch (4048:5): [True: 0, False: 8.24k] ------------------ 4049| 0| case Mips::SEH: ------------------ | Branch (4049:5): [True: 0, False: 8.24k] ------------------ 4050| 0| case Mips::SEH64: ------------------ | Branch (4050:5): [True: 0, False: 8.24k] ------------------ 4051| 0| case Mips::SLL64_32: ------------------ | Branch (4051:5): [True: 0, False: 8.24k] ------------------ 4052| 0| case Mips::SLL64_64: ------------------ | Branch (4052:5): [True: 0, False: 8.24k] ------------------ 4053| 0| case Mips::WSBH: { ------------------ | Branch (4053:5): [True: 0, False: 8.24k] ------------------ 4054| | // op: rd 4055| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4056| 0| Value |= (op & UINT64_C(31)) << 11; 4057| | // op: rt 4058| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4059| 0| Value |= (op & UINT64_C(31)) << 16; 4060| 0| break; 4061| 0| } 4062| 0| case Mips::DROTRV: ------------------ | Branch (4062:5): [True: 0, False: 8.24k] ------------------ 4063| 0| case Mips::DSLLV: ------------------ | Branch (4063:5): [True: 0, False: 8.24k] ------------------ 4064| 0| case Mips::DSRAV: ------------------ | Branch (4064:5): [True: 0, False: 8.24k] ------------------ 4065| 0| case Mips::DSRLV: ------------------ | Branch (4065:5): [True: 0, False: 8.24k] ------------------ 4066| 0| case Mips::ROTRV: ------------------ | Branch (4066:5): [True: 0, False: 8.24k] ------------------ 4067| 0| case Mips::SLLV: ------------------ | Branch (4067:5): [True: 0, False: 8.24k] ------------------ 4068| 0| case Mips::SRAV: ------------------ | Branch (4068:5): [True: 0, False: 8.24k] ------------------ 4069| 0| case Mips::SRLV: { ------------------ | Branch (4069:5): [True: 0, False: 8.24k] ------------------ 4070| | // op: rd 4071| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4072| 0| Value |= (op & UINT64_C(31)) << 11; 4073| | // op: rt 4074| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4075| 0| Value |= (op & UINT64_C(31)) << 16; 4076| | // op: rs 4077| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4078| 0| Value |= (op & UINT64_C(31)) << 21; 4079| 0| break; 4080| 0| } 4081| 0| case Mips::SHLLV_PH: ------------------ | Branch (4081:5): [True: 0, False: 8.24k] ------------------ 4082| 0| case Mips::SHLLV_QB: ------------------ | Branch (4082:5): [True: 0, False: 8.24k] ------------------ 4083| 0| case Mips::SHLLV_S_PH: ------------------ | Branch (4083:5): [True: 0, False: 8.24k] ------------------ 4084| 0| case Mips::SHLLV_S_W: ------------------ | Branch (4084:5): [True: 0, False: 8.24k] ------------------ 4085| 0| case Mips::SHLL_PH: ------------------ | Branch (4085:5): [True: 0, False: 8.24k] ------------------ 4086| 0| case Mips::SHLL_QB: ------------------ | Branch (4086:5): [True: 0, False: 8.24k] ------------------ 4087| 0| case Mips::SHLL_S_PH: ------------------ | Branch (4087:5): [True: 0, False: 8.24k] ------------------ 4088| 0| case Mips::SHLL_S_W: ------------------ | Branch (4088:5): [True: 0, False: 8.24k] ------------------ 4089| 0| case Mips::SHRAV_PH: ------------------ | Branch (4089:5): [True: 0, False: 8.24k] ------------------ 4090| 0| case Mips::SHRAV_QB: ------------------ | Branch (4090:5): [True: 0, False: 8.24k] ------------------ 4091| 0| case Mips::SHRAV_R_PH: ------------------ | Branch (4091:5): [True: 0, False: 8.24k] ------------------ 4092| 0| case Mips::SHRAV_R_QB: ------------------ | Branch (4092:5): [True: 0, False: 8.24k] ------------------ 4093| 0| case Mips::SHRAV_R_W: ------------------ | Branch (4093:5): [True: 0, False: 8.24k] ------------------ 4094| 0| case Mips::SHRA_PH: ------------------ | Branch (4094:5): [True: 0, False: 8.24k] ------------------ 4095| 0| case Mips::SHRA_QB: ------------------ | Branch (4095:5): [True: 0, False: 8.24k] ------------------ 4096| 0| case Mips::SHRA_R_PH: ------------------ | Branch (4096:5): [True: 0, False: 8.24k] ------------------ 4097| 0| case Mips::SHRA_R_QB: ------------------ | Branch (4097:5): [True: 0, False: 8.24k] ------------------ 4098| 0| case Mips::SHRA_R_W: ------------------ | Branch (4098:5): [True: 0, False: 8.24k] ------------------ 4099| 0| case Mips::SHRLV_PH: ------------------ | Branch (4099:5): [True: 0, False: 8.24k] ------------------ 4100| 0| case Mips::SHRLV_QB: ------------------ | Branch (4100:5): [True: 0, False: 8.24k] ------------------ 4101| 0| case Mips::SHRL_PH: ------------------ | Branch (4101:5): [True: 0, False: 8.24k] ------------------ 4102| 0| case Mips::SHRL_QB: { ------------------ | Branch (4102:5): [True: 0, False: 8.24k] ------------------ 4103| | // op: rd 4104| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4105| 0| Value |= (op & UINT64_C(31)) << 11; 4106| | // op: rt 4107| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4108| 0| Value |= (op & UINT64_C(31)) << 16; 4109| | // op: rs_sa 4110| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4111| 0| Value |= (op & UINT64_C(31)) << 21; 4112| 0| break; 4113| 0| } 4114| 0| case Mips::DROTR: ------------------ | Branch (4114:5): [True: 0, False: 8.24k] ------------------ 4115| 0| case Mips::DROTR32: ------------------ | Branch (4115:5): [True: 0, False: 8.24k] ------------------ 4116| 0| case Mips::DSLL: ------------------ | Branch (4116:5): [True: 0, False: 8.24k] ------------------ 4117| 0| case Mips::DSLL32: ------------------ | Branch (4117:5): [True: 0, False: 8.24k] ------------------ 4118| 0| case Mips::DSRA: ------------------ | Branch (4118:5): [True: 0, False: 8.24k] ------------------ 4119| 0| case Mips::DSRA32: ------------------ | Branch (4119:5): [True: 0, False: 8.24k] ------------------ 4120| 0| case Mips::DSRL: ------------------ | Branch (4120:5): [True: 0, False: 8.24k] ------------------ 4121| 0| case Mips::DSRL32: ------------------ | Branch (4121:5): [True: 0, False: 8.24k] ------------------ 4122| 0| case Mips::ROTR: ------------------ | Branch (4122:5): [True: 0, False: 8.24k] ------------------ 4123| 3.84k| case Mips::SLL: ------------------ | Branch (4123:5): [True: 3.84k, False: 4.39k] ------------------ 4124| 3.84k| case Mips::SRA: ------------------ | Branch (4124:5): [True: 0, False: 8.24k] ------------------ 4125| 3.84k| case Mips::SRL: { ------------------ | Branch (4125:5): [True: 0, False: 8.24k] ------------------ 4126| | // op: rd 4127| 3.84k| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4128| 3.84k| Value |= (op & UINT64_C(31)) << 11; 4129| | // op: rt 4130| 3.84k| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4131| 3.84k| Value |= (op & UINT64_C(31)) << 16; 4132| | // op: shamt 4133| 3.84k| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4134| 3.84k| Value |= (op & UINT64_C(31)) << 6; 4135| 3.84k| break; 4136| 3.84k| } 4137| 0| case Mips::ROTRV_MM: ------------------ | Branch (4137:5): [True: 0, False: 8.24k] ------------------ 4138| 0| case Mips::SLLV_MM: ------------------ | Branch (4138:5): [True: 0, False: 8.24k] ------------------ 4139| 0| case Mips::SRAV_MM: ------------------ | Branch (4139:5): [True: 0, False: 8.24k] ------------------ 4140| 0| case Mips::SRLV_MM: { ------------------ | Branch (4140:5): [True: 0, False: 8.24k] ------------------ 4141| | // op: rd 4142| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4143| 0| Value |= (op & UINT64_C(31)) << 11; 4144| | // op: rt 4145| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4146| 0| Value |= (op & UINT64_C(31)) << 21; 4147| | // op: rs 4148| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4149| 0| Value |= (op & UINT64_C(31)) << 16; 4150| 0| break; 4151| 0| } 4152| 0| case Mips::ADDU_MMR6: ------------------ | Branch (4152:5): [True: 0, False: 8.24k] ------------------ 4153| 0| case Mips::ADD_MMR6: ------------------ | Branch (4153:5): [True: 0, False: 8.24k] ------------------ 4154| 0| case Mips::AND_MMR6: ------------------ | Branch (4154:5): [True: 0, False: 8.24k] ------------------ 4155| 0| case Mips::DIVU_MMR6: ------------------ | Branch (4155:5): [True: 0, False: 8.24k] ------------------ 4156| 0| case Mips::DIV_MMR6: ------------------ | Branch (4156:5): [True: 0, False: 8.24k] ------------------ 4157| 0| case Mips::MODU_MMR6: ------------------ | Branch (4157:5): [True: 0, False: 8.24k] ------------------ 4158| 0| case Mips::MOD_MMR6: ------------------ | Branch (4158:5): [True: 0, False: 8.24k] ------------------ 4159| 0| case Mips::MUHU_MMR6: ------------------ | Branch (4159:5): [True: 0, False: 8.24k] ------------------ 4160| 0| case Mips::MUH_MMR6: ------------------ | Branch (4160:5): [True: 0, False: 8.24k] ------------------ 4161| 0| case Mips::MULU_MMR6: ------------------ | Branch (4161:5): [True: 0, False: 8.24k] ------------------ 4162| 0| case Mips::MUL_MMR6: ------------------ | Branch (4162:5): [True: 0, False: 8.24k] ------------------ 4163| 0| case Mips::NOR_MMR6: ------------------ | Branch (4163:5): [True: 0, False: 8.24k] ------------------ 4164| 0| case Mips::OR_MMR6: ------------------ | Branch (4164:5): [True: 0, False: 8.24k] ------------------ 4165| 0| case Mips::SUBU_MMR6: ------------------ | Branch (4165:5): [True: 0, False: 8.24k] ------------------ 4166| 0| case Mips::SUB_MMR6: ------------------ | Branch (4166:5): [True: 0, False: 8.24k] ------------------ 4167| 0| case Mips::XOR_MMR6: { ------------------ | Branch (4167:5): [True: 0, False: 8.24k] ------------------ 4168| | // op: rd 4169| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4170| 0| Value |= (op & UINT64_C(31)) << 11; 4171| | // op: rt 4172| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4173| 0| Value |= (op & UINT64_C(31)) << 21; 4174| | // op: rs 4175| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4176| 0| Value |= (op & UINT64_C(31)) << 16; 4177| 0| break; 4178| 0| } 4179| 0| case Mips::MFHI_MM: ------------------ | Branch (4179:5): [True: 0, False: 8.24k] ------------------ 4180| 0| case Mips::MFLO_MM: { ------------------ | Branch (4180:5): [True: 0, False: 8.24k] ------------------ 4181| | // op: rd 4182| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4183| 0| Value |= (op & UINT64_C(31)) << 16; 4184| 0| break; 4185| 0| } 4186| 0| case Mips::BITSWAP_MMR6: { ------------------ | Branch (4186:5): [True: 0, False: 8.24k] ------------------ 4187| | // op: rd 4188| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4189| 0| Value |= (op & UINT64_C(31)) << 16; 4190| | // op: rt 4191| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4192| 0| Value |= (op & UINT64_C(31)) << 21; 4193| 0| break; 4194| 0| } 4195| 0| case Mips::CLO: ------------------ | Branch (4195:5): [True: 0, False: 8.24k] ------------------ 4196| 0| case Mips::CLZ: ------------------ | Branch (4196:5): [True: 0, False: 8.24k] ------------------ 4197| 0| case Mips::DCLO: ------------------ | Branch (4197:5): [True: 0, False: 8.24k] ------------------ 4198| 0| case Mips::DCLZ: { ------------------ | Branch (4198:5): [True: 0, False: 8.24k] ------------------ 4199| | // op: rd 4200| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4201| 0| Value |= (op & UINT64_C(31)) << 16; 4202| 0| Value |= (op & UINT64_C(31)) << 11; 4203| | // op: rs 4204| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4205| 0| Value |= (op & UINT64_C(31)) << 21; 4206| 0| break; 4207| 0| } 4208| 0| case Mips::CLO_MM: ------------------ | Branch (4208:5): [True: 0, False: 8.24k] ------------------ 4209| 0| case Mips::CLZ_MM: { ------------------ | Branch (4209:5): [True: 0, False: 8.24k] ------------------ 4210| | // op: rd 4211| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4212| 0| Value |= (op & UINT64_C(31)) << 21; 4213| | // op: rs 4214| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4215| 0| Value |= (op & UINT64_C(31)) << 16; 4216| 0| break; 4217| 0| } 4218| 0| case Mips::MOVF_I_MM: ------------------ | Branch (4218:5): [True: 0, False: 8.24k] ------------------ 4219| 0| case Mips::MOVT_I_MM: { ------------------ | Branch (4219:5): [True: 0, False: 8.24k] ------------------ 4220| | // op: rd 4221| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4222| 0| Value |= (op & UINT64_C(31)) << 21; 4223| | // op: rs 4224| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4225| 0| Value |= (op & UINT64_C(31)) << 16; 4226| | // op: fcc 4227| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4228| 0| Value |= (op & UINT64_C(7)) << 13; 4229| 0| break; 4230| 0| } 4231| 0| case Mips::DDIVU_MM64R6: ------------------ | Branch (4231:5): [True: 0, False: 8.24k] ------------------ 4232| 0| case Mips::DDIV_MM64R6: ------------------ | Branch (4232:5): [True: 0, False: 8.24k] ------------------ 4233| 0| case Mips::DMODU_MM64R6: ------------------ | Branch (4233:5): [True: 0, False: 8.24k] ------------------ 4234| 0| case Mips::DMOD_MM64R6: { ------------------ | Branch (4234:5): [True: 0, False: 8.24k] ------------------ 4235| | // op: rd 4236| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4237| 0| Value |= (op & UINT64_C(31)) << 21; 4238| | // op: rs 4239| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4240| 0| Value |= (op & UINT64_C(31)) << 16; 4241| | // op: rt 4242| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4243| 0| Value |= (op & UINT64_C(31)) << 11; 4244| 0| break; 4245| 0| } 4246| 0| case Mips::SEB_MM: ------------------ | Branch (4246:5): [True: 0, False: 8.24k] ------------------ 4247| 0| case Mips::SEB_MMR6: ------------------ | Branch (4247:5): [True: 0, False: 8.24k] ------------------ 4248| 0| case Mips::SEH_MM: ------------------ | Branch (4248:5): [True: 0, False: 8.24k] ------------------ 4249| 0| case Mips::SEH_MMR6: ------------------ | Branch (4249:5): [True: 0, False: 8.24k] ------------------ 4250| 0| case Mips::WSBH_MM: { ------------------ | Branch (4250:5): [True: 0, False: 8.24k] ------------------ 4251| | // op: rd 4252| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4253| 0| Value |= (op & UINT64_C(31)) << 21; 4254| | // op: rt 4255| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4256| 0| Value |= (op & UINT64_C(31)) << 16; 4257| 0| break; 4258| 0| } 4259| 0| case Mips::ROTR_MM: ------------------ | Branch (4259:5): [True: 0, False: 8.24k] ------------------ 4260| 0| case Mips::SLL_MM: ------------------ | Branch (4260:5): [True: 0, False: 8.24k] ------------------ 4261| 0| case Mips::SLL_MMR6: ------------------ | Branch (4261:5): [True: 0, False: 8.24k] ------------------ 4262| 0| case Mips::SRA_MM: ------------------ | Branch (4262:5): [True: 0, False: 8.24k] ------------------ 4263| 0| case Mips::SRL_MM: { ------------------ | Branch (4263:5): [True: 0, False: 8.24k] ------------------ 4264| | // op: rd 4265| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4266| 0| Value |= (op & UINT64_C(31)) << 21; 4267| | // op: rt 4268| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4269| 0| Value |= (op & UINT64_C(31)) << 16; 4270| | // op: shamt 4271| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4272| 0| Value |= (op & UINT64_C(31)) << 11; 4273| 0| break; 4274| 0| } 4275| 0| case Mips::CFCMSA: { ------------------ | Branch (4275:5): [True: 0, False: 8.24k] ------------------ 4276| | // op: rd 4277| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4278| 0| Value |= (op & UINT64_C(31)) << 6; 4279| | // op: cs 4280| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4281| 0| Value |= (op & UINT64_C(31)) << 11; 4282| 0| break; 4283| 0| } 4284| 0| case Mips::LI16_MM: ------------------ | Branch (4284:5): [True: 0, False: 8.24k] ------------------ 4285| 0| case Mips::LI16_MMR6: { ------------------ | Branch (4285:5): [True: 0, False: 8.24k] ------------------ 4286| | // op: rd 4287| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4288| 0| Value |= (op & UINT64_C(7)) << 7; 4289| | // op: imm 4290| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4291| 0| Value |= op & UINT64_C(127); 4292| 0| break; 4293| 0| } 4294| 0| case Mips::ADDIUR1SP_MM: { ------------------ | Branch (4294:5): [True: 0, False: 8.24k] ------------------ 4295| | // op: rd 4296| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4297| 0| Value |= (op & UINT64_C(7)) << 7; 4298| | // op: imm 4299| 0| op = getUImm6Lsl2Encoding(MI, 1, Fixups, STI); 4300| 0| Value |= (op & UINT64_C(63)) << 1; 4301| 0| break; 4302| 0| } 4303| 0| case Mips::ADDIUR2_MM: { ------------------ | Branch (4303:5): [True: 0, False: 8.24k] ------------------ 4304| | // op: rd 4305| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4306| 0| Value |= (op & UINT64_C(7)) << 7; 4307| | // op: rs 4308| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4309| 0| Value |= (op & UINT64_C(7)) << 4; 4310| | // op: imm 4311| 0| op = getSImm3Lsa2Value(MI, 2, Fixups, STI); 4312| 0| Value |= (op & UINT64_C(7)) << 1; 4313| 0| break; 4314| 0| } 4315| 0| case Mips::ANDI16_MM: ------------------ | Branch (4315:5): [True: 0, False: 8.24k] ------------------ 4316| 0| case Mips::ANDI16_MMR6: { ------------------ | Branch (4316:5): [True: 0, False: 8.24k] ------------------ 4317| | // op: rd 4318| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4319| 0| Value |= (op & UINT64_C(7)) << 7; 4320| | // op: rs 4321| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4322| 0| Value |= (op & UINT64_C(7)) << 4; 4323| | // op: imm 4324| 0| op = getUImm4AndValue(MI, 2, Fixups, STI); 4325| 0| Value |= op & UINT64_C(15); 4326| 0| break; 4327| 0| } 4328| 0| case Mips::SLL16_MM: ------------------ | Branch (4328:5): [True: 0, False: 8.24k] ------------------ 4329| 0| case Mips::SLL16_MMR6: ------------------ | Branch (4329:5): [True: 0, False: 8.24k] ------------------ 4330| 0| case Mips::SRL16_MM: ------------------ | Branch (4330:5): [True: 0, False: 8.24k] ------------------ 4331| 0| case Mips::SRL16_MMR6: { ------------------ | Branch (4331:5): [True: 0, False: 8.24k] ------------------ 4332| | // op: rd 4333| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4334| 0| Value |= (op & UINT64_C(7)) << 7; 4335| | // op: rt 4336| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4337| 0| Value |= (op & UINT64_C(7)) << 4; 4338| | // op: shamt 4339| 0| op = getUImm3Mod8Encoding(MI, 2, Fixups, STI); 4340| 0| Value |= (op & UINT64_C(7)) << 1; 4341| 0| break; 4342| 0| } 4343| 0| case Mips::ADDU16_MM: ------------------ | Branch (4343:5): [True: 0, False: 8.24k] ------------------ 4344| 0| case Mips::SUBU16_MM: { ------------------ | Branch (4344:5): [True: 0, False: 8.24k] ------------------ 4345| | // op: rd 4346| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4347| 0| Value |= (op & UINT64_C(7)) << 7; 4348| | // op: rt 4349| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4350| 0| Value |= (op & UINT64_C(7)) << 4; 4351| | // op: rs 4352| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4353| 0| Value |= (op & UINT64_C(7)) << 1; 4354| 0| break; 4355| 0| } 4356| 0| case Mips::MFHI16_MM: ------------------ | Branch (4356:5): [True: 0, False: 8.24k] ------------------ 4357| 0| case Mips::MFLO16_MM: { ------------------ | Branch (4357:5): [True: 0, False: 8.24k] ------------------ 4358| | // op: rd 4359| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4360| 0| Value |= op & UINT64_C(31); 4361| 0| break; 4362| 0| } 4363| 0| case Mips::ADDIUS5_MM: { ------------------ | Branch (4363:5): [True: 0, False: 8.24k] ------------------ 4364| | // op: rd 4365| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4366| 0| Value |= (op & UINT64_C(31)) << 5; 4367| | // op: imm 4368| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4369| 0| Value |= (op & UINT64_C(15)) << 1; 4370| 0| break; 4371| 0| } 4372| 0| case Mips::JR_MM: ------------------ | Branch (4372:5): [True: 0, False: 8.24k] ------------------ 4373| 0| case Mips::MTHI_MM: ------------------ | Branch (4373:5): [True: 0, False: 8.24k] ------------------ 4374| 0| case Mips::MTLO_MM: { ------------------ | Branch (4374:5): [True: 0, False: 8.24k] ------------------ 4375| | // op: rs 4376| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4377| 0| Value |= (op & UINT64_C(31)) << 16; 4378| 0| break; 4379| 0| } 4380| 0| case Mips::MFHI_DSP_MM: ------------------ | Branch (4380:5): [True: 0, False: 8.24k] ------------------ 4381| 0| case Mips::MFLO_DSP_MM: { ------------------ | Branch (4381:5): [True: 0, False: 8.24k] ------------------ 4382| | // op: rs 4383| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4384| 0| Value |= (op & UINT64_C(31)) << 16; 4385| | // op: ac 4386| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4387| 0| Value |= (op & UINT64_C(3)) << 14; 4388| 0| break; 4389| 0| } 4390| 0| case Mips::DAHI_MM64R6: ------------------ | Branch (4390:5): [True: 0, False: 8.24k] ------------------ 4391| 0| case Mips::DATI_MM64R6: { ------------------ | Branch (4391:5): [True: 0, False: 8.24k] ------------------ 4392| | // op: rs 4393| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4394| 0| Value |= (op & UINT64_C(31)) << 16; 4395| | // op: imm 4396| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4397| 0| Value |= op & UINT64_C(65535); 4398| 0| break; 4399| 0| } 4400| 0| case Mips::TEQI_MM: ------------------ | Branch (4400:5): [True: 0, False: 8.24k] ------------------ 4401| 0| case Mips::TGEIU_MM: ------------------ | Branch (4401:5): [True: 0, False: 8.24k] ------------------ 4402| 0| case Mips::TGEI_MM: ------------------ | Branch (4402:5): [True: 0, False: 8.24k] ------------------ 4403| 0| case Mips::TLTIU_MM: ------------------ | Branch (4403:5): [True: 0, False: 8.24k] ------------------ 4404| 0| case Mips::TLTI_MM: ------------------ | Branch (4404:5): [True: 0, False: 8.24k] ------------------ 4405| 0| case Mips::TNEI_MM: { ------------------ | Branch (4405:5): [True: 0, False: 8.24k] ------------------ 4406| | // op: rs 4407| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4408| 0| Value |= (op & UINT64_C(31)) << 16; 4409| | // op: imm16 4410| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4411| 0| Value |= op & UINT64_C(65535); 4412| 0| break; 4413| 0| } 4414| 0| case Mips::BEQZC_MM: ------------------ | Branch (4414:5): [True: 0, False: 8.24k] ------------------ 4415| 0| case Mips::BGEZALS_MM: ------------------ | Branch (4415:5): [True: 0, False: 8.24k] ------------------ 4416| 0| case Mips::BGEZAL_MM: ------------------ | Branch (4416:5): [True: 0, False: 8.24k] ------------------ 4417| 0| case Mips::BGEZ_MM: ------------------ | Branch (4417:5): [True: 0, False: 8.24k] ------------------ 4418| 0| case Mips::BGTZ_MM: ------------------ | Branch (4418:5): [True: 0, False: 8.24k] ------------------ 4419| 0| case Mips::BLEZ_MM: ------------------ | Branch (4419:5): [True: 0, False: 8.24k] ------------------ 4420| 0| case Mips::BLTZALS_MM: ------------------ | Branch (4420:5): [True: 0, False: 8.24k] ------------------ 4421| 0| case Mips::BLTZAL_MM: ------------------ | Branch (4421:5): [True: 0, False: 8.24k] ------------------ 4422| 0| case Mips::BLTZ_MM: ------------------ | Branch (4422:5): [True: 0, False: 8.24k] ------------------ 4423| 0| case Mips::BNEZC_MM: { ------------------ | Branch (4423:5): [True: 0, False: 8.24k] ------------------ 4424| | // op: rs 4425| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4426| 0| Value |= (op & UINT64_C(31)) << 16; 4427| | // op: offset 4428| 0| op = getBranchTargetOpValueMM(MI, 1, Fixups, STI); 4429| 0| Value |= op & UINT64_C(65535); 4430| 0| break; 4431| 0| } 4432| 0| case Mips::MADDU_MM: ------------------ | Branch (4432:5): [True: 0, False: 8.24k] ------------------ 4433| 0| case Mips::MADD_MM: ------------------ | Branch (4433:5): [True: 0, False: 8.24k] ------------------ 4434| 0| case Mips::MSUBU_MM: ------------------ | Branch (4434:5): [True: 0, False: 8.24k] ------------------ 4435| 0| case Mips::MSUB_MM: ------------------ | Branch (4435:5): [True: 0, False: 8.24k] ------------------ 4436| 0| case Mips::MULT_MM: ------------------ | Branch (4436:5): [True: 0, False: 8.24k] ------------------ 4437| 0| case Mips::MULTu_MM: ------------------ | Branch (4437:5): [True: 0, False: 8.24k] ------------------ 4438| 0| case Mips::SDIV_MM: ------------------ | Branch (4438:5): [True: 0, False: 8.24k] ------------------ 4439| 0| case Mips::UDIV_MM: { ------------------ | Branch (4439:5): [True: 0, False: 8.24k] ------------------ 4440| | // op: rs 4441| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4442| 0| Value |= (op & UINT64_C(31)) << 16; 4443| | // op: rt 4444| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4445| 0| Value |= (op & UINT64_C(31)) << 21; 4446| 0| break; 4447| 0| } 4448| 0| case Mips::TEQ_MM: ------------------ | Branch (4448:5): [True: 0, False: 8.24k] ------------------ 4449| 0| case Mips::TGEU_MM: ------------------ | Branch (4449:5): [True: 0, False: 8.24k] ------------------ 4450| 0| case Mips::TGE_MM: ------------------ | Branch (4450:5): [True: 0, False: 8.24k] ------------------ 4451| 0| case Mips::TLTU_MM: ------------------ | Branch (4451:5): [True: 0, False: 8.24k] ------------------ 4452| 0| case Mips::TLT_MM: ------------------ | Branch (4452:5): [True: 0, False: 8.24k] ------------------ 4453| 0| case Mips::TNE_MM: { ------------------ | Branch (4453:5): [True: 0, False: 8.24k] ------------------ 4454| | // op: rs 4455| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4456| 0| Value |= (op & UINT64_C(31)) << 16; 4457| | // op: rt 4458| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4459| 0| Value |= (op & UINT64_C(31)) << 21; 4460| | // op: code_ 4461| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4462| 0| Value |= (op & UINT64_C(15)) << 12; 4463| 0| break; 4464| 0| } 4465| 0| case Mips::BEQ_MM: ------------------ | Branch (4465:5): [True: 0, False: 8.24k] ------------------ 4466| 0| case Mips::BNE_MM: { ------------------ | Branch (4466:5): [True: 0, False: 8.24k] ------------------ 4467| | // op: rs 4468| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4469| 0| Value |= (op & UINT64_C(31)) << 16; 4470| | // op: rt 4471| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4472| 0| Value |= (op & UINT64_C(31)) << 21; 4473| | // op: offset 4474| 0| op = getBranchTargetOpValueMM(MI, 2, Fixups, STI); 4475| 0| Value |= op & UINT64_C(65535); 4476| 0| break; 4477| 0| } 4478| 0| case Mips::JR: ------------------ | Branch (4478:5): [True: 0, False: 8.24k] ------------------ 4479| 0| case Mips::JR64: ------------------ | Branch (4479:5): [True: 0, False: 8.24k] ------------------ 4480| 0| case Mips::JR_HB: ------------------ | Branch (4480:5): [True: 0, False: 8.24k] ------------------ 4481| 0| case Mips::JR_HB_R6: ------------------ | Branch (4481:5): [True: 0, False: 8.24k] ------------------ 4482| 0| case Mips::MTHI: ------------------ | Branch (4482:5): [True: 0, False: 8.24k] ------------------ 4483| 0| case Mips::MTHI64: ------------------ | Branch (4483:5): [True: 0, False: 8.24k] ------------------ 4484| 0| case Mips::MTLO: ------------------ | Branch (4484:5): [True: 0, False: 8.24k] ------------------ 4485| 0| case Mips::MTLO64: ------------------ | Branch (4485:5): [True: 0, False: 8.24k] ------------------ 4486| 0| case Mips::MTM0: ------------------ | Branch (4486:5): [True: 0, False: 8.24k] ------------------ 4487| 0| case Mips::MTM1: ------------------ | Branch (4487:5): [True: 0, False: 8.24k] ------------------ 4488| 0| case Mips::MTM2: ------------------ | Branch (4488:5): [True: 0, False: 8.24k] ------------------ 4489| 0| case Mips::MTP0: ------------------ | Branch (4489:5): [True: 0, False: 8.24k] ------------------ 4490| 0| case Mips::MTP1: ------------------ | Branch (4490:5): [True: 0, False: 8.24k] ------------------ 4491| 0| case Mips::MTP2: { ------------------ | Branch (4491:5): [True: 0, False: 8.24k] ------------------ 4492| | // op: rs 4493| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4494| 0| Value |= (op & UINT64_C(31)) << 21; 4495| 0| break; 4496| 0| } 4497| 0| case Mips::ALUIPC: ------------------ | Branch (4497:5): [True: 0, False: 8.24k] ------------------ 4498| 0| case Mips::AUIPC: { ------------------ | Branch (4498:5): [True: 0, False: 8.24k] ------------------ 4499| | // op: rs 4500| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4501| 0| Value |= (op & UINT64_C(31)) << 21; 4502| | // op: imm 4503| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4504| 0| Value |= op & UINT64_C(65535); 4505| 0| break; 4506| 0| } 4507| 0| case Mips::DAHI: ------------------ | Branch (4507:5): [True: 0, False: 8.24k] ------------------ 4508| 0| case Mips::DATI: { ------------------ | Branch (4508:5): [True: 0, False: 8.24k] ------------------ 4509| | // op: rs 4510| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4511| 0| Value |= (op & UINT64_C(31)) << 21; 4512| | // op: imm 4513| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4514| 0| Value |= op & UINT64_C(65535); 4515| 0| break; 4516| 0| } 4517| 0| case Mips::LDPC: { ------------------ | Branch (4517:5): [True: 0, False: 8.24k] ------------------ 4518| | // op: rs 4519| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4520| 0| Value |= (op & UINT64_C(31)) << 21; 4521| | // op: imm 4522| 0| op = getSimm18Lsl3Encoding(MI, 1, Fixups, STI); 4523| 0| Value |= op & UINT64_C(262143); 4524| 0| break; 4525| 0| } 4526| 0| case Mips::ADDIUPC: ------------------ | Branch (4526:5): [True: 0, False: 8.24k] ------------------ 4527| 0| case Mips::LWPC: ------------------ | Branch (4527:5): [True: 0, False: 8.24k] ------------------ 4528| 0| case Mips::LWUPC: { ------------------ | Branch (4528:5): [True: 0, False: 8.24k] ------------------ 4529| | // op: rs 4530| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4531| 0| Value |= (op & UINT64_C(31)) << 21; 4532| | // op: imm 4533| 0| op = getSimm19Lsl2Encoding(MI, 1, Fixups, STI); 4534| 0| Value |= op & UINT64_C(524287); 4535| 0| break; 4536| 0| } 4537| 0| case Mips::TEQI: ------------------ | Branch (4537:5): [True: 0, False: 8.24k] ------------------ 4538| 0| case Mips::TGEI: ------------------ | Branch (4538:5): [True: 0, False: 8.24k] ------------------ 4539| 0| case Mips::TGEIU: ------------------ | Branch (4539:5): [True: 0, False: 8.24k] ------------------ 4540| 0| case Mips::TLTI: ------------------ | Branch (4540:5): [True: 0, False: 8.24k] ------------------ 4541| 0| case Mips::TNEI: ------------------ | Branch (4541:5): [True: 0, False: 8.24k] ------------------ 4542| 0| case Mips::TTLTIU: { ------------------ | Branch (4542:5): [True: 0, False: 8.24k] ------------------ 4543| | // op: rs 4544| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4545| 0| Value |= (op & UINT64_C(31)) << 21; 4546| | // op: imm16 4547| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4548| 0| Value |= op & UINT64_C(65535); 4549| 0| break; 4550| 0| } 4551| 0| case Mips::WRDSP: { ------------------ | Branch (4551:5): [True: 0, False: 8.24k] ------------------ 4552| | // op: rs 4553| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4554| 0| Value |= (op & UINT64_C(31)) << 21; 4555| | // op: mask 4556| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4557| 0| Value |= (op & UINT64_C(1023)) << 11; 4558| 0| break; 4559| 0| } 4560| 0| case Mips::BEQZC: ------------------ | Branch (4560:5): [True: 0, False: 8.24k] ------------------ 4561| 0| case Mips::BNEZC: { ------------------ | Branch (4561:5): [True: 0, False: 8.24k] ------------------ 4562| | // op: rs 4563| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4564| 0| Value |= (op & UINT64_C(31)) << 21; 4565| | // op: offset 4566| 0| op = getBranchTarget21OpValue(MI, 1, Fixups, STI); 4567| 0| Value |= op & UINT64_C(2097151); 4568| 0| break; 4569| 0| } 4570| 32| case Mips::BGEZ: ------------------ | Branch (4570:5): [True: 32, False: 8.20k] ------------------ 4571| 32| case Mips::BGEZ64: ------------------ | Branch (4571:5): [True: 0, False: 8.24k] ------------------ 4572| 32| case Mips::BGEZAL: ------------------ | Branch (4572:5): [True: 0, False: 8.24k] ------------------ 4573| 32| case Mips::BGEZALL: ------------------ | Branch (4573:5): [True: 0, False: 8.24k] ------------------ 4574| 32| case Mips::BGEZL: ------------------ | Branch (4574:5): [True: 0, False: 8.24k] ------------------ 4575| 32| case Mips::BGTZ: ------------------ | Branch (4575:5): [True: 0, False: 8.24k] ------------------ 4576| 32| case Mips::BGTZ64: ------------------ | Branch (4576:5): [True: 0, False: 8.24k] ------------------ 4577| 32| case Mips::BGTZL: ------------------ | Branch (4577:5): [True: 0, False: 8.24k] ------------------ 4578| 32| case Mips::BLEZ: ------------------ | Branch (4578:5): [True: 0, False: 8.24k] ------------------ 4579| 32| case Mips::BLEZ64: ------------------ | Branch (4579:5): [True: 0, False: 8.24k] ------------------ 4580| 32| case Mips::BLEZL: ------------------ | Branch (4580:5): [True: 0, False: 8.24k] ------------------ 4581| 32| case Mips::BLTZ: ------------------ | Branch (4581:5): [True: 0, False: 8.24k] ------------------ 4582| 32| case Mips::BLTZ64: ------------------ | Branch (4582:5): [True: 0, False: 8.24k] ------------------ 4583| 32| case Mips::BLTZAL: ------------------ | Branch (4583:5): [True: 0, False: 8.24k] ------------------ 4584| 32| case Mips::BLTZALL: ------------------ | Branch (4584:5): [True: 0, False: 8.24k] ------------------ 4585| 32| case Mips::BLTZL: { ------------------ | Branch (4585:5): [True: 0, False: 8.24k] ------------------ 4586| | // op: rs 4587| 32| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4588| 32| Value |= (op & UINT64_C(31)) << 21; 4589| | // op: offset 4590| 32| op = getBranchTargetOpValue(MI, 1, Fixups, STI); 4591| 32| Value |= op & UINT64_C(65535); 4592| 32| break; 4593| 32| } 4594| 0| case Mips::BBIT0: ------------------ | Branch (4594:5): [True: 0, False: 8.24k] ------------------ 4595| 0| case Mips::BBIT032: ------------------ | Branch (4595:5): [True: 0, False: 8.24k] ------------------ 4596| 0| case Mips::BBIT1: ------------------ | Branch (4596:5): [True: 0, False: 8.24k] ------------------ 4597| 0| case Mips::BBIT132: { ------------------ | Branch (4597:5): [True: 0, False: 8.24k] ------------------ 4598| | // op: rs 4599| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4600| 0| Value |= (op & UINT64_C(31)) << 21; 4601| | // op: p 4602| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4603| 0| Value |= (op & UINT64_C(31)) << 16; 4604| | // op: offset 4605| 0| op = getBranchTargetOpValue(MI, 2, Fixups, STI); 4606| 0| Value |= op & UINT64_C(65535); 4607| 0| break; 4608| 0| } 4609| 0| case Mips::CMPU_EQ_QB: ------------------ | Branch (4609:5): [True: 0, False: 8.24k] ------------------ 4610| 0| case Mips::CMPU_LE_QB: ------------------ | Branch (4610:5): [True: 0, False: 8.24k] ------------------ 4611| 0| case Mips::CMPU_LT_QB: ------------------ | Branch (4611:5): [True: 0, False: 8.24k] ------------------ 4612| 0| case Mips::CMP_EQ_PH: ------------------ | Branch (4612:5): [True: 0, False: 8.24k] ------------------ 4613| 0| case Mips::CMP_LE_PH: ------------------ | Branch (4613:5): [True: 0, False: 8.24k] ------------------ 4614| 0| case Mips::CMP_LT_PH: ------------------ | Branch (4614:5): [True: 0, False: 8.24k] ------------------ 4615| 0| case Mips::DMULT: ------------------ | Branch (4615:5): [True: 0, False: 8.24k] ------------------ 4616| 0| case Mips::DMULTu: ------------------ | Branch (4616:5): [True: 0, False: 8.24k] ------------------ 4617| 0| case Mips::DSDIV: ------------------ | Branch (4617:5): [True: 0, False: 8.24k] ------------------ 4618| 0| case Mips::DUDIV: ------------------ | Branch (4618:5): [True: 0, False: 8.24k] ------------------ 4619| 0| case Mips::MADD: ------------------ | Branch (4619:5): [True: 0, False: 8.24k] ------------------ 4620| 0| case Mips::MADDU: ------------------ | Branch (4620:5): [True: 0, False: 8.24k] ------------------ 4621| 0| case Mips::MSUB: ------------------ | Branch (4621:5): [True: 0, False: 8.24k] ------------------ 4622| 0| case Mips::MSUBU: ------------------ | Branch (4622:5): [True: 0, False: 8.24k] ------------------ 4623| 0| case Mips::MULT: ------------------ | Branch (4623:5): [True: 0, False: 8.24k] ------------------ 4624| 0| case Mips::MULTu: ------------------ | Branch (4624:5): [True: 0, False: 8.24k] ------------------ 4625| 0| case Mips::SDIV: ------------------ | Branch (4625:5): [True: 0, False: 8.24k] ------------------ 4626| 0| case Mips::UDIV: { ------------------ | Branch (4626:5): [True: 0, False: 8.24k] ------------------ 4627| | // op: rs 4628| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4629| 0| Value |= (op & UINT64_C(31)) << 21; 4630| | // op: rt 4631| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4632| 0| Value |= (op & UINT64_C(31)) << 16; 4633| 0| break; 4634| 0| } 4635| 0| case Mips::TEQ: ------------------ | Branch (4635:5): [True: 0, False: 8.24k] ------------------ 4636| 0| case Mips::TGE: ------------------ | Branch (4636:5): [True: 0, False: 8.24k] ------------------ 4637| 0| case Mips::TGEU: ------------------ | Branch (4637:5): [True: 0, False: 8.24k] ------------------ 4638| 0| case Mips::TLT: ------------------ | Branch (4638:5): [True: 0, False: 8.24k] ------------------ 4639| 0| case Mips::TLTU: ------------------ | Branch (4639:5): [True: 0, False: 8.24k] ------------------ 4640| 0| case Mips::TNE: { ------------------ | Branch (4640:5): [True: 0, False: 8.24k] ------------------ 4641| | // op: rs 4642| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4643| 0| Value |= (op & UINT64_C(31)) << 21; 4644| | // op: rt 4645| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4646| 0| Value |= (op & UINT64_C(31)) << 16; 4647| | // op: code_ 4648| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4649| 0| Value |= (op & UINT64_C(1023)) << 6; 4650| 0| break; 4651| 0| } 4652| 0| case Mips::AUI: ------------------ | Branch (4652:5): [True: 0, False: 8.24k] ------------------ 4653| 0| case Mips::DAUI: { ------------------ | Branch (4653:5): [True: 0, False: 8.24k] ------------------ 4654| | // op: rs 4655| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4656| 0| Value |= (op & UINT64_C(31)) << 21; 4657| | // op: rt 4658| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4659| 0| Value |= (op & UINT64_C(31)) << 16; 4660| | // op: imm 4661| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4662| 0| Value |= op & UINT64_C(65535); 4663| 0| break; 4664| 0| } 4665| 3.71k| case Mips::BEQ: ------------------ | Branch (4665:5): [True: 3.71k, False: 4.52k] ------------------ 4666| 3.71k| case Mips::BEQ64: ------------------ | Branch (4666:5): [True: 0, False: 8.24k] ------------------ 4667| 3.71k| case Mips::BEQC: ------------------ | Branch (4667:5): [True: 0, False: 8.24k] ------------------ 4668| 3.71k| case Mips::BEQL: ------------------ | Branch (4668:5): [True: 0, False: 8.24k] ------------------ 4669| 3.71k| case Mips::BGEC: ------------------ | Branch (4669:5): [True: 0, False: 8.24k] ------------------ 4670| 3.71k| case Mips::BGEUC: ------------------ | Branch (4670:5): [True: 0, False: 8.24k] ------------------ 4671| 3.71k| case Mips::BLTC: ------------------ | Branch (4671:5): [True: 0, False: 8.24k] ------------------ 4672| 3.71k| case Mips::BLTUC: ------------------ | Branch (4672:5): [True: 0, False: 8.24k] ------------------ 4673| 3.71k| case Mips::BNE: ------------------ | Branch (4673:5): [True: 0, False: 8.24k] ------------------ 4674| 3.71k| case Mips::BNE64: ------------------ | Branch (4674:5): [True: 0, False: 8.24k] ------------------ 4675| 3.71k| case Mips::BNEC: ------------------ | Branch (4675:5): [True: 0, False: 8.24k] ------------------ 4676| 3.71k| case Mips::BNEL: ------------------ | Branch (4676:5): [True: 0, False: 8.24k] ------------------ 4677| 3.71k| case Mips::BNVC: ------------------ | Branch (4677:5): [True: 0, False: 8.24k] ------------------ 4678| 3.71k| case Mips::BOVC: { ------------------ | Branch (4678:5): [True: 0, False: 8.24k] ------------------ 4679| | // op: rs 4680| 3.71k| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4681| 3.71k| Value |= (op & UINT64_C(31)) << 21; 4682| | // op: rt 4683| 3.71k| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4684| 3.71k| Value |= (op & UINT64_C(31)) << 16; 4685| | // op: offset 4686| 3.71k| op = getBranchTargetOpValue(MI, 2, Fixups, STI); 4687| 3.71k| Value |= op & UINT64_C(65535); 4688| 3.71k| break; 4689| 3.71k| } 4690| 0| case Mips::JALRC16_MMR6: ------------------ | Branch (4690:5): [True: 0, False: 8.24k] ------------------ 4691| 0| case Mips::JRC16_MMR6: { ------------------ | Branch (4691:5): [True: 0, False: 8.24k] ------------------ 4692| | // op: rs 4693| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4694| 0| Value |= (op & UINT64_C(31)) << 5; 4695| 0| break; 4696| 0| } 4697| 0| case Mips::ADDIUPC_MM: { ------------------ | Branch (4697:5): [True: 0, False: 8.24k] ------------------ 4698| | // op: rs 4699| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4700| 0| Value |= (op & UINT64_C(7)) << 23; 4701| | // op: imm 4702| 0| op = getSimm23Lsl2Encoding(MI, 1, Fixups, STI); 4703| 0| Value |= op & UINT64_C(8388607); 4704| 0| break; 4705| 0| } 4706| 0| case Mips::BEQZ16_MM: ------------------ | Branch (4706:5): [True: 0, False: 8.24k] ------------------ 4707| 0| case Mips::BEQZC16_MMR6: ------------------ | Branch (4707:5): [True: 0, False: 8.24k] ------------------ 4708| 0| case Mips::BNEZ16_MM: ------------------ | Branch (4708:5): [True: 0, False: 8.24k] ------------------ 4709| 0| case Mips::BNEZC16_MMR6: { ------------------ | Branch (4709:5): [True: 0, False: 8.24k] ------------------ 4710| | // op: rs 4711| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4712| 0| Value |= (op & UINT64_C(7)) << 7; 4713| | // op: offset 4714| 0| op = getBranchTarget7OpValueMM(MI, 1, Fixups, STI); 4715| 0| Value |= op & UINT64_C(127); 4716| 0| break; 4717| 0| } 4718| 0| case Mips::JALR16_MM: ------------------ | Branch (4718:5): [True: 0, False: 8.24k] ------------------ 4719| 0| case Mips::JALRS16_MM: ------------------ | Branch (4719:5): [True: 0, False: 8.24k] ------------------ 4720| 0| case Mips::JR16_MM: ------------------ | Branch (4720:5): [True: 0, False: 8.24k] ------------------ 4721| 0| case Mips::JRC16_MM: { ------------------ | Branch (4721:5): [True: 0, False: 8.24k] ------------------ 4722| | // op: rs 4723| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4724| 0| Value |= op & UINT64_C(31); 4725| 0| break; 4726| 0| } 4727| 0| case Mips::CTCMSA: { ------------------ | Branch (4727:5): [True: 0, False: 8.24k] ------------------ 4728| | // op: rs 4729| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4730| 0| Value |= (op & UINT64_C(31)) << 11; 4731| | // op: cd 4732| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4733| 0| Value |= (op & UINT64_C(31)) << 6; 4734| 0| break; 4735| 0| } 4736| 0| case Mips::FILL_B: ------------------ | Branch (4736:5): [True: 0, False: 8.24k] ------------------ 4737| 0| case Mips::FILL_D: ------------------ | Branch (4737:5): [True: 0, False: 8.24k] ------------------ 4738| 0| case Mips::FILL_H: ------------------ | Branch (4738:5): [True: 0, False: 8.24k] ------------------ 4739| 0| case Mips::FILL_W: { ------------------ | Branch (4739:5): [True: 0, False: 8.24k] ------------------ 4740| | // op: rs 4741| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4742| 0| Value |= (op & UINT64_C(31)) << 11; 4743| | // op: wd 4744| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4745| 0| Value |= (op & UINT64_C(31)) << 6; 4746| 0| break; 4747| 0| } 4748| 0| case Mips::MTHI_DSP_MM: ------------------ | Branch (4748:5): [True: 0, False: 8.24k] ------------------ 4749| 0| case Mips::MTHLIP_MM: ------------------ | Branch (4749:5): [True: 0, False: 8.24k] ------------------ 4750| 0| case Mips::MTLO_DSP_MM: ------------------ | Branch (4750:5): [True: 0, False: 8.24k] ------------------ 4751| 0| case Mips::SHILOV_MM: { ------------------ | Branch (4751:5): [True: 0, False: 8.24k] ------------------ 4752| | // op: rs 4753| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4754| 0| Value |= (op & UINT64_C(31)) << 16; 4755| | // op: ac 4756| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4757| 0| Value |= (op & UINT64_C(3)) << 14; 4758| 0| break; 4759| 0| } 4760| 0| case Mips::JALRS_MM: ------------------ | Branch (4760:5): [True: 0, False: 8.24k] ------------------ 4761| 0| case Mips::JALR_MM: { ------------------ | Branch (4761:5): [True: 0, False: 8.24k] ------------------ 4762| | // op: rs 4763| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4764| 0| Value |= (op & UINT64_C(31)) << 16; 4765| | // op: rd 4766| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4767| 0| Value |= (op & UINT64_C(31)) << 21; 4768| 0| break; 4769| 0| } 4770| 0| case Mips::CLO_MMR6: { ------------------ | Branch (4770:5): [True: 0, False: 8.24k] ------------------ 4771| | // op: rs 4772| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4773| 0| Value |= (op & UINT64_C(31)) << 16; 4774| | // op: rt 4775| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4776| 0| Value |= (op & UINT64_C(31)) << 21; 4777| 0| break; 4778| 0| } 4779| 0| case Mips::AUI_MMR6: { ------------------ | Branch (4779:5): [True: 0, False: 8.24k] ------------------ 4780| | // op: rs 4781| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4782| 0| Value |= (op & UINT64_C(31)) << 16; 4783| | // op: rt 4784| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4785| 0| Value |= (op & UINT64_C(31)) << 21; 4786| | // op: imm 4787| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4788| 0| Value |= op & UINT64_C(65535); 4789| 0| break; 4790| 0| } 4791| 0| case Mips::ADDi_MM: ------------------ | Branch (4791:5): [True: 0, False: 8.24k] ------------------ 4792| 0| case Mips::ADDiu_MM: ------------------ | Branch (4792:5): [True: 0, False: 8.24k] ------------------ 4793| 0| case Mips::ANDi_MM: ------------------ | Branch (4793:5): [True: 0, False: 8.24k] ------------------ 4794| 0| case Mips::ORi_MM: ------------------ | Branch (4794:5): [True: 0, False: 8.24k] ------------------ 4795| 0| case Mips::XORi_MM: { ------------------ | Branch (4795:5): [True: 0, False: 8.24k] ------------------ 4796| | // op: rs 4797| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4798| 0| Value |= (op & UINT64_C(31)) << 16; 4799| | // op: rt 4800| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4801| 0| Value |= (op & UINT64_C(31)) << 21; 4802| | // op: imm16 4803| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4804| 0| Value |= op & UINT64_C(65535); 4805| 0| break; 4806| 0| } 4807| 0| case Mips::MTHI_DSP: ------------------ | Branch (4807:5): [True: 0, False: 8.24k] ------------------ 4808| 0| case Mips::MTLO_DSP: { ------------------ | Branch (4808:5): [True: 0, False: 8.24k] ------------------ 4809| | // op: rs 4810| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4811| 0| Value |= (op & UINT64_C(31)) << 21; 4812| | // op: ac 4813| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4814| 0| Value |= (op & UINT64_C(3)) << 11; 4815| 0| break; 4816| 0| } 4817| 0| case Mips::CLZ_MMR6: { ------------------ | Branch (4817:5): [True: 0, False: 8.24k] ------------------ 4818| | // op: rs 4819| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4820| 0| Value |= (op & UINT64_C(31)) << 21; 4821| | // op: rt 4822| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4823| 0| Value |= (op & UINT64_C(31)) << 11; 4824| 0| break; 4825| 0| } 4826| 0| case Mips::SEQi: ------------------ | Branch (4826:5): [True: 0, False: 8.24k] ------------------ 4827| 0| case Mips::SNEi: { ------------------ | Branch (4827:5): [True: 0, False: 8.24k] ------------------ 4828| | // op: rs 4829| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4830| 0| Value |= (op & UINT64_C(31)) << 21; 4831| | // op: rt 4832| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4833| 0| Value |= (op & UINT64_C(31)) << 16; 4834| | // op: imm10 4835| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4836| 0| Value |= (op & UINT64_C(1023)) << 6; 4837| 0| break; 4838| 0| } 4839| 0| case Mips::ADDi: ------------------ | Branch (4839:5): [True: 0, False: 8.24k] ------------------ 4840| 0| case Mips::ADDiu: ------------------ | Branch (4840:5): [True: 0, False: 8.24k] ------------------ 4841| 1| case Mips::ANDi: ------------------ | Branch (4841:5): [True: 1, False: 8.23k] ------------------ 4842| 1| case Mips::ANDi64: ------------------ | Branch (4842:5): [True: 0, False: 8.24k] ------------------ 4843| 1| case Mips::DADDi: ------------------ | Branch (4843:5): [True: 0, False: 8.24k] ------------------ 4844| 1| case Mips::DADDiu: ------------------ | Branch (4844:5): [True: 0, False: 8.24k] ------------------ 4845| 242| case Mips::ORi: ------------------ | Branch (4845:5): [True: 241, False: 7.99k] ------------------ 4846| 242| case Mips::ORi64: ------------------ | Branch (4846:5): [True: 0, False: 8.24k] ------------------ 4847| 242| case Mips::XORi: ------------------ | Branch (4847:5): [True: 0, False: 8.24k] ------------------ 4848| 242| case Mips::XORi64: { ------------------ | Branch (4848:5): [True: 0, False: 8.24k] ------------------ 4849| | // op: rs 4850| 242| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4851| 242| Value |= (op & UINT64_C(31)) << 21; 4852| | // op: rt 4853| 242| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4854| 242| Value |= (op & UINT64_C(31)) << 16; 4855| | // op: imm16 4856| 242| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4857| 242| Value |= op & UINT64_C(65535); 4858| 242| break; 4859| 242| } 4860| 0| case Mips::PRECR_SRA_PH_W: ------------------ | Branch (4860:5): [True: 0, False: 8.24k] ------------------ 4861| 0| case Mips::PRECR_SRA_R_PH_W: { ------------------ | Branch (4861:5): [True: 0, False: 8.24k] ------------------ 4862| | // op: rs 4863| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4864| 0| Value |= (op & UINT64_C(31)) << 21; 4865| | // op: rt 4866| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4867| 0| Value |= (op & UINT64_C(31)) << 16; 4868| | // op: sa 4869| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4870| 0| Value |= (op & UINT64_C(31)) << 11; 4871| 0| break; 4872| 0| } 4873| 0| case Mips::CMPGDU_EQ_QB: ------------------ | Branch (4873:5): [True: 0, False: 8.24k] ------------------ 4874| 0| case Mips::CMPGDU_LE_QB: ------------------ | Branch (4874:5): [True: 0, False: 8.24k] ------------------ 4875| 0| case Mips::CMPGDU_LT_QB: ------------------ | Branch (4875:5): [True: 0, False: 8.24k] ------------------ 4876| 0| case Mips::CMPGU_EQ_QB: ------------------ | Branch (4876:5): [True: 0, False: 8.24k] ------------------ 4877| 0| case Mips::CMPGU_LE_QB: ------------------ | Branch (4877:5): [True: 0, False: 8.24k] ------------------ 4878| 0| case Mips::CMPGU_LT_QB: ------------------ | Branch (4878:5): [True: 0, False: 8.24k] ------------------ 4879| 0| case Mips::PACKRL_PH: ------------------ | Branch (4879:5): [True: 0, False: 8.24k] ------------------ 4880| 0| case Mips::PICK_PH: ------------------ | Branch (4880:5): [True: 0, False: 8.24k] ------------------ 4881| 0| case Mips::PICK_QB: ------------------ | Branch (4881:5): [True: 0, False: 8.24k] ------------------ 4882| 0| case Mips::PRECRQU_S_QB_PH: ------------------ | Branch (4882:5): [True: 0, False: 8.24k] ------------------ 4883| 0| case Mips::PRECRQ_PH_W: ------------------ | Branch (4883:5): [True: 0, False: 8.24k] ------------------ 4884| 0| case Mips::PRECRQ_QB_PH: ------------------ | Branch (4884:5): [True: 0, False: 8.24k] ------------------ 4885| 0| case Mips::PRECRQ_RS_PH_W: ------------------ | Branch (4885:5): [True: 0, False: 8.24k] ------------------ 4886| 0| case Mips::PRECR_QB_PH: { ------------------ | Branch (4886:5): [True: 0, False: 8.24k] ------------------ 4887| | // op: rs 4888| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4889| 0| Value |= (op & UINT64_C(31)) << 21; 4890| | // op: rt 4891| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4892| 0| Value |= (op & UINT64_C(31)) << 16; 4893| | // op: rd 4894| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4895| 0| Value |= (op & UINT64_C(31)) << 11; 4896| 0| break; 4897| 0| } 4898| 0| case Mips::DALIGN_MM64R6: { ------------------ | Branch (4898:5): [True: 0, False: 8.24k] ------------------ 4899| | // op: rs 4900| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4901| 0| Value |= (op & UINT64_C(31)) << 21; 4902| | // op: rt 4903| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4904| 0| Value |= (op & UINT64_C(31)) << 16; 4905| | // op: rd 4906| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4907| 0| Value |= (op & UINT64_C(31)) << 11; 4908| | // op: bp 4909| 0| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 4910| 0| Value |= (op & UINT64_C(7)) << 8; 4911| 0| break; 4912| 0| } 4913| 0| case Mips::DLSA: ------------------ | Branch (4913:5): [True: 0, False: 8.24k] ------------------ 4914| 0| case Mips::LSA: { ------------------ | Branch (4914:5): [True: 0, False: 8.24k] ------------------ 4915| | // op: rs 4916| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4917| 0| Value |= (op & UINT64_C(31)) << 21; 4918| | // op: rt 4919| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4920| 0| Value |= (op & UINT64_C(31)) << 16; 4921| | // op: rd 4922| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4923| 0| Value |= (op & UINT64_C(31)) << 11; 4924| | // op: sa 4925| 0| op = getUImmWithOffsetEncoding<2, 1>(MI, 3, Fixups, STI); 4926| 0| Value |= (op & UINT64_C(3)) << 6; 4927| 0| break; 4928| 0| } 4929| 0| case Mips::ADDU16_MMR6: ------------------ | Branch (4929:5): [True: 0, False: 8.24k] ------------------ 4930| 0| case Mips::SUBU16_MMR6: { ------------------ | Branch (4930:5): [True: 0, False: 8.24k] ------------------ 4931| | // op: rs 4932| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4933| 0| Value |= (op & UINT64_C(7)) << 7; 4934| | // op: rt 4935| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4936| 0| Value |= (op & UINT64_C(7)) << 4; 4937| | // op: rd 4938| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4939| 0| Value |= (op & UINT64_C(7)) << 1; 4940| 0| break; 4941| 0| } 4942| 0| case Mips::MOVE16_MM: ------------------ | Branch (4942:5): [True: 0, False: 8.24k] ------------------ 4943| 0| case Mips::MOVE16_MMR6: { ------------------ | Branch (4943:5): [True: 0, False: 8.24k] ------------------ 4944| | // op: rs 4945| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4946| 0| Value |= op & UINT64_C(31); 4947| | // op: rd 4948| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4949| 0| Value |= (op & UINT64_C(31)) << 5; 4950| 0| break; 4951| 0| } 4952| 0| case Mips::DI: ------------------ | Branch (4952:5): [True: 0, False: 8.24k] ------------------ 4953| 0| case Mips::DI_MM: ------------------ | Branch (4953:5): [True: 0, False: 8.24k] ------------------ 4954| 0| case Mips::DI_MMR6: ------------------ | Branch (4954:5): [True: 0, False: 8.24k] ------------------ 4955| 0| case Mips::EI: ------------------ | Branch (4955:5): [True: 0, False: 8.24k] ------------------ 4956| 0| case Mips::EI_MM: ------------------ | Branch (4956:5): [True: 0, False: 8.24k] ------------------ 4957| 0| case Mips::EI_MMR6: { ------------------ | Branch (4957:5): [True: 0, False: 8.24k] ------------------ 4958| | // op: rt 4959| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4960| 0| Value |= (op & UINT64_C(31)) << 16; 4961| 0| break; 4962| 0| } 4963| 0| case Mips::EXTP: ------------------ | Branch (4963:5): [True: 0, False: 8.24k] ------------------ 4964| 0| case Mips::EXTPDP: ------------------ | Branch (4964:5): [True: 0, False: 8.24k] ------------------ 4965| 0| case Mips::EXTPDPV: ------------------ | Branch (4965:5): [True: 0, False: 8.24k] ------------------ 4966| 0| case Mips::EXTPV: ------------------ | Branch (4966:5): [True: 0, False: 8.24k] ------------------ 4967| 0| case Mips::EXTRV_RS_W: ------------------ | Branch (4967:5): [True: 0, False: 8.24k] ------------------ 4968| 0| case Mips::EXTRV_R_W: ------------------ | Branch (4968:5): [True: 0, False: 8.24k] ------------------ 4969| 0| case Mips::EXTRV_S_H: ------------------ | Branch (4969:5): [True: 0, False: 8.24k] ------------------ 4970| 0| case Mips::EXTRV_W: ------------------ | Branch (4970:5): [True: 0, False: 8.24k] ------------------ 4971| 0| case Mips::EXTR_RS_W: ------------------ | Branch (4971:5): [True: 0, False: 8.24k] ------------------ 4972| 0| case Mips::EXTR_R_W: ------------------ | Branch (4972:5): [True: 0, False: 8.24k] ------------------ 4973| 0| case Mips::EXTR_S_H: ------------------ | Branch (4973:5): [True: 0, False: 8.24k] ------------------ 4974| 0| case Mips::EXTR_W: { ------------------ | Branch (4974:5): [True: 0, False: 8.24k] ------------------ 4975| | // op: rt 4976| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4977| 0| Value |= (op & UINT64_C(31)) << 16; 4978| | // op: ac 4979| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4980| 0| Value |= (op & UINT64_C(3)) << 11; 4981| | // op: shift_rs 4982| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4983| 0| Value |= (op & UINT64_C(31)) << 21; 4984| 0| break; 4985| 0| } 4986| 0| case Mips::LLD_R6: ------------------ | Branch (4986:5): [True: 0, False: 8.24k] ------------------ 4987| 0| case Mips::LL_R6: { ------------------ | Branch (4987:5): [True: 0, False: 8.24k] ------------------ 4988| | // op: rt 4989| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4990| 0| Value |= (op & UINT64_C(31)) << 16; 4991| | // op: addr 4992| 0| op = getMemEncoding(MI, 1, Fixups, STI); 4993| 0| Value |= (op & UINT64_C(2031616)) << 5; 4994| 0| Value |= (op & UINT64_C(511)) << 7; 4995| 0| break; 4996| 0| } 4997| 0| case Mips::LB: ------------------ | Branch (4997:5): [True: 0, False: 8.24k] ------------------ 4998| 0| case Mips::LB64: ------------------ | Branch (4998:5): [True: 0, False: 8.24k] ------------------ 4999| 0| case Mips::LBu: ------------------ | Branch (4999:5): [True: 0, False: 8.24k] ------------------ 5000| 0| case Mips::LBu64: ------------------ | Branch (5000:5): [True: 0, False: 8.24k] ------------------ 5001| 0| case Mips::LD: ------------------ | Branch (5001:5): [True: 0, False: 8.24k] ------------------ 5002| 0| case Mips::LDC1: ------------------ | Branch (5002:5): [True: 0, False: 8.24k] ------------------ 5003| 0| case Mips::LDC164: ------------------ | Branch (5003:5): [True: 0, False: 8.24k] ------------------ 5004| 0| case Mips::LDC2: ------------------ | Branch (5004:5): [True: 0, False: 8.24k] ------------------ 5005| 0| case Mips::LDC3: ------------------ | Branch (5005:5): [True: 0, False: 8.24k] ------------------ 5006| 0| case Mips::LDL: ------------------ | Branch (5006:5): [True: 0, False: 8.24k] ------------------ 5007| 0| case Mips::LDR: ------------------ | Branch (5007:5): [True: 0, False: 8.24k] ------------------ 5008| 0| case Mips::LEA_ADDiu: ------------------ | Branch (5008:5): [True: 0, False: 8.24k] ------------------ 5009| 0| case Mips::LEA_ADDiu64: ------------------ | Branch (5009:5): [True: 0, False: 8.24k] ------------------ 5010| 0| case Mips::LH: ------------------ | Branch (5010:5): [True: 0, False: 8.24k] ------------------ 5011| 0| case Mips::LH64: ------------------ | Branch (5011:5): [True: 0, False: 8.24k] ------------------ 5012| 0| case Mips::LHu: ------------------ | Branch (5012:5): [True: 0, False: 8.24k] ------------------ 5013| 0| case Mips::LHu64: ------------------ | Branch (5013:5): [True: 0, False: 8.24k] ------------------ 5014| 5| case Mips::LL: ------------------ | Branch (5014:5): [True: 5, False: 8.23k] ------------------ 5015| 5| case Mips::LLD: ------------------ | Branch (5015:5): [True: 0, False: 8.24k] ------------------ 5016| 37| case Mips::LW: ------------------ | Branch (5016:5): [True: 32, False: 8.20k] ------------------ 5017| 37| case Mips::LW64: ------------------ | Branch (5017:5): [True: 0, False: 8.24k] ------------------ 5018| 37| case Mips::LWC1: ------------------ | Branch (5018:5): [True: 0, False: 8.24k] ------------------ 5019| 37| case Mips::LWC2: ------------------ | Branch (5019:5): [True: 0, False: 8.24k] ------------------ 5020| 37| case Mips::LWC3: ------------------ | Branch (5020:5): [True: 0, False: 8.24k] ------------------ 5021| 37| case Mips::LWL: ------------------ | Branch (5021:5): [True: 0, False: 8.24k] ------------------ 5022| 37| case Mips::LWL64: ------------------ | Branch (5022:5): [True: 0, False: 8.24k] ------------------ 5023| 37| case Mips::LWR: ------------------ | Branch (5023:5): [True: 0, False: 8.24k] ------------------ 5024| 37| case Mips::LWR64: ------------------ | Branch (5024:5): [True: 0, False: 8.24k] ------------------ 5025| 37| case Mips::LWu: ------------------ | Branch (5025:5): [True: 0, False: 8.24k] ------------------ 5026| 37| case Mips::SB: ------------------ | Branch (5026:5): [True: 0, False: 8.24k] ------------------ 5027| 37| case Mips::SB64: ------------------ | Branch (5027:5): [True: 0, False: 8.24k] ------------------ 5028| 37| case Mips::SD: ------------------ | Branch (5028:5): [True: 0, False: 8.24k] ------------------ 5029| 37| case Mips::SDC1: ------------------ | Branch (5029:5): [True: 0, False: 8.24k] ------------------ 5030| 37| case Mips::SDC164: ------------------ | Branch (5030:5): [True: 0, False: 8.24k] ------------------ 5031| 37| case Mips::SDC2: ------------------ | Branch (5031:5): [True: 0, False: 8.24k] ------------------ 5032| 37| case Mips::SDC3: ------------------ | Branch (5032:5): [True: 0, False: 8.24k] ------------------ 5033| 37| case Mips::SDL: ------------------ | Branch (5033:5): [True: 0, False: 8.24k] ------------------ 5034| 37| case Mips::SDR: ------------------ | Branch (5034:5): [True: 0, False: 8.24k] ------------------ 5035| 37| case Mips::SH: ------------------ | Branch (5035:5): [True: 0, False: 8.24k] ------------------ 5036| 37| case Mips::SH64: ------------------ | Branch (5036:5): [True: 0, False: 8.24k] ------------------ 5037| 111| case Mips::SW: ------------------ | Branch (5037:5): [True: 74, False: 8.16k] ------------------ 5038| 111| case Mips::SW64: ------------------ | Branch (5038:5): [True: 0, False: 8.24k] ------------------ 5039| 111| case Mips::SWC1: ------------------ | Branch (5039:5): [True: 0, False: 8.24k] ------------------ 5040| 143| case Mips::SWC2: ------------------ | Branch (5040:5): [True: 32, False: 8.20k] ------------------ 5041| 143| case Mips::SWC3: ------------------ | Branch (5041:5): [True: 0, False: 8.24k] ------------------ 5042| 144| case Mips::SWL: ------------------ | Branch (5042:5): [True: 1, False: 8.23k] ------------------ 5043| 144| case Mips::SWL64: ------------------ | Branch (5043:5): [True: 0, False: 8.24k] ------------------ 5044| 144| case Mips::SWR: ------------------ | Branch (5044:5): [True: 0, False: 8.24k] ------------------ 5045| 144| case Mips::SWR64: { ------------------ | Branch (5045:5): [True: 0, False: 8.24k] ------------------ 5046| | // op: rt 5047| 144| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5048| 144| Value |= (op & UINT64_C(31)) << 16; 5049| | // op: addr 5050| 144| op = getMemEncoding(MI, 1, Fixups, STI); 5051| 144| Value |= (op & UINT64_C(2031616)) << 5; 5052| 144| Value |= op & UINT64_C(65535); 5053| 144| break; 5054| 144| } 5055| 0| case Mips::LDC2_R6: ------------------ | Branch (5055:5): [True: 0, False: 8.24k] ------------------ 5056| 0| case Mips::LWC2_R6: ------------------ | Branch (5056:5): [True: 0, False: 8.24k] ------------------ 5057| 0| case Mips::SDC2_R6: ------------------ | Branch (5057:5): [True: 0, False: 8.24k] ------------------ 5058| 0| case Mips::SWC2_R6: { ------------------ | Branch (5058:5): [True: 0, False: 8.24k] ------------------ 5059| | // op: rt 5060| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5061| 0| Value |= (op & UINT64_C(31)) << 16; 5062| | // op: addr 5063| 0| op = getMemEncoding(MI, 1, Fixups, STI); 5064| 0| Value |= (op & UINT64_C(2031616)) >> 5; 5065| 0| Value |= op & UINT64_C(2047); 5066| 0| break; 5067| 0| } 5068| 0| case Mips::CFC1: ------------------ | Branch (5068:5): [True: 0, False: 8.24k] ------------------ 5069| 0| case Mips::DMFC1: ------------------ | Branch (5069:5): [True: 0, False: 8.24k] ------------------ 5070| 0| case Mips::MFC1: ------------------ | Branch (5070:5): [True: 0, False: 8.24k] ------------------ 5071| 0| case Mips::MFHC1_D32: ------------------ | Branch (5071:5): [True: 0, False: 8.24k] ------------------ 5072| 0| case Mips::MFHC1_D64: { ------------------ | Branch (5072:5): [True: 0, False: 8.24k] ------------------ 5073| | // op: rt 5074| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5075| 0| Value |= (op & UINT64_C(31)) << 16; 5076| | // op: fs 5077| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5078| 0| Value |= (op & UINT64_C(31)) << 11; 5079| 0| break; 5080| 0| } 5081| 0| case Mips::DMFC2_OCTEON: ------------------ | Branch (5081:5): [True: 0, False: 8.24k] ------------------ 5082| 0| case Mips::DMTC2_OCTEON: ------------------ | Branch (5082:5): [True: 0, False: 8.24k] ------------------ 5083| 68| case Mips::LUi: ------------------ | Branch (5083:5): [True: 68, False: 8.17k] ------------------ 5084| 68| case Mips::LUi64: ------------------ | Branch (5084:5): [True: 0, False: 8.24k] ------------------ 5085| 68| case Mips::LUi_MM: { ------------------ | Branch (5085:5): [True: 0, False: 8.24k] ------------------ 5086| | // op: rt 5087| 68| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5088| 68| Value |= (op & UINT64_C(31)) << 16; 5089| | // op: imm16 5090| 68| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5091| 68| Value |= op & UINT64_C(65535); 5092| 68| break; 5093| 68| } 5094| 0| case Mips::BEQZALC: ------------------ | Branch (5094:5): [True: 0, False: 8.24k] ------------------ 5095| 0| case Mips::BGTZALC: ------------------ | Branch (5095:5): [True: 0, False: 8.24k] ------------------ 5096| 0| case Mips::BGTZC: ------------------ | Branch (5096:5): [True: 0, False: 8.24k] ------------------ 5097| 0| case Mips::BLEZALC: ------------------ | Branch (5097:5): [True: 0, False: 8.24k] ------------------ 5098| 0| case Mips::BLEZC: ------------------ | Branch (5098:5): [True: 0, False: 8.24k] ------------------ 5099| 0| case Mips::BNEZALC: { ------------------ | Branch (5099:5): [True: 0, False: 8.24k] ------------------ 5100| | // op: rt 5101| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5102| 0| Value |= (op & UINT64_C(31)) << 16; 5103| | // op: offset 5104| 0| op = getBranchTargetOpValue(MI, 1, Fixups, STI); 5105| 0| Value |= op & UINT64_C(65535); 5106| 0| break; 5107| 0| } 5108| 0| case Mips::JIALC: ------------------ | Branch (5108:5): [True: 0, False: 8.24k] ------------------ 5109| 0| case Mips::JIALC_MMR6: ------------------ | Branch (5109:5): [True: 0, False: 8.24k] ------------------ 5110| 0| case Mips::JIC: ------------------ | Branch (5110:5): [True: 0, False: 8.24k] ------------------ 5111| 0| case Mips::JIC_MMR6: { ------------------ | Branch (5111:5): [True: 0, False: 8.24k] ------------------ 5112| | // op: rt 5113| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5114| 0| Value |= (op & UINT64_C(31)) << 16; 5115| | // op: offset 5116| 0| op = getJumpOffset16OpValue(MI, 1, Fixups, STI); 5117| 0| Value |= op & UINT64_C(65535); 5118| 0| break; 5119| 0| } 5120| 0| case Mips::RDHWR: ------------------ | Branch (5120:5): [True: 0, False: 8.24k] ------------------ 5121| 0| case Mips::RDHWR64: { ------------------ | Branch (5121:5): [True: 0, False: 8.24k] ------------------ 5122| | // op: rt 5123| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5124| 0| Value |= (op & UINT64_C(31)) << 16; 5125| | // op: rd 5126| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5127| 0| Value |= (op & UINT64_C(31)) << 11; 5128| 0| break; 5129| 0| } 5130| 0| case Mips::DMFC0: ------------------ | Branch (5130:5): [True: 0, False: 8.24k] ------------------ 5131| 0| case Mips::DMFC2: ------------------ | Branch (5131:5): [True: 0, False: 8.24k] ------------------ 5132| 0| case Mips::MFC0: ------------------ | Branch (5132:5): [True: 0, False: 8.24k] ------------------ 5133| 0| case Mips::MFC2: { ------------------ | Branch (5133:5): [True: 0, False: 8.24k] ------------------ 5134| | // op: rt 5135| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5136| 0| Value |= (op & UINT64_C(31)) << 16; 5137| | // op: rd 5138| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5139| 0| Value |= (op & UINT64_C(31)) << 11; 5140| | // op: sel 5141| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5142| 0| Value |= op & UINT64_C(7); 5143| 0| break; 5144| 0| } 5145| 0| case Mips::SLTi: ------------------ | Branch (5145:5): [True: 0, False: 8.24k] ------------------ 5146| 0| case Mips::SLTi64: ------------------ | Branch (5146:5): [True: 0, False: 8.24k] ------------------ 5147| 0| case Mips::SLTiu: ------------------ | Branch (5147:5): [True: 0, False: 8.24k] ------------------ 5148| 0| case Mips::SLTiu64: { ------------------ | Branch (5148:5): [True: 0, False: 8.24k] ------------------ 5149| | // op: rt 5150| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5151| 0| Value |= (op & UINT64_C(31)) << 16; 5152| | // op: rs 5153| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5154| 0| Value |= (op & UINT64_C(31)) << 21; 5155| | // op: imm16 5156| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5157| 0| Value |= op & UINT64_C(65535); 5158| 0| break; 5159| 0| } 5160| 0| case Mips::CINS: ------------------ | Branch (5160:5): [True: 0, False: 8.24k] ------------------ 5161| 0| case Mips::CINS32: ------------------ | Branch (5161:5): [True: 0, False: 8.24k] ------------------ 5162| 0| case Mips::EXTS: ------------------ | Branch (5162:5): [True: 0, False: 8.24k] ------------------ 5163| 0| case Mips::EXTS32: { ------------------ | Branch (5163:5): [True: 0, False: 8.24k] ------------------ 5164| | // op: rt 5165| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5166| 0| Value |= (op & UINT64_C(31)) << 16; 5167| | // op: rs 5168| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5169| 0| Value |= (op & UINT64_C(31)) << 21; 5170| | // op: pos 5171| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5172| 0| Value |= (op & UINT64_C(31)) << 6; 5173| | // op: lenm1 5174| 0| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 5175| 0| Value |= (op & UINT64_C(31)) << 11; 5176| 0| break; 5177| 0| } 5178| 0| case Mips::DINS: ------------------ | Branch (5178:5): [True: 0, False: 8.24k] ------------------ 5179| 0| case Mips::DINSM: ------------------ | Branch (5179:5): [True: 0, False: 8.24k] ------------------ 5180| 0| case Mips::DINSU: ------------------ | Branch (5180:5): [True: 0, False: 8.24k] ------------------ 5181| 0| case Mips::INS: { ------------------ | Branch (5181:5): [True: 0, False: 8.24k] ------------------ 5182| | // op: rt 5183| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5184| 0| Value |= (op & UINT64_C(31)) << 16; 5185| | // op: rs 5186| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5187| 0| Value |= (op & UINT64_C(31)) << 21; 5188| | // op: pos 5189| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5190| 0| Value |= (op & UINT64_C(31)) << 6; 5191| | // op: size 5192| 0| op = getSizeInsEncoding(MI, 3, Fixups, STI); 5193| 0| Value |= (op & UINT64_C(31)) << 11; 5194| 0| break; 5195| 0| } 5196| 0| case Mips::DEXT: ------------------ | Branch (5196:5): [True: 0, False: 8.24k] ------------------ 5197| 0| case Mips::DEXTM: ------------------ | Branch (5197:5): [True: 0, False: 8.24k] ------------------ 5198| 0| case Mips::DEXTU: ------------------ | Branch (5198:5): [True: 0, False: 8.24k] ------------------ 5199| 0| case Mips::EXT: { ------------------ | Branch (5199:5): [True: 0, False: 8.24k] ------------------ 5200| | // op: rt 5201| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5202| 0| Value |= (op & UINT64_C(31)) << 16; 5203| | // op: rs 5204| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5205| 0| Value |= (op & UINT64_C(31)) << 21; 5206| | // op: pos 5207| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5208| 0| Value |= (op & UINT64_C(31)) << 6; 5209| | // op: size 5210| 0| op = getUImmWithOffsetEncoding<5, 1>(MI, 3, Fixups, STI); 5211| 0| Value |= (op & UINT64_C(31)) << 11; 5212| 0| break; 5213| 0| } 5214| 0| case Mips::APPEND: ------------------ | Branch (5214:5): [True: 0, False: 8.24k] ------------------ 5215| 0| case Mips::BALIGN: ------------------ | Branch (5215:5): [True: 0, False: 8.24k] ------------------ 5216| 0| case Mips::PREPEND: { ------------------ | Branch (5216:5): [True: 0, False: 8.24k] ------------------ 5217| | // op: rt 5218| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5219| 0| Value |= (op & UINT64_C(31)) << 16; 5220| | // op: rs 5221| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5222| 0| Value |= (op & UINT64_C(31)) << 21; 5223| | // op: sa 5224| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5225| 0| Value |= (op & UINT64_C(31)) << 11; 5226| 0| break; 5227| 0| } 5228| 0| case Mips::INSV: { ------------------ | Branch (5228:5): [True: 0, False: 8.24k] ------------------ 5229| | // op: rt 5230| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5231| 0| Value |= (op & UINT64_C(31)) << 16; 5232| | // op: rs 5233| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5234| 0| Value |= (op & UINT64_C(31)) << 21; 5235| 0| break; 5236| 0| } 5237| 0| case Mips::LBE_MM: ------------------ | Branch (5237:5): [True: 0, False: 8.24k] ------------------ 5238| 0| case Mips::LBuE_MM: ------------------ | Branch (5238:5): [True: 0, False: 8.24k] ------------------ 5239| 0| case Mips::LHE_MM: ------------------ | Branch (5239:5): [True: 0, False: 8.24k] ------------------ 5240| 0| case Mips::LHuE_MM: ------------------ | Branch (5240:5): [True: 0, False: 8.24k] ------------------ 5241| 0| case Mips::LWE_MM: ------------------ | Branch (5241:5): [True: 0, False: 8.24k] ------------------ 5242| 0| case Mips::SBE_MM: ------------------ | Branch (5242:5): [True: 0, False: 8.24k] ------------------ 5243| 0| case Mips::SHE_MM: ------------------ | Branch (5243:5): [True: 0, False: 8.24k] ------------------ 5244| 0| case Mips::SWE_MM: ------------------ | Branch (5244:5): [True: 0, False: 8.24k] ------------------ 5245| 0| case Mips::SWE_MMR6: { ------------------ | Branch (5245:5): [True: 0, False: 8.24k] ------------------ 5246| | // op: rt 5247| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5248| 0| Value |= (op & UINT64_C(31)) << 21; 5249| | // op: addr 5250| 0| op = getMemEncoding(MI, 1, Fixups, STI); 5251| 0| Value |= op & UINT64_C(2031616); 5252| 0| Value |= op & UINT64_C(511); 5253| 0| break; 5254| 0| } 5255| 0| case Mips::LB_MM: ------------------ | Branch (5255:5): [True: 0, False: 8.24k] ------------------ 5256| 0| case Mips::LBu_MM: ------------------ | Branch (5256:5): [True: 0, False: 8.24k] ------------------ 5257| 0| case Mips::LDC1_MM: ------------------ | Branch (5257:5): [True: 0, False: 8.24k] ------------------ 5258| 0| case Mips::LEA_ADDiu_MM: ------------------ | Branch (5258:5): [True: 0, False: 8.24k] ------------------ 5259| 0| case Mips::LH_MM: ------------------ | Branch (5259:5): [True: 0, False: 8.24k] ------------------ 5260| 0| case Mips::LHu_MM: ------------------ | Branch (5260:5): [True: 0, False: 8.24k] ------------------ 5261| 0| case Mips::LWC1_MM: ------------------ | Branch (5261:5): [True: 0, False: 8.24k] ------------------ 5262| 0| case Mips::LW_MM: ------------------ | Branch (5262:5): [True: 0, False: 8.24k] ------------------ 5263| 0| case Mips::LW_MMR6: ------------------ | Branch (5263:5): [True: 0, False: 8.24k] ------------------ 5264| 0| case Mips::SB_MM: ------------------ | Branch (5264:5): [True: 0, False: 8.24k] ------------------ 5265| 0| case Mips::SB_MMR6: ------------------ | Branch (5265:5): [True: 0, False: 8.24k] ------------------ 5266| 0| case Mips::SDC1_MM: ------------------ | Branch (5266:5): [True: 0, False: 8.24k] ------------------ 5267| 0| case Mips::SH_MM: ------------------ | Branch (5267:5): [True: 0, False: 8.24k] ------------------ 5268| 0| case Mips::SH_MMR6: ------------------ | Branch (5268:5): [True: 0, False: 8.24k] ------------------ 5269| 0| case Mips::SWC1_MM: ------------------ | Branch (5269:5): [True: 0, False: 8.24k] ------------------ 5270| 0| case Mips::SW_MM: ------------------ | Branch (5270:5): [True: 0, False: 8.24k] ------------------ 5271| 0| case Mips::SW_MMR6: { ------------------ | Branch (5271:5): [True: 0, False: 8.24k] ------------------ 5272| | // op: rt 5273| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5274| 0| Value |= (op & UINT64_C(31)) << 21; 5275| | // op: addr 5276| 0| op = getMemEncoding(MI, 1, Fixups, STI); 5277| 0| Value |= op & UINT64_C(2097151); 5278| 0| break; 5279| 0| } 5280| 0| case Mips::LL_MM: ------------------ | Branch (5280:5): [True: 0, False: 8.24k] ------------------ 5281| 0| case Mips::LWL_MM: ------------------ | Branch (5281:5): [True: 0, False: 8.24k] ------------------ 5282| 0| case Mips::LWR_MM: ------------------ | Branch (5282:5): [True: 0, False: 8.24k] ------------------ 5283| 0| case Mips::LWU_MM: ------------------ | Branch (5283:5): [True: 0, False: 8.24k] ------------------ 5284| 0| case Mips::SWL_MM: ------------------ | Branch (5284:5): [True: 0, False: 8.24k] ------------------ 5285| 0| case Mips::SWR_MM: { ------------------ | Branch (5285:5): [True: 0, False: 8.24k] ------------------ 5286| | // op: rt 5287| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5288| 0| Value |= (op & UINT64_C(31)) << 21; 5289| | // op: addr 5290| 0| op = getMemEncodingMMImm12(MI, 1, Fixups, STI); 5291| 0| Value |= op & UINT64_C(2031616); 5292| 0| Value |= op & UINT64_C(4095); 5293| 0| break; 5294| 0| } 5295| 0| case Mips::LLE_MM: ------------------ | Branch (5295:5): [True: 0, False: 8.24k] ------------------ 5296| 0| case Mips::LLE_MMR6: ------------------ | Branch (5296:5): [True: 0, False: 8.24k] ------------------ 5297| 0| case Mips::LWE_MMR6: ------------------ | Branch (5297:5): [True: 0, False: 8.24k] ------------------ 5298| 0| case Mips::LWLE_MM: ------------------ | Branch (5298:5): [True: 0, False: 8.24k] ------------------ 5299| 0| case Mips::LWRE_MM: ------------------ | Branch (5299:5): [True: 0, False: 8.24k] ------------------ 5300| 0| case Mips::SWLE_MM: ------------------ | Branch (5300:5): [True: 0, False: 8.24k] ------------------ 5301| 0| case Mips::SWRE_MM: { ------------------ | Branch (5301:5): [True: 0, False: 8.24k] ------------------ 5302| | // op: rt 5303| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5304| 0| Value |= (op & UINT64_C(31)) << 21; 5305| | // op: addr 5306| 0| op = getMemEncodingMMImm12(MI, 1, Fixups, STI); 5307| 0| Value |= op & UINT64_C(2031616); 5308| 0| Value |= op & UINT64_C(511); 5309| 0| break; 5310| 0| } 5311| 0| case Mips::SBE_MMR6: ------------------ | Branch (5311:5): [True: 0, False: 8.24k] ------------------ 5312| 0| case Mips::SCE_MMR6: ------------------ | Branch (5312:5): [True: 0, False: 8.24k] ------------------ 5313| 0| case Mips::SHE_MMR6: { ------------------ | Branch (5313:5): [True: 0, False: 8.24k] ------------------ 5314| | // op: rt 5315| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5316| 0| Value |= (op & UINT64_C(31)) << 21; 5317| | // op: addr 5318| 0| op = getMemEncodingMMImm9(MI, 1, Fixups, STI); 5319| 0| Value |= op & UINT64_C(2031616); 5320| 0| Value |= op & UINT64_C(511); 5321| 0| break; 5322| 0| } 5323| 0| case Mips::CFC1_MM: ------------------ | Branch (5323:5): [True: 0, False: 8.24k] ------------------ 5324| 0| case Mips::MFC1_MM: ------------------ | Branch (5324:5): [True: 0, False: 8.24k] ------------------ 5325| 0| case Mips::MFHC1_MM: { ------------------ | Branch (5325:5): [True: 0, False: 8.24k] ------------------ 5326| | // op: rt 5327| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5328| 0| Value |= (op & UINT64_C(31)) << 21; 5329| | // op: fs 5330| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5331| 0| Value |= (op & UINT64_C(31)) << 16; 5332| 0| break; 5333| 0| } 5334| 0| case Mips::REPL_QB_MM: { ------------------ | Branch (5334:5): [True: 0, False: 8.24k] ------------------ 5335| | // op: rt 5336| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5337| 0| Value |= (op & UINT64_C(31)) << 21; 5338| | // op: imm 5339| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5340| 0| Value |= (op & UINT64_C(255)) << 13; 5341| 0| break; 5342| 0| } 5343| 0| case Mips::ALUIPC_MMR6: ------------------ | Branch (5343:5): [True: 0, False: 8.24k] ------------------ 5344| 0| case Mips::AUIPC_MMR6: { ------------------ | Branch (5344:5): [True: 0, False: 8.24k] ------------------ 5345| | // op: rt 5346| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5347| 0| Value |= (op & UINT64_C(31)) << 21; 5348| | // op: imm 5349| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5350| 0| Value |= op & UINT64_C(65535); 5351| 0| break; 5352| 0| } 5353| 0| case Mips::EXTPDP_MM: ------------------ | Branch (5353:5): [True: 0, False: 8.24k] ------------------ 5354| 0| case Mips::EXTP_MM: ------------------ | Branch (5354:5): [True: 0, False: 8.24k] ------------------ 5355| 0| case Mips::EXTR_RS_W_MM: ------------------ | Branch (5355:5): [True: 0, False: 8.24k] ------------------ 5356| 0| case Mips::EXTR_R_W_MM: ------------------ | Branch (5356:5): [True: 0, False: 8.24k] ------------------ 5357| 0| case Mips::EXTR_S_H_MM: ------------------ | Branch (5357:5): [True: 0, False: 8.24k] ------------------ 5358| 0| case Mips::EXTR_W_MM: { ------------------ | Branch (5358:5): [True: 0, False: 8.24k] ------------------ 5359| | // op: rt 5360| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5361| 0| Value |= (op & UINT64_C(31)) << 21; 5362| | // op: imm 5363| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5364| 0| Value |= (op & UINT64_C(31)) << 16; 5365| | // op: ac 5366| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5367| 0| Value |= (op & UINT64_C(3)) << 14; 5368| 0| break; 5369| 0| } 5370| 0| case Mips::ADDIUPC_MMR6: ------------------ | Branch (5370:5): [True: 0, False: 8.24k] ------------------ 5371| 0| case Mips::LWPC_MMR6: { ------------------ | Branch (5371:5): [True: 0, False: 8.24k] ------------------ 5372| | // op: rt 5373| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5374| 0| Value |= (op & UINT64_C(31)) << 21; 5375| | // op: imm 5376| 0| op = getSimm19Lsl2Encoding(MI, 1, Fixups, STI); 5377| 0| Value |= op & UINT64_C(524287); 5378| 0| break; 5379| 0| } 5380| 0| case Mips::LUI_MMR6: { ------------------ | Branch (5380:5): [True: 0, False: 8.24k] ------------------ 5381| | // op: rt 5382| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5383| 0| Value |= (op & UINT64_C(31)) << 21; 5384| | // op: imm16 5385| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5386| 0| Value |= op & UINT64_C(65535); 5387| 0| break; 5388| 0| } 5389| 0| case Mips::RDDSP_MM: ------------------ | Branch (5389:5): [True: 0, False: 8.24k] ------------------ 5390| 0| case Mips::WRDSP_MM: { ------------------ | Branch (5390:5): [True: 0, False: 8.24k] ------------------ 5391| | // op: rt 5392| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5393| 0| Value |= (op & UINT64_C(31)) << 21; 5394| | // op: mask 5395| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5396| 0| Value |= (op & UINT64_C(127)) << 14; 5397| 0| break; 5398| 0| } 5399| 0| case Mips::BEQZALC_MMR6: ------------------ | Branch (5399:5): [True: 0, False: 8.24k] ------------------ 5400| 0| case Mips::BGTZALC_MMR6: ------------------ | Branch (5400:5): [True: 0, False: 8.24k] ------------------ 5401| 0| case Mips::BLEZALC_MMR6: ------------------ | Branch (5401:5): [True: 0, False: 8.24k] ------------------ 5402| 0| case Mips::BNEZALC_MMR6: { ------------------ | Branch (5402:5): [True: 0, False: 8.24k] ------------------ 5403| | // op: rt 5404| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5405| 0| Value |= (op & UINT64_C(31)) << 21; 5406| | // op: offset 5407| 0| op = getBranchTargetOpValueMM(MI, 1, Fixups, STI); 5408| 0| Value |= op & UINT64_C(65535); 5409| 0| break; 5410| 0| } 5411| 0| case Mips::RDHWR_MM: ------------------ | Branch (5411:5): [True: 0, False: 8.24k] ------------------ 5412| 0| case Mips::RDPGPR_MMR6: { ------------------ | Branch (5412:5): [True: 0, False: 8.24k] ------------------ 5413| | // op: rt 5414| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5415| 0| Value |= (op & UINT64_C(31)) << 21; 5416| | // op: rd 5417| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5418| 0| Value |= (op & UINT64_C(31)) << 16; 5419| 0| break; 5420| 0| } 5421| 0| case Mips::ABSQ_S_PH_MM: ------------------ | Branch (5421:5): [True: 0, False: 8.24k] ------------------ 5422| 0| case Mips::ABSQ_S_QB_MMR2: ------------------ | Branch (5422:5): [True: 0, False: 8.24k] ------------------ 5423| 0| case Mips::ABSQ_S_W_MM: ------------------ | Branch (5423:5): [True: 0, False: 8.24k] ------------------ 5424| 0| case Mips::PRECEQU_PH_QBLA_MM: ------------------ | Branch (5424:5): [True: 0, False: 8.24k] ------------------ 5425| 0| case Mips::PRECEQU_PH_QBL_MM: ------------------ | Branch (5425:5): [True: 0, False: 8.24k] ------------------ 5426| 0| case Mips::PRECEQU_PH_QBRA_MM: ------------------ | Branch (5426:5): [True: 0, False: 8.24k] ------------------ 5427| 0| case Mips::PRECEQU_PH_QBR_MM: ------------------ | Branch (5427:5): [True: 0, False: 8.24k] ------------------ 5428| 0| case Mips::PRECEQ_W_PHL_MM: ------------------ | Branch (5428:5): [True: 0, False: 8.24k] ------------------ 5429| 0| case Mips::PRECEQ_W_PHR_MM: ------------------ | Branch (5429:5): [True: 0, False: 8.24k] ------------------ 5430| 0| case Mips::PRECEU_PH_QBLA_MM: ------------------ | Branch (5430:5): [True: 0, False: 8.24k] ------------------ 5431| 0| case Mips::PRECEU_PH_QBL_MM: ------------------ | Branch (5431:5): [True: 0, False: 8.24k] ------------------ 5432| 0| case Mips::PRECEU_PH_QBRA_MM: ------------------ | Branch (5432:5): [True: 0, False: 8.24k] ------------------ 5433| 0| case Mips::PRECEU_PH_QBR_MM: ------------------ | Branch (5433:5): [True: 0, False: 8.24k] ------------------ 5434| 0| case Mips::RADDU_W_QB_MM: ------------------ | Branch (5434:5): [True: 0, False: 8.24k] ------------------ 5435| 0| case Mips::REPLV_PH_MM: ------------------ | Branch (5435:5): [True: 0, False: 8.24k] ------------------ 5436| 0| case Mips::REPLV_QB_MM: ------------------ | Branch (5436:5): [True: 0, False: 8.24k] ------------------ 5437| 0| case Mips::WRPGPR_MMR6: ------------------ | Branch (5437:5): [True: 0, False: 8.24k] ------------------ 5438| 0| case Mips::WSBH_MMR6: { ------------------ | Branch (5438:5): [True: 0, False: 8.24k] ------------------ 5439| | // op: rt 5440| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5441| 0| Value |= (op & UINT64_C(31)) << 21; 5442| | // op: rs 5443| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5444| 0| Value |= (op & UINT64_C(31)) << 16; 5445| 0| break; 5446| 0| } 5447| 0| case Mips::DAUI_MM64R6: { ------------------ | Branch (5447:5): [True: 0, False: 8.24k] ------------------ 5448| | // op: rt 5449| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5450| 0| Value |= (op & UINT64_C(31)) << 21; 5451| | // op: rs 5452| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5453| 0| Value |= (op & UINT64_C(31)) << 16; 5454| | // op: imm 5455| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5456| 0| Value |= op & UINT64_C(65535); 5457| 0| break; 5458| 0| } 5459| 0| case Mips::ADDIU_MMR6: ------------------ | Branch (5459:5): [True: 0, False: 8.24k] ------------------ 5460| 0| case Mips::ANDI_MMR6: ------------------ | Branch (5460:5): [True: 0, False: 8.24k] ------------------ 5461| 0| case Mips::ORI_MMR6: ------------------ | Branch (5461:5): [True: 0, False: 8.24k] ------------------ 5462| 0| case Mips::SLTi_MM: ------------------ | Branch (5462:5): [True: 0, False: 8.24k] ------------------ 5463| 0| case Mips::SLTiu_MM: ------------------ | Branch (5463:5): [True: 0, False: 8.24k] ------------------ 5464| 0| case Mips::XORI_MMR6: { ------------------ | Branch (5464:5): [True: 0, False: 8.24k] ------------------ 5465| | // op: rt 5466| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5467| 0| Value |= (op & UINT64_C(31)) << 21; 5468| | // op: rs 5469| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5470| 0| Value |= (op & UINT64_C(31)) << 16; 5471| | // op: imm16 5472| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5473| 0| Value |= op & UINT64_C(65535); 5474| 0| break; 5475| 0| } 5476| 0| case Mips::INS_MM: { ------------------ | Branch (5476:5): [True: 0, False: 8.24k] ------------------ 5477| | // op: rt 5478| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5479| 0| Value |= (op & UINT64_C(31)) << 21; 5480| | // op: rs 5481| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5482| 0| Value |= (op & UINT64_C(31)) << 16; 5483| | // op: pos 5484| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5485| 0| Value |= (op & UINT64_C(31)) << 6; 5486| | // op: size 5487| 0| op = getSizeInsEncoding(MI, 3, Fixups, STI); 5488| 0| Value |= (op & UINT64_C(31)) << 11; 5489| 0| break; 5490| 0| } 5491| 0| case Mips::EXT_MM: { ------------------ | Branch (5491:5): [True: 0, False: 8.24k] ------------------ 5492| | // op: rt 5493| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5494| 0| Value |= (op & UINT64_C(31)) << 21; 5495| | // op: rs 5496| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5497| 0| Value |= (op & UINT64_C(31)) << 16; 5498| | // op: pos 5499| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5500| 0| Value |= (op & UINT64_C(31)) << 6; 5501| | // op: size 5502| 0| op = getUImmWithOffsetEncoding<5, 1>(MI, 3, Fixups, STI); 5503| 0| Value |= (op & UINT64_C(31)) << 11; 5504| 0| break; 5505| 0| } 5506| 0| case Mips::SHLL_PH_MM: ------------------ | Branch (5506:5): [True: 0, False: 8.24k] ------------------ 5507| 0| case Mips::SHLL_S_PH_MM: ------------------ | Branch (5507:5): [True: 0, False: 8.24k] ------------------ 5508| 0| case Mips::SHRA_PH_MM: ------------------ | Branch (5508:5): [True: 0, False: 8.24k] ------------------ 5509| 0| case Mips::SHRA_R_PH_MM: ------------------ | Branch (5509:5): [True: 0, False: 8.24k] ------------------ 5510| 0| case Mips::SHRL_PH_MMR2: { ------------------ | Branch (5510:5): [True: 0, False: 8.24k] ------------------ 5511| | // op: rt 5512| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5513| 0| Value |= (op & UINT64_C(31)) << 21; 5514| | // op: rs 5515| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5516| 0| Value |= (op & UINT64_C(31)) << 16; 5517| | // op: sa 5518| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5519| 0| Value |= (op & UINT64_C(15)) << 12; 5520| 0| break; 5521| 0| } 5522| 0| case Mips::PRECR_SRA_PH_W_MMR2: ------------------ | Branch (5522:5): [True: 0, False: 8.24k] ------------------ 5523| 0| case Mips::PRECR_SRA_R_PH_W_MMR2: ------------------ | Branch (5523:5): [True: 0, False: 8.24k] ------------------ 5524| 0| case Mips::PREPEND_MMR2: ------------------ | Branch (5524:5): [True: 0, False: 8.24k] ------------------ 5525| 0| case Mips::SHLL_S_W_MM: ------------------ | Branch (5525:5): [True: 0, False: 8.24k] ------------------ 5526| 0| case Mips::SHRA_R_W_MM: { ------------------ | Branch (5526:5): [True: 0, False: 8.24k] ------------------ 5527| | // op: rt 5528| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5529| 0| Value |= (op & UINT64_C(31)) << 21; 5530| | // op: rs 5531| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5532| 0| Value |= (op & UINT64_C(31)) << 16; 5533| | // op: sa 5534| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5535| 0| Value |= (op & UINT64_C(31)) << 11; 5536| 0| break; 5537| 0| } 5538| 0| case Mips::SHLL_QB_MM: ------------------ | Branch (5538:5): [True: 0, False: 8.24k] ------------------ 5539| 0| case Mips::SHRA_QB_MMR2: ------------------ | Branch (5539:5): [True: 0, False: 8.24k] ------------------ 5540| 0| case Mips::SHRA_R_QB_MMR2: ------------------ | Branch (5540:5): [True: 0, False: 8.24k] ------------------ 5541| 0| case Mips::SHRL_QB_MM: { ------------------ | Branch (5541:5): [True: 0, False: 8.24k] ------------------ 5542| | // op: rt 5543| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5544| 0| Value |= (op & UINT64_C(31)) << 21; 5545| | // op: rs 5546| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5547| 0| Value |= (op & UINT64_C(31)) << 16; 5548| | // op: sa 5549| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5550| 0| Value |= (op & UINT64_C(7)) << 13; 5551| 0| break; 5552| 0| } 5553| 0| case Mips::RDHWR_MMR6: { ------------------ | Branch (5553:5): [True: 0, False: 8.24k] ------------------ 5554| | // op: rt 5555| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5556| 0| Value |= (op & UINT64_C(31)) << 21; 5557| | // op: rs 5558| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5559| 0| Value |= (op & UINT64_C(31)) << 16; 5560| | // op: sel 5561| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5562| 0| Value |= (op & UINT64_C(7)) << 11; 5563| 0| break; 5564| 0| } 5565| 0| case Mips::DEXTM_MM64R6: ------------------ | Branch (5565:5): [True: 0, False: 8.24k] ------------------ 5566| 0| case Mips::DEXTU_MM64R6: ------------------ | Branch (5566:5): [True: 0, False: 8.24k] ------------------ 5567| 0| case Mips::DEXT_MM64R6: { ------------------ | Branch (5567:5): [True: 0, False: 8.24k] ------------------ 5568| | // op: rt 5569| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5570| 0| Value |= (op & UINT64_C(31)) << 21; 5571| | // op: rs 5572| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5573| 0| Value |= (op & UINT64_C(31)) << 16; 5574| | // op: size 5575| 0| op = getUImmWithOffsetEncoding<5, 1>(MI, 3, Fixups, STI); 5576| 0| Value |= (op & UINT64_C(31)) << 11; 5577| | // op: pos 5578| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5579| 0| Value |= (op & UINT64_C(31)) << 6; 5580| 0| break; 5581| 0| } 5582| 0| case Mips::INSV_MM: { ------------------ | Branch (5582:5): [True: 0, False: 8.24k] ------------------ 5583| | // op: rt 5584| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5585| 0| Value |= (op & UINT64_C(31)) << 21; 5586| | // op: rs 5587| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5588| 0| Value |= (op & UINT64_C(31)) << 16; 5589| 0| break; 5590| 0| } 5591| 0| case Mips::EXTPDPV_MM: ------------------ | Branch (5591:5): [True: 0, False: 8.24k] ------------------ 5592| 0| case Mips::EXTPV_MM: ------------------ | Branch (5592:5): [True: 0, False: 8.24k] ------------------ 5593| 0| case Mips::EXTRV_RS_W_MM: ------------------ | Branch (5593:5): [True: 0, False: 8.24k] ------------------ 5594| 0| case Mips::EXTRV_R_W_MM: ------------------ | Branch (5594:5): [True: 0, False: 8.24k] ------------------ 5595| 0| case Mips::EXTRV_S_H_MM: ------------------ | Branch (5595:5): [True: 0, False: 8.24k] ------------------ 5596| 0| case Mips::EXTRV_W_MM: { ------------------ | Branch (5596:5): [True: 0, False: 8.24k] ------------------ 5597| | // op: rt 5598| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5599| 0| Value |= (op & UINT64_C(31)) << 21; 5600| | // op: rs 5601| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5602| 0| Value |= (op & UINT64_C(31)) << 16; 5603| | // op: ac 5604| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5605| 0| Value |= (op & UINT64_C(3)) << 14; 5606| 0| break; 5607| 0| } 5608| 0| case Mips::BGEZALC: ------------------ | Branch (5608:5): [True: 0, False: 8.24k] ------------------ 5609| 0| case Mips::BGEZC: ------------------ | Branch (5609:5): [True: 0, False: 8.24k] ------------------ 5610| 0| case Mips::BLTZALC: ------------------ | Branch (5610:5): [True: 0, False: 8.24k] ------------------ 5611| 0| case Mips::BLTZC: { ------------------ | Branch (5611:5): [True: 0, False: 8.24k] ------------------ 5612| | // op: rt 5613| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5614| 0| Value |= (op & UINT64_C(31)) << 21; 5615| 0| Value |= (op & UINT64_C(31)) << 16; 5616| | // op: offset 5617| 0| op = getBranchTargetOpValue(MI, 1, Fixups, STI); 5618| 0| Value |= op & UINT64_C(65535); 5619| 0| break; 5620| 0| } 5621| 0| case Mips::BGEZALC_MMR6: ------------------ | Branch (5621:5): [True: 0, False: 8.24k] ------------------ 5622| 0| case Mips::BLTZALC_MMR6: { ------------------ | Branch (5622:5): [True: 0, False: 8.24k] ------------------ 5623| | // op: rt 5624| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5625| 0| Value |= (op & UINT64_C(31)) << 21; 5626| 0| Value |= (op & UINT64_C(31)) << 16; 5627| | // op: offset 5628| 0| op = getBranchTargetOpValueMM(MI, 1, Fixups, STI); 5629| 0| Value |= op & UINT64_C(65535); 5630| 0| break; 5631| 0| } 5632| 0| case Mips::LWSP_MM: ------------------ | Branch (5632:5): [True: 0, False: 8.24k] ------------------ 5633| 0| case Mips::SWSP_MM: ------------------ | Branch (5633:5): [True: 0, False: 8.24k] ------------------ 5634| 0| case Mips::SWSP_MMR6: { ------------------ | Branch (5634:5): [True: 0, False: 8.24k] ------------------ 5635| | // op: rt 5636| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5637| 0| Value |= (op & UINT64_C(31)) << 5; 5638| | // op: offset 5639| 0| op = getMemEncodingMMSPImm5Lsl2(MI, 1, Fixups, STI); 5640| 0| Value |= op & UINT64_C(31); 5641| 0| break; 5642| 0| } 5643| 0| case Mips::NOT16_MM: { ------------------ | Branch (5643:5): [True: 0, False: 8.24k] ------------------ 5644| | // op: rt 5645| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5646| 0| Value |= (op & UINT64_C(7)) << 3; 5647| | // op: rs 5648| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5649| 0| Value |= op & UINT64_C(7); 5650| 0| break; 5651| 0| } 5652| 0| case Mips::LBU16_MM: ------------------ | Branch (5652:5): [True: 0, False: 8.24k] ------------------ 5653| 0| case Mips::SB16_MM: ------------------ | Branch (5653:5): [True: 0, False: 8.24k] ------------------ 5654| 0| case Mips::SB16_MMR6: { ------------------ | Branch (5654:5): [True: 0, False: 8.24k] ------------------ 5655| | // op: rt 5656| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5657| 0| Value |= (op & UINT64_C(7)) << 7; 5658| | // op: addr 5659| 0| op = getMemEncodingMMImm4(MI, 1, Fixups, STI); 5660| 0| Value |= op & UINT64_C(127); 5661| 0| break; 5662| 0| } 5663| 0| case Mips::LHU16_MM: ------------------ | Branch (5663:5): [True: 0, False: 8.24k] ------------------ 5664| 0| case Mips::SH16_MM: ------------------ | Branch (5664:5): [True: 0, False: 8.24k] ------------------ 5665| 0| case Mips::SH16_MMR6: { ------------------ | Branch (5665:5): [True: 0, False: 8.24k] ------------------ 5666| | // op: rt 5667| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5668| 0| Value |= (op & UINT64_C(7)) << 7; 5669| | // op: addr 5670| 0| op = getMemEncodingMMImm4Lsl1(MI, 1, Fixups, STI); 5671| 0| Value |= op & UINT64_C(127); 5672| 0| break; 5673| 0| } 5674| 0| case Mips::LW16_MM: ------------------ | Branch (5674:5): [True: 0, False: 8.24k] ------------------ 5675| 0| case Mips::SW16_MM: ------------------ | Branch (5675:5): [True: 0, False: 8.24k] ------------------ 5676| 0| case Mips::SW16_MMR6: { ------------------ | Branch (5676:5): [True: 0, False: 8.24k] ------------------ 5677| | // op: rt 5678| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5679| 0| Value |= (op & UINT64_C(7)) << 7; 5680| | // op: addr 5681| 0| op = getMemEncodingMMImm4Lsl2(MI, 1, Fixups, STI); 5682| 0| Value |= op & UINT64_C(127); 5683| 0| break; 5684| 0| } 5685| 0| case Mips::LWGP_MM: { ------------------ | Branch (5685:5): [True: 0, False: 8.24k] ------------------ 5686| | // op: rt 5687| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5688| 0| Value |= (op & UINT64_C(7)) << 7; 5689| | // op: offset 5690| 0| op = getMemEncodingMMGPImm7Lsl2(MI, 1, Fixups, STI); 5691| 0| Value |= op & UINT64_C(127); 5692| 0| break; 5693| 0| } 5694| 0| case Mips::NOT16_MMR6: { ------------------ | Branch (5694:5): [True: 0, False: 8.24k] ------------------ 5695| | // op: rt 5696| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5697| 0| Value |= (op & UINT64_C(7)) << 7; 5698| | // op: rs 5699| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5700| 0| Value |= (op & UINT64_C(7)) << 4; 5701| 0| break; 5702| 0| } 5703| 0| case Mips::SCD_R6: ------------------ | Branch (5703:5): [True: 0, False: 8.24k] ------------------ 5704| 0| case Mips::SC_R6: { ------------------ | Branch (5704:5): [True: 0, False: 8.24k] ------------------ 5705| | // op: rt 5706| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5707| 0| Value |= (op & UINT64_C(31)) << 16; 5708| | // op: addr 5709| 0| op = getMemEncoding(MI, 2, Fixups, STI); 5710| 0| Value |= (op & UINT64_C(2031616)) << 5; 5711| 0| Value |= (op & UINT64_C(511)) << 7; 5712| 0| break; 5713| 0| } 5714| 0| case Mips::SC: ------------------ | Branch (5714:5): [True: 0, False: 8.24k] ------------------ 5715| 0| case Mips::SCD: { ------------------ | Branch (5715:5): [True: 0, False: 8.24k] ------------------ 5716| | // op: rt 5717| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5718| 0| Value |= (op & UINT64_C(31)) << 16; 5719| | // op: addr 5720| 0| op = getMemEncoding(MI, 2, Fixups, STI); 5721| 0| Value |= (op & UINT64_C(2031616)) << 5; 5722| 0| Value |= op & UINT64_C(65535); 5723| 0| break; 5724| 0| } 5725| 0| case Mips::CTC1: ------------------ | Branch (5725:5): [True: 0, False: 8.24k] ------------------ 5726| 0| case Mips::DMTC1: ------------------ | Branch (5726:5): [True: 0, False: 8.24k] ------------------ 5727| 0| case Mips::MTC1: { ------------------ | Branch (5727:5): [True: 0, False: 8.24k] ------------------ 5728| | // op: rt 5729| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5730| 0| Value |= (op & UINT64_C(31)) << 16; 5731| | // op: fs 5732| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5733| 0| Value |= (op & UINT64_C(31)) << 11; 5734| 0| break; 5735| 0| } 5736| 0| case Mips::DMTC0: ------------------ | Branch (5736:5): [True: 0, False: 8.24k] ------------------ 5737| 0| case Mips::DMTC2: ------------------ | Branch (5737:5): [True: 0, False: 8.24k] ------------------ 5738| 0| case Mips::MTC0: ------------------ | Branch (5738:5): [True: 0, False: 8.24k] ------------------ 5739| 0| case Mips::MTC2: { ------------------ | Branch (5739:5): [True: 0, False: 8.24k] ------------------ 5740| | // op: rt 5741| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5742| 0| Value |= (op & UINT64_C(31)) << 16; 5743| | // op: rd 5744| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5745| 0| Value |= (op & UINT64_C(31)) << 11; 5746| | // op: sel 5747| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5748| 0| Value |= op & UINT64_C(7); 5749| 0| break; 5750| 0| } 5751| 0| case Mips::SC_MM: { ------------------ | Branch (5751:5): [True: 0, False: 8.24k] ------------------ 5752| | // op: rt 5753| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5754| 0| Value |= (op & UINT64_C(31)) << 21; 5755| | // op: addr 5756| 0| op = getMemEncodingMMImm12(MI, 2, Fixups, STI); 5757| 0| Value |= op & UINT64_C(2031616); 5758| 0| Value |= op & UINT64_C(4095); 5759| 0| break; 5760| 0| } 5761| 0| case Mips::SCE_MM: { ------------------ | Branch (5761:5): [True: 0, False: 8.24k] ------------------ 5762| | // op: rt 5763| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5764| 0| Value |= (op & UINT64_C(31)) << 21; 5765| | // op: addr 5766| 0| op = getMemEncodingMMImm12(MI, 2, Fixups, STI); 5767| 0| Value |= op & UINT64_C(2031616); 5768| 0| Value |= op & UINT64_C(511); 5769| 0| break; 5770| 0| } 5771| 0| case Mips::CTC1_MM: ------------------ | Branch (5771:5): [True: 0, False: 8.24k] ------------------ 5772| 0| case Mips::MTC1_MM: { ------------------ | Branch (5772:5): [True: 0, False: 8.24k] ------------------ 5773| | // op: rt 5774| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5775| 0| Value |= (op & UINT64_C(31)) << 21; 5776| | // op: fs 5777| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5778| 0| Value |= (op & UINT64_C(31)) << 16; 5779| 0| break; 5780| 0| } 5781| 0| case Mips::MTHC1_D32: ------------------ | Branch (5781:5): [True: 0, False: 8.24k] ------------------ 5782| 0| case Mips::MTHC1_D64: { ------------------ | Branch (5782:5): [True: 0, False: 8.24k] ------------------ 5783| | // op: rt 5784| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5785| 0| Value |= (op & UINT64_C(31)) << 16; 5786| | // op: fs 5787| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5788| 0| Value |= (op & UINT64_C(31)) << 11; 5789| 0| break; 5790| 0| } 5791| 0| case Mips::SPLAT_B: ------------------ | Branch (5791:5): [True: 0, False: 8.24k] ------------------ 5792| 0| case Mips::SPLAT_D: ------------------ | Branch (5792:5): [True: 0, False: 8.24k] ------------------ 5793| 0| case Mips::SPLAT_H: ------------------ | Branch (5793:5): [True: 0, False: 8.24k] ------------------ 5794| 0| case Mips::SPLAT_W: { ------------------ | Branch (5794:5): [True: 0, False: 8.24k] ------------------ 5795| | // op: rt 5796| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5797| 0| Value |= (op & UINT64_C(31)) << 16; 5798| | // op: ws 5799| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5800| 0| Value |= (op & UINT64_C(31)) << 11; 5801| | // op: wd 5802| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5803| 0| Value |= (op & UINT64_C(31)) << 6; 5804| 0| break; 5805| 0| } 5806| 0| case Mips::MTHC1_MM: { ------------------ | Branch (5806:5): [True: 0, False: 8.24k] ------------------ 5807| | // op: rt 5808| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5809| 0| Value |= (op & UINT64_C(31)) << 21; 5810| | // op: fs 5811| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5812| 0| Value |= (op & UINT64_C(31)) << 16; 5813| 0| break; 5814| 0| } 5815| 0| case Mips::DPAQX_SA_W_PH_MMR2: ------------------ | Branch (5815:5): [True: 0, False: 8.24k] ------------------ 5816| 0| case Mips::DPAQX_S_W_PH_MMR2: ------------------ | Branch (5816:5): [True: 0, False: 8.24k] ------------------ 5817| 0| case Mips::DPAQ_SA_L_W_MM: ------------------ | Branch (5817:5): [True: 0, False: 8.24k] ------------------ 5818| 0| case Mips::DPAQ_S_W_PH_MM: ------------------ | Branch (5818:5): [True: 0, False: 8.24k] ------------------ 5819| 0| case Mips::DPAU_H_QBL_MM: ------------------ | Branch (5819:5): [True: 0, False: 8.24k] ------------------ 5820| 0| case Mips::DPAU_H_QBR_MM: ------------------ | Branch (5820:5): [True: 0, False: 8.24k] ------------------ 5821| 0| case Mips::DPAX_W_PH_MMR2: ------------------ | Branch (5821:5): [True: 0, False: 8.24k] ------------------ 5822| 0| case Mips::DPA_W_PH_MMR2: ------------------ | Branch (5822:5): [True: 0, False: 8.24k] ------------------ 5823| 0| case Mips::DPSQX_SA_W_PH_MMR2: ------------------ | Branch (5823:5): [True: 0, False: 8.24k] ------------------ 5824| 0| case Mips::DPSQX_S_W_PH_MMR2: ------------------ | Branch (5824:5): [True: 0, False: 8.24k] ------------------ 5825| 0| case Mips::DPSQ_SA_L_W_MM: ------------------ | Branch (5825:5): [True: 0, False: 8.24k] ------------------ 5826| 0| case Mips::DPSQ_S_W_PH_MM: ------------------ | Branch (5826:5): [True: 0, False: 8.24k] ------------------ 5827| 0| case Mips::DPSU_H_QBL_MM: ------------------ | Branch (5827:5): [True: 0, False: 8.24k] ------------------ 5828| 0| case Mips::DPSU_H_QBR_MM: ------------------ | Branch (5828:5): [True: 0, False: 8.24k] ------------------ 5829| 0| case Mips::DPSX_W_PH_MMR2: ------------------ | Branch (5829:5): [True: 0, False: 8.24k] ------------------ 5830| 0| case Mips::DPS_W_PH_MMR2: ------------------ | Branch (5830:5): [True: 0, False: 8.24k] ------------------ 5831| 0| case Mips::MADDU_DSP_MM: ------------------ | Branch (5831:5): [True: 0, False: 8.24k] ------------------ 5832| 0| case Mips::MADD_DSP_MM: ------------------ | Branch (5832:5): [True: 0, False: 8.24k] ------------------ 5833| 0| case Mips::MAQ_SA_W_PHL_MM: ------------------ | Branch (5833:5): [True: 0, False: 8.24k] ------------------ 5834| 0| case Mips::MAQ_SA_W_PHR_MM: ------------------ | Branch (5834:5): [True: 0, False: 8.24k] ------------------ 5835| 0| case Mips::MAQ_S_W_PHL_MM: ------------------ | Branch (5835:5): [True: 0, False: 8.24k] ------------------ 5836| 0| case Mips::MAQ_S_W_PHR_MM: ------------------ | Branch (5836:5): [True: 0, False: 8.24k] ------------------ 5837| 0| case Mips::MSUBU_DSP_MM: ------------------ | Branch (5837:5): [True: 0, False: 8.24k] ------------------ 5838| 0| case Mips::MSUB_DSP_MM: ------------------ | Branch (5838:5): [True: 0, False: 8.24k] ------------------ 5839| 0| case Mips::MULTU_DSP_MM: ------------------ | Branch (5839:5): [True: 0, False: 8.24k] ------------------ 5840| 0| case Mips::MULT_DSP_MM: { ------------------ | Branch (5840:5): [True: 0, False: 8.24k] ------------------ 5841| | // op: rt 5842| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5843| 0| Value |= (op & UINT64_C(31)) << 21; 5844| | // op: rs 5845| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5846| 0| Value |= (op & UINT64_C(31)) << 16; 5847| | // op: ac 5848| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5849| 0| Value |= (op & UINT64_C(3)) << 14; 5850| 0| break; 5851| 0| } 5852| 0| case Mips::ADD_MM: ------------------ | Branch (5852:5): [True: 0, False: 8.24k] ------------------ 5853| 0| case Mips::ADDu_MM: ------------------ | Branch (5853:5): [True: 0, False: 8.24k] ------------------ 5854| 0| case Mips::AND_MM: ------------------ | Branch (5854:5): [True: 0, False: 8.24k] ------------------ 5855| 0| case Mips::MOVN_I_MM: ------------------ | Branch (5855:5): [True: 0, False: 8.24k] ------------------ 5856| 0| case Mips::MOVZ_I_MM: ------------------ | Branch (5856:5): [True: 0, False: 8.24k] ------------------ 5857| 0| case Mips::MUL_MM: ------------------ | Branch (5857:5): [True: 0, False: 8.24k] ------------------ 5858| 0| case Mips::NOR_MM: ------------------ | Branch (5858:5): [True: 0, False: 8.24k] ------------------ 5859| 0| case Mips::OR_MM: ------------------ | Branch (5859:5): [True: 0, False: 8.24k] ------------------ 5860| 0| case Mips::SLT_MM: ------------------ | Branch (5860:5): [True: 0, False: 8.24k] ------------------ 5861| 0| case Mips::SLTu_MM: ------------------ | Branch (5861:5): [True: 0, False: 8.24k] ------------------ 5862| 0| case Mips::SUB_MM: ------------------ | Branch (5862:5): [True: 0, False: 8.24k] ------------------ 5863| 0| case Mips::SUBu_MM: ------------------ | Branch (5863:5): [True: 0, False: 8.24k] ------------------ 5864| 0| case Mips::XOR_MM: { ------------------ | Branch (5864:5): [True: 0, False: 8.24k] ------------------ 5865| | // op: rt 5866| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5867| 0| Value |= (op & UINT64_C(31)) << 21; 5868| | // op: rs 5869| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5870| 0| Value |= (op & UINT64_C(31)) << 16; 5871| | // op: rd 5872| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5873| 0| Value |= (op & UINT64_C(31)) << 11; 5874| 0| break; 5875| 0| } 5876| 0| case Mips::AND16_MM: ------------------ | Branch (5876:5): [True: 0, False: 8.24k] ------------------ 5877| 0| case Mips::OR16_MM: ------------------ | Branch (5877:5): [True: 0, False: 8.24k] ------------------ 5878| 0| case Mips::XOR16_MM: { ------------------ | Branch (5878:5): [True: 0, False: 8.24k] ------------------ 5879| | // op: rt 5880| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5881| 0| Value |= (op & UINT64_C(7)) << 3; 5882| | // op: rs 5883| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5884| 0| Value |= op & UINT64_C(7); 5885| 0| break; 5886| 0| } 5887| 0| case Mips::AND16_MMR6: ------------------ | Branch (5887:5): [True: 0, False: 8.24k] ------------------ 5888| 0| case Mips::OR16_MMR6: ------------------ | Branch (5888:5): [True: 0, False: 8.24k] ------------------ 5889| 0| case Mips::XOR16_MMR6: { ------------------ | Branch (5889:5): [True: 0, False: 8.24k] ------------------ 5890| | // op: rt 5891| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5892| 0| Value |= (op & UINT64_C(7)) << 7; 5893| | // op: rs 5894| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5895| 0| Value |= (op & UINT64_C(7)) << 4; 5896| 0| break; 5897| 0| } 5898| 0| case Mips::SLD_B: ------------------ | Branch (5898:5): [True: 0, False: 8.24k] ------------------ 5899| 0| case Mips::SLD_D: ------------------ | Branch (5899:5): [True: 0, False: 8.24k] ------------------ 5900| 0| case Mips::SLD_H: ------------------ | Branch (5900:5): [True: 0, False: 8.24k] ------------------ 5901| 0| case Mips::SLD_W: { ------------------ | Branch (5901:5): [True: 0, False: 8.24k] ------------------ 5902| | // op: rt 5903| 0| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 5904| 0| Value |= (op & UINT64_C(31)) << 16; 5905| | // op: ws 5906| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5907| 0| Value |= (op & UINT64_C(31)) << 11; 5908| | // op: wd 5909| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5910| 0| Value |= (op & UINT64_C(31)) << 6; 5911| 0| break; 5912| 0| } 5913| 0| case Mips::LWM32_MM: ------------------ | Branch (5913:5): [True: 0, False: 8.24k] ------------------ 5914| 0| case Mips::SWM32_MM: { ------------------ | Branch (5914:5): [True: 0, False: 8.24k] ------------------ 5915| | // op: rt 5916| 0| op = getRegisterListOpValue(MI, 0, Fixups, STI); 5917| 0| Value |= (op & UINT64_C(31)) << 21; 5918| | // op: addr 5919| 0| op = getMemEncodingMMImm12(MI, 1, Fixups, STI); 5920| 0| Value |= op & UINT64_C(2031616); 5921| 0| Value |= op & UINT64_C(4095); 5922| 0| break; 5923| 0| } 5924| 0| case Mips::LWM16_MM: ------------------ | Branch (5924:5): [True: 0, False: 8.24k] ------------------ 5925| 0| case Mips::SWM16_MM: { ------------------ | Branch (5925:5): [True: 0, False: 8.24k] ------------------ 5926| | // op: rt 5927| 0| op = getRegisterListOpValue16(MI, 0, Fixups, STI); 5928| 0| Value |= (op & UINT64_C(3)) << 4; 5929| | // op: addr 5930| 0| op = getMemEncodingMMImm4sp(MI, 1, Fixups, STI); 5931| 0| Value |= op & UINT64_C(15); 5932| 0| break; 5933| 0| } 5934| 0| case Mips::LWM16_MMR6: ------------------ | Branch (5934:5): [True: 0, False: 8.24k] ------------------ 5935| 0| case Mips::SWM16_MMR6: { ------------------ | Branch (5935:5): [True: 0, False: 8.24k] ------------------ 5936| | // op: rt 5937| 0| op = getRegisterListOpValue16(MI, 0, Fixups, STI); 5938| 0| Value |= (op & UINT64_C(3)) << 8; 5939| | // op: addr 5940| 0| op = getMemEncodingMMImm4sp(MI, 1, Fixups, STI); 5941| 0| Value |= (op & UINT64_C(15)) << 4; 5942| 0| break; 5943| 0| } 5944| 0| case Mips::LWP_MM: ------------------ | Branch (5944:5): [True: 0, False: 8.24k] ------------------ 5945| 0| case Mips::SWP_MM: { ------------------ | Branch (5945:5): [True: 0, False: 8.24k] ------------------ 5946| | // op: rt 5947| 0| op = getRegisterPairOpValue(MI, 0, Fixups, STI); 5948| 0| Value |= (op & UINT64_C(31)) << 21; 5949| | // op: addr 5950| 0| op = getMemEncodingMMImm12(MI, 2, Fixups, STI); 5951| 0| Value |= op & UINT64_C(2031616); 5952| 0| Value |= op & UINT64_C(4095); 5953| 0| break; 5954| 0| } 5955| 0| case Mips::JrcRx16: ------------------ | Branch (5955:5): [True: 0, False: 8.24k] ------------------ 5956| 0| case Mips::JumpLinkReg16: ------------------ | Branch (5956:5): [True: 0, False: 8.24k] ------------------ 5957| 0| case Mips::SebRx16: ------------------ | Branch (5957:5): [True: 0, False: 8.24k] ------------------ 5958| 0| case Mips::SehRx16: { ------------------ | Branch (5958:5): [True: 0, False: 8.24k] ------------------ 5959| | // op: rx 5960| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5961| 0| Value |= (op & UINT64_C(7)) << 8; 5962| 0| break; 5963| 0| } 5964| 0| case Mips::AddiuRxRxImm16: ------------------ | Branch (5964:5): [True: 0, False: 8.24k] ------------------ 5965| 0| case Mips::BeqzRxImm16: ------------------ | Branch (5965:5): [True: 0, False: 8.24k] ------------------ 5966| 0| case Mips::BnezRxImm16: ------------------ | Branch (5966:5): [True: 0, False: 8.24k] ------------------ 5967| 0| case Mips::CmpiRxImm16: ------------------ | Branch (5967:5): [True: 0, False: 8.24k] ------------------ 5968| 0| case Mips::LiRxImm16: ------------------ | Branch (5968:5): [True: 0, False: 8.24k] ------------------ 5969| 0| case Mips::LwRxPcTcp16: ------------------ | Branch (5969:5): [True: 0, False: 8.24k] ------------------ 5970| 0| case Mips::SltiRxImm16: ------------------ | Branch (5970:5): [True: 0, False: 8.24k] ------------------ 5971| 0| case Mips::SltiuRxImm16: { ------------------ | Branch (5971:5): [True: 0, False: 8.24k] ------------------ 5972| | // op: rx 5973| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5974| 0| Value |= (op & UINT64_C(7)) << 8; 5975| | // op: imm8 5976| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5977| 0| Value |= op & UINT64_C(255); 5978| 0| break; 5979| 0| } 5980| 0| case Mips::Mfhi16: ------------------ | Branch (5980:5): [True: 0, False: 8.24k] ------------------ 5981| 0| case Mips::Mflo16: { ------------------ | Branch (5981:5): [True: 0, False: 8.24k] ------------------ 5982| | // op: rx 5983| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5984| 0| Value |= (op & UINT64_C(7)) << 8; 5985| | // op: ry 5986| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5987| 0| Value |= (op & UINT64_C(7)) << 5; 5988| 0| break; 5989| 0| } 5990| 0| case Mips::CmpRxRy16: ------------------ | Branch (5990:5): [True: 0, False: 8.24k] ------------------ 5991| 0| case Mips::DivRxRy16: ------------------ | Branch (5991:5): [True: 0, False: 8.24k] ------------------ 5992| 0| case Mips::DivuRxRy16: ------------------ | Branch (5992:5): [True: 0, False: 8.24k] ------------------ 5993| 0| case Mips::NegRxRy16: ------------------ | Branch (5993:5): [True: 0, False: 8.24k] ------------------ 5994| 0| case Mips::NotRxRy16: ------------------ | Branch (5994:5): [True: 0, False: 8.24k] ------------------ 5995| 0| case Mips::SltRxRy16: ------------------ | Branch (5995:5): [True: 0, False: 8.24k] ------------------ 5996| 0| case Mips::SltuRxRy16: { ------------------ | Branch (5996:5): [True: 0, False: 8.24k] ------------------ 5997| | // op: rx 5998| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5999| 0| Value |= (op & UINT64_C(7)) << 8; 6000| | // op: ry 6001| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6002| 0| Value |= (op & UINT64_C(7)) << 5; 6003| 0| break; 6004| 0| } 6005| 0| case Mips::AndRxRxRy16: ------------------ | Branch (6005:5): [True: 0, False: 8.24k] ------------------ 6006| 0| case Mips::OrRxRxRy16: ------------------ | Branch (6006:5): [True: 0, False: 8.24k] ------------------ 6007| 0| case Mips::SllvRxRy16: ------------------ | Branch (6007:5): [True: 0, False: 8.24k] ------------------ 6008| 0| case Mips::SravRxRy16: ------------------ | Branch (6008:5): [True: 0, False: 8.24k] ------------------ 6009| 0| case Mips::SrlvRxRy16: ------------------ | Branch (6009:5): [True: 0, False: 8.24k] ------------------ 6010| 0| case Mips::XorRxRxRy16: { ------------------ | Branch (6010:5): [True: 0, False: 8.24k] ------------------ 6011| | // op: rx 6012| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6013| 0| Value |= (op & UINT64_C(7)) << 8; 6014| | // op: ry 6015| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 6016| 0| Value |= (op & UINT64_C(7)) << 5; 6017| 0| break; 6018| 0| } 6019| 0| case Mips::AdduRxRyRz16: ------------------ | Branch (6019:5): [True: 0, False: 8.24k] ------------------ 6020| 0| case Mips::SubuRxRyRz16: { ------------------ | Branch (6020:5): [True: 0, False: 8.24k] ------------------ 6021| | // op: rx 6022| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6023| 0| Value |= (op & UINT64_C(7)) << 8; 6024| | // op: ry 6025| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 6026| 0| Value |= (op & UINT64_C(7)) << 5; 6027| | // op: rz 6028| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6029| 0| Value |= (op & UINT64_C(7)) << 2; 6030| 0| break; 6031| 0| } 6032| 0| case Mips::MoveR3216: { ------------------ | Branch (6032:5): [True: 0, False: 8.24k] ------------------ 6033| | // op: ry 6034| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6035| 0| Value |= (op & UINT64_C(15)) << 4; 6036| | // op: r32 6037| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6038| 0| Value |= op & UINT64_C(15); 6039| 0| break; 6040| 0| } 6041| 0| case Mips::LDI_B: ------------------ | Branch (6041:5): [True: 0, False: 8.24k] ------------------ 6042| 0| case Mips::LDI_D: ------------------ | Branch (6042:5): [True: 0, False: 8.24k] ------------------ 6043| 0| case Mips::LDI_H: ------------------ | Branch (6043:5): [True: 0, False: 8.24k] ------------------ 6044| 0| case Mips::LDI_W: { ------------------ | Branch (6044:5): [True: 0, False: 8.24k] ------------------ 6045| | // op: s10 6046| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6047| 0| Value |= (op & UINT64_C(1023)) << 11; 6048| | // op: wd 6049| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6050| 0| Value |= (op & UINT64_C(31)) << 6; 6051| 0| break; 6052| 0| } 6053| 0| case Mips::SllX16: ------------------ | Branch (6053:5): [True: 0, False: 8.24k] ------------------ 6054| 0| case Mips::SraX16: ------------------ | Branch (6054:5): [True: 0, False: 8.24k] ------------------ 6055| 0| case Mips::SrlX16: { ------------------ | Branch (6055:5): [True: 0, False: 8.24k] ------------------ 6056| | // op: sa6 6057| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6058| 0| Value |= (op & UINT64_C(31)) << 22; 6059| 0| Value |= (op & UINT64_C(32)) << 16; 6060| | // op: rx 6061| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6062| 0| Value |= (op & UINT64_C(7)) << 8; 6063| | // op: ry 6064| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6065| 0| Value |= (op & UINT64_C(7)) << 5; 6066| 0| break; 6067| 0| } 6068| 0| case Mips::SHILO_MM: { ------------------ | Branch (6068:5): [True: 0, False: 8.24k] ------------------ 6069| | // op: shift 6070| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6071| 0| Value |= (op & UINT64_C(63)) << 16; 6072| | // op: ac 6073| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6074| 0| Value |= (op & UINT64_C(3)) << 14; 6075| 0| break; 6076| 0| } 6077| 0| case Mips::SYNC_MM: ------------------ | Branch (6077:5): [True: 0, False: 8.24k] ------------------ 6078| 0| case Mips::SYNC_MMR6: { ------------------ | Branch (6078:5): [True: 0, False: 8.24k] ------------------ 6079| | // op: stype 6080| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6081| 0| Value |= (op & UINT64_C(31)) << 16; 6082| 0| break; 6083| 0| } 6084| 0| case Mips::SYNC: { ------------------ | Branch (6084:5): [True: 0, False: 8.24k] ------------------ 6085| | // op: stype 6086| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6087| 0| Value |= (op & UINT64_C(31)) << 6; 6088| 0| break; 6089| 0| } 6090| 126| case Mips::J: ------------------ | Branch (6090:5): [True: 126, False: 8.11k] ------------------ 6091| 128| case Mips::JAL: ------------------ | Branch (6091:5): [True: 2, False: 8.23k] ------------------ 6092| 128| case Mips::JALX: ------------------ | Branch (6092:5): [True: 0, False: 8.24k] ------------------ 6093| 128| case Mips::JALX_MM: { ------------------ | Branch (6093:5): [True: 0, False: 8.24k] ------------------ 6094| | // op: target 6095| 128| op = getJumpTargetOpValue(MI, 0, Fixups, STI); 6096| 128| Value |= op & UINT64_C(67108863); 6097| 128| break; 6098| 128| } 6099| 0| case Mips::JALS_MM: ------------------ | Branch (6099:5): [True: 0, False: 8.24k] ------------------ 6100| 0| case Mips::JAL_MM: ------------------ | Branch (6100:5): [True: 0, False: 8.24k] ------------------ 6101| 0| case Mips::J_MM: { ------------------ | Branch (6101:5): [True: 0, False: 8.24k] ------------------ 6102| | // op: target 6103| 0| op = getJumpTargetOpValueMM(MI, 0, Fixups, STI); 6104| 0| Value |= op & UINT64_C(67108863); 6105| 0| break; 6106| 0| } 6107| 0| case Mips::ANDI_B: ------------------ | Branch (6107:5): [True: 0, False: 8.24k] ------------------ 6108| 0| case Mips::NORI_B: ------------------ | Branch (6108:5): [True: 0, False: 8.24k] ------------------ 6109| 0| case Mips::ORI_B: ------------------ | Branch (6109:5): [True: 0, False: 8.24k] ------------------ 6110| 0| case Mips::SHF_B: ------------------ | Branch (6110:5): [True: 0, False: 8.24k] ------------------ 6111| 0| case Mips::SHF_H: ------------------ | Branch (6111:5): [True: 0, False: 8.24k] ------------------ 6112| 0| case Mips::SHF_W: ------------------ | Branch (6112:5): [True: 0, False: 8.24k] ------------------ 6113| 0| case Mips::XORI_B: { ------------------ | Branch (6113:5): [True: 0, False: 8.24k] ------------------ 6114| | // op: u8 6115| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 6116| 0| Value |= (op & UINT64_C(255)) << 16; 6117| | // op: ws 6118| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6119| 0| Value |= (op & UINT64_C(31)) << 11; 6120| | // op: wd 6121| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6122| 0| Value |= (op & UINT64_C(31)) << 6; 6123| 0| break; 6124| 0| } 6125| 0| case Mips::BMNZI_B: ------------------ | Branch (6125:5): [True: 0, False: 8.24k] ------------------ 6126| 0| case Mips::BMZI_B: ------------------ | Branch (6126:5): [True: 0, False: 8.24k] ------------------ 6127| 0| case Mips::BSELI_B: { ------------------ | Branch (6127:5): [True: 0, False: 8.24k] ------------------ 6128| | // op: u8 6129| 0| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 6130| 0| Value |= (op & UINT64_C(255)) << 16; 6131| | // op: ws 6132| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 6133| 0| Value |= (op & UINT64_C(31)) << 11; 6134| | // op: wd 6135| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6136| 0| Value |= (op & UINT64_C(31)) << 6; 6137| 0| break; 6138| 0| } 6139| 0| case Mips::FCLASS_D: ------------------ | Branch (6139:5): [True: 0, False: 8.24k] ------------------ 6140| 0| case Mips::FCLASS_W: ------------------ | Branch (6140:5): [True: 0, False: 8.24k] ------------------ 6141| 0| case Mips::FEXUPL_D: ------------------ | Branch (6141:5): [True: 0, False: 8.24k] ------------------ 6142| 0| case Mips::FEXUPL_W: ------------------ | Branch (6142:5): [True: 0, False: 8.24k] ------------------ 6143| 0| case Mips::FEXUPR_D: ------------------ | Branch (6143:5): [True: 0, False: 8.24k] ------------------ 6144| 0| case Mips::FEXUPR_W: ------------------ | Branch (6144:5): [True: 0, False: 8.24k] ------------------ 6145| 0| case Mips::FFINT_S_D: ------------------ | Branch (6145:5): [True: 0, False: 8.24k] ------------------ 6146| 0| case Mips::FFINT_S_W: ------------------ | Branch (6146:5): [True: 0, False: 8.24k] ------------------ 6147| 0| case Mips::FFINT_U_D: ------------------ | Branch (6147:5): [True: 0, False: 8.24k] ------------------ 6148| 0| case Mips::FFINT_U_W: ------------------ | Branch (6148:5): [True: 0, False: 8.24k] ------------------ 6149| 0| case Mips::FFQL_D: ------------------ | Branch (6149:5): [True: 0, False: 8.24k] ------------------ 6150| 0| case Mips::FFQL_W: ------------------ | Branch (6150:5): [True: 0, False: 8.24k] ------------------ 6151| 0| case Mips::FFQR_D: ------------------ | Branch (6151:5): [True: 0, False: 8.24k] ------------------ 6152| 0| case Mips::FFQR_W: ------------------ | Branch (6152:5): [True: 0, False: 8.24k] ------------------ 6153| 0| case Mips::FLOG2_D: ------------------ | Branch (6153:5): [True: 0, False: 8.24k] ------------------ 6154| 0| case Mips::FLOG2_W: ------------------ | Branch (6154:5): [True: 0, False: 8.24k] ------------------ 6155| 0| case Mips::FRCP_D: ------------------ | Branch (6155:5): [True: 0, False: 8.24k] ------------------ 6156| 0| case Mips::FRCP_W: ------------------ | Branch (6156:5): [True: 0, False: 8.24k] ------------------ 6157| 0| case Mips::FRINT_D: ------------------ | Branch (6157:5): [True: 0, False: 8.24k] ------------------ 6158| 0| case Mips::FRINT_W: ------------------ | Branch (6158:5): [True: 0, False: 8.24k] ------------------ 6159| 0| case Mips::FRSQRT_D: ------------------ | Branch (6159:5): [True: 0, False: 8.24k] ------------------ 6160| 0| case Mips::FRSQRT_W: ------------------ | Branch (6160:5): [True: 0, False: 8.24k] ------------------ 6161| 0| case Mips::FSQRT_D: ------------------ | Branch (6161:5): [True: 0, False: 8.24k] ------------------ 6162| 0| case Mips::FSQRT_W: ------------------ | Branch (6162:5): [True: 0, False: 8.24k] ------------------ 6163| 0| case Mips::FTINT_S_D: ------------------ | Branch (6163:5): [True: 0, False: 8.24k] ------------------ 6164| 0| case Mips::FTINT_S_W: ------------------ | Branch (6164:5): [True: 0, False: 8.24k] ------------------ 6165| 0| case Mips::FTINT_U_D: ------------------ | Branch (6165:5): [True: 0, False: 8.24k] ------------------ 6166| 0| case Mips::FTINT_U_W: ------------------ | Branch (6166:5): [True: 0, False: 8.24k] ------------------ 6167| 0| case Mips::FTRUNC_S_D: ------------------ | Branch (6167:5): [True: 0, False: 8.24k] ------------------ 6168| 0| case Mips::FTRUNC_S_W: ------------------ | Branch (6168:5): [True: 0, False: 8.24k] ------------------ 6169| 0| case Mips::FTRUNC_U_D: ------------------ | Branch (6169:5): [True: 0, False: 8.24k] ------------------ 6170| 0| case Mips::FTRUNC_U_W: ------------------ | Branch (6170:5): [True: 0, False: 8.24k] ------------------ 6171| 0| case Mips::MOVE_V: ------------------ | Branch (6171:5): [True: 0, False: 8.24k] ------------------ 6172| 0| case Mips::NLOC_B: ------------------ | Branch (6172:5): [True: 0, False: 8.24k] ------------------ 6173| 0| case Mips::NLOC_D: ------------------ | Branch (6173:5): [True: 0, False: 8.24k] ------------------ 6174| 0| case Mips::NLOC_H: ------------------ | Branch (6174:5): [True: 0, False: 8.24k] ------------------ 6175| 0| case Mips::NLOC_W: ------------------ | Branch (6175:5): [True: 0, False: 8.24k] ------------------ 6176| 0| case Mips::NLZC_B: ------------------ | Branch (6176:5): [True: 0, False: 8.24k] ------------------ 6177| 0| case Mips::NLZC_D: ------------------ | Branch (6177:5): [True: 0, False: 8.24k] ------------------ 6178| 0| case Mips::NLZC_H: ------------------ | Branch (6178:5): [True: 0, False: 8.24k] ------------------ 6179| 0| case Mips::NLZC_W: ------------------ | Branch (6179:5): [True: 0, False: 8.24k] ------------------ 6180| 0| case Mips::PCNT_B: ------------------ | Branch (6180:5): [True: 0, False: 8.24k] ------------------ 6181| 0| case Mips::PCNT_D: ------------------ | Branch (6181:5): [True: 0, False: 8.24k] ------------------ 6182| 0| case Mips::PCNT_H: ------------------ | Branch (6182:5): [True: 0, False: 8.24k] ------------------ 6183| 0| case Mips::PCNT_W: { ------------------ | Branch (6183:5): [True: 0, False: 8.24k] ------------------ 6184| | // op: ws 6185| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6186| 0| Value |= (op & UINT64_C(31)) << 11; 6187| | // op: wd 6188| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6189| 0| Value |= (op & UINT64_C(31)) << 6; 6190| 0| break; 6191| 0| } 6192| 0| case Mips::BCLRI_H: ------------------ | Branch (6192:5): [True: 0, False: 8.24k] ------------------ 6193| 0| case Mips::BNEGI_H: ------------------ | Branch (6193:5): [True: 0, False: 8.24k] ------------------ 6194| 0| case Mips::BSETI_H: ------------------ | Branch (6194:5): [True: 0, False: 8.24k] ------------------ 6195| 0| case Mips::SAT_S_H: ------------------ | Branch (6195:5): [True: 0, False: 8.24k] ------------------ 6196| 0| case Mips::SAT_U_H: ------------------ | Branch (6196:5): [True: 0, False: 8.24k] ------------------ 6197| 0| case Mips::SLLI_H: ------------------ | Branch (6197:5): [True: 0, False: 8.24k] ------------------ 6198| 0| case Mips::SRAI_H: ------------------ | Branch (6198:5): [True: 0, False: 8.24k] ------------------ 6199| 0| case Mips::SRARI_H: ------------------ | Branch (6199:5): [True: 0, False: 8.24k] ------------------ 6200| 0| case Mips::SRLI_H: ------------------ | Branch (6200:5): [True: 0, False: 8.24k] ------------------ 6201| 0| case Mips::SRLRI_H: { ------------------ | Branch (6201:5): [True: 0, False: 8.24k] ------------------ 6202| | // op: ws 6203| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6204| 0| Value |= (op & UINT64_C(31)) << 11; 6205| | // op: wd 6206| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6207| 0| Value |= (op & UINT64_C(31)) << 6; 6208| | // op: m 6209| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 6210| 0| Value |= (op & UINT64_C(15)) << 16; 6211| 0| break; 6212| 0| } 6213| 0| case Mips::BCLRI_W: ------------------ | Branch (6213:5): [True: 0, False: 8.24k] ------------------ 6214| 0| case Mips::BNEGI_W: ------------------ | Branch (6214:5): [True: 0, False: 8.24k] ------------------ 6215| 0| case Mips::BSETI_W: ------------------ | Branch (6215:5): [True: 0, False: 8.24k] ------------------ 6216| 0| case Mips::SAT_S_W: ------------------ | Branch (6216:5): [True: 0, False: 8.24k] ------------------ 6217| 0| case Mips::SAT_U_W: ------------------ | Branch (6217:5): [True: 0, False: 8.24k] ------------------ 6218| 0| case Mips::SLLI_W: ------------------ | Branch (6218:5): [True: 0, False: 8.24k] ------------------ 6219| 0| case Mips::SRAI_W: ------------------ | Branch (6219:5): [True: 0, False: 8.24k] ------------------ 6220| 0| case Mips::SRARI_W: ------------------ | Branch (6220:5): [True: 0, False: 8.24k] ------------------ 6221| 0| case Mips::SRLI_W: ------------------ | Branch (6221:5): [True: 0, False: 8.24k] ------------------ 6222| 0| case Mips::SRLRI_W: { ------------------ | Branch (6222:5): [True: 0, False: 8.24k] ------------------ 6223| | // op: ws 6224| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6225| 0| Value |= (op & UINT64_C(31)) << 11; 6226| | // op: wd 6227| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6228| 0| Value |= (op & UINT64_C(31)) << 6; 6229| | // op: m 6230| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 6231| 0| Value |= (op & UINT64_C(31)) << 16; 6232| 0| break; 6233| 0| } 6234| 0| case Mips::BCLRI_D: ------------------ | Branch (6234:5): [True: 0, False: 8.24k] ------------------ 6235| 0| case Mips::BNEGI_D: ------------------ | Branch (6235:5): [True: 0, False: 8.24k] ------------------ 6236| 0| case Mips::BSETI_D: ------------------ | Branch (6236:5): [True: 0, False: 8.24k] ------------------ 6237| 0| case Mips::SAT_S_D: ------------------ | Branch (6237:5): [True: 0, False: 8.24k] ------------------ 6238| 0| case Mips::SAT_U_D: ------------------ | Branch (6238:5): [True: 0, False: 8.24k] ------------------ 6239| 0| case Mips::SLLI_D: ------------------ | Branch (6239:5): [True: 0, False: 8.24k] ------------------ 6240| 0| case Mips::SRAI_D: ------------------ | Branch (6240:5): [True: 0, False: 8.24k] ------------------ 6241| 0| case Mips::SRARI_D: ------------------ | Branch (6241:5): [True: 0, False: 8.24k] ------------------ 6242| 0| case Mips::SRLI_D: ------------------ | Branch (6242:5): [True: 0, False: 8.24k] ------------------ 6243| 0| case Mips::SRLRI_D: { ------------------ | Branch (6243:5): [True: 0, False: 8.24k] ------------------ 6244| | // op: ws 6245| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6246| 0| Value |= (op & UINT64_C(31)) << 11; 6247| | // op: wd 6248| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6249| 0| Value |= (op & UINT64_C(31)) << 6; 6250| | // op: m 6251| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 6252| 0| Value |= (op & UINT64_C(63)) << 16; 6253| 0| break; 6254| 0| } 6255| 0| case Mips::BCLRI_B: ------------------ | Branch (6255:5): [True: 0, False: 8.24k] ------------------ 6256| 0| case Mips::BNEGI_B: ------------------ | Branch (6256:5): [True: 0, False: 8.24k] ------------------ 6257| 0| case Mips::BSETI_B: ------------------ | Branch (6257:5): [True: 0, False: 8.24k] ------------------ 6258| 0| case Mips::SAT_S_B: ------------------ | Branch (6258:5): [True: 0, False: 8.24k] ------------------ 6259| 0| case Mips::SAT_U_B: ------------------ | Branch (6259:5): [True: 0, False: 8.24k] ------------------ 6260| 0| case Mips::SLLI_B: ------------------ | Branch (6260:5): [True: 0, False: 8.24k] ------------------ 6261| 0| case Mips::SRAI_B: ------------------ | Branch (6261:5): [True: 0, False: 8.24k] ------------------ 6262| 0| case Mips::SRARI_B: ------------------ | Branch (6262:5): [True: 0, False: 8.24k] ------------------ 6263| 0| case Mips::SRLI_B: ------------------ | Branch (6263:5): [True: 0, False: 8.24k] ------------------ 6264| 0| case Mips::SRLRI_B: { ------------------ | Branch (6264:5): [True: 0, False: 8.24k] ------------------ 6265| | // op: ws 6266| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6267| 0| Value |= (op & UINT64_C(31)) << 11; 6268| | // op: wd 6269| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6270| 0| Value |= (op & UINT64_C(31)) << 6; 6271| | // op: m 6272| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 6273| 0| Value |= (op & UINT64_C(7)) << 16; 6274| 0| break; 6275| 0| } 6276| 0| case Mips::BINSLI_H: ------------------ | Branch (6276:5): [True: 0, False: 8.24k] ------------------ 6277| 0| case Mips::BINSRI_H: { ------------------ | Branch (6277:5): [True: 0, False: 8.24k] ------------------ 6278| | // op: ws 6279| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 6280| 0| Value |= (op & UINT64_C(31)) << 11; 6281| | // op: wd 6282| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6283| 0| Value |= (op & UINT64_C(31)) << 6; 6284| | // op: m 6285| 0| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 6286| 0| Value |= (op & UINT64_C(15)) << 16; 6287| 0| break; 6288| 0| } 6289| 0| case Mips::BINSLI_W: ------------------ | Branch (6289:5): [True: 0, False: 8.24k] ------------------ 6290| 0| case Mips::BINSRI_W: { ------------------ | Branch (6290:5): [True: 0, False: 8.24k] ------------------ 6291| | // op: ws 6292| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 6293| 0| Value |= (op & UINT64_C(31)) << 11; 6294| | // op: wd 6295| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6296| 0| Value |= (op & UINT64_C(31)) << 6; 6297| | // op: m 6298| 0| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 6299| 0| Value |= (op & UINT64_C(31)) << 16; 6300| 0| break; 6301| 0| } 6302| 0| case Mips::BINSLI_D: ------------------ | Branch (6302:5): [True: 0, False: 8.24k] ------------------ 6303| 0| case Mips::BINSRI_D: { ------------------ | Branch (6303:5): [True: 0, False: 8.24k] ------------------ 6304| | // op: ws 6305| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 6306| 0| Value |= (op & UINT64_C(31)) << 11; 6307| | // op: wd 6308| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6309| 0| Value |= (op & UINT64_C(31)) << 6; 6310| | // op: m 6311| 0| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 6312| 0| Value |= (op & UINT64_C(63)) << 16; 6313| 0| break; 6314| 0| } 6315| 0| case Mips::BINSLI_B: ------------------ | Branch (6315:5): [True: 0, False: 8.24k] ------------------ 6316| 0| case Mips::BINSRI_B: { ------------------ | Branch (6316:5): [True: 0, False: 8.24k] ------------------ 6317| | // op: ws 6318| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 6319| 0| Value |= (op & UINT64_C(31)) << 11; 6320| | // op: wd 6321| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6322| 0| Value |= (op & UINT64_C(31)) << 6; 6323| | // op: m 6324| 0| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 6325| 0| Value |= (op & UINT64_C(7)) << 16; 6326| 0| break; 6327| 0| } 6328| 0| case Mips::ADDS_A_B: ------------------ | Branch (6328:5): [True: 0, False: 8.24k] ------------------ 6329| 0| case Mips::ADDS_A_D: ------------------ | Branch (6329:5): [True: 0, False: 8.24k] ------------------ 6330| 0| case Mips::ADDS_A_H: ------------------ | Branch (6330:5): [True: 0, False: 8.24k] ------------------ 6331| 0| case Mips::ADDS_A_W: ------------------ | Branch (6331:5): [True: 0, False: 8.24k] ------------------ 6332| 0| case Mips::ADDS_S_B: ------------------ | Branch (6332:5): [True: 0, False: 8.24k] ------------------ 6333| 0| case Mips::ADDS_S_D: ------------------ | Branch (6333:5): [True: 0, False: 8.24k] ------------------ 6334| 0| case Mips::ADDS_S_H: ------------------ | Branch (6334:5): [True: 0, False: 8.24k] ------------------ 6335| 0| case Mips::ADDS_S_W: ------------------ | Branch (6335:5): [True: 0, False: 8.24k] ------------------ 6336| 0| case Mips::ADDS_U_B: ------------------ | Branch (6336:5): [True: 0, False: 8.24k] ------------------ 6337| 0| case Mips::ADDS_U_D: ------------------ | Branch (6337:5): [True: 0, False: 8.24k] ------------------ 6338| 0| case Mips::ADDS_U_H: ------------------ | Branch (6338:5): [True: 0, False: 8.24k] ------------------ 6339| 0| case Mips::ADDS_U_W: ------------------ | Branch (6339:5): [True: 0, False: 8.24k] ------------------ 6340| 0| case Mips::ADDV_B: ------------------ | Branch (6340:5): [True: 0, False: 8.24k] ------------------ 6341| 0| case Mips::ADDV_D: ------------------ | Branch (6341:5): [True: 0, False: 8.24k] ------------------ 6342| 0| case Mips::ADDV_H: ------------------ | Branch (6342:5): [True: 0, False: 8.24k] ------------------ 6343| 0| case Mips::ADDV_W: ------------------ | Branch (6343:5): [True: 0, False: 8.24k] ------------------ 6344| 0| case Mips::ADD_A_B: ------------------ | Branch (6344:5): [True: 0, False: 8.24k] ------------------ 6345| 0| case Mips::ADD_A_D: ------------------ | Branch (6345:5): [True: 0, False: 8.24k] ------------------ 6346| 0| case Mips::ADD_A_H: ------------------ | Branch (6346:5): [True: 0, False: 8.24k] ------------------ 6347| 0| case Mips::ADD_A_W: ------------------ | Branch (6347:5): [True: 0, False: 8.24k] ------------------ 6348| 0| case Mips::AND_V: ------------------ | Branch (6348:5): [True: 0, False: 8.24k] ------------------ 6349| 0| case Mips::ASUB_S_B: ------------------ | Branch (6349:5): [True: 0, False: 8.24k] ------------------ 6350| 0| case Mips::ASUB_S_D: ------------------ | Branch (6350:5): [True: 0, False: 8.24k] ------------------ 6351| 0| case Mips::ASUB_S_H: ------------------ | Branch (6351:5): [True: 0, False: 8.24k] ------------------ 6352| 0| case Mips::ASUB_S_W: ------------------ | Branch (6352:5): [True: 0, False: 8.24k] ------------------ 6353| 0| case Mips::ASUB_U_B: ------------------ | Branch (6353:5): [True: 0, False: 8.24k] ------------------ 6354| 0| case Mips::ASUB_U_D: ------------------ | Branch (6354:5): [True: 0, False: 8.24k] ------------------ 6355| 0| case Mips::ASUB_U_H: ------------------ | Branch (6355:5): [True: 0, False: 8.24k] ------------------ 6356| 0| case Mips::ASUB_U_W: ------------------ | Branch (6356:5): [True: 0, False: 8.24k] ------------------ 6357| 0| case Mips::AVER_S_B: ------------------ | Branch (6357:5): [True: 0, False: 8.24k] ------------------ 6358| 0| case Mips::AVER_S_D: ------------------ | Branch (6358:5): [True: 0, False: 8.24k] ------------------ 6359| 0| case Mips::AVER_S_H: ------------------ | Branch (6359:5): [True: 0, False: 8.24k] ------------------ 6360| 0| case Mips::AVER_S_W: ------------------ | Branch (6360:5): [True: 0, False: 8.24k] ------------------ 6361| 0| case Mips::AVER_U_B: ------------------ | Branch (6361:5): [True: 0, False: 8.24k] ------------------ 6362| 0| case Mips::AVER_U_D: ------------------ | Branch (6362:5): [True: 0, False: 8.24k] ------------------ 6363| 0| case Mips::AVER_U_H: ------------------ | Branch (6363:5): [True: 0, False: 8.24k] ------------------ 6364| 0| case Mips::AVER_U_W: ------------------ | Branch (6364:5): [True: 0, False: 8.24k] ------------------ 6365| 0| case Mips::AVE_S_B: ------------------ | Branch (6365:5): [True: 0, False: 8.24k] ------------------ 6366| 0| case Mips::AVE_S_D: ------------------ | Branch (6366:5): [True: 0, False: 8.24k] ------------------ 6367| 0| case Mips::AVE_S_H: ------------------ | Branch (6367:5): [True: 0, False: 8.24k] ------------------ 6368| 0| case Mips::AVE_S_W: ------------------ | Branch (6368:5): [True: 0, False: 8.24k] ------------------ 6369| 0| case Mips::AVE_U_B: ------------------ | Branch (6369:5): [True: 0, False: 8.24k] ------------------ 6370| 0| case Mips::AVE_U_D: ------------------ | Branch (6370:5): [True: 0, False: 8.24k] ------------------ 6371| 0| case Mips::AVE_U_H: ------------------ | Branch (6371:5): [True: 0, False: 8.24k] ------------------ 6372| 0| case Mips::AVE_U_W: ------------------ | Branch (6372:5): [True: 0, False: 8.24k] ------------------ 6373| 0| case Mips::BCLR_B: ------------------ | Branch (6373:5): [True: 0, False: 8.24k] ------------------ 6374| 0| case Mips::BCLR_D: ------------------ | Branch (6374:5): [True: 0, False: 8.24k] ------------------ 6375| 0| case Mips::BCLR_H: ------------------ | Branch (6375:5): [True: 0, False: 8.24k] ------------------ 6376| 0| case Mips::BCLR_W: ------------------ | Branch (6376:5): [True: 0, False: 8.24k] ------------------ 6377| 0| case Mips::BNEG_B: ------------------ | Branch (6377:5): [True: 0, False: 8.24k] ------------------ 6378| 0| case Mips::BNEG_D: ------------------ | Branch (6378:5): [True: 0, False: 8.24k] ------------------ 6379| 0| case Mips::BNEG_H: ------------------ | Branch (6379:5): [True: 0, False: 8.24k] ------------------ 6380| 0| case Mips::BNEG_W: ------------------ | Branch (6380:5): [True: 0, False: 8.24k] ------------------ 6381| 0| case Mips::BSET_B: ------------------ | Branch (6381:5): [True: 0, False: 8.24k] ------------------ 6382| 0| case Mips::BSET_D: ------------------ | Branch (6382:5): [True: 0, False: 8.24k] ------------------ 6383| 0| case Mips::BSET_H: ------------------ | Branch (6383:5): [True: 0, False: 8.24k] ------------------ 6384| 0| case Mips::BSET_W: ------------------ | Branch (6384:5): [True: 0, False: 8.24k] ------------------ 6385| 0| case Mips::CEQ_B: ------------------ | Branch (6385:5): [True: 0, False: 8.24k] ------------------ 6386| 0| case Mips::CEQ_D: ------------------ | Branch (6386:5): [True: 0, False: 8.24k] ------------------ 6387| 0| case Mips::CEQ_H: ------------------ | Branch (6387:5): [True: 0, False: 8.24k] ------------------ 6388| 0| case Mips::CEQ_W: ------------------ | Branch (6388:5): [True: 0, False: 8.24k] ------------------ 6389| 0| case Mips::CLE_S_B: ------------------ | Branch (6389:5): [True: 0, False: 8.24k] ------------------ 6390| 0| case Mips::CLE_S_D: ------------------ | Branch (6390:5): [True: 0, False: 8.24k] ------------------ 6391| 0| case Mips::CLE_S_H: ------------------ | Branch (6391:5): [True: 0, False: 8.24k] ------------------ 6392| 0| case Mips::CLE_S_W: ------------------ | Branch (6392:5): [True: 0, False: 8.24k] ------------------ 6393| 0| case Mips::CLE_U_B: ------------------ | Branch (6393:5): [True: 0, False: 8.24k] ------------------ 6394| 0| case Mips::CLE_U_D: ------------------ | Branch (6394:5): [True: 0, False: 8.24k] ------------------ 6395| 0| case Mips::CLE_U_H: ------------------ | Branch (6395:5): [True: 0, False: 8.24k] ------------------ 6396| 0| case Mips::CLE_U_W: ------------------ | Branch (6396:5): [True: 0, False: 8.24k] ------------------ 6397| 0| case Mips::CLT_S_B: ------------------ | Branch (6397:5): [True: 0, False: 8.24k] ------------------ 6398| 0| case Mips::CLT_S_D: ------------------ | Branch (6398:5): [True: 0, False: 8.24k] ------------------ 6399| 0| case Mips::CLT_S_H: ------------------ | Branch (6399:5): [True: 0, False: 8.24k] ------------------ 6400| 0| case Mips::CLT_S_W: ------------------ | Branch (6400:5): [True: 0, False: 8.24k] ------------------ 6401| 0| case Mips::CLT_U_B: ------------------ | Branch (6401:5): [True: 0, False: 8.24k] ------------------ 6402| 0| case Mips::CLT_U_D: ------------------ | Branch (6402:5): [True: 0, False: 8.24k] ------------------ 6403| 0| case Mips::CLT_U_H: ------------------ | Branch (6403:5): [True: 0, False: 8.24k] ------------------ 6404| 0| case Mips::CLT_U_W: ------------------ | Branch (6404:5): [True: 0, False: 8.24k] ------------------ 6405| 0| case Mips::DIV_S_B: ------------------ | Branch (6405:5): [True: 0, False: 8.24k] ------------------ 6406| 0| case Mips::DIV_S_D: ------------------ | Branch (6406:5): [True: 0, False: 8.24k] ------------------ 6407| 0| case Mips::DIV_S_H: ------------------ | Branch (6407:5): [True: 0, False: 8.24k] ------------------ 6408| 0| case Mips::DIV_S_W: ------------------ | Branch (6408:5): [True: 0, False: 8.24k] ------------------ 6409| 0| case Mips::DIV_U_B: ------------------ | Branch (6409:5): [True: 0, False: 8.24k] ------------------ 6410| 0| case Mips::DIV_U_D: ------------------ | Branch (6410:5): [True: 0, False: 8.24k] ------------------ 6411| 0| case Mips::DIV_U_H: ------------------ | Branch (6411:5): [True: 0, False: 8.24k] ------------------ 6412| 0| case Mips::DIV_U_W: ------------------ | Branch (6412:5): [True: 0, False: 8.24k] ------------------ 6413| 0| case Mips::DOTP_S_D: ------------------ | Branch (6413:5): [True: 0, False: 8.24k] ------------------ 6414| 0| case Mips::DOTP_S_H: ------------------ | Branch (6414:5): [True: 0, False: 8.24k] ------------------ 6415| 0| case Mips::DOTP_S_W: ------------------ | Branch (6415:5): [True: 0, False: 8.24k] ------------------ 6416| 0| case Mips::DOTP_U_D: ------------------ | Branch (6416:5): [True: 0, False: 8.24k] ------------------ 6417| 0| case Mips::DOTP_U_H: ------------------ | Branch (6417:5): [True: 0, False: 8.24k] ------------------ 6418| 0| case Mips::DOTP_U_W: ------------------ | Branch (6418:5): [True: 0, False: 8.24k] ------------------ 6419| 0| case Mips::FADD_D: ------------------ | Branch (6419:5): [True: 0, False: 8.24k] ------------------ 6420| 0| case Mips::FADD_W: ------------------ | Branch (6420:5): [True: 0, False: 8.24k] ------------------ 6421| 0| case Mips::FCAF_D: ------------------ | Branch (6421:5): [True: 0, False: 8.24k] ------------------ 6422| 0| case Mips::FCAF_W: ------------------ | Branch (6422:5): [True: 0, False: 8.24k] ------------------ 6423| 0| case Mips::FCEQ_D: ------------------ | Branch (6423:5): [True: 0, False: 8.24k] ------------------ 6424| 0| case Mips::FCEQ_W: ------------------ | Branch (6424:5): [True: 0, False: 8.24k] ------------------ 6425| 0| case Mips::FCLE_D: ------------------ | Branch (6425:5): [True: 0, False: 8.24k] ------------------ 6426| 0| case Mips::FCLE_W: ------------------ | Branch (6426:5): [True: 0, False: 8.24k] ------------------ 6427| 0| case Mips::FCLT_D: ------------------ | Branch (6427:5): [True: 0, False: 8.24k] ------------------ 6428| 0| case Mips::FCLT_W: ------------------ | Branch (6428:5): [True: 0, False: 8.24k] ------------------ 6429| 0| case Mips::FCNE_D: ------------------ | Branch (6429:5): [True: 0, False: 8.24k] ------------------ 6430| 0| case Mips::FCNE_W: ------------------ | Branch (6430:5): [True: 0, False: 8.24k] ------------------ 6431| 0| case Mips::FCOR_D: ------------------ | Branch (6431:5): [True: 0, False: 8.24k] ------------------ 6432| 0| case Mips::FCOR_W: ------------------ | Branch (6432:5): [True: 0, False: 8.24k] ------------------ 6433| 0| case Mips::FCUEQ_D: ------------------ | Branch (6433:5): [True: 0, False: 8.24k] ------------------ 6434| 0| case Mips::FCUEQ_W: ------------------ | Branch (6434:5): [True: 0, False: 8.24k] ------------------ 6435| 0| case Mips::FCULE_D: ------------------ | Branch (6435:5): [True: 0, False: 8.24k] ------------------ 6436| 0| case Mips::FCULE_W: ------------------ | Branch (6436:5): [True: 0, False: 8.24k] ------------------ 6437| 0| case Mips::FCULT_D: ------------------ | Branch (6437:5): [True: 0, False: 8.24k] ------------------ 6438| 0| case Mips::FCULT_W: ------------------ | Branch (6438:5): [True: 0, False: 8.24k] ------------------ 6439| 0| case Mips::FCUNE_D: ------------------ | Branch (6439:5): [True: 0, False: 8.24k] ------------------ 6440| 0| case Mips::FCUNE_W: ------------------ | Branch (6440:5): [True: 0, False: 8.24k] ------------------ 6441| 0| case Mips::FCUN_D: ------------------ | Branch (6441:5): [True: 0, False: 8.24k] ------------------ 6442| 0| case Mips::FCUN_W: ------------------ | Branch (6442:5): [True: 0, False: 8.24k] ------------------ 6443| 0| case Mips::FDIV_D: ------------------ | Branch (6443:5): [True: 0, False: 8.24k] ------------------ 6444| 0| case Mips::FDIV_W: ------------------ | Branch (6444:5): [True: 0, False: 8.24k] ------------------ 6445| 0| case Mips::FEXDO_H: ------------------ | Branch (6445:5): [True: 0, False: 8.24k] ------------------ 6446| 0| case Mips::FEXDO_W: ------------------ | Branch (6446:5): [True: 0, False: 8.24k] ------------------ 6447| 0| case Mips::FEXP2_D: ------------------ | Branch (6447:5): [True: 0, False: 8.24k] ------------------ 6448| 0| case Mips::FEXP2_W: ------------------ | Branch (6448:5): [True: 0, False: 8.24k] ------------------ 6449| 0| case Mips::FMAX_A_D: ------------------ | Branch (6449:5): [True: 0, False: 8.24k] ------------------ 6450| 0| case Mips::FMAX_A_W: ------------------ | Branch (6450:5): [True: 0, False: 8.24k] ------------------ 6451| 0| case Mips::FMAX_D: ------------------ | Branch (6451:5): [True: 0, False: 8.24k] ------------------ 6452| 0| case Mips::FMAX_W: ------------------ | Branch (6452:5): [True: 0, False: 8.24k] ------------------ 6453| 0| case Mips::FMIN_A_D: ------------------ | Branch (6453:5): [True: 0, False: 8.24k] ------------------ 6454| 0| case Mips::FMIN_A_W: ------------------ | Branch (6454:5): [True: 0, False: 8.24k] ------------------ 6455| 0| case Mips::FMIN_D: ------------------ | Branch (6455:5): [True: 0, False: 8.24k] ------------------ 6456| 0| case Mips::FMIN_W: ------------------ | Branch (6456:5): [True: 0, False: 8.24k] ------------------ 6457| 0| case Mips::FMUL_D: ------------------ | Branch (6457:5): [True: 0, False: 8.24k] ------------------ 6458| 0| case Mips::FMUL_W: ------------------ | Branch (6458:5): [True: 0, False: 8.24k] ------------------ 6459| 0| case Mips::FSAF_D: ------------------ | Branch (6459:5): [True: 0, False: 8.24k] ------------------ 6460| 0| case Mips::FSAF_W: ------------------ | Branch (6460:5): [True: 0, False: 8.24k] ------------------ 6461| 0| case Mips::FSEQ_D: ------------------ | Branch (6461:5): [True: 0, False: 8.24k] ------------------ 6462| 0| case Mips::FSEQ_W: ------------------ | Branch (6462:5): [True: 0, False: 8.24k] ------------------ 6463| 0| case Mips::FSLE_D: ------------------ | Branch (6463:5): [True: 0, False: 8.24k] ------------------ 6464| 0| case Mips::FSLE_W: ------------------ | Branch (6464:5): [True: 0, False: 8.24k] ------------------ 6465| 0| case Mips::FSLT_D: ------------------ | Branch (6465:5): [True: 0, False: 8.24k] ------------------ 6466| 0| case Mips::FSLT_W: ------------------ | Branch (6466:5): [True: 0, False: 8.24k] ------------------ 6467| 0| case Mips::FSNE_D: ------------------ | Branch (6467:5): [True: 0, False: 8.24k] ------------------ 6468| 0| case Mips::FSNE_W: ------------------ | Branch (6468:5): [True: 0, False: 8.24k] ------------------ 6469| 0| case Mips::FSOR_D: ------------------ | Branch (6469:5): [True: 0, False: 8.24k] ------------------ 6470| 0| case Mips::FSOR_W: ------------------ | Branch (6470:5): [True: 0, False: 8.24k] ------------------ 6471| 0| case Mips::FSUB_D: ------------------ | Branch (6471:5): [True: 0, False: 8.24k] ------------------ 6472| 0| case Mips::FSUB_W: ------------------ | Branch (6472:5): [True: 0, False: 8.24k] ------------------ 6473| 0| case Mips::FSUEQ_D: ------------------ | Branch (6473:5): [True: 0, False: 8.24k] ------------------ 6474| 0| case Mips::FSUEQ_W: ------------------ | Branch (6474:5): [True: 0, False: 8.24k] ------------------ 6475| 0| case Mips::FSULE_D: ------------------ | Branch (6475:5): [True: 0, False: 8.24k] ------------------ 6476| 0| case Mips::FSULE_W: ------------------ | Branch (6476:5): [True: 0, False: 8.24k] ------------------ 6477| 0| case Mips::FSULT_D: ------------------ | Branch (6477:5): [True: 0, False: 8.24k] ------------------ 6478| 0| case Mips::FSULT_W: ------------------ | Branch (6478:5): [True: 0, False: 8.24k] ------------------ 6479| 0| case Mips::FSUNE_D: ------------------ | Branch (6479:5): [True: 0, False: 8.24k] ------------------ 6480| 0| case Mips::FSUNE_W: ------------------ | Branch (6480:5): [True: 0, False: 8.24k] ------------------ 6481| 0| case Mips::FSUN_D: ------------------ | Branch (6481:5): [True: 0, False: 8.24k] ------------------ 6482| 0| case Mips::FSUN_W: ------------------ | Branch (6482:5): [True: 0, False: 8.24k] ------------------ 6483| 0| case Mips::FTQ_H: ------------------ | Branch (6483:5): [True: 0, False: 8.24k] ------------------ 6484| 0| case Mips::FTQ_W: ------------------ | Branch (6484:5): [True: 0, False: 8.24k] ------------------ 6485| 0| case Mips::HADD_S_D: ------------------ | Branch (6485:5): [True: 0, False: 8.24k] ------------------ 6486| 0| case Mips::HADD_S_H: ------------------ | Branch (6486:5): [True: 0, False: 8.24k] ------------------ 6487| 0| case Mips::HADD_S_W: ------------------ | Branch (6487:5): [True: 0, False: 8.24k] ------------------ 6488| 0| case Mips::HADD_U_D: ------------------ | Branch (6488:5): [True: 0, False: 8.24k] ------------------ 6489| 0| case Mips::HADD_U_H: ------------------ | Branch (6489:5): [True: 0, False: 8.24k] ------------------ 6490| 0| case Mips::HADD_U_W: ------------------ | Branch (6490:5): [True: 0, False: 8.24k] ------------------ 6491| 0| case Mips::HSUB_S_D: ------------------ | Branch (6491:5): [True: 0, False: 8.24k] ------------------ 6492| 0| case Mips::HSUB_S_H: ------------------ | Branch (6492:5): [True: 0, False: 8.24k] ------------------ 6493| 0| case Mips::HSUB_S_W: ------------------ | Branch (6493:5): [True: 0, False: 8.24k] ------------------ 6494| 0| case Mips::HSUB_U_D: ------------------ | Branch (6494:5): [True: 0, False: 8.24k] ------------------ 6495| 0| case Mips::HSUB_U_H: ------------------ | Branch (6495:5): [True: 0, False: 8.24k] ------------------ 6496| 0| case Mips::HSUB_U_W: ------------------ | Branch (6496:5): [True: 0, False: 8.24k] ------------------ 6497| 0| case Mips::ILVEV_B: ------------------ | Branch (6497:5): [True: 0, False: 8.24k] ------------------ 6498| 0| case Mips::ILVEV_D: ------------------ | Branch (6498:5): [True: 0, False: 8.24k] ------------------ 6499| 0| case Mips::ILVEV_H: ------------------ | Branch (6499:5): [True: 0, False: 8.24k] ------------------ 6500| 0| case Mips::ILVEV_W: ------------------ | Branch (6500:5): [True: 0, False: 8.24k] ------------------ 6501| 0| case Mips::ILVL_B: ------------------ | Branch (6501:5): [True: 0, False: 8.24k] ------------------ 6502| 0| case Mips::ILVL_D: ------------------ | Branch (6502:5): [True: 0, False: 8.24k] ------------------ 6503| 0| case Mips::ILVL_H: ------------------ | Branch (6503:5): [True: 0, False: 8.24k] ------------------ 6504| 0| case Mips::ILVL_W: ------------------ | Branch (6504:5): [True: 0, False: 8.24k] ------------------ 6505| 0| case Mips::ILVOD_B: ------------------ | Branch (6505:5): [True: 0, False: 8.24k] ------------------ 6506| 0| case Mips::ILVOD_D: ------------------ | Branch (6506:5): [True: 0, False: 8.24k] ------------------ 6507| 0| case Mips::ILVOD_H: ------------------ | Branch (6507:5): [True: 0, False: 8.24k] ------------------ 6508| 0| case Mips::ILVOD_W: ------------------ | Branch (6508:5): [True: 0, False: 8.24k] ------------------ 6509| 0| case Mips::ILVR_B: ------------------ | Branch (6509:5): [True: 0, False: 8.24k] ------------------ 6510| 0| case Mips::ILVR_D: ------------------ | Branch (6510:5): [True: 0, False: 8.24k] ------------------ 6511| 0| case Mips::ILVR_H: ------------------ | Branch (6511:5): [True: 0, False: 8.24k] ------------------ 6512| 0| case Mips::ILVR_W: ------------------ | Branch (6512:5): [True: 0, False: 8.24k] ------------------ 6513| 0| case Mips::MAX_A_B: ------------------ | Branch (6513:5): [True: 0, False: 8.24k] ------------------ 6514| 0| case Mips::MAX_A_D: ------------------ | Branch (6514:5): [True: 0, False: 8.24k] ------------------ 6515| 0| case Mips::MAX_A_H: ------------------ | Branch (6515:5): [True: 0, False: 8.24k] ------------------ 6516| 0| case Mips::MAX_A_W: ------------------ | Branch (6516:5): [True: 0, False: 8.24k] ------------------ 6517| 0| case Mips::MAX_S_B: ------------------ | Branch (6517:5): [True: 0, False: 8.24k] ------------------ 6518| 0| case Mips::MAX_S_D: ------------------ | Branch (6518:5): [True: 0, False: 8.24k] ------------------ 6519| 0| case Mips::MAX_S_H: ------------------ | Branch (6519:5): [True: 0, False: 8.24k] ------------------ 6520| 0| case Mips::MAX_S_W: ------------------ | Branch (6520:5): [True: 0, False: 8.24k] ------------------ 6521| 0| case Mips::MAX_U_B: ------------------ | Branch (6521:5): [True: 0, False: 8.24k] ------------------ 6522| 0| case Mips::MAX_U_D: ------------------ | Branch (6522:5): [True: 0, False: 8.24k] ------------------ 6523| 0| case Mips::MAX_U_H: ------------------ | Branch (6523:5): [True: 0, False: 8.24k] ------------------ 6524| 0| case Mips::MAX_U_W: ------------------ | Branch (6524:5): [True: 0, False: 8.24k] ------------------ 6525| 0| case Mips::MIN_A_B: ------------------ | Branch (6525:5): [True: 0, False: 8.24k] ------------------ 6526| 0| case Mips::MIN_A_D: ------------------ | Branch (6526:5): [True: 0, False: 8.24k] ------------------ 6527| 0| case Mips::MIN_A_H: ------------------ | Branch (6527:5): [True: 0, False: 8.24k] ------------------ 6528| 0| case Mips::MIN_A_W: ------------------ | Branch (6528:5): [True: 0, False: 8.24k] ------------------ 6529| 0| case Mips::MIN_S_B: ------------------ | Branch (6529:5): [True: 0, False: 8.24k] ------------------ 6530| 0| case Mips::MIN_S_D: ------------------ | Branch (6530:5): [True: 0, False: 8.24k] ------------------ 6531| 0| case Mips::MIN_S_H: ------------------ | Branch (6531:5): [True: 0, False: 8.24k] ------------------ 6532| 0| case Mips::MIN_S_W: ------------------ | Branch (6532:5): [True: 0, False: 8.24k] ------------------ 6533| 0| case Mips::MIN_U_B: ------------------ | Branch (6533:5): [True: 0, False: 8.24k] ------------------ 6534| 0| case Mips::MIN_U_D: ------------------ | Branch (6534:5): [True: 0, False: 8.24k] ------------------ 6535| 0| case Mips::MIN_U_H: ------------------ | Branch (6535:5): [True: 0, False: 8.24k] ------------------ 6536| 0| case Mips::MIN_U_W: ------------------ | Branch (6536:5): [True: 0, False: 8.24k] ------------------ 6537| 0| case Mips::MOD_S_B: ------------------ | Branch (6537:5): [True: 0, False: 8.24k] ------------------ 6538| 0| case Mips::MOD_S_D: ------------------ | Branch (6538:5): [True: 0, False: 8.24k] ------------------ 6539| 0| case Mips::MOD_S_H: ------------------ | Branch (6539:5): [True: 0, False: 8.24k] ------------------ 6540| 0| case Mips::MOD_S_W: ------------------ | Branch (6540:5): [True: 0, False: 8.24k] ------------------ 6541| 0| case Mips::MOD_U_B: ------------------ | Branch (6541:5): [True: 0, False: 8.24k] ------------------ 6542| 0| case Mips::MOD_U_D: ------------------ | Branch (6542:5): [True: 0, False: 8.24k] ------------------ 6543| 0| case Mips::MOD_U_H: ------------------ | Branch (6543:5): [True: 0, False: 8.24k] ------------------ 6544| 0| case Mips::MOD_U_W: ------------------ | Branch (6544:5): [True: 0, False: 8.24k] ------------------ 6545| 0| case Mips::MULR_Q_H: ------------------ | Branch (6545:5): [True: 0, False: 8.24k] ------------------ 6546| 0| case Mips::MULR_Q_W: ------------------ | Branch (6546:5): [True: 0, False: 8.24k] ------------------ 6547| 0| case Mips::MULV_B: ------------------ | Branch (6547:5): [True: 0, False: 8.24k] ------------------ 6548| 0| case Mips::MULV_D: ------------------ | Branch (6548:5): [True: 0, False: 8.24k] ------------------ 6549| 0| case Mips::MULV_H: ------------------ | Branch (6549:5): [True: 0, False: 8.24k] ------------------ 6550| 0| case Mips::MULV_W: ------------------ | Branch (6550:5): [True: 0, False: 8.24k] ------------------ 6551| 0| case Mips::MUL_Q_H: ------------------ | Branch (6551:5): [True: 0, False: 8.24k] ------------------ 6552| 0| case Mips::MUL_Q_W: ------------------ | Branch (6552:5): [True: 0, False: 8.24k] ------------------ 6553| 0| case Mips::NOR_V: ------------------ | Branch (6553:5): [True: 0, False: 8.24k] ------------------ 6554| 0| case Mips::OR_V: ------------------ | Branch (6554:5): [True: 0, False: 8.24k] ------------------ 6555| 0| case Mips::PCKEV_B: ------------------ | Branch (6555:5): [True: 0, False: 8.24k] ------------------ 6556| 0| case Mips::PCKEV_D: ------------------ | Branch (6556:5): [True: 0, False: 8.24k] ------------------ 6557| 0| case Mips::PCKEV_H: ------------------ | Branch (6557:5): [True: 0, False: 8.24k] ------------------ 6558| 0| case Mips::PCKEV_W: ------------------ | Branch (6558:5): [True: 0, False: 8.24k] ------------------ 6559| 0| case Mips::PCKOD_B: ------------------ | Branch (6559:5): [True: 0, False: 8.24k] ------------------ 6560| 0| case Mips::PCKOD_D: ------------------ | Branch (6560:5): [True: 0, False: 8.24k] ------------------ 6561| 0| case Mips::PCKOD_H: ------------------ | Branch (6561:5): [True: 0, False: 8.24k] ------------------ 6562| 0| case Mips::PCKOD_W: ------------------ | Branch (6562:5): [True: 0, False: 8.24k] ------------------ 6563| 0| case Mips::SLL_B: ------------------ | Branch (6563:5): [True: 0, False: 8.24k] ------------------ 6564| 0| case Mips::SLL_D: ------------------ | Branch (6564:5): [True: 0, False: 8.24k] ------------------ 6565| 0| case Mips::SLL_H: ------------------ | Branch (6565:5): [True: 0, False: 8.24k] ------------------ 6566| 0| case Mips::SLL_W: ------------------ | Branch (6566:5): [True: 0, False: 8.24k] ------------------ 6567| 0| case Mips::SRAR_B: ------------------ | Branch (6567:5): [True: 0, False: 8.24k] ------------------ 6568| 0| case Mips::SRAR_D: ------------------ | Branch (6568:5): [True: 0, False: 8.24k] ------------------ 6569| 0| case Mips::SRAR_H: ------------------ | Branch (6569:5): [True: 0, False: 8.24k] ------------------ 6570| 0| case Mips::SRAR_W: ------------------ | Branch (6570:5): [True: 0, False: 8.24k] ------------------ 6571| 0| case Mips::SRA_B: ------------------ | Branch (6571:5): [True: 0, False: 8.24k] ------------------ 6572| 0| case Mips::SRA_D: ------------------ | Branch (6572:5): [True: 0, False: 8.24k] ------------------ 6573| 0| case Mips::SRA_H: ------------------ | Branch (6573:5): [True: 0, False: 8.24k] ------------------ 6574| 0| case Mips::SRA_W: ------------------ | Branch (6574:5): [True: 0, False: 8.24k] ------------------ 6575| 0| case Mips::SRLR_B: ------------------ | Branch (6575:5): [True: 0, False: 8.24k] ------------------ 6576| 0| case Mips::SRLR_D: ------------------ | Branch (6576:5): [True: 0, False: 8.24k] ------------------ 6577| 0| case Mips::SRLR_H: ------------------ | Branch (6577:5): [True: 0, False: 8.24k] ------------------ 6578| 0| case Mips::SRLR_W: ------------------ | Branch (6578:5): [True: 0, False: 8.24k] ------------------ 6579| 0| case Mips::SRL_B: ------------------ | Branch (6579:5): [True: 0, False: 8.24k] ------------------ 6580| 0| case Mips::SRL_D: ------------------ | Branch (6580:5): [True: 0, False: 8.24k] ------------------ 6581| 0| case Mips::SRL_H: ------------------ | Branch (6581:5): [True: 0, False: 8.24k] ------------------ 6582| 0| case Mips::SRL_W: ------------------ | Branch (6582:5): [True: 0, False: 8.24k] ------------------ 6583| 0| case Mips::SUBSUS_U_B: ------------------ | Branch (6583:5): [True: 0, False: 8.24k] ------------------ 6584| 0| case Mips::SUBSUS_U_D: ------------------ | Branch (6584:5): [True: 0, False: 8.24k] ------------------ 6585| 0| case Mips::SUBSUS_U_H: ------------------ | Branch (6585:5): [True: 0, False: 8.24k] ------------------ 6586| 0| case Mips::SUBSUS_U_W: ------------------ | Branch (6586:5): [True: 0, False: 8.24k] ------------------ 6587| 0| case Mips::SUBSUU_S_B: ------------------ | Branch (6587:5): [True: 0, False: 8.24k] ------------------ 6588| 0| case Mips::SUBSUU_S_D: ------------------ | Branch (6588:5): [True: 0, False: 8.24k] ------------------ 6589| 0| case Mips::SUBSUU_S_H: ------------------ | Branch (6589:5): [True: 0, False: 8.24k] ------------------ 6590| 0| case Mips::SUBSUU_S_W: ------------------ | Branch (6590:5): [True: 0, False: 8.24k] ------------------ 6591| 0| case Mips::SUBS_S_B: ------------------ | Branch (6591:5): [True: 0, False: 8.24k] ------------------ 6592| 0| case Mips::SUBS_S_D: ------------------ | Branch (6592:5): [True: 0, False: 8.24k] ------------------ 6593| 0| case Mips::SUBS_S_H: ------------------ | Branch (6593:5): [True: 0, False: 8.24k] ------------------ 6594| 0| case Mips::SUBS_S_W: ------------------ | Branch (6594:5): [True: 0, False: 8.24k] ------------------ 6595| 0| case Mips::SUBS_U_B: ------------------ | Branch (6595:5): [True: 0, False: 8.24k] ------------------ 6596| 0| case Mips::SUBS_U_D: ------------------ | Branch (6596:5): [True: 0, False: 8.24k] ------------------ 6597| 0| case Mips::SUBS_U_H: ------------------ | Branch (6597:5): [True: 0, False: 8.24k] ------------------ 6598| 0| case Mips::SUBS_U_W: ------------------ | Branch (6598:5): [True: 0, False: 8.24k] ------------------ 6599| 0| case Mips::SUBV_B: ------------------ | Branch (6599:5): [True: 0, False: 8.24k] ------------------ 6600| 0| case Mips::SUBV_D: ------------------ | Branch (6600:5): [True: 0, False: 8.24k] ------------------ 6601| 0| case Mips::SUBV_H: ------------------ | Branch (6601:5): [True: 0, False: 8.24k] ------------------ 6602| 0| case Mips::SUBV_W: ------------------ | Branch (6602:5): [True: 0, False: 8.24k] ------------------ 6603| 0| case Mips::XOR_V: { ------------------ | Branch (6603:5): [True: 0, False: 8.24k] ------------------ 6604| | // op: wt 6605| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 6606| 0| Value |= (op & UINT64_C(31)) << 16; 6607| | // op: ws 6608| 0| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6609| 0| Value |= (op & UINT64_C(31)) << 11; 6610| | // op: wd 6611| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6612| 0| Value |= (op & UINT64_C(31)) << 6; 6613| 0| break; 6614| 0| } 6615| 0| case Mips::BINSL_B: ------------------ | Branch (6615:5): [True: 0, False: 8.24k] ------------------ 6616| 0| case Mips::BINSL_D: ------------------ | Branch (6616:5): [True: 0, False: 8.24k] ------------------ 6617| 0| case Mips::BINSL_H: ------------------ | Branch (6617:5): [True: 0, False: 8.24k] ------------------ 6618| 0| case Mips::BINSL_W: ------------------ | Branch (6618:5): [True: 0, False: 8.24k] ------------------ 6619| 0| case Mips::BINSR_B: ------------------ | Branch (6619:5): [True: 0, False: 8.24k] ------------------ 6620| 0| case Mips::BINSR_D: ------------------ | Branch (6620:5): [True: 0, False: 8.24k] ------------------ 6621| 0| case Mips::BINSR_H: ------------------ | Branch (6621:5): [True: 0, False: 8.24k] ------------------ 6622| 0| case Mips::BINSR_W: ------------------ | Branch (6622:5): [True: 0, False: 8.24k] ------------------ 6623| 0| case Mips::BMNZ_V: ------------------ | Branch (6623:5): [True: 0, False: 8.24k] ------------------ 6624| 0| case Mips::BMZ_V: ------------------ | Branch (6624:5): [True: 0, False: 8.24k] ------------------ 6625| 0| case Mips::BSEL_V: ------------------ | Branch (6625:5): [True: 0, False: 8.24k] ------------------ 6626| 0| case Mips::DPADD_S_D: ------------------ | Branch (6626:5): [True: 0, False: 8.24k] ------------------ 6627| 0| case Mips::DPADD_S_H: ------------------ | Branch (6627:5): [True: 0, False: 8.24k] ------------------ 6628| 0| case Mips::DPADD_S_W: ------------------ | Branch (6628:5): [True: 0, False: 8.24k] ------------------ 6629| 0| case Mips::DPADD_U_D: ------------------ | Branch (6629:5): [True: 0, False: 8.24k] ------------------ 6630| 0| case Mips::DPADD_U_H: ------------------ | Branch (6630:5): [True: 0, False: 8.24k] ------------------ 6631| 0| case Mips::DPADD_U_W: ------------------ | Branch (6631:5): [True: 0, False: 8.24k] ------------------ 6632| 0| case Mips::DPSUB_S_D: ------------------ | Branch (6632:5): [True: 0, False: 8.24k] ------------------ 6633| 0| case Mips::DPSUB_S_H: ------------------ | Branch (6633:5): [True: 0, False: 8.24k] ------------------ 6634| 0| case Mips::DPSUB_S_W: ------------------ | Branch (6634:5): [True: 0, False: 8.24k] ------------------ 6635| 0| case Mips::DPSUB_U_D: ------------------ | Branch (6635:5): [True: 0, False: 8.24k] ------------------ 6636| 0| case Mips::DPSUB_U_H: ------------------ | Branch (6636:5): [True: 0, False: 8.24k] ------------------ 6637| 0| case Mips::DPSUB_U_W: ------------------ | Branch (6637:5): [True: 0, False: 8.24k] ------------------ 6638| 0| case Mips::FMADD_D: ------------------ | Branch (6638:5): [True: 0, False: 8.24k] ------------------ 6639| 0| case Mips::FMADD_W: ------------------ | Branch (6639:5): [True: 0, False: 8.24k] ------------------ 6640| 0| case Mips::FMSUB_D: ------------------ | Branch (6640:5): [True: 0, False: 8.24k] ------------------ 6641| 0| case Mips::FMSUB_W: ------------------ | Branch (6641:5): [True: 0, False: 8.24k] ------------------ 6642| 0| case Mips::MADDR_Q_H: ------------------ | Branch (6642:5): [True: 0, False: 8.24k] ------------------ 6643| 0| case Mips::MADDR_Q_W: ------------------ | Branch (6643:5): [True: 0, False: 8.24k] ------------------ 6644| 0| case Mips::MADDV_B: ------------------ | Branch (6644:5): [True: 0, False: 8.24k] ------------------ 6645| 0| case Mips::MADDV_D: ------------------ | Branch (6645:5): [True: 0, False: 8.24k] ------------------ 6646| 0| case Mips::MADDV_H: ------------------ | Branch (6646:5): [True: 0, False: 8.24k] ------------------ 6647| 0| case Mips::MADDV_W: ------------------ | Branch (6647:5): [True: 0, False: 8.24k] ------------------ 6648| 0| case Mips::MADD_Q_H: ------------------ | Branch (6648:5): [True: 0, False: 8.24k] ------------------ 6649| 0| case Mips::MADD_Q_W: ------------------ | Branch (6649:5): [True: 0, False: 8.24k] ------------------ 6650| 0| case Mips::MSUBR_Q_H: ------------------ | Branch (6650:5): [True: 0, False: 8.24k] ------------------ 6651| 0| case Mips::MSUBR_Q_W: ------------------ | Branch (6651:5): [True: 0, False: 8.24k] ------------------ 6652| 0| case Mips::MSUBV_B: ------------------ | Branch (6652:5): [True: 0, False: 8.24k] ------------------ 6653| 0| case Mips::MSUBV_D: ------------------ | Branch (6653:5): [True: 0, False: 8.24k] ------------------ 6654| 0| case Mips::MSUBV_H: ------------------ | Branch (6654:5): [True: 0, False: 8.24k] ------------------ 6655| 0| case Mips::MSUBV_W: ------------------ | Branch (6655:5): [True: 0, False: 8.24k] ------------------ 6656| 0| case Mips::MSUB_Q_H: ------------------ | Branch (6656:5): [True: 0, False: 8.24k] ------------------ 6657| 0| case Mips::MSUB_Q_W: ------------------ | Branch (6657:5): [True: 0, False: 8.24k] ------------------ 6658| 0| case Mips::VSHF_B: ------------------ | Branch (6658:5): [True: 0, False: 8.24k] ------------------ 6659| 0| case Mips::VSHF_D: ------------------ | Branch (6659:5): [True: 0, False: 8.24k] ------------------ 6660| 0| case Mips::VSHF_H: ------------------ | Branch (6660:5): [True: 0, False: 8.24k] ------------------ 6661| 0| case Mips::VSHF_W: { ------------------ | Branch (6661:5): [True: 0, False: 8.24k] ------------------ 6662| | // op: wt 6663| 0| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 6664| 0| Value |= (op & UINT64_C(31)) << 16; 6665| | // op: ws 6666| 0| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 6667| 0| Value |= (op & UINT64_C(31)) << 11; 6668| | // op: wd 6669| 0| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6670| 0| Value |= (op & UINT64_C(31)) << 6; 6671| 0| break; 6672| 0| } 6673| 0| default: ------------------ | Branch (6673:3): [True: 0, False: 8.24k] ------------------ 6674| 0| std::string msg; 6675| 0| raw_string_ostream Msg(msg); 6676| 0| Msg << "Not supported instr: " << MI; 6677| 0| report_fatal_error(Msg.str()); 6678| 8.24k| } 6679| 8.24k| return Value; 6680| 8.24k|} MipsMCTargetDesc.cpp:_ZN7llvm_ksL22InitMipsMCRegisterInfoEPNS_14MCRegisterInfoEjjjj: 3522| 749|static inline void InitMipsMCRegisterInfo(MCRegisterInfo *RI, unsigned RA, unsigned DwarfFlavour = 0, unsigned EHFlavour = 0, unsigned PC = 0) { 3523| 749| RI->InitMCRegisterInfo(MipsRegDesc, 418, RA, PC, MipsMCRegisterClasses, 62, MipsRegUnitRoots, 297, MipsRegDiffLists, MipsLaneMaskLists, MipsRegStrings, MipsRegClassStrings, MipsSubRegIdxLists, 12, 3524| 749|MipsSubRegIdxRanges, MipsRegEncodingTable); 3525| | 3526| 749| switch (DwarfFlavour) { 3527| 0| default: ------------------ | Branch (3527:3): [True: 0, False: 749] ------------------ 3528| 0| llvm_unreachable("Unknown DWARF flavour"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ 3529| 749| case 0: ------------------ | Branch (3529:3): [True: 749, False: 0] ------------------ 3530| 749| RI->mapDwarfRegsToLLVMRegs(MipsDwarfFlavour0Dwarf2L, MipsDwarfFlavour0Dwarf2LSize, false); 3531| 749| break; 3532| 749| } 3533| 749| switch (EHFlavour) { 3534| 0| default: ------------------ | Branch (3534:3): [True: 0, False: 749] ------------------ 3535| 0| llvm_unreachable("Unknown DWARF flavour"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ 3536| 749| case 0: ------------------ | Branch (3536:3): [True: 749, False: 0] ------------------ 3537| 749| RI->mapDwarfRegsToLLVMRegs(MipsEHFlavour0Dwarf2L, MipsEHFlavour0Dwarf2LSize, true); 3538| 749| break; 3539| 749| } 3540| 749| switch (DwarfFlavour) { 3541| 0| default: ------------------ | Branch (3541:3): [True: 0, False: 749] ------------------ 3542| 0| llvm_unreachable("Unknown DWARF flavour"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ 3543| 749| case 0: ------------------ | Branch (3543:3): [True: 749, False: 0] ------------------ 3544| 749| RI->mapLLVMRegsToDwarfRegs(MipsDwarfFlavour0L2Dwarf, MipsDwarfFlavour0L2DwarfSize, false); 3545| 749| break; 3546| 749| } 3547| 749| switch (EHFlavour) { 3548| 0| default: ------------------ | Branch (3548:3): [True: 0, False: 749] ------------------ 3549| 0| llvm_unreachable("Unknown DWARF flavour"); ------------------ | | 99| 0| ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) ------------------ 3550| 749| case 0: ------------------ | Branch (3550:3): [True: 749, False: 0] ------------------ 3551| 749| RI->mapLLVMRegsToDwarfRegs(MipsEHFlavour0L2Dwarf, MipsEHFlavour0L2DwarfSize, true); 3552| 749| break; 3553| 749| } 3554| 749|} MipsMCTargetDesc.cpp:_ZN7llvm_ksL29createMipsMCSubtargetInfoImplERKNS_6TripleENS_9StringRefES3_: 137| 749|static inline MCSubtargetInfo *createMipsMCSubtargetInfoImpl(const Triple &TT, StringRef CPU, StringRef FS) { 138| | return new MCSubtargetInfo(TT, CPU, FS, MipsFeatureKV, MipsSubTypeKV, NULL); 139| 749|} LLVMInitializeMipsTargetInfo: 17| 1|extern "C" void LLVMInitializeMipsTargetInfo() { 18| 1| RegisterTarget X(TheMipsTarget, "mips", "Mips"); 19| | 20| 1| RegisterTarget Y(TheMipselTarget, "mipsel", "Mipsel"); 21| | 22| 1| RegisterTarget A(TheMips64Target, "mips64", "Mips64 [experimental]"); 23| | 24| 1| RegisterTarget B(TheMips64elTarget, 25| 1| "mips64el", "Mips64el [experimental]"); 26| 1|} LLVMInitializePowerPCAsmParser: 1922| 1|extern "C" void LLVMInitializePowerPCAsmParser() { 1923| 1| RegisterMCAsmParser A(ThePPC32Target); 1924| 1| RegisterMCAsmParser B(ThePPC64Target); 1925| 1| RegisterMCAsmParser C(ThePPC64LETarget); 1926| 1|} LLVMInitializePowerPCTargetMC: 198| 1|extern "C" void LLVMInitializePowerPCTargetMC() { 199| 3| for (Target *T : {&ThePPC32Target, &ThePPC64Target, &ThePPC64LETarget}) { ------------------ | Branch (199:18): [True: 3, False: 1] ------------------ 200| | // Register the MC asm info. 201| 3| RegisterMCAsmInfoFn C(*T, createPPCMCAsmInfo); 202| | 203| | // Register the MC instruction info. 204| 3| TargetRegistry::RegisterMCInstrInfo(*T, createPPCMCInstrInfo); 205| | 206| | // Register the MC register info. 207| 3| TargetRegistry::RegisterMCRegInfo(*T, createPPCMCRegisterInfo); 208| | 209| | // Register the MC subtarget info. 210| 3| TargetRegistry::RegisterMCSubtargetInfo(*T, createPPCMCSubtargetInfo); 211| | 212| | // Register the MC Code Emitter 213| 3| TargetRegistry::RegisterMCCodeEmitter(*T, createPPCMCCodeEmitter); 214| | 215| | // Register the asm backend. 216| 3| TargetRegistry::RegisterMCAsmBackend(*T, createPPCAsmBackend); 217| 3| } 218| 1|} LLVMInitializePowerPCTargetInfo: 16| 1|extern "C" void LLVMInitializePowerPCTargetInfo() { 17| 1| RegisterTarget 18| 1| X(ThePPC32Target, "ppc32", "PowerPC 32"); 19| | 20| 1| RegisterTarget 21| 1| Y(ThePPC64Target, "ppc64", "PowerPC 64"); 22| | 23| 1| RegisterTarget 24| 1| Z(ThePPC64LETarget, "ppc64le", "PowerPC 64 LE"); 25| 1|} LLVMInitializeRISCVAsmParser: 1809| 1|extern "C" void LLVMInitializeRISCVAsmParser() { 1810| 1| RegisterMCAsmParser X(TheRISCV32Target); 1811| 1| RegisterMCAsmParser Y(TheRISCV64Target); 1812| 1|} LLVMInitializeRISCVTargetMC: 83| 1|extern "C" void LLVMInitializeRISCVTargetMC() { 84| 2| for (Target *T : {&TheRISCV32Target, &TheRISCV64Target}) { ------------------ | Branch (84:18): [True: 2, False: 1] ------------------ 85| 2| TargetRegistry::RegisterMCAsmInfo(*T, createRISCVMCAsmInfo); 86| 2| TargetRegistry::RegisterMCInstrInfo(*T, createRISCVMCInstrInfo); 87| 2| TargetRegistry::RegisterMCRegInfo(*T, createRISCVMCRegisterInfo); 88| | // TargetRegistry::RegisterMCAsmBackend(*T, createRISCVAsmBackend); 89| 2| TargetRegistry::RegisterMCAsmBackend2(*T, createRISCVAsmBackend); 90| 2| TargetRegistry::RegisterMCCodeEmitter(*T, createRISCVMCCodeEmitter); 91| 2| TargetRegistry::RegisterMCSubtargetInfo(*T, createRISCVMCSubtargetInfo); 92| 2| TargetRegistry::RegisterObjectTargetStreamer( 93| 2| *T, createRISCVObjectTargetStreamer); 94| | 95| | // Register the asm target streamer. 96| 2| TargetRegistry::RegisterAsmTargetStreamer(*T, createRISCVAsmTargetStreamer); 97| 2| } 98| 1|} LLVMInitializeRISCVTargetInfo: 26| 1|extern "C" void LLVMInitializeRISCVTargetInfo() { 27| | 28| | 29| 1| RegisterTarget X(TheRISCV32Target, "riscv32", 30| 1| "32-bit RISC-V"); 31| 1| RegisterTarget Y(TheRISCV64Target, "riscv64", 32| 1| "64-bit RISC-V"); 33| 1|} LLVMInitializeSparcAsmParser: 1188| 1|extern "C" void LLVMInitializeSparcAsmParser() { 1189| 1| RegisterMCAsmParser A(TheSparcTarget); 1190| 1| RegisterMCAsmParser B(TheSparcV9Target); 1191| 1| RegisterMCAsmParser C(TheSparcelTarget); 1192| 1|} LLVMInitializeSparcTargetMC: 83| 1|extern "C" void LLVMInitializeSparcTargetMC() { 84| | // Register the MC asm info. 85| 1| RegisterMCAsmInfoFn X(TheSparcTarget, createSparcMCAsmInfo); 86| 1| RegisterMCAsmInfoFn Y(TheSparcV9Target, createSparcV9MCAsmInfo); 87| 1| RegisterMCAsmInfoFn Z(TheSparcelTarget, createSparcMCAsmInfo); 88| | 89| 3| for (Target *T : {&TheSparcTarget, &TheSparcV9Target, &TheSparcelTarget}) { ------------------ | Branch (89:18): [True: 3, False: 1] ------------------ 90| | // Register the MC instruction info. 91| 3| TargetRegistry::RegisterMCInstrInfo(*T, createSparcMCInstrInfo); 92| | 93| | // Register the MC register info. 94| 3| TargetRegistry::RegisterMCRegInfo(*T, createSparcMCRegisterInfo); 95| | 96| | // Register the MC subtarget info. 97| 3| TargetRegistry::RegisterMCSubtargetInfo(*T, createSparcMCSubtargetInfo); 98| | 99| | // Register the MC Code Emitter. 100| 3| TargetRegistry::RegisterMCCodeEmitter(*T, createSparcMCCodeEmitter); 101| | 102| | // Register the asm backend. 103| 3| TargetRegistry::RegisterMCAsmBackend(*T, createSparcAsmBackend); 104| 3| } 105| 1|} LLVMInitializeSparcTargetInfo: 18| 1|extern "C" void LLVMInitializeSparcTargetInfo() { 19| 1| RegisterTarget X(TheSparcTarget, "sparc", 20| 1| "Sparc"); 21| 1| RegisterTarget Y(TheSparcV9Target, 22| 1| "sparcv9", "Sparc V9"); 23| 1| RegisterTarget Z(TheSparcelTarget, 24| 1| "sparcel", "Sparc LE"); 25| 1|} LLVMInitializeSystemZAsmParser: 972| 1|extern "C" void LLVMInitializeSystemZAsmParser() { 973| 1| RegisterMCAsmParser X(TheSystemZTarget); 974| 1|} LLVMInitializeSystemZTargetMC: 161| 1|extern "C" void LLVMInitializeSystemZTargetMC() { 162| | // Register the MCAsmInfo. 163| 1| TargetRegistry::RegisterMCAsmInfo(TheSystemZTarget, 164| 1| createSystemZMCAsmInfo); 165| | 166| | // Register the MCCodeEmitter. 167| 1| TargetRegistry::RegisterMCCodeEmitter(TheSystemZTarget, 168| 1| createSystemZMCCodeEmitter); 169| | 170| | // Register the MCInstrInfo. 171| 1| TargetRegistry::RegisterMCInstrInfo(TheSystemZTarget, 172| 1| createSystemZMCInstrInfo); 173| | 174| | // Register the MCRegisterInfo. 175| 1| TargetRegistry::RegisterMCRegInfo(TheSystemZTarget, 176| 1| createSystemZMCRegisterInfo); 177| | 178| | // Register the MCSubtargetInfo. 179| 1| TargetRegistry::RegisterMCSubtargetInfo(TheSystemZTarget, 180| 1| createSystemZMCSubtargetInfo); 181| | 182| | // Register the MCAsmBackend. 183| 1| TargetRegistry::RegisterMCAsmBackend(TheSystemZTarget, 184| 1| createSystemZMCAsmBackend); 185| 1|} LLVMInitializeSystemZTargetInfo: 17| 1|extern "C" void LLVMInitializeSystemZTargetInfo() { 18| 1| RegisterTarget 19| 1| X(TheSystemZTarget, "systemz", "SystemZ"); 20| 1|} LLVMInitializeX86AsmParser: 3433| 1|extern "C" void LLVMInitializeX86AsmParser() { 3434| 1| RegisterMCAsmParser X(TheX86_32Target); 3435| 1| RegisterMCAsmParser Y(TheX86_64Target); 3436| 1|} LLVMInitializeX86TargetMC: 158| 1|extern "C" void LLVMInitializeX86TargetMC() { 159| 2| for (Target *T : {&TheX86_32Target, &TheX86_64Target}) { ------------------ | Branch (159:18): [True: 2, False: 1] ------------------ 160| | // Register the MC asm info. 161| 2| RegisterMCAsmInfoFn X(*T, createX86MCAsmInfo); 162| | 163| | // Register the MC instruction info. 164| 2| TargetRegistry::RegisterMCInstrInfo(*T, createX86MCInstrInfo); 165| | 166| | // Register the MC register info. 167| 2| TargetRegistry::RegisterMCRegInfo(*T, createX86MCRegisterInfo); 168| | 169| | // Register the MC subtarget info. 170| 2| TargetRegistry::RegisterMCSubtargetInfo(*T, 171| 2| X86_MC::createX86MCSubtargetInfo); 172| | 173| | // Register the code emitter. 174| 2| TargetRegistry::RegisterMCCodeEmitter(*T, createX86MCCodeEmitter); 175| | 176| | // Register the MC relocation info. 177| 2| TargetRegistry::RegisterMCRelocationInfo(*T, createX86MCRelocationInfo); 178| 2| } 179| | 180| | // Register the asm backend. 181| 1| TargetRegistry::RegisterMCAsmBackend(TheX86_32Target, 182| 1| createX86_32AsmBackend); 183| 1| TargetRegistry::RegisterMCAsmBackend(TheX86_64Target, 184| 1| createX86_64AsmBackend); 185| 1|} LLVMInitializeX86TargetInfo: 16| 1|extern "C" void LLVMInitializeX86TargetInfo() { 17| 1| RegisterTarget 18| 1| X(TheX86_32Target, "x86", "32-bit X86: Pentium-Pro and above"); 19| | 20| 1| RegisterTarget 21| 1| Y(TheX86_64Target, "x86-64", "64-bit X86: EM64T and AMD64"); 22| 1|} LLVMFuzzerTestOneInput: 8| 749|int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) { 9| 749| ks_engine *ks; 10| 749| ks_err err; 11| 749| size_t count; 12| 749| unsigned char *encode = NULL; 13| 749| size_t size; 14| 749| char * assembler; 15| | 16| 749| if (outfile == NULL) { ------------------ | Branch (16:9): [True: 1, False: 748] ------------------ 17| | // we compute the output 18| 1| outfile = fopen("/dev/null", "w"); 19| 1| if (outfile == NULL) { ------------------ | Branch (19:13): [True: 0, False: 1] ------------------ 20| 0| printf("failed opening /dev/null\n"); 21| 0| abort(); 22| 0| } 23| 1| } 24| | 25| 749| if (Size < 1) { ------------------ | Branch (25:9): [True: 0, False: 749] ------------------ 26| 0| return 0; 27| 0| } 28| | 29| 749| err = ks_open(KS_ARCH_MIPS, KS_MODE_MIPS32+KS_MODE_BIG_ENDIAN, &ks); 30| 749| if (err != KS_ERR_OK) { ------------------ | Branch (30:9): [True: 0, False: 749] ------------------ 31| 0| printf("ERROR: failed on ks_open(), quit error = %u\n", err); 32| 0| abort(); 33| 0| } 34| | 35| 749| ks_option(ks, KS_OPT_SYNTAX, Data[Size-1]); 36| | 37| 749| assembler = malloc(Size); 38| 749| memcpy(assembler, Data, Size-1); 39| | //null terminate string 40| 749| assembler[Size-1] = 0; 41| | 42| 749| if (ks_asm(ks, assembler, 0, &encode, &size, &count) != KS_ERR_OK) { ------------------ | Branch (42:9): [True: 444, False: 305] ------------------ 43| 444| fprintf(outfile, "ERROR: ks_asm() failed & count = %lu, error = %u\n", 44| 444| count, ks_errno(ks)); 45| 444| } else { 46| 305| size_t i; 47| | 48| 305| fprintf(outfile, "%s = ", assembler); 49| 555k| for (i = 0; i < size; i++) { ------------------ | Branch (49:21): [True: 555k, False: 305] ------------------ 50| 555k| fprintf(outfile, "%02x ", encode[i]); 51| 555k| } 52| 305| fprintf(outfile, "\n"); 53| 305| fprintf(outfile, "Compiled: %lu bytes, statements: %lu\n", size, count); 54| 305| } 55| | 56| 749| free(assembler); 57| | // NOTE: free encode after usage to avoid leaking memory 58| 749| if (encode != NULL) { ------------------ | Branch (58:9): [True: 305, False: 444] ------------------ 59| 305| ks_free(encode); 60| 305| } 61| | 62| | // close Keystone instance when done 63| 749| ks_close(ks); 64| | 65| 749| return 0; 66| 749|}