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extern int __get_user_2(void); extern int __get_user_4(void); extern int __get_user_8(void); extern int __get_user_nocheck_1(void); extern int __get_user_nocheck_2(void); extern int __get_user_nocheck_4(void); extern int __get_user_nocheck_8(void); extern int __get_user_bad(void); #define __uaccess_begin() stac() #define __uaccess_end() clac() #define __uaccess_begin_nospec() \ ({ \ stac(); \ barrier_nospec(); \ }) /* * This is the smallest unsigned integer type that can fit a value * (up to 'long long') */ #define __inttype(x) __typeof__( \ __typefits(x,char, \ __typefits(x,short, \ __typefits(x,int, \ __typefits(x,long,0ULL))))) #define __typefits(x,type,not) \ __builtin_choose_expr(sizeof(x)<=sizeof(type),(unsigned type)0,not) /* * This is used for both get_user() and __get_user() to expand to * the proper special function call that has odd calling conventions * due to returning both a value and an error, and that depends on * the size of the pointer passed in. * * Careful: we have to cast the result to the type of the pointer * for sign reasons. * * The use of _ASM_DX as the register specifier is a bit of a * simplification, as gcc only cares about it as the starting point * and not size: for a 64-bit value it will use %ecx:%edx on 32 bits * (%ecx being the next register in gcc's x86 register sequence), and * %rdx on 64 bits. * * Clang/LLVM cares about the size of the register, but still wants * the base register for something that ends up being a pair. */ #define do_get_user_call(fn,x,ptr) \ ({ \ int __ret_gu; \ register __inttype(*(ptr)) __val_gu asm("%"_ASM_DX); \ __chk_user_ptr(ptr); \ asm volatile("call __" #fn "_%P4" \ : "=a" (__ret_gu), "=r" (__val_gu), \ ASM_CALL_CONSTRAINT \ : "0" (ptr), "i" (sizeof(*(ptr)))); \ instrument_get_user(__val_gu); \ (x) = (__force __typeof__(*(ptr))) __val_gu; \ __builtin_expect(__ret_gu, 0); \ }) /** * get_user - Get a simple variable from user space. * @x: Variable to store result. * @ptr: Source address, in user space. * * Context: User context only. This function may sleep if pagefaults are * enabled. * * This macro copies a single simple variable from user space to kernel * space. It supports simple types like char and int, but not larger * data types like structures or arrays. * * @ptr must have pointer-to-simple-variable type, and the result of * dereferencing @ptr must be assignable to @x without a cast. * * Return: zero on success, or -EFAULT on error. * On error, the variable @x is set to zero. */ #define get_user(x,ptr) ({ might_fault(); do_get_user_call(get_user,x,ptr); }) /** * __get_user - Get a simple variable from user space, with less checking. * @x: Variable to store result. * @ptr: Source address, in user space. * * Context: User context only. This function may sleep if pagefaults are * enabled. * * This macro copies a single simple variable from user space to kernel * space. It supports simple types like char and int, but not larger * data types like structures or arrays. * * @ptr must have pointer-to-simple-variable type, and the result of * dereferencing @ptr must be assignable to @x without a cast. * * Caller must check the pointer with access_ok() before calling this * function. * * Return: zero on success, or -EFAULT on error. * On error, the variable @x is set to zero. */ #define __get_user(x,ptr) do_get_user_call(get_user_nocheck,x,ptr) #ifdef CONFIG_X86_32 #define __put_user_goto_u64(x, addr, label) \ asm goto("\n" \ "1: movl %%eax,0(%1)\n" \ "2: movl %%edx,4(%1)\n" \ _ASM_EXTABLE_UA(1b, %l2) \ _ASM_EXTABLE_UA(2b, %l2) \ : : "A" (x), "r" (addr) \ : : label) #else #define __put_user_goto_u64(x, ptr, label) \ __put_user_goto(x, ptr, "q", "er", label) #endif extern void __put_user_bad(void); /* * Strange magic calling convention: pointer in %ecx, * value in %eax(:%edx), return value in %ecx. clobbers %rbx */ extern void __put_user_1(void); extern void __put_user_2(void); extern void __put_user_4(void); extern void __put_user_8(void); extern void __put_user_nocheck_1(void); extern void __put_user_nocheck_2(void); extern void __put_user_nocheck_4(void); extern void __put_user_nocheck_8(void); /* * ptr must be evaluated and assigned to the temporary __ptr_pu before * the assignment of x to __val_pu, to avoid any function calls * involved in the ptr expression (possibly implicitly generated due * to KASAN) from clobbering %ax. */ #define do_put_user_call(fn,x,ptr) \ ({ \ int __ret_pu; \ void __user *__ptr_pu; \ register __typeof__(*(ptr)) __val_pu asm("%"_ASM_AX); \ __typeof__(*(ptr)) __x = (x); /* eval x once */ \ __typeof__(ptr) __ptr = (ptr); /* eval ptr once */ \ __chk_user_ptr(__ptr); \ __ptr_pu = __ptr; \ __val_pu = __x; \ asm volatile("call __" #fn "_%P[size]" \ : "=c" (__ret_pu), \ ASM_CALL_CONSTRAINT \ : "0" (__ptr_pu), \ "r" (__val_pu), \ [size] "i" (sizeof(*(ptr))) \ :"ebx"); \ instrument_put_user(__x, __ptr, sizeof(*(ptr))); \ __builtin_expect(__ret_pu, 0); \ }) /** * put_user - Write a simple value into user space. * @x: Value to copy to user space. * @ptr: Destination address, in user space. * * Context: User context only. This function may sleep if pagefaults are * enabled. * * This macro copies a single simple value from kernel space to user * space. It supports simple types like char and int, but not larger * data types like structures or arrays. * * @ptr must have pointer-to-simple-variable type, and @x must be assignable * to the result of dereferencing @ptr. * * Return: zero on success, or -EFAULT on error. */ #define put_user(x, ptr) ({ might_fault(); do_put_user_call(put_user,x,ptr); }) /** * __put_user - Write a simple value into user space, with less checking. * @x: Value to copy to user space. * @ptr: Destination address, in user space. * * Context: User context only. This function may sleep if pagefaults are * enabled. * * This macro copies a single simple value from kernel space to user * space. It supports simple types like char and int, but not larger * data types like structures or arrays. * * @ptr must have pointer-to-simple-variable type, and @x must be assignable * to the result of dereferencing @ptr. * * Caller must check the pointer with access_ok() before calling this * function. * * Return: zero on success, or -EFAULT on error. */ #define __put_user(x, ptr) do_put_user_call(put_user_nocheck,x,ptr) #define __put_user_size(x, ptr, size, label) \ do { \ __typeof__(*(ptr)) __x = (x); /* eval x once */ \ __typeof__(ptr) __ptr = (ptr); /* eval ptr once */ \ __chk_user_ptr(__ptr); \ switch (size) { \ case 1: \ __put_user_goto(__x, __ptr, "b", "iq", label); \ break; \ case 2: \ __put_user_goto(__x, __ptr, "w", "ir", label); \ break; \ case 4: \ __put_user_goto(__x, __ptr, "l", "ir", label); \ break; \ case 8: \ __put_user_goto_u64(__x, __ptr, label); \ break; \ default: \ __put_user_bad(); \ } \ instrument_put_user(__x, __ptr, size); \ } while (0) #ifdef CONFIG_CC_HAS_ASM_GOTO_OUTPUT #ifdef CONFIG_X86_32 #define __get_user_asm_u64(x, ptr, label) do { \ unsigned int __gu_low, __gu_high; \ const unsigned int __user *__gu_ptr; \ __gu_ptr = (const void __user *)(ptr); \ __get_user_asm(__gu_low, __gu_ptr, "l", "=r", label); \ __get_user_asm(__gu_high, __gu_ptr+1, "l", "=r", label); \ (x) = ((unsigned long long)__gu_high << 32) | __gu_low; \ } while (0) #else #define __get_user_asm_u64(x, ptr, label) \ __get_user_asm(x, ptr, "q", "=r", label) #endif #define __get_user_size(x, ptr, size, label) \ do { \ __chk_user_ptr(ptr); \ switch (size) { \ case 1: { \ unsigned char x_u8__; \ __get_user_asm(x_u8__, ptr, "b", "=q", label); \ (x) = x_u8__; \ break; \ } \ case 2: \ __get_user_asm(x, ptr, "w", "=r", label); \ break; \ case 4: \ __get_user_asm(x, ptr, "l", "=r", label); \ break; \ case 8: \ __get_user_asm_u64(x, ptr, label); \ break; \ default: \ (x) = __get_user_bad(); \ } \ instrument_get_user(x); \ } while (0) #define __get_user_asm(x, addr, itype, ltype, label) \ asm_goto_output("\n" \ "1: mov"itype" %[umem],%[output]\n" \ _ASM_EXTABLE_UA(1b, %l2) \ : [output] ltype(x) \ : [umem] "m" (__m(addr)) \ : : label) #else // !CONFIG_CC_HAS_ASM_GOTO_OUTPUT #ifdef CONFIG_X86_32 #define __get_user_asm_u64(x, ptr, retval) \ ({ \ __typeof__(ptr) __ptr = (ptr); \ asm volatile("\n" \ "1: movl %[lowbits],%%eax\n" \ "2: movl %[highbits],%%edx\n" \ "3:\n" \ _ASM_EXTABLE_TYPE_REG(1b, 3b, EX_TYPE_EFAULT_REG | \ EX_FLAG_CLEAR_AX_DX, \ %[errout]) \ _ASM_EXTABLE_TYPE_REG(2b, 3b, EX_TYPE_EFAULT_REG | \ EX_FLAG_CLEAR_AX_DX, \ %[errout]) \ : [errout] "=r" (retval), \ [output] "=&A"(x) \ : [lowbits] "m" (__m(__ptr)), \ [highbits] "m" __m(((u32 __user *)(__ptr)) + 1), \ "0" (retval)); \ }) #else #define __get_user_asm_u64(x, ptr, retval) \ __get_user_asm(x, ptr, retval, "q") #endif #define __get_user_size(x, ptr, size, retval) \ do { \ unsigned char x_u8__; \ \ retval = 0; \ __chk_user_ptr(ptr); \ switch (size) { \ case 1: \ __get_user_asm(x_u8__, ptr, retval, "b"); \ (x) = x_u8__; \ break; \ case 2: \ __get_user_asm(x, ptr, retval, "w"); \ break; \ case 4: \ __get_user_asm(x, ptr, retval, "l"); \ break; \ case 8: \ __get_user_asm_u64(x, ptr, retval); \ break; \ default: \ (x) = __get_user_bad(); \ } \ } while (0) #define __get_user_asm(x, addr, err, itype) \ asm volatile("\n" \ "1: mov"itype" %[umem],%[output]\n" \ "2:\n" \ _ASM_EXTABLE_TYPE_REG(1b, 2b, EX_TYPE_EFAULT_REG | \ EX_FLAG_CLEAR_AX, \ %[errout]) \ : [errout] "=r" (err), \ [output] "=a" (x) \ : [umem] "m" (__m(addr)), \ "0" (err)) #endif // CONFIG_CC_HAS_ASM_GOTO_OUTPUT #ifdef CONFIG_CC_HAS_ASM_GOTO_TIED_OUTPUT #define __try_cmpxchg_user_asm(itype, ltype, _ptr, _pold, _new, label) ({ \ bool success; \ __typeof__(_ptr) _old = (__typeof__(_ptr))(_pold); \ __typeof__(*(_ptr)) __old = *_old; \ __typeof__(*(_ptr)) __new = (_new); \ asm_goto_output("\n" \ "1: " LOCK_PREFIX "cmpxchg"itype" %[new], %[ptr]\n"\ _ASM_EXTABLE_UA(1b, %l[label]) \ : CC_OUT(z) (success), \ [ptr] "+m" (*_ptr), \ [old] "+a" (__old) \ : [new] ltype (__new) \ : "memory" \ : label); \ if (unlikely(!success)) \ *_old = __old; \ likely(success); }) #ifdef CONFIG_X86_32 #define __try_cmpxchg64_user_asm(_ptr, _pold, _new, label) ({ \ bool success; \ __typeof__(_ptr) _old = (__typeof__(_ptr))(_pold); \ __typeof__(*(_ptr)) __old = *_old; \ __typeof__(*(_ptr)) __new = (_new); \ asm_goto_output("\n" \ "1: " LOCK_PREFIX "cmpxchg8b %[ptr]\n" \ _ASM_EXTABLE_UA(1b, %l[label]) \ : CC_OUT(z) (success), \ "+A" (__old), \ [ptr] "+m" (*_ptr) \ : "b" ((u32)__new), \ "c" ((u32)((u64)__new >> 32)) \ : "memory" \ : label); \ if (unlikely(!success)) \ *_old = __old; \ likely(success); }) #endif // CONFIG_X86_32 #else // !CONFIG_CC_HAS_ASM_GOTO_TIED_OUTPUT #define __try_cmpxchg_user_asm(itype, ltype, _ptr, _pold, _new, label) ({ \ int __err = 0; \ bool success; \ __typeof__(_ptr) _old = (__typeof__(_ptr))(_pold); \ __typeof__(*(_ptr)) __old = *_old; \ __typeof__(*(_ptr)) __new = (_new); \ asm volatile("\n" \ "1: " LOCK_PREFIX "cmpxchg"itype" %[new], %[ptr]\n"\ CC_SET(z) \ "2:\n" \ _ASM_EXTABLE_TYPE_REG(1b, 2b, EX_TYPE_EFAULT_REG, \ %[errout]) \ : CC_OUT(z) (success), \ [errout] "+r" (__err), \ [ptr] "+m" (*_ptr), \ [old] "+a" (__old) \ : [new] ltype (__new) \ : "memory"); \ if (unlikely(__err)) \ goto label; \ if (unlikely(!success)) \ *_old = __old; \ likely(success); }) #ifdef CONFIG_X86_32 /* * Unlike the normal CMPXCHG, use output GPR for both success/fail and error. * There are only six GPRs available and four (EAX, EBX, ECX, and EDX) are * hardcoded by CMPXCHG8B, leaving only ESI and EDI. If the compiler uses * both ESI and EDI for the memory operand, compilation will fail if the error * is an input+output as there will be no register available for input. */ #define __try_cmpxchg64_user_asm(_ptr, _pold, _new, label) ({ \ int __result; \ __typeof__(_ptr) _old = (__typeof__(_ptr))(_pold); \ __typeof__(*(_ptr)) __old = *_old; \ __typeof__(*(_ptr)) __new = (_new); \ asm volatile("\n" \ "1: " LOCK_PREFIX "cmpxchg8b %[ptr]\n" \ "mov $0, %[result]\n\t" \ "setz %b[result]\n" \ "2:\n" \ _ASM_EXTABLE_TYPE_REG(1b, 2b, EX_TYPE_EFAULT_REG, \ %[result]) \ : [result] "=q" (__result), \ "+A" (__old), \ [ptr] "+m" (*_ptr) \ : "b" ((u32)__new), \ "c" ((u32)((u64)__new >> 32)) \ : "memory", "cc"); \ if (unlikely(__result < 0)) \ goto label; \ if (unlikely(!__result)) \ *_old = __old; \ likely(__result); }) #endif // CONFIG_X86_32 #endif // CONFIG_CC_HAS_ASM_GOTO_TIED_OUTPUT /* FIXME: this hack is definitely wrong -AK */ struct __large_struct { unsigned long buf[100]; }; #define __m(x) (*(struct __large_struct __user *)(x)) /* * Tell gcc we read from memory instead of writing: this is because * we do not write to any memory gcc knows about, so there are no * aliasing issues. */ #define __put_user_goto(x, addr, itype, ltype, label) \ asm goto("\n" \ "1: mov"itype" %0,%1\n" \ _ASM_EXTABLE_UA(1b, %l2) \ : : ltype(x), "m" (__m(addr)) \ : : label) extern unsigned long copy_from_user_nmi(void *to, const void __user *from, unsigned long n); extern __must_check long strncpy_from_user(char *dst, const char __user *src, long count); extern __must_check long strnlen_user(const char __user *str, long n); #ifdef CONFIG_ARCH_HAS_COPY_MC unsigned long __must_check copy_mc_to_kernel(void *to, const void *from, unsigned len); #define copy_mc_to_kernel copy_mc_to_kernel unsigned long __must_check copy_mc_to_user(void __user *to, const void *from, unsigned len); #endif /* * movsl can be slow when source and dest are not both 8-byte aligned */ #ifdef CONFIG_X86_INTEL_USERCOPY extern struct movsl_mask { int mask; } ____cacheline_aligned_in_smp movsl_mask; #endif #define ARCH_HAS_NOCACHE_UACCESS 1 /* * The "unsafe" user accesses aren't really "unsafe", but the naming * is a big fat warning: you have to not only do the access_ok() * checking before using them, but you have to surround them with the * user_access_begin/end() pair. */ static __must_check __always_inline bool user_access_begin(const void __user *ptr, size_t len) { if (unlikely(!access_ok(ptr,len))) return 0; __uaccess_begin_nospec(); return 1; } #define user_access_begin(a,b) user_access_begin(a,b) #define user_access_end() __uaccess_end() #define user_access_save() smap_save() #define user_access_restore(x) smap_restore(x) #define unsafe_put_user(x, ptr, label) \ __put_user_size((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr)), label) #ifdef CONFIG_CC_HAS_ASM_GOTO_OUTPUT #define unsafe_get_user(x, ptr, err_label) \ do { \ __inttype(*(ptr)) __gu_val; \ __get_user_size(__gu_val, (ptr), sizeof(*(ptr)), err_label); \ (x) = (__force __typeof__(*(ptr)))__gu_val; \ } while (0) #else // !CONFIG_CC_HAS_ASM_GOTO_OUTPUT #define unsafe_get_user(x, ptr, err_label) \ do { \ int __gu_err; \ __inttype(*(ptr)) __gu_val; \ __get_user_size(__gu_val, (ptr), sizeof(*(ptr)), __gu_err); \ (x) = (__force __typeof__(*(ptr)))__gu_val; \ if (unlikely(__gu_err)) goto err_label; \ } while (0) #endif // CONFIG_CC_HAS_ASM_GOTO_OUTPUT extern void __try_cmpxchg_user_wrong_size(void); #ifndef CONFIG_X86_32 #define __try_cmpxchg64_user_asm(_ptr, _oldp, _nval, _label) \ __try_cmpxchg_user_asm("q", "r", (_ptr), (_oldp), (_nval), _label) #endif /* * Force the pointer to u<size> to match the size expected by the asm helper. * clang/LLVM compiles all cases and only discards the unused paths after * processing errors, which breaks i386 if the pointer is an 8-byte value. */ #define unsafe_try_cmpxchg_user(_ptr, _oldp, _nval, _label) ({ \ bool __ret; \ __chk_user_ptr(_ptr); \ switch (sizeof(*(_ptr))) { \ case 1: __ret = __try_cmpxchg_user_asm("b", "q", \ (__force u8 *)(_ptr), (_oldp), \ (_nval), _label); \ break; \ case 2: __ret = __try_cmpxchg_user_asm("w", "r", \ (__force u16 *)(_ptr), (_oldp), \ (_nval), _label); \ break; \ case 4: __ret = __try_cmpxchg_user_asm("l", "r", \ (__force u32 *)(_ptr), (_oldp), \ (_nval), _label); \ break; \ case 8: __ret = __try_cmpxchg64_user_asm((__force u64 *)(_ptr), (_oldp),\ (_nval), _label); \ break; \ default: __try_cmpxchg_user_wrong_size(); \ } \ __ret; }) /* "Returns" 0 on success, 1 on failure, -EFAULT if the access faults. */ #define __try_cmpxchg_user(_ptr, _oldp, _nval, _label) ({ \ int __ret = -EFAULT; \ __uaccess_begin_nospec(); \ __ret = !unsafe_try_cmpxchg_user(_ptr, _oldp, _nval, _label); \ _label: \ __uaccess_end(); \ __ret; \ }) /* * We want the unsafe accessors to always be inlined and use * the error labels - thus the macro games. */ #define unsafe_copy_loop(dst, src, len, type, label) \ while (len >= sizeof(type)) { \ unsafe_put_user(*(type *)(src),(type __user *)(dst),label); \ dst += sizeof(type); \ src += sizeof(type); \ len -= sizeof(type); \ } #define unsafe_copy_to_user(_dst,_src,_len,label) \ do { \ char __user *__ucu_dst = (_dst); \ const char *__ucu_src = (_src); \ size_t __ucu_len = (_len); \ unsafe_copy_loop(__ucu_dst, __ucu_src, __ucu_len, u64, label); \ unsafe_copy_loop(__ucu_dst, __ucu_src, __ucu_len, u32, label); \ unsafe_copy_loop(__ucu_dst, __ucu_src, __ucu_len, u16, label); \ unsafe_copy_loop(__ucu_dst, __ucu_src, __ucu_len, u8, label); \ } while (0) #ifdef CONFIG_CC_HAS_ASM_GOTO_OUTPUT #define __get_kernel_nofault(dst, src, type, err_label) \ __get_user_size(*((type *)(dst)), (__force type __user *)(src), \ sizeof(type), err_label) #else // !CONFIG_CC_HAS_ASM_GOTO_OUTPUT #define __get_kernel_nofault(dst, src, type, err_label) \ do { \ int __kr_err; \ \ __get_user_size(*((type *)(dst)), (__force type __user *)(src), \ sizeof(type), __kr_err); \ if (unlikely(__kr_err)) \ goto err_label; \ } while (0) #endif // CONFIG_CC_HAS_ASM_GOTO_OUTPUT #define __put_kernel_nofault(dst, src, type, err_label) \ __put_user_size(*((type *)(src)), (__force type __user *)(dst), \ sizeof(type), err_label) #endif /* _ASM_X86_UACCESS_H */
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1621 1622 1623 1624 1625 1626 1627 1628 1629 1630 1631 1632 1633 1634 1635 1636 1637 1638 1639 1640 1641 1642 1643 1644 1645 1646 1647 1648 1649 1650 1651 1652 1653 1654 1655 1656 1657 1658 1659 1660 1661 1662 1663 1664 1665 1666 1667 1668 1669 1670 1671 1672 1673 1674 1675 1676 1677 1678 1679 1680 1681 1682 1683 1684 1685 1686 1687 /* SPDX-License-Identifier: GPL-2.0-or-later * * Copyright (C) 2005 David Brownell */ #ifndef __LINUX_SPI_H #define __LINUX_SPI_H #include <linux/acpi.h> #include <linux/bits.h> #include <linux/completion.h> #include <linux/device.h> #include <linux/gpio/consumer.h> #include <linux/kthread.h> #include <linux/mod_devicetable.h> #include <linux/overflow.h> #include <linux/scatterlist.h> #include <linux/slab.h> #include <linux/u64_stats_sync.h> #include <uapi/linux/spi/spi.h> /* Max no. of CS supported per spi device */ #define SPI_CS_CNT_MAX 16 struct dma_chan; struct software_node; struct ptp_system_timestamp; struct spi_controller; struct spi_transfer; struct spi_controller_mem_ops; struct spi_controller_mem_caps; struct spi_message; /* * INTERFACES between SPI master-side drivers and SPI slave protocol handlers, * and SPI infrastructure. */ extern const struct bus_type spi_bus_type; /** * struct spi_statistics - statistics for spi transfers * @syncp: seqcount to protect members in this struct for per-cpu update * on 32-bit systems * * @messages: number of spi-messages handled * @transfers: number of spi_transfers handled * @errors: number of errors during spi_transfer * @timedout: number of timeouts during spi_transfer * * @spi_sync: number of times spi_sync is used * @spi_sync_immediate: * number of times spi_sync is executed immediately * in calling context without queuing and scheduling * @spi_async: number of times spi_async is used * * @bytes: number of bytes transferred to/from device * @bytes_tx: number of bytes sent to device * @bytes_rx: number of bytes received from device * * @transfer_bytes_histo: * transfer bytes histogram * * @transfers_split_maxsize: * number of transfers that have been split because of * maxsize limit */ struct spi_statistics { struct u64_stats_sync syncp; u64_stats_t messages; u64_stats_t transfers; u64_stats_t errors; u64_stats_t timedout; u64_stats_t spi_sync; u64_stats_t spi_sync_immediate; u64_stats_t spi_async; u64_stats_t bytes; u64_stats_t bytes_rx; u64_stats_t bytes_tx; #define SPI_STATISTICS_HISTO_SIZE 17 u64_stats_t transfer_bytes_histo[SPI_STATISTICS_HISTO_SIZE]; u64_stats_t transfers_split_maxsize; }; #define SPI_STATISTICS_ADD_TO_FIELD(pcpu_stats, field, count) \ do { \ struct spi_statistics *__lstats; \ get_cpu(); \ __lstats = this_cpu_ptr(pcpu_stats); \ u64_stats_update_begin(&__lstats->syncp); \ u64_stats_add(&__lstats->field, count); \ u64_stats_update_end(&__lstats->syncp); \ put_cpu(); \ } while (0) #define SPI_STATISTICS_INCREMENT_FIELD(pcpu_stats, field) \ do { \ struct spi_statistics *__lstats; \ get_cpu(); \ __lstats = this_cpu_ptr(pcpu_stats); \ u64_stats_update_begin(&__lstats->syncp); \ u64_stats_inc(&__lstats->field); \ u64_stats_update_end(&__lstats->syncp); \ put_cpu(); \ } while (0) /** * struct spi_delay - SPI delay information * @value: Value for the delay * @unit: Unit for the delay */ struct spi_delay { #define SPI_DELAY_UNIT_USECS 0 #define SPI_DELAY_UNIT_NSECS 1 #define SPI_DELAY_UNIT_SCK 2 u16 value; u8 unit; }; extern int spi_delay_to_ns(struct spi_delay *_delay, struct spi_transfer *xfer); extern int spi_delay_exec(struct spi_delay *_delay, struct spi_transfer *xfer); extern void spi_transfer_cs_change_delay_exec(struct spi_message *msg, struct spi_transfer *xfer); /** * struct spi_device - Controller side proxy for an SPI slave device * @dev: Driver model representation of the device. * @controller: SPI controller used with the device. * @max_speed_hz: Maximum clock rate to be used with this chip * (on this board); may be changed by the device's driver. * The spi_transfer.speed_hz can override this for each transfer. * @chip_select: Array of physical chipselect, spi->chipselect[i] gives * the corresponding physical CS for logical CS i. * @mode: The spi mode defines how data is clocked out and in. * This may be changed by the device's driver. * The "active low" default for chipselect mode can be overridden * (by specifying SPI_CS_HIGH) as can the "MSB first" default for * each word in a transfer (by specifying SPI_LSB_FIRST). * @bits_per_word: Data transfers involve one or more words; word sizes * like eight or 12 bits are common. In-memory wordsizes are * powers of two bytes (e.g. 20 bit samples use 32 bits). * This may be changed by the device's driver, or left at the * default (0) indicating protocol words are eight bit bytes. * The spi_transfer.bits_per_word can override this for each transfer. * @rt: Make the pump thread real time priority. * @irq: Negative, or the number passed to request_irq() to receive * interrupts from this device. * @controller_state: Controller's runtime state * @controller_data: Board-specific definitions for controller, such as * FIFO initialization parameters; from board_info.controller_data * @modalias: Name of the driver to use with this device, or an alias * for that name. This appears in the sysfs "modalias" attribute * for driver coldplugging, and in uevents used for hotplugging * @driver_override: If the name of a driver is written to this attribute, then * the device will bind to the named driver and only the named driver. * Do not set directly, because core frees it; use driver_set_override() to * set or clear it. * @cs_gpiod: Array of GPIO descriptors of the corresponding chipselect lines * (optional, NULL when not using a GPIO line) * @word_delay: delay to be inserted between consecutive * words of a transfer * @cs_setup: delay to be introduced by the controller after CS is asserted * @cs_hold: delay to be introduced by the controller before CS is deasserted * @cs_inactive: delay to be introduced by the controller after CS is * deasserted. If @cs_change_delay is used from @spi_transfer, then the * two delays will be added up. * @pcpu_statistics: statistics for the spi_device * @cs_index_mask: Bit mask of the active chipselect(s) in the chipselect array * * A @spi_device is used to interchange data between an SPI slave * (usually a discrete chip) and CPU memory. * * In @dev, the platform_data is used to hold information about this * device that's meaningful to the device's protocol driver, but not * to its controller. One example might be an identifier for a chip * variant with slightly different functionality; another might be * information about how this particular board wires the chip's pins. */ struct spi_device { struct device dev; struct spi_controller *controller; u32 max_speed_hz; u8 chip_select[SPI_CS_CNT_MAX]; u8 bits_per_word; bool rt; #define SPI_NO_TX BIT(31) /* No transmit wire */ #define SPI_NO_RX BIT(30) /* No receive wire */ /* * TPM specification defines flow control over SPI. Client device * can insert a wait state on MISO when address is transmitted by * controller on MOSI. Detecting the wait state in software is only * possible for full duplex controllers. For controllers that support * only half-duplex, the wait state detection needs to be implemented * in hardware. TPM devices would set this flag when hardware flow * control is expected from SPI controller. */ #define SPI_TPM_HW_FLOW BIT(29) /* TPM HW flow control */ /* * All bits defined above should be covered by SPI_MODE_KERNEL_MASK. * The SPI_MODE_KERNEL_MASK has the SPI_MODE_USER_MASK counterpart, * which is defined in 'include/uapi/linux/spi/spi.h'. * The bits defined here are from bit 31 downwards, while in * SPI_MODE_USER_MASK are from 0 upwards. * These bits must not overlap. A static assert check should make sure of that. * If adding extra bits, make sure to decrease the bit index below as well. */ #define SPI_MODE_KERNEL_MASK (~(BIT(29) - 1)) u32 mode; int irq; void *controller_state; void *controller_data; char modalias[SPI_NAME_SIZE]; const char *driver_override; struct gpio_desc *cs_gpiod[SPI_CS_CNT_MAX]; /* Chip select gpio desc */ struct spi_delay word_delay; /* Inter-word delay */ /* CS delays */ struct spi_delay cs_setup; struct spi_delay cs_hold; struct spi_delay cs_inactive; /* The statistics */ struct spi_statistics __percpu *pcpu_statistics; /* Bit mask of the chipselect(s) that the driver need to use from * the chipselect array.When the controller is capable to handle * multiple chip selects & memories are connected in parallel * then more than one bit need to be set in cs_index_mask. */ u32 cs_index_mask : SPI_CS_CNT_MAX; /* * Likely need more hooks for more protocol options affecting how * the controller talks to each chip, like: * - memory packing (12 bit samples into low bits, others zeroed) * - priority * - chipselect delays * - ... */ }; /* Make sure that SPI_MODE_KERNEL_MASK & SPI_MODE_USER_MASK don't overlap */ static_assert((SPI_MODE_KERNEL_MASK & SPI_MODE_USER_MASK) == 0, "SPI_MODE_USER_MASK & SPI_MODE_KERNEL_MASK must not overlap"); static inline struct spi_device *to_spi_device(const struct device *dev) { return dev ? container_of(dev, struct spi_device, dev) : NULL; } /* Most drivers won't need to care about device refcounting */ static inline struct spi_device *spi_dev_get(struct spi_device *spi) { return (spi && get_device(&spi->dev)) ? spi : NULL; } static inline void spi_dev_put(struct spi_device *spi) { if (spi) put_device(&spi->dev); } /* ctldata is for the bus_controller driver's runtime state */ static inline void *spi_get_ctldata(const struct spi_device *spi) { return spi->controller_state; } static inline void spi_set_ctldata(struct spi_device *spi, void *state) { spi->controller_state = state; } /* Device driver data */ static inline void spi_set_drvdata(struct spi_device *spi, void *data) { dev_set_drvdata(&spi->dev, data); } static inline void *spi_get_drvdata(const struct spi_device *spi) { return dev_get_drvdata(&spi->dev); } static inline u8 spi_get_chipselect(const struct spi_device *spi, u8 idx) { return spi->chip_select[idx]; } static inline void spi_set_chipselect(struct spi_device *spi, u8 idx, u8 chipselect) { spi->chip_select[idx] = chipselect; } static inline struct gpio_desc *spi_get_csgpiod(const struct spi_device *spi, u8 idx) { return spi->cs_gpiod[idx]; } static inline void spi_set_csgpiod(struct spi_device *spi, u8 idx, struct gpio_desc *csgpiod) { spi->cs_gpiod[idx] = csgpiod; } static inline bool spi_is_csgpiod(struct spi_device *spi) { u8 idx; for (idx = 0; idx < SPI_CS_CNT_MAX; idx++) { if (spi_get_csgpiod(spi, idx)) return true; } return false; } /** * struct spi_driver - Host side "protocol" driver * @id_table: List of SPI devices supported by this driver * @probe: Binds this driver to the SPI device. Drivers can verify * that the device is actually present, and may need to configure * characteristics (such as bits_per_word) which weren't needed for * the initial configuration done during system setup. * @remove: Unbinds this driver from the SPI device * @shutdown: Standard shutdown callback used during system state * transitions such as powerdown/halt and kexec * @driver: SPI device drivers should initialize the name and owner * field of this structure. * * This represents the kind of device driver that uses SPI messages to * interact with the hardware at the other end of a SPI link. It's called * a "protocol" driver because it works through messages rather than talking * directly to SPI hardware (which is what the underlying SPI controller * driver does to pass those messages). These protocols are defined in the * specification for the device(s) supported by the driver. * * As a rule, those device protocols represent the lowest level interface * supported by a driver, and it will support upper level interfaces too. * Examples of such upper levels include frameworks like MTD, networking, * MMC, RTC, filesystem character device nodes, and hardware monitoring. */ struct spi_driver { const struct spi_device_id *id_table; int (*probe)(struct spi_device *spi); void (*remove)(struct spi_device *spi); void (*shutdown)(struct spi_device *spi); struct device_driver driver; }; static inline struct spi_driver *to_spi_driver(struct device_driver *drv) { return drv ? container_of(drv, struct spi_driver, driver) : NULL; } extern int __spi_register_driver(struct module *owner, struct spi_driver *sdrv); /** * spi_unregister_driver - reverse effect of spi_register_driver * @sdrv: the driver to unregister * Context: can sleep */ static inline void spi_unregister_driver(struct spi_driver *sdrv) { if (sdrv) driver_unregister(&sdrv->driver); } extern struct spi_device *spi_new_ancillary_device(struct spi_device *spi, u8 chip_select); /* Use a define to avoid include chaining to get THIS_MODULE */ #define spi_register_driver(driver) \ __spi_register_driver(THIS_MODULE, driver) /** * module_spi_driver() - Helper macro for registering a SPI driver * @__spi_driver: spi_driver struct * * Helper macro for SPI drivers which do not do anything special in module * init/exit. This eliminates a lot of boilerplate. Each module may only * use this macro once, and calling it replaces module_init() and module_exit() */ #define module_spi_driver(__spi_driver) \ module_driver(__spi_driver, spi_register_driver, \ spi_unregister_driver) /** * struct spi_controller - interface to SPI master or slave controller * @dev: device interface to this driver * @list: link with the global spi_controller list * @bus_num: board-specific (and often SOC-specific) identifier for a * given SPI controller. * @num_chipselect: chipselects are used to distinguish individual * SPI slaves, and are numbered from zero to num_chipselects. * each slave has a chipselect signal, but it's common that not * every chipselect is connected to a slave. * @dma_alignment: SPI controller constraint on DMA buffers alignment. * @mode_bits: flags understood by this controller driver * @buswidth_override_bits: flags to override for this controller driver * @bits_per_word_mask: A mask indicating which values of bits_per_word are * supported by the driver. Bit n indicates that a bits_per_word n+1 is * supported. If set, the SPI core will reject any transfer with an * unsupported bits_per_word. If not set, this value is simply ignored, * and it's up to the individual driver to perform any validation. * @min_speed_hz: Lowest supported transfer speed * @max_speed_hz: Highest supported transfer speed * @flags: other constraints relevant to this driver * @slave: indicates that this is an SPI slave controller * @target: indicates that this is an SPI target controller * @devm_allocated: whether the allocation of this struct is devres-managed * @max_transfer_size: function that returns the max transfer size for * a &spi_device; may be %NULL, so the default %SIZE_MAX will be used. * @max_message_size: function that returns the max message size for * a &spi_device; may be %NULL, so the default %SIZE_MAX will be used. * @io_mutex: mutex for physical bus access * @add_lock: mutex to avoid adding devices to the same chipselect * @bus_lock_spinlock: spinlock for SPI bus locking * @bus_lock_mutex: mutex for exclusion of multiple callers * @bus_lock_flag: indicates that the SPI bus is locked for exclusive use * @setup: updates the device mode and clocking records used by a * device's SPI controller; protocol code may call this. This * must fail if an unrecognized or unsupported mode is requested. * It's always safe to call this unless transfers are pending on * the device whose settings are being modified. * @set_cs_timing: optional hook for SPI devices to request SPI master * controller for configuring specific CS setup time, hold time and inactive * delay interms of clock counts * @transfer: adds a message to the controller's transfer queue. * @cleanup: frees controller-specific state * @can_dma: determine whether this controller supports DMA * @dma_map_dev: device which can be used for DMA mapping * @cur_rx_dma_dev: device which is currently used for RX DMA mapping * @cur_tx_dma_dev: device which is currently used for TX DMA mapping * @queued: whether this controller is providing an internal message queue * @kworker: pointer to thread struct for message pump * @pump_messages: work struct for scheduling work to the message pump * @queue_lock: spinlock to synchronise access to message queue * @queue: message queue * @cur_msg: the currently in-flight message * @cur_msg_completion: a completion for the current in-flight message * @cur_msg_incomplete: Flag used internally to opportunistically skip * the @cur_msg_completion. This flag is used to check if the driver has * already called spi_finalize_current_message(). * @cur_msg_need_completion: Flag used internally to opportunistically skip * the @cur_msg_completion. This flag is used to signal the context that * is running spi_finalize_current_message() that it needs to complete() * @cur_msg_mapped: message has been mapped for DMA * @fallback: fallback to PIO if DMA transfer return failure with * SPI_TRANS_FAIL_NO_START. * @last_cs_mode_high: was (mode & SPI_CS_HIGH) true on the last call to set_cs. * @last_cs: the last chip_select that is recorded by set_cs, -1 on non chip * selected * @xfer_completion: used by core transfer_one_message() * @busy: message pump is busy * @running: message pump is running * @rt: whether this queue is set to run as a realtime task * @auto_runtime_pm: the core should ensure a runtime PM reference is held * while the hardware is prepared, using the parent * device for the spidev * @max_dma_len: Maximum length of a DMA transfer for the device. * @prepare_transfer_hardware: a message will soon arrive from the queue * so the subsystem requests the driver to prepare the transfer hardware * by issuing this call * @transfer_one_message: the subsystem calls the driver to transfer a single * message while queuing transfers that arrive in the meantime. When the * driver is finished with this message, it must call * spi_finalize_current_message() so the subsystem can issue the next * message * @unprepare_transfer_hardware: there are currently no more messages on the * queue so the subsystem notifies the driver that it may relax the * hardware by issuing this call * * @set_cs: set the logic level of the chip select line. May be called * from interrupt context. * @optimize_message: optimize the message for reuse * @unoptimize_message: release resources allocated by optimize_message * @prepare_message: set up the controller to transfer a single message, * for example doing DMA mapping. Called from threaded * context. * @transfer_one: transfer a single spi_transfer. * * - return 0 if the transfer is finished, * - return 1 if the transfer is still in progress. When * the driver is finished with this transfer it must * call spi_finalize_current_transfer() so the subsystem * can issue the next transfer. If the transfer fails, the * driver must set the flag SPI_TRANS_FAIL_IO to * spi_transfer->error first, before calling * spi_finalize_current_transfer(). * Note: transfer_one and transfer_one_message are mutually * exclusive; when both are set, the generic subsystem does * not call your transfer_one callback. * @handle_err: the subsystem calls the driver to handle an error that occurs * in the generic implementation of transfer_one_message(). * @mem_ops: optimized/dedicated operations for interactions with SPI memory. * This field is optional and should only be implemented if the * controller has native support for memory like operations. * @mem_caps: controller capabilities for the handling of memory operations. * @unprepare_message: undo any work done by prepare_message(). * @slave_abort: abort the ongoing transfer request on an SPI slave controller * @target_abort: abort the ongoing transfer request on an SPI target controller * @cs_gpiods: Array of GPIO descriptors to use as chip select lines; one per CS * number. Any individual value may be NULL for CS lines that * are not GPIOs (driven by the SPI controller itself). * @use_gpio_descriptors: Turns on the code in the SPI core to parse and grab * GPIO descriptors. This will fill in @cs_gpiods and SPI devices will have * the cs_gpiod assigned if a GPIO line is found for the chipselect. * @unused_native_cs: When cs_gpiods is used, spi_register_controller() will * fill in this field with the first unused native CS, to be used by SPI * controller drivers that need to drive a native CS when using GPIO CS. * @max_native_cs: When cs_gpiods is used, and this field is filled in, * spi_register_controller() will validate all native CS (including the * unused native CS) against this value. * @pcpu_statistics: statistics for the spi_controller * @dma_tx: DMA transmit channel * @dma_rx: DMA receive channel * @dummy_rx: dummy receive buffer for full-duplex devices * @dummy_tx: dummy transmit buffer for full-duplex devices * @fw_translate_cs: If the boot firmware uses different numbering scheme * what Linux expects, this optional hook can be used to translate * between the two. * @ptp_sts_supported: If the driver sets this to true, it must provide a * time snapshot in @spi_transfer->ptp_sts as close as possible to the * moment in time when @spi_transfer->ptp_sts_word_pre and * @spi_transfer->ptp_sts_word_post were transmitted. * If the driver does not set this, the SPI core takes the snapshot as * close to the driver hand-over as possible. * @irq_flags: Interrupt enable state during PTP system timestamping * @queue_empty: signal green light for opportunistically skipping the queue * for spi_sync transfers. * @must_async: disable all fast paths in the core * * Each SPI controller can communicate with one or more @spi_device * children. These make a small bus, sharing MOSI, MISO and SCK signals * but not chip select signals. Each device may be configured to use a * different clock rate, since those shared signals are ignored unless * the chip is selected. * * The driver for an SPI controller manages access to those devices through * a queue of spi_message transactions, copying data between CPU memory and * an SPI slave device. For each such message it queues, it calls the * message's completion function when the transaction completes. */ struct spi_controller { struct device dev; struct list_head list; /* * Other than negative (== assign one dynamically), bus_num is fully * board-specific. Usually that simplifies to being SoC-specific. * example: one SoC has three SPI controllers, numbered 0..2, * and one board's schematics might show it using SPI-2. Software * would normally use bus_num=2 for that controller. */ s16 bus_num; /* * Chipselects will be integral to many controllers; some others * might use board-specific GPIOs. */ u16 num_chipselect; /* Some SPI controllers pose alignment requirements on DMAable * buffers; let protocol drivers know about these requirements. */ u16 dma_alignment; /* spi_device.mode flags understood by this controller driver */ u32 mode_bits; /* spi_device.mode flags override flags for this controller */ u32 buswidth_override_bits; /* Bitmask of supported bits_per_word for transfers */ u32 bits_per_word_mask; #define SPI_BPW_MASK(bits) BIT((bits) - 1) #define SPI_BPW_RANGE_MASK(min, max) GENMASK((max) - 1, (min) - 1) /* Limits on transfer speed */ u32 min_speed_hz; u32 max_speed_hz; /* Other constraints relevant to this driver */ u16 flags; #define SPI_CONTROLLER_HALF_DUPLEX BIT(0) /* Can't do full duplex */ #define SPI_CONTROLLER_NO_RX BIT(1) /* Can't do buffer read */ #define SPI_CONTROLLER_NO_TX BIT(2) /* Can't do buffer write */ #define SPI_CONTROLLER_MUST_RX BIT(3) /* Requires rx */ #define SPI_CONTROLLER_MUST_TX BIT(4) /* Requires tx */ #define SPI_CONTROLLER_GPIO_SS BIT(5) /* GPIO CS must select slave */ #define SPI_CONTROLLER_SUSPENDED BIT(6) /* Currently suspended */ /* * The spi-controller has multi chip select capability and can * assert/de-assert more than one chip select at once. */ #define SPI_CONTROLLER_MULTI_CS BIT(7) /* Flag indicating if the allocation of this struct is devres-managed */ bool devm_allocated; union { /* Flag indicating this is an SPI slave controller */ bool slave; /* Flag indicating this is an SPI target controller */ bool target; }; /* * On some hardware transfer / message size may be constrained * the limit may depend on device transfer settings. */ size_t (*max_transfer_size)(struct spi_device *spi); size_t (*max_message_size)(struct spi_device *spi); /* I/O mutex */ struct mutex io_mutex; /* Used to avoid adding the same CS twice */ struct mutex add_lock; /* Lock and mutex for SPI bus locking */ spinlock_t bus_lock_spinlock; struct mutex bus_lock_mutex; /* Flag indicating that the SPI bus is locked for exclusive use */ bool bus_lock_flag; /* * Setup mode and clock, etc (SPI driver may call many times). * * IMPORTANT: this may be called when transfers to another * device are active. DO NOT UPDATE SHARED REGISTERS in ways * which could break those transfers. */ int (*setup)(struct spi_device *spi); /* * set_cs_timing() method is for SPI controllers that supports * configuring CS timing. * * This hook allows SPI client drivers to request SPI controllers * to configure specific CS timing through spi_set_cs_timing() after * spi_setup(). */ int (*set_cs_timing)(struct spi_device *spi); /* * Bidirectional bulk transfers * * + The transfer() method may not sleep; its main role is * just to add the message to the queue. * + For now there's no remove-from-queue operation, or * any other request management * + To a given spi_device, message queueing is pure FIFO * * + The controller's main job is to process its message queue, * selecting a chip (for masters), then transferring data * + If there are multiple spi_device children, the i/o queue * arbitration algorithm is unspecified (round robin, FIFO, * priority, reservations, preemption, etc) * * + Chipselect stays active during the entire message * (unless modified by spi_transfer.cs_change != 0). * + The message transfers use clock and SPI mode parameters * previously established by setup() for this device */ int (*transfer)(struct spi_device *spi, struct spi_message *mesg); /* Called on release() to free memory provided by spi_controller */ void (*cleanup)(struct spi_device *spi); /* * Used to enable core support for DMA handling, if can_dma() * exists and returns true then the transfer will be mapped * prior to transfer_one() being called. The driver should * not modify or store xfer and dma_tx and dma_rx must be set * while the device is prepared. */ bool (*can_dma)(struct spi_controller *ctlr, struct spi_device *spi, struct spi_transfer *xfer); struct device *dma_map_dev; struct device *cur_rx_dma_dev; struct device *cur_tx_dma_dev; /* * These hooks are for drivers that want to use the generic * controller transfer queueing mechanism. If these are used, the * transfer() function above must NOT be specified by the driver. * Over time we expect SPI drivers to be phased over to this API. */ bool queued; struct kthread_worker *kworker; struct kthread_work pump_messages; spinlock_t queue_lock; struct list_head queue; struct spi_message *cur_msg; struct completion cur_msg_completion; bool cur_msg_incomplete; bool cur_msg_need_completion; bool busy; bool running; bool rt; bool auto_runtime_pm; bool cur_msg_mapped; bool fallback; bool last_cs_mode_high; s8 last_cs[SPI_CS_CNT_MAX]; u32 last_cs_index_mask : SPI_CS_CNT_MAX; struct completion xfer_completion; size_t max_dma_len; int (*optimize_message)(struct spi_message *msg); int (*unoptimize_message)(struct spi_message *msg); int (*prepare_transfer_hardware)(struct spi_controller *ctlr); int (*transfer_one_message)(struct spi_controller *ctlr, struct spi_message *mesg); int (*unprepare_transfer_hardware)(struct spi_controller *ctlr); int (*prepare_message)(struct spi_controller *ctlr, struct spi_message *message); int (*unprepare_message)(struct spi_controller *ctlr, struct spi_message *message); union { int (*slave_abort)(struct spi_controller *ctlr); int (*target_abort)(struct spi_controller *ctlr); }; /* * These hooks are for drivers that use a generic implementation * of transfer_one_message() provided by the core. */ void (*set_cs)(struct spi_device *spi, bool enable); int (*transfer_one)(struct spi_controller *ctlr, struct spi_device *spi, struct spi_transfer *transfer); void (*handle_err)(struct spi_controller *ctlr, struct spi_message *message); /* Optimized handlers for SPI memory-like operations. */ const struct spi_controller_mem_ops *mem_ops; const struct spi_controller_mem_caps *mem_caps; /* GPIO chip select */ struct gpio_desc **cs_gpiods; bool use_gpio_descriptors; s8 unused_native_cs; s8 max_native_cs; /* Statistics */ struct spi_statistics __percpu *pcpu_statistics; /* DMA channels for use with core dmaengine helpers */ struct dma_chan *dma_tx; struct dma_chan *dma_rx; /* Dummy data for full duplex devices */ void *dummy_rx; void *dummy_tx; int (*fw_translate_cs)(struct spi_controller *ctlr, unsigned cs); /* * Driver sets this field to indicate it is able to snapshot SPI * transfers (needed e.g. for reading the time of POSIX clocks) */ bool ptp_sts_supported; /* Interrupt enable state during PTP system timestamping */ unsigned long irq_flags; /* Flag for enabling opportunistic skipping of the queue in spi_sync */ bool queue_empty; bool must_async; }; static inline void *spi_controller_get_devdata(struct spi_controller *ctlr) { return dev_get_drvdata(&ctlr->dev); } static inline void spi_controller_set_devdata(struct spi_controller *ctlr, void *data) { dev_set_drvdata(&ctlr->dev, data); } static inline struct spi_controller *spi_controller_get(struct spi_controller *ctlr) { if (!ctlr || !get_device(&ctlr->dev)) return NULL; return ctlr; } static inline void spi_controller_put(struct spi_controller *ctlr) { if (ctlr) put_device(&ctlr->dev); } static inline bool spi_controller_is_slave(struct spi_controller *ctlr) { return IS_ENABLED(CONFIG_SPI_SLAVE) && ctlr->slave; } static inline bool spi_controller_is_target(struct spi_controller *ctlr) { return IS_ENABLED(CONFIG_SPI_SLAVE) && ctlr->target; } /* PM calls that need to be issued by the driver */ extern int spi_controller_suspend(struct spi_controller *ctlr); extern int spi_controller_resume(struct spi_controller *ctlr); /* Calls the driver make to interact with the message queue */ extern struct spi_message *spi_get_next_queued_message(struct spi_controller *ctlr); extern void spi_finalize_current_message(struct spi_controller *ctlr); extern void spi_finalize_current_transfer(struct spi_controller *ctlr); /* Helper calls for driver to timestamp transfer */ void spi_take_timestamp_pre(struct spi_controller *ctlr, struct spi_transfer *xfer, size_t progress, bool irqs_off); void spi_take_timestamp_post(struct spi_controller *ctlr, struct spi_transfer *xfer, size_t progress, bool irqs_off); /* The SPI driver core manages memory for the spi_controller classdev */ extern struct spi_controller *__spi_alloc_controller(struct device *host, unsigned int size, bool slave); static inline struct spi_controller *spi_alloc_master(struct device *host, unsigned int size) { return __spi_alloc_controller(host, size, false); } static inline struct spi_controller *spi_alloc_slave(struct device *host, unsigned int size) { if (!IS_ENABLED(CONFIG_SPI_SLAVE)) return NULL; return __spi_alloc_controller(host, size, true); } static inline struct spi_controller *spi_alloc_host(struct device *dev, unsigned int size) { return __spi_alloc_controller(dev, size, false); } static inline struct spi_controller *spi_alloc_target(struct device *dev, unsigned int size) { if (!IS_ENABLED(CONFIG_SPI_SLAVE)) return NULL; return __spi_alloc_controller(dev, size, true); } struct spi_controller *__devm_spi_alloc_controller(struct device *dev, unsigned int size, bool slave); static inline struct spi_controller *devm_spi_alloc_master(struct device *dev, unsigned int size) { return __devm_spi_alloc_controller(dev, size, false); } static inline struct spi_controller *devm_spi_alloc_slave(struct device *dev, unsigned int size) { if (!IS_ENABLED(CONFIG_SPI_SLAVE)) return NULL; return __devm_spi_alloc_controller(dev, size, true); } static inline struct spi_controller *devm_spi_alloc_host(struct device *dev, unsigned int size) { return __devm_spi_alloc_controller(dev, size, false); } static inline struct spi_controller *devm_spi_alloc_target(struct device *dev, unsigned int size) { if (!IS_ENABLED(CONFIG_SPI_SLAVE)) return NULL; return __devm_spi_alloc_controller(dev, size, true); } extern int spi_register_controller(struct spi_controller *ctlr); extern int devm_spi_register_controller(struct device *dev, struct spi_controller *ctlr); extern void spi_unregister_controller(struct spi_controller *ctlr); #if IS_ENABLED(CONFIG_ACPI) extern struct spi_controller *acpi_spi_find_controller_by_adev(struct acpi_device *adev); extern struct spi_device *acpi_spi_device_alloc(struct spi_controller *ctlr, struct acpi_device *adev, int index); int acpi_spi_count_resources(struct acpi_device *adev); #endif /* * SPI resource management while processing a SPI message */ typedef void (*spi_res_release_t)(struct spi_controller *ctlr, struct spi_message *msg, void *res); /** * struct spi_res - SPI resource management structure * @entry: list entry * @release: release code called prior to freeing this resource * @data: extra data allocated for the specific use-case * * This is based on ideas from devres, but focused on life-cycle * management during spi_message processing. */ struct spi_res { struct list_head entry; spi_res_release_t release; unsigned long long data[]; /* Guarantee ull alignment */ }; /*---------------------------------------------------------------------------*/ /* * I/O INTERFACE between SPI controller and protocol drivers * * Protocol drivers use a queue of spi_messages, each transferring data * between the controller and memory buffers. * * The spi_messages themselves consist of a series of read+write transfer * segments. Those segments always read the same number of bits as they * write; but one or the other is easily ignored by passing a NULL buffer * pointer. (This is unlike most types of I/O API, because SPI hardware * is full duplex.) * * NOTE: Allocation of spi_transfer and spi_message memory is entirely * up to the protocol driver, which guarantees the integrity of both (as * well as the data buffers) for as long as the message is queued. */ /** * struct spi_transfer - a read/write buffer pair * @tx_buf: data to be written (DMA-safe memory), or NULL * @rx_buf: data to be read (DMA-safe memory), or NULL * @tx_dma: DMA address of tx_buf, if @spi_message.is_dma_mapped * @rx_dma: DMA address of rx_buf, if @spi_message.is_dma_mapped * @tx_nbits: number of bits used for writing. If 0 the default * (SPI_NBITS_SINGLE) is used. * @rx_nbits: number of bits used for reading. If 0 the default * (SPI_NBITS_SINGLE) is used. * @len: size of rx and tx buffers (in bytes) * @speed_hz: Select a speed other than the device default for this * transfer. If 0 the default (from @spi_device) is used. * @bits_per_word: select a bits_per_word other than the device default * for this transfer. If 0 the default (from @spi_device) is used. * @dummy_data: indicates transfer is dummy bytes transfer. * @cs_off: performs the transfer with chipselect off. * @cs_change: affects chipselect after this transfer completes * @cs_change_delay: delay between cs deassert and assert when * @cs_change is set and @spi_transfer is not the last in @spi_message * @delay: delay to be introduced after this transfer before * (optionally) changing the chipselect status, then starting * the next transfer or completing this @spi_message. * @word_delay: inter word delay to be introduced after each word size * (set by bits_per_word) transmission. * @effective_speed_hz: the effective SCK-speed that was used to * transfer this transfer. Set to 0 if the SPI bus driver does * not support it. * @transfer_list: transfers are sequenced through @spi_message.transfers * @tx_sg: Scatterlist for transmit, currently not for client use * @rx_sg: Scatterlist for receive, currently not for client use * @ptp_sts_word_pre: The word (subject to bits_per_word semantics) offset * within @tx_buf for which the SPI device is requesting that the time * snapshot for this transfer begins. Upon completing the SPI transfer, * this value may have changed compared to what was requested, depending * on the available snapshotting resolution (DMA transfer, * @ptp_sts_supported is false, etc). * @ptp_sts_word_post: See @ptp_sts_word_post. The two can be equal (meaning * that a single byte should be snapshotted). * If the core takes care of the timestamp (if @ptp_sts_supported is false * for this controller), it will set @ptp_sts_word_pre to 0, and * @ptp_sts_word_post to the length of the transfer. This is done * purposefully (instead of setting to spi_transfer->len - 1) to denote * that a transfer-level snapshot taken from within the driver may still * be of higher quality. * @ptp_sts: Pointer to a memory location held by the SPI slave device where a * PTP system timestamp structure may lie. If drivers use PIO or their * hardware has some sort of assist for retrieving exact transfer timing, * they can (and should) assert @ptp_sts_supported and populate this * structure using the ptp_read_system_*ts helper functions. * The timestamp must represent the time at which the SPI slave device has * processed the word, i.e. the "pre" timestamp should be taken before * transmitting the "pre" word, and the "post" timestamp after receiving * transmit confirmation from the controller for the "post" word. * @timestamped: true if the transfer has been timestamped * @error: Error status logged by SPI controller driver. * * SPI transfers always write the same number of bytes as they read. * Protocol drivers should always provide @rx_buf and/or @tx_buf. * In some cases, they may also want to provide DMA addresses for * the data being transferred; that may reduce overhead, when the * underlying driver uses DMA. * * If the transmit buffer is NULL, zeroes will be shifted out * while filling @rx_buf. If the receive buffer is NULL, the data * shifted in will be discarded. Only "len" bytes shift out (or in). * It's an error to try to shift out a partial word. (For example, by * shifting out three bytes with word size of sixteen or twenty bits; * the former uses two bytes per word, the latter uses four bytes.) * * In-memory data values are always in native CPU byte order, translated * from the wire byte order (big-endian except with SPI_LSB_FIRST). So * for example when bits_per_word is sixteen, buffers are 2N bytes long * (@len = 2N) and hold N sixteen bit words in CPU byte order. * * When the word size of the SPI transfer is not a power-of-two multiple * of eight bits, those in-memory words include extra bits. In-memory * words are always seen by protocol drivers as right-justified, so the * undefined (rx) or unused (tx) bits are always the most significant bits. * * All SPI transfers start with the relevant chipselect active. Normally * it stays selected until after the last transfer in a message. Drivers * can affect the chipselect signal using cs_change. * * (i) If the transfer isn't the last one in the message, this flag is * used to make the chipselect briefly go inactive in the middle of the * message. Toggling chipselect in this way may be needed to terminate * a chip command, letting a single spi_message perform all of group of * chip transactions together. * * (ii) When the transfer is the last one in the message, the chip may * stay selected until the next transfer. On multi-device SPI busses * with nothing blocking messages going to other devices, this is just * a performance hint; starting a message to another device deselects * this one. But in other cases, this can be used to ensure correctness. * Some devices need protocol transactions to be built from a series of * spi_message submissions, where the content of one message is determined * by the results of previous messages and where the whole transaction * ends when the chipselect goes inactive. * * When SPI can transfer in 1x,2x or 4x. It can get this transfer information * from device through @tx_nbits and @rx_nbits. In Bi-direction, these * two should both be set. User can set transfer mode with SPI_NBITS_SINGLE(1x) * SPI_NBITS_DUAL(2x) and SPI_NBITS_QUAD(4x) to support these three transfer. * * The code that submits an spi_message (and its spi_transfers) * to the lower layers is responsible for managing its memory. * Zero-initialize every field you don't set up explicitly, to * insulate against future API updates. After you submit a message * and its transfers, ignore them until its completion callback. */ struct spi_transfer { /* * It's okay if tx_buf == rx_buf (right?). * For MicroWire, one buffer must be NULL. * Buffers must work with dma_*map_single() calls, unless * spi_message.is_dma_mapped reports a pre-existing mapping. */ const void *tx_buf; void *rx_buf; unsigned len; #define SPI_TRANS_FAIL_NO_START BIT(0) #define SPI_TRANS_FAIL_IO BIT(1) u16 error; dma_addr_t tx_dma; dma_addr_t rx_dma; struct sg_table tx_sg; struct sg_table rx_sg; unsigned dummy_data:1; unsigned cs_off:1; unsigned cs_change:1; unsigned tx_nbits:3; unsigned rx_nbits:3; unsigned timestamped:1; #define SPI_NBITS_SINGLE 0x01 /* 1-bit transfer */ #define SPI_NBITS_DUAL 0x02 /* 2-bit transfer */ #define SPI_NBITS_QUAD 0x04 /* 4-bit transfer */ u8 bits_per_word; struct spi_delay delay; struct spi_delay cs_change_delay; struct spi_delay word_delay; u32 speed_hz; u32 effective_speed_hz; unsigned int ptp_sts_word_pre; unsigned int ptp_sts_word_post; struct ptp_system_timestamp *ptp_sts; struct list_head transfer_list; }; /** * struct spi_message - one multi-segment SPI transaction * @transfers: list of transfer segments in this transaction * @spi: SPI device to which the transaction is queued * @is_dma_mapped: if true, the caller provided both DMA and CPU virtual * addresses for each transfer buffer * @pre_optimized: peripheral driver pre-optimized the message * @optimized: the message is in the optimized state * @prepared: spi_prepare_message was called for the this message * @status: zero for success, else negative errno * @complete: called to report transaction completions * @context: the argument to complete() when it's called * @frame_length: the total number of bytes in the message * @actual_length: the total number of bytes that were transferred in all * successful segments * @queue: for use by whichever driver currently owns the message * @state: for use by whichever driver currently owns the message * @opt_state: for use by whichever driver currently owns the message * @resources: for resource management when the SPI message is processed * * A @spi_message is used to execute an atomic sequence of data transfers, * each represented by a struct spi_transfer. The sequence is "atomic" * in the sense that no other spi_message may use that SPI bus until that * sequence completes. On some systems, many such sequences can execute as * a single programmed DMA transfer. On all systems, these messages are * queued, and might complete after transactions to other devices. Messages * sent to a given spi_device are always executed in FIFO order. * * The code that submits an spi_message (and its spi_transfers) * to the lower layers is responsible for managing its memory. * Zero-initialize every field you don't set up explicitly, to * insulate against future API updates. After you submit a message * and its transfers, ignore them until its completion callback. */ struct spi_message { struct list_head transfers; struct spi_device *spi; unsigned is_dma_mapped:1; /* spi_optimize_message() was called for this message */ bool pre_optimized; /* __spi_optimize_message() was called for this message */ bool optimized; /* spi_prepare_message() was called for this message */ bool prepared; /* * REVISIT: we might want a flag affecting the behavior of the * last transfer ... allowing things like "read 16 bit length L" * immediately followed by "read L bytes". Basically imposing * a specific message scheduling algorithm. * * Some controller drivers (message-at-a-time queue processing) * could provide that as their default scheduling algorithm. But * others (with multi-message pipelines) could need a flag to * tell them about such special cases. */ /* Completion is reported through a callback */ int status; void (*complete)(void *context); void *context; unsigned frame_length; unsigned actual_length; /* * For optional use by whatever driver currently owns the * spi_message ... between calls to spi_async and then later * complete(), that's the spi_controller controller driver. */ struct list_head queue; void *state; /* * Optional state for use by controller driver between calls to * __spi_optimize_message() and __spi_unoptimize_message(). */ void *opt_state; /* List of spi_res resources when the SPI message is processed */ struct list_head resources; }; static inline void spi_message_init_no_memset(struct spi_message *m) { INIT_LIST_HEAD(&m->transfers); INIT_LIST_HEAD(&m->resources); } static inline void spi_message_init(struct spi_message *m) { memset(m, 0, sizeof *m); spi_message_init_no_memset(m); } static inline void spi_message_add_tail(struct spi_transfer *t, struct spi_message *m) { list_add_tail(&t->transfer_list, &m->transfers); } static inline void spi_transfer_del(struct spi_transfer *t) { list_del(&t->transfer_list); } static inline int spi_transfer_delay_exec(struct spi_transfer *t) { return spi_delay_exec(&t->delay, t); } /** * spi_message_init_with_transfers - Initialize spi_message and append transfers * @m: spi_message to be initialized * @xfers: An array of SPI transfers * @num_xfers: Number of items in the xfer array * * This function initializes the given spi_message and adds each spi_transfer in * the given array to the message. */ static inline void spi_message_init_with_transfers(struct spi_message *m, struct spi_transfer *xfers, unsigned int num_xfers) { unsigned int i; spi_message_init(m); for (i = 0; i < num_xfers; ++i) spi_message_add_tail(&xfers[i], m); } /* * It's fine to embed message and transaction structures in other data * structures so long as you don't free them while they're in use. */ static inline struct spi_message *spi_message_alloc(unsigned ntrans, gfp_t flags) { struct spi_message_with_transfers { struct spi_message m; struct spi_transfer t[]; } *mwt; unsigned i; mwt = kzalloc(struct_size(mwt, t, ntrans), flags); if (!mwt) return NULL; spi_message_init_no_memset(&mwt->m); for (i = 0; i < ntrans; i++) spi_message_add_tail(&mwt->t[i], &mwt->m); return &mwt->m; } static inline void spi_message_free(struct spi_message *m) { kfree(m); } extern int spi_optimize_message(struct spi_device *spi, struct spi_message *msg); extern void spi_unoptimize_message(struct spi_message *msg); extern int spi_setup(struct spi_device *spi); extern int spi_async(struct spi_device *spi, struct spi_message *message); extern int spi_slave_abort(struct spi_device *spi); extern int spi_target_abort(struct spi_device *spi); static inline size_t spi_max_message_size(struct spi_device *spi) { struct spi_controller *ctlr = spi->controller; if (!ctlr->max_message_size) return SIZE_MAX; return ctlr->max_message_size(spi); } static inline size_t spi_max_transfer_size(struct spi_device *spi) { struct spi_controller *ctlr = spi->controller; size_t tr_max = SIZE_MAX; size_t msg_max = spi_max_message_size(spi); if (ctlr->max_transfer_size) tr_max = ctlr->max_transfer_size(spi); /* Transfer size limit must not be greater than message size limit */ return min(tr_max, msg_max); } /** * spi_is_bpw_supported - Check if bits per word is supported * @spi: SPI device * @bpw: Bits per word * * This function checks to see if the SPI controller supports @bpw. * * Returns: * True if @bpw is supported, false otherwise. */ static inline bool spi_is_bpw_supported(struct spi_device *spi, u32 bpw) { u32 bpw_mask = spi->controller->bits_per_word_mask; if (bpw == 8 || (bpw <= 32 && bpw_mask & SPI_BPW_MASK(bpw))) return true; return false; } /** * spi_controller_xfer_timeout - Compute a suitable timeout value * @ctlr: SPI device * @xfer: Transfer descriptor * * Compute a relevant timeout value for the given transfer. We derive the time * that it would take on a single data line and take twice this amount of time * with a minimum of 500ms to avoid false positives on loaded systems. * * Returns: Transfer timeout value in milliseconds. */ static inline unsigned int spi_controller_xfer_timeout(struct spi_controller *ctlr, struct spi_transfer *xfer) { return max(xfer->len * 8 * 2 / (xfer->speed_hz / 1000), 500U); } /*---------------------------------------------------------------------------*/ /* SPI transfer replacement methods which make use of spi_res */ struct spi_replaced_transfers; typedef void (*spi_replaced_release_t)(struct spi_controller *ctlr, struct spi_message *msg, struct spi_replaced_transfers *res); /** * struct spi_replaced_transfers - structure describing the spi_transfer * replacements that have occurred * so that they can get reverted * @release: some extra release code to get executed prior to * releasing this structure * @extradata: pointer to some extra data if requested or NULL * @replaced_transfers: transfers that have been replaced and which need * to get restored * @replaced_after: the transfer after which the @replaced_transfers * are to get re-inserted * @inserted: number of transfers inserted * @inserted_transfers: array of spi_transfers of array-size @inserted, * that have been replacing replaced_transfers * * Note: that @extradata will point to @inserted_transfers[@inserted] * if some extra allocation is requested, so alignment will be the same * as for spi_transfers. */ struct spi_replaced_transfers { spi_replaced_release_t release; void *extradata; struct list_head replaced_transfers; struct list_head *replaced_after; size_t inserted; struct spi_transfer inserted_transfers[]; }; /*---------------------------------------------------------------------------*/ /* SPI transfer transformation methods */ extern int spi_split_transfers_maxsize(struct spi_controller *ctlr, struct spi_message *msg, size_t maxsize); extern int spi_split_transfers_maxwords(struct spi_controller *ctlr, struct spi_message *msg, size_t maxwords); /*---------------------------------------------------------------------------*/ /* * All these synchronous SPI transfer routines are utilities layered * over the core async transfer primitive. Here, "synchronous" means * they will sleep uninterruptibly until the async transfer completes. */ extern int spi_sync(struct spi_device *spi, struct spi_message *message); extern int spi_sync_locked(struct spi_device *spi, struct spi_message *message); extern int spi_bus_lock(struct spi_controller *ctlr); extern int spi_bus_unlock(struct spi_controller *ctlr); /** * spi_sync_transfer - synchronous SPI data transfer * @spi: device with which data will be exchanged * @xfers: An array of spi_transfers * @num_xfers: Number of items in the xfer array * Context: can sleep * * Does a synchronous SPI data transfer of the given spi_transfer array. * * For more specific semantics see spi_sync(). * * Return: zero on success, else a negative error code. */ static inline int spi_sync_transfer(struct spi_device *spi, struct spi_transfer *xfers, unsigned int num_xfers) { struct spi_message msg; spi_message_init_with_transfers(&msg, xfers, num_xfers); return spi_sync(spi, &msg); } /** * spi_write - SPI synchronous write * @spi: device to which data will be written * @buf: data buffer * @len: data buffer size * Context: can sleep * * This function writes the buffer @buf. * Callable only from contexts that can sleep. * * Return: zero on success, else a negative error code. */ static inline int spi_write(struct spi_device *spi, const void *buf, size_t len) { struct spi_transfer t = { .tx_buf = buf, .len = len, }; return spi_sync_transfer(spi, &t, 1); } /** * spi_read - SPI synchronous read * @spi: device from which data will be read * @buf: data buffer * @len: data buffer size * Context: can sleep * * This function reads the buffer @buf. * Callable only from contexts that can sleep. * * Return: zero on success, else a negative error code. */ static inline int spi_read(struct spi_device *spi, void *buf, size_t len) { struct spi_transfer t = { .rx_buf = buf, .len = len, }; return spi_sync_transfer(spi, &t, 1); } /* This copies txbuf and rxbuf data; for small transfers only! */ extern int spi_write_then_read(struct spi_device *spi, const void *txbuf, unsigned n_tx, void *rxbuf, unsigned n_rx); /** * spi_w8r8 - SPI synchronous 8 bit write followed by 8 bit read * @spi: device with which data will be exchanged * @cmd: command to be written before data is read back * Context: can sleep * * Callable only from contexts that can sleep. * * Return: the (unsigned) eight bit number returned by the * device, or else a negative error code. */ static inline ssize_t spi_w8r8(struct spi_device *spi, u8 cmd) { ssize_t status; u8 result; status = spi_write_then_read(spi, &cmd, 1, &result, 1); /* Return negative errno or unsigned value */ return (status < 0) ? status : result; } /** * spi_w8r16 - SPI synchronous 8 bit write followed by 16 bit read * @spi: device with which data will be exchanged * @cmd: command to be written before data is read back * Context: can sleep * * The number is returned in wire-order, which is at least sometimes * big-endian. * * Callable only from contexts that can sleep. * * Return: the (unsigned) sixteen bit number returned by the * device, or else a negative error code. */ static inline ssize_t spi_w8r16(struct spi_device *spi, u8 cmd) { ssize_t status; u16 result; status = spi_write_then_read(spi, &cmd, 1, &result, 2); /* Return negative errno or unsigned value */ return (status < 0) ? status : result; } /** * spi_w8r16be - SPI synchronous 8 bit write followed by 16 bit big-endian read * @spi: device with which data will be exchanged * @cmd: command to be written before data is read back * Context: can sleep * * This function is similar to spi_w8r16, with the exception that it will * convert the read 16 bit data word from big-endian to native endianness. * * Callable only from contexts that can sleep. * * Return: the (unsigned) sixteen bit number returned by the device in CPU * endianness, or else a negative error code. */ static inline ssize_t spi_w8r16be(struct spi_device *spi, u8 cmd) { ssize_t status; __be16 result; status = spi_write_then_read(spi, &cmd, 1, &result, 2); if (status < 0) return status; return be16_to_cpu(result); } /*---------------------------------------------------------------------------*/ /* * INTERFACE between board init code and SPI infrastructure. * * No SPI driver ever sees these SPI device table segments, but * it's how the SPI core (or adapters that get hotplugged) grows * the driver model tree. * * As a rule, SPI devices can't be probed. Instead, board init code * provides a table listing the devices which are present, with enough * information to bind and set up the device's driver. There's basic * support for non-static configurations too; enough to handle adding * parport adapters, or microcontrollers acting as USB-to-SPI bridges. */ /** * struct spi_board_info - board-specific template for a SPI device * @modalias: Initializes spi_device.modalias; identifies the driver. * @platform_data: Initializes spi_device.platform_data; the particular * data stored there is driver-specific. * @swnode: Software node for the device. * @controller_data: Initializes spi_device.controller_data; some * controllers need hints about hardware setup, e.g. for DMA. * @irq: Initializes spi_device.irq; depends on how the board is wired. * @max_speed_hz: Initializes spi_device.max_speed_hz; based on limits * from the chip datasheet and board-specific signal quality issues. * @bus_num: Identifies which spi_controller parents the spi_device; unused * by spi_new_device(), and otherwise depends on board wiring. * @chip_select: Initializes spi_device.chip_select; depends on how * the board is wired. * @mode: Initializes spi_device.mode; based on the chip datasheet, board * wiring (some devices support both 3WIRE and standard modes), and * possibly presence of an inverter in the chipselect path. * * When adding new SPI devices to the device tree, these structures serve * as a partial device template. They hold information which can't always * be determined by drivers. Information that probe() can establish (such * as the default transfer wordsize) is not included here. * * These structures are used in two places. Their primary role is to * be stored in tables of board-specific device descriptors, which are * declared early in board initialization and then used (much later) to * populate a controller's device tree after the that controller's driver * initializes. A secondary (and atypical) role is as a parameter to * spi_new_device() call, which happens after those controller drivers * are active in some dynamic board configuration models. */ struct spi_board_info { /* * The device name and module name are coupled, like platform_bus; * "modalias" is normally the driver name. * * platform_data goes to spi_device.dev.platform_data, * controller_data goes to spi_device.controller_data, * IRQ is copied too. */ char modalias[SPI_NAME_SIZE]; const void *platform_data; const struct software_node *swnode; void *controller_data; int irq; /* Slower signaling on noisy or low voltage boards */ u32 max_speed_hz; /* * bus_num is board specific and matches the bus_num of some * spi_controller that will probably be registered later. * * chip_select reflects how this chip is wired to that master; * it's less than num_chipselect. */ u16 bus_num; u16 chip_select; /* * mode becomes spi_device.mode, and is essential for chips * where the default of SPI_CS_HIGH = 0 is wrong. */ u32 mode; /* * ... may need additional spi_device chip config data here. * avoid stuff protocol drivers can set; but include stuff * needed to behave without being bound to a driver: * - quirks like clock rate mattering when not selected */ }; #ifdef CONFIG_SPI extern int spi_register_board_info(struct spi_board_info const *info, unsigned n); #else /* Board init code may ignore whether SPI is configured or not */ static inline int spi_register_board_info(struct spi_board_info const *info, unsigned n) { return 0; } #endif /* * If you're hotplugging an adapter with devices (parport, USB, etc) * use spi_new_device() to describe each device. You can also call * spi_unregister_device() to start making that device vanish, but * normally that would be handled by spi_unregister_controller(). * * You can also use spi_alloc_device() and spi_add_device() to use a two * stage registration sequence for each spi_device. This gives the caller * some more control over the spi_device structure before it is registered, * but requires that caller to initialize fields that would otherwise * be defined using the board info. */ extern struct spi_device * spi_alloc_device(struct spi_controller *ctlr); extern int spi_add_device(struct spi_device *spi); extern struct spi_device * spi_new_device(struct spi_controller *, struct spi_board_info *); extern void spi_unregister_device(struct spi_device *spi); extern const struct spi_device_id * spi_get_device_id(const struct spi_device *sdev); extern const void * spi_get_device_match_data(const struct spi_device *sdev); static inline bool spi_transfer_is_last(struct spi_controller *ctlr, struct spi_transfer *xfer) { return list_is_last(&xfer->transfer_list, &ctlr->cur_msg->transfers); } #endif /* __LINUX_SPI_H */
3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (C) 2008 IBM Corporation * * Authors: * Mimi Zohar <zohar@us.ibm.com> * * File: integrity_iint.c * - initialize the integrity directory in securityfs * - load IMA and EVM keys */ #include <linux/security.h> #include "integrity.h" struct dentry *integrity_dir; /* * integrity_kernel_read - read data from the file * * This is a function for reading file content instead of kernel_read(). * It does not perform locking checks to ensure it cannot be blocked. * It does not perform security checks because it is irrelevant for IMA. * */ int integrity_kernel_read(struct file *file, loff_t offset, void *addr, unsigned long count) { return __kernel_read(file, addr, count, &offset); } /* * integrity_load_keys - load integrity keys hook * * Hooks is called from init/main.c:kernel_init_freeable() * when rootfs is ready */ void __init integrity_load_keys(void) { ima_load_x509(); if (!IS_ENABLED(CONFIG_IMA_LOAD_X509)) evm_load_x509(); } static int __init integrity_fs_init(void) { integrity_dir = securityfs_create_dir("integrity", NULL); if (IS_ERR(integrity_dir)) { int ret = PTR_ERR(integrity_dir); if (ret != -ENODEV) pr_err("Unable to create integrity sysfs dir: %d\n", ret); integrity_dir = NULL; return ret; } return 0; } late_initcall(integrity_fs_init)
261 262 262 260 260 262 261 262 260 261 260 385 429 390 392 391 2 2 2 2 2 2 2 2 3 3 3 3 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 136 136 25 25 25 25 14 120 120 15 135 134 2 2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 // SPDX-License-Identifier: GPL-2.0-only #include <linux/bitmap.h> #include <linux/bug.h> #include <linux/export.h> #include <linux/idr.h> #include <linux/slab.h> #include <linux/spinlock.h> #include <linux/xarray.h> /** * idr_alloc_u32() - Allocate an ID. * @idr: IDR handle. * @ptr: Pointer to be associated with the new ID. * @nextid: Pointer to an ID. * @max: The maximum ID to allocate (inclusive). * @gfp: Memory allocation flags. * * Allocates an unused ID in the range specified by @nextid and @max. * Note that @max is inclusive whereas the @end parameter to idr_alloc() * is exclusive. The new ID is assigned to @nextid before the pointer * is inserted into the IDR, so if @nextid points into the object pointed * to by @ptr, a concurrent lookup will not find an uninitialised ID. * * The caller should provide their own locking to ensure that two * concurrent modifications to the IDR are not possible. Read-only * accesses to the IDR may be done under the RCU read lock or may * exclude simultaneous writers. * * Return: 0 if an ID was allocated, -ENOMEM if memory allocation failed, * or -ENOSPC if no free IDs could be found. If an error occurred, * @nextid is unchanged. */ int idr_alloc_u32(struct idr *idr, void *ptr, u32 *nextid, unsigned long max, gfp_t gfp) { struct radix_tree_iter iter; void __rcu **slot; unsigned int base = idr->idr_base; unsigned int id = *nextid; if (WARN_ON_ONCE(!(idr->idr_rt.xa_flags & ROOT_IS_IDR))) idr->idr_rt.xa_flags |= IDR_RT_MARKER; id = (id < base) ? 0 : id - base; radix_tree_iter_init(&iter, id); slot = idr_get_free(&idr->idr_rt, &iter, gfp, max - base); if (IS_ERR(slot)) return PTR_ERR(slot); *nextid = iter.index + base; /* there is a memory barrier inside radix_tree_iter_replace() */ radix_tree_iter_replace(&idr->idr_rt, &iter, slot, ptr); radix_tree_iter_tag_clear(&idr->idr_rt, &iter, IDR_FREE); return 0; } EXPORT_SYMBOL_GPL(idr_alloc_u32); /** * idr_alloc() - Allocate an ID. * @idr: IDR handle. * @ptr: Pointer to be associated with the new ID. * @start: The minimum ID (inclusive). * @end: The maximum ID (exclusive). * @gfp: Memory allocation flags. * * Allocates an unused ID in the range specified by @start and @end. If * @end is <= 0, it is treated as one larger than %INT_MAX. This allows * callers to use @start + N as @end as long as N is within integer range. * * The caller should provide their own locking to ensure that two * concurrent modifications to the IDR are not possible. Read-only * accesses to the IDR may be done under the RCU read lock or may * exclude simultaneous writers. * * Return: The newly allocated ID, -ENOMEM if memory allocation failed, * or -ENOSPC if no free IDs could be found. */ int idr_alloc(struct idr *idr, void *ptr, int start, int end, gfp_t gfp) { u32 id = start; int ret; if (WARN_ON_ONCE(start < 0)) return -EINVAL; ret = idr_alloc_u32(idr, ptr, &id, end > 0 ? end - 1 : INT_MAX, gfp); if (ret) return ret; return id; } EXPORT_SYMBOL_GPL(idr_alloc); /** * idr_alloc_cyclic() - Allocate an ID cyclically. * @idr: IDR handle. * @ptr: Pointer to be associated with the new ID. * @start: The minimum ID (inclusive). * @end: The maximum ID (exclusive). * @gfp: Memory allocation flags. * * Allocates an unused ID in the range specified by @start and @end. If * @end is <= 0, it is treated as one larger than %INT_MAX. This allows * callers to use @start + N as @end as long as N is within integer range. * The search for an unused ID will start at the last ID allocated and will * wrap around to @start if no free IDs are found before reaching @end. * * The caller should provide their own locking to ensure that two * concurrent modifications to the IDR are not possible. Read-only * accesses to the IDR may be done under the RCU read lock or may * exclude simultaneous writers. * * Return: The newly allocated ID, -ENOMEM if memory allocation failed, * or -ENOSPC if no free IDs could be found. */ int idr_alloc_cyclic(struct idr *idr, void *ptr, int start, int end, gfp_t gfp) { u32 id = idr->idr_next; int err, max = end > 0 ? end - 1 : INT_MAX; if ((int)id < start) id = start; err = idr_alloc_u32(idr, ptr, &id, max, gfp); if ((err == -ENOSPC) && (id > start)) { id = start; err = idr_alloc_u32(idr, ptr, &id, max, gfp); } if (err) return err; idr->idr_next = id + 1; return id; } EXPORT_SYMBOL(idr_alloc_cyclic); /** * idr_remove() - Remove an ID from the IDR. * @idr: IDR handle. * @id: Pointer ID. * * Removes this ID from the IDR. If the ID was not previously in the IDR, * this function returns %NULL. * * Since this function modifies the IDR, the caller should provide their * own locking to ensure that concurrent modification of the same IDR is * not possible. * * Return: The pointer formerly associated with this ID. */ void *idr_remove(struct idr *idr, unsigned long id) { return radix_tree_delete_item(&idr->idr_rt, id - idr->idr_base, NULL); } EXPORT_SYMBOL_GPL(idr_remove); /** * idr_find() - Return pointer for given ID. * @idr: IDR handle. * @id: Pointer ID. * * Looks up the pointer associated with this ID. A %NULL pointer may * indicate that @id is not allocated or that the %NULL pointer was * associated with this ID. * * This function can be called under rcu_read_lock(), given that the leaf * pointers lifetimes are correctly managed. * * Return: The pointer associated with this ID. */ void *idr_find(const struct idr *idr, unsigned long id) { return radix_tree_lookup(&idr->idr_rt, id - idr->idr_base); } EXPORT_SYMBOL_GPL(idr_find); /** * idr_for_each() - Iterate through all stored pointers. * @idr: IDR handle. * @fn: Function to be called for each pointer. * @data: Data passed to callback function. * * The callback function will be called for each entry in @idr, passing * the ID, the entry and @data. * * If @fn returns anything other than %0, the iteration stops and that * value is returned from this function. * * idr_for_each() can be called concurrently with idr_alloc() and * idr_remove() if protected by RCU. Newly added entries may not be * seen and deleted entries may be seen, but adding and removing entries * will not cause other entries to be skipped, nor spurious ones to be seen. */ int idr_for_each(const struct idr *idr, int (*fn)(int id, void *p, void *data), void *data) { struct radix_tree_iter iter; void __rcu **slot; int base = idr->idr_base; radix_tree_for_each_slot(slot, &idr->idr_rt, &iter, 0) { int ret; unsigned long id = iter.index + base; if (WARN_ON_ONCE(id > INT_MAX)) break; ret = fn(id, rcu_dereference_raw(*slot), data); if (ret) return ret; } return 0; } EXPORT_SYMBOL(idr_for_each); /** * idr_get_next_ul() - Find next populated entry. * @idr: IDR handle. * @nextid: Pointer to an ID. * * Returns the next populated entry in the tree with an ID greater than * or equal to the value pointed to by @nextid. On exit, @nextid is updated * to the ID of the found value. To use in a loop, the value pointed to by * nextid must be incremented by the user. */ void *idr_get_next_ul(struct idr *idr, unsigned long *nextid) { struct radix_tree_iter iter; void __rcu **slot; void *entry = NULL; unsigned long base = idr->idr_base; unsigned long id = *nextid; id = (id < base) ? 0 : id - base; radix_tree_for_each_slot(slot, &idr->idr_rt, &iter, id) { entry = rcu_dereference_raw(*slot); if (!entry) continue; if (!xa_is_internal(entry)) break; if (slot != &idr->idr_rt.xa_head && !xa_is_retry(entry)) break; slot = radix_tree_iter_retry(&iter); } if (!slot) return NULL; *nextid = iter.index + base; return entry; } EXPORT_SYMBOL(idr_get_next_ul); /** * idr_get_next() - Find next populated entry. * @idr: IDR handle. * @nextid: Pointer to an ID. * * Returns the next populated entry in the tree with an ID greater than * or equal to the value pointed to by @nextid. On exit, @nextid is updated * to the ID of the found value. To use in a loop, the value pointed to by * nextid must be incremented by the user. */ void *idr_get_next(struct idr *idr, int *nextid) { unsigned long id = *nextid; void *entry = idr_get_next_ul(idr, &id); if (WARN_ON_ONCE(id > INT_MAX)) return NULL; *nextid = id; return entry; } EXPORT_SYMBOL(idr_get_next); /** * idr_replace() - replace pointer for given ID. * @idr: IDR handle. * @ptr: New pointer to associate with the ID. * @id: ID to change. * * Replace the pointer registered with an ID and return the old value. * This function can be called under the RCU read lock concurrently with * idr_alloc() and idr_remove() (as long as the ID being removed is not * the one being replaced!). * * Returns: the old value on success. %-ENOENT indicates that @id was not * found. %-EINVAL indicates that @ptr was not valid. */ void *idr_replace(struct idr *idr, void *ptr, unsigned long id) { struct radix_tree_node *node; void __rcu **slot = NULL; void *entry; id -= idr->idr_base; entry = __radix_tree_lookup(&idr->idr_rt, id, &node, &slot); if (!slot || radix_tree_tag_get(&idr->idr_rt, id, IDR_FREE)) return ERR_PTR(-ENOENT); __radix_tree_replace(&idr->idr_rt, node, slot, ptr); return entry; } EXPORT_SYMBOL(idr_replace); /** * DOC: IDA description * * The IDA is an ID allocator which does not provide the ability to * associate an ID with a pointer. As such, it only needs to store one * bit per ID, and so is more space efficient than an IDR. To use an IDA, * define it using DEFINE_IDA() (or embed a &struct ida in a data structure, * then initialise it using ida_init()). To allocate a new ID, call * ida_alloc(), ida_alloc_min(), ida_alloc_max() or ida_alloc_range(). * To free an ID, call ida_free(). * * ida_destroy() can be used to dispose of an IDA without needing to * free the individual IDs in it. You can use ida_is_empty() to find * out whether the IDA has any IDs currently allocated. * * The IDA handles its own locking. It is safe to call any of the IDA * functions without synchronisation in your code. * * IDs are currently limited to the range [0-INT_MAX]. If this is an awkward * limitation, it should be quite straightforward to raise the maximum. */ /* * Developer's notes: * * The IDA uses the functionality provided by the XArray to store bitmaps in * each entry. The XA_FREE_MARK is only cleared when all bits in the bitmap * have been set. * * I considered telling the XArray that each slot is an order-10 node * and indexing by bit number, but the XArray can't allow a single multi-index * entry in the head, which would significantly increase memory consumption * for the IDA. So instead we divide the index by the number of bits in the * leaf bitmap before doing a radix tree lookup. * * As an optimisation, if there are only a few low bits set in any given * leaf, instead of allocating a 128-byte bitmap, we store the bits * as a value entry. Value entries never have the XA_FREE_MARK cleared * because we can always convert them into a bitmap entry. * * It would be possible to optimise further; once we've run out of a * single 128-byte bitmap, we currently switch to a 576-byte node, put * the 128-byte bitmap in the first entry and then start allocating extra * 128-byte entries. We could instead use the 512 bytes of the node's * data as a bitmap before moving to that scheme. I do not believe this * is a worthwhile optimisation; Rasmus Villemoes surveyed the current * users of the IDA and almost none of them use more than 1024 entries. * Those that do use more than the 8192 IDs that the 512 bytes would * provide. * * The IDA always uses a lock to alloc/free. If we add a 'test_bit' * equivalent, it will still need locking. Going to RCU lookup would require * using RCU to free bitmaps, and that's not trivial without embedding an * RCU head in the bitmap, which adds a 2-pointer overhead to each 128-byte * bitmap, which is excessive. */ /** * ida_alloc_range() - Allocate an unused ID. * @ida: IDA handle. * @min: Lowest ID to allocate. * @max: Highest ID to allocate. * @gfp: Memory allocation flags. * * Allocate an ID between @min and @max, inclusive. The allocated ID will * not exceed %INT_MAX, even if @max is larger. * * Context: Any context. It is safe to call this function without * locking in your code. * Return: The allocated ID, or %-ENOMEM if memory could not be allocated, * or %-ENOSPC if there are no free IDs. */ int ida_alloc_range(struct ida *ida, unsigned int min, unsigned int max, gfp_t gfp) { XA_STATE(xas, &ida->xa, min / IDA_BITMAP_BITS); unsigned bit = min % IDA_BITMAP_BITS; unsigned long flags; struct ida_bitmap *bitmap, *alloc = NULL; if ((int)min < 0) return -ENOSPC; if ((int)max < 0) max = INT_MAX; retry: xas_lock_irqsave(&xas, flags); next: bitmap = xas_find_marked(&xas, max / IDA_BITMAP_BITS, XA_FREE_MARK); if (xas.xa_index > min / IDA_BITMAP_BITS) bit = 0; if (xas.xa_index * IDA_BITMAP_BITS + bit > max) goto nospc; if (xa_is_value(bitmap)) { unsigned long tmp = xa_to_value(bitmap); if (bit < BITS_PER_XA_VALUE) { bit = find_next_zero_bit(&tmp, BITS_PER_XA_VALUE, bit); if (xas.xa_index * IDA_BITMAP_BITS + bit > max) goto nospc; if (bit < BITS_PER_XA_VALUE) { tmp |= 1UL << bit; xas_store(&xas, xa_mk_value(tmp)); goto out; } } bitmap = alloc; if (!bitmap) bitmap = kzalloc(sizeof(*bitmap), GFP_NOWAIT); if (!bitmap) goto alloc; bitmap->bitmap[0] = tmp; xas_store(&xas, bitmap); if (xas_error(&xas)) { bitmap->bitmap[0] = 0; goto out; } } if (bitmap) { bit = find_next_zero_bit(bitmap->bitmap, IDA_BITMAP_BITS, bit); if (xas.xa_index * IDA_BITMAP_BITS + bit > max) goto nospc; if (bit == IDA_BITMAP_BITS) goto next; __set_bit(bit, bitmap->bitmap); if (bitmap_full(bitmap->bitmap, IDA_BITMAP_BITS)) xas_clear_mark(&xas, XA_FREE_MARK); } else { if (bit < BITS_PER_XA_VALUE) { bitmap = xa_mk_value(1UL << bit); } else { bitmap = alloc; if (!bitmap) bitmap = kzalloc(sizeof(*bitmap), GFP_NOWAIT); if (!bitmap) goto alloc; __set_bit(bit, bitmap->bitmap); } xas_store(&xas, bitmap); } out: xas_unlock_irqrestore(&xas, flags); if (xas_nomem(&xas, gfp)) { xas.xa_index = min / IDA_BITMAP_BITS; bit = min % IDA_BITMAP_BITS; goto retry; } if (bitmap != alloc) kfree(alloc); if (xas_error(&xas)) return xas_error(&xas); return xas.xa_index * IDA_BITMAP_BITS + bit; alloc: xas_unlock_irqrestore(&xas, flags); alloc = kzalloc(sizeof(*bitmap), gfp); if (!alloc) return -ENOMEM; xas_set(&xas, min / IDA_BITMAP_BITS); bit = min % IDA_BITMAP_BITS; goto retry; nospc: xas_unlock_irqrestore(&xas, flags); kfree(alloc); return -ENOSPC; } EXPORT_SYMBOL(ida_alloc_range); /** * ida_free() - Release an allocated ID. * @ida: IDA handle. * @id: Previously allocated ID. * * Context: Any context. It is safe to call this function without * locking in your code. */ void ida_free(struct ida *ida, unsigned int id) { XA_STATE(xas, &ida->xa, id / IDA_BITMAP_BITS); unsigned bit = id % IDA_BITMAP_BITS; struct ida_bitmap *bitmap; unsigned long flags; if ((int)id < 0) return; xas_lock_irqsave(&xas, flags); bitmap = xas_load(&xas); if (xa_is_value(bitmap)) { unsigned long v = xa_to_value(bitmap); if (bit >= BITS_PER_XA_VALUE) goto err; if (!(v & (1UL << bit))) goto err; v &= ~(1UL << bit); if (!v) goto delete; xas_store(&xas, xa_mk_value(v)); } else { if (!bitmap || !test_bit(bit, bitmap->bitmap)) goto err; __clear_bit(bit, bitmap->bitmap); xas_set_mark(&xas, XA_FREE_MARK); if (bitmap_empty(bitmap->bitmap, IDA_BITMAP_BITS)) { kfree(bitmap); delete: xas_store(&xas, NULL); } } xas_unlock_irqrestore(&xas, flags); return; err: xas_unlock_irqrestore(&xas, flags); WARN(1, "ida_free called for id=%d which is not allocated.\n", id); } EXPORT_SYMBOL(ida_free); /** * ida_destroy() - Free all IDs. * @ida: IDA handle. * * Calling this function frees all IDs and releases all resources used * by an IDA. When this call returns, the IDA is empty and can be reused * or freed. If the IDA is already empty, there is no need to call this * function. * * Context: Any context. It is safe to call this function without * locking in your code. */ void ida_destroy(struct ida *ida) { XA_STATE(xas, &ida->xa, 0); struct ida_bitmap *bitmap; unsigned long flags; xas_lock_irqsave(&xas, flags); xas_for_each(&xas, bitmap, ULONG_MAX) { if (!xa_is_value(bitmap)) kfree(bitmap); xas_store(&xas, NULL); } xas_unlock_irqrestore(&xas, flags); } EXPORT_SYMBOL(ida_destroy); #ifndef __KERNEL__ extern void xa_dump_index(unsigned long index, unsigned int shift); #define IDA_CHUNK_SHIFT ilog2(IDA_BITMAP_BITS) static void ida_dump_entry(void *entry, unsigned long index) { unsigned long i; if (!entry) return; if (xa_is_node(entry)) { struct xa_node *node = xa_to_node(entry); unsigned int shift = node->shift + IDA_CHUNK_SHIFT + XA_CHUNK_SHIFT; xa_dump_index(index * IDA_BITMAP_BITS, shift); xa_dump_node(node); for (i = 0; i < XA_CHUNK_SIZE; i++) ida_dump_entry(node->slots[i], index | (i << node->shift)); } else if (xa_is_value(entry)) { xa_dump_index(index * IDA_BITMAP_BITS, ilog2(BITS_PER_LONG)); pr_cont("value: data %lx [%px]\n", xa_to_value(entry), entry); } else { struct ida_bitmap *bitmap = entry; xa_dump_index(index * IDA_BITMAP_BITS, IDA_CHUNK_SHIFT); pr_cont("bitmap: %p data", bitmap); for (i = 0; i < IDA_BITMAP_LONGS; i++) pr_cont(" %lx", bitmap->bitmap[i]); pr_cont("\n"); } } static void ida_dump(struct ida *ida) { struct xarray *xa = &ida->xa; pr_debug("ida: %p node %p free %d\n", ida, xa->xa_head, xa->xa_flags >> ROOT_TAG_SHIFT); ida_dump_entry(xa->xa_head, 0); } #endif
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3808 3809 3810 3811 3812 3813 3814 3815 3816 3817 3818 3819 3820 3821 3822 3823 3824 3825 3826 3827 3828 3829 3830 3831 3832 3833 3834 3835 3836 3837 3838 3839 3840 3841 3842 3843 3844 3845 3846 3847 3848 3849 3850 3851 3852 3853 3854 3855 3856 3857 3858 3859 3860 3861 3862 3863 3864 3865 3866 3867 3868 3869 3870 3871 3872 3873 3874 3875 3876 3877 3878 3879 3880 // SPDX-License-Identifier: (GPL-2.0 OR MPL-1.1) /* * * Functions that talk to the USB variant of the Intersil hfa384x MAC * * Copyright (C) 1999 AbsoluteValue Systems, Inc. All Rights Reserved. * -------------------------------------------------------------------- * * linux-wlan * * -------------------------------------------------------------------- * * Inquiries regarding the linux-wlan Open Source project can be * made directly to: * * AbsoluteValue Systems Inc. * info@linux-wlan.com * http://www.linux-wlan.com * * -------------------------------------------------------------------- * * Portions of the development of this software were funded by * Intersil Corporation as part of PRISM(R) chipset product development. * * -------------------------------------------------------------------- * * This file implements functions that correspond to the prism2/hfa384x * 802.11 MAC hardware and firmware host interface. * * The functions can be considered to represent several levels of * abstraction. The lowest level functions are simply C-callable wrappers * around the register accesses. The next higher level represents C-callable * prism2 API functions that match the Intersil documentation as closely * as is reasonable. The next higher layer implements common sequences * of invocations of the API layer (e.g. write to bap, followed by cmd). * * Common sequences: * hfa384x_drvr_xxx Highest level abstractions provided by the * hfa384x code. They are driver defined wrappers * for common sequences. These functions generally * use the services of the lower levels. * * hfa384x_drvr_xxxconfig An example of the drvr level abstraction. These * functions are wrappers for the RID get/set * sequence. They call copy_[to|from]_bap() and * cmd_access(). These functions operate on the * RIDs and buffers without validation. The caller * is responsible for that. * * API wrapper functions: * hfa384x_cmd_xxx functions that provide access to the f/w commands. * The function arguments correspond to each command * argument, even command arguments that get packed * into single registers. These functions _just_ * issue the command by setting the cmd/parm regs * & reading the status/resp regs. Additional * activities required to fully use a command * (read/write from/to bap, get/set int status etc.) * are implemented separately. Think of these as * C-callable prism2 commands. * * Lowest Layer Functions: * hfa384x_docmd_xxx These functions implement the sequence required * to issue any prism2 command. Primarily used by the * hfa384x_cmd_xxx functions. * * hfa384x_bap_xxx BAP read/write access functions. * Note: we usually use BAP0 for non-interrupt context * and BAP1 for interrupt context. * * hfa384x_dl_xxx download related functions. * * Driver State Issues: * Note that there are two pairs of functions that manage the * 'initialized' and 'running' states of the hw/MAC combo. The four * functions are create(), destroy(), start(), and stop(). create() * sets up the data structures required to support the hfa384x_* * functions and destroy() cleans them up. The start() function gets * the actual hardware running and enables the interrupts. The stop() * function shuts the hardware down. The sequence should be: * create() * start() * . * . Do interesting things w/ the hardware * . * stop() * destroy() * * Note that destroy() can be called without calling stop() first. * -------------------------------------------------------------------- */ #include <linux/module.h> #include <linux/kernel.h> #include <linux/sched.h> #include <linux/types.h> #include <linux/slab.h> #include <linux/wireless.h> #include <linux/netdevice.h> #include <linux/timer.h> #include <linux/io.h> #include <linux/delay.h> #include <asm/byteorder.h> #include <linux/bitops.h> #include <linux/list.h> #include <linux/usb.h> #include <linux/byteorder/generic.h> #include "p80211types.h" #include "p80211hdr.h" #include "p80211mgmt.h" #include "p80211conv.h" #include "p80211msg.h" #include "p80211netdev.h" #include "p80211req.h" #include "p80211metadef.h" #include "p80211metastruct.h" #include "hfa384x.h" #include "prism2mgmt.h" enum cmd_mode { DOWAIT = 0, DOASYNC }; #define THROTTLE_JIFFIES (HZ / 8) #define URB_ASYNC_UNLINK 0 #define USB_QUEUE_BULK 0 #define ROUNDUP64(a) (((a) + 63) & ~63) #ifdef DEBUG_USB static void dbprint_urb(struct urb *urb); #endif static void hfa384x_int_rxmonitor(struct wlandevice *wlandev, struct hfa384x_usb_rxfrm *rxfrm); static void hfa384x_usb_defer(struct work_struct *data); static int submit_rx_urb(struct hfa384x *hw, gfp_t flags); static int submit_tx_urb(struct hfa384x *hw, struct urb *tx_urb, gfp_t flags); /*---------------------------------------------------*/ /* Callbacks */ static void hfa384x_usbout_callback(struct urb *urb); static void hfa384x_ctlxout_callback(struct urb *urb); static void hfa384x_usbin_callback(struct urb *urb); static void hfa384x_usbin_txcompl(struct wlandevice *wlandev, union hfa384x_usbin *usbin); static void hfa384x_usbin_rx(struct wlandevice *wlandev, struct sk_buff *skb); static void hfa384x_usbin_info(struct wlandevice *wlandev, union hfa384x_usbin *usbin); static void hfa384x_usbin_ctlx(struct hfa384x *hw, union hfa384x_usbin *usbin, int urb_status); /*---------------------------------------------------*/ /* Functions to support the prism2 usb command queue */ static void hfa384x_usbctlxq_run(struct hfa384x *hw); static void hfa384x_usbctlx_reqtimerfn(struct timer_list *t); static void hfa384x_usbctlx_resptimerfn(struct timer_list *t); static void hfa384x_usb_throttlefn(struct timer_list *t); static void hfa384x_usbctlx_completion_task(struct work_struct *work); static void hfa384x_usbctlx_reaper_task(struct work_struct *work); static int hfa384x_usbctlx_submit(struct hfa384x *hw, struct hfa384x_usbctlx *ctlx); static void unlocked_usbctlx_complete(struct hfa384x *hw, struct hfa384x_usbctlx *ctlx); struct usbctlx_completor { int (*complete)(struct usbctlx_completor *completor); }; static int hfa384x_usbctlx_complete_sync(struct hfa384x *hw, struct hfa384x_usbctlx *ctlx, struct usbctlx_completor *completor); static int unlocked_usbctlx_cancel_async(struct hfa384x *hw, struct hfa384x_usbctlx *ctlx); static void hfa384x_cb_status(struct hfa384x *hw, const struct hfa384x_usbctlx *ctlx); static int usbctlx_get_status(const struct hfa384x_usb_statusresp *cmdresp, struct hfa384x_cmdresult *result); static void usbctlx_get_rridresult(const struct hfa384x_usb_rridresp *rridresp, struct hfa384x_rridresult *result); /*---------------------------------------------------*/ /* Low level req/resp CTLX formatters and submitters */ static inline int hfa384x_docmd(struct hfa384x *hw, struct hfa384x_metacmd *cmd); static int hfa384x_dorrid(struct hfa384x *hw, enum cmd_mode mode, u16 rid, void *riddata, unsigned int riddatalen, ctlx_cmdcb_t cmdcb, ctlx_usercb_t usercb, void *usercb_data); static int hfa384x_dowrid(struct hfa384x *hw, enum cmd_mode mode, u16 rid, void *riddata, unsigned int riddatalen, ctlx_cmdcb_t cmdcb, ctlx_usercb_t usercb, void *usercb_data); static int hfa384x_dormem(struct hfa384x *hw, u16 page, u16 offset, void *data, unsigned int len); static int hfa384x_dowmem(struct hfa384x *hw, u16 page, u16 offset, void *data, unsigned int len); static int hfa384x_isgood_pdrcode(u16 pdrcode); static inline const char *ctlxstr(enum ctlx_state s) { static const char * const ctlx_str[] = { "Initial state", "Complete", "Request failed", "Request pending", "Request packet submitted", "Request packet completed", "Response packet completed" }; return ctlx_str[s]; }; static inline struct hfa384x_usbctlx *get_active_ctlx(struct hfa384x *hw) { return list_entry(hw->ctlxq.active.next, struct hfa384x_usbctlx, list); } #ifdef DEBUG_USB void dbprint_urb(struct urb *urb) { pr_debug("urb->pipe=0x%08x\n", urb->pipe); pr_debug("urb->status=0x%08x\n", urb->status); pr_debug("urb->transfer_flags=0x%08x\n", urb->transfer_flags); pr_debug("urb->transfer_buffer=0x%08x\n", (unsigned int)urb->transfer_buffer); pr_debug("urb->transfer_buffer_length=0x%08x\n", urb->transfer_buffer_length); pr_debug("urb->actual_length=0x%08x\n", urb->actual_length); pr_debug("urb->setup_packet(ctl)=0x%08x\n", (unsigned int)urb->setup_packet); pr_debug("urb->start_frame(iso/irq)=0x%08x\n", urb->start_frame); pr_debug("urb->interval(irq)=0x%08x\n", urb->interval); pr_debug("urb->error_count(iso)=0x%08x\n", urb->error_count); pr_debug("urb->context=0x%08x\n", (unsigned int)urb->context); pr_debug("urb->complete=0x%08x\n", (unsigned int)urb->complete); } #endif /*---------------------------------------------------------------- * submit_rx_urb * * Listen for input data on the BULK-IN pipe. If the pipe has * stalled then schedule it to be reset. * * Arguments: * hw device struct * memflags memory allocation flags * * Returns: * error code from submission * * Call context: * Any *---------------------------------------------------------------- */ static int submit_rx_urb(struct hfa384x *hw, gfp_t memflags) { struct sk_buff *skb; int result; skb = dev_alloc_skb(sizeof(union hfa384x_usbin)); if (!skb) { result = -ENOMEM; goto done; } /* Post the IN urb */ usb_fill_bulk_urb(&hw->rx_urb, hw->usb, hw->endp_in, skb->data, sizeof(union hfa384x_usbin), hfa384x_usbin_callback, hw->wlandev); hw->rx_urb_skb = skb; result = -ENOLINK; if (!hw->wlandev->hwremoved && !test_bit(WORK_RX_HALT, &hw->usb_flags)) { result = usb_submit_urb(&hw->rx_urb, memflags); /* Check whether we need to reset the RX pipe */ if (result == -EPIPE) { netdev_warn(hw->wlandev->netdev, "%s rx pipe stalled: requesting reset\n", hw->wlandev->netdev->name); if (!test_and_set_bit(WORK_RX_HALT, &hw->usb_flags)) schedule_work(&hw->usb_work); } } /* Don't leak memory if anything should go wrong */ if (result != 0) { dev_kfree_skb(skb); hw->rx_urb_skb = NULL; } done: return result; } /*---------------------------------------------------------------- * submit_tx_urb * * Prepares and submits the URB of transmitted data. If the * submission fails then it will schedule the output pipe to * be reset. * * Arguments: * hw device struct * tx_urb URB of data for transmission * memflags memory allocation flags * * Returns: * error code from submission * * Call context: * Any *---------------------------------------------------------------- */ static int submit_tx_urb(struct hfa384x *hw, struct urb *tx_urb, gfp_t memflags) { struct net_device *netdev = hw->wlandev->netdev; int result; result = -ENOLINK; if (netif_running(netdev)) { if (!hw->wlandev->hwremoved && !test_bit(WORK_TX_HALT, &hw->usb_flags)) { result = usb_submit_urb(tx_urb, memflags); /* Test whether we need to reset the TX pipe */ if (result == -EPIPE) { netdev_warn(hw->wlandev->netdev, "%s tx pipe stalled: requesting reset\n", netdev->name); set_bit(WORK_TX_HALT, &hw->usb_flags); schedule_work(&hw->usb_work); } else if (result == 0) { netif_stop_queue(netdev); } } } return result; } /*---------------------------------------------------------------- * hfa394x_usb_defer * * There are some things that the USB stack cannot do while * in interrupt context, so we arrange this function to run * in process context. * * Arguments: * hw device structure * * Returns: * nothing * * Call context: * process (by design) *---------------------------------------------------------------- */ static void hfa384x_usb_defer(struct work_struct *data) { struct hfa384x *hw = container_of(data, struct hfa384x, usb_work); struct net_device *netdev = hw->wlandev->netdev; /* Don't bother trying to reset anything if the plug * has been pulled ... */ if (hw->wlandev->hwremoved) return; /* Reception has stopped: try to reset the input pipe */ if (test_bit(WORK_RX_HALT, &hw->usb_flags)) { int ret; usb_kill_urb(&hw->rx_urb); /* Cannot be holding spinlock! */ ret = usb_clear_halt(hw->usb, hw->endp_in); if (ret != 0) { netdev_err(hw->wlandev->netdev, "Failed to clear rx pipe for %s: err=%d\n", netdev->name, ret); } else { netdev_info(hw->wlandev->netdev, "%s rx pipe reset complete.\n", netdev->name); clear_bit(WORK_RX_HALT, &hw->usb_flags); set_bit(WORK_RX_RESUME, &hw->usb_flags); } } /* Resume receiving data back from the device. */ if (test_bit(WORK_RX_RESUME, &hw->usb_flags)) { int ret; ret = submit_rx_urb(hw, GFP_KERNEL); if (ret != 0) { netdev_err(hw->wlandev->netdev, "Failed to resume %s rx pipe.\n", netdev->name); } else { clear_bit(WORK_RX_RESUME, &hw->usb_flags); } } /* Transmission has stopped: try to reset the output pipe */ if (test_bit(WORK_TX_HALT, &hw->usb_flags)) { int ret; usb_kill_urb(&hw->tx_urb); ret = usb_clear_halt(hw->usb, hw->endp_out); if (ret != 0) { netdev_err(hw->wlandev->netdev, "Failed to clear tx pipe for %s: err=%d\n", netdev->name, ret); } else { netdev_info(hw->wlandev->netdev, "%s tx pipe reset complete.\n", netdev->name); clear_bit(WORK_TX_HALT, &hw->usb_flags); set_bit(WORK_TX_RESUME, &hw->usb_flags); /* Stopping the BULK-OUT pipe also blocked * us from sending any more CTLX URBs, so * we need to re-run our queue ... */ hfa384x_usbctlxq_run(hw); } } /* Resume transmitting. */ if (test_and_clear_bit(WORK_TX_RESUME, &hw->usb_flags)) netif_wake_queue(hw->wlandev->netdev); } /*---------------------------------------------------------------- * hfa384x_create * * Sets up the struct hfa384x data structure for use. Note this * does _not_ initialize the actual hardware, just the data structures * we use to keep track of its state. * * Arguments: * hw device structure * irq device irq number * iobase i/o base address for register access * membase memory base address for register access * * Returns: * nothing * * Side effects: * * Call context: * process *---------------------------------------------------------------- */ void hfa384x_create(struct hfa384x *hw, struct usb_device *usb) { hw->usb = usb; /* Set up the waitq */ init_waitqueue_head(&hw->cmdq); /* Initialize the command queue */ spin_lock_init(&hw->ctlxq.lock); INIT_LIST_HEAD(&hw->ctlxq.pending); INIT_LIST_HEAD(&hw->ctlxq.active); INIT_LIST_HEAD(&hw->ctlxq.completing); INIT_LIST_HEAD(&hw->ctlxq.reapable); /* Initialize the authentication queue */ skb_queue_head_init(&hw->authq); INIT_WORK(&hw->reaper_bh, hfa384x_usbctlx_reaper_task); INIT_WORK(&hw->completion_bh, hfa384x_usbctlx_completion_task); INIT_WORK(&hw->link_bh, prism2sta_processing_defer); INIT_WORK(&hw->usb_work, hfa384x_usb_defer); timer_setup(&hw->throttle, hfa384x_usb_throttlefn, 0); timer_setup(&hw->resptimer, hfa384x_usbctlx_resptimerfn, 0); timer_setup(&hw->reqtimer, hfa384x_usbctlx_reqtimerfn, 0); usb_init_urb(&hw->rx_urb); usb_init_urb(&hw->tx_urb); usb_init_urb(&hw->ctlx_urb); hw->link_status = HFA384x_LINK_NOTCONNECTED; hw->state = HFA384x_STATE_INIT; INIT_WORK(&hw->commsqual_bh, prism2sta_commsqual_defer); timer_setup(&hw->commsqual_timer, prism2sta_commsqual_timer, 0); } /*---------------------------------------------------------------- * hfa384x_destroy * * Partner to hfa384x_create(). This function cleans up the hw * structure so that it can be freed by the caller using a simple * kfree. Currently, this function is just a placeholder. If, at some * point in the future, an hw in the 'shutdown' state requires a 'deep' * kfree, this is where it should be done. Note that if this function * is called on a _running_ hw structure, the drvr_stop() function is * called. * * Arguments: * hw device structure * * Returns: * nothing, this function is not allowed to fail. * * Side effects: * * Call context: * process *---------------------------------------------------------------- */ void hfa384x_destroy(struct hfa384x *hw) { struct sk_buff *skb; if (hw->state == HFA384x_STATE_RUNNING) hfa384x_drvr_stop(hw); hw->state = HFA384x_STATE_PREINIT; kfree(hw->scanresults); hw->scanresults = NULL; /* Now to clean out the auth queue */ while ((skb = skb_dequeue(&hw->authq))) dev_kfree_skb(skb); } static struct hfa384x_usbctlx *usbctlx_alloc(void) { struct hfa384x_usbctlx *ctlx; ctlx = kzalloc(sizeof(*ctlx), in_interrupt() ? GFP_ATOMIC : GFP_KERNEL); if (ctlx) init_completion(&ctlx->done); return ctlx; } static int usbctlx_get_status(const struct hfa384x_usb_statusresp *cmdresp, struct hfa384x_cmdresult *result) { result->status = le16_to_cpu(cmdresp->status); result->resp0 = le16_to_cpu(cmdresp->resp0); result->resp1 = le16_to_cpu(cmdresp->resp1); result->resp2 = le16_to_cpu(cmdresp->resp2); pr_debug("cmdresult:status=0x%04x resp0=0x%04x resp1=0x%04x resp2=0x%04x\n", result->status, result->resp0, result->resp1, result->resp2); return result->status & HFA384x_STATUS_RESULT; } static void usbctlx_get_rridresult(const struct hfa384x_usb_rridresp *rridresp, struct hfa384x_rridresult *result) { result->rid = le16_to_cpu(rridresp->rid); result->riddata = rridresp->data; result->riddata_len = ((le16_to_cpu(rridresp->frmlen) - 1) * 2); } /*---------------------------------------------------------------- * Completor object: * This completor must be passed to hfa384x_usbctlx_complete_sync() * when processing a CTLX that returns a struct hfa384x_cmdresult structure. *---------------------------------------------------------------- */ struct usbctlx_cmd_completor { struct usbctlx_completor head; const struct hfa384x_usb_statusresp *cmdresp; struct hfa384x_cmdresult *result; }; static inline int usbctlx_cmd_completor_fn(struct usbctlx_completor *head) { struct usbctlx_cmd_completor *complete; complete = (struct usbctlx_cmd_completor *)head; return usbctlx_get_status(complete->cmdresp, complete->result); } static inline struct usbctlx_completor * init_cmd_completor(struct usbctlx_cmd_completor *completor, const struct hfa384x_usb_statusresp *cmdresp, struct hfa384x_cmdresult *result) { completor->head.complete = usbctlx_cmd_completor_fn; completor->cmdresp = cmdresp; completor->result = result; return &completor->head; } /*---------------------------------------------------------------- * Completor object: * This completor must be passed to hfa384x_usbctlx_complete_sync() * when processing a CTLX that reads a RID. *---------------------------------------------------------------- */ struct usbctlx_rrid_completor { struct usbctlx_completor head; const struct hfa384x_usb_rridresp *rridresp; void *riddata; unsigned int riddatalen; }; static int usbctlx_rrid_completor_fn(struct usbctlx_completor *head) { struct usbctlx_rrid_completor *complete; struct hfa384x_rridresult rridresult; complete = (struct usbctlx_rrid_completor *)head; usbctlx_get_rridresult(complete->rridresp, &rridresult); /* Validate the length, note body len calculation in bytes */ if (rridresult.riddata_len != complete->riddatalen) { pr_warn("RID len mismatch, rid=0x%04x hlen=%d fwlen=%d\n", rridresult.rid, complete->riddatalen, rridresult.riddata_len); return -ENODATA; } memcpy(complete->riddata, rridresult.riddata, complete->riddatalen); return 0; } static inline struct usbctlx_completor * init_rrid_completor(struct usbctlx_rrid_completor *completor, const struct hfa384x_usb_rridresp *rridresp, void *riddata, unsigned int riddatalen) { completor->head.complete = usbctlx_rrid_completor_fn; completor->rridresp = rridresp; completor->riddata = riddata; completor->riddatalen = riddatalen; return &completor->head; } /*---------------------------------------------------------------- * Completor object: * Interprets the results of a synchronous RID-write *---------------------------------------------------------------- */ #define init_wrid_completor init_cmd_completor /*---------------------------------------------------------------- * Completor object: * Interprets the results of a synchronous memory-write *---------------------------------------------------------------- */ #define init_wmem_completor init_cmd_completor /*---------------------------------------------------------------- * Completor object: * Interprets the results of a synchronous memory-read *---------------------------------------------------------------- */ struct usbctlx_rmem_completor { struct usbctlx_completor head; const struct hfa384x_usb_rmemresp *rmemresp; void *data; unsigned int len; }; static int usbctlx_rmem_completor_fn(struct usbctlx_completor *head) { struct usbctlx_rmem_completor *complete = (struct usbctlx_rmem_completor *)head; pr_debug("rmemresp:len=%d\n", complete->rmemresp->frmlen); memcpy(complete->data, complete->rmemresp->data, complete->len); return 0; } static inline struct usbctlx_completor * init_rmem_completor(struct usbctlx_rmem_completor *completor, struct hfa384x_usb_rmemresp *rmemresp, void *data, unsigned int len) { completor->head.complete = usbctlx_rmem_completor_fn; completor->rmemresp = rmemresp; completor->data = data; completor->len = len; return &completor->head; } /*---------------------------------------------------------------- * hfa384x_cb_status * * Ctlx_complete handler for async CMD type control exchanges. * mark the hw struct as such. * * Note: If the handling is changed here, it should probably be * changed in docmd as well. * * Arguments: * hw hw struct * ctlx completed CTLX * * Returns: * nothing * * Side effects: * * Call context: * interrupt *---------------------------------------------------------------- */ static void hfa384x_cb_status(struct hfa384x *hw, const struct hfa384x_usbctlx *ctlx) { if (ctlx->usercb) { struct hfa384x_cmdresult cmdresult; if (ctlx->state != CTLX_COMPLETE) { memset(&cmdresult, 0, sizeof(cmdresult)); cmdresult.status = HFA384x_STATUS_RESULT_SET(HFA384x_CMD_ERR); } else { usbctlx_get_status(&ctlx->inbuf.cmdresp, &cmdresult); } ctlx->usercb(hw, &cmdresult, ctlx->usercb_data); } } /*---------------------------------------------------------------- * hfa384x_cmd_initialize * * Issues the initialize command and sets the hw->state based * on the result. * * Arguments: * hw device structure * * Returns: * 0 success * >0 f/w reported error - f/w status code * <0 driver reported error * * Side effects: * * Call context: * process *---------------------------------------------------------------- */ int hfa384x_cmd_initialize(struct hfa384x *hw) { int result = 0; int i; struct hfa384x_metacmd cmd; cmd.cmd = HFA384x_CMDCODE_INIT; cmd.parm0 = 0; cmd.parm1 = 0; cmd.parm2 = 0; result = hfa384x_docmd(hw, &cmd); pr_debug("cmdresp.init: status=0x%04x, resp0=0x%04x, resp1=0x%04x, resp2=0x%04x\n", cmd.result.status, cmd.result.resp0, cmd.result.resp1, cmd.result.resp2); if (result == 0) { for (i = 0; i < HFA384x_NUMPORTS_MAX; i++) hw->port_enabled[i] = 0; } hw->link_status = HFA384x_LINK_NOTCONNECTED; return result; } /*---------------------------------------------------------------- * hfa384x_cmd_disable * * Issues the disable command to stop communications on one of * the MACs 'ports'. * * Arguments: * hw device structure * macport MAC port number (host order) * * Returns: * 0 success * >0 f/w reported failure - f/w status code * <0 driver reported error (timeout|bad arg) * * Side effects: * * Call context: * process *---------------------------------------------------------------- */ int hfa384x_cmd_disable(struct hfa384x *hw, u16 macport) { struct hfa384x_metacmd cmd; cmd.cmd = HFA384x_CMD_CMDCODE_SET(HFA384x_CMDCODE_DISABLE) | HFA384x_CMD_MACPORT_SET(macport); cmd.parm0 = 0; cmd.parm1 = 0; cmd.parm2 = 0; return hfa384x_docmd(hw, &cmd); } /*---------------------------------------------------------------- * hfa384x_cmd_enable * * Issues the enable command to enable communications on one of * the MACs 'ports'. * * Arguments: * hw device structure * macport MAC port number * * Returns: * 0 success * >0 f/w reported failure - f/w status code * <0 driver reported error (timeout|bad arg) * * Side effects: * * Call context: * process *---------------------------------------------------------------- */ int hfa384x_cmd_enable(struct hfa384x *hw, u16 macport) { struct hfa384x_metacmd cmd; cmd.cmd = HFA384x_CMD_CMDCODE_SET(HFA384x_CMDCODE_ENABLE) | HFA384x_CMD_MACPORT_SET(macport); cmd.parm0 = 0; cmd.parm1 = 0; cmd.parm2 = 0; return hfa384x_docmd(hw, &cmd); } /*---------------------------------------------------------------- * hfa384x_cmd_monitor * * Enables the 'monitor mode' of the MAC. Here's the description of * monitor mode that I've received thus far: * * "The "monitor mode" of operation is that the MAC passes all * frames for which the PLCP checks are correct. All received * MPDUs are passed to the host with MAC Port = 7, with a * receive status of good, FCS error, or undecryptable. Passing * certain MPDUs is a violation of the 802.11 standard, but useful * for a debugging tool." Normal communication is not possible * while monitor mode is enabled. * * Arguments: * hw device structure * enable a code (0x0b|0x0f) that enables/disables * monitor mode. (host order) * * Returns: * 0 success * >0 f/w reported failure - f/w status code * <0 driver reported error (timeout|bad arg) * * Side effects: * * Call context: * process *---------------------------------------------------------------- */ int hfa384x_cmd_monitor(struct hfa384x *hw, u16 enable) { struct hfa384x_metacmd cmd; cmd.cmd = HFA384x_CMD_CMDCODE_SET(HFA384x_CMDCODE_MONITOR) | HFA384x_CMD_AINFO_SET(enable); cmd.parm0 = 0; cmd.parm1 = 0; cmd.parm2 = 0; return hfa384x_docmd(hw, &cmd); } /*---------------------------------------------------------------- * hfa384x_cmd_download * * Sets the controls for the MAC controller code/data download * process. The arguments set the mode and address associated * with a download. Note that the aux registers should be enabled * prior to setting one of the download enable modes. * * Arguments: * hw device structure * mode 0 - Disable programming and begin code exec * 1 - Enable volatile mem programming * 2 - Enable non-volatile mem programming * 3 - Program non-volatile section from NV download * buffer. * (host order) * lowaddr * highaddr For mode 1, sets the high & low order bits of * the "destination address". This address will be * the execution start address when download is * subsequently disabled. * For mode 2, sets the high & low order bits of * the destination in NV ram. * For modes 0 & 3, should be zero. (host order) * NOTE: these are CMD format. * codelen Length of the data to write in mode 2, * zero otherwise. (host order) * * Returns: * 0 success * >0 f/w reported failure - f/w status code * <0 driver reported error (timeout|bad arg) * * Side effects: * * Call context: * process *---------------------------------------------------------------- */ int hfa384x_cmd_download(struct hfa384x *hw, u16 mode, u16 lowaddr, u16 highaddr, u16 codelen) { struct hfa384x_metacmd cmd; pr_debug("mode=%d, lowaddr=0x%04x, highaddr=0x%04x, codelen=%d\n", mode, lowaddr, highaddr, codelen); cmd.cmd = (HFA384x_CMD_CMDCODE_SET(HFA384x_CMDCODE_DOWNLD) | HFA384x_CMD_PROGMODE_SET(mode)); cmd.parm0 = lowaddr; cmd.parm1 = highaddr; cmd.parm2 = codelen; return hfa384x_docmd(hw, &cmd); } /*---------------------------------------------------------------- * hfa384x_corereset * * Perform a reset of the hfa38xx MAC core. We assume that the hw * structure is in its "created" state. That is, it is initialized * with proper values. Note that if a reset is done after the * device has been active for awhile, the caller might have to clean * up some leftover cruft in the hw structure. * * Arguments: * hw device structure * holdtime how long (in ms) to hold the reset * settletime how long (in ms) to wait after releasing * the reset * * Returns: * nothing * * Side effects: * * Call context: * process *---------------------------------------------------------------- */ int hfa384x_corereset(struct hfa384x *hw, int holdtime, int settletime, int genesis) { int result; result = usb_reset_device(hw->usb); if (result < 0) { netdev_err(hw->wlandev->netdev, "usb_reset_device() failed, result=%d.\n", result); } return result; } /*---------------------------------------------------------------- * hfa384x_usbctlx_complete_sync * * Waits for a synchronous CTLX object to complete, * and then handles the response. * * Arguments: * hw device structure * ctlx CTLX ptr * completor functor object to decide what to * do with the CTLX's result. * * Returns: * 0 Success * -ERESTARTSYS Interrupted by a signal * -EIO CTLX failed * -ENODEV Adapter was unplugged * ??? Result from completor * * Side effects: * * Call context: * process *---------------------------------------------------------------- */ static int hfa384x_usbctlx_complete_sync(struct hfa384x *hw, struct hfa384x_usbctlx *ctlx, struct usbctlx_completor *completor) { unsigned long flags; int result; result = wait_for_completion_interruptible(&ctlx->done); spin_lock_irqsave(&hw->ctlxq.lock, flags); /* * We can only handle the CTLX if the USB disconnect * function has not run yet ... */ cleanup: if (hw->wlandev->hwremoved) { spin_unlock_irqrestore(&hw->ctlxq.lock, flags); result = -ENODEV; } else if (result != 0) { int runqueue = 0; /* * We were probably interrupted, so delete * this CTLX asynchronously, kill the timers * and the URB, and then start the next * pending CTLX. * * NOTE: We can only delete the timers and * the URB if this CTLX is active. */ if (ctlx == get_active_ctlx(hw)) { spin_unlock_irqrestore(&hw->ctlxq.lock, flags); del_timer_sync(&hw->reqtimer); del_timer_sync(&hw->resptimer); hw->req_timer_done = 1; hw->resp_timer_done = 1; usb_kill_urb(&hw->ctlx_urb); spin_lock_irqsave(&hw->ctlxq.lock, flags); runqueue = 1; /* * This scenario is so unlikely that I'm * happy with a grubby "goto" solution ... */ if (hw->wlandev->hwremoved) goto cleanup; } /* * The completion task will send this CTLX * to the reaper the next time it runs. We * are no longer in a hurry. */ ctlx->reapable = 1; ctlx->state = CTLX_REQ_FAILED; list_move_tail(&ctlx->list, &hw->ctlxq.completing); spin_unlock_irqrestore(&hw->ctlxq.lock, flags); if (runqueue) hfa384x_usbctlxq_run(hw); } else { if (ctlx->state == CTLX_COMPLETE) { result = completor->complete(completor); } else { netdev_warn(hw->wlandev->netdev, "CTLX[%d] error: state(%s)\n", le16_to_cpu(ctlx->outbuf.type), ctlxstr(ctlx->state)); result = -EIO; } list_del(&ctlx->list); spin_unlock_irqrestore(&hw->ctlxq.lock, flags); kfree(ctlx); } return result; } /*---------------------------------------------------------------- * hfa384x_docmd * * Constructs a command CTLX and submits it. * * NOTE: Any changes to the 'post-submit' code in this function * need to be carried over to hfa384x_cbcmd() since the handling * is virtually identical. * * Arguments: * hw device structure * cmd cmd structure. Includes all arguments and result * data points. All in host order. in host order * * Returns: * 0 success * -EIO CTLX failure * -ERESTARTSYS Awakened on signal * >0 command indicated error, Status and Resp0-2 are * in hw structure. * * Side effects: * * * Call context: * process *---------------------------------------------------------------- */ static inline int hfa384x_docmd(struct hfa384x *hw, struct hfa384x_metacmd *cmd) { int result; struct hfa384x_usbctlx *ctlx; ctlx = usbctlx_alloc(); if (!ctlx) { result = -ENOMEM; goto done; } /* Initialize the command */ ctlx->outbuf.cmdreq.type = cpu_to_le16(HFA384x_USB_CMDREQ); ctlx->outbuf.cmdreq.cmd = cpu_to_le16(cmd->cmd); ctlx->outbuf.cmdreq.parm0 = cpu_to_le16(cmd->parm0); ctlx->outbuf.cmdreq.parm1 = cpu_to_le16(cmd->parm1); ctlx->outbuf.cmdreq.parm2 = cpu_to_le16(cmd->parm2); ctlx->outbufsize = sizeof(ctlx->outbuf.cmdreq); pr_debug("cmdreq: cmd=0x%04x parm0=0x%04x parm1=0x%04x parm2=0x%04x\n", cmd->cmd, cmd->parm0, cmd->parm1, cmd->parm2); ctlx->reapable = DOWAIT; ctlx->cmdcb = NULL; ctlx->usercb = NULL; ctlx->usercb_data = NULL; result = hfa384x_usbctlx_submit(hw, ctlx); if (result != 0) { kfree(ctlx); } else { struct usbctlx_cmd_completor cmd_completor; struct usbctlx_completor *completor; completor = init_cmd_completor(&cmd_completor, &ctlx->inbuf.cmdresp, &cmd->result); result = hfa384x_usbctlx_complete_sync(hw, ctlx, completor); } done: return result; } /*---------------------------------------------------------------- * hfa384x_dorrid * * Constructs a read rid CTLX and issues it. * * NOTE: Any changes to the 'post-submit' code in this function * need to be carried over to hfa384x_cbrrid() since the handling * is virtually identical. * * Arguments: * hw device structure * mode DOWAIT or DOASYNC * rid Read RID number (host order) * riddata Caller supplied buffer that MAC formatted RID.data * record will be written to for DOWAIT calls. Should * be NULL for DOASYNC calls. * riddatalen Buffer length for DOWAIT calls. Zero for DOASYNC calls. * cmdcb command callback for async calls, NULL for DOWAIT calls * usercb user callback for async calls, NULL for DOWAIT calls * usercb_data user supplied data pointer for async calls, NULL * for DOWAIT calls * * Returns: * 0 success * -EIO CTLX failure * -ERESTARTSYS Awakened on signal * -ENODATA riddatalen != macdatalen * >0 command indicated error, Status and Resp0-2 are * in hw structure. * * Side effects: * * Call context: * interrupt (DOASYNC) * process (DOWAIT or DOASYNC) *---------------------------------------------------------------- */ static int hfa384x_dorrid(struct hfa384x *hw, enum cmd_mode mode, u16 rid, void *riddata, unsigned int riddatalen, ctlx_cmdcb_t cmdcb, ctlx_usercb_t usercb, void *usercb_data) { int result; struct hfa384x_usbctlx *ctlx; ctlx = usbctlx_alloc(); if (!ctlx) { result = -ENOMEM; goto done; } /* Initialize the command */ ctlx->outbuf.rridreq.type = cpu_to_le16(HFA384x_USB_RRIDREQ); ctlx->outbuf.rridreq.frmlen = cpu_to_le16(sizeof(ctlx->outbuf.rridreq.rid)); ctlx->outbuf.rridreq.rid = cpu_to_le16(rid); ctlx->outbufsize = sizeof(ctlx->outbuf.rridreq); ctlx->reapable = mode; ctlx->cmdcb = cmdcb; ctlx->usercb = usercb; ctlx->usercb_data = usercb_data; /* Submit the CTLX */ result = hfa384x_usbctlx_submit(hw, ctlx); if (result != 0) { kfree(ctlx); } else if (mode == DOWAIT) { struct usbctlx_rrid_completor completor; result = hfa384x_usbctlx_complete_sync(hw, ctlx, init_rrid_completor (&completor, &ctlx->inbuf.rridresp, riddata, riddatalen)); } done: return result; } /*---------------------------------------------------------------- * hfa384x_dowrid * * Constructs a write rid CTLX and issues it. * * NOTE: Any changes to the 'post-submit' code in this function * need to be carried over to hfa384x_cbwrid() since the handling * is virtually identical. * * Arguments: * hw device structure * enum cmd_mode DOWAIT or DOASYNC * rid RID code * riddata Data portion of RID formatted for MAC * riddatalen Length of the data portion in bytes * cmdcb command callback for async calls, NULL for DOWAIT calls * usercb user callback for async calls, NULL for DOWAIT calls * usercb_data user supplied data pointer for async calls * * Returns: * 0 success * -ETIMEDOUT timed out waiting for register ready or * command completion * >0 command indicated error, Status and Resp0-2 are * in hw structure. * * Side effects: * * Call context: * interrupt (DOASYNC) * process (DOWAIT or DOASYNC) *---------------------------------------------------------------- */ static int hfa384x_dowrid(struct hfa384x *hw, enum cmd_mode mode, u16 rid, void *riddata, unsigned int riddatalen, ctlx_cmdcb_t cmdcb, ctlx_usercb_t usercb, void *usercb_data) { int result; struct hfa384x_usbctlx *ctlx; ctlx = usbctlx_alloc(); if (!ctlx) { result = -ENOMEM; goto done; } /* Initialize the command */ ctlx->outbuf.wridreq.type = cpu_to_le16(HFA384x_USB_WRIDREQ); ctlx->outbuf.wridreq.frmlen = cpu_to_le16((sizeof (ctlx->outbuf.wridreq.rid) + riddatalen + 1) / 2); ctlx->outbuf.wridreq.rid = cpu_to_le16(rid); memcpy(ctlx->outbuf.wridreq.data, riddata, riddatalen); ctlx->outbufsize = sizeof(ctlx->outbuf.wridreq.type) + sizeof(ctlx->outbuf.wridreq.frmlen) + sizeof(ctlx->outbuf.wridreq.rid) + riddatalen; ctlx->reapable = mode; ctlx->cmdcb = cmdcb; ctlx->usercb = usercb; ctlx->usercb_data = usercb_data; /* Submit the CTLX */ result = hfa384x_usbctlx_submit(hw, ctlx); if (result != 0) { kfree(ctlx); } else if (mode == DOWAIT) { struct usbctlx_cmd_completor completor; struct hfa384x_cmdresult wridresult; result = hfa384x_usbctlx_complete_sync(hw, ctlx, init_wrid_completor (&completor, &ctlx->inbuf.wridresp, &wridresult)); } done: return result; } /*---------------------------------------------------------------- * hfa384x_dormem * * Constructs a readmem CTLX and issues it. * * NOTE: Any changes to the 'post-submit' code in this function * need to be carried over to hfa384x_cbrmem() since the handling * is virtually identical. * * Arguments: * hw device structure * page MAC address space page (CMD format) * offset MAC address space offset * data Ptr to data buffer to receive read * len Length of the data to read (max == 2048) * * Returns: * 0 success * -ETIMEDOUT timed out waiting for register ready or * command completion * >0 command indicated error, Status and Resp0-2 are * in hw structure. * * Side effects: * * Call context: * process (DOWAIT) *---------------------------------------------------------------- */ static int hfa384x_dormem(struct hfa384x *hw, u16 page, u16 offset, void *data, unsigned int len) { int result; struct hfa384x_usbctlx *ctlx; ctlx = usbctlx_alloc(); if (!ctlx) { result = -ENOMEM; goto done; } /* Initialize the command */ ctlx->outbuf.rmemreq.type = cpu_to_le16(HFA384x_USB_RMEMREQ); ctlx->outbuf.rmemreq.frmlen = cpu_to_le16(sizeof(ctlx->outbuf.rmemreq.offset) + sizeof(ctlx->outbuf.rmemreq.page) + len); ctlx->outbuf.rmemreq.offset = cpu_to_le16(offset); ctlx->outbuf.rmemreq.page = cpu_to_le16(page); ctlx->outbufsize = sizeof(ctlx->outbuf.rmemreq); pr_debug("type=0x%04x frmlen=%d offset=0x%04x page=0x%04x\n", ctlx->outbuf.rmemreq.type, ctlx->outbuf.rmemreq.frmlen, ctlx->outbuf.rmemreq.offset, ctlx->outbuf.rmemreq.page); pr_debug("pktsize=%zd\n", ROUNDUP64(sizeof(ctlx->outbuf.rmemreq))); ctlx->reapable = DOWAIT; ctlx->cmdcb = NULL; ctlx->usercb = NULL; ctlx->usercb_data = NULL; result = hfa384x_usbctlx_submit(hw, ctlx); if (result != 0) { kfree(ctlx); } else { struct usbctlx_rmem_completor completor; result = hfa384x_usbctlx_complete_sync(hw, ctlx, init_rmem_completor (&completor, &ctlx->inbuf.rmemresp, data, len)); } done: return result; } /*---------------------------------------------------------------- * hfa384x_dowmem * * Constructs a writemem CTLX and issues it. * * NOTE: Any changes to the 'post-submit' code in this function * need to be carried over to hfa384x_cbwmem() since the handling * is virtually identical. * * Arguments: * hw device structure * page MAC address space page (CMD format) * offset MAC address space offset * data Ptr to data buffer containing write data * len Length of the data to read (max == 2048) * * Returns: * 0 success * -ETIMEDOUT timed out waiting for register ready or * command completion * >0 command indicated error, Status and Resp0-2 are * in hw structure. * * Side effects: * * Call context: * interrupt (DOWAIT) * process (DOWAIT) *---------------------------------------------------------------- */ static int hfa384x_dowmem(struct hfa384x *hw, u16 page, u16 offset, void *data, unsigned int len) { int result; struct hfa384x_usbctlx *ctlx; pr_debug("page=0x%04x offset=0x%04x len=%d\n", page, offset, len); ctlx = usbctlx_alloc(); if (!ctlx) { result = -ENOMEM; goto done; } /* Initialize the command */ ctlx->outbuf.wmemreq.type = cpu_to_le16(HFA384x_USB_WMEMREQ); ctlx->outbuf.wmemreq.frmlen = cpu_to_le16(sizeof(ctlx->outbuf.wmemreq.offset) + sizeof(ctlx->outbuf.wmemreq.page) + len); ctlx->outbuf.wmemreq.offset = cpu_to_le16(offset); ctlx->outbuf.wmemreq.page = cpu_to_le16(page); memcpy(ctlx->outbuf.wmemreq.data, data, len); ctlx->outbufsize = sizeof(ctlx->outbuf.wmemreq.type) + sizeof(ctlx->outbuf.wmemreq.frmlen) + sizeof(ctlx->outbuf.wmemreq.offset) + sizeof(ctlx->outbuf.wmemreq.page) + len; ctlx->reapable = DOWAIT; ctlx->cmdcb = NULL; ctlx->usercb = NULL; ctlx->usercb_data = NULL; result = hfa384x_usbctlx_submit(hw, ctlx); if (result != 0) { kfree(ctlx); } else { struct usbctlx_cmd_completor completor; struct hfa384x_cmdresult wmemresult; result = hfa384x_usbctlx_complete_sync(hw, ctlx, init_wmem_completor (&completor, &ctlx->inbuf.wmemresp, &wmemresult)); } done: return result; } /*---------------------------------------------------------------- * hfa384x_drvr_disable * * Issues the disable command to stop communications on one of * the MACs 'ports'. Only macport 0 is valid for stations. * APs may also disable macports 1-6. Only ports that have been * previously enabled may be disabled. * * Arguments: * hw device structure * macport MAC port number (host order) * * Returns: * 0 success * >0 f/w reported failure - f/w status code * <0 driver reported error (timeout|bad arg) * * Side effects: * * Call context: * process *---------------------------------------------------------------- */ int hfa384x_drvr_disable(struct hfa384x *hw, u16 macport) { int result = 0; if ((!hw->isap && macport != 0) || (hw->isap && !(macport <= HFA384x_PORTID_MAX)) || !(hw->port_enabled[macport])) { result = -EINVAL; } else { result = hfa384x_cmd_disable(hw, macport); if (result == 0) hw->port_enabled[macport] = 0; } return result; } /*---------------------------------------------------------------- * hfa384x_drvr_enable * * Issues the enable command to enable communications on one of * the MACs 'ports'. Only macport 0 is valid for stations. * APs may also enable macports 1-6. Only ports that are currently * disabled may be enabled. * * Arguments: * hw device structure * macport MAC port number * * Returns: * 0 success * >0 f/w reported failure - f/w status code * <0 driver reported error (timeout|bad arg) * * Side effects: * * Call context: * process *---------------------------------------------------------------- */ int hfa384x_drvr_enable(struct hfa384x *hw, u16 macport) { int result = 0; if ((!hw->isap && macport != 0) || (hw->isap && !(macport <= HFA384x_PORTID_MAX)) || (hw->port_enabled[macport])) { result = -EINVAL; } else { result = hfa384x_cmd_enable(hw, macport); if (result == 0) hw->port_enabled[macport] = 1; } return result; } /*---------------------------------------------------------------- * hfa384x_drvr_flashdl_enable * * Begins the flash download state. Checks to see that we're not * already in a download state and that a port isn't enabled. * Sets the download state and retrieves the flash download * buffer location, buffer size, and timeout length. * * Arguments: * hw device structure * * Returns: * 0 success * >0 f/w reported error - f/w status code * <0 driver reported error * * Side effects: * * Call context: * process *---------------------------------------------------------------- */ int hfa384x_drvr_flashdl_enable(struct hfa384x *hw) { int result = 0; int i; /* Check that a port isn't active */ for (i = 0; i < HFA384x_PORTID_MAX; i++) { if (hw->port_enabled[i]) { pr_debug("called when port enabled.\n"); return -EINVAL; } } /* Check that we're not already in a download state */ if (hw->dlstate != HFA384x_DLSTATE_DISABLED) return -EINVAL; /* Retrieve the buffer loc&size and timeout */ result = hfa384x_drvr_getconfig(hw, HFA384x_RID_DOWNLOADBUFFER, &hw->bufinfo, sizeof(hw->bufinfo)); if (result) return result; le16_to_cpus(&hw->bufinfo.page); le16_to_cpus(&hw->bufinfo.offset); le16_to_cpus(&hw->bufinfo.len); result = hfa384x_drvr_getconfig16(hw, HFA384x_RID_MAXLOADTIME, &hw->dltimeout); if (result) return result; le16_to_cpus(&hw->dltimeout); pr_debug("flashdl_enable\n"); hw->dlstate = HFA384x_DLSTATE_FLASHENABLED; return result; } /*---------------------------------------------------------------- * hfa384x_drvr_flashdl_disable * * Ends the flash download state. Note that this will cause the MAC * firmware to restart. * * Arguments: * hw device structure * * Returns: * 0 success * >0 f/w reported error - f/w status code * <0 driver reported error * * Side effects: * * Call context: * process *---------------------------------------------------------------- */ int hfa384x_drvr_flashdl_disable(struct hfa384x *hw) { /* Check that we're already in the download state */ if (hw->dlstate != HFA384x_DLSTATE_FLASHENABLED) return -EINVAL; pr_debug("flashdl_enable\n"); /* There isn't much we can do at this point, so I don't */ /* bother w/ the return value */ hfa384x_cmd_download(hw, HFA384x_PROGMODE_DISABLE, 0, 0, 0); hw->dlstate = HFA384x_DLSTATE_DISABLED; return 0; } /*---------------------------------------------------------------- * hfa384x_drvr_flashdl_write * * Performs a FLASH download of a chunk of data. First checks to see * that we're in the FLASH download state, then sets the download * mode, uses the aux functions to 1) copy the data to the flash * buffer, 2) sets the download 'write flash' mode, 3) readback and * compare. Lather rinse, repeat as many times an necessary to get * all the given data into flash. * When all data has been written using this function (possibly * repeatedly), call drvr_flashdl_disable() to end the download state * and restart the MAC. * * Arguments: * hw device structure * daddr Card address to write to. (host order) * buf Ptr to data to write. * len Length of data (host order). * * Returns: * 0 success * >0 f/w reported error - f/w status code * <0 driver reported error * * Side effects: * * Call context: * process *---------------------------------------------------------------- */ int hfa384x_drvr_flashdl_write(struct hfa384x *hw, u32 daddr, void *buf, u32 len) { int result = 0; u32 dlbufaddr; int nburns; u32 burnlen; u32 burndaddr; u16 burnlo; u16 burnhi; int nwrites; u8 *writebuf; u16 writepage; u16 writeoffset; u32 writelen; int i; int j; pr_debug("daddr=0x%08x len=%d\n", daddr, len); /* Check that we're in the flash download state */ if (hw->dlstate != HFA384x_DLSTATE_FLASHENABLED) return -EINVAL; netdev_info(hw->wlandev->netdev, "Download %d bytes to flash @0x%06x\n", len, daddr); /* Convert to flat address for arithmetic */ /* NOTE: dlbuffer RID stores the address in AUX format */ dlbufaddr = HFA384x_ADDR_AUX_MKFLAT(hw->bufinfo.page, hw->bufinfo.offset); pr_debug("dlbuf.page=0x%04x dlbuf.offset=0x%04x dlbufaddr=0x%08x\n", hw->bufinfo.page, hw->bufinfo.offset, dlbufaddr); /* Calculations to determine how many fills of the dlbuffer to do * and how many USB wmemreq's to do for each fill. At this point * in time, the dlbuffer size and the wmemreq size are the same. * Therefore, nwrites should always be 1. The extra complexity * here is a hedge against future changes. */ /* Figure out how many times to do the flash programming */ nburns = len / hw->bufinfo.len; nburns += (len % hw->bufinfo.len) ? 1 : 0; /* For each flash program cycle, how many USB wmemreq's are needed? */ nwrites = hw->bufinfo.len / HFA384x_USB_RWMEM_MAXLEN; nwrites += (hw->bufinfo.len % HFA384x_USB_RWMEM_MAXLEN) ? 1 : 0; /* For each burn */ for (i = 0; i < nburns; i++) { /* Get the dest address and len */ burnlen = (len - (hw->bufinfo.len * i)) > hw->bufinfo.len ? hw->bufinfo.len : (len - (hw->bufinfo.len * i)); burndaddr = daddr + (hw->bufinfo.len * i); burnlo = HFA384x_ADDR_CMD_MKOFF(burndaddr); burnhi = HFA384x_ADDR_CMD_MKPAGE(burndaddr); netdev_info(hw->wlandev->netdev, "Writing %d bytes to flash @0x%06x\n", burnlen, burndaddr); /* Set the download mode */ result = hfa384x_cmd_download(hw, HFA384x_PROGMODE_NV, burnlo, burnhi, burnlen); if (result) { netdev_err(hw->wlandev->netdev, "download(NV,lo=%x,hi=%x,len=%x) cmd failed, result=%d. Aborting d/l\n", burnlo, burnhi, burnlen, result); goto exit_proc; } /* copy the data to the flash download buffer */ for (j = 0; j < nwrites; j++) { writebuf = buf + (i * hw->bufinfo.len) + (j * HFA384x_USB_RWMEM_MAXLEN); writepage = HFA384x_ADDR_CMD_MKPAGE(dlbufaddr + (j * HFA384x_USB_RWMEM_MAXLEN)); writeoffset = HFA384x_ADDR_CMD_MKOFF(dlbufaddr + (j * HFA384x_USB_RWMEM_MAXLEN)); writelen = burnlen - (j * HFA384x_USB_RWMEM_MAXLEN); writelen = writelen > HFA384x_USB_RWMEM_MAXLEN ? HFA384x_USB_RWMEM_MAXLEN : writelen; result = hfa384x_dowmem(hw, writepage, writeoffset, writebuf, writelen); } /* set the download 'write flash' mode */ result = hfa384x_cmd_download(hw, HFA384x_PROGMODE_NVWRITE, 0, 0, 0); if (result) { netdev_err(hw->wlandev->netdev, "download(NVWRITE,lo=%x,hi=%x,len=%x) cmd failed, result=%d. Aborting d/l\n", burnlo, burnhi, burnlen, result); goto exit_proc; } /* TODO: We really should do a readback and compare. */ } exit_proc: /* Leave the firmware in the 'post-prog' mode. flashdl_disable will */ /* actually disable programming mode. Remember, that will cause the */ /* the firmware to effectively reset itself. */ return result; } /*---------------------------------------------------------------- * hfa384x_drvr_getconfig * * Performs the sequence necessary to read a config/info item. * * Arguments: * hw device structure * rid config/info record id (host order) * buf host side record buffer. Upon return it will * contain the body portion of the record (minus the * RID and len). * len buffer length (in bytes, should match record length) * * Returns: * 0 success * >0 f/w reported error - f/w status code * <0 driver reported error * -ENODATA length mismatch between argument and retrieved * record. * * Side effects: * * Call context: * process *---------------------------------------------------------------- */ int hfa384x_drvr_getconfig(struct hfa384x *hw, u16 rid, void *buf, u16 len) { return hfa384x_dorrid(hw, DOWAIT, rid, buf, len, NULL, NULL, NULL); } /*---------------------------------------------------------------- * hfa384x_drvr_setconfig_async * * Performs the sequence necessary to write a config/info item. * * Arguments: * hw device structure * rid config/info record id (in host order) * buf host side record buffer * len buffer length (in bytes) * usercb completion callback * usercb_data completion callback argument * * Returns: * 0 success * >0 f/w reported error - f/w status code * <0 driver reported error * * Side effects: * * Call context: * process *---------------------------------------------------------------- */ int hfa384x_drvr_setconfig_async(struct hfa384x *hw, u16 rid, void *buf, u16 len, ctlx_usercb_t usercb, void *usercb_data) { return hfa384x_dowrid(hw, DOASYNC, rid, buf, len, hfa384x_cb_status, usercb, usercb_data); } /*---------------------------------------------------------------- * hfa384x_drvr_ramdl_disable * * Ends the ram download state. * * Arguments: * hw device structure * * Returns: * 0 success * >0 f/w reported error - f/w status code * <0 driver reported error * * Side effects: * * Call context: * process *---------------------------------------------------------------- */ int hfa384x_drvr_ramdl_disable(struct hfa384x *hw) { /* Check that we're already in the download state */ if (hw->dlstate != HFA384x_DLSTATE_RAMENABLED) return -EINVAL; pr_debug("ramdl_disable()\n"); /* There isn't much we can do at this point, so I don't */ /* bother w/ the return value */ hfa384x_cmd_download(hw, HFA384x_PROGMODE_DISABLE, 0, 0, 0); hw->dlstate = HFA384x_DLSTATE_DISABLED; return 0; } /*---------------------------------------------------------------- * hfa384x_drvr_ramdl_enable * * Begins the ram download state. Checks to see that we're not * already in a download state and that a port isn't enabled. * Sets the download state and calls cmd_download with the * ENABLE_VOLATILE subcommand and the exeaddr argument. * * Arguments: * hw device structure * exeaddr the card execution address that will be * jumped to when ramdl_disable() is called * (host order). * * Returns: * 0 success * >0 f/w reported error - f/w status code * <0 driver reported error * * Side effects: * * Call context: * process *---------------------------------------------------------------- */ int hfa384x_drvr_ramdl_enable(struct hfa384x *hw, u32 exeaddr) { int result = 0; u16 lowaddr; u16 hiaddr; int i; /* Check that a port isn't active */ for (i = 0; i < HFA384x_PORTID_MAX; i++) { if (hw->port_enabled[i]) { netdev_err(hw->wlandev->netdev, "Can't download with a macport enabled.\n"); return -EINVAL; } } /* Check that we're not already in a download state */ if (hw->dlstate != HFA384x_DLSTATE_DISABLED) { netdev_err(hw->wlandev->netdev, "Download state not disabled.\n"); return -EINVAL; } pr_debug("ramdl_enable, exeaddr=0x%08x\n", exeaddr); /* Call the download(1,addr) function */ lowaddr = HFA384x_ADDR_CMD_MKOFF(exeaddr); hiaddr = HFA384x_ADDR_CMD_MKPAGE(exeaddr); result = hfa384x_cmd_download(hw, HFA384x_PROGMODE_RAM, lowaddr, hiaddr, 0); if (result == 0) { /* Set the download state */ hw->dlstate = HFA384x_DLSTATE_RAMENABLED; } else { pr_debug("cmd_download(0x%04x, 0x%04x) failed, result=%d.\n", lowaddr, hiaddr, result); } return result; } /*---------------------------------------------------------------- * hfa384x_drvr_ramdl_write * * Performs a RAM download of a chunk of data. First checks to see * that we're in the RAM download state, then uses the [read|write]mem USB * commands to 1) copy the data, 2) readback and compare. The download * state is unaffected. When all data has been written using * this function, call drvr_ramdl_disable() to end the download state * and restart the MAC. * * Arguments: * hw device structure * daddr Card address to write to. (host order) * buf Ptr to data to write. * len Length of data (host order). * * Returns: * 0 success * >0 f/w reported error - f/w status code * <0 driver reported error * * Side effects: * * Call context: * process *---------------------------------------------------------------- */ int hfa384x_drvr_ramdl_write(struct hfa384x *hw, u32 daddr, void *buf, u32 len) { int result = 0; int nwrites; u8 *data = buf; int i; u32 curraddr; u16 currpage; u16 curroffset; u16 currlen; /* Check that we're in the ram download state */ if (hw->dlstate != HFA384x_DLSTATE_RAMENABLED) return -EINVAL; netdev_info(hw->wlandev->netdev, "Writing %d bytes to ram @0x%06x\n", len, daddr); /* How many dowmem calls? */ nwrites = len / HFA384x_USB_RWMEM_MAXLEN; nwrites += len % HFA384x_USB_RWMEM_MAXLEN ? 1 : 0; /* Do blocking wmem's */ for (i = 0; i < nwrites; i++) { /* make address args */ curraddr = daddr + (i * HFA384x_USB_RWMEM_MAXLEN); currpage = HFA384x_ADDR_CMD_MKPAGE(curraddr); curroffset = HFA384x_ADDR_CMD_MKOFF(curraddr); currlen = len - (i * HFA384x_USB_RWMEM_MAXLEN); if (currlen > HFA384x_USB_RWMEM_MAXLEN) currlen = HFA384x_USB_RWMEM_MAXLEN; /* Do blocking ctlx */ result = hfa384x_dowmem(hw, currpage, curroffset, data + (i * HFA384x_USB_RWMEM_MAXLEN), currlen); if (result) break; /* TODO: We really should have a readback. */ } return result; } /*---------------------------------------------------------------- * hfa384x_drvr_readpda * * Performs the sequence to read the PDA space. Note there is no * drvr_writepda() function. Writing a PDA is * generally implemented by a calling component via calls to * cmd_download and writing to the flash download buffer via the * aux regs. * * Arguments: * hw device structure * buf buffer to store PDA in * len buffer length * * Returns: * 0 success * >0 f/w reported error - f/w status code * <0 driver reported error * -ETIMEDOUT timeout waiting for the cmd regs to become * available, or waiting for the control reg * to indicate the Aux port is enabled. * -ENODATA the buffer does NOT contain a valid PDA. * Either the card PDA is bad, or the auxdata * reads are giving us garbage. * * * Side effects: * * Call context: * process or non-card interrupt. *---------------------------------------------------------------- */ int hfa384x_drvr_readpda(struct hfa384x *hw, void *buf, unsigned int len) { int result = 0; __le16 *pda = buf; int pdaok = 0; int morepdrs = 1; int currpdr = 0; /* word offset of the current pdr */ size_t i; u16 pdrlen; /* pdr length in bytes, host order */ u16 pdrcode; /* pdr code, host order */ u16 currpage; u16 curroffset; struct pdaloc { u32 cardaddr; u16 auxctl; } pdaloc[] = { { HFA3842_PDA_BASE, 0}, { HFA3841_PDA_BASE, 0}, { HFA3841_PDA_BOGUS_BASE, 0} }; /* Read the pda from each known address. */ for (i = 0; i < ARRAY_SIZE(pdaloc); i++) { /* Make address */ currpage = HFA384x_ADDR_CMD_MKPAGE(pdaloc[i].cardaddr); curroffset = HFA384x_ADDR_CMD_MKOFF(pdaloc[i].cardaddr); /* units of bytes *