Verilog to Routing - VPR
CheckSetup.h
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1 #ifndef CHECKSETUP_H
2 #define CHECKSETUP_H
3 #include "vpr_types.h"
4 
5 void CheckSetup(const t_packer_opts& PackerOpts,
6  const t_placer_opts& PlacerOpts,
7  const t_router_opts& RouterOpts,
8  const t_det_routing_arch& RoutingArch,
9  const std::vector<t_segment_inf>& Segments,
10  const t_timing_inf Timing,
11  const t_chan_width_dist Chans);
12 
13 #endif
Defines the detailed routing architecture of the FPGA.
Definition: vpr_types.h:1129
This is a core file that defines the major data types used by VPR.
Definition: vpr_types.h:766
Definition: vpr_types.h:470
Definition: vpr_types.h:867
void CheckSetup(const t_packer_opts &PackerOpts, const t_placer_opts &PlacerOpts, const t_router_opts &RouterOpts, const t_det_routing_arch &RoutingArch, const std::vector< t_segment_inf > &Segments, const t_timing_inf Timing, const t_chan_width_dist Chans)
Definition: CheckSetup.cpp:10
Definition: vpr_types.h:1023