LogicVec Class Reference

A vector-like object containing logic values. More...

#include <logic_vec.h>

Public Member Functions
	LogicVec ()=default
	LogicVec (size_t size_val, vtr::LogicValue init_value)
	LogicVec (std::vector< vtr::LogicValue > values)
const vtr::LogicValue &	operator[] (size_t i) const
	Array indexing operator. More...
vtr::LogicValue &	operator[] (size_t i)
size_t	size () const
	Size accessor. More...
std::vector< vtr::LogicValue >::reverse_iterator	begin ()
std::vector< vtr::LogicValue >::reverse_iterator	end ()
std::vector< vtr::LogicValue >::const_reverse_iterator	begin () const
std::vector< vtr::LogicValue >::const_reverse_iterator	end () const

Private Attributes
std::vector< vtr::LogicValue >	values_

Friends
std::ostream &	operator<< (std::ostream &os, LogicVec logic_vec)
	Output operator which writes the logic vector in verilog format. More...

Detailed Description

A vector-like object containing logic values.

Constructor & Destructor Documentation

LogicVec() [1/3]

LogicVec::LogicVec ( )

default

LogicVec() [2/3]

LogicVec::LogicVec ( size_t  size_val, vtr::LogicValue  init_value  )

inline

LogicVec() [3/3]

LogicVec::LogicVec ( std::vector< vtr::LogicValue >  values )

inline

Member Function Documentation

begin() [1/2]

std::vector<vtr::LogicValue>::reverse_iterator LogicVec::begin ( )

inline

begin() [2/2]

std::vector<vtr::LogicValue>::const_reverse_iterator LogicVec::begin ( ) const

inline

end() [1/2]

std::vector<vtr::LogicValue>::reverse_iterator LogicVec::end ( )

inline

end() [2/2]

std::vector<vtr::LogicValue>::const_reverse_iterator LogicVec::end ( ) const

inline

operator[]() [1/2]

const vtr::LogicValue& LogicVec::operator[] ( size_t  i ) const

inline

Array indexing operator.

operator[]() [2/2]

vtr::LogicValue& LogicVec::operator[] ( size_t  i )

inline

size()

size_t LogicVec::size ( ) const

inline

Size accessor.

Friends And Related Function Documentation

operator<<

std::ostream& operator<< ( std::ostream &  os, LogicVec  logic_vec  )

friend

Output operator which writes the logic vector in verilog format.

Field Documentation

values_

std::vector<vtr::LogicValue> LogicVec::values_

private

The logic values

---

The documentation for this class was generated from the following file:

• logic_vec.h