Verilog to Routing - VPR
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State relating to power analysis. More...
#include <vpr_context.h>
Data Fields | |
t_solution_inf | solution_inf |
t_power_output * | output |
t_power_commonly_used * | commonly_used |
t_power_tech * | tech |
t_power_arch * | arch |
vtr::vector< ClusterNetId, t_net_power > | clb_net_power |
std::unordered_map< AtomNetId, t_net_power > | atom_net_power |
Atom net power info. More... | |
t_power_components | by_component |
Additional Inherited Members | |
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Context ()=default | |
Context (Context &)=delete | |
Context & | operator= (Context &)=delete |
virtual | ~Context ()=default |
State relating to power analysis.
This should contain only data structures related to power analysis, or related power analysis algorithmic state.
t_power_arch* PowerContext::arch |
std::unordered_map<AtomNetId, t_net_power> PowerContext::atom_net_power |
Atom net power info.
t_power_components PowerContext::by_component |
vtr::vector<ClusterNetId, t_net_power> PowerContext::clb_net_power |
t_power_commonly_used* PowerContext::commonly_used |
t_power_output* PowerContext::output |
t_solution_inf PowerContext::solution_inf |
t_power_tech* PowerContext::tech |