Verilog to Routing - VPR
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State relating to timing. More...
#include <vpr_context.h>
Data Fields | |
std::shared_ptr< tatum::TimingGraph > | graph |
The current timing graph. More... | |
std::shared_ptr< tatum::TimingConstraints > | constraints |
The current timing constraints, as loaded from an SDC file (or set by default). More... | |
t_timing_analysis_profile_info | stats |
Additional Inherited Members | |
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Context ()=default | |
Context (Context &)=delete | |
Context & | operator= (Context &)=delete |
virtual | ~Context ()=default |
State relating to timing.
This should contain only data structures related to timing analysis, or related timing analysis algorithmic state.
std::shared_ptr<tatum::TimingConstraints> TimingContext::constraints |
The current timing constraints, as loaded from an SDC file (or set by default).
These specify how timing analysis is performed (e.g. target clock periods)
std::shared_ptr<tatum::TimingGraph> TimingContext::graph |
The current timing graph.
This represents the timing dependencies between pins of the atom netlist
t_timing_analysis_profile_info TimingContext::stats |